1/* Copyright (C) 1997-2024 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
8
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
13
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library; if not, see
16 <https://www.gnu.org/licenses/>. */
17
18#ifndef _FENV_H
19# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
20#endif
21
22/* Define bits representing the exception. We use the bit positions
23 of the appropriate bits in the FPU control word. */
24enum
25 {
26 FE_INVALID =
27#define FE_INVALID 0x01
28 FE_INVALID,
29 __FE_DENORM = 0x02,
30 FE_DIVBYZERO =
31#define FE_DIVBYZERO 0x04
32 FE_DIVBYZERO,
33 FE_OVERFLOW =
34#define FE_OVERFLOW 0x08
35 FE_OVERFLOW,
36 FE_UNDERFLOW =
37#define FE_UNDERFLOW 0x10
38 FE_UNDERFLOW,
39 FE_INEXACT =
40#define FE_INEXACT 0x20
41 FE_INEXACT
42 };
43
44#define FE_ALL_EXCEPT \
45 (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
46
47/* The ix87 FPU supports all of the four defined rounding modes. We
48 use again the bit positions in the FPU control word as the values
49 for the appropriate macros. */
50enum
51 {
52 FE_TONEAREST =
53#define FE_TONEAREST 0
54 FE_TONEAREST,
55 FE_DOWNWARD =
56#define FE_DOWNWARD 0x400
57 FE_DOWNWARD,
58 FE_UPWARD =
59#define FE_UPWARD 0x800
60 FE_UPWARD,
61 FE_TOWARDZERO =
62#define FE_TOWARDZERO 0xc00
63 FE_TOWARDZERO
64 };
65
66
67/* Type representing exception flags. */
68typedef unsigned short int fexcept_t;
69
70
71/* Type representing floating-point environment. This structure
72 corresponds to the layout of the block written by the `fstenv'
73 instruction and has additional fields for the contents of the MXCSR
74 register as written by the `stmxcsr' instruction. */
75typedef struct
76 {
77 unsigned short int __control_word;
78 unsigned short int __glibc_reserved1;
79 unsigned short int __status_word;
80 unsigned short int __glibc_reserved2;
81 unsigned short int __tags;
82 unsigned short int __glibc_reserved3;
83 unsigned int __eip;
84 unsigned short int __cs_selector;
85 unsigned int __opcode:11;
86 unsigned int __glibc_reserved4:5;
87 unsigned int __data_offset;
88 unsigned short int __data_selector;
89 unsigned short int __glibc_reserved5;
90#ifdef __x86_64__
91 unsigned int __mxcsr;
92#endif
93 }
94fenv_t;
95
96/* If the default argument is used we use this value. */
97#define FE_DFL_ENV ((const fenv_t *) -1)
98
99#ifdef __USE_GNU
100/* Floating-point environment where none of the exception is masked. */
101# define FE_NOMASK_ENV ((const fenv_t *) -2)
102#endif
103
104#if __GLIBC_USE (IEC_60559_BFP_EXT_C2X)
105/* Type representing floating-point control modes. */
106typedef struct
107 {
108 unsigned short int __control_word;
109 unsigned short int __glibc_reserved;
110 unsigned int __mxcsr;
111 }
112femode_t;
113
114/* Default floating-point control modes. */
115# define FE_DFL_MODE ((const femode_t *) -1L)
116#endif
117