| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Target Register Enum Values *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | |
| 10 | #ifdef GET_REGINFO_ENUM |
| 11 | #undef GET_REGINFO_ENUM |
| 12 | |
| 13 | namespace llvm { |
| 14 | |
| 15 | class MCRegisterClass; |
| 16 | extern const MCRegisterClass ARMMCRegisterClasses[]; |
| 17 | |
| 18 | namespace ARM { |
| 19 | enum : unsigned { |
| 20 | NoRegister, |
| 21 | APSR = 1, |
| 22 | APSR_NZCV = 2, |
| 23 | CPSR = 3, |
| 24 | FPCXTNS = 4, |
| 25 | FPCXTS = 5, |
| 26 | FPEXC = 6, |
| 27 | FPINST = 7, |
| 28 | FPSCR = 8, |
| 29 | FPSCR_NZCV = 9, |
| 30 | FPSCR_NZCVQC = 10, |
| 31 | FPSID = 11, |
| 32 | ITSTATE = 12, |
| 33 | LR = 13, |
| 34 | PC = 14, |
| 35 | RA_AUTH_CODE = 15, |
| 36 | SP = 16, |
| 37 | SPSR = 17, |
| 38 | VPR = 18, |
| 39 | ZR = 19, |
| 40 | D0 = 20, |
| 41 | D1 = 21, |
| 42 | D2 = 22, |
| 43 | D3 = 23, |
| 44 | D4 = 24, |
| 45 | D5 = 25, |
| 46 | D6 = 26, |
| 47 | D7 = 27, |
| 48 | D8 = 28, |
| 49 | D9 = 29, |
| 50 | D10 = 30, |
| 51 | D11 = 31, |
| 52 | D12 = 32, |
| 53 | D13 = 33, |
| 54 | D14 = 34, |
| 55 | D15 = 35, |
| 56 | D16 = 36, |
| 57 | D17 = 37, |
| 58 | D18 = 38, |
| 59 | D19 = 39, |
| 60 | D20 = 40, |
| 61 | D21 = 41, |
| 62 | D22 = 42, |
| 63 | D23 = 43, |
| 64 | D24 = 44, |
| 65 | D25 = 45, |
| 66 | D26 = 46, |
| 67 | D27 = 47, |
| 68 | D28 = 48, |
| 69 | D29 = 49, |
| 70 | D30 = 50, |
| 71 | D31 = 51, |
| 72 | FPINST2 = 52, |
| 73 | MVFR0 = 53, |
| 74 | MVFR1 = 54, |
| 75 | MVFR2 = 55, |
| 76 | P0 = 56, |
| 77 | Q0 = 57, |
| 78 | Q1 = 58, |
| 79 | Q2 = 59, |
| 80 | Q3 = 60, |
| 81 | Q4 = 61, |
| 82 | Q5 = 62, |
| 83 | Q6 = 63, |
| 84 | Q7 = 64, |
| 85 | Q8 = 65, |
| 86 | Q9 = 66, |
| 87 | Q10 = 67, |
| 88 | Q11 = 68, |
| 89 | Q12 = 69, |
| 90 | Q13 = 70, |
| 91 | Q14 = 71, |
| 92 | Q15 = 72, |
| 93 | R0 = 73, |
| 94 | R1 = 74, |
| 95 | R2 = 75, |
| 96 | R3 = 76, |
| 97 | R4 = 77, |
| 98 | R5 = 78, |
| 99 | R6 = 79, |
| 100 | R7 = 80, |
| 101 | R8 = 81, |
| 102 | R9 = 82, |
| 103 | R10 = 83, |
| 104 | R11 = 84, |
| 105 | R12 = 85, |
| 106 | S0 = 86, |
| 107 | S1 = 87, |
| 108 | S2 = 88, |
| 109 | S3 = 89, |
| 110 | S4 = 90, |
| 111 | S5 = 91, |
| 112 | S6 = 92, |
| 113 | S7 = 93, |
| 114 | S8 = 94, |
| 115 | S9 = 95, |
| 116 | S10 = 96, |
| 117 | S11 = 97, |
| 118 | S12 = 98, |
| 119 | S13 = 99, |
| 120 | S14 = 100, |
| 121 | S15 = 101, |
| 122 | S16 = 102, |
| 123 | S17 = 103, |
| 124 | S18 = 104, |
| 125 | S19 = 105, |
| 126 | S20 = 106, |
| 127 | S21 = 107, |
| 128 | S22 = 108, |
| 129 | S23 = 109, |
| 130 | S24 = 110, |
| 131 | S25 = 111, |
| 132 | S26 = 112, |
| 133 | S27 = 113, |
| 134 | S28 = 114, |
| 135 | S29 = 115, |
| 136 | S30 = 116, |
| 137 | S31 = 117, |
| 138 | D0_D2 = 118, |
| 139 | D1_D3 = 119, |
| 140 | D2_D4 = 120, |
| 141 | D3_D5 = 121, |
| 142 | D4_D6 = 122, |
| 143 | D5_D7 = 123, |
| 144 | D6_D8 = 124, |
| 145 | D7_D9 = 125, |
| 146 | D8_D10 = 126, |
| 147 | D9_D11 = 127, |
| 148 | D10_D12 = 128, |
| 149 | D11_D13 = 129, |
| 150 | D12_D14 = 130, |
| 151 | D13_D15 = 131, |
| 152 | D14_D16 = 132, |
| 153 | D15_D17 = 133, |
| 154 | D16_D18 = 134, |
| 155 | D17_D19 = 135, |
| 156 | D18_D20 = 136, |
| 157 | D19_D21 = 137, |
| 158 | D20_D22 = 138, |
| 159 | D21_D23 = 139, |
| 160 | D22_D24 = 140, |
| 161 | D23_D25 = 141, |
| 162 | D24_D26 = 142, |
| 163 | D25_D27 = 143, |
| 164 | D26_D28 = 144, |
| 165 | D27_D29 = 145, |
| 166 | D28_D30 = 146, |
| 167 | D29_D31 = 147, |
| 168 | Q0_Q1 = 148, |
| 169 | Q1_Q2 = 149, |
| 170 | Q2_Q3 = 150, |
| 171 | Q3_Q4 = 151, |
| 172 | Q4_Q5 = 152, |
| 173 | Q5_Q6 = 153, |
| 174 | Q6_Q7 = 154, |
| 175 | Q7_Q8 = 155, |
| 176 | Q8_Q9 = 156, |
| 177 | Q9_Q10 = 157, |
| 178 | Q10_Q11 = 158, |
| 179 | Q11_Q12 = 159, |
| 180 | Q12_Q13 = 160, |
| 181 | Q13_Q14 = 161, |
| 182 | Q14_Q15 = 162, |
| 183 | Q0_Q1_Q2_Q3 = 163, |
| 184 | Q1_Q2_Q3_Q4 = 164, |
| 185 | Q2_Q3_Q4_Q5 = 165, |
| 186 | Q3_Q4_Q5_Q6 = 166, |
| 187 | Q4_Q5_Q6_Q7 = 167, |
| 188 | Q5_Q6_Q7_Q8 = 168, |
| 189 | Q6_Q7_Q8_Q9 = 169, |
| 190 | Q7_Q8_Q9_Q10 = 170, |
| 191 | Q8_Q9_Q10_Q11 = 171, |
| 192 | Q9_Q10_Q11_Q12 = 172, |
| 193 | Q10_Q11_Q12_Q13 = 173, |
| 194 | Q11_Q12_Q13_Q14 = 174, |
| 195 | Q12_Q13_Q14_Q15 = 175, |
| 196 | R0_R1 = 176, |
| 197 | R2_R3 = 177, |
| 198 | R4_R5 = 178, |
| 199 | R6_R7 = 179, |
| 200 | R8_R9 = 180, |
| 201 | R10_R11 = 181, |
| 202 | R12_SP = 182, |
| 203 | D0_D1_D2 = 183, |
| 204 | D1_D2_D3 = 184, |
| 205 | D2_D3_D4 = 185, |
| 206 | D3_D4_D5 = 186, |
| 207 | D4_D5_D6 = 187, |
| 208 | D5_D6_D7 = 188, |
| 209 | D6_D7_D8 = 189, |
| 210 | D7_D8_D9 = 190, |
| 211 | D8_D9_D10 = 191, |
| 212 | D9_D10_D11 = 192, |
| 213 | D10_D11_D12 = 193, |
| 214 | D11_D12_D13 = 194, |
| 215 | D12_D13_D14 = 195, |
| 216 | D13_D14_D15 = 196, |
| 217 | D14_D15_D16 = 197, |
| 218 | D15_D16_D17 = 198, |
| 219 | D16_D17_D18 = 199, |
| 220 | D17_D18_D19 = 200, |
| 221 | D18_D19_D20 = 201, |
| 222 | D19_D20_D21 = 202, |
| 223 | D20_D21_D22 = 203, |
| 224 | D21_D22_D23 = 204, |
| 225 | D22_D23_D24 = 205, |
| 226 | D23_D24_D25 = 206, |
| 227 | D24_D25_D26 = 207, |
| 228 | D25_D26_D27 = 208, |
| 229 | D26_D27_D28 = 209, |
| 230 | D27_D28_D29 = 210, |
| 231 | D28_D29_D30 = 211, |
| 232 | D29_D30_D31 = 212, |
| 233 | D0_D2_D4 = 213, |
| 234 | D1_D3_D5 = 214, |
| 235 | D2_D4_D6 = 215, |
| 236 | D3_D5_D7 = 216, |
| 237 | D4_D6_D8 = 217, |
| 238 | D5_D7_D9 = 218, |
| 239 | D6_D8_D10 = 219, |
| 240 | D7_D9_D11 = 220, |
| 241 | D8_D10_D12 = 221, |
| 242 | D9_D11_D13 = 222, |
| 243 | D10_D12_D14 = 223, |
| 244 | D11_D13_D15 = 224, |
| 245 | D12_D14_D16 = 225, |
| 246 | D13_D15_D17 = 226, |
| 247 | D14_D16_D18 = 227, |
| 248 | D15_D17_D19 = 228, |
| 249 | D16_D18_D20 = 229, |
| 250 | D17_D19_D21 = 230, |
| 251 | D18_D20_D22 = 231, |
| 252 | D19_D21_D23 = 232, |
| 253 | D20_D22_D24 = 233, |
| 254 | D21_D23_D25 = 234, |
| 255 | D22_D24_D26 = 235, |
| 256 | D23_D25_D27 = 236, |
| 257 | D24_D26_D28 = 237, |
| 258 | D25_D27_D29 = 238, |
| 259 | D26_D28_D30 = 239, |
| 260 | D27_D29_D31 = 240, |
| 261 | D0_D2_D4_D6 = 241, |
| 262 | D1_D3_D5_D7 = 242, |
| 263 | D2_D4_D6_D8 = 243, |
| 264 | D3_D5_D7_D9 = 244, |
| 265 | D4_D6_D8_D10 = 245, |
| 266 | D5_D7_D9_D11 = 246, |
| 267 | D6_D8_D10_D12 = 247, |
| 268 | D7_D9_D11_D13 = 248, |
| 269 | D8_D10_D12_D14 = 249, |
| 270 | D9_D11_D13_D15 = 250, |
| 271 | D10_D12_D14_D16 = 251, |
| 272 | D11_D13_D15_D17 = 252, |
| 273 | D12_D14_D16_D18 = 253, |
| 274 | D13_D15_D17_D19 = 254, |
| 275 | D14_D16_D18_D20 = 255, |
| 276 | D15_D17_D19_D21 = 256, |
| 277 | D16_D18_D20_D22 = 257, |
| 278 | D17_D19_D21_D23 = 258, |
| 279 | D18_D20_D22_D24 = 259, |
| 280 | D19_D21_D23_D25 = 260, |
| 281 | D20_D22_D24_D26 = 261, |
| 282 | D21_D23_D25_D27 = 262, |
| 283 | D22_D24_D26_D28 = 263, |
| 284 | D23_D25_D27_D29 = 264, |
| 285 | D24_D26_D28_D30 = 265, |
| 286 | D25_D27_D29_D31 = 266, |
| 287 | D1_D2 = 267, |
| 288 | D3_D4 = 268, |
| 289 | D5_D6 = 269, |
| 290 | D7_D8 = 270, |
| 291 | D9_D10 = 271, |
| 292 | D11_D12 = 272, |
| 293 | D13_D14 = 273, |
| 294 | D15_D16 = 274, |
| 295 | D17_D18 = 275, |
| 296 | D19_D20 = 276, |
| 297 | D21_D22 = 277, |
| 298 | D23_D24 = 278, |
| 299 | D25_D26 = 279, |
| 300 | D27_D28 = 280, |
| 301 | D29_D30 = 281, |
| 302 | D1_D2_D3_D4 = 282, |
| 303 | D3_D4_D5_D6 = 283, |
| 304 | D5_D6_D7_D8 = 284, |
| 305 | D7_D8_D9_D10 = 285, |
| 306 | D9_D10_D11_D12 = 286, |
| 307 | D11_D12_D13_D14 = 287, |
| 308 | D13_D14_D15_D16 = 288, |
| 309 | D15_D16_D17_D18 = 289, |
| 310 | D17_D18_D19_D20 = 290, |
| 311 | D19_D20_D21_D22 = 291, |
| 312 | D21_D22_D23_D24 = 292, |
| 313 | D23_D24_D25_D26 = 293, |
| 314 | D25_D26_D27_D28 = 294, |
| 315 | D27_D28_D29_D30 = 295, |
| 316 | NUM_TARGET_REGS // 296 |
| 317 | }; |
| 318 | } // end namespace ARM |
| 319 | |
| 320 | // Register classes |
| 321 | |
| 322 | namespace ARM { |
| 323 | enum { |
| 324 | HPRRegClassID = 0, |
| 325 | FPWithVPRRegClassID = 1, |
| 326 | SPRRegClassID = 2, |
| 327 | FPWithVPR_with_ssub_0RegClassID = 3, |
| 328 | GPRRegClassID = 4, |
| 329 | GPRwithAPSRRegClassID = 5, |
| 330 | GPRwithZRRegClassID = 6, |
| 331 | SPR_8RegClassID = 7, |
| 332 | GPRnopcRegClassID = 8, |
| 333 | GPRnospRegClassID = 9, |
| 334 | GPRwithAPSR_NZCVnospRegClassID = 10, |
| 335 | GPRwithAPSRnospRegClassID = 11, |
| 336 | GPRwithZRnospRegClassID = 12, |
| 337 | GPRnoipRegClassID = 13, |
| 338 | rGPRRegClassID = 14, |
| 339 | GPRnoip_and_GPRnopcRegClassID = 15, |
| 340 | GPRnoip_and_GPRnospRegClassID = 16, |
| 341 | GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID = 17, |
| 342 | tGPRwithpcRegClassID = 18, |
| 343 | FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID = 19, |
| 344 | hGPRRegClassID = 20, |
| 345 | tGPRRegClassID = 21, |
| 346 | tGPREvenRegClassID = 22, |
| 347 | GPRnopc_and_hGPRRegClassID = 23, |
| 348 | GPRnosp_and_hGPRRegClassID = 24, |
| 349 | GPRnoip_and_hGPRRegClassID = 25, |
| 350 | GPRnoip_and_tGPREvenRegClassID = 26, |
| 351 | GPRnosp_and_GPRnopc_and_hGPRRegClassID = 27, |
| 352 | tGPROddRegClassID = 28, |
| 353 | GPRnopc_and_GPRnoip_and_hGPRRegClassID = 29, |
| 354 | GPRnosp_and_GPRnoip_and_hGPRRegClassID = 30, |
| 355 | tcGPRRegClassID = 31, |
| 356 | GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID = 32, |
| 357 | hGPR_and_tGPREvenRegClassID = 33, |
| 358 | tGPR_and_tGPREvenRegClassID = 34, |
| 359 | tGPR_and_tGPROddRegClassID = 35, |
| 360 | tcGPRnotr12RegClassID = 36, |
| 361 | tGPREven_and_tcGPRRegClassID = 37, |
| 362 | FP_STATUS_REGSRegClassID = 38, |
| 363 | hGPR_and_GPRnoip_and_tGPREvenRegClassID = 39, |
| 364 | hGPR_and_tGPROddRegClassID = 40, |
| 365 | tGPREven_and_tcGPRnotr12RegClassID = 41, |
| 366 | tGPROdd_and_tcGPRRegClassID = 42, |
| 367 | CCRRegClassID = 43, |
| 368 | FPCXTRegsRegClassID = 44, |
| 369 | GPRlrRegClassID = 45, |
| 370 | GPRspRegClassID = 46, |
| 371 | VCCRRegClassID = 47, |
| 372 | cl_FPSCR_NZCVRegClassID = 48, |
| 373 | hGPR_and_tGPRwithpcRegClassID = 49, |
| 374 | hGPR_and_tcGPRRegClassID = 50, |
| 375 | DPRRegClassID = 51, |
| 376 | DPR_VFP2RegClassID = 52, |
| 377 | DPR_8RegClassID = 53, |
| 378 | GPRPairRegClassID = 54, |
| 379 | GPRPairnospRegClassID = 55, |
| 380 | GPRPair_with_gsub_0_in_tGPRRegClassID = 56, |
| 381 | GPRPair_with_gsub_0_in_hGPRRegClassID = 57, |
| 382 | GPRPair_with_gsub_0_in_tcGPRRegClassID = 58, |
| 383 | GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID = 59, |
| 384 | GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID = 60, |
| 385 | GPRPair_with_gsub_1_in_GPRspRegClassID = 61, |
| 386 | DPairSpcRegClassID = 62, |
| 387 | DPairSpc_with_ssub_0RegClassID = 63, |
| 388 | DPairSpc_with_ssub_4RegClassID = 64, |
| 389 | DPairSpc_with_dsub_0_in_DPR_8RegClassID = 65, |
| 390 | DPairSpc_with_dsub_2_in_DPR_8RegClassID = 66, |
| 391 | DPairRegClassID = 67, |
| 392 | DPair_with_ssub_0RegClassID = 68, |
| 393 | QPRRegClassID = 69, |
| 394 | DPair_with_ssub_2RegClassID = 70, |
| 395 | DPair_with_dsub_0_in_DPR_8RegClassID = 71, |
| 396 | MQPRRegClassID = 72, |
| 397 | QPR_VFP2RegClassID = 73, |
| 398 | DPair_with_dsub_1_in_DPR_8RegClassID = 74, |
| 399 | QPR_8RegClassID = 75, |
| 400 | DTripleRegClassID = 76, |
| 401 | DTripleSpcRegClassID = 77, |
| 402 | DTripleSpc_with_ssub_0RegClassID = 78, |
| 403 | DTriple_with_ssub_0RegClassID = 79, |
| 404 | DTriple_with_qsub_0_in_QPRRegClassID = 80, |
| 405 | DTriple_with_ssub_2RegClassID = 81, |
| 406 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 82, |
| 407 | DTripleSpc_with_ssub_4RegClassID = 83, |
| 408 | DTriple_with_ssub_4RegClassID = 84, |
| 409 | DTripleSpc_with_ssub_8RegClassID = 85, |
| 410 | DTripleSpc_with_dsub_0_in_DPR_8RegClassID = 86, |
| 411 | DTriple_with_dsub_0_in_DPR_8RegClassID = 87, |
| 412 | DTriple_with_qsub_0_in_MQPRRegClassID = 88, |
| 413 | DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 89, |
| 414 | DTriple_with_dsub_1_in_DPR_8RegClassID = 90, |
| 415 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 91, |
| 416 | DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID = 92, |
| 417 | DTripleSpc_with_dsub_2_in_DPR_8RegClassID = 93, |
| 418 | DTriple_with_dsub_2_in_DPR_8RegClassID = 94, |
| 419 | DTripleSpc_with_dsub_4_in_DPR_8RegClassID = 95, |
| 420 | DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 96, |
| 421 | DTriple_with_qsub_0_in_QPR_8RegClassID = 97, |
| 422 | DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID = 98, |
| 423 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 99, |
| 424 | DQuadSpcRegClassID = 100, |
| 425 | DQuadSpc_with_ssub_0RegClassID = 101, |
| 426 | DQuadSpc_with_ssub_4RegClassID = 102, |
| 427 | DQuadSpc_with_ssub_8RegClassID = 103, |
| 428 | DQuadSpc_with_dsub_0_in_DPR_8RegClassID = 104, |
| 429 | DQuadSpc_with_dsub_2_in_DPR_8RegClassID = 105, |
| 430 | DQuadSpc_with_dsub_4_in_DPR_8RegClassID = 106, |
| 431 | DQuadRegClassID = 107, |
| 432 | DQuad_with_ssub_0RegClassID = 108, |
| 433 | DQuad_with_ssub_2RegClassID = 109, |
| 434 | QQPRRegClassID = 110, |
| 435 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 111, |
| 436 | DQuad_with_ssub_4RegClassID = 112, |
| 437 | DQuad_with_ssub_6RegClassID = 113, |
| 438 | DQuad_with_dsub_0_in_DPR_8RegClassID = 114, |
| 439 | DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 115, |
| 440 | QQPR_with_ssub_0RegClassID = 116, |
| 441 | DQuad_with_dsub_1_in_DPR_8RegClassID = 117, |
| 442 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 118, |
| 443 | MQQPRRegClassID = 119, |
| 444 | DQuad_with_dsub_2_in_DPR_8RegClassID = 120, |
| 445 | DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 121, |
| 446 | DQuad_with_dsub_3_in_DPR_8RegClassID = 122, |
| 447 | DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 123, |
| 448 | MQQPR_with_qsub_0_in_QPR_8RegClassID = 124, |
| 449 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 125, |
| 450 | MQQPR_with_dsub_2_in_DPR_8RegClassID = 126, |
| 451 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID = 127, |
| 452 | QQQQPRRegClassID = 128, |
| 453 | QQQQPR_with_ssub_0RegClassID = 129, |
| 454 | QQQQPR_with_ssub_4RegClassID = 130, |
| 455 | QQQQPR_with_ssub_8RegClassID = 131, |
| 456 | MQQQQPRRegClassID = 132, |
| 457 | MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID = 133, |
| 458 | MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClassID = 134, |
| 459 | MQQQQPR_with_qsub_2_in_QPR_8RegClassID = 135, |
| 460 | MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClassID = 136, |
| 461 | |
| 462 | }; |
| 463 | } // end namespace ARM |
| 464 | |
| 465 | |
| 466 | // Register alternate name indices |
| 467 | |
| 468 | namespace ARM { |
| 469 | enum { |
| 470 | NoRegAltName, // 0 |
| 471 | RegNamesRaw, // 1 |
| 472 | NUM_TARGET_REG_ALT_NAMES = 2 |
| 473 | }; |
| 474 | } // end namespace ARM |
| 475 | |
| 476 | |
| 477 | // Subregister indices |
| 478 | |
| 479 | namespace ARM { |
| 480 | enum : uint16_t { |
| 481 | NoSubRegister, |
| 482 | dsub_0, // 1 |
| 483 | dsub_1, // 2 |
| 484 | dsub_2, // 3 |
| 485 | dsub_3, // 4 |
| 486 | dsub_4, // 5 |
| 487 | dsub_5, // 6 |
| 488 | dsub_6, // 7 |
| 489 | dsub_7, // 8 |
| 490 | gsub_0, // 9 |
| 491 | gsub_1, // 10 |
| 492 | qqsub_0, // 11 |
| 493 | qqsub_1, // 12 |
| 494 | qsub_0, // 13 |
| 495 | qsub_1, // 14 |
| 496 | qsub_2, // 15 |
| 497 | qsub_3, // 16 |
| 498 | ssub_0, // 17 |
| 499 | ssub_1, // 18 |
| 500 | ssub_2, // 19 |
| 501 | ssub_3, // 20 |
| 502 | ssub_4, // 21 |
| 503 | ssub_5, // 22 |
| 504 | ssub_6, // 23 |
| 505 | ssub_7, // 24 |
| 506 | ssub_8, // 25 |
| 507 | ssub_9, // 26 |
| 508 | ssub_10, // 27 |
| 509 | ssub_11, // 28 |
| 510 | ssub_12, // 29 |
| 511 | ssub_13, // 30 |
| 512 | ssub_14, // 31 |
| 513 | ssub_15, // 32 |
| 514 | ssub_0_ssub_1_ssub_4_ssub_5, // 33 |
| 515 | ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, // 34 |
| 516 | ssub_2_ssub_3_ssub_6_ssub_7, // 35 |
| 517 | ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, // 36 |
| 518 | ssub_2_ssub_3_ssub_4_ssub_5, // 37 |
| 519 | ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, // 38 |
| 520 | ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 39 |
| 521 | ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, // 40 |
| 522 | ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7, // 41 |
| 523 | ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 42 |
| 524 | ssub_4_ssub_5_ssub_8_ssub_9, // 43 |
| 525 | ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 44 |
| 526 | ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 45 |
| 527 | ssub_6_ssub_7_dsub_5, // 46 |
| 528 | ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, // 47 |
| 529 | ssub_6_ssub_7_dsub_5_dsub_7, // 48 |
| 530 | ssub_6_ssub_7_ssub_8_ssub_9, // 49 |
| 531 | ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 50 |
| 532 | ssub_8_ssub_9_ssub_12_ssub_13, // 51 |
| 533 | ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 52 |
| 534 | dsub_5_dsub_7, // 53 |
| 535 | dsub_5_ssub_12_ssub_13_dsub_7, // 54 |
| 536 | dsub_5_ssub_12_ssub_13, // 55 |
| 537 | ssub_4_ssub_5_ssub_6_ssub_7_qsub_2, // 56 |
| 538 | NUM_TARGET_SUBREGS |
| 539 | }; |
| 540 | } // end namespace ARM |
| 541 | |
| 542 | // Register pressure sets enum. |
| 543 | namespace ARM { |
| 544 | enum RegisterPressureSets { |
| 545 | FPCXTRegs = 0, |
| 546 | GPRlr = 1, |
| 547 | VCCR = 2, |
| 548 | hGPR_and_tGPRwithpc = 3, |
| 549 | cl_FPSCR_NZCV = 4, |
| 550 | GPRsp = 5, |
| 551 | tGPROdd = 6, |
| 552 | tcGPR = 7, |
| 553 | hGPR = 8, |
| 554 | tGPROdd_with_tcGPR = 9, |
| 555 | tGPR = 10, |
| 556 | tGPR_with_tcGPR = 11, |
| 557 | tGPREven = 12, |
| 558 | hGPR_with_tGPREven = 13, |
| 559 | hGPR_with_tGPROdd = 14, |
| 560 | hGPR_with_tcGPR = 15, |
| 561 | tGPR_with_tGPREven = 16, |
| 562 | GPR = 17, |
| 563 | GPRwithZR = 18, |
| 564 | GPRwithAPSR_with_GPRwithZR = 19, |
| 565 | DQuad_with_dsub_0_in_DPR_8 = 20, |
| 566 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR = 21, |
| 567 | HPR = 22, |
| 568 | DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 23, |
| 569 | DPair_with_ssub_0 = 24, |
| 570 | DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 25, |
| 571 | DPairSpc_with_ssub_0 = 26, |
| 572 | DQuad_with_ssub_0 = 27, |
| 573 | DTripleSpc_with_ssub_0 = 28, |
| 574 | QQQQPR_with_ssub_0 = 29, |
| 575 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 30, |
| 576 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 31, |
| 577 | DTriple_with_qsub_0_in_QPR = 32, |
| 578 | DPR = 33, |
| 579 | }; |
| 580 | } // end namespace ARM |
| 581 | |
| 582 | } // end namespace llvm |
| 583 | |
| 584 | #endif // GET_REGINFO_ENUM |
| 585 | |
| 586 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 587 | |* *| |
| 588 | |* MC Register Information *| |
| 589 | |* *| |
| 590 | |* Automatically generated file, do not edit! *| |
| 591 | |* *| |
| 592 | \*===----------------------------------------------------------------------===*/ |
| 593 | |
| 594 | |
| 595 | #ifdef GET_REGINFO_MC_DESC |
| 596 | #undef GET_REGINFO_MC_DESC |
| 597 | |
| 598 | namespace llvm { |
| 599 | |
| 600 | extern const int16_t ARMRegDiffLists[] = { |
| 601 | /* 0 */ -248, 1, 1, 1, 230, 1, -136, 65, -64, 65, -140, 0, |
| 602 | /* 12 */ -249, 1, 1, 1, 231, 1, -137, 65, -64, 65, -139, 0, |
| 603 | /* 24 */ -250, 1, 1, 1, 232, 1, -138, 65, -64, 65, -138, 0, |
| 604 | /* 36 */ -251, 1, 1, 1, 233, 1, -139, 65, -64, 65, -137, 0, |
| 605 | /* 48 */ -252, 1, 1, 1, 234, 1, -140, 65, -64, 65, -136, 0, |
| 606 | /* 60 */ -253, 1, 1, 1, 235, 1, -141, 65, -64, 65, -135, 0, |
| 607 | /* 72 */ -15, -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, -117, -91, -23, 1, 23, -22, 1, 95, 65, -64, 65, 69, -44, 28, -27, 28, 28, -150, 65, 30, -94, 65, 30, 40, 15, -134, 0, |
| 608 | /* 111 */ -15, -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, -117, -91, -24, 1, 24, -23, 1, 95, 65, -64, 65, 70, -45, 28, -27, 28, 29, -151, 65, 30, -94, 65, 30, 41, 15, -134, 0, |
| 609 | /* 150 */ -15, -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, -117, -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, -46, 28, -27, 28, 30, -152, 65, 30, -94, 65, 30, 42, 15, -134, 0, |
| 610 | /* 189 */ -15, -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, -117, -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, -47, 28, -27, 28, 31, -153, 65, 30, -94, 65, 30, 43, 15, -134, 0, |
| 611 | /* 228 */ -15, -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, -117, -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, -48, 28, -27, 28, 32, -154, 65, 30, -94, 65, 30, 44, 15, -134, 0, |
| 612 | /* 267 */ -15, -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, -117, -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, -49, 28, -27, 28, 33, -155, 65, 30, -94, 65, 30, 45, 15, -134, 0, |
| 613 | /* 310 */ -15, -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, -117, -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, -50, 28, -27, 28, 34, -156, 65, 30, -94, 65, 30, 46, 15, -134, 0, |
| 614 | /* 357 */ -15, -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, -117, -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, -51, 28, -27, 28, 35, -157, 65, 30, -94, 65, 30, 47, 15, -134, 0, |
| 615 | /* 408 */ -15, -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, -117, -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, -52, 28, -27, 28, 36, -158, 65, 30, -94, 65, 30, 48, 15, -134, 0, |
| 616 | /* 463 */ -15, -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, -117, -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, -53, 28, -27, 28, 37, -159, 65, 30, -94, 65, 30, 49, 15, -134, 0, |
| 617 | /* 518 */ -15, -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, -117, -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, -54, 28, -27, 28, 38, -160, 65, 30, -94, 65, 30, 50, 15, -134, 0, |
| 618 | /* 573 */ -15, -91, -36, 68, 1, -68, 69, 1, -34, -35, 70, 1, -70, 71, 1, 23, 65, -64, 65, 82, -117, -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, -55, 28, -27, 28, 39, -161, 65, 30, -94, 65, 30, 51, 15, -134, 0, |
| 619 | /* 628 */ -15, -91, -37, 66, 1, -66, 67, 1, -31, -36, 68, 1, -68, 69, 1, 25, 65, -64, 65, 83, -117, -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, -56, 28, -27, 28, 40, -162, 65, 30, -94, 65, 30, 52, 15, -134, 0, |
| 620 | /* 683 */ -254, 81, 1, -81, 1, 1, 236, 1, -142, 65, -64, 65, -134, 0, |
| 621 | /* 697 */ -255, 79, 1, -79, 80, 1, -80, 81, 1, -81, 237, 1, -143, 65, -64, 65, -133, 0, |
| 622 | /* 715 */ -256, 77, 1, -77, 78, 1, -78, 79, 1, -79, 80, 1, 157, 1, -144, 65, -64, 65, -132, 0, |
| 623 | /* 735 */ -257, 75, 1, -75, 76, 1, -76, 77, 1, -77, 78, 1, 160, 1, -145, 65, -64, 65, -131, 0, |
| 624 | /* 755 */ -258, 73, 1, -73, 74, 1, -74, 75, 1, -75, 76, 1, 163, 1, -146, 65, -64, 65, -130, 0, |
| 625 | /* 775 */ -259, 71, 1, -71, 72, 1, -72, 73, 1, -73, 74, 1, 166, 1, -147, 65, -64, 65, -129, 0, |
| 626 | /* 795 */ -260, 69, 1, -69, 70, 1, -70, 71, 1, -71, 72, 1, 169, 1, -148, 65, -64, 65, -128, 0, |
| 627 | /* 815 */ -261, 67, 1, -67, 68, 1, -68, 69, 1, -69, 70, 1, 172, 1, -149, 65, -64, 65, -127, 0, |
| 628 | /* 835 */ 23, 73, 2, 63, -48, 120, -71, 1, -49, 75, 26, -89, 65, 26, 30, -120, 66, 26, 29, -120, 0, |
| 629 | /* 856 */ 22, 74, 2, 63, -49, 120, -70, 1, -50, 76, 26, -90, 66, 26, 29, -120, 0, |
| 630 | /* 873 */ 65, -49, 77, 26, -90, 66, 26, 29, -120, 0, |
| 631 | /* 883 */ 23, 73, 2, 134, -71, 1, -49, 50, -49, 75, 26, 31, -120, 65, 26, 30, -120, 0, |
| 632 | /* 901 */ 22, 74, 135, -70, 1, -50, 77, 26, 30, -120, 0, |
| 633 | /* 912 */ 65, -49, 77, 26, 30, -120, 0, |
| 634 | /* 919 */ -71, 1, -49, 133, -120, 121, -120, 0, |
| 635 | /* 927 */ 139, -49, 50, -49, 12, 121, -120, 0, |
| 636 | /* 935 */ -49, 13, 121, -120, 0, |
| 637 | /* 940 */ -70, 1, -50, 133, -120, 0, |
| 638 | /* 946 */ -49, 133, -120, 0, |
| 639 | /* 950 */ -68, 36, 62, 148, -84, 1, -36, 66, 28, 40, -119, 0, |
| 640 | /* 962 */ -67, 36, 62, 148, -84, 1, -36, 66, 28, 40, -119, 0, |
| 641 | /* 974 */ 65, -36, 66, 28, 40, -119, 0, |
| 642 | /* 981 */ -84, 1, -36, 134, -119, 0, |
| 643 | /* 987 */ -221, 75, 1, -74, 77, 1, -76, 79, 1, -78, 81, 1, 10, 95, -93, 95, -93, 0, |
| 644 | /* 1005 */ -221, 74, 1, -73, 76, 1, -75, 78, 1, -77, 80, 1, 11, 95, -93, 95, -93, 0, |
| 645 | /* 1023 */ -221, 73, 1, -72, 75, 1, -74, 77, 1, -76, 79, 1, 12, 95, -93, 95, -93, 0, |
| 646 | /* 1041 */ -221, 72, 1, -71, 74, 1, -73, 76, 1, -75, 78, 1, 13, 95, -93, 95, -93, 0, |
| 647 | /* 1059 */ -221, 71, 1, -70, 73, 1, -72, 75, 1, -74, 77, 1, 14, 95, -93, 95, -93, 0, |
| 648 | /* 1077 */ -221, 70, 1, -69, 72, 1, -71, 74, 1, -73, 76, 1, 15, 95, -93, 95, -93, 0, |
| 649 | /* 1095 */ -221, 69, 1, -68, 71, 1, -70, 73, 1, -72, 75, 1, 16, 95, -93, 95, -93, 0, |
| 650 | /* 1113 */ -221, 68, 1, -67, 70, 1, -69, 72, 1, -71, 74, 1, 17, 95, -93, 95, -93, 0, |
| 651 | /* 1131 */ -221, 67, 1, -66, 69, 1, -68, 71, 1, -70, 73, 1, 18, 95, -93, 95, -93, 0, |
| 652 | /* 1149 */ -221, 66, 1, -65, 68, 1, -67, 70, 1, -69, 72, 1, 19, 95, -93, 95, -93, 0, |
| 653 | /* 1167 */ -221, 77, 1, -76, 79, 1, -78, 81, 1, -80, 92, 95, -93, 95, -93, 0, |
| 654 | /* 1183 */ -221, 76, 1, -75, 78, 1, -77, 80, 1, -79, 92, 95, -93, 95, -93, 0, |
| 655 | /* 1199 */ -221, 79, 1, -78, 81, 1, -80, 2, 92, 95, -93, 95, -93, 0, |
| 656 | /* 1213 */ -221, 78, 1, -77, 80, 1, -79, 2, 92, 95, -93, 95, -93, 0, |
| 657 | /* 1227 */ -221, 81, 1, -80, 2, 2, 92, 95, -93, 95, -93, 0, |
| 658 | /* 1239 */ -221, 80, 1, -79, 2, 2, 92, 95, -93, 95, -93, 0, |
| 659 | /* 1251 */ -221, 2, 2, 2, 92, 95, -93, 95, -93, 0, |
| 660 | /* 1261 */ 21, 75, 65, -50, 78, 26, -91, 0, |
| 661 | /* 1269 */ 24, 72, 2, 63, -47, 120, -72, 1, -48, 74, 26, -88, 64, 26, 31, -120, 65, 26, 30, -120, 92, -91, 0, |
| 662 | /* 1292 */ 65, -48, 76, 26, -89, 65, 26, 30, -120, 92, -91, 0, |
| 663 | /* 1304 */ 26, -90, 92, -91, 0, |
| 664 | /* 1309 */ 24, 72, 2, 135, -72, 1, -48, 49, -48, 74, 26, 32, -120, 64, 26, 31, -120, 65, 26, -90, 0, |
| 665 | /* 1330 */ 65, -48, 76, 26, 31, -120, 65, 26, -90, 0, |
| 666 | /* 1340 */ 25, 71, 2, 63, -46, 120, -73, 1, -47, 73, 26, -87, 63, 26, 32, -120, 64, 26, 31, -120, 91, -90, 0, |
| 667 | /* 1363 */ 65, -47, 75, 26, -88, 64, 26, 31, -120, 91, -90, 0, |
| 668 | /* 1375 */ 25, 71, 2, 136, -73, 1, -47, 48, -47, 73, 26, 33, -120, 63, 26, 32, -120, 64, 26, -89, 91, -90, 0, |
| 669 | /* 1398 */ 65, -47, 75, 26, 32, -120, 64, 26, -89, 91, -90, 0, |
| 670 | /* 1410 */ 26, 70, 2, 63, -45, 120, -74, 1, -46, 72, 26, -86, 62, 26, 33, -120, 63, 26, 32, -120, 90, -89, 0, |
| 671 | /* 1433 */ 65, -46, 74, 26, -87, 63, 26, 32, -120, 90, -89, 0, |
| 672 | /* 1445 */ 26, 70, 2, 137, -74, 1, -46, 47, -46, 72, 26, 34, -120, 62, 26, 33, -120, 63, 26, -88, 90, -89, 0, |
| 673 | /* 1468 */ 65, -46, 74, 26, 33, -120, 63, 26, -88, 90, -89, 0, |
| 674 | /* 1480 */ 27, 69, 2, 63, -44, 120, -75, 1, -45, 71, 26, -85, 61, 26, 34, -120, 62, 26, 33, -120, 89, -88, 0, |
| 675 | /* 1503 */ 65, -45, 73, 26, -86, 62, 26, 33, -120, 89, -88, 0, |
| 676 | /* 1515 */ 27, 69, 2, 138, -75, 1, -45, 46, -45, 71, 26, 35, -120, 61, 26, 34, -120, 62, 26, -87, 89, -88, 0, |
| 677 | /* 1538 */ 65, -45, 73, 26, 34, -120, 62, 26, -87, 89, -88, 0, |
| 678 | /* 1550 */ 28, 68, 2, 63, -43, 120, -76, 1, -44, 70, 26, -84, 60, 26, 35, -120, 61, 26, 34, -120, 88, -87, 0, |
| 679 | /* 1573 */ 65, -44, 72, 26, -85, 61, 26, 34, -120, 88, -87, 0, |
| 680 | /* 1585 */ 28, 68, 2, 139, -76, 1, -44, 45, -44, 70, 26, 36, -120, 60, 26, 35, -120, 61, 26, -86, 88, -87, 0, |
| 681 | /* 1608 */ 65, -44, 72, 26, 35, -120, 61, 26, -86, 88, -87, 0, |
| 682 | /* 1620 */ -82, 29, 67, 2, 63, -42, 120, -77, 1, -43, 69, 26, -83, 59, 26, 36, -120, 60, 26, 35, -120, 87, -86, 0, |
| 683 | /* 1644 */ -81, 29, 67, 2, 63, -42, 120, -77, 1, -43, 69, 26, -83, 59, 26, 36, -120, 60, 26, 35, -120, 87, -86, 0, |
| 684 | /* 1668 */ 65, -43, 71, 26, -84, 60, 26, 35, -120, 87, -86, 0, |
| 685 | /* 1680 */ 29, 67, 2, 140, -77, 1, -43, 44, -43, 69, 26, 37, -120, 59, 26, 36, -120, 60, 26, -85, 87, -86, 0, |
| 686 | /* 1703 */ 65, -43, 71, 26, 36, -120, 60, 26, -85, 87, -86, 0, |
| 687 | /* 1715 */ -80, 30, 66, 2, 63, -41, 120, -78, 1, -42, 68, 26, -82, 58, 26, 37, -120, 59, 26, 36, -120, 86, -85, 0, |
| 688 | /* 1739 */ -79, 30, 66, 2, 63, -41, 120, -78, 1, -42, 68, 26, -82, 58, 26, 37, -120, 59, 26, 36, -120, 86, -85, 0, |
| 689 | /* 1763 */ 65, -42, 70, 26, -83, 59, 26, 36, -120, 86, -85, 0, |
| 690 | /* 1775 */ -81, 30, 66, 2, 141, -78, 1, -42, 43, -42, 68, 26, 38, -120, 58, 26, 37, -120, 59, 26, -84, 86, -85, 0, |
| 691 | /* 1799 */ -80, 30, 66, 2, 141, -78, 1, -42, 43, -42, 68, 26, 38, -120, 58, 26, 37, -120, 59, 26, -84, 86, -85, 0, |
| 692 | /* 1823 */ 65, -42, 70, 26, 37, -120, 59, 26, -84, 86, -85, 0, |
| 693 | /* 1835 */ -78, 31, 65, 2, 63, -40, 120, -79, 1, -41, 67, 26, -81, 57, 26, 38, -120, 58, 26, 37, -120, 85, -84, 0, |
| 694 | /* 1859 */ -77, 31, 65, 2, 63, -40, 120, -79, 1, -41, 67, 26, -81, 57, 26, 38, -120, 58, 26, 37, -120, 85, -84, 0, |
| 695 | /* 1883 */ 65, -41, 69, 26, -82, 58, 26, 37, -120, 85, -84, 0, |
| 696 | /* 1895 */ -79, 31, 65, 2, 142, -79, 1, -41, 42, -41, 67, 26, 39, -120, 57, 26, 38, -120, 58, 26, -83, 85, -84, 0, |
| 697 | /* 1919 */ -78, 31, 65, 2, 142, -79, 1, -41, 42, -41, 67, 26, 39, -120, 57, 26, 38, -120, 58, 26, -83, 85, -84, 0, |
| 698 | /* 1943 */ 65, -41, 69, 26, 38, -120, 58, 26, -83, 85, -84, 0, |
| 699 | /* 1955 */ -76, 32, 64, 2, 63, -39, 120, -80, 1, -40, 66, 26, -80, 56, 26, 39, -120, 57, 26, 38, -120, 84, -83, 0, |
| 700 | /* 1979 */ -75, 32, 64, 2, 63, -39, 120, -80, 1, -40, 66, 26, -80, 56, 26, 39, -120, 57, 26, 38, -120, 84, -83, 0, |
| 701 | /* 2003 */ 65, -40, 68, 26, -81, 57, 26, 38, -120, 84, -83, 0, |
| 702 | /* 2015 */ -77, 32, 64, 2, 143, -80, 1, -40, 41, -40, 66, 26, 40, -120, 56, 26, 39, -120, 57, 26, -82, 84, -83, 0, |
| 703 | /* 2039 */ -76, 32, 64, 2, 143, -80, 1, -40, 41, -40, 66, 26, 40, -120, 56, 26, 39, -120, 57, 26, -82, 84, -83, 0, |
| 704 | /* 2063 */ 65, -40, 68, 26, 39, -120, 57, 26, -82, 84, -83, 0, |
| 705 | /* 2075 */ -74, 33, 63, 2, 63, -38, 120, -81, 1, -39, 65, 26, -79, 55, 26, 40, -120, 56, 26, 39, -120, 83, -82, 0, |
| 706 | /* 2099 */ -73, 33, 63, 2, 63, -38, 120, -81, 1, -39, 65, 26, -79, 55, 26, 40, -120, 56, 26, 39, -120, 83, -82, 0, |
| 707 | /* 2123 */ 65, -39, 67, 26, -80, 56, 26, 39, -120, 83, -82, 0, |
| 708 | /* 2135 */ -75, 33, 63, 2, 144, -81, 1, -39, 40, -39, 65, 26, 41, -120, 55, 26, 40, -120, 56, 26, -81, 83, -82, 0, |
| 709 | /* 2159 */ -74, 33, 63, 2, 144, -81, 1, -39, 40, -39, 65, 26, 41, -120, 55, 26, 40, -120, 56, 26, -81, 83, -82, 0, |
| 710 | /* 2183 */ 65, -39, 67, 26, 40, -120, 56, 26, -81, 83, -82, 0, |
| 711 | /* 2195 */ -239, 81, 1, -81, 0, |
| 712 | /* 2200 */ -72, 34, 62, 2, 63, -37, 120, -82, 1, -38, 64, 2, 26, 41, -120, 55, 26, 40, -120, 82, -81, 0, |
| 713 | /* 2222 */ -71, 34, 62, 2, 63, -37, 120, -82, 1, -38, 64, 2, 26, 41, -120, 55, 26, 40, -120, 82, -81, 0, |
| 714 | /* 2244 */ 65, -38, 66, 26, -79, 55, 26, 40, -120, 82, -81, 0, |
| 715 | /* 2256 */ -73, 34, 62, 2, 145, -82, 1, -38, 39, -38, 64, 26, 42, -120, 54, 26, 41, -120, 55, 26, -80, 82, -81, 0, |
| 716 | /* 2280 */ -72, 34, 62, 2, 145, -82, 1, -38, 39, -38, 64, 26, 42, -120, 54, 26, 41, -120, 55, 26, -80, 82, -81, 0, |
| 717 | /* 2304 */ 65, -38, 66, 26, 41, -120, 55, 26, -80, 82, -81, 0, |
| 718 | /* 2316 */ -98, 81, 1, -80, 0, |
| 719 | /* 2321 */ -70, 35, 61, 2, 63, -36, 120, -83, 1, -37, 65, 2, 26, 40, 1, -120, 81, -80, 0, |
| 720 | /* 2340 */ -69, 35, 61, 2, 63, -36, 120, -83, 1, -37, 65, 2, 26, 40, 1, -120, 81, -80, 0, |
| 721 | /* 2359 */ 65, -37, 65, 2, 26, 41, -120, 81, -80, 0, |
| 722 | /* 2369 */ -71, 35, 61, 2, 146, -83, 1, -37, 38, -37, 63, 2, 26, 41, 1, -120, 54, 26, -79, 81, -80, 0, |
| 723 | /* 2391 */ -70, 35, 61, 2, 146, -83, 1, -37, 38, -37, 63, 2, 26, 41, 1, -120, 54, 26, -79, 81, -80, 0, |
| 724 | /* 2413 */ 65, -37, 65, 26, 42, -120, 54, 26, -79, 81, -80, 0, |
| 725 | /* 2425 */ -98, 80, 1, -79, 0, |
| 726 | /* 2430 */ 28, -79, 0, |
| 727 | /* 2433 */ -69, 36, 60, 2, 147, -84, 1, -36, 37, -36, 64, 2, 26, 41, -119, 80, -79, 0, |
| 728 | /* 2451 */ -68, 36, 60, 2, 147, -84, 1, -36, 37, -36, 64, 2, 26, 41, -119, 80, -79, 0, |
| 729 | /* 2469 */ 65, -36, 64, 2, 26, 41, -119, 80, -79, 0, |
| 730 | /* 2479 */ 26, -78, 80, -79, 0, |
| 731 | /* 2484 */ -67, 37, 61, 65, -35, 65, 28, -78, 0, |
| 732 | /* 2493 */ -66, 37, 61, 65, -35, 65, 28, -78, 0, |
| 733 | /* 2502 */ -163, 1, 1, 230, -134, -75, 0, |
| 734 | /* 2509 */ -163, 1, 1, 231, -135, -74, 0, |
| 735 | /* 2516 */ -163, 1, 1, 232, -136, -73, 0, |
| 736 | /* 2523 */ -163, 1, 1, 233, -137, -72, 0, |
| 737 | /* 2530 */ -163, 1, 1, 234, -138, -71, 0, |
| 738 | /* 2537 */ -163, 1, 1, 235, -139, -70, 0, |
| 739 | /* 2544 */ -163, 1, 1, 236, -140, -69, 0, |
| 740 | /* 2551 */ -97, -69, 0, |
| 741 | /* 2554 */ -163, 81, 1, -81, 1, 237, -141, -68, 0, |
| 742 | /* 2563 */ -163, 79, 1, -79, 80, 1, -80, 81, 1, 156, -142, -67, 0, |
| 743 | /* 2576 */ -163, 77, 1, -77, 78, 1, -78, 79, 1, 159, -143, -66, 0, |
| 744 | /* 2589 */ -163, 75, 1, -75, 76, 1, -76, 77, 1, 162, -144, -65, 0, |
| 745 | /* 2602 */ -163, 73, 1, -73, 74, 1, -74, 75, 1, 165, -145, -64, 0, |
| 746 | /* 2615 */ -163, 71, 1, -71, 72, 1, -72, 73, 1, 168, -146, -63, 0, |
| 747 | /* 2628 */ -163, 69, 1, -69, 70, 1, -70, 71, 1, 171, -147, -62, 0, |
| 748 | /* 2641 */ -163, 67, 1, -67, 68, 1, -68, 69, 1, 174, -148, -61, 0, |
| 749 | /* 2654 */ -238, 1, 0, |
| 750 | /* 2657 */ -237, 1, 0, |
| 751 | /* 2660 */ -236, 1, 0, |
| 752 | /* 2663 */ -235, 1, 0, |
| 753 | /* 2666 */ -234, 1, 0, |
| 754 | /* 2669 */ -233, 1, 0, |
| 755 | /* 2672 */ -232, 1, 0, |
| 756 | /* 2675 */ -83, 1, -37, 133, 1, -120, 1, 0, |
| 757 | /* 2683 */ -72, 1, -48, 133, -120, 121, -120, 1, 0, |
| 758 | /* 2692 */ -73, 1, -47, 133, -120, 121, -120, 1, 0, |
| 759 | /* 2701 */ -74, 1, -46, 133, -120, 121, -120, 1, 0, |
| 760 | /* 2710 */ -75, 1, -45, 133, -120, 121, -120, 1, 0, |
| 761 | /* 2719 */ -76, 1, -44, 133, -120, 121, -120, 1, 0, |
| 762 | /* 2728 */ -77, 1, -43, 133, -120, 121, -120, 1, 0, |
| 763 | /* 2737 */ -78, 1, -42, 133, -120, 121, -120, 1, 0, |
| 764 | /* 2746 */ -79, 1, -41, 133, -120, 121, -120, 1, 0, |
| 765 | /* 2755 */ -80, 1, -40, 133, -120, 121, -120, 1, 0, |
| 766 | /* 2764 */ -81, 1, -39, 133, -120, 121, -120, 1, 0, |
| 767 | /* 2773 */ -82, 1, -38, 133, -120, 121, -120, 1, 0, |
| 768 | /* 2782 */ 138, -48, 49, -48, 12, 121, -120, 1, 0, |
| 769 | /* 2791 */ -48, 13, 121, -120, 1, 0, |
| 770 | /* 2797 */ -47, 13, 121, -120, 1, 0, |
| 771 | /* 2803 */ -46, 13, 121, -120, 1, 0, |
| 772 | /* 2809 */ -45, 13, 121, -120, 1, 0, |
| 773 | /* 2815 */ -44, 13, 121, -120, 1, 0, |
| 774 | /* 2821 */ -43, 13, 121, -120, 1, 0, |
| 775 | /* 2827 */ -42, 13, 121, -120, 1, 0, |
| 776 | /* 2833 */ -41, 13, 121, -120, 1, 0, |
| 777 | /* 2839 */ -40, 13, 121, -120, 1, 0, |
| 778 | /* 2845 */ -39, 13, 121, -120, 1, 0, |
| 779 | /* 2851 */ -38, 13, 121, -120, 1, 0, |
| 780 | /* 2857 */ -48, 133, -120, 1, 0, |
| 781 | /* 2862 */ -37, 134, -120, 1, 0, |
| 782 | /* 2867 */ 126, -36, 37, -36, 133, -119, 1, 0, |
| 783 | /* 2875 */ -103, 1, 0, |
| 784 | /* 2878 */ -102, 1, 0, |
| 785 | /* 2881 */ -101, 1, 0, |
| 786 | /* 2884 */ -100, 1, 0, |
| 787 | /* 2887 */ -99, 1, 0, |
| 788 | /* 2890 */ -98, 1, 0, |
| 789 | /* 2893 */ -29, 1, 0, |
| 790 | /* 2896 */ -28, 1, 0, |
| 791 | /* 2899 */ -27, 1, 0, |
| 792 | /* 2902 */ -26, 1, 0, |
| 793 | /* 2905 */ -25, 1, 0, |
| 794 | /* 2908 */ -24, 1, 0, |
| 795 | /* 2911 */ -23, 1, 0, |
| 796 | /* 2914 */ -22, 1, 0, |
| 797 | /* 2917 */ 137, -47, 48, -47, 12, 121, -120, 1, 1, 0, |
| 798 | /* 2927 */ 136, -46, 47, -46, 12, 121, -120, 1, 1, 0, |
| 799 | /* 2937 */ 135, -45, 46, -45, 12, 121, -120, 1, 1, 0, |
| 800 | /* 2947 */ 134, -44, 45, -44, 12, 121, -120, 1, 1, 0, |
| 801 | /* 2957 */ 133, -43, 44, -43, 12, 121, -120, 1, 1, 0, |
| 802 | /* 2967 */ 132, -42, 43, -42, 12, 121, -120, 1, 1, 0, |
| 803 | /* 2977 */ 131, -41, 42, -41, 12, 121, -120, 1, 1, 0, |
| 804 | /* 2987 */ 130, -40, 41, -40, 12, 121, -120, 1, 1, 0, |
| 805 | /* 2997 */ 129, -39, 40, -39, 12, 121, -120, 1, 1, 0, |
| 806 | /* 3007 */ 128, -38, 39, -38, 12, 121, -120, 1, 1, 0, |
| 807 | /* 3017 */ -47, 133, -120, 1, 1, 0, |
| 808 | /* 3023 */ -46, 133, -120, 1, 1, 0, |
| 809 | /* 3029 */ -45, 133, -120, 1, 1, 0, |
| 810 | /* 3035 */ -44, 133, -120, 1, 1, 0, |
| 811 | /* 3041 */ -43, 133, -120, 1, 1, 0, |
| 812 | /* 3047 */ -42, 133, -120, 1, 1, 0, |
| 813 | /* 3053 */ -41, 133, -120, 1, 1, 0, |
| 814 | /* 3059 */ -40, 133, -120, 1, 1, 0, |
| 815 | /* 3065 */ -39, 133, -120, 1, 1, 0, |
| 816 | /* 3071 */ -38, 133, -120, 1, 1, 0, |
| 817 | /* 3077 */ 127, -37, 38, -37, 133, -120, 1, 1, 0, |
| 818 | /* 3086 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 819 | /* 3102 */ 13, 1, 1, 0, |
| 820 | /* 3106 */ 1, 3, 1, 3, 1, 3, 1, 0, |
| 821 | /* 3114 */ 13, 1, 0, |
| 822 | /* 3117 */ 14, 1, 0, |
| 823 | /* 3120 */ 66, 1, 0, |
| 824 | /* 3123 */ -37, 66, 1, -66, 67, 1, 0, |
| 825 | /* 3130 */ -246, 67, 1, -67, 68, 1, 0, |
| 826 | /* 3137 */ -98, 66, 1, -65, 68, 1, 0, |
| 827 | /* 3144 */ -36, 68, 1, -68, 69, 1, 0, |
| 828 | /* 3151 */ -98, 67, 1, -66, 69, 1, 0, |
| 829 | /* 3158 */ -245, 69, 1, -69, 70, 1, 0, |
| 830 | /* 3165 */ -98, 68, 1, -67, 70, 1, 0, |
| 831 | /* 3172 */ -35, 70, 1, -70, 71, 1, 0, |
| 832 | /* 3179 */ -98, 69, 1, -68, 71, 1, 0, |
| 833 | /* 3186 */ -244, 71, 1, -71, 72, 1, 0, |
| 834 | /* 3193 */ -98, 70, 1, -69, 72, 1, 0, |
| 835 | /* 3200 */ -34, 72, 1, -72, 73, 1, 0, |
| 836 | /* 3207 */ -98, 71, 1, -70, 73, 1, 0, |
| 837 | /* 3214 */ -243, 73, 1, -73, 74, 1, 0, |
| 838 | /* 3221 */ -98, 72, 1, -71, 74, 1, 0, |
| 839 | /* 3228 */ -33, 74, 1, -74, 75, 1, 0, |
| 840 | /* 3235 */ -98, 73, 1, -72, 75, 1, 0, |
| 841 | /* 3242 */ -242, 75, 1, -75, 76, 1, 0, |
| 842 | /* 3249 */ -98, 74, 1, -73, 76, 1, 0, |
| 843 | /* 3256 */ -32, 76, 1, -76, 77, 1, 0, |
| 844 | /* 3263 */ -98, 75, 1, -74, 77, 1, 0, |
| 845 | /* 3270 */ -241, 77, 1, -77, 78, 1, 0, |
| 846 | /* 3277 */ -98, 76, 1, -75, 78, 1, 0, |
| 847 | /* 3284 */ -31, 78, 1, -78, 79, 1, 0, |
| 848 | /* 3291 */ -98, 77, 1, -76, 79, 1, 0, |
| 849 | /* 3298 */ -240, 79, 1, -79, 80, 1, 0, |
| 850 | /* 3305 */ -98, 78, 1, -77, 80, 1, 0, |
| 851 | /* 3312 */ -30, 80, 1, -80, 81, 1, 0, |
| 852 | /* 3319 */ -98, 79, 1, -78, 81, 1, 0, |
| 853 | /* 3326 */ -98, 2, 0, |
| 854 | /* 3329 */ 1, 3, 1, 3, 1, 2, 0, |
| 855 | /* 3336 */ 1, 3, 1, 2, 2, 0, |
| 856 | /* 3342 */ 1, 2, 2, 2, 0, |
| 857 | /* 3347 */ 1, 3, 2, 2, 0, |
| 858 | /* 3352 */ 1, 3, 1, 3, 2, 0, |
| 859 | /* 3358 */ -193, 77, 1, -76, 79, 1, -78, 81, 1, 12, 2, 0, |
| 860 | /* 3370 */ -193, 76, 1, -75, 78, 1, -77, 80, 1, 13, 2, 0, |
| 861 | /* 3382 */ -193, 75, 1, -74, 77, 1, -76, 79, 1, 14, 2, 0, |
| 862 | /* 3394 */ -193, 74, 1, -73, 76, 1, -75, 78, 1, 15, 2, 0, |
| 863 | /* 3406 */ -193, 73, 1, -72, 75, 1, -74, 77, 1, 16, 2, 0, |
| 864 | /* 3418 */ -193, 72, 1, -71, 74, 1, -73, 76, 1, 17, 2, 0, |
| 865 | /* 3430 */ -193, 71, 1, -70, 73, 1, -72, 75, 1, 18, 2, 0, |
| 866 | /* 3442 */ -193, 70, 1, -69, 72, 1, -71, 74, 1, 19, 2, 0, |
| 867 | /* 3454 */ -193, 69, 1, -68, 71, 1, -70, 73, 1, 20, 2, 0, |
| 868 | /* 3466 */ -193, 68, 1, -67, 70, 1, -69, 72, 1, 21, 2, 0, |
| 869 | /* 3478 */ -193, 67, 1, -66, 69, 1, -68, 71, 1, 22, 2, 0, |
| 870 | /* 3490 */ -193, 66, 1, -65, 68, 1, -67, 70, 1, 23, 2, 0, |
| 871 | /* 3502 */ -193, 79, 1, -78, 81, 1, -80, 94, 2, 0, |
| 872 | /* 3512 */ -193, 78, 1, -77, 80, 1, -79, 94, 2, 0, |
| 873 | /* 3522 */ -193, 81, 1, -80, 2, 94, 2, 0, |
| 874 | /* 3530 */ -193, 80, 1, -79, 2, 94, 2, 0, |
| 875 | /* 3538 */ -193, 2, 2, 94, 2, 0, |
| 876 | /* 3544 */ 1, 3, 1, 3, 1, 3, 0, |
| 877 | /* 3551 */ 140, -50, 13, 0, |
| 878 | /* 3555 */ 126, -35, 15, 0, |
| 879 | /* 3559 */ -91, -23, 1, 23, -22, 1, 95, 65, -64, 65, 69, 0, |
| 880 | /* 3571 */ -91, -24, 1, 24, -23, 1, 95, 65, -64, 65, 70, 0, |
| 881 | /* 3583 */ -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, 0, |
| 882 | /* 3595 */ -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, 0, |
| 883 | /* 3607 */ -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, 0, |
| 884 | /* 3619 */ -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, 0, |
| 885 | /* 3631 */ -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, 0, |
| 886 | /* 3643 */ -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, 0, |
| 887 | /* 3659 */ -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, 0, |
| 888 | /* 3679 */ -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, 0, |
| 889 | /* 3699 */ -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, 0, |
| 890 | /* 3719 */ -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, 0, |
| 891 | /* 3739 */ -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, 0, |
| 892 | /* 3759 */ -91, -36, 68, 1, -68, 69, 1, -34, -35, 70, 1, -70, 71, 1, 23, 65, -64, 65, 82, 0, |
| 893 | /* 3779 */ -91, -37, 66, 1, -66, 67, 1, -31, -36, 68, 1, -68, 69, 1, 25, 65, -64, 65, 83, 0, |
| 894 | /* 3799 */ 97, 0, |
| 895 | /* 3801 */ 98, 0, |
| 896 | /* 3803 */ 99, 0, |
| 897 | /* 3805 */ 100, 0, |
| 898 | /* 3807 */ 101, 0, |
| 899 | /* 3809 */ 102, 0, |
| 900 | /* 3811 */ 103, 0, |
| 901 | /* 3813 */ -163, 1, 1, 21, 75, 135, 0, |
| 902 | /* 3820 */ -163, 1, 1, 22, 74, 136, 0, |
| 903 | /* 3827 */ -163, 1, 1, 23, 73, 137, 0, |
| 904 | /* 3834 */ -163, 1, 1, 24, 72, 138, 0, |
| 905 | /* 3841 */ -163, 1, 1, 25, 71, 139, 0, |
| 906 | /* 3848 */ -163, 1, 1, 26, 70, 140, 0, |
| 907 | /* 3855 */ -163, 1, 1, 27, 69, 141, 0, |
| 908 | /* 3862 */ -163, 80, 1, -80, 81, 1, -81, 28, 68, 142, 0, |
| 909 | /* 3873 */ -163, 78, 1, -78, 79, 1, -79, 80, 1, -52, 67, 143, 0, |
| 910 | /* 3886 */ -163, 76, 1, -76, 77, 1, -77, 78, 1, -49, 66, 144, 0, |
| 911 | /* 3899 */ -163, 74, 1, -74, 75, 1, -75, 76, 1, -46, 65, 145, 0, |
| 912 | /* 3912 */ -163, 72, 1, -72, 73, 1, -73, 74, 1, -43, 64, 146, 0, |
| 913 | /* 3925 */ -163, 70, 1, -70, 71, 1, -71, 72, 1, -40, 63, 147, 0, |
| 914 | /* 3938 */ -163, 68, 1, -68, 69, 1, -69, 70, 1, -37, 62, 148, 0, |
| 915 | /* 3951 */ -163, 66, 1, -66, 67, 1, -67, 68, 1, -34, 61, 149, 0, |
| 916 | /* 3964 */ 166, 0, |
| 917 | }; |
| 918 | |
| 919 | extern const LaneBitmask ARMLaneMaskLists[] = { |
| 920 | /* 0 */ LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000001), |
| 921 | /* 2 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), |
| 922 | /* 4 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), |
| 923 | /* 6 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), |
| 924 | /* 10 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), |
| 925 | /* 13 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), |
| 926 | /* 15 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), |
| 927 | /* 19 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), |
| 928 | /* 25 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), |
| 929 | /* 28 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), |
| 930 | /* 30 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), |
| 931 | /* 35 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), |
| 932 | /* 39 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), |
| 933 | /* 42 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), |
| 934 | /* 50 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000300), |
| 935 | /* 57 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), |
| 936 | /* 63 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), |
| 937 | /* 68 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), |
| 938 | /* 72 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), |
| 939 | /* 78 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), |
| 940 | /* 83 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), |
| 941 | /* 87 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), |
| 942 | /* 90 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), |
| 943 | /* 98 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x000000000000C000), |
| 944 | /* 105 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), |
| 945 | /* 111 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), |
| 946 | /* 116 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), |
| 947 | /* 120 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), |
| 948 | /* 136 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), |
| 949 | /* 150 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), |
| 950 | /* 162 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), |
| 951 | /* 172 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), |
| 952 | /* 180 */ LaneBitmask(0xFFFFFFFFFFFFFFFF), LaneBitmask(0xFFFFFFFFFFFFFFFF), |
| 953 | }; |
| 954 | |
| 955 | extern const uint16_t ARMSubRegIdxLists[] = { |
| 956 | /* 0 */ 1, 2, |
| 957 | /* 2 */ 1, 17, 18, 2, |
| 958 | /* 6 */ 1, 3, |
| 959 | /* 8 */ 1, 17, 18, 3, |
| 960 | /* 12 */ 9, 10, |
| 961 | /* 14 */ 17, 18, |
| 962 | /* 16 */ 1, 17, 18, 2, 19, 20, |
| 963 | /* 22 */ 1, 17, 18, 3, 21, 22, |
| 964 | /* 28 */ 1, 2, 3, 13, 33, 37, |
| 965 | /* 34 */ 1, 17, 18, 2, 3, 13, 33, 37, |
| 966 | /* 42 */ 1, 17, 18, 2, 19, 20, 3, 13, 33, 37, |
| 967 | /* 52 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 13, 33, 37, |
| 968 | /* 64 */ 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, |
| 969 | /* 75 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, |
| 970 | /* 90 */ 1, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, |
| 971 | /* 101 */ 1, 17, 18, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, |
| 972 | /* 114 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 13, 14, 33, 34, 35, 36, 37, |
| 973 | /* 131 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 23, 24, 13, 14, 33, 34, 35, 36, 37, |
| 974 | /* 150 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, |
| 975 | /* 169 */ 1, 3, 5, 33, 43, |
| 976 | /* 174 */ 1, 17, 18, 3, 5, 33, 43, |
| 977 | /* 181 */ 1, 17, 18, 3, 21, 22, 5, 33, 43, |
| 978 | /* 190 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 33, 43, |
| 979 | /* 201 */ 1, 3, 5, 7, 33, 38, 43, 45, 51, |
| 980 | /* 210 */ 1, 17, 18, 3, 5, 7, 33, 38, 43, 45, 51, |
| 981 | /* 221 */ 1, 17, 18, 3, 21, 22, 5, 7, 33, 38, 43, 45, 51, |
| 982 | /* 234 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 33, 38, 43, 45, 51, |
| 983 | /* 249 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 29, 30, 33, 38, 43, 45, 51, |
| 984 | /* 266 */ 11, 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, |
| 985 | /* 304 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, |
| 986 | /* 346 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, |
| 987 | /* 392 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, |
| 988 | /* 442 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 29, 30, 8, 31, 32, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, |
| 989 | }; |
| 990 | |
| 991 | |
| 992 | #ifdef __GNUC__ |
| 993 | #pragma GCC diagnostic push |
| 994 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 995 | #endif |
| 996 | extern const char ARMRegStrings[] = { |
| 997 | /* 0 */ "D4_D6_D8_D10\000" |
| 998 | /* 13 */ "D7_D8_D9_D10\000" |
| 999 | /* 26 */ "Q7_Q8_Q9_Q10\000" |
| 1000 | /* 39 */ "R10\000" |
| 1001 | /* 43 */ "S10\000" |
| 1002 | /* 47 */ "D14_D16_D18_D20\000" |
| 1003 | /* 63 */ "D17_D18_D19_D20\000" |
| 1004 | /* 79 */ "S20\000" |
| 1005 | /* 83 */ "D24_D26_D28_D30\000" |
| 1006 | /* 99 */ "D27_D28_D29_D30\000" |
| 1007 | /* 115 */ "S30\000" |
| 1008 | /* 119 */ "D0\000" |
| 1009 | /* 122 */ "P0\000" |
| 1010 | /* 125 */ "Q0\000" |
| 1011 | /* 128 */ "MVFR0\000" |
| 1012 | /* 134 */ "S0\000" |
| 1013 | /* 137 */ "D9_D10_D11\000" |
| 1014 | /* 148 */ "D5_D7_D9_D11\000" |
| 1015 | /* 161 */ "Q8_Q9_Q10_Q11\000" |
| 1016 | /* 175 */ "R10_R11\000" |
| 1017 | /* 183 */ "S11\000" |
| 1018 | /* 187 */ "D19_D20_D21\000" |
| 1019 | /* 199 */ "D15_D17_D19_D21\000" |
| 1020 | /* 215 */ "S21\000" |
| 1021 | /* 219 */ "D29_D30_D31\000" |
| 1022 | /* 231 */ "D25_D27_D29_D31\000" |
| 1023 | /* 247 */ "S31\000" |
| 1024 | /* 251 */ "D1\000" |
| 1025 | /* 254 */ "Q0_Q1\000" |
| 1026 | /* 260 */ "MVFR1\000" |
| 1027 | /* 266 */ "R0_R1\000" |
| 1028 | /* 272 */ "S1\000" |
| 1029 | /* 275 */ "D6_D8_D10_D12\000" |
| 1030 | /* 289 */ "D9_D10_D11_D12\000" |
| 1031 | /* 304 */ "Q9_Q10_Q11_Q12\000" |
| 1032 | /* 319 */ "R12\000" |
| 1033 | /* 323 */ "S12\000" |
| 1034 | /* 327 */ "D16_D18_D20_D22\000" |
| 1035 | /* 343 */ "D19_D20_D21_D22\000" |
| 1036 | /* 359 */ "S22\000" |
| 1037 | /* 363 */ "D0_D2\000" |
| 1038 | /* 369 */ "D0_D1_D2\000" |
| 1039 | /* 378 */ "Q1_Q2\000" |
| 1040 | /* 384 */ "MVFR2\000" |
| 1041 | /* 390 */ "S2\000" |
| 1042 | /* 393 */ "FPINST2\000" |
| 1043 | /* 401 */ "D7_D9_D11_D13\000" |
| 1044 | /* 415 */ "D11_D12_D13\000" |
| 1045 | /* 427 */ "Q10_Q11_Q12_Q13\000" |
| 1046 | /* 443 */ "S13\000" |
| 1047 | /* 447 */ "D17_D19_D21_D23\000" |
| 1048 | /* 463 */ "D21_D22_D23\000" |
| 1049 | /* 475 */ "S23\000" |
| 1050 | /* 479 */ "D1_D3\000" |
| 1051 | /* 485 */ "D1_D2_D3\000" |
| 1052 | /* 494 */ "Q0_Q1_Q2_Q3\000" |
| 1053 | /* 506 */ "R2_R3\000" |
| 1054 | /* 512 */ "S3\000" |
| 1055 | /* 515 */ "D8_D10_D12_D14\000" |
| 1056 | /* 530 */ "D11_D12_D13_D14\000" |
| 1057 | /* 546 */ "Q11_Q12_Q13_Q14\000" |
| 1058 | /* 562 */ "S14\000" |
| 1059 | /* 566 */ "D18_D20_D22_D24\000" |
| 1060 | /* 582 */ "D21_D22_D23_D24\000" |
| 1061 | /* 598 */ "S24\000" |
| 1062 | /* 602 */ "D0_D2_D4\000" |
| 1063 | /* 611 */ "D1_D2_D3_D4\000" |
| 1064 | /* 623 */ "Q1_Q2_Q3_Q4\000" |
| 1065 | /* 635 */ "R4\000" |
| 1066 | /* 638 */ "S4\000" |
| 1067 | /* 641 */ "D9_D11_D13_D15\000" |
| 1068 | /* 656 */ "D13_D14_D15\000" |
| 1069 | /* 668 */ "Q12_Q13_Q14_Q15\000" |
| 1070 | /* 684 */ "S15\000" |
| 1071 | /* 688 */ "D19_D21_D23_D25\000" |
| 1072 | /* 704 */ "D23_D24_D25\000" |
| 1073 | /* 716 */ "S25\000" |
| 1074 | /* 720 */ "D1_D3_D5\000" |
| 1075 | /* 729 */ "D3_D4_D5\000" |
| 1076 | /* 738 */ "Q2_Q3_Q4_Q5\000" |
| 1077 | /* 750 */ "R4_R5\000" |
| 1078 | /* 756 */ "S5\000" |
| 1079 | /* 759 */ "D10_D12_D14_D16\000" |
| 1080 | /* 775 */ "D13_D14_D15_D16\000" |
| 1081 | /* 791 */ "S16\000" |
| 1082 | /* 795 */ "D20_D22_D24_D26\000" |
| 1083 | /* 811 */ "D23_D24_D25_D26\000" |
| 1084 | /* 827 */ "S26\000" |
| 1085 | /* 831 */ "D0_D2_D4_D6\000" |
| 1086 | /* 843 */ "D3_D4_D5_D6\000" |
| 1087 | /* 855 */ "Q3_Q4_Q5_Q6\000" |
| 1088 | /* 867 */ "R6\000" |
| 1089 | /* 870 */ "S6\000" |
| 1090 | /* 873 */ "D11_D13_D15_D17\000" |
| 1091 | /* 889 */ "D15_D16_D17\000" |
| 1092 | /* 901 */ "S17\000" |
| 1093 | /* 905 */ "D21_D23_D25_D27\000" |
| 1094 | /* 921 */ "D25_D26_D27\000" |
| 1095 | /* 933 */ "S27\000" |
| 1096 | /* 937 */ "D1_D3_D5_D7\000" |
| 1097 | /* 949 */ "D5_D6_D7\000" |
| 1098 | /* 958 */ "Q4_Q5_Q6_Q7\000" |
| 1099 | /* 970 */ "R6_R7\000" |
| 1100 | /* 976 */ "S7\000" |
| 1101 | /* 979 */ "D12_D14_D16_D18\000" |
| 1102 | /* 995 */ "D15_D16_D17_D18\000" |
| 1103 | /* 1011 */ "S18\000" |
| 1104 | /* 1015 */ "D22_D24_D26_D28\000" |
| 1105 | /* 1031 */ "D25_D26_D27_D28\000" |
| 1106 | /* 1047 */ "S28\000" |
| 1107 | /* 1051 */ "D2_D4_D6_D8\000" |
| 1108 | /* 1063 */ "D5_D6_D7_D8\000" |
| 1109 | /* 1075 */ "Q5_Q6_Q7_Q8\000" |
| 1110 | /* 1087 */ "R8\000" |
| 1111 | /* 1090 */ "S8\000" |
| 1112 | /* 1093 */ "D13_D15_D17_D19\000" |
| 1113 | /* 1109 */ "D17_D18_D19\000" |
| 1114 | /* 1121 */ "S19\000" |
| 1115 | /* 1125 */ "D23_D25_D27_D29\000" |
| 1116 | /* 1141 */ "D27_D28_D29\000" |
| 1117 | /* 1153 */ "S29\000" |
| 1118 | /* 1157 */ "D3_D5_D7_D9\000" |
| 1119 | /* 1169 */ "D7_D8_D9\000" |
| 1120 | /* 1178 */ "Q6_Q7_Q8_Q9\000" |
| 1121 | /* 1190 */ "R8_R9\000" |
| 1122 | /* 1196 */ "S9\000" |
| 1123 | /* 1199 */ "PC\000" |
| 1124 | /* 1202 */ "FPSCR_NZCVQC\000" |
| 1125 | /* 1215 */ "FPEXC\000" |
| 1126 | /* 1221 */ "FPSID\000" |
| 1127 | /* 1227 */ "RA_AUTH_CODE\000" |
| 1128 | /* 1240 */ "ITSTATE\000" |
| 1129 | /* 1248 */ "R12_SP\000" |
| 1130 | /* 1255 */ "FPSCR\000" |
| 1131 | /* 1261 */ "LR\000" |
| 1132 | /* 1264 */ "VPR\000" |
| 1133 | /* 1268 */ "APSR\000" |
| 1134 | /* 1273 */ "CPSR\000" |
| 1135 | /* 1278 */ "SPSR\000" |
| 1136 | /* 1283 */ "ZR\000" |
| 1137 | /* 1286 */ "FPCXTNS\000" |
| 1138 | /* 1294 */ "FPCXTS\000" |
| 1139 | /* 1301 */ "FPINST\000" |
| 1140 | /* 1308 */ "FPSCR_NZCV\000" |
| 1141 | /* 1319 */ "APSR_NZCV\000" |
| 1142 | }; |
| 1143 | #ifdef __GNUC__ |
| 1144 | #pragma GCC diagnostic pop |
| 1145 | #endif |
| 1146 | |
| 1147 | extern const MCRegisterDesc ARMRegDesc[] = { // Descriptors |
| 1148 | { 12, 0, 0, 0, 0, 0, 0, 0 }, |
| 1149 | { 1268, 11, 11, 2, 45056, 181, 0, 0 }, |
| 1150 | { 1319, 11, 11, 2, 45057, 181, 0, 0 }, |
| 1151 | { 1273, 11, 11, 2, 45058, 181, 0, 0 }, |
| 1152 | { 1286, 11, 11, 2, 45059, 181, 0, 0 }, |
| 1153 | { 1294, 11, 11, 2, 45060, 181, 0, 0 }, |
| 1154 | { 1215, 11, 11, 2, 45061, 181, 0, 0 }, |
| 1155 | { 1301, 11, 11, 2, 45062, 181, 0, 0 }, |
| 1156 | { 1255, 11, 11, 2, 10874887, 180, 0, 0 }, |
| 1157 | { 1308, 11, 11, 2, 10874888, 180, 0, 0 }, |
| 1158 | { 1202, 11, 11, 2, 45066, 181, 0, 0 }, |
| 1159 | { 1221, 11, 11, 2, 45067, 181, 0, 0 }, |
| 1160 | { 1240, 11, 11, 2, 45068, 181, 0, 0 }, |
| 1161 | { 1261, 11, 11, 2, 45069, 181, 0, 0 }, |
| 1162 | { 1199, 11, 11, 2, 45070, 181, 0, 0 }, |
| 1163 | { 1227, 11, 11, 2, 45071, 181, 0, 0 }, |
| 1164 | { 1252, 11, 3964, 2, 45072, 181, 0, 0 }, |
| 1165 | { 1278, 11, 11, 2, 45073, 181, 0, 0 }, |
| 1166 | { 1264, 11, 11, 2, 45074, 181, 0, 0 }, |
| 1167 | { 1283, 11, 11, 2, 45075, 181, 0, 0 }, |
| 1168 | { 119, 3120, 2485, 14, 10874900, 4, 0, 0 }, |
| 1169 | { 251, 3127, 951, 14, 10874902, 4, 0, 0 }, |
| 1170 | { 366, 3134, 2434, 14, 10874904, 4, 0, 0 }, |
| 1171 | { 482, 3148, 2322, 14, 10874906, 4, 0, 0 }, |
| 1172 | { 608, 3162, 2370, 14, 10874908, 4, 0, 0 }, |
| 1173 | { 726, 3176, 2201, 14, 10874910, 4, 0, 0 }, |
| 1174 | { 840, 3190, 2257, 14, 10874912, 4, 0, 0 }, |
| 1175 | { 946, 3204, 2076, 14, 10874914, 4, 0, 0 }, |
| 1176 | { 1060, 3218, 2136, 14, 10874916, 4, 0, 0 }, |
| 1177 | { 1166, 3232, 1956, 14, 10874918, 4, 0, 0 }, |
| 1178 | { 9, 3246, 2016, 14, 10874920, 4, 0, 0 }, |
| 1179 | { 144, 3260, 1836, 14, 10874922, 4, 0, 0 }, |
| 1180 | { 285, 3274, 1896, 14, 10874924, 4, 0, 0 }, |
| 1181 | { 411, 3288, 1716, 14, 10874926, 4, 0, 0 }, |
| 1182 | { 526, 3302, 1776, 14, 10874928, 4, 0, 0 }, |
| 1183 | { 652, 3316, 1621, 14, 10874930, 4, 0, 0 }, |
| 1184 | { 771, 11, 1680, 2, 45108, 181, 0, 0 }, |
| 1185 | { 885, 11, 1550, 2, 45109, 181, 0, 0 }, |
| 1186 | { 991, 11, 1585, 2, 45110, 181, 0, 0 }, |
| 1187 | { 1105, 11, 1480, 2, 45111, 181, 0, 0 }, |
| 1188 | { 59, 11, 1515, 2, 45112, 181, 0, 0 }, |
| 1189 | { 195, 11, 1410, 2, 45113, 181, 0, 0 }, |
| 1190 | { 339, 11, 1445, 2, 45114, 181, 0, 0 }, |
| 1191 | { 459, 11, 1340, 2, 45115, 181, 0, 0 }, |
| 1192 | { 578, 11, 1375, 2, 45116, 181, 0, 0 }, |
| 1193 | { 700, 11, 1269, 2, 45117, 181, 0, 0 }, |
| 1194 | { 807, 11, 1309, 2, 45118, 181, 0, 0 }, |
| 1195 | { 917, 11, 835, 2, 45119, 181, 0, 0 }, |
| 1196 | { 1027, 11, 883, 2, 45120, 181, 0, 0 }, |
| 1197 | { 1137, 11, 856, 2, 45121, 181, 0, 0 }, |
| 1198 | { 95, 11, 901, 2, 45122, 181, 0, 0 }, |
| 1199 | { 227, 11, 1261, 2, 45123, 181, 0, 0 }, |
| 1200 | { 393, 11, 11, 2, 45124, 181, 0, 0 }, |
| 1201 | { 128, 11, 11, 2, 45125, 181, 0, 0 }, |
| 1202 | { 260, 11, 11, 2, 45126, 181, 0, 0 }, |
| 1203 | { 384, 11, 11, 2, 45127, 181, 0, 0 }, |
| 1204 | { 122, 11, 11, 2, 45128, 181, 0, 0 }, |
| 1205 | { 125, 3123, 3555, 16, 12689428, 6, 0, 0 }, |
| 1206 | { 257, 3144, 2867, 16, 12689432, 6, 0, 0 }, |
| 1207 | { 381, 3172, 3077, 16, 12689436, 6, 0, 0 }, |
| 1208 | { 503, 3200, 3007, 16, 12689440, 6, 0, 0 }, |
| 1209 | { 632, 3228, 2997, 16, 12689444, 6, 0, 0 }, |
| 1210 | { 747, 3256, 2987, 16, 12689448, 6, 0, 0 }, |
| 1211 | { 864, 3284, 2977, 16, 12689452, 6, 0, 0 }, |
| 1212 | { 967, 3312, 2967, 16, 12689456, 6, 0, 0 }, |
| 1213 | { 1084, 2893, 2957, 0, 10874932, 13, 0, 0 }, |
| 1214 | { 1187, 2896, 2947, 0, 10874934, 13, 0, 0 }, |
| 1215 | { 35, 2899, 2937, 0, 10874936, 13, 0, 0 }, |
| 1216 | { 171, 2902, 2927, 0, 10874938, 13, 0, 0 }, |
| 1217 | { 315, 2905, 2917, 0, 10874940, 13, 0, 0 }, |
| 1218 | { 439, 2908, 2782, 0, 10874942, 13, 0, 0 }, |
| 1219 | { 558, 2911, 927, 0, 10874944, 13, 0, 0 }, |
| 1220 | { 680, 2914, 3551, 0, 10874946, 13, 0, 0 }, |
| 1221 | { 131, 11, 3811, 2, 45129, 181, 0, 0 }, |
| 1222 | { 263, 11, 3809, 2, 45130, 181, 0, 0 }, |
| 1223 | { 387, 11, 3809, 2, 45131, 181, 0, 0 }, |
| 1224 | { 509, 11, 3807, 2, 45132, 181, 0, 0 }, |
| 1225 | { 635, 11, 3807, 2, 45133, 181, 0, 0 }, |
| 1226 | { 753, 11, 3805, 2, 45134, 181, 0, 0 }, |
| 1227 | { 867, 11, 3805, 2, 45135, 181, 0, 0 }, |
| 1228 | { 973, 11, 3803, 2, 45136, 181, 0, 0 }, |
| 1229 | { 1087, 11, 3803, 2, 45137, 181, 0, 0 }, |
| 1230 | { 1193, 11, 3801, 2, 45138, 181, 0, 0 }, |
| 1231 | { 39, 11, 3801, 2, 45139, 181, 0, 0 }, |
| 1232 | { 179, 11, 3799, 2, 45140, 181, 0, 0 }, |
| 1233 | { 319, 11, 3799, 2, 45141, 181, 0, 0 }, |
| 1234 | { 134, 11, 2493, 2, 45076, 181, 0, 0 }, |
| 1235 | { 272, 11, 2484, 2, 45077, 181, 0, 0 }, |
| 1236 | { 390, 11, 962, 2, 45078, 181, 0, 0 }, |
| 1237 | { 512, 11, 950, 2, 45079, 181, 0, 0 }, |
| 1238 | { 638, 11, 2451, 2, 45080, 181, 0, 0 }, |
| 1239 | { 756, 11, 2433, 2, 45081, 181, 0, 0 }, |
| 1240 | { 870, 11, 2340, 2, 45082, 181, 0, 0 }, |
| 1241 | { 976, 11, 2321, 2, 45083, 181, 0, 0 }, |
| 1242 | { 1090, 11, 2391, 2, 45084, 181, 0, 0 }, |
| 1243 | { 1196, 11, 2369, 2, 45085, 181, 0, 0 }, |
| 1244 | { 43, 11, 2222, 2, 45086, 181, 0, 0 }, |
| 1245 | { 183, 11, 2200, 2, 45087, 181, 0, 0 }, |
| 1246 | { 323, 11, 2280, 2, 45088, 181, 0, 0 }, |
| 1247 | { 443, 11, 2256, 2, 45089, 181, 0, 0 }, |
| 1248 | { 562, 11, 2099, 2, 45090, 181, 0, 0 }, |
| 1249 | { 684, 11, 2075, 2, 45091, 181, 0, 0 }, |
| 1250 | { 791, 11, 2159, 2, 45092, 181, 0, 0 }, |
| 1251 | { 901, 11, 2135, 2, 45093, 181, 0, 0 }, |
| 1252 | { 1011, 11, 1979, 2, 45094, 181, 0, 0 }, |
| 1253 | { 1121, 11, 1955, 2, 45095, 181, 0, 0 }, |
| 1254 | { 79, 11, 2039, 2, 45096, 181, 0, 0 }, |
| 1255 | { 215, 11, 2015, 2, 45097, 181, 0, 0 }, |
| 1256 | { 359, 11, 1859, 2, 45098, 181, 0, 0 }, |
| 1257 | { 475, 11, 1835, 2, 45099, 181, 0, 0 }, |
| 1258 | { 598, 11, 1919, 2, 45100, 181, 0, 0 }, |
| 1259 | { 716, 11, 1895, 2, 45101, 181, 0, 0 }, |
| 1260 | { 827, 11, 1739, 2, 45102, 181, 0, 0 }, |
| 1261 | { 933, 11, 1715, 2, 45103, 181, 0, 0 }, |
| 1262 | { 1047, 11, 1799, 2, 45104, 181, 0, 0 }, |
| 1263 | { 1153, 11, 1775, 2, 45105, 181, 0, 0 }, |
| 1264 | { 115, 11, 1644, 2, 45106, 181, 0, 0 }, |
| 1265 | { 247, 11, 1620, 2, 45107, 181, 0, 0 }, |
| 1266 | { 363, 3137, 2487, 22, 12738580, 15, 0, 0 }, |
| 1267 | { 479, 3151, 974, 22, 12738582, 15, 0, 0 }, |
| 1268 | { 605, 3165, 2469, 22, 12738584, 15, 0, 0 }, |
| 1269 | { 723, 3179, 2359, 22, 12738586, 15, 0, 0 }, |
| 1270 | { 837, 3193, 2413, 22, 12738588, 15, 0, 0 }, |
| 1271 | { 943, 3207, 2244, 22, 12738590, 15, 0, 0 }, |
| 1272 | { 1057, 3221, 2304, 22, 12738592, 15, 0, 0 }, |
| 1273 | { 1163, 3235, 2123, 22, 12738594, 15, 0, 0 }, |
| 1274 | { 6, 3249, 2183, 22, 12738596, 15, 0, 0 }, |
| 1275 | { 154, 3263, 2003, 22, 12738598, 15, 0, 0 }, |
| 1276 | { 281, 3277, 2063, 22, 12738600, 15, 0, 0 }, |
| 1277 | { 407, 3291, 1883, 22, 12738602, 15, 0, 0 }, |
| 1278 | { 522, 3305, 1943, 22, 12738604, 15, 0, 0 }, |
| 1279 | { 648, 3319, 1763, 22, 12738606, 15, 0, 0 }, |
| 1280 | { 767, 2425, 1823, 8, 14532656, 25, 0, 0 }, |
| 1281 | { 881, 2316, 1668, 8, 13652018, 25, 0, 0 }, |
| 1282 | { 987, 3326, 1703, 6, 13627444, 28, 0, 0 }, |
| 1283 | { 1101, 3326, 1573, 6, 13627445, 28, 0, 0 }, |
| 1284 | { 55, 3326, 1608, 6, 13627446, 28, 0, 0 }, |
| 1285 | { 207, 3326, 1503, 6, 13627447, 28, 0, 0 }, |
| 1286 | { 335, 3326, 1538, 6, 13627448, 28, 0, 0 }, |
| 1287 | { 455, 3326, 1433, 6, 13627449, 28, 0, 0 }, |
| 1288 | { 574, 3326, 1468, 6, 13627450, 28, 0, 0 }, |
| 1289 | { 696, 3326, 1363, 6, 13627451, 28, 0, 0 }, |
| 1290 | { 803, 3326, 1398, 6, 13627452, 28, 0, 0 }, |
| 1291 | { 913, 3326, 1292, 6, 13627453, 28, 0, 0 }, |
| 1292 | { 1023, 3326, 1330, 6, 13627454, 28, 0, 0 }, |
| 1293 | { 1133, 3326, 873, 6, 13627455, 28, 0, 0 }, |
| 1294 | { 91, 3326, 912, 6, 13627456, 28, 0, 0 }, |
| 1295 | { 239, 3326, 1263, 6, 13627457, 28, 0, 0 }, |
| 1296 | { 254, 3779, 3557, 150, 12673044, 42, 0, 0 }, |
| 1297 | { 378, 3759, 3117, 150, 12673048, 42, 0, 0 }, |
| 1298 | { 500, 3739, 3102, 150, 12673052, 42, 0, 0 }, |
| 1299 | { 629, 3719, 3102, 150, 12673056, 42, 0, 0 }, |
| 1300 | { 744, 3699, 3102, 150, 12673060, 42, 0, 0 }, |
| 1301 | { 861, 3679, 3102, 150, 12673064, 42, 0, 0 }, |
| 1302 | { 964, 3659, 3102, 150, 12673068, 42, 0, 0 }, |
| 1303 | { 1081, 3643, 3102, 75, 12681264, 57, 0, 0 }, |
| 1304 | { 1184, 3631, 3102, 64, 12689460, 68, 0, 0 }, |
| 1305 | { 32, 3619, 3102, 64, 12689462, 68, 0, 0 }, |
| 1306 | { 167, 3607, 3102, 64, 12689464, 68, 0, 0 }, |
| 1307 | { 311, 3595, 3102, 64, 12689466, 68, 0, 0 }, |
| 1308 | { 435, 3583, 3102, 64, 12689468, 68, 0, 0 }, |
| 1309 | { 554, 3571, 3114, 64, 12689470, 68, 0, 0 }, |
| 1310 | { 676, 3559, 3553, 64, 12689472, 68, 0, 0 }, |
| 1311 | { 494, 628, 11, 442, 12640276, 120, 0, 0 }, |
| 1312 | { 623, 573, 11, 442, 12640280, 120, 0, 0 }, |
| 1313 | { 738, 518, 11, 442, 12640284, 120, 0, 0 }, |
| 1314 | { 855, 463, 11, 442, 12640288, 120, 0, 0 }, |
| 1315 | { 958, 408, 11, 442, 12640292, 120, 0, 0 }, |
| 1316 | { 1075, 357, 11, 392, 12648488, 136, 0, 0 }, |
| 1317 | { 1178, 310, 11, 346, 12656684, 150, 0, 0 }, |
| 1318 | { 26, 267, 11, 304, 12664880, 162, 0, 0 }, |
| 1319 | { 161, 228, 11, 266, 12673076, 172, 0, 0 }, |
| 1320 | { 304, 189, 11, 266, 12673078, 172, 0, 0 }, |
| 1321 | { 427, 150, 11, 266, 12673080, 172, 0, 0 }, |
| 1322 | { 546, 111, 11, 266, 12673082, 172, 0, 0 }, |
| 1323 | { 668, 72, 11, 266, 12673084, 172, 0, 0 }, |
| 1324 | { 266, 2875, 11, 12, 10874953, 2, 0, 0 }, |
| 1325 | { 506, 2878, 11, 12, 10874955, 2, 0, 0 }, |
| 1326 | { 750, 2881, 11, 12, 10874957, 2, 0, 0 }, |
| 1327 | { 970, 2884, 11, 12, 10874959, 2, 0, 0 }, |
| 1328 | { 1190, 2887, 11, 12, 10874961, 2, 0, 0 }, |
| 1329 | { 175, 2890, 11, 12, 10874963, 2, 0, 0 }, |
| 1330 | { 1248, 2551, 11, 12, 14618640, 0, 0, 0 }, |
| 1331 | { 369, 3951, 3556, 52, 12681236, 19, 0, 0 }, |
| 1332 | { 485, 2641, 983, 52, 12681238, 19, 0, 0 }, |
| 1333 | { 614, 3938, 2870, 52, 12681240, 19, 0, 0 }, |
| 1334 | { 729, 2628, 2862, 52, 12681242, 19, 0, 0 }, |
| 1335 | { 846, 3925, 3080, 52, 12681244, 19, 0, 0 }, |
| 1336 | { 949, 2615, 2851, 52, 12681246, 19, 0, 0 }, |
| 1337 | { 1066, 3912, 3071, 52, 12681248, 19, 0, 0 }, |
| 1338 | { 1169, 2602, 2845, 52, 12681250, 19, 0, 0 }, |
| 1339 | { 16, 3899, 3065, 52, 12681252, 19, 0, 0 }, |
| 1340 | { 137, 2589, 2839, 52, 12681254, 19, 0, 0 }, |
| 1341 | { 292, 3886, 3059, 52, 12681256, 19, 0, 0 }, |
| 1342 | { 415, 2576, 2833, 52, 12681258, 19, 0, 0 }, |
| 1343 | { 534, 3873, 3053, 52, 12681260, 19, 0, 0 }, |
| 1344 | { 656, 2563, 2827, 52, 12681262, 19, 0, 0 }, |
| 1345 | { 779, 3862, 3047, 42, 12685360, 30, 0, 0 }, |
| 1346 | { 889, 2554, 2821, 34, 12689458, 35, 0, 0 }, |
| 1347 | { 999, 3855, 3041, 28, 11976756, 39, 0, 0 }, |
| 1348 | { 1109, 2544, 2815, 28, 11976757, 39, 0, 0 }, |
| 1349 | { 67, 3848, 3035, 28, 11976758, 39, 0, 0 }, |
| 1350 | { 187, 2537, 2809, 28, 11976759, 39, 0, 0 }, |
| 1351 | { 347, 3841, 3029, 28, 11976760, 39, 0, 0 }, |
| 1352 | { 463, 2530, 2803, 28, 11976761, 39, 0, 0 }, |
| 1353 | { 586, 3834, 3023, 28, 11976762, 39, 0, 0 }, |
| 1354 | { 704, 2523, 2797, 28, 11976763, 39, 0, 0 }, |
| 1355 | { 815, 3827, 3017, 28, 11976764, 39, 0, 0 }, |
| 1356 | { 921, 2516, 2791, 28, 11976765, 39, 0, 0 }, |
| 1357 | { 1035, 3820, 2857, 28, 11976766, 39, 0, 0 }, |
| 1358 | { 1141, 2509, 935, 28, 11976767, 39, 0, 0 }, |
| 1359 | { 103, 3813, 946, 28, 11976768, 39, 0, 0 }, |
| 1360 | { 219, 2502, 3552, 28, 11976769, 39, 0, 0 }, |
| 1361 | { 602, 3490, 2490, 190, 12730388, 72, 0, 0 }, |
| 1362 | { 720, 3478, 2430, 190, 12730390, 72, 0, 0 }, |
| 1363 | { 834, 3466, 2479, 190, 12730392, 72, 0, 0 }, |
| 1364 | { 940, 3454, 2386, 190, 12730394, 72, 0, 0 }, |
| 1365 | { 1054, 3442, 2386, 190, 12730396, 72, 0, 0 }, |
| 1366 | { 1160, 3430, 2275, 190, 12730398, 72, 0, 0 }, |
| 1367 | { 3, 3418, 2275, 190, 12730400, 72, 0, 0 }, |
| 1368 | { 151, 3406, 2154, 190, 12730402, 72, 0, 0 }, |
| 1369 | { 278, 3394, 2154, 190, 12730404, 72, 0, 0 }, |
| 1370 | { 404, 3382, 2034, 190, 12730406, 72, 0, 0 }, |
| 1371 | { 518, 3370, 2034, 190, 12730408, 72, 0, 0 }, |
| 1372 | { 644, 3358, 1914, 190, 12730410, 72, 0, 0 }, |
| 1373 | { 763, 3512, 1914, 181, 14524460, 78, 0, 0 }, |
| 1374 | { 877, 3502, 1794, 181, 13643822, 78, 0, 0 }, |
| 1375 | { 983, 3530, 1794, 174, 13738032, 83, 0, 0 }, |
| 1376 | { 1097, 3522, 1698, 174, 13672498, 83, 0, 0 }, |
| 1377 | { 51, 3538, 1698, 169, 13676596, 87, 0, 0 }, |
| 1378 | { 203, 3538, 1603, 169, 13676597, 87, 0, 0 }, |
| 1379 | { 331, 3538, 1603, 169, 13676598, 87, 0, 0 }, |
| 1380 | { 451, 3538, 1533, 169, 13676599, 87, 0, 0 }, |
| 1381 | { 570, 3538, 1533, 169, 13676600, 87, 0, 0 }, |
| 1382 | { 692, 3538, 1463, 169, 13676601, 87, 0, 0 }, |
| 1383 | { 799, 3538, 1463, 169, 13676602, 87, 0, 0 }, |
| 1384 | { 909, 3538, 1393, 169, 13676603, 87, 0, 0 }, |
| 1385 | { 1019, 3538, 1393, 169, 13676604, 87, 0, 0 }, |
| 1386 | { 1129, 3538, 1304, 169, 13676605, 87, 0, 0 }, |
| 1387 | { 87, 3538, 1327, 169, 13676606, 87, 0, 0 }, |
| 1388 | { 235, 3538, 1266, 169, 13676607, 87, 0, 0 }, |
| 1389 | { 831, 1149, 2491, 249, 12722196, 90, 0, 0 }, |
| 1390 | { 937, 1131, 2428, 249, 12722198, 90, 0, 0 }, |
| 1391 | { 1051, 1113, 2428, 249, 12722200, 90, 0, 0 }, |
| 1392 | { 1157, 1095, 2319, 249, 12722202, 90, 0, 0 }, |
| 1393 | { 0, 1077, 2319, 249, 12722204, 90, 0, 0 }, |
| 1394 | { 148, 1059, 2198, 249, 12722206, 90, 0, 0 }, |
| 1395 | { 275, 1041, 2198, 249, 12722208, 90, 0, 0 }, |
| 1396 | { 401, 1023, 2097, 249, 12722210, 90, 0, 0 }, |
| 1397 | { 515, 1005, 2097, 249, 12722212, 90, 0, 0 }, |
| 1398 | { 641, 987, 1977, 249, 12722214, 90, 0, 0 }, |
| 1399 | { 759, 1183, 1977, 234, 14516264, 98, 0, 0 }, |
| 1400 | { 873, 1167, 1857, 234, 13635626, 98, 0, 0 }, |
| 1401 | { 979, 1213, 1857, 221, 13729836, 105, 0, 0 }, |
| 1402 | { 1093, 1199, 1737, 221, 13664302, 105, 0, 0 }, |
| 1403 | { 47, 1239, 1737, 210, 13709360, 111, 0, 0 }, |
| 1404 | { 199, 1227, 1642, 210, 13688882, 111, 0, 0 }, |
| 1405 | { 327, 1251, 1642, 201, 13692980, 116, 0, 0 }, |
| 1406 | { 447, 1251, 1571, 201, 13692981, 116, 0, 0 }, |
| 1407 | { 566, 1251, 1571, 201, 13692982, 116, 0, 0 }, |
| 1408 | { 688, 1251, 1501, 201, 13692983, 116, 0, 0 }, |
| 1409 | { 795, 1251, 1501, 201, 13692984, 116, 0, 0 }, |
| 1410 | { 905, 1251, 1431, 201, 13692985, 116, 0, 0 }, |
| 1411 | { 1015, 1251, 1431, 201, 13692986, 116, 0, 0 }, |
| 1412 | { 1125, 1251, 1328, 201, 13692987, 116, 0, 0 }, |
| 1413 | { 83, 1251, 1328, 201, 13692988, 116, 0, 0 }, |
| 1414 | { 231, 1251, 1267, 201, 13692989, 116, 0, 0 }, |
| 1415 | { 372, 3130, 981, 16, 12689430, 6, 0, 0 }, |
| 1416 | { 617, 3158, 2675, 16, 12689434, 6, 0, 0 }, |
| 1417 | { 849, 3186, 2773, 16, 12689438, 6, 0, 0 }, |
| 1418 | { 1069, 3214, 2764, 16, 12689442, 6, 0, 0 }, |
| 1419 | { 19, 3242, 2755, 16, 12689446, 6, 0, 0 }, |
| 1420 | { 296, 3270, 2746, 16, 12689450, 6, 0, 0 }, |
| 1421 | { 538, 3298, 2737, 16, 12689454, 6, 0, 0 }, |
| 1422 | { 783, 2195, 2728, 2, 11976754, 10, 0, 0 }, |
| 1423 | { 1003, 2654, 2719, 0, 10874933, 13, 0, 0 }, |
| 1424 | { 71, 2657, 2710, 0, 10874935, 13, 0, 0 }, |
| 1425 | { 351, 2660, 2701, 0, 10874937, 13, 0, 0 }, |
| 1426 | { 590, 2663, 2692, 0, 10874939, 13, 0, 0 }, |
| 1427 | { 819, 2666, 2683, 0, 10874941, 13, 0, 0 }, |
| 1428 | { 1039, 2669, 919, 0, 10874943, 13, 0, 0 }, |
| 1429 | { 107, 2672, 940, 0, 10874945, 13, 0, 0 }, |
| 1430 | { 611, 815, 960, 131, 12673046, 42, 0, 0 }, |
| 1431 | { 843, 795, 2680, 131, 12673050, 42, 0, 0 }, |
| 1432 | { 1063, 775, 2680, 131, 12673054, 42, 0, 0 }, |
| 1433 | { 13, 755, 2680, 131, 12673058, 42, 0, 0 }, |
| 1434 | { 289, 735, 2680, 131, 12673062, 42, 0, 0 }, |
| 1435 | { 530, 715, 2680, 131, 12673066, 42, 0, 0 }, |
| 1436 | { 775, 697, 2680, 114, 12677166, 50, 0, 0 }, |
| 1437 | { 995, 683, 2680, 101, 12685362, 63, 0, 0 }, |
| 1438 | { 63, 60, 2680, 90, 12689461, 68, 0, 0 }, |
| 1439 | { 343, 48, 2680, 90, 12689463, 68, 0, 0 }, |
| 1440 | { 582, 36, 2680, 90, 12689465, 68, 0, 0 }, |
| 1441 | { 811, 24, 2680, 90, 12689467, 68, 0, 0 }, |
| 1442 | { 1031, 12, 2680, 90, 12689469, 68, 0, 0 }, |
| 1443 | { 99, 0, 854, 90, 12689471, 68, 0, 0 }, |
| 1444 | }; |
| 1445 | |
| 1446 | extern const MCPhysReg ARMRegUnitRoots[][2] = { |
| 1447 | { ARM::APSR }, |
| 1448 | { ARM::APSR_NZCV }, |
| 1449 | { ARM::CPSR }, |
| 1450 | { ARM::FPCXTNS }, |
| 1451 | { ARM::FPCXTS }, |
| 1452 | { ARM::FPEXC }, |
| 1453 | { ARM::FPINST }, |
| 1454 | { ARM::FPSCR }, |
| 1455 | { ARM::FPSCR, ARM::FPSCR_NZCV }, |
| 1456 | { ARM::FPSCR_NZCV }, |
| 1457 | { ARM::FPSCR_NZCVQC }, |
| 1458 | { ARM::FPSID }, |
| 1459 | { ARM::ITSTATE }, |
| 1460 | { ARM::LR }, |
| 1461 | { ARM::PC }, |
| 1462 | { ARM::RA_AUTH_CODE }, |
| 1463 | { ARM::SP }, |
| 1464 | { ARM::SPSR }, |
| 1465 | { ARM::VPR }, |
| 1466 | { ARM::ZR }, |
| 1467 | { ARM::S0 }, |
| 1468 | { ARM::S1 }, |
| 1469 | { ARM::S2 }, |
| 1470 | { ARM::S3 }, |
| 1471 | { ARM::S4 }, |
| 1472 | { ARM::S5 }, |
| 1473 | { ARM::S6 }, |
| 1474 | { ARM::S7 }, |
| 1475 | { ARM::S8 }, |
| 1476 | { ARM::S9 }, |
| 1477 | { ARM::S10 }, |
| 1478 | { ARM::S11 }, |
| 1479 | { ARM::S12 }, |
| 1480 | { ARM::S13 }, |
| 1481 | { ARM::S14 }, |
| 1482 | { ARM::S15 }, |
| 1483 | { ARM::S16 }, |
| 1484 | { ARM::S17 }, |
| 1485 | { ARM::S18 }, |
| 1486 | { ARM::S19 }, |
| 1487 | { ARM::S20 }, |
| 1488 | { ARM::S21 }, |
| 1489 | { ARM::S22 }, |
| 1490 | { ARM::S23 }, |
| 1491 | { ARM::S24 }, |
| 1492 | { ARM::S25 }, |
| 1493 | { ARM::S26 }, |
| 1494 | { ARM::S27 }, |
| 1495 | { ARM::S28 }, |
| 1496 | { ARM::S29 }, |
| 1497 | { ARM::S30 }, |
| 1498 | { ARM::S31 }, |
| 1499 | { ARM::D16 }, |
| 1500 | { ARM::D17 }, |
| 1501 | { ARM::D18 }, |
| 1502 | { ARM::D19 }, |
| 1503 | { ARM::D20 }, |
| 1504 | { ARM::D21 }, |
| 1505 | { ARM::D22 }, |
| 1506 | { ARM::D23 }, |
| 1507 | { ARM::D24 }, |
| 1508 | { ARM::D25 }, |
| 1509 | { ARM::D26 }, |
| 1510 | { ARM::D27 }, |
| 1511 | { ARM::D28 }, |
| 1512 | { ARM::D29 }, |
| 1513 | { ARM::D30 }, |
| 1514 | { ARM::D31 }, |
| 1515 | { ARM::FPINST2 }, |
| 1516 | { ARM::MVFR0 }, |
| 1517 | { ARM::MVFR1 }, |
| 1518 | { ARM::MVFR2 }, |
| 1519 | { ARM::P0 }, |
| 1520 | { ARM::R0 }, |
| 1521 | { ARM::R1 }, |
| 1522 | { ARM::R2 }, |
| 1523 | { ARM::R3 }, |
| 1524 | { ARM::R4 }, |
| 1525 | { ARM::R5 }, |
| 1526 | { ARM::R6 }, |
| 1527 | { ARM::R7 }, |
| 1528 | { ARM::R8 }, |
| 1529 | { ARM::R9 }, |
| 1530 | { ARM::R10 }, |
| 1531 | { ARM::R11 }, |
| 1532 | { ARM::R12 }, |
| 1533 | }; |
| 1534 | |
| 1535 | namespace { // Register classes... |
| 1536 | // HPR Register Class... |
| 1537 | const MCPhysReg HPR[] = { |
| 1538 | ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, |
| 1539 | }; |
| 1540 | |
| 1541 | // HPR Bit set. |
| 1542 | const uint8_t HPRBits[] = { |
| 1543 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| 1544 | }; |
| 1545 | |
| 1546 | // FPWithVPR Register Class... |
| 1547 | const MCPhysReg FPWithVPR[] = { |
| 1548 | ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::VPR, |
| 1549 | }; |
| 1550 | |
| 1551 | // FPWithVPR Bit set. |
| 1552 | const uint8_t FPWithVPRBits[] = { |
| 1553 | 0x00, 0x00, 0xf4, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| 1554 | }; |
| 1555 | |
| 1556 | // SPR Register Class... |
| 1557 | const MCPhysReg SPR[] = { |
| 1558 | ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, |
| 1559 | }; |
| 1560 | |
| 1561 | // SPR Bit set. |
| 1562 | const uint8_t SPRBits[] = { |
| 1563 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| 1564 | }; |
| 1565 | |
| 1566 | // FPWithVPR_with_ssub_0 Register Class... |
| 1567 | const MCPhysReg FPWithVPR_with_ssub_0[] = { |
| 1568 | ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, |
| 1569 | }; |
| 1570 | |
| 1571 | // FPWithVPR_with_ssub_0 Bit set. |
| 1572 | const uint8_t FPWithVPR_with_ssub_0Bits[] = { |
| 1573 | 0x00, 0x00, 0xf0, 0xff, 0x0f, |
| 1574 | }; |
| 1575 | |
| 1576 | // GPR Register Class... |
| 1577 | const MCPhysReg GPR[] = { |
| 1578 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, |
| 1579 | }; |
| 1580 | |
| 1581 | // GPR Bit set. |
| 1582 | const uint8_t GPRBits[] = { |
| 1583 | 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1584 | }; |
| 1585 | |
| 1586 | // GPRwithAPSR Register Class... |
| 1587 | const MCPhysReg GPRwithAPSR[] = { |
| 1588 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::APSR_NZCV, |
| 1589 | }; |
| 1590 | |
| 1591 | // GPRwithAPSR Bit set. |
| 1592 | const uint8_t GPRwithAPSRBits[] = { |
| 1593 | 0x04, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1594 | }; |
| 1595 | |
| 1596 | // GPRwithZR Register Class... |
| 1597 | const MCPhysReg GPRwithZR[] = { |
| 1598 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::ZR, |
| 1599 | }; |
| 1600 | |
| 1601 | // GPRwithZR Bit set. |
| 1602 | const uint8_t GPRwithZRBits[] = { |
| 1603 | 0x00, 0x20, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1604 | }; |
| 1605 | |
| 1606 | // SPR_8 Register Class... |
| 1607 | const MCPhysReg SPR_8[] = { |
| 1608 | ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, |
| 1609 | }; |
| 1610 | |
| 1611 | // SPR_8 Bit set. |
| 1612 | const uint8_t SPR_8Bits[] = { |
| 1613 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, |
| 1614 | }; |
| 1615 | |
| 1616 | // GPRnopc Register Class... |
| 1617 | const MCPhysReg GPRnopc[] = { |
| 1618 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, |
| 1619 | }; |
| 1620 | |
| 1621 | // GPRnopc Bit set. |
| 1622 | const uint8_t GPRnopcBits[] = { |
| 1623 | 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1624 | }; |
| 1625 | |
| 1626 | // GPRnosp Register Class... |
| 1627 | const MCPhysReg GPRnosp[] = { |
| 1628 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC, |
| 1629 | }; |
| 1630 | |
| 1631 | // GPRnosp Bit set. |
| 1632 | const uint8_t GPRnospBits[] = { |
| 1633 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1634 | }; |
| 1635 | |
| 1636 | // GPRwithAPSR_NZCVnosp Register Class... |
| 1637 | const MCPhysReg GPRwithAPSR_NZCVnosp[] = { |
| 1638 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR_NZCV, |
| 1639 | }; |
| 1640 | |
| 1641 | // GPRwithAPSR_NZCVnosp Bit set. |
| 1642 | const uint8_t GPRwithAPSR_NZCVnospBits[] = { |
| 1643 | 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1644 | }; |
| 1645 | |
| 1646 | // GPRwithAPSRnosp Register Class... |
| 1647 | const MCPhysReg GPRwithAPSRnosp[] = { |
| 1648 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR, |
| 1649 | }; |
| 1650 | |
| 1651 | // GPRwithAPSRnosp Bit set. |
| 1652 | const uint8_t GPRwithAPSRnospBits[] = { |
| 1653 | 0x02, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1654 | }; |
| 1655 | |
| 1656 | // GPRwithZRnosp Register Class... |
| 1657 | const MCPhysReg GPRwithZRnosp[] = { |
| 1658 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::ZR, |
| 1659 | }; |
| 1660 | |
| 1661 | // GPRwithZRnosp Bit set. |
| 1662 | const uint8_t GPRwithZRnospBits[] = { |
| 1663 | 0x00, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1664 | }; |
| 1665 | |
| 1666 | // GPRnoip Register Class... |
| 1667 | const MCPhysReg GPRnoip[] = { |
| 1668 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC, |
| 1669 | }; |
| 1670 | |
| 1671 | // GPRnoip Bit set. |
| 1672 | const uint8_t GPRnoipBits[] = { |
| 1673 | 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| 1674 | }; |
| 1675 | |
| 1676 | // rGPR Register Class... |
| 1677 | const MCPhysReg rGPR[] = { |
| 1678 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, |
| 1679 | }; |
| 1680 | |
| 1681 | // rGPR Bit set. |
| 1682 | const uint8_t rGPRBits[] = { |
| 1683 | 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| 1684 | }; |
| 1685 | |
| 1686 | // GPRnoip_and_GPRnopc Register Class... |
| 1687 | const MCPhysReg GPRnoip_and_GPRnopc[] = { |
| 1688 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, |
| 1689 | }; |
| 1690 | |
| 1691 | // GPRnoip_and_GPRnopc Bit set. |
| 1692 | const uint8_t GPRnoip_and_GPRnopcBits[] = { |
| 1693 | 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| 1694 | }; |
| 1695 | |
| 1696 | // GPRnoip_and_GPRnosp Register Class... |
| 1697 | const MCPhysReg GPRnoip_and_GPRnosp[] = { |
| 1698 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC, |
| 1699 | }; |
| 1700 | |
| 1701 | // GPRnoip_and_GPRnosp Bit set. |
| 1702 | const uint8_t GPRnoip_and_GPRnospBits[] = { |
| 1703 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| 1704 | }; |
| 1705 | |
| 1706 | // GPRnoip_and_GPRwithAPSR_NZCVnosp Register Class... |
| 1707 | const MCPhysReg GPRnoip_and_GPRwithAPSR_NZCVnosp[] = { |
| 1708 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, |
| 1709 | }; |
| 1710 | |
| 1711 | // GPRnoip_and_GPRwithAPSR_NZCVnosp Bit set. |
| 1712 | const uint8_t GPRnoip_and_GPRwithAPSR_NZCVnospBits[] = { |
| 1713 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| 1714 | }; |
| 1715 | |
| 1716 | // tGPRwithpc Register Class... |
| 1717 | const MCPhysReg tGPRwithpc[] = { |
| 1718 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::PC, |
| 1719 | }; |
| 1720 | |
| 1721 | // tGPRwithpc Bit set. |
| 1722 | const uint8_t tGPRwithpcBits[] = { |
| 1723 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| 1724 | }; |
| 1725 | |
| 1726 | // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Register Class... |
| 1727 | const MCPhysReg FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8[] = { |
| 1728 | ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, |
| 1729 | }; |
| 1730 | |
| 1731 | // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Bit set. |
| 1732 | const uint8_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits[] = { |
| 1733 | 0x00, 0x00, 0xf0, 0x0f, |
| 1734 | }; |
| 1735 | |
| 1736 | // hGPR Register Class... |
| 1737 | const MCPhysReg hGPR[] = { |
| 1738 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, |
| 1739 | }; |
| 1740 | |
| 1741 | // hGPR Bit set. |
| 1742 | const uint8_t hGPRBits[] = { |
| 1743 | 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| 1744 | }; |
| 1745 | |
| 1746 | // tGPR Register Class... |
| 1747 | const MCPhysReg tGPR[] = { |
| 1748 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, |
| 1749 | }; |
| 1750 | |
| 1751 | // tGPR Bit set. |
| 1752 | const uint8_t tGPRBits[] = { |
| 1753 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| 1754 | }; |
| 1755 | |
| 1756 | // tGPREven Register Class... |
| 1757 | const MCPhysReg tGPREven[] = { |
| 1758 | ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10, ARM::R12, ARM::LR, |
| 1759 | }; |
| 1760 | |
| 1761 | // tGPREven Bit set. |
| 1762 | const uint8_t tGPREvenBits[] = { |
| 1763 | 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x2a, |
| 1764 | }; |
| 1765 | |
| 1766 | // GPRnopc_and_hGPR Register Class... |
| 1767 | const MCPhysReg GPRnopc_and_hGPR[] = { |
| 1768 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, |
| 1769 | }; |
| 1770 | |
| 1771 | // GPRnopc_and_hGPR Bit set. |
| 1772 | const uint8_t GPRnopc_and_hGPRBits[] = { |
| 1773 | 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| 1774 | }; |
| 1775 | |
| 1776 | // GPRnosp_and_hGPR Register Class... |
| 1777 | const MCPhysReg GPRnosp_and_hGPR[] = { |
| 1778 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC, |
| 1779 | }; |
| 1780 | |
| 1781 | // GPRnosp_and_hGPR Bit set. |
| 1782 | const uint8_t GPRnosp_and_hGPRBits[] = { |
| 1783 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| 1784 | }; |
| 1785 | |
| 1786 | // GPRnoip_and_hGPR Register Class... |
| 1787 | const MCPhysReg GPRnoip_and_hGPR[] = { |
| 1788 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC, |
| 1789 | }; |
| 1790 | |
| 1791 | // GPRnoip_and_hGPR Bit set. |
| 1792 | const uint8_t GPRnoip_and_hGPRBits[] = { |
| 1793 | 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 1794 | }; |
| 1795 | |
| 1796 | // GPRnoip_and_tGPREven Register Class... |
| 1797 | const MCPhysReg GPRnoip_and_tGPREven[] = { |
| 1798 | ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10, |
| 1799 | }; |
| 1800 | |
| 1801 | // GPRnoip_and_tGPREven Bit set. |
| 1802 | const uint8_t GPRnoip_and_tGPREvenBits[] = { |
| 1803 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x0a, |
| 1804 | }; |
| 1805 | |
| 1806 | // GPRnosp_and_GPRnopc_and_hGPR Register Class... |
| 1807 | const MCPhysReg GPRnosp_and_GPRnopc_and_hGPR[] = { |
| 1808 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, |
| 1809 | }; |
| 1810 | |
| 1811 | // GPRnosp_and_GPRnopc_and_hGPR Bit set. |
| 1812 | const uint8_t GPRnosp_and_GPRnopc_and_hGPRBits[] = { |
| 1813 | 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| 1814 | }; |
| 1815 | |
| 1816 | // tGPROdd Register Class... |
| 1817 | const MCPhysReg tGPROdd[] = { |
| 1818 | ARM::R1, ARM::R3, ARM::R5, ARM::R7, ARM::R9, ARM::R11, |
| 1819 | }; |
| 1820 | |
| 1821 | // tGPROdd Bit set. |
| 1822 | const uint8_t tGPROddBits[] = { |
| 1823 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x15, |
| 1824 | }; |
| 1825 | |
| 1826 | // GPRnopc_and_GPRnoip_and_hGPR Register Class... |
| 1827 | const MCPhysReg GPRnopc_and_GPRnoip_and_hGPR[] = { |
| 1828 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, |
| 1829 | }; |
| 1830 | |
| 1831 | // GPRnopc_and_GPRnoip_and_hGPR Bit set. |
| 1832 | const uint8_t GPRnopc_and_GPRnoip_and_hGPRBits[] = { |
| 1833 | 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 1834 | }; |
| 1835 | |
| 1836 | // GPRnosp_and_GPRnoip_and_hGPR Register Class... |
| 1837 | const MCPhysReg GPRnosp_and_GPRnoip_and_hGPR[] = { |
| 1838 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC, |
| 1839 | }; |
| 1840 | |
| 1841 | // GPRnosp_and_GPRnoip_and_hGPR Bit set. |
| 1842 | const uint8_t GPRnosp_and_GPRnoip_and_hGPRBits[] = { |
| 1843 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 1844 | }; |
| 1845 | |
| 1846 | // tcGPR Register Class... |
| 1847 | const MCPhysReg tcGPR[] = { |
| 1848 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R12, |
| 1849 | }; |
| 1850 | |
| 1851 | // tcGPR Bit set. |
| 1852 | const uint8_t tcGPRBits[] = { |
| 1853 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x20, |
| 1854 | }; |
| 1855 | |
| 1856 | // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Register Class... |
| 1857 | const MCPhysReg GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR[] = { |
| 1858 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, |
| 1859 | }; |
| 1860 | |
| 1861 | // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Bit set. |
| 1862 | const uint8_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits[] = { |
| 1863 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 1864 | }; |
| 1865 | |
| 1866 | // hGPR_and_tGPREven Register Class... |
| 1867 | const MCPhysReg hGPR_and_tGPREven[] = { |
| 1868 | ARM::R8, ARM::R10, ARM::R12, ARM::LR, |
| 1869 | }; |
| 1870 | |
| 1871 | // hGPR_and_tGPREven Bit set. |
| 1872 | const uint8_t hGPR_and_tGPREvenBits[] = { |
| 1873 | 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, |
| 1874 | }; |
| 1875 | |
| 1876 | // tGPR_and_tGPREven Register Class... |
| 1877 | const MCPhysReg tGPR_and_tGPREven[] = { |
| 1878 | ARM::R0, ARM::R2, ARM::R4, ARM::R6, |
| 1879 | }; |
| 1880 | |
| 1881 | // tGPR_and_tGPREven Bit set. |
| 1882 | const uint8_t tGPR_and_tGPREvenBits[] = { |
| 1883 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, |
| 1884 | }; |
| 1885 | |
| 1886 | // tGPR_and_tGPROdd Register Class... |
| 1887 | const MCPhysReg tGPR_and_tGPROdd[] = { |
| 1888 | ARM::R1, ARM::R3, ARM::R5, ARM::R7, |
| 1889 | }; |
| 1890 | |
| 1891 | // tGPR_and_tGPROdd Bit set. |
| 1892 | const uint8_t tGPR_and_tGPROddBits[] = { |
| 1893 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x01, |
| 1894 | }; |
| 1895 | |
| 1896 | // tcGPRnotr12 Register Class... |
| 1897 | const MCPhysReg tcGPRnotr12[] = { |
| 1898 | ARM::R0, ARM::R1, ARM::R2, ARM::R3, |
| 1899 | }; |
| 1900 | |
| 1901 | // tcGPRnotr12 Bit set. |
| 1902 | const uint8_t tcGPRnotr12Bits[] = { |
| 1903 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 1904 | }; |
| 1905 | |
| 1906 | // tGPREven_and_tcGPR Register Class... |
| 1907 | const MCPhysReg tGPREven_and_tcGPR[] = { |
| 1908 | ARM::R0, ARM::R2, ARM::R12, |
| 1909 | }; |
| 1910 | |
| 1911 | // tGPREven_and_tcGPR Bit set. |
| 1912 | const uint8_t tGPREven_and_tcGPRBits[] = { |
| 1913 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x20, |
| 1914 | }; |
| 1915 | |
| 1916 | // FP_STATUS_REGS Register Class... |
| 1917 | const MCPhysReg FP_STATUS_REGS[] = { |
| 1918 | ARM::FPSCR, ARM::FPEXC, |
| 1919 | }; |
| 1920 | |
| 1921 | // FP_STATUS_REGS Bit set. |
| 1922 | const uint8_t FP_STATUS_REGSBits[] = { |
| 1923 | 0x40, 0x01, |
| 1924 | }; |
| 1925 | |
| 1926 | // hGPR_and_GPRnoip_and_tGPREven Register Class... |
| 1927 | const MCPhysReg hGPR_and_GPRnoip_and_tGPREven[] = { |
| 1928 | ARM::R8, ARM::R10, |
| 1929 | }; |
| 1930 | |
| 1931 | // hGPR_and_GPRnoip_and_tGPREven Bit set. |
| 1932 | const uint8_t hGPR_and_GPRnoip_and_tGPREvenBits[] = { |
| 1933 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, |
| 1934 | }; |
| 1935 | |
| 1936 | // hGPR_and_tGPROdd Register Class... |
| 1937 | const MCPhysReg hGPR_and_tGPROdd[] = { |
| 1938 | ARM::R9, ARM::R11, |
| 1939 | }; |
| 1940 | |
| 1941 | // hGPR_and_tGPROdd Bit set. |
| 1942 | const uint8_t hGPR_and_tGPROddBits[] = { |
| 1943 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, |
| 1944 | }; |
| 1945 | |
| 1946 | // tGPREven_and_tcGPRnotr12 Register Class... |
| 1947 | const MCPhysReg tGPREven_and_tcGPRnotr12[] = { |
| 1948 | ARM::R0, ARM::R2, |
| 1949 | }; |
| 1950 | |
| 1951 | // tGPREven_and_tcGPRnotr12 Bit set. |
| 1952 | const uint8_t tGPREven_and_tcGPRnotr12Bits[] = { |
| 1953 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, |
| 1954 | }; |
| 1955 | |
| 1956 | // tGPROdd_and_tcGPR Register Class... |
| 1957 | const MCPhysReg tGPROdd_and_tcGPR[] = { |
| 1958 | ARM::R1, ARM::R3, |
| 1959 | }; |
| 1960 | |
| 1961 | // tGPROdd_and_tcGPR Bit set. |
| 1962 | const uint8_t tGPROdd_and_tcGPRBits[] = { |
| 1963 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, |
| 1964 | }; |
| 1965 | |
| 1966 | // CCR Register Class... |
| 1967 | const MCPhysReg CCR[] = { |
| 1968 | ARM::CPSR, |
| 1969 | }; |
| 1970 | |
| 1971 | // CCR Bit set. |
| 1972 | const uint8_t CCRBits[] = { |
| 1973 | 0x08, |
| 1974 | }; |
| 1975 | |
| 1976 | // FPCXTRegs Register Class... |
| 1977 | const MCPhysReg FPCXTRegs[] = { |
| 1978 | ARM::FPCXTNS, |
| 1979 | }; |
| 1980 | |
| 1981 | // FPCXTRegs Bit set. |
| 1982 | const uint8_t FPCXTRegsBits[] = { |
| 1983 | 0x10, |
| 1984 | }; |
| 1985 | |
| 1986 | // GPRlr Register Class... |
| 1987 | const MCPhysReg GPRlr[] = { |
| 1988 | ARM::LR, |
| 1989 | }; |
| 1990 | |
| 1991 | // GPRlr Bit set. |
| 1992 | const uint8_t GPRlrBits[] = { |
| 1993 | 0x00, 0x20, |
| 1994 | }; |
| 1995 | |
| 1996 | // GPRsp Register Class... |
| 1997 | const MCPhysReg GPRsp[] = { |
| 1998 | ARM::SP, |
| 1999 | }; |
| 2000 | |
| 2001 | // GPRsp Bit set. |
| 2002 | const uint8_t GPRspBits[] = { |
| 2003 | 0x00, 0x00, 0x01, |
| 2004 | }; |
| 2005 | |
| 2006 | // VCCR Register Class... |
| 2007 | const MCPhysReg VCCR[] = { |
| 2008 | ARM::VPR, |
| 2009 | }; |
| 2010 | |
| 2011 | // VCCR Bit set. |
| 2012 | const uint8_t VCCRBits[] = { |
| 2013 | 0x00, 0x00, 0x04, |
| 2014 | }; |
| 2015 | |
| 2016 | // cl_FPSCR_NZCV Register Class... |
| 2017 | const MCPhysReg cl_FPSCR_NZCV[] = { |
| 2018 | ARM::FPSCR_NZCV, |
| 2019 | }; |
| 2020 | |
| 2021 | // cl_FPSCR_NZCV Bit set. |
| 2022 | const uint8_t cl_FPSCR_NZCVBits[] = { |
| 2023 | 0x00, 0x02, |
| 2024 | }; |
| 2025 | |
| 2026 | // hGPR_and_tGPRwithpc Register Class... |
| 2027 | const MCPhysReg hGPR_and_tGPRwithpc[] = { |
| 2028 | ARM::PC, |
| 2029 | }; |
| 2030 | |
| 2031 | // hGPR_and_tGPRwithpc Bit set. |
| 2032 | const uint8_t hGPR_and_tGPRwithpcBits[] = { |
| 2033 | 0x00, 0x40, |
| 2034 | }; |
| 2035 | |
| 2036 | // hGPR_and_tcGPR Register Class... |
| 2037 | const MCPhysReg hGPR_and_tcGPR[] = { |
| 2038 | ARM::R12, |
| 2039 | }; |
| 2040 | |
| 2041 | // hGPR_and_tcGPR Bit set. |
| 2042 | const uint8_t hGPR_and_tcGPRBits[] = { |
| 2043 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 2044 | }; |
| 2045 | |
| 2046 | // DPR Register Class... |
| 2047 | const MCPhysReg DPR[] = { |
| 2048 | ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, |
| 2049 | }; |
| 2050 | |
| 2051 | // DPR Bit set. |
| 2052 | const uint8_t DPRBits[] = { |
| 2053 | 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 2054 | }; |
| 2055 | |
| 2056 | // DPR_VFP2 Register Class... |
| 2057 | const MCPhysReg DPR_VFP2[] = { |
| 2058 | ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, |
| 2059 | }; |
| 2060 | |
| 2061 | // DPR_VFP2 Bit set. |
| 2062 | const uint8_t DPR_VFP2Bits[] = { |
| 2063 | 0x00, 0x00, 0xf0, 0xff, 0x0f, |
| 2064 | }; |
| 2065 | |
| 2066 | // DPR_8 Register Class... |
| 2067 | const MCPhysReg DPR_8[] = { |
| 2068 | ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, |
| 2069 | }; |
| 2070 | |
| 2071 | // DPR_8 Bit set. |
| 2072 | const uint8_t DPR_8Bits[] = { |
| 2073 | 0x00, 0x00, 0xf0, 0x0f, |
| 2074 | }; |
| 2075 | |
| 2076 | // GPRPair Register Class... |
| 2077 | const MCPhysReg GPRPair[] = { |
| 2078 | ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, |
| 2079 | }; |
| 2080 | |
| 2081 | // GPRPair Bit set. |
| 2082 | const uint8_t GPRPairBits[] = { |
| 2083 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, |
| 2084 | }; |
| 2085 | |
| 2086 | // GPRPairnosp Register Class... |
| 2087 | const MCPhysReg GPRPairnosp[] = { |
| 2088 | ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, |
| 2089 | }; |
| 2090 | |
| 2091 | // GPRPairnosp Bit set. |
| 2092 | const uint8_t GPRPairnospBits[] = { |
| 2093 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, |
| 2094 | }; |
| 2095 | |
| 2096 | // GPRPair_with_gsub_0_in_tGPR Register Class... |
| 2097 | const MCPhysReg GPRPair_with_gsub_0_in_tGPR[] = { |
| 2098 | ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, |
| 2099 | }; |
| 2100 | |
| 2101 | // GPRPair_with_gsub_0_in_tGPR Bit set. |
| 2102 | const uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = { |
| 2103 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, |
| 2104 | }; |
| 2105 | |
| 2106 | // GPRPair_with_gsub_0_in_hGPR Register Class... |
| 2107 | const MCPhysReg GPRPair_with_gsub_0_in_hGPR[] = { |
| 2108 | ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, |
| 2109 | }; |
| 2110 | |
| 2111 | // GPRPair_with_gsub_0_in_hGPR Bit set. |
| 2112 | const uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = { |
| 2113 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| 2114 | }; |
| 2115 | |
| 2116 | // GPRPair_with_gsub_0_in_tcGPR Register Class... |
| 2117 | const MCPhysReg GPRPair_with_gsub_0_in_tcGPR[] = { |
| 2118 | ARM::R0_R1, ARM::R2_R3, ARM::R12_SP, |
| 2119 | }; |
| 2120 | |
| 2121 | // GPRPair_with_gsub_0_in_tcGPR Bit set. |
| 2122 | const uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = { |
| 2123 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, |
| 2124 | }; |
| 2125 | |
| 2126 | // GPRPair_with_gsub_0_in_tcGPRnotr12 Register Class... |
| 2127 | const MCPhysReg GPRPair_with_gsub_0_in_tcGPRnotr12[] = { |
| 2128 | ARM::R0_R1, ARM::R2_R3, |
| 2129 | }; |
| 2130 | |
| 2131 | // GPRPair_with_gsub_0_in_tcGPRnotr12 Bit set. |
| 2132 | const uint8_t GPRPair_with_gsub_0_in_tcGPRnotr12Bits[] = { |
| 2133 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, |
| 2134 | }; |
| 2135 | |
| 2136 | // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Register Class... |
| 2137 | const MCPhysReg GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR[] = { |
| 2138 | ARM::R8_R9, ARM::R10_R11, |
| 2139 | }; |
| 2140 | |
| 2141 | // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Bit set. |
| 2142 | const uint8_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits[] = { |
| 2143 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, |
| 2144 | }; |
| 2145 | |
| 2146 | // GPRPair_with_gsub_1_in_GPRsp Register Class... |
| 2147 | const MCPhysReg GPRPair_with_gsub_1_in_GPRsp[] = { |
| 2148 | ARM::R12_SP, |
| 2149 | }; |
| 2150 | |
| 2151 | // GPRPair_with_gsub_1_in_GPRsp Bit set. |
| 2152 | const uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = { |
| 2153 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 2154 | }; |
| 2155 | |
| 2156 | // DPairSpc Register Class... |
| 2157 | const MCPhysReg DPairSpc[] = { |
| 2158 | ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, ARM::D16_D18, ARM::D17_D19, ARM::D18_D20, ARM::D19_D21, ARM::D20_D22, ARM::D21_D23, ARM::D22_D24, ARM::D23_D25, ARM::D24_D26, ARM::D25_D27, ARM::D26_D28, ARM::D27_D29, ARM::D28_D30, ARM::D29_D31, |
| 2159 | }; |
| 2160 | |
| 2161 | // DPairSpc Bit set. |
| 2162 | const uint8_t DPairSpcBits[] = { |
| 2163 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x0f, |
| 2164 | }; |
| 2165 | |
| 2166 | // DPairSpc_with_ssub_0 Register Class... |
| 2167 | const MCPhysReg DPairSpc_with_ssub_0[] = { |
| 2168 | ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, |
| 2169 | }; |
| 2170 | |
| 2171 | // DPairSpc_with_ssub_0 Bit set. |
| 2172 | const uint8_t DPairSpc_with_ssub_0Bits[] = { |
| 2173 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, |
| 2174 | }; |
| 2175 | |
| 2176 | // DPairSpc_with_ssub_4 Register Class... |
| 2177 | const MCPhysReg DPairSpc_with_ssub_4[] = { |
| 2178 | ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, |
| 2179 | }; |
| 2180 | |
| 2181 | // DPairSpc_with_ssub_4 Bit set. |
| 2182 | const uint8_t DPairSpc_with_ssub_4Bits[] = { |
| 2183 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, |
| 2184 | }; |
| 2185 | |
| 2186 | // DPairSpc_with_dsub_0_in_DPR_8 Register Class... |
| 2187 | const MCPhysReg DPairSpc_with_dsub_0_in_DPR_8[] = { |
| 2188 | ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, |
| 2189 | }; |
| 2190 | |
| 2191 | // DPairSpc_with_dsub_0_in_DPR_8 Bit set. |
| 2192 | const uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 2193 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, |
| 2194 | }; |
| 2195 | |
| 2196 | // DPairSpc_with_dsub_2_in_DPR_8 Register Class... |
| 2197 | const MCPhysReg DPairSpc_with_dsub_2_in_DPR_8[] = { |
| 2198 | ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, |
| 2199 | }; |
| 2200 | |
| 2201 | // DPairSpc_with_dsub_2_in_DPR_8 Bit set. |
| 2202 | const uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 2203 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, |
| 2204 | }; |
| 2205 | |
| 2206 | // DPair Register Class... |
| 2207 | const MCPhysReg DPair[] = { |
| 2208 | ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18, ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24, ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30, ARM::Q15, |
| 2209 | }; |
| 2210 | |
| 2211 | // DPair Bit set. |
| 2212 | const uint8_t DPairBits[] = { |
| 2213 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 2214 | }; |
| 2215 | |
| 2216 | // DPair_with_ssub_0 Register Class... |
| 2217 | const MCPhysReg DPair_with_ssub_0[] = { |
| 2218 | ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, |
| 2219 | }; |
| 2220 | |
| 2221 | // DPair_with_ssub_0 Bit set. |
| 2222 | const uint8_t DPair_with_ssub_0Bits[] = { |
| 2223 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 2224 | }; |
| 2225 | |
| 2226 | // QPR Register Class... |
| 2227 | const MCPhysReg QPR[] = { |
| 2228 | ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, |
| 2229 | }; |
| 2230 | |
| 2231 | // QPR Bit set. |
| 2232 | const uint8_t QPRBits[] = { |
| 2233 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01, |
| 2234 | }; |
| 2235 | |
| 2236 | // DPair_with_ssub_2 Register Class... |
| 2237 | const MCPhysReg DPair_with_ssub_2[] = { |
| 2238 | ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, |
| 2239 | }; |
| 2240 | |
| 2241 | // DPair_with_ssub_2 Bit set. |
| 2242 | const uint8_t DPair_with_ssub_2Bits[] = { |
| 2243 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 2244 | }; |
| 2245 | |
| 2246 | // DPair_with_dsub_0_in_DPR_8 Register Class... |
| 2247 | const MCPhysReg DPair_with_dsub_0_in_DPR_8[] = { |
| 2248 | ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, |
| 2249 | }; |
| 2250 | |
| 2251 | // DPair_with_dsub_0_in_DPR_8 Bit set. |
| 2252 | const uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = { |
| 2253 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 2254 | }; |
| 2255 | |
| 2256 | // MQPR Register Class... |
| 2257 | const MCPhysReg MQPR[] = { |
| 2258 | ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, |
| 2259 | }; |
| 2260 | |
| 2261 | // MQPR Bit set. |
| 2262 | const uint8_t MQPRBits[] = { |
| 2263 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| 2264 | }; |
| 2265 | |
| 2266 | // QPR_VFP2 Register Class... |
| 2267 | const MCPhysReg QPR_VFP2[] = { |
| 2268 | ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, |
| 2269 | }; |
| 2270 | |
| 2271 | // QPR_VFP2 Bit set. |
| 2272 | const uint8_t QPR_VFP2Bits[] = { |
| 2273 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| 2274 | }; |
| 2275 | |
| 2276 | // DPair_with_dsub_1_in_DPR_8 Register Class... |
| 2277 | const MCPhysReg DPair_with_dsub_1_in_DPR_8[] = { |
| 2278 | ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, |
| 2279 | }; |
| 2280 | |
| 2281 | // DPair_with_dsub_1_in_DPR_8 Bit set. |
| 2282 | const uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = { |
| 2283 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, |
| 2284 | }; |
| 2285 | |
| 2286 | // QPR_8 Register Class... |
| 2287 | const MCPhysReg QPR_8[] = { |
| 2288 | ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, |
| 2289 | }; |
| 2290 | |
| 2291 | // QPR_8 Bit set. |
| 2292 | const uint8_t QPR_8Bits[] = { |
| 2293 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 2294 | }; |
| 2295 | |
| 2296 | // DTriple Register Class... |
| 2297 | const MCPhysReg DTriple[] = { |
| 2298 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, ARM::D16_D17_D18, ARM::D17_D18_D19, ARM::D18_D19_D20, ARM::D19_D20_D21, ARM::D20_D21_D22, ARM::D21_D22_D23, ARM::D22_D23_D24, ARM::D23_D24_D25, ARM::D24_D25_D26, ARM::D25_D26_D27, ARM::D26_D27_D28, ARM::D27_D28_D29, ARM::D28_D29_D30, ARM::D29_D30_D31, |
| 2299 | }; |
| 2300 | |
| 2301 | // DTriple Bit set. |
| 2302 | const uint8_t DTripleBits[] = { |
| 2303 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x1f, |
| 2304 | }; |
| 2305 | |
| 2306 | // DTripleSpc Register Class... |
| 2307 | const MCPhysReg DTripleSpc[] = { |
| 2308 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, |
| 2309 | }; |
| 2310 | |
| 2311 | // DTripleSpc Bit set. |
| 2312 | const uint8_t DTripleSpcBits[] = { |
| 2313 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01, |
| 2314 | }; |
| 2315 | |
| 2316 | // DTripleSpc_with_ssub_0 Register Class... |
| 2317 | const MCPhysReg DTripleSpc_with_ssub_0[] = { |
| 2318 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, |
| 2319 | }; |
| 2320 | |
| 2321 | // DTripleSpc_with_ssub_0 Bit set. |
| 2322 | const uint8_t DTripleSpc_with_ssub_0Bits[] = { |
| 2323 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, |
| 2324 | }; |
| 2325 | |
| 2326 | // DTriple_with_ssub_0 Register Class... |
| 2327 | const MCPhysReg DTriple_with_ssub_0[] = { |
| 2328 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, |
| 2329 | }; |
| 2330 | |
| 2331 | // DTriple_with_ssub_0 Bit set. |
| 2332 | const uint8_t DTriple_with_ssub_0Bits[] = { |
| 2333 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 2334 | }; |
| 2335 | |
| 2336 | // DTriple_with_qsub_0_in_QPR Register Class... |
| 2337 | const MCPhysReg DTriple_with_qsub_0_in_QPR[] = { |
| 2338 | ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, ARM::D16_D17_D18, ARM::D18_D19_D20, ARM::D20_D21_D22, ARM::D22_D23_D24, ARM::D24_D25_D26, ARM::D26_D27_D28, ARM::D28_D29_D30, |
| 2339 | }; |
| 2340 | |
| 2341 | // DTriple_with_qsub_0_in_QPR Bit set. |
| 2342 | const uint8_t DTriple_with_qsub_0_in_QPRBits[] = { |
| 2343 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x0a, |
| 2344 | }; |
| 2345 | |
| 2346 | // DTriple_with_ssub_2 Register Class... |
| 2347 | const MCPhysReg DTriple_with_ssub_2[] = { |
| 2348 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, |
| 2349 | }; |
| 2350 | |
| 2351 | // DTriple_with_ssub_2 Bit set. |
| 2352 | const uint8_t DTriple_with_ssub_2Bits[] = { |
| 2353 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, |
| 2354 | }; |
| 2355 | |
| 2356 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| 2357 | const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| 2358 | ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, ARM::D17_D18_D19, ARM::D19_D20_D21, ARM::D21_D22_D23, ARM::D23_D24_D25, ARM::D25_D26_D27, ARM::D27_D28_D29, ARM::D29_D30_D31, |
| 2359 | }; |
| 2360 | |
| 2361 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| 2362 | const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 2363 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x15, |
| 2364 | }; |
| 2365 | |
| 2366 | // DTripleSpc_with_ssub_4 Register Class... |
| 2367 | const MCPhysReg DTripleSpc_with_ssub_4[] = { |
| 2368 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, |
| 2369 | }; |
| 2370 | |
| 2371 | // DTripleSpc_with_ssub_4 Bit set. |
| 2372 | const uint8_t DTripleSpc_with_ssub_4Bits[] = { |
| 2373 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, |
| 2374 | }; |
| 2375 | |
| 2376 | // DTriple_with_ssub_4 Register Class... |
| 2377 | const MCPhysReg DTriple_with_ssub_4[] = { |
| 2378 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, |
| 2379 | }; |
| 2380 | |
| 2381 | // DTriple_with_ssub_4 Bit set. |
| 2382 | const uint8_t DTriple_with_ssub_4Bits[] = { |
| 2383 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, |
| 2384 | }; |
| 2385 | |
| 2386 | // DTripleSpc_with_ssub_8 Register Class... |
| 2387 | const MCPhysReg DTripleSpc_with_ssub_8[] = { |
| 2388 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, |
| 2389 | }; |
| 2390 | |
| 2391 | // DTripleSpc_with_ssub_8 Bit set. |
| 2392 | const uint8_t DTripleSpc_with_ssub_8Bits[] = { |
| 2393 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01, |
| 2394 | }; |
| 2395 | |
| 2396 | // DTripleSpc_with_dsub_0_in_DPR_8 Register Class... |
| 2397 | const MCPhysReg DTripleSpc_with_dsub_0_in_DPR_8[] = { |
| 2398 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, |
| 2399 | }; |
| 2400 | |
| 2401 | // DTripleSpc_with_dsub_0_in_DPR_8 Bit set. |
| 2402 | const uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 2403 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, |
| 2404 | }; |
| 2405 | |
| 2406 | // DTriple_with_dsub_0_in_DPR_8 Register Class... |
| 2407 | const MCPhysReg DTriple_with_dsub_0_in_DPR_8[] = { |
| 2408 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, |
| 2409 | }; |
| 2410 | |
| 2411 | // DTriple_with_dsub_0_in_DPR_8 Bit set. |
| 2412 | const uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = { |
| 2413 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 2414 | }; |
| 2415 | |
| 2416 | // DTriple_with_qsub_0_in_MQPR Register Class... |
| 2417 | const MCPhysReg DTriple_with_qsub_0_in_MQPR[] = { |
| 2418 | ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, |
| 2419 | }; |
| 2420 | |
| 2421 | // DTriple_with_qsub_0_in_MQPR Bit set. |
| 2422 | const uint8_t DTriple_with_qsub_0_in_MQPRBits[] = { |
| 2423 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 2424 | }; |
| 2425 | |
| 2426 | // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| 2427 | const MCPhysReg DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| 2428 | ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, |
| 2429 | }; |
| 2430 | |
| 2431 | // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| 2432 | const uint8_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 2433 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| 2434 | }; |
| 2435 | |
| 2436 | // DTriple_with_dsub_1_in_DPR_8 Register Class... |
| 2437 | const MCPhysReg DTriple_with_dsub_1_in_DPR_8[] = { |
| 2438 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, |
| 2439 | }; |
| 2440 | |
| 2441 | // DTriple_with_dsub_1_in_DPR_8 Bit set. |
| 2442 | const uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = { |
| 2443 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, |
| 2444 | }; |
| 2445 | |
| 2446 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| 2447 | const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| 2448 | ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, |
| 2449 | }; |
| 2450 | |
| 2451 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| 2452 | const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 2453 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, |
| 2454 | }; |
| 2455 | |
| 2456 | // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Register Class... |
| 2457 | const MCPhysReg DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR[] = { |
| 2458 | ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, |
| 2459 | }; |
| 2460 | |
| 2461 | // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Bit set. |
| 2462 | const uint8_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits[] = { |
| 2463 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| 2464 | }; |
| 2465 | |
| 2466 | // DTripleSpc_with_dsub_2_in_DPR_8 Register Class... |
| 2467 | const MCPhysReg DTripleSpc_with_dsub_2_in_DPR_8[] = { |
| 2468 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, |
| 2469 | }; |
| 2470 | |
| 2471 | // DTripleSpc_with_dsub_2_in_DPR_8 Bit set. |
| 2472 | const uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 2473 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, |
| 2474 | }; |
| 2475 | |
| 2476 | // DTriple_with_dsub_2_in_DPR_8 Register Class... |
| 2477 | const MCPhysReg DTriple_with_dsub_2_in_DPR_8[] = { |
| 2478 | ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, |
| 2479 | }; |
| 2480 | |
| 2481 | // DTriple_with_dsub_2_in_DPR_8 Bit set. |
| 2482 | const uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = { |
| 2483 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, |
| 2484 | }; |
| 2485 | |
| 2486 | // DTripleSpc_with_dsub_4_in_DPR_8 Register Class... |
| 2487 | const MCPhysReg DTripleSpc_with_dsub_4_in_DPR_8[] = { |
| 2488 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, |
| 2489 | }; |
| 2490 | |
| 2491 | // DTripleSpc_with_dsub_4_in_DPR_8 Bit set. |
| 2492 | const uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = { |
| 2493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, |
| 2494 | }; |
| 2495 | |
| 2496 | // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| 2497 | const MCPhysReg DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| 2498 | ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, |
| 2499 | }; |
| 2500 | |
| 2501 | // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| 2502 | const uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 2503 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 2504 | }; |
| 2505 | |
| 2506 | // DTriple_with_qsub_0_in_QPR_8 Register Class... |
| 2507 | const MCPhysReg DTriple_with_qsub_0_in_QPR_8[] = { |
| 2508 | ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, |
| 2509 | }; |
| 2510 | |
| 2511 | // DTriple_with_qsub_0_in_QPR_8 Bit set. |
| 2512 | const uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = { |
| 2513 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 2514 | }; |
| 2515 | |
| 2516 | // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 Register Class... |
| 2517 | const MCPhysReg DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8[] = { |
| 2518 | ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, |
| 2519 | }; |
| 2520 | |
| 2521 | // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 Bit set. |
| 2522 | const uint8_t DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits[] = { |
| 2523 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, |
| 2524 | }; |
| 2525 | |
| 2526 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class... |
| 2527 | const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = { |
| 2528 | ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, |
| 2529 | }; |
| 2530 | |
| 2531 | // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set. |
| 2532 | const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = { |
| 2533 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, |
| 2534 | }; |
| 2535 | |
| 2536 | // DQuadSpc Register Class... |
| 2537 | const MCPhysReg DQuadSpc[] = { |
| 2538 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, |
| 2539 | }; |
| 2540 | |
| 2541 | // DQuadSpc Bit set. |
| 2542 | const uint8_t DQuadSpcBits[] = { |
| 2543 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01, |
| 2544 | }; |
| 2545 | |
| 2546 | // DQuadSpc_with_ssub_0 Register Class... |
| 2547 | const MCPhysReg DQuadSpc_with_ssub_0[] = { |
| 2548 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, |
| 2549 | }; |
| 2550 | |
| 2551 | // DQuadSpc_with_ssub_0 Bit set. |
| 2552 | const uint8_t DQuadSpc_with_ssub_0Bits[] = { |
| 2553 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, |
| 2554 | }; |
| 2555 | |
| 2556 | // DQuadSpc_with_ssub_4 Register Class... |
| 2557 | const MCPhysReg DQuadSpc_with_ssub_4[] = { |
| 2558 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, |
| 2559 | }; |
| 2560 | |
| 2561 | // DQuadSpc_with_ssub_4 Bit set. |
| 2562 | const uint8_t DQuadSpc_with_ssub_4Bits[] = { |
| 2563 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, |
| 2564 | }; |
| 2565 | |
| 2566 | // DQuadSpc_with_ssub_8 Register Class... |
| 2567 | const MCPhysReg DQuadSpc_with_ssub_8[] = { |
| 2568 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, |
| 2569 | }; |
| 2570 | |
| 2571 | // DQuadSpc_with_ssub_8 Bit set. |
| 2572 | const uint8_t DQuadSpc_with_ssub_8Bits[] = { |
| 2573 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01, |
| 2574 | }; |
| 2575 | |
| 2576 | // DQuadSpc_with_dsub_0_in_DPR_8 Register Class... |
| 2577 | const MCPhysReg DQuadSpc_with_dsub_0_in_DPR_8[] = { |
| 2578 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, |
| 2579 | }; |
| 2580 | |
| 2581 | // DQuadSpc_with_dsub_0_in_DPR_8 Bit set. |
| 2582 | const uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 2583 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, |
| 2584 | }; |
| 2585 | |
| 2586 | // DQuadSpc_with_dsub_2_in_DPR_8 Register Class... |
| 2587 | const MCPhysReg DQuadSpc_with_dsub_2_in_DPR_8[] = { |
| 2588 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, |
| 2589 | }; |
| 2590 | |
| 2591 | // DQuadSpc_with_dsub_2_in_DPR_8 Bit set. |
| 2592 | const uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 2593 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, |
| 2594 | }; |
| 2595 | |
| 2596 | // DQuadSpc_with_dsub_4_in_DPR_8 Register Class... |
| 2597 | const MCPhysReg DQuadSpc_with_dsub_4_in_DPR_8[] = { |
| 2598 | ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, |
| 2599 | }; |
| 2600 | |
| 2601 | // DQuadSpc_with_dsub_4_in_DPR_8 Bit set. |
| 2602 | const uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = { |
| 2603 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, |
| 2604 | }; |
| 2605 | |
| 2606 | // DQuad Register Class... |
| 2607 | const MCPhysReg DQuad[] = { |
| 2608 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, ARM::Q8_Q9, ARM::D17_D18_D19_D20, ARM::Q9_Q10, ARM::D19_D20_D21_D22, ARM::Q10_Q11, ARM::D21_D22_D23_D24, ARM::Q11_Q12, ARM::D23_D24_D25_D26, ARM::Q12_Q13, ARM::D25_D26_D27_D28, ARM::Q13_Q14, ARM::D27_D28_D29_D30, ARM::Q14_Q15, |
| 2609 | }; |
| 2610 | |
| 2611 | // DQuad Bit set. |
| 2612 | const uint8_t DQuadBits[] = { |
| 2613 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, |
| 2614 | }; |
| 2615 | |
| 2616 | // DQuad_with_ssub_0 Register Class... |
| 2617 | const MCPhysReg DQuad_with_ssub_0[] = { |
| 2618 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, |
| 2619 | }; |
| 2620 | |
| 2621 | // DQuad_with_ssub_0 Bit set. |
| 2622 | const uint8_t DQuad_with_ssub_0Bits[] = { |
| 2623 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, |
| 2624 | }; |
| 2625 | |
| 2626 | // DQuad_with_ssub_2 Register Class... |
| 2627 | const MCPhysReg DQuad_with_ssub_2[] = { |
| 2628 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, |
| 2629 | }; |
| 2630 | |
| 2631 | // DQuad_with_ssub_2 Bit set. |
| 2632 | const uint8_t DQuad_with_ssub_2Bits[] = { |
| 2633 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| 2634 | }; |
| 2635 | |
| 2636 | // QQPR Register Class... |
| 2637 | const MCPhysReg QQPR[] = { |
| 2638 | ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, |
| 2639 | }; |
| 2640 | |
| 2641 | // QQPR Bit set. |
| 2642 | const uint8_t QQPRBits[] = { |
| 2643 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, |
| 2644 | }; |
| 2645 | |
| 2646 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| 2647 | const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| 2648 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, ARM::D17_D18_D19_D20, ARM::D19_D20_D21_D22, ARM::D21_D22_D23_D24, ARM::D23_D24_D25_D26, ARM::D25_D26_D27_D28, ARM::D27_D28_D29_D30, |
| 2649 | }; |
| 2650 | |
| 2651 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| 2652 | const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 2653 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, |
| 2654 | }; |
| 2655 | |
| 2656 | // DQuad_with_ssub_4 Register Class... |
| 2657 | const MCPhysReg DQuad_with_ssub_4[] = { |
| 2658 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, |
| 2659 | }; |
| 2660 | |
| 2661 | // DQuad_with_ssub_4 Bit set. |
| 2662 | const uint8_t DQuad_with_ssub_4Bits[] = { |
| 2663 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| 2664 | }; |
| 2665 | |
| 2666 | // DQuad_with_ssub_6 Register Class... |
| 2667 | const MCPhysReg DQuad_with_ssub_6[] = { |
| 2668 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, |
| 2669 | }; |
| 2670 | |
| 2671 | // DQuad_with_ssub_6 Bit set. |
| 2672 | const uint8_t DQuad_with_ssub_6Bits[] = { |
| 2673 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, |
| 2674 | }; |
| 2675 | |
| 2676 | // DQuad_with_dsub_0_in_DPR_8 Register Class... |
| 2677 | const MCPhysReg DQuad_with_dsub_0_in_DPR_8[] = { |
| 2678 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, |
| 2679 | }; |
| 2680 | |
| 2681 | // DQuad_with_dsub_0_in_DPR_8 Bit set. |
| 2682 | const uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = { |
| 2683 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, |
| 2684 | }; |
| 2685 | |
| 2686 | // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| 2687 | const MCPhysReg DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| 2688 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, |
| 2689 | }; |
| 2690 | |
| 2691 | // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| 2692 | const uint8_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 2693 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, |
| 2694 | }; |
| 2695 | |
| 2696 | // QQPR_with_ssub_0 Register Class... |
| 2697 | const MCPhysReg QQPR_with_ssub_0[] = { |
| 2698 | ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, |
| 2699 | }; |
| 2700 | |
| 2701 | // QQPR_with_ssub_0 Bit set. |
| 2702 | const uint8_t QQPR_with_ssub_0Bits[] = { |
| 2703 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, |
| 2704 | }; |
| 2705 | |
| 2706 | // DQuad_with_dsub_1_in_DPR_8 Register Class... |
| 2707 | const MCPhysReg DQuad_with_dsub_1_in_DPR_8[] = { |
| 2708 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, |
| 2709 | }; |
| 2710 | |
| 2711 | // DQuad_with_dsub_1_in_DPR_8 Bit set. |
| 2712 | const uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = { |
| 2713 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| 2714 | }; |
| 2715 | |
| 2716 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| 2717 | const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| 2718 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, |
| 2719 | }; |
| 2720 | |
| 2721 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| 2722 | const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 2723 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| 2724 | }; |
| 2725 | |
| 2726 | // MQQPR Register Class... |
| 2727 | const MCPhysReg MQQPR[] = { |
| 2728 | ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, |
| 2729 | }; |
| 2730 | |
| 2731 | // MQQPR Bit set. |
| 2732 | const uint8_t MQQPRBits[] = { |
| 2733 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, |
| 2734 | }; |
| 2735 | |
| 2736 | // DQuad_with_dsub_2_in_DPR_8 Register Class... |
| 2737 | const MCPhysReg DQuad_with_dsub_2_in_DPR_8[] = { |
| 2738 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, |
| 2739 | }; |
| 2740 | |
| 2741 | // DQuad_with_dsub_2_in_DPR_8 Bit set. |
| 2742 | const uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = { |
| 2743 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| 2744 | }; |
| 2745 | |
| 2746 | // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| 2747 | const MCPhysReg DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| 2748 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, |
| 2749 | }; |
| 2750 | |
| 2751 | // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| 2752 | const uint8_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 2753 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, |
| 2754 | }; |
| 2755 | |
| 2756 | // DQuad_with_dsub_3_in_DPR_8 Register Class... |
| 2757 | const MCPhysReg DQuad_with_dsub_3_in_DPR_8[] = { |
| 2758 | ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, |
| 2759 | }; |
| 2760 | |
| 2761 | // DQuad_with_dsub_3_in_DPR_8 Bit set. |
| 2762 | const uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = { |
| 2763 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, |
| 2764 | }; |
| 2765 | |
| 2766 | // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| 2767 | const MCPhysReg DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| 2768 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, |
| 2769 | }; |
| 2770 | |
| 2771 | // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| 2772 | const uint8_t DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 2773 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, |
| 2774 | }; |
| 2775 | |
| 2776 | // MQQPR_with_qsub_0_in_QPR_8 Register Class... |
| 2777 | const MCPhysReg MQQPR_with_qsub_0_in_QPR_8[] = { |
| 2778 | ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, |
| 2779 | }; |
| 2780 | |
| 2781 | // MQQPR_with_qsub_0_in_QPR_8 Bit set. |
| 2782 | const uint8_t MQQPR_with_qsub_0_in_QPR_8Bits[] = { |
| 2783 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, |
| 2784 | }; |
| 2785 | |
| 2786 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class... |
| 2787 | const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = { |
| 2788 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, |
| 2789 | }; |
| 2790 | |
| 2791 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set. |
| 2792 | const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = { |
| 2793 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| 2794 | }; |
| 2795 | |
| 2796 | // MQQPR_with_dsub_2_in_DPR_8 Register Class... |
| 2797 | const MCPhysReg MQQPR_with_dsub_2_in_DPR_8[] = { |
| 2798 | ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, |
| 2799 | }; |
| 2800 | |
| 2801 | // MQQPR_with_dsub_2_in_DPR_8 Bit set. |
| 2802 | const uint8_t MQQPR_with_dsub_2_in_DPR_8Bits[] = { |
| 2803 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| 2804 | }; |
| 2805 | |
| 2806 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 Register Class... |
| 2807 | const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8[] = { |
| 2808 | ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, |
| 2809 | }; |
| 2810 | |
| 2811 | // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 Bit set. |
| 2812 | const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits[] = { |
| 2813 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, |
| 2814 | }; |
| 2815 | |
| 2816 | // QQQQPR Register Class... |
| 2817 | const MCPhysReg QQQQPR[] = { |
| 2818 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, |
| 2819 | }; |
| 2820 | |
| 2821 | // QQQQPR Bit set. |
| 2822 | const uint8_t QQQQPRBits[] = { |
| 2823 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, |
| 2824 | }; |
| 2825 | |
| 2826 | // QQQQPR_with_ssub_0 Register Class... |
| 2827 | const MCPhysReg QQQQPR_with_ssub_0[] = { |
| 2828 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, |
| 2829 | }; |
| 2830 | |
| 2831 | // QQQQPR_with_ssub_0 Bit set. |
| 2832 | const uint8_t QQQQPR_with_ssub_0Bits[] = { |
| 2833 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 2834 | }; |
| 2835 | |
| 2836 | // QQQQPR_with_ssub_4 Register Class... |
| 2837 | const MCPhysReg QQQQPR_with_ssub_4[] = { |
| 2838 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, |
| 2839 | }; |
| 2840 | |
| 2841 | // QQQQPR_with_ssub_4 Bit set. |
| 2842 | const uint8_t QQQQPR_with_ssub_4Bits[] = { |
| 2843 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 2844 | }; |
| 2845 | |
| 2846 | // QQQQPR_with_ssub_8 Register Class... |
| 2847 | const MCPhysReg QQQQPR_with_ssub_8[] = { |
| 2848 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, |
| 2849 | }; |
| 2850 | |
| 2851 | // QQQQPR_with_ssub_8 Bit set. |
| 2852 | const uint8_t QQQQPR_with_ssub_8Bits[] = { |
| 2853 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, |
| 2854 | }; |
| 2855 | |
| 2856 | // MQQQQPR Register Class... |
| 2857 | const MCPhysReg MQQQQPR[] = { |
| 2858 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, |
| 2859 | }; |
| 2860 | |
| 2861 | // MQQQQPR Bit set. |
| 2862 | const uint8_t MQQQQPRBits[] = { |
| 2863 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, |
| 2864 | }; |
| 2865 | |
| 2866 | // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 Register Class... |
| 2867 | const MCPhysReg MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8[] = { |
| 2868 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, |
| 2869 | }; |
| 2870 | |
| 2871 | // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 Bit set. |
| 2872 | const uint8_t MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8Bits[] = { |
| 2873 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 2874 | }; |
| 2875 | |
| 2876 | // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 Register Class... |
| 2877 | const MCPhysReg MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8[] = { |
| 2878 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, |
| 2879 | }; |
| 2880 | |
| 2881 | // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 Bit set. |
| 2882 | const uint8_t MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8Bits[] = { |
| 2883 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, |
| 2884 | }; |
| 2885 | |
| 2886 | // MQQQQPR_with_qsub_2_in_QPR_8 Register Class... |
| 2887 | const MCPhysReg MQQQQPR_with_qsub_2_in_QPR_8[] = { |
| 2888 | ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, |
| 2889 | }; |
| 2890 | |
| 2891 | // MQQQQPR_with_qsub_2_in_QPR_8 Bit set. |
| 2892 | const uint8_t MQQQQPR_with_qsub_2_in_QPR_8Bits[] = { |
| 2893 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, |
| 2894 | }; |
| 2895 | |
| 2896 | // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 Register Class... |
| 2897 | const MCPhysReg MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8[] = { |
| 2898 | ARM::Q0_Q1_Q2_Q3, |
| 2899 | }; |
| 2900 | |
| 2901 | // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 Bit set. |
| 2902 | const uint8_t MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8Bits[] = { |
| 2903 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 2904 | }; |
| 2905 | |
| 2906 | } // end anonymous namespace |
| 2907 | |
| 2908 | |
| 2909 | #ifdef __GNUC__ |
| 2910 | #pragma GCC diagnostic push |
| 2911 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 2912 | #endif |
| 2913 | extern const char ARMRegClassStrings[] = { |
| 2914 | /* 0 */ "QQQQPR_with_ssub_0\000" |
| 2915 | /* 19 */ "FPWithVPR_with_ssub_0\000" |
| 2916 | /* 41 */ "DQuadSpc_with_ssub_0\000" |
| 2917 | /* 62 */ "DTripleSpc_with_ssub_0\000" |
| 2918 | /* 85 */ "DPairSpc_with_ssub_0\000" |
| 2919 | /* 106 */ "DQuad_with_ssub_0\000" |
| 2920 | /* 124 */ "DTriple_with_ssub_0\000" |
| 2921 | /* 144 */ "DPair_with_ssub_0\000" |
| 2922 | /* 162 */ "tGPREven_and_tcGPRnotr12\000" |
| 2923 | /* 187 */ "GPRPair_with_gsub_0_in_tcGPRnotr12\000" |
| 2924 | /* 222 */ "DPR_VFP2\000" |
| 2925 | /* 231 */ "QPR_VFP2\000" |
| 2926 | /* 240 */ "DQuad_with_ssub_2\000" |
| 2927 | /* 258 */ "DTriple_with_ssub_2\000" |
| 2928 | /* 278 */ "DPair_with_ssub_2\000" |
| 2929 | /* 296 */ "QQQQPR_with_ssub_4\000" |
| 2930 | /* 315 */ "DQuadSpc_with_ssub_4\000" |
| 2931 | /* 336 */ "DTripleSpc_with_ssub_4\000" |
| 2932 | /* 359 */ "DPairSpc_with_ssub_4\000" |
| 2933 | /* 380 */ "DQuad_with_ssub_4\000" |
| 2934 | /* 398 */ "DTriple_with_ssub_4\000" |
| 2935 | /* 418 */ "DQuad_with_ssub_6\000" |
| 2936 | /* 436 */ "DQuadSpc_with_dsub_0_in_DPR_8\000" |
| 2937 | /* 466 */ "DTripleSpc_with_dsub_0_in_DPR_8\000" |
| 2938 | /* 498 */ "DPairSpc_with_dsub_0_in_DPR_8\000" |
| 2939 | /* 528 */ "DQuad_with_dsub_0_in_DPR_8\000" |
| 2940 | /* 555 */ "DTriple_with_dsub_0_in_DPR_8\000" |
| 2941 | /* 584 */ "DPair_with_dsub_0_in_DPR_8\000" |
| 2942 | /* 611 */ "DQuad_with_dsub_1_in_DPR_8\000" |
| 2943 | /* 638 */ "DTriple_with_dsub_1_in_DPR_8\000" |
| 2944 | /* 667 */ "DPair_with_dsub_1_in_DPR_8\000" |
| 2945 | /* 694 */ "MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8\000" |
| 2946 | /* 745 */ "MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8\000" |
| 2947 | /* 796 */ "DQuadSpc_with_dsub_2_in_DPR_8\000" |
| 2948 | /* 826 */ "DTripleSpc_with_dsub_2_in_DPR_8\000" |
| 2949 | /* 858 */ "DPairSpc_with_dsub_2_in_DPR_8\000" |
| 2950 | /* 888 */ "DQuad_with_dsub_2_in_DPR_8\000" |
| 2951 | /* 915 */ "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8\000" |
| 2952 | /* 1032 */ "DQuad_with_dsub_3_in_DPR_8\000" |
| 2953 | /* 1059 */ "DQuadSpc_with_dsub_4_in_DPR_8\000" |
| 2954 | /* 1089 */ "DTripleSpc_with_dsub_4_in_DPR_8\000" |
| 2955 | /* 1121 */ "MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8\000" |
| 2956 | /* 1172 */ "DTriple_with_qsub_0_in_QPR_8\000" |
| 2957 | /* 1201 */ "MQQQQPR_with_qsub_2_in_QPR_8\000" |
| 2958 | /* 1230 */ "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8\000" |
| 2959 | /* 1278 */ "DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8\000" |
| 2960 | /* 1328 */ "FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8\000" |
| 2961 | /* 1371 */ "QQQQPR_with_ssub_8\000" |
| 2962 | /* 1390 */ "DQuadSpc_with_ssub_8\000" |
| 2963 | /* 1411 */ "DTripleSpc_with_ssub_8\000" |
| 2964 | /* 1434 */ "VCCR\000" |
| 2965 | /* 1439 */ "DPR\000" |
| 2966 | /* 1443 */ "hGPR_and_tcGPR\000" |
| 2967 | /* 1458 */ "tGPROdd_and_tcGPR\000" |
| 2968 | /* 1476 */ "tGPREven_and_tcGPR\000" |
| 2969 | /* 1495 */ "GPRPair_with_gsub_0_in_tcGPR\000" |
| 2970 | /* 1524 */ "GPRnosp_and_GPRnopc_and_hGPR\000" |
| 2971 | /* 1553 */ "GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR\000" |
| 2972 | /* 1594 */ "GPRnosp_and_GPRnoip_and_hGPR\000" |
| 2973 | /* 1623 */ "GPRnosp_and_hGPR\000" |
| 2974 | /* 1640 */ "GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR\000" |
| 2975 | /* 1684 */ "rGPR\000" |
| 2976 | /* 1689 */ "GPRPair_with_gsub_0_in_tGPR\000" |
| 2977 | /* 1717 */ "HPR\000" |
| 2978 | /* 1721 */ "DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR\000" |
| 2979 | /* 1773 */ "DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\000" |
| 2980 | /* 1842 */ "DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\000" |
| 2981 | /* 1980 */ "MQQPR\000" |
| 2982 | /* 1986 */ "MQQQQPR\000" |
| 2983 | /* 1994 */ "DTriple_with_qsub_0_in_QPR\000" |
| 2984 | /* 2021 */ "DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR\000" |
| 2985 | /* 2089 */ "DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR\000" |
| 2986 | /* 2161 */ "SPR\000" |
| 2987 | /* 2165 */ "FPWithVPR\000" |
| 2988 | /* 2175 */ "GPRwithAPSR\000" |
| 2989 | /* 2187 */ "GPRwithZR\000" |
| 2990 | /* 2197 */ "FP_STATUS_REGS\000" |
| 2991 | /* 2212 */ "cl_FPSCR_NZCV\000" |
| 2992 | /* 2226 */ "DQuadSpc\000" |
| 2993 | /* 2235 */ "DTripleSpc\000" |
| 2994 | /* 2246 */ "DPairSpc\000" |
| 2995 | /* 2255 */ "hGPR_and_tGPRwithpc\000" |
| 2996 | /* 2275 */ "GPRnoip_and_GPRnopc\000" |
| 2997 | /* 2295 */ "DQuad\000" |
| 2998 | /* 2301 */ "hGPR_and_tGPROdd\000" |
| 2999 | /* 2318 */ "tGPR_and_tGPROdd\000" |
| 3000 | /* 2335 */ "DTriple\000" |
| 3001 | /* 2343 */ "hGPR_and_tGPREven\000" |
| 3002 | /* 2361 */ "tGPR_and_tGPREven\000" |
| 3003 | /* 2379 */ "hGPR_and_GPRnoip_and_tGPREven\000" |
| 3004 | /* 2409 */ "GPRnoip\000" |
| 3005 | /* 2417 */ "GPRPair_with_gsub_1_in_GPRsp\000" |
| 3006 | /* 2446 */ "GPRnoip_and_GPRnosp\000" |
| 3007 | /* 2466 */ "GPRwithAPSRnosp\000" |
| 3008 | /* 2482 */ "GPRwithZRnosp\000" |
| 3009 | /* 2496 */ "GPRnoip_and_GPRwithAPSR_NZCVnosp\000" |
| 3010 | /* 2529 */ "GPRPairnosp\000" |
| 3011 | /* 2541 */ "DPair\000" |
| 3012 | /* 2547 */ "GPRPair\000" |
| 3013 | /* 2555 */ "GPRlr\000" |
| 3014 | /* 2561 */ "FPCXTRegs\000" |
| 3015 | }; |
| 3016 | #ifdef __GNUC__ |
| 3017 | #pragma GCC diagnostic pop |
| 3018 | #endif |
| 3019 | |
| 3020 | extern const MCRegisterClass ARMMCRegisterClasses[] = { |
| 3021 | { HPR, HPRBits, 1717, 32, sizeof(HPRBits), ARM::HPRRegClassID, 16, 1, true, false }, |
| 3022 | { FPWithVPR, FPWithVPRBits, 2165, 65, sizeof(FPWithVPRBits), ARM::FPWithVPRRegClassID, 32, 1, false, false }, |
| 3023 | { SPR, SPRBits, 2161, 32, sizeof(SPRBits), ARM::SPRRegClassID, 32, 1, true, false }, |
| 3024 | { FPWithVPR_with_ssub_0, FPWithVPR_with_ssub_0Bits, 19, 16, sizeof(FPWithVPR_with_ssub_0Bits), ARM::FPWithVPR_with_ssub_0RegClassID, 32, 1, false, false }, |
| 3025 | { GPR, GPRBits, 1454, 16, sizeof(GPRBits), ARM::GPRRegClassID, 32, 1, true, false }, |
| 3026 | { GPRwithAPSR, GPRwithAPSRBits, 2175, 16, sizeof(GPRwithAPSRBits), ARM::GPRwithAPSRRegClassID, 32, 1, true, false }, |
| 3027 | { GPRwithZR, GPRwithZRBits, 2187, 16, sizeof(GPRwithZRBits), ARM::GPRwithZRRegClassID, 32, 1, true, false }, |
| 3028 | { SPR_8, SPR_8Bits, 1365, 16, sizeof(SPR_8Bits), ARM::SPR_8RegClassID, 32, 1, true, false }, |
| 3029 | { GPRnopc, GPRnopcBits, 2287, 15, sizeof(GPRnopcBits), ARM::GPRnopcRegClassID, 32, 1, true, false }, |
| 3030 | { GPRnosp, GPRnospBits, 2458, 15, sizeof(GPRnospBits), ARM::GPRnospRegClassID, 32, 1, true, false }, |
| 3031 | { GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnospBits, 2508, 15, sizeof(GPRwithAPSR_NZCVnospBits), ARM::GPRwithAPSR_NZCVnospRegClassID, 32, 1, false, false }, |
| 3032 | { GPRwithAPSRnosp, GPRwithAPSRnospBits, 2466, 15, sizeof(GPRwithAPSRnospBits), ARM::GPRwithAPSRnospRegClassID, 32, 1, false, false }, |
| 3033 | { GPRwithZRnosp, GPRwithZRnospBits, 2482, 15, sizeof(GPRwithZRnospBits), ARM::GPRwithZRnospRegClassID, 32, 1, true, false }, |
| 3034 | { GPRnoip, GPRnoipBits, 2409, 14, sizeof(GPRnoipBits), ARM::GPRnoipRegClassID, 32, 1, true, false }, |
| 3035 | { rGPR, rGPRBits, 1684, 14, sizeof(rGPRBits), ARM::rGPRRegClassID, 32, 1, true, false }, |
| 3036 | { GPRnoip_and_GPRnopc, GPRnoip_and_GPRnopcBits, 2275, 13, sizeof(GPRnoip_and_GPRnopcBits), ARM::GPRnoip_and_GPRnopcRegClassID, 32, 1, true, false }, |
| 3037 | { GPRnoip_and_GPRnosp, GPRnoip_and_GPRnospBits, 2446, 13, sizeof(GPRnoip_and_GPRnospBits), ARM::GPRnoip_and_GPRnospRegClassID, 32, 1, true, false }, |
| 3038 | { GPRnoip_and_GPRwithAPSR_NZCVnosp, GPRnoip_and_GPRwithAPSR_NZCVnospBits, 2496, 12, sizeof(GPRnoip_and_GPRwithAPSR_NZCVnospBits), ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, 32, 1, true, false }, |
| 3039 | { tGPRwithpc, tGPRwithpcBits, 2264, 9, sizeof(tGPRwithpcBits), ARM::tGPRwithpcRegClassID, 32, 1, true, false }, |
| 3040 | { FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8, FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits, 1328, 8, sizeof(FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits), ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID, 32, 1, false, false }, |
| 3041 | { hGPR, hGPRBits, 1548, 8, sizeof(hGPRBits), ARM::hGPRRegClassID, 32, 1, true, false }, |
| 3042 | { tGPR, tGPRBits, 1712, 8, sizeof(tGPRBits), ARM::tGPRRegClassID, 32, 1, true, false }, |
| 3043 | { tGPREven, tGPREvenBits, 2352, 8, sizeof(tGPREvenBits), ARM::tGPREvenRegClassID, 32, 1, true, false }, |
| 3044 | { GPRnopc_and_hGPR, GPRnopc_and_hGPRBits, 1536, 7, sizeof(GPRnopc_and_hGPRBits), ARM::GPRnopc_and_hGPRRegClassID, 32, 1, true, false }, |
| 3045 | { GPRnosp_and_hGPR, GPRnosp_and_hGPRBits, 1623, 7, sizeof(GPRnosp_and_hGPRBits), ARM::GPRnosp_and_hGPRRegClassID, 32, 1, true, false }, |
| 3046 | { GPRnoip_and_hGPR, GPRnoip_and_hGPRBits, 1577, 6, sizeof(GPRnoip_and_hGPRBits), ARM::GPRnoip_and_hGPRRegClassID, 32, 1, true, false }, |
| 3047 | { GPRnoip_and_tGPREven, GPRnoip_and_tGPREvenBits, 2388, 6, sizeof(GPRnoip_and_tGPREvenBits), ARM::GPRnoip_and_tGPREvenRegClassID, 32, 1, true, false }, |
| 3048 | { GPRnosp_and_GPRnopc_and_hGPR, GPRnosp_and_GPRnopc_and_hGPRBits, 1524, 6, sizeof(GPRnosp_and_GPRnopc_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, 32, 1, true, false }, |
| 3049 | { tGPROdd, tGPROddBits, 2310, 6, sizeof(tGPROddBits), ARM::tGPROddRegClassID, 32, 1, true, false }, |
| 3050 | { GPRnopc_and_GPRnoip_and_hGPR, GPRnopc_and_GPRnoip_and_hGPRBits, 1565, 5, sizeof(GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false }, |
| 3051 | { GPRnosp_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnoip_and_hGPRBits, 1594, 5, sizeof(GPRnosp_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false }, |
| 3052 | { tcGPR, tcGPRBits, 1452, 5, sizeof(tcGPRBits), ARM::tcGPRRegClassID, 32, 1, true, false }, |
| 3053 | { GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits, 1553, 4, sizeof(GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false }, |
| 3054 | { hGPR_and_tGPREven, hGPR_and_tGPREvenBits, 2343, 4, sizeof(hGPR_and_tGPREvenBits), ARM::hGPR_and_tGPREvenRegClassID, 32, 1, true, false }, |
| 3055 | { tGPR_and_tGPREven, tGPR_and_tGPREvenBits, 2361, 4, sizeof(tGPR_and_tGPREvenBits), ARM::tGPR_and_tGPREvenRegClassID, 32, 1, true, false }, |
| 3056 | { tGPR_and_tGPROdd, tGPR_and_tGPROddBits, 2318, 4, sizeof(tGPR_and_tGPROddBits), ARM::tGPR_and_tGPROddRegClassID, 32, 1, true, false }, |
| 3057 | { tcGPRnotr12, tcGPRnotr12Bits, 175, 4, sizeof(tcGPRnotr12Bits), ARM::tcGPRnotr12RegClassID, 32, 1, true, false }, |
| 3058 | { tGPREven_and_tcGPR, tGPREven_and_tcGPRBits, 1476, 3, sizeof(tGPREven_and_tcGPRBits), ARM::tGPREven_and_tcGPRRegClassID, 32, 1, true, false }, |
| 3059 | { FP_STATUS_REGS, FP_STATUS_REGSBits, 2197, 2, sizeof(FP_STATUS_REGSBits), ARM::FP_STATUS_REGSRegClassID, 32, -1, false, false }, |
| 3060 | { hGPR_and_GPRnoip_and_tGPREven, hGPR_and_GPRnoip_and_tGPREvenBits, 2379, 2, sizeof(hGPR_and_GPRnoip_and_tGPREvenBits), ARM::hGPR_and_GPRnoip_and_tGPREvenRegClassID, 32, 1, true, false }, |
| 3061 | { hGPR_and_tGPROdd, hGPR_and_tGPROddBits, 2301, 2, sizeof(hGPR_and_tGPROddBits), ARM::hGPR_and_tGPROddRegClassID, 32, 1, true, false }, |
| 3062 | { tGPREven_and_tcGPRnotr12, tGPREven_and_tcGPRnotr12Bits, 162, 2, sizeof(tGPREven_and_tcGPRnotr12Bits), ARM::tGPREven_and_tcGPRnotr12RegClassID, 32, 1, true, false }, |
| 3063 | { tGPROdd_and_tcGPR, tGPROdd_and_tcGPRBits, 1458, 2, sizeof(tGPROdd_and_tcGPRBits), ARM::tGPROdd_and_tcGPRRegClassID, 32, 1, true, false }, |
| 3064 | { CCR, CCRBits, 1435, 1, sizeof(CCRBits), ARM::CCRRegClassID, 32, -1, false, false }, |
| 3065 | { FPCXTRegs, FPCXTRegsBits, 2561, 1, sizeof(FPCXTRegsBits), ARM::FPCXTRegsRegClassID, 32, 1, true, false }, |
| 3066 | { GPRlr, GPRlrBits, 2555, 1, sizeof(GPRlrBits), ARM::GPRlrRegClassID, 32, 1, true, false }, |
| 3067 | { GPRsp, GPRspBits, 2440, 1, sizeof(GPRspBits), ARM::GPRspRegClassID, 32, 1, true, false }, |
| 3068 | { VCCR, VCCRBits, 1434, 1, sizeof(VCCRBits), ARM::VCCRRegClassID, 32, 1, true, false }, |
| 3069 | { cl_FPSCR_NZCV, cl_FPSCR_NZCVBits, 2212, 1, sizeof(cl_FPSCR_NZCVBits), ARM::cl_FPSCR_NZCVRegClassID, 32, -1, true, false }, |
| 3070 | { hGPR_and_tGPRwithpc, hGPR_and_tGPRwithpcBits, 2255, 1, sizeof(hGPR_and_tGPRwithpcBits), ARM::hGPR_and_tGPRwithpcRegClassID, 32, 1, true, false }, |
| 3071 | { hGPR_and_tcGPR, hGPR_and_tcGPRBits, 1443, 1, sizeof(hGPR_and_tcGPRBits), ARM::hGPR_and_tcGPRRegClassID, 32, 1, true, false }, |
| 3072 | { DPR, DPRBits, 1439, 32, sizeof(DPRBits), ARM::DPRRegClassID, 64, 1, true, false }, |
| 3073 | { DPR_VFP2, DPR_VFP2Bits, 222, 16, sizeof(DPR_VFP2Bits), ARM::DPR_VFP2RegClassID, 64, 1, true, false }, |
| 3074 | { DPR_8, DPR_8Bits, 460, 8, sizeof(DPR_8Bits), ARM::DPR_8RegClassID, 64, 1, true, false }, |
| 3075 | { GPRPair, GPRPairBits, 2547, 7, sizeof(GPRPairBits), ARM::GPRPairRegClassID, 64, 1, true, false }, |
| 3076 | { GPRPairnosp, GPRPairnospBits, 2529, 6, sizeof(GPRPairnospBits), ARM::GPRPairnospRegClassID, 64, 1, true, false }, |
| 3077 | { GPRPair_with_gsub_0_in_tGPR, GPRPair_with_gsub_0_in_tGPRBits, 1689, 4, sizeof(GPRPair_with_gsub_0_in_tGPRBits), ARM::GPRPair_with_gsub_0_in_tGPRRegClassID, 64, 1, true, false }, |
| 3078 | { GPRPair_with_gsub_0_in_hGPR, GPRPair_with_gsub_0_in_hGPRBits, 1656, 3, sizeof(GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true, false }, |
| 3079 | { GPRPair_with_gsub_0_in_tcGPR, GPRPair_with_gsub_0_in_tcGPRBits, 1495, 3, sizeof(GPRPair_with_gsub_0_in_tcGPRBits), ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, 64, 1, true, false }, |
| 3080 | { GPRPair_with_gsub_0_in_tcGPRnotr12, GPRPair_with_gsub_0_in_tcGPRnotr12Bits, 187, 2, sizeof(GPRPair_with_gsub_0_in_tcGPRnotr12Bits), ARM::GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID, 64, 1, true, false }, |
| 3081 | { GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR, GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits, 1640, 2, sizeof(GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true, false }, |
| 3082 | { GPRPair_with_gsub_1_in_GPRsp, GPRPair_with_gsub_1_in_GPRspBits, 2417, 1, sizeof(GPRPair_with_gsub_1_in_GPRspBits), ARM::GPRPair_with_gsub_1_in_GPRspRegClassID, 64, 1, true, false }, |
| 3083 | { DPairSpc, DPairSpcBits, 2246, 30, sizeof(DPairSpcBits), ARM::DPairSpcRegClassID, 128, 1, true, false }, |
| 3084 | { DPairSpc_with_ssub_0, DPairSpc_with_ssub_0Bits, 85, 16, sizeof(DPairSpc_with_ssub_0Bits), ARM::DPairSpc_with_ssub_0RegClassID, 128, 1, true, false }, |
| 3085 | { DPairSpc_with_ssub_4, DPairSpc_with_ssub_4Bits, 359, 14, sizeof(DPairSpc_with_ssub_4Bits), ARM::DPairSpc_with_ssub_4RegClassID, 128, 1, true, false }, |
| 3086 | { DPairSpc_with_dsub_0_in_DPR_8, DPairSpc_with_dsub_0_in_DPR_8Bits, 498, 8, sizeof(DPairSpc_with_dsub_0_in_DPR_8Bits), ARM::DPairSpc_with_dsub_0_in_DPR_8RegClassID, 128, 1, true, false }, |
| 3087 | { DPairSpc_with_dsub_2_in_DPR_8, DPairSpc_with_dsub_2_in_DPR_8Bits, 858, 6, sizeof(DPairSpc_with_dsub_2_in_DPR_8Bits), ARM::DPairSpc_with_dsub_2_in_DPR_8RegClassID, 128, 1, true, false }, |
| 3088 | { DPair, DPairBits, 2541, 31, sizeof(DPairBits), ARM::DPairRegClassID, 128, 1, true, false }, |
| 3089 | { DPair_with_ssub_0, DPair_with_ssub_0Bits, 144, 16, sizeof(DPair_with_ssub_0Bits), ARM::DPair_with_ssub_0RegClassID, 128, 1, true, false }, |
| 3090 | { QPR, QPRBits, 1769, 16, sizeof(QPRBits), ARM::QPRRegClassID, 128, 1, true, false }, |
| 3091 | { DPair_with_ssub_2, DPair_with_ssub_2Bits, 278, 15, sizeof(DPair_with_ssub_2Bits), ARM::DPair_with_ssub_2RegClassID, 128, 1, true, false }, |
| 3092 | { DPair_with_dsub_0_in_DPR_8, DPair_with_dsub_0_in_DPR_8Bits, 584, 8, sizeof(DPair_with_dsub_0_in_DPR_8Bits), ARM::DPair_with_dsub_0_in_DPR_8RegClassID, 128, 1, true, false }, |
| 3093 | { MQPR, MQPRBits, 1768, 8, sizeof(MQPRBits), ARM::MQPRRegClassID, 128, 1, true, false }, |
| 3094 | { QPR_VFP2, QPR_VFP2Bits, 231, 8, sizeof(QPR_VFP2Bits), ARM::QPR_VFP2RegClassID, 128, 1, true, false }, |
| 3095 | { DPair_with_dsub_1_in_DPR_8, DPair_with_dsub_1_in_DPR_8Bits, 667, 7, sizeof(DPair_with_dsub_1_in_DPR_8Bits), ARM::DPair_with_dsub_1_in_DPR_8RegClassID, 128, 1, true, false }, |
| 3096 | { QPR_8, QPR_8Bits, 1166, 4, sizeof(QPR_8Bits), ARM::QPR_8RegClassID, 128, 1, true, false }, |
| 3097 | { DTriple, DTripleBits, 2335, 30, sizeof(DTripleBits), ARM::DTripleRegClassID, 192, 1, true, false }, |
| 3098 | { DTripleSpc, DTripleSpcBits, 2235, 28, sizeof(DTripleSpcBits), ARM::DTripleSpcRegClassID, 192, 1, true, false }, |
| 3099 | { DTripleSpc_with_ssub_0, DTripleSpc_with_ssub_0Bits, 62, 16, sizeof(DTripleSpc_with_ssub_0Bits), ARM::DTripleSpc_with_ssub_0RegClassID, 192, 1, true, false }, |
| 3100 | { DTriple_with_ssub_0, DTriple_with_ssub_0Bits, 124, 16, sizeof(DTriple_with_ssub_0Bits), ARM::DTriple_with_ssub_0RegClassID, 192, 1, true, false }, |
| 3101 | { DTriple_with_qsub_0_in_QPR, DTriple_with_qsub_0_in_QPRBits, 1994, 15, sizeof(DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_qsub_0_in_QPRRegClassID, 192, 1, true, false }, |
| 3102 | { DTriple_with_ssub_2, DTriple_with_ssub_2Bits, 258, 15, sizeof(DTriple_with_ssub_2Bits), ARM::DTriple_with_ssub_2RegClassID, 192, 1, true, false }, |
| 3103 | { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2113, 15, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true, false }, |
| 3104 | { DTripleSpc_with_ssub_4, DTripleSpc_with_ssub_4Bits, 336, 14, sizeof(DTripleSpc_with_ssub_4Bits), ARM::DTripleSpc_with_ssub_4RegClassID, 192, 1, true, false }, |
| 3105 | { DTriple_with_ssub_4, DTriple_with_ssub_4Bits, 398, 14, sizeof(DTriple_with_ssub_4Bits), ARM::DTriple_with_ssub_4RegClassID, 192, 1, true, false }, |
| 3106 | { DTripleSpc_with_ssub_8, DTripleSpc_with_ssub_8Bits, 1411, 12, sizeof(DTripleSpc_with_ssub_8Bits), ARM::DTripleSpc_with_ssub_8RegClassID, 192, 1, true, false }, |
| 3107 | { DTripleSpc_with_dsub_0_in_DPR_8, DTripleSpc_with_dsub_0_in_DPR_8Bits, 466, 8, sizeof(DTripleSpc_with_dsub_0_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3108 | { DTriple_with_dsub_0_in_DPR_8, DTriple_with_dsub_0_in_DPR_8Bits, 555, 8, sizeof(DTriple_with_dsub_0_in_DPR_8Bits), ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3109 | { DTriple_with_qsub_0_in_MQPR, DTriple_with_qsub_0_in_MQPRBits, 1745, 8, sizeof(DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true, false }, |
| 3110 | { DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2089, 8, sizeof(DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true, false }, |
| 3111 | { DTriple_with_dsub_1_in_DPR_8, DTriple_with_dsub_1_in_DPR_8Bits, 638, 7, sizeof(DTriple_with_dsub_1_in_DPR_8Bits), ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3112 | { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1931, 7, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true, false }, |
| 3113 | { DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR, DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits, 1721, 7, sizeof(DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true, false }, |
| 3114 | { DTripleSpc_with_dsub_2_in_DPR_8, DTripleSpc_with_dsub_2_in_DPR_8Bits, 826, 6, sizeof(DTripleSpc_with_dsub_2_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3115 | { DTriple_with_dsub_2_in_DPR_8, DTriple_with_dsub_2_in_DPR_8Bits, 1003, 6, sizeof(DTriple_with_dsub_2_in_DPR_8Bits), ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3116 | { DTripleSpc_with_dsub_4_in_DPR_8, DTripleSpc_with_dsub_4_in_DPR_8Bits, 1089, 4, sizeof(DTripleSpc_with_dsub_4_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3117 | { DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1898, 4, sizeof(DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true, false }, |
| 3118 | { DTriple_with_qsub_0_in_QPR_8, DTriple_with_qsub_0_in_QPR_8Bits, 1172, 4, sizeof(DTriple_with_qsub_0_in_QPR_8Bits), ARM::DTriple_with_qsub_0_in_QPR_8RegClassID, 192, 1, true, false }, |
| 3119 | { DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8, DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits, 971, 3, sizeof(DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits), ARM::DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID, 192, 1, true, false }, |
| 3120 | { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1278, 3, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 192, 1, true, false }, |
| 3121 | { DQuadSpc, DQuadSpcBits, 2226, 28, sizeof(DQuadSpcBits), ARM::DQuadSpcRegClassID, 256, 1, true, false }, |
| 3122 | { DQuadSpc_with_ssub_0, DQuadSpc_with_ssub_0Bits, 41, 16, sizeof(DQuadSpc_with_ssub_0Bits), ARM::DQuadSpc_with_ssub_0RegClassID, 256, 1, true, false }, |
| 3123 | { DQuadSpc_with_ssub_4, DQuadSpc_with_ssub_4Bits, 315, 14, sizeof(DQuadSpc_with_ssub_4Bits), ARM::DQuadSpc_with_ssub_4RegClassID, 256, 1, true, false }, |
| 3124 | { DQuadSpc_with_ssub_8, DQuadSpc_with_ssub_8Bits, 1390, 12, sizeof(DQuadSpc_with_ssub_8Bits), ARM::DQuadSpc_with_ssub_8RegClassID, 256, 1, true, false }, |
| 3125 | { DQuadSpc_with_dsub_0_in_DPR_8, DQuadSpc_with_dsub_0_in_DPR_8Bits, 436, 8, sizeof(DQuadSpc_with_dsub_0_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3126 | { DQuadSpc_with_dsub_2_in_DPR_8, DQuadSpc_with_dsub_2_in_DPR_8Bits, 796, 6, sizeof(DQuadSpc_with_dsub_2_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3127 | { DQuadSpc_with_dsub_4_in_DPR_8, DQuadSpc_with_dsub_4_in_DPR_8Bits, 1059, 4, sizeof(DQuadSpc_with_dsub_4_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3128 | { DQuad, DQuadBits, 2295, 29, sizeof(DQuadBits), ARM::DQuadRegClassID, 256, 1, true, false }, |
| 3129 | { DQuad_with_ssub_0, DQuad_with_ssub_0Bits, 106, 16, sizeof(DQuad_with_ssub_0Bits), ARM::DQuad_with_ssub_0RegClassID, 256, 1, true, false }, |
| 3130 | { DQuad_with_ssub_2, DQuad_with_ssub_2Bits, 240, 15, sizeof(DQuad_with_ssub_2Bits), ARM::DQuad_with_ssub_2RegClassID, 256, 1, true, false }, |
| 3131 | { QQPR, QQPRBits, 1981, 15, sizeof(QQPRBits), ARM::QQPRRegClassID, 256, 1, true, false }, |
| 3132 | { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2043, 14, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true, false }, |
| 3133 | { DQuad_with_ssub_4, DQuad_with_ssub_4Bits, 380, 14, sizeof(DQuad_with_ssub_4Bits), ARM::DQuad_with_ssub_4RegClassID, 256, 1, true, false }, |
| 3134 | { DQuad_with_ssub_6, DQuad_with_ssub_6Bits, 418, 13, sizeof(DQuad_with_ssub_6Bits), ARM::DQuad_with_ssub_6RegClassID, 256, 1, true, false }, |
| 3135 | { DQuad_with_dsub_0_in_DPR_8, DQuad_with_dsub_0_in_DPR_8Bits, 528, 8, sizeof(DQuad_with_dsub_0_in_DPR_8Bits), ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3136 | { DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2021, 8, sizeof(DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true, false }, |
| 3137 | { QQPR_with_ssub_0, QQPR_with_ssub_0Bits, 2, 8, sizeof(QQPR_with_ssub_0Bits), ARM::QQPR_with_ssub_0RegClassID, 256, 1, true, false }, |
| 3138 | { DQuad_with_dsub_1_in_DPR_8, DQuad_with_dsub_1_in_DPR_8Bits, 611, 7, sizeof(DQuad_with_dsub_1_in_DPR_8Bits), ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3139 | { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1795, 7, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false }, |
| 3140 | { MQQPR, MQQPRBits, 1980, 7, sizeof(MQQPRBits), ARM::MQQPRRegClassID, 256, 1, true, false }, |
| 3141 | { DQuad_with_dsub_2_in_DPR_8, DQuad_with_dsub_2_in_DPR_8Bits, 888, 6, sizeof(DQuad_with_dsub_2_in_DPR_8Bits), ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3142 | { DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1773, 6, sizeof(DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false }, |
| 3143 | { DQuad_with_dsub_3_in_DPR_8, DQuad_with_dsub_3_in_DPR_8Bits, 1032, 5, sizeof(DQuad_with_dsub_3_in_DPR_8Bits), ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3144 | { DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1842, 4, sizeof(DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false }, |
| 3145 | { MQQPR_with_qsub_0_in_QPR_8, MQQPR_with_qsub_0_in_QPR_8Bits, 1145, 4, sizeof(MQQPR_with_qsub_0_in_QPR_8Bits), ARM::MQQPR_with_qsub_0_in_QPR_8RegClassID, 256, 1, true, false }, |
| 3146 | { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1230, 3, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 256, 1, true, false }, |
| 3147 | { MQQPR_with_dsub_2_in_DPR_8, MQQPR_with_dsub_2_in_DPR_8Bits, 718, 3, sizeof(MQQPR_with_dsub_2_in_DPR_8Bits), ARM::MQQPR_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3148 | { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits, 915, 2, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Bits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false }, |
| 3149 | { QQQQPR, QQQQPRBits, 1987, 13, sizeof(QQQQPRBits), ARM::QQQQPRRegClassID, 512, 1, true, false }, |
| 3150 | { QQQQPR_with_ssub_0, QQQQPR_with_ssub_0Bits, 0, 8, sizeof(QQQQPR_with_ssub_0Bits), ARM::QQQQPR_with_ssub_0RegClassID, 512, 1, true, false }, |
| 3151 | { QQQQPR_with_ssub_4, QQQQPR_with_ssub_4Bits, 296, 7, sizeof(QQQQPR_with_ssub_4Bits), ARM::QQQQPR_with_ssub_4RegClassID, 512, 1, true, false }, |
| 3152 | { QQQQPR_with_ssub_8, QQQQPR_with_ssub_8Bits, 1371, 6, sizeof(QQQQPR_with_ssub_8Bits), ARM::QQQQPR_with_ssub_8RegClassID, 512, 1, true, false }, |
| 3153 | { MQQQQPR, MQQQQPRBits, 1986, 5, sizeof(MQQQQPRBits), ARM::MQQQQPRRegClassID, 512, 1, true, false }, |
| 3154 | { MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8, MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8Bits, 1121, 4, sizeof(MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8Bits), ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID, 512, 1, true, false }, |
| 3155 | { MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8, MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8Bits, 694, 3, sizeof(MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8Bits), ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClassID, 512, 1, true, false }, |
| 3156 | { MQQQQPR_with_qsub_2_in_QPR_8, MQQQQPR_with_qsub_2_in_QPR_8Bits, 1201, 2, sizeof(MQQQQPR_with_qsub_2_in_QPR_8Bits), ARM::MQQQQPR_with_qsub_2_in_QPR_8RegClassID, 512, 1, true, false }, |
| 3157 | { MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8, MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8Bits, 745, 1, sizeof(MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8Bits), ARM::MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClassID, 512, 1, true, false }, |
| 3158 | }; |
| 3159 | |
| 3160 | // ARM Dwarf<->LLVM register mappings. |
| 3161 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[] = { |
| 3162 | { 0U, ARM::R0 }, |
| 3163 | { 1U, ARM::R1 }, |
| 3164 | { 2U, ARM::R2 }, |
| 3165 | { 3U, ARM::R3 }, |
| 3166 | { 4U, ARM::R4 }, |
| 3167 | { 5U, ARM::R5 }, |
| 3168 | { 6U, ARM::R6 }, |
| 3169 | { 7U, ARM::R7 }, |
| 3170 | { 8U, ARM::R8 }, |
| 3171 | { 9U, ARM::R9 }, |
| 3172 | { 10U, ARM::R10 }, |
| 3173 | { 11U, ARM::R11 }, |
| 3174 | { 12U, ARM::R12 }, |
| 3175 | { 13U, ARM::SP }, |
| 3176 | { 14U, ARM::LR }, |
| 3177 | { 15U, ARM::ZR }, |
| 3178 | { 143U, ARM::RA_AUTH_CODE }, |
| 3179 | { 256U, ARM::D0 }, |
| 3180 | { 257U, ARM::D1 }, |
| 3181 | { 258U, ARM::D2 }, |
| 3182 | { 259U, ARM::D3 }, |
| 3183 | { 260U, ARM::D4 }, |
| 3184 | { 261U, ARM::D5 }, |
| 3185 | { 262U, ARM::D6 }, |
| 3186 | { 263U, ARM::D7 }, |
| 3187 | { 264U, ARM::D8 }, |
| 3188 | { 265U, ARM::D9 }, |
| 3189 | { 266U, ARM::D10 }, |
| 3190 | { 267U, ARM::D11 }, |
| 3191 | { 268U, ARM::D12 }, |
| 3192 | { 269U, ARM::D13 }, |
| 3193 | { 270U, ARM::D14 }, |
| 3194 | { 271U, ARM::D15 }, |
| 3195 | { 272U, ARM::D16 }, |
| 3196 | { 273U, ARM::D17 }, |
| 3197 | { 274U, ARM::D18 }, |
| 3198 | { 275U, ARM::D19 }, |
| 3199 | { 276U, ARM::D20 }, |
| 3200 | { 277U, ARM::D21 }, |
| 3201 | { 278U, ARM::D22 }, |
| 3202 | { 279U, ARM::D23 }, |
| 3203 | { 280U, ARM::D24 }, |
| 3204 | { 281U, ARM::D25 }, |
| 3205 | { 282U, ARM::D26 }, |
| 3206 | { 283U, ARM::D27 }, |
| 3207 | { 284U, ARM::D28 }, |
| 3208 | { 285U, ARM::D29 }, |
| 3209 | { 286U, ARM::D30 }, |
| 3210 | { 287U, ARM::D31 }, |
| 3211 | }; |
| 3212 | extern const unsigned ARMDwarfFlavour0Dwarf2LSize = std::size(ARMDwarfFlavour0Dwarf2L); |
| 3213 | |
| 3214 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[] = { |
| 3215 | { 0U, ARM::R0 }, |
| 3216 | { 1U, ARM::R1 }, |
| 3217 | { 2U, ARM::R2 }, |
| 3218 | { 3U, ARM::R3 }, |
| 3219 | { 4U, ARM::R4 }, |
| 3220 | { 5U, ARM::R5 }, |
| 3221 | { 6U, ARM::R6 }, |
| 3222 | { 7U, ARM::R7 }, |
| 3223 | { 8U, ARM::R8 }, |
| 3224 | { 9U, ARM::R9 }, |
| 3225 | { 10U, ARM::R10 }, |
| 3226 | { 11U, ARM::R11 }, |
| 3227 | { 12U, ARM::R12 }, |
| 3228 | { 13U, ARM::SP }, |
| 3229 | { 14U, ARM::LR }, |
| 3230 | { 15U, ARM::ZR }, |
| 3231 | { 143U, ARM::RA_AUTH_CODE }, |
| 3232 | { 256U, ARM::D0 }, |
| 3233 | { 257U, ARM::D1 }, |
| 3234 | { 258U, ARM::D2 }, |
| 3235 | { 259U, ARM::D3 }, |
| 3236 | { 260U, ARM::D4 }, |
| 3237 | { 261U, ARM::D5 }, |
| 3238 | { 262U, ARM::D6 }, |
| 3239 | { 263U, ARM::D7 }, |
| 3240 | { 264U, ARM::D8 }, |
| 3241 | { 265U, ARM::D9 }, |
| 3242 | { 266U, ARM::D10 }, |
| 3243 | { 267U, ARM::D11 }, |
| 3244 | { 268U, ARM::D12 }, |
| 3245 | { 269U, ARM::D13 }, |
| 3246 | { 270U, ARM::D14 }, |
| 3247 | { 271U, ARM::D15 }, |
| 3248 | { 272U, ARM::D16 }, |
| 3249 | { 273U, ARM::D17 }, |
| 3250 | { 274U, ARM::D18 }, |
| 3251 | { 275U, ARM::D19 }, |
| 3252 | { 276U, ARM::D20 }, |
| 3253 | { 277U, ARM::D21 }, |
| 3254 | { 278U, ARM::D22 }, |
| 3255 | { 279U, ARM::D23 }, |
| 3256 | { 280U, ARM::D24 }, |
| 3257 | { 281U, ARM::D25 }, |
| 3258 | { 282U, ARM::D26 }, |
| 3259 | { 283U, ARM::D27 }, |
| 3260 | { 284U, ARM::D28 }, |
| 3261 | { 285U, ARM::D29 }, |
| 3262 | { 286U, ARM::D30 }, |
| 3263 | { 287U, ARM::D31 }, |
| 3264 | }; |
| 3265 | extern const unsigned ARMEHFlavour0Dwarf2LSize = std::size(ARMEHFlavour0Dwarf2L); |
| 3266 | |
| 3267 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[] = { |
| 3268 | { ARM::LR, 14U }, |
| 3269 | { ARM::PC, 15U }, |
| 3270 | { ARM::RA_AUTH_CODE, 143U }, |
| 3271 | { ARM::SP, 13U }, |
| 3272 | { ARM::ZR, 15U }, |
| 3273 | { ARM::D0, 256U }, |
| 3274 | { ARM::D1, 257U }, |
| 3275 | { ARM::D2, 258U }, |
| 3276 | { ARM::D3, 259U }, |
| 3277 | { ARM::D4, 260U }, |
| 3278 | { ARM::D5, 261U }, |
| 3279 | { ARM::D6, 262U }, |
| 3280 | { ARM::D7, 263U }, |
| 3281 | { ARM::D8, 264U }, |
| 3282 | { ARM::D9, 265U }, |
| 3283 | { ARM::D10, 266U }, |
| 3284 | { ARM::D11, 267U }, |
| 3285 | { ARM::D12, 268U }, |
| 3286 | { ARM::D13, 269U }, |
| 3287 | { ARM::D14, 270U }, |
| 3288 | { ARM::D15, 271U }, |
| 3289 | { ARM::D16, 272U }, |
| 3290 | { ARM::D17, 273U }, |
| 3291 | { ARM::D18, 274U }, |
| 3292 | { ARM::D19, 275U }, |
| 3293 | { ARM::D20, 276U }, |
| 3294 | { ARM::D21, 277U }, |
| 3295 | { ARM::D22, 278U }, |
| 3296 | { ARM::D23, 279U }, |
| 3297 | { ARM::D24, 280U }, |
| 3298 | { ARM::D25, 281U }, |
| 3299 | { ARM::D26, 282U }, |
| 3300 | { ARM::D27, 283U }, |
| 3301 | { ARM::D28, 284U }, |
| 3302 | { ARM::D29, 285U }, |
| 3303 | { ARM::D30, 286U }, |
| 3304 | { ARM::D31, 287U }, |
| 3305 | { ARM::R0, 0U }, |
| 3306 | { ARM::R1, 1U }, |
| 3307 | { ARM::R2, 2U }, |
| 3308 | { ARM::R3, 3U }, |
| 3309 | { ARM::R4, 4U }, |
| 3310 | { ARM::R5, 5U }, |
| 3311 | { ARM::R6, 6U }, |
| 3312 | { ARM::R7, 7U }, |
| 3313 | { ARM::R8, 8U }, |
| 3314 | { ARM::R9, 9U }, |
| 3315 | { ARM::R10, 10U }, |
| 3316 | { ARM::R11, 11U }, |
| 3317 | { ARM::R12, 12U }, |
| 3318 | }; |
| 3319 | extern const unsigned ARMDwarfFlavour0L2DwarfSize = std::size(ARMDwarfFlavour0L2Dwarf); |
| 3320 | |
| 3321 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[] = { |
| 3322 | { ARM::LR, 14U }, |
| 3323 | { ARM::PC, 15U }, |
| 3324 | { ARM::RA_AUTH_CODE, 143U }, |
| 3325 | { ARM::SP, 13U }, |
| 3326 | { ARM::ZR, 15U }, |
| 3327 | { ARM::D0, 256U }, |
| 3328 | { ARM::D1, 257U }, |
| 3329 | { ARM::D2, 258U }, |
| 3330 | { ARM::D3, 259U }, |
| 3331 | { ARM::D4, 260U }, |
| 3332 | { ARM::D5, 261U }, |
| 3333 | { ARM::D6, 262U }, |
| 3334 | { ARM::D7, 263U }, |
| 3335 | { ARM::D8, 264U }, |
| 3336 | { ARM::D9, 265U }, |
| 3337 | { ARM::D10, 266U }, |
| 3338 | { ARM::D11, 267U }, |
| 3339 | { ARM::D12, 268U }, |
| 3340 | { ARM::D13, 269U }, |
| 3341 | { ARM::D14, 270U }, |
| 3342 | { ARM::D15, 271U }, |
| 3343 | { ARM::D16, 272U }, |
| 3344 | { ARM::D17, 273U }, |
| 3345 | { ARM::D18, 274U }, |
| 3346 | { ARM::D19, 275U }, |
| 3347 | { ARM::D20, 276U }, |
| 3348 | { ARM::D21, 277U }, |
| 3349 | { ARM::D22, 278U }, |
| 3350 | { ARM::D23, 279U }, |
| 3351 | { ARM::D24, 280U }, |
| 3352 | { ARM::D25, 281U }, |
| 3353 | { ARM::D26, 282U }, |
| 3354 | { ARM::D27, 283U }, |
| 3355 | { ARM::D28, 284U }, |
| 3356 | { ARM::D29, 285U }, |
| 3357 | { ARM::D30, 286U }, |
| 3358 | { ARM::D31, 287U }, |
| 3359 | { ARM::R0, 0U }, |
| 3360 | { ARM::R1, 1U }, |
| 3361 | { ARM::R2, 2U }, |
| 3362 | { ARM::R3, 3U }, |
| 3363 | { ARM::R4, 4U }, |
| 3364 | { ARM::R5, 5U }, |
| 3365 | { ARM::R6, 6U }, |
| 3366 | { ARM::R7, 7U }, |
| 3367 | { ARM::R8, 8U }, |
| 3368 | { ARM::R9, 9U }, |
| 3369 | { ARM::R10, 10U }, |
| 3370 | { ARM::R11, 11U }, |
| 3371 | { ARM::R12, 12U }, |
| 3372 | }; |
| 3373 | extern const unsigned ARMEHFlavour0L2DwarfSize = std::size(ARMEHFlavour0L2Dwarf); |
| 3374 | |
| 3375 | extern const uint16_t ARMRegEncodingTable[] = { |
| 3376 | 0, |
| 3377 | 15, |
| 3378 | 15, |
| 3379 | 0, |
| 3380 | 14, |
| 3381 | 15, |
| 3382 | 8, |
| 3383 | 9, |
| 3384 | 3, |
| 3385 | 3, |
| 3386 | 2, |
| 3387 | 0, |
| 3388 | 4, |
| 3389 | 14, |
| 3390 | 15, |
| 3391 | 12, |
| 3392 | 13, |
| 3393 | 2, |
| 3394 | 64, |
| 3395 | 15, |
| 3396 | 0, |
| 3397 | 1, |
| 3398 | 2, |
| 3399 | 3, |
| 3400 | 4, |
| 3401 | 5, |
| 3402 | 6, |
| 3403 | 7, |
| 3404 | 8, |
| 3405 | 9, |
| 3406 | 10, |
| 3407 | 11, |
| 3408 | 12, |
| 3409 | 13, |
| 3410 | 14, |
| 3411 | 15, |
| 3412 | 16, |
| 3413 | 17, |
| 3414 | 18, |
| 3415 | 19, |
| 3416 | 20, |
| 3417 | 21, |
| 3418 | 22, |
| 3419 | 23, |
| 3420 | 24, |
| 3421 | 25, |
| 3422 | 26, |
| 3423 | 27, |
| 3424 | 28, |
| 3425 | 29, |
| 3426 | 30, |
| 3427 | 31, |
| 3428 | 10, |
| 3429 | 7, |
| 3430 | 6, |
| 3431 | 5, |
| 3432 | 13, |
| 3433 | 0, |
| 3434 | 1, |
| 3435 | 2, |
| 3436 | 3, |
| 3437 | 4, |
| 3438 | 5, |
| 3439 | 6, |
| 3440 | 7, |
| 3441 | 8, |
| 3442 | 9, |
| 3443 | 10, |
| 3444 | 11, |
| 3445 | 12, |
| 3446 | 13, |
| 3447 | 14, |
| 3448 | 15, |
| 3449 | 0, |
| 3450 | 1, |
| 3451 | 2, |
| 3452 | 3, |
| 3453 | 4, |
| 3454 | 5, |
| 3455 | 6, |
| 3456 | 7, |
| 3457 | 8, |
| 3458 | 9, |
| 3459 | 10, |
| 3460 | 11, |
| 3461 | 12, |
| 3462 | 0, |
| 3463 | 1, |
| 3464 | 2, |
| 3465 | 3, |
| 3466 | 4, |
| 3467 | 5, |
| 3468 | 6, |
| 3469 | 7, |
| 3470 | 8, |
| 3471 | 9, |
| 3472 | 10, |
| 3473 | 11, |
| 3474 | 12, |
| 3475 | 13, |
| 3476 | 14, |
| 3477 | 15, |
| 3478 | 16, |
| 3479 | 17, |
| 3480 | 18, |
| 3481 | 19, |
| 3482 | 20, |
| 3483 | 21, |
| 3484 | 22, |
| 3485 | 23, |
| 3486 | 24, |
| 3487 | 25, |
| 3488 | 26, |
| 3489 | 27, |
| 3490 | 28, |
| 3491 | 29, |
| 3492 | 30, |
| 3493 | 31, |
| 3494 | 0, |
| 3495 | 1, |
| 3496 | 2, |
| 3497 | 3, |
| 3498 | 4, |
| 3499 | 5, |
| 3500 | 6, |
| 3501 | 7, |
| 3502 | 8, |
| 3503 | 9, |
| 3504 | 10, |
| 3505 | 11, |
| 3506 | 12, |
| 3507 | 13, |
| 3508 | 14, |
| 3509 | 15, |
| 3510 | 16, |
| 3511 | 17, |
| 3512 | 18, |
| 3513 | 19, |
| 3514 | 20, |
| 3515 | 21, |
| 3516 | 22, |
| 3517 | 23, |
| 3518 | 24, |
| 3519 | 25, |
| 3520 | 26, |
| 3521 | 27, |
| 3522 | 28, |
| 3523 | 29, |
| 3524 | 0, |
| 3525 | 1, |
| 3526 | 2, |
| 3527 | 3, |
| 3528 | 4, |
| 3529 | 5, |
| 3530 | 6, |
| 3531 | 7, |
| 3532 | 8, |
| 3533 | 9, |
| 3534 | 10, |
| 3535 | 11, |
| 3536 | 12, |
| 3537 | 13, |
| 3538 | 14, |
| 3539 | 0, |
| 3540 | 1, |
| 3541 | 2, |
| 3542 | 3, |
| 3543 | 4, |
| 3544 | 5, |
| 3545 | 6, |
| 3546 | 7, |
| 3547 | 8, |
| 3548 | 9, |
| 3549 | 10, |
| 3550 | 11, |
| 3551 | 12, |
| 3552 | 0, |
| 3553 | 2, |
| 3554 | 4, |
| 3555 | 6, |
| 3556 | 8, |
| 3557 | 10, |
| 3558 | 12, |
| 3559 | 0, |
| 3560 | 1, |
| 3561 | 2, |
| 3562 | 3, |
| 3563 | 4, |
| 3564 | 5, |
| 3565 | 6, |
| 3566 | 7, |
| 3567 | 8, |
| 3568 | 9, |
| 3569 | 10, |
| 3570 | 11, |
| 3571 | 12, |
| 3572 | 13, |
| 3573 | 14, |
| 3574 | 15, |
| 3575 | 16, |
| 3576 | 17, |
| 3577 | 18, |
| 3578 | 19, |
| 3579 | 20, |
| 3580 | 21, |
| 3581 | 22, |
| 3582 | 23, |
| 3583 | 24, |
| 3584 | 25, |
| 3585 | 26, |
| 3586 | 27, |
| 3587 | 28, |
| 3588 | 29, |
| 3589 | 0, |
| 3590 | 1, |
| 3591 | 2, |
| 3592 | 3, |
| 3593 | 4, |
| 3594 | 5, |
| 3595 | 6, |
| 3596 | 7, |
| 3597 | 8, |
| 3598 | 9, |
| 3599 | 10, |
| 3600 | 11, |
| 3601 | 12, |
| 3602 | 13, |
| 3603 | 14, |
| 3604 | 15, |
| 3605 | 16, |
| 3606 | 17, |
| 3607 | 18, |
| 3608 | 19, |
| 3609 | 20, |
| 3610 | 21, |
| 3611 | 22, |
| 3612 | 23, |
| 3613 | 24, |
| 3614 | 25, |
| 3615 | 26, |
| 3616 | 27, |
| 3617 | 0, |
| 3618 | 1, |
| 3619 | 2, |
| 3620 | 3, |
| 3621 | 4, |
| 3622 | 5, |
| 3623 | 6, |
| 3624 | 7, |
| 3625 | 8, |
| 3626 | 9, |
| 3627 | 10, |
| 3628 | 11, |
| 3629 | 12, |
| 3630 | 13, |
| 3631 | 14, |
| 3632 | 15, |
| 3633 | 16, |
| 3634 | 17, |
| 3635 | 18, |
| 3636 | 19, |
| 3637 | 20, |
| 3638 | 21, |
| 3639 | 22, |
| 3640 | 23, |
| 3641 | 24, |
| 3642 | 25, |
| 3643 | 1, |
| 3644 | 3, |
| 3645 | 5, |
| 3646 | 7, |
| 3647 | 9, |
| 3648 | 11, |
| 3649 | 13, |
| 3650 | 15, |
| 3651 | 17, |
| 3652 | 19, |
| 3653 | 21, |
| 3654 | 23, |
| 3655 | 25, |
| 3656 | 27, |
| 3657 | 29, |
| 3658 | 1, |
| 3659 | 3, |
| 3660 | 5, |
| 3661 | 7, |
| 3662 | 9, |
| 3663 | 11, |
| 3664 | 13, |
| 3665 | 15, |
| 3666 | 17, |
| 3667 | 19, |
| 3668 | 21, |
| 3669 | 23, |
| 3670 | 25, |
| 3671 | 27, |
| 3672 | }; |
| 3673 | static inline void InitARMMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { |
| 3674 | RI->InitMCRegisterInfo(ARMRegDesc, 296, RA, PC, ARMMCRegisterClasses, 137, ARMRegUnitRoots, 86, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57, |
| 3675 | ARMRegEncodingTable); |
| 3676 | |
| 3677 | switch (DwarfFlavour) { |
| 3678 | default: |
| 3679 | llvm_unreachable("Unknown DWARF flavour" ); |
| 3680 | case 0: |
| 3681 | RI->mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false); |
| 3682 | break; |
| 3683 | } |
| 3684 | switch (EHFlavour) { |
| 3685 | default: |
| 3686 | llvm_unreachable("Unknown DWARF flavour" ); |
| 3687 | case 0: |
| 3688 | RI->mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true); |
| 3689 | break; |
| 3690 | } |
| 3691 | switch (DwarfFlavour) { |
| 3692 | default: |
| 3693 | llvm_unreachable("Unknown DWARF flavour" ); |
| 3694 | case 0: |
| 3695 | RI->mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false); |
| 3696 | break; |
| 3697 | } |
| 3698 | switch (EHFlavour) { |
| 3699 | default: |
| 3700 | llvm_unreachable("Unknown DWARF flavour" ); |
| 3701 | case 0: |
| 3702 | RI->mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true); |
| 3703 | break; |
| 3704 | } |
| 3705 | } |
| 3706 | |
| 3707 | } // end namespace llvm |
| 3708 | |
| 3709 | #endif // GET_REGINFO_MC_DESC |
| 3710 | |
| 3711 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 3712 | |* *| |
| 3713 | |* Register Information Header Fragment *| |
| 3714 | |* *| |
| 3715 | |* Automatically generated file, do not edit! *| |
| 3716 | |* *| |
| 3717 | \*===----------------------------------------------------------------------===*/ |
| 3718 | |
| 3719 | |
| 3720 | #ifdef GET_REGINFO_HEADER |
| 3721 | #undef GET_REGINFO_HEADER |
| 3722 | |
| 3723 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 3724 | |
| 3725 | namespace llvm { |
| 3726 | |
| 3727 | class ARMFrameLowering; |
| 3728 | |
| 3729 | struct ARMGenRegisterInfo : public TargetRegisterInfo { |
| 3730 | explicit ARMGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 3731 | unsigned PC = 0, unsigned HwMode = 0); |
| 3732 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 3733 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 3734 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 3735 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 3736 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 3737 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 3738 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 3739 | unsigned getRegUnitWeight(unsigned RegUnit) const override; |
| 3740 | unsigned getNumRegPressureSets() const override; |
| 3741 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 3742 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 3743 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 3744 | const int *getRegUnitPressureSets(unsigned RegUnit) const override; |
| 3745 | ArrayRef<const char *> getRegMaskNames() const override; |
| 3746 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 3747 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 3748 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 3749 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 3750 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 3751 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 3752 | /// Devirtualized TargetFrameLowering. |
| 3753 | static const ARMFrameLowering *getFrameLowering( |
| 3754 | const MachineFunction &MF); |
| 3755 | }; |
| 3756 | |
| 3757 | namespace ARM { // Register classes |
| 3758 | extern const TargetRegisterClass HPRRegClass; |
| 3759 | extern const TargetRegisterClass FPWithVPRRegClass; |
| 3760 | extern const TargetRegisterClass SPRRegClass; |
| 3761 | extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass; |
| 3762 | extern const TargetRegisterClass GPRRegClass; |
| 3763 | extern const TargetRegisterClass GPRwithAPSRRegClass; |
| 3764 | extern const TargetRegisterClass GPRwithZRRegClass; |
| 3765 | extern const TargetRegisterClass SPR_8RegClass; |
| 3766 | extern const TargetRegisterClass GPRnopcRegClass; |
| 3767 | extern const TargetRegisterClass GPRnospRegClass; |
| 3768 | extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass; |
| 3769 | extern const TargetRegisterClass GPRwithAPSRnospRegClass; |
| 3770 | extern const TargetRegisterClass GPRwithZRnospRegClass; |
| 3771 | extern const TargetRegisterClass GPRnoipRegClass; |
| 3772 | extern const TargetRegisterClass rGPRRegClass; |
| 3773 | extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass; |
| 3774 | extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass; |
| 3775 | extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass; |
| 3776 | extern const TargetRegisterClass tGPRwithpcRegClass; |
| 3777 | extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass; |
| 3778 | extern const TargetRegisterClass hGPRRegClass; |
| 3779 | extern const TargetRegisterClass tGPRRegClass; |
| 3780 | extern const TargetRegisterClass tGPREvenRegClass; |
| 3781 | extern const TargetRegisterClass GPRnopc_and_hGPRRegClass; |
| 3782 | extern const TargetRegisterClass GPRnosp_and_hGPRRegClass; |
| 3783 | extern const TargetRegisterClass GPRnoip_and_hGPRRegClass; |
| 3784 | extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass; |
| 3785 | extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass; |
| 3786 | extern const TargetRegisterClass tGPROddRegClass; |
| 3787 | extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass; |
| 3788 | extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass; |
| 3789 | extern const TargetRegisterClass tcGPRRegClass; |
| 3790 | extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass; |
| 3791 | extern const TargetRegisterClass hGPR_and_tGPREvenRegClass; |
| 3792 | extern const TargetRegisterClass tGPR_and_tGPREvenRegClass; |
| 3793 | extern const TargetRegisterClass tGPR_and_tGPROddRegClass; |
| 3794 | extern const TargetRegisterClass tcGPRnotr12RegClass; |
| 3795 | extern const TargetRegisterClass tGPREven_and_tcGPRRegClass; |
| 3796 | extern const TargetRegisterClass FP_STATUS_REGSRegClass; |
| 3797 | extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass; |
| 3798 | extern const TargetRegisterClass hGPR_and_tGPROddRegClass; |
| 3799 | extern const TargetRegisterClass tGPREven_and_tcGPRnotr12RegClass; |
| 3800 | extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass; |
| 3801 | extern const TargetRegisterClass CCRRegClass; |
| 3802 | extern const TargetRegisterClass FPCXTRegsRegClass; |
| 3803 | extern const TargetRegisterClass GPRlrRegClass; |
| 3804 | extern const TargetRegisterClass GPRspRegClass; |
| 3805 | extern const TargetRegisterClass VCCRRegClass; |
| 3806 | extern const TargetRegisterClass cl_FPSCR_NZCVRegClass; |
| 3807 | extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass; |
| 3808 | extern const TargetRegisterClass hGPR_and_tcGPRRegClass; |
| 3809 | extern const TargetRegisterClass DPRRegClass; |
| 3810 | extern const TargetRegisterClass DPR_VFP2RegClass; |
| 3811 | extern const TargetRegisterClass DPR_8RegClass; |
| 3812 | extern const TargetRegisterClass GPRPairRegClass; |
| 3813 | extern const TargetRegisterClass GPRPairnospRegClass; |
| 3814 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass; |
| 3815 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass; |
| 3816 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass; |
| 3817 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRnotr12RegClass; |
| 3818 | extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass; |
| 3819 | extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass; |
| 3820 | extern const TargetRegisterClass DPairSpcRegClass; |
| 3821 | extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass; |
| 3822 | extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass; |
| 3823 | extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass; |
| 3824 | extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass; |
| 3825 | extern const TargetRegisterClass DPairRegClass; |
| 3826 | extern const TargetRegisterClass DPair_with_ssub_0RegClass; |
| 3827 | extern const TargetRegisterClass QPRRegClass; |
| 3828 | extern const TargetRegisterClass DPair_with_ssub_2RegClass; |
| 3829 | extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass; |
| 3830 | extern const TargetRegisterClass MQPRRegClass; |
| 3831 | extern const TargetRegisterClass QPR_VFP2RegClass; |
| 3832 | extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass; |
| 3833 | extern const TargetRegisterClass QPR_8RegClass; |
| 3834 | extern const TargetRegisterClass DTripleRegClass; |
| 3835 | extern const TargetRegisterClass DTripleSpcRegClass; |
| 3836 | extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass; |
| 3837 | extern const TargetRegisterClass DTriple_with_ssub_0RegClass; |
| 3838 | extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass; |
| 3839 | extern const TargetRegisterClass DTriple_with_ssub_2RegClass; |
| 3840 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| 3841 | extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass; |
| 3842 | extern const TargetRegisterClass DTriple_with_ssub_4RegClass; |
| 3843 | extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass; |
| 3844 | extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass; |
| 3845 | extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass; |
| 3846 | extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass; |
| 3847 | extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| 3848 | extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass; |
| 3849 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| 3850 | extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass; |
| 3851 | extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass; |
| 3852 | extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass; |
| 3853 | extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass; |
| 3854 | extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| 3855 | extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass; |
| 3856 | extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass; |
| 3857 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass; |
| 3858 | extern const TargetRegisterClass DQuadSpcRegClass; |
| 3859 | extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass; |
| 3860 | extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass; |
| 3861 | extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass; |
| 3862 | extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass; |
| 3863 | extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass; |
| 3864 | extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass; |
| 3865 | extern const TargetRegisterClass DQuadRegClass; |
| 3866 | extern const TargetRegisterClass DQuad_with_ssub_0RegClass; |
| 3867 | extern const TargetRegisterClass DQuad_with_ssub_2RegClass; |
| 3868 | extern const TargetRegisterClass QQPRRegClass; |
| 3869 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| 3870 | extern const TargetRegisterClass DQuad_with_ssub_4RegClass; |
| 3871 | extern const TargetRegisterClass DQuad_with_ssub_6RegClass; |
| 3872 | extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass; |
| 3873 | extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| 3874 | extern const TargetRegisterClass QQPR_with_ssub_0RegClass; |
| 3875 | extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass; |
| 3876 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| 3877 | extern const TargetRegisterClass MQQPRRegClass; |
| 3878 | extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass; |
| 3879 | extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| 3880 | extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass; |
| 3881 | extern const TargetRegisterClass DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| 3882 | extern const TargetRegisterClass MQQPR_with_qsub_0_in_QPR_8RegClass; |
| 3883 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass; |
| 3884 | extern const TargetRegisterClass MQQPR_with_dsub_2_in_DPR_8RegClass; |
| 3885 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass; |
| 3886 | extern const TargetRegisterClass QQQQPRRegClass; |
| 3887 | extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass; |
| 3888 | extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass; |
| 3889 | extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass; |
| 3890 | extern const TargetRegisterClass MQQQQPRRegClass; |
| 3891 | extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClass; |
| 3892 | extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClass; |
| 3893 | extern const TargetRegisterClass MQQQQPR_with_qsub_2_in_QPR_8RegClass; |
| 3894 | extern const TargetRegisterClass MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClass; |
| 3895 | } // end namespace ARM |
| 3896 | |
| 3897 | } // end namespace llvm |
| 3898 | |
| 3899 | #endif // GET_REGINFO_HEADER |
| 3900 | |
| 3901 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 3902 | |* *| |
| 3903 | |* Target Register and Register Classes Information *| |
| 3904 | |* *| |
| 3905 | |* Automatically generated file, do not edit! *| |
| 3906 | |* *| |
| 3907 | \*===----------------------------------------------------------------------===*/ |
| 3908 | |
| 3909 | |
| 3910 | #ifdef GET_REGINFO_TARGET_DESC |
| 3911 | #undef GET_REGINFO_TARGET_DESC |
| 3912 | |
| 3913 | namespace llvm { |
| 3914 | |
| 3915 | extern const MCRegisterClass ARMMCRegisterClasses[]; |
| 3916 | |
| 3917 | static const MVT::SimpleValueType VTLists[] = { |
| 3918 | /* 0 */ MVT::i32, MVT::Other, |
| 3919 | /* 2 */ MVT::f16, MVT::bf16, MVT::Other, |
| 3920 | /* 5 */ MVT::f32, MVT::Other, |
| 3921 | /* 7 */ MVT::i32, MVT::v16i1, MVT::v8i1, MVT::v4i1, MVT::v2i1, MVT::Other, |
| 3922 | /* 13 */ MVT::v2i64, MVT::Other, |
| 3923 | /* 15 */ MVT::v4i64, MVT::Other, |
| 3924 | /* 17 */ MVT::v8i64, MVT::Other, |
| 3925 | /* 19 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::Other, |
| 3926 | /* 27 */ MVT::f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v2f32, MVT::v4f16, MVT::v4bf16, MVT::Other, |
| 3927 | /* 36 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::v8bf16, MVT::Other, |
| 3928 | /* 45 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::Other, |
| 3929 | /* 52 */ MVT::Untyped, MVT::Other, |
| 3930 | }; |
| 3931 | |
| 3932 | static const char *SubRegIndexNameTable[] = { "dsub_0" , "dsub_1" , "dsub_2" , "dsub_3" , "dsub_4" , "dsub_5" , "dsub_6" , "dsub_7" , "gsub_0" , "gsub_1" , "qqsub_0" , "qqsub_1" , "qsub_0" , "qsub_1" , "qsub_2" , "qsub_3" , "ssub_0" , "ssub_1" , "ssub_2" , "ssub_3" , "ssub_4" , "ssub_5" , "ssub_6" , "ssub_7" , "ssub_8" , "ssub_9" , "ssub_10" , "ssub_11" , "ssub_12" , "ssub_13" , "ssub_14" , "ssub_15" , "ssub_0_ssub_1_ssub_4_ssub_5" , "ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5" , "ssub_2_ssub_3_ssub_6_ssub_7" , "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7" , "ssub_2_ssub_3_ssub_4_ssub_5" , "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9" , "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13" , "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5" , "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7" , "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9" , "ssub_4_ssub_5_ssub_8_ssub_9" , "ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9" , "ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13" , "ssub_6_ssub_7_dsub_5" , "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5" , "ssub_6_ssub_7_dsub_5_dsub_7" , "ssub_6_ssub_7_ssub_8_ssub_9" , "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13" , "ssub_8_ssub_9_ssub_12_ssub_13" , "ssub_8_ssub_9_dsub_5_ssub_12_ssub_13" , "dsub_5_dsub_7" , "dsub_5_ssub_12_ssub_13_dsub_7" , "dsub_5_ssub_12_ssub_13" , "ssub_4_ssub_5_ssub_6_ssub_7_qsub_2" , "" }; |
| 3933 | |
| 3934 | static const TargetRegisterInfo::SubRegCoveredBits SubRegIdxRangeTable[] = { |
| 3935 | { 65535, 65535 }, |
| 3936 | { 0, 64 }, // dsub_0 |
| 3937 | { 64, 64 }, // dsub_1 |
| 3938 | { 128, 64 }, // dsub_2 |
| 3939 | { 192, 64 }, // dsub_3 |
| 3940 | { 256, 64 }, // dsub_4 |
| 3941 | { 320, 64 }, // dsub_5 |
| 3942 | { 384, 64 }, // dsub_6 |
| 3943 | { 448, 64 }, // dsub_7 |
| 3944 | { 0, 32 }, // gsub_0 |
| 3945 | { 32, 32 }, // gsub_1 |
| 3946 | { 0, 256 }, // qqsub_0 |
| 3947 | { 256, 256 }, // qqsub_1 |
| 3948 | { 0, 128 }, // qsub_0 |
| 3949 | { 128, 128 }, // qsub_1 |
| 3950 | { 256, 128 }, // qsub_2 |
| 3951 | { 384, 128 }, // qsub_3 |
| 3952 | { 0, 32 }, // ssub_0 |
| 3953 | { 32, 32 }, // ssub_1 |
| 3954 | { 64, 32 }, // ssub_2 |
| 3955 | { 96, 32 }, // ssub_3 |
| 3956 | { 128, 32 }, // ssub_4 |
| 3957 | { 160, 32 }, // ssub_5 |
| 3958 | { 192, 32 }, // ssub_6 |
| 3959 | { 224, 32 }, // ssub_7 |
| 3960 | { 256, 32 }, // ssub_8 |
| 3961 | { 288, 32 }, // ssub_9 |
| 3962 | { 320, 32 }, // ssub_10 |
| 3963 | { 352, 32 }, // ssub_11 |
| 3964 | { 384, 32 }, // ssub_12 |
| 3965 | { 416, 32 }, // ssub_13 |
| 3966 | { 448, 32 }, // ssub_14 |
| 3967 | { 480, 32 }, // ssub_15 |
| 3968 | { 65535, 128 }, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 3969 | { 0, 192 }, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 3970 | { 65535, 128 }, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 3971 | { 64, 192 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 3972 | { 64, 128 }, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 3973 | { 65535, 192 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 3974 | { 65535, 256 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 3975 | { 65535, 192 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 3976 | { 65535, 256 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 3977 | { 64, 256 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 3978 | { 65535, 128 }, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 3979 | { 128, 192 }, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 3980 | { 65535, 192 }, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 3981 | { 65535, 128 }, // ssub_6_ssub_7_dsub_5 |
| 3982 | { 192, 192 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 3983 | { 65535, 192 }, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 3984 | { 192, 128 }, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 3985 | { 192, 256 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 3986 | { 65535, 128 }, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 3987 | { 256, 192 }, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 3988 | { 65535, 128 }, // dsub_5_dsub_7 |
| 3989 | { 320, 192 }, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 3990 | { 320, 128 }, // dsub_5_ssub_12_ssub_13 |
| 3991 | { 128, 256 }, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 3992 | }; |
| 3993 | |
| 3994 | |
| 3995 | static const LaneBitmask SubRegIndexLaneMaskTable[] = { |
| 3996 | LaneBitmask::getAll(), |
| 3997 | LaneBitmask(0x000000000000000C), // dsub_0 |
| 3998 | LaneBitmask(0x0000000000000030), // dsub_1 |
| 3999 | LaneBitmask(0x00000000000000C0), // dsub_2 |
| 4000 | LaneBitmask(0x0000000000000300), // dsub_3 |
| 4001 | LaneBitmask(0x0000000000000C00), // dsub_4 |
| 4002 | LaneBitmask(0x0000000000003000), // dsub_5 |
| 4003 | LaneBitmask(0x000000000000C000), // dsub_6 |
| 4004 | LaneBitmask(0x0000000000030000), // dsub_7 |
| 4005 | LaneBitmask(0x0000000000000001), // gsub_0 |
| 4006 | LaneBitmask(0x0000000000000002), // gsub_1 |
| 4007 | LaneBitmask(0x00000000000003FC), // qqsub_0 |
| 4008 | LaneBitmask(0x000000000003FC00), // qqsub_1 |
| 4009 | LaneBitmask(0x000000000000003C), // qsub_0 |
| 4010 | LaneBitmask(0x00000000000003C0), // qsub_1 |
| 4011 | LaneBitmask(0x0000000000003C00), // qsub_2 |
| 4012 | LaneBitmask(0x000000000003C000), // qsub_3 |
| 4013 | LaneBitmask(0x0000000000000004), // ssub_0 |
| 4014 | LaneBitmask(0x0000000000000008), // ssub_1 |
| 4015 | LaneBitmask(0x0000000000000010), // ssub_2 |
| 4016 | LaneBitmask(0x0000000000000020), // ssub_3 |
| 4017 | LaneBitmask(0x0000000000000040), // ssub_4 |
| 4018 | LaneBitmask(0x0000000000000080), // ssub_5 |
| 4019 | LaneBitmask(0x0000000000000100), // ssub_6 |
| 4020 | LaneBitmask(0x0000000000000200), // ssub_7 |
| 4021 | LaneBitmask(0x0000000000000400), // ssub_8 |
| 4022 | LaneBitmask(0x0000000000000800), // ssub_9 |
| 4023 | LaneBitmask(0x0000000000001000), // ssub_10 |
| 4024 | LaneBitmask(0x0000000000002000), // ssub_11 |
| 4025 | LaneBitmask(0x0000000000004000), // ssub_12 |
| 4026 | LaneBitmask(0x0000000000008000), // ssub_13 |
| 4027 | LaneBitmask(0x0000000000010000), // ssub_14 |
| 4028 | LaneBitmask(0x0000000000020000), // ssub_15 |
| 4029 | LaneBitmask(0x00000000000000CC), // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4030 | LaneBitmask(0x00000000000000FC), // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4031 | LaneBitmask(0x0000000000000330), // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4032 | LaneBitmask(0x00000000000003F0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4033 | LaneBitmask(0x00000000000000F0), // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4034 | LaneBitmask(0x0000000000000CCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4035 | LaneBitmask(0x000000000000CCCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4036 | LaneBitmask(0x0000000000003330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4037 | LaneBitmask(0x0000000000033330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 4038 | LaneBitmask(0x0000000000000FF0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4039 | LaneBitmask(0x0000000000000CC0), // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4040 | LaneBitmask(0x0000000000000FC0), // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4041 | LaneBitmask(0x000000000000CCC0), // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4042 | LaneBitmask(0x0000000000003300), // ssub_6_ssub_7_dsub_5 |
| 4043 | LaneBitmask(0x0000000000003F00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4044 | LaneBitmask(0x0000000000033300), // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4045 | LaneBitmask(0x0000000000000F00), // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4046 | LaneBitmask(0x000000000000FF00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4047 | LaneBitmask(0x000000000000CC00), // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4048 | LaneBitmask(0x000000000000FC00), // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4049 | LaneBitmask(0x0000000000033000), // dsub_5_dsub_7 |
| 4050 | LaneBitmask(0x000000000003F000), // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4051 | LaneBitmask(0x000000000000F000), // dsub_5_ssub_12_ssub_13 |
| 4052 | LaneBitmask(0x0000000000003FC0), // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 4053 | }; |
| 4054 | |
| 4055 | |
| 4056 | |
| 4057 | static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = { |
| 4058 | // Mode = 0 (Default) |
| 4059 | { 16, 16, 32, /*VTLists+*/2 }, // HPR |
| 4060 | { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR |
| 4061 | { 32, 32, 32, /*VTLists+*/5 }, // SPR |
| 4062 | { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR_with_ssub_0 |
| 4063 | { 32, 32, 32, /*VTLists+*/0 }, // GPR |
| 4064 | { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSR |
| 4065 | { 32, 32, 32, /*VTLists+*/0 }, // GPRwithZR |
| 4066 | { 32, 32, 32, /*VTLists+*/5 }, // SPR_8 |
| 4067 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc |
| 4068 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp |
| 4069 | { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSR_NZCVnosp |
| 4070 | { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSRnosp |
| 4071 | { 32, 32, 32, /*VTLists+*/0 }, // GPRwithZRnosp |
| 4072 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip |
| 4073 | { 32, 32, 32, /*VTLists+*/0 }, // rGPR |
| 4074 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRnopc |
| 4075 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRnosp |
| 4076 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 4077 | { 32, 32, 32, /*VTLists+*/0 }, // tGPRwithpc |
| 4078 | { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 4079 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR |
| 4080 | { 32, 32, 32, /*VTLists+*/0 }, // tGPR |
| 4081 | { 32, 32, 32, /*VTLists+*/0 }, // tGPREven |
| 4082 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc_and_hGPR |
| 4083 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_hGPR |
| 4084 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_hGPR |
| 4085 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_tGPREven |
| 4086 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnopc_and_hGPR |
| 4087 | { 32, 32, 32, /*VTLists+*/0 }, // tGPROdd |
| 4088 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc_and_GPRnoip_and_hGPR |
| 4089 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnoip_and_hGPR |
| 4090 | { 32, 32, 32, /*VTLists+*/0 }, // tcGPR |
| 4091 | { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 4092 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPREven |
| 4093 | { 32, 32, 32, /*VTLists+*/0 }, // tGPR_and_tGPREven |
| 4094 | { 32, 32, 32, /*VTLists+*/0 }, // tGPR_and_tGPROdd |
| 4095 | { 32, 32, 32, /*VTLists+*/0 }, // tcGPRnotr12 |
| 4096 | { 32, 32, 32, /*VTLists+*/0 }, // tGPREven_and_tcGPR |
| 4097 | { 32, 32, 32, /*VTLists+*/0 }, // FP_STATUS_REGS |
| 4098 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_GPRnoip_and_tGPREven |
| 4099 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPROdd |
| 4100 | { 32, 32, 32, /*VTLists+*/0 }, // tGPREven_and_tcGPRnotr12 |
| 4101 | { 32, 32, 32, /*VTLists+*/0 }, // tGPROdd_and_tcGPR |
| 4102 | { 32, 32, 32, /*VTLists+*/0 }, // CCR |
| 4103 | { 32, 32, 32, /*VTLists+*/0 }, // FPCXTRegs |
| 4104 | { 32, 32, 32, /*VTLists+*/0 }, // GPRlr |
| 4105 | { 32, 32, 32, /*VTLists+*/0 }, // GPRsp |
| 4106 | { 32, 32, 32, /*VTLists+*/7 }, // VCCR |
| 4107 | { 32, 32, 32, /*VTLists+*/0 }, // cl_FPSCR_NZCV |
| 4108 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPRwithpc |
| 4109 | { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tcGPR |
| 4110 | { 64, 64, 64, /*VTLists+*/27 }, // DPR |
| 4111 | { 64, 64, 64, /*VTLists+*/27 }, // DPR_VFP2 |
| 4112 | { 64, 64, 64, /*VTLists+*/27 }, // DPR_8 |
| 4113 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair |
| 4114 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPairnosp |
| 4115 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tGPR |
| 4116 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_hGPR |
| 4117 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tcGPR |
| 4118 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 4119 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 4120 | { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_1_in_GPRsp |
| 4121 | { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc |
| 4122 | { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_ssub_0 |
| 4123 | { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_ssub_4 |
| 4124 | { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_dsub_0_in_DPR_8 |
| 4125 | { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_dsub_2_in_DPR_8 |
| 4126 | { 128, 128, 128, /*VTLists+*/45 }, // DPair |
| 4127 | { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_ssub_0 |
| 4128 | { 128, 128, 128, /*VTLists+*/36 }, // QPR |
| 4129 | { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_ssub_2 |
| 4130 | { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_dsub_0_in_DPR_8 |
| 4131 | { 128, 128, 128, /*VTLists+*/19 }, // MQPR |
| 4132 | { 128, 128, 128, /*VTLists+*/45 }, // QPR_VFP2 |
| 4133 | { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_dsub_1_in_DPR_8 |
| 4134 | { 128, 128, 128, /*VTLists+*/45 }, // QPR_8 |
| 4135 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple |
| 4136 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc |
| 4137 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_0 |
| 4138 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_0 |
| 4139 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_QPR |
| 4140 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2 |
| 4141 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 4142 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_4 |
| 4143 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_4 |
| 4144 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_8 |
| 4145 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_0_in_DPR_8 |
| 4146 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_0_in_DPR_8 |
| 4147 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_MQPR |
| 4148 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 4149 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_1_in_DPR_8 |
| 4150 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 4151 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 4152 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_2_in_DPR_8 |
| 4153 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_2_in_DPR_8 |
| 4154 | { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_4_in_DPR_8 |
| 4155 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 4156 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_QPR_8 |
| 4157 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 4158 | { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 4159 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc |
| 4160 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_0 |
| 4161 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_4 |
| 4162 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_8 |
| 4163 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_0_in_DPR_8 |
| 4164 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_2_in_DPR_8 |
| 4165 | { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_4_in_DPR_8 |
| 4166 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad |
| 4167 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_0 |
| 4168 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2 |
| 4169 | { 256, 256, 256, /*VTLists+*/15 }, // QQPR |
| 4170 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 4171 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_4 |
| 4172 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_6 |
| 4173 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_0_in_DPR_8 |
| 4174 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 4175 | { 256, 256, 256, /*VTLists+*/15 }, // QQPR_with_ssub_0 |
| 4176 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_1_in_DPR_8 |
| 4177 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 4178 | { 256, 256, 256, /*VTLists+*/15 }, // MQQPR |
| 4179 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_2_in_DPR_8 |
| 4180 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 4181 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_3_in_DPR_8 |
| 4182 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 4183 | { 256, 256, 256, /*VTLists+*/15 }, // MQQPR_with_qsub_0_in_QPR_8 |
| 4184 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 4185 | { 256, 256, 256, /*VTLists+*/15 }, // MQQPR_with_dsub_2_in_DPR_8 |
| 4186 | { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 4187 | { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR |
| 4188 | { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_0 |
| 4189 | { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_4 |
| 4190 | { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_8 |
| 4191 | { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR |
| 4192 | { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 4193 | { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 4194 | { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_qsub_2_in_QPR_8 |
| 4195 | { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 4196 | }; |
| 4197 | static const uint32_t HPRSubClassMask[] = { |
| 4198 | 0x00000085, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 4199 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_0 |
| 4200 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_1 |
| 4201 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_2 |
| 4202 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_3 |
| 4203 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_4 |
| 4204 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_5 |
| 4205 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_6 |
| 4206 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_7 |
| 4207 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_8 |
| 4208 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_9 |
| 4209 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_10 |
| 4210 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_11 |
| 4211 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_12 |
| 4212 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_13 |
| 4213 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_14 |
| 4214 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_15 |
| 4215 | }; |
| 4216 | |
| 4217 | static const uint32_t FPWithVPRSubClassMask[] = { |
| 4218 | 0x0008008e, 0x00388000, 0x00000000, 0x00000000, 0x00000000, |
| 4219 | 0x00000000, 0xc0000000, 0xffffffff, 0xffffffff, 0x000001ff, // dsub_0 |
| 4220 | 0x00000000, 0x00000000, 0x5f979ff8, 0xfffff80f, 0x000001ff, // dsub_1 |
| 4221 | 0x00000000, 0xc0000000, 0xfffff007, 0xffffffff, 0x000001ff, // dsub_2 |
| 4222 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // dsub_3 |
| 4223 | 0x00000000, 0x00000000, 0xa0686000, 0x000007f0, 0x000001ff, // dsub_4 |
| 4224 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5 |
| 4225 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_6 |
| 4226 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_7 |
| 4227 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_0 |
| 4228 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_1 |
| 4229 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_2 |
| 4230 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_3 |
| 4231 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_4 |
| 4232 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_5 |
| 4233 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_6 |
| 4234 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_7 |
| 4235 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_8 |
| 4236 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_9 |
| 4237 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_10 |
| 4238 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_11 |
| 4239 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_12 |
| 4240 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_13 |
| 4241 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_14 |
| 4242 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_15 |
| 4243 | }; |
| 4244 | |
| 4245 | static const uint32_t SPRSubClassMask[] = { |
| 4246 | 0x00000084, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 4247 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_0 |
| 4248 | 0x00080008, 0x80300000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // ssub_1 |
| 4249 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_2 |
| 4250 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // ssub_3 |
| 4251 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_4 |
| 4252 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // ssub_5 |
| 4253 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_6 |
| 4254 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_7 |
| 4255 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_8 |
| 4256 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_9 |
| 4257 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_10 |
| 4258 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_11 |
| 4259 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_12 |
| 4260 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_13 |
| 4261 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_14 |
| 4262 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_15 |
| 4263 | }; |
| 4264 | |
| 4265 | static const uint32_t FPWithVPR_with_ssub_0SubClassMask[] = { |
| 4266 | 0x00080008, 0x00300000, 0x00000000, 0x00000000, 0x00000000, |
| 4267 | 0x00000000, 0x80000000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // dsub_0 |
| 4268 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // dsub_1 |
| 4269 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // dsub_2 |
| 4270 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // dsub_3 |
| 4271 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // dsub_4 |
| 4272 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5 |
| 4273 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_6 |
| 4274 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_7 |
| 4275 | }; |
| 4276 | |
| 4277 | static const uint32_t GPRSubClassMask[] = { |
| 4278 | 0xfff7e310, 0x000667bf, 0x00000000, 0x00000000, 0x00000000, |
| 4279 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4280 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4281 | }; |
| 4282 | |
| 4283 | static const uint32_t GPRwithAPSRSubClassMask[] = { |
| 4284 | 0xbce2c520, 0x000467bf, 0x00000000, 0x00000000, 0x00000000, |
| 4285 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4286 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4287 | }; |
| 4288 | |
| 4289 | static const uint32_t GPRwithZRSubClassMask[] = { |
| 4290 | 0xbce2d140, 0x000467bf, 0x00000000, 0x00000000, 0x00000000, |
| 4291 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4292 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4293 | }; |
| 4294 | |
| 4295 | static const uint32_t SPR_8SubClassMask[] = { |
| 4296 | 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 4297 | 0x00080000, 0x00200000, 0xe4c00c86, 0xfd24070f, 0x000001e0, // ssub_0 |
| 4298 | 0x00080000, 0x00200000, 0xe4c00c86, 0xfd24070f, 0x000001e0, // ssub_1 |
| 4299 | 0x00000000, 0x00000000, 0x44000c00, 0xf520000e, 0x000001e0, // ssub_2 |
| 4300 | 0x00000000, 0x00000000, 0x44000c00, 0xf520000e, 0x000001e0, // ssub_3 |
| 4301 | 0x00000000, 0x00000000, 0xe0000004, 0xe500060c, 0x000001c0, // ssub_4 |
| 4302 | 0x00000000, 0x00000000, 0xe0000004, 0xe500060c, 0x000001c0, // ssub_5 |
| 4303 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // ssub_6 |
| 4304 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // ssub_7 |
| 4305 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000180, // ssub_8 |
| 4306 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000180, // ssub_9 |
| 4307 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_10 |
| 4308 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_11 |
| 4309 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_12 |
| 4310 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_13 |
| 4311 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_14 |
| 4312 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_15 |
| 4313 | }; |
| 4314 | |
| 4315 | static const uint32_t GPRnopcSubClassMask[] = { |
| 4316 | 0xbce2c100, 0x000467bf, 0x00000000, 0x00000000, 0x00000000, |
| 4317 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4318 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4319 | }; |
| 4320 | |
| 4321 | static const uint32_t GPRnospSubClassMask[] = { |
| 4322 | 0xdd674200, 0x000627bf, 0x00000000, 0x00000000, 0x00000000, |
| 4323 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4324 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4325 | }; |
| 4326 | |
| 4327 | static const uint32_t GPRwithAPSR_NZCVnospSubClassMask[] = { |
| 4328 | 0x9c624400, 0x000427bf, 0x00000000, 0x00000000, 0x00000000, |
| 4329 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4330 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4331 | }; |
| 4332 | |
| 4333 | static const uint32_t GPRwithAPSRnospSubClassMask[] = { |
| 4334 | 0x9c624800, 0x000427bf, 0x00000000, 0x00000000, 0x00000000, |
| 4335 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4336 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4337 | }; |
| 4338 | |
| 4339 | static const uint32_t GPRwithZRnospSubClassMask[] = { |
| 4340 | 0x9c625000, 0x000427bf, 0x00000000, 0x00000000, 0x00000000, |
| 4341 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4342 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4343 | }; |
| 4344 | |
| 4345 | static const uint32_t GPRnoipSubClassMask[] = { |
| 4346 | 0x7627a000, 0x0002479d, 0x00000000, 0x00000000, 0x00000000, |
| 4347 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4348 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4349 | }; |
| 4350 | |
| 4351 | static const uint32_t rGPRSubClassMask[] = { |
| 4352 | 0x9c624000, 0x000427bf, 0x00000000, 0x00000000, 0x00000000, |
| 4353 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4354 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4355 | }; |
| 4356 | |
| 4357 | static const uint32_t GPRnoip_and_GPRnopcSubClassMask[] = { |
| 4358 | 0x34228000, 0x0000479d, 0x00000000, 0x00000000, 0x00000000, |
| 4359 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4360 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4361 | }; |
| 4362 | |
| 4363 | static const uint32_t GPRnoip_and_GPRnospSubClassMask[] = { |
| 4364 | 0x54270000, 0x0002079d, 0x00000000, 0x00000000, 0x00000000, |
| 4365 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4366 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4367 | }; |
| 4368 | |
| 4369 | static const uint32_t GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask[] = { |
| 4370 | 0x14220000, 0x0000079d, 0x00000000, 0x00000000, 0x00000000, |
| 4371 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4372 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4373 | }; |
| 4374 | |
| 4375 | static const uint32_t tGPRwithpcSubClassMask[] = { |
| 4376 | 0x00240000, 0x0002061c, 0x00000000, 0x00000000, 0x00000000, |
| 4377 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4378 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4379 | }; |
| 4380 | |
| 4381 | static const uint32_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask[] = { |
| 4382 | 0x00080000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, |
| 4383 | 0x00000000, 0x00000000, 0xe4c00c86, 0xfd24070f, 0x000001e0, // dsub_0 |
| 4384 | 0x00000000, 0x00000000, 0x44000c00, 0xf520000e, 0x000001e0, // dsub_1 |
| 4385 | 0x00000000, 0x00000000, 0xe0000004, 0xe500060c, 0x000001c0, // dsub_2 |
| 4386 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // dsub_3 |
| 4387 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000180, // dsub_4 |
| 4388 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5 |
| 4389 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_6 |
| 4390 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_7 |
| 4391 | }; |
| 4392 | |
| 4393 | static const uint32_t hGPRSubClassMask[] = { |
| 4394 | 0x6b900000, 0x00066183, 0x00000000, 0x00000000, 0x00000000, |
| 4395 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4396 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4397 | }; |
| 4398 | |
| 4399 | static const uint32_t tGPRSubClassMask[] = { |
| 4400 | 0x00200000, 0x0000061c, 0x00000000, 0x00000000, 0x00000000, |
| 4401 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4402 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4403 | }; |
| 4404 | |
| 4405 | static const uint32_t tGPREvenSubClassMask[] = { |
| 4406 | 0x04400000, 0x000422a6, 0x00000000, 0x00000000, 0x00000000, |
| 4407 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4408 | }; |
| 4409 | |
| 4410 | static const uint32_t GPRnopc_and_hGPRSubClassMask[] = { |
| 4411 | 0x28800000, 0x00046183, 0x00000000, 0x00000000, 0x00000000, |
| 4412 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4413 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4414 | }; |
| 4415 | |
| 4416 | static const uint32_t GPRnosp_and_hGPRSubClassMask[] = { |
| 4417 | 0x49000000, 0x00062183, 0x00000000, 0x00000000, 0x00000000, |
| 4418 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4419 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4420 | }; |
| 4421 | |
| 4422 | static const uint32_t GPRnoip_and_hGPRSubClassMask[] = { |
| 4423 | 0x62000000, 0x00024181, 0x00000000, 0x00000000, 0x00000000, |
| 4424 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4425 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4426 | }; |
| 4427 | |
| 4428 | static const uint32_t GPRnoip_and_tGPREvenSubClassMask[] = { |
| 4429 | 0x04000000, 0x00000284, 0x00000000, 0x00000000, 0x00000000, |
| 4430 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4431 | }; |
| 4432 | |
| 4433 | static const uint32_t GPRnosp_and_GPRnopc_and_hGPRSubClassMask[] = { |
| 4434 | 0x08000000, 0x00042183, 0x00000000, 0x00000000, 0x00000000, |
| 4435 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4436 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4437 | }; |
| 4438 | |
| 4439 | static const uint32_t tGPROddSubClassMask[] = { |
| 4440 | 0x10000000, 0x00000508, 0x00000000, 0x00000000, 0x00000000, |
| 4441 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4442 | }; |
| 4443 | |
| 4444 | static const uint32_t GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 4445 | 0x20000000, 0x00004181, 0x00000000, 0x00000000, 0x00000000, |
| 4446 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4447 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4448 | }; |
| 4449 | |
| 4450 | static const uint32_t GPRnosp_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 4451 | 0x40000000, 0x00020181, 0x00000000, 0x00000000, 0x00000000, |
| 4452 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4453 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4454 | }; |
| 4455 | |
| 4456 | static const uint32_t tcGPRSubClassMask[] = { |
| 4457 | 0x80000000, 0x00040630, 0x00000000, 0x00000000, 0x00000000, |
| 4458 | 0x00000000, 0x2c000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4459 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4460 | }; |
| 4461 | |
| 4462 | static const uint32_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 4463 | 0x00000000, 0x00000181, 0x00000000, 0x00000000, 0x00000000, |
| 4464 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4465 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4466 | }; |
| 4467 | |
| 4468 | static const uint32_t hGPR_and_tGPREvenSubClassMask[] = { |
| 4469 | 0x00000000, 0x00042082, 0x00000000, 0x00000000, 0x00000000, |
| 4470 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4471 | }; |
| 4472 | |
| 4473 | static const uint32_t tGPR_and_tGPREvenSubClassMask[] = { |
| 4474 | 0x00000000, 0x00000204, 0x00000000, 0x00000000, 0x00000000, |
| 4475 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4476 | }; |
| 4477 | |
| 4478 | static const uint32_t tGPR_and_tGPROddSubClassMask[] = { |
| 4479 | 0x00000000, 0x00000408, 0x00000000, 0x00000000, 0x00000000, |
| 4480 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4481 | }; |
| 4482 | |
| 4483 | static const uint32_t tcGPRnotr12SubClassMask[] = { |
| 4484 | 0x00000000, 0x00000610, 0x00000000, 0x00000000, 0x00000000, |
| 4485 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4486 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4487 | }; |
| 4488 | |
| 4489 | static const uint32_t tGPREven_and_tcGPRSubClassMask[] = { |
| 4490 | 0x00000000, 0x00040220, 0x00000000, 0x00000000, 0x00000000, |
| 4491 | 0x00000000, 0x2c000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4492 | }; |
| 4493 | |
| 4494 | static const uint32_t FP_STATUS_REGSSubClassMask[] = { |
| 4495 | 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, |
| 4496 | }; |
| 4497 | |
| 4498 | static const uint32_t hGPR_and_GPRnoip_and_tGPREvenSubClassMask[] = { |
| 4499 | 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, |
| 4500 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4501 | }; |
| 4502 | |
| 4503 | static const uint32_t hGPR_and_tGPROddSubClassMask[] = { |
| 4504 | 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, |
| 4505 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4506 | }; |
| 4507 | |
| 4508 | static const uint32_t tGPREven_and_tcGPRnotr12SubClassMask[] = { |
| 4509 | 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000, |
| 4510 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4511 | }; |
| 4512 | |
| 4513 | static const uint32_t tGPROdd_and_tcGPRSubClassMask[] = { |
| 4514 | 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, |
| 4515 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4516 | }; |
| 4517 | |
| 4518 | static const uint32_t CCRSubClassMask[] = { |
| 4519 | 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, |
| 4520 | }; |
| 4521 | |
| 4522 | static const uint32_t FPCXTRegsSubClassMask[] = { |
| 4523 | 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, |
| 4524 | }; |
| 4525 | |
| 4526 | static const uint32_t GPRlrSubClassMask[] = { |
| 4527 | 0x00000000, 0x00002000, 0x00000000, 0x00000000, 0x00000000, |
| 4528 | }; |
| 4529 | |
| 4530 | static const uint32_t GPRspSubClassMask[] = { |
| 4531 | 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, |
| 4532 | 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| 4533 | }; |
| 4534 | |
| 4535 | static const uint32_t VCCRSubClassMask[] = { |
| 4536 | 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000, |
| 4537 | }; |
| 4538 | |
| 4539 | static const uint32_t cl_FPSCR_NZCVSubClassMask[] = { |
| 4540 | 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, |
| 4541 | }; |
| 4542 | |
| 4543 | static const uint32_t hGPR_and_tGPRwithpcSubClassMask[] = { |
| 4544 | 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000, |
| 4545 | }; |
| 4546 | |
| 4547 | static const uint32_t hGPR_and_tcGPRSubClassMask[] = { |
| 4548 | 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, |
| 4549 | 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 4550 | }; |
| 4551 | |
| 4552 | static const uint32_t DPRSubClassMask[] = { |
| 4553 | 0x00000000, 0x00380000, 0x00000000, 0x00000000, 0x00000000, |
| 4554 | 0x00000000, 0xc0000000, 0xffffffff, 0xffffffff, 0x000001ff, // dsub_0 |
| 4555 | 0x00000000, 0x00000000, 0x5f979ff8, 0xfffff80f, 0x000001ff, // dsub_1 |
| 4556 | 0x00000000, 0xc0000000, 0xfffff007, 0xffffffff, 0x000001ff, // dsub_2 |
| 4557 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // dsub_3 |
| 4558 | 0x00000000, 0x00000000, 0xa0686000, 0x000007f0, 0x000001ff, // dsub_4 |
| 4559 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5 |
| 4560 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_6 |
| 4561 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_7 |
| 4562 | }; |
| 4563 | |
| 4564 | static const uint32_t DPR_VFP2SubClassMask[] = { |
| 4565 | 0x00000000, 0x00300000, 0x00000000, 0x00000000, 0x00000000, |
| 4566 | 0x00000000, 0x80000000, 0xfffacfd7, 0xffff37ef, 0x000001fe, // dsub_0 |
| 4567 | 0x00000000, 0x00000000, 0x5d920fc0, 0xfff7200f, 0x000001fe, // dsub_1 |
| 4568 | 0x00000000, 0x00000000, 0xfcf80007, 0xffe707cf, 0x000001fc, // dsub_2 |
| 4569 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // dsub_3 |
| 4570 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // dsub_4 |
| 4571 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5 |
| 4572 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_6 |
| 4573 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_7 |
| 4574 | }; |
| 4575 | |
| 4576 | static const uint32_t DPR_8SubClassMask[] = { |
| 4577 | 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, |
| 4578 | 0x00000000, 0x00000000, 0xe4c00c86, 0xfd24070f, 0x000001e0, // dsub_0 |
| 4579 | 0x00000000, 0x00000000, 0x44000c00, 0xf520000e, 0x000001e0, // dsub_1 |
| 4580 | 0x00000000, 0x00000000, 0xe0000004, 0xe500060c, 0x000001c0, // dsub_2 |
| 4581 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // dsub_3 |
| 4582 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000180, // dsub_4 |
| 4583 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5 |
| 4584 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_6 |
| 4585 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_7 |
| 4586 | }; |
| 4587 | |
| 4588 | static const uint32_t GPRPairSubClassMask[] = { |
| 4589 | 0x00000000, 0x3fc00000, 0x00000000, 0x00000000, 0x00000000, |
| 4590 | }; |
| 4591 | |
| 4592 | static const uint32_t GPRPairnospSubClassMask[] = { |
| 4593 | 0x00000000, 0x19800000, 0x00000000, 0x00000000, 0x00000000, |
| 4594 | }; |
| 4595 | |
| 4596 | static const uint32_t GPRPair_with_gsub_0_in_tGPRSubClassMask[] = { |
| 4597 | 0x00000000, 0x09000000, 0x00000000, 0x00000000, 0x00000000, |
| 4598 | }; |
| 4599 | |
| 4600 | static const uint32_t GPRPair_with_gsub_0_in_hGPRSubClassMask[] = { |
| 4601 | 0x00000000, 0x32000000, 0x00000000, 0x00000000, 0x00000000, |
| 4602 | }; |
| 4603 | |
| 4604 | static const uint32_t GPRPair_with_gsub_0_in_tcGPRSubClassMask[] = { |
| 4605 | 0x00000000, 0x2c000000, 0x00000000, 0x00000000, 0x00000000, |
| 4606 | }; |
| 4607 | |
| 4608 | static const uint32_t GPRPair_with_gsub_0_in_tcGPRnotr12SubClassMask[] = { |
| 4609 | 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, |
| 4610 | }; |
| 4611 | |
| 4612 | static const uint32_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask[] = { |
| 4613 | 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, |
| 4614 | }; |
| 4615 | |
| 4616 | static const uint32_t GPRPair_with_gsub_1_in_GPRspSubClassMask[] = { |
| 4617 | 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, |
| 4618 | }; |
| 4619 | |
| 4620 | static const uint32_t DPairSpcSubClassMask[] = { |
| 4621 | 0x00000000, 0xc0000000, 0x00000007, 0x00000000, 0x00000000, |
| 4622 | 0x00000000, 0x00000000, 0xfffff000, 0xffffffff, 0x000001ff, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4623 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4624 | 0x00000000, 0x00000000, 0xa0686000, 0x000007f0, 0x000001ff, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4625 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4626 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5_dsub_7 |
| 4627 | }; |
| 4628 | |
| 4629 | static const uint32_t DPairSpc_with_ssub_0SubClassMask[] = { |
| 4630 | 0x00000000, 0x80000000, 0x00000007, 0x00000000, 0x00000000, |
| 4631 | 0x00000000, 0x00000000, 0xfffac000, 0xffff37ef, 0x000001fe, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4632 | 0x00000000, 0x00000000, 0x00000000, 0xfff72000, 0x000001fe, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4633 | 0x00000000, 0x00000000, 0xa0680000, 0x000007c0, 0x000001fc, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4634 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4635 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5_dsub_7 |
| 4636 | }; |
| 4637 | |
| 4638 | static const uint32_t DPairSpc_with_ssub_4SubClassMask[] = { |
| 4639 | 0x00000000, 0x00000000, 0x00000007, 0x00000000, 0x00000000, |
| 4640 | 0x00000000, 0x00000000, 0xfcf80000, 0xffe707cf, 0x000001fc, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4641 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4642 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x000001f8, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4643 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4644 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_5_dsub_7 |
| 4645 | }; |
| 4646 | |
| 4647 | static const uint32_t DPairSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 4648 | 0x00000000, 0x00000000, 0x00000006, 0x00000000, 0x00000000, |
| 4649 | 0x00000000, 0x00000000, 0xe4c00000, 0xfd24070f, 0x000001e0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4650 | 0x00000000, 0x00000000, 0x00000000, 0xf5200000, 0x000001e0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4651 | 0x00000000, 0x00000000, 0xa0000000, 0x00000600, 0x000001c0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4652 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4653 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5_dsub_7 |
| 4654 | }; |
| 4655 | |
| 4656 | static const uint32_t DPairSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 4657 | 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, |
| 4658 | 0x00000000, 0x00000000, 0xe0000000, 0xe500060c, 0x000001c0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 4659 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 4660 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000180, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 4661 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 4662 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_5_dsub_7 |
| 4663 | }; |
| 4664 | |
| 4665 | static const uint32_t DPairSubClassMask[] = { |
| 4666 | 0x00000000, 0x00000000, 0x00000ff8, 0x00000000, 0x00000000, |
| 4667 | 0x00000000, 0x00000000, 0x5f979000, 0xfffff80f, 0x000001ff, // qsub_0 |
| 4668 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // qsub_1 |
| 4669 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qsub_2 |
| 4670 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qsub_3 |
| 4671 | 0x00000000, 0x00000000, 0x5f979000, 0xfffff80f, 0x000001ff, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4672 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4673 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5_ssub_12_ssub_13 |
| 4674 | }; |
| 4675 | |
| 4676 | static const uint32_t DPair_with_ssub_0SubClassMask[] = { |
| 4677 | 0x00000000, 0x00000000, 0x00000fd0, 0x00000000, 0x00000000, |
| 4678 | 0x00000000, 0x00000000, 0x5f928000, 0xffff300f, 0x000001fe, // qsub_0 |
| 4679 | 0x00000000, 0x00000000, 0x00000000, 0xffe70000, 0x000001fc, // qsub_1 |
| 4680 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qsub_2 |
| 4681 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qsub_3 |
| 4682 | 0x00000000, 0x00000000, 0x5d920000, 0xfff7200f, 0x000001fe, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4683 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4684 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5_ssub_12_ssub_13 |
| 4685 | }; |
| 4686 | |
| 4687 | static const uint32_t QPRSubClassMask[] = { |
| 4688 | 0x00000000, 0x00000000, 0x00000b20, 0x00000000, 0x00000000, |
| 4689 | 0x00000000, 0x00000000, 0x11010000, 0x50904006, 0x000001ff, // qsub_0 |
| 4690 | 0x00000000, 0x00000000, 0x00000000, 0x50904000, 0x000001ff, // qsub_1 |
| 4691 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qsub_2 |
| 4692 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qsub_3 |
| 4693 | 0x00000000, 0x00000000, 0x0a040000, 0xaa488009, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4694 | }; |
| 4695 | |
| 4696 | static const uint32_t DPair_with_ssub_2SubClassMask[] = { |
| 4697 | 0x00000000, 0x00000000, 0x00000fc0, 0x00000000, 0x00000000, |
| 4698 | 0x00000000, 0x00000000, 0x5d920000, 0xfff7200f, 0x000001fe, // qsub_0 |
| 4699 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // qsub_1 |
| 4700 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qsub_2 |
| 4701 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qsub_3 |
| 4702 | 0x00000000, 0x00000000, 0x5c900000, 0xffe7000f, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4703 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4704 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_5_ssub_12_ssub_13 |
| 4705 | }; |
| 4706 | |
| 4707 | static const uint32_t DPair_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 4708 | 0x00000000, 0x00000000, 0x00000c80, 0x00000000, 0x00000000, |
| 4709 | 0x00000000, 0x00000000, 0x44800000, 0xfd24000f, 0x000001e0, // qsub_0 |
| 4710 | 0x00000000, 0x00000000, 0x00000000, 0xe5000000, 0x000001c0, // qsub_1 |
| 4711 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qsub_2 |
| 4712 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qsub_3 |
| 4713 | 0x00000000, 0x00000000, 0x44000000, 0xf520000e, 0x000001e0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4714 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4715 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5_ssub_12_ssub_13 |
| 4716 | }; |
| 4717 | |
| 4718 | static const uint32_t MQPRSubClassMask[] = { |
| 4719 | 0x00000000, 0x00000000, 0x00000b00, 0x00000000, 0x00000000, |
| 4720 | 0x00000000, 0x00000000, 0x11000000, 0x50900006, 0x000001fe, // qsub_0 |
| 4721 | 0x00000000, 0x00000000, 0x00000000, 0x50800000, 0x000001fc, // qsub_1 |
| 4722 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qsub_2 |
| 4723 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qsub_3 |
| 4724 | 0x00000000, 0x00000000, 0x08000000, 0xaa400009, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4725 | }; |
| 4726 | |
| 4727 | static const uint32_t QPR_VFP2SubClassMask[] = { |
| 4728 | 0x00000000, 0x00000000, 0x00000b00, 0x00000000, 0x00000000, |
| 4729 | 0x00000000, 0x00000000, 0x11000000, 0x50900006, 0x000001fe, // qsub_0 |
| 4730 | 0x00000000, 0x00000000, 0x00000000, 0x50800000, 0x000001fc, // qsub_1 |
| 4731 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qsub_2 |
| 4732 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qsub_3 |
| 4733 | 0x00000000, 0x00000000, 0x08000000, 0xaa400009, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4734 | }; |
| 4735 | |
| 4736 | static const uint32_t DPair_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 4737 | 0x00000000, 0x00000000, 0x00000c00, 0x00000000, 0x00000000, |
| 4738 | 0x00000000, 0x00000000, 0x44000000, 0xf520000e, 0x000001e0, // qsub_0 |
| 4739 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // qsub_1 |
| 4740 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qsub_2 |
| 4741 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qsub_3 |
| 4742 | 0x00000000, 0x00000000, 0x40000000, 0xe500000c, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4743 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 4744 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_5_ssub_12_ssub_13 |
| 4745 | }; |
| 4746 | |
| 4747 | static const uint32_t QPR_8SubClassMask[] = { |
| 4748 | 0x00000000, 0x00000000, 0x00000800, 0x00000000, 0x00000000, |
| 4749 | 0x00000000, 0x00000000, 0x00000000, 0x50000006, 0x000001e0, // qsub_0 |
| 4750 | 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x000001c0, // qsub_1 |
| 4751 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qsub_2 |
| 4752 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qsub_3 |
| 4753 | 0x00000000, 0x00000000, 0x00000000, 0xa0000008, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 4754 | }; |
| 4755 | |
| 4756 | static const uint32_t DTripleSubClassMask[] = { |
| 4757 | 0x00000000, 0x00000000, 0x5f979000, 0x0000000f, 0x00000000, |
| 4758 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4759 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x000001ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4760 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4761 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4762 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4763 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4764 | }; |
| 4765 | |
| 4766 | static const uint32_t DTripleSpcSubClassMask[] = { |
| 4767 | 0x00000000, 0x00000000, 0xa0686000, 0x000007f0, 0x00000000, |
| 4768 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4769 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4770 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4771 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4772 | }; |
| 4773 | |
| 4774 | static const uint32_t DTripleSpc_with_ssub_0SubClassMask[] = { |
| 4775 | 0x00000000, 0x00000000, 0xa0684000, 0x000007e0, 0x00000000, |
| 4776 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4777 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4778 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4779 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4780 | }; |
| 4781 | |
| 4782 | static const uint32_t DTriple_with_ssub_0SubClassMask[] = { |
| 4783 | 0x00000000, 0x00000000, 0x5f928000, 0x0000000f, 0x00000000, |
| 4784 | 0x00000000, 0x00000000, 0x00000000, 0xffff3000, 0x000001fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4785 | 0x00000000, 0x00000000, 0x00000000, 0xfff72000, 0x000001fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4786 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4787 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4788 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4789 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4790 | }; |
| 4791 | |
| 4792 | static const uint32_t DTriple_with_qsub_0_in_QPRSubClassMask[] = { |
| 4793 | 0x00000000, 0x00000000, 0x11010000, 0x00000006, 0x00000000, |
| 4794 | 0x00000000, 0x00000000, 0x00000000, 0x50904000, 0x000001ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4795 | 0x00000000, 0x00000000, 0x00000000, 0xaa488000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4796 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4797 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4798 | }; |
| 4799 | |
| 4800 | static const uint32_t DTriple_with_ssub_2SubClassMask[] = { |
| 4801 | 0x00000000, 0x00000000, 0x5d920000, 0x0000000f, 0x00000000, |
| 4802 | 0x00000000, 0x00000000, 0x00000000, 0xfff72000, 0x000001fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4803 | 0x00000000, 0x00000000, 0x00000000, 0xffe70000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4804 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4805 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4806 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4807 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4808 | }; |
| 4809 | |
| 4810 | static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 4811 | 0x00000000, 0x00000000, 0x0a040000, 0x00000009, 0x00000000, |
| 4812 | 0x00000000, 0x00000000, 0x00000000, 0xaa488000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4813 | 0x00000000, 0x00000000, 0x00000000, 0x50904000, 0x000001ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4814 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4815 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4816 | }; |
| 4817 | |
| 4818 | static const uint32_t DTripleSpc_with_ssub_4SubClassMask[] = { |
| 4819 | 0x00000000, 0x00000000, 0xa0680000, 0x000007c0, 0x00000000, |
| 4820 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4821 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4822 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4823 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4824 | }; |
| 4825 | |
| 4826 | static const uint32_t DTriple_with_ssub_4SubClassMask[] = { |
| 4827 | 0x00000000, 0x00000000, 0x5c900000, 0x0000000f, 0x00000000, |
| 4828 | 0x00000000, 0x00000000, 0x00000000, 0xffe70000, 0x000001fc, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4829 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4830 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4831 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4832 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4833 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4834 | }; |
| 4835 | |
| 4836 | static const uint32_t DTripleSpc_with_ssub_8SubClassMask[] = { |
| 4837 | 0x00000000, 0x00000000, 0xa0600000, 0x00000780, 0x00000000, |
| 4838 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4839 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4840 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4841 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4842 | }; |
| 4843 | |
| 4844 | static const uint32_t DTripleSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 4845 | 0x00000000, 0x00000000, 0xa0400000, 0x00000700, 0x00000000, |
| 4846 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4847 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4848 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4849 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4850 | }; |
| 4851 | |
| 4852 | static const uint32_t DTriple_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 4853 | 0x00000000, 0x00000000, 0x44800000, 0x0000000f, 0x00000000, |
| 4854 | 0x00000000, 0x00000000, 0x00000000, 0xfd240000, 0x000001e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4855 | 0x00000000, 0x00000000, 0x00000000, 0xf5200000, 0x000001e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4856 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4857 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4858 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4859 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4860 | }; |
| 4861 | |
| 4862 | static const uint32_t DTriple_with_qsub_0_in_MQPRSubClassMask[] = { |
| 4863 | 0x00000000, 0x00000000, 0x11000000, 0x00000006, 0x00000000, |
| 4864 | 0x00000000, 0x00000000, 0x00000000, 0x50900000, 0x000001fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4865 | 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4866 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4867 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4868 | }; |
| 4869 | |
| 4870 | static const uint32_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 4871 | 0x00000000, 0x00000000, 0x0a000000, 0x00000009, 0x00000000, |
| 4872 | 0x00000000, 0x00000000, 0x00000000, 0xaa480000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4873 | 0x00000000, 0x00000000, 0x00000000, 0x50900000, 0x000001fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4874 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4875 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4876 | }; |
| 4877 | |
| 4878 | static const uint32_t DTriple_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 4879 | 0x00000000, 0x00000000, 0x44000000, 0x0000000e, 0x00000000, |
| 4880 | 0x00000000, 0x00000000, 0x00000000, 0xf5200000, 0x000001e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4881 | 0x00000000, 0x00000000, 0x00000000, 0xe5000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4882 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4883 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4884 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4885 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4886 | }; |
| 4887 | |
| 4888 | static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 4889 | 0x00000000, 0x00000000, 0x08000000, 0x00000009, 0x00000000, |
| 4890 | 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4891 | 0x00000000, 0x00000000, 0x00000000, 0x50800000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4892 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4893 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4894 | }; |
| 4895 | |
| 4896 | static const uint32_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = { |
| 4897 | 0x00000000, 0x00000000, 0x10000000, 0x00000006, 0x00000000, |
| 4898 | 0x00000000, 0x00000000, 0x00000000, 0x50800000, 0x000001fc, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4899 | 0x00000000, 0x00000000, 0x00000000, 0xaa000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4900 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4901 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4902 | }; |
| 4903 | |
| 4904 | static const uint32_t DTripleSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 4905 | 0x00000000, 0x00000000, 0xa0000000, 0x00000600, 0x00000000, |
| 4906 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4907 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4908 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4909 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4910 | }; |
| 4911 | |
| 4912 | static const uint32_t DTriple_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 4913 | 0x00000000, 0x00000000, 0x40000000, 0x0000000c, 0x00000000, |
| 4914 | 0x00000000, 0x00000000, 0x00000000, 0xe5000000, 0x000001c0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4915 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4916 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4917 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4918 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4919 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4920 | }; |
| 4921 | |
| 4922 | static const uint32_t DTripleSpc_with_dsub_4_in_DPR_8SubClassMask[] = { |
| 4923 | 0x00000000, 0x00000000, 0x80000000, 0x00000400, 0x00000000, |
| 4924 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4925 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4926 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4927 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4928 | }; |
| 4929 | |
| 4930 | static const uint32_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 4931 | 0x00000000, 0x00000000, 0x00000000, 0x00000009, 0x00000000, |
| 4932 | 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4933 | 0x00000000, 0x00000000, 0x00000000, 0x50000000, 0x000001e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4934 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4935 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4936 | }; |
| 4937 | |
| 4938 | static const uint32_t DTriple_with_qsub_0_in_QPR_8SubClassMask[] = { |
| 4939 | 0x00000000, 0x00000000, 0x00000000, 0x00000006, 0x00000000, |
| 4940 | 0x00000000, 0x00000000, 0x00000000, 0x50000000, 0x000001e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4941 | 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4942 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4943 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4944 | }; |
| 4945 | |
| 4946 | static const uint32_t DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 4947 | 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, |
| 4948 | 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x000001c0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4949 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4950 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4951 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 4952 | }; |
| 4953 | |
| 4954 | static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = { |
| 4955 | 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, |
| 4956 | 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 4957 | 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 4958 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 4959 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 4960 | }; |
| 4961 | |
| 4962 | static const uint32_t DQuadSpcSubClassMask[] = { |
| 4963 | 0x00000000, 0x00000000, 0x00000000, 0x000007f0, 0x00000000, |
| 4964 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4965 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4966 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4967 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4968 | }; |
| 4969 | |
| 4970 | static const uint32_t DQuadSpc_with_ssub_0SubClassMask[] = { |
| 4971 | 0x00000000, 0x00000000, 0x00000000, 0x000007e0, 0x00000000, |
| 4972 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4973 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4974 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4975 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4976 | }; |
| 4977 | |
| 4978 | static const uint32_t DQuadSpc_with_ssub_4SubClassMask[] = { |
| 4979 | 0x00000000, 0x00000000, 0x00000000, 0x000007c0, 0x00000000, |
| 4980 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4981 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4982 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4983 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4984 | }; |
| 4985 | |
| 4986 | static const uint32_t DQuadSpc_with_ssub_8SubClassMask[] = { |
| 4987 | 0x00000000, 0x00000000, 0x00000000, 0x00000780, 0x00000000, |
| 4988 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4989 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4990 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4991 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 4992 | }; |
| 4993 | |
| 4994 | static const uint32_t DQuadSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 4995 | 0x00000000, 0x00000000, 0x00000000, 0x00000700, 0x00000000, |
| 4996 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 4997 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 4998 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 4999 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 5000 | }; |
| 5001 | |
| 5002 | static const uint32_t DQuadSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5003 | 0x00000000, 0x00000000, 0x00000000, 0x00000600, 0x00000000, |
| 5004 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 5005 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 5006 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 5007 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 5008 | }; |
| 5009 | |
| 5010 | static const uint32_t DQuadSpc_with_dsub_4_in_DPR_8SubClassMask[] = { |
| 5011 | 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000000, |
| 5012 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 5013 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 5014 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 5015 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 5016 | }; |
| 5017 | |
| 5018 | static const uint32_t DQuadSubClassMask[] = { |
| 5019 | 0x00000000, 0x00000000, 0x00000000, 0xfffff800, 0x00000000, |
| 5020 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qqsub_0 |
| 5021 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qqsub_1 |
| 5022 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5023 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5024 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5025 | }; |
| 5026 | |
| 5027 | static const uint32_t DQuad_with_ssub_0SubClassMask[] = { |
| 5028 | 0x00000000, 0x00000000, 0x00000000, 0xffff3000, 0x00000000, |
| 5029 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // qqsub_0 |
| 5030 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qqsub_1 |
| 5031 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5032 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5033 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5034 | }; |
| 5035 | |
| 5036 | static const uint32_t DQuad_with_ssub_2SubClassMask[] = { |
| 5037 | 0x00000000, 0x00000000, 0x00000000, 0xfff72000, 0x00000000, |
| 5038 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // qqsub_0 |
| 5039 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qqsub_1 |
| 5040 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5042 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5043 | }; |
| 5044 | |
| 5045 | static const uint32_t QQPRSubClassMask[] = { |
| 5046 | 0x00000000, 0x00000000, 0x00000000, 0x50904000, 0x00000000, |
| 5047 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qqsub_0 |
| 5048 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // qqsub_1 |
| 5049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5050 | }; |
| 5051 | |
| 5052 | static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 5053 | 0x00000000, 0x00000000, 0x00000000, 0xaa488000, 0x00000000, |
| 5054 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5055 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5056 | }; |
| 5057 | |
| 5058 | static const uint32_t DQuad_with_ssub_4SubClassMask[] = { |
| 5059 | 0x00000000, 0x00000000, 0x00000000, 0xffe70000, 0x00000000, |
| 5060 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // qqsub_0 |
| 5061 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qqsub_1 |
| 5062 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5063 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5064 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5065 | }; |
| 5066 | |
| 5067 | static const uint32_t DQuad_with_ssub_6SubClassMask[] = { |
| 5068 | 0x00000000, 0x00000000, 0x00000000, 0xffa60000, 0x00000000, |
| 5069 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // qqsub_0 |
| 5070 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qqsub_1 |
| 5071 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5072 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5073 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5074 | }; |
| 5075 | |
| 5076 | static const uint32_t DQuad_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 5077 | 0x00000000, 0x00000000, 0x00000000, 0xfd240000, 0x00000000, |
| 5078 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // qqsub_0 |
| 5079 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qqsub_1 |
| 5080 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5082 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5083 | }; |
| 5084 | |
| 5085 | static const uint32_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 5086 | 0x00000000, 0x00000000, 0x00000000, 0xaa480000, 0x00000000, |
| 5087 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5088 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5089 | }; |
| 5090 | |
| 5091 | static const uint32_t QQPR_with_ssub_0SubClassMask[] = { |
| 5092 | 0x00000000, 0x00000000, 0x00000000, 0x50900000, 0x00000000, |
| 5093 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, // qqsub_0 |
| 5094 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // qqsub_1 |
| 5095 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5096 | }; |
| 5097 | |
| 5098 | static const uint32_t DQuad_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 5099 | 0x00000000, 0x00000000, 0x00000000, 0xf5200000, 0x00000000, |
| 5100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // qqsub_0 |
| 5101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qqsub_1 |
| 5102 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5103 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5104 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5105 | }; |
| 5106 | |
| 5107 | static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 5108 | 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0x00000000, |
| 5109 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5110 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5111 | }; |
| 5112 | |
| 5113 | static const uint32_t MQQPRSubClassMask[] = { |
| 5114 | 0x00000000, 0x00000000, 0x00000000, 0x50800000, 0x00000000, |
| 5115 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, // qqsub_0 |
| 5116 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // qqsub_1 |
| 5117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5118 | }; |
| 5119 | |
| 5120 | static const uint32_t DQuad_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5121 | 0x00000000, 0x00000000, 0x00000000, 0xe5000000, 0x00000000, |
| 5122 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // qqsub_0 |
| 5123 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qqsub_1 |
| 5124 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5125 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5126 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5127 | }; |
| 5128 | |
| 5129 | static const uint32_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 5130 | 0x00000000, 0x00000000, 0x00000000, 0xaa000000, 0x00000000, |
| 5131 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5132 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5133 | }; |
| 5134 | |
| 5135 | static const uint32_t DQuad_with_dsub_3_in_DPR_8SubClassMask[] = { |
| 5136 | 0x00000000, 0x00000000, 0x00000000, 0xc4000000, 0x00000000, |
| 5137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // qqsub_0 |
| 5138 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qqsub_1 |
| 5139 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5140 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5141 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5142 | }; |
| 5143 | |
| 5144 | static const uint32_t DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 5145 | 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x00000000, |
| 5146 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5147 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5148 | }; |
| 5149 | |
| 5150 | static const uint32_t MQQPR_with_qsub_0_in_QPR_8SubClassMask[] = { |
| 5151 | 0x00000000, 0x00000000, 0x00000000, 0x50000000, 0x00000000, |
| 5152 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, // qqsub_0 |
| 5153 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // qqsub_1 |
| 5154 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5155 | }; |
| 5156 | |
| 5157 | static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = { |
| 5158 | 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x00000000, |
| 5159 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5160 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5161 | }; |
| 5162 | |
| 5163 | static const uint32_t MQQPR_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5164 | 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, |
| 5165 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, // qqsub_0 |
| 5166 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // qqsub_1 |
| 5167 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 5168 | }; |
| 5169 | |
| 5170 | static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5171 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, |
| 5172 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 5173 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 5174 | }; |
| 5175 | |
| 5176 | static const uint32_t QQQQPRSubClassMask[] = { |
| 5177 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001ff, |
| 5178 | }; |
| 5179 | |
| 5180 | static const uint32_t QQQQPR_with_ssub_0SubClassMask[] = { |
| 5181 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fe, |
| 5182 | }; |
| 5183 | |
| 5184 | static const uint32_t QQQQPR_with_ssub_4SubClassMask[] = { |
| 5185 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001fc, |
| 5186 | }; |
| 5187 | |
| 5188 | static const uint32_t QQQQPR_with_ssub_8SubClassMask[] = { |
| 5189 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f8, |
| 5190 | }; |
| 5191 | |
| 5192 | static const uint32_t MQQQQPRSubClassMask[] = { |
| 5193 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001f0, |
| 5194 | }; |
| 5195 | |
| 5196 | static const uint32_t MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8SubClassMask[] = { |
| 5197 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001e0, |
| 5198 | }; |
| 5199 | |
| 5200 | static const uint32_t MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5201 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000001c0, |
| 5202 | }; |
| 5203 | |
| 5204 | static const uint32_t MQQQQPR_with_qsub_2_in_QPR_8SubClassMask[] = { |
| 5205 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000180, |
| 5206 | }; |
| 5207 | |
| 5208 | static const uint32_t MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 5209 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, |
| 5210 | }; |
| 5211 | |
| 5212 | static const uint16_t SuperRegIdxSeqs[] = { |
| 5213 | /* 0 */ 1, 2, 3, 4, 5, 6, 7, 8, 0, |
| 5214 | /* 9 */ 9, 0, |
| 5215 | /* 11 */ 9, 10, 0, |
| 5216 | /* 14 */ 1, 2, 3, 4, 5, 6, 7, 8, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 0, |
| 5217 | /* 39 */ 13, 14, 15, 16, 37, 0, |
| 5218 | /* 45 */ 38, 40, 45, 48, 0, |
| 5219 | /* 50 */ 42, 50, 0, |
| 5220 | /* 53 */ 34, 36, 44, 52, 0, |
| 5221 | /* 58 */ 33, 35, 43, 51, 53, 0, |
| 5222 | /* 64 */ 34, 36, 47, 54, 0, |
| 5223 | /* 69 */ 34, 36, 44, 47, 52, 54, 0, |
| 5224 | /* 76 */ 13, 14, 15, 16, 37, 49, 55, 0, |
| 5225 | /* 84 */ 11, 12, 56, 0, |
| 5226 | /* 88 */ 11, 12, 42, 50, 56, 0, |
| 5227 | }; |
| 5228 | |
| 5229 | static unsigned const SPRSuperclasses[] = { |
| 5230 | ARM::HPRRegClassID, |
| 5231 | ARM::FPWithVPRRegClassID, |
| 5232 | }; |
| 5233 | |
| 5234 | static unsigned const FPWithVPR_with_ssub_0Superclasses[] = { |
| 5235 | ARM::FPWithVPRRegClassID, |
| 5236 | }; |
| 5237 | |
| 5238 | static unsigned const SPR_8Superclasses[] = { |
| 5239 | ARM::HPRRegClassID, |
| 5240 | ARM::FPWithVPRRegClassID, |
| 5241 | ARM::SPRRegClassID, |
| 5242 | }; |
| 5243 | |
| 5244 | static unsigned const GPRnopcSuperclasses[] = { |
| 5245 | ARM::GPRRegClassID, |
| 5246 | ARM::GPRwithAPSRRegClassID, |
| 5247 | ARM::GPRwithZRRegClassID, |
| 5248 | }; |
| 5249 | |
| 5250 | static unsigned const GPRnospSuperclasses[] = { |
| 5251 | ARM::GPRRegClassID, |
| 5252 | }; |
| 5253 | |
| 5254 | static unsigned const GPRwithAPSR_NZCVnospSuperclasses[] = { |
| 5255 | ARM::GPRwithAPSRRegClassID, |
| 5256 | }; |
| 5257 | |
| 5258 | static unsigned const GPRwithZRnospSuperclasses[] = { |
| 5259 | ARM::GPRwithZRRegClassID, |
| 5260 | }; |
| 5261 | |
| 5262 | static unsigned const GPRnoipSuperclasses[] = { |
| 5263 | ARM::GPRRegClassID, |
| 5264 | }; |
| 5265 | |
| 5266 | static unsigned const rGPRSuperclasses[] = { |
| 5267 | ARM::GPRRegClassID, |
| 5268 | ARM::GPRwithAPSRRegClassID, |
| 5269 | ARM::GPRwithZRRegClassID, |
| 5270 | ARM::GPRnopcRegClassID, |
| 5271 | ARM::GPRnospRegClassID, |
| 5272 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5273 | ARM::GPRwithAPSRnospRegClassID, |
| 5274 | ARM::GPRwithZRnospRegClassID, |
| 5275 | }; |
| 5276 | |
| 5277 | static unsigned const GPRnoip_and_GPRnopcSuperclasses[] = { |
| 5278 | ARM::GPRRegClassID, |
| 5279 | ARM::GPRwithAPSRRegClassID, |
| 5280 | ARM::GPRwithZRRegClassID, |
| 5281 | ARM::GPRnopcRegClassID, |
| 5282 | ARM::GPRnoipRegClassID, |
| 5283 | }; |
| 5284 | |
| 5285 | static unsigned const GPRnoip_and_GPRnospSuperclasses[] = { |
| 5286 | ARM::GPRRegClassID, |
| 5287 | ARM::GPRnospRegClassID, |
| 5288 | ARM::GPRnoipRegClassID, |
| 5289 | }; |
| 5290 | |
| 5291 | static unsigned const GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses[] = { |
| 5292 | ARM::GPRRegClassID, |
| 5293 | ARM::GPRwithAPSRRegClassID, |
| 5294 | ARM::GPRwithZRRegClassID, |
| 5295 | ARM::GPRnopcRegClassID, |
| 5296 | ARM::GPRnospRegClassID, |
| 5297 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5298 | ARM::GPRwithAPSRnospRegClassID, |
| 5299 | ARM::GPRwithZRnospRegClassID, |
| 5300 | ARM::GPRnoipRegClassID, |
| 5301 | ARM::rGPRRegClassID, |
| 5302 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5303 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5304 | }; |
| 5305 | |
| 5306 | static unsigned const tGPRwithpcSuperclasses[] = { |
| 5307 | ARM::GPRRegClassID, |
| 5308 | ARM::GPRnospRegClassID, |
| 5309 | ARM::GPRnoipRegClassID, |
| 5310 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5311 | }; |
| 5312 | |
| 5313 | static unsigned const FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses[] = { |
| 5314 | ARM::FPWithVPRRegClassID, |
| 5315 | ARM::FPWithVPR_with_ssub_0RegClassID, |
| 5316 | }; |
| 5317 | |
| 5318 | static unsigned const hGPRSuperclasses[] = { |
| 5319 | ARM::GPRRegClassID, |
| 5320 | }; |
| 5321 | |
| 5322 | static unsigned const tGPRSuperclasses[] = { |
| 5323 | ARM::GPRRegClassID, |
| 5324 | ARM::GPRwithAPSRRegClassID, |
| 5325 | ARM::GPRwithZRRegClassID, |
| 5326 | ARM::GPRnopcRegClassID, |
| 5327 | ARM::GPRnospRegClassID, |
| 5328 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5329 | ARM::GPRwithAPSRnospRegClassID, |
| 5330 | ARM::GPRwithZRnospRegClassID, |
| 5331 | ARM::GPRnoipRegClassID, |
| 5332 | ARM::rGPRRegClassID, |
| 5333 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5334 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5335 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5336 | ARM::tGPRwithpcRegClassID, |
| 5337 | }; |
| 5338 | |
| 5339 | static unsigned const tGPREvenSuperclasses[] = { |
| 5340 | ARM::GPRRegClassID, |
| 5341 | ARM::GPRwithAPSRRegClassID, |
| 5342 | ARM::GPRwithZRRegClassID, |
| 5343 | ARM::GPRnopcRegClassID, |
| 5344 | ARM::GPRnospRegClassID, |
| 5345 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5346 | ARM::GPRwithAPSRnospRegClassID, |
| 5347 | ARM::GPRwithZRnospRegClassID, |
| 5348 | ARM::rGPRRegClassID, |
| 5349 | }; |
| 5350 | |
| 5351 | static unsigned const GPRnopc_and_hGPRSuperclasses[] = { |
| 5352 | ARM::GPRRegClassID, |
| 5353 | ARM::GPRwithAPSRRegClassID, |
| 5354 | ARM::GPRwithZRRegClassID, |
| 5355 | ARM::GPRnopcRegClassID, |
| 5356 | ARM::hGPRRegClassID, |
| 5357 | }; |
| 5358 | |
| 5359 | static unsigned const GPRnosp_and_hGPRSuperclasses[] = { |
| 5360 | ARM::GPRRegClassID, |
| 5361 | ARM::GPRnospRegClassID, |
| 5362 | ARM::hGPRRegClassID, |
| 5363 | }; |
| 5364 | |
| 5365 | static unsigned const GPRnoip_and_hGPRSuperclasses[] = { |
| 5366 | ARM::GPRRegClassID, |
| 5367 | ARM::GPRnoipRegClassID, |
| 5368 | ARM::hGPRRegClassID, |
| 5369 | }; |
| 5370 | |
| 5371 | static unsigned const GPRnoip_and_tGPREvenSuperclasses[] = { |
| 5372 | ARM::GPRRegClassID, |
| 5373 | ARM::GPRwithAPSRRegClassID, |
| 5374 | ARM::GPRwithZRRegClassID, |
| 5375 | ARM::GPRnopcRegClassID, |
| 5376 | ARM::GPRnospRegClassID, |
| 5377 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5378 | ARM::GPRwithAPSRnospRegClassID, |
| 5379 | ARM::GPRwithZRnospRegClassID, |
| 5380 | ARM::GPRnoipRegClassID, |
| 5381 | ARM::rGPRRegClassID, |
| 5382 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5383 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5384 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5385 | ARM::tGPREvenRegClassID, |
| 5386 | }; |
| 5387 | |
| 5388 | static unsigned const GPRnosp_and_GPRnopc_and_hGPRSuperclasses[] = { |
| 5389 | ARM::GPRRegClassID, |
| 5390 | ARM::GPRwithAPSRRegClassID, |
| 5391 | ARM::GPRwithZRRegClassID, |
| 5392 | ARM::GPRnopcRegClassID, |
| 5393 | ARM::GPRnospRegClassID, |
| 5394 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5395 | ARM::GPRwithAPSRnospRegClassID, |
| 5396 | ARM::GPRwithZRnospRegClassID, |
| 5397 | ARM::rGPRRegClassID, |
| 5398 | ARM::hGPRRegClassID, |
| 5399 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5400 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5401 | }; |
| 5402 | |
| 5403 | static unsigned const tGPROddSuperclasses[] = { |
| 5404 | ARM::GPRRegClassID, |
| 5405 | ARM::GPRwithAPSRRegClassID, |
| 5406 | ARM::GPRwithZRRegClassID, |
| 5407 | ARM::GPRnopcRegClassID, |
| 5408 | ARM::GPRnospRegClassID, |
| 5409 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5410 | ARM::GPRwithAPSRnospRegClassID, |
| 5411 | ARM::GPRwithZRnospRegClassID, |
| 5412 | ARM::GPRnoipRegClassID, |
| 5413 | ARM::rGPRRegClassID, |
| 5414 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5415 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5416 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5417 | }; |
| 5418 | |
| 5419 | static unsigned const GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = { |
| 5420 | ARM::GPRRegClassID, |
| 5421 | ARM::GPRwithAPSRRegClassID, |
| 5422 | ARM::GPRwithZRRegClassID, |
| 5423 | ARM::GPRnopcRegClassID, |
| 5424 | ARM::GPRnoipRegClassID, |
| 5425 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5426 | ARM::hGPRRegClassID, |
| 5427 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5428 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5429 | }; |
| 5430 | |
| 5431 | static unsigned const GPRnosp_and_GPRnoip_and_hGPRSuperclasses[] = { |
| 5432 | ARM::GPRRegClassID, |
| 5433 | ARM::GPRnospRegClassID, |
| 5434 | ARM::GPRnoipRegClassID, |
| 5435 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5436 | ARM::hGPRRegClassID, |
| 5437 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5438 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5439 | }; |
| 5440 | |
| 5441 | static unsigned const tcGPRSuperclasses[] = { |
| 5442 | ARM::GPRRegClassID, |
| 5443 | ARM::GPRwithAPSRRegClassID, |
| 5444 | ARM::GPRwithZRRegClassID, |
| 5445 | ARM::GPRnopcRegClassID, |
| 5446 | ARM::GPRnospRegClassID, |
| 5447 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5448 | ARM::GPRwithAPSRnospRegClassID, |
| 5449 | ARM::GPRwithZRnospRegClassID, |
| 5450 | ARM::rGPRRegClassID, |
| 5451 | }; |
| 5452 | |
| 5453 | static unsigned const GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = { |
| 5454 | ARM::GPRRegClassID, |
| 5455 | ARM::GPRwithAPSRRegClassID, |
| 5456 | ARM::GPRwithZRRegClassID, |
| 5457 | ARM::GPRnopcRegClassID, |
| 5458 | ARM::GPRnospRegClassID, |
| 5459 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5460 | ARM::GPRwithAPSRnospRegClassID, |
| 5461 | ARM::GPRwithZRnospRegClassID, |
| 5462 | ARM::GPRnoipRegClassID, |
| 5463 | ARM::rGPRRegClassID, |
| 5464 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5465 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5466 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5467 | ARM::hGPRRegClassID, |
| 5468 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5469 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5470 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5471 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5472 | ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5473 | ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, |
| 5474 | }; |
| 5475 | |
| 5476 | static unsigned const hGPR_and_tGPREvenSuperclasses[] = { |
| 5477 | ARM::GPRRegClassID, |
| 5478 | ARM::GPRwithAPSRRegClassID, |
| 5479 | ARM::GPRwithZRRegClassID, |
| 5480 | ARM::GPRnopcRegClassID, |
| 5481 | ARM::GPRnospRegClassID, |
| 5482 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5483 | ARM::GPRwithAPSRnospRegClassID, |
| 5484 | ARM::GPRwithZRnospRegClassID, |
| 5485 | ARM::rGPRRegClassID, |
| 5486 | ARM::hGPRRegClassID, |
| 5487 | ARM::tGPREvenRegClassID, |
| 5488 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5489 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5490 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5491 | }; |
| 5492 | |
| 5493 | static unsigned const tGPR_and_tGPREvenSuperclasses[] = { |
| 5494 | ARM::GPRRegClassID, |
| 5495 | ARM::GPRwithAPSRRegClassID, |
| 5496 | ARM::GPRwithZRRegClassID, |
| 5497 | ARM::GPRnopcRegClassID, |
| 5498 | ARM::GPRnospRegClassID, |
| 5499 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5500 | ARM::GPRwithAPSRnospRegClassID, |
| 5501 | ARM::GPRwithZRnospRegClassID, |
| 5502 | ARM::GPRnoipRegClassID, |
| 5503 | ARM::rGPRRegClassID, |
| 5504 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5505 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5506 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5507 | ARM::tGPRwithpcRegClassID, |
| 5508 | ARM::tGPRRegClassID, |
| 5509 | ARM::tGPREvenRegClassID, |
| 5510 | ARM::GPRnoip_and_tGPREvenRegClassID, |
| 5511 | }; |
| 5512 | |
| 5513 | static unsigned const tGPR_and_tGPROddSuperclasses[] = { |
| 5514 | ARM::GPRRegClassID, |
| 5515 | ARM::GPRwithAPSRRegClassID, |
| 5516 | ARM::GPRwithZRRegClassID, |
| 5517 | ARM::GPRnopcRegClassID, |
| 5518 | ARM::GPRnospRegClassID, |
| 5519 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5520 | ARM::GPRwithAPSRnospRegClassID, |
| 5521 | ARM::GPRwithZRnospRegClassID, |
| 5522 | ARM::GPRnoipRegClassID, |
| 5523 | ARM::rGPRRegClassID, |
| 5524 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5525 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5526 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5527 | ARM::tGPRwithpcRegClassID, |
| 5528 | ARM::tGPRRegClassID, |
| 5529 | ARM::tGPROddRegClassID, |
| 5530 | }; |
| 5531 | |
| 5532 | static unsigned const tcGPRnotr12Superclasses[] = { |
| 5533 | ARM::GPRRegClassID, |
| 5534 | ARM::GPRwithAPSRRegClassID, |
| 5535 | ARM::GPRwithZRRegClassID, |
| 5536 | ARM::GPRnopcRegClassID, |
| 5537 | ARM::GPRnospRegClassID, |
| 5538 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5539 | ARM::GPRwithAPSRnospRegClassID, |
| 5540 | ARM::GPRwithZRnospRegClassID, |
| 5541 | ARM::GPRnoipRegClassID, |
| 5542 | ARM::rGPRRegClassID, |
| 5543 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5544 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5545 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5546 | ARM::tGPRwithpcRegClassID, |
| 5547 | ARM::tGPRRegClassID, |
| 5548 | ARM::tcGPRRegClassID, |
| 5549 | }; |
| 5550 | |
| 5551 | static unsigned const tGPREven_and_tcGPRSuperclasses[] = { |
| 5552 | ARM::GPRRegClassID, |
| 5553 | ARM::GPRwithAPSRRegClassID, |
| 5554 | ARM::GPRwithZRRegClassID, |
| 5555 | ARM::GPRnopcRegClassID, |
| 5556 | ARM::GPRnospRegClassID, |
| 5557 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5558 | ARM::GPRwithAPSRnospRegClassID, |
| 5559 | ARM::GPRwithZRnospRegClassID, |
| 5560 | ARM::rGPRRegClassID, |
| 5561 | ARM::tGPREvenRegClassID, |
| 5562 | ARM::tcGPRRegClassID, |
| 5563 | }; |
| 5564 | |
| 5565 | static unsigned const hGPR_and_GPRnoip_and_tGPREvenSuperclasses[] = { |
| 5566 | ARM::GPRRegClassID, |
| 5567 | ARM::GPRwithAPSRRegClassID, |
| 5568 | ARM::GPRwithZRRegClassID, |
| 5569 | ARM::GPRnopcRegClassID, |
| 5570 | ARM::GPRnospRegClassID, |
| 5571 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5572 | ARM::GPRwithAPSRnospRegClassID, |
| 5573 | ARM::GPRwithZRnospRegClassID, |
| 5574 | ARM::GPRnoipRegClassID, |
| 5575 | ARM::rGPRRegClassID, |
| 5576 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5577 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5578 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5579 | ARM::hGPRRegClassID, |
| 5580 | ARM::tGPREvenRegClassID, |
| 5581 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5582 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5583 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5584 | ARM::GPRnoip_and_tGPREvenRegClassID, |
| 5585 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5586 | ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5587 | ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, |
| 5588 | ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5589 | ARM::hGPR_and_tGPREvenRegClassID, |
| 5590 | }; |
| 5591 | |
| 5592 | static unsigned const hGPR_and_tGPROddSuperclasses[] = { |
| 5593 | ARM::GPRRegClassID, |
| 5594 | ARM::GPRwithAPSRRegClassID, |
| 5595 | ARM::GPRwithZRRegClassID, |
| 5596 | ARM::GPRnopcRegClassID, |
| 5597 | ARM::GPRnospRegClassID, |
| 5598 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5599 | ARM::GPRwithAPSRnospRegClassID, |
| 5600 | ARM::GPRwithZRnospRegClassID, |
| 5601 | ARM::GPRnoipRegClassID, |
| 5602 | ARM::rGPRRegClassID, |
| 5603 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5604 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5605 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5606 | ARM::hGPRRegClassID, |
| 5607 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5608 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5609 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5610 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5611 | ARM::tGPROddRegClassID, |
| 5612 | ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5613 | ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, |
| 5614 | ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5615 | }; |
| 5616 | |
| 5617 | static unsigned const tGPREven_and_tcGPRnotr12Superclasses[] = { |
| 5618 | ARM::GPRRegClassID, |
| 5619 | ARM::GPRwithAPSRRegClassID, |
| 5620 | ARM::GPRwithZRRegClassID, |
| 5621 | ARM::GPRnopcRegClassID, |
| 5622 | ARM::GPRnospRegClassID, |
| 5623 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5624 | ARM::GPRwithAPSRnospRegClassID, |
| 5625 | ARM::GPRwithZRnospRegClassID, |
| 5626 | ARM::GPRnoipRegClassID, |
| 5627 | ARM::rGPRRegClassID, |
| 5628 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5629 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5630 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5631 | ARM::tGPRwithpcRegClassID, |
| 5632 | ARM::tGPRRegClassID, |
| 5633 | ARM::tGPREvenRegClassID, |
| 5634 | ARM::GPRnoip_and_tGPREvenRegClassID, |
| 5635 | ARM::tcGPRRegClassID, |
| 5636 | ARM::tGPR_and_tGPREvenRegClassID, |
| 5637 | ARM::tcGPRnotr12RegClassID, |
| 5638 | ARM::tGPREven_and_tcGPRRegClassID, |
| 5639 | }; |
| 5640 | |
| 5641 | static unsigned const tGPROdd_and_tcGPRSuperclasses[] = { |
| 5642 | ARM::GPRRegClassID, |
| 5643 | ARM::GPRwithAPSRRegClassID, |
| 5644 | ARM::GPRwithZRRegClassID, |
| 5645 | ARM::GPRnopcRegClassID, |
| 5646 | ARM::GPRnospRegClassID, |
| 5647 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5648 | ARM::GPRwithAPSRnospRegClassID, |
| 5649 | ARM::GPRwithZRnospRegClassID, |
| 5650 | ARM::GPRnoipRegClassID, |
| 5651 | ARM::rGPRRegClassID, |
| 5652 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5653 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5654 | ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, |
| 5655 | ARM::tGPRwithpcRegClassID, |
| 5656 | ARM::tGPRRegClassID, |
| 5657 | ARM::tGPROddRegClassID, |
| 5658 | ARM::tcGPRRegClassID, |
| 5659 | ARM::tGPR_and_tGPROddRegClassID, |
| 5660 | ARM::tcGPRnotr12RegClassID, |
| 5661 | }; |
| 5662 | |
| 5663 | static unsigned const GPRlrSuperclasses[] = { |
| 5664 | ARM::GPRRegClassID, |
| 5665 | ARM::GPRwithAPSRRegClassID, |
| 5666 | ARM::GPRwithZRRegClassID, |
| 5667 | ARM::GPRnopcRegClassID, |
| 5668 | ARM::GPRnospRegClassID, |
| 5669 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5670 | ARM::GPRwithAPSRnospRegClassID, |
| 5671 | ARM::GPRwithZRnospRegClassID, |
| 5672 | ARM::rGPRRegClassID, |
| 5673 | ARM::hGPRRegClassID, |
| 5674 | ARM::tGPREvenRegClassID, |
| 5675 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5676 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5677 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5678 | ARM::hGPR_and_tGPREvenRegClassID, |
| 5679 | }; |
| 5680 | |
| 5681 | static unsigned const GPRspSuperclasses[] = { |
| 5682 | ARM::GPRRegClassID, |
| 5683 | ARM::GPRwithAPSRRegClassID, |
| 5684 | ARM::GPRwithZRRegClassID, |
| 5685 | ARM::GPRnopcRegClassID, |
| 5686 | ARM::GPRnoipRegClassID, |
| 5687 | ARM::GPRnoip_and_GPRnopcRegClassID, |
| 5688 | ARM::hGPRRegClassID, |
| 5689 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5690 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5691 | ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, |
| 5692 | }; |
| 5693 | |
| 5694 | static unsigned const VCCRSuperclasses[] = { |
| 5695 | ARM::FPWithVPRRegClassID, |
| 5696 | }; |
| 5697 | |
| 5698 | static unsigned const hGPR_and_tGPRwithpcSuperclasses[] = { |
| 5699 | ARM::GPRRegClassID, |
| 5700 | ARM::GPRnospRegClassID, |
| 5701 | ARM::GPRnoipRegClassID, |
| 5702 | ARM::GPRnoip_and_GPRnospRegClassID, |
| 5703 | ARM::tGPRwithpcRegClassID, |
| 5704 | ARM::hGPRRegClassID, |
| 5705 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5706 | ARM::GPRnoip_and_hGPRRegClassID, |
| 5707 | ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, |
| 5708 | }; |
| 5709 | |
| 5710 | static unsigned const hGPR_and_tcGPRSuperclasses[] = { |
| 5711 | ARM::GPRRegClassID, |
| 5712 | ARM::GPRwithAPSRRegClassID, |
| 5713 | ARM::GPRwithZRRegClassID, |
| 5714 | ARM::GPRnopcRegClassID, |
| 5715 | ARM::GPRnospRegClassID, |
| 5716 | ARM::GPRwithAPSR_NZCVnospRegClassID, |
| 5717 | ARM::GPRwithAPSRnospRegClassID, |
| 5718 | ARM::GPRwithZRnospRegClassID, |
| 5719 | ARM::rGPRRegClassID, |
| 5720 | ARM::hGPRRegClassID, |
| 5721 | ARM::tGPREvenRegClassID, |
| 5722 | ARM::GPRnopc_and_hGPRRegClassID, |
| 5723 | ARM::GPRnosp_and_hGPRRegClassID, |
| 5724 | ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, |
| 5725 | ARM::tcGPRRegClassID, |
| 5726 | ARM::hGPR_and_tGPREvenRegClassID, |
| 5727 | ARM::tGPREven_and_tcGPRRegClassID, |
| 5728 | }; |
| 5729 | |
| 5730 | static unsigned const DPRSuperclasses[] = { |
| 5731 | ARM::FPWithVPRRegClassID, |
| 5732 | }; |
| 5733 | |
| 5734 | static unsigned const DPR_VFP2Superclasses[] = { |
| 5735 | ARM::FPWithVPRRegClassID, |
| 5736 | ARM::FPWithVPR_with_ssub_0RegClassID, |
| 5737 | ARM::DPRRegClassID, |
| 5738 | }; |
| 5739 | |
| 5740 | static unsigned const DPR_8Superclasses[] = { |
| 5741 | ARM::FPWithVPRRegClassID, |
| 5742 | ARM::FPWithVPR_with_ssub_0RegClassID, |
| 5743 | ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID, |
| 5744 | ARM::DPRRegClassID, |
| 5745 | ARM::DPR_VFP2RegClassID, |
| 5746 | }; |
| 5747 | |
| 5748 | static unsigned const GPRPairnospSuperclasses[] = { |
| 5749 | ARM::GPRPairRegClassID, |
| 5750 | }; |
| 5751 | |
| 5752 | static unsigned const GPRPair_with_gsub_0_in_tGPRSuperclasses[] = { |
| 5753 | ARM::GPRPairRegClassID, |
| 5754 | ARM::GPRPairnospRegClassID, |
| 5755 | }; |
| 5756 | |
| 5757 | static unsigned const GPRPair_with_gsub_0_in_hGPRSuperclasses[] = { |
| 5758 | ARM::GPRPairRegClassID, |
| 5759 | }; |
| 5760 | |
| 5761 | static unsigned const GPRPair_with_gsub_0_in_tcGPRSuperclasses[] = { |
| 5762 | ARM::GPRPairRegClassID, |
| 5763 | }; |
| 5764 | |
| 5765 | static unsigned const GPRPair_with_gsub_0_in_tcGPRnotr12Superclasses[] = { |
| 5766 | ARM::GPRPairRegClassID, |
| 5767 | ARM::GPRPairnospRegClassID, |
| 5768 | ARM::GPRPair_with_gsub_0_in_tGPRRegClassID, |
| 5769 | ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, |
| 5770 | }; |
| 5771 | |
| 5772 | static unsigned const GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses[] = { |
| 5773 | ARM::GPRPairRegClassID, |
| 5774 | ARM::GPRPairnospRegClassID, |
| 5775 | ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, |
| 5776 | }; |
| 5777 | |
| 5778 | static unsigned const GPRPair_with_gsub_1_in_GPRspSuperclasses[] = { |
| 5779 | ARM::GPRPairRegClassID, |
| 5780 | ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, |
| 5781 | ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, |
| 5782 | }; |
| 5783 | |
| 5784 | static unsigned const DPairSpc_with_ssub_0Superclasses[] = { |
| 5785 | ARM::DPairSpcRegClassID, |
| 5786 | }; |
| 5787 | |
| 5788 | static unsigned const DPairSpc_with_ssub_4Superclasses[] = { |
| 5789 | ARM::DPairSpcRegClassID, |
| 5790 | ARM::DPairSpc_with_ssub_0RegClassID, |
| 5791 | }; |
| 5792 | |
| 5793 | static unsigned const DPairSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| 5794 | ARM::DPairSpcRegClassID, |
| 5795 | ARM::DPairSpc_with_ssub_0RegClassID, |
| 5796 | ARM::DPairSpc_with_ssub_4RegClassID, |
| 5797 | }; |
| 5798 | |
| 5799 | static unsigned const DPairSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| 5800 | ARM::DPairSpcRegClassID, |
| 5801 | ARM::DPairSpc_with_ssub_0RegClassID, |
| 5802 | ARM::DPairSpc_with_ssub_4RegClassID, |
| 5803 | ARM::DPairSpc_with_dsub_0_in_DPR_8RegClassID, |
| 5804 | }; |
| 5805 | |
| 5806 | static unsigned const DPair_with_ssub_0Superclasses[] = { |
| 5807 | ARM::DPairRegClassID, |
| 5808 | }; |
| 5809 | |
| 5810 | static unsigned const QPRSuperclasses[] = { |
| 5811 | ARM::DPairRegClassID, |
| 5812 | }; |
| 5813 | |
| 5814 | static unsigned const DPair_with_ssub_2Superclasses[] = { |
| 5815 | ARM::DPairRegClassID, |
| 5816 | ARM::DPair_with_ssub_0RegClassID, |
| 5817 | }; |
| 5818 | |
| 5819 | static unsigned const DPair_with_dsub_0_in_DPR_8Superclasses[] = { |
| 5820 | ARM::DPairRegClassID, |
| 5821 | ARM::DPair_with_ssub_0RegClassID, |
| 5822 | ARM::DPair_with_ssub_2RegClassID, |
| 5823 | }; |
| 5824 | |
| 5825 | static unsigned const MQPRSuperclasses[] = { |
| 5826 | ARM::DPairRegClassID, |
| 5827 | ARM::DPair_with_ssub_0RegClassID, |
| 5828 | ARM::QPRRegClassID, |
| 5829 | ARM::DPair_with_ssub_2RegClassID, |
| 5830 | ARM::QPR_VFP2RegClassID, |
| 5831 | }; |
| 5832 | |
| 5833 | static unsigned const QPR_VFP2Superclasses[] = { |
| 5834 | ARM::DPairRegClassID, |
| 5835 | ARM::DPair_with_ssub_0RegClassID, |
| 5836 | ARM::QPRRegClassID, |
| 5837 | ARM::DPair_with_ssub_2RegClassID, |
| 5838 | ARM::MQPRRegClassID, |
| 5839 | }; |
| 5840 | |
| 5841 | static unsigned const DPair_with_dsub_1_in_DPR_8Superclasses[] = { |
| 5842 | ARM::DPairRegClassID, |
| 5843 | ARM::DPair_with_ssub_0RegClassID, |
| 5844 | ARM::DPair_with_ssub_2RegClassID, |
| 5845 | ARM::DPair_with_dsub_0_in_DPR_8RegClassID, |
| 5846 | }; |
| 5847 | |
| 5848 | static unsigned const QPR_8Superclasses[] = { |
| 5849 | ARM::DPairRegClassID, |
| 5850 | ARM::DPair_with_ssub_0RegClassID, |
| 5851 | ARM::QPRRegClassID, |
| 5852 | ARM::DPair_with_ssub_2RegClassID, |
| 5853 | ARM::DPair_with_dsub_0_in_DPR_8RegClassID, |
| 5854 | ARM::MQPRRegClassID, |
| 5855 | ARM::QPR_VFP2RegClassID, |
| 5856 | ARM::DPair_with_dsub_1_in_DPR_8RegClassID, |
| 5857 | }; |
| 5858 | |
| 5859 | static unsigned const DTripleSpc_with_ssub_0Superclasses[] = { |
| 5860 | ARM::DTripleSpcRegClassID, |
| 5861 | }; |
| 5862 | |
| 5863 | static unsigned const DTriple_with_ssub_0Superclasses[] = { |
| 5864 | ARM::DTripleRegClassID, |
| 5865 | }; |
| 5866 | |
| 5867 | static unsigned const DTriple_with_qsub_0_in_QPRSuperclasses[] = { |
| 5868 | ARM::DTripleRegClassID, |
| 5869 | }; |
| 5870 | |
| 5871 | static unsigned const DTriple_with_ssub_2Superclasses[] = { |
| 5872 | ARM::DTripleRegClassID, |
| 5873 | ARM::DTriple_with_ssub_0RegClassID, |
| 5874 | }; |
| 5875 | |
| 5876 | static unsigned const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| 5877 | ARM::DTripleRegClassID, |
| 5878 | }; |
| 5879 | |
| 5880 | static unsigned const DTripleSpc_with_ssub_4Superclasses[] = { |
| 5881 | ARM::DTripleSpcRegClassID, |
| 5882 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 5883 | }; |
| 5884 | |
| 5885 | static unsigned const DTriple_with_ssub_4Superclasses[] = { |
| 5886 | ARM::DTripleRegClassID, |
| 5887 | ARM::DTriple_with_ssub_0RegClassID, |
| 5888 | ARM::DTriple_with_ssub_2RegClassID, |
| 5889 | }; |
| 5890 | |
| 5891 | static unsigned const DTripleSpc_with_ssub_8Superclasses[] = { |
| 5892 | ARM::DTripleSpcRegClassID, |
| 5893 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 5894 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 5895 | }; |
| 5896 | |
| 5897 | static unsigned const DTripleSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| 5898 | ARM::DTripleSpcRegClassID, |
| 5899 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 5900 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 5901 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 5902 | }; |
| 5903 | |
| 5904 | static unsigned const DTriple_with_dsub_0_in_DPR_8Superclasses[] = { |
| 5905 | ARM::DTripleRegClassID, |
| 5906 | ARM::DTriple_with_ssub_0RegClassID, |
| 5907 | ARM::DTriple_with_ssub_2RegClassID, |
| 5908 | ARM::DTriple_with_ssub_4RegClassID, |
| 5909 | }; |
| 5910 | |
| 5911 | static unsigned const DTriple_with_qsub_0_in_MQPRSuperclasses[] = { |
| 5912 | ARM::DTripleRegClassID, |
| 5913 | ARM::DTriple_with_ssub_0RegClassID, |
| 5914 | ARM::DTriple_with_qsub_0_in_QPRRegClassID, |
| 5915 | ARM::DTriple_with_ssub_2RegClassID, |
| 5916 | }; |
| 5917 | |
| 5918 | static unsigned const DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| 5919 | ARM::DTripleRegClassID, |
| 5920 | ARM::DTriple_with_ssub_0RegClassID, |
| 5921 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 5922 | }; |
| 5923 | |
| 5924 | static unsigned const DTriple_with_dsub_1_in_DPR_8Superclasses[] = { |
| 5925 | ARM::DTripleRegClassID, |
| 5926 | ARM::DTriple_with_ssub_0RegClassID, |
| 5927 | ARM::DTriple_with_ssub_2RegClassID, |
| 5928 | ARM::DTriple_with_ssub_4RegClassID, |
| 5929 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 5930 | }; |
| 5931 | |
| 5932 | static unsigned const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| 5933 | ARM::DTripleRegClassID, |
| 5934 | ARM::DTriple_with_ssub_0RegClassID, |
| 5935 | ARM::DTriple_with_ssub_2RegClassID, |
| 5936 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 5937 | ARM::DTriple_with_ssub_4RegClassID, |
| 5938 | ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 5939 | }; |
| 5940 | |
| 5941 | static unsigned const DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses[] = { |
| 5942 | ARM::DTripleRegClassID, |
| 5943 | ARM::DTriple_with_ssub_0RegClassID, |
| 5944 | ARM::DTriple_with_qsub_0_in_QPRRegClassID, |
| 5945 | ARM::DTriple_with_ssub_2RegClassID, |
| 5946 | ARM::DTriple_with_ssub_4RegClassID, |
| 5947 | ARM::DTriple_with_qsub_0_in_MQPRRegClassID, |
| 5948 | }; |
| 5949 | |
| 5950 | static unsigned const DTripleSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| 5951 | ARM::DTripleSpcRegClassID, |
| 5952 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 5953 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 5954 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 5955 | ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, |
| 5956 | }; |
| 5957 | |
| 5958 | static unsigned const DTriple_with_dsub_2_in_DPR_8Superclasses[] = { |
| 5959 | ARM::DTripleRegClassID, |
| 5960 | ARM::DTriple_with_ssub_0RegClassID, |
| 5961 | ARM::DTriple_with_ssub_2RegClassID, |
| 5962 | ARM::DTriple_with_ssub_4RegClassID, |
| 5963 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 5964 | ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, |
| 5965 | }; |
| 5966 | |
| 5967 | static unsigned const DTripleSpc_with_dsub_4_in_DPR_8Superclasses[] = { |
| 5968 | ARM::DTripleSpcRegClassID, |
| 5969 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 5970 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 5971 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 5972 | ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, |
| 5973 | ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, |
| 5974 | }; |
| 5975 | |
| 5976 | static unsigned const DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| 5977 | ARM::DTripleRegClassID, |
| 5978 | ARM::DTriple_with_ssub_0RegClassID, |
| 5979 | ARM::DTriple_with_ssub_2RegClassID, |
| 5980 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 5981 | ARM::DTriple_with_ssub_4RegClassID, |
| 5982 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 5983 | ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 5984 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 5985 | }; |
| 5986 | |
| 5987 | static unsigned const DTriple_with_qsub_0_in_QPR_8Superclasses[] = { |
| 5988 | ARM::DTripleRegClassID, |
| 5989 | ARM::DTriple_with_ssub_0RegClassID, |
| 5990 | ARM::DTriple_with_qsub_0_in_QPRRegClassID, |
| 5991 | ARM::DTriple_with_ssub_2RegClassID, |
| 5992 | ARM::DTriple_with_ssub_4RegClassID, |
| 5993 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 5994 | ARM::DTriple_with_qsub_0_in_MQPRRegClassID, |
| 5995 | ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, |
| 5996 | ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID, |
| 5997 | }; |
| 5998 | |
| 5999 | static unsigned const DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6000 | ARM::DTripleRegClassID, |
| 6001 | ARM::DTriple_with_ssub_0RegClassID, |
| 6002 | ARM::DTriple_with_qsub_0_in_QPRRegClassID, |
| 6003 | ARM::DTriple_with_ssub_2RegClassID, |
| 6004 | ARM::DTriple_with_ssub_4RegClassID, |
| 6005 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 6006 | ARM::DTriple_with_qsub_0_in_MQPRRegClassID, |
| 6007 | ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, |
| 6008 | ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID, |
| 6009 | ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, |
| 6010 | ARM::DTriple_with_qsub_0_in_QPR_8RegClassID, |
| 6011 | }; |
| 6012 | |
| 6013 | static unsigned const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = { |
| 6014 | ARM::DTripleRegClassID, |
| 6015 | ARM::DTriple_with_ssub_0RegClassID, |
| 6016 | ARM::DTriple_with_ssub_2RegClassID, |
| 6017 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6018 | ARM::DTriple_with_ssub_4RegClassID, |
| 6019 | ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, |
| 6020 | ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6021 | ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, |
| 6022 | ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6023 | ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, |
| 6024 | ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6025 | }; |
| 6026 | |
| 6027 | static unsigned const DQuadSpcSuperclasses[] = { |
| 6028 | ARM::DTripleSpcRegClassID, |
| 6029 | }; |
| 6030 | |
| 6031 | static unsigned const DQuadSpc_with_ssub_0Superclasses[] = { |
| 6032 | ARM::DTripleSpcRegClassID, |
| 6033 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6034 | ARM::DQuadSpcRegClassID, |
| 6035 | }; |
| 6036 | |
| 6037 | static unsigned const DQuadSpc_with_ssub_4Superclasses[] = { |
| 6038 | ARM::DTripleSpcRegClassID, |
| 6039 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6040 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 6041 | ARM::DQuadSpcRegClassID, |
| 6042 | ARM::DQuadSpc_with_ssub_0RegClassID, |
| 6043 | }; |
| 6044 | |
| 6045 | static unsigned const DQuadSpc_with_ssub_8Superclasses[] = { |
| 6046 | ARM::DTripleSpcRegClassID, |
| 6047 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6048 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 6049 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 6050 | ARM::DQuadSpcRegClassID, |
| 6051 | ARM::DQuadSpc_with_ssub_0RegClassID, |
| 6052 | ARM::DQuadSpc_with_ssub_4RegClassID, |
| 6053 | }; |
| 6054 | |
| 6055 | static unsigned const DQuadSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| 6056 | ARM::DTripleSpcRegClassID, |
| 6057 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6058 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 6059 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 6060 | ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, |
| 6061 | ARM::DQuadSpcRegClassID, |
| 6062 | ARM::DQuadSpc_with_ssub_0RegClassID, |
| 6063 | ARM::DQuadSpc_with_ssub_4RegClassID, |
| 6064 | ARM::DQuadSpc_with_ssub_8RegClassID, |
| 6065 | }; |
| 6066 | |
| 6067 | static unsigned const DQuadSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6068 | ARM::DTripleSpcRegClassID, |
| 6069 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6070 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 6071 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 6072 | ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, |
| 6073 | ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, |
| 6074 | ARM::DQuadSpcRegClassID, |
| 6075 | ARM::DQuadSpc_with_ssub_0RegClassID, |
| 6076 | ARM::DQuadSpc_with_ssub_4RegClassID, |
| 6077 | ARM::DQuadSpc_with_ssub_8RegClassID, |
| 6078 | ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, |
| 6079 | }; |
| 6080 | |
| 6081 | static unsigned const DQuadSpc_with_dsub_4_in_DPR_8Superclasses[] = { |
| 6082 | ARM::DTripleSpcRegClassID, |
| 6083 | ARM::DTripleSpc_with_ssub_0RegClassID, |
| 6084 | ARM::DTripleSpc_with_ssub_4RegClassID, |
| 6085 | ARM::DTripleSpc_with_ssub_8RegClassID, |
| 6086 | ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, |
| 6087 | ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, |
| 6088 | ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClassID, |
| 6089 | ARM::DQuadSpcRegClassID, |
| 6090 | ARM::DQuadSpc_with_ssub_0RegClassID, |
| 6091 | ARM::DQuadSpc_with_ssub_4RegClassID, |
| 6092 | ARM::DQuadSpc_with_ssub_8RegClassID, |
| 6093 | ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, |
| 6094 | ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClassID, |
| 6095 | }; |
| 6096 | |
| 6097 | static unsigned const DQuad_with_ssub_0Superclasses[] = { |
| 6098 | ARM::DQuadRegClassID, |
| 6099 | }; |
| 6100 | |
| 6101 | static unsigned const DQuad_with_ssub_2Superclasses[] = { |
| 6102 | ARM::DQuadRegClassID, |
| 6103 | ARM::DQuad_with_ssub_0RegClassID, |
| 6104 | }; |
| 6105 | |
| 6106 | static unsigned const QQPRSuperclasses[] = { |
| 6107 | ARM::DQuadRegClassID, |
| 6108 | }; |
| 6109 | |
| 6110 | static unsigned const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| 6111 | ARM::DQuadRegClassID, |
| 6112 | }; |
| 6113 | |
| 6114 | static unsigned const DQuad_with_ssub_4Superclasses[] = { |
| 6115 | ARM::DQuadRegClassID, |
| 6116 | ARM::DQuad_with_ssub_0RegClassID, |
| 6117 | ARM::DQuad_with_ssub_2RegClassID, |
| 6118 | }; |
| 6119 | |
| 6120 | static unsigned const DQuad_with_ssub_6Superclasses[] = { |
| 6121 | ARM::DQuadRegClassID, |
| 6122 | ARM::DQuad_with_ssub_0RegClassID, |
| 6123 | ARM::DQuad_with_ssub_2RegClassID, |
| 6124 | ARM::DQuad_with_ssub_4RegClassID, |
| 6125 | }; |
| 6126 | |
| 6127 | static unsigned const DQuad_with_dsub_0_in_DPR_8Superclasses[] = { |
| 6128 | ARM::DQuadRegClassID, |
| 6129 | ARM::DQuad_with_ssub_0RegClassID, |
| 6130 | ARM::DQuad_with_ssub_2RegClassID, |
| 6131 | ARM::DQuad_with_ssub_4RegClassID, |
| 6132 | ARM::DQuad_with_ssub_6RegClassID, |
| 6133 | }; |
| 6134 | |
| 6135 | static unsigned const DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| 6136 | ARM::DQuadRegClassID, |
| 6137 | ARM::DQuad_with_ssub_0RegClassID, |
| 6138 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6139 | }; |
| 6140 | |
| 6141 | static unsigned const QQPR_with_ssub_0Superclasses[] = { |
| 6142 | ARM::DQuadRegClassID, |
| 6143 | ARM::DQuad_with_ssub_0RegClassID, |
| 6144 | ARM::DQuad_with_ssub_2RegClassID, |
| 6145 | ARM::QQPRRegClassID, |
| 6146 | }; |
| 6147 | |
| 6148 | static unsigned const DQuad_with_dsub_1_in_DPR_8Superclasses[] = { |
| 6149 | ARM::DQuadRegClassID, |
| 6150 | ARM::DQuad_with_ssub_0RegClassID, |
| 6151 | ARM::DQuad_with_ssub_2RegClassID, |
| 6152 | ARM::DQuad_with_ssub_4RegClassID, |
| 6153 | ARM::DQuad_with_ssub_6RegClassID, |
| 6154 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6155 | }; |
| 6156 | |
| 6157 | static unsigned const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| 6158 | ARM::DQuadRegClassID, |
| 6159 | ARM::DQuad_with_ssub_0RegClassID, |
| 6160 | ARM::DQuad_with_ssub_2RegClassID, |
| 6161 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6162 | ARM::DQuad_with_ssub_4RegClassID, |
| 6163 | ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6164 | }; |
| 6165 | |
| 6166 | static unsigned const MQQPRSuperclasses[] = { |
| 6167 | ARM::DQuadRegClassID, |
| 6168 | ARM::DQuad_with_ssub_0RegClassID, |
| 6169 | ARM::DQuad_with_ssub_2RegClassID, |
| 6170 | ARM::QQPRRegClassID, |
| 6171 | ARM::DQuad_with_ssub_4RegClassID, |
| 6172 | ARM::DQuad_with_ssub_6RegClassID, |
| 6173 | ARM::QQPR_with_ssub_0RegClassID, |
| 6174 | }; |
| 6175 | |
| 6176 | static unsigned const DQuad_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6177 | ARM::DQuadRegClassID, |
| 6178 | ARM::DQuad_with_ssub_0RegClassID, |
| 6179 | ARM::DQuad_with_ssub_2RegClassID, |
| 6180 | ARM::DQuad_with_ssub_4RegClassID, |
| 6181 | ARM::DQuad_with_ssub_6RegClassID, |
| 6182 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6183 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6184 | }; |
| 6185 | |
| 6186 | static unsigned const DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| 6187 | ARM::DQuadRegClassID, |
| 6188 | ARM::DQuad_with_ssub_0RegClassID, |
| 6189 | ARM::DQuad_with_ssub_2RegClassID, |
| 6190 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6191 | ARM::DQuad_with_ssub_4RegClassID, |
| 6192 | ARM::DQuad_with_ssub_6RegClassID, |
| 6193 | ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6194 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6195 | }; |
| 6196 | |
| 6197 | static unsigned const DQuad_with_dsub_3_in_DPR_8Superclasses[] = { |
| 6198 | ARM::DQuadRegClassID, |
| 6199 | ARM::DQuad_with_ssub_0RegClassID, |
| 6200 | ARM::DQuad_with_ssub_2RegClassID, |
| 6201 | ARM::DQuad_with_ssub_4RegClassID, |
| 6202 | ARM::DQuad_with_ssub_6RegClassID, |
| 6203 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6204 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6205 | ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, |
| 6206 | }; |
| 6207 | |
| 6208 | static unsigned const DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| 6209 | ARM::DQuadRegClassID, |
| 6210 | ARM::DQuad_with_ssub_0RegClassID, |
| 6211 | ARM::DQuad_with_ssub_2RegClassID, |
| 6212 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6213 | ARM::DQuad_with_ssub_4RegClassID, |
| 6214 | ARM::DQuad_with_ssub_6RegClassID, |
| 6215 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6216 | ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6217 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6218 | ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6219 | }; |
| 6220 | |
| 6221 | static unsigned const MQQPR_with_qsub_0_in_QPR_8Superclasses[] = { |
| 6222 | ARM::DQuadRegClassID, |
| 6223 | ARM::DQuad_with_ssub_0RegClassID, |
| 6224 | ARM::DQuad_with_ssub_2RegClassID, |
| 6225 | ARM::QQPRRegClassID, |
| 6226 | ARM::DQuad_with_ssub_4RegClassID, |
| 6227 | ARM::DQuad_with_ssub_6RegClassID, |
| 6228 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6229 | ARM::QQPR_with_ssub_0RegClassID, |
| 6230 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6231 | ARM::MQQPRRegClassID, |
| 6232 | }; |
| 6233 | |
| 6234 | static unsigned const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = { |
| 6235 | ARM::DQuadRegClassID, |
| 6236 | ARM::DQuad_with_ssub_0RegClassID, |
| 6237 | ARM::DQuad_with_ssub_2RegClassID, |
| 6238 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6239 | ARM::DQuad_with_ssub_4RegClassID, |
| 6240 | ARM::DQuad_with_ssub_6RegClassID, |
| 6241 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6242 | ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6243 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6244 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6245 | ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, |
| 6246 | ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6247 | ARM::DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6248 | }; |
| 6249 | |
| 6250 | static unsigned const MQQPR_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6251 | ARM::DQuadRegClassID, |
| 6252 | ARM::DQuad_with_ssub_0RegClassID, |
| 6253 | ARM::DQuad_with_ssub_2RegClassID, |
| 6254 | ARM::QQPRRegClassID, |
| 6255 | ARM::DQuad_with_ssub_4RegClassID, |
| 6256 | ARM::DQuad_with_ssub_6RegClassID, |
| 6257 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6258 | ARM::QQPR_with_ssub_0RegClassID, |
| 6259 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6260 | ARM::MQQPRRegClassID, |
| 6261 | ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, |
| 6262 | ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, |
| 6263 | ARM::MQQPR_with_qsub_0_in_QPR_8RegClassID, |
| 6264 | }; |
| 6265 | |
| 6266 | static unsigned const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6267 | ARM::DQuadRegClassID, |
| 6268 | ARM::DQuad_with_ssub_0RegClassID, |
| 6269 | ARM::DQuad_with_ssub_2RegClassID, |
| 6270 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6271 | ARM::DQuad_with_ssub_4RegClassID, |
| 6272 | ARM::DQuad_with_ssub_6RegClassID, |
| 6273 | ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, |
| 6274 | ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, |
| 6275 | ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, |
| 6276 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6277 | ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, |
| 6278 | ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6279 | ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, |
| 6280 | ARM::DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, |
| 6281 | ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, |
| 6282 | }; |
| 6283 | |
| 6284 | static unsigned const QQQQPR_with_ssub_0Superclasses[] = { |
| 6285 | ARM::QQQQPRRegClassID, |
| 6286 | }; |
| 6287 | |
| 6288 | static unsigned const QQQQPR_with_ssub_4Superclasses[] = { |
| 6289 | ARM::QQQQPRRegClassID, |
| 6290 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6291 | }; |
| 6292 | |
| 6293 | static unsigned const QQQQPR_with_ssub_8Superclasses[] = { |
| 6294 | ARM::QQQQPRRegClassID, |
| 6295 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6296 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6297 | }; |
| 6298 | |
| 6299 | static unsigned const MQQQQPRSuperclasses[] = { |
| 6300 | ARM::QQQQPRRegClassID, |
| 6301 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6302 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6303 | ARM::QQQQPR_with_ssub_8RegClassID, |
| 6304 | }; |
| 6305 | |
| 6306 | static unsigned const MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8Superclasses[] = { |
| 6307 | ARM::QQQQPRRegClassID, |
| 6308 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6309 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6310 | ARM::QQQQPR_with_ssub_8RegClassID, |
| 6311 | ARM::MQQQQPRRegClassID, |
| 6312 | }; |
| 6313 | |
| 6314 | static unsigned const MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6315 | ARM::QQQQPRRegClassID, |
| 6316 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6317 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6318 | ARM::QQQQPR_with_ssub_8RegClassID, |
| 6319 | ARM::MQQQQPRRegClassID, |
| 6320 | ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID, |
| 6321 | }; |
| 6322 | |
| 6323 | static unsigned const MQQQQPR_with_qsub_2_in_QPR_8Superclasses[] = { |
| 6324 | ARM::QQQQPRRegClassID, |
| 6325 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6326 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6327 | ARM::QQQQPR_with_ssub_8RegClassID, |
| 6328 | ARM::MQQQQPRRegClassID, |
| 6329 | ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID, |
| 6330 | ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClassID, |
| 6331 | }; |
| 6332 | |
| 6333 | static unsigned const MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8Superclasses[] = { |
| 6334 | ARM::QQQQPRRegClassID, |
| 6335 | ARM::QQQQPR_with_ssub_0RegClassID, |
| 6336 | ARM::QQQQPR_with_ssub_4RegClassID, |
| 6337 | ARM::QQQQPR_with_ssub_8RegClassID, |
| 6338 | ARM::MQQQQPRRegClassID, |
| 6339 | ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID, |
| 6340 | ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClassID, |
| 6341 | ARM::MQQQQPR_with_qsub_2_in_QPR_8RegClassID, |
| 6342 | }; |
| 6343 | |
| 6344 | |
| 6345 | static inline unsigned HPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6346 | return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| 6347 | } |
| 6348 | |
| 6349 | static ArrayRef<MCPhysReg> HPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6350 | static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; |
| 6351 | static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 }; |
| 6352 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::HPRRegClassID]; |
| 6353 | const ArrayRef<MCPhysReg> Order[] = { |
| 6354 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6355 | ArrayRef(AltOrder1), |
| 6356 | ArrayRef(AltOrder2) |
| 6357 | }; |
| 6358 | const unsigned Select = HPRAltOrderSelect(MF, Rev); |
| 6359 | assert(Select < 3); |
| 6360 | return Order[Select]; |
| 6361 | } |
| 6362 | |
| 6363 | static inline unsigned SPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6364 | return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| 6365 | } |
| 6366 | |
| 6367 | static ArrayRef<MCPhysReg> SPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6368 | static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; |
| 6369 | static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 }; |
| 6370 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::SPRRegClassID]; |
| 6371 | const ArrayRef<MCPhysReg> Order[] = { |
| 6372 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6373 | ArrayRef(AltOrder1), |
| 6374 | ArrayRef(AltOrder2) |
| 6375 | }; |
| 6376 | const unsigned Select = SPRAltOrderSelect(MF, Rev); |
| 6377 | assert(Select < 3); |
| 6378 | return Order[Select]; |
| 6379 | } |
| 6380 | |
| 6381 | static inline unsigned GPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6382 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6383 | } |
| 6384 | |
| 6385 | static ArrayRef<MCPhysReg> GPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6386 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::PC }; |
| 6387 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6388 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| 6389 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRRegClassID]; |
| 6390 | const ArrayRef<MCPhysReg> Order[] = { |
| 6391 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6392 | ArrayRef(AltOrder1), |
| 6393 | ArrayRef(AltOrder2), |
| 6394 | ArrayRef(AltOrder3) |
| 6395 | }; |
| 6396 | const unsigned Select = GPRAltOrderSelect(MF, Rev); |
| 6397 | assert(Select < 4); |
| 6398 | return Order[Select]; |
| 6399 | } |
| 6400 | |
| 6401 | static inline unsigned GPRwithAPSRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6402 | return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6403 | } |
| 6404 | |
| 6405 | static ArrayRef<MCPhysReg> GPRwithAPSRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6406 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP }; |
| 6407 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6408 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithAPSRRegClassID]; |
| 6409 | const ArrayRef<MCPhysReg> Order[] = { |
| 6410 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6411 | ArrayRef(AltOrder1), |
| 6412 | ArrayRef(AltOrder2) |
| 6413 | }; |
| 6414 | const unsigned Select = GPRwithAPSRAltOrderSelect(MF, Rev); |
| 6415 | assert(Select < 3); |
| 6416 | return Order[Select]; |
| 6417 | } |
| 6418 | |
| 6419 | static inline unsigned GPRwithZRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6420 | return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6421 | } |
| 6422 | |
| 6423 | static ArrayRef<MCPhysReg> GPRwithZRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6424 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::ZR }; |
| 6425 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6426 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRRegClassID]; |
| 6427 | const ArrayRef<MCPhysReg> Order[] = { |
| 6428 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6429 | ArrayRef(AltOrder1), |
| 6430 | ArrayRef(AltOrder2) |
| 6431 | }; |
| 6432 | const unsigned Select = GPRwithZRAltOrderSelect(MF, Rev); |
| 6433 | assert(Select < 3); |
| 6434 | return Order[Select]; |
| 6435 | } |
| 6436 | |
| 6437 | static inline unsigned GPRnopcAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6438 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6439 | } |
| 6440 | |
| 6441 | static ArrayRef<MCPhysReg> GPRnopcGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6442 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP }; |
| 6443 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6444 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| 6445 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnopcRegClassID]; |
| 6446 | const ArrayRef<MCPhysReg> Order[] = { |
| 6447 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6448 | ArrayRef(AltOrder1), |
| 6449 | ArrayRef(AltOrder2), |
| 6450 | ArrayRef(AltOrder3) |
| 6451 | }; |
| 6452 | const unsigned Select = GPRnopcAltOrderSelect(MF, Rev); |
| 6453 | assert(Select < 4); |
| 6454 | return Order[Select]; |
| 6455 | } |
| 6456 | |
| 6457 | static inline unsigned GPRnospAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6458 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6459 | } |
| 6460 | |
| 6461 | static ArrayRef<MCPhysReg> GPRnospGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6462 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::PC }; |
| 6463 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6464 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| 6465 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnospRegClassID]; |
| 6466 | const ArrayRef<MCPhysReg> Order[] = { |
| 6467 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6468 | ArrayRef(AltOrder1), |
| 6469 | ArrayRef(AltOrder2), |
| 6470 | ArrayRef(AltOrder3) |
| 6471 | }; |
| 6472 | const unsigned Select = GPRnospAltOrderSelect(MF, Rev); |
| 6473 | assert(Select < 4); |
| 6474 | return Order[Select]; |
| 6475 | } |
| 6476 | |
| 6477 | static inline unsigned GPRwithZRnospAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6478 | return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6479 | } |
| 6480 | |
| 6481 | static ArrayRef<MCPhysReg> GPRwithZRnospGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6482 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::ZR }; |
| 6483 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6484 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRnospRegClassID]; |
| 6485 | const ArrayRef<MCPhysReg> Order[] = { |
| 6486 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6487 | ArrayRef(AltOrder1), |
| 6488 | ArrayRef(AltOrder2) |
| 6489 | }; |
| 6490 | const unsigned Select = GPRwithZRnospAltOrderSelect(MF, Rev); |
| 6491 | assert(Select < 3); |
| 6492 | return Order[Select]; |
| 6493 | } |
| 6494 | |
| 6495 | static inline unsigned GPRnoipAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6496 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6497 | } |
| 6498 | |
| 6499 | static ArrayRef<MCPhysReg> GPRnoipGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6500 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| 6501 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6502 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| 6503 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoipRegClassID]; |
| 6504 | const ArrayRef<MCPhysReg> Order[] = { |
| 6505 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6506 | ArrayRef(AltOrder1), |
| 6507 | ArrayRef(AltOrder2), |
| 6508 | ArrayRef(AltOrder3) |
| 6509 | }; |
| 6510 | const unsigned Select = GPRnoipAltOrderSelect(MF, Rev); |
| 6511 | assert(Select < 4); |
| 6512 | return Order[Select]; |
| 6513 | } |
| 6514 | |
| 6515 | static inline unsigned rGPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6516 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6517 | } |
| 6518 | |
| 6519 | static ArrayRef<MCPhysReg> rGPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6520 | static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12 }; |
| 6521 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6522 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| 6523 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::rGPRRegClassID]; |
| 6524 | const ArrayRef<MCPhysReg> Order[] = { |
| 6525 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6526 | ArrayRef(AltOrder1), |
| 6527 | ArrayRef(AltOrder2), |
| 6528 | ArrayRef(AltOrder3) |
| 6529 | }; |
| 6530 | const unsigned Select = rGPRAltOrderSelect(MF, Rev); |
| 6531 | assert(Select < 4); |
| 6532 | return Order[Select]; |
| 6533 | } |
| 6534 | |
| 6535 | static inline unsigned GPRnoip_and_GPRnopcAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6536 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6537 | } |
| 6538 | |
| 6539 | static ArrayRef<MCPhysReg> GPRnoip_and_GPRnopcGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6540 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| 6541 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6542 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| 6543 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnopcRegClassID]; |
| 6544 | const ArrayRef<MCPhysReg> Order[] = { |
| 6545 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6546 | ArrayRef(AltOrder1), |
| 6547 | ArrayRef(AltOrder2), |
| 6548 | ArrayRef(AltOrder3) |
| 6549 | }; |
| 6550 | const unsigned Select = GPRnoip_and_GPRnopcAltOrderSelect(MF, Rev); |
| 6551 | assert(Select < 4); |
| 6552 | return Order[Select]; |
| 6553 | } |
| 6554 | |
| 6555 | static inline unsigned GPRnoip_and_GPRnospAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6556 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6557 | } |
| 6558 | |
| 6559 | static ArrayRef<MCPhysReg> GPRnoip_and_GPRnospGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6560 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| 6561 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6562 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| 6563 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnospRegClassID]; |
| 6564 | const ArrayRef<MCPhysReg> Order[] = { |
| 6565 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6566 | ArrayRef(AltOrder1), |
| 6567 | ArrayRef(AltOrder2), |
| 6568 | ArrayRef(AltOrder3) |
| 6569 | }; |
| 6570 | const unsigned Select = GPRnoip_and_GPRnospAltOrderSelect(MF, Rev); |
| 6571 | assert(Select < 4); |
| 6572 | return Order[Select]; |
| 6573 | } |
| 6574 | |
| 6575 | static inline unsigned GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6576 | return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| 6577 | } |
| 6578 | |
| 6579 | static ArrayRef<MCPhysReg> GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6580 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| 6581 | static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| 6582 | static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| 6583 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID]; |
| 6584 | const ArrayRef<MCPhysReg> Order[] = { |
| 6585 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6586 | ArrayRef(AltOrder1), |
| 6587 | ArrayRef(AltOrder2), |
| 6588 | ArrayRef(AltOrder3) |
| 6589 | }; |
| 6590 | const unsigned Select = GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(MF, Rev); |
| 6591 | assert(Select < 4); |
| 6592 | return Order[Select]; |
| 6593 | } |
| 6594 | |
| 6595 | static inline unsigned tGPREvenAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6596 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6597 | } |
| 6598 | |
| 6599 | static ArrayRef<MCPhysReg> tGPREvenGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6600 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| 6601 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREvenRegClassID]; |
| 6602 | const ArrayRef<MCPhysReg> Order[] = { |
| 6603 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6604 | ArrayRef(AltOrder1) |
| 6605 | }; |
| 6606 | const unsigned Select = tGPREvenAltOrderSelect(MF, Rev); |
| 6607 | assert(Select < 2); |
| 6608 | return Order[Select]; |
| 6609 | } |
| 6610 | |
| 6611 | static inline unsigned GPRnoip_and_tGPREvenAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6612 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6613 | } |
| 6614 | |
| 6615 | static ArrayRef<MCPhysReg> GPRnoip_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6616 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| 6617 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_tGPREvenRegClassID]; |
| 6618 | const ArrayRef<MCPhysReg> Order[] = { |
| 6619 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6620 | ArrayRef(AltOrder1) |
| 6621 | }; |
| 6622 | const unsigned Select = GPRnoip_and_tGPREvenAltOrderSelect(MF, Rev); |
| 6623 | assert(Select < 2); |
| 6624 | return Order[Select]; |
| 6625 | } |
| 6626 | |
| 6627 | static inline unsigned tGPROddAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6628 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6629 | } |
| 6630 | |
| 6631 | static ArrayRef<MCPhysReg> tGPROddGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6632 | static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 }; |
| 6633 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROddRegClassID]; |
| 6634 | const ArrayRef<MCPhysReg> Order[] = { |
| 6635 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6636 | ArrayRef(AltOrder1) |
| 6637 | }; |
| 6638 | const unsigned Select = tGPROddAltOrderSelect(MF, Rev); |
| 6639 | assert(Select < 2); |
| 6640 | return Order[Select]; |
| 6641 | } |
| 6642 | |
| 6643 | static inline unsigned tcGPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6644 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6645 | } |
| 6646 | |
| 6647 | static ArrayRef<MCPhysReg> tcGPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6648 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; |
| 6649 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tcGPRRegClassID]; |
| 6650 | const ArrayRef<MCPhysReg> Order[] = { |
| 6651 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6652 | ArrayRef(AltOrder1) |
| 6653 | }; |
| 6654 | const unsigned Select = tcGPRAltOrderSelect(MF, Rev); |
| 6655 | assert(Select < 2); |
| 6656 | return Order[Select]; |
| 6657 | } |
| 6658 | |
| 6659 | static inline unsigned tGPR_and_tGPREvenAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6660 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6661 | } |
| 6662 | |
| 6663 | static ArrayRef<MCPhysReg> tGPR_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6664 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| 6665 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPREvenRegClassID]; |
| 6666 | const ArrayRef<MCPhysReg> Order[] = { |
| 6667 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6668 | ArrayRef(AltOrder1) |
| 6669 | }; |
| 6670 | const unsigned Select = tGPR_and_tGPREvenAltOrderSelect(MF, Rev); |
| 6671 | assert(Select < 2); |
| 6672 | return Order[Select]; |
| 6673 | } |
| 6674 | |
| 6675 | static inline unsigned tGPR_and_tGPROddAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6676 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6677 | } |
| 6678 | |
| 6679 | static ArrayRef<MCPhysReg> tGPR_and_tGPROddGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6680 | static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 }; |
| 6681 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPROddRegClassID]; |
| 6682 | const ArrayRef<MCPhysReg> Order[] = { |
| 6683 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6684 | ArrayRef(AltOrder1) |
| 6685 | }; |
| 6686 | const unsigned Select = tGPR_and_tGPROddAltOrderSelect(MF, Rev); |
| 6687 | assert(Select < 2); |
| 6688 | return Order[Select]; |
| 6689 | } |
| 6690 | |
| 6691 | static inline unsigned tGPREven_and_tcGPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6692 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6693 | } |
| 6694 | |
| 6695 | static ArrayRef<MCPhysReg> tGPREven_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6696 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 }; |
| 6697 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRRegClassID]; |
| 6698 | const ArrayRef<MCPhysReg> Order[] = { |
| 6699 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6700 | ArrayRef(AltOrder1) |
| 6701 | }; |
| 6702 | const unsigned Select = tGPREven_and_tcGPRAltOrderSelect(MF, Rev); |
| 6703 | assert(Select < 2); |
| 6704 | return Order[Select]; |
| 6705 | } |
| 6706 | |
| 6707 | static inline unsigned tGPREven_and_tcGPRnotr12AltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6708 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6709 | } |
| 6710 | |
| 6711 | static ArrayRef<MCPhysReg> tGPREven_and_tcGPRnotr12GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6712 | static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 }; |
| 6713 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRnotr12RegClassID]; |
| 6714 | const ArrayRef<MCPhysReg> Order[] = { |
| 6715 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6716 | ArrayRef(AltOrder1) |
| 6717 | }; |
| 6718 | const unsigned Select = tGPREven_and_tcGPRnotr12AltOrderSelect(MF, Rev); |
| 6719 | assert(Select < 2); |
| 6720 | return Order[Select]; |
| 6721 | } |
| 6722 | |
| 6723 | static inline unsigned hGPR_and_tcGPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6724 | return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| 6725 | } |
| 6726 | |
| 6727 | static ArrayRef<MCPhysReg> hGPR_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6728 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::hGPR_and_tcGPRRegClassID]; |
| 6729 | const ArrayRef<MCPhysReg> Order[] = { |
| 6730 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6731 | ArrayRef<MCPhysReg>() |
| 6732 | }; |
| 6733 | const unsigned Select = hGPR_and_tcGPRAltOrderSelect(MF, Rev); |
| 6734 | assert(Select < 2); |
| 6735 | return Order[Select]; |
| 6736 | } |
| 6737 | |
| 6738 | static inline unsigned DPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6739 | return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| 6740 | } |
| 6741 | |
| 6742 | static ArrayRef<MCPhysReg> DPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6743 | static const MCPhysReg AltOrder1[] = { ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15 }; |
| 6744 | static const MCPhysReg AltOrder2[] = { ARM::D16, ARM::D18, ARM::D20, ARM::D22, ARM::D24, ARM::D26, ARM::D28, ARM::D30, ARM::D0, ARM::D2, ARM::D4, ARM::D6, ARM::D8, ARM::D10, ARM::D12, ARM::D14, ARM::D17, ARM::D19, ARM::D21, ARM::D23, ARM::D25, ARM::D27, ARM::D29, ARM::D31, ARM::D1, ARM::D3, ARM::D5, ARM::D7, ARM::D9, ARM::D11, ARM::D13, ARM::D15 }; |
| 6745 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPRRegClassID]; |
| 6746 | const ArrayRef<MCPhysReg> Order[] = { |
| 6747 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6748 | ArrayRef(AltOrder1), |
| 6749 | ArrayRef(AltOrder2) |
| 6750 | }; |
| 6751 | const unsigned Select = DPRAltOrderSelect(MF, Rev); |
| 6752 | assert(Select < 3); |
| 6753 | return Order[Select]; |
| 6754 | } |
| 6755 | |
| 6756 | static inline unsigned DPairAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6757 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6758 | } |
| 6759 | |
| 6760 | static ArrayRef<MCPhysReg> DPairGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6761 | static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D17_D18, ARM::D19_D20, ARM::D21_D22, ARM::D23_D24, ARM::D25_D26, ARM::D27_D28, ARM::D29_D30, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| 6762 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| 6763 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPairRegClassID]; |
| 6764 | const ArrayRef<MCPhysReg> Order[] = { |
| 6765 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6766 | ArrayRef(AltOrder1), |
| 6767 | ArrayRef(AltOrder2) |
| 6768 | }; |
| 6769 | const unsigned Select = DPairAltOrderSelect(MF, Rev); |
| 6770 | assert(Select < 3); |
| 6771 | return Order[Select]; |
| 6772 | } |
| 6773 | |
| 6774 | static inline unsigned DPair_with_ssub_0AltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6775 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6776 | } |
| 6777 | |
| 6778 | static ArrayRef<MCPhysReg> DPair_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6779 | static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| 6780 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| 6781 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_0RegClassID]; |
| 6782 | const ArrayRef<MCPhysReg> Order[] = { |
| 6783 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6784 | ArrayRef(AltOrder1), |
| 6785 | ArrayRef(AltOrder2) |
| 6786 | }; |
| 6787 | const unsigned Select = DPair_with_ssub_0AltOrderSelect(MF, Rev); |
| 6788 | assert(Select < 3); |
| 6789 | return Order[Select]; |
| 6790 | } |
| 6791 | |
| 6792 | static inline unsigned QPRAltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6793 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6794 | } |
| 6795 | |
| 6796 | static ArrayRef<MCPhysReg> QPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6797 | static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 }; |
| 6798 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 }; |
| 6799 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QPRRegClassID]; |
| 6800 | const ArrayRef<MCPhysReg> Order[] = { |
| 6801 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6802 | ArrayRef(AltOrder1), |
| 6803 | ArrayRef(AltOrder2) |
| 6804 | }; |
| 6805 | const unsigned Select = QPRAltOrderSelect(MF, Rev); |
| 6806 | assert(Select < 3); |
| 6807 | return Order[Select]; |
| 6808 | } |
| 6809 | |
| 6810 | static inline unsigned DPair_with_ssub_2AltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6811 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6812 | } |
| 6813 | |
| 6814 | static ArrayRef<MCPhysReg> DPair_with_ssub_2GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6815 | static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 }; |
| 6816 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 }; |
| 6817 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_2RegClassID]; |
| 6818 | const ArrayRef<MCPhysReg> Order[] = { |
| 6819 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6820 | ArrayRef(AltOrder1), |
| 6821 | ArrayRef(AltOrder2) |
| 6822 | }; |
| 6823 | const unsigned Select = DPair_with_ssub_2AltOrderSelect(MF, Rev); |
| 6824 | assert(Select < 3); |
| 6825 | return Order[Select]; |
| 6826 | } |
| 6827 | |
| 6828 | static inline unsigned DPair_with_dsub_0_in_DPR_8AltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6829 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6830 | } |
| 6831 | |
| 6832 | static ArrayRef<MCPhysReg> DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6833 | static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 }; |
| 6834 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 }; |
| 6835 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_0_in_DPR_8RegClassID]; |
| 6836 | const ArrayRef<MCPhysReg> Order[] = { |
| 6837 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6838 | ArrayRef(AltOrder1), |
| 6839 | ArrayRef(AltOrder2) |
| 6840 | }; |
| 6841 | const unsigned Select = DPair_with_dsub_0_in_DPR_8AltOrderSelect(MF, Rev); |
| 6842 | assert(Select < 3); |
| 6843 | return Order[Select]; |
| 6844 | } |
| 6845 | |
| 6846 | static inline unsigned DPair_with_dsub_1_in_DPR_8AltOrderSelect(const MachineFunction &MF, bool Rev) { |
| 6847 | return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| 6848 | } |
| 6849 | |
| 6850 | static ArrayRef<MCPhysReg> DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6851 | static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 }; |
| 6852 | static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 }; |
| 6853 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_1_in_DPR_8RegClassID]; |
| 6854 | const ArrayRef<MCPhysReg> Order[] = { |
| 6855 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6856 | ArrayRef(AltOrder1), |
| 6857 | ArrayRef(AltOrder2) |
| 6858 | }; |
| 6859 | const unsigned Select = DPair_with_dsub_1_in_DPR_8AltOrderSelect(MF, Rev); |
| 6860 | assert(Select < 3); |
| 6861 | return Order[Select]; |
| 6862 | } |
| 6863 | |
| 6864 | static inline unsigned QQPRAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6865 | |
| 6866 | static ArrayRef<MCPhysReg> QQPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6867 | static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 }; |
| 6868 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQPRRegClassID]; |
| 6869 | const ArrayRef<MCPhysReg> Order[] = { |
| 6870 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6871 | ArrayRef(AltOrder1) |
| 6872 | }; |
| 6873 | const unsigned Select = QQPRAltOrderSelect(MF, Rev); |
| 6874 | assert(Select < 2); |
| 6875 | return Order[Select]; |
| 6876 | } |
| 6877 | |
| 6878 | static inline unsigned QQPR_with_ssub_0AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6879 | |
| 6880 | static ArrayRef<MCPhysReg> QQPR_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6881 | static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 }; |
| 6882 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQPR_with_ssub_0RegClassID]; |
| 6883 | const ArrayRef<MCPhysReg> Order[] = { |
| 6884 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6885 | ArrayRef(AltOrder1) |
| 6886 | }; |
| 6887 | const unsigned Select = QQPR_with_ssub_0AltOrderSelect(MF, Rev); |
| 6888 | assert(Select < 2); |
| 6889 | return Order[Select]; |
| 6890 | } |
| 6891 | |
| 6892 | static inline unsigned QQQQPRAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6893 | |
| 6894 | static ArrayRef<MCPhysReg> QQQQPRGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6895 | static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 }; |
| 6896 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPRRegClassID]; |
| 6897 | const ArrayRef<MCPhysReg> Order[] = { |
| 6898 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6899 | ArrayRef(AltOrder1) |
| 6900 | }; |
| 6901 | const unsigned Select = QQQQPRAltOrderSelect(MF, Rev); |
| 6902 | assert(Select < 2); |
| 6903 | return Order[Select]; |
| 6904 | } |
| 6905 | |
| 6906 | static inline unsigned QQQQPR_with_ssub_0AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6907 | |
| 6908 | static ArrayRef<MCPhysReg> QQQQPR_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6909 | static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 }; |
| 6910 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_0RegClassID]; |
| 6911 | const ArrayRef<MCPhysReg> Order[] = { |
| 6912 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6913 | ArrayRef(AltOrder1) |
| 6914 | }; |
| 6915 | const unsigned Select = QQQQPR_with_ssub_0AltOrderSelect(MF, Rev); |
| 6916 | assert(Select < 2); |
| 6917 | return Order[Select]; |
| 6918 | } |
| 6919 | |
| 6920 | static inline unsigned QQQQPR_with_ssub_4AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6921 | |
| 6922 | static ArrayRef<MCPhysReg> QQQQPR_with_ssub_4GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6923 | static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9 }; |
| 6924 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_4RegClassID]; |
| 6925 | const ArrayRef<MCPhysReg> Order[] = { |
| 6926 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6927 | ArrayRef(AltOrder1) |
| 6928 | }; |
| 6929 | const unsigned Select = QQQQPR_with_ssub_4AltOrderSelect(MF, Rev); |
| 6930 | assert(Select < 2); |
| 6931 | return Order[Select]; |
| 6932 | } |
| 6933 | |
| 6934 | static inline unsigned QQQQPR_with_ssub_8AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 6935 | |
| 6936 | static ArrayRef<MCPhysReg> QQQQPR_with_ssub_8GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 6937 | static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8 }; |
| 6938 | const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_8RegClassID]; |
| 6939 | const ArrayRef<MCPhysReg> Order[] = { |
| 6940 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 6941 | ArrayRef(AltOrder1) |
| 6942 | }; |
| 6943 | const unsigned Select = QQQQPR_with_ssub_8AltOrderSelect(MF, Rev); |
| 6944 | assert(Select < 2); |
| 6945 | return Order[Select]; |
| 6946 | } |
| 6947 | |
| 6948 | namespace ARM { // Register class instances |
| 6949 | extern const TargetRegisterClass HPRRegClass = { |
| 6950 | &ARMMCRegisterClasses[HPRRegClassID], |
| 6951 | HPRSubClassMask, |
| 6952 | SuperRegIdxSeqs + 22, |
| 6953 | LaneBitmask(0x0000000000000001), |
| 6954 | 0, |
| 6955 | false, |
| 6956 | 0x00, /* TSFlags */ |
| 6957 | false, /* HasDisjunctSubRegs */ |
| 6958 | false, /* CoveredBySubRegs */ |
| 6959 | nullptr, 0, |
| 6960 | HPRGetRawAllocationOrder |
| 6961 | }; |
| 6962 | |
| 6963 | extern const TargetRegisterClass FPWithVPRRegClass = { |
| 6964 | &ARMMCRegisterClasses[FPWithVPRRegClassID], |
| 6965 | FPWithVPRSubClassMask, |
| 6966 | SuperRegIdxSeqs + 14, |
| 6967 | LaneBitmask(0x000000000000000C), |
| 6968 | 0, |
| 6969 | false, |
| 6970 | 0x00, /* TSFlags */ |
| 6971 | true, /* HasDisjunctSubRegs */ |
| 6972 | false, /* CoveredBySubRegs */ |
| 6973 | nullptr, 0, |
| 6974 | nullptr |
| 6975 | }; |
| 6976 | |
| 6977 | extern const TargetRegisterClass SPRRegClass = { |
| 6978 | &ARMMCRegisterClasses[SPRRegClassID], |
| 6979 | SPRSubClassMask, |
| 6980 | SuperRegIdxSeqs + 22, |
| 6981 | LaneBitmask(0x0000000000000001), |
| 6982 | 0, |
| 6983 | false, |
| 6984 | 0x00, /* TSFlags */ |
| 6985 | false, /* HasDisjunctSubRegs */ |
| 6986 | false, /* CoveredBySubRegs */ |
| 6987 | SPRSuperclasses, 2, |
| 6988 | SPRGetRawAllocationOrder |
| 6989 | }; |
| 6990 | |
| 6991 | extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass = { |
| 6992 | &ARMMCRegisterClasses[FPWithVPR_with_ssub_0RegClassID], |
| 6993 | FPWithVPR_with_ssub_0SubClassMask, |
| 6994 | SuperRegIdxSeqs + 0, |
| 6995 | LaneBitmask(0x000000000000000C), |
| 6996 | 0, |
| 6997 | false, |
| 6998 | 0x00, /* TSFlags */ |
| 6999 | true, /* HasDisjunctSubRegs */ |
| 7000 | true, /* CoveredBySubRegs */ |
| 7001 | FPWithVPR_with_ssub_0Superclasses, 1, |
| 7002 | nullptr |
| 7003 | }; |
| 7004 | |
| 7005 | extern const TargetRegisterClass GPRRegClass = { |
| 7006 | &ARMMCRegisterClasses[GPRRegClassID], |
| 7007 | GPRSubClassMask, |
| 7008 | SuperRegIdxSeqs + 11, |
| 7009 | LaneBitmask(0x0000000000000001), |
| 7010 | 0, |
| 7011 | false, |
| 7012 | 0x00, /* TSFlags */ |
| 7013 | false, /* HasDisjunctSubRegs */ |
| 7014 | true, /* CoveredBySubRegs */ |
| 7015 | nullptr, 0, |
| 7016 | GPRGetRawAllocationOrder |
| 7017 | }; |
| 7018 | |
| 7019 | extern const TargetRegisterClass GPRwithAPSRRegClass = { |
| 7020 | &ARMMCRegisterClasses[GPRwithAPSRRegClassID], |
| 7021 | GPRwithAPSRSubClassMask, |
| 7022 | SuperRegIdxSeqs + 11, |
| 7023 | LaneBitmask(0x0000000000000001), |
| 7024 | 0, |
| 7025 | false, |
| 7026 | 0x00, /* TSFlags */ |
| 7027 | false, /* HasDisjunctSubRegs */ |
| 7028 | true, /* CoveredBySubRegs */ |
| 7029 | nullptr, 0, |
| 7030 | GPRwithAPSRGetRawAllocationOrder |
| 7031 | }; |
| 7032 | |
| 7033 | extern const TargetRegisterClass GPRwithZRRegClass = { |
| 7034 | &ARMMCRegisterClasses[GPRwithZRRegClassID], |
| 7035 | GPRwithZRSubClassMask, |
| 7036 | SuperRegIdxSeqs + 11, |
| 7037 | LaneBitmask(0x0000000000000001), |
| 7038 | 0, |
| 7039 | false, |
| 7040 | 0x00, /* TSFlags */ |
| 7041 | false, /* HasDisjunctSubRegs */ |
| 7042 | true, /* CoveredBySubRegs */ |
| 7043 | nullptr, 0, |
| 7044 | GPRwithZRGetRawAllocationOrder |
| 7045 | }; |
| 7046 | |
| 7047 | extern const TargetRegisterClass SPR_8RegClass = { |
| 7048 | &ARMMCRegisterClasses[SPR_8RegClassID], |
| 7049 | SPR_8SubClassMask, |
| 7050 | SuperRegIdxSeqs + 22, |
| 7051 | LaneBitmask(0x0000000000000001), |
| 7052 | 0, |
| 7053 | false, |
| 7054 | 0x00, /* TSFlags */ |
| 7055 | false, /* HasDisjunctSubRegs */ |
| 7056 | false, /* CoveredBySubRegs */ |
| 7057 | SPR_8Superclasses, 3, |
| 7058 | nullptr |
| 7059 | }; |
| 7060 | |
| 7061 | extern const TargetRegisterClass GPRnopcRegClass = { |
| 7062 | &ARMMCRegisterClasses[GPRnopcRegClassID], |
| 7063 | GPRnopcSubClassMask, |
| 7064 | SuperRegIdxSeqs + 11, |
| 7065 | LaneBitmask(0x0000000000000001), |
| 7066 | 0, |
| 7067 | false, |
| 7068 | 0x00, /* TSFlags */ |
| 7069 | false, /* HasDisjunctSubRegs */ |
| 7070 | true, /* CoveredBySubRegs */ |
| 7071 | GPRnopcSuperclasses, 3, |
| 7072 | GPRnopcGetRawAllocationOrder |
| 7073 | }; |
| 7074 | |
| 7075 | extern const TargetRegisterClass GPRnospRegClass = { |
| 7076 | &ARMMCRegisterClasses[GPRnospRegClassID], |
| 7077 | GPRnospSubClassMask, |
| 7078 | SuperRegIdxSeqs + 11, |
| 7079 | LaneBitmask(0x0000000000000001), |
| 7080 | 0, |
| 7081 | false, |
| 7082 | 0x00, /* TSFlags */ |
| 7083 | false, /* HasDisjunctSubRegs */ |
| 7084 | true, /* CoveredBySubRegs */ |
| 7085 | GPRnospSuperclasses, 1, |
| 7086 | GPRnospGetRawAllocationOrder |
| 7087 | }; |
| 7088 | |
| 7089 | extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass = { |
| 7090 | &ARMMCRegisterClasses[GPRwithAPSR_NZCVnospRegClassID], |
| 7091 | GPRwithAPSR_NZCVnospSubClassMask, |
| 7092 | SuperRegIdxSeqs + 11, |
| 7093 | LaneBitmask(0x0000000000000001), |
| 7094 | 0, |
| 7095 | false, |
| 7096 | 0x00, /* TSFlags */ |
| 7097 | false, /* HasDisjunctSubRegs */ |
| 7098 | true, /* CoveredBySubRegs */ |
| 7099 | GPRwithAPSR_NZCVnospSuperclasses, 1, |
| 7100 | nullptr |
| 7101 | }; |
| 7102 | |
| 7103 | extern const TargetRegisterClass GPRwithAPSRnospRegClass = { |
| 7104 | &ARMMCRegisterClasses[GPRwithAPSRnospRegClassID], |
| 7105 | GPRwithAPSRnospSubClassMask, |
| 7106 | SuperRegIdxSeqs + 11, |
| 7107 | LaneBitmask(0x0000000000000001), |
| 7108 | 0, |
| 7109 | false, |
| 7110 | 0x00, /* TSFlags */ |
| 7111 | false, /* HasDisjunctSubRegs */ |
| 7112 | true, /* CoveredBySubRegs */ |
| 7113 | nullptr, 0, |
| 7114 | nullptr |
| 7115 | }; |
| 7116 | |
| 7117 | extern const TargetRegisterClass GPRwithZRnospRegClass = { |
| 7118 | &ARMMCRegisterClasses[GPRwithZRnospRegClassID], |
| 7119 | GPRwithZRnospSubClassMask, |
| 7120 | SuperRegIdxSeqs + 11, |
| 7121 | LaneBitmask(0x0000000000000001), |
| 7122 | 0, |
| 7123 | false, |
| 7124 | 0x00, /* TSFlags */ |
| 7125 | false, /* HasDisjunctSubRegs */ |
| 7126 | true, /* CoveredBySubRegs */ |
| 7127 | GPRwithZRnospSuperclasses, 1, |
| 7128 | GPRwithZRnospGetRawAllocationOrder |
| 7129 | }; |
| 7130 | |
| 7131 | extern const TargetRegisterClass GPRnoipRegClass = { |
| 7132 | &ARMMCRegisterClasses[GPRnoipRegClassID], |
| 7133 | GPRnoipSubClassMask, |
| 7134 | SuperRegIdxSeqs + 11, |
| 7135 | LaneBitmask(0x0000000000000001), |
| 7136 | 0, |
| 7137 | false, |
| 7138 | 0x00, /* TSFlags */ |
| 7139 | false, /* HasDisjunctSubRegs */ |
| 7140 | true, /* CoveredBySubRegs */ |
| 7141 | GPRnoipSuperclasses, 1, |
| 7142 | GPRnoipGetRawAllocationOrder |
| 7143 | }; |
| 7144 | |
| 7145 | extern const TargetRegisterClass rGPRRegClass = { |
| 7146 | &ARMMCRegisterClasses[rGPRRegClassID], |
| 7147 | rGPRSubClassMask, |
| 7148 | SuperRegIdxSeqs + 11, |
| 7149 | LaneBitmask(0x0000000000000001), |
| 7150 | 0, |
| 7151 | false, |
| 7152 | 0x00, /* TSFlags */ |
| 7153 | false, /* HasDisjunctSubRegs */ |
| 7154 | true, /* CoveredBySubRegs */ |
| 7155 | rGPRSuperclasses, 8, |
| 7156 | rGPRGetRawAllocationOrder |
| 7157 | }; |
| 7158 | |
| 7159 | extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass = { |
| 7160 | &ARMMCRegisterClasses[GPRnoip_and_GPRnopcRegClassID], |
| 7161 | GPRnoip_and_GPRnopcSubClassMask, |
| 7162 | SuperRegIdxSeqs + 11, |
| 7163 | LaneBitmask(0x0000000000000001), |
| 7164 | 0, |
| 7165 | false, |
| 7166 | 0x00, /* TSFlags */ |
| 7167 | false, /* HasDisjunctSubRegs */ |
| 7168 | true, /* CoveredBySubRegs */ |
| 7169 | GPRnoip_and_GPRnopcSuperclasses, 5, |
| 7170 | GPRnoip_and_GPRnopcGetRawAllocationOrder |
| 7171 | }; |
| 7172 | |
| 7173 | extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass = { |
| 7174 | &ARMMCRegisterClasses[GPRnoip_and_GPRnospRegClassID], |
| 7175 | GPRnoip_and_GPRnospSubClassMask, |
| 7176 | SuperRegIdxSeqs + 11, |
| 7177 | LaneBitmask(0x0000000000000001), |
| 7178 | 0, |
| 7179 | false, |
| 7180 | 0x00, /* TSFlags */ |
| 7181 | false, /* HasDisjunctSubRegs */ |
| 7182 | true, /* CoveredBySubRegs */ |
| 7183 | GPRnoip_and_GPRnospSuperclasses, 3, |
| 7184 | GPRnoip_and_GPRnospGetRawAllocationOrder |
| 7185 | }; |
| 7186 | |
| 7187 | extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass = { |
| 7188 | &ARMMCRegisterClasses[GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID], |
| 7189 | GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask, |
| 7190 | SuperRegIdxSeqs + 11, |
| 7191 | LaneBitmask(0x0000000000000001), |
| 7192 | 0, |
| 7193 | false, |
| 7194 | 0x00, /* TSFlags */ |
| 7195 | false, /* HasDisjunctSubRegs */ |
| 7196 | true, /* CoveredBySubRegs */ |
| 7197 | GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses, 12, |
| 7198 | GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder |
| 7199 | }; |
| 7200 | |
| 7201 | extern const TargetRegisterClass tGPRwithpcRegClass = { |
| 7202 | &ARMMCRegisterClasses[tGPRwithpcRegClassID], |
| 7203 | tGPRwithpcSubClassMask, |
| 7204 | SuperRegIdxSeqs + 11, |
| 7205 | LaneBitmask(0x0000000000000001), |
| 7206 | 0, |
| 7207 | false, |
| 7208 | 0x00, /* TSFlags */ |
| 7209 | false, /* HasDisjunctSubRegs */ |
| 7210 | true, /* CoveredBySubRegs */ |
| 7211 | tGPRwithpcSuperclasses, 4, |
| 7212 | nullptr |
| 7213 | }; |
| 7214 | |
| 7215 | extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass = { |
| 7216 | &ARMMCRegisterClasses[FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID], |
| 7217 | FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask, |
| 7218 | SuperRegIdxSeqs + 0, |
| 7219 | LaneBitmask(0x000000000000000C), |
| 7220 | 0, |
| 7221 | false, |
| 7222 | 0x00, /* TSFlags */ |
| 7223 | true, /* HasDisjunctSubRegs */ |
| 7224 | true, /* CoveredBySubRegs */ |
| 7225 | FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses, 2, |
| 7226 | nullptr |
| 7227 | }; |
| 7228 | |
| 7229 | extern const TargetRegisterClass hGPRRegClass = { |
| 7230 | &ARMMCRegisterClasses[hGPRRegClassID], |
| 7231 | hGPRSubClassMask, |
| 7232 | SuperRegIdxSeqs + 11, |
| 7233 | LaneBitmask(0x0000000000000001), |
| 7234 | 0, |
| 7235 | false, |
| 7236 | 0x00, /* TSFlags */ |
| 7237 | false, /* HasDisjunctSubRegs */ |
| 7238 | true, /* CoveredBySubRegs */ |
| 7239 | hGPRSuperclasses, 1, |
| 7240 | nullptr |
| 7241 | }; |
| 7242 | |
| 7243 | extern const TargetRegisterClass tGPRRegClass = { |
| 7244 | &ARMMCRegisterClasses[tGPRRegClassID], |
| 7245 | tGPRSubClassMask, |
| 7246 | SuperRegIdxSeqs + 11, |
| 7247 | LaneBitmask(0x0000000000000001), |
| 7248 | 0, |
| 7249 | false, |
| 7250 | 0x00, /* TSFlags */ |
| 7251 | false, /* HasDisjunctSubRegs */ |
| 7252 | true, /* CoveredBySubRegs */ |
| 7253 | tGPRSuperclasses, 14, |
| 7254 | nullptr |
| 7255 | }; |
| 7256 | |
| 7257 | extern const TargetRegisterClass tGPREvenRegClass = { |
| 7258 | &ARMMCRegisterClasses[tGPREvenRegClassID], |
| 7259 | tGPREvenSubClassMask, |
| 7260 | SuperRegIdxSeqs + 9, |
| 7261 | LaneBitmask(0x0000000000000001), |
| 7262 | 0, |
| 7263 | false, |
| 7264 | 0x00, /* TSFlags */ |
| 7265 | false, /* HasDisjunctSubRegs */ |
| 7266 | true, /* CoveredBySubRegs */ |
| 7267 | tGPREvenSuperclasses, 9, |
| 7268 | tGPREvenGetRawAllocationOrder |
| 7269 | }; |
| 7270 | |
| 7271 | extern const TargetRegisterClass GPRnopc_and_hGPRRegClass = { |
| 7272 | &ARMMCRegisterClasses[GPRnopc_and_hGPRRegClassID], |
| 7273 | GPRnopc_and_hGPRSubClassMask, |
| 7274 | SuperRegIdxSeqs + 11, |
| 7275 | LaneBitmask(0x0000000000000001), |
| 7276 | 0, |
| 7277 | false, |
| 7278 | 0x00, /* TSFlags */ |
| 7279 | false, /* HasDisjunctSubRegs */ |
| 7280 | true, /* CoveredBySubRegs */ |
| 7281 | GPRnopc_and_hGPRSuperclasses, 5, |
| 7282 | nullptr |
| 7283 | }; |
| 7284 | |
| 7285 | extern const TargetRegisterClass GPRnosp_and_hGPRRegClass = { |
| 7286 | &ARMMCRegisterClasses[GPRnosp_and_hGPRRegClassID], |
| 7287 | GPRnosp_and_hGPRSubClassMask, |
| 7288 | SuperRegIdxSeqs + 11, |
| 7289 | LaneBitmask(0x0000000000000001), |
| 7290 | 0, |
| 7291 | false, |
| 7292 | 0x00, /* TSFlags */ |
| 7293 | false, /* HasDisjunctSubRegs */ |
| 7294 | true, /* CoveredBySubRegs */ |
| 7295 | GPRnosp_and_hGPRSuperclasses, 3, |
| 7296 | nullptr |
| 7297 | }; |
| 7298 | |
| 7299 | extern const TargetRegisterClass GPRnoip_and_hGPRRegClass = { |
| 7300 | &ARMMCRegisterClasses[GPRnoip_and_hGPRRegClassID], |
| 7301 | GPRnoip_and_hGPRSubClassMask, |
| 7302 | SuperRegIdxSeqs + 11, |
| 7303 | LaneBitmask(0x0000000000000001), |
| 7304 | 0, |
| 7305 | false, |
| 7306 | 0x00, /* TSFlags */ |
| 7307 | false, /* HasDisjunctSubRegs */ |
| 7308 | true, /* CoveredBySubRegs */ |
| 7309 | GPRnoip_and_hGPRSuperclasses, 3, |
| 7310 | nullptr |
| 7311 | }; |
| 7312 | |
| 7313 | extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass = { |
| 7314 | &ARMMCRegisterClasses[GPRnoip_and_tGPREvenRegClassID], |
| 7315 | GPRnoip_and_tGPREvenSubClassMask, |
| 7316 | SuperRegIdxSeqs + 9, |
| 7317 | LaneBitmask(0x0000000000000001), |
| 7318 | 0, |
| 7319 | false, |
| 7320 | 0x00, /* TSFlags */ |
| 7321 | false, /* HasDisjunctSubRegs */ |
| 7322 | true, /* CoveredBySubRegs */ |
| 7323 | GPRnoip_and_tGPREvenSuperclasses, 14, |
| 7324 | GPRnoip_and_tGPREvenGetRawAllocationOrder |
| 7325 | }; |
| 7326 | |
| 7327 | extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass = { |
| 7328 | &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_hGPRRegClassID], |
| 7329 | GPRnosp_and_GPRnopc_and_hGPRSubClassMask, |
| 7330 | SuperRegIdxSeqs + 11, |
| 7331 | LaneBitmask(0x0000000000000001), |
| 7332 | 0, |
| 7333 | false, |
| 7334 | 0x00, /* TSFlags */ |
| 7335 | false, /* HasDisjunctSubRegs */ |
| 7336 | true, /* CoveredBySubRegs */ |
| 7337 | GPRnosp_and_GPRnopc_and_hGPRSuperclasses, 12, |
| 7338 | nullptr |
| 7339 | }; |
| 7340 | |
| 7341 | extern const TargetRegisterClass tGPROddRegClass = { |
| 7342 | &ARMMCRegisterClasses[tGPROddRegClassID], |
| 7343 | tGPROddSubClassMask, |
| 7344 | SuperRegIdxSeqs + 12, |
| 7345 | LaneBitmask(0x0000000000000001), |
| 7346 | 0, |
| 7347 | false, |
| 7348 | 0x00, /* TSFlags */ |
| 7349 | false, /* HasDisjunctSubRegs */ |
| 7350 | true, /* CoveredBySubRegs */ |
| 7351 | tGPROddSuperclasses, 13, |
| 7352 | tGPROddGetRawAllocationOrder |
| 7353 | }; |
| 7354 | |
| 7355 | extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass = { |
| 7356 | &ARMMCRegisterClasses[GPRnopc_and_GPRnoip_and_hGPRRegClassID], |
| 7357 | GPRnopc_and_GPRnoip_and_hGPRSubClassMask, |
| 7358 | SuperRegIdxSeqs + 11, |
| 7359 | LaneBitmask(0x0000000000000001), |
| 7360 | 0, |
| 7361 | false, |
| 7362 | 0x00, /* TSFlags */ |
| 7363 | false, /* HasDisjunctSubRegs */ |
| 7364 | true, /* CoveredBySubRegs */ |
| 7365 | GPRnopc_and_GPRnoip_and_hGPRSuperclasses, 9, |
| 7366 | nullptr |
| 7367 | }; |
| 7368 | |
| 7369 | extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass = { |
| 7370 | &ARMMCRegisterClasses[GPRnosp_and_GPRnoip_and_hGPRRegClassID], |
| 7371 | GPRnosp_and_GPRnoip_and_hGPRSubClassMask, |
| 7372 | SuperRegIdxSeqs + 11, |
| 7373 | LaneBitmask(0x0000000000000001), |
| 7374 | 0, |
| 7375 | false, |
| 7376 | 0x00, /* TSFlags */ |
| 7377 | false, /* HasDisjunctSubRegs */ |
| 7378 | true, /* CoveredBySubRegs */ |
| 7379 | GPRnosp_and_GPRnoip_and_hGPRSuperclasses, 7, |
| 7380 | nullptr |
| 7381 | }; |
| 7382 | |
| 7383 | extern const TargetRegisterClass tcGPRRegClass = { |
| 7384 | &ARMMCRegisterClasses[tcGPRRegClassID], |
| 7385 | tcGPRSubClassMask, |
| 7386 | SuperRegIdxSeqs + 11, |
| 7387 | LaneBitmask(0x0000000000000001), |
| 7388 | 0, |
| 7389 | false, |
| 7390 | 0x00, /* TSFlags */ |
| 7391 | false, /* HasDisjunctSubRegs */ |
| 7392 | true, /* CoveredBySubRegs */ |
| 7393 | tcGPRSuperclasses, 9, |
| 7394 | tcGPRGetRawAllocationOrder |
| 7395 | }; |
| 7396 | |
| 7397 | extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass = { |
| 7398 | &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID], |
| 7399 | GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask, |
| 7400 | SuperRegIdxSeqs + 11, |
| 7401 | LaneBitmask(0x0000000000000001), |
| 7402 | 0, |
| 7403 | false, |
| 7404 | 0x00, /* TSFlags */ |
| 7405 | false, /* HasDisjunctSubRegs */ |
| 7406 | true, /* CoveredBySubRegs */ |
| 7407 | GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses, 20, |
| 7408 | nullptr |
| 7409 | }; |
| 7410 | |
| 7411 | extern const TargetRegisterClass hGPR_and_tGPREvenRegClass = { |
| 7412 | &ARMMCRegisterClasses[hGPR_and_tGPREvenRegClassID], |
| 7413 | hGPR_and_tGPREvenSubClassMask, |
| 7414 | SuperRegIdxSeqs + 9, |
| 7415 | LaneBitmask(0x0000000000000001), |
| 7416 | 0, |
| 7417 | false, |
| 7418 | 0x00, /* TSFlags */ |
| 7419 | false, /* HasDisjunctSubRegs */ |
| 7420 | true, /* CoveredBySubRegs */ |
| 7421 | hGPR_and_tGPREvenSuperclasses, 14, |
| 7422 | nullptr |
| 7423 | }; |
| 7424 | |
| 7425 | extern const TargetRegisterClass tGPR_and_tGPREvenRegClass = { |
| 7426 | &ARMMCRegisterClasses[tGPR_and_tGPREvenRegClassID], |
| 7427 | tGPR_and_tGPREvenSubClassMask, |
| 7428 | SuperRegIdxSeqs + 9, |
| 7429 | LaneBitmask(0x0000000000000001), |
| 7430 | 0, |
| 7431 | false, |
| 7432 | 0x00, /* TSFlags */ |
| 7433 | false, /* HasDisjunctSubRegs */ |
| 7434 | true, /* CoveredBySubRegs */ |
| 7435 | tGPR_and_tGPREvenSuperclasses, 17, |
| 7436 | tGPR_and_tGPREvenGetRawAllocationOrder |
| 7437 | }; |
| 7438 | |
| 7439 | extern const TargetRegisterClass tGPR_and_tGPROddRegClass = { |
| 7440 | &ARMMCRegisterClasses[tGPR_and_tGPROddRegClassID], |
| 7441 | tGPR_and_tGPROddSubClassMask, |
| 7442 | SuperRegIdxSeqs + 12, |
| 7443 | LaneBitmask(0x0000000000000001), |
| 7444 | 0, |
| 7445 | false, |
| 7446 | 0x00, /* TSFlags */ |
| 7447 | false, /* HasDisjunctSubRegs */ |
| 7448 | true, /* CoveredBySubRegs */ |
| 7449 | tGPR_and_tGPROddSuperclasses, 16, |
| 7450 | tGPR_and_tGPROddGetRawAllocationOrder |
| 7451 | }; |
| 7452 | |
| 7453 | extern const TargetRegisterClass tcGPRnotr12RegClass = { |
| 7454 | &ARMMCRegisterClasses[tcGPRnotr12RegClassID], |
| 7455 | tcGPRnotr12SubClassMask, |
| 7456 | SuperRegIdxSeqs + 11, |
| 7457 | LaneBitmask(0x0000000000000001), |
| 7458 | 0, |
| 7459 | false, |
| 7460 | 0x00, /* TSFlags */ |
| 7461 | false, /* HasDisjunctSubRegs */ |
| 7462 | true, /* CoveredBySubRegs */ |
| 7463 | tcGPRnotr12Superclasses, 16, |
| 7464 | nullptr |
| 7465 | }; |
| 7466 | |
| 7467 | extern const TargetRegisterClass tGPREven_and_tcGPRRegClass = { |
| 7468 | &ARMMCRegisterClasses[tGPREven_and_tcGPRRegClassID], |
| 7469 | tGPREven_and_tcGPRSubClassMask, |
| 7470 | SuperRegIdxSeqs + 9, |
| 7471 | LaneBitmask(0x0000000000000001), |
| 7472 | 0, |
| 7473 | false, |
| 7474 | 0x00, /* TSFlags */ |
| 7475 | false, /* HasDisjunctSubRegs */ |
| 7476 | true, /* CoveredBySubRegs */ |
| 7477 | tGPREven_and_tcGPRSuperclasses, 11, |
| 7478 | tGPREven_and_tcGPRGetRawAllocationOrder |
| 7479 | }; |
| 7480 | |
| 7481 | extern const TargetRegisterClass FP_STATUS_REGSRegClass = { |
| 7482 | &ARMMCRegisterClasses[FP_STATUS_REGSRegClassID], |
| 7483 | FP_STATUS_REGSSubClassMask, |
| 7484 | SuperRegIdxSeqs + 8, |
| 7485 | LaneBitmask(0x0000000000000001), |
| 7486 | 0, |
| 7487 | false, |
| 7488 | 0x00, /* TSFlags */ |
| 7489 | false, /* HasDisjunctSubRegs */ |
| 7490 | true, /* CoveredBySubRegs */ |
| 7491 | nullptr, 0, |
| 7492 | nullptr |
| 7493 | }; |
| 7494 | |
| 7495 | extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass = { |
| 7496 | &ARMMCRegisterClasses[hGPR_and_GPRnoip_and_tGPREvenRegClassID], |
| 7497 | hGPR_and_GPRnoip_and_tGPREvenSubClassMask, |
| 7498 | SuperRegIdxSeqs + 9, |
| 7499 | LaneBitmask(0x0000000000000001), |
| 7500 | 0, |
| 7501 | false, |
| 7502 | 0x00, /* TSFlags */ |
| 7503 | false, /* HasDisjunctSubRegs */ |
| 7504 | true, /* CoveredBySubRegs */ |
| 7505 | hGPR_and_GPRnoip_and_tGPREvenSuperclasses, 24, |
| 7506 | nullptr |
| 7507 | }; |
| 7508 | |
| 7509 | extern const TargetRegisterClass hGPR_and_tGPROddRegClass = { |
| 7510 | &ARMMCRegisterClasses[hGPR_and_tGPROddRegClassID], |
| 7511 | hGPR_and_tGPROddSubClassMask, |
| 7512 | SuperRegIdxSeqs + 12, |
| 7513 | LaneBitmask(0x0000000000000001), |
| 7514 | 0, |
| 7515 | false, |
| 7516 | 0x00, /* TSFlags */ |
| 7517 | false, /* HasDisjunctSubRegs */ |
| 7518 | true, /* CoveredBySubRegs */ |
| 7519 | hGPR_and_tGPROddSuperclasses, 22, |
| 7520 | nullptr |
| 7521 | }; |
| 7522 | |
| 7523 | extern const TargetRegisterClass tGPREven_and_tcGPRnotr12RegClass = { |
| 7524 | &ARMMCRegisterClasses[tGPREven_and_tcGPRnotr12RegClassID], |
| 7525 | tGPREven_and_tcGPRnotr12SubClassMask, |
| 7526 | SuperRegIdxSeqs + 9, |
| 7527 | LaneBitmask(0x0000000000000001), |
| 7528 | 0, |
| 7529 | false, |
| 7530 | 0x00, /* TSFlags */ |
| 7531 | false, /* HasDisjunctSubRegs */ |
| 7532 | true, /* CoveredBySubRegs */ |
| 7533 | tGPREven_and_tcGPRnotr12Superclasses, 21, |
| 7534 | tGPREven_and_tcGPRnotr12GetRawAllocationOrder |
| 7535 | }; |
| 7536 | |
| 7537 | extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass = { |
| 7538 | &ARMMCRegisterClasses[tGPROdd_and_tcGPRRegClassID], |
| 7539 | tGPROdd_and_tcGPRSubClassMask, |
| 7540 | SuperRegIdxSeqs + 12, |
| 7541 | LaneBitmask(0x0000000000000001), |
| 7542 | 0, |
| 7543 | false, |
| 7544 | 0x00, /* TSFlags */ |
| 7545 | false, /* HasDisjunctSubRegs */ |
| 7546 | true, /* CoveredBySubRegs */ |
| 7547 | tGPROdd_and_tcGPRSuperclasses, 19, |
| 7548 | nullptr |
| 7549 | }; |
| 7550 | |
| 7551 | extern const TargetRegisterClass CCRRegClass = { |
| 7552 | &ARMMCRegisterClasses[CCRRegClassID], |
| 7553 | CCRSubClassMask, |
| 7554 | SuperRegIdxSeqs + 8, |
| 7555 | LaneBitmask(0x0000000000000001), |
| 7556 | 0, |
| 7557 | false, |
| 7558 | 0x00, /* TSFlags */ |
| 7559 | false, /* HasDisjunctSubRegs */ |
| 7560 | true, /* CoveredBySubRegs */ |
| 7561 | nullptr, 0, |
| 7562 | nullptr |
| 7563 | }; |
| 7564 | |
| 7565 | extern const TargetRegisterClass FPCXTRegsRegClass = { |
| 7566 | &ARMMCRegisterClasses[FPCXTRegsRegClassID], |
| 7567 | FPCXTRegsSubClassMask, |
| 7568 | SuperRegIdxSeqs + 8, |
| 7569 | LaneBitmask(0x0000000000000001), |
| 7570 | 0, |
| 7571 | false, |
| 7572 | 0x00, /* TSFlags */ |
| 7573 | false, /* HasDisjunctSubRegs */ |
| 7574 | true, /* CoveredBySubRegs */ |
| 7575 | nullptr, 0, |
| 7576 | nullptr |
| 7577 | }; |
| 7578 | |
| 7579 | extern const TargetRegisterClass GPRlrRegClass = { |
| 7580 | &ARMMCRegisterClasses[GPRlrRegClassID], |
| 7581 | GPRlrSubClassMask, |
| 7582 | SuperRegIdxSeqs + 8, |
| 7583 | LaneBitmask(0x0000000000000001), |
| 7584 | 0, |
| 7585 | false, |
| 7586 | 0x00, /* TSFlags */ |
| 7587 | false, /* HasDisjunctSubRegs */ |
| 7588 | true, /* CoveredBySubRegs */ |
| 7589 | GPRlrSuperclasses, 15, |
| 7590 | nullptr |
| 7591 | }; |
| 7592 | |
| 7593 | extern const TargetRegisterClass GPRspRegClass = { |
| 7594 | &ARMMCRegisterClasses[GPRspRegClassID], |
| 7595 | GPRspSubClassMask, |
| 7596 | SuperRegIdxSeqs + 12, |
| 7597 | LaneBitmask(0x0000000000000001), |
| 7598 | 0, |
| 7599 | false, |
| 7600 | 0x00, /* TSFlags */ |
| 7601 | false, /* HasDisjunctSubRegs */ |
| 7602 | true, /* CoveredBySubRegs */ |
| 7603 | GPRspSuperclasses, 10, |
| 7604 | nullptr |
| 7605 | }; |
| 7606 | |
| 7607 | extern const TargetRegisterClass VCCRRegClass = { |
| 7608 | &ARMMCRegisterClasses[VCCRRegClassID], |
| 7609 | VCCRSubClassMask, |
| 7610 | SuperRegIdxSeqs + 8, |
| 7611 | LaneBitmask(0x0000000000000001), |
| 7612 | 0, |
| 7613 | false, |
| 7614 | 0x00, /* TSFlags */ |
| 7615 | false, /* HasDisjunctSubRegs */ |
| 7616 | true, /* CoveredBySubRegs */ |
| 7617 | VCCRSuperclasses, 1, |
| 7618 | nullptr |
| 7619 | }; |
| 7620 | |
| 7621 | extern const TargetRegisterClass cl_FPSCR_NZCVRegClass = { |
| 7622 | &ARMMCRegisterClasses[cl_FPSCR_NZCVRegClassID], |
| 7623 | cl_FPSCR_NZCVSubClassMask, |
| 7624 | SuperRegIdxSeqs + 8, |
| 7625 | LaneBitmask(0x0000000000000001), |
| 7626 | 0, |
| 7627 | false, |
| 7628 | 0x00, /* TSFlags */ |
| 7629 | false, /* HasDisjunctSubRegs */ |
| 7630 | true, /* CoveredBySubRegs */ |
| 7631 | nullptr, 0, |
| 7632 | nullptr |
| 7633 | }; |
| 7634 | |
| 7635 | extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass = { |
| 7636 | &ARMMCRegisterClasses[hGPR_and_tGPRwithpcRegClassID], |
| 7637 | hGPR_and_tGPRwithpcSubClassMask, |
| 7638 | SuperRegIdxSeqs + 8, |
| 7639 | LaneBitmask(0x0000000000000001), |
| 7640 | 0, |
| 7641 | false, |
| 7642 | 0x00, /* TSFlags */ |
| 7643 | false, /* HasDisjunctSubRegs */ |
| 7644 | true, /* CoveredBySubRegs */ |
| 7645 | hGPR_and_tGPRwithpcSuperclasses, 9, |
| 7646 | nullptr |
| 7647 | }; |
| 7648 | |
| 7649 | extern const TargetRegisterClass hGPR_and_tcGPRRegClass = { |
| 7650 | &ARMMCRegisterClasses[hGPR_and_tcGPRRegClassID], |
| 7651 | hGPR_and_tcGPRSubClassMask, |
| 7652 | SuperRegIdxSeqs + 9, |
| 7653 | LaneBitmask(0x0000000000000001), |
| 7654 | 0, |
| 7655 | false, |
| 7656 | 0x00, /* TSFlags */ |
| 7657 | false, /* HasDisjunctSubRegs */ |
| 7658 | true, /* CoveredBySubRegs */ |
| 7659 | hGPR_and_tcGPRSuperclasses, 17, |
| 7660 | hGPR_and_tcGPRGetRawAllocationOrder |
| 7661 | }; |
| 7662 | |
| 7663 | extern const TargetRegisterClass DPRRegClass = { |
| 7664 | &ARMMCRegisterClasses[DPRRegClassID], |
| 7665 | DPRSubClassMask, |
| 7666 | SuperRegIdxSeqs + 0, |
| 7667 | LaneBitmask(0x000000000000000C), |
| 7668 | 0, |
| 7669 | false, |
| 7670 | 0x00, /* TSFlags */ |
| 7671 | true, /* HasDisjunctSubRegs */ |
| 7672 | false, /* CoveredBySubRegs */ |
| 7673 | DPRSuperclasses, 1, |
| 7674 | DPRGetRawAllocationOrder |
| 7675 | }; |
| 7676 | |
| 7677 | extern const TargetRegisterClass DPR_VFP2RegClass = { |
| 7678 | &ARMMCRegisterClasses[DPR_VFP2RegClassID], |
| 7679 | DPR_VFP2SubClassMask, |
| 7680 | SuperRegIdxSeqs + 0, |
| 7681 | LaneBitmask(0x000000000000000C), |
| 7682 | 0, |
| 7683 | false, |
| 7684 | 0x00, /* TSFlags */ |
| 7685 | true, /* HasDisjunctSubRegs */ |
| 7686 | true, /* CoveredBySubRegs */ |
| 7687 | DPR_VFP2Superclasses, 3, |
| 7688 | nullptr |
| 7689 | }; |
| 7690 | |
| 7691 | extern const TargetRegisterClass DPR_8RegClass = { |
| 7692 | &ARMMCRegisterClasses[DPR_8RegClassID], |
| 7693 | DPR_8SubClassMask, |
| 7694 | SuperRegIdxSeqs + 0, |
| 7695 | LaneBitmask(0x000000000000000C), |
| 7696 | 0, |
| 7697 | false, |
| 7698 | 0x00, /* TSFlags */ |
| 7699 | true, /* HasDisjunctSubRegs */ |
| 7700 | true, /* CoveredBySubRegs */ |
| 7701 | DPR_8Superclasses, 5, |
| 7702 | nullptr |
| 7703 | }; |
| 7704 | |
| 7705 | extern const TargetRegisterClass GPRPairRegClass = { |
| 7706 | &ARMMCRegisterClasses[GPRPairRegClassID], |
| 7707 | GPRPairSubClassMask, |
| 7708 | SuperRegIdxSeqs + 8, |
| 7709 | LaneBitmask(0x0000000000000003), |
| 7710 | 0, |
| 7711 | false, |
| 7712 | 0x00, /* TSFlags */ |
| 7713 | true, /* HasDisjunctSubRegs */ |
| 7714 | true, /* CoveredBySubRegs */ |
| 7715 | nullptr, 0, |
| 7716 | nullptr |
| 7717 | }; |
| 7718 | |
| 7719 | extern const TargetRegisterClass GPRPairnospRegClass = { |
| 7720 | &ARMMCRegisterClasses[GPRPairnospRegClassID], |
| 7721 | GPRPairnospSubClassMask, |
| 7722 | SuperRegIdxSeqs + 8, |
| 7723 | LaneBitmask(0x0000000000000003), |
| 7724 | 0, |
| 7725 | false, |
| 7726 | 0x00, /* TSFlags */ |
| 7727 | true, /* HasDisjunctSubRegs */ |
| 7728 | true, /* CoveredBySubRegs */ |
| 7729 | GPRPairnospSuperclasses, 1, |
| 7730 | nullptr |
| 7731 | }; |
| 7732 | |
| 7733 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass = { |
| 7734 | &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tGPRRegClassID], |
| 7735 | GPRPair_with_gsub_0_in_tGPRSubClassMask, |
| 7736 | SuperRegIdxSeqs + 8, |
| 7737 | LaneBitmask(0x0000000000000003), |
| 7738 | 0, |
| 7739 | false, |
| 7740 | 0x00, /* TSFlags */ |
| 7741 | true, /* HasDisjunctSubRegs */ |
| 7742 | true, /* CoveredBySubRegs */ |
| 7743 | GPRPair_with_gsub_0_in_tGPRSuperclasses, 2, |
| 7744 | nullptr |
| 7745 | }; |
| 7746 | |
| 7747 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass = { |
| 7748 | &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_hGPRRegClassID], |
| 7749 | GPRPair_with_gsub_0_in_hGPRSubClassMask, |
| 7750 | SuperRegIdxSeqs + 8, |
| 7751 | LaneBitmask(0x0000000000000003), |
| 7752 | 0, |
| 7753 | false, |
| 7754 | 0x00, /* TSFlags */ |
| 7755 | true, /* HasDisjunctSubRegs */ |
| 7756 | true, /* CoveredBySubRegs */ |
| 7757 | GPRPair_with_gsub_0_in_hGPRSuperclasses, 1, |
| 7758 | nullptr |
| 7759 | }; |
| 7760 | |
| 7761 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass = { |
| 7762 | &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRRegClassID], |
| 7763 | GPRPair_with_gsub_0_in_tcGPRSubClassMask, |
| 7764 | SuperRegIdxSeqs + 8, |
| 7765 | LaneBitmask(0x0000000000000003), |
| 7766 | 0, |
| 7767 | false, |
| 7768 | 0x00, /* TSFlags */ |
| 7769 | true, /* HasDisjunctSubRegs */ |
| 7770 | true, /* CoveredBySubRegs */ |
| 7771 | GPRPair_with_gsub_0_in_tcGPRSuperclasses, 1, |
| 7772 | nullptr |
| 7773 | }; |
| 7774 | |
| 7775 | extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRnotr12RegClass = { |
| 7776 | &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID], |
| 7777 | GPRPair_with_gsub_0_in_tcGPRnotr12SubClassMask, |
| 7778 | SuperRegIdxSeqs + 8, |
| 7779 | LaneBitmask(0x0000000000000003), |
| 7780 | 0, |
| 7781 | false, |
| 7782 | 0x00, /* TSFlags */ |
| 7783 | true, /* HasDisjunctSubRegs */ |
| 7784 | true, /* CoveredBySubRegs */ |
| 7785 | GPRPair_with_gsub_0_in_tcGPRnotr12Superclasses, 4, |
| 7786 | nullptr |
| 7787 | }; |
| 7788 | |
| 7789 | extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass = { |
| 7790 | &ARMMCRegisterClasses[GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID], |
| 7791 | GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask, |
| 7792 | SuperRegIdxSeqs + 8, |
| 7793 | LaneBitmask(0x0000000000000003), |
| 7794 | 0, |
| 7795 | false, |
| 7796 | 0x00, /* TSFlags */ |
| 7797 | true, /* HasDisjunctSubRegs */ |
| 7798 | true, /* CoveredBySubRegs */ |
| 7799 | GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses, 3, |
| 7800 | nullptr |
| 7801 | }; |
| 7802 | |
| 7803 | extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass = { |
| 7804 | &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_GPRspRegClassID], |
| 7805 | GPRPair_with_gsub_1_in_GPRspSubClassMask, |
| 7806 | SuperRegIdxSeqs + 8, |
| 7807 | LaneBitmask(0x0000000000000003), |
| 7808 | 0, |
| 7809 | false, |
| 7810 | 0x00, /* TSFlags */ |
| 7811 | true, /* HasDisjunctSubRegs */ |
| 7812 | true, /* CoveredBySubRegs */ |
| 7813 | GPRPair_with_gsub_1_in_GPRspSuperclasses, 3, |
| 7814 | nullptr |
| 7815 | }; |
| 7816 | |
| 7817 | extern const TargetRegisterClass DPairSpcRegClass = { |
| 7818 | &ARMMCRegisterClasses[DPairSpcRegClassID], |
| 7819 | DPairSpcSubClassMask, |
| 7820 | SuperRegIdxSeqs + 58, |
| 7821 | LaneBitmask(0x00000000000000CC), |
| 7822 | 0, |
| 7823 | false, |
| 7824 | 0x00, /* TSFlags */ |
| 7825 | true, /* HasDisjunctSubRegs */ |
| 7826 | true, /* CoveredBySubRegs */ |
| 7827 | nullptr, 0, |
| 7828 | nullptr |
| 7829 | }; |
| 7830 | |
| 7831 | extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass = { |
| 7832 | &ARMMCRegisterClasses[DPairSpc_with_ssub_0RegClassID], |
| 7833 | DPairSpc_with_ssub_0SubClassMask, |
| 7834 | SuperRegIdxSeqs + 58, |
| 7835 | LaneBitmask(0x00000000000000CC), |
| 7836 | 0, |
| 7837 | false, |
| 7838 | 0x00, /* TSFlags */ |
| 7839 | true, /* HasDisjunctSubRegs */ |
| 7840 | true, /* CoveredBySubRegs */ |
| 7841 | DPairSpc_with_ssub_0Superclasses, 1, |
| 7842 | nullptr |
| 7843 | }; |
| 7844 | |
| 7845 | extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass = { |
| 7846 | &ARMMCRegisterClasses[DPairSpc_with_ssub_4RegClassID], |
| 7847 | DPairSpc_with_ssub_4SubClassMask, |
| 7848 | SuperRegIdxSeqs + 58, |
| 7849 | LaneBitmask(0x00000000000000CC), |
| 7850 | 0, |
| 7851 | false, |
| 7852 | 0x00, /* TSFlags */ |
| 7853 | true, /* HasDisjunctSubRegs */ |
| 7854 | true, /* CoveredBySubRegs */ |
| 7855 | DPairSpc_with_ssub_4Superclasses, 2, |
| 7856 | nullptr |
| 7857 | }; |
| 7858 | |
| 7859 | extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass = { |
| 7860 | &ARMMCRegisterClasses[DPairSpc_with_dsub_0_in_DPR_8RegClassID], |
| 7861 | DPairSpc_with_dsub_0_in_DPR_8SubClassMask, |
| 7862 | SuperRegIdxSeqs + 58, |
| 7863 | LaneBitmask(0x00000000000000CC), |
| 7864 | 0, |
| 7865 | false, |
| 7866 | 0x00, /* TSFlags */ |
| 7867 | true, /* HasDisjunctSubRegs */ |
| 7868 | true, /* CoveredBySubRegs */ |
| 7869 | DPairSpc_with_dsub_0_in_DPR_8Superclasses, 3, |
| 7870 | nullptr |
| 7871 | }; |
| 7872 | |
| 7873 | extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass = { |
| 7874 | &ARMMCRegisterClasses[DPairSpc_with_dsub_2_in_DPR_8RegClassID], |
| 7875 | DPairSpc_with_dsub_2_in_DPR_8SubClassMask, |
| 7876 | SuperRegIdxSeqs + 58, |
| 7877 | LaneBitmask(0x00000000000000CC), |
| 7878 | 0, |
| 7879 | false, |
| 7880 | 0x00, /* TSFlags */ |
| 7881 | true, /* HasDisjunctSubRegs */ |
| 7882 | true, /* CoveredBySubRegs */ |
| 7883 | DPairSpc_with_dsub_2_in_DPR_8Superclasses, 4, |
| 7884 | nullptr |
| 7885 | }; |
| 7886 | |
| 7887 | extern const TargetRegisterClass DPairRegClass = { |
| 7888 | &ARMMCRegisterClasses[DPairRegClassID], |
| 7889 | DPairSubClassMask, |
| 7890 | SuperRegIdxSeqs + 76, |
| 7891 | LaneBitmask(0x000000000000003C), |
| 7892 | 0, |
| 7893 | false, |
| 7894 | 0x00, /* TSFlags */ |
| 7895 | true, /* HasDisjunctSubRegs */ |
| 7896 | true, /* CoveredBySubRegs */ |
| 7897 | nullptr, 0, |
| 7898 | DPairGetRawAllocationOrder |
| 7899 | }; |
| 7900 | |
| 7901 | extern const TargetRegisterClass DPair_with_ssub_0RegClass = { |
| 7902 | &ARMMCRegisterClasses[DPair_with_ssub_0RegClassID], |
| 7903 | DPair_with_ssub_0SubClassMask, |
| 7904 | SuperRegIdxSeqs + 76, |
| 7905 | LaneBitmask(0x000000000000003C), |
| 7906 | 0, |
| 7907 | false, |
| 7908 | 0x00, /* TSFlags */ |
| 7909 | true, /* HasDisjunctSubRegs */ |
| 7910 | true, /* CoveredBySubRegs */ |
| 7911 | DPair_with_ssub_0Superclasses, 1, |
| 7912 | DPair_with_ssub_0GetRawAllocationOrder |
| 7913 | }; |
| 7914 | |
| 7915 | extern const TargetRegisterClass QPRRegClass = { |
| 7916 | &ARMMCRegisterClasses[QPRRegClassID], |
| 7917 | QPRSubClassMask, |
| 7918 | SuperRegIdxSeqs + 39, |
| 7919 | LaneBitmask(0x000000000000003C), |
| 7920 | 0, |
| 7921 | false, |
| 7922 | 0x00, /* TSFlags */ |
| 7923 | true, /* HasDisjunctSubRegs */ |
| 7924 | true, /* CoveredBySubRegs */ |
| 7925 | QPRSuperclasses, 1, |
| 7926 | QPRGetRawAllocationOrder |
| 7927 | }; |
| 7928 | |
| 7929 | extern const TargetRegisterClass DPair_with_ssub_2RegClass = { |
| 7930 | &ARMMCRegisterClasses[DPair_with_ssub_2RegClassID], |
| 7931 | DPair_with_ssub_2SubClassMask, |
| 7932 | SuperRegIdxSeqs + 76, |
| 7933 | LaneBitmask(0x000000000000003C), |
| 7934 | 0, |
| 7935 | false, |
| 7936 | 0x00, /* TSFlags */ |
| 7937 | true, /* HasDisjunctSubRegs */ |
| 7938 | true, /* CoveredBySubRegs */ |
| 7939 | DPair_with_ssub_2Superclasses, 2, |
| 7940 | DPair_with_ssub_2GetRawAllocationOrder |
| 7941 | }; |
| 7942 | |
| 7943 | extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass = { |
| 7944 | &ARMMCRegisterClasses[DPair_with_dsub_0_in_DPR_8RegClassID], |
| 7945 | DPair_with_dsub_0_in_DPR_8SubClassMask, |
| 7946 | SuperRegIdxSeqs + 76, |
| 7947 | LaneBitmask(0x000000000000003C), |
| 7948 | 0, |
| 7949 | false, |
| 7950 | 0x00, /* TSFlags */ |
| 7951 | true, /* HasDisjunctSubRegs */ |
| 7952 | true, /* CoveredBySubRegs */ |
| 7953 | DPair_with_dsub_0_in_DPR_8Superclasses, 3, |
| 7954 | DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder |
| 7955 | }; |
| 7956 | |
| 7957 | extern const TargetRegisterClass MQPRRegClass = { |
| 7958 | &ARMMCRegisterClasses[MQPRRegClassID], |
| 7959 | MQPRSubClassMask, |
| 7960 | SuperRegIdxSeqs + 39, |
| 7961 | LaneBitmask(0x000000000000003C), |
| 7962 | 0, |
| 7963 | false, |
| 7964 | 0x00, /* TSFlags */ |
| 7965 | true, /* HasDisjunctSubRegs */ |
| 7966 | true, /* CoveredBySubRegs */ |
| 7967 | MQPRSuperclasses, 5, |
| 7968 | nullptr |
| 7969 | }; |
| 7970 | |
| 7971 | extern const TargetRegisterClass QPR_VFP2RegClass = { |
| 7972 | &ARMMCRegisterClasses[QPR_VFP2RegClassID], |
| 7973 | QPR_VFP2SubClassMask, |
| 7974 | SuperRegIdxSeqs + 39, |
| 7975 | LaneBitmask(0x000000000000003C), |
| 7976 | 0, |
| 7977 | false, |
| 7978 | 0x00, /* TSFlags */ |
| 7979 | true, /* HasDisjunctSubRegs */ |
| 7980 | true, /* CoveredBySubRegs */ |
| 7981 | QPR_VFP2Superclasses, 5, |
| 7982 | nullptr |
| 7983 | }; |
| 7984 | |
| 7985 | extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass = { |
| 7986 | &ARMMCRegisterClasses[DPair_with_dsub_1_in_DPR_8RegClassID], |
| 7987 | DPair_with_dsub_1_in_DPR_8SubClassMask, |
| 7988 | SuperRegIdxSeqs + 76, |
| 7989 | LaneBitmask(0x000000000000003C), |
| 7990 | 0, |
| 7991 | false, |
| 7992 | 0x00, /* TSFlags */ |
| 7993 | true, /* HasDisjunctSubRegs */ |
| 7994 | true, /* CoveredBySubRegs */ |
| 7995 | DPair_with_dsub_1_in_DPR_8Superclasses, 4, |
| 7996 | DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder |
| 7997 | }; |
| 7998 | |
| 7999 | extern const TargetRegisterClass QPR_8RegClass = { |
| 8000 | &ARMMCRegisterClasses[QPR_8RegClassID], |
| 8001 | QPR_8SubClassMask, |
| 8002 | SuperRegIdxSeqs + 39, |
| 8003 | LaneBitmask(0x000000000000003C), |
| 8004 | 0, |
| 8005 | false, |
| 8006 | 0x00, /* TSFlags */ |
| 8007 | true, /* HasDisjunctSubRegs */ |
| 8008 | true, /* CoveredBySubRegs */ |
| 8009 | QPR_8Superclasses, 8, |
| 8010 | nullptr |
| 8011 | }; |
| 8012 | |
| 8013 | extern const TargetRegisterClass DTripleRegClass = { |
| 8014 | &ARMMCRegisterClasses[DTripleRegClassID], |
| 8015 | DTripleSubClassMask, |
| 8016 | SuperRegIdxSeqs + 69, |
| 8017 | LaneBitmask(0x00000000000000FC), |
| 8018 | 0, |
| 8019 | false, |
| 8020 | 0x00, /* TSFlags */ |
| 8021 | true, /* HasDisjunctSubRegs */ |
| 8022 | true, /* CoveredBySubRegs */ |
| 8023 | nullptr, 0, |
| 8024 | nullptr |
| 8025 | }; |
| 8026 | |
| 8027 | extern const TargetRegisterClass DTripleSpcRegClass = { |
| 8028 | &ARMMCRegisterClasses[DTripleSpcRegClassID], |
| 8029 | DTripleSpcSubClassMask, |
| 8030 | SuperRegIdxSeqs + 45, |
| 8031 | LaneBitmask(0x0000000000000CCC), |
| 8032 | 0, |
| 8033 | false, |
| 8034 | 0x00, /* TSFlags */ |
| 8035 | true, /* HasDisjunctSubRegs */ |
| 8036 | true, /* CoveredBySubRegs */ |
| 8037 | nullptr, 0, |
| 8038 | nullptr |
| 8039 | }; |
| 8040 | |
| 8041 | extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass = { |
| 8042 | &ARMMCRegisterClasses[DTripleSpc_with_ssub_0RegClassID], |
| 8043 | DTripleSpc_with_ssub_0SubClassMask, |
| 8044 | SuperRegIdxSeqs + 45, |
| 8045 | LaneBitmask(0x0000000000000CCC), |
| 8046 | 0, |
| 8047 | false, |
| 8048 | 0x00, /* TSFlags */ |
| 8049 | true, /* HasDisjunctSubRegs */ |
| 8050 | true, /* CoveredBySubRegs */ |
| 8051 | DTripleSpc_with_ssub_0Superclasses, 1, |
| 8052 | nullptr |
| 8053 | }; |
| 8054 | |
| 8055 | extern const TargetRegisterClass DTriple_with_ssub_0RegClass = { |
| 8056 | &ARMMCRegisterClasses[DTriple_with_ssub_0RegClassID], |
| 8057 | DTriple_with_ssub_0SubClassMask, |
| 8058 | SuperRegIdxSeqs + 69, |
| 8059 | LaneBitmask(0x00000000000000FC), |
| 8060 | 0, |
| 8061 | false, |
| 8062 | 0x00, /* TSFlags */ |
| 8063 | true, /* HasDisjunctSubRegs */ |
| 8064 | true, /* CoveredBySubRegs */ |
| 8065 | DTriple_with_ssub_0Superclasses, 1, |
| 8066 | nullptr |
| 8067 | }; |
| 8068 | |
| 8069 | extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass = { |
| 8070 | &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPRRegClassID], |
| 8071 | DTriple_with_qsub_0_in_QPRSubClassMask, |
| 8072 | SuperRegIdxSeqs + 53, |
| 8073 | LaneBitmask(0x00000000000000FC), |
| 8074 | 0, |
| 8075 | false, |
| 8076 | 0x00, /* TSFlags */ |
| 8077 | true, /* HasDisjunctSubRegs */ |
| 8078 | true, /* CoveredBySubRegs */ |
| 8079 | DTriple_with_qsub_0_in_QPRSuperclasses, 1, |
| 8080 | nullptr |
| 8081 | }; |
| 8082 | |
| 8083 | extern const TargetRegisterClass DTriple_with_ssub_2RegClass = { |
| 8084 | &ARMMCRegisterClasses[DTriple_with_ssub_2RegClassID], |
| 8085 | DTriple_with_ssub_2SubClassMask, |
| 8086 | SuperRegIdxSeqs + 69, |
| 8087 | LaneBitmask(0x00000000000000FC), |
| 8088 | 0, |
| 8089 | false, |
| 8090 | 0x00, /* TSFlags */ |
| 8091 | true, /* HasDisjunctSubRegs */ |
| 8092 | true, /* CoveredBySubRegs */ |
| 8093 | DTriple_with_ssub_2Superclasses, 2, |
| 8094 | nullptr |
| 8095 | }; |
| 8096 | |
| 8097 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| 8098 | &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| 8099 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| 8100 | SuperRegIdxSeqs + 64, |
| 8101 | LaneBitmask(0x00000000000000FC), |
| 8102 | 0, |
| 8103 | false, |
| 8104 | 0x00, /* TSFlags */ |
| 8105 | true, /* HasDisjunctSubRegs */ |
| 8106 | true, /* CoveredBySubRegs */ |
| 8107 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, 1, |
| 8108 | nullptr |
| 8109 | }; |
| 8110 | |
| 8111 | extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass = { |
| 8112 | &ARMMCRegisterClasses[DTripleSpc_with_ssub_4RegClassID], |
| 8113 | DTripleSpc_with_ssub_4SubClassMask, |
| 8114 | SuperRegIdxSeqs + 45, |
| 8115 | LaneBitmask(0x0000000000000CCC), |
| 8116 | 0, |
| 8117 | false, |
| 8118 | 0x00, /* TSFlags */ |
| 8119 | true, /* HasDisjunctSubRegs */ |
| 8120 | true, /* CoveredBySubRegs */ |
| 8121 | DTripleSpc_with_ssub_4Superclasses, 2, |
| 8122 | nullptr |
| 8123 | }; |
| 8124 | |
| 8125 | extern const TargetRegisterClass DTriple_with_ssub_4RegClass = { |
| 8126 | &ARMMCRegisterClasses[DTriple_with_ssub_4RegClassID], |
| 8127 | DTriple_with_ssub_4SubClassMask, |
| 8128 | SuperRegIdxSeqs + 69, |
| 8129 | LaneBitmask(0x00000000000000FC), |
| 8130 | 0, |
| 8131 | false, |
| 8132 | 0x00, /* TSFlags */ |
| 8133 | true, /* HasDisjunctSubRegs */ |
| 8134 | true, /* CoveredBySubRegs */ |
| 8135 | DTriple_with_ssub_4Superclasses, 3, |
| 8136 | nullptr |
| 8137 | }; |
| 8138 | |
| 8139 | extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass = { |
| 8140 | &ARMMCRegisterClasses[DTripleSpc_with_ssub_8RegClassID], |
| 8141 | DTripleSpc_with_ssub_8SubClassMask, |
| 8142 | SuperRegIdxSeqs + 45, |
| 8143 | LaneBitmask(0x0000000000000CCC), |
| 8144 | 0, |
| 8145 | false, |
| 8146 | 0x00, /* TSFlags */ |
| 8147 | true, /* HasDisjunctSubRegs */ |
| 8148 | true, /* CoveredBySubRegs */ |
| 8149 | DTripleSpc_with_ssub_8Superclasses, 3, |
| 8150 | nullptr |
| 8151 | }; |
| 8152 | |
| 8153 | extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass = { |
| 8154 | &ARMMCRegisterClasses[DTripleSpc_with_dsub_0_in_DPR_8RegClassID], |
| 8155 | DTripleSpc_with_dsub_0_in_DPR_8SubClassMask, |
| 8156 | SuperRegIdxSeqs + 45, |
| 8157 | LaneBitmask(0x0000000000000CCC), |
| 8158 | 0, |
| 8159 | false, |
| 8160 | 0x00, /* TSFlags */ |
| 8161 | true, /* HasDisjunctSubRegs */ |
| 8162 | true, /* CoveredBySubRegs */ |
| 8163 | DTripleSpc_with_dsub_0_in_DPR_8Superclasses, 4, |
| 8164 | nullptr |
| 8165 | }; |
| 8166 | |
| 8167 | extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass = { |
| 8168 | &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8RegClassID], |
| 8169 | DTriple_with_dsub_0_in_DPR_8SubClassMask, |
| 8170 | SuperRegIdxSeqs + 69, |
| 8171 | LaneBitmask(0x00000000000000FC), |
| 8172 | 0, |
| 8173 | false, |
| 8174 | 0x00, /* TSFlags */ |
| 8175 | true, /* HasDisjunctSubRegs */ |
| 8176 | true, /* CoveredBySubRegs */ |
| 8177 | DTriple_with_dsub_0_in_DPR_8Superclasses, 4, |
| 8178 | nullptr |
| 8179 | }; |
| 8180 | |
| 8181 | extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass = { |
| 8182 | &ARMMCRegisterClasses[DTriple_with_qsub_0_in_MQPRRegClassID], |
| 8183 | DTriple_with_qsub_0_in_MQPRSubClassMask, |
| 8184 | SuperRegIdxSeqs + 53, |
| 8185 | LaneBitmask(0x00000000000000FC), |
| 8186 | 0, |
| 8187 | false, |
| 8188 | 0x00, /* TSFlags */ |
| 8189 | true, /* HasDisjunctSubRegs */ |
| 8190 | true, /* CoveredBySubRegs */ |
| 8191 | DTriple_with_qsub_0_in_MQPRSuperclasses, 4, |
| 8192 | nullptr |
| 8193 | }; |
| 8194 | |
| 8195 | extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| 8196 | &ARMMCRegisterClasses[DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| 8197 | DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| 8198 | SuperRegIdxSeqs + 64, |
| 8199 | LaneBitmask(0x00000000000000FC), |
| 8200 | 0, |
| 8201 | false, |
| 8202 | 0x00, /* TSFlags */ |
| 8203 | true, /* HasDisjunctSubRegs */ |
| 8204 | true, /* CoveredBySubRegs */ |
| 8205 | DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, 3, |
| 8206 | nullptr |
| 8207 | }; |
| 8208 | |
| 8209 | extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass = { |
| 8210 | &ARMMCRegisterClasses[DTriple_with_dsub_1_in_DPR_8RegClassID], |
| 8211 | DTriple_with_dsub_1_in_DPR_8SubClassMask, |
| 8212 | SuperRegIdxSeqs + 69, |
| 8213 | LaneBitmask(0x00000000000000FC), |
| 8214 | 0, |
| 8215 | false, |
| 8216 | 0x00, /* TSFlags */ |
| 8217 | true, /* HasDisjunctSubRegs */ |
| 8218 | true, /* CoveredBySubRegs */ |
| 8219 | DTriple_with_dsub_1_in_DPR_8Superclasses, 5, |
| 8220 | nullptr |
| 8221 | }; |
| 8222 | |
| 8223 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| 8224 | &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| 8225 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| 8226 | SuperRegIdxSeqs + 64, |
| 8227 | LaneBitmask(0x00000000000000FC), |
| 8228 | 0, |
| 8229 | false, |
| 8230 | 0x00, /* TSFlags */ |
| 8231 | true, /* HasDisjunctSubRegs */ |
| 8232 | true, /* CoveredBySubRegs */ |
| 8233 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, 6, |
| 8234 | nullptr |
| 8235 | }; |
| 8236 | |
| 8237 | extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass = { |
| 8238 | &ARMMCRegisterClasses[DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID], |
| 8239 | DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask, |
| 8240 | SuperRegIdxSeqs + 53, |
| 8241 | LaneBitmask(0x00000000000000FC), |
| 8242 | 0, |
| 8243 | false, |
| 8244 | 0x00, /* TSFlags */ |
| 8245 | true, /* HasDisjunctSubRegs */ |
| 8246 | true, /* CoveredBySubRegs */ |
| 8247 | DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses, 6, |
| 8248 | nullptr |
| 8249 | }; |
| 8250 | |
| 8251 | extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass = { |
| 8252 | &ARMMCRegisterClasses[DTripleSpc_with_dsub_2_in_DPR_8RegClassID], |
| 8253 | DTripleSpc_with_dsub_2_in_DPR_8SubClassMask, |
| 8254 | SuperRegIdxSeqs + 45, |
| 8255 | LaneBitmask(0x0000000000000CCC), |
| 8256 | 0, |
| 8257 | false, |
| 8258 | 0x00, /* TSFlags */ |
| 8259 | true, /* HasDisjunctSubRegs */ |
| 8260 | true, /* CoveredBySubRegs */ |
| 8261 | DTripleSpc_with_dsub_2_in_DPR_8Superclasses, 5, |
| 8262 | nullptr |
| 8263 | }; |
| 8264 | |
| 8265 | extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass = { |
| 8266 | &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8RegClassID], |
| 8267 | DTriple_with_dsub_2_in_DPR_8SubClassMask, |
| 8268 | SuperRegIdxSeqs + 69, |
| 8269 | LaneBitmask(0x00000000000000FC), |
| 8270 | 0, |
| 8271 | false, |
| 8272 | 0x00, /* TSFlags */ |
| 8273 | true, /* HasDisjunctSubRegs */ |
| 8274 | true, /* CoveredBySubRegs */ |
| 8275 | DTriple_with_dsub_2_in_DPR_8Superclasses, 6, |
| 8276 | nullptr |
| 8277 | }; |
| 8278 | |
| 8279 | extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass = { |
| 8280 | &ARMMCRegisterClasses[DTripleSpc_with_dsub_4_in_DPR_8RegClassID], |
| 8281 | DTripleSpc_with_dsub_4_in_DPR_8SubClassMask, |
| 8282 | SuperRegIdxSeqs + 45, |
| 8283 | LaneBitmask(0x0000000000000CCC), |
| 8284 | 0, |
| 8285 | false, |
| 8286 | 0x00, /* TSFlags */ |
| 8287 | true, /* HasDisjunctSubRegs */ |
| 8288 | true, /* CoveredBySubRegs */ |
| 8289 | DTripleSpc_with_dsub_4_in_DPR_8Superclasses, 6, |
| 8290 | nullptr |
| 8291 | }; |
| 8292 | |
| 8293 | extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| 8294 | &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| 8295 | DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| 8296 | SuperRegIdxSeqs + 64, |
| 8297 | LaneBitmask(0x00000000000000FC), |
| 8298 | 0, |
| 8299 | false, |
| 8300 | 0x00, /* TSFlags */ |
| 8301 | true, /* HasDisjunctSubRegs */ |
| 8302 | true, /* CoveredBySubRegs */ |
| 8303 | DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, 8, |
| 8304 | nullptr |
| 8305 | }; |
| 8306 | |
| 8307 | extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass = { |
| 8308 | &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPR_8RegClassID], |
| 8309 | DTriple_with_qsub_0_in_QPR_8SubClassMask, |
| 8310 | SuperRegIdxSeqs + 53, |
| 8311 | LaneBitmask(0x00000000000000FC), |
| 8312 | 0, |
| 8313 | false, |
| 8314 | 0x00, /* TSFlags */ |
| 8315 | true, /* HasDisjunctSubRegs */ |
| 8316 | true, /* CoveredBySubRegs */ |
| 8317 | DTriple_with_qsub_0_in_QPR_8Superclasses, 9, |
| 8318 | nullptr |
| 8319 | }; |
| 8320 | |
| 8321 | extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass = { |
| 8322 | &ARMMCRegisterClasses[DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID], |
| 8323 | DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8SubClassMask, |
| 8324 | SuperRegIdxSeqs + 53, |
| 8325 | LaneBitmask(0x00000000000000FC), |
| 8326 | 0, |
| 8327 | false, |
| 8328 | 0x00, /* TSFlags */ |
| 8329 | true, /* HasDisjunctSubRegs */ |
| 8330 | true, /* CoveredBySubRegs */ |
| 8331 | DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Superclasses, 11, |
| 8332 | nullptr |
| 8333 | }; |
| 8334 | |
| 8335 | extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = { |
| 8336 | &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], |
| 8337 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask, |
| 8338 | SuperRegIdxSeqs + 64, |
| 8339 | LaneBitmask(0x00000000000000FC), |
| 8340 | 0, |
| 8341 | false, |
| 8342 | 0x00, /* TSFlags */ |
| 8343 | true, /* HasDisjunctSubRegs */ |
| 8344 | true, /* CoveredBySubRegs */ |
| 8345 | DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses, 11, |
| 8346 | nullptr |
| 8347 | }; |
| 8348 | |
| 8349 | extern const TargetRegisterClass DQuadSpcRegClass = { |
| 8350 | &ARMMCRegisterClasses[DQuadSpcRegClassID], |
| 8351 | DQuadSpcSubClassMask, |
| 8352 | SuperRegIdxSeqs + 45, |
| 8353 | LaneBitmask(0x0000000000000CCC), |
| 8354 | 0, |
| 8355 | false, |
| 8356 | 0x00, /* TSFlags */ |
| 8357 | true, /* HasDisjunctSubRegs */ |
| 8358 | true, /* CoveredBySubRegs */ |
| 8359 | DQuadSpcSuperclasses, 1, |
| 8360 | nullptr |
| 8361 | }; |
| 8362 | |
| 8363 | extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass = { |
| 8364 | &ARMMCRegisterClasses[DQuadSpc_with_ssub_0RegClassID], |
| 8365 | DQuadSpc_with_ssub_0SubClassMask, |
| 8366 | SuperRegIdxSeqs + 45, |
| 8367 | LaneBitmask(0x0000000000000CCC), |
| 8368 | 0, |
| 8369 | false, |
| 8370 | 0x00, /* TSFlags */ |
| 8371 | true, /* HasDisjunctSubRegs */ |
| 8372 | true, /* CoveredBySubRegs */ |
| 8373 | DQuadSpc_with_ssub_0Superclasses, 3, |
| 8374 | nullptr |
| 8375 | }; |
| 8376 | |
| 8377 | extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass = { |
| 8378 | &ARMMCRegisterClasses[DQuadSpc_with_ssub_4RegClassID], |
| 8379 | DQuadSpc_with_ssub_4SubClassMask, |
| 8380 | SuperRegIdxSeqs + 45, |
| 8381 | LaneBitmask(0x0000000000000CCC), |
| 8382 | 0, |
| 8383 | false, |
| 8384 | 0x00, /* TSFlags */ |
| 8385 | true, /* HasDisjunctSubRegs */ |
| 8386 | true, /* CoveredBySubRegs */ |
| 8387 | DQuadSpc_with_ssub_4Superclasses, 5, |
| 8388 | nullptr |
| 8389 | }; |
| 8390 | |
| 8391 | extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass = { |
| 8392 | &ARMMCRegisterClasses[DQuadSpc_with_ssub_8RegClassID], |
| 8393 | DQuadSpc_with_ssub_8SubClassMask, |
| 8394 | SuperRegIdxSeqs + 45, |
| 8395 | LaneBitmask(0x0000000000000CCC), |
| 8396 | 0, |
| 8397 | false, |
| 8398 | 0x00, /* TSFlags */ |
| 8399 | true, /* HasDisjunctSubRegs */ |
| 8400 | true, /* CoveredBySubRegs */ |
| 8401 | DQuadSpc_with_ssub_8Superclasses, 7, |
| 8402 | nullptr |
| 8403 | }; |
| 8404 | |
| 8405 | extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass = { |
| 8406 | &ARMMCRegisterClasses[DQuadSpc_with_dsub_0_in_DPR_8RegClassID], |
| 8407 | DQuadSpc_with_dsub_0_in_DPR_8SubClassMask, |
| 8408 | SuperRegIdxSeqs + 45, |
| 8409 | LaneBitmask(0x0000000000000CCC), |
| 8410 | 0, |
| 8411 | false, |
| 8412 | 0x00, /* TSFlags */ |
| 8413 | true, /* HasDisjunctSubRegs */ |
| 8414 | true, /* CoveredBySubRegs */ |
| 8415 | DQuadSpc_with_dsub_0_in_DPR_8Superclasses, 9, |
| 8416 | nullptr |
| 8417 | }; |
| 8418 | |
| 8419 | extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass = { |
| 8420 | &ARMMCRegisterClasses[DQuadSpc_with_dsub_2_in_DPR_8RegClassID], |
| 8421 | DQuadSpc_with_dsub_2_in_DPR_8SubClassMask, |
| 8422 | SuperRegIdxSeqs + 45, |
| 8423 | LaneBitmask(0x0000000000000CCC), |
| 8424 | 0, |
| 8425 | false, |
| 8426 | 0x00, /* TSFlags */ |
| 8427 | true, /* HasDisjunctSubRegs */ |
| 8428 | true, /* CoveredBySubRegs */ |
| 8429 | DQuadSpc_with_dsub_2_in_DPR_8Superclasses, 11, |
| 8430 | nullptr |
| 8431 | }; |
| 8432 | |
| 8433 | extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass = { |
| 8434 | &ARMMCRegisterClasses[DQuadSpc_with_dsub_4_in_DPR_8RegClassID], |
| 8435 | DQuadSpc_with_dsub_4_in_DPR_8SubClassMask, |
| 8436 | SuperRegIdxSeqs + 45, |
| 8437 | LaneBitmask(0x0000000000000CCC), |
| 8438 | 0, |
| 8439 | false, |
| 8440 | 0x00, /* TSFlags */ |
| 8441 | true, /* HasDisjunctSubRegs */ |
| 8442 | true, /* CoveredBySubRegs */ |
| 8443 | DQuadSpc_with_dsub_4_in_DPR_8Superclasses, 13, |
| 8444 | nullptr |
| 8445 | }; |
| 8446 | |
| 8447 | extern const TargetRegisterClass DQuadRegClass = { |
| 8448 | &ARMMCRegisterClasses[DQuadRegClassID], |
| 8449 | DQuadSubClassMask, |
| 8450 | SuperRegIdxSeqs + 88, |
| 8451 | LaneBitmask(0x00000000000003FC), |
| 8452 | 0, |
| 8453 | false, |
| 8454 | 0x00, /* TSFlags */ |
| 8455 | true, /* HasDisjunctSubRegs */ |
| 8456 | true, /* CoveredBySubRegs */ |
| 8457 | nullptr, 0, |
| 8458 | nullptr |
| 8459 | }; |
| 8460 | |
| 8461 | extern const TargetRegisterClass DQuad_with_ssub_0RegClass = { |
| 8462 | &ARMMCRegisterClasses[DQuad_with_ssub_0RegClassID], |
| 8463 | DQuad_with_ssub_0SubClassMask, |
| 8464 | SuperRegIdxSeqs + 88, |
| 8465 | LaneBitmask(0x00000000000003FC), |
| 8466 | 0, |
| 8467 | false, |
| 8468 | 0x00, /* TSFlags */ |
| 8469 | true, /* HasDisjunctSubRegs */ |
| 8470 | true, /* CoveredBySubRegs */ |
| 8471 | DQuad_with_ssub_0Superclasses, 1, |
| 8472 | nullptr |
| 8473 | }; |
| 8474 | |
| 8475 | extern const TargetRegisterClass DQuad_with_ssub_2RegClass = { |
| 8476 | &ARMMCRegisterClasses[DQuad_with_ssub_2RegClassID], |
| 8477 | DQuad_with_ssub_2SubClassMask, |
| 8478 | SuperRegIdxSeqs + 88, |
| 8479 | LaneBitmask(0x00000000000003FC), |
| 8480 | 0, |
| 8481 | false, |
| 8482 | 0x00, /* TSFlags */ |
| 8483 | true, /* HasDisjunctSubRegs */ |
| 8484 | true, /* CoveredBySubRegs */ |
| 8485 | DQuad_with_ssub_2Superclasses, 2, |
| 8486 | nullptr |
| 8487 | }; |
| 8488 | |
| 8489 | extern const TargetRegisterClass QQPRRegClass = { |
| 8490 | &ARMMCRegisterClasses[QQPRRegClassID], |
| 8491 | QQPRSubClassMask, |
| 8492 | SuperRegIdxSeqs + 84, |
| 8493 | LaneBitmask(0x00000000000003FC), |
| 8494 | 0, |
| 8495 | false, |
| 8496 | 0x00, /* TSFlags */ |
| 8497 | true, /* HasDisjunctSubRegs */ |
| 8498 | true, /* CoveredBySubRegs */ |
| 8499 | QQPRSuperclasses, 1, |
| 8500 | QQPRGetRawAllocationOrder |
| 8501 | }; |
| 8502 | |
| 8503 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| 8504 | &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| 8505 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| 8506 | SuperRegIdxSeqs + 50, |
| 8507 | LaneBitmask(0x00000000000003FC), |
| 8508 | 0, |
| 8509 | false, |
| 8510 | 0x00, /* TSFlags */ |
| 8511 | true, /* HasDisjunctSubRegs */ |
| 8512 | true, /* CoveredBySubRegs */ |
| 8513 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, 1, |
| 8514 | nullptr |
| 8515 | }; |
| 8516 | |
| 8517 | extern const TargetRegisterClass DQuad_with_ssub_4RegClass = { |
| 8518 | &ARMMCRegisterClasses[DQuad_with_ssub_4RegClassID], |
| 8519 | DQuad_with_ssub_4SubClassMask, |
| 8520 | SuperRegIdxSeqs + 88, |
| 8521 | LaneBitmask(0x00000000000003FC), |
| 8522 | 0, |
| 8523 | false, |
| 8524 | 0x00, /* TSFlags */ |
| 8525 | true, /* HasDisjunctSubRegs */ |
| 8526 | true, /* CoveredBySubRegs */ |
| 8527 | DQuad_with_ssub_4Superclasses, 3, |
| 8528 | nullptr |
| 8529 | }; |
| 8530 | |
| 8531 | extern const TargetRegisterClass DQuad_with_ssub_6RegClass = { |
| 8532 | &ARMMCRegisterClasses[DQuad_with_ssub_6RegClassID], |
| 8533 | DQuad_with_ssub_6SubClassMask, |
| 8534 | SuperRegIdxSeqs + 88, |
| 8535 | LaneBitmask(0x00000000000003FC), |
| 8536 | 0, |
| 8537 | false, |
| 8538 | 0x00, /* TSFlags */ |
| 8539 | true, /* HasDisjunctSubRegs */ |
| 8540 | true, /* CoveredBySubRegs */ |
| 8541 | DQuad_with_ssub_6Superclasses, 4, |
| 8542 | nullptr |
| 8543 | }; |
| 8544 | |
| 8545 | extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass = { |
| 8546 | &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8RegClassID], |
| 8547 | DQuad_with_dsub_0_in_DPR_8SubClassMask, |
| 8548 | SuperRegIdxSeqs + 88, |
| 8549 | LaneBitmask(0x00000000000003FC), |
| 8550 | 0, |
| 8551 | false, |
| 8552 | 0x00, /* TSFlags */ |
| 8553 | true, /* HasDisjunctSubRegs */ |
| 8554 | true, /* CoveredBySubRegs */ |
| 8555 | DQuad_with_dsub_0_in_DPR_8Superclasses, 5, |
| 8556 | nullptr |
| 8557 | }; |
| 8558 | |
| 8559 | extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| 8560 | &ARMMCRegisterClasses[DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| 8561 | DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| 8562 | SuperRegIdxSeqs + 50, |
| 8563 | LaneBitmask(0x00000000000003FC), |
| 8564 | 0, |
| 8565 | false, |
| 8566 | 0x00, /* TSFlags */ |
| 8567 | true, /* HasDisjunctSubRegs */ |
| 8568 | true, /* CoveredBySubRegs */ |
| 8569 | DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, 3, |
| 8570 | nullptr |
| 8571 | }; |
| 8572 | |
| 8573 | extern const TargetRegisterClass QQPR_with_ssub_0RegClass = { |
| 8574 | &ARMMCRegisterClasses[QQPR_with_ssub_0RegClassID], |
| 8575 | QQPR_with_ssub_0SubClassMask, |
| 8576 | SuperRegIdxSeqs + 84, |
| 8577 | LaneBitmask(0x00000000000003FC), |
| 8578 | 0, |
| 8579 | false, |
| 8580 | 0x00, /* TSFlags */ |
| 8581 | true, /* HasDisjunctSubRegs */ |
| 8582 | true, /* CoveredBySubRegs */ |
| 8583 | QQPR_with_ssub_0Superclasses, 4, |
| 8584 | QQPR_with_ssub_0GetRawAllocationOrder |
| 8585 | }; |
| 8586 | |
| 8587 | extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass = { |
| 8588 | &ARMMCRegisterClasses[DQuad_with_dsub_1_in_DPR_8RegClassID], |
| 8589 | DQuad_with_dsub_1_in_DPR_8SubClassMask, |
| 8590 | SuperRegIdxSeqs + 88, |
| 8591 | LaneBitmask(0x00000000000003FC), |
| 8592 | 0, |
| 8593 | false, |
| 8594 | 0x00, /* TSFlags */ |
| 8595 | true, /* HasDisjunctSubRegs */ |
| 8596 | true, /* CoveredBySubRegs */ |
| 8597 | DQuad_with_dsub_1_in_DPR_8Superclasses, 6, |
| 8598 | nullptr |
| 8599 | }; |
| 8600 | |
| 8601 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| 8602 | &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| 8603 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| 8604 | SuperRegIdxSeqs + 50, |
| 8605 | LaneBitmask(0x00000000000003FC), |
| 8606 | 0, |
| 8607 | false, |
| 8608 | 0x00, /* TSFlags */ |
| 8609 | true, /* HasDisjunctSubRegs */ |
| 8610 | true, /* CoveredBySubRegs */ |
| 8611 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, 6, |
| 8612 | nullptr |
| 8613 | }; |
| 8614 | |
| 8615 | extern const TargetRegisterClass MQQPRRegClass = { |
| 8616 | &ARMMCRegisterClasses[MQQPRRegClassID], |
| 8617 | MQQPRSubClassMask, |
| 8618 | SuperRegIdxSeqs + 84, |
| 8619 | LaneBitmask(0x00000000000003FC), |
| 8620 | 0, |
| 8621 | false, |
| 8622 | 0x00, /* TSFlags */ |
| 8623 | true, /* HasDisjunctSubRegs */ |
| 8624 | true, /* CoveredBySubRegs */ |
| 8625 | MQQPRSuperclasses, 7, |
| 8626 | nullptr |
| 8627 | }; |
| 8628 | |
| 8629 | extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass = { |
| 8630 | &ARMMCRegisterClasses[DQuad_with_dsub_2_in_DPR_8RegClassID], |
| 8631 | DQuad_with_dsub_2_in_DPR_8SubClassMask, |
| 8632 | SuperRegIdxSeqs + 88, |
| 8633 | LaneBitmask(0x00000000000003FC), |
| 8634 | 0, |
| 8635 | false, |
| 8636 | 0x00, /* TSFlags */ |
| 8637 | true, /* HasDisjunctSubRegs */ |
| 8638 | true, /* CoveredBySubRegs */ |
| 8639 | DQuad_with_dsub_2_in_DPR_8Superclasses, 7, |
| 8640 | nullptr |
| 8641 | }; |
| 8642 | |
| 8643 | extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| 8644 | &ARMMCRegisterClasses[DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| 8645 | DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| 8646 | SuperRegIdxSeqs + 50, |
| 8647 | LaneBitmask(0x00000000000003FC), |
| 8648 | 0, |
| 8649 | false, |
| 8650 | 0x00, /* TSFlags */ |
| 8651 | true, /* HasDisjunctSubRegs */ |
| 8652 | true, /* CoveredBySubRegs */ |
| 8653 | DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, 8, |
| 8654 | nullptr |
| 8655 | }; |
| 8656 | |
| 8657 | extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass = { |
| 8658 | &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8RegClassID], |
| 8659 | DQuad_with_dsub_3_in_DPR_8SubClassMask, |
| 8660 | SuperRegIdxSeqs + 88, |
| 8661 | LaneBitmask(0x00000000000003FC), |
| 8662 | 0, |
| 8663 | false, |
| 8664 | 0x00, /* TSFlags */ |
| 8665 | true, /* HasDisjunctSubRegs */ |
| 8666 | true, /* CoveredBySubRegs */ |
| 8667 | DQuad_with_dsub_3_in_DPR_8Superclasses, 8, |
| 8668 | nullptr |
| 8669 | }; |
| 8670 | |
| 8671 | extern const TargetRegisterClass DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| 8672 | &ARMMCRegisterClasses[DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| 8673 | DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| 8674 | SuperRegIdxSeqs + 50, |
| 8675 | LaneBitmask(0x00000000000003FC), |
| 8676 | 0, |
| 8677 | false, |
| 8678 | 0x00, /* TSFlags */ |
| 8679 | true, /* HasDisjunctSubRegs */ |
| 8680 | true, /* CoveredBySubRegs */ |
| 8681 | DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, 10, |
| 8682 | nullptr |
| 8683 | }; |
| 8684 | |
| 8685 | extern const TargetRegisterClass MQQPR_with_qsub_0_in_QPR_8RegClass = { |
| 8686 | &ARMMCRegisterClasses[MQQPR_with_qsub_0_in_QPR_8RegClassID], |
| 8687 | MQQPR_with_qsub_0_in_QPR_8SubClassMask, |
| 8688 | SuperRegIdxSeqs + 84, |
| 8689 | LaneBitmask(0x00000000000003FC), |
| 8690 | 0, |
| 8691 | false, |
| 8692 | 0x00, /* TSFlags */ |
| 8693 | true, /* HasDisjunctSubRegs */ |
| 8694 | true, /* CoveredBySubRegs */ |
| 8695 | MQQPR_with_qsub_0_in_QPR_8Superclasses, 10, |
| 8696 | nullptr |
| 8697 | }; |
| 8698 | |
| 8699 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = { |
| 8700 | &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], |
| 8701 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask, |
| 8702 | SuperRegIdxSeqs + 50, |
| 8703 | LaneBitmask(0x00000000000003FC), |
| 8704 | 0, |
| 8705 | false, |
| 8706 | 0x00, /* TSFlags */ |
| 8707 | true, /* HasDisjunctSubRegs */ |
| 8708 | true, /* CoveredBySubRegs */ |
| 8709 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses, 13, |
| 8710 | nullptr |
| 8711 | }; |
| 8712 | |
| 8713 | extern const TargetRegisterClass MQQPR_with_dsub_2_in_DPR_8RegClass = { |
| 8714 | &ARMMCRegisterClasses[MQQPR_with_dsub_2_in_DPR_8RegClassID], |
| 8715 | MQQPR_with_dsub_2_in_DPR_8SubClassMask, |
| 8716 | SuperRegIdxSeqs + 84, |
| 8717 | LaneBitmask(0x00000000000003FC), |
| 8718 | 0, |
| 8719 | false, |
| 8720 | 0x00, /* TSFlags */ |
| 8721 | true, /* HasDisjunctSubRegs */ |
| 8722 | true, /* CoveredBySubRegs */ |
| 8723 | MQQPR_with_dsub_2_in_DPR_8Superclasses, 13, |
| 8724 | nullptr |
| 8725 | }; |
| 8726 | |
| 8727 | extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass = { |
| 8728 | &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClassID], |
| 8729 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8SubClassMask, |
| 8730 | SuperRegIdxSeqs + 50, |
| 8731 | LaneBitmask(0x00000000000003FC), |
| 8732 | 0, |
| 8733 | false, |
| 8734 | 0x00, /* TSFlags */ |
| 8735 | true, /* HasDisjunctSubRegs */ |
| 8736 | true, /* CoveredBySubRegs */ |
| 8737 | DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8Superclasses, 15, |
| 8738 | nullptr |
| 8739 | }; |
| 8740 | |
| 8741 | extern const TargetRegisterClass QQQQPRRegClass = { |
| 8742 | &ARMMCRegisterClasses[QQQQPRRegClassID], |
| 8743 | QQQQPRSubClassMask, |
| 8744 | SuperRegIdxSeqs + 8, |
| 8745 | LaneBitmask(0x000000000003FFFC), |
| 8746 | 0, |
| 8747 | false, |
| 8748 | 0x00, /* TSFlags */ |
| 8749 | true, /* HasDisjunctSubRegs */ |
| 8750 | true, /* CoveredBySubRegs */ |
| 8751 | nullptr, 0, |
| 8752 | QQQQPRGetRawAllocationOrder |
| 8753 | }; |
| 8754 | |
| 8755 | extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass = { |
| 8756 | &ARMMCRegisterClasses[QQQQPR_with_ssub_0RegClassID], |
| 8757 | QQQQPR_with_ssub_0SubClassMask, |
| 8758 | SuperRegIdxSeqs + 8, |
| 8759 | LaneBitmask(0x000000000003FFFC), |
| 8760 | 0, |
| 8761 | false, |
| 8762 | 0x00, /* TSFlags */ |
| 8763 | true, /* HasDisjunctSubRegs */ |
| 8764 | true, /* CoveredBySubRegs */ |
| 8765 | QQQQPR_with_ssub_0Superclasses, 1, |
| 8766 | QQQQPR_with_ssub_0GetRawAllocationOrder |
| 8767 | }; |
| 8768 | |
| 8769 | extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass = { |
| 8770 | &ARMMCRegisterClasses[QQQQPR_with_ssub_4RegClassID], |
| 8771 | QQQQPR_with_ssub_4SubClassMask, |
| 8772 | SuperRegIdxSeqs + 8, |
| 8773 | LaneBitmask(0x000000000003FFFC), |
| 8774 | 0, |
| 8775 | false, |
| 8776 | 0x00, /* TSFlags */ |
| 8777 | true, /* HasDisjunctSubRegs */ |
| 8778 | true, /* CoveredBySubRegs */ |
| 8779 | QQQQPR_with_ssub_4Superclasses, 2, |
| 8780 | QQQQPR_with_ssub_4GetRawAllocationOrder |
| 8781 | }; |
| 8782 | |
| 8783 | extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass = { |
| 8784 | &ARMMCRegisterClasses[QQQQPR_with_ssub_8RegClassID], |
| 8785 | QQQQPR_with_ssub_8SubClassMask, |
| 8786 | SuperRegIdxSeqs + 8, |
| 8787 | LaneBitmask(0x000000000003FFFC), |
| 8788 | 0, |
| 8789 | false, |
| 8790 | 0x00, /* TSFlags */ |
| 8791 | true, /* HasDisjunctSubRegs */ |
| 8792 | true, /* CoveredBySubRegs */ |
| 8793 | QQQQPR_with_ssub_8Superclasses, 3, |
| 8794 | QQQQPR_with_ssub_8GetRawAllocationOrder |
| 8795 | }; |
| 8796 | |
| 8797 | extern const TargetRegisterClass MQQQQPRRegClass = { |
| 8798 | &ARMMCRegisterClasses[MQQQQPRRegClassID], |
| 8799 | MQQQQPRSubClassMask, |
| 8800 | SuperRegIdxSeqs + 8, |
| 8801 | LaneBitmask(0x000000000003FFFC), |
| 8802 | 0, |
| 8803 | false, |
| 8804 | 0x00, /* TSFlags */ |
| 8805 | true, /* HasDisjunctSubRegs */ |
| 8806 | true, /* CoveredBySubRegs */ |
| 8807 | MQQQQPRSuperclasses, 4, |
| 8808 | nullptr |
| 8809 | }; |
| 8810 | |
| 8811 | extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClass = { |
| 8812 | &ARMMCRegisterClasses[MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClassID], |
| 8813 | MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8SubClassMask, |
| 8814 | SuperRegIdxSeqs + 8, |
| 8815 | LaneBitmask(0x000000000003FFFC), |
| 8816 | 0, |
| 8817 | false, |
| 8818 | 0x00, /* TSFlags */ |
| 8819 | true, /* HasDisjunctSubRegs */ |
| 8820 | true, /* CoveredBySubRegs */ |
| 8821 | MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8Superclasses, 5, |
| 8822 | nullptr |
| 8823 | }; |
| 8824 | |
| 8825 | extern const TargetRegisterClass MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClass = { |
| 8826 | &ARMMCRegisterClasses[MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClassID], |
| 8827 | MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8SubClassMask, |
| 8828 | SuperRegIdxSeqs + 8, |
| 8829 | LaneBitmask(0x000000000003FFFC), |
| 8830 | 0, |
| 8831 | false, |
| 8832 | 0x00, /* TSFlags */ |
| 8833 | true, /* HasDisjunctSubRegs */ |
| 8834 | true, /* CoveredBySubRegs */ |
| 8835 | MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8Superclasses, 6, |
| 8836 | nullptr |
| 8837 | }; |
| 8838 | |
| 8839 | extern const TargetRegisterClass MQQQQPR_with_qsub_2_in_QPR_8RegClass = { |
| 8840 | &ARMMCRegisterClasses[MQQQQPR_with_qsub_2_in_QPR_8RegClassID], |
| 8841 | MQQQQPR_with_qsub_2_in_QPR_8SubClassMask, |
| 8842 | SuperRegIdxSeqs + 8, |
| 8843 | LaneBitmask(0x000000000003FFFC), |
| 8844 | 0, |
| 8845 | false, |
| 8846 | 0x00, /* TSFlags */ |
| 8847 | true, /* HasDisjunctSubRegs */ |
| 8848 | true, /* CoveredBySubRegs */ |
| 8849 | MQQQQPR_with_qsub_2_in_QPR_8Superclasses, 7, |
| 8850 | nullptr |
| 8851 | }; |
| 8852 | |
| 8853 | extern const TargetRegisterClass MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClass = { |
| 8854 | &ARMMCRegisterClasses[MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClassID], |
| 8855 | MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8SubClassMask, |
| 8856 | SuperRegIdxSeqs + 8, |
| 8857 | LaneBitmask(0x000000000003FFFC), |
| 8858 | 0, |
| 8859 | false, |
| 8860 | 0x00, /* TSFlags */ |
| 8861 | true, /* HasDisjunctSubRegs */ |
| 8862 | true, /* CoveredBySubRegs */ |
| 8863 | MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8Superclasses, 8, |
| 8864 | nullptr |
| 8865 | }; |
| 8866 | |
| 8867 | } // end namespace ARM |
| 8868 | |
| 8869 | namespace { |
| 8870 | const TargetRegisterClass *const RegisterClasses[] = { |
| 8871 | &ARM::HPRRegClass, |
| 8872 | &ARM::FPWithVPRRegClass, |
| 8873 | &ARM::SPRRegClass, |
| 8874 | &ARM::FPWithVPR_with_ssub_0RegClass, |
| 8875 | &ARM::GPRRegClass, |
| 8876 | &ARM::GPRwithAPSRRegClass, |
| 8877 | &ARM::GPRwithZRRegClass, |
| 8878 | &ARM::SPR_8RegClass, |
| 8879 | &ARM::GPRnopcRegClass, |
| 8880 | &ARM::GPRnospRegClass, |
| 8881 | &ARM::GPRwithAPSR_NZCVnospRegClass, |
| 8882 | &ARM::GPRwithAPSRnospRegClass, |
| 8883 | &ARM::GPRwithZRnospRegClass, |
| 8884 | &ARM::GPRnoipRegClass, |
| 8885 | &ARM::rGPRRegClass, |
| 8886 | &ARM::GPRnoip_and_GPRnopcRegClass, |
| 8887 | &ARM::GPRnoip_and_GPRnospRegClass, |
| 8888 | &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| 8889 | &ARM::tGPRwithpcRegClass, |
| 8890 | &ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass, |
| 8891 | &ARM::hGPRRegClass, |
| 8892 | &ARM::tGPRRegClass, |
| 8893 | &ARM::tGPREvenRegClass, |
| 8894 | &ARM::GPRnopc_and_hGPRRegClass, |
| 8895 | &ARM::GPRnosp_and_hGPRRegClass, |
| 8896 | &ARM::GPRnoip_and_hGPRRegClass, |
| 8897 | &ARM::GPRnoip_and_tGPREvenRegClass, |
| 8898 | &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| 8899 | &ARM::tGPROddRegClass, |
| 8900 | &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| 8901 | &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| 8902 | &ARM::tcGPRRegClass, |
| 8903 | &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| 8904 | &ARM::hGPR_and_tGPREvenRegClass, |
| 8905 | &ARM::tGPR_and_tGPREvenRegClass, |
| 8906 | &ARM::tGPR_and_tGPROddRegClass, |
| 8907 | &ARM::tcGPRnotr12RegClass, |
| 8908 | &ARM::tGPREven_and_tcGPRRegClass, |
| 8909 | &ARM::FP_STATUS_REGSRegClass, |
| 8910 | &ARM::hGPR_and_GPRnoip_and_tGPREvenRegClass, |
| 8911 | &ARM::hGPR_and_tGPROddRegClass, |
| 8912 | &ARM::tGPREven_and_tcGPRnotr12RegClass, |
| 8913 | &ARM::tGPROdd_and_tcGPRRegClass, |
| 8914 | &ARM::CCRRegClass, |
| 8915 | &ARM::FPCXTRegsRegClass, |
| 8916 | &ARM::GPRlrRegClass, |
| 8917 | &ARM::GPRspRegClass, |
| 8918 | &ARM::VCCRRegClass, |
| 8919 | &ARM::cl_FPSCR_NZCVRegClass, |
| 8920 | &ARM::hGPR_and_tGPRwithpcRegClass, |
| 8921 | &ARM::hGPR_and_tcGPRRegClass, |
| 8922 | &ARM::DPRRegClass, |
| 8923 | &ARM::DPR_VFP2RegClass, |
| 8924 | &ARM::DPR_8RegClass, |
| 8925 | &ARM::GPRPairRegClass, |
| 8926 | &ARM::GPRPairnospRegClass, |
| 8927 | &ARM::GPRPair_with_gsub_0_in_tGPRRegClass, |
| 8928 | &ARM::GPRPair_with_gsub_0_in_hGPRRegClass, |
| 8929 | &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass, |
| 8930 | &ARM::GPRPair_with_gsub_0_in_tcGPRnotr12RegClass, |
| 8931 | &ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass, |
| 8932 | &ARM::GPRPair_with_gsub_1_in_GPRspRegClass, |
| 8933 | &ARM::DPairSpcRegClass, |
| 8934 | &ARM::DPairSpc_with_ssub_0RegClass, |
| 8935 | &ARM::DPairSpc_with_ssub_4RegClass, |
| 8936 | &ARM::DPairSpc_with_dsub_0_in_DPR_8RegClass, |
| 8937 | &ARM::DPairSpc_with_dsub_2_in_DPR_8RegClass, |
| 8938 | &ARM::DPairRegClass, |
| 8939 | &ARM::DPair_with_ssub_0RegClass, |
| 8940 | &ARM::QPRRegClass, |
| 8941 | &ARM::DPair_with_ssub_2RegClass, |
| 8942 | &ARM::DPair_with_dsub_0_in_DPR_8RegClass, |
| 8943 | &ARM::MQPRRegClass, |
| 8944 | &ARM::QPR_VFP2RegClass, |
| 8945 | &ARM::DPair_with_dsub_1_in_DPR_8RegClass, |
| 8946 | &ARM::QPR_8RegClass, |
| 8947 | &ARM::DTripleRegClass, |
| 8948 | &ARM::DTripleSpcRegClass, |
| 8949 | &ARM::DTripleSpc_with_ssub_0RegClass, |
| 8950 | &ARM::DTriple_with_ssub_0RegClass, |
| 8951 | &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| 8952 | &ARM::DTriple_with_ssub_2RegClass, |
| 8953 | &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| 8954 | &ARM::DTripleSpc_with_ssub_4RegClass, |
| 8955 | &ARM::DTriple_with_ssub_4RegClass, |
| 8956 | &ARM::DTripleSpc_with_ssub_8RegClass, |
| 8957 | &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| 8958 | &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| 8959 | &ARM::DTriple_with_qsub_0_in_MQPRRegClass, |
| 8960 | &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| 8961 | &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| 8962 | &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| 8963 | &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass, |
| 8964 | &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass, |
| 8965 | &ARM::DTriple_with_dsub_2_in_DPR_8RegClass, |
| 8966 | &ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClass, |
| 8967 | &ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| 8968 | &ARM::DTriple_with_qsub_0_in_QPR_8RegClass, |
| 8969 | &ARM::DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass, |
| 8970 | &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass, |
| 8971 | &ARM::DQuadSpcRegClass, |
| 8972 | &ARM::DQuadSpc_with_ssub_0RegClass, |
| 8973 | &ARM::DQuadSpc_with_ssub_4RegClass, |
| 8974 | &ARM::DQuadSpc_with_ssub_8RegClass, |
| 8975 | &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass, |
| 8976 | &ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClass, |
| 8977 | &ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClass, |
| 8978 | &ARM::DQuadRegClass, |
| 8979 | &ARM::DQuad_with_ssub_0RegClass, |
| 8980 | &ARM::DQuad_with_ssub_2RegClass, |
| 8981 | &ARM::QQPRRegClass, |
| 8982 | &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| 8983 | &ARM::DQuad_with_ssub_4RegClass, |
| 8984 | &ARM::DQuad_with_ssub_6RegClass, |
| 8985 | &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| 8986 | &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| 8987 | &ARM::QQPR_with_ssub_0RegClass, |
| 8988 | &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| 8989 | &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| 8990 | &ARM::MQQPRRegClass, |
| 8991 | &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| 8992 | &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| 8993 | &ARM::DQuad_with_dsub_3_in_DPR_8RegClass, |
| 8994 | &ARM::DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| 8995 | &ARM::MQQPR_with_qsub_0_in_QPR_8RegClass, |
| 8996 | &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass, |
| 8997 | &ARM::MQQPR_with_dsub_2_in_DPR_8RegClass, |
| 8998 | &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8RegClass, |
| 8999 | &ARM::QQQQPRRegClass, |
| 9000 | &ARM::QQQQPR_with_ssub_0RegClass, |
| 9001 | &ARM::QQQQPR_with_ssub_4RegClass, |
| 9002 | &ARM::QQQQPR_with_ssub_8RegClass, |
| 9003 | &ARM::MQQQQPRRegClass, |
| 9004 | &ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8RegClass, |
| 9005 | &ARM::MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8RegClass, |
| 9006 | &ARM::MQQQQPR_with_qsub_2_in_QPR_8RegClass, |
| 9007 | &ARM::MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8RegClass, |
| 9008 | }; |
| 9009 | } // end anonymous namespace |
| 9010 | |
| 9011 | static const uint8_t CostPerUseTable[] = { |
| 9012 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; |
| 9013 | |
| 9014 | |
| 9015 | static const bool InAllocatableClassTable[] = { |
| 9016 | false, false, true, false, true, false, false, false, false, true, false, false, false, true, true, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, }; |
| 9017 | |
| 9018 | |
| 9019 | static const TargetRegisterInfoDesc ARMRegInfoDesc = { // Extra Descriptors |
| 9020 | CostPerUseTable, 1, InAllocatableClassTable}; |
| 9021 | |
| 9022 | unsigned ARMGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { |
| 9023 | static const uint8_t RowMap[56] = { |
| 9024 | 0, 1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 4, 0, 2, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 5, 5, 5, 2, |
| 9025 | }; |
| 9026 | static const uint8_t Rows[8][56] = { |
| 9027 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9028 | { ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, 0, ARM::dsub_7, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::qsub_1, ARM::ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, 0, ARM::ssub_6_ssub_7_dsub_5_dsub_7, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, }, |
| 9029 | { ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_1, ARM::qsub_2, 0, 0, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, 0, 0, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9030 | { ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_ssub_8_ssub_9, ARM::dsub_5_ssub_12_ssub_13, 0, 0, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::qsub_2, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9031 | { ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_2, ARM::qsub_3, 0, 0, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::dsub_5_dsub_7, ARM::dsub_5_ssub_12_ssub_13_dsub_7, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9032 | { ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, ARM::qsub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9033 | { ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9034 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9035 | }; |
| 9036 | |
| 9037 | --IdxA; assert(IdxA < 56); (void) IdxA; |
| 9038 | --IdxB; assert(IdxB < 56); |
| 9039 | return Rows[RowMap[IdxA]][IdxB]; |
| 9040 | } |
| 9041 | |
| 9042 | unsigned ARMGenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { |
| 9043 | static const uint8_t Table[56][56] = { |
| 9044 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9045 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9046 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9047 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9048 | { 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, }, |
| 9049 | { 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, 0, ARM::qsub_0, 0, }, |
| 9050 | { 0, 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9051 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9052 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9053 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9054 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9055 | { 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, }, |
| 9056 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9057 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9058 | { 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, }, |
| 9059 | { 0, 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 9060 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9061 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9062 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9063 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9064 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9065 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9066 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9067 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9068 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9069 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9070 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9071 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9072 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9073 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9074 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9075 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9076 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9077 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9078 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9079 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9080 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9081 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9082 | { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| 9083 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9084 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9085 | { 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::qsub_0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, ARM::qsub_1, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, }, |
| 9086 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9087 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9088 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9089 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9090 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9091 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9092 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9093 | { 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::qsub_0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::qsub_1, 0, }, |
| 9094 | { 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, }, |
| 9095 | { 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, }, |
| 9096 | { 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, 0, ARM::qsub_0, 0, }, |
| 9097 | { 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, 0, ARM::qsub_0, 0, }, |
| 9098 | { 0, 0, 0, 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, 0, ARM::qsub_0, 0, }, |
| 9099 | { 0, 0, ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, 0, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, 0, }, |
| 9100 | }; |
| 9101 | |
| 9102 | --IdxA; assert(IdxA < 56); |
| 9103 | --IdxB; assert(IdxB < 56); |
| 9104 | return Table[IdxA][IdxB]; |
| 9105 | } |
| 9106 | |
| 9107 | struct MaskRolOp { |
| 9108 | LaneBitmask Mask; |
| 9109 | uint8_t RotateLeft; |
| 9110 | }; |
| 9111 | static const MaskRolOp LaneMaskComposeSequences[] = { |
| 9112 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0 |
| 9113 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 2 |
| 9114 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 4 |
| 9115 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 6 |
| 9116 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 8 |
| 9117 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 10 |
| 9118 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 12 |
| 9119 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 14 |
| 9120 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 16 |
| 9121 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18 |
| 9122 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 20 |
| 9123 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 22 |
| 9124 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 24 |
| 9125 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 26 |
| 9126 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 28 |
| 9127 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 30 |
| 9128 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 32 |
| 9129 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 } // Sequence 34 |
| 9130 | }; |
| 9131 | static const uint8_t CompositeSequences[] = { |
| 9132 | 0, // to dsub_0 |
| 9133 | 2, // to dsub_1 |
| 9134 | 4, // to dsub_2 |
| 9135 | 6, // to dsub_3 |
| 9136 | 8, // to dsub_4 |
| 9137 | 10, // to dsub_5 |
| 9138 | 12, // to dsub_6 |
| 9139 | 14, // to dsub_7 |
| 9140 | 0, // to gsub_0 |
| 9141 | 16, // to gsub_1 |
| 9142 | 0, // to qqsub_0 |
| 9143 | 8, // to qqsub_1 |
| 9144 | 0, // to qsub_0 |
| 9145 | 4, // to qsub_1 |
| 9146 | 8, // to qsub_2 |
| 9147 | 12, // to qsub_3 |
| 9148 | 2, // to ssub_0 |
| 9149 | 18, // to ssub_1 |
| 9150 | 4, // to ssub_2 |
| 9151 | 20, // to ssub_3 |
| 9152 | 6, // to ssub_4 |
| 9153 | 22, // to ssub_5 |
| 9154 | 8, // to ssub_6 |
| 9155 | 24, // to ssub_7 |
| 9156 | 10, // to ssub_8 |
| 9157 | 26, // to ssub_9 |
| 9158 | 12, // to ssub_10 |
| 9159 | 28, // to ssub_11 |
| 9160 | 14, // to ssub_12 |
| 9161 | 30, // to ssub_13 |
| 9162 | 32, // to ssub_14 |
| 9163 | 34, // to ssub_15 |
| 9164 | 0, // to ssub_0_ssub_1_ssub_4_ssub_5 |
| 9165 | 0, // to ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9166 | 2, // to ssub_2_ssub_3_ssub_6_ssub_7 |
| 9167 | 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9168 | 2, // to ssub_2_ssub_3_ssub_4_ssub_5 |
| 9169 | 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9170 | 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9171 | 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9172 | 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9173 | 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9174 | 4, // to ssub_4_ssub_5_ssub_8_ssub_9 |
| 9175 | 4, // to ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9176 | 4, // to ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9177 | 6, // to ssub_6_ssub_7_dsub_5 |
| 9178 | 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9179 | 6, // to ssub_6_ssub_7_dsub_5_dsub_7 |
| 9180 | 6, // to ssub_6_ssub_7_ssub_8_ssub_9 |
| 9181 | 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9182 | 8, // to ssub_8_ssub_9_ssub_12_ssub_13 |
| 9183 | 8, // to ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9184 | 10, // to dsub_5_dsub_7 |
| 9185 | 10, // to dsub_5_ssub_12_ssub_13_dsub_7 |
| 9186 | 10, // to dsub_5_ssub_12_ssub_13 |
| 9187 | 4 // to ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9188 | }; |
| 9189 | |
| 9190 | LaneBitmask ARMGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| 9191 | --IdxA; assert(IdxA < 56 && "Subregister index out of bounds" ); |
| 9192 | LaneBitmask Result; |
| 9193 | for (const MaskRolOp *Ops = |
| 9194 | &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| 9195 | Ops->Mask.any(); ++Ops) { |
| 9196 | LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger(); |
| 9197 | if (unsigned S = Ops->RotateLeft) |
| 9198 | Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S))); |
| 9199 | else |
| 9200 | Result |= LaneBitmask(M); |
| 9201 | } |
| 9202 | return Result; |
| 9203 | } |
| 9204 | |
| 9205 | LaneBitmask ARMGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| 9206 | LaneMask &= getSubRegIndexLaneMask(IdxA); |
| 9207 | --IdxA; assert(IdxA < 56 && "Subregister index out of bounds" ); |
| 9208 | LaneBitmask Result; |
| 9209 | for (const MaskRolOp *Ops = |
| 9210 | &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| 9211 | Ops->Mask.any(); ++Ops) { |
| 9212 | LaneBitmask::Type M = LaneMask.getAsInteger(); |
| 9213 | if (unsigned S = Ops->RotateLeft) |
| 9214 | Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S))); |
| 9215 | else |
| 9216 | Result |= LaneBitmask(M); |
| 9217 | } |
| 9218 | return Result; |
| 9219 | } |
| 9220 | |
| 9221 | const TargetRegisterClass *ARMGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { |
| 9222 | static const uint8_t Table[137][56] = { |
| 9223 | { // HPR |
| 9224 | 0, // dsub_0 |
| 9225 | 0, // dsub_1 |
| 9226 | 0, // dsub_2 |
| 9227 | 0, // dsub_3 |
| 9228 | 0, // dsub_4 |
| 9229 | 0, // dsub_5 |
| 9230 | 0, // dsub_6 |
| 9231 | 0, // dsub_7 |
| 9232 | 0, // gsub_0 |
| 9233 | 0, // gsub_1 |
| 9234 | 0, // qqsub_0 |
| 9235 | 0, // qqsub_1 |
| 9236 | 0, // qsub_0 |
| 9237 | 0, // qsub_1 |
| 9238 | 0, // qsub_2 |
| 9239 | 0, // qsub_3 |
| 9240 | 0, // ssub_0 |
| 9241 | 0, // ssub_1 |
| 9242 | 0, // ssub_2 |
| 9243 | 0, // ssub_3 |
| 9244 | 0, // ssub_4 |
| 9245 | 0, // ssub_5 |
| 9246 | 0, // ssub_6 |
| 9247 | 0, // ssub_7 |
| 9248 | 0, // ssub_8 |
| 9249 | 0, // ssub_9 |
| 9250 | 0, // ssub_10 |
| 9251 | 0, // ssub_11 |
| 9252 | 0, // ssub_12 |
| 9253 | 0, // ssub_13 |
| 9254 | 0, // ssub_14 |
| 9255 | 0, // ssub_15 |
| 9256 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9257 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9258 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9259 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9260 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9261 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9262 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9263 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9264 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9265 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9266 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9267 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9268 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9269 | 0, // ssub_6_ssub_7_dsub_5 |
| 9270 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9271 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9272 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9273 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9274 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9275 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9276 | 0, // dsub_5_dsub_7 |
| 9277 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9278 | 0, // dsub_5_ssub_12_ssub_13 |
| 9279 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9280 | }, |
| 9281 | { // FPWithVPR |
| 9282 | 0, // dsub_0 |
| 9283 | 0, // dsub_1 |
| 9284 | 0, // dsub_2 |
| 9285 | 0, // dsub_3 |
| 9286 | 0, // dsub_4 |
| 9287 | 0, // dsub_5 |
| 9288 | 0, // dsub_6 |
| 9289 | 0, // dsub_7 |
| 9290 | 0, // gsub_0 |
| 9291 | 0, // gsub_1 |
| 9292 | 0, // qqsub_0 |
| 9293 | 0, // qqsub_1 |
| 9294 | 0, // qsub_0 |
| 9295 | 0, // qsub_1 |
| 9296 | 0, // qsub_2 |
| 9297 | 0, // qsub_3 |
| 9298 | 4, // ssub_0 -> FPWithVPR_with_ssub_0 |
| 9299 | 4, // ssub_1 -> FPWithVPR_with_ssub_0 |
| 9300 | 0, // ssub_2 |
| 9301 | 0, // ssub_3 |
| 9302 | 0, // ssub_4 |
| 9303 | 0, // ssub_5 |
| 9304 | 0, // ssub_6 |
| 9305 | 0, // ssub_7 |
| 9306 | 0, // ssub_8 |
| 9307 | 0, // ssub_9 |
| 9308 | 0, // ssub_10 |
| 9309 | 0, // ssub_11 |
| 9310 | 0, // ssub_12 |
| 9311 | 0, // ssub_13 |
| 9312 | 0, // ssub_14 |
| 9313 | 0, // ssub_15 |
| 9314 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9315 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9316 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9317 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9318 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9319 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9320 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9321 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9322 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9323 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9324 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9325 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9326 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9327 | 0, // ssub_6_ssub_7_dsub_5 |
| 9328 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9329 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9330 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9331 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9332 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9333 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9334 | 0, // dsub_5_dsub_7 |
| 9335 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9336 | 0, // dsub_5_ssub_12_ssub_13 |
| 9337 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9338 | }, |
| 9339 | { // SPR |
| 9340 | 0, // dsub_0 |
| 9341 | 0, // dsub_1 |
| 9342 | 0, // dsub_2 |
| 9343 | 0, // dsub_3 |
| 9344 | 0, // dsub_4 |
| 9345 | 0, // dsub_5 |
| 9346 | 0, // dsub_6 |
| 9347 | 0, // dsub_7 |
| 9348 | 0, // gsub_0 |
| 9349 | 0, // gsub_1 |
| 9350 | 0, // qqsub_0 |
| 9351 | 0, // qqsub_1 |
| 9352 | 0, // qsub_0 |
| 9353 | 0, // qsub_1 |
| 9354 | 0, // qsub_2 |
| 9355 | 0, // qsub_3 |
| 9356 | 0, // ssub_0 |
| 9357 | 0, // ssub_1 |
| 9358 | 0, // ssub_2 |
| 9359 | 0, // ssub_3 |
| 9360 | 0, // ssub_4 |
| 9361 | 0, // ssub_5 |
| 9362 | 0, // ssub_6 |
| 9363 | 0, // ssub_7 |
| 9364 | 0, // ssub_8 |
| 9365 | 0, // ssub_9 |
| 9366 | 0, // ssub_10 |
| 9367 | 0, // ssub_11 |
| 9368 | 0, // ssub_12 |
| 9369 | 0, // ssub_13 |
| 9370 | 0, // ssub_14 |
| 9371 | 0, // ssub_15 |
| 9372 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9373 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9374 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9375 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9376 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9377 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9378 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9379 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9380 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9381 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9382 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9383 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9384 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9385 | 0, // ssub_6_ssub_7_dsub_5 |
| 9386 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9387 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9388 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9389 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9390 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9391 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9392 | 0, // dsub_5_dsub_7 |
| 9393 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9394 | 0, // dsub_5_ssub_12_ssub_13 |
| 9395 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9396 | }, |
| 9397 | { // FPWithVPR_with_ssub_0 |
| 9398 | 0, // dsub_0 |
| 9399 | 0, // dsub_1 |
| 9400 | 0, // dsub_2 |
| 9401 | 0, // dsub_3 |
| 9402 | 0, // dsub_4 |
| 9403 | 0, // dsub_5 |
| 9404 | 0, // dsub_6 |
| 9405 | 0, // dsub_7 |
| 9406 | 0, // gsub_0 |
| 9407 | 0, // gsub_1 |
| 9408 | 0, // qqsub_0 |
| 9409 | 0, // qqsub_1 |
| 9410 | 0, // qsub_0 |
| 9411 | 0, // qsub_1 |
| 9412 | 0, // qsub_2 |
| 9413 | 0, // qsub_3 |
| 9414 | 4, // ssub_0 -> FPWithVPR_with_ssub_0 |
| 9415 | 4, // ssub_1 -> FPWithVPR_with_ssub_0 |
| 9416 | 0, // ssub_2 |
| 9417 | 0, // ssub_3 |
| 9418 | 0, // ssub_4 |
| 9419 | 0, // ssub_5 |
| 9420 | 0, // ssub_6 |
| 9421 | 0, // ssub_7 |
| 9422 | 0, // ssub_8 |
| 9423 | 0, // ssub_9 |
| 9424 | 0, // ssub_10 |
| 9425 | 0, // ssub_11 |
| 9426 | 0, // ssub_12 |
| 9427 | 0, // ssub_13 |
| 9428 | 0, // ssub_14 |
| 9429 | 0, // ssub_15 |
| 9430 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9431 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9432 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9433 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9434 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9435 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9436 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9437 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9438 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9439 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9440 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9441 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9442 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9443 | 0, // ssub_6_ssub_7_dsub_5 |
| 9444 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9445 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9446 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9447 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9448 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9449 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9450 | 0, // dsub_5_dsub_7 |
| 9451 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9452 | 0, // dsub_5_ssub_12_ssub_13 |
| 9453 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9454 | }, |
| 9455 | { // GPR |
| 9456 | 0, // dsub_0 |
| 9457 | 0, // dsub_1 |
| 9458 | 0, // dsub_2 |
| 9459 | 0, // dsub_3 |
| 9460 | 0, // dsub_4 |
| 9461 | 0, // dsub_5 |
| 9462 | 0, // dsub_6 |
| 9463 | 0, // dsub_7 |
| 9464 | 0, // gsub_0 |
| 9465 | 0, // gsub_1 |
| 9466 | 0, // qqsub_0 |
| 9467 | 0, // qqsub_1 |
| 9468 | 0, // qsub_0 |
| 9469 | 0, // qsub_1 |
| 9470 | 0, // qsub_2 |
| 9471 | 0, // qsub_3 |
| 9472 | 0, // ssub_0 |
| 9473 | 0, // ssub_1 |
| 9474 | 0, // ssub_2 |
| 9475 | 0, // ssub_3 |
| 9476 | 0, // ssub_4 |
| 9477 | 0, // ssub_5 |
| 9478 | 0, // ssub_6 |
| 9479 | 0, // ssub_7 |
| 9480 | 0, // ssub_8 |
| 9481 | 0, // ssub_9 |
| 9482 | 0, // ssub_10 |
| 9483 | 0, // ssub_11 |
| 9484 | 0, // ssub_12 |
| 9485 | 0, // ssub_13 |
| 9486 | 0, // ssub_14 |
| 9487 | 0, // ssub_15 |
| 9488 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9489 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9490 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9491 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9492 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9493 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9494 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9495 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9496 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9497 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9498 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9499 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9500 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9501 | 0, // ssub_6_ssub_7_dsub_5 |
| 9502 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9503 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9504 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9505 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9506 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9507 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9508 | 0, // dsub_5_dsub_7 |
| 9509 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9510 | 0, // dsub_5_ssub_12_ssub_13 |
| 9511 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9512 | }, |
| 9513 | { // GPRwithAPSR |
| 9514 | 0, // dsub_0 |
| 9515 | 0, // dsub_1 |
| 9516 | 0, // dsub_2 |
| 9517 | 0, // dsub_3 |
| 9518 | 0, // dsub_4 |
| 9519 | 0, // dsub_5 |
| 9520 | 0, // dsub_6 |
| 9521 | 0, // dsub_7 |
| 9522 | 0, // gsub_0 |
| 9523 | 0, // gsub_1 |
| 9524 | 0, // qqsub_0 |
| 9525 | 0, // qqsub_1 |
| 9526 | 0, // qsub_0 |
| 9527 | 0, // qsub_1 |
| 9528 | 0, // qsub_2 |
| 9529 | 0, // qsub_3 |
| 9530 | 0, // ssub_0 |
| 9531 | 0, // ssub_1 |
| 9532 | 0, // ssub_2 |
| 9533 | 0, // ssub_3 |
| 9534 | 0, // ssub_4 |
| 9535 | 0, // ssub_5 |
| 9536 | 0, // ssub_6 |
| 9537 | 0, // ssub_7 |
| 9538 | 0, // ssub_8 |
| 9539 | 0, // ssub_9 |
| 9540 | 0, // ssub_10 |
| 9541 | 0, // ssub_11 |
| 9542 | 0, // ssub_12 |
| 9543 | 0, // ssub_13 |
| 9544 | 0, // ssub_14 |
| 9545 | 0, // ssub_15 |
| 9546 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9547 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9548 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9549 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9550 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9551 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9552 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9553 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9554 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9555 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9556 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9557 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9558 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9559 | 0, // ssub_6_ssub_7_dsub_5 |
| 9560 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9561 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9562 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9563 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9564 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9565 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9566 | 0, // dsub_5_dsub_7 |
| 9567 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9568 | 0, // dsub_5_ssub_12_ssub_13 |
| 9569 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9570 | }, |
| 9571 | { // GPRwithZR |
| 9572 | 0, // dsub_0 |
| 9573 | 0, // dsub_1 |
| 9574 | 0, // dsub_2 |
| 9575 | 0, // dsub_3 |
| 9576 | 0, // dsub_4 |
| 9577 | 0, // dsub_5 |
| 9578 | 0, // dsub_6 |
| 9579 | 0, // dsub_7 |
| 9580 | 0, // gsub_0 |
| 9581 | 0, // gsub_1 |
| 9582 | 0, // qqsub_0 |
| 9583 | 0, // qqsub_1 |
| 9584 | 0, // qsub_0 |
| 9585 | 0, // qsub_1 |
| 9586 | 0, // qsub_2 |
| 9587 | 0, // qsub_3 |
| 9588 | 0, // ssub_0 |
| 9589 | 0, // ssub_1 |
| 9590 | 0, // ssub_2 |
| 9591 | 0, // ssub_3 |
| 9592 | 0, // ssub_4 |
| 9593 | 0, // ssub_5 |
| 9594 | 0, // ssub_6 |
| 9595 | 0, // ssub_7 |
| 9596 | 0, // ssub_8 |
| 9597 | 0, // ssub_9 |
| 9598 | 0, // ssub_10 |
| 9599 | 0, // ssub_11 |
| 9600 | 0, // ssub_12 |
| 9601 | 0, // ssub_13 |
| 9602 | 0, // ssub_14 |
| 9603 | 0, // ssub_15 |
| 9604 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9605 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9606 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9607 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9608 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9609 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9610 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9611 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9612 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9613 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9614 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9615 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9616 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9617 | 0, // ssub_6_ssub_7_dsub_5 |
| 9618 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9619 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9620 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9621 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9622 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9623 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9624 | 0, // dsub_5_dsub_7 |
| 9625 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9626 | 0, // dsub_5_ssub_12_ssub_13 |
| 9627 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9628 | }, |
| 9629 | { // SPR_8 |
| 9630 | 0, // dsub_0 |
| 9631 | 0, // dsub_1 |
| 9632 | 0, // dsub_2 |
| 9633 | 0, // dsub_3 |
| 9634 | 0, // dsub_4 |
| 9635 | 0, // dsub_5 |
| 9636 | 0, // dsub_6 |
| 9637 | 0, // dsub_7 |
| 9638 | 0, // gsub_0 |
| 9639 | 0, // gsub_1 |
| 9640 | 0, // qqsub_0 |
| 9641 | 0, // qqsub_1 |
| 9642 | 0, // qsub_0 |
| 9643 | 0, // qsub_1 |
| 9644 | 0, // qsub_2 |
| 9645 | 0, // qsub_3 |
| 9646 | 0, // ssub_0 |
| 9647 | 0, // ssub_1 |
| 9648 | 0, // ssub_2 |
| 9649 | 0, // ssub_3 |
| 9650 | 0, // ssub_4 |
| 9651 | 0, // ssub_5 |
| 9652 | 0, // ssub_6 |
| 9653 | 0, // ssub_7 |
| 9654 | 0, // ssub_8 |
| 9655 | 0, // ssub_9 |
| 9656 | 0, // ssub_10 |
| 9657 | 0, // ssub_11 |
| 9658 | 0, // ssub_12 |
| 9659 | 0, // ssub_13 |
| 9660 | 0, // ssub_14 |
| 9661 | 0, // ssub_15 |
| 9662 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9663 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9664 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9665 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9666 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9667 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9668 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9669 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9670 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9671 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9672 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9673 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9674 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9675 | 0, // ssub_6_ssub_7_dsub_5 |
| 9676 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9677 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9678 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9679 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9680 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9681 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9682 | 0, // dsub_5_dsub_7 |
| 9683 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9684 | 0, // dsub_5_ssub_12_ssub_13 |
| 9685 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9686 | }, |
| 9687 | { // GPRnopc |
| 9688 | 0, // dsub_0 |
| 9689 | 0, // dsub_1 |
| 9690 | 0, // dsub_2 |
| 9691 | 0, // dsub_3 |
| 9692 | 0, // dsub_4 |
| 9693 | 0, // dsub_5 |
| 9694 | 0, // dsub_6 |
| 9695 | 0, // dsub_7 |
| 9696 | 0, // gsub_0 |
| 9697 | 0, // gsub_1 |
| 9698 | 0, // qqsub_0 |
| 9699 | 0, // qqsub_1 |
| 9700 | 0, // qsub_0 |
| 9701 | 0, // qsub_1 |
| 9702 | 0, // qsub_2 |
| 9703 | 0, // qsub_3 |
| 9704 | 0, // ssub_0 |
| 9705 | 0, // ssub_1 |
| 9706 | 0, // ssub_2 |
| 9707 | 0, // ssub_3 |
| 9708 | 0, // ssub_4 |
| 9709 | 0, // ssub_5 |
| 9710 | 0, // ssub_6 |
| 9711 | 0, // ssub_7 |
| 9712 | 0, // ssub_8 |
| 9713 | 0, // ssub_9 |
| 9714 | 0, // ssub_10 |
| 9715 | 0, // ssub_11 |
| 9716 | 0, // ssub_12 |
| 9717 | 0, // ssub_13 |
| 9718 | 0, // ssub_14 |
| 9719 | 0, // ssub_15 |
| 9720 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9721 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9722 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9723 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9724 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9725 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9726 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9727 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9728 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9729 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9730 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9731 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9732 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9733 | 0, // ssub_6_ssub_7_dsub_5 |
| 9734 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9735 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9736 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9737 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9738 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9739 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9740 | 0, // dsub_5_dsub_7 |
| 9741 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9742 | 0, // dsub_5_ssub_12_ssub_13 |
| 9743 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9744 | }, |
| 9745 | { // GPRnosp |
| 9746 | 0, // dsub_0 |
| 9747 | 0, // dsub_1 |
| 9748 | 0, // dsub_2 |
| 9749 | 0, // dsub_3 |
| 9750 | 0, // dsub_4 |
| 9751 | 0, // dsub_5 |
| 9752 | 0, // dsub_6 |
| 9753 | 0, // dsub_7 |
| 9754 | 0, // gsub_0 |
| 9755 | 0, // gsub_1 |
| 9756 | 0, // qqsub_0 |
| 9757 | 0, // qqsub_1 |
| 9758 | 0, // qsub_0 |
| 9759 | 0, // qsub_1 |
| 9760 | 0, // qsub_2 |
| 9761 | 0, // qsub_3 |
| 9762 | 0, // ssub_0 |
| 9763 | 0, // ssub_1 |
| 9764 | 0, // ssub_2 |
| 9765 | 0, // ssub_3 |
| 9766 | 0, // ssub_4 |
| 9767 | 0, // ssub_5 |
| 9768 | 0, // ssub_6 |
| 9769 | 0, // ssub_7 |
| 9770 | 0, // ssub_8 |
| 9771 | 0, // ssub_9 |
| 9772 | 0, // ssub_10 |
| 9773 | 0, // ssub_11 |
| 9774 | 0, // ssub_12 |
| 9775 | 0, // ssub_13 |
| 9776 | 0, // ssub_14 |
| 9777 | 0, // ssub_15 |
| 9778 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9779 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9780 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9781 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9782 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9783 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9784 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9785 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9786 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9787 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9788 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9789 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9790 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9791 | 0, // ssub_6_ssub_7_dsub_5 |
| 9792 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9793 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9794 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9795 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9796 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9797 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9798 | 0, // dsub_5_dsub_7 |
| 9799 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9800 | 0, // dsub_5_ssub_12_ssub_13 |
| 9801 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9802 | }, |
| 9803 | { // GPRwithAPSR_NZCVnosp |
| 9804 | 0, // dsub_0 |
| 9805 | 0, // dsub_1 |
| 9806 | 0, // dsub_2 |
| 9807 | 0, // dsub_3 |
| 9808 | 0, // dsub_4 |
| 9809 | 0, // dsub_5 |
| 9810 | 0, // dsub_6 |
| 9811 | 0, // dsub_7 |
| 9812 | 0, // gsub_0 |
| 9813 | 0, // gsub_1 |
| 9814 | 0, // qqsub_0 |
| 9815 | 0, // qqsub_1 |
| 9816 | 0, // qsub_0 |
| 9817 | 0, // qsub_1 |
| 9818 | 0, // qsub_2 |
| 9819 | 0, // qsub_3 |
| 9820 | 0, // ssub_0 |
| 9821 | 0, // ssub_1 |
| 9822 | 0, // ssub_2 |
| 9823 | 0, // ssub_3 |
| 9824 | 0, // ssub_4 |
| 9825 | 0, // ssub_5 |
| 9826 | 0, // ssub_6 |
| 9827 | 0, // ssub_7 |
| 9828 | 0, // ssub_8 |
| 9829 | 0, // ssub_9 |
| 9830 | 0, // ssub_10 |
| 9831 | 0, // ssub_11 |
| 9832 | 0, // ssub_12 |
| 9833 | 0, // ssub_13 |
| 9834 | 0, // ssub_14 |
| 9835 | 0, // ssub_15 |
| 9836 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9837 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9838 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9839 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9840 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9841 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9842 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9843 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9844 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9845 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9846 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9847 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9848 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9849 | 0, // ssub_6_ssub_7_dsub_5 |
| 9850 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9851 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9852 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9853 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9854 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9855 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9856 | 0, // dsub_5_dsub_7 |
| 9857 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9858 | 0, // dsub_5_ssub_12_ssub_13 |
| 9859 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9860 | }, |
| 9861 | { // GPRwithAPSRnosp |
| 9862 | 0, // dsub_0 |
| 9863 | 0, // dsub_1 |
| 9864 | 0, // dsub_2 |
| 9865 | 0, // dsub_3 |
| 9866 | 0, // dsub_4 |
| 9867 | 0, // dsub_5 |
| 9868 | 0, // dsub_6 |
| 9869 | 0, // dsub_7 |
| 9870 | 0, // gsub_0 |
| 9871 | 0, // gsub_1 |
| 9872 | 0, // qqsub_0 |
| 9873 | 0, // qqsub_1 |
| 9874 | 0, // qsub_0 |
| 9875 | 0, // qsub_1 |
| 9876 | 0, // qsub_2 |
| 9877 | 0, // qsub_3 |
| 9878 | 0, // ssub_0 |
| 9879 | 0, // ssub_1 |
| 9880 | 0, // ssub_2 |
| 9881 | 0, // ssub_3 |
| 9882 | 0, // ssub_4 |
| 9883 | 0, // ssub_5 |
| 9884 | 0, // ssub_6 |
| 9885 | 0, // ssub_7 |
| 9886 | 0, // ssub_8 |
| 9887 | 0, // ssub_9 |
| 9888 | 0, // ssub_10 |
| 9889 | 0, // ssub_11 |
| 9890 | 0, // ssub_12 |
| 9891 | 0, // ssub_13 |
| 9892 | 0, // ssub_14 |
| 9893 | 0, // ssub_15 |
| 9894 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9895 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9896 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9897 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9898 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9899 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9900 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9901 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9902 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9903 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9904 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9905 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9906 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9907 | 0, // ssub_6_ssub_7_dsub_5 |
| 9908 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9909 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9910 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9911 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9912 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9913 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9914 | 0, // dsub_5_dsub_7 |
| 9915 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9916 | 0, // dsub_5_ssub_12_ssub_13 |
| 9917 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9918 | }, |
| 9919 | { // GPRwithZRnosp |
| 9920 | 0, // dsub_0 |
| 9921 | 0, // dsub_1 |
| 9922 | 0, // dsub_2 |
| 9923 | 0, // dsub_3 |
| 9924 | 0, // dsub_4 |
| 9925 | 0, // dsub_5 |
| 9926 | 0, // dsub_6 |
| 9927 | 0, // dsub_7 |
| 9928 | 0, // gsub_0 |
| 9929 | 0, // gsub_1 |
| 9930 | 0, // qqsub_0 |
| 9931 | 0, // qqsub_1 |
| 9932 | 0, // qsub_0 |
| 9933 | 0, // qsub_1 |
| 9934 | 0, // qsub_2 |
| 9935 | 0, // qsub_3 |
| 9936 | 0, // ssub_0 |
| 9937 | 0, // ssub_1 |
| 9938 | 0, // ssub_2 |
| 9939 | 0, // ssub_3 |
| 9940 | 0, // ssub_4 |
| 9941 | 0, // ssub_5 |
| 9942 | 0, // ssub_6 |
| 9943 | 0, // ssub_7 |
| 9944 | 0, // ssub_8 |
| 9945 | 0, // ssub_9 |
| 9946 | 0, // ssub_10 |
| 9947 | 0, // ssub_11 |
| 9948 | 0, // ssub_12 |
| 9949 | 0, // ssub_13 |
| 9950 | 0, // ssub_14 |
| 9951 | 0, // ssub_15 |
| 9952 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 9953 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 9954 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 9955 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 9956 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 9957 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 9958 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9959 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 9960 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 9961 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9962 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 9963 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 9964 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 9965 | 0, // ssub_6_ssub_7_dsub_5 |
| 9966 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 9967 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 9968 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 9969 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9970 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 9971 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 9972 | 0, // dsub_5_dsub_7 |
| 9973 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 9974 | 0, // dsub_5_ssub_12_ssub_13 |
| 9975 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 9976 | }, |
| 9977 | { // GPRnoip |
| 9978 | 0, // dsub_0 |
| 9979 | 0, // dsub_1 |
| 9980 | 0, // dsub_2 |
| 9981 | 0, // dsub_3 |
| 9982 | 0, // dsub_4 |
| 9983 | 0, // dsub_5 |
| 9984 | 0, // dsub_6 |
| 9985 | 0, // dsub_7 |
| 9986 | 0, // gsub_0 |
| 9987 | 0, // gsub_1 |
| 9988 | 0, // qqsub_0 |
| 9989 | 0, // qqsub_1 |
| 9990 | 0, // qsub_0 |
| 9991 | 0, // qsub_1 |
| 9992 | 0, // qsub_2 |
| 9993 | 0, // qsub_3 |
| 9994 | 0, // ssub_0 |
| 9995 | 0, // ssub_1 |
| 9996 | 0, // ssub_2 |
| 9997 | 0, // ssub_3 |
| 9998 | 0, // ssub_4 |
| 9999 | 0, // ssub_5 |
| 10000 | 0, // ssub_6 |
| 10001 | 0, // ssub_7 |
| 10002 | 0, // ssub_8 |
| 10003 | 0, // ssub_9 |
| 10004 | 0, // ssub_10 |
| 10005 | 0, // ssub_11 |
| 10006 | 0, // ssub_12 |
| 10007 | 0, // ssub_13 |
| 10008 | 0, // ssub_14 |
| 10009 | 0, // ssub_15 |
| 10010 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10011 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10012 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10013 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10014 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10015 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10016 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10017 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10018 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10019 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10020 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10021 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10022 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10023 | 0, // ssub_6_ssub_7_dsub_5 |
| 10024 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10025 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10026 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10027 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10028 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10029 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10030 | 0, // dsub_5_dsub_7 |
| 10031 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10032 | 0, // dsub_5_ssub_12_ssub_13 |
| 10033 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10034 | }, |
| 10035 | { // rGPR |
| 10036 | 0, // dsub_0 |
| 10037 | 0, // dsub_1 |
| 10038 | 0, // dsub_2 |
| 10039 | 0, // dsub_3 |
| 10040 | 0, // dsub_4 |
| 10041 | 0, // dsub_5 |
| 10042 | 0, // dsub_6 |
| 10043 | 0, // dsub_7 |
| 10044 | 0, // gsub_0 |
| 10045 | 0, // gsub_1 |
| 10046 | 0, // qqsub_0 |
| 10047 | 0, // qqsub_1 |
| 10048 | 0, // qsub_0 |
| 10049 | 0, // qsub_1 |
| 10050 | 0, // qsub_2 |
| 10051 | 0, // qsub_3 |
| 10052 | 0, // ssub_0 |
| 10053 | 0, // ssub_1 |
| 10054 | 0, // ssub_2 |
| 10055 | 0, // ssub_3 |
| 10056 | 0, // ssub_4 |
| 10057 | 0, // ssub_5 |
| 10058 | 0, // ssub_6 |
| 10059 | 0, // ssub_7 |
| 10060 | 0, // ssub_8 |
| 10061 | 0, // ssub_9 |
| 10062 | 0, // ssub_10 |
| 10063 | 0, // ssub_11 |
| 10064 | 0, // ssub_12 |
| 10065 | 0, // ssub_13 |
| 10066 | 0, // ssub_14 |
| 10067 | 0, // ssub_15 |
| 10068 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10069 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10070 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10071 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10072 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10073 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10074 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10075 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10076 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10077 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10078 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10079 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10080 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10081 | 0, // ssub_6_ssub_7_dsub_5 |
| 10082 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10083 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10084 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10085 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10086 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10087 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10088 | 0, // dsub_5_dsub_7 |
| 10089 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10090 | 0, // dsub_5_ssub_12_ssub_13 |
| 10091 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10092 | }, |
| 10093 | { // GPRnoip_and_GPRnopc |
| 10094 | 0, // dsub_0 |
| 10095 | 0, // dsub_1 |
| 10096 | 0, // dsub_2 |
| 10097 | 0, // dsub_3 |
| 10098 | 0, // dsub_4 |
| 10099 | 0, // dsub_5 |
| 10100 | 0, // dsub_6 |
| 10101 | 0, // dsub_7 |
| 10102 | 0, // gsub_0 |
| 10103 | 0, // gsub_1 |
| 10104 | 0, // qqsub_0 |
| 10105 | 0, // qqsub_1 |
| 10106 | 0, // qsub_0 |
| 10107 | 0, // qsub_1 |
| 10108 | 0, // qsub_2 |
| 10109 | 0, // qsub_3 |
| 10110 | 0, // ssub_0 |
| 10111 | 0, // ssub_1 |
| 10112 | 0, // ssub_2 |
| 10113 | 0, // ssub_3 |
| 10114 | 0, // ssub_4 |
| 10115 | 0, // ssub_5 |
| 10116 | 0, // ssub_6 |
| 10117 | 0, // ssub_7 |
| 10118 | 0, // ssub_8 |
| 10119 | 0, // ssub_9 |
| 10120 | 0, // ssub_10 |
| 10121 | 0, // ssub_11 |
| 10122 | 0, // ssub_12 |
| 10123 | 0, // ssub_13 |
| 10124 | 0, // ssub_14 |
| 10125 | 0, // ssub_15 |
| 10126 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10127 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10128 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10129 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10130 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10131 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10132 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10133 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10134 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10135 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10136 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10137 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10138 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10139 | 0, // ssub_6_ssub_7_dsub_5 |
| 10140 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10141 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10142 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10143 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10144 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10145 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10146 | 0, // dsub_5_dsub_7 |
| 10147 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10148 | 0, // dsub_5_ssub_12_ssub_13 |
| 10149 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10150 | }, |
| 10151 | { // GPRnoip_and_GPRnosp |
| 10152 | 0, // dsub_0 |
| 10153 | 0, // dsub_1 |
| 10154 | 0, // dsub_2 |
| 10155 | 0, // dsub_3 |
| 10156 | 0, // dsub_4 |
| 10157 | 0, // dsub_5 |
| 10158 | 0, // dsub_6 |
| 10159 | 0, // dsub_7 |
| 10160 | 0, // gsub_0 |
| 10161 | 0, // gsub_1 |
| 10162 | 0, // qqsub_0 |
| 10163 | 0, // qqsub_1 |
| 10164 | 0, // qsub_0 |
| 10165 | 0, // qsub_1 |
| 10166 | 0, // qsub_2 |
| 10167 | 0, // qsub_3 |
| 10168 | 0, // ssub_0 |
| 10169 | 0, // ssub_1 |
| 10170 | 0, // ssub_2 |
| 10171 | 0, // ssub_3 |
| 10172 | 0, // ssub_4 |
| 10173 | 0, // ssub_5 |
| 10174 | 0, // ssub_6 |
| 10175 | 0, // ssub_7 |
| 10176 | 0, // ssub_8 |
| 10177 | 0, // ssub_9 |
| 10178 | 0, // ssub_10 |
| 10179 | 0, // ssub_11 |
| 10180 | 0, // ssub_12 |
| 10181 | 0, // ssub_13 |
| 10182 | 0, // ssub_14 |
| 10183 | 0, // ssub_15 |
| 10184 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10185 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10186 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10187 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10188 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10189 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10190 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10191 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10192 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10193 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10194 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10195 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10196 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10197 | 0, // ssub_6_ssub_7_dsub_5 |
| 10198 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10199 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10200 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10201 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10202 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10203 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10204 | 0, // dsub_5_dsub_7 |
| 10205 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10206 | 0, // dsub_5_ssub_12_ssub_13 |
| 10207 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10208 | }, |
| 10209 | { // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 10210 | 0, // dsub_0 |
| 10211 | 0, // dsub_1 |
| 10212 | 0, // dsub_2 |
| 10213 | 0, // dsub_3 |
| 10214 | 0, // dsub_4 |
| 10215 | 0, // dsub_5 |
| 10216 | 0, // dsub_6 |
| 10217 | 0, // dsub_7 |
| 10218 | 0, // gsub_0 |
| 10219 | 0, // gsub_1 |
| 10220 | 0, // qqsub_0 |
| 10221 | 0, // qqsub_1 |
| 10222 | 0, // qsub_0 |
| 10223 | 0, // qsub_1 |
| 10224 | 0, // qsub_2 |
| 10225 | 0, // qsub_3 |
| 10226 | 0, // ssub_0 |
| 10227 | 0, // ssub_1 |
| 10228 | 0, // ssub_2 |
| 10229 | 0, // ssub_3 |
| 10230 | 0, // ssub_4 |
| 10231 | 0, // ssub_5 |
| 10232 | 0, // ssub_6 |
| 10233 | 0, // ssub_7 |
| 10234 | 0, // ssub_8 |
| 10235 | 0, // ssub_9 |
| 10236 | 0, // ssub_10 |
| 10237 | 0, // ssub_11 |
| 10238 | 0, // ssub_12 |
| 10239 | 0, // ssub_13 |
| 10240 | 0, // ssub_14 |
| 10241 | 0, // ssub_15 |
| 10242 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10243 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10244 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10245 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10246 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10247 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10248 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10249 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10250 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10251 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10252 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10253 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10254 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10255 | 0, // ssub_6_ssub_7_dsub_5 |
| 10256 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10257 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10258 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10259 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10260 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10261 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10262 | 0, // dsub_5_dsub_7 |
| 10263 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10264 | 0, // dsub_5_ssub_12_ssub_13 |
| 10265 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10266 | }, |
| 10267 | { // tGPRwithpc |
| 10268 | 0, // dsub_0 |
| 10269 | 0, // dsub_1 |
| 10270 | 0, // dsub_2 |
| 10271 | 0, // dsub_3 |
| 10272 | 0, // dsub_4 |
| 10273 | 0, // dsub_5 |
| 10274 | 0, // dsub_6 |
| 10275 | 0, // dsub_7 |
| 10276 | 0, // gsub_0 |
| 10277 | 0, // gsub_1 |
| 10278 | 0, // qqsub_0 |
| 10279 | 0, // qqsub_1 |
| 10280 | 0, // qsub_0 |
| 10281 | 0, // qsub_1 |
| 10282 | 0, // qsub_2 |
| 10283 | 0, // qsub_3 |
| 10284 | 0, // ssub_0 |
| 10285 | 0, // ssub_1 |
| 10286 | 0, // ssub_2 |
| 10287 | 0, // ssub_3 |
| 10288 | 0, // ssub_4 |
| 10289 | 0, // ssub_5 |
| 10290 | 0, // ssub_6 |
| 10291 | 0, // ssub_7 |
| 10292 | 0, // ssub_8 |
| 10293 | 0, // ssub_9 |
| 10294 | 0, // ssub_10 |
| 10295 | 0, // ssub_11 |
| 10296 | 0, // ssub_12 |
| 10297 | 0, // ssub_13 |
| 10298 | 0, // ssub_14 |
| 10299 | 0, // ssub_15 |
| 10300 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10301 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10302 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10303 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10304 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10305 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10306 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10307 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10308 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10309 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10310 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10311 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10312 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10313 | 0, // ssub_6_ssub_7_dsub_5 |
| 10314 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10315 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10316 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10317 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10318 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10319 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10320 | 0, // dsub_5_dsub_7 |
| 10321 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10322 | 0, // dsub_5_ssub_12_ssub_13 |
| 10323 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10324 | }, |
| 10325 | { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 10326 | 0, // dsub_0 |
| 10327 | 0, // dsub_1 |
| 10328 | 0, // dsub_2 |
| 10329 | 0, // dsub_3 |
| 10330 | 0, // dsub_4 |
| 10331 | 0, // dsub_5 |
| 10332 | 0, // dsub_6 |
| 10333 | 0, // dsub_7 |
| 10334 | 0, // gsub_0 |
| 10335 | 0, // gsub_1 |
| 10336 | 0, // qqsub_0 |
| 10337 | 0, // qqsub_1 |
| 10338 | 0, // qsub_0 |
| 10339 | 0, // qsub_1 |
| 10340 | 0, // qsub_2 |
| 10341 | 0, // qsub_3 |
| 10342 | 20, // ssub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 10343 | 20, // ssub_1 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 10344 | 0, // ssub_2 |
| 10345 | 0, // ssub_3 |
| 10346 | 0, // ssub_4 |
| 10347 | 0, // ssub_5 |
| 10348 | 0, // ssub_6 |
| 10349 | 0, // ssub_7 |
| 10350 | 0, // ssub_8 |
| 10351 | 0, // ssub_9 |
| 10352 | 0, // ssub_10 |
| 10353 | 0, // ssub_11 |
| 10354 | 0, // ssub_12 |
| 10355 | 0, // ssub_13 |
| 10356 | 0, // ssub_14 |
| 10357 | 0, // ssub_15 |
| 10358 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10359 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10360 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10361 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10362 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10363 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10364 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10365 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10366 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10367 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10368 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10369 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10370 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10371 | 0, // ssub_6_ssub_7_dsub_5 |
| 10372 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10373 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10374 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10375 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10376 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10377 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10378 | 0, // dsub_5_dsub_7 |
| 10379 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10380 | 0, // dsub_5_ssub_12_ssub_13 |
| 10381 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10382 | }, |
| 10383 | { // hGPR |
| 10384 | 0, // dsub_0 |
| 10385 | 0, // dsub_1 |
| 10386 | 0, // dsub_2 |
| 10387 | 0, // dsub_3 |
| 10388 | 0, // dsub_4 |
| 10389 | 0, // dsub_5 |
| 10390 | 0, // dsub_6 |
| 10391 | 0, // dsub_7 |
| 10392 | 0, // gsub_0 |
| 10393 | 0, // gsub_1 |
| 10394 | 0, // qqsub_0 |
| 10395 | 0, // qqsub_1 |
| 10396 | 0, // qsub_0 |
| 10397 | 0, // qsub_1 |
| 10398 | 0, // qsub_2 |
| 10399 | 0, // qsub_3 |
| 10400 | 0, // ssub_0 |
| 10401 | 0, // ssub_1 |
| 10402 | 0, // ssub_2 |
| 10403 | 0, // ssub_3 |
| 10404 | 0, // ssub_4 |
| 10405 | 0, // ssub_5 |
| 10406 | 0, // ssub_6 |
| 10407 | 0, // ssub_7 |
| 10408 | 0, // ssub_8 |
| 10409 | 0, // ssub_9 |
| 10410 | 0, // ssub_10 |
| 10411 | 0, // ssub_11 |
| 10412 | 0, // ssub_12 |
| 10413 | 0, // ssub_13 |
| 10414 | 0, // ssub_14 |
| 10415 | 0, // ssub_15 |
| 10416 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10417 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10418 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10419 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10420 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10421 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10422 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10423 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10424 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10425 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10426 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10427 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10428 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10429 | 0, // ssub_6_ssub_7_dsub_5 |
| 10430 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10431 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10432 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10433 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10434 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10435 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10436 | 0, // dsub_5_dsub_7 |
| 10437 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10438 | 0, // dsub_5_ssub_12_ssub_13 |
| 10439 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10440 | }, |
| 10441 | { // tGPR |
| 10442 | 0, // dsub_0 |
| 10443 | 0, // dsub_1 |
| 10444 | 0, // dsub_2 |
| 10445 | 0, // dsub_3 |
| 10446 | 0, // dsub_4 |
| 10447 | 0, // dsub_5 |
| 10448 | 0, // dsub_6 |
| 10449 | 0, // dsub_7 |
| 10450 | 0, // gsub_0 |
| 10451 | 0, // gsub_1 |
| 10452 | 0, // qqsub_0 |
| 10453 | 0, // qqsub_1 |
| 10454 | 0, // qsub_0 |
| 10455 | 0, // qsub_1 |
| 10456 | 0, // qsub_2 |
| 10457 | 0, // qsub_3 |
| 10458 | 0, // ssub_0 |
| 10459 | 0, // ssub_1 |
| 10460 | 0, // ssub_2 |
| 10461 | 0, // ssub_3 |
| 10462 | 0, // ssub_4 |
| 10463 | 0, // ssub_5 |
| 10464 | 0, // ssub_6 |
| 10465 | 0, // ssub_7 |
| 10466 | 0, // ssub_8 |
| 10467 | 0, // ssub_9 |
| 10468 | 0, // ssub_10 |
| 10469 | 0, // ssub_11 |
| 10470 | 0, // ssub_12 |
| 10471 | 0, // ssub_13 |
| 10472 | 0, // ssub_14 |
| 10473 | 0, // ssub_15 |
| 10474 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10475 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10476 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10477 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10478 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10479 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10480 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10481 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10482 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10483 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10484 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10485 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10486 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10487 | 0, // ssub_6_ssub_7_dsub_5 |
| 10488 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10489 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10490 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10491 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10492 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10493 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10494 | 0, // dsub_5_dsub_7 |
| 10495 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10496 | 0, // dsub_5_ssub_12_ssub_13 |
| 10497 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10498 | }, |
| 10499 | { // tGPREven |
| 10500 | 0, // dsub_0 |
| 10501 | 0, // dsub_1 |
| 10502 | 0, // dsub_2 |
| 10503 | 0, // dsub_3 |
| 10504 | 0, // dsub_4 |
| 10505 | 0, // dsub_5 |
| 10506 | 0, // dsub_6 |
| 10507 | 0, // dsub_7 |
| 10508 | 0, // gsub_0 |
| 10509 | 0, // gsub_1 |
| 10510 | 0, // qqsub_0 |
| 10511 | 0, // qqsub_1 |
| 10512 | 0, // qsub_0 |
| 10513 | 0, // qsub_1 |
| 10514 | 0, // qsub_2 |
| 10515 | 0, // qsub_3 |
| 10516 | 0, // ssub_0 |
| 10517 | 0, // ssub_1 |
| 10518 | 0, // ssub_2 |
| 10519 | 0, // ssub_3 |
| 10520 | 0, // ssub_4 |
| 10521 | 0, // ssub_5 |
| 10522 | 0, // ssub_6 |
| 10523 | 0, // ssub_7 |
| 10524 | 0, // ssub_8 |
| 10525 | 0, // ssub_9 |
| 10526 | 0, // ssub_10 |
| 10527 | 0, // ssub_11 |
| 10528 | 0, // ssub_12 |
| 10529 | 0, // ssub_13 |
| 10530 | 0, // ssub_14 |
| 10531 | 0, // ssub_15 |
| 10532 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10533 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10534 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10535 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10536 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10537 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10538 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10539 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10540 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10541 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10542 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10543 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10544 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10545 | 0, // ssub_6_ssub_7_dsub_5 |
| 10546 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10547 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10548 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10549 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10550 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10551 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10552 | 0, // dsub_5_dsub_7 |
| 10553 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10554 | 0, // dsub_5_ssub_12_ssub_13 |
| 10555 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10556 | }, |
| 10557 | { // GPRnopc_and_hGPR |
| 10558 | 0, // dsub_0 |
| 10559 | 0, // dsub_1 |
| 10560 | 0, // dsub_2 |
| 10561 | 0, // dsub_3 |
| 10562 | 0, // dsub_4 |
| 10563 | 0, // dsub_5 |
| 10564 | 0, // dsub_6 |
| 10565 | 0, // dsub_7 |
| 10566 | 0, // gsub_0 |
| 10567 | 0, // gsub_1 |
| 10568 | 0, // qqsub_0 |
| 10569 | 0, // qqsub_1 |
| 10570 | 0, // qsub_0 |
| 10571 | 0, // qsub_1 |
| 10572 | 0, // qsub_2 |
| 10573 | 0, // qsub_3 |
| 10574 | 0, // ssub_0 |
| 10575 | 0, // ssub_1 |
| 10576 | 0, // ssub_2 |
| 10577 | 0, // ssub_3 |
| 10578 | 0, // ssub_4 |
| 10579 | 0, // ssub_5 |
| 10580 | 0, // ssub_6 |
| 10581 | 0, // ssub_7 |
| 10582 | 0, // ssub_8 |
| 10583 | 0, // ssub_9 |
| 10584 | 0, // ssub_10 |
| 10585 | 0, // ssub_11 |
| 10586 | 0, // ssub_12 |
| 10587 | 0, // ssub_13 |
| 10588 | 0, // ssub_14 |
| 10589 | 0, // ssub_15 |
| 10590 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10591 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10592 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10593 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10594 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10595 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10596 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10597 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10598 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10599 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10600 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10601 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10602 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10603 | 0, // ssub_6_ssub_7_dsub_5 |
| 10604 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10605 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10606 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10607 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10608 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10609 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10610 | 0, // dsub_5_dsub_7 |
| 10611 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10612 | 0, // dsub_5_ssub_12_ssub_13 |
| 10613 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10614 | }, |
| 10615 | { // GPRnosp_and_hGPR |
| 10616 | 0, // dsub_0 |
| 10617 | 0, // dsub_1 |
| 10618 | 0, // dsub_2 |
| 10619 | 0, // dsub_3 |
| 10620 | 0, // dsub_4 |
| 10621 | 0, // dsub_5 |
| 10622 | 0, // dsub_6 |
| 10623 | 0, // dsub_7 |
| 10624 | 0, // gsub_0 |
| 10625 | 0, // gsub_1 |
| 10626 | 0, // qqsub_0 |
| 10627 | 0, // qqsub_1 |
| 10628 | 0, // qsub_0 |
| 10629 | 0, // qsub_1 |
| 10630 | 0, // qsub_2 |
| 10631 | 0, // qsub_3 |
| 10632 | 0, // ssub_0 |
| 10633 | 0, // ssub_1 |
| 10634 | 0, // ssub_2 |
| 10635 | 0, // ssub_3 |
| 10636 | 0, // ssub_4 |
| 10637 | 0, // ssub_5 |
| 10638 | 0, // ssub_6 |
| 10639 | 0, // ssub_7 |
| 10640 | 0, // ssub_8 |
| 10641 | 0, // ssub_9 |
| 10642 | 0, // ssub_10 |
| 10643 | 0, // ssub_11 |
| 10644 | 0, // ssub_12 |
| 10645 | 0, // ssub_13 |
| 10646 | 0, // ssub_14 |
| 10647 | 0, // ssub_15 |
| 10648 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10649 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10650 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10651 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10652 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10653 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10654 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10655 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10656 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10657 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10658 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10659 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10660 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10661 | 0, // ssub_6_ssub_7_dsub_5 |
| 10662 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10663 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10664 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10665 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10666 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10667 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10668 | 0, // dsub_5_dsub_7 |
| 10669 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10670 | 0, // dsub_5_ssub_12_ssub_13 |
| 10671 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10672 | }, |
| 10673 | { // GPRnoip_and_hGPR |
| 10674 | 0, // dsub_0 |
| 10675 | 0, // dsub_1 |
| 10676 | 0, // dsub_2 |
| 10677 | 0, // dsub_3 |
| 10678 | 0, // dsub_4 |
| 10679 | 0, // dsub_5 |
| 10680 | 0, // dsub_6 |
| 10681 | 0, // dsub_7 |
| 10682 | 0, // gsub_0 |
| 10683 | 0, // gsub_1 |
| 10684 | 0, // qqsub_0 |
| 10685 | 0, // qqsub_1 |
| 10686 | 0, // qsub_0 |
| 10687 | 0, // qsub_1 |
| 10688 | 0, // qsub_2 |
| 10689 | 0, // qsub_3 |
| 10690 | 0, // ssub_0 |
| 10691 | 0, // ssub_1 |
| 10692 | 0, // ssub_2 |
| 10693 | 0, // ssub_3 |
| 10694 | 0, // ssub_4 |
| 10695 | 0, // ssub_5 |
| 10696 | 0, // ssub_6 |
| 10697 | 0, // ssub_7 |
| 10698 | 0, // ssub_8 |
| 10699 | 0, // ssub_9 |
| 10700 | 0, // ssub_10 |
| 10701 | 0, // ssub_11 |
| 10702 | 0, // ssub_12 |
| 10703 | 0, // ssub_13 |
| 10704 | 0, // ssub_14 |
| 10705 | 0, // ssub_15 |
| 10706 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10707 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10708 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10709 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10710 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10711 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10712 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10713 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10714 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10715 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10716 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10717 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10718 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10719 | 0, // ssub_6_ssub_7_dsub_5 |
| 10720 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10721 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10722 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10723 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10724 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10725 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10726 | 0, // dsub_5_dsub_7 |
| 10727 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10728 | 0, // dsub_5_ssub_12_ssub_13 |
| 10729 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10730 | }, |
| 10731 | { // GPRnoip_and_tGPREven |
| 10732 | 0, // dsub_0 |
| 10733 | 0, // dsub_1 |
| 10734 | 0, // dsub_2 |
| 10735 | 0, // dsub_3 |
| 10736 | 0, // dsub_4 |
| 10737 | 0, // dsub_5 |
| 10738 | 0, // dsub_6 |
| 10739 | 0, // dsub_7 |
| 10740 | 0, // gsub_0 |
| 10741 | 0, // gsub_1 |
| 10742 | 0, // qqsub_0 |
| 10743 | 0, // qqsub_1 |
| 10744 | 0, // qsub_0 |
| 10745 | 0, // qsub_1 |
| 10746 | 0, // qsub_2 |
| 10747 | 0, // qsub_3 |
| 10748 | 0, // ssub_0 |
| 10749 | 0, // ssub_1 |
| 10750 | 0, // ssub_2 |
| 10751 | 0, // ssub_3 |
| 10752 | 0, // ssub_4 |
| 10753 | 0, // ssub_5 |
| 10754 | 0, // ssub_6 |
| 10755 | 0, // ssub_7 |
| 10756 | 0, // ssub_8 |
| 10757 | 0, // ssub_9 |
| 10758 | 0, // ssub_10 |
| 10759 | 0, // ssub_11 |
| 10760 | 0, // ssub_12 |
| 10761 | 0, // ssub_13 |
| 10762 | 0, // ssub_14 |
| 10763 | 0, // ssub_15 |
| 10764 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10765 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10766 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10767 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10768 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10769 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10770 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10771 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10772 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10773 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10774 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10775 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10776 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10777 | 0, // ssub_6_ssub_7_dsub_5 |
| 10778 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10779 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10780 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10781 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10782 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10783 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10784 | 0, // dsub_5_dsub_7 |
| 10785 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10786 | 0, // dsub_5_ssub_12_ssub_13 |
| 10787 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10788 | }, |
| 10789 | { // GPRnosp_and_GPRnopc_and_hGPR |
| 10790 | 0, // dsub_0 |
| 10791 | 0, // dsub_1 |
| 10792 | 0, // dsub_2 |
| 10793 | 0, // dsub_3 |
| 10794 | 0, // dsub_4 |
| 10795 | 0, // dsub_5 |
| 10796 | 0, // dsub_6 |
| 10797 | 0, // dsub_7 |
| 10798 | 0, // gsub_0 |
| 10799 | 0, // gsub_1 |
| 10800 | 0, // qqsub_0 |
| 10801 | 0, // qqsub_1 |
| 10802 | 0, // qsub_0 |
| 10803 | 0, // qsub_1 |
| 10804 | 0, // qsub_2 |
| 10805 | 0, // qsub_3 |
| 10806 | 0, // ssub_0 |
| 10807 | 0, // ssub_1 |
| 10808 | 0, // ssub_2 |
| 10809 | 0, // ssub_3 |
| 10810 | 0, // ssub_4 |
| 10811 | 0, // ssub_5 |
| 10812 | 0, // ssub_6 |
| 10813 | 0, // ssub_7 |
| 10814 | 0, // ssub_8 |
| 10815 | 0, // ssub_9 |
| 10816 | 0, // ssub_10 |
| 10817 | 0, // ssub_11 |
| 10818 | 0, // ssub_12 |
| 10819 | 0, // ssub_13 |
| 10820 | 0, // ssub_14 |
| 10821 | 0, // ssub_15 |
| 10822 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10823 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10824 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10825 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10826 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10827 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10828 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10829 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10830 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10831 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10832 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10833 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10834 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10835 | 0, // ssub_6_ssub_7_dsub_5 |
| 10836 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10837 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10838 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10839 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10840 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10841 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10842 | 0, // dsub_5_dsub_7 |
| 10843 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10844 | 0, // dsub_5_ssub_12_ssub_13 |
| 10845 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10846 | }, |
| 10847 | { // tGPROdd |
| 10848 | 0, // dsub_0 |
| 10849 | 0, // dsub_1 |
| 10850 | 0, // dsub_2 |
| 10851 | 0, // dsub_3 |
| 10852 | 0, // dsub_4 |
| 10853 | 0, // dsub_5 |
| 10854 | 0, // dsub_6 |
| 10855 | 0, // dsub_7 |
| 10856 | 0, // gsub_0 |
| 10857 | 0, // gsub_1 |
| 10858 | 0, // qqsub_0 |
| 10859 | 0, // qqsub_1 |
| 10860 | 0, // qsub_0 |
| 10861 | 0, // qsub_1 |
| 10862 | 0, // qsub_2 |
| 10863 | 0, // qsub_3 |
| 10864 | 0, // ssub_0 |
| 10865 | 0, // ssub_1 |
| 10866 | 0, // ssub_2 |
| 10867 | 0, // ssub_3 |
| 10868 | 0, // ssub_4 |
| 10869 | 0, // ssub_5 |
| 10870 | 0, // ssub_6 |
| 10871 | 0, // ssub_7 |
| 10872 | 0, // ssub_8 |
| 10873 | 0, // ssub_9 |
| 10874 | 0, // ssub_10 |
| 10875 | 0, // ssub_11 |
| 10876 | 0, // ssub_12 |
| 10877 | 0, // ssub_13 |
| 10878 | 0, // ssub_14 |
| 10879 | 0, // ssub_15 |
| 10880 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10881 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10882 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10883 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10884 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10885 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10886 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10887 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10888 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10889 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10890 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10891 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10892 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10893 | 0, // ssub_6_ssub_7_dsub_5 |
| 10894 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10895 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10896 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10897 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10898 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10899 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10900 | 0, // dsub_5_dsub_7 |
| 10901 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10902 | 0, // dsub_5_ssub_12_ssub_13 |
| 10903 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10904 | }, |
| 10905 | { // GPRnopc_and_GPRnoip_and_hGPR |
| 10906 | 0, // dsub_0 |
| 10907 | 0, // dsub_1 |
| 10908 | 0, // dsub_2 |
| 10909 | 0, // dsub_3 |
| 10910 | 0, // dsub_4 |
| 10911 | 0, // dsub_5 |
| 10912 | 0, // dsub_6 |
| 10913 | 0, // dsub_7 |
| 10914 | 0, // gsub_0 |
| 10915 | 0, // gsub_1 |
| 10916 | 0, // qqsub_0 |
| 10917 | 0, // qqsub_1 |
| 10918 | 0, // qsub_0 |
| 10919 | 0, // qsub_1 |
| 10920 | 0, // qsub_2 |
| 10921 | 0, // qsub_3 |
| 10922 | 0, // ssub_0 |
| 10923 | 0, // ssub_1 |
| 10924 | 0, // ssub_2 |
| 10925 | 0, // ssub_3 |
| 10926 | 0, // ssub_4 |
| 10927 | 0, // ssub_5 |
| 10928 | 0, // ssub_6 |
| 10929 | 0, // ssub_7 |
| 10930 | 0, // ssub_8 |
| 10931 | 0, // ssub_9 |
| 10932 | 0, // ssub_10 |
| 10933 | 0, // ssub_11 |
| 10934 | 0, // ssub_12 |
| 10935 | 0, // ssub_13 |
| 10936 | 0, // ssub_14 |
| 10937 | 0, // ssub_15 |
| 10938 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10939 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10940 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10941 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 10942 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 10943 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 10944 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10945 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 10946 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 10947 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10948 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 10949 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 10950 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 10951 | 0, // ssub_6_ssub_7_dsub_5 |
| 10952 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 10953 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 10954 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 10955 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10956 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 10957 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10958 | 0, // dsub_5_dsub_7 |
| 10959 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 10960 | 0, // dsub_5_ssub_12_ssub_13 |
| 10961 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 10962 | }, |
| 10963 | { // GPRnosp_and_GPRnoip_and_hGPR |
| 10964 | 0, // dsub_0 |
| 10965 | 0, // dsub_1 |
| 10966 | 0, // dsub_2 |
| 10967 | 0, // dsub_3 |
| 10968 | 0, // dsub_4 |
| 10969 | 0, // dsub_5 |
| 10970 | 0, // dsub_6 |
| 10971 | 0, // dsub_7 |
| 10972 | 0, // gsub_0 |
| 10973 | 0, // gsub_1 |
| 10974 | 0, // qqsub_0 |
| 10975 | 0, // qqsub_1 |
| 10976 | 0, // qsub_0 |
| 10977 | 0, // qsub_1 |
| 10978 | 0, // qsub_2 |
| 10979 | 0, // qsub_3 |
| 10980 | 0, // ssub_0 |
| 10981 | 0, // ssub_1 |
| 10982 | 0, // ssub_2 |
| 10983 | 0, // ssub_3 |
| 10984 | 0, // ssub_4 |
| 10985 | 0, // ssub_5 |
| 10986 | 0, // ssub_6 |
| 10987 | 0, // ssub_7 |
| 10988 | 0, // ssub_8 |
| 10989 | 0, // ssub_9 |
| 10990 | 0, // ssub_10 |
| 10991 | 0, // ssub_11 |
| 10992 | 0, // ssub_12 |
| 10993 | 0, // ssub_13 |
| 10994 | 0, // ssub_14 |
| 10995 | 0, // ssub_15 |
| 10996 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 10997 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 10998 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 10999 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11000 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11001 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11002 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11003 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11004 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11005 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11006 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11007 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11008 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11009 | 0, // ssub_6_ssub_7_dsub_5 |
| 11010 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11011 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11012 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11013 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11014 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11015 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11016 | 0, // dsub_5_dsub_7 |
| 11017 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11018 | 0, // dsub_5_ssub_12_ssub_13 |
| 11019 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11020 | }, |
| 11021 | { // tcGPR |
| 11022 | 0, // dsub_0 |
| 11023 | 0, // dsub_1 |
| 11024 | 0, // dsub_2 |
| 11025 | 0, // dsub_3 |
| 11026 | 0, // dsub_4 |
| 11027 | 0, // dsub_5 |
| 11028 | 0, // dsub_6 |
| 11029 | 0, // dsub_7 |
| 11030 | 0, // gsub_0 |
| 11031 | 0, // gsub_1 |
| 11032 | 0, // qqsub_0 |
| 11033 | 0, // qqsub_1 |
| 11034 | 0, // qsub_0 |
| 11035 | 0, // qsub_1 |
| 11036 | 0, // qsub_2 |
| 11037 | 0, // qsub_3 |
| 11038 | 0, // ssub_0 |
| 11039 | 0, // ssub_1 |
| 11040 | 0, // ssub_2 |
| 11041 | 0, // ssub_3 |
| 11042 | 0, // ssub_4 |
| 11043 | 0, // ssub_5 |
| 11044 | 0, // ssub_6 |
| 11045 | 0, // ssub_7 |
| 11046 | 0, // ssub_8 |
| 11047 | 0, // ssub_9 |
| 11048 | 0, // ssub_10 |
| 11049 | 0, // ssub_11 |
| 11050 | 0, // ssub_12 |
| 11051 | 0, // ssub_13 |
| 11052 | 0, // ssub_14 |
| 11053 | 0, // ssub_15 |
| 11054 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11055 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11056 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11057 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11058 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11059 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11060 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11061 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11062 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11063 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11064 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11065 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11066 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11067 | 0, // ssub_6_ssub_7_dsub_5 |
| 11068 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11069 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11070 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11071 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11072 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11073 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11074 | 0, // dsub_5_dsub_7 |
| 11075 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11076 | 0, // dsub_5_ssub_12_ssub_13 |
| 11077 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11078 | }, |
| 11079 | { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 11080 | 0, // dsub_0 |
| 11081 | 0, // dsub_1 |
| 11082 | 0, // dsub_2 |
| 11083 | 0, // dsub_3 |
| 11084 | 0, // dsub_4 |
| 11085 | 0, // dsub_5 |
| 11086 | 0, // dsub_6 |
| 11087 | 0, // dsub_7 |
| 11088 | 0, // gsub_0 |
| 11089 | 0, // gsub_1 |
| 11090 | 0, // qqsub_0 |
| 11091 | 0, // qqsub_1 |
| 11092 | 0, // qsub_0 |
| 11093 | 0, // qsub_1 |
| 11094 | 0, // qsub_2 |
| 11095 | 0, // qsub_3 |
| 11096 | 0, // ssub_0 |
| 11097 | 0, // ssub_1 |
| 11098 | 0, // ssub_2 |
| 11099 | 0, // ssub_3 |
| 11100 | 0, // ssub_4 |
| 11101 | 0, // ssub_5 |
| 11102 | 0, // ssub_6 |
| 11103 | 0, // ssub_7 |
| 11104 | 0, // ssub_8 |
| 11105 | 0, // ssub_9 |
| 11106 | 0, // ssub_10 |
| 11107 | 0, // ssub_11 |
| 11108 | 0, // ssub_12 |
| 11109 | 0, // ssub_13 |
| 11110 | 0, // ssub_14 |
| 11111 | 0, // ssub_15 |
| 11112 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11113 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11114 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11115 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11116 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11117 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11118 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11119 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11120 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11121 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11122 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11123 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11124 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11125 | 0, // ssub_6_ssub_7_dsub_5 |
| 11126 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11127 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11128 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11129 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11130 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11131 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11132 | 0, // dsub_5_dsub_7 |
| 11133 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11134 | 0, // dsub_5_ssub_12_ssub_13 |
| 11135 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11136 | }, |
| 11137 | { // hGPR_and_tGPREven |
| 11138 | 0, // dsub_0 |
| 11139 | 0, // dsub_1 |
| 11140 | 0, // dsub_2 |
| 11141 | 0, // dsub_3 |
| 11142 | 0, // dsub_4 |
| 11143 | 0, // dsub_5 |
| 11144 | 0, // dsub_6 |
| 11145 | 0, // dsub_7 |
| 11146 | 0, // gsub_0 |
| 11147 | 0, // gsub_1 |
| 11148 | 0, // qqsub_0 |
| 11149 | 0, // qqsub_1 |
| 11150 | 0, // qsub_0 |
| 11151 | 0, // qsub_1 |
| 11152 | 0, // qsub_2 |
| 11153 | 0, // qsub_3 |
| 11154 | 0, // ssub_0 |
| 11155 | 0, // ssub_1 |
| 11156 | 0, // ssub_2 |
| 11157 | 0, // ssub_3 |
| 11158 | 0, // ssub_4 |
| 11159 | 0, // ssub_5 |
| 11160 | 0, // ssub_6 |
| 11161 | 0, // ssub_7 |
| 11162 | 0, // ssub_8 |
| 11163 | 0, // ssub_9 |
| 11164 | 0, // ssub_10 |
| 11165 | 0, // ssub_11 |
| 11166 | 0, // ssub_12 |
| 11167 | 0, // ssub_13 |
| 11168 | 0, // ssub_14 |
| 11169 | 0, // ssub_15 |
| 11170 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11171 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11172 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11173 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11174 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11175 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11176 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11177 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11178 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11179 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11180 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11181 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11182 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11183 | 0, // ssub_6_ssub_7_dsub_5 |
| 11184 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11185 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11186 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11187 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11188 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11189 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11190 | 0, // dsub_5_dsub_7 |
| 11191 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11192 | 0, // dsub_5_ssub_12_ssub_13 |
| 11193 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11194 | }, |
| 11195 | { // tGPR_and_tGPREven |
| 11196 | 0, // dsub_0 |
| 11197 | 0, // dsub_1 |
| 11198 | 0, // dsub_2 |
| 11199 | 0, // dsub_3 |
| 11200 | 0, // dsub_4 |
| 11201 | 0, // dsub_5 |
| 11202 | 0, // dsub_6 |
| 11203 | 0, // dsub_7 |
| 11204 | 0, // gsub_0 |
| 11205 | 0, // gsub_1 |
| 11206 | 0, // qqsub_0 |
| 11207 | 0, // qqsub_1 |
| 11208 | 0, // qsub_0 |
| 11209 | 0, // qsub_1 |
| 11210 | 0, // qsub_2 |
| 11211 | 0, // qsub_3 |
| 11212 | 0, // ssub_0 |
| 11213 | 0, // ssub_1 |
| 11214 | 0, // ssub_2 |
| 11215 | 0, // ssub_3 |
| 11216 | 0, // ssub_4 |
| 11217 | 0, // ssub_5 |
| 11218 | 0, // ssub_6 |
| 11219 | 0, // ssub_7 |
| 11220 | 0, // ssub_8 |
| 11221 | 0, // ssub_9 |
| 11222 | 0, // ssub_10 |
| 11223 | 0, // ssub_11 |
| 11224 | 0, // ssub_12 |
| 11225 | 0, // ssub_13 |
| 11226 | 0, // ssub_14 |
| 11227 | 0, // ssub_15 |
| 11228 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11229 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11230 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11231 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11232 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11233 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11234 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11235 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11236 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11237 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11238 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11239 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11240 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11241 | 0, // ssub_6_ssub_7_dsub_5 |
| 11242 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11243 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11244 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11245 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11246 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11247 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11248 | 0, // dsub_5_dsub_7 |
| 11249 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11250 | 0, // dsub_5_ssub_12_ssub_13 |
| 11251 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11252 | }, |
| 11253 | { // tGPR_and_tGPROdd |
| 11254 | 0, // dsub_0 |
| 11255 | 0, // dsub_1 |
| 11256 | 0, // dsub_2 |
| 11257 | 0, // dsub_3 |
| 11258 | 0, // dsub_4 |
| 11259 | 0, // dsub_5 |
| 11260 | 0, // dsub_6 |
| 11261 | 0, // dsub_7 |
| 11262 | 0, // gsub_0 |
| 11263 | 0, // gsub_1 |
| 11264 | 0, // qqsub_0 |
| 11265 | 0, // qqsub_1 |
| 11266 | 0, // qsub_0 |
| 11267 | 0, // qsub_1 |
| 11268 | 0, // qsub_2 |
| 11269 | 0, // qsub_3 |
| 11270 | 0, // ssub_0 |
| 11271 | 0, // ssub_1 |
| 11272 | 0, // ssub_2 |
| 11273 | 0, // ssub_3 |
| 11274 | 0, // ssub_4 |
| 11275 | 0, // ssub_5 |
| 11276 | 0, // ssub_6 |
| 11277 | 0, // ssub_7 |
| 11278 | 0, // ssub_8 |
| 11279 | 0, // ssub_9 |
| 11280 | 0, // ssub_10 |
| 11281 | 0, // ssub_11 |
| 11282 | 0, // ssub_12 |
| 11283 | 0, // ssub_13 |
| 11284 | 0, // ssub_14 |
| 11285 | 0, // ssub_15 |
| 11286 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11287 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11288 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11289 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11290 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11291 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11292 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11293 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11294 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11295 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11296 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11297 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11298 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11299 | 0, // ssub_6_ssub_7_dsub_5 |
| 11300 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11301 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11302 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11303 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11304 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11305 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11306 | 0, // dsub_5_dsub_7 |
| 11307 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11308 | 0, // dsub_5_ssub_12_ssub_13 |
| 11309 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11310 | }, |
| 11311 | { // tcGPRnotr12 |
| 11312 | 0, // dsub_0 |
| 11313 | 0, // dsub_1 |
| 11314 | 0, // dsub_2 |
| 11315 | 0, // dsub_3 |
| 11316 | 0, // dsub_4 |
| 11317 | 0, // dsub_5 |
| 11318 | 0, // dsub_6 |
| 11319 | 0, // dsub_7 |
| 11320 | 0, // gsub_0 |
| 11321 | 0, // gsub_1 |
| 11322 | 0, // qqsub_0 |
| 11323 | 0, // qqsub_1 |
| 11324 | 0, // qsub_0 |
| 11325 | 0, // qsub_1 |
| 11326 | 0, // qsub_2 |
| 11327 | 0, // qsub_3 |
| 11328 | 0, // ssub_0 |
| 11329 | 0, // ssub_1 |
| 11330 | 0, // ssub_2 |
| 11331 | 0, // ssub_3 |
| 11332 | 0, // ssub_4 |
| 11333 | 0, // ssub_5 |
| 11334 | 0, // ssub_6 |
| 11335 | 0, // ssub_7 |
| 11336 | 0, // ssub_8 |
| 11337 | 0, // ssub_9 |
| 11338 | 0, // ssub_10 |
| 11339 | 0, // ssub_11 |
| 11340 | 0, // ssub_12 |
| 11341 | 0, // ssub_13 |
| 11342 | 0, // ssub_14 |
| 11343 | 0, // ssub_15 |
| 11344 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11345 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11346 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11347 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11348 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11349 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11350 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11351 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11352 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11353 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11354 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11355 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11356 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11357 | 0, // ssub_6_ssub_7_dsub_5 |
| 11358 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11359 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11360 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11361 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11362 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11363 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11364 | 0, // dsub_5_dsub_7 |
| 11365 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11366 | 0, // dsub_5_ssub_12_ssub_13 |
| 11367 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11368 | }, |
| 11369 | { // tGPREven_and_tcGPR |
| 11370 | 0, // dsub_0 |
| 11371 | 0, // dsub_1 |
| 11372 | 0, // dsub_2 |
| 11373 | 0, // dsub_3 |
| 11374 | 0, // dsub_4 |
| 11375 | 0, // dsub_5 |
| 11376 | 0, // dsub_6 |
| 11377 | 0, // dsub_7 |
| 11378 | 0, // gsub_0 |
| 11379 | 0, // gsub_1 |
| 11380 | 0, // qqsub_0 |
| 11381 | 0, // qqsub_1 |
| 11382 | 0, // qsub_0 |
| 11383 | 0, // qsub_1 |
| 11384 | 0, // qsub_2 |
| 11385 | 0, // qsub_3 |
| 11386 | 0, // ssub_0 |
| 11387 | 0, // ssub_1 |
| 11388 | 0, // ssub_2 |
| 11389 | 0, // ssub_3 |
| 11390 | 0, // ssub_4 |
| 11391 | 0, // ssub_5 |
| 11392 | 0, // ssub_6 |
| 11393 | 0, // ssub_7 |
| 11394 | 0, // ssub_8 |
| 11395 | 0, // ssub_9 |
| 11396 | 0, // ssub_10 |
| 11397 | 0, // ssub_11 |
| 11398 | 0, // ssub_12 |
| 11399 | 0, // ssub_13 |
| 11400 | 0, // ssub_14 |
| 11401 | 0, // ssub_15 |
| 11402 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11403 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11404 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11405 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11406 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11407 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11408 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11409 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11410 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11411 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11412 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11413 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11414 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11415 | 0, // ssub_6_ssub_7_dsub_5 |
| 11416 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11417 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11418 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11419 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11420 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11421 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11422 | 0, // dsub_5_dsub_7 |
| 11423 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11424 | 0, // dsub_5_ssub_12_ssub_13 |
| 11425 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11426 | }, |
| 11427 | { // FP_STATUS_REGS |
| 11428 | 0, // dsub_0 |
| 11429 | 0, // dsub_1 |
| 11430 | 0, // dsub_2 |
| 11431 | 0, // dsub_3 |
| 11432 | 0, // dsub_4 |
| 11433 | 0, // dsub_5 |
| 11434 | 0, // dsub_6 |
| 11435 | 0, // dsub_7 |
| 11436 | 0, // gsub_0 |
| 11437 | 0, // gsub_1 |
| 11438 | 0, // qqsub_0 |
| 11439 | 0, // qqsub_1 |
| 11440 | 0, // qsub_0 |
| 11441 | 0, // qsub_1 |
| 11442 | 0, // qsub_2 |
| 11443 | 0, // qsub_3 |
| 11444 | 0, // ssub_0 |
| 11445 | 0, // ssub_1 |
| 11446 | 0, // ssub_2 |
| 11447 | 0, // ssub_3 |
| 11448 | 0, // ssub_4 |
| 11449 | 0, // ssub_5 |
| 11450 | 0, // ssub_6 |
| 11451 | 0, // ssub_7 |
| 11452 | 0, // ssub_8 |
| 11453 | 0, // ssub_9 |
| 11454 | 0, // ssub_10 |
| 11455 | 0, // ssub_11 |
| 11456 | 0, // ssub_12 |
| 11457 | 0, // ssub_13 |
| 11458 | 0, // ssub_14 |
| 11459 | 0, // ssub_15 |
| 11460 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11461 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11462 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11463 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11464 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11465 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11466 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11467 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11468 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11469 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11470 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11471 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11472 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11473 | 0, // ssub_6_ssub_7_dsub_5 |
| 11474 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11475 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11476 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11477 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11478 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11479 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11480 | 0, // dsub_5_dsub_7 |
| 11481 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11482 | 0, // dsub_5_ssub_12_ssub_13 |
| 11483 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11484 | }, |
| 11485 | { // hGPR_and_GPRnoip_and_tGPREven |
| 11486 | 0, // dsub_0 |
| 11487 | 0, // dsub_1 |
| 11488 | 0, // dsub_2 |
| 11489 | 0, // dsub_3 |
| 11490 | 0, // dsub_4 |
| 11491 | 0, // dsub_5 |
| 11492 | 0, // dsub_6 |
| 11493 | 0, // dsub_7 |
| 11494 | 0, // gsub_0 |
| 11495 | 0, // gsub_1 |
| 11496 | 0, // qqsub_0 |
| 11497 | 0, // qqsub_1 |
| 11498 | 0, // qsub_0 |
| 11499 | 0, // qsub_1 |
| 11500 | 0, // qsub_2 |
| 11501 | 0, // qsub_3 |
| 11502 | 0, // ssub_0 |
| 11503 | 0, // ssub_1 |
| 11504 | 0, // ssub_2 |
| 11505 | 0, // ssub_3 |
| 11506 | 0, // ssub_4 |
| 11507 | 0, // ssub_5 |
| 11508 | 0, // ssub_6 |
| 11509 | 0, // ssub_7 |
| 11510 | 0, // ssub_8 |
| 11511 | 0, // ssub_9 |
| 11512 | 0, // ssub_10 |
| 11513 | 0, // ssub_11 |
| 11514 | 0, // ssub_12 |
| 11515 | 0, // ssub_13 |
| 11516 | 0, // ssub_14 |
| 11517 | 0, // ssub_15 |
| 11518 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11519 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11520 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11521 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11522 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11523 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11524 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11525 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11526 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11527 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11528 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11529 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11530 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11531 | 0, // ssub_6_ssub_7_dsub_5 |
| 11532 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11533 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11534 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11535 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11536 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11537 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11538 | 0, // dsub_5_dsub_7 |
| 11539 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11540 | 0, // dsub_5_ssub_12_ssub_13 |
| 11541 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11542 | }, |
| 11543 | { // hGPR_and_tGPROdd |
| 11544 | 0, // dsub_0 |
| 11545 | 0, // dsub_1 |
| 11546 | 0, // dsub_2 |
| 11547 | 0, // dsub_3 |
| 11548 | 0, // dsub_4 |
| 11549 | 0, // dsub_5 |
| 11550 | 0, // dsub_6 |
| 11551 | 0, // dsub_7 |
| 11552 | 0, // gsub_0 |
| 11553 | 0, // gsub_1 |
| 11554 | 0, // qqsub_0 |
| 11555 | 0, // qqsub_1 |
| 11556 | 0, // qsub_0 |
| 11557 | 0, // qsub_1 |
| 11558 | 0, // qsub_2 |
| 11559 | 0, // qsub_3 |
| 11560 | 0, // ssub_0 |
| 11561 | 0, // ssub_1 |
| 11562 | 0, // ssub_2 |
| 11563 | 0, // ssub_3 |
| 11564 | 0, // ssub_4 |
| 11565 | 0, // ssub_5 |
| 11566 | 0, // ssub_6 |
| 11567 | 0, // ssub_7 |
| 11568 | 0, // ssub_8 |
| 11569 | 0, // ssub_9 |
| 11570 | 0, // ssub_10 |
| 11571 | 0, // ssub_11 |
| 11572 | 0, // ssub_12 |
| 11573 | 0, // ssub_13 |
| 11574 | 0, // ssub_14 |
| 11575 | 0, // ssub_15 |
| 11576 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11577 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11578 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11579 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11580 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11581 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11582 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11583 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11584 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11585 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11586 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11587 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11588 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11589 | 0, // ssub_6_ssub_7_dsub_5 |
| 11590 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11591 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11592 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11593 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11594 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11595 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11596 | 0, // dsub_5_dsub_7 |
| 11597 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11598 | 0, // dsub_5_ssub_12_ssub_13 |
| 11599 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11600 | }, |
| 11601 | { // tGPREven_and_tcGPRnotr12 |
| 11602 | 0, // dsub_0 |
| 11603 | 0, // dsub_1 |
| 11604 | 0, // dsub_2 |
| 11605 | 0, // dsub_3 |
| 11606 | 0, // dsub_4 |
| 11607 | 0, // dsub_5 |
| 11608 | 0, // dsub_6 |
| 11609 | 0, // dsub_7 |
| 11610 | 0, // gsub_0 |
| 11611 | 0, // gsub_1 |
| 11612 | 0, // qqsub_0 |
| 11613 | 0, // qqsub_1 |
| 11614 | 0, // qsub_0 |
| 11615 | 0, // qsub_1 |
| 11616 | 0, // qsub_2 |
| 11617 | 0, // qsub_3 |
| 11618 | 0, // ssub_0 |
| 11619 | 0, // ssub_1 |
| 11620 | 0, // ssub_2 |
| 11621 | 0, // ssub_3 |
| 11622 | 0, // ssub_4 |
| 11623 | 0, // ssub_5 |
| 11624 | 0, // ssub_6 |
| 11625 | 0, // ssub_7 |
| 11626 | 0, // ssub_8 |
| 11627 | 0, // ssub_9 |
| 11628 | 0, // ssub_10 |
| 11629 | 0, // ssub_11 |
| 11630 | 0, // ssub_12 |
| 11631 | 0, // ssub_13 |
| 11632 | 0, // ssub_14 |
| 11633 | 0, // ssub_15 |
| 11634 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11635 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11636 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11637 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11638 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11639 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11640 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11641 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11642 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11643 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11644 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11645 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11646 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11647 | 0, // ssub_6_ssub_7_dsub_5 |
| 11648 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11649 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11650 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11651 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11652 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11653 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11654 | 0, // dsub_5_dsub_7 |
| 11655 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11656 | 0, // dsub_5_ssub_12_ssub_13 |
| 11657 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11658 | }, |
| 11659 | { // tGPROdd_and_tcGPR |
| 11660 | 0, // dsub_0 |
| 11661 | 0, // dsub_1 |
| 11662 | 0, // dsub_2 |
| 11663 | 0, // dsub_3 |
| 11664 | 0, // dsub_4 |
| 11665 | 0, // dsub_5 |
| 11666 | 0, // dsub_6 |
| 11667 | 0, // dsub_7 |
| 11668 | 0, // gsub_0 |
| 11669 | 0, // gsub_1 |
| 11670 | 0, // qqsub_0 |
| 11671 | 0, // qqsub_1 |
| 11672 | 0, // qsub_0 |
| 11673 | 0, // qsub_1 |
| 11674 | 0, // qsub_2 |
| 11675 | 0, // qsub_3 |
| 11676 | 0, // ssub_0 |
| 11677 | 0, // ssub_1 |
| 11678 | 0, // ssub_2 |
| 11679 | 0, // ssub_3 |
| 11680 | 0, // ssub_4 |
| 11681 | 0, // ssub_5 |
| 11682 | 0, // ssub_6 |
| 11683 | 0, // ssub_7 |
| 11684 | 0, // ssub_8 |
| 11685 | 0, // ssub_9 |
| 11686 | 0, // ssub_10 |
| 11687 | 0, // ssub_11 |
| 11688 | 0, // ssub_12 |
| 11689 | 0, // ssub_13 |
| 11690 | 0, // ssub_14 |
| 11691 | 0, // ssub_15 |
| 11692 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11693 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11694 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11695 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11696 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11697 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11698 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11699 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11700 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11701 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11702 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11703 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11704 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11705 | 0, // ssub_6_ssub_7_dsub_5 |
| 11706 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11707 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11708 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11709 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11710 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11711 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11712 | 0, // dsub_5_dsub_7 |
| 11713 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11714 | 0, // dsub_5_ssub_12_ssub_13 |
| 11715 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11716 | }, |
| 11717 | { // CCR |
| 11718 | 0, // dsub_0 |
| 11719 | 0, // dsub_1 |
| 11720 | 0, // dsub_2 |
| 11721 | 0, // dsub_3 |
| 11722 | 0, // dsub_4 |
| 11723 | 0, // dsub_5 |
| 11724 | 0, // dsub_6 |
| 11725 | 0, // dsub_7 |
| 11726 | 0, // gsub_0 |
| 11727 | 0, // gsub_1 |
| 11728 | 0, // qqsub_0 |
| 11729 | 0, // qqsub_1 |
| 11730 | 0, // qsub_0 |
| 11731 | 0, // qsub_1 |
| 11732 | 0, // qsub_2 |
| 11733 | 0, // qsub_3 |
| 11734 | 0, // ssub_0 |
| 11735 | 0, // ssub_1 |
| 11736 | 0, // ssub_2 |
| 11737 | 0, // ssub_3 |
| 11738 | 0, // ssub_4 |
| 11739 | 0, // ssub_5 |
| 11740 | 0, // ssub_6 |
| 11741 | 0, // ssub_7 |
| 11742 | 0, // ssub_8 |
| 11743 | 0, // ssub_9 |
| 11744 | 0, // ssub_10 |
| 11745 | 0, // ssub_11 |
| 11746 | 0, // ssub_12 |
| 11747 | 0, // ssub_13 |
| 11748 | 0, // ssub_14 |
| 11749 | 0, // ssub_15 |
| 11750 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11751 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11752 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11753 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11754 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11755 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11756 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11757 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11758 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11759 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11760 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11761 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11762 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11763 | 0, // ssub_6_ssub_7_dsub_5 |
| 11764 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11765 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11766 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11767 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11768 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11769 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11770 | 0, // dsub_5_dsub_7 |
| 11771 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11772 | 0, // dsub_5_ssub_12_ssub_13 |
| 11773 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11774 | }, |
| 11775 | { // FPCXTRegs |
| 11776 | 0, // dsub_0 |
| 11777 | 0, // dsub_1 |
| 11778 | 0, // dsub_2 |
| 11779 | 0, // dsub_3 |
| 11780 | 0, // dsub_4 |
| 11781 | 0, // dsub_5 |
| 11782 | 0, // dsub_6 |
| 11783 | 0, // dsub_7 |
| 11784 | 0, // gsub_0 |
| 11785 | 0, // gsub_1 |
| 11786 | 0, // qqsub_0 |
| 11787 | 0, // qqsub_1 |
| 11788 | 0, // qsub_0 |
| 11789 | 0, // qsub_1 |
| 11790 | 0, // qsub_2 |
| 11791 | 0, // qsub_3 |
| 11792 | 0, // ssub_0 |
| 11793 | 0, // ssub_1 |
| 11794 | 0, // ssub_2 |
| 11795 | 0, // ssub_3 |
| 11796 | 0, // ssub_4 |
| 11797 | 0, // ssub_5 |
| 11798 | 0, // ssub_6 |
| 11799 | 0, // ssub_7 |
| 11800 | 0, // ssub_8 |
| 11801 | 0, // ssub_9 |
| 11802 | 0, // ssub_10 |
| 11803 | 0, // ssub_11 |
| 11804 | 0, // ssub_12 |
| 11805 | 0, // ssub_13 |
| 11806 | 0, // ssub_14 |
| 11807 | 0, // ssub_15 |
| 11808 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11809 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11810 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11811 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11812 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11813 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11814 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11815 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11816 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11817 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11818 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11819 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11820 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11821 | 0, // ssub_6_ssub_7_dsub_5 |
| 11822 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11823 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11824 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11825 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11826 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11827 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11828 | 0, // dsub_5_dsub_7 |
| 11829 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11830 | 0, // dsub_5_ssub_12_ssub_13 |
| 11831 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11832 | }, |
| 11833 | { // GPRlr |
| 11834 | 0, // dsub_0 |
| 11835 | 0, // dsub_1 |
| 11836 | 0, // dsub_2 |
| 11837 | 0, // dsub_3 |
| 11838 | 0, // dsub_4 |
| 11839 | 0, // dsub_5 |
| 11840 | 0, // dsub_6 |
| 11841 | 0, // dsub_7 |
| 11842 | 0, // gsub_0 |
| 11843 | 0, // gsub_1 |
| 11844 | 0, // qqsub_0 |
| 11845 | 0, // qqsub_1 |
| 11846 | 0, // qsub_0 |
| 11847 | 0, // qsub_1 |
| 11848 | 0, // qsub_2 |
| 11849 | 0, // qsub_3 |
| 11850 | 0, // ssub_0 |
| 11851 | 0, // ssub_1 |
| 11852 | 0, // ssub_2 |
| 11853 | 0, // ssub_3 |
| 11854 | 0, // ssub_4 |
| 11855 | 0, // ssub_5 |
| 11856 | 0, // ssub_6 |
| 11857 | 0, // ssub_7 |
| 11858 | 0, // ssub_8 |
| 11859 | 0, // ssub_9 |
| 11860 | 0, // ssub_10 |
| 11861 | 0, // ssub_11 |
| 11862 | 0, // ssub_12 |
| 11863 | 0, // ssub_13 |
| 11864 | 0, // ssub_14 |
| 11865 | 0, // ssub_15 |
| 11866 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11867 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11868 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11869 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11870 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11871 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11872 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11873 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11874 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11875 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11876 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11877 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11878 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11879 | 0, // ssub_6_ssub_7_dsub_5 |
| 11880 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11881 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11882 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11883 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11884 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11885 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11886 | 0, // dsub_5_dsub_7 |
| 11887 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11888 | 0, // dsub_5_ssub_12_ssub_13 |
| 11889 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11890 | }, |
| 11891 | { // GPRsp |
| 11892 | 0, // dsub_0 |
| 11893 | 0, // dsub_1 |
| 11894 | 0, // dsub_2 |
| 11895 | 0, // dsub_3 |
| 11896 | 0, // dsub_4 |
| 11897 | 0, // dsub_5 |
| 11898 | 0, // dsub_6 |
| 11899 | 0, // dsub_7 |
| 11900 | 0, // gsub_0 |
| 11901 | 0, // gsub_1 |
| 11902 | 0, // qqsub_0 |
| 11903 | 0, // qqsub_1 |
| 11904 | 0, // qsub_0 |
| 11905 | 0, // qsub_1 |
| 11906 | 0, // qsub_2 |
| 11907 | 0, // qsub_3 |
| 11908 | 0, // ssub_0 |
| 11909 | 0, // ssub_1 |
| 11910 | 0, // ssub_2 |
| 11911 | 0, // ssub_3 |
| 11912 | 0, // ssub_4 |
| 11913 | 0, // ssub_5 |
| 11914 | 0, // ssub_6 |
| 11915 | 0, // ssub_7 |
| 11916 | 0, // ssub_8 |
| 11917 | 0, // ssub_9 |
| 11918 | 0, // ssub_10 |
| 11919 | 0, // ssub_11 |
| 11920 | 0, // ssub_12 |
| 11921 | 0, // ssub_13 |
| 11922 | 0, // ssub_14 |
| 11923 | 0, // ssub_15 |
| 11924 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11925 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11926 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11927 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11928 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11929 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11930 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11931 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11932 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11933 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11934 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11935 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11936 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11937 | 0, // ssub_6_ssub_7_dsub_5 |
| 11938 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11939 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11940 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11941 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11942 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 11943 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 11944 | 0, // dsub_5_dsub_7 |
| 11945 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 11946 | 0, // dsub_5_ssub_12_ssub_13 |
| 11947 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 11948 | }, |
| 11949 | { // VCCR |
| 11950 | 0, // dsub_0 |
| 11951 | 0, // dsub_1 |
| 11952 | 0, // dsub_2 |
| 11953 | 0, // dsub_3 |
| 11954 | 0, // dsub_4 |
| 11955 | 0, // dsub_5 |
| 11956 | 0, // dsub_6 |
| 11957 | 0, // dsub_7 |
| 11958 | 0, // gsub_0 |
| 11959 | 0, // gsub_1 |
| 11960 | 0, // qqsub_0 |
| 11961 | 0, // qqsub_1 |
| 11962 | 0, // qsub_0 |
| 11963 | 0, // qsub_1 |
| 11964 | 0, // qsub_2 |
| 11965 | 0, // qsub_3 |
| 11966 | 0, // ssub_0 |
| 11967 | 0, // ssub_1 |
| 11968 | 0, // ssub_2 |
| 11969 | 0, // ssub_3 |
| 11970 | 0, // ssub_4 |
| 11971 | 0, // ssub_5 |
| 11972 | 0, // ssub_6 |
| 11973 | 0, // ssub_7 |
| 11974 | 0, // ssub_8 |
| 11975 | 0, // ssub_9 |
| 11976 | 0, // ssub_10 |
| 11977 | 0, // ssub_11 |
| 11978 | 0, // ssub_12 |
| 11979 | 0, // ssub_13 |
| 11980 | 0, // ssub_14 |
| 11981 | 0, // ssub_15 |
| 11982 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 11983 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 11984 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 11985 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 11986 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 11987 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 11988 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11989 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 11990 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 11991 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11992 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 11993 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 11994 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 11995 | 0, // ssub_6_ssub_7_dsub_5 |
| 11996 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 11997 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 11998 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 11999 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12000 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12001 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12002 | 0, // dsub_5_dsub_7 |
| 12003 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12004 | 0, // dsub_5_ssub_12_ssub_13 |
| 12005 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12006 | }, |
| 12007 | { // cl_FPSCR_NZCV |
| 12008 | 0, // dsub_0 |
| 12009 | 0, // dsub_1 |
| 12010 | 0, // dsub_2 |
| 12011 | 0, // dsub_3 |
| 12012 | 0, // dsub_4 |
| 12013 | 0, // dsub_5 |
| 12014 | 0, // dsub_6 |
| 12015 | 0, // dsub_7 |
| 12016 | 0, // gsub_0 |
| 12017 | 0, // gsub_1 |
| 12018 | 0, // qqsub_0 |
| 12019 | 0, // qqsub_1 |
| 12020 | 0, // qsub_0 |
| 12021 | 0, // qsub_1 |
| 12022 | 0, // qsub_2 |
| 12023 | 0, // qsub_3 |
| 12024 | 0, // ssub_0 |
| 12025 | 0, // ssub_1 |
| 12026 | 0, // ssub_2 |
| 12027 | 0, // ssub_3 |
| 12028 | 0, // ssub_4 |
| 12029 | 0, // ssub_5 |
| 12030 | 0, // ssub_6 |
| 12031 | 0, // ssub_7 |
| 12032 | 0, // ssub_8 |
| 12033 | 0, // ssub_9 |
| 12034 | 0, // ssub_10 |
| 12035 | 0, // ssub_11 |
| 12036 | 0, // ssub_12 |
| 12037 | 0, // ssub_13 |
| 12038 | 0, // ssub_14 |
| 12039 | 0, // ssub_15 |
| 12040 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12041 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12042 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12043 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12044 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12045 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12046 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12047 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12048 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12049 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12050 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12051 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12052 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12053 | 0, // ssub_6_ssub_7_dsub_5 |
| 12054 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12055 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12056 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12057 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12058 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12059 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12060 | 0, // dsub_5_dsub_7 |
| 12061 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12062 | 0, // dsub_5_ssub_12_ssub_13 |
| 12063 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12064 | }, |
| 12065 | { // hGPR_and_tGPRwithpc |
| 12066 | 0, // dsub_0 |
| 12067 | 0, // dsub_1 |
| 12068 | 0, // dsub_2 |
| 12069 | 0, // dsub_3 |
| 12070 | 0, // dsub_4 |
| 12071 | 0, // dsub_5 |
| 12072 | 0, // dsub_6 |
| 12073 | 0, // dsub_7 |
| 12074 | 0, // gsub_0 |
| 12075 | 0, // gsub_1 |
| 12076 | 0, // qqsub_0 |
| 12077 | 0, // qqsub_1 |
| 12078 | 0, // qsub_0 |
| 12079 | 0, // qsub_1 |
| 12080 | 0, // qsub_2 |
| 12081 | 0, // qsub_3 |
| 12082 | 0, // ssub_0 |
| 12083 | 0, // ssub_1 |
| 12084 | 0, // ssub_2 |
| 12085 | 0, // ssub_3 |
| 12086 | 0, // ssub_4 |
| 12087 | 0, // ssub_5 |
| 12088 | 0, // ssub_6 |
| 12089 | 0, // ssub_7 |
| 12090 | 0, // ssub_8 |
| 12091 | 0, // ssub_9 |
| 12092 | 0, // ssub_10 |
| 12093 | 0, // ssub_11 |
| 12094 | 0, // ssub_12 |
| 12095 | 0, // ssub_13 |
| 12096 | 0, // ssub_14 |
| 12097 | 0, // ssub_15 |
| 12098 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12099 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12100 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12101 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12102 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12103 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12104 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12105 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12106 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12107 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12108 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12109 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12110 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12111 | 0, // ssub_6_ssub_7_dsub_5 |
| 12112 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12113 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12114 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12115 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12116 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12117 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12118 | 0, // dsub_5_dsub_7 |
| 12119 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12120 | 0, // dsub_5_ssub_12_ssub_13 |
| 12121 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12122 | }, |
| 12123 | { // hGPR_and_tcGPR |
| 12124 | 0, // dsub_0 |
| 12125 | 0, // dsub_1 |
| 12126 | 0, // dsub_2 |
| 12127 | 0, // dsub_3 |
| 12128 | 0, // dsub_4 |
| 12129 | 0, // dsub_5 |
| 12130 | 0, // dsub_6 |
| 12131 | 0, // dsub_7 |
| 12132 | 0, // gsub_0 |
| 12133 | 0, // gsub_1 |
| 12134 | 0, // qqsub_0 |
| 12135 | 0, // qqsub_1 |
| 12136 | 0, // qsub_0 |
| 12137 | 0, // qsub_1 |
| 12138 | 0, // qsub_2 |
| 12139 | 0, // qsub_3 |
| 12140 | 0, // ssub_0 |
| 12141 | 0, // ssub_1 |
| 12142 | 0, // ssub_2 |
| 12143 | 0, // ssub_3 |
| 12144 | 0, // ssub_4 |
| 12145 | 0, // ssub_5 |
| 12146 | 0, // ssub_6 |
| 12147 | 0, // ssub_7 |
| 12148 | 0, // ssub_8 |
| 12149 | 0, // ssub_9 |
| 12150 | 0, // ssub_10 |
| 12151 | 0, // ssub_11 |
| 12152 | 0, // ssub_12 |
| 12153 | 0, // ssub_13 |
| 12154 | 0, // ssub_14 |
| 12155 | 0, // ssub_15 |
| 12156 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12157 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12158 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12159 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12160 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12161 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12162 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12163 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12164 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12165 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12166 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12167 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12168 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12169 | 0, // ssub_6_ssub_7_dsub_5 |
| 12170 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12171 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12172 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12173 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12174 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12175 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12176 | 0, // dsub_5_dsub_7 |
| 12177 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12178 | 0, // dsub_5_ssub_12_ssub_13 |
| 12179 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12180 | }, |
| 12181 | { // DPR |
| 12182 | 0, // dsub_0 |
| 12183 | 0, // dsub_1 |
| 12184 | 0, // dsub_2 |
| 12185 | 0, // dsub_3 |
| 12186 | 0, // dsub_4 |
| 12187 | 0, // dsub_5 |
| 12188 | 0, // dsub_6 |
| 12189 | 0, // dsub_7 |
| 12190 | 0, // gsub_0 |
| 12191 | 0, // gsub_1 |
| 12192 | 0, // qqsub_0 |
| 12193 | 0, // qqsub_1 |
| 12194 | 0, // qsub_0 |
| 12195 | 0, // qsub_1 |
| 12196 | 0, // qsub_2 |
| 12197 | 0, // qsub_3 |
| 12198 | 53, // ssub_0 -> DPR_VFP2 |
| 12199 | 53, // ssub_1 -> DPR_VFP2 |
| 12200 | 0, // ssub_2 |
| 12201 | 0, // ssub_3 |
| 12202 | 0, // ssub_4 |
| 12203 | 0, // ssub_5 |
| 12204 | 0, // ssub_6 |
| 12205 | 0, // ssub_7 |
| 12206 | 0, // ssub_8 |
| 12207 | 0, // ssub_9 |
| 12208 | 0, // ssub_10 |
| 12209 | 0, // ssub_11 |
| 12210 | 0, // ssub_12 |
| 12211 | 0, // ssub_13 |
| 12212 | 0, // ssub_14 |
| 12213 | 0, // ssub_15 |
| 12214 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12215 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12216 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12217 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12218 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12219 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12220 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12221 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12222 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12223 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12224 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12225 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12226 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12227 | 0, // ssub_6_ssub_7_dsub_5 |
| 12228 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12229 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12230 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12231 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12232 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12233 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12234 | 0, // dsub_5_dsub_7 |
| 12235 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12236 | 0, // dsub_5_ssub_12_ssub_13 |
| 12237 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12238 | }, |
| 12239 | { // DPR_VFP2 |
| 12240 | 0, // dsub_0 |
| 12241 | 0, // dsub_1 |
| 12242 | 0, // dsub_2 |
| 12243 | 0, // dsub_3 |
| 12244 | 0, // dsub_4 |
| 12245 | 0, // dsub_5 |
| 12246 | 0, // dsub_6 |
| 12247 | 0, // dsub_7 |
| 12248 | 0, // gsub_0 |
| 12249 | 0, // gsub_1 |
| 12250 | 0, // qqsub_0 |
| 12251 | 0, // qqsub_1 |
| 12252 | 0, // qsub_0 |
| 12253 | 0, // qsub_1 |
| 12254 | 0, // qsub_2 |
| 12255 | 0, // qsub_3 |
| 12256 | 53, // ssub_0 -> DPR_VFP2 |
| 12257 | 53, // ssub_1 -> DPR_VFP2 |
| 12258 | 0, // ssub_2 |
| 12259 | 0, // ssub_3 |
| 12260 | 0, // ssub_4 |
| 12261 | 0, // ssub_5 |
| 12262 | 0, // ssub_6 |
| 12263 | 0, // ssub_7 |
| 12264 | 0, // ssub_8 |
| 12265 | 0, // ssub_9 |
| 12266 | 0, // ssub_10 |
| 12267 | 0, // ssub_11 |
| 12268 | 0, // ssub_12 |
| 12269 | 0, // ssub_13 |
| 12270 | 0, // ssub_14 |
| 12271 | 0, // ssub_15 |
| 12272 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12273 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12274 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12275 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12276 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12277 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12278 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12279 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12280 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12281 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12282 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12283 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12284 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12285 | 0, // ssub_6_ssub_7_dsub_5 |
| 12286 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12287 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12288 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12289 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12290 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12291 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12292 | 0, // dsub_5_dsub_7 |
| 12293 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12294 | 0, // dsub_5_ssub_12_ssub_13 |
| 12295 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12296 | }, |
| 12297 | { // DPR_8 |
| 12298 | 0, // dsub_0 |
| 12299 | 0, // dsub_1 |
| 12300 | 0, // dsub_2 |
| 12301 | 0, // dsub_3 |
| 12302 | 0, // dsub_4 |
| 12303 | 0, // dsub_5 |
| 12304 | 0, // dsub_6 |
| 12305 | 0, // dsub_7 |
| 12306 | 0, // gsub_0 |
| 12307 | 0, // gsub_1 |
| 12308 | 0, // qqsub_0 |
| 12309 | 0, // qqsub_1 |
| 12310 | 0, // qsub_0 |
| 12311 | 0, // qsub_1 |
| 12312 | 0, // qsub_2 |
| 12313 | 0, // qsub_3 |
| 12314 | 54, // ssub_0 -> DPR_8 |
| 12315 | 54, // ssub_1 -> DPR_8 |
| 12316 | 0, // ssub_2 |
| 12317 | 0, // ssub_3 |
| 12318 | 0, // ssub_4 |
| 12319 | 0, // ssub_5 |
| 12320 | 0, // ssub_6 |
| 12321 | 0, // ssub_7 |
| 12322 | 0, // ssub_8 |
| 12323 | 0, // ssub_9 |
| 12324 | 0, // ssub_10 |
| 12325 | 0, // ssub_11 |
| 12326 | 0, // ssub_12 |
| 12327 | 0, // ssub_13 |
| 12328 | 0, // ssub_14 |
| 12329 | 0, // ssub_15 |
| 12330 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12331 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12332 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12333 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12334 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12335 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12336 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12337 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12338 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12339 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12340 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12341 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12342 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12343 | 0, // ssub_6_ssub_7_dsub_5 |
| 12344 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12345 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12346 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12347 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12348 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12349 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12350 | 0, // dsub_5_dsub_7 |
| 12351 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12352 | 0, // dsub_5_ssub_12_ssub_13 |
| 12353 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12354 | }, |
| 12355 | { // GPRPair |
| 12356 | 0, // dsub_0 |
| 12357 | 0, // dsub_1 |
| 12358 | 0, // dsub_2 |
| 12359 | 0, // dsub_3 |
| 12360 | 0, // dsub_4 |
| 12361 | 0, // dsub_5 |
| 12362 | 0, // dsub_6 |
| 12363 | 0, // dsub_7 |
| 12364 | 55, // gsub_0 -> GPRPair |
| 12365 | 55, // gsub_1 -> GPRPair |
| 12366 | 0, // qqsub_0 |
| 12367 | 0, // qqsub_1 |
| 12368 | 0, // qsub_0 |
| 12369 | 0, // qsub_1 |
| 12370 | 0, // qsub_2 |
| 12371 | 0, // qsub_3 |
| 12372 | 0, // ssub_0 |
| 12373 | 0, // ssub_1 |
| 12374 | 0, // ssub_2 |
| 12375 | 0, // ssub_3 |
| 12376 | 0, // ssub_4 |
| 12377 | 0, // ssub_5 |
| 12378 | 0, // ssub_6 |
| 12379 | 0, // ssub_7 |
| 12380 | 0, // ssub_8 |
| 12381 | 0, // ssub_9 |
| 12382 | 0, // ssub_10 |
| 12383 | 0, // ssub_11 |
| 12384 | 0, // ssub_12 |
| 12385 | 0, // ssub_13 |
| 12386 | 0, // ssub_14 |
| 12387 | 0, // ssub_15 |
| 12388 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12389 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12390 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12391 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12392 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12393 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12394 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12395 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12396 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12397 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12398 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12399 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12400 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12401 | 0, // ssub_6_ssub_7_dsub_5 |
| 12402 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12403 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12404 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12405 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12406 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12407 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12408 | 0, // dsub_5_dsub_7 |
| 12409 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12410 | 0, // dsub_5_ssub_12_ssub_13 |
| 12411 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12412 | }, |
| 12413 | { // GPRPairnosp |
| 12414 | 0, // dsub_0 |
| 12415 | 0, // dsub_1 |
| 12416 | 0, // dsub_2 |
| 12417 | 0, // dsub_3 |
| 12418 | 0, // dsub_4 |
| 12419 | 0, // dsub_5 |
| 12420 | 0, // dsub_6 |
| 12421 | 0, // dsub_7 |
| 12422 | 56, // gsub_0 -> GPRPairnosp |
| 12423 | 56, // gsub_1 -> GPRPairnosp |
| 12424 | 0, // qqsub_0 |
| 12425 | 0, // qqsub_1 |
| 12426 | 0, // qsub_0 |
| 12427 | 0, // qsub_1 |
| 12428 | 0, // qsub_2 |
| 12429 | 0, // qsub_3 |
| 12430 | 0, // ssub_0 |
| 12431 | 0, // ssub_1 |
| 12432 | 0, // ssub_2 |
| 12433 | 0, // ssub_3 |
| 12434 | 0, // ssub_4 |
| 12435 | 0, // ssub_5 |
| 12436 | 0, // ssub_6 |
| 12437 | 0, // ssub_7 |
| 12438 | 0, // ssub_8 |
| 12439 | 0, // ssub_9 |
| 12440 | 0, // ssub_10 |
| 12441 | 0, // ssub_11 |
| 12442 | 0, // ssub_12 |
| 12443 | 0, // ssub_13 |
| 12444 | 0, // ssub_14 |
| 12445 | 0, // ssub_15 |
| 12446 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12447 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12448 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12449 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12450 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12451 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12452 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12453 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12454 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12455 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12456 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12457 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12458 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12459 | 0, // ssub_6_ssub_7_dsub_5 |
| 12460 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12461 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12462 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12463 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12464 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12465 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12466 | 0, // dsub_5_dsub_7 |
| 12467 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12468 | 0, // dsub_5_ssub_12_ssub_13 |
| 12469 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12470 | }, |
| 12471 | { // GPRPair_with_gsub_0_in_tGPR |
| 12472 | 0, // dsub_0 |
| 12473 | 0, // dsub_1 |
| 12474 | 0, // dsub_2 |
| 12475 | 0, // dsub_3 |
| 12476 | 0, // dsub_4 |
| 12477 | 0, // dsub_5 |
| 12478 | 0, // dsub_6 |
| 12479 | 0, // dsub_7 |
| 12480 | 57, // gsub_0 -> GPRPair_with_gsub_0_in_tGPR |
| 12481 | 57, // gsub_1 -> GPRPair_with_gsub_0_in_tGPR |
| 12482 | 0, // qqsub_0 |
| 12483 | 0, // qqsub_1 |
| 12484 | 0, // qsub_0 |
| 12485 | 0, // qsub_1 |
| 12486 | 0, // qsub_2 |
| 12487 | 0, // qsub_3 |
| 12488 | 0, // ssub_0 |
| 12489 | 0, // ssub_1 |
| 12490 | 0, // ssub_2 |
| 12491 | 0, // ssub_3 |
| 12492 | 0, // ssub_4 |
| 12493 | 0, // ssub_5 |
| 12494 | 0, // ssub_6 |
| 12495 | 0, // ssub_7 |
| 12496 | 0, // ssub_8 |
| 12497 | 0, // ssub_9 |
| 12498 | 0, // ssub_10 |
| 12499 | 0, // ssub_11 |
| 12500 | 0, // ssub_12 |
| 12501 | 0, // ssub_13 |
| 12502 | 0, // ssub_14 |
| 12503 | 0, // ssub_15 |
| 12504 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12505 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12506 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12507 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12508 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12509 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12510 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12511 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12512 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12513 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12514 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12515 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12516 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12517 | 0, // ssub_6_ssub_7_dsub_5 |
| 12518 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12519 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12520 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12521 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12522 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12523 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12524 | 0, // dsub_5_dsub_7 |
| 12525 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12526 | 0, // dsub_5_ssub_12_ssub_13 |
| 12527 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12528 | }, |
| 12529 | { // GPRPair_with_gsub_0_in_hGPR |
| 12530 | 0, // dsub_0 |
| 12531 | 0, // dsub_1 |
| 12532 | 0, // dsub_2 |
| 12533 | 0, // dsub_3 |
| 12534 | 0, // dsub_4 |
| 12535 | 0, // dsub_5 |
| 12536 | 0, // dsub_6 |
| 12537 | 0, // dsub_7 |
| 12538 | 58, // gsub_0 -> GPRPair_with_gsub_0_in_hGPR |
| 12539 | 58, // gsub_1 -> GPRPair_with_gsub_0_in_hGPR |
| 12540 | 0, // qqsub_0 |
| 12541 | 0, // qqsub_1 |
| 12542 | 0, // qsub_0 |
| 12543 | 0, // qsub_1 |
| 12544 | 0, // qsub_2 |
| 12545 | 0, // qsub_3 |
| 12546 | 0, // ssub_0 |
| 12547 | 0, // ssub_1 |
| 12548 | 0, // ssub_2 |
| 12549 | 0, // ssub_3 |
| 12550 | 0, // ssub_4 |
| 12551 | 0, // ssub_5 |
| 12552 | 0, // ssub_6 |
| 12553 | 0, // ssub_7 |
| 12554 | 0, // ssub_8 |
| 12555 | 0, // ssub_9 |
| 12556 | 0, // ssub_10 |
| 12557 | 0, // ssub_11 |
| 12558 | 0, // ssub_12 |
| 12559 | 0, // ssub_13 |
| 12560 | 0, // ssub_14 |
| 12561 | 0, // ssub_15 |
| 12562 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12563 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12564 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12565 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12566 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12567 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12568 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12569 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12570 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12571 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12572 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12573 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12574 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12575 | 0, // ssub_6_ssub_7_dsub_5 |
| 12576 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12577 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12578 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12579 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12580 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12581 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12582 | 0, // dsub_5_dsub_7 |
| 12583 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12584 | 0, // dsub_5_ssub_12_ssub_13 |
| 12585 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12586 | }, |
| 12587 | { // GPRPair_with_gsub_0_in_tcGPR |
| 12588 | 0, // dsub_0 |
| 12589 | 0, // dsub_1 |
| 12590 | 0, // dsub_2 |
| 12591 | 0, // dsub_3 |
| 12592 | 0, // dsub_4 |
| 12593 | 0, // dsub_5 |
| 12594 | 0, // dsub_6 |
| 12595 | 0, // dsub_7 |
| 12596 | 59, // gsub_0 -> GPRPair_with_gsub_0_in_tcGPR |
| 12597 | 59, // gsub_1 -> GPRPair_with_gsub_0_in_tcGPR |
| 12598 | 0, // qqsub_0 |
| 12599 | 0, // qqsub_1 |
| 12600 | 0, // qsub_0 |
| 12601 | 0, // qsub_1 |
| 12602 | 0, // qsub_2 |
| 12603 | 0, // qsub_3 |
| 12604 | 0, // ssub_0 |
| 12605 | 0, // ssub_1 |
| 12606 | 0, // ssub_2 |
| 12607 | 0, // ssub_3 |
| 12608 | 0, // ssub_4 |
| 12609 | 0, // ssub_5 |
| 12610 | 0, // ssub_6 |
| 12611 | 0, // ssub_7 |
| 12612 | 0, // ssub_8 |
| 12613 | 0, // ssub_9 |
| 12614 | 0, // ssub_10 |
| 12615 | 0, // ssub_11 |
| 12616 | 0, // ssub_12 |
| 12617 | 0, // ssub_13 |
| 12618 | 0, // ssub_14 |
| 12619 | 0, // ssub_15 |
| 12620 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12621 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12622 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12623 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12624 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12625 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12626 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12627 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12628 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12629 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12630 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12631 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12632 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12633 | 0, // ssub_6_ssub_7_dsub_5 |
| 12634 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12635 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12636 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12637 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12638 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12639 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12640 | 0, // dsub_5_dsub_7 |
| 12641 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12642 | 0, // dsub_5_ssub_12_ssub_13 |
| 12643 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12644 | }, |
| 12645 | { // GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 12646 | 0, // dsub_0 |
| 12647 | 0, // dsub_1 |
| 12648 | 0, // dsub_2 |
| 12649 | 0, // dsub_3 |
| 12650 | 0, // dsub_4 |
| 12651 | 0, // dsub_5 |
| 12652 | 0, // dsub_6 |
| 12653 | 0, // dsub_7 |
| 12654 | 60, // gsub_0 -> GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 12655 | 60, // gsub_1 -> GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 12656 | 0, // qqsub_0 |
| 12657 | 0, // qqsub_1 |
| 12658 | 0, // qsub_0 |
| 12659 | 0, // qsub_1 |
| 12660 | 0, // qsub_2 |
| 12661 | 0, // qsub_3 |
| 12662 | 0, // ssub_0 |
| 12663 | 0, // ssub_1 |
| 12664 | 0, // ssub_2 |
| 12665 | 0, // ssub_3 |
| 12666 | 0, // ssub_4 |
| 12667 | 0, // ssub_5 |
| 12668 | 0, // ssub_6 |
| 12669 | 0, // ssub_7 |
| 12670 | 0, // ssub_8 |
| 12671 | 0, // ssub_9 |
| 12672 | 0, // ssub_10 |
| 12673 | 0, // ssub_11 |
| 12674 | 0, // ssub_12 |
| 12675 | 0, // ssub_13 |
| 12676 | 0, // ssub_14 |
| 12677 | 0, // ssub_15 |
| 12678 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12679 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12680 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12681 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12682 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12683 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12684 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12685 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12686 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12687 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12688 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12689 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12690 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12691 | 0, // ssub_6_ssub_7_dsub_5 |
| 12692 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12693 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12694 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12695 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12696 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12697 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12698 | 0, // dsub_5_dsub_7 |
| 12699 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12700 | 0, // dsub_5_ssub_12_ssub_13 |
| 12701 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12702 | }, |
| 12703 | { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 12704 | 0, // dsub_0 |
| 12705 | 0, // dsub_1 |
| 12706 | 0, // dsub_2 |
| 12707 | 0, // dsub_3 |
| 12708 | 0, // dsub_4 |
| 12709 | 0, // dsub_5 |
| 12710 | 0, // dsub_6 |
| 12711 | 0, // dsub_7 |
| 12712 | 61, // gsub_0 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 12713 | 61, // gsub_1 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 12714 | 0, // qqsub_0 |
| 12715 | 0, // qqsub_1 |
| 12716 | 0, // qsub_0 |
| 12717 | 0, // qsub_1 |
| 12718 | 0, // qsub_2 |
| 12719 | 0, // qsub_3 |
| 12720 | 0, // ssub_0 |
| 12721 | 0, // ssub_1 |
| 12722 | 0, // ssub_2 |
| 12723 | 0, // ssub_3 |
| 12724 | 0, // ssub_4 |
| 12725 | 0, // ssub_5 |
| 12726 | 0, // ssub_6 |
| 12727 | 0, // ssub_7 |
| 12728 | 0, // ssub_8 |
| 12729 | 0, // ssub_9 |
| 12730 | 0, // ssub_10 |
| 12731 | 0, // ssub_11 |
| 12732 | 0, // ssub_12 |
| 12733 | 0, // ssub_13 |
| 12734 | 0, // ssub_14 |
| 12735 | 0, // ssub_15 |
| 12736 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12737 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12738 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12739 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12740 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12741 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12742 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12743 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12744 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12745 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12746 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12747 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12748 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12749 | 0, // ssub_6_ssub_7_dsub_5 |
| 12750 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12751 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12752 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12753 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12754 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12755 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12756 | 0, // dsub_5_dsub_7 |
| 12757 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12758 | 0, // dsub_5_ssub_12_ssub_13 |
| 12759 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12760 | }, |
| 12761 | { // GPRPair_with_gsub_1_in_GPRsp |
| 12762 | 0, // dsub_0 |
| 12763 | 0, // dsub_1 |
| 12764 | 0, // dsub_2 |
| 12765 | 0, // dsub_3 |
| 12766 | 0, // dsub_4 |
| 12767 | 0, // dsub_5 |
| 12768 | 0, // dsub_6 |
| 12769 | 0, // dsub_7 |
| 12770 | 62, // gsub_0 -> GPRPair_with_gsub_1_in_GPRsp |
| 12771 | 62, // gsub_1 -> GPRPair_with_gsub_1_in_GPRsp |
| 12772 | 0, // qqsub_0 |
| 12773 | 0, // qqsub_1 |
| 12774 | 0, // qsub_0 |
| 12775 | 0, // qsub_1 |
| 12776 | 0, // qsub_2 |
| 12777 | 0, // qsub_3 |
| 12778 | 0, // ssub_0 |
| 12779 | 0, // ssub_1 |
| 12780 | 0, // ssub_2 |
| 12781 | 0, // ssub_3 |
| 12782 | 0, // ssub_4 |
| 12783 | 0, // ssub_5 |
| 12784 | 0, // ssub_6 |
| 12785 | 0, // ssub_7 |
| 12786 | 0, // ssub_8 |
| 12787 | 0, // ssub_9 |
| 12788 | 0, // ssub_10 |
| 12789 | 0, // ssub_11 |
| 12790 | 0, // ssub_12 |
| 12791 | 0, // ssub_13 |
| 12792 | 0, // ssub_14 |
| 12793 | 0, // ssub_15 |
| 12794 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12795 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12796 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12797 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12798 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12799 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12800 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12801 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12802 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12803 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12804 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12805 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12806 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12807 | 0, // ssub_6_ssub_7_dsub_5 |
| 12808 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12809 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12810 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12811 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12812 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12813 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12814 | 0, // dsub_5_dsub_7 |
| 12815 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12816 | 0, // dsub_5_ssub_12_ssub_13 |
| 12817 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12818 | }, |
| 12819 | { // DPairSpc |
| 12820 | 63, // dsub_0 -> DPairSpc |
| 12821 | 0, // dsub_1 |
| 12822 | 63, // dsub_2 -> DPairSpc |
| 12823 | 0, // dsub_3 |
| 12824 | 0, // dsub_4 |
| 12825 | 0, // dsub_5 |
| 12826 | 0, // dsub_6 |
| 12827 | 0, // dsub_7 |
| 12828 | 0, // gsub_0 |
| 12829 | 0, // gsub_1 |
| 12830 | 0, // qqsub_0 |
| 12831 | 0, // qqsub_1 |
| 12832 | 0, // qsub_0 |
| 12833 | 0, // qsub_1 |
| 12834 | 0, // qsub_2 |
| 12835 | 0, // qsub_3 |
| 12836 | 64, // ssub_0 -> DPairSpc_with_ssub_0 |
| 12837 | 64, // ssub_1 -> DPairSpc_with_ssub_0 |
| 12838 | 0, // ssub_2 |
| 12839 | 0, // ssub_3 |
| 12840 | 65, // ssub_4 -> DPairSpc_with_ssub_4 |
| 12841 | 65, // ssub_5 -> DPairSpc_with_ssub_4 |
| 12842 | 0, // ssub_6 |
| 12843 | 0, // ssub_7 |
| 12844 | 0, // ssub_8 |
| 12845 | 0, // ssub_9 |
| 12846 | 0, // ssub_10 |
| 12847 | 0, // ssub_11 |
| 12848 | 0, // ssub_12 |
| 12849 | 0, // ssub_13 |
| 12850 | 0, // ssub_14 |
| 12851 | 0, // ssub_15 |
| 12852 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12853 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12854 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12855 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12856 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12857 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12858 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12859 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12860 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12861 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12862 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12863 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12864 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12865 | 0, // ssub_6_ssub_7_dsub_5 |
| 12866 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12867 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12868 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12869 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12870 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12871 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12872 | 0, // dsub_5_dsub_7 |
| 12873 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12874 | 0, // dsub_5_ssub_12_ssub_13 |
| 12875 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12876 | }, |
| 12877 | { // DPairSpc_with_ssub_0 |
| 12878 | 64, // dsub_0 -> DPairSpc_with_ssub_0 |
| 12879 | 0, // dsub_1 |
| 12880 | 64, // dsub_2 -> DPairSpc_with_ssub_0 |
| 12881 | 0, // dsub_3 |
| 12882 | 0, // dsub_4 |
| 12883 | 0, // dsub_5 |
| 12884 | 0, // dsub_6 |
| 12885 | 0, // dsub_7 |
| 12886 | 0, // gsub_0 |
| 12887 | 0, // gsub_1 |
| 12888 | 0, // qqsub_0 |
| 12889 | 0, // qqsub_1 |
| 12890 | 0, // qsub_0 |
| 12891 | 0, // qsub_1 |
| 12892 | 0, // qsub_2 |
| 12893 | 0, // qsub_3 |
| 12894 | 64, // ssub_0 -> DPairSpc_with_ssub_0 |
| 12895 | 64, // ssub_1 -> DPairSpc_with_ssub_0 |
| 12896 | 0, // ssub_2 |
| 12897 | 0, // ssub_3 |
| 12898 | 65, // ssub_4 -> DPairSpc_with_ssub_4 |
| 12899 | 65, // ssub_5 -> DPairSpc_with_ssub_4 |
| 12900 | 0, // ssub_6 |
| 12901 | 0, // ssub_7 |
| 12902 | 0, // ssub_8 |
| 12903 | 0, // ssub_9 |
| 12904 | 0, // ssub_10 |
| 12905 | 0, // ssub_11 |
| 12906 | 0, // ssub_12 |
| 12907 | 0, // ssub_13 |
| 12908 | 0, // ssub_14 |
| 12909 | 0, // ssub_15 |
| 12910 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12911 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12912 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12913 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12914 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12915 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12916 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12917 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12918 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12919 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12920 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12921 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12922 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12923 | 0, // ssub_6_ssub_7_dsub_5 |
| 12924 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12925 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12926 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12927 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12928 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12929 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12930 | 0, // dsub_5_dsub_7 |
| 12931 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12932 | 0, // dsub_5_ssub_12_ssub_13 |
| 12933 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12934 | }, |
| 12935 | { // DPairSpc_with_ssub_4 |
| 12936 | 65, // dsub_0 -> DPairSpc_with_ssub_4 |
| 12937 | 0, // dsub_1 |
| 12938 | 65, // dsub_2 -> DPairSpc_with_ssub_4 |
| 12939 | 0, // dsub_3 |
| 12940 | 0, // dsub_4 |
| 12941 | 0, // dsub_5 |
| 12942 | 0, // dsub_6 |
| 12943 | 0, // dsub_7 |
| 12944 | 0, // gsub_0 |
| 12945 | 0, // gsub_1 |
| 12946 | 0, // qqsub_0 |
| 12947 | 0, // qqsub_1 |
| 12948 | 0, // qsub_0 |
| 12949 | 0, // qsub_1 |
| 12950 | 0, // qsub_2 |
| 12951 | 0, // qsub_3 |
| 12952 | 65, // ssub_0 -> DPairSpc_with_ssub_4 |
| 12953 | 65, // ssub_1 -> DPairSpc_with_ssub_4 |
| 12954 | 0, // ssub_2 |
| 12955 | 0, // ssub_3 |
| 12956 | 65, // ssub_4 -> DPairSpc_with_ssub_4 |
| 12957 | 65, // ssub_5 -> DPairSpc_with_ssub_4 |
| 12958 | 0, // ssub_6 |
| 12959 | 0, // ssub_7 |
| 12960 | 0, // ssub_8 |
| 12961 | 0, // ssub_9 |
| 12962 | 0, // ssub_10 |
| 12963 | 0, // ssub_11 |
| 12964 | 0, // ssub_12 |
| 12965 | 0, // ssub_13 |
| 12966 | 0, // ssub_14 |
| 12967 | 0, // ssub_15 |
| 12968 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 12969 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 12970 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 12971 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 12972 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 12973 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 12974 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12975 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 12976 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 12977 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12978 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 12979 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 12980 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 12981 | 0, // ssub_6_ssub_7_dsub_5 |
| 12982 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 12983 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 12984 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 12985 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12986 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 12987 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 12988 | 0, // dsub_5_dsub_7 |
| 12989 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 12990 | 0, // dsub_5_ssub_12_ssub_13 |
| 12991 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 12992 | }, |
| 12993 | { // DPairSpc_with_dsub_0_in_DPR_8 |
| 12994 | 66, // dsub_0 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 12995 | 0, // dsub_1 |
| 12996 | 66, // dsub_2 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 12997 | 0, // dsub_3 |
| 12998 | 0, // dsub_4 |
| 12999 | 0, // dsub_5 |
| 13000 | 0, // dsub_6 |
| 13001 | 0, // dsub_7 |
| 13002 | 0, // gsub_0 |
| 13003 | 0, // gsub_1 |
| 13004 | 0, // qqsub_0 |
| 13005 | 0, // qqsub_1 |
| 13006 | 0, // qsub_0 |
| 13007 | 0, // qsub_1 |
| 13008 | 0, // qsub_2 |
| 13009 | 0, // qsub_3 |
| 13010 | 66, // ssub_0 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 13011 | 66, // ssub_1 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 13012 | 0, // ssub_2 |
| 13013 | 0, // ssub_3 |
| 13014 | 66, // ssub_4 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 13015 | 66, // ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 13016 | 0, // ssub_6 |
| 13017 | 0, // ssub_7 |
| 13018 | 0, // ssub_8 |
| 13019 | 0, // ssub_9 |
| 13020 | 0, // ssub_10 |
| 13021 | 0, // ssub_11 |
| 13022 | 0, // ssub_12 |
| 13023 | 0, // ssub_13 |
| 13024 | 0, // ssub_14 |
| 13025 | 0, // ssub_15 |
| 13026 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13027 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13028 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13029 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13030 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13031 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13032 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13033 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13034 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13035 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13036 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13037 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13038 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13039 | 0, // ssub_6_ssub_7_dsub_5 |
| 13040 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13041 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13042 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13043 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13044 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13045 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13046 | 0, // dsub_5_dsub_7 |
| 13047 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13048 | 0, // dsub_5_ssub_12_ssub_13 |
| 13049 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13050 | }, |
| 13051 | { // DPairSpc_with_dsub_2_in_DPR_8 |
| 13052 | 67, // dsub_0 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13053 | 0, // dsub_1 |
| 13054 | 67, // dsub_2 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13055 | 0, // dsub_3 |
| 13056 | 0, // dsub_4 |
| 13057 | 0, // dsub_5 |
| 13058 | 0, // dsub_6 |
| 13059 | 0, // dsub_7 |
| 13060 | 0, // gsub_0 |
| 13061 | 0, // gsub_1 |
| 13062 | 0, // qqsub_0 |
| 13063 | 0, // qqsub_1 |
| 13064 | 0, // qsub_0 |
| 13065 | 0, // qsub_1 |
| 13066 | 0, // qsub_2 |
| 13067 | 0, // qsub_3 |
| 13068 | 67, // ssub_0 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13069 | 67, // ssub_1 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13070 | 0, // ssub_2 |
| 13071 | 0, // ssub_3 |
| 13072 | 67, // ssub_4 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13073 | 67, // ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 13074 | 0, // ssub_6 |
| 13075 | 0, // ssub_7 |
| 13076 | 0, // ssub_8 |
| 13077 | 0, // ssub_9 |
| 13078 | 0, // ssub_10 |
| 13079 | 0, // ssub_11 |
| 13080 | 0, // ssub_12 |
| 13081 | 0, // ssub_13 |
| 13082 | 0, // ssub_14 |
| 13083 | 0, // ssub_15 |
| 13084 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13085 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13086 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13087 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13088 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13089 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13090 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13091 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13092 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13093 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13094 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13095 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13096 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13097 | 0, // ssub_6_ssub_7_dsub_5 |
| 13098 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13099 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13100 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13101 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13102 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13103 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13104 | 0, // dsub_5_dsub_7 |
| 13105 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13106 | 0, // dsub_5_ssub_12_ssub_13 |
| 13107 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13108 | }, |
| 13109 | { // DPair |
| 13110 | 68, // dsub_0 -> DPair |
| 13111 | 68, // dsub_1 -> DPair |
| 13112 | 0, // dsub_2 |
| 13113 | 0, // dsub_3 |
| 13114 | 0, // dsub_4 |
| 13115 | 0, // dsub_5 |
| 13116 | 0, // dsub_6 |
| 13117 | 0, // dsub_7 |
| 13118 | 0, // gsub_0 |
| 13119 | 0, // gsub_1 |
| 13120 | 0, // qqsub_0 |
| 13121 | 0, // qqsub_1 |
| 13122 | 0, // qsub_0 |
| 13123 | 0, // qsub_1 |
| 13124 | 0, // qsub_2 |
| 13125 | 0, // qsub_3 |
| 13126 | 69, // ssub_0 -> DPair_with_ssub_0 |
| 13127 | 69, // ssub_1 -> DPair_with_ssub_0 |
| 13128 | 71, // ssub_2 -> DPair_with_ssub_2 |
| 13129 | 71, // ssub_3 -> DPair_with_ssub_2 |
| 13130 | 0, // ssub_4 |
| 13131 | 0, // ssub_5 |
| 13132 | 0, // ssub_6 |
| 13133 | 0, // ssub_7 |
| 13134 | 0, // ssub_8 |
| 13135 | 0, // ssub_9 |
| 13136 | 0, // ssub_10 |
| 13137 | 0, // ssub_11 |
| 13138 | 0, // ssub_12 |
| 13139 | 0, // ssub_13 |
| 13140 | 0, // ssub_14 |
| 13141 | 0, // ssub_15 |
| 13142 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13143 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13144 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13145 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13146 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13147 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13148 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13149 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13150 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13151 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13152 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13153 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13154 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13155 | 0, // ssub_6_ssub_7_dsub_5 |
| 13156 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13157 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13158 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13159 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13160 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13161 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13162 | 0, // dsub_5_dsub_7 |
| 13163 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13164 | 0, // dsub_5_ssub_12_ssub_13 |
| 13165 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13166 | }, |
| 13167 | { // DPair_with_ssub_0 |
| 13168 | 69, // dsub_0 -> DPair_with_ssub_0 |
| 13169 | 69, // dsub_1 -> DPair_with_ssub_0 |
| 13170 | 0, // dsub_2 |
| 13171 | 0, // dsub_3 |
| 13172 | 0, // dsub_4 |
| 13173 | 0, // dsub_5 |
| 13174 | 0, // dsub_6 |
| 13175 | 0, // dsub_7 |
| 13176 | 0, // gsub_0 |
| 13177 | 0, // gsub_1 |
| 13178 | 0, // qqsub_0 |
| 13179 | 0, // qqsub_1 |
| 13180 | 0, // qsub_0 |
| 13181 | 0, // qsub_1 |
| 13182 | 0, // qsub_2 |
| 13183 | 0, // qsub_3 |
| 13184 | 69, // ssub_0 -> DPair_with_ssub_0 |
| 13185 | 69, // ssub_1 -> DPair_with_ssub_0 |
| 13186 | 71, // ssub_2 -> DPair_with_ssub_2 |
| 13187 | 71, // ssub_3 -> DPair_with_ssub_2 |
| 13188 | 0, // ssub_4 |
| 13189 | 0, // ssub_5 |
| 13190 | 0, // ssub_6 |
| 13191 | 0, // ssub_7 |
| 13192 | 0, // ssub_8 |
| 13193 | 0, // ssub_9 |
| 13194 | 0, // ssub_10 |
| 13195 | 0, // ssub_11 |
| 13196 | 0, // ssub_12 |
| 13197 | 0, // ssub_13 |
| 13198 | 0, // ssub_14 |
| 13199 | 0, // ssub_15 |
| 13200 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13201 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13202 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13203 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13204 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13205 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13206 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13207 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13208 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13209 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13210 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13211 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13212 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13213 | 0, // ssub_6_ssub_7_dsub_5 |
| 13214 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13215 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13216 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13217 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13218 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13219 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13220 | 0, // dsub_5_dsub_7 |
| 13221 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13222 | 0, // dsub_5_ssub_12_ssub_13 |
| 13223 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13224 | }, |
| 13225 | { // QPR |
| 13226 | 70, // dsub_0 -> QPR |
| 13227 | 70, // dsub_1 -> QPR |
| 13228 | 0, // dsub_2 |
| 13229 | 0, // dsub_3 |
| 13230 | 0, // dsub_4 |
| 13231 | 0, // dsub_5 |
| 13232 | 0, // dsub_6 |
| 13233 | 0, // dsub_7 |
| 13234 | 0, // gsub_0 |
| 13235 | 0, // gsub_1 |
| 13236 | 0, // qqsub_0 |
| 13237 | 0, // qqsub_1 |
| 13238 | 0, // qsub_0 |
| 13239 | 0, // qsub_1 |
| 13240 | 0, // qsub_2 |
| 13241 | 0, // qsub_3 |
| 13242 | 73, // ssub_0 -> MQPR |
| 13243 | 73, // ssub_1 -> MQPR |
| 13244 | 73, // ssub_2 -> MQPR |
| 13245 | 73, // ssub_3 -> MQPR |
| 13246 | 0, // ssub_4 |
| 13247 | 0, // ssub_5 |
| 13248 | 0, // ssub_6 |
| 13249 | 0, // ssub_7 |
| 13250 | 0, // ssub_8 |
| 13251 | 0, // ssub_9 |
| 13252 | 0, // ssub_10 |
| 13253 | 0, // ssub_11 |
| 13254 | 0, // ssub_12 |
| 13255 | 0, // ssub_13 |
| 13256 | 0, // ssub_14 |
| 13257 | 0, // ssub_15 |
| 13258 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13259 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13260 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13261 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13262 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13263 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13264 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13265 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13266 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13267 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13268 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13269 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13270 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13271 | 0, // ssub_6_ssub_7_dsub_5 |
| 13272 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13273 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13274 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13275 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13276 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13277 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13278 | 0, // dsub_5_dsub_7 |
| 13279 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13280 | 0, // dsub_5_ssub_12_ssub_13 |
| 13281 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13282 | }, |
| 13283 | { // DPair_with_ssub_2 |
| 13284 | 71, // dsub_0 -> DPair_with_ssub_2 |
| 13285 | 71, // dsub_1 -> DPair_with_ssub_2 |
| 13286 | 0, // dsub_2 |
| 13287 | 0, // dsub_3 |
| 13288 | 0, // dsub_4 |
| 13289 | 0, // dsub_5 |
| 13290 | 0, // dsub_6 |
| 13291 | 0, // dsub_7 |
| 13292 | 0, // gsub_0 |
| 13293 | 0, // gsub_1 |
| 13294 | 0, // qqsub_0 |
| 13295 | 0, // qqsub_1 |
| 13296 | 0, // qsub_0 |
| 13297 | 0, // qsub_1 |
| 13298 | 0, // qsub_2 |
| 13299 | 0, // qsub_3 |
| 13300 | 71, // ssub_0 -> DPair_with_ssub_2 |
| 13301 | 71, // ssub_1 -> DPair_with_ssub_2 |
| 13302 | 71, // ssub_2 -> DPair_with_ssub_2 |
| 13303 | 71, // ssub_3 -> DPair_with_ssub_2 |
| 13304 | 0, // ssub_4 |
| 13305 | 0, // ssub_5 |
| 13306 | 0, // ssub_6 |
| 13307 | 0, // ssub_7 |
| 13308 | 0, // ssub_8 |
| 13309 | 0, // ssub_9 |
| 13310 | 0, // ssub_10 |
| 13311 | 0, // ssub_11 |
| 13312 | 0, // ssub_12 |
| 13313 | 0, // ssub_13 |
| 13314 | 0, // ssub_14 |
| 13315 | 0, // ssub_15 |
| 13316 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13317 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13318 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13319 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13320 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13321 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13322 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13323 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13324 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13325 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13326 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13327 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13328 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13329 | 0, // ssub_6_ssub_7_dsub_5 |
| 13330 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13331 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13332 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13333 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13334 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13335 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13336 | 0, // dsub_5_dsub_7 |
| 13337 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13338 | 0, // dsub_5_ssub_12_ssub_13 |
| 13339 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13340 | }, |
| 13341 | { // DPair_with_dsub_0_in_DPR_8 |
| 13342 | 72, // dsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 13343 | 72, // dsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 13344 | 0, // dsub_2 |
| 13345 | 0, // dsub_3 |
| 13346 | 0, // dsub_4 |
| 13347 | 0, // dsub_5 |
| 13348 | 0, // dsub_6 |
| 13349 | 0, // dsub_7 |
| 13350 | 0, // gsub_0 |
| 13351 | 0, // gsub_1 |
| 13352 | 0, // qqsub_0 |
| 13353 | 0, // qqsub_1 |
| 13354 | 0, // qsub_0 |
| 13355 | 0, // qsub_1 |
| 13356 | 0, // qsub_2 |
| 13357 | 0, // qsub_3 |
| 13358 | 72, // ssub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 13359 | 72, // ssub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 13360 | 72, // ssub_2 -> DPair_with_dsub_0_in_DPR_8 |
| 13361 | 72, // ssub_3 -> DPair_with_dsub_0_in_DPR_8 |
| 13362 | 0, // ssub_4 |
| 13363 | 0, // ssub_5 |
| 13364 | 0, // ssub_6 |
| 13365 | 0, // ssub_7 |
| 13366 | 0, // ssub_8 |
| 13367 | 0, // ssub_9 |
| 13368 | 0, // ssub_10 |
| 13369 | 0, // ssub_11 |
| 13370 | 0, // ssub_12 |
| 13371 | 0, // ssub_13 |
| 13372 | 0, // ssub_14 |
| 13373 | 0, // ssub_15 |
| 13374 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13375 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13376 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13377 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13378 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13379 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13380 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13381 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13382 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13383 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13384 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13385 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13386 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13387 | 0, // ssub_6_ssub_7_dsub_5 |
| 13388 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13389 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13390 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13391 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13392 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13393 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13394 | 0, // dsub_5_dsub_7 |
| 13395 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13396 | 0, // dsub_5_ssub_12_ssub_13 |
| 13397 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13398 | }, |
| 13399 | { // MQPR |
| 13400 | 73, // dsub_0 -> MQPR |
| 13401 | 73, // dsub_1 -> MQPR |
| 13402 | 0, // dsub_2 |
| 13403 | 0, // dsub_3 |
| 13404 | 0, // dsub_4 |
| 13405 | 0, // dsub_5 |
| 13406 | 0, // dsub_6 |
| 13407 | 0, // dsub_7 |
| 13408 | 0, // gsub_0 |
| 13409 | 0, // gsub_1 |
| 13410 | 0, // qqsub_0 |
| 13411 | 0, // qqsub_1 |
| 13412 | 0, // qsub_0 |
| 13413 | 0, // qsub_1 |
| 13414 | 0, // qsub_2 |
| 13415 | 0, // qsub_3 |
| 13416 | 73, // ssub_0 -> MQPR |
| 13417 | 73, // ssub_1 -> MQPR |
| 13418 | 73, // ssub_2 -> MQPR |
| 13419 | 73, // ssub_3 -> MQPR |
| 13420 | 0, // ssub_4 |
| 13421 | 0, // ssub_5 |
| 13422 | 0, // ssub_6 |
| 13423 | 0, // ssub_7 |
| 13424 | 0, // ssub_8 |
| 13425 | 0, // ssub_9 |
| 13426 | 0, // ssub_10 |
| 13427 | 0, // ssub_11 |
| 13428 | 0, // ssub_12 |
| 13429 | 0, // ssub_13 |
| 13430 | 0, // ssub_14 |
| 13431 | 0, // ssub_15 |
| 13432 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13433 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13434 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13435 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13436 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13437 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13438 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13439 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13440 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13441 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13442 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13443 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13444 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13445 | 0, // ssub_6_ssub_7_dsub_5 |
| 13446 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13447 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13448 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13449 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13450 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13451 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13452 | 0, // dsub_5_dsub_7 |
| 13453 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13454 | 0, // dsub_5_ssub_12_ssub_13 |
| 13455 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13456 | }, |
| 13457 | { // QPR_VFP2 |
| 13458 | 74, // dsub_0 -> QPR_VFP2 |
| 13459 | 74, // dsub_1 -> QPR_VFP2 |
| 13460 | 0, // dsub_2 |
| 13461 | 0, // dsub_3 |
| 13462 | 0, // dsub_4 |
| 13463 | 0, // dsub_5 |
| 13464 | 0, // dsub_6 |
| 13465 | 0, // dsub_7 |
| 13466 | 0, // gsub_0 |
| 13467 | 0, // gsub_1 |
| 13468 | 0, // qqsub_0 |
| 13469 | 0, // qqsub_1 |
| 13470 | 0, // qsub_0 |
| 13471 | 0, // qsub_1 |
| 13472 | 0, // qsub_2 |
| 13473 | 0, // qsub_3 |
| 13474 | 74, // ssub_0 -> QPR_VFP2 |
| 13475 | 74, // ssub_1 -> QPR_VFP2 |
| 13476 | 74, // ssub_2 -> QPR_VFP2 |
| 13477 | 74, // ssub_3 -> QPR_VFP2 |
| 13478 | 0, // ssub_4 |
| 13479 | 0, // ssub_5 |
| 13480 | 0, // ssub_6 |
| 13481 | 0, // ssub_7 |
| 13482 | 0, // ssub_8 |
| 13483 | 0, // ssub_9 |
| 13484 | 0, // ssub_10 |
| 13485 | 0, // ssub_11 |
| 13486 | 0, // ssub_12 |
| 13487 | 0, // ssub_13 |
| 13488 | 0, // ssub_14 |
| 13489 | 0, // ssub_15 |
| 13490 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13491 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13492 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13493 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13494 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13495 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13496 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13497 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13498 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13499 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13500 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13501 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13502 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13503 | 0, // ssub_6_ssub_7_dsub_5 |
| 13504 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13505 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13506 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13507 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13508 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13509 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13510 | 0, // dsub_5_dsub_7 |
| 13511 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13512 | 0, // dsub_5_ssub_12_ssub_13 |
| 13513 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13514 | }, |
| 13515 | { // DPair_with_dsub_1_in_DPR_8 |
| 13516 | 75, // dsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 13517 | 75, // dsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 13518 | 0, // dsub_2 |
| 13519 | 0, // dsub_3 |
| 13520 | 0, // dsub_4 |
| 13521 | 0, // dsub_5 |
| 13522 | 0, // dsub_6 |
| 13523 | 0, // dsub_7 |
| 13524 | 0, // gsub_0 |
| 13525 | 0, // gsub_1 |
| 13526 | 0, // qqsub_0 |
| 13527 | 0, // qqsub_1 |
| 13528 | 0, // qsub_0 |
| 13529 | 0, // qsub_1 |
| 13530 | 0, // qsub_2 |
| 13531 | 0, // qsub_3 |
| 13532 | 75, // ssub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 13533 | 75, // ssub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 13534 | 75, // ssub_2 -> DPair_with_dsub_1_in_DPR_8 |
| 13535 | 75, // ssub_3 -> DPair_with_dsub_1_in_DPR_8 |
| 13536 | 0, // ssub_4 |
| 13537 | 0, // ssub_5 |
| 13538 | 0, // ssub_6 |
| 13539 | 0, // ssub_7 |
| 13540 | 0, // ssub_8 |
| 13541 | 0, // ssub_9 |
| 13542 | 0, // ssub_10 |
| 13543 | 0, // ssub_11 |
| 13544 | 0, // ssub_12 |
| 13545 | 0, // ssub_13 |
| 13546 | 0, // ssub_14 |
| 13547 | 0, // ssub_15 |
| 13548 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13549 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13550 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13551 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13552 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13553 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13554 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13555 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13556 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13557 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13558 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13559 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13560 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13561 | 0, // ssub_6_ssub_7_dsub_5 |
| 13562 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13563 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13564 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13565 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13566 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13567 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13568 | 0, // dsub_5_dsub_7 |
| 13569 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13570 | 0, // dsub_5_ssub_12_ssub_13 |
| 13571 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13572 | }, |
| 13573 | { // QPR_8 |
| 13574 | 76, // dsub_0 -> QPR_8 |
| 13575 | 76, // dsub_1 -> QPR_8 |
| 13576 | 0, // dsub_2 |
| 13577 | 0, // dsub_3 |
| 13578 | 0, // dsub_4 |
| 13579 | 0, // dsub_5 |
| 13580 | 0, // dsub_6 |
| 13581 | 0, // dsub_7 |
| 13582 | 0, // gsub_0 |
| 13583 | 0, // gsub_1 |
| 13584 | 0, // qqsub_0 |
| 13585 | 0, // qqsub_1 |
| 13586 | 0, // qsub_0 |
| 13587 | 0, // qsub_1 |
| 13588 | 0, // qsub_2 |
| 13589 | 0, // qsub_3 |
| 13590 | 76, // ssub_0 -> QPR_8 |
| 13591 | 76, // ssub_1 -> QPR_8 |
| 13592 | 76, // ssub_2 -> QPR_8 |
| 13593 | 76, // ssub_3 -> QPR_8 |
| 13594 | 0, // ssub_4 |
| 13595 | 0, // ssub_5 |
| 13596 | 0, // ssub_6 |
| 13597 | 0, // ssub_7 |
| 13598 | 0, // ssub_8 |
| 13599 | 0, // ssub_9 |
| 13600 | 0, // ssub_10 |
| 13601 | 0, // ssub_11 |
| 13602 | 0, // ssub_12 |
| 13603 | 0, // ssub_13 |
| 13604 | 0, // ssub_14 |
| 13605 | 0, // ssub_15 |
| 13606 | 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 13607 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13608 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13609 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13610 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13611 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13612 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13613 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13614 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13615 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13616 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13617 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13618 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13619 | 0, // ssub_6_ssub_7_dsub_5 |
| 13620 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13621 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13622 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13623 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13624 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13625 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13626 | 0, // dsub_5_dsub_7 |
| 13627 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13628 | 0, // dsub_5_ssub_12_ssub_13 |
| 13629 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13630 | }, |
| 13631 | { // DTriple |
| 13632 | 77, // dsub_0 -> DTriple |
| 13633 | 77, // dsub_1 -> DTriple |
| 13634 | 77, // dsub_2 -> DTriple |
| 13635 | 0, // dsub_3 |
| 13636 | 0, // dsub_4 |
| 13637 | 0, // dsub_5 |
| 13638 | 0, // dsub_6 |
| 13639 | 0, // dsub_7 |
| 13640 | 0, // gsub_0 |
| 13641 | 0, // gsub_1 |
| 13642 | 0, // qqsub_0 |
| 13643 | 0, // qqsub_1 |
| 13644 | 77, // qsub_0 -> DTriple |
| 13645 | 0, // qsub_1 |
| 13646 | 0, // qsub_2 |
| 13647 | 0, // qsub_3 |
| 13648 | 80, // ssub_0 -> DTriple_with_ssub_0 |
| 13649 | 80, // ssub_1 -> DTriple_with_ssub_0 |
| 13650 | 82, // ssub_2 -> DTriple_with_ssub_2 |
| 13651 | 82, // ssub_3 -> DTriple_with_ssub_2 |
| 13652 | 85, // ssub_4 -> DTriple_with_ssub_4 |
| 13653 | 85, // ssub_5 -> DTriple_with_ssub_4 |
| 13654 | 0, // ssub_6 |
| 13655 | 0, // ssub_7 |
| 13656 | 0, // ssub_8 |
| 13657 | 0, // ssub_9 |
| 13658 | 0, // ssub_10 |
| 13659 | 0, // ssub_11 |
| 13660 | 0, // ssub_12 |
| 13661 | 0, // ssub_13 |
| 13662 | 0, // ssub_14 |
| 13663 | 0, // ssub_15 |
| 13664 | 77, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple |
| 13665 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13666 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13667 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13668 | 77, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple |
| 13669 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13670 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13671 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13672 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13673 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13674 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13675 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13676 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13677 | 0, // ssub_6_ssub_7_dsub_5 |
| 13678 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13679 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13680 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13681 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13682 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13683 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13684 | 0, // dsub_5_dsub_7 |
| 13685 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13686 | 0, // dsub_5_ssub_12_ssub_13 |
| 13687 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13688 | }, |
| 13689 | { // DTripleSpc |
| 13690 | 78, // dsub_0 -> DTripleSpc |
| 13691 | 0, // dsub_1 |
| 13692 | 78, // dsub_2 -> DTripleSpc |
| 13693 | 0, // dsub_3 |
| 13694 | 78, // dsub_4 -> DTripleSpc |
| 13695 | 0, // dsub_5 |
| 13696 | 0, // dsub_6 |
| 13697 | 0, // dsub_7 |
| 13698 | 0, // gsub_0 |
| 13699 | 0, // gsub_1 |
| 13700 | 0, // qqsub_0 |
| 13701 | 0, // qqsub_1 |
| 13702 | 0, // qsub_0 |
| 13703 | 0, // qsub_1 |
| 13704 | 0, // qsub_2 |
| 13705 | 0, // qsub_3 |
| 13706 | 79, // ssub_0 -> DTripleSpc_with_ssub_0 |
| 13707 | 79, // ssub_1 -> DTripleSpc_with_ssub_0 |
| 13708 | 0, // ssub_2 |
| 13709 | 0, // ssub_3 |
| 13710 | 84, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 13711 | 84, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 13712 | 0, // ssub_6 |
| 13713 | 0, // ssub_7 |
| 13714 | 86, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 13715 | 86, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 13716 | 0, // ssub_10 |
| 13717 | 0, // ssub_11 |
| 13718 | 0, // ssub_12 |
| 13719 | 0, // ssub_13 |
| 13720 | 0, // ssub_14 |
| 13721 | 0, // ssub_15 |
| 13722 | 78, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc |
| 13723 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13724 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13725 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13726 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13727 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13728 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13729 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13730 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13731 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13732 | 78, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc |
| 13733 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13734 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13735 | 0, // ssub_6_ssub_7_dsub_5 |
| 13736 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13737 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13738 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13739 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13740 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13741 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13742 | 0, // dsub_5_dsub_7 |
| 13743 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13744 | 0, // dsub_5_ssub_12_ssub_13 |
| 13745 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13746 | }, |
| 13747 | { // DTripleSpc_with_ssub_0 |
| 13748 | 79, // dsub_0 -> DTripleSpc_with_ssub_0 |
| 13749 | 0, // dsub_1 |
| 13750 | 79, // dsub_2 -> DTripleSpc_with_ssub_0 |
| 13751 | 0, // dsub_3 |
| 13752 | 79, // dsub_4 -> DTripleSpc_with_ssub_0 |
| 13753 | 0, // dsub_5 |
| 13754 | 0, // dsub_6 |
| 13755 | 0, // dsub_7 |
| 13756 | 0, // gsub_0 |
| 13757 | 0, // gsub_1 |
| 13758 | 0, // qqsub_0 |
| 13759 | 0, // qqsub_1 |
| 13760 | 0, // qsub_0 |
| 13761 | 0, // qsub_1 |
| 13762 | 0, // qsub_2 |
| 13763 | 0, // qsub_3 |
| 13764 | 79, // ssub_0 -> DTripleSpc_with_ssub_0 |
| 13765 | 79, // ssub_1 -> DTripleSpc_with_ssub_0 |
| 13766 | 0, // ssub_2 |
| 13767 | 0, // ssub_3 |
| 13768 | 84, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 13769 | 84, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 13770 | 0, // ssub_6 |
| 13771 | 0, // ssub_7 |
| 13772 | 86, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 13773 | 86, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 13774 | 0, // ssub_10 |
| 13775 | 0, // ssub_11 |
| 13776 | 0, // ssub_12 |
| 13777 | 0, // ssub_13 |
| 13778 | 0, // ssub_14 |
| 13779 | 0, // ssub_15 |
| 13780 | 79, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_0 |
| 13781 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13782 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13783 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13784 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 13785 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13786 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13787 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13788 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13789 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13790 | 79, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_0 |
| 13791 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13792 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13793 | 0, // ssub_6_ssub_7_dsub_5 |
| 13794 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13795 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13796 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13797 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13798 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13799 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13800 | 0, // dsub_5_dsub_7 |
| 13801 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13802 | 0, // dsub_5_ssub_12_ssub_13 |
| 13803 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13804 | }, |
| 13805 | { // DTriple_with_ssub_0 |
| 13806 | 80, // dsub_0 -> DTriple_with_ssub_0 |
| 13807 | 80, // dsub_1 -> DTriple_with_ssub_0 |
| 13808 | 80, // dsub_2 -> DTriple_with_ssub_0 |
| 13809 | 0, // dsub_3 |
| 13810 | 0, // dsub_4 |
| 13811 | 0, // dsub_5 |
| 13812 | 0, // dsub_6 |
| 13813 | 0, // dsub_7 |
| 13814 | 0, // gsub_0 |
| 13815 | 0, // gsub_1 |
| 13816 | 0, // qqsub_0 |
| 13817 | 0, // qqsub_1 |
| 13818 | 80, // qsub_0 -> DTriple_with_ssub_0 |
| 13819 | 0, // qsub_1 |
| 13820 | 0, // qsub_2 |
| 13821 | 0, // qsub_3 |
| 13822 | 80, // ssub_0 -> DTriple_with_ssub_0 |
| 13823 | 80, // ssub_1 -> DTriple_with_ssub_0 |
| 13824 | 82, // ssub_2 -> DTriple_with_ssub_2 |
| 13825 | 82, // ssub_3 -> DTriple_with_ssub_2 |
| 13826 | 85, // ssub_4 -> DTriple_with_ssub_4 |
| 13827 | 85, // ssub_5 -> DTriple_with_ssub_4 |
| 13828 | 0, // ssub_6 |
| 13829 | 0, // ssub_7 |
| 13830 | 0, // ssub_8 |
| 13831 | 0, // ssub_9 |
| 13832 | 0, // ssub_10 |
| 13833 | 0, // ssub_11 |
| 13834 | 0, // ssub_12 |
| 13835 | 0, // ssub_13 |
| 13836 | 0, // ssub_14 |
| 13837 | 0, // ssub_15 |
| 13838 | 80, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 13839 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13840 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13841 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13842 | 80, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 13843 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13844 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13845 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13846 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13847 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13848 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13849 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13850 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13851 | 0, // ssub_6_ssub_7_dsub_5 |
| 13852 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13853 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13854 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13855 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13856 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13857 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13858 | 0, // dsub_5_dsub_7 |
| 13859 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13860 | 0, // dsub_5_ssub_12_ssub_13 |
| 13861 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13862 | }, |
| 13863 | { // DTriple_with_qsub_0_in_QPR |
| 13864 | 81, // dsub_0 -> DTriple_with_qsub_0_in_QPR |
| 13865 | 81, // dsub_1 -> DTriple_with_qsub_0_in_QPR |
| 13866 | 81, // dsub_2 -> DTriple_with_qsub_0_in_QPR |
| 13867 | 0, // dsub_3 |
| 13868 | 0, // dsub_4 |
| 13869 | 0, // dsub_5 |
| 13870 | 0, // dsub_6 |
| 13871 | 0, // dsub_7 |
| 13872 | 0, // gsub_0 |
| 13873 | 0, // gsub_1 |
| 13874 | 0, // qqsub_0 |
| 13875 | 0, // qqsub_1 |
| 13876 | 81, // qsub_0 -> DTriple_with_qsub_0_in_QPR |
| 13877 | 0, // qsub_1 |
| 13878 | 0, // qsub_2 |
| 13879 | 0, // qsub_3 |
| 13880 | 89, // ssub_0 -> DTriple_with_qsub_0_in_MQPR |
| 13881 | 89, // ssub_1 -> DTriple_with_qsub_0_in_MQPR |
| 13882 | 89, // ssub_2 -> DTriple_with_qsub_0_in_MQPR |
| 13883 | 89, // ssub_3 -> DTriple_with_qsub_0_in_MQPR |
| 13884 | 93, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 13885 | 93, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 13886 | 0, // ssub_6 |
| 13887 | 0, // ssub_7 |
| 13888 | 0, // ssub_8 |
| 13889 | 0, // ssub_9 |
| 13890 | 0, // ssub_10 |
| 13891 | 0, // ssub_11 |
| 13892 | 0, // ssub_12 |
| 13893 | 0, // ssub_13 |
| 13894 | 0, // ssub_14 |
| 13895 | 0, // ssub_15 |
| 13896 | 81, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 13897 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13898 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13899 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13900 | 81, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 13901 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13902 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13903 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13904 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13905 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13906 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13907 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13908 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13909 | 0, // ssub_6_ssub_7_dsub_5 |
| 13910 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13911 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13912 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13913 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13914 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13915 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13916 | 0, // dsub_5_dsub_7 |
| 13917 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13918 | 0, // dsub_5_ssub_12_ssub_13 |
| 13919 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13920 | }, |
| 13921 | { // DTriple_with_ssub_2 |
| 13922 | 82, // dsub_0 -> DTriple_with_ssub_2 |
| 13923 | 82, // dsub_1 -> DTriple_with_ssub_2 |
| 13924 | 82, // dsub_2 -> DTriple_with_ssub_2 |
| 13925 | 0, // dsub_3 |
| 13926 | 0, // dsub_4 |
| 13927 | 0, // dsub_5 |
| 13928 | 0, // dsub_6 |
| 13929 | 0, // dsub_7 |
| 13930 | 0, // gsub_0 |
| 13931 | 0, // gsub_1 |
| 13932 | 0, // qqsub_0 |
| 13933 | 0, // qqsub_1 |
| 13934 | 82, // qsub_0 -> DTriple_with_ssub_2 |
| 13935 | 0, // qsub_1 |
| 13936 | 0, // qsub_2 |
| 13937 | 0, // qsub_3 |
| 13938 | 82, // ssub_0 -> DTriple_with_ssub_2 |
| 13939 | 82, // ssub_1 -> DTriple_with_ssub_2 |
| 13940 | 82, // ssub_2 -> DTriple_with_ssub_2 |
| 13941 | 82, // ssub_3 -> DTriple_with_ssub_2 |
| 13942 | 85, // ssub_4 -> DTriple_with_ssub_4 |
| 13943 | 85, // ssub_5 -> DTriple_with_ssub_4 |
| 13944 | 0, // ssub_6 |
| 13945 | 0, // ssub_7 |
| 13946 | 0, // ssub_8 |
| 13947 | 0, // ssub_9 |
| 13948 | 0, // ssub_10 |
| 13949 | 0, // ssub_11 |
| 13950 | 0, // ssub_12 |
| 13951 | 0, // ssub_13 |
| 13952 | 0, // ssub_14 |
| 13953 | 0, // ssub_15 |
| 13954 | 82, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 13955 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 13956 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 13957 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 13958 | 82, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 13959 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 13960 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13961 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 13962 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 13963 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13964 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 13965 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 13966 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 13967 | 0, // ssub_6_ssub_7_dsub_5 |
| 13968 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 13969 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 13970 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 13971 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13972 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 13973 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 13974 | 0, // dsub_5_dsub_7 |
| 13975 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 13976 | 0, // dsub_5_ssub_12_ssub_13 |
| 13977 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 13978 | }, |
| 13979 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13980 | 83, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13981 | 83, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13982 | 83, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13983 | 0, // dsub_3 |
| 13984 | 0, // dsub_4 |
| 13985 | 0, // dsub_5 |
| 13986 | 0, // dsub_6 |
| 13987 | 0, // dsub_7 |
| 13988 | 0, // gsub_0 |
| 13989 | 0, // gsub_1 |
| 13990 | 0, // qqsub_0 |
| 13991 | 0, // qqsub_1 |
| 13992 | 83, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13993 | 0, // qsub_1 |
| 13994 | 0, // qsub_2 |
| 13995 | 0, // qsub_3 |
| 13996 | 90, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13997 | 90, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 13998 | 92, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 13999 | 92, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14000 | 92, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14001 | 92, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14002 | 0, // ssub_6 |
| 14003 | 0, // ssub_7 |
| 14004 | 0, // ssub_8 |
| 14005 | 0, // ssub_9 |
| 14006 | 0, // ssub_10 |
| 14007 | 0, // ssub_11 |
| 14008 | 0, // ssub_12 |
| 14009 | 0, // ssub_13 |
| 14010 | 0, // ssub_14 |
| 14011 | 0, // ssub_15 |
| 14012 | 83, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14013 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14014 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14015 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14016 | 83, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14017 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14018 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14019 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14020 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14021 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14022 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14023 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14024 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14025 | 0, // ssub_6_ssub_7_dsub_5 |
| 14026 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14027 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14028 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14029 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14030 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14031 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14032 | 0, // dsub_5_dsub_7 |
| 14033 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14034 | 0, // dsub_5_ssub_12_ssub_13 |
| 14035 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14036 | }, |
| 14037 | { // DTripleSpc_with_ssub_4 |
| 14038 | 84, // dsub_0 -> DTripleSpc_with_ssub_4 |
| 14039 | 0, // dsub_1 |
| 14040 | 84, // dsub_2 -> DTripleSpc_with_ssub_4 |
| 14041 | 0, // dsub_3 |
| 14042 | 84, // dsub_4 -> DTripleSpc_with_ssub_4 |
| 14043 | 0, // dsub_5 |
| 14044 | 0, // dsub_6 |
| 14045 | 0, // dsub_7 |
| 14046 | 0, // gsub_0 |
| 14047 | 0, // gsub_1 |
| 14048 | 0, // qqsub_0 |
| 14049 | 0, // qqsub_1 |
| 14050 | 0, // qsub_0 |
| 14051 | 0, // qsub_1 |
| 14052 | 0, // qsub_2 |
| 14053 | 0, // qsub_3 |
| 14054 | 84, // ssub_0 -> DTripleSpc_with_ssub_4 |
| 14055 | 84, // ssub_1 -> DTripleSpc_with_ssub_4 |
| 14056 | 0, // ssub_2 |
| 14057 | 0, // ssub_3 |
| 14058 | 84, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 14059 | 84, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 14060 | 0, // ssub_6 |
| 14061 | 0, // ssub_7 |
| 14062 | 86, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 14063 | 86, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 14064 | 0, // ssub_10 |
| 14065 | 0, // ssub_11 |
| 14066 | 0, // ssub_12 |
| 14067 | 0, // ssub_13 |
| 14068 | 0, // ssub_14 |
| 14069 | 0, // ssub_15 |
| 14070 | 84, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_4 |
| 14071 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14072 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14073 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14074 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 14075 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14076 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14077 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14078 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14079 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14080 | 84, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_4 |
| 14081 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14082 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14083 | 0, // ssub_6_ssub_7_dsub_5 |
| 14084 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14085 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14086 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14087 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14088 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14089 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14090 | 0, // dsub_5_dsub_7 |
| 14091 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14092 | 0, // dsub_5_ssub_12_ssub_13 |
| 14093 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14094 | }, |
| 14095 | { // DTriple_with_ssub_4 |
| 14096 | 85, // dsub_0 -> DTriple_with_ssub_4 |
| 14097 | 85, // dsub_1 -> DTriple_with_ssub_4 |
| 14098 | 85, // dsub_2 -> DTriple_with_ssub_4 |
| 14099 | 0, // dsub_3 |
| 14100 | 0, // dsub_4 |
| 14101 | 0, // dsub_5 |
| 14102 | 0, // dsub_6 |
| 14103 | 0, // dsub_7 |
| 14104 | 0, // gsub_0 |
| 14105 | 0, // gsub_1 |
| 14106 | 0, // qqsub_0 |
| 14107 | 0, // qqsub_1 |
| 14108 | 85, // qsub_0 -> DTriple_with_ssub_4 |
| 14109 | 0, // qsub_1 |
| 14110 | 0, // qsub_2 |
| 14111 | 0, // qsub_3 |
| 14112 | 85, // ssub_0 -> DTriple_with_ssub_4 |
| 14113 | 85, // ssub_1 -> DTriple_with_ssub_4 |
| 14114 | 85, // ssub_2 -> DTriple_with_ssub_4 |
| 14115 | 85, // ssub_3 -> DTriple_with_ssub_4 |
| 14116 | 85, // ssub_4 -> DTriple_with_ssub_4 |
| 14117 | 85, // ssub_5 -> DTriple_with_ssub_4 |
| 14118 | 0, // ssub_6 |
| 14119 | 0, // ssub_7 |
| 14120 | 0, // ssub_8 |
| 14121 | 0, // ssub_9 |
| 14122 | 0, // ssub_10 |
| 14123 | 0, // ssub_11 |
| 14124 | 0, // ssub_12 |
| 14125 | 0, // ssub_13 |
| 14126 | 0, // ssub_14 |
| 14127 | 0, // ssub_15 |
| 14128 | 85, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 14129 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14130 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14131 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14132 | 85, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 14133 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14134 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14135 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14136 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14137 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14138 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14139 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14140 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14141 | 0, // ssub_6_ssub_7_dsub_5 |
| 14142 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14143 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14144 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14145 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14146 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14147 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14148 | 0, // dsub_5_dsub_7 |
| 14149 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14150 | 0, // dsub_5_ssub_12_ssub_13 |
| 14151 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14152 | }, |
| 14153 | { // DTripleSpc_with_ssub_8 |
| 14154 | 86, // dsub_0 -> DTripleSpc_with_ssub_8 |
| 14155 | 0, // dsub_1 |
| 14156 | 86, // dsub_2 -> DTripleSpc_with_ssub_8 |
| 14157 | 0, // dsub_3 |
| 14158 | 86, // dsub_4 -> DTripleSpc_with_ssub_8 |
| 14159 | 0, // dsub_5 |
| 14160 | 0, // dsub_6 |
| 14161 | 0, // dsub_7 |
| 14162 | 0, // gsub_0 |
| 14163 | 0, // gsub_1 |
| 14164 | 0, // qqsub_0 |
| 14165 | 0, // qqsub_1 |
| 14166 | 0, // qsub_0 |
| 14167 | 0, // qsub_1 |
| 14168 | 0, // qsub_2 |
| 14169 | 0, // qsub_3 |
| 14170 | 86, // ssub_0 -> DTripleSpc_with_ssub_8 |
| 14171 | 86, // ssub_1 -> DTripleSpc_with_ssub_8 |
| 14172 | 0, // ssub_2 |
| 14173 | 0, // ssub_3 |
| 14174 | 86, // ssub_4 -> DTripleSpc_with_ssub_8 |
| 14175 | 86, // ssub_5 -> DTripleSpc_with_ssub_8 |
| 14176 | 0, // ssub_6 |
| 14177 | 0, // ssub_7 |
| 14178 | 86, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 14179 | 86, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 14180 | 0, // ssub_10 |
| 14181 | 0, // ssub_11 |
| 14182 | 0, // ssub_12 |
| 14183 | 0, // ssub_13 |
| 14184 | 0, // ssub_14 |
| 14185 | 0, // ssub_15 |
| 14186 | 86, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_8 |
| 14187 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14188 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14189 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14190 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 14191 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14192 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14193 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14194 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14195 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14196 | 86, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_8 |
| 14197 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14198 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14199 | 0, // ssub_6_ssub_7_dsub_5 |
| 14200 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14201 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14202 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14203 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14204 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14205 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14206 | 0, // dsub_5_dsub_7 |
| 14207 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14208 | 0, // dsub_5_ssub_12_ssub_13 |
| 14209 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14210 | }, |
| 14211 | { // DTripleSpc_with_dsub_0_in_DPR_8 |
| 14212 | 87, // dsub_0 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14213 | 0, // dsub_1 |
| 14214 | 87, // dsub_2 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14215 | 0, // dsub_3 |
| 14216 | 87, // dsub_4 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14217 | 0, // dsub_5 |
| 14218 | 0, // dsub_6 |
| 14219 | 0, // dsub_7 |
| 14220 | 0, // gsub_0 |
| 14221 | 0, // gsub_1 |
| 14222 | 0, // qqsub_0 |
| 14223 | 0, // qqsub_1 |
| 14224 | 0, // qsub_0 |
| 14225 | 0, // qsub_1 |
| 14226 | 0, // qsub_2 |
| 14227 | 0, // qsub_3 |
| 14228 | 87, // ssub_0 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14229 | 87, // ssub_1 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14230 | 0, // ssub_2 |
| 14231 | 0, // ssub_3 |
| 14232 | 87, // ssub_4 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14233 | 87, // ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14234 | 0, // ssub_6 |
| 14235 | 0, // ssub_7 |
| 14236 | 87, // ssub_8 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14237 | 87, // ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14238 | 0, // ssub_10 |
| 14239 | 0, // ssub_11 |
| 14240 | 0, // ssub_12 |
| 14241 | 0, // ssub_13 |
| 14242 | 0, // ssub_14 |
| 14243 | 0, // ssub_15 |
| 14244 | 87, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14245 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14246 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14247 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14248 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 14249 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14250 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14251 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14252 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14253 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14254 | 87, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 14255 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14256 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14257 | 0, // ssub_6_ssub_7_dsub_5 |
| 14258 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14259 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14260 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14261 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14262 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14263 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14264 | 0, // dsub_5_dsub_7 |
| 14265 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14266 | 0, // dsub_5_ssub_12_ssub_13 |
| 14267 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14268 | }, |
| 14269 | { // DTriple_with_dsub_0_in_DPR_8 |
| 14270 | 88, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 14271 | 88, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8 |
| 14272 | 88, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8 |
| 14273 | 0, // dsub_3 |
| 14274 | 0, // dsub_4 |
| 14275 | 0, // dsub_5 |
| 14276 | 0, // dsub_6 |
| 14277 | 0, // dsub_7 |
| 14278 | 0, // gsub_0 |
| 14279 | 0, // gsub_1 |
| 14280 | 0, // qqsub_0 |
| 14281 | 0, // qqsub_1 |
| 14282 | 88, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 14283 | 0, // qsub_1 |
| 14284 | 0, // qsub_2 |
| 14285 | 0, // qsub_3 |
| 14286 | 88, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 14287 | 88, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8 |
| 14288 | 88, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8 |
| 14289 | 88, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8 |
| 14290 | 88, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8 |
| 14291 | 88, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 14292 | 0, // ssub_6 |
| 14293 | 0, // ssub_7 |
| 14294 | 0, // ssub_8 |
| 14295 | 0, // ssub_9 |
| 14296 | 0, // ssub_10 |
| 14297 | 0, // ssub_11 |
| 14298 | 0, // ssub_12 |
| 14299 | 0, // ssub_13 |
| 14300 | 0, // ssub_14 |
| 14301 | 0, // ssub_15 |
| 14302 | 88, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 14303 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14304 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14305 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14306 | 88, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 14307 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14308 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14309 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14310 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14311 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14312 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14313 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14314 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14315 | 0, // ssub_6_ssub_7_dsub_5 |
| 14316 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14317 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14318 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14319 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14320 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14321 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14322 | 0, // dsub_5_dsub_7 |
| 14323 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14324 | 0, // dsub_5_ssub_12_ssub_13 |
| 14325 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14326 | }, |
| 14327 | { // DTriple_with_qsub_0_in_MQPR |
| 14328 | 89, // dsub_0 -> DTriple_with_qsub_0_in_MQPR |
| 14329 | 89, // dsub_1 -> DTriple_with_qsub_0_in_MQPR |
| 14330 | 89, // dsub_2 -> DTriple_with_qsub_0_in_MQPR |
| 14331 | 0, // dsub_3 |
| 14332 | 0, // dsub_4 |
| 14333 | 0, // dsub_5 |
| 14334 | 0, // dsub_6 |
| 14335 | 0, // dsub_7 |
| 14336 | 0, // gsub_0 |
| 14337 | 0, // gsub_1 |
| 14338 | 0, // qqsub_0 |
| 14339 | 0, // qqsub_1 |
| 14340 | 89, // qsub_0 -> DTriple_with_qsub_0_in_MQPR |
| 14341 | 0, // qsub_1 |
| 14342 | 0, // qsub_2 |
| 14343 | 0, // qsub_3 |
| 14344 | 89, // ssub_0 -> DTriple_with_qsub_0_in_MQPR |
| 14345 | 89, // ssub_1 -> DTriple_with_qsub_0_in_MQPR |
| 14346 | 89, // ssub_2 -> DTriple_with_qsub_0_in_MQPR |
| 14347 | 89, // ssub_3 -> DTriple_with_qsub_0_in_MQPR |
| 14348 | 93, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14349 | 93, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14350 | 0, // ssub_6 |
| 14351 | 0, // ssub_7 |
| 14352 | 0, // ssub_8 |
| 14353 | 0, // ssub_9 |
| 14354 | 0, // ssub_10 |
| 14355 | 0, // ssub_11 |
| 14356 | 0, // ssub_12 |
| 14357 | 0, // ssub_13 |
| 14358 | 0, // ssub_14 |
| 14359 | 0, // ssub_15 |
| 14360 | 89, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 14361 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14362 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14363 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14364 | 89, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 14365 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14366 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14367 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14368 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14369 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14370 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14371 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14372 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14373 | 0, // ssub_6_ssub_7_dsub_5 |
| 14374 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14375 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14376 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14377 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14378 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14379 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14380 | 0, // dsub_5_dsub_7 |
| 14381 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14382 | 0, // dsub_5_ssub_12_ssub_13 |
| 14383 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14384 | }, |
| 14385 | { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14386 | 90, // dsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14387 | 90, // dsub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14388 | 90, // dsub_2 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14389 | 0, // dsub_3 |
| 14390 | 0, // dsub_4 |
| 14391 | 0, // dsub_5 |
| 14392 | 0, // dsub_6 |
| 14393 | 0, // dsub_7 |
| 14394 | 0, // gsub_0 |
| 14395 | 0, // gsub_1 |
| 14396 | 0, // qqsub_0 |
| 14397 | 0, // qqsub_1 |
| 14398 | 90, // qsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14399 | 0, // qsub_1 |
| 14400 | 0, // qsub_2 |
| 14401 | 0, // qsub_3 |
| 14402 | 90, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14403 | 90, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14404 | 92, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14405 | 92, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14406 | 92, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14407 | 92, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14408 | 0, // ssub_6 |
| 14409 | 0, // ssub_7 |
| 14410 | 0, // ssub_8 |
| 14411 | 0, // ssub_9 |
| 14412 | 0, // ssub_10 |
| 14413 | 0, // ssub_11 |
| 14414 | 0, // ssub_12 |
| 14415 | 0, // ssub_13 |
| 14416 | 0, // ssub_14 |
| 14417 | 0, // ssub_15 |
| 14418 | 90, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14419 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14420 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14421 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14422 | 90, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 14423 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14424 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14425 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14426 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14427 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14428 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14429 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14430 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14431 | 0, // ssub_6_ssub_7_dsub_5 |
| 14432 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14433 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14434 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14435 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14436 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14437 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14438 | 0, // dsub_5_dsub_7 |
| 14439 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14440 | 0, // dsub_5_ssub_12_ssub_13 |
| 14441 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14442 | }, |
| 14443 | { // DTriple_with_dsub_1_in_DPR_8 |
| 14444 | 91, // dsub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 14445 | 91, // dsub_1 -> DTriple_with_dsub_1_in_DPR_8 |
| 14446 | 91, // dsub_2 -> DTriple_with_dsub_1_in_DPR_8 |
| 14447 | 0, // dsub_3 |
| 14448 | 0, // dsub_4 |
| 14449 | 0, // dsub_5 |
| 14450 | 0, // dsub_6 |
| 14451 | 0, // dsub_7 |
| 14452 | 0, // gsub_0 |
| 14453 | 0, // gsub_1 |
| 14454 | 0, // qqsub_0 |
| 14455 | 0, // qqsub_1 |
| 14456 | 91, // qsub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 14457 | 0, // qsub_1 |
| 14458 | 0, // qsub_2 |
| 14459 | 0, // qsub_3 |
| 14460 | 91, // ssub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 14461 | 91, // ssub_1 -> DTriple_with_dsub_1_in_DPR_8 |
| 14462 | 91, // ssub_2 -> DTriple_with_dsub_1_in_DPR_8 |
| 14463 | 91, // ssub_3 -> DTriple_with_dsub_1_in_DPR_8 |
| 14464 | 91, // ssub_4 -> DTriple_with_dsub_1_in_DPR_8 |
| 14465 | 91, // ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 14466 | 0, // ssub_6 |
| 14467 | 0, // ssub_7 |
| 14468 | 0, // ssub_8 |
| 14469 | 0, // ssub_9 |
| 14470 | 0, // ssub_10 |
| 14471 | 0, // ssub_11 |
| 14472 | 0, // ssub_12 |
| 14473 | 0, // ssub_13 |
| 14474 | 0, // ssub_14 |
| 14475 | 0, // ssub_15 |
| 14476 | 91, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 14477 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14478 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14479 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14480 | 91, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 14481 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14482 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14483 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14484 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14485 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14486 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14487 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14488 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14489 | 0, // ssub_6_ssub_7_dsub_5 |
| 14490 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14491 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14492 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14493 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14494 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14495 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14496 | 0, // dsub_5_dsub_7 |
| 14497 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14498 | 0, // dsub_5_ssub_12_ssub_13 |
| 14499 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14500 | }, |
| 14501 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14502 | 92, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14503 | 92, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14504 | 92, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14505 | 0, // dsub_3 |
| 14506 | 0, // dsub_4 |
| 14507 | 0, // dsub_5 |
| 14508 | 0, // dsub_6 |
| 14509 | 0, // dsub_7 |
| 14510 | 0, // gsub_0 |
| 14511 | 0, // gsub_1 |
| 14512 | 0, // qqsub_0 |
| 14513 | 0, // qqsub_1 |
| 14514 | 92, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14515 | 0, // qsub_1 |
| 14516 | 0, // qsub_2 |
| 14517 | 0, // qsub_3 |
| 14518 | 92, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14519 | 92, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14520 | 92, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14521 | 92, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14522 | 92, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14523 | 92, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14524 | 0, // ssub_6 |
| 14525 | 0, // ssub_7 |
| 14526 | 0, // ssub_8 |
| 14527 | 0, // ssub_9 |
| 14528 | 0, // ssub_10 |
| 14529 | 0, // ssub_11 |
| 14530 | 0, // ssub_12 |
| 14531 | 0, // ssub_13 |
| 14532 | 0, // ssub_14 |
| 14533 | 0, // ssub_15 |
| 14534 | 92, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14535 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14536 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14537 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14538 | 92, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14539 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14540 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14541 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14542 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14543 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14544 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14545 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14546 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14547 | 0, // ssub_6_ssub_7_dsub_5 |
| 14548 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14549 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14550 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14551 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14552 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14553 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14554 | 0, // dsub_5_dsub_7 |
| 14555 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14556 | 0, // dsub_5_ssub_12_ssub_13 |
| 14557 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14558 | }, |
| 14559 | { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14560 | 93, // dsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14561 | 93, // dsub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14562 | 93, // dsub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14563 | 0, // dsub_3 |
| 14564 | 0, // dsub_4 |
| 14565 | 0, // dsub_5 |
| 14566 | 0, // dsub_6 |
| 14567 | 0, // dsub_7 |
| 14568 | 0, // gsub_0 |
| 14569 | 0, // gsub_1 |
| 14570 | 0, // qqsub_0 |
| 14571 | 0, // qqsub_1 |
| 14572 | 93, // qsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14573 | 0, // qsub_1 |
| 14574 | 0, // qsub_2 |
| 14575 | 0, // qsub_3 |
| 14576 | 93, // ssub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14577 | 93, // ssub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14578 | 93, // ssub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14579 | 93, // ssub_3 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14580 | 93, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14581 | 93, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14582 | 0, // ssub_6 |
| 14583 | 0, // ssub_7 |
| 14584 | 0, // ssub_8 |
| 14585 | 0, // ssub_9 |
| 14586 | 0, // ssub_10 |
| 14587 | 0, // ssub_11 |
| 14588 | 0, // ssub_12 |
| 14589 | 0, // ssub_13 |
| 14590 | 0, // ssub_14 |
| 14591 | 0, // ssub_15 |
| 14592 | 93, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14593 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14594 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14595 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14596 | 93, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 14597 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14598 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14599 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14600 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14601 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14602 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14603 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14604 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14605 | 0, // ssub_6_ssub_7_dsub_5 |
| 14606 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14607 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14608 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14609 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14610 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14611 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14612 | 0, // dsub_5_dsub_7 |
| 14613 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14614 | 0, // dsub_5_ssub_12_ssub_13 |
| 14615 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14616 | }, |
| 14617 | { // DTripleSpc_with_dsub_2_in_DPR_8 |
| 14618 | 94, // dsub_0 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14619 | 0, // dsub_1 |
| 14620 | 94, // dsub_2 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14621 | 0, // dsub_3 |
| 14622 | 94, // dsub_4 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14623 | 0, // dsub_5 |
| 14624 | 0, // dsub_6 |
| 14625 | 0, // dsub_7 |
| 14626 | 0, // gsub_0 |
| 14627 | 0, // gsub_1 |
| 14628 | 0, // qqsub_0 |
| 14629 | 0, // qqsub_1 |
| 14630 | 0, // qsub_0 |
| 14631 | 0, // qsub_1 |
| 14632 | 0, // qsub_2 |
| 14633 | 0, // qsub_3 |
| 14634 | 94, // ssub_0 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14635 | 94, // ssub_1 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14636 | 0, // ssub_2 |
| 14637 | 0, // ssub_3 |
| 14638 | 94, // ssub_4 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14639 | 94, // ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14640 | 0, // ssub_6 |
| 14641 | 0, // ssub_7 |
| 14642 | 94, // ssub_8 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14643 | 94, // ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14644 | 0, // ssub_10 |
| 14645 | 0, // ssub_11 |
| 14646 | 0, // ssub_12 |
| 14647 | 0, // ssub_13 |
| 14648 | 0, // ssub_14 |
| 14649 | 0, // ssub_15 |
| 14650 | 94, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14651 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14652 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14653 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14654 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 14655 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14656 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14657 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14658 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14659 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14660 | 94, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 14661 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14662 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14663 | 0, // ssub_6_ssub_7_dsub_5 |
| 14664 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14665 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14666 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14667 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14668 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14669 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14670 | 0, // dsub_5_dsub_7 |
| 14671 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14672 | 0, // dsub_5_ssub_12_ssub_13 |
| 14673 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14674 | }, |
| 14675 | { // DTriple_with_dsub_2_in_DPR_8 |
| 14676 | 95, // dsub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 14677 | 95, // dsub_1 -> DTriple_with_dsub_2_in_DPR_8 |
| 14678 | 95, // dsub_2 -> DTriple_with_dsub_2_in_DPR_8 |
| 14679 | 0, // dsub_3 |
| 14680 | 0, // dsub_4 |
| 14681 | 0, // dsub_5 |
| 14682 | 0, // dsub_6 |
| 14683 | 0, // dsub_7 |
| 14684 | 0, // gsub_0 |
| 14685 | 0, // gsub_1 |
| 14686 | 0, // qqsub_0 |
| 14687 | 0, // qqsub_1 |
| 14688 | 95, // qsub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 14689 | 0, // qsub_1 |
| 14690 | 0, // qsub_2 |
| 14691 | 0, // qsub_3 |
| 14692 | 95, // ssub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 14693 | 95, // ssub_1 -> DTriple_with_dsub_2_in_DPR_8 |
| 14694 | 95, // ssub_2 -> DTriple_with_dsub_2_in_DPR_8 |
| 14695 | 95, // ssub_3 -> DTriple_with_dsub_2_in_DPR_8 |
| 14696 | 95, // ssub_4 -> DTriple_with_dsub_2_in_DPR_8 |
| 14697 | 95, // ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 14698 | 0, // ssub_6 |
| 14699 | 0, // ssub_7 |
| 14700 | 0, // ssub_8 |
| 14701 | 0, // ssub_9 |
| 14702 | 0, // ssub_10 |
| 14703 | 0, // ssub_11 |
| 14704 | 0, // ssub_12 |
| 14705 | 0, // ssub_13 |
| 14706 | 0, // ssub_14 |
| 14707 | 0, // ssub_15 |
| 14708 | 95, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 14709 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14710 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14711 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14712 | 95, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 14713 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14714 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14715 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14716 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14717 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14718 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14719 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14720 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14721 | 0, // ssub_6_ssub_7_dsub_5 |
| 14722 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14723 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14724 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14725 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14726 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14727 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14728 | 0, // dsub_5_dsub_7 |
| 14729 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14730 | 0, // dsub_5_ssub_12_ssub_13 |
| 14731 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14732 | }, |
| 14733 | { // DTripleSpc_with_dsub_4_in_DPR_8 |
| 14734 | 96, // dsub_0 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14735 | 0, // dsub_1 |
| 14736 | 96, // dsub_2 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14737 | 0, // dsub_3 |
| 14738 | 96, // dsub_4 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14739 | 0, // dsub_5 |
| 14740 | 0, // dsub_6 |
| 14741 | 0, // dsub_7 |
| 14742 | 0, // gsub_0 |
| 14743 | 0, // gsub_1 |
| 14744 | 0, // qqsub_0 |
| 14745 | 0, // qqsub_1 |
| 14746 | 0, // qsub_0 |
| 14747 | 0, // qsub_1 |
| 14748 | 0, // qsub_2 |
| 14749 | 0, // qsub_3 |
| 14750 | 96, // ssub_0 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14751 | 96, // ssub_1 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14752 | 0, // ssub_2 |
| 14753 | 0, // ssub_3 |
| 14754 | 96, // ssub_4 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14755 | 96, // ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14756 | 0, // ssub_6 |
| 14757 | 0, // ssub_7 |
| 14758 | 96, // ssub_8 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14759 | 96, // ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14760 | 0, // ssub_10 |
| 14761 | 0, // ssub_11 |
| 14762 | 0, // ssub_12 |
| 14763 | 0, // ssub_13 |
| 14764 | 0, // ssub_14 |
| 14765 | 0, // ssub_15 |
| 14766 | 96, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14767 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14768 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14769 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14770 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 14771 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14772 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14773 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14774 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14775 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14776 | 96, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 14777 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14778 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14779 | 0, // ssub_6_ssub_7_dsub_5 |
| 14780 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14781 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14782 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14783 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14784 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14785 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14786 | 0, // dsub_5_dsub_7 |
| 14787 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14788 | 0, // dsub_5_ssub_12_ssub_13 |
| 14789 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14790 | }, |
| 14791 | { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14792 | 97, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14793 | 97, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14794 | 97, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14795 | 0, // dsub_3 |
| 14796 | 0, // dsub_4 |
| 14797 | 0, // dsub_5 |
| 14798 | 0, // dsub_6 |
| 14799 | 0, // dsub_7 |
| 14800 | 0, // gsub_0 |
| 14801 | 0, // gsub_1 |
| 14802 | 0, // qqsub_0 |
| 14803 | 0, // qqsub_1 |
| 14804 | 97, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14805 | 0, // qsub_1 |
| 14806 | 0, // qsub_2 |
| 14807 | 0, // qsub_3 |
| 14808 | 97, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14809 | 97, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14810 | 97, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14811 | 97, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14812 | 97, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14813 | 97, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14814 | 0, // ssub_6 |
| 14815 | 0, // ssub_7 |
| 14816 | 0, // ssub_8 |
| 14817 | 0, // ssub_9 |
| 14818 | 0, // ssub_10 |
| 14819 | 0, // ssub_11 |
| 14820 | 0, // ssub_12 |
| 14821 | 0, // ssub_13 |
| 14822 | 0, // ssub_14 |
| 14823 | 0, // ssub_15 |
| 14824 | 97, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14825 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14826 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14827 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14828 | 97, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 14829 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14830 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14831 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14832 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14833 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14834 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14835 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14836 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14837 | 0, // ssub_6_ssub_7_dsub_5 |
| 14838 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14839 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14840 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14841 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14842 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14843 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14844 | 0, // dsub_5_dsub_7 |
| 14845 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14846 | 0, // dsub_5_ssub_12_ssub_13 |
| 14847 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14848 | }, |
| 14849 | { // DTriple_with_qsub_0_in_QPR_8 |
| 14850 | 98, // dsub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 14851 | 98, // dsub_1 -> DTriple_with_qsub_0_in_QPR_8 |
| 14852 | 98, // dsub_2 -> DTriple_with_qsub_0_in_QPR_8 |
| 14853 | 0, // dsub_3 |
| 14854 | 0, // dsub_4 |
| 14855 | 0, // dsub_5 |
| 14856 | 0, // dsub_6 |
| 14857 | 0, // dsub_7 |
| 14858 | 0, // gsub_0 |
| 14859 | 0, // gsub_1 |
| 14860 | 0, // qqsub_0 |
| 14861 | 0, // qqsub_1 |
| 14862 | 98, // qsub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 14863 | 0, // qsub_1 |
| 14864 | 0, // qsub_2 |
| 14865 | 0, // qsub_3 |
| 14866 | 98, // ssub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 14867 | 98, // ssub_1 -> DTriple_with_qsub_0_in_QPR_8 |
| 14868 | 98, // ssub_2 -> DTriple_with_qsub_0_in_QPR_8 |
| 14869 | 98, // ssub_3 -> DTriple_with_qsub_0_in_QPR_8 |
| 14870 | 98, // ssub_4 -> DTriple_with_qsub_0_in_QPR_8 |
| 14871 | 98, // ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 14872 | 0, // ssub_6 |
| 14873 | 0, // ssub_7 |
| 14874 | 0, // ssub_8 |
| 14875 | 0, // ssub_9 |
| 14876 | 0, // ssub_10 |
| 14877 | 0, // ssub_11 |
| 14878 | 0, // ssub_12 |
| 14879 | 0, // ssub_13 |
| 14880 | 0, // ssub_14 |
| 14881 | 0, // ssub_15 |
| 14882 | 98, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 14883 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14884 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14885 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14886 | 98, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 14887 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14888 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14889 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14890 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14891 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14892 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14893 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14894 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14895 | 0, // ssub_6_ssub_7_dsub_5 |
| 14896 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14897 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14898 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14899 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14900 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14901 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14902 | 0, // dsub_5_dsub_7 |
| 14903 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14904 | 0, // dsub_5_ssub_12_ssub_13 |
| 14905 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14906 | }, |
| 14907 | { // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14908 | 99, // dsub_0 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14909 | 99, // dsub_1 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14910 | 99, // dsub_2 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14911 | 0, // dsub_3 |
| 14912 | 0, // dsub_4 |
| 14913 | 0, // dsub_5 |
| 14914 | 0, // dsub_6 |
| 14915 | 0, // dsub_7 |
| 14916 | 0, // gsub_0 |
| 14917 | 0, // gsub_1 |
| 14918 | 0, // qqsub_0 |
| 14919 | 0, // qqsub_1 |
| 14920 | 99, // qsub_0 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14921 | 0, // qsub_1 |
| 14922 | 0, // qsub_2 |
| 14923 | 0, // qsub_3 |
| 14924 | 99, // ssub_0 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14925 | 99, // ssub_1 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14926 | 99, // ssub_2 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14927 | 99, // ssub_3 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14928 | 99, // ssub_4 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14929 | 99, // ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14930 | 0, // ssub_6 |
| 14931 | 0, // ssub_7 |
| 14932 | 0, // ssub_8 |
| 14933 | 0, // ssub_9 |
| 14934 | 0, // ssub_10 |
| 14935 | 0, // ssub_11 |
| 14936 | 0, // ssub_12 |
| 14937 | 0, // ssub_13 |
| 14938 | 0, // ssub_14 |
| 14939 | 0, // ssub_15 |
| 14940 | 99, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14941 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 14942 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 14943 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 14944 | 99, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 14945 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 14946 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14947 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 14948 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 14949 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14950 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 14951 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 14952 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 14953 | 0, // ssub_6_ssub_7_dsub_5 |
| 14954 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 14955 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 14956 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 14957 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14958 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 14959 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 14960 | 0, // dsub_5_dsub_7 |
| 14961 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 14962 | 0, // dsub_5_ssub_12_ssub_13 |
| 14963 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 14964 | }, |
| 14965 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14966 | 100, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14967 | 100, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14968 | 100, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14969 | 0, // dsub_3 |
| 14970 | 0, // dsub_4 |
| 14971 | 0, // dsub_5 |
| 14972 | 0, // dsub_6 |
| 14973 | 0, // dsub_7 |
| 14974 | 0, // gsub_0 |
| 14975 | 0, // gsub_1 |
| 14976 | 0, // qqsub_0 |
| 14977 | 0, // qqsub_1 |
| 14978 | 100, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14979 | 0, // qsub_1 |
| 14980 | 0, // qsub_2 |
| 14981 | 0, // qsub_3 |
| 14982 | 100, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14983 | 100, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14984 | 100, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14985 | 100, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14986 | 100, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14987 | 100, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14988 | 0, // ssub_6 |
| 14989 | 0, // ssub_7 |
| 14990 | 0, // ssub_8 |
| 14991 | 0, // ssub_9 |
| 14992 | 0, // ssub_10 |
| 14993 | 0, // ssub_11 |
| 14994 | 0, // ssub_12 |
| 14995 | 0, // ssub_13 |
| 14996 | 0, // ssub_14 |
| 14997 | 0, // ssub_15 |
| 14998 | 100, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 14999 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15000 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15001 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15002 | 100, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 15003 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15004 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15005 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15006 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15007 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15008 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15009 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15010 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15011 | 0, // ssub_6_ssub_7_dsub_5 |
| 15012 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15013 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15014 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15015 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15016 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15017 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15018 | 0, // dsub_5_dsub_7 |
| 15019 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15020 | 0, // dsub_5_ssub_12_ssub_13 |
| 15021 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15022 | }, |
| 15023 | { // DQuadSpc |
| 15024 | 101, // dsub_0 -> DQuadSpc |
| 15025 | 0, // dsub_1 |
| 15026 | 101, // dsub_2 -> DQuadSpc |
| 15027 | 0, // dsub_3 |
| 15028 | 101, // dsub_4 -> DQuadSpc |
| 15029 | 0, // dsub_5 |
| 15030 | 0, // dsub_6 |
| 15031 | 0, // dsub_7 |
| 15032 | 0, // gsub_0 |
| 15033 | 0, // gsub_1 |
| 15034 | 0, // qqsub_0 |
| 15035 | 0, // qqsub_1 |
| 15036 | 0, // qsub_0 |
| 15037 | 0, // qsub_1 |
| 15038 | 0, // qsub_2 |
| 15039 | 0, // qsub_3 |
| 15040 | 102, // ssub_0 -> DQuadSpc_with_ssub_0 |
| 15041 | 102, // ssub_1 -> DQuadSpc_with_ssub_0 |
| 15042 | 0, // ssub_2 |
| 15043 | 0, // ssub_3 |
| 15044 | 103, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 15045 | 103, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 15046 | 0, // ssub_6 |
| 15047 | 0, // ssub_7 |
| 15048 | 104, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 15049 | 104, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 15050 | 0, // ssub_10 |
| 15051 | 0, // ssub_11 |
| 15052 | 0, // ssub_12 |
| 15053 | 0, // ssub_13 |
| 15054 | 0, // ssub_14 |
| 15055 | 0, // ssub_15 |
| 15056 | 101, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc |
| 15057 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15058 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15059 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15060 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15061 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15062 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15063 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15064 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15065 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15066 | 101, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc |
| 15067 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15068 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15069 | 0, // ssub_6_ssub_7_dsub_5 |
| 15070 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15071 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15072 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15073 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15074 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15075 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15076 | 0, // dsub_5_dsub_7 |
| 15077 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15078 | 0, // dsub_5_ssub_12_ssub_13 |
| 15079 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15080 | }, |
| 15081 | { // DQuadSpc_with_ssub_0 |
| 15082 | 102, // dsub_0 -> DQuadSpc_with_ssub_0 |
| 15083 | 0, // dsub_1 |
| 15084 | 102, // dsub_2 -> DQuadSpc_with_ssub_0 |
| 15085 | 0, // dsub_3 |
| 15086 | 102, // dsub_4 -> DQuadSpc_with_ssub_0 |
| 15087 | 0, // dsub_5 |
| 15088 | 0, // dsub_6 |
| 15089 | 0, // dsub_7 |
| 15090 | 0, // gsub_0 |
| 15091 | 0, // gsub_1 |
| 15092 | 0, // qqsub_0 |
| 15093 | 0, // qqsub_1 |
| 15094 | 0, // qsub_0 |
| 15095 | 0, // qsub_1 |
| 15096 | 0, // qsub_2 |
| 15097 | 0, // qsub_3 |
| 15098 | 102, // ssub_0 -> DQuadSpc_with_ssub_0 |
| 15099 | 102, // ssub_1 -> DQuadSpc_with_ssub_0 |
| 15100 | 0, // ssub_2 |
| 15101 | 0, // ssub_3 |
| 15102 | 103, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 15103 | 103, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 15104 | 0, // ssub_6 |
| 15105 | 0, // ssub_7 |
| 15106 | 104, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 15107 | 104, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 15108 | 0, // ssub_10 |
| 15109 | 0, // ssub_11 |
| 15110 | 0, // ssub_12 |
| 15111 | 0, // ssub_13 |
| 15112 | 0, // ssub_14 |
| 15113 | 0, // ssub_15 |
| 15114 | 102, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_0 |
| 15115 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15116 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15117 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15118 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15119 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15120 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15121 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15122 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15123 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15124 | 102, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0 |
| 15125 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15126 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15127 | 0, // ssub_6_ssub_7_dsub_5 |
| 15128 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15129 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15130 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15131 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15132 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15133 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15134 | 0, // dsub_5_dsub_7 |
| 15135 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15136 | 0, // dsub_5_ssub_12_ssub_13 |
| 15137 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15138 | }, |
| 15139 | { // DQuadSpc_with_ssub_4 |
| 15140 | 103, // dsub_0 -> DQuadSpc_with_ssub_4 |
| 15141 | 0, // dsub_1 |
| 15142 | 103, // dsub_2 -> DQuadSpc_with_ssub_4 |
| 15143 | 0, // dsub_3 |
| 15144 | 103, // dsub_4 -> DQuadSpc_with_ssub_4 |
| 15145 | 0, // dsub_5 |
| 15146 | 0, // dsub_6 |
| 15147 | 0, // dsub_7 |
| 15148 | 0, // gsub_0 |
| 15149 | 0, // gsub_1 |
| 15150 | 0, // qqsub_0 |
| 15151 | 0, // qqsub_1 |
| 15152 | 0, // qsub_0 |
| 15153 | 0, // qsub_1 |
| 15154 | 0, // qsub_2 |
| 15155 | 0, // qsub_3 |
| 15156 | 103, // ssub_0 -> DQuadSpc_with_ssub_4 |
| 15157 | 103, // ssub_1 -> DQuadSpc_with_ssub_4 |
| 15158 | 0, // ssub_2 |
| 15159 | 0, // ssub_3 |
| 15160 | 103, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 15161 | 103, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 15162 | 0, // ssub_6 |
| 15163 | 0, // ssub_7 |
| 15164 | 104, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 15165 | 104, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 15166 | 0, // ssub_10 |
| 15167 | 0, // ssub_11 |
| 15168 | 0, // ssub_12 |
| 15169 | 0, // ssub_13 |
| 15170 | 0, // ssub_14 |
| 15171 | 0, // ssub_15 |
| 15172 | 103, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_4 |
| 15173 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15174 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15175 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15176 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15177 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15178 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15179 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15180 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15181 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15182 | 103, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4 |
| 15183 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15184 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15185 | 0, // ssub_6_ssub_7_dsub_5 |
| 15186 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15187 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15188 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15189 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15190 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15191 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15192 | 0, // dsub_5_dsub_7 |
| 15193 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15194 | 0, // dsub_5_ssub_12_ssub_13 |
| 15195 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15196 | }, |
| 15197 | { // DQuadSpc_with_ssub_8 |
| 15198 | 104, // dsub_0 -> DQuadSpc_with_ssub_8 |
| 15199 | 0, // dsub_1 |
| 15200 | 104, // dsub_2 -> DQuadSpc_with_ssub_8 |
| 15201 | 0, // dsub_3 |
| 15202 | 104, // dsub_4 -> DQuadSpc_with_ssub_8 |
| 15203 | 0, // dsub_5 |
| 15204 | 0, // dsub_6 |
| 15205 | 0, // dsub_7 |
| 15206 | 0, // gsub_0 |
| 15207 | 0, // gsub_1 |
| 15208 | 0, // qqsub_0 |
| 15209 | 0, // qqsub_1 |
| 15210 | 0, // qsub_0 |
| 15211 | 0, // qsub_1 |
| 15212 | 0, // qsub_2 |
| 15213 | 0, // qsub_3 |
| 15214 | 104, // ssub_0 -> DQuadSpc_with_ssub_8 |
| 15215 | 104, // ssub_1 -> DQuadSpc_with_ssub_8 |
| 15216 | 0, // ssub_2 |
| 15217 | 0, // ssub_3 |
| 15218 | 104, // ssub_4 -> DQuadSpc_with_ssub_8 |
| 15219 | 104, // ssub_5 -> DQuadSpc_with_ssub_8 |
| 15220 | 0, // ssub_6 |
| 15221 | 0, // ssub_7 |
| 15222 | 104, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 15223 | 104, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 15224 | 0, // ssub_10 |
| 15225 | 0, // ssub_11 |
| 15226 | 0, // ssub_12 |
| 15227 | 0, // ssub_13 |
| 15228 | 0, // ssub_14 |
| 15229 | 0, // ssub_15 |
| 15230 | 104, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_8 |
| 15231 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15232 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15233 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15234 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15235 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15236 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15237 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15238 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15239 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15240 | 104, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 15241 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15242 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15243 | 0, // ssub_6_ssub_7_dsub_5 |
| 15244 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15245 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15246 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15247 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15248 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15249 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15250 | 0, // dsub_5_dsub_7 |
| 15251 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15252 | 0, // dsub_5_ssub_12_ssub_13 |
| 15253 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15254 | }, |
| 15255 | { // DQuadSpc_with_dsub_0_in_DPR_8 |
| 15256 | 105, // dsub_0 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15257 | 0, // dsub_1 |
| 15258 | 105, // dsub_2 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15259 | 0, // dsub_3 |
| 15260 | 105, // dsub_4 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15261 | 0, // dsub_5 |
| 15262 | 0, // dsub_6 |
| 15263 | 0, // dsub_7 |
| 15264 | 0, // gsub_0 |
| 15265 | 0, // gsub_1 |
| 15266 | 0, // qqsub_0 |
| 15267 | 0, // qqsub_1 |
| 15268 | 0, // qsub_0 |
| 15269 | 0, // qsub_1 |
| 15270 | 0, // qsub_2 |
| 15271 | 0, // qsub_3 |
| 15272 | 105, // ssub_0 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15273 | 105, // ssub_1 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15274 | 0, // ssub_2 |
| 15275 | 0, // ssub_3 |
| 15276 | 105, // ssub_4 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15277 | 105, // ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15278 | 0, // ssub_6 |
| 15279 | 0, // ssub_7 |
| 15280 | 105, // ssub_8 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15281 | 105, // ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15282 | 0, // ssub_10 |
| 15283 | 0, // ssub_11 |
| 15284 | 0, // ssub_12 |
| 15285 | 0, // ssub_13 |
| 15286 | 0, // ssub_14 |
| 15287 | 0, // ssub_15 |
| 15288 | 105, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15289 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15290 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15291 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15292 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15293 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15294 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15295 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15296 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15297 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15298 | 105, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 15299 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15300 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15301 | 0, // ssub_6_ssub_7_dsub_5 |
| 15302 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15303 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15304 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15305 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15306 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15307 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15308 | 0, // dsub_5_dsub_7 |
| 15309 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15310 | 0, // dsub_5_ssub_12_ssub_13 |
| 15311 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15312 | }, |
| 15313 | { // DQuadSpc_with_dsub_2_in_DPR_8 |
| 15314 | 106, // dsub_0 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15315 | 0, // dsub_1 |
| 15316 | 106, // dsub_2 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15317 | 0, // dsub_3 |
| 15318 | 106, // dsub_4 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15319 | 0, // dsub_5 |
| 15320 | 0, // dsub_6 |
| 15321 | 0, // dsub_7 |
| 15322 | 0, // gsub_0 |
| 15323 | 0, // gsub_1 |
| 15324 | 0, // qqsub_0 |
| 15325 | 0, // qqsub_1 |
| 15326 | 0, // qsub_0 |
| 15327 | 0, // qsub_1 |
| 15328 | 0, // qsub_2 |
| 15329 | 0, // qsub_3 |
| 15330 | 106, // ssub_0 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15331 | 106, // ssub_1 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15332 | 0, // ssub_2 |
| 15333 | 0, // ssub_3 |
| 15334 | 106, // ssub_4 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15335 | 106, // ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15336 | 0, // ssub_6 |
| 15337 | 0, // ssub_7 |
| 15338 | 106, // ssub_8 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15339 | 106, // ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15340 | 0, // ssub_10 |
| 15341 | 0, // ssub_11 |
| 15342 | 0, // ssub_12 |
| 15343 | 0, // ssub_13 |
| 15344 | 0, // ssub_14 |
| 15345 | 0, // ssub_15 |
| 15346 | 106, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15347 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15348 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15349 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15350 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15351 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15352 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15353 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15354 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15355 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15356 | 106, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 15357 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15358 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15359 | 0, // ssub_6_ssub_7_dsub_5 |
| 15360 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15361 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15362 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15363 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15364 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15365 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15366 | 0, // dsub_5_dsub_7 |
| 15367 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15368 | 0, // dsub_5_ssub_12_ssub_13 |
| 15369 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15370 | }, |
| 15371 | { // DQuadSpc_with_dsub_4_in_DPR_8 |
| 15372 | 107, // dsub_0 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15373 | 0, // dsub_1 |
| 15374 | 107, // dsub_2 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15375 | 0, // dsub_3 |
| 15376 | 107, // dsub_4 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15377 | 0, // dsub_5 |
| 15378 | 0, // dsub_6 |
| 15379 | 0, // dsub_7 |
| 15380 | 0, // gsub_0 |
| 15381 | 0, // gsub_1 |
| 15382 | 0, // qqsub_0 |
| 15383 | 0, // qqsub_1 |
| 15384 | 0, // qsub_0 |
| 15385 | 0, // qsub_1 |
| 15386 | 0, // qsub_2 |
| 15387 | 0, // qsub_3 |
| 15388 | 107, // ssub_0 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15389 | 107, // ssub_1 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15390 | 0, // ssub_2 |
| 15391 | 0, // ssub_3 |
| 15392 | 107, // ssub_4 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15393 | 107, // ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15394 | 0, // ssub_6 |
| 15395 | 0, // ssub_7 |
| 15396 | 107, // ssub_8 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15397 | 107, // ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15398 | 0, // ssub_10 |
| 15399 | 0, // ssub_11 |
| 15400 | 0, // ssub_12 |
| 15401 | 0, // ssub_13 |
| 15402 | 0, // ssub_14 |
| 15403 | 0, // ssub_15 |
| 15404 | 107, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15405 | 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 15406 | 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 15407 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 15408 | 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 15409 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15410 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15411 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15412 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15413 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15414 | 107, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 15415 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15416 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15417 | 0, // ssub_6_ssub_7_dsub_5 |
| 15418 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15419 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15420 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15421 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15422 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15423 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15424 | 0, // dsub_5_dsub_7 |
| 15425 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15426 | 0, // dsub_5_ssub_12_ssub_13 |
| 15427 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15428 | }, |
| 15429 | { // DQuad |
| 15430 | 108, // dsub_0 -> DQuad |
| 15431 | 108, // dsub_1 -> DQuad |
| 15432 | 108, // dsub_2 -> DQuad |
| 15433 | 108, // dsub_3 -> DQuad |
| 15434 | 0, // dsub_4 |
| 15435 | 0, // dsub_5 |
| 15436 | 0, // dsub_6 |
| 15437 | 0, // dsub_7 |
| 15438 | 0, // gsub_0 |
| 15439 | 0, // gsub_1 |
| 15440 | 0, // qqsub_0 |
| 15441 | 0, // qqsub_1 |
| 15442 | 108, // qsub_0 -> DQuad |
| 15443 | 108, // qsub_1 -> DQuad |
| 15444 | 0, // qsub_2 |
| 15445 | 0, // qsub_3 |
| 15446 | 109, // ssub_0 -> DQuad_with_ssub_0 |
| 15447 | 109, // ssub_1 -> DQuad_with_ssub_0 |
| 15448 | 110, // ssub_2 -> DQuad_with_ssub_2 |
| 15449 | 110, // ssub_3 -> DQuad_with_ssub_2 |
| 15450 | 113, // ssub_4 -> DQuad_with_ssub_4 |
| 15451 | 113, // ssub_5 -> DQuad_with_ssub_4 |
| 15452 | 114, // ssub_6 -> DQuad_with_ssub_6 |
| 15453 | 114, // ssub_7 -> DQuad_with_ssub_6 |
| 15454 | 0, // ssub_8 |
| 15455 | 0, // ssub_9 |
| 15456 | 0, // ssub_10 |
| 15457 | 0, // ssub_11 |
| 15458 | 0, // ssub_12 |
| 15459 | 0, // ssub_13 |
| 15460 | 0, // ssub_14 |
| 15461 | 0, // ssub_15 |
| 15462 | 108, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad |
| 15463 | 108, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad |
| 15464 | 108, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad |
| 15465 | 108, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad |
| 15466 | 108, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad |
| 15467 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15468 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15469 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15470 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15471 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15472 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15473 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15474 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15475 | 0, // ssub_6_ssub_7_dsub_5 |
| 15476 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15477 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15478 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15479 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15480 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15481 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15482 | 0, // dsub_5_dsub_7 |
| 15483 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15484 | 0, // dsub_5_ssub_12_ssub_13 |
| 15485 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15486 | }, |
| 15487 | { // DQuad_with_ssub_0 |
| 15488 | 109, // dsub_0 -> DQuad_with_ssub_0 |
| 15489 | 109, // dsub_1 -> DQuad_with_ssub_0 |
| 15490 | 109, // dsub_2 -> DQuad_with_ssub_0 |
| 15491 | 109, // dsub_3 -> DQuad_with_ssub_0 |
| 15492 | 0, // dsub_4 |
| 15493 | 0, // dsub_5 |
| 15494 | 0, // dsub_6 |
| 15495 | 0, // dsub_7 |
| 15496 | 0, // gsub_0 |
| 15497 | 0, // gsub_1 |
| 15498 | 0, // qqsub_0 |
| 15499 | 0, // qqsub_1 |
| 15500 | 109, // qsub_0 -> DQuad_with_ssub_0 |
| 15501 | 109, // qsub_1 -> DQuad_with_ssub_0 |
| 15502 | 0, // qsub_2 |
| 15503 | 0, // qsub_3 |
| 15504 | 109, // ssub_0 -> DQuad_with_ssub_0 |
| 15505 | 109, // ssub_1 -> DQuad_with_ssub_0 |
| 15506 | 110, // ssub_2 -> DQuad_with_ssub_2 |
| 15507 | 110, // ssub_3 -> DQuad_with_ssub_2 |
| 15508 | 113, // ssub_4 -> DQuad_with_ssub_4 |
| 15509 | 113, // ssub_5 -> DQuad_with_ssub_4 |
| 15510 | 114, // ssub_6 -> DQuad_with_ssub_6 |
| 15511 | 114, // ssub_7 -> DQuad_with_ssub_6 |
| 15512 | 0, // ssub_8 |
| 15513 | 0, // ssub_9 |
| 15514 | 0, // ssub_10 |
| 15515 | 0, // ssub_11 |
| 15516 | 0, // ssub_12 |
| 15517 | 0, // ssub_13 |
| 15518 | 0, // ssub_14 |
| 15519 | 0, // ssub_15 |
| 15520 | 109, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 15521 | 109, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 15522 | 109, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0 |
| 15523 | 109, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0 |
| 15524 | 109, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 15525 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15526 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15527 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15528 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15529 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15530 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15531 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15532 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15533 | 0, // ssub_6_ssub_7_dsub_5 |
| 15534 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15535 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15536 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15537 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15538 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15539 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15540 | 0, // dsub_5_dsub_7 |
| 15541 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15542 | 0, // dsub_5_ssub_12_ssub_13 |
| 15543 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15544 | }, |
| 15545 | { // DQuad_with_ssub_2 |
| 15546 | 110, // dsub_0 -> DQuad_with_ssub_2 |
| 15547 | 110, // dsub_1 -> DQuad_with_ssub_2 |
| 15548 | 110, // dsub_2 -> DQuad_with_ssub_2 |
| 15549 | 110, // dsub_3 -> DQuad_with_ssub_2 |
| 15550 | 0, // dsub_4 |
| 15551 | 0, // dsub_5 |
| 15552 | 0, // dsub_6 |
| 15553 | 0, // dsub_7 |
| 15554 | 0, // gsub_0 |
| 15555 | 0, // gsub_1 |
| 15556 | 0, // qqsub_0 |
| 15557 | 0, // qqsub_1 |
| 15558 | 110, // qsub_0 -> DQuad_with_ssub_2 |
| 15559 | 110, // qsub_1 -> DQuad_with_ssub_2 |
| 15560 | 0, // qsub_2 |
| 15561 | 0, // qsub_3 |
| 15562 | 110, // ssub_0 -> DQuad_with_ssub_2 |
| 15563 | 110, // ssub_1 -> DQuad_with_ssub_2 |
| 15564 | 110, // ssub_2 -> DQuad_with_ssub_2 |
| 15565 | 110, // ssub_3 -> DQuad_with_ssub_2 |
| 15566 | 113, // ssub_4 -> DQuad_with_ssub_4 |
| 15567 | 113, // ssub_5 -> DQuad_with_ssub_4 |
| 15568 | 114, // ssub_6 -> DQuad_with_ssub_6 |
| 15569 | 114, // ssub_7 -> DQuad_with_ssub_6 |
| 15570 | 0, // ssub_8 |
| 15571 | 0, // ssub_9 |
| 15572 | 0, // ssub_10 |
| 15573 | 0, // ssub_11 |
| 15574 | 0, // ssub_12 |
| 15575 | 0, // ssub_13 |
| 15576 | 0, // ssub_14 |
| 15577 | 0, // ssub_15 |
| 15578 | 110, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 15579 | 110, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 15580 | 110, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2 |
| 15581 | 110, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2 |
| 15582 | 110, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 15583 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15584 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15585 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15586 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15587 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15588 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15589 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15590 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15591 | 0, // ssub_6_ssub_7_dsub_5 |
| 15592 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15593 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15594 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15595 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15596 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15597 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15598 | 0, // dsub_5_dsub_7 |
| 15599 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15600 | 0, // dsub_5_ssub_12_ssub_13 |
| 15601 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15602 | }, |
| 15603 | { // QQPR |
| 15604 | 111, // dsub_0 -> QQPR |
| 15605 | 111, // dsub_1 -> QQPR |
| 15606 | 111, // dsub_2 -> QQPR |
| 15607 | 111, // dsub_3 -> QQPR |
| 15608 | 0, // dsub_4 |
| 15609 | 0, // dsub_5 |
| 15610 | 0, // dsub_6 |
| 15611 | 0, // dsub_7 |
| 15612 | 0, // gsub_0 |
| 15613 | 0, // gsub_1 |
| 15614 | 0, // qqsub_0 |
| 15615 | 0, // qqsub_1 |
| 15616 | 111, // qsub_0 -> QQPR |
| 15617 | 111, // qsub_1 -> QQPR |
| 15618 | 0, // qsub_2 |
| 15619 | 0, // qsub_3 |
| 15620 | 117, // ssub_0 -> QQPR_with_ssub_0 |
| 15621 | 117, // ssub_1 -> QQPR_with_ssub_0 |
| 15622 | 117, // ssub_2 -> QQPR_with_ssub_0 |
| 15623 | 117, // ssub_3 -> QQPR_with_ssub_0 |
| 15624 | 120, // ssub_4 -> MQQPR |
| 15625 | 120, // ssub_5 -> MQQPR |
| 15626 | 120, // ssub_6 -> MQQPR |
| 15627 | 120, // ssub_7 -> MQQPR |
| 15628 | 0, // ssub_8 |
| 15629 | 0, // ssub_9 |
| 15630 | 0, // ssub_10 |
| 15631 | 0, // ssub_11 |
| 15632 | 0, // ssub_12 |
| 15633 | 0, // ssub_13 |
| 15634 | 0, // ssub_14 |
| 15635 | 0, // ssub_15 |
| 15636 | 111, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQPR |
| 15637 | 111, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR |
| 15638 | 111, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQPR |
| 15639 | 111, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQPR |
| 15640 | 111, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR |
| 15641 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15642 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15643 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15644 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15645 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15646 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15647 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15648 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15649 | 0, // ssub_6_ssub_7_dsub_5 |
| 15650 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15651 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15652 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15653 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15654 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15655 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15656 | 0, // dsub_5_dsub_7 |
| 15657 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15658 | 0, // dsub_5_ssub_12_ssub_13 |
| 15659 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15660 | }, |
| 15661 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15662 | 112, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15663 | 112, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15664 | 112, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15665 | 112, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15666 | 0, // dsub_4 |
| 15667 | 0, // dsub_5 |
| 15668 | 0, // dsub_6 |
| 15669 | 0, // dsub_7 |
| 15670 | 0, // gsub_0 |
| 15671 | 0, // gsub_1 |
| 15672 | 0, // qqsub_0 |
| 15673 | 0, // qqsub_1 |
| 15674 | 112, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15675 | 112, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15676 | 0, // qsub_2 |
| 15677 | 0, // qsub_3 |
| 15678 | 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15679 | 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15680 | 119, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15681 | 119, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15682 | 119, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15683 | 119, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15684 | 122, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15685 | 122, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15686 | 0, // ssub_8 |
| 15687 | 0, // ssub_9 |
| 15688 | 0, // ssub_10 |
| 15689 | 0, // ssub_11 |
| 15690 | 0, // ssub_12 |
| 15691 | 0, // ssub_13 |
| 15692 | 0, // ssub_14 |
| 15693 | 0, // ssub_15 |
| 15694 | 112, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15695 | 112, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15696 | 112, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15697 | 112, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15698 | 112, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15699 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15700 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15701 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15702 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15703 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15704 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15705 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15706 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15707 | 0, // ssub_6_ssub_7_dsub_5 |
| 15708 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15709 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15710 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15711 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15712 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15713 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15714 | 0, // dsub_5_dsub_7 |
| 15715 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15716 | 0, // dsub_5_ssub_12_ssub_13 |
| 15717 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15718 | }, |
| 15719 | { // DQuad_with_ssub_4 |
| 15720 | 113, // dsub_0 -> DQuad_with_ssub_4 |
| 15721 | 113, // dsub_1 -> DQuad_with_ssub_4 |
| 15722 | 113, // dsub_2 -> DQuad_with_ssub_4 |
| 15723 | 113, // dsub_3 -> DQuad_with_ssub_4 |
| 15724 | 0, // dsub_4 |
| 15725 | 0, // dsub_5 |
| 15726 | 0, // dsub_6 |
| 15727 | 0, // dsub_7 |
| 15728 | 0, // gsub_0 |
| 15729 | 0, // gsub_1 |
| 15730 | 0, // qqsub_0 |
| 15731 | 0, // qqsub_1 |
| 15732 | 113, // qsub_0 -> DQuad_with_ssub_4 |
| 15733 | 113, // qsub_1 -> DQuad_with_ssub_4 |
| 15734 | 0, // qsub_2 |
| 15735 | 0, // qsub_3 |
| 15736 | 113, // ssub_0 -> DQuad_with_ssub_4 |
| 15737 | 113, // ssub_1 -> DQuad_with_ssub_4 |
| 15738 | 113, // ssub_2 -> DQuad_with_ssub_4 |
| 15739 | 113, // ssub_3 -> DQuad_with_ssub_4 |
| 15740 | 113, // ssub_4 -> DQuad_with_ssub_4 |
| 15741 | 113, // ssub_5 -> DQuad_with_ssub_4 |
| 15742 | 114, // ssub_6 -> DQuad_with_ssub_6 |
| 15743 | 114, // ssub_7 -> DQuad_with_ssub_6 |
| 15744 | 0, // ssub_8 |
| 15745 | 0, // ssub_9 |
| 15746 | 0, // ssub_10 |
| 15747 | 0, // ssub_11 |
| 15748 | 0, // ssub_12 |
| 15749 | 0, // ssub_13 |
| 15750 | 0, // ssub_14 |
| 15751 | 0, // ssub_15 |
| 15752 | 113, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 15753 | 113, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 15754 | 113, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_4 |
| 15755 | 113, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_4 |
| 15756 | 113, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 15757 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15758 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15759 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15760 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15761 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15762 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15763 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15764 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15765 | 0, // ssub_6_ssub_7_dsub_5 |
| 15766 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15767 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15768 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15769 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15770 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15771 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15772 | 0, // dsub_5_dsub_7 |
| 15773 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15774 | 0, // dsub_5_ssub_12_ssub_13 |
| 15775 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15776 | }, |
| 15777 | { // DQuad_with_ssub_6 |
| 15778 | 114, // dsub_0 -> DQuad_with_ssub_6 |
| 15779 | 114, // dsub_1 -> DQuad_with_ssub_6 |
| 15780 | 114, // dsub_2 -> DQuad_with_ssub_6 |
| 15781 | 114, // dsub_3 -> DQuad_with_ssub_6 |
| 15782 | 0, // dsub_4 |
| 15783 | 0, // dsub_5 |
| 15784 | 0, // dsub_6 |
| 15785 | 0, // dsub_7 |
| 15786 | 0, // gsub_0 |
| 15787 | 0, // gsub_1 |
| 15788 | 0, // qqsub_0 |
| 15789 | 0, // qqsub_1 |
| 15790 | 114, // qsub_0 -> DQuad_with_ssub_6 |
| 15791 | 114, // qsub_1 -> DQuad_with_ssub_6 |
| 15792 | 0, // qsub_2 |
| 15793 | 0, // qsub_3 |
| 15794 | 114, // ssub_0 -> DQuad_with_ssub_6 |
| 15795 | 114, // ssub_1 -> DQuad_with_ssub_6 |
| 15796 | 114, // ssub_2 -> DQuad_with_ssub_6 |
| 15797 | 114, // ssub_3 -> DQuad_with_ssub_6 |
| 15798 | 114, // ssub_4 -> DQuad_with_ssub_6 |
| 15799 | 114, // ssub_5 -> DQuad_with_ssub_6 |
| 15800 | 114, // ssub_6 -> DQuad_with_ssub_6 |
| 15801 | 114, // ssub_7 -> DQuad_with_ssub_6 |
| 15802 | 0, // ssub_8 |
| 15803 | 0, // ssub_9 |
| 15804 | 0, // ssub_10 |
| 15805 | 0, // ssub_11 |
| 15806 | 0, // ssub_12 |
| 15807 | 0, // ssub_13 |
| 15808 | 0, // ssub_14 |
| 15809 | 0, // ssub_15 |
| 15810 | 114, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 15811 | 114, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 15812 | 114, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6 |
| 15813 | 114, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6 |
| 15814 | 114, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 15815 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15816 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15817 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15818 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15819 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15820 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15821 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15822 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15823 | 0, // ssub_6_ssub_7_dsub_5 |
| 15824 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15825 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15826 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15827 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15828 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15829 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15830 | 0, // dsub_5_dsub_7 |
| 15831 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15832 | 0, // dsub_5_ssub_12_ssub_13 |
| 15833 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15834 | }, |
| 15835 | { // DQuad_with_dsub_0_in_DPR_8 |
| 15836 | 115, // dsub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 15837 | 115, // dsub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 15838 | 115, // dsub_2 -> DQuad_with_dsub_0_in_DPR_8 |
| 15839 | 115, // dsub_3 -> DQuad_with_dsub_0_in_DPR_8 |
| 15840 | 0, // dsub_4 |
| 15841 | 0, // dsub_5 |
| 15842 | 0, // dsub_6 |
| 15843 | 0, // dsub_7 |
| 15844 | 0, // gsub_0 |
| 15845 | 0, // gsub_1 |
| 15846 | 0, // qqsub_0 |
| 15847 | 0, // qqsub_1 |
| 15848 | 115, // qsub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 15849 | 115, // qsub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 15850 | 0, // qsub_2 |
| 15851 | 0, // qsub_3 |
| 15852 | 115, // ssub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 15853 | 115, // ssub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 15854 | 115, // ssub_2 -> DQuad_with_dsub_0_in_DPR_8 |
| 15855 | 115, // ssub_3 -> DQuad_with_dsub_0_in_DPR_8 |
| 15856 | 115, // ssub_4 -> DQuad_with_dsub_0_in_DPR_8 |
| 15857 | 115, // ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 15858 | 115, // ssub_6 -> DQuad_with_dsub_0_in_DPR_8 |
| 15859 | 115, // ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 15860 | 0, // ssub_8 |
| 15861 | 0, // ssub_9 |
| 15862 | 0, // ssub_10 |
| 15863 | 0, // ssub_11 |
| 15864 | 0, // ssub_12 |
| 15865 | 0, // ssub_13 |
| 15866 | 0, // ssub_14 |
| 15867 | 0, // ssub_15 |
| 15868 | 115, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 15869 | 115, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 15870 | 115, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 15871 | 115, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 15872 | 115, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 15873 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15874 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15875 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15876 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15877 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15878 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15879 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15880 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15881 | 0, // ssub_6_ssub_7_dsub_5 |
| 15882 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15883 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15884 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15885 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15886 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15887 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15888 | 0, // dsub_5_dsub_7 |
| 15889 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15890 | 0, // dsub_5_ssub_12_ssub_13 |
| 15891 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15892 | }, |
| 15893 | { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15894 | 116, // dsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15895 | 116, // dsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15896 | 116, // dsub_2 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15897 | 116, // dsub_3 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15898 | 0, // dsub_4 |
| 15899 | 0, // dsub_5 |
| 15900 | 0, // dsub_6 |
| 15901 | 0, // dsub_7 |
| 15902 | 0, // gsub_0 |
| 15903 | 0, // gsub_1 |
| 15904 | 0, // qqsub_0 |
| 15905 | 0, // qqsub_1 |
| 15906 | 116, // qsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15907 | 116, // qsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15908 | 0, // qsub_2 |
| 15909 | 0, // qsub_3 |
| 15910 | 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15911 | 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15912 | 119, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15913 | 119, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15914 | 119, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15915 | 119, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15916 | 122, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15917 | 122, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 15918 | 0, // ssub_8 |
| 15919 | 0, // ssub_9 |
| 15920 | 0, // ssub_10 |
| 15921 | 0, // ssub_11 |
| 15922 | 0, // ssub_12 |
| 15923 | 0, // ssub_13 |
| 15924 | 0, // ssub_14 |
| 15925 | 0, // ssub_15 |
| 15926 | 116, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15927 | 116, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15928 | 116, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15929 | 116, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15930 | 116, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 15931 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15932 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15933 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15934 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15935 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15936 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15937 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15938 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15939 | 0, // ssub_6_ssub_7_dsub_5 |
| 15940 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15941 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 15942 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 15943 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15944 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 15945 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 15946 | 0, // dsub_5_dsub_7 |
| 15947 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 15948 | 0, // dsub_5_ssub_12_ssub_13 |
| 15949 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 15950 | }, |
| 15951 | { // QQPR_with_ssub_0 |
| 15952 | 117, // dsub_0 -> QQPR_with_ssub_0 |
| 15953 | 117, // dsub_1 -> QQPR_with_ssub_0 |
| 15954 | 117, // dsub_2 -> QQPR_with_ssub_0 |
| 15955 | 117, // dsub_3 -> QQPR_with_ssub_0 |
| 15956 | 0, // dsub_4 |
| 15957 | 0, // dsub_5 |
| 15958 | 0, // dsub_6 |
| 15959 | 0, // dsub_7 |
| 15960 | 0, // gsub_0 |
| 15961 | 0, // gsub_1 |
| 15962 | 0, // qqsub_0 |
| 15963 | 0, // qqsub_1 |
| 15964 | 117, // qsub_0 -> QQPR_with_ssub_0 |
| 15965 | 117, // qsub_1 -> QQPR_with_ssub_0 |
| 15966 | 0, // qsub_2 |
| 15967 | 0, // qsub_3 |
| 15968 | 117, // ssub_0 -> QQPR_with_ssub_0 |
| 15969 | 117, // ssub_1 -> QQPR_with_ssub_0 |
| 15970 | 117, // ssub_2 -> QQPR_with_ssub_0 |
| 15971 | 117, // ssub_3 -> QQPR_with_ssub_0 |
| 15972 | 120, // ssub_4 -> MQQPR |
| 15973 | 120, // ssub_5 -> MQQPR |
| 15974 | 120, // ssub_6 -> MQQPR |
| 15975 | 120, // ssub_7 -> MQQPR |
| 15976 | 0, // ssub_8 |
| 15977 | 0, // ssub_9 |
| 15978 | 0, // ssub_10 |
| 15979 | 0, // ssub_11 |
| 15980 | 0, // ssub_12 |
| 15981 | 0, // ssub_13 |
| 15982 | 0, // ssub_14 |
| 15983 | 0, // ssub_15 |
| 15984 | 117, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQPR_with_ssub_0 |
| 15985 | 117, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR_with_ssub_0 |
| 15986 | 117, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQPR_with_ssub_0 |
| 15987 | 117, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQPR_with_ssub_0 |
| 15988 | 117, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR_with_ssub_0 |
| 15989 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 15990 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15991 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 15992 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 15993 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15994 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 15995 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 15996 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 15997 | 0, // ssub_6_ssub_7_dsub_5 |
| 15998 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 15999 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16000 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16001 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16002 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16003 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16004 | 0, // dsub_5_dsub_7 |
| 16005 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16006 | 0, // dsub_5_ssub_12_ssub_13 |
| 16007 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16008 | }, |
| 16009 | { // DQuad_with_dsub_1_in_DPR_8 |
| 16010 | 118, // dsub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 16011 | 118, // dsub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 16012 | 118, // dsub_2 -> DQuad_with_dsub_1_in_DPR_8 |
| 16013 | 118, // dsub_3 -> DQuad_with_dsub_1_in_DPR_8 |
| 16014 | 0, // dsub_4 |
| 16015 | 0, // dsub_5 |
| 16016 | 0, // dsub_6 |
| 16017 | 0, // dsub_7 |
| 16018 | 0, // gsub_0 |
| 16019 | 0, // gsub_1 |
| 16020 | 0, // qqsub_0 |
| 16021 | 0, // qqsub_1 |
| 16022 | 118, // qsub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 16023 | 118, // qsub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 16024 | 0, // qsub_2 |
| 16025 | 0, // qsub_3 |
| 16026 | 118, // ssub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 16027 | 118, // ssub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 16028 | 118, // ssub_2 -> DQuad_with_dsub_1_in_DPR_8 |
| 16029 | 118, // ssub_3 -> DQuad_with_dsub_1_in_DPR_8 |
| 16030 | 118, // ssub_4 -> DQuad_with_dsub_1_in_DPR_8 |
| 16031 | 118, // ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 16032 | 118, // ssub_6 -> DQuad_with_dsub_1_in_DPR_8 |
| 16033 | 118, // ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 16034 | 0, // ssub_8 |
| 16035 | 0, // ssub_9 |
| 16036 | 0, // ssub_10 |
| 16037 | 0, // ssub_11 |
| 16038 | 0, // ssub_12 |
| 16039 | 0, // ssub_13 |
| 16040 | 0, // ssub_14 |
| 16041 | 0, // ssub_15 |
| 16042 | 118, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 16043 | 118, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 16044 | 118, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 16045 | 118, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 16046 | 118, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 16047 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16048 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16049 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16050 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16051 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16052 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16053 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16054 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16055 | 0, // ssub_6_ssub_7_dsub_5 |
| 16056 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16057 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16058 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16059 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16060 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16061 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16062 | 0, // dsub_5_dsub_7 |
| 16063 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16064 | 0, // dsub_5_ssub_12_ssub_13 |
| 16065 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16066 | }, |
| 16067 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16068 | 119, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16069 | 119, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16070 | 119, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16071 | 119, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16072 | 0, // dsub_4 |
| 16073 | 0, // dsub_5 |
| 16074 | 0, // dsub_6 |
| 16075 | 0, // dsub_7 |
| 16076 | 0, // gsub_0 |
| 16077 | 0, // gsub_1 |
| 16078 | 0, // qqsub_0 |
| 16079 | 0, // qqsub_1 |
| 16080 | 119, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16081 | 119, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16082 | 0, // qsub_2 |
| 16083 | 0, // qsub_3 |
| 16084 | 119, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16085 | 119, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16086 | 119, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16087 | 119, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16088 | 119, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16089 | 119, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16090 | 122, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16091 | 122, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16092 | 0, // ssub_8 |
| 16093 | 0, // ssub_9 |
| 16094 | 0, // ssub_10 |
| 16095 | 0, // ssub_11 |
| 16096 | 0, // ssub_12 |
| 16097 | 0, // ssub_13 |
| 16098 | 0, // ssub_14 |
| 16099 | 0, // ssub_15 |
| 16100 | 119, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16101 | 119, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16102 | 119, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16103 | 119, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16104 | 119, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16105 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16106 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16107 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16108 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16109 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16110 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16111 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16112 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16113 | 0, // ssub_6_ssub_7_dsub_5 |
| 16114 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16115 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16116 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16117 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16118 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16119 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16120 | 0, // dsub_5_dsub_7 |
| 16121 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16122 | 0, // dsub_5_ssub_12_ssub_13 |
| 16123 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16124 | }, |
| 16125 | { // MQQPR |
| 16126 | 120, // dsub_0 -> MQQPR |
| 16127 | 120, // dsub_1 -> MQQPR |
| 16128 | 120, // dsub_2 -> MQQPR |
| 16129 | 120, // dsub_3 -> MQQPR |
| 16130 | 0, // dsub_4 |
| 16131 | 0, // dsub_5 |
| 16132 | 0, // dsub_6 |
| 16133 | 0, // dsub_7 |
| 16134 | 0, // gsub_0 |
| 16135 | 0, // gsub_1 |
| 16136 | 0, // qqsub_0 |
| 16137 | 0, // qqsub_1 |
| 16138 | 120, // qsub_0 -> MQQPR |
| 16139 | 120, // qsub_1 -> MQQPR |
| 16140 | 0, // qsub_2 |
| 16141 | 0, // qsub_3 |
| 16142 | 120, // ssub_0 -> MQQPR |
| 16143 | 120, // ssub_1 -> MQQPR |
| 16144 | 120, // ssub_2 -> MQQPR |
| 16145 | 120, // ssub_3 -> MQQPR |
| 16146 | 120, // ssub_4 -> MQQPR |
| 16147 | 120, // ssub_5 -> MQQPR |
| 16148 | 120, // ssub_6 -> MQQPR |
| 16149 | 120, // ssub_7 -> MQQPR |
| 16150 | 0, // ssub_8 |
| 16151 | 0, // ssub_9 |
| 16152 | 0, // ssub_10 |
| 16153 | 0, // ssub_11 |
| 16154 | 0, // ssub_12 |
| 16155 | 0, // ssub_13 |
| 16156 | 0, // ssub_14 |
| 16157 | 0, // ssub_15 |
| 16158 | 120, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQPR |
| 16159 | 120, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR |
| 16160 | 120, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQPR |
| 16161 | 120, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQPR |
| 16162 | 120, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR |
| 16163 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16164 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16165 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16166 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16167 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16168 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16169 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16170 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16171 | 0, // ssub_6_ssub_7_dsub_5 |
| 16172 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16173 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16174 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16175 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16176 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16177 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16178 | 0, // dsub_5_dsub_7 |
| 16179 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16180 | 0, // dsub_5_ssub_12_ssub_13 |
| 16181 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16182 | }, |
| 16183 | { // DQuad_with_dsub_2_in_DPR_8 |
| 16184 | 121, // dsub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 16185 | 121, // dsub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 16186 | 121, // dsub_2 -> DQuad_with_dsub_2_in_DPR_8 |
| 16187 | 121, // dsub_3 -> DQuad_with_dsub_2_in_DPR_8 |
| 16188 | 0, // dsub_4 |
| 16189 | 0, // dsub_5 |
| 16190 | 0, // dsub_6 |
| 16191 | 0, // dsub_7 |
| 16192 | 0, // gsub_0 |
| 16193 | 0, // gsub_1 |
| 16194 | 0, // qqsub_0 |
| 16195 | 0, // qqsub_1 |
| 16196 | 121, // qsub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 16197 | 121, // qsub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 16198 | 0, // qsub_2 |
| 16199 | 0, // qsub_3 |
| 16200 | 121, // ssub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 16201 | 121, // ssub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 16202 | 121, // ssub_2 -> DQuad_with_dsub_2_in_DPR_8 |
| 16203 | 121, // ssub_3 -> DQuad_with_dsub_2_in_DPR_8 |
| 16204 | 121, // ssub_4 -> DQuad_with_dsub_2_in_DPR_8 |
| 16205 | 121, // ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 16206 | 121, // ssub_6 -> DQuad_with_dsub_2_in_DPR_8 |
| 16207 | 121, // ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 16208 | 0, // ssub_8 |
| 16209 | 0, // ssub_9 |
| 16210 | 0, // ssub_10 |
| 16211 | 0, // ssub_11 |
| 16212 | 0, // ssub_12 |
| 16213 | 0, // ssub_13 |
| 16214 | 0, // ssub_14 |
| 16215 | 0, // ssub_15 |
| 16216 | 121, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 16217 | 121, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 16218 | 121, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 16219 | 121, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 16220 | 121, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 16221 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16222 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16223 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16224 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16225 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16226 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16227 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16228 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16229 | 0, // ssub_6_ssub_7_dsub_5 |
| 16230 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16231 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16232 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16233 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16234 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16235 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16236 | 0, // dsub_5_dsub_7 |
| 16237 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16238 | 0, // dsub_5_ssub_12_ssub_13 |
| 16239 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16240 | }, |
| 16241 | { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16242 | 122, // dsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16243 | 122, // dsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16244 | 122, // dsub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16245 | 122, // dsub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16246 | 0, // dsub_4 |
| 16247 | 0, // dsub_5 |
| 16248 | 0, // dsub_6 |
| 16249 | 0, // dsub_7 |
| 16250 | 0, // gsub_0 |
| 16251 | 0, // gsub_1 |
| 16252 | 0, // qqsub_0 |
| 16253 | 0, // qqsub_1 |
| 16254 | 122, // qsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16255 | 122, // qsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16256 | 0, // qsub_2 |
| 16257 | 0, // qsub_3 |
| 16258 | 122, // ssub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16259 | 122, // ssub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16260 | 122, // ssub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16261 | 122, // ssub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16262 | 122, // ssub_4 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16263 | 122, // ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16264 | 122, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16265 | 122, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16266 | 0, // ssub_8 |
| 16267 | 0, // ssub_9 |
| 16268 | 0, // ssub_10 |
| 16269 | 0, // ssub_11 |
| 16270 | 0, // ssub_12 |
| 16271 | 0, // ssub_13 |
| 16272 | 0, // ssub_14 |
| 16273 | 0, // ssub_15 |
| 16274 | 122, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16275 | 122, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16276 | 122, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16277 | 122, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16278 | 122, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16279 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16280 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16281 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16282 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16283 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16284 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16285 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16286 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16287 | 0, // ssub_6_ssub_7_dsub_5 |
| 16288 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16289 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16290 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16291 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16292 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16293 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16294 | 0, // dsub_5_dsub_7 |
| 16295 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16296 | 0, // dsub_5_ssub_12_ssub_13 |
| 16297 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16298 | }, |
| 16299 | { // DQuad_with_dsub_3_in_DPR_8 |
| 16300 | 123, // dsub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 16301 | 123, // dsub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 16302 | 123, // dsub_2 -> DQuad_with_dsub_3_in_DPR_8 |
| 16303 | 123, // dsub_3 -> DQuad_with_dsub_3_in_DPR_8 |
| 16304 | 0, // dsub_4 |
| 16305 | 0, // dsub_5 |
| 16306 | 0, // dsub_6 |
| 16307 | 0, // dsub_7 |
| 16308 | 0, // gsub_0 |
| 16309 | 0, // gsub_1 |
| 16310 | 0, // qqsub_0 |
| 16311 | 0, // qqsub_1 |
| 16312 | 123, // qsub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 16313 | 123, // qsub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 16314 | 0, // qsub_2 |
| 16315 | 0, // qsub_3 |
| 16316 | 123, // ssub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 16317 | 123, // ssub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 16318 | 123, // ssub_2 -> DQuad_with_dsub_3_in_DPR_8 |
| 16319 | 123, // ssub_3 -> DQuad_with_dsub_3_in_DPR_8 |
| 16320 | 123, // ssub_4 -> DQuad_with_dsub_3_in_DPR_8 |
| 16321 | 123, // ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 16322 | 123, // ssub_6 -> DQuad_with_dsub_3_in_DPR_8 |
| 16323 | 123, // ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 16324 | 0, // ssub_8 |
| 16325 | 0, // ssub_9 |
| 16326 | 0, // ssub_10 |
| 16327 | 0, // ssub_11 |
| 16328 | 0, // ssub_12 |
| 16329 | 0, // ssub_13 |
| 16330 | 0, // ssub_14 |
| 16331 | 0, // ssub_15 |
| 16332 | 123, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 16333 | 123, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 16334 | 123, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 16335 | 123, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 16336 | 123, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 16337 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16338 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16339 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16340 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16341 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16342 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16343 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16344 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16345 | 0, // ssub_6_ssub_7_dsub_5 |
| 16346 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16347 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16348 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16349 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16350 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16351 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16352 | 0, // dsub_5_dsub_7 |
| 16353 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16354 | 0, // dsub_5_ssub_12_ssub_13 |
| 16355 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16356 | }, |
| 16357 | { // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16358 | 124, // dsub_0 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16359 | 124, // dsub_1 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16360 | 124, // dsub_2 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16361 | 124, // dsub_3 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16362 | 0, // dsub_4 |
| 16363 | 0, // dsub_5 |
| 16364 | 0, // dsub_6 |
| 16365 | 0, // dsub_7 |
| 16366 | 0, // gsub_0 |
| 16367 | 0, // gsub_1 |
| 16368 | 0, // qqsub_0 |
| 16369 | 0, // qqsub_1 |
| 16370 | 124, // qsub_0 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16371 | 124, // qsub_1 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16372 | 0, // qsub_2 |
| 16373 | 0, // qsub_3 |
| 16374 | 124, // ssub_0 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16375 | 124, // ssub_1 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16376 | 124, // ssub_2 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16377 | 124, // ssub_3 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16378 | 124, // ssub_4 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16379 | 124, // ssub_5 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16380 | 124, // ssub_6 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16381 | 124, // ssub_7 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16382 | 0, // ssub_8 |
| 16383 | 0, // ssub_9 |
| 16384 | 0, // ssub_10 |
| 16385 | 0, // ssub_11 |
| 16386 | 0, // ssub_12 |
| 16387 | 0, // ssub_13 |
| 16388 | 0, // ssub_14 |
| 16389 | 0, // ssub_15 |
| 16390 | 124, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16391 | 124, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16392 | 124, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16393 | 124, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16394 | 124, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 16395 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16396 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16397 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16398 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16399 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16400 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16401 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16402 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16403 | 0, // ssub_6_ssub_7_dsub_5 |
| 16404 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16405 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16406 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16407 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16408 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16409 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16410 | 0, // dsub_5_dsub_7 |
| 16411 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16412 | 0, // dsub_5_ssub_12_ssub_13 |
| 16413 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16414 | }, |
| 16415 | { // MQQPR_with_qsub_0_in_QPR_8 |
| 16416 | 125, // dsub_0 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16417 | 125, // dsub_1 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16418 | 125, // dsub_2 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16419 | 125, // dsub_3 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16420 | 0, // dsub_4 |
| 16421 | 0, // dsub_5 |
| 16422 | 0, // dsub_6 |
| 16423 | 0, // dsub_7 |
| 16424 | 0, // gsub_0 |
| 16425 | 0, // gsub_1 |
| 16426 | 0, // qqsub_0 |
| 16427 | 0, // qqsub_1 |
| 16428 | 125, // qsub_0 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16429 | 125, // qsub_1 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16430 | 0, // qsub_2 |
| 16431 | 0, // qsub_3 |
| 16432 | 125, // ssub_0 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16433 | 125, // ssub_1 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16434 | 125, // ssub_2 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16435 | 125, // ssub_3 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16436 | 125, // ssub_4 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16437 | 125, // ssub_5 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16438 | 125, // ssub_6 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16439 | 125, // ssub_7 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16440 | 0, // ssub_8 |
| 16441 | 0, // ssub_9 |
| 16442 | 0, // ssub_10 |
| 16443 | 0, // ssub_11 |
| 16444 | 0, // ssub_12 |
| 16445 | 0, // ssub_13 |
| 16446 | 0, // ssub_14 |
| 16447 | 0, // ssub_15 |
| 16448 | 125, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16449 | 125, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16450 | 125, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16451 | 125, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16452 | 125, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR_with_qsub_0_in_QPR_8 |
| 16453 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16454 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16455 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16456 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16457 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16458 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16459 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16460 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16461 | 0, // ssub_6_ssub_7_dsub_5 |
| 16462 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16463 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16464 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16465 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16466 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16467 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16468 | 0, // dsub_5_dsub_7 |
| 16469 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16470 | 0, // dsub_5_ssub_12_ssub_13 |
| 16471 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16472 | }, |
| 16473 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16474 | 126, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16475 | 126, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16476 | 126, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16477 | 126, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16478 | 0, // dsub_4 |
| 16479 | 0, // dsub_5 |
| 16480 | 0, // dsub_6 |
| 16481 | 0, // dsub_7 |
| 16482 | 0, // gsub_0 |
| 16483 | 0, // gsub_1 |
| 16484 | 0, // qqsub_0 |
| 16485 | 0, // qqsub_1 |
| 16486 | 126, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16487 | 126, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16488 | 0, // qsub_2 |
| 16489 | 0, // qsub_3 |
| 16490 | 126, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16491 | 126, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16492 | 126, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16493 | 126, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16494 | 126, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16495 | 126, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16496 | 126, // ssub_6 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16497 | 126, // ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16498 | 0, // ssub_8 |
| 16499 | 0, // ssub_9 |
| 16500 | 0, // ssub_10 |
| 16501 | 0, // ssub_11 |
| 16502 | 0, // ssub_12 |
| 16503 | 0, // ssub_13 |
| 16504 | 0, // ssub_14 |
| 16505 | 0, // ssub_15 |
| 16506 | 126, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16507 | 126, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16508 | 126, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16509 | 126, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16510 | 126, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 16511 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16512 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16513 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16514 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16515 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16516 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16517 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16518 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16519 | 0, // ssub_6_ssub_7_dsub_5 |
| 16520 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16521 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16522 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16523 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16524 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16525 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16526 | 0, // dsub_5_dsub_7 |
| 16527 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16528 | 0, // dsub_5_ssub_12_ssub_13 |
| 16529 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16530 | }, |
| 16531 | { // MQQPR_with_dsub_2_in_DPR_8 |
| 16532 | 127, // dsub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16533 | 127, // dsub_1 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16534 | 127, // dsub_2 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16535 | 127, // dsub_3 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16536 | 0, // dsub_4 |
| 16537 | 0, // dsub_5 |
| 16538 | 0, // dsub_6 |
| 16539 | 0, // dsub_7 |
| 16540 | 0, // gsub_0 |
| 16541 | 0, // gsub_1 |
| 16542 | 0, // qqsub_0 |
| 16543 | 0, // qqsub_1 |
| 16544 | 127, // qsub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16545 | 127, // qsub_1 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16546 | 0, // qsub_2 |
| 16547 | 0, // qsub_3 |
| 16548 | 127, // ssub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16549 | 127, // ssub_1 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16550 | 127, // ssub_2 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16551 | 127, // ssub_3 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16552 | 127, // ssub_4 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16553 | 127, // ssub_5 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16554 | 127, // ssub_6 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16555 | 127, // ssub_7 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16556 | 0, // ssub_8 |
| 16557 | 0, // ssub_9 |
| 16558 | 0, // ssub_10 |
| 16559 | 0, // ssub_11 |
| 16560 | 0, // ssub_12 |
| 16561 | 0, // ssub_13 |
| 16562 | 0, // ssub_14 |
| 16563 | 0, // ssub_15 |
| 16564 | 127, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16565 | 127, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16566 | 127, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16567 | 127, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16568 | 127, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR_with_dsub_2_in_DPR_8 |
| 16569 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16570 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16571 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16572 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16573 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16574 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16575 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16576 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16577 | 0, // ssub_6_ssub_7_dsub_5 |
| 16578 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16579 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16580 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16581 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16582 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16583 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16584 | 0, // dsub_5_dsub_7 |
| 16585 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16586 | 0, // dsub_5_ssub_12_ssub_13 |
| 16587 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16588 | }, |
| 16589 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16590 | 128, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16591 | 128, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16592 | 128, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16593 | 128, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16594 | 0, // dsub_4 |
| 16595 | 0, // dsub_5 |
| 16596 | 0, // dsub_6 |
| 16597 | 0, // dsub_7 |
| 16598 | 0, // gsub_0 |
| 16599 | 0, // gsub_1 |
| 16600 | 0, // qqsub_0 |
| 16601 | 0, // qqsub_1 |
| 16602 | 128, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16603 | 128, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16604 | 0, // qsub_2 |
| 16605 | 0, // qsub_3 |
| 16606 | 128, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16607 | 128, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16608 | 128, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16609 | 128, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16610 | 128, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16611 | 128, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16612 | 128, // ssub_6 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16613 | 128, // ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16614 | 0, // ssub_8 |
| 16615 | 0, // ssub_9 |
| 16616 | 0, // ssub_10 |
| 16617 | 0, // ssub_11 |
| 16618 | 0, // ssub_12 |
| 16619 | 0, // ssub_13 |
| 16620 | 0, // ssub_14 |
| 16621 | 0, // ssub_15 |
| 16622 | 128, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16623 | 128, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16624 | 128, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16625 | 128, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16626 | 128, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 16627 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 16628 | 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16629 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 16630 | 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 16631 | 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16632 | 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 16633 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 16634 | 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 16635 | 0, // ssub_6_ssub_7_dsub_5 |
| 16636 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 16637 | 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 16638 | 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 16639 | 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16640 | 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 16641 | 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 16642 | 0, // dsub_5_dsub_7 |
| 16643 | 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 16644 | 0, // dsub_5_ssub_12_ssub_13 |
| 16645 | 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 16646 | }, |
| 16647 | { // QQQQPR |
| 16648 | 129, // dsub_0 -> QQQQPR |
| 16649 | 129, // dsub_1 -> QQQQPR |
| 16650 | 129, // dsub_2 -> QQQQPR |
| 16651 | 129, // dsub_3 -> QQQQPR |
| 16652 | 129, // dsub_4 -> QQQQPR |
| 16653 | 129, // dsub_5 -> QQQQPR |
| 16654 | 129, // dsub_6 -> QQQQPR |
| 16655 | 129, // dsub_7 -> QQQQPR |
| 16656 | 0, // gsub_0 |
| 16657 | 0, // gsub_1 |
| 16658 | 129, // qqsub_0 -> QQQQPR |
| 16659 | 129, // qqsub_1 -> QQQQPR |
| 16660 | 129, // qsub_0 -> QQQQPR |
| 16661 | 129, // qsub_1 -> QQQQPR |
| 16662 | 129, // qsub_2 -> QQQQPR |
| 16663 | 129, // qsub_3 -> QQQQPR |
| 16664 | 130, // ssub_0 -> QQQQPR_with_ssub_0 |
| 16665 | 130, // ssub_1 -> QQQQPR_with_ssub_0 |
| 16666 | 130, // ssub_2 -> QQQQPR_with_ssub_0 |
| 16667 | 130, // ssub_3 -> QQQQPR_with_ssub_0 |
| 16668 | 131, // ssub_4 -> QQQQPR_with_ssub_4 |
| 16669 | 131, // ssub_5 -> QQQQPR_with_ssub_4 |
| 16670 | 131, // ssub_6 -> QQQQPR_with_ssub_4 |
| 16671 | 131, // ssub_7 -> QQQQPR_with_ssub_4 |
| 16672 | 132, // ssub_8 -> QQQQPR_with_ssub_8 |
| 16673 | 132, // ssub_9 -> QQQQPR_with_ssub_8 |
| 16674 | 132, // ssub_10 -> QQQQPR_with_ssub_8 |
| 16675 | 132, // ssub_11 -> QQQQPR_with_ssub_8 |
| 16676 | 133, // ssub_12 -> MQQQQPR |
| 16677 | 133, // ssub_13 -> MQQQQPR |
| 16678 | 133, // ssub_14 -> MQQQQPR |
| 16679 | 133, // ssub_15 -> MQQQQPR |
| 16680 | 129, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR |
| 16681 | 129, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR |
| 16682 | 129, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR |
| 16683 | 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR |
| 16684 | 129, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR |
| 16685 | 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR |
| 16686 | 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 16687 | 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR |
| 16688 | 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR |
| 16689 | 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 16690 | 129, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR |
| 16691 | 129, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 16692 | 129, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 16693 | 129, // ssub_6_ssub_7_dsub_5 -> QQQQPR |
| 16694 | 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR |
| 16695 | 129, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR |
| 16696 | 129, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 16697 | 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 16698 | 129, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 16699 | 129, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 16700 | 129, // dsub_5_dsub_7 -> QQQQPR |
| 16701 | 129, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR |
| 16702 | 129, // dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 16703 | 129, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR |
| 16704 | }, |
| 16705 | { // QQQQPR_with_ssub_0 |
| 16706 | 130, // dsub_0 -> QQQQPR_with_ssub_0 |
| 16707 | 130, // dsub_1 -> QQQQPR_with_ssub_0 |
| 16708 | 130, // dsub_2 -> QQQQPR_with_ssub_0 |
| 16709 | 130, // dsub_3 -> QQQQPR_with_ssub_0 |
| 16710 | 130, // dsub_4 -> QQQQPR_with_ssub_0 |
| 16711 | 130, // dsub_5 -> QQQQPR_with_ssub_0 |
| 16712 | 130, // dsub_6 -> QQQQPR_with_ssub_0 |
| 16713 | 130, // dsub_7 -> QQQQPR_with_ssub_0 |
| 16714 | 0, // gsub_0 |
| 16715 | 0, // gsub_1 |
| 16716 | 130, // qqsub_0 -> QQQQPR_with_ssub_0 |
| 16717 | 130, // qqsub_1 -> QQQQPR_with_ssub_0 |
| 16718 | 130, // qsub_0 -> QQQQPR_with_ssub_0 |
| 16719 | 130, // qsub_1 -> QQQQPR_with_ssub_0 |
| 16720 | 130, // qsub_2 -> QQQQPR_with_ssub_0 |
| 16721 | 130, // qsub_3 -> QQQQPR_with_ssub_0 |
| 16722 | 130, // ssub_0 -> QQQQPR_with_ssub_0 |
| 16723 | 130, // ssub_1 -> QQQQPR_with_ssub_0 |
| 16724 | 130, // ssub_2 -> QQQQPR_with_ssub_0 |
| 16725 | 130, // ssub_3 -> QQQQPR_with_ssub_0 |
| 16726 | 131, // ssub_4 -> QQQQPR_with_ssub_4 |
| 16727 | 131, // ssub_5 -> QQQQPR_with_ssub_4 |
| 16728 | 131, // ssub_6 -> QQQQPR_with_ssub_4 |
| 16729 | 131, // ssub_7 -> QQQQPR_with_ssub_4 |
| 16730 | 132, // ssub_8 -> QQQQPR_with_ssub_8 |
| 16731 | 132, // ssub_9 -> QQQQPR_with_ssub_8 |
| 16732 | 132, // ssub_10 -> QQQQPR_with_ssub_8 |
| 16733 | 132, // ssub_11 -> QQQQPR_with_ssub_8 |
| 16734 | 133, // ssub_12 -> MQQQQPR |
| 16735 | 133, // ssub_13 -> MQQQQPR |
| 16736 | 133, // ssub_14 -> MQQQQPR |
| 16737 | 133, // ssub_15 -> MQQQQPR |
| 16738 | 130, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 16739 | 130, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 16740 | 130, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_0 |
| 16741 | 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_0 |
| 16742 | 130, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 16743 | 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 16744 | 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16745 | 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0 |
| 16746 | 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 16747 | 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 16748 | 130, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 16749 | 130, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 16750 | 130, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16751 | 130, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0 |
| 16752 | 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_0 |
| 16753 | 130, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 16754 | 130, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 16755 | 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16756 | 130, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16757 | 130, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16758 | 130, // dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 16759 | 130, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_0 |
| 16760 | 130, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 16761 | 130, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_0 |
| 16762 | }, |
| 16763 | { // QQQQPR_with_ssub_4 |
| 16764 | 131, // dsub_0 -> QQQQPR_with_ssub_4 |
| 16765 | 131, // dsub_1 -> QQQQPR_with_ssub_4 |
| 16766 | 131, // dsub_2 -> QQQQPR_with_ssub_4 |
| 16767 | 131, // dsub_3 -> QQQQPR_with_ssub_4 |
| 16768 | 131, // dsub_4 -> QQQQPR_with_ssub_4 |
| 16769 | 131, // dsub_5 -> QQQQPR_with_ssub_4 |
| 16770 | 131, // dsub_6 -> QQQQPR_with_ssub_4 |
| 16771 | 131, // dsub_7 -> QQQQPR_with_ssub_4 |
| 16772 | 0, // gsub_0 |
| 16773 | 0, // gsub_1 |
| 16774 | 131, // qqsub_0 -> QQQQPR_with_ssub_4 |
| 16775 | 131, // qqsub_1 -> QQQQPR_with_ssub_4 |
| 16776 | 131, // qsub_0 -> QQQQPR_with_ssub_4 |
| 16777 | 131, // qsub_1 -> QQQQPR_with_ssub_4 |
| 16778 | 131, // qsub_2 -> QQQQPR_with_ssub_4 |
| 16779 | 131, // qsub_3 -> QQQQPR_with_ssub_4 |
| 16780 | 131, // ssub_0 -> QQQQPR_with_ssub_4 |
| 16781 | 131, // ssub_1 -> QQQQPR_with_ssub_4 |
| 16782 | 131, // ssub_2 -> QQQQPR_with_ssub_4 |
| 16783 | 131, // ssub_3 -> QQQQPR_with_ssub_4 |
| 16784 | 131, // ssub_4 -> QQQQPR_with_ssub_4 |
| 16785 | 131, // ssub_5 -> QQQQPR_with_ssub_4 |
| 16786 | 131, // ssub_6 -> QQQQPR_with_ssub_4 |
| 16787 | 131, // ssub_7 -> QQQQPR_with_ssub_4 |
| 16788 | 132, // ssub_8 -> QQQQPR_with_ssub_8 |
| 16789 | 132, // ssub_9 -> QQQQPR_with_ssub_8 |
| 16790 | 132, // ssub_10 -> QQQQPR_with_ssub_8 |
| 16791 | 132, // ssub_11 -> QQQQPR_with_ssub_8 |
| 16792 | 133, // ssub_12 -> MQQQQPR |
| 16793 | 133, // ssub_13 -> MQQQQPR |
| 16794 | 133, // ssub_14 -> MQQQQPR |
| 16795 | 133, // ssub_15 -> MQQQQPR |
| 16796 | 131, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 16797 | 131, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 16798 | 131, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_4 |
| 16799 | 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_4 |
| 16800 | 131, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 16801 | 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 16802 | 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16803 | 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4 |
| 16804 | 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 16805 | 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 16806 | 131, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 16807 | 131, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 16808 | 131, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16809 | 131, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4 |
| 16810 | 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_4 |
| 16811 | 131, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 16812 | 131, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 16813 | 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16814 | 131, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16815 | 131, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16816 | 131, // dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 16817 | 131, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_4 |
| 16818 | 131, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 16819 | 131, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_4 |
| 16820 | }, |
| 16821 | { // QQQQPR_with_ssub_8 |
| 16822 | 132, // dsub_0 -> QQQQPR_with_ssub_8 |
| 16823 | 132, // dsub_1 -> QQQQPR_with_ssub_8 |
| 16824 | 132, // dsub_2 -> QQQQPR_with_ssub_8 |
| 16825 | 132, // dsub_3 -> QQQQPR_with_ssub_8 |
| 16826 | 132, // dsub_4 -> QQQQPR_with_ssub_8 |
| 16827 | 132, // dsub_5 -> QQQQPR_with_ssub_8 |
| 16828 | 132, // dsub_6 -> QQQQPR_with_ssub_8 |
| 16829 | 132, // dsub_7 -> QQQQPR_with_ssub_8 |
| 16830 | 0, // gsub_0 |
| 16831 | 0, // gsub_1 |
| 16832 | 132, // qqsub_0 -> QQQQPR_with_ssub_8 |
| 16833 | 132, // qqsub_1 -> QQQQPR_with_ssub_8 |
| 16834 | 132, // qsub_0 -> QQQQPR_with_ssub_8 |
| 16835 | 132, // qsub_1 -> QQQQPR_with_ssub_8 |
| 16836 | 132, // qsub_2 -> QQQQPR_with_ssub_8 |
| 16837 | 132, // qsub_3 -> QQQQPR_with_ssub_8 |
| 16838 | 132, // ssub_0 -> QQQQPR_with_ssub_8 |
| 16839 | 132, // ssub_1 -> QQQQPR_with_ssub_8 |
| 16840 | 132, // ssub_2 -> QQQQPR_with_ssub_8 |
| 16841 | 132, // ssub_3 -> QQQQPR_with_ssub_8 |
| 16842 | 132, // ssub_4 -> QQQQPR_with_ssub_8 |
| 16843 | 132, // ssub_5 -> QQQQPR_with_ssub_8 |
| 16844 | 132, // ssub_6 -> QQQQPR_with_ssub_8 |
| 16845 | 132, // ssub_7 -> QQQQPR_with_ssub_8 |
| 16846 | 132, // ssub_8 -> QQQQPR_with_ssub_8 |
| 16847 | 132, // ssub_9 -> QQQQPR_with_ssub_8 |
| 16848 | 132, // ssub_10 -> QQQQPR_with_ssub_8 |
| 16849 | 132, // ssub_11 -> QQQQPR_with_ssub_8 |
| 16850 | 133, // ssub_12 -> MQQQQPR |
| 16851 | 133, // ssub_13 -> MQQQQPR |
| 16852 | 133, // ssub_14 -> MQQQQPR |
| 16853 | 133, // ssub_15 -> MQQQQPR |
| 16854 | 132, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 16855 | 132, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 16856 | 132, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_8 |
| 16857 | 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_8 |
| 16858 | 132, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 16859 | 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 16860 | 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16861 | 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8 |
| 16862 | 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 16863 | 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 16864 | 132, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 16865 | 132, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 16866 | 132, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16867 | 132, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8 |
| 16868 | 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_8 |
| 16869 | 132, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 16870 | 132, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 16871 | 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16872 | 132, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16873 | 132, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16874 | 132, // dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 16875 | 132, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_8 |
| 16876 | 132, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 16877 | 132, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_8 |
| 16878 | }, |
| 16879 | { // MQQQQPR |
| 16880 | 133, // dsub_0 -> MQQQQPR |
| 16881 | 133, // dsub_1 -> MQQQQPR |
| 16882 | 133, // dsub_2 -> MQQQQPR |
| 16883 | 133, // dsub_3 -> MQQQQPR |
| 16884 | 133, // dsub_4 -> MQQQQPR |
| 16885 | 133, // dsub_5 -> MQQQQPR |
| 16886 | 133, // dsub_6 -> MQQQQPR |
| 16887 | 133, // dsub_7 -> MQQQQPR |
| 16888 | 0, // gsub_0 |
| 16889 | 0, // gsub_1 |
| 16890 | 133, // qqsub_0 -> MQQQQPR |
| 16891 | 133, // qqsub_1 -> MQQQQPR |
| 16892 | 133, // qsub_0 -> MQQQQPR |
| 16893 | 133, // qsub_1 -> MQQQQPR |
| 16894 | 133, // qsub_2 -> MQQQQPR |
| 16895 | 133, // qsub_3 -> MQQQQPR |
| 16896 | 133, // ssub_0 -> MQQQQPR |
| 16897 | 133, // ssub_1 -> MQQQQPR |
| 16898 | 133, // ssub_2 -> MQQQQPR |
| 16899 | 133, // ssub_3 -> MQQQQPR |
| 16900 | 133, // ssub_4 -> MQQQQPR |
| 16901 | 133, // ssub_5 -> MQQQQPR |
| 16902 | 133, // ssub_6 -> MQQQQPR |
| 16903 | 133, // ssub_7 -> MQQQQPR |
| 16904 | 133, // ssub_8 -> MQQQQPR |
| 16905 | 133, // ssub_9 -> MQQQQPR |
| 16906 | 133, // ssub_10 -> MQQQQPR |
| 16907 | 133, // ssub_11 -> MQQQQPR |
| 16908 | 133, // ssub_12 -> MQQQQPR |
| 16909 | 133, // ssub_13 -> MQQQQPR |
| 16910 | 133, // ssub_14 -> MQQQQPR |
| 16911 | 133, // ssub_15 -> MQQQQPR |
| 16912 | 133, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR |
| 16913 | 133, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR |
| 16914 | 133, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR |
| 16915 | 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR |
| 16916 | 133, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR |
| 16917 | 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR |
| 16918 | 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 16919 | 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR |
| 16920 | 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR |
| 16921 | 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 16922 | 133, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR |
| 16923 | 133, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 16924 | 133, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 16925 | 133, // ssub_6_ssub_7_dsub_5 -> MQQQQPR |
| 16926 | 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR |
| 16927 | 133, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR |
| 16928 | 133, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 16929 | 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 16930 | 133, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 16931 | 133, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 16932 | 133, // dsub_5_dsub_7 -> MQQQQPR |
| 16933 | 133, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR |
| 16934 | 133, // dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 16935 | 133, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR |
| 16936 | }, |
| 16937 | { // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16938 | 134, // dsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16939 | 134, // dsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16940 | 134, // dsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16941 | 134, // dsub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16942 | 134, // dsub_4 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16943 | 134, // dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16944 | 134, // dsub_6 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16945 | 134, // dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16946 | 0, // gsub_0 |
| 16947 | 0, // gsub_1 |
| 16948 | 134, // qqsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16949 | 134, // qqsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16950 | 134, // qsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16951 | 134, // qsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16952 | 134, // qsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16953 | 134, // qsub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16954 | 134, // ssub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16955 | 134, // ssub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16956 | 134, // ssub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16957 | 134, // ssub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16958 | 134, // ssub_4 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16959 | 134, // ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16960 | 134, // ssub_6 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16961 | 134, // ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16962 | 134, // ssub_8 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16963 | 134, // ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16964 | 134, // ssub_10 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16965 | 134, // ssub_11 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16966 | 134, // ssub_12 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16967 | 134, // ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16968 | 134, // ssub_14 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16969 | 134, // ssub_15 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16970 | 134, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16971 | 134, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16972 | 134, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16973 | 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16974 | 134, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16975 | 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16976 | 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16977 | 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16978 | 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16979 | 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16980 | 134, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16981 | 134, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16982 | 134, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16983 | 134, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16984 | 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16985 | 134, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16986 | 134, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16987 | 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16988 | 134, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16989 | 134, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16990 | 134, // dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16991 | 134, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16992 | 134, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16993 | 134, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 16994 | }, |
| 16995 | { // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 16996 | 135, // dsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 16997 | 135, // dsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 16998 | 135, // dsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 16999 | 135, // dsub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17000 | 135, // dsub_4 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17001 | 135, // dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17002 | 135, // dsub_6 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17003 | 135, // dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17004 | 0, // gsub_0 |
| 17005 | 0, // gsub_1 |
| 17006 | 135, // qqsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17007 | 135, // qqsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17008 | 135, // qsub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17009 | 135, // qsub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17010 | 135, // qsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17011 | 135, // qsub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17012 | 135, // ssub_0 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17013 | 135, // ssub_1 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17014 | 135, // ssub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17015 | 135, // ssub_3 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17016 | 135, // ssub_4 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17017 | 135, // ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17018 | 135, // ssub_6 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17019 | 135, // ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17020 | 135, // ssub_8 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17021 | 135, // ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17022 | 135, // ssub_10 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17023 | 135, // ssub_11 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17024 | 135, // ssub_12 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17025 | 135, // ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17026 | 135, // ssub_14 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17027 | 135, // ssub_15 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17028 | 135, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17029 | 135, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17030 | 135, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17031 | 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17032 | 135, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17033 | 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17034 | 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17035 | 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17036 | 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17037 | 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17038 | 135, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17039 | 135, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17040 | 135, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17041 | 135, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17042 | 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17043 | 135, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17044 | 135, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17045 | 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17046 | 135, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17047 | 135, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17048 | 135, // dsub_5_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17049 | 135, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17050 | 135, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17051 | 135, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17052 | }, |
| 17053 | { // MQQQQPR_with_qsub_2_in_QPR_8 |
| 17054 | 136, // dsub_0 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17055 | 136, // dsub_1 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17056 | 136, // dsub_2 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17057 | 136, // dsub_3 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17058 | 136, // dsub_4 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17059 | 136, // dsub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17060 | 136, // dsub_6 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17061 | 136, // dsub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17062 | 0, // gsub_0 |
| 17063 | 0, // gsub_1 |
| 17064 | 136, // qqsub_0 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17065 | 136, // qqsub_1 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17066 | 136, // qsub_0 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17067 | 136, // qsub_1 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17068 | 136, // qsub_2 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17069 | 136, // qsub_3 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17070 | 136, // ssub_0 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17071 | 136, // ssub_1 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17072 | 136, // ssub_2 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17073 | 136, // ssub_3 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17074 | 136, // ssub_4 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17075 | 136, // ssub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17076 | 136, // ssub_6 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17077 | 136, // ssub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17078 | 136, // ssub_8 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17079 | 136, // ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17080 | 136, // ssub_10 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17081 | 136, // ssub_11 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17082 | 136, // ssub_12 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17083 | 136, // ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17084 | 136, // ssub_14 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17085 | 136, // ssub_15 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17086 | 136, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17087 | 136, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17088 | 136, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17089 | 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17090 | 136, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17091 | 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17092 | 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17093 | 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17094 | 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17095 | 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17096 | 136, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17097 | 136, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17098 | 136, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17099 | 136, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17100 | 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17101 | 136, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17102 | 136, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17103 | 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17104 | 136, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17105 | 136, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17106 | 136, // dsub_5_dsub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17107 | 136, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17108 | 136, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17109 | 136, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_qsub_2_in_QPR_8 |
| 17110 | }, |
| 17111 | { // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17112 | 137, // dsub_0 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17113 | 137, // dsub_1 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17114 | 137, // dsub_2 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17115 | 137, // dsub_3 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17116 | 137, // dsub_4 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17117 | 137, // dsub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17118 | 137, // dsub_6 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17119 | 137, // dsub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17120 | 0, // gsub_0 |
| 17121 | 0, // gsub_1 |
| 17122 | 137, // qqsub_0 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17123 | 137, // qqsub_1 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17124 | 137, // qsub_0 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17125 | 137, // qsub_1 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17126 | 137, // qsub_2 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17127 | 137, // qsub_3 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17128 | 137, // ssub_0 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17129 | 137, // ssub_1 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17130 | 137, // ssub_2 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17131 | 137, // ssub_3 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17132 | 137, // ssub_4 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17133 | 137, // ssub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17134 | 137, // ssub_6 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17135 | 137, // ssub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17136 | 137, // ssub_8 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17137 | 137, // ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17138 | 137, // ssub_10 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17139 | 137, // ssub_11 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17140 | 137, // ssub_12 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17141 | 137, // ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17142 | 137, // ssub_14 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17143 | 137, // ssub_15 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17144 | 137, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17145 | 137, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17146 | 137, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17147 | 137, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17148 | 137, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17149 | 137, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17150 | 137, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17151 | 137, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17152 | 137, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17153 | 137, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17154 | 137, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17155 | 137, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17156 | 137, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17157 | 137, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17158 | 137, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17159 | 137, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17160 | 137, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17161 | 137, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17162 | 137, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17163 | 137, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17164 | 137, // dsub_5_dsub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17165 | 137, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17166 | 137, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17167 | 137, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 17168 | }, |
| 17169 | }; |
| 17170 | assert(RC && "Missing regclass" ); |
| 17171 | if (!Idx) return RC; |
| 17172 | --Idx; |
| 17173 | assert(Idx < 56 && "Bad subreg" ); |
| 17174 | unsigned TV = Table[RC->getID()][Idx]; |
| 17175 | return TV ? getRegClass(TV - 1) : nullptr; |
| 17176 | } |
| 17177 | |
| 17178 | const TargetRegisterClass *ARMGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const { |
| 17179 | static const uint8_t Table[137][56] = { |
| 17180 | { // HPR |
| 17181 | 0, // HPR:dsub_0 |
| 17182 | 0, // HPR:dsub_1 |
| 17183 | 0, // HPR:dsub_2 |
| 17184 | 0, // HPR:dsub_3 |
| 17185 | 0, // HPR:dsub_4 |
| 17186 | 0, // HPR:dsub_5 |
| 17187 | 0, // HPR:dsub_6 |
| 17188 | 0, // HPR:dsub_7 |
| 17189 | 0, // HPR:gsub_0 |
| 17190 | 0, // HPR:gsub_1 |
| 17191 | 0, // HPR:qqsub_0 |
| 17192 | 0, // HPR:qqsub_1 |
| 17193 | 0, // HPR:qsub_0 |
| 17194 | 0, // HPR:qsub_1 |
| 17195 | 0, // HPR:qsub_2 |
| 17196 | 0, // HPR:qsub_3 |
| 17197 | 0, // HPR:ssub_0 |
| 17198 | 0, // HPR:ssub_1 |
| 17199 | 0, // HPR:ssub_2 |
| 17200 | 0, // HPR:ssub_3 |
| 17201 | 0, // HPR:ssub_4 |
| 17202 | 0, // HPR:ssub_5 |
| 17203 | 0, // HPR:ssub_6 |
| 17204 | 0, // HPR:ssub_7 |
| 17205 | 0, // HPR:ssub_8 |
| 17206 | 0, // HPR:ssub_9 |
| 17207 | 0, // HPR:ssub_10 |
| 17208 | 0, // HPR:ssub_11 |
| 17209 | 0, // HPR:ssub_12 |
| 17210 | 0, // HPR:ssub_13 |
| 17211 | 0, // HPR:ssub_14 |
| 17212 | 0, // HPR:ssub_15 |
| 17213 | 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17214 | 0, // HPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17215 | 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17216 | 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17217 | 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17218 | 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17219 | 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17220 | 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17221 | 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17222 | 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17223 | 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17224 | 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17225 | 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17226 | 0, // HPR:ssub_6_ssub_7_dsub_5 |
| 17227 | 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17228 | 0, // HPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17229 | 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17230 | 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17231 | 0, // HPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17232 | 0, // HPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17233 | 0, // HPR:dsub_5_dsub_7 |
| 17234 | 0, // HPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17235 | 0, // HPR:dsub_5_ssub_12_ssub_13 |
| 17236 | 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17237 | }, |
| 17238 | { // FPWithVPR |
| 17239 | 0, // FPWithVPR:dsub_0 |
| 17240 | 0, // FPWithVPR:dsub_1 |
| 17241 | 0, // FPWithVPR:dsub_2 |
| 17242 | 0, // FPWithVPR:dsub_3 |
| 17243 | 0, // FPWithVPR:dsub_4 |
| 17244 | 0, // FPWithVPR:dsub_5 |
| 17245 | 0, // FPWithVPR:dsub_6 |
| 17246 | 0, // FPWithVPR:dsub_7 |
| 17247 | 0, // FPWithVPR:gsub_0 |
| 17248 | 0, // FPWithVPR:gsub_1 |
| 17249 | 0, // FPWithVPR:qqsub_0 |
| 17250 | 0, // FPWithVPR:qqsub_1 |
| 17251 | 0, // FPWithVPR:qsub_0 |
| 17252 | 0, // FPWithVPR:qsub_1 |
| 17253 | 0, // FPWithVPR:qsub_2 |
| 17254 | 0, // FPWithVPR:qsub_3 |
| 17255 | 3, // FPWithVPR:ssub_0 -> SPR |
| 17256 | 3, // FPWithVPR:ssub_1 -> SPR |
| 17257 | 0, // FPWithVPR:ssub_2 |
| 17258 | 0, // FPWithVPR:ssub_3 |
| 17259 | 0, // FPWithVPR:ssub_4 |
| 17260 | 0, // FPWithVPR:ssub_5 |
| 17261 | 0, // FPWithVPR:ssub_6 |
| 17262 | 0, // FPWithVPR:ssub_7 |
| 17263 | 0, // FPWithVPR:ssub_8 |
| 17264 | 0, // FPWithVPR:ssub_9 |
| 17265 | 0, // FPWithVPR:ssub_10 |
| 17266 | 0, // FPWithVPR:ssub_11 |
| 17267 | 0, // FPWithVPR:ssub_12 |
| 17268 | 0, // FPWithVPR:ssub_13 |
| 17269 | 0, // FPWithVPR:ssub_14 |
| 17270 | 0, // FPWithVPR:ssub_15 |
| 17271 | 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17272 | 0, // FPWithVPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17273 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17274 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17275 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17276 | 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17277 | 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17278 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17279 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17280 | 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17281 | 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17282 | 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17283 | 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17284 | 0, // FPWithVPR:ssub_6_ssub_7_dsub_5 |
| 17285 | 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17286 | 0, // FPWithVPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17287 | 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17288 | 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17289 | 0, // FPWithVPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17290 | 0, // FPWithVPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17291 | 0, // FPWithVPR:dsub_5_dsub_7 |
| 17292 | 0, // FPWithVPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17293 | 0, // FPWithVPR:dsub_5_ssub_12_ssub_13 |
| 17294 | 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17295 | }, |
| 17296 | { // SPR |
| 17297 | 0, // SPR:dsub_0 |
| 17298 | 0, // SPR:dsub_1 |
| 17299 | 0, // SPR:dsub_2 |
| 17300 | 0, // SPR:dsub_3 |
| 17301 | 0, // SPR:dsub_4 |
| 17302 | 0, // SPR:dsub_5 |
| 17303 | 0, // SPR:dsub_6 |
| 17304 | 0, // SPR:dsub_7 |
| 17305 | 0, // SPR:gsub_0 |
| 17306 | 0, // SPR:gsub_1 |
| 17307 | 0, // SPR:qqsub_0 |
| 17308 | 0, // SPR:qqsub_1 |
| 17309 | 0, // SPR:qsub_0 |
| 17310 | 0, // SPR:qsub_1 |
| 17311 | 0, // SPR:qsub_2 |
| 17312 | 0, // SPR:qsub_3 |
| 17313 | 0, // SPR:ssub_0 |
| 17314 | 0, // SPR:ssub_1 |
| 17315 | 0, // SPR:ssub_2 |
| 17316 | 0, // SPR:ssub_3 |
| 17317 | 0, // SPR:ssub_4 |
| 17318 | 0, // SPR:ssub_5 |
| 17319 | 0, // SPR:ssub_6 |
| 17320 | 0, // SPR:ssub_7 |
| 17321 | 0, // SPR:ssub_8 |
| 17322 | 0, // SPR:ssub_9 |
| 17323 | 0, // SPR:ssub_10 |
| 17324 | 0, // SPR:ssub_11 |
| 17325 | 0, // SPR:ssub_12 |
| 17326 | 0, // SPR:ssub_13 |
| 17327 | 0, // SPR:ssub_14 |
| 17328 | 0, // SPR:ssub_15 |
| 17329 | 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17330 | 0, // SPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17331 | 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17332 | 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17333 | 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17334 | 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17335 | 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17336 | 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17337 | 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17338 | 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17339 | 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17340 | 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17341 | 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17342 | 0, // SPR:ssub_6_ssub_7_dsub_5 |
| 17343 | 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17344 | 0, // SPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17345 | 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17346 | 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17347 | 0, // SPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17348 | 0, // SPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17349 | 0, // SPR:dsub_5_dsub_7 |
| 17350 | 0, // SPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17351 | 0, // SPR:dsub_5_ssub_12_ssub_13 |
| 17352 | 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17353 | }, |
| 17354 | { // FPWithVPR_with_ssub_0 |
| 17355 | 0, // FPWithVPR_with_ssub_0:dsub_0 |
| 17356 | 0, // FPWithVPR_with_ssub_0:dsub_1 |
| 17357 | 0, // FPWithVPR_with_ssub_0:dsub_2 |
| 17358 | 0, // FPWithVPR_with_ssub_0:dsub_3 |
| 17359 | 0, // FPWithVPR_with_ssub_0:dsub_4 |
| 17360 | 0, // FPWithVPR_with_ssub_0:dsub_5 |
| 17361 | 0, // FPWithVPR_with_ssub_0:dsub_6 |
| 17362 | 0, // FPWithVPR_with_ssub_0:dsub_7 |
| 17363 | 0, // FPWithVPR_with_ssub_0:gsub_0 |
| 17364 | 0, // FPWithVPR_with_ssub_0:gsub_1 |
| 17365 | 0, // FPWithVPR_with_ssub_0:qqsub_0 |
| 17366 | 0, // FPWithVPR_with_ssub_0:qqsub_1 |
| 17367 | 0, // FPWithVPR_with_ssub_0:qsub_0 |
| 17368 | 0, // FPWithVPR_with_ssub_0:qsub_1 |
| 17369 | 0, // FPWithVPR_with_ssub_0:qsub_2 |
| 17370 | 0, // FPWithVPR_with_ssub_0:qsub_3 |
| 17371 | 3, // FPWithVPR_with_ssub_0:ssub_0 -> SPR |
| 17372 | 3, // FPWithVPR_with_ssub_0:ssub_1 -> SPR |
| 17373 | 0, // FPWithVPR_with_ssub_0:ssub_2 |
| 17374 | 0, // FPWithVPR_with_ssub_0:ssub_3 |
| 17375 | 0, // FPWithVPR_with_ssub_0:ssub_4 |
| 17376 | 0, // FPWithVPR_with_ssub_0:ssub_5 |
| 17377 | 0, // FPWithVPR_with_ssub_0:ssub_6 |
| 17378 | 0, // FPWithVPR_with_ssub_0:ssub_7 |
| 17379 | 0, // FPWithVPR_with_ssub_0:ssub_8 |
| 17380 | 0, // FPWithVPR_with_ssub_0:ssub_9 |
| 17381 | 0, // FPWithVPR_with_ssub_0:ssub_10 |
| 17382 | 0, // FPWithVPR_with_ssub_0:ssub_11 |
| 17383 | 0, // FPWithVPR_with_ssub_0:ssub_12 |
| 17384 | 0, // FPWithVPR_with_ssub_0:ssub_13 |
| 17385 | 0, // FPWithVPR_with_ssub_0:ssub_14 |
| 17386 | 0, // FPWithVPR_with_ssub_0:ssub_15 |
| 17387 | 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17388 | 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17389 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17390 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17391 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17392 | 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17393 | 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17394 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17395 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17396 | 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17397 | 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17398 | 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17399 | 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17400 | 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 17401 | 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17402 | 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17403 | 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17404 | 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17405 | 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17406 | 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17407 | 0, // FPWithVPR_with_ssub_0:dsub_5_dsub_7 |
| 17408 | 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17409 | 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 17410 | 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17411 | }, |
| 17412 | { // GPR |
| 17413 | 0, // GPR:dsub_0 |
| 17414 | 0, // GPR:dsub_1 |
| 17415 | 0, // GPR:dsub_2 |
| 17416 | 0, // GPR:dsub_3 |
| 17417 | 0, // GPR:dsub_4 |
| 17418 | 0, // GPR:dsub_5 |
| 17419 | 0, // GPR:dsub_6 |
| 17420 | 0, // GPR:dsub_7 |
| 17421 | 0, // GPR:gsub_0 |
| 17422 | 0, // GPR:gsub_1 |
| 17423 | 0, // GPR:qqsub_0 |
| 17424 | 0, // GPR:qqsub_1 |
| 17425 | 0, // GPR:qsub_0 |
| 17426 | 0, // GPR:qsub_1 |
| 17427 | 0, // GPR:qsub_2 |
| 17428 | 0, // GPR:qsub_3 |
| 17429 | 0, // GPR:ssub_0 |
| 17430 | 0, // GPR:ssub_1 |
| 17431 | 0, // GPR:ssub_2 |
| 17432 | 0, // GPR:ssub_3 |
| 17433 | 0, // GPR:ssub_4 |
| 17434 | 0, // GPR:ssub_5 |
| 17435 | 0, // GPR:ssub_6 |
| 17436 | 0, // GPR:ssub_7 |
| 17437 | 0, // GPR:ssub_8 |
| 17438 | 0, // GPR:ssub_9 |
| 17439 | 0, // GPR:ssub_10 |
| 17440 | 0, // GPR:ssub_11 |
| 17441 | 0, // GPR:ssub_12 |
| 17442 | 0, // GPR:ssub_13 |
| 17443 | 0, // GPR:ssub_14 |
| 17444 | 0, // GPR:ssub_15 |
| 17445 | 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17446 | 0, // GPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17447 | 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17448 | 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17449 | 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17450 | 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17451 | 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17452 | 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17453 | 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17454 | 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17455 | 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17456 | 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17457 | 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17458 | 0, // GPR:ssub_6_ssub_7_dsub_5 |
| 17459 | 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17460 | 0, // GPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17461 | 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17462 | 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17463 | 0, // GPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17464 | 0, // GPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17465 | 0, // GPR:dsub_5_dsub_7 |
| 17466 | 0, // GPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17467 | 0, // GPR:dsub_5_ssub_12_ssub_13 |
| 17468 | 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17469 | }, |
| 17470 | { // GPRwithAPSR |
| 17471 | 0, // GPRwithAPSR:dsub_0 |
| 17472 | 0, // GPRwithAPSR:dsub_1 |
| 17473 | 0, // GPRwithAPSR:dsub_2 |
| 17474 | 0, // GPRwithAPSR:dsub_3 |
| 17475 | 0, // GPRwithAPSR:dsub_4 |
| 17476 | 0, // GPRwithAPSR:dsub_5 |
| 17477 | 0, // GPRwithAPSR:dsub_6 |
| 17478 | 0, // GPRwithAPSR:dsub_7 |
| 17479 | 0, // GPRwithAPSR:gsub_0 |
| 17480 | 0, // GPRwithAPSR:gsub_1 |
| 17481 | 0, // GPRwithAPSR:qqsub_0 |
| 17482 | 0, // GPRwithAPSR:qqsub_1 |
| 17483 | 0, // GPRwithAPSR:qsub_0 |
| 17484 | 0, // GPRwithAPSR:qsub_1 |
| 17485 | 0, // GPRwithAPSR:qsub_2 |
| 17486 | 0, // GPRwithAPSR:qsub_3 |
| 17487 | 0, // GPRwithAPSR:ssub_0 |
| 17488 | 0, // GPRwithAPSR:ssub_1 |
| 17489 | 0, // GPRwithAPSR:ssub_2 |
| 17490 | 0, // GPRwithAPSR:ssub_3 |
| 17491 | 0, // GPRwithAPSR:ssub_4 |
| 17492 | 0, // GPRwithAPSR:ssub_5 |
| 17493 | 0, // GPRwithAPSR:ssub_6 |
| 17494 | 0, // GPRwithAPSR:ssub_7 |
| 17495 | 0, // GPRwithAPSR:ssub_8 |
| 17496 | 0, // GPRwithAPSR:ssub_9 |
| 17497 | 0, // GPRwithAPSR:ssub_10 |
| 17498 | 0, // GPRwithAPSR:ssub_11 |
| 17499 | 0, // GPRwithAPSR:ssub_12 |
| 17500 | 0, // GPRwithAPSR:ssub_13 |
| 17501 | 0, // GPRwithAPSR:ssub_14 |
| 17502 | 0, // GPRwithAPSR:ssub_15 |
| 17503 | 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17504 | 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17505 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17506 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17507 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17508 | 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17509 | 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17510 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17511 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17512 | 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17513 | 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17514 | 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17515 | 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17516 | 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5 |
| 17517 | 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17518 | 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17519 | 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17520 | 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17521 | 0, // GPRwithAPSR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17522 | 0, // GPRwithAPSR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17523 | 0, // GPRwithAPSR:dsub_5_dsub_7 |
| 17524 | 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17525 | 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13 |
| 17526 | 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17527 | }, |
| 17528 | { // GPRwithZR |
| 17529 | 0, // GPRwithZR:dsub_0 |
| 17530 | 0, // GPRwithZR:dsub_1 |
| 17531 | 0, // GPRwithZR:dsub_2 |
| 17532 | 0, // GPRwithZR:dsub_3 |
| 17533 | 0, // GPRwithZR:dsub_4 |
| 17534 | 0, // GPRwithZR:dsub_5 |
| 17535 | 0, // GPRwithZR:dsub_6 |
| 17536 | 0, // GPRwithZR:dsub_7 |
| 17537 | 0, // GPRwithZR:gsub_0 |
| 17538 | 0, // GPRwithZR:gsub_1 |
| 17539 | 0, // GPRwithZR:qqsub_0 |
| 17540 | 0, // GPRwithZR:qqsub_1 |
| 17541 | 0, // GPRwithZR:qsub_0 |
| 17542 | 0, // GPRwithZR:qsub_1 |
| 17543 | 0, // GPRwithZR:qsub_2 |
| 17544 | 0, // GPRwithZR:qsub_3 |
| 17545 | 0, // GPRwithZR:ssub_0 |
| 17546 | 0, // GPRwithZR:ssub_1 |
| 17547 | 0, // GPRwithZR:ssub_2 |
| 17548 | 0, // GPRwithZR:ssub_3 |
| 17549 | 0, // GPRwithZR:ssub_4 |
| 17550 | 0, // GPRwithZR:ssub_5 |
| 17551 | 0, // GPRwithZR:ssub_6 |
| 17552 | 0, // GPRwithZR:ssub_7 |
| 17553 | 0, // GPRwithZR:ssub_8 |
| 17554 | 0, // GPRwithZR:ssub_9 |
| 17555 | 0, // GPRwithZR:ssub_10 |
| 17556 | 0, // GPRwithZR:ssub_11 |
| 17557 | 0, // GPRwithZR:ssub_12 |
| 17558 | 0, // GPRwithZR:ssub_13 |
| 17559 | 0, // GPRwithZR:ssub_14 |
| 17560 | 0, // GPRwithZR:ssub_15 |
| 17561 | 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17562 | 0, // GPRwithZR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17563 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17564 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17565 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17566 | 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17567 | 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17568 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17569 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17570 | 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17571 | 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17572 | 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17573 | 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17574 | 0, // GPRwithZR:ssub_6_ssub_7_dsub_5 |
| 17575 | 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17576 | 0, // GPRwithZR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17577 | 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17578 | 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17579 | 0, // GPRwithZR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17580 | 0, // GPRwithZR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17581 | 0, // GPRwithZR:dsub_5_dsub_7 |
| 17582 | 0, // GPRwithZR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17583 | 0, // GPRwithZR:dsub_5_ssub_12_ssub_13 |
| 17584 | 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17585 | }, |
| 17586 | { // SPR_8 |
| 17587 | 0, // SPR_8:dsub_0 |
| 17588 | 0, // SPR_8:dsub_1 |
| 17589 | 0, // SPR_8:dsub_2 |
| 17590 | 0, // SPR_8:dsub_3 |
| 17591 | 0, // SPR_8:dsub_4 |
| 17592 | 0, // SPR_8:dsub_5 |
| 17593 | 0, // SPR_8:dsub_6 |
| 17594 | 0, // SPR_8:dsub_7 |
| 17595 | 0, // SPR_8:gsub_0 |
| 17596 | 0, // SPR_8:gsub_1 |
| 17597 | 0, // SPR_8:qqsub_0 |
| 17598 | 0, // SPR_8:qqsub_1 |
| 17599 | 0, // SPR_8:qsub_0 |
| 17600 | 0, // SPR_8:qsub_1 |
| 17601 | 0, // SPR_8:qsub_2 |
| 17602 | 0, // SPR_8:qsub_3 |
| 17603 | 0, // SPR_8:ssub_0 |
| 17604 | 0, // SPR_8:ssub_1 |
| 17605 | 0, // SPR_8:ssub_2 |
| 17606 | 0, // SPR_8:ssub_3 |
| 17607 | 0, // SPR_8:ssub_4 |
| 17608 | 0, // SPR_8:ssub_5 |
| 17609 | 0, // SPR_8:ssub_6 |
| 17610 | 0, // SPR_8:ssub_7 |
| 17611 | 0, // SPR_8:ssub_8 |
| 17612 | 0, // SPR_8:ssub_9 |
| 17613 | 0, // SPR_8:ssub_10 |
| 17614 | 0, // SPR_8:ssub_11 |
| 17615 | 0, // SPR_8:ssub_12 |
| 17616 | 0, // SPR_8:ssub_13 |
| 17617 | 0, // SPR_8:ssub_14 |
| 17618 | 0, // SPR_8:ssub_15 |
| 17619 | 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17620 | 0, // SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17621 | 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17622 | 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17623 | 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17624 | 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17625 | 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17626 | 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17627 | 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17628 | 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17629 | 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17630 | 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17631 | 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17632 | 0, // SPR_8:ssub_6_ssub_7_dsub_5 |
| 17633 | 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17634 | 0, // SPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17635 | 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17636 | 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17637 | 0, // SPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17638 | 0, // SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17639 | 0, // SPR_8:dsub_5_dsub_7 |
| 17640 | 0, // SPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17641 | 0, // SPR_8:dsub_5_ssub_12_ssub_13 |
| 17642 | 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17643 | }, |
| 17644 | { // GPRnopc |
| 17645 | 0, // GPRnopc:dsub_0 |
| 17646 | 0, // GPRnopc:dsub_1 |
| 17647 | 0, // GPRnopc:dsub_2 |
| 17648 | 0, // GPRnopc:dsub_3 |
| 17649 | 0, // GPRnopc:dsub_4 |
| 17650 | 0, // GPRnopc:dsub_5 |
| 17651 | 0, // GPRnopc:dsub_6 |
| 17652 | 0, // GPRnopc:dsub_7 |
| 17653 | 0, // GPRnopc:gsub_0 |
| 17654 | 0, // GPRnopc:gsub_1 |
| 17655 | 0, // GPRnopc:qqsub_0 |
| 17656 | 0, // GPRnopc:qqsub_1 |
| 17657 | 0, // GPRnopc:qsub_0 |
| 17658 | 0, // GPRnopc:qsub_1 |
| 17659 | 0, // GPRnopc:qsub_2 |
| 17660 | 0, // GPRnopc:qsub_3 |
| 17661 | 0, // GPRnopc:ssub_0 |
| 17662 | 0, // GPRnopc:ssub_1 |
| 17663 | 0, // GPRnopc:ssub_2 |
| 17664 | 0, // GPRnopc:ssub_3 |
| 17665 | 0, // GPRnopc:ssub_4 |
| 17666 | 0, // GPRnopc:ssub_5 |
| 17667 | 0, // GPRnopc:ssub_6 |
| 17668 | 0, // GPRnopc:ssub_7 |
| 17669 | 0, // GPRnopc:ssub_8 |
| 17670 | 0, // GPRnopc:ssub_9 |
| 17671 | 0, // GPRnopc:ssub_10 |
| 17672 | 0, // GPRnopc:ssub_11 |
| 17673 | 0, // GPRnopc:ssub_12 |
| 17674 | 0, // GPRnopc:ssub_13 |
| 17675 | 0, // GPRnopc:ssub_14 |
| 17676 | 0, // GPRnopc:ssub_15 |
| 17677 | 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17678 | 0, // GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17679 | 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17680 | 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17681 | 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17682 | 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17683 | 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17684 | 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17685 | 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17686 | 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17687 | 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17688 | 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17689 | 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17690 | 0, // GPRnopc:ssub_6_ssub_7_dsub_5 |
| 17691 | 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17692 | 0, // GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17693 | 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17694 | 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17695 | 0, // GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17696 | 0, // GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17697 | 0, // GPRnopc:dsub_5_dsub_7 |
| 17698 | 0, // GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17699 | 0, // GPRnopc:dsub_5_ssub_12_ssub_13 |
| 17700 | 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17701 | }, |
| 17702 | { // GPRnosp |
| 17703 | 0, // GPRnosp:dsub_0 |
| 17704 | 0, // GPRnosp:dsub_1 |
| 17705 | 0, // GPRnosp:dsub_2 |
| 17706 | 0, // GPRnosp:dsub_3 |
| 17707 | 0, // GPRnosp:dsub_4 |
| 17708 | 0, // GPRnosp:dsub_5 |
| 17709 | 0, // GPRnosp:dsub_6 |
| 17710 | 0, // GPRnosp:dsub_7 |
| 17711 | 0, // GPRnosp:gsub_0 |
| 17712 | 0, // GPRnosp:gsub_1 |
| 17713 | 0, // GPRnosp:qqsub_0 |
| 17714 | 0, // GPRnosp:qqsub_1 |
| 17715 | 0, // GPRnosp:qsub_0 |
| 17716 | 0, // GPRnosp:qsub_1 |
| 17717 | 0, // GPRnosp:qsub_2 |
| 17718 | 0, // GPRnosp:qsub_3 |
| 17719 | 0, // GPRnosp:ssub_0 |
| 17720 | 0, // GPRnosp:ssub_1 |
| 17721 | 0, // GPRnosp:ssub_2 |
| 17722 | 0, // GPRnosp:ssub_3 |
| 17723 | 0, // GPRnosp:ssub_4 |
| 17724 | 0, // GPRnosp:ssub_5 |
| 17725 | 0, // GPRnosp:ssub_6 |
| 17726 | 0, // GPRnosp:ssub_7 |
| 17727 | 0, // GPRnosp:ssub_8 |
| 17728 | 0, // GPRnosp:ssub_9 |
| 17729 | 0, // GPRnosp:ssub_10 |
| 17730 | 0, // GPRnosp:ssub_11 |
| 17731 | 0, // GPRnosp:ssub_12 |
| 17732 | 0, // GPRnosp:ssub_13 |
| 17733 | 0, // GPRnosp:ssub_14 |
| 17734 | 0, // GPRnosp:ssub_15 |
| 17735 | 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17736 | 0, // GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17737 | 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17738 | 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17739 | 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17740 | 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17741 | 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17742 | 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17743 | 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17744 | 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17745 | 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17746 | 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17747 | 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17748 | 0, // GPRnosp:ssub_6_ssub_7_dsub_5 |
| 17749 | 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17750 | 0, // GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17751 | 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17752 | 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17753 | 0, // GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17754 | 0, // GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17755 | 0, // GPRnosp:dsub_5_dsub_7 |
| 17756 | 0, // GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17757 | 0, // GPRnosp:dsub_5_ssub_12_ssub_13 |
| 17758 | 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17759 | }, |
| 17760 | { // GPRwithAPSR_NZCVnosp |
| 17761 | 0, // GPRwithAPSR_NZCVnosp:dsub_0 |
| 17762 | 0, // GPRwithAPSR_NZCVnosp:dsub_1 |
| 17763 | 0, // GPRwithAPSR_NZCVnosp:dsub_2 |
| 17764 | 0, // GPRwithAPSR_NZCVnosp:dsub_3 |
| 17765 | 0, // GPRwithAPSR_NZCVnosp:dsub_4 |
| 17766 | 0, // GPRwithAPSR_NZCVnosp:dsub_5 |
| 17767 | 0, // GPRwithAPSR_NZCVnosp:dsub_6 |
| 17768 | 0, // GPRwithAPSR_NZCVnosp:dsub_7 |
| 17769 | 0, // GPRwithAPSR_NZCVnosp:gsub_0 |
| 17770 | 0, // GPRwithAPSR_NZCVnosp:gsub_1 |
| 17771 | 0, // GPRwithAPSR_NZCVnosp:qqsub_0 |
| 17772 | 0, // GPRwithAPSR_NZCVnosp:qqsub_1 |
| 17773 | 0, // GPRwithAPSR_NZCVnosp:qsub_0 |
| 17774 | 0, // GPRwithAPSR_NZCVnosp:qsub_1 |
| 17775 | 0, // GPRwithAPSR_NZCVnosp:qsub_2 |
| 17776 | 0, // GPRwithAPSR_NZCVnosp:qsub_3 |
| 17777 | 0, // GPRwithAPSR_NZCVnosp:ssub_0 |
| 17778 | 0, // GPRwithAPSR_NZCVnosp:ssub_1 |
| 17779 | 0, // GPRwithAPSR_NZCVnosp:ssub_2 |
| 17780 | 0, // GPRwithAPSR_NZCVnosp:ssub_3 |
| 17781 | 0, // GPRwithAPSR_NZCVnosp:ssub_4 |
| 17782 | 0, // GPRwithAPSR_NZCVnosp:ssub_5 |
| 17783 | 0, // GPRwithAPSR_NZCVnosp:ssub_6 |
| 17784 | 0, // GPRwithAPSR_NZCVnosp:ssub_7 |
| 17785 | 0, // GPRwithAPSR_NZCVnosp:ssub_8 |
| 17786 | 0, // GPRwithAPSR_NZCVnosp:ssub_9 |
| 17787 | 0, // GPRwithAPSR_NZCVnosp:ssub_10 |
| 17788 | 0, // GPRwithAPSR_NZCVnosp:ssub_11 |
| 17789 | 0, // GPRwithAPSR_NZCVnosp:ssub_12 |
| 17790 | 0, // GPRwithAPSR_NZCVnosp:ssub_13 |
| 17791 | 0, // GPRwithAPSR_NZCVnosp:ssub_14 |
| 17792 | 0, // GPRwithAPSR_NZCVnosp:ssub_15 |
| 17793 | 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17794 | 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17795 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17796 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17797 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17798 | 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17799 | 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17800 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17801 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17802 | 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17803 | 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17804 | 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17805 | 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17806 | 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5 |
| 17807 | 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17808 | 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17809 | 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17810 | 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17811 | 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17812 | 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17813 | 0, // GPRwithAPSR_NZCVnosp:dsub_5_dsub_7 |
| 17814 | 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17815 | 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13 |
| 17816 | 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17817 | }, |
| 17818 | { // GPRwithAPSRnosp |
| 17819 | 0, // GPRwithAPSRnosp:dsub_0 |
| 17820 | 0, // GPRwithAPSRnosp:dsub_1 |
| 17821 | 0, // GPRwithAPSRnosp:dsub_2 |
| 17822 | 0, // GPRwithAPSRnosp:dsub_3 |
| 17823 | 0, // GPRwithAPSRnosp:dsub_4 |
| 17824 | 0, // GPRwithAPSRnosp:dsub_5 |
| 17825 | 0, // GPRwithAPSRnosp:dsub_6 |
| 17826 | 0, // GPRwithAPSRnosp:dsub_7 |
| 17827 | 0, // GPRwithAPSRnosp:gsub_0 |
| 17828 | 0, // GPRwithAPSRnosp:gsub_1 |
| 17829 | 0, // GPRwithAPSRnosp:qqsub_0 |
| 17830 | 0, // GPRwithAPSRnosp:qqsub_1 |
| 17831 | 0, // GPRwithAPSRnosp:qsub_0 |
| 17832 | 0, // GPRwithAPSRnosp:qsub_1 |
| 17833 | 0, // GPRwithAPSRnosp:qsub_2 |
| 17834 | 0, // GPRwithAPSRnosp:qsub_3 |
| 17835 | 0, // GPRwithAPSRnosp:ssub_0 |
| 17836 | 0, // GPRwithAPSRnosp:ssub_1 |
| 17837 | 0, // GPRwithAPSRnosp:ssub_2 |
| 17838 | 0, // GPRwithAPSRnosp:ssub_3 |
| 17839 | 0, // GPRwithAPSRnosp:ssub_4 |
| 17840 | 0, // GPRwithAPSRnosp:ssub_5 |
| 17841 | 0, // GPRwithAPSRnosp:ssub_6 |
| 17842 | 0, // GPRwithAPSRnosp:ssub_7 |
| 17843 | 0, // GPRwithAPSRnosp:ssub_8 |
| 17844 | 0, // GPRwithAPSRnosp:ssub_9 |
| 17845 | 0, // GPRwithAPSRnosp:ssub_10 |
| 17846 | 0, // GPRwithAPSRnosp:ssub_11 |
| 17847 | 0, // GPRwithAPSRnosp:ssub_12 |
| 17848 | 0, // GPRwithAPSRnosp:ssub_13 |
| 17849 | 0, // GPRwithAPSRnosp:ssub_14 |
| 17850 | 0, // GPRwithAPSRnosp:ssub_15 |
| 17851 | 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17852 | 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17853 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17854 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17855 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17856 | 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17857 | 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17858 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17859 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17860 | 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17861 | 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17862 | 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17863 | 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17864 | 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5 |
| 17865 | 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17866 | 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17867 | 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17868 | 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17869 | 0, // GPRwithAPSRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17870 | 0, // GPRwithAPSRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17871 | 0, // GPRwithAPSRnosp:dsub_5_dsub_7 |
| 17872 | 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17873 | 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13 |
| 17874 | 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17875 | }, |
| 17876 | { // GPRwithZRnosp |
| 17877 | 0, // GPRwithZRnosp:dsub_0 |
| 17878 | 0, // GPRwithZRnosp:dsub_1 |
| 17879 | 0, // GPRwithZRnosp:dsub_2 |
| 17880 | 0, // GPRwithZRnosp:dsub_3 |
| 17881 | 0, // GPRwithZRnosp:dsub_4 |
| 17882 | 0, // GPRwithZRnosp:dsub_5 |
| 17883 | 0, // GPRwithZRnosp:dsub_6 |
| 17884 | 0, // GPRwithZRnosp:dsub_7 |
| 17885 | 0, // GPRwithZRnosp:gsub_0 |
| 17886 | 0, // GPRwithZRnosp:gsub_1 |
| 17887 | 0, // GPRwithZRnosp:qqsub_0 |
| 17888 | 0, // GPRwithZRnosp:qqsub_1 |
| 17889 | 0, // GPRwithZRnosp:qsub_0 |
| 17890 | 0, // GPRwithZRnosp:qsub_1 |
| 17891 | 0, // GPRwithZRnosp:qsub_2 |
| 17892 | 0, // GPRwithZRnosp:qsub_3 |
| 17893 | 0, // GPRwithZRnosp:ssub_0 |
| 17894 | 0, // GPRwithZRnosp:ssub_1 |
| 17895 | 0, // GPRwithZRnosp:ssub_2 |
| 17896 | 0, // GPRwithZRnosp:ssub_3 |
| 17897 | 0, // GPRwithZRnosp:ssub_4 |
| 17898 | 0, // GPRwithZRnosp:ssub_5 |
| 17899 | 0, // GPRwithZRnosp:ssub_6 |
| 17900 | 0, // GPRwithZRnosp:ssub_7 |
| 17901 | 0, // GPRwithZRnosp:ssub_8 |
| 17902 | 0, // GPRwithZRnosp:ssub_9 |
| 17903 | 0, // GPRwithZRnosp:ssub_10 |
| 17904 | 0, // GPRwithZRnosp:ssub_11 |
| 17905 | 0, // GPRwithZRnosp:ssub_12 |
| 17906 | 0, // GPRwithZRnosp:ssub_13 |
| 17907 | 0, // GPRwithZRnosp:ssub_14 |
| 17908 | 0, // GPRwithZRnosp:ssub_15 |
| 17909 | 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17910 | 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17911 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17912 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17913 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17914 | 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17915 | 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17916 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17917 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17918 | 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17919 | 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17920 | 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17921 | 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17922 | 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5 |
| 17923 | 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17924 | 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17925 | 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17926 | 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17927 | 0, // GPRwithZRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17928 | 0, // GPRwithZRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17929 | 0, // GPRwithZRnosp:dsub_5_dsub_7 |
| 17930 | 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17931 | 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13 |
| 17932 | 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17933 | }, |
| 17934 | { // GPRnoip |
| 17935 | 0, // GPRnoip:dsub_0 |
| 17936 | 0, // GPRnoip:dsub_1 |
| 17937 | 0, // GPRnoip:dsub_2 |
| 17938 | 0, // GPRnoip:dsub_3 |
| 17939 | 0, // GPRnoip:dsub_4 |
| 17940 | 0, // GPRnoip:dsub_5 |
| 17941 | 0, // GPRnoip:dsub_6 |
| 17942 | 0, // GPRnoip:dsub_7 |
| 17943 | 0, // GPRnoip:gsub_0 |
| 17944 | 0, // GPRnoip:gsub_1 |
| 17945 | 0, // GPRnoip:qqsub_0 |
| 17946 | 0, // GPRnoip:qqsub_1 |
| 17947 | 0, // GPRnoip:qsub_0 |
| 17948 | 0, // GPRnoip:qsub_1 |
| 17949 | 0, // GPRnoip:qsub_2 |
| 17950 | 0, // GPRnoip:qsub_3 |
| 17951 | 0, // GPRnoip:ssub_0 |
| 17952 | 0, // GPRnoip:ssub_1 |
| 17953 | 0, // GPRnoip:ssub_2 |
| 17954 | 0, // GPRnoip:ssub_3 |
| 17955 | 0, // GPRnoip:ssub_4 |
| 17956 | 0, // GPRnoip:ssub_5 |
| 17957 | 0, // GPRnoip:ssub_6 |
| 17958 | 0, // GPRnoip:ssub_7 |
| 17959 | 0, // GPRnoip:ssub_8 |
| 17960 | 0, // GPRnoip:ssub_9 |
| 17961 | 0, // GPRnoip:ssub_10 |
| 17962 | 0, // GPRnoip:ssub_11 |
| 17963 | 0, // GPRnoip:ssub_12 |
| 17964 | 0, // GPRnoip:ssub_13 |
| 17965 | 0, // GPRnoip:ssub_14 |
| 17966 | 0, // GPRnoip:ssub_15 |
| 17967 | 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5 |
| 17968 | 0, // GPRnoip:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 17969 | 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7 |
| 17970 | 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 17971 | 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5 |
| 17972 | 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 17973 | 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17974 | 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 17975 | 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 17976 | 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17977 | 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9 |
| 17978 | 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 17979 | 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 17980 | 0, // GPRnoip:ssub_6_ssub_7_dsub_5 |
| 17981 | 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 17982 | 0, // GPRnoip:ssub_6_ssub_7_dsub_5_dsub_7 |
| 17983 | 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9 |
| 17984 | 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17985 | 0, // GPRnoip:ssub_8_ssub_9_ssub_12_ssub_13 |
| 17986 | 0, // GPRnoip:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 17987 | 0, // GPRnoip:dsub_5_dsub_7 |
| 17988 | 0, // GPRnoip:dsub_5_ssub_12_ssub_13_dsub_7 |
| 17989 | 0, // GPRnoip:dsub_5_ssub_12_ssub_13 |
| 17990 | 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 17991 | }, |
| 17992 | { // rGPR |
| 17993 | 0, // rGPR:dsub_0 |
| 17994 | 0, // rGPR:dsub_1 |
| 17995 | 0, // rGPR:dsub_2 |
| 17996 | 0, // rGPR:dsub_3 |
| 17997 | 0, // rGPR:dsub_4 |
| 17998 | 0, // rGPR:dsub_5 |
| 17999 | 0, // rGPR:dsub_6 |
| 18000 | 0, // rGPR:dsub_7 |
| 18001 | 0, // rGPR:gsub_0 |
| 18002 | 0, // rGPR:gsub_1 |
| 18003 | 0, // rGPR:qqsub_0 |
| 18004 | 0, // rGPR:qqsub_1 |
| 18005 | 0, // rGPR:qsub_0 |
| 18006 | 0, // rGPR:qsub_1 |
| 18007 | 0, // rGPR:qsub_2 |
| 18008 | 0, // rGPR:qsub_3 |
| 18009 | 0, // rGPR:ssub_0 |
| 18010 | 0, // rGPR:ssub_1 |
| 18011 | 0, // rGPR:ssub_2 |
| 18012 | 0, // rGPR:ssub_3 |
| 18013 | 0, // rGPR:ssub_4 |
| 18014 | 0, // rGPR:ssub_5 |
| 18015 | 0, // rGPR:ssub_6 |
| 18016 | 0, // rGPR:ssub_7 |
| 18017 | 0, // rGPR:ssub_8 |
| 18018 | 0, // rGPR:ssub_9 |
| 18019 | 0, // rGPR:ssub_10 |
| 18020 | 0, // rGPR:ssub_11 |
| 18021 | 0, // rGPR:ssub_12 |
| 18022 | 0, // rGPR:ssub_13 |
| 18023 | 0, // rGPR:ssub_14 |
| 18024 | 0, // rGPR:ssub_15 |
| 18025 | 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18026 | 0, // rGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18027 | 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18028 | 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18029 | 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18030 | 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18031 | 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18032 | 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18033 | 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18034 | 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18035 | 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18036 | 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18037 | 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18038 | 0, // rGPR:ssub_6_ssub_7_dsub_5 |
| 18039 | 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18040 | 0, // rGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18041 | 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18042 | 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18043 | 0, // rGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18044 | 0, // rGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18045 | 0, // rGPR:dsub_5_dsub_7 |
| 18046 | 0, // rGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18047 | 0, // rGPR:dsub_5_ssub_12_ssub_13 |
| 18048 | 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18049 | }, |
| 18050 | { // GPRnoip_and_GPRnopc |
| 18051 | 0, // GPRnoip_and_GPRnopc:dsub_0 |
| 18052 | 0, // GPRnoip_and_GPRnopc:dsub_1 |
| 18053 | 0, // GPRnoip_and_GPRnopc:dsub_2 |
| 18054 | 0, // GPRnoip_and_GPRnopc:dsub_3 |
| 18055 | 0, // GPRnoip_and_GPRnopc:dsub_4 |
| 18056 | 0, // GPRnoip_and_GPRnopc:dsub_5 |
| 18057 | 0, // GPRnoip_and_GPRnopc:dsub_6 |
| 18058 | 0, // GPRnoip_and_GPRnopc:dsub_7 |
| 18059 | 0, // GPRnoip_and_GPRnopc:gsub_0 |
| 18060 | 0, // GPRnoip_and_GPRnopc:gsub_1 |
| 18061 | 0, // GPRnoip_and_GPRnopc:qqsub_0 |
| 18062 | 0, // GPRnoip_and_GPRnopc:qqsub_1 |
| 18063 | 0, // GPRnoip_and_GPRnopc:qsub_0 |
| 18064 | 0, // GPRnoip_and_GPRnopc:qsub_1 |
| 18065 | 0, // GPRnoip_and_GPRnopc:qsub_2 |
| 18066 | 0, // GPRnoip_and_GPRnopc:qsub_3 |
| 18067 | 0, // GPRnoip_and_GPRnopc:ssub_0 |
| 18068 | 0, // GPRnoip_and_GPRnopc:ssub_1 |
| 18069 | 0, // GPRnoip_and_GPRnopc:ssub_2 |
| 18070 | 0, // GPRnoip_and_GPRnopc:ssub_3 |
| 18071 | 0, // GPRnoip_and_GPRnopc:ssub_4 |
| 18072 | 0, // GPRnoip_and_GPRnopc:ssub_5 |
| 18073 | 0, // GPRnoip_and_GPRnopc:ssub_6 |
| 18074 | 0, // GPRnoip_and_GPRnopc:ssub_7 |
| 18075 | 0, // GPRnoip_and_GPRnopc:ssub_8 |
| 18076 | 0, // GPRnoip_and_GPRnopc:ssub_9 |
| 18077 | 0, // GPRnoip_and_GPRnopc:ssub_10 |
| 18078 | 0, // GPRnoip_and_GPRnopc:ssub_11 |
| 18079 | 0, // GPRnoip_and_GPRnopc:ssub_12 |
| 18080 | 0, // GPRnoip_and_GPRnopc:ssub_13 |
| 18081 | 0, // GPRnoip_and_GPRnopc:ssub_14 |
| 18082 | 0, // GPRnoip_and_GPRnopc:ssub_15 |
| 18083 | 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18084 | 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18085 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18086 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18087 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18088 | 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18089 | 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18090 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18091 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18092 | 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18093 | 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18094 | 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18095 | 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18096 | 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5 |
| 18097 | 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18098 | 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18099 | 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18100 | 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18101 | 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18102 | 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18103 | 0, // GPRnoip_and_GPRnopc:dsub_5_dsub_7 |
| 18104 | 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18105 | 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13 |
| 18106 | 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18107 | }, |
| 18108 | { // GPRnoip_and_GPRnosp |
| 18109 | 0, // GPRnoip_and_GPRnosp:dsub_0 |
| 18110 | 0, // GPRnoip_and_GPRnosp:dsub_1 |
| 18111 | 0, // GPRnoip_and_GPRnosp:dsub_2 |
| 18112 | 0, // GPRnoip_and_GPRnosp:dsub_3 |
| 18113 | 0, // GPRnoip_and_GPRnosp:dsub_4 |
| 18114 | 0, // GPRnoip_and_GPRnosp:dsub_5 |
| 18115 | 0, // GPRnoip_and_GPRnosp:dsub_6 |
| 18116 | 0, // GPRnoip_and_GPRnosp:dsub_7 |
| 18117 | 0, // GPRnoip_and_GPRnosp:gsub_0 |
| 18118 | 0, // GPRnoip_and_GPRnosp:gsub_1 |
| 18119 | 0, // GPRnoip_and_GPRnosp:qqsub_0 |
| 18120 | 0, // GPRnoip_and_GPRnosp:qqsub_1 |
| 18121 | 0, // GPRnoip_and_GPRnosp:qsub_0 |
| 18122 | 0, // GPRnoip_and_GPRnosp:qsub_1 |
| 18123 | 0, // GPRnoip_and_GPRnosp:qsub_2 |
| 18124 | 0, // GPRnoip_and_GPRnosp:qsub_3 |
| 18125 | 0, // GPRnoip_and_GPRnosp:ssub_0 |
| 18126 | 0, // GPRnoip_and_GPRnosp:ssub_1 |
| 18127 | 0, // GPRnoip_and_GPRnosp:ssub_2 |
| 18128 | 0, // GPRnoip_and_GPRnosp:ssub_3 |
| 18129 | 0, // GPRnoip_and_GPRnosp:ssub_4 |
| 18130 | 0, // GPRnoip_and_GPRnosp:ssub_5 |
| 18131 | 0, // GPRnoip_and_GPRnosp:ssub_6 |
| 18132 | 0, // GPRnoip_and_GPRnosp:ssub_7 |
| 18133 | 0, // GPRnoip_and_GPRnosp:ssub_8 |
| 18134 | 0, // GPRnoip_and_GPRnosp:ssub_9 |
| 18135 | 0, // GPRnoip_and_GPRnosp:ssub_10 |
| 18136 | 0, // GPRnoip_and_GPRnosp:ssub_11 |
| 18137 | 0, // GPRnoip_and_GPRnosp:ssub_12 |
| 18138 | 0, // GPRnoip_and_GPRnosp:ssub_13 |
| 18139 | 0, // GPRnoip_and_GPRnosp:ssub_14 |
| 18140 | 0, // GPRnoip_and_GPRnosp:ssub_15 |
| 18141 | 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18142 | 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18143 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18144 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18145 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18146 | 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18147 | 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18148 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18149 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18150 | 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18151 | 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18152 | 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18153 | 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18154 | 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5 |
| 18155 | 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18156 | 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18157 | 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18158 | 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18159 | 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18160 | 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18161 | 0, // GPRnoip_and_GPRnosp:dsub_5_dsub_7 |
| 18162 | 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18163 | 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13 |
| 18164 | 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18165 | }, |
| 18166 | { // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 18167 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_0 |
| 18168 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_1 |
| 18169 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_2 |
| 18170 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_3 |
| 18171 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_4 |
| 18172 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5 |
| 18173 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_6 |
| 18174 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_7 |
| 18175 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_0 |
| 18176 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_1 |
| 18177 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_0 |
| 18178 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_1 |
| 18179 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_0 |
| 18180 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_1 |
| 18181 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_2 |
| 18182 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_3 |
| 18183 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0 |
| 18184 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_1 |
| 18185 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2 |
| 18186 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_3 |
| 18187 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4 |
| 18188 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_5 |
| 18189 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6 |
| 18190 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_7 |
| 18191 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8 |
| 18192 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_9 |
| 18193 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_10 |
| 18194 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_11 |
| 18195 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_12 |
| 18196 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_13 |
| 18197 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_14 |
| 18198 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_15 |
| 18199 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18200 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18201 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18202 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18203 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18204 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18205 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18206 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18207 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18208 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18209 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18210 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18211 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18212 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5 |
| 18213 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18214 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18215 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18216 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18217 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18218 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18219 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_dsub_7 |
| 18220 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18221 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13 |
| 18222 | 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18223 | }, |
| 18224 | { // tGPRwithpc |
| 18225 | 0, // tGPRwithpc:dsub_0 |
| 18226 | 0, // tGPRwithpc:dsub_1 |
| 18227 | 0, // tGPRwithpc:dsub_2 |
| 18228 | 0, // tGPRwithpc:dsub_3 |
| 18229 | 0, // tGPRwithpc:dsub_4 |
| 18230 | 0, // tGPRwithpc:dsub_5 |
| 18231 | 0, // tGPRwithpc:dsub_6 |
| 18232 | 0, // tGPRwithpc:dsub_7 |
| 18233 | 0, // tGPRwithpc:gsub_0 |
| 18234 | 0, // tGPRwithpc:gsub_1 |
| 18235 | 0, // tGPRwithpc:qqsub_0 |
| 18236 | 0, // tGPRwithpc:qqsub_1 |
| 18237 | 0, // tGPRwithpc:qsub_0 |
| 18238 | 0, // tGPRwithpc:qsub_1 |
| 18239 | 0, // tGPRwithpc:qsub_2 |
| 18240 | 0, // tGPRwithpc:qsub_3 |
| 18241 | 0, // tGPRwithpc:ssub_0 |
| 18242 | 0, // tGPRwithpc:ssub_1 |
| 18243 | 0, // tGPRwithpc:ssub_2 |
| 18244 | 0, // tGPRwithpc:ssub_3 |
| 18245 | 0, // tGPRwithpc:ssub_4 |
| 18246 | 0, // tGPRwithpc:ssub_5 |
| 18247 | 0, // tGPRwithpc:ssub_6 |
| 18248 | 0, // tGPRwithpc:ssub_7 |
| 18249 | 0, // tGPRwithpc:ssub_8 |
| 18250 | 0, // tGPRwithpc:ssub_9 |
| 18251 | 0, // tGPRwithpc:ssub_10 |
| 18252 | 0, // tGPRwithpc:ssub_11 |
| 18253 | 0, // tGPRwithpc:ssub_12 |
| 18254 | 0, // tGPRwithpc:ssub_13 |
| 18255 | 0, // tGPRwithpc:ssub_14 |
| 18256 | 0, // tGPRwithpc:ssub_15 |
| 18257 | 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18258 | 0, // tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18259 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18260 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18261 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18262 | 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18263 | 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18264 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18265 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18266 | 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18267 | 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18268 | 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18269 | 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18270 | 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5 |
| 18271 | 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18272 | 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18273 | 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18274 | 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18275 | 0, // tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18276 | 0, // tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18277 | 0, // tGPRwithpc:dsub_5_dsub_7 |
| 18278 | 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18279 | 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13 |
| 18280 | 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18281 | }, |
| 18282 | { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 18283 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_0 |
| 18284 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_1 |
| 18285 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_2 |
| 18286 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_3 |
| 18287 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_4 |
| 18288 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5 |
| 18289 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_6 |
| 18290 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_7 |
| 18291 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_0 |
| 18292 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_1 |
| 18293 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_0 |
| 18294 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_1 |
| 18295 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_0 |
| 18296 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_1 |
| 18297 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_2 |
| 18298 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_3 |
| 18299 | 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0 -> SPR_8 |
| 18300 | 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_1 -> SPR_8 |
| 18301 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2 |
| 18302 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_3 |
| 18303 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4 |
| 18304 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_5 |
| 18305 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6 |
| 18306 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_7 |
| 18307 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8 |
| 18308 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_9 |
| 18309 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_10 |
| 18310 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_11 |
| 18311 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_12 |
| 18312 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_13 |
| 18313 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_14 |
| 18314 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_15 |
| 18315 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18316 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18317 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18318 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18319 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18320 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18321 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18322 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18323 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18324 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18325 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18326 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18327 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18328 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5 |
| 18329 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18330 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18331 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18332 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18333 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18334 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18335 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_dsub_7 |
| 18336 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18337 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13 |
| 18338 | 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18339 | }, |
| 18340 | { // hGPR |
| 18341 | 0, // hGPR:dsub_0 |
| 18342 | 0, // hGPR:dsub_1 |
| 18343 | 0, // hGPR:dsub_2 |
| 18344 | 0, // hGPR:dsub_3 |
| 18345 | 0, // hGPR:dsub_4 |
| 18346 | 0, // hGPR:dsub_5 |
| 18347 | 0, // hGPR:dsub_6 |
| 18348 | 0, // hGPR:dsub_7 |
| 18349 | 0, // hGPR:gsub_0 |
| 18350 | 0, // hGPR:gsub_1 |
| 18351 | 0, // hGPR:qqsub_0 |
| 18352 | 0, // hGPR:qqsub_1 |
| 18353 | 0, // hGPR:qsub_0 |
| 18354 | 0, // hGPR:qsub_1 |
| 18355 | 0, // hGPR:qsub_2 |
| 18356 | 0, // hGPR:qsub_3 |
| 18357 | 0, // hGPR:ssub_0 |
| 18358 | 0, // hGPR:ssub_1 |
| 18359 | 0, // hGPR:ssub_2 |
| 18360 | 0, // hGPR:ssub_3 |
| 18361 | 0, // hGPR:ssub_4 |
| 18362 | 0, // hGPR:ssub_5 |
| 18363 | 0, // hGPR:ssub_6 |
| 18364 | 0, // hGPR:ssub_7 |
| 18365 | 0, // hGPR:ssub_8 |
| 18366 | 0, // hGPR:ssub_9 |
| 18367 | 0, // hGPR:ssub_10 |
| 18368 | 0, // hGPR:ssub_11 |
| 18369 | 0, // hGPR:ssub_12 |
| 18370 | 0, // hGPR:ssub_13 |
| 18371 | 0, // hGPR:ssub_14 |
| 18372 | 0, // hGPR:ssub_15 |
| 18373 | 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18374 | 0, // hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18375 | 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18376 | 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18377 | 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18378 | 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18379 | 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18380 | 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18381 | 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18382 | 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18383 | 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18384 | 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18385 | 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18386 | 0, // hGPR:ssub_6_ssub_7_dsub_5 |
| 18387 | 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18388 | 0, // hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18389 | 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18390 | 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18391 | 0, // hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18392 | 0, // hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18393 | 0, // hGPR:dsub_5_dsub_7 |
| 18394 | 0, // hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18395 | 0, // hGPR:dsub_5_ssub_12_ssub_13 |
| 18396 | 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18397 | }, |
| 18398 | { // tGPR |
| 18399 | 0, // tGPR:dsub_0 |
| 18400 | 0, // tGPR:dsub_1 |
| 18401 | 0, // tGPR:dsub_2 |
| 18402 | 0, // tGPR:dsub_3 |
| 18403 | 0, // tGPR:dsub_4 |
| 18404 | 0, // tGPR:dsub_5 |
| 18405 | 0, // tGPR:dsub_6 |
| 18406 | 0, // tGPR:dsub_7 |
| 18407 | 0, // tGPR:gsub_0 |
| 18408 | 0, // tGPR:gsub_1 |
| 18409 | 0, // tGPR:qqsub_0 |
| 18410 | 0, // tGPR:qqsub_1 |
| 18411 | 0, // tGPR:qsub_0 |
| 18412 | 0, // tGPR:qsub_1 |
| 18413 | 0, // tGPR:qsub_2 |
| 18414 | 0, // tGPR:qsub_3 |
| 18415 | 0, // tGPR:ssub_0 |
| 18416 | 0, // tGPR:ssub_1 |
| 18417 | 0, // tGPR:ssub_2 |
| 18418 | 0, // tGPR:ssub_3 |
| 18419 | 0, // tGPR:ssub_4 |
| 18420 | 0, // tGPR:ssub_5 |
| 18421 | 0, // tGPR:ssub_6 |
| 18422 | 0, // tGPR:ssub_7 |
| 18423 | 0, // tGPR:ssub_8 |
| 18424 | 0, // tGPR:ssub_9 |
| 18425 | 0, // tGPR:ssub_10 |
| 18426 | 0, // tGPR:ssub_11 |
| 18427 | 0, // tGPR:ssub_12 |
| 18428 | 0, // tGPR:ssub_13 |
| 18429 | 0, // tGPR:ssub_14 |
| 18430 | 0, // tGPR:ssub_15 |
| 18431 | 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18432 | 0, // tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18433 | 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18434 | 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18435 | 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18436 | 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18437 | 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18438 | 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18439 | 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18440 | 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18441 | 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18442 | 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18443 | 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18444 | 0, // tGPR:ssub_6_ssub_7_dsub_5 |
| 18445 | 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18446 | 0, // tGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18447 | 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18448 | 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18449 | 0, // tGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18450 | 0, // tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18451 | 0, // tGPR:dsub_5_dsub_7 |
| 18452 | 0, // tGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18453 | 0, // tGPR:dsub_5_ssub_12_ssub_13 |
| 18454 | 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18455 | }, |
| 18456 | { // tGPREven |
| 18457 | 0, // tGPREven:dsub_0 |
| 18458 | 0, // tGPREven:dsub_1 |
| 18459 | 0, // tGPREven:dsub_2 |
| 18460 | 0, // tGPREven:dsub_3 |
| 18461 | 0, // tGPREven:dsub_4 |
| 18462 | 0, // tGPREven:dsub_5 |
| 18463 | 0, // tGPREven:dsub_6 |
| 18464 | 0, // tGPREven:dsub_7 |
| 18465 | 0, // tGPREven:gsub_0 |
| 18466 | 0, // tGPREven:gsub_1 |
| 18467 | 0, // tGPREven:qqsub_0 |
| 18468 | 0, // tGPREven:qqsub_1 |
| 18469 | 0, // tGPREven:qsub_0 |
| 18470 | 0, // tGPREven:qsub_1 |
| 18471 | 0, // tGPREven:qsub_2 |
| 18472 | 0, // tGPREven:qsub_3 |
| 18473 | 0, // tGPREven:ssub_0 |
| 18474 | 0, // tGPREven:ssub_1 |
| 18475 | 0, // tGPREven:ssub_2 |
| 18476 | 0, // tGPREven:ssub_3 |
| 18477 | 0, // tGPREven:ssub_4 |
| 18478 | 0, // tGPREven:ssub_5 |
| 18479 | 0, // tGPREven:ssub_6 |
| 18480 | 0, // tGPREven:ssub_7 |
| 18481 | 0, // tGPREven:ssub_8 |
| 18482 | 0, // tGPREven:ssub_9 |
| 18483 | 0, // tGPREven:ssub_10 |
| 18484 | 0, // tGPREven:ssub_11 |
| 18485 | 0, // tGPREven:ssub_12 |
| 18486 | 0, // tGPREven:ssub_13 |
| 18487 | 0, // tGPREven:ssub_14 |
| 18488 | 0, // tGPREven:ssub_15 |
| 18489 | 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18490 | 0, // tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18491 | 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18492 | 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18493 | 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18494 | 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18495 | 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18496 | 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18497 | 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18498 | 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18499 | 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18500 | 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18501 | 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18502 | 0, // tGPREven:ssub_6_ssub_7_dsub_5 |
| 18503 | 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18504 | 0, // tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18505 | 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18506 | 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18507 | 0, // tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18508 | 0, // tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18509 | 0, // tGPREven:dsub_5_dsub_7 |
| 18510 | 0, // tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18511 | 0, // tGPREven:dsub_5_ssub_12_ssub_13 |
| 18512 | 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18513 | }, |
| 18514 | { // GPRnopc_and_hGPR |
| 18515 | 0, // GPRnopc_and_hGPR:dsub_0 |
| 18516 | 0, // GPRnopc_and_hGPR:dsub_1 |
| 18517 | 0, // GPRnopc_and_hGPR:dsub_2 |
| 18518 | 0, // GPRnopc_and_hGPR:dsub_3 |
| 18519 | 0, // GPRnopc_and_hGPR:dsub_4 |
| 18520 | 0, // GPRnopc_and_hGPR:dsub_5 |
| 18521 | 0, // GPRnopc_and_hGPR:dsub_6 |
| 18522 | 0, // GPRnopc_and_hGPR:dsub_7 |
| 18523 | 0, // GPRnopc_and_hGPR:gsub_0 |
| 18524 | 0, // GPRnopc_and_hGPR:gsub_1 |
| 18525 | 0, // GPRnopc_and_hGPR:qqsub_0 |
| 18526 | 0, // GPRnopc_and_hGPR:qqsub_1 |
| 18527 | 0, // GPRnopc_and_hGPR:qsub_0 |
| 18528 | 0, // GPRnopc_and_hGPR:qsub_1 |
| 18529 | 0, // GPRnopc_and_hGPR:qsub_2 |
| 18530 | 0, // GPRnopc_and_hGPR:qsub_3 |
| 18531 | 0, // GPRnopc_and_hGPR:ssub_0 |
| 18532 | 0, // GPRnopc_and_hGPR:ssub_1 |
| 18533 | 0, // GPRnopc_and_hGPR:ssub_2 |
| 18534 | 0, // GPRnopc_and_hGPR:ssub_3 |
| 18535 | 0, // GPRnopc_and_hGPR:ssub_4 |
| 18536 | 0, // GPRnopc_and_hGPR:ssub_5 |
| 18537 | 0, // GPRnopc_and_hGPR:ssub_6 |
| 18538 | 0, // GPRnopc_and_hGPR:ssub_7 |
| 18539 | 0, // GPRnopc_and_hGPR:ssub_8 |
| 18540 | 0, // GPRnopc_and_hGPR:ssub_9 |
| 18541 | 0, // GPRnopc_and_hGPR:ssub_10 |
| 18542 | 0, // GPRnopc_and_hGPR:ssub_11 |
| 18543 | 0, // GPRnopc_and_hGPR:ssub_12 |
| 18544 | 0, // GPRnopc_and_hGPR:ssub_13 |
| 18545 | 0, // GPRnopc_and_hGPR:ssub_14 |
| 18546 | 0, // GPRnopc_and_hGPR:ssub_15 |
| 18547 | 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18548 | 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18549 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18550 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18551 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18552 | 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18553 | 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18554 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18555 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18556 | 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18557 | 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18558 | 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18559 | 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18560 | 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18561 | 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18562 | 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18563 | 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18564 | 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18565 | 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18566 | 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18567 | 0, // GPRnopc_and_hGPR:dsub_5_dsub_7 |
| 18568 | 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18569 | 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18570 | 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18571 | }, |
| 18572 | { // GPRnosp_and_hGPR |
| 18573 | 0, // GPRnosp_and_hGPR:dsub_0 |
| 18574 | 0, // GPRnosp_and_hGPR:dsub_1 |
| 18575 | 0, // GPRnosp_and_hGPR:dsub_2 |
| 18576 | 0, // GPRnosp_and_hGPR:dsub_3 |
| 18577 | 0, // GPRnosp_and_hGPR:dsub_4 |
| 18578 | 0, // GPRnosp_and_hGPR:dsub_5 |
| 18579 | 0, // GPRnosp_and_hGPR:dsub_6 |
| 18580 | 0, // GPRnosp_and_hGPR:dsub_7 |
| 18581 | 0, // GPRnosp_and_hGPR:gsub_0 |
| 18582 | 0, // GPRnosp_and_hGPR:gsub_1 |
| 18583 | 0, // GPRnosp_and_hGPR:qqsub_0 |
| 18584 | 0, // GPRnosp_and_hGPR:qqsub_1 |
| 18585 | 0, // GPRnosp_and_hGPR:qsub_0 |
| 18586 | 0, // GPRnosp_and_hGPR:qsub_1 |
| 18587 | 0, // GPRnosp_and_hGPR:qsub_2 |
| 18588 | 0, // GPRnosp_and_hGPR:qsub_3 |
| 18589 | 0, // GPRnosp_and_hGPR:ssub_0 |
| 18590 | 0, // GPRnosp_and_hGPR:ssub_1 |
| 18591 | 0, // GPRnosp_and_hGPR:ssub_2 |
| 18592 | 0, // GPRnosp_and_hGPR:ssub_3 |
| 18593 | 0, // GPRnosp_and_hGPR:ssub_4 |
| 18594 | 0, // GPRnosp_and_hGPR:ssub_5 |
| 18595 | 0, // GPRnosp_and_hGPR:ssub_6 |
| 18596 | 0, // GPRnosp_and_hGPR:ssub_7 |
| 18597 | 0, // GPRnosp_and_hGPR:ssub_8 |
| 18598 | 0, // GPRnosp_and_hGPR:ssub_9 |
| 18599 | 0, // GPRnosp_and_hGPR:ssub_10 |
| 18600 | 0, // GPRnosp_and_hGPR:ssub_11 |
| 18601 | 0, // GPRnosp_and_hGPR:ssub_12 |
| 18602 | 0, // GPRnosp_and_hGPR:ssub_13 |
| 18603 | 0, // GPRnosp_and_hGPR:ssub_14 |
| 18604 | 0, // GPRnosp_and_hGPR:ssub_15 |
| 18605 | 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18606 | 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18607 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18608 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18609 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18610 | 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18611 | 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18612 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18613 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18614 | 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18615 | 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18616 | 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18617 | 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18618 | 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18619 | 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18620 | 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18621 | 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18622 | 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18623 | 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18624 | 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18625 | 0, // GPRnosp_and_hGPR:dsub_5_dsub_7 |
| 18626 | 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18627 | 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18628 | 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18629 | }, |
| 18630 | { // GPRnoip_and_hGPR |
| 18631 | 0, // GPRnoip_and_hGPR:dsub_0 |
| 18632 | 0, // GPRnoip_and_hGPR:dsub_1 |
| 18633 | 0, // GPRnoip_and_hGPR:dsub_2 |
| 18634 | 0, // GPRnoip_and_hGPR:dsub_3 |
| 18635 | 0, // GPRnoip_and_hGPR:dsub_4 |
| 18636 | 0, // GPRnoip_and_hGPR:dsub_5 |
| 18637 | 0, // GPRnoip_and_hGPR:dsub_6 |
| 18638 | 0, // GPRnoip_and_hGPR:dsub_7 |
| 18639 | 0, // GPRnoip_and_hGPR:gsub_0 |
| 18640 | 0, // GPRnoip_and_hGPR:gsub_1 |
| 18641 | 0, // GPRnoip_and_hGPR:qqsub_0 |
| 18642 | 0, // GPRnoip_and_hGPR:qqsub_1 |
| 18643 | 0, // GPRnoip_and_hGPR:qsub_0 |
| 18644 | 0, // GPRnoip_and_hGPR:qsub_1 |
| 18645 | 0, // GPRnoip_and_hGPR:qsub_2 |
| 18646 | 0, // GPRnoip_and_hGPR:qsub_3 |
| 18647 | 0, // GPRnoip_and_hGPR:ssub_0 |
| 18648 | 0, // GPRnoip_and_hGPR:ssub_1 |
| 18649 | 0, // GPRnoip_and_hGPR:ssub_2 |
| 18650 | 0, // GPRnoip_and_hGPR:ssub_3 |
| 18651 | 0, // GPRnoip_and_hGPR:ssub_4 |
| 18652 | 0, // GPRnoip_and_hGPR:ssub_5 |
| 18653 | 0, // GPRnoip_and_hGPR:ssub_6 |
| 18654 | 0, // GPRnoip_and_hGPR:ssub_7 |
| 18655 | 0, // GPRnoip_and_hGPR:ssub_8 |
| 18656 | 0, // GPRnoip_and_hGPR:ssub_9 |
| 18657 | 0, // GPRnoip_and_hGPR:ssub_10 |
| 18658 | 0, // GPRnoip_and_hGPR:ssub_11 |
| 18659 | 0, // GPRnoip_and_hGPR:ssub_12 |
| 18660 | 0, // GPRnoip_and_hGPR:ssub_13 |
| 18661 | 0, // GPRnoip_and_hGPR:ssub_14 |
| 18662 | 0, // GPRnoip_and_hGPR:ssub_15 |
| 18663 | 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18664 | 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18665 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18666 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18667 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18668 | 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18669 | 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18670 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18671 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18672 | 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18673 | 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18674 | 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18675 | 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18676 | 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18677 | 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18678 | 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18679 | 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18680 | 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18681 | 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18682 | 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18683 | 0, // GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 18684 | 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18685 | 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18686 | 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18687 | }, |
| 18688 | { // GPRnoip_and_tGPREven |
| 18689 | 0, // GPRnoip_and_tGPREven:dsub_0 |
| 18690 | 0, // GPRnoip_and_tGPREven:dsub_1 |
| 18691 | 0, // GPRnoip_and_tGPREven:dsub_2 |
| 18692 | 0, // GPRnoip_and_tGPREven:dsub_3 |
| 18693 | 0, // GPRnoip_and_tGPREven:dsub_4 |
| 18694 | 0, // GPRnoip_and_tGPREven:dsub_5 |
| 18695 | 0, // GPRnoip_and_tGPREven:dsub_6 |
| 18696 | 0, // GPRnoip_and_tGPREven:dsub_7 |
| 18697 | 0, // GPRnoip_and_tGPREven:gsub_0 |
| 18698 | 0, // GPRnoip_and_tGPREven:gsub_1 |
| 18699 | 0, // GPRnoip_and_tGPREven:qqsub_0 |
| 18700 | 0, // GPRnoip_and_tGPREven:qqsub_1 |
| 18701 | 0, // GPRnoip_and_tGPREven:qsub_0 |
| 18702 | 0, // GPRnoip_and_tGPREven:qsub_1 |
| 18703 | 0, // GPRnoip_and_tGPREven:qsub_2 |
| 18704 | 0, // GPRnoip_and_tGPREven:qsub_3 |
| 18705 | 0, // GPRnoip_and_tGPREven:ssub_0 |
| 18706 | 0, // GPRnoip_and_tGPREven:ssub_1 |
| 18707 | 0, // GPRnoip_and_tGPREven:ssub_2 |
| 18708 | 0, // GPRnoip_and_tGPREven:ssub_3 |
| 18709 | 0, // GPRnoip_and_tGPREven:ssub_4 |
| 18710 | 0, // GPRnoip_and_tGPREven:ssub_5 |
| 18711 | 0, // GPRnoip_and_tGPREven:ssub_6 |
| 18712 | 0, // GPRnoip_and_tGPREven:ssub_7 |
| 18713 | 0, // GPRnoip_and_tGPREven:ssub_8 |
| 18714 | 0, // GPRnoip_and_tGPREven:ssub_9 |
| 18715 | 0, // GPRnoip_and_tGPREven:ssub_10 |
| 18716 | 0, // GPRnoip_and_tGPREven:ssub_11 |
| 18717 | 0, // GPRnoip_and_tGPREven:ssub_12 |
| 18718 | 0, // GPRnoip_and_tGPREven:ssub_13 |
| 18719 | 0, // GPRnoip_and_tGPREven:ssub_14 |
| 18720 | 0, // GPRnoip_and_tGPREven:ssub_15 |
| 18721 | 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18722 | 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18723 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18724 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18725 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18726 | 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18727 | 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18728 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18729 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18730 | 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18731 | 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18732 | 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18733 | 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18734 | 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 18735 | 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18736 | 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18737 | 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18738 | 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18739 | 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18740 | 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18741 | 0, // GPRnoip_and_tGPREven:dsub_5_dsub_7 |
| 18742 | 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18743 | 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 18744 | 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18745 | }, |
| 18746 | { // GPRnosp_and_GPRnopc_and_hGPR |
| 18747 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_0 |
| 18748 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_1 |
| 18749 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_2 |
| 18750 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_3 |
| 18751 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_4 |
| 18752 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5 |
| 18753 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_6 |
| 18754 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_7 |
| 18755 | 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_0 |
| 18756 | 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_1 |
| 18757 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_0 |
| 18758 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_1 |
| 18759 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_0 |
| 18760 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_1 |
| 18761 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_2 |
| 18762 | 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_3 |
| 18763 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0 |
| 18764 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_1 |
| 18765 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2 |
| 18766 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_3 |
| 18767 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4 |
| 18768 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_5 |
| 18769 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6 |
| 18770 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_7 |
| 18771 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8 |
| 18772 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_9 |
| 18773 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_10 |
| 18774 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_11 |
| 18775 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_12 |
| 18776 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_13 |
| 18777 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_14 |
| 18778 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_15 |
| 18779 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18780 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18781 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18782 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18783 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18784 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18785 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18786 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18787 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18788 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18789 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18790 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18791 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18792 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18793 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18794 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18795 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18796 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18797 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18798 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18799 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_dsub_7 |
| 18800 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18801 | 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18802 | 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18803 | }, |
| 18804 | { // tGPROdd |
| 18805 | 0, // tGPROdd:dsub_0 |
| 18806 | 0, // tGPROdd:dsub_1 |
| 18807 | 0, // tGPROdd:dsub_2 |
| 18808 | 0, // tGPROdd:dsub_3 |
| 18809 | 0, // tGPROdd:dsub_4 |
| 18810 | 0, // tGPROdd:dsub_5 |
| 18811 | 0, // tGPROdd:dsub_6 |
| 18812 | 0, // tGPROdd:dsub_7 |
| 18813 | 0, // tGPROdd:gsub_0 |
| 18814 | 0, // tGPROdd:gsub_1 |
| 18815 | 0, // tGPROdd:qqsub_0 |
| 18816 | 0, // tGPROdd:qqsub_1 |
| 18817 | 0, // tGPROdd:qsub_0 |
| 18818 | 0, // tGPROdd:qsub_1 |
| 18819 | 0, // tGPROdd:qsub_2 |
| 18820 | 0, // tGPROdd:qsub_3 |
| 18821 | 0, // tGPROdd:ssub_0 |
| 18822 | 0, // tGPROdd:ssub_1 |
| 18823 | 0, // tGPROdd:ssub_2 |
| 18824 | 0, // tGPROdd:ssub_3 |
| 18825 | 0, // tGPROdd:ssub_4 |
| 18826 | 0, // tGPROdd:ssub_5 |
| 18827 | 0, // tGPROdd:ssub_6 |
| 18828 | 0, // tGPROdd:ssub_7 |
| 18829 | 0, // tGPROdd:ssub_8 |
| 18830 | 0, // tGPROdd:ssub_9 |
| 18831 | 0, // tGPROdd:ssub_10 |
| 18832 | 0, // tGPROdd:ssub_11 |
| 18833 | 0, // tGPROdd:ssub_12 |
| 18834 | 0, // tGPROdd:ssub_13 |
| 18835 | 0, // tGPROdd:ssub_14 |
| 18836 | 0, // tGPROdd:ssub_15 |
| 18837 | 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18838 | 0, // tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18839 | 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18840 | 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18841 | 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18842 | 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18843 | 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18844 | 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18845 | 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18846 | 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18847 | 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18848 | 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18849 | 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18850 | 0, // tGPROdd:ssub_6_ssub_7_dsub_5 |
| 18851 | 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18852 | 0, // tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18853 | 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18854 | 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18855 | 0, // tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18856 | 0, // tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18857 | 0, // tGPROdd:dsub_5_dsub_7 |
| 18858 | 0, // tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18859 | 0, // tGPROdd:dsub_5_ssub_12_ssub_13 |
| 18860 | 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18861 | }, |
| 18862 | { // GPRnopc_and_GPRnoip_and_hGPR |
| 18863 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_0 |
| 18864 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_1 |
| 18865 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_2 |
| 18866 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_3 |
| 18867 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_4 |
| 18868 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5 |
| 18869 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_6 |
| 18870 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_7 |
| 18871 | 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_0 |
| 18872 | 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_1 |
| 18873 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_0 |
| 18874 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_1 |
| 18875 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_0 |
| 18876 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_1 |
| 18877 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_2 |
| 18878 | 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_3 |
| 18879 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0 |
| 18880 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_1 |
| 18881 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2 |
| 18882 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_3 |
| 18883 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4 |
| 18884 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_5 |
| 18885 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6 |
| 18886 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_7 |
| 18887 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8 |
| 18888 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_9 |
| 18889 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_10 |
| 18890 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_11 |
| 18891 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_12 |
| 18892 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_13 |
| 18893 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_14 |
| 18894 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_15 |
| 18895 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18896 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18897 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18898 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18899 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18900 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18901 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18902 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18903 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18904 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18905 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18906 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18907 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18908 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18909 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18910 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18911 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18912 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18913 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18914 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18915 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 18916 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18917 | 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18918 | 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18919 | }, |
| 18920 | { // GPRnosp_and_GPRnoip_and_hGPR |
| 18921 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_0 |
| 18922 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_1 |
| 18923 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_2 |
| 18924 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_3 |
| 18925 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_4 |
| 18926 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5 |
| 18927 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_6 |
| 18928 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_7 |
| 18929 | 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_0 |
| 18930 | 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_1 |
| 18931 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_0 |
| 18932 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_1 |
| 18933 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_0 |
| 18934 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_1 |
| 18935 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_2 |
| 18936 | 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_3 |
| 18937 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0 |
| 18938 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_1 |
| 18939 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2 |
| 18940 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_3 |
| 18941 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4 |
| 18942 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_5 |
| 18943 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6 |
| 18944 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_7 |
| 18945 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8 |
| 18946 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_9 |
| 18947 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_10 |
| 18948 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_11 |
| 18949 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_12 |
| 18950 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_13 |
| 18951 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_14 |
| 18952 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_15 |
| 18953 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 18954 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 18955 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 18956 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 18957 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 18958 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 18959 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18960 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 18961 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 18962 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18963 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 18964 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 18965 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 18966 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 18967 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 18968 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 18969 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 18970 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18971 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 18972 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 18973 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 18974 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 18975 | 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 18976 | 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 18977 | }, |
| 18978 | { // tcGPR |
| 18979 | 0, // tcGPR:dsub_0 |
| 18980 | 0, // tcGPR:dsub_1 |
| 18981 | 0, // tcGPR:dsub_2 |
| 18982 | 0, // tcGPR:dsub_3 |
| 18983 | 0, // tcGPR:dsub_4 |
| 18984 | 0, // tcGPR:dsub_5 |
| 18985 | 0, // tcGPR:dsub_6 |
| 18986 | 0, // tcGPR:dsub_7 |
| 18987 | 0, // tcGPR:gsub_0 |
| 18988 | 0, // tcGPR:gsub_1 |
| 18989 | 0, // tcGPR:qqsub_0 |
| 18990 | 0, // tcGPR:qqsub_1 |
| 18991 | 0, // tcGPR:qsub_0 |
| 18992 | 0, // tcGPR:qsub_1 |
| 18993 | 0, // tcGPR:qsub_2 |
| 18994 | 0, // tcGPR:qsub_3 |
| 18995 | 0, // tcGPR:ssub_0 |
| 18996 | 0, // tcGPR:ssub_1 |
| 18997 | 0, // tcGPR:ssub_2 |
| 18998 | 0, // tcGPR:ssub_3 |
| 18999 | 0, // tcGPR:ssub_4 |
| 19000 | 0, // tcGPR:ssub_5 |
| 19001 | 0, // tcGPR:ssub_6 |
| 19002 | 0, // tcGPR:ssub_7 |
| 19003 | 0, // tcGPR:ssub_8 |
| 19004 | 0, // tcGPR:ssub_9 |
| 19005 | 0, // tcGPR:ssub_10 |
| 19006 | 0, // tcGPR:ssub_11 |
| 19007 | 0, // tcGPR:ssub_12 |
| 19008 | 0, // tcGPR:ssub_13 |
| 19009 | 0, // tcGPR:ssub_14 |
| 19010 | 0, // tcGPR:ssub_15 |
| 19011 | 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19012 | 0, // tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19013 | 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19014 | 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19015 | 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19016 | 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19017 | 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19018 | 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19019 | 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19020 | 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19021 | 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19022 | 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19023 | 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19024 | 0, // tcGPR:ssub_6_ssub_7_dsub_5 |
| 19025 | 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19026 | 0, // tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19027 | 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19028 | 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19029 | 0, // tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19030 | 0, // tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19031 | 0, // tcGPR:dsub_5_dsub_7 |
| 19032 | 0, // tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19033 | 0, // tcGPR:dsub_5_ssub_12_ssub_13 |
| 19034 | 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19035 | }, |
| 19036 | { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 19037 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_0 |
| 19038 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_1 |
| 19039 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_2 |
| 19040 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_3 |
| 19041 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_4 |
| 19042 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5 |
| 19043 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_6 |
| 19044 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_7 |
| 19045 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_0 |
| 19046 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_1 |
| 19047 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_0 |
| 19048 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_1 |
| 19049 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_0 |
| 19050 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_1 |
| 19051 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_2 |
| 19052 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_3 |
| 19053 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0 |
| 19054 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_1 |
| 19055 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2 |
| 19056 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_3 |
| 19057 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4 |
| 19058 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_5 |
| 19059 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6 |
| 19060 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_7 |
| 19061 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8 |
| 19062 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_9 |
| 19063 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_10 |
| 19064 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_11 |
| 19065 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_12 |
| 19066 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_13 |
| 19067 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_14 |
| 19068 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_15 |
| 19069 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19070 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19071 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19072 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19073 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19074 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19075 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19076 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19077 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19078 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19079 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19080 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19081 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19082 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 19083 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19084 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19085 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19086 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19087 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19088 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19089 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 19090 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19091 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 19092 | 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19093 | }, |
| 19094 | { // hGPR_and_tGPREven |
| 19095 | 0, // hGPR_and_tGPREven:dsub_0 |
| 19096 | 0, // hGPR_and_tGPREven:dsub_1 |
| 19097 | 0, // hGPR_and_tGPREven:dsub_2 |
| 19098 | 0, // hGPR_and_tGPREven:dsub_3 |
| 19099 | 0, // hGPR_and_tGPREven:dsub_4 |
| 19100 | 0, // hGPR_and_tGPREven:dsub_5 |
| 19101 | 0, // hGPR_and_tGPREven:dsub_6 |
| 19102 | 0, // hGPR_and_tGPREven:dsub_7 |
| 19103 | 0, // hGPR_and_tGPREven:gsub_0 |
| 19104 | 0, // hGPR_and_tGPREven:gsub_1 |
| 19105 | 0, // hGPR_and_tGPREven:qqsub_0 |
| 19106 | 0, // hGPR_and_tGPREven:qqsub_1 |
| 19107 | 0, // hGPR_and_tGPREven:qsub_0 |
| 19108 | 0, // hGPR_and_tGPREven:qsub_1 |
| 19109 | 0, // hGPR_and_tGPREven:qsub_2 |
| 19110 | 0, // hGPR_and_tGPREven:qsub_3 |
| 19111 | 0, // hGPR_and_tGPREven:ssub_0 |
| 19112 | 0, // hGPR_and_tGPREven:ssub_1 |
| 19113 | 0, // hGPR_and_tGPREven:ssub_2 |
| 19114 | 0, // hGPR_and_tGPREven:ssub_3 |
| 19115 | 0, // hGPR_and_tGPREven:ssub_4 |
| 19116 | 0, // hGPR_and_tGPREven:ssub_5 |
| 19117 | 0, // hGPR_and_tGPREven:ssub_6 |
| 19118 | 0, // hGPR_and_tGPREven:ssub_7 |
| 19119 | 0, // hGPR_and_tGPREven:ssub_8 |
| 19120 | 0, // hGPR_and_tGPREven:ssub_9 |
| 19121 | 0, // hGPR_and_tGPREven:ssub_10 |
| 19122 | 0, // hGPR_and_tGPREven:ssub_11 |
| 19123 | 0, // hGPR_and_tGPREven:ssub_12 |
| 19124 | 0, // hGPR_and_tGPREven:ssub_13 |
| 19125 | 0, // hGPR_and_tGPREven:ssub_14 |
| 19126 | 0, // hGPR_and_tGPREven:ssub_15 |
| 19127 | 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19128 | 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19129 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19130 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19131 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19132 | 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19133 | 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19134 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19135 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19136 | 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19137 | 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19138 | 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19139 | 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19140 | 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 19141 | 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19142 | 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19143 | 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19144 | 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19145 | 0, // hGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19146 | 0, // hGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19147 | 0, // hGPR_and_tGPREven:dsub_5_dsub_7 |
| 19148 | 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19149 | 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 19150 | 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19151 | }, |
| 19152 | { // tGPR_and_tGPREven |
| 19153 | 0, // tGPR_and_tGPREven:dsub_0 |
| 19154 | 0, // tGPR_and_tGPREven:dsub_1 |
| 19155 | 0, // tGPR_and_tGPREven:dsub_2 |
| 19156 | 0, // tGPR_and_tGPREven:dsub_3 |
| 19157 | 0, // tGPR_and_tGPREven:dsub_4 |
| 19158 | 0, // tGPR_and_tGPREven:dsub_5 |
| 19159 | 0, // tGPR_and_tGPREven:dsub_6 |
| 19160 | 0, // tGPR_and_tGPREven:dsub_7 |
| 19161 | 0, // tGPR_and_tGPREven:gsub_0 |
| 19162 | 0, // tGPR_and_tGPREven:gsub_1 |
| 19163 | 0, // tGPR_and_tGPREven:qqsub_0 |
| 19164 | 0, // tGPR_and_tGPREven:qqsub_1 |
| 19165 | 0, // tGPR_and_tGPREven:qsub_0 |
| 19166 | 0, // tGPR_and_tGPREven:qsub_1 |
| 19167 | 0, // tGPR_and_tGPREven:qsub_2 |
| 19168 | 0, // tGPR_and_tGPREven:qsub_3 |
| 19169 | 0, // tGPR_and_tGPREven:ssub_0 |
| 19170 | 0, // tGPR_and_tGPREven:ssub_1 |
| 19171 | 0, // tGPR_and_tGPREven:ssub_2 |
| 19172 | 0, // tGPR_and_tGPREven:ssub_3 |
| 19173 | 0, // tGPR_and_tGPREven:ssub_4 |
| 19174 | 0, // tGPR_and_tGPREven:ssub_5 |
| 19175 | 0, // tGPR_and_tGPREven:ssub_6 |
| 19176 | 0, // tGPR_and_tGPREven:ssub_7 |
| 19177 | 0, // tGPR_and_tGPREven:ssub_8 |
| 19178 | 0, // tGPR_and_tGPREven:ssub_9 |
| 19179 | 0, // tGPR_and_tGPREven:ssub_10 |
| 19180 | 0, // tGPR_and_tGPREven:ssub_11 |
| 19181 | 0, // tGPR_and_tGPREven:ssub_12 |
| 19182 | 0, // tGPR_and_tGPREven:ssub_13 |
| 19183 | 0, // tGPR_and_tGPREven:ssub_14 |
| 19184 | 0, // tGPR_and_tGPREven:ssub_15 |
| 19185 | 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19186 | 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19187 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19188 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19189 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19190 | 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19191 | 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19192 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19193 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19194 | 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19195 | 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19196 | 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19197 | 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19198 | 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 19199 | 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19200 | 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19201 | 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19202 | 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19203 | 0, // tGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19204 | 0, // tGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19205 | 0, // tGPR_and_tGPREven:dsub_5_dsub_7 |
| 19206 | 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19207 | 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 19208 | 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19209 | }, |
| 19210 | { // tGPR_and_tGPROdd |
| 19211 | 0, // tGPR_and_tGPROdd:dsub_0 |
| 19212 | 0, // tGPR_and_tGPROdd:dsub_1 |
| 19213 | 0, // tGPR_and_tGPROdd:dsub_2 |
| 19214 | 0, // tGPR_and_tGPROdd:dsub_3 |
| 19215 | 0, // tGPR_and_tGPROdd:dsub_4 |
| 19216 | 0, // tGPR_and_tGPROdd:dsub_5 |
| 19217 | 0, // tGPR_and_tGPROdd:dsub_6 |
| 19218 | 0, // tGPR_and_tGPROdd:dsub_7 |
| 19219 | 0, // tGPR_and_tGPROdd:gsub_0 |
| 19220 | 0, // tGPR_and_tGPROdd:gsub_1 |
| 19221 | 0, // tGPR_and_tGPROdd:qqsub_0 |
| 19222 | 0, // tGPR_and_tGPROdd:qqsub_1 |
| 19223 | 0, // tGPR_and_tGPROdd:qsub_0 |
| 19224 | 0, // tGPR_and_tGPROdd:qsub_1 |
| 19225 | 0, // tGPR_and_tGPROdd:qsub_2 |
| 19226 | 0, // tGPR_and_tGPROdd:qsub_3 |
| 19227 | 0, // tGPR_and_tGPROdd:ssub_0 |
| 19228 | 0, // tGPR_and_tGPROdd:ssub_1 |
| 19229 | 0, // tGPR_and_tGPROdd:ssub_2 |
| 19230 | 0, // tGPR_and_tGPROdd:ssub_3 |
| 19231 | 0, // tGPR_and_tGPROdd:ssub_4 |
| 19232 | 0, // tGPR_and_tGPROdd:ssub_5 |
| 19233 | 0, // tGPR_and_tGPROdd:ssub_6 |
| 19234 | 0, // tGPR_and_tGPROdd:ssub_7 |
| 19235 | 0, // tGPR_and_tGPROdd:ssub_8 |
| 19236 | 0, // tGPR_and_tGPROdd:ssub_9 |
| 19237 | 0, // tGPR_and_tGPROdd:ssub_10 |
| 19238 | 0, // tGPR_and_tGPROdd:ssub_11 |
| 19239 | 0, // tGPR_and_tGPROdd:ssub_12 |
| 19240 | 0, // tGPR_and_tGPROdd:ssub_13 |
| 19241 | 0, // tGPR_and_tGPROdd:ssub_14 |
| 19242 | 0, // tGPR_and_tGPROdd:ssub_15 |
| 19243 | 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19244 | 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19245 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19246 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19247 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19248 | 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19249 | 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19250 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19251 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19252 | 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19253 | 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19254 | 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19255 | 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19256 | 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5 |
| 19257 | 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19258 | 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19259 | 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19260 | 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19261 | 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19262 | 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19263 | 0, // tGPR_and_tGPROdd:dsub_5_dsub_7 |
| 19264 | 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19265 | 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13 |
| 19266 | 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19267 | }, |
| 19268 | { // tcGPRnotr12 |
| 19269 | 0, // tcGPRnotr12:dsub_0 |
| 19270 | 0, // tcGPRnotr12:dsub_1 |
| 19271 | 0, // tcGPRnotr12:dsub_2 |
| 19272 | 0, // tcGPRnotr12:dsub_3 |
| 19273 | 0, // tcGPRnotr12:dsub_4 |
| 19274 | 0, // tcGPRnotr12:dsub_5 |
| 19275 | 0, // tcGPRnotr12:dsub_6 |
| 19276 | 0, // tcGPRnotr12:dsub_7 |
| 19277 | 0, // tcGPRnotr12:gsub_0 |
| 19278 | 0, // tcGPRnotr12:gsub_1 |
| 19279 | 0, // tcGPRnotr12:qqsub_0 |
| 19280 | 0, // tcGPRnotr12:qqsub_1 |
| 19281 | 0, // tcGPRnotr12:qsub_0 |
| 19282 | 0, // tcGPRnotr12:qsub_1 |
| 19283 | 0, // tcGPRnotr12:qsub_2 |
| 19284 | 0, // tcGPRnotr12:qsub_3 |
| 19285 | 0, // tcGPRnotr12:ssub_0 |
| 19286 | 0, // tcGPRnotr12:ssub_1 |
| 19287 | 0, // tcGPRnotr12:ssub_2 |
| 19288 | 0, // tcGPRnotr12:ssub_3 |
| 19289 | 0, // tcGPRnotr12:ssub_4 |
| 19290 | 0, // tcGPRnotr12:ssub_5 |
| 19291 | 0, // tcGPRnotr12:ssub_6 |
| 19292 | 0, // tcGPRnotr12:ssub_7 |
| 19293 | 0, // tcGPRnotr12:ssub_8 |
| 19294 | 0, // tcGPRnotr12:ssub_9 |
| 19295 | 0, // tcGPRnotr12:ssub_10 |
| 19296 | 0, // tcGPRnotr12:ssub_11 |
| 19297 | 0, // tcGPRnotr12:ssub_12 |
| 19298 | 0, // tcGPRnotr12:ssub_13 |
| 19299 | 0, // tcGPRnotr12:ssub_14 |
| 19300 | 0, // tcGPRnotr12:ssub_15 |
| 19301 | 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19302 | 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19303 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19304 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19305 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19306 | 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19307 | 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19308 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19309 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19310 | 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19311 | 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19312 | 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19313 | 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19314 | 0, // tcGPRnotr12:ssub_6_ssub_7_dsub_5 |
| 19315 | 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19316 | 0, // tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19317 | 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19318 | 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19319 | 0, // tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19320 | 0, // tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19321 | 0, // tcGPRnotr12:dsub_5_dsub_7 |
| 19322 | 0, // tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19323 | 0, // tcGPRnotr12:dsub_5_ssub_12_ssub_13 |
| 19324 | 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19325 | }, |
| 19326 | { // tGPREven_and_tcGPR |
| 19327 | 0, // tGPREven_and_tcGPR:dsub_0 |
| 19328 | 0, // tGPREven_and_tcGPR:dsub_1 |
| 19329 | 0, // tGPREven_and_tcGPR:dsub_2 |
| 19330 | 0, // tGPREven_and_tcGPR:dsub_3 |
| 19331 | 0, // tGPREven_and_tcGPR:dsub_4 |
| 19332 | 0, // tGPREven_and_tcGPR:dsub_5 |
| 19333 | 0, // tGPREven_and_tcGPR:dsub_6 |
| 19334 | 0, // tGPREven_and_tcGPR:dsub_7 |
| 19335 | 0, // tGPREven_and_tcGPR:gsub_0 |
| 19336 | 0, // tGPREven_and_tcGPR:gsub_1 |
| 19337 | 0, // tGPREven_and_tcGPR:qqsub_0 |
| 19338 | 0, // tGPREven_and_tcGPR:qqsub_1 |
| 19339 | 0, // tGPREven_and_tcGPR:qsub_0 |
| 19340 | 0, // tGPREven_and_tcGPR:qsub_1 |
| 19341 | 0, // tGPREven_and_tcGPR:qsub_2 |
| 19342 | 0, // tGPREven_and_tcGPR:qsub_3 |
| 19343 | 0, // tGPREven_and_tcGPR:ssub_0 |
| 19344 | 0, // tGPREven_and_tcGPR:ssub_1 |
| 19345 | 0, // tGPREven_and_tcGPR:ssub_2 |
| 19346 | 0, // tGPREven_and_tcGPR:ssub_3 |
| 19347 | 0, // tGPREven_and_tcGPR:ssub_4 |
| 19348 | 0, // tGPREven_and_tcGPR:ssub_5 |
| 19349 | 0, // tGPREven_and_tcGPR:ssub_6 |
| 19350 | 0, // tGPREven_and_tcGPR:ssub_7 |
| 19351 | 0, // tGPREven_and_tcGPR:ssub_8 |
| 19352 | 0, // tGPREven_and_tcGPR:ssub_9 |
| 19353 | 0, // tGPREven_and_tcGPR:ssub_10 |
| 19354 | 0, // tGPREven_and_tcGPR:ssub_11 |
| 19355 | 0, // tGPREven_and_tcGPR:ssub_12 |
| 19356 | 0, // tGPREven_and_tcGPR:ssub_13 |
| 19357 | 0, // tGPREven_and_tcGPR:ssub_14 |
| 19358 | 0, // tGPREven_and_tcGPR:ssub_15 |
| 19359 | 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19360 | 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19361 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19362 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19363 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19364 | 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19365 | 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19366 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19367 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19368 | 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19369 | 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19370 | 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19371 | 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19372 | 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 19373 | 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19374 | 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19375 | 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19376 | 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19377 | 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19378 | 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19379 | 0, // tGPREven_and_tcGPR:dsub_5_dsub_7 |
| 19380 | 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19381 | 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 19382 | 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19383 | }, |
| 19384 | { // FP_STATUS_REGS |
| 19385 | 0, // FP_STATUS_REGS:dsub_0 |
| 19386 | 0, // FP_STATUS_REGS:dsub_1 |
| 19387 | 0, // FP_STATUS_REGS:dsub_2 |
| 19388 | 0, // FP_STATUS_REGS:dsub_3 |
| 19389 | 0, // FP_STATUS_REGS:dsub_4 |
| 19390 | 0, // FP_STATUS_REGS:dsub_5 |
| 19391 | 0, // FP_STATUS_REGS:dsub_6 |
| 19392 | 0, // FP_STATUS_REGS:dsub_7 |
| 19393 | 0, // FP_STATUS_REGS:gsub_0 |
| 19394 | 0, // FP_STATUS_REGS:gsub_1 |
| 19395 | 0, // FP_STATUS_REGS:qqsub_0 |
| 19396 | 0, // FP_STATUS_REGS:qqsub_1 |
| 19397 | 0, // FP_STATUS_REGS:qsub_0 |
| 19398 | 0, // FP_STATUS_REGS:qsub_1 |
| 19399 | 0, // FP_STATUS_REGS:qsub_2 |
| 19400 | 0, // FP_STATUS_REGS:qsub_3 |
| 19401 | 0, // FP_STATUS_REGS:ssub_0 |
| 19402 | 0, // FP_STATUS_REGS:ssub_1 |
| 19403 | 0, // FP_STATUS_REGS:ssub_2 |
| 19404 | 0, // FP_STATUS_REGS:ssub_3 |
| 19405 | 0, // FP_STATUS_REGS:ssub_4 |
| 19406 | 0, // FP_STATUS_REGS:ssub_5 |
| 19407 | 0, // FP_STATUS_REGS:ssub_6 |
| 19408 | 0, // FP_STATUS_REGS:ssub_7 |
| 19409 | 0, // FP_STATUS_REGS:ssub_8 |
| 19410 | 0, // FP_STATUS_REGS:ssub_9 |
| 19411 | 0, // FP_STATUS_REGS:ssub_10 |
| 19412 | 0, // FP_STATUS_REGS:ssub_11 |
| 19413 | 0, // FP_STATUS_REGS:ssub_12 |
| 19414 | 0, // FP_STATUS_REGS:ssub_13 |
| 19415 | 0, // FP_STATUS_REGS:ssub_14 |
| 19416 | 0, // FP_STATUS_REGS:ssub_15 |
| 19417 | 0, // FP_STATUS_REGS:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19418 | 0, // FP_STATUS_REGS:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19419 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19420 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19421 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19422 | 0, // FP_STATUS_REGS:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19423 | 0, // FP_STATUS_REGS:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19424 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19425 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19426 | 0, // FP_STATUS_REGS:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19427 | 0, // FP_STATUS_REGS:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19428 | 0, // FP_STATUS_REGS:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19429 | 0, // FP_STATUS_REGS:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19430 | 0, // FP_STATUS_REGS:ssub_6_ssub_7_dsub_5 |
| 19431 | 0, // FP_STATUS_REGS:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19432 | 0, // FP_STATUS_REGS:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19433 | 0, // FP_STATUS_REGS:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19434 | 0, // FP_STATUS_REGS:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19435 | 0, // FP_STATUS_REGS:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19436 | 0, // FP_STATUS_REGS:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19437 | 0, // FP_STATUS_REGS:dsub_5_dsub_7 |
| 19438 | 0, // FP_STATUS_REGS:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19439 | 0, // FP_STATUS_REGS:dsub_5_ssub_12_ssub_13 |
| 19440 | 0, // FP_STATUS_REGS:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19441 | }, |
| 19442 | { // hGPR_and_GPRnoip_and_tGPREven |
| 19443 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_0 |
| 19444 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_1 |
| 19445 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_2 |
| 19446 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_3 |
| 19447 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_4 |
| 19448 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5 |
| 19449 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_6 |
| 19450 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_7 |
| 19451 | 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_0 |
| 19452 | 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_1 |
| 19453 | 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_0 |
| 19454 | 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_1 |
| 19455 | 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_0 |
| 19456 | 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_1 |
| 19457 | 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_2 |
| 19458 | 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_3 |
| 19459 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0 |
| 19460 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_1 |
| 19461 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2 |
| 19462 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_3 |
| 19463 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4 |
| 19464 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_5 |
| 19465 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6 |
| 19466 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_7 |
| 19467 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8 |
| 19468 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_9 |
| 19469 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_10 |
| 19470 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_11 |
| 19471 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_12 |
| 19472 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_13 |
| 19473 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_14 |
| 19474 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_15 |
| 19475 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19476 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19477 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19478 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19479 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19480 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19481 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19482 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19483 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19484 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19485 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19486 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19487 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19488 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 19489 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19490 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19491 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19492 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19493 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19494 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19495 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_dsub_7 |
| 19496 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19497 | 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 19498 | 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19499 | }, |
| 19500 | { // hGPR_and_tGPROdd |
| 19501 | 0, // hGPR_and_tGPROdd:dsub_0 |
| 19502 | 0, // hGPR_and_tGPROdd:dsub_1 |
| 19503 | 0, // hGPR_and_tGPROdd:dsub_2 |
| 19504 | 0, // hGPR_and_tGPROdd:dsub_3 |
| 19505 | 0, // hGPR_and_tGPROdd:dsub_4 |
| 19506 | 0, // hGPR_and_tGPROdd:dsub_5 |
| 19507 | 0, // hGPR_and_tGPROdd:dsub_6 |
| 19508 | 0, // hGPR_and_tGPROdd:dsub_7 |
| 19509 | 0, // hGPR_and_tGPROdd:gsub_0 |
| 19510 | 0, // hGPR_and_tGPROdd:gsub_1 |
| 19511 | 0, // hGPR_and_tGPROdd:qqsub_0 |
| 19512 | 0, // hGPR_and_tGPROdd:qqsub_1 |
| 19513 | 0, // hGPR_and_tGPROdd:qsub_0 |
| 19514 | 0, // hGPR_and_tGPROdd:qsub_1 |
| 19515 | 0, // hGPR_and_tGPROdd:qsub_2 |
| 19516 | 0, // hGPR_and_tGPROdd:qsub_3 |
| 19517 | 0, // hGPR_and_tGPROdd:ssub_0 |
| 19518 | 0, // hGPR_and_tGPROdd:ssub_1 |
| 19519 | 0, // hGPR_and_tGPROdd:ssub_2 |
| 19520 | 0, // hGPR_and_tGPROdd:ssub_3 |
| 19521 | 0, // hGPR_and_tGPROdd:ssub_4 |
| 19522 | 0, // hGPR_and_tGPROdd:ssub_5 |
| 19523 | 0, // hGPR_and_tGPROdd:ssub_6 |
| 19524 | 0, // hGPR_and_tGPROdd:ssub_7 |
| 19525 | 0, // hGPR_and_tGPROdd:ssub_8 |
| 19526 | 0, // hGPR_and_tGPROdd:ssub_9 |
| 19527 | 0, // hGPR_and_tGPROdd:ssub_10 |
| 19528 | 0, // hGPR_and_tGPROdd:ssub_11 |
| 19529 | 0, // hGPR_and_tGPROdd:ssub_12 |
| 19530 | 0, // hGPR_and_tGPROdd:ssub_13 |
| 19531 | 0, // hGPR_and_tGPROdd:ssub_14 |
| 19532 | 0, // hGPR_and_tGPROdd:ssub_15 |
| 19533 | 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19534 | 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19535 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19536 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19537 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19538 | 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19539 | 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19540 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19541 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19542 | 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19543 | 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19544 | 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19545 | 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19546 | 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5 |
| 19547 | 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19548 | 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19549 | 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19550 | 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19551 | 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19552 | 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19553 | 0, // hGPR_and_tGPROdd:dsub_5_dsub_7 |
| 19554 | 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19555 | 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13 |
| 19556 | 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19557 | }, |
| 19558 | { // tGPREven_and_tcGPRnotr12 |
| 19559 | 0, // tGPREven_and_tcGPRnotr12:dsub_0 |
| 19560 | 0, // tGPREven_and_tcGPRnotr12:dsub_1 |
| 19561 | 0, // tGPREven_and_tcGPRnotr12:dsub_2 |
| 19562 | 0, // tGPREven_and_tcGPRnotr12:dsub_3 |
| 19563 | 0, // tGPREven_and_tcGPRnotr12:dsub_4 |
| 19564 | 0, // tGPREven_and_tcGPRnotr12:dsub_5 |
| 19565 | 0, // tGPREven_and_tcGPRnotr12:dsub_6 |
| 19566 | 0, // tGPREven_and_tcGPRnotr12:dsub_7 |
| 19567 | 0, // tGPREven_and_tcGPRnotr12:gsub_0 |
| 19568 | 0, // tGPREven_and_tcGPRnotr12:gsub_1 |
| 19569 | 0, // tGPREven_and_tcGPRnotr12:qqsub_0 |
| 19570 | 0, // tGPREven_and_tcGPRnotr12:qqsub_1 |
| 19571 | 0, // tGPREven_and_tcGPRnotr12:qsub_0 |
| 19572 | 0, // tGPREven_and_tcGPRnotr12:qsub_1 |
| 19573 | 0, // tGPREven_and_tcGPRnotr12:qsub_2 |
| 19574 | 0, // tGPREven_and_tcGPRnotr12:qsub_3 |
| 19575 | 0, // tGPREven_and_tcGPRnotr12:ssub_0 |
| 19576 | 0, // tGPREven_and_tcGPRnotr12:ssub_1 |
| 19577 | 0, // tGPREven_and_tcGPRnotr12:ssub_2 |
| 19578 | 0, // tGPREven_and_tcGPRnotr12:ssub_3 |
| 19579 | 0, // tGPREven_and_tcGPRnotr12:ssub_4 |
| 19580 | 0, // tGPREven_and_tcGPRnotr12:ssub_5 |
| 19581 | 0, // tGPREven_and_tcGPRnotr12:ssub_6 |
| 19582 | 0, // tGPREven_and_tcGPRnotr12:ssub_7 |
| 19583 | 0, // tGPREven_and_tcGPRnotr12:ssub_8 |
| 19584 | 0, // tGPREven_and_tcGPRnotr12:ssub_9 |
| 19585 | 0, // tGPREven_and_tcGPRnotr12:ssub_10 |
| 19586 | 0, // tGPREven_and_tcGPRnotr12:ssub_11 |
| 19587 | 0, // tGPREven_and_tcGPRnotr12:ssub_12 |
| 19588 | 0, // tGPREven_and_tcGPRnotr12:ssub_13 |
| 19589 | 0, // tGPREven_and_tcGPRnotr12:ssub_14 |
| 19590 | 0, // tGPREven_and_tcGPRnotr12:ssub_15 |
| 19591 | 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19592 | 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19593 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19594 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19595 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19596 | 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19597 | 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19598 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19599 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19600 | 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19601 | 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19602 | 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19603 | 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19604 | 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_dsub_5 |
| 19605 | 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19606 | 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19607 | 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19608 | 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19609 | 0, // tGPREven_and_tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19610 | 0, // tGPREven_and_tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19611 | 0, // tGPREven_and_tcGPRnotr12:dsub_5_dsub_7 |
| 19612 | 0, // tGPREven_and_tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19613 | 0, // tGPREven_and_tcGPRnotr12:dsub_5_ssub_12_ssub_13 |
| 19614 | 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19615 | }, |
| 19616 | { // tGPROdd_and_tcGPR |
| 19617 | 0, // tGPROdd_and_tcGPR:dsub_0 |
| 19618 | 0, // tGPROdd_and_tcGPR:dsub_1 |
| 19619 | 0, // tGPROdd_and_tcGPR:dsub_2 |
| 19620 | 0, // tGPROdd_and_tcGPR:dsub_3 |
| 19621 | 0, // tGPROdd_and_tcGPR:dsub_4 |
| 19622 | 0, // tGPROdd_and_tcGPR:dsub_5 |
| 19623 | 0, // tGPROdd_and_tcGPR:dsub_6 |
| 19624 | 0, // tGPROdd_and_tcGPR:dsub_7 |
| 19625 | 0, // tGPROdd_and_tcGPR:gsub_0 |
| 19626 | 0, // tGPROdd_and_tcGPR:gsub_1 |
| 19627 | 0, // tGPROdd_and_tcGPR:qqsub_0 |
| 19628 | 0, // tGPROdd_and_tcGPR:qqsub_1 |
| 19629 | 0, // tGPROdd_and_tcGPR:qsub_0 |
| 19630 | 0, // tGPROdd_and_tcGPR:qsub_1 |
| 19631 | 0, // tGPROdd_and_tcGPR:qsub_2 |
| 19632 | 0, // tGPROdd_and_tcGPR:qsub_3 |
| 19633 | 0, // tGPROdd_and_tcGPR:ssub_0 |
| 19634 | 0, // tGPROdd_and_tcGPR:ssub_1 |
| 19635 | 0, // tGPROdd_and_tcGPR:ssub_2 |
| 19636 | 0, // tGPROdd_and_tcGPR:ssub_3 |
| 19637 | 0, // tGPROdd_and_tcGPR:ssub_4 |
| 19638 | 0, // tGPROdd_and_tcGPR:ssub_5 |
| 19639 | 0, // tGPROdd_and_tcGPR:ssub_6 |
| 19640 | 0, // tGPROdd_and_tcGPR:ssub_7 |
| 19641 | 0, // tGPROdd_and_tcGPR:ssub_8 |
| 19642 | 0, // tGPROdd_and_tcGPR:ssub_9 |
| 19643 | 0, // tGPROdd_and_tcGPR:ssub_10 |
| 19644 | 0, // tGPROdd_and_tcGPR:ssub_11 |
| 19645 | 0, // tGPROdd_and_tcGPR:ssub_12 |
| 19646 | 0, // tGPROdd_and_tcGPR:ssub_13 |
| 19647 | 0, // tGPROdd_and_tcGPR:ssub_14 |
| 19648 | 0, // tGPROdd_and_tcGPR:ssub_15 |
| 19649 | 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19650 | 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19651 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19652 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19653 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19654 | 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19655 | 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19656 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19657 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19658 | 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19659 | 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19660 | 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19661 | 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19662 | 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 19663 | 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19664 | 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19665 | 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19666 | 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19667 | 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19668 | 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19669 | 0, // tGPROdd_and_tcGPR:dsub_5_dsub_7 |
| 19670 | 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19671 | 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 19672 | 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19673 | }, |
| 19674 | { // CCR |
| 19675 | 0, // CCR:dsub_0 |
| 19676 | 0, // CCR:dsub_1 |
| 19677 | 0, // CCR:dsub_2 |
| 19678 | 0, // CCR:dsub_3 |
| 19679 | 0, // CCR:dsub_4 |
| 19680 | 0, // CCR:dsub_5 |
| 19681 | 0, // CCR:dsub_6 |
| 19682 | 0, // CCR:dsub_7 |
| 19683 | 0, // CCR:gsub_0 |
| 19684 | 0, // CCR:gsub_1 |
| 19685 | 0, // CCR:qqsub_0 |
| 19686 | 0, // CCR:qqsub_1 |
| 19687 | 0, // CCR:qsub_0 |
| 19688 | 0, // CCR:qsub_1 |
| 19689 | 0, // CCR:qsub_2 |
| 19690 | 0, // CCR:qsub_3 |
| 19691 | 0, // CCR:ssub_0 |
| 19692 | 0, // CCR:ssub_1 |
| 19693 | 0, // CCR:ssub_2 |
| 19694 | 0, // CCR:ssub_3 |
| 19695 | 0, // CCR:ssub_4 |
| 19696 | 0, // CCR:ssub_5 |
| 19697 | 0, // CCR:ssub_6 |
| 19698 | 0, // CCR:ssub_7 |
| 19699 | 0, // CCR:ssub_8 |
| 19700 | 0, // CCR:ssub_9 |
| 19701 | 0, // CCR:ssub_10 |
| 19702 | 0, // CCR:ssub_11 |
| 19703 | 0, // CCR:ssub_12 |
| 19704 | 0, // CCR:ssub_13 |
| 19705 | 0, // CCR:ssub_14 |
| 19706 | 0, // CCR:ssub_15 |
| 19707 | 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19708 | 0, // CCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19709 | 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19710 | 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19711 | 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19712 | 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19713 | 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19714 | 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19715 | 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19716 | 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19717 | 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19718 | 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19719 | 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19720 | 0, // CCR:ssub_6_ssub_7_dsub_5 |
| 19721 | 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19722 | 0, // CCR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19723 | 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19724 | 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19725 | 0, // CCR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19726 | 0, // CCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19727 | 0, // CCR:dsub_5_dsub_7 |
| 19728 | 0, // CCR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19729 | 0, // CCR:dsub_5_ssub_12_ssub_13 |
| 19730 | 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19731 | }, |
| 19732 | { // FPCXTRegs |
| 19733 | 0, // FPCXTRegs:dsub_0 |
| 19734 | 0, // FPCXTRegs:dsub_1 |
| 19735 | 0, // FPCXTRegs:dsub_2 |
| 19736 | 0, // FPCXTRegs:dsub_3 |
| 19737 | 0, // FPCXTRegs:dsub_4 |
| 19738 | 0, // FPCXTRegs:dsub_5 |
| 19739 | 0, // FPCXTRegs:dsub_6 |
| 19740 | 0, // FPCXTRegs:dsub_7 |
| 19741 | 0, // FPCXTRegs:gsub_0 |
| 19742 | 0, // FPCXTRegs:gsub_1 |
| 19743 | 0, // FPCXTRegs:qqsub_0 |
| 19744 | 0, // FPCXTRegs:qqsub_1 |
| 19745 | 0, // FPCXTRegs:qsub_0 |
| 19746 | 0, // FPCXTRegs:qsub_1 |
| 19747 | 0, // FPCXTRegs:qsub_2 |
| 19748 | 0, // FPCXTRegs:qsub_3 |
| 19749 | 0, // FPCXTRegs:ssub_0 |
| 19750 | 0, // FPCXTRegs:ssub_1 |
| 19751 | 0, // FPCXTRegs:ssub_2 |
| 19752 | 0, // FPCXTRegs:ssub_3 |
| 19753 | 0, // FPCXTRegs:ssub_4 |
| 19754 | 0, // FPCXTRegs:ssub_5 |
| 19755 | 0, // FPCXTRegs:ssub_6 |
| 19756 | 0, // FPCXTRegs:ssub_7 |
| 19757 | 0, // FPCXTRegs:ssub_8 |
| 19758 | 0, // FPCXTRegs:ssub_9 |
| 19759 | 0, // FPCXTRegs:ssub_10 |
| 19760 | 0, // FPCXTRegs:ssub_11 |
| 19761 | 0, // FPCXTRegs:ssub_12 |
| 19762 | 0, // FPCXTRegs:ssub_13 |
| 19763 | 0, // FPCXTRegs:ssub_14 |
| 19764 | 0, // FPCXTRegs:ssub_15 |
| 19765 | 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19766 | 0, // FPCXTRegs:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19767 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19768 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19769 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19770 | 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19771 | 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19772 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19773 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19774 | 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19775 | 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19776 | 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19777 | 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19778 | 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5 |
| 19779 | 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19780 | 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19781 | 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19782 | 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19783 | 0, // FPCXTRegs:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19784 | 0, // FPCXTRegs:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19785 | 0, // FPCXTRegs:dsub_5_dsub_7 |
| 19786 | 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19787 | 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13 |
| 19788 | 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19789 | }, |
| 19790 | { // GPRlr |
| 19791 | 0, // GPRlr:dsub_0 |
| 19792 | 0, // GPRlr:dsub_1 |
| 19793 | 0, // GPRlr:dsub_2 |
| 19794 | 0, // GPRlr:dsub_3 |
| 19795 | 0, // GPRlr:dsub_4 |
| 19796 | 0, // GPRlr:dsub_5 |
| 19797 | 0, // GPRlr:dsub_6 |
| 19798 | 0, // GPRlr:dsub_7 |
| 19799 | 0, // GPRlr:gsub_0 |
| 19800 | 0, // GPRlr:gsub_1 |
| 19801 | 0, // GPRlr:qqsub_0 |
| 19802 | 0, // GPRlr:qqsub_1 |
| 19803 | 0, // GPRlr:qsub_0 |
| 19804 | 0, // GPRlr:qsub_1 |
| 19805 | 0, // GPRlr:qsub_2 |
| 19806 | 0, // GPRlr:qsub_3 |
| 19807 | 0, // GPRlr:ssub_0 |
| 19808 | 0, // GPRlr:ssub_1 |
| 19809 | 0, // GPRlr:ssub_2 |
| 19810 | 0, // GPRlr:ssub_3 |
| 19811 | 0, // GPRlr:ssub_4 |
| 19812 | 0, // GPRlr:ssub_5 |
| 19813 | 0, // GPRlr:ssub_6 |
| 19814 | 0, // GPRlr:ssub_7 |
| 19815 | 0, // GPRlr:ssub_8 |
| 19816 | 0, // GPRlr:ssub_9 |
| 19817 | 0, // GPRlr:ssub_10 |
| 19818 | 0, // GPRlr:ssub_11 |
| 19819 | 0, // GPRlr:ssub_12 |
| 19820 | 0, // GPRlr:ssub_13 |
| 19821 | 0, // GPRlr:ssub_14 |
| 19822 | 0, // GPRlr:ssub_15 |
| 19823 | 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19824 | 0, // GPRlr:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19825 | 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19826 | 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19827 | 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19828 | 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19829 | 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19830 | 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19831 | 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19832 | 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19833 | 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19834 | 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19835 | 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19836 | 0, // GPRlr:ssub_6_ssub_7_dsub_5 |
| 19837 | 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19838 | 0, // GPRlr:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19839 | 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19840 | 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19841 | 0, // GPRlr:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19842 | 0, // GPRlr:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19843 | 0, // GPRlr:dsub_5_dsub_7 |
| 19844 | 0, // GPRlr:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19845 | 0, // GPRlr:dsub_5_ssub_12_ssub_13 |
| 19846 | 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19847 | }, |
| 19848 | { // GPRsp |
| 19849 | 0, // GPRsp:dsub_0 |
| 19850 | 0, // GPRsp:dsub_1 |
| 19851 | 0, // GPRsp:dsub_2 |
| 19852 | 0, // GPRsp:dsub_3 |
| 19853 | 0, // GPRsp:dsub_4 |
| 19854 | 0, // GPRsp:dsub_5 |
| 19855 | 0, // GPRsp:dsub_6 |
| 19856 | 0, // GPRsp:dsub_7 |
| 19857 | 0, // GPRsp:gsub_0 |
| 19858 | 0, // GPRsp:gsub_1 |
| 19859 | 0, // GPRsp:qqsub_0 |
| 19860 | 0, // GPRsp:qqsub_1 |
| 19861 | 0, // GPRsp:qsub_0 |
| 19862 | 0, // GPRsp:qsub_1 |
| 19863 | 0, // GPRsp:qsub_2 |
| 19864 | 0, // GPRsp:qsub_3 |
| 19865 | 0, // GPRsp:ssub_0 |
| 19866 | 0, // GPRsp:ssub_1 |
| 19867 | 0, // GPRsp:ssub_2 |
| 19868 | 0, // GPRsp:ssub_3 |
| 19869 | 0, // GPRsp:ssub_4 |
| 19870 | 0, // GPRsp:ssub_5 |
| 19871 | 0, // GPRsp:ssub_6 |
| 19872 | 0, // GPRsp:ssub_7 |
| 19873 | 0, // GPRsp:ssub_8 |
| 19874 | 0, // GPRsp:ssub_9 |
| 19875 | 0, // GPRsp:ssub_10 |
| 19876 | 0, // GPRsp:ssub_11 |
| 19877 | 0, // GPRsp:ssub_12 |
| 19878 | 0, // GPRsp:ssub_13 |
| 19879 | 0, // GPRsp:ssub_14 |
| 19880 | 0, // GPRsp:ssub_15 |
| 19881 | 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19882 | 0, // GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19883 | 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19884 | 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19885 | 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19886 | 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19887 | 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19888 | 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19889 | 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19890 | 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19891 | 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19892 | 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19893 | 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19894 | 0, // GPRsp:ssub_6_ssub_7_dsub_5 |
| 19895 | 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19896 | 0, // GPRsp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19897 | 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19898 | 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19899 | 0, // GPRsp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19900 | 0, // GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19901 | 0, // GPRsp:dsub_5_dsub_7 |
| 19902 | 0, // GPRsp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19903 | 0, // GPRsp:dsub_5_ssub_12_ssub_13 |
| 19904 | 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19905 | }, |
| 19906 | { // VCCR |
| 19907 | 0, // VCCR:dsub_0 |
| 19908 | 0, // VCCR:dsub_1 |
| 19909 | 0, // VCCR:dsub_2 |
| 19910 | 0, // VCCR:dsub_3 |
| 19911 | 0, // VCCR:dsub_4 |
| 19912 | 0, // VCCR:dsub_5 |
| 19913 | 0, // VCCR:dsub_6 |
| 19914 | 0, // VCCR:dsub_7 |
| 19915 | 0, // VCCR:gsub_0 |
| 19916 | 0, // VCCR:gsub_1 |
| 19917 | 0, // VCCR:qqsub_0 |
| 19918 | 0, // VCCR:qqsub_1 |
| 19919 | 0, // VCCR:qsub_0 |
| 19920 | 0, // VCCR:qsub_1 |
| 19921 | 0, // VCCR:qsub_2 |
| 19922 | 0, // VCCR:qsub_3 |
| 19923 | 0, // VCCR:ssub_0 |
| 19924 | 0, // VCCR:ssub_1 |
| 19925 | 0, // VCCR:ssub_2 |
| 19926 | 0, // VCCR:ssub_3 |
| 19927 | 0, // VCCR:ssub_4 |
| 19928 | 0, // VCCR:ssub_5 |
| 19929 | 0, // VCCR:ssub_6 |
| 19930 | 0, // VCCR:ssub_7 |
| 19931 | 0, // VCCR:ssub_8 |
| 19932 | 0, // VCCR:ssub_9 |
| 19933 | 0, // VCCR:ssub_10 |
| 19934 | 0, // VCCR:ssub_11 |
| 19935 | 0, // VCCR:ssub_12 |
| 19936 | 0, // VCCR:ssub_13 |
| 19937 | 0, // VCCR:ssub_14 |
| 19938 | 0, // VCCR:ssub_15 |
| 19939 | 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19940 | 0, // VCCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19941 | 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 19942 | 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 19943 | 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 19944 | 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 19945 | 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19946 | 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 19947 | 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 19948 | 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19949 | 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 19950 | 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 19951 | 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 19952 | 0, // VCCR:ssub_6_ssub_7_dsub_5 |
| 19953 | 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 19954 | 0, // VCCR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 19955 | 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 19956 | 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19957 | 0, // VCCR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 19958 | 0, // VCCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 19959 | 0, // VCCR:dsub_5_dsub_7 |
| 19960 | 0, // VCCR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 19961 | 0, // VCCR:dsub_5_ssub_12_ssub_13 |
| 19962 | 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 19963 | }, |
| 19964 | { // cl_FPSCR_NZCV |
| 19965 | 0, // cl_FPSCR_NZCV:dsub_0 |
| 19966 | 0, // cl_FPSCR_NZCV:dsub_1 |
| 19967 | 0, // cl_FPSCR_NZCV:dsub_2 |
| 19968 | 0, // cl_FPSCR_NZCV:dsub_3 |
| 19969 | 0, // cl_FPSCR_NZCV:dsub_4 |
| 19970 | 0, // cl_FPSCR_NZCV:dsub_5 |
| 19971 | 0, // cl_FPSCR_NZCV:dsub_6 |
| 19972 | 0, // cl_FPSCR_NZCV:dsub_7 |
| 19973 | 0, // cl_FPSCR_NZCV:gsub_0 |
| 19974 | 0, // cl_FPSCR_NZCV:gsub_1 |
| 19975 | 0, // cl_FPSCR_NZCV:qqsub_0 |
| 19976 | 0, // cl_FPSCR_NZCV:qqsub_1 |
| 19977 | 0, // cl_FPSCR_NZCV:qsub_0 |
| 19978 | 0, // cl_FPSCR_NZCV:qsub_1 |
| 19979 | 0, // cl_FPSCR_NZCV:qsub_2 |
| 19980 | 0, // cl_FPSCR_NZCV:qsub_3 |
| 19981 | 0, // cl_FPSCR_NZCV:ssub_0 |
| 19982 | 0, // cl_FPSCR_NZCV:ssub_1 |
| 19983 | 0, // cl_FPSCR_NZCV:ssub_2 |
| 19984 | 0, // cl_FPSCR_NZCV:ssub_3 |
| 19985 | 0, // cl_FPSCR_NZCV:ssub_4 |
| 19986 | 0, // cl_FPSCR_NZCV:ssub_5 |
| 19987 | 0, // cl_FPSCR_NZCV:ssub_6 |
| 19988 | 0, // cl_FPSCR_NZCV:ssub_7 |
| 19989 | 0, // cl_FPSCR_NZCV:ssub_8 |
| 19990 | 0, // cl_FPSCR_NZCV:ssub_9 |
| 19991 | 0, // cl_FPSCR_NZCV:ssub_10 |
| 19992 | 0, // cl_FPSCR_NZCV:ssub_11 |
| 19993 | 0, // cl_FPSCR_NZCV:ssub_12 |
| 19994 | 0, // cl_FPSCR_NZCV:ssub_13 |
| 19995 | 0, // cl_FPSCR_NZCV:ssub_14 |
| 19996 | 0, // cl_FPSCR_NZCV:ssub_15 |
| 19997 | 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5 |
| 19998 | 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 19999 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20000 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20001 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20002 | 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20003 | 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20004 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20005 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20006 | 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20007 | 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20008 | 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20009 | 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20010 | 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5 |
| 20011 | 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20012 | 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20013 | 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20014 | 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20015 | 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20016 | 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20017 | 0, // cl_FPSCR_NZCV:dsub_5_dsub_7 |
| 20018 | 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20019 | 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13 |
| 20020 | 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20021 | }, |
| 20022 | { // hGPR_and_tGPRwithpc |
| 20023 | 0, // hGPR_and_tGPRwithpc:dsub_0 |
| 20024 | 0, // hGPR_and_tGPRwithpc:dsub_1 |
| 20025 | 0, // hGPR_and_tGPRwithpc:dsub_2 |
| 20026 | 0, // hGPR_and_tGPRwithpc:dsub_3 |
| 20027 | 0, // hGPR_and_tGPRwithpc:dsub_4 |
| 20028 | 0, // hGPR_and_tGPRwithpc:dsub_5 |
| 20029 | 0, // hGPR_and_tGPRwithpc:dsub_6 |
| 20030 | 0, // hGPR_and_tGPRwithpc:dsub_7 |
| 20031 | 0, // hGPR_and_tGPRwithpc:gsub_0 |
| 20032 | 0, // hGPR_and_tGPRwithpc:gsub_1 |
| 20033 | 0, // hGPR_and_tGPRwithpc:qqsub_0 |
| 20034 | 0, // hGPR_and_tGPRwithpc:qqsub_1 |
| 20035 | 0, // hGPR_and_tGPRwithpc:qsub_0 |
| 20036 | 0, // hGPR_and_tGPRwithpc:qsub_1 |
| 20037 | 0, // hGPR_and_tGPRwithpc:qsub_2 |
| 20038 | 0, // hGPR_and_tGPRwithpc:qsub_3 |
| 20039 | 0, // hGPR_and_tGPRwithpc:ssub_0 |
| 20040 | 0, // hGPR_and_tGPRwithpc:ssub_1 |
| 20041 | 0, // hGPR_and_tGPRwithpc:ssub_2 |
| 20042 | 0, // hGPR_and_tGPRwithpc:ssub_3 |
| 20043 | 0, // hGPR_and_tGPRwithpc:ssub_4 |
| 20044 | 0, // hGPR_and_tGPRwithpc:ssub_5 |
| 20045 | 0, // hGPR_and_tGPRwithpc:ssub_6 |
| 20046 | 0, // hGPR_and_tGPRwithpc:ssub_7 |
| 20047 | 0, // hGPR_and_tGPRwithpc:ssub_8 |
| 20048 | 0, // hGPR_and_tGPRwithpc:ssub_9 |
| 20049 | 0, // hGPR_and_tGPRwithpc:ssub_10 |
| 20050 | 0, // hGPR_and_tGPRwithpc:ssub_11 |
| 20051 | 0, // hGPR_and_tGPRwithpc:ssub_12 |
| 20052 | 0, // hGPR_and_tGPRwithpc:ssub_13 |
| 20053 | 0, // hGPR_and_tGPRwithpc:ssub_14 |
| 20054 | 0, // hGPR_and_tGPRwithpc:ssub_15 |
| 20055 | 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20056 | 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20057 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20058 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20059 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20060 | 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20061 | 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20062 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20063 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20064 | 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20065 | 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20066 | 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20067 | 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20068 | 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5 |
| 20069 | 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20070 | 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20071 | 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20072 | 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20073 | 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20074 | 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20075 | 0, // hGPR_and_tGPRwithpc:dsub_5_dsub_7 |
| 20076 | 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20077 | 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13 |
| 20078 | 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20079 | }, |
| 20080 | { // hGPR_and_tcGPR |
| 20081 | 0, // hGPR_and_tcGPR:dsub_0 |
| 20082 | 0, // hGPR_and_tcGPR:dsub_1 |
| 20083 | 0, // hGPR_and_tcGPR:dsub_2 |
| 20084 | 0, // hGPR_and_tcGPR:dsub_3 |
| 20085 | 0, // hGPR_and_tcGPR:dsub_4 |
| 20086 | 0, // hGPR_and_tcGPR:dsub_5 |
| 20087 | 0, // hGPR_and_tcGPR:dsub_6 |
| 20088 | 0, // hGPR_and_tcGPR:dsub_7 |
| 20089 | 0, // hGPR_and_tcGPR:gsub_0 |
| 20090 | 0, // hGPR_and_tcGPR:gsub_1 |
| 20091 | 0, // hGPR_and_tcGPR:qqsub_0 |
| 20092 | 0, // hGPR_and_tcGPR:qqsub_1 |
| 20093 | 0, // hGPR_and_tcGPR:qsub_0 |
| 20094 | 0, // hGPR_and_tcGPR:qsub_1 |
| 20095 | 0, // hGPR_and_tcGPR:qsub_2 |
| 20096 | 0, // hGPR_and_tcGPR:qsub_3 |
| 20097 | 0, // hGPR_and_tcGPR:ssub_0 |
| 20098 | 0, // hGPR_and_tcGPR:ssub_1 |
| 20099 | 0, // hGPR_and_tcGPR:ssub_2 |
| 20100 | 0, // hGPR_and_tcGPR:ssub_3 |
| 20101 | 0, // hGPR_and_tcGPR:ssub_4 |
| 20102 | 0, // hGPR_and_tcGPR:ssub_5 |
| 20103 | 0, // hGPR_and_tcGPR:ssub_6 |
| 20104 | 0, // hGPR_and_tcGPR:ssub_7 |
| 20105 | 0, // hGPR_and_tcGPR:ssub_8 |
| 20106 | 0, // hGPR_and_tcGPR:ssub_9 |
| 20107 | 0, // hGPR_and_tcGPR:ssub_10 |
| 20108 | 0, // hGPR_and_tcGPR:ssub_11 |
| 20109 | 0, // hGPR_and_tcGPR:ssub_12 |
| 20110 | 0, // hGPR_and_tcGPR:ssub_13 |
| 20111 | 0, // hGPR_and_tcGPR:ssub_14 |
| 20112 | 0, // hGPR_and_tcGPR:ssub_15 |
| 20113 | 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20114 | 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20115 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20116 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20117 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20118 | 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20119 | 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20120 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20121 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20122 | 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20123 | 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20124 | 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20125 | 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20126 | 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 20127 | 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20128 | 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20129 | 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20130 | 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20131 | 0, // hGPR_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20132 | 0, // hGPR_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20133 | 0, // hGPR_and_tcGPR:dsub_5_dsub_7 |
| 20134 | 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20135 | 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 20136 | 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20137 | }, |
| 20138 | { // DPR |
| 20139 | 0, // DPR:dsub_0 |
| 20140 | 0, // DPR:dsub_1 |
| 20141 | 0, // DPR:dsub_2 |
| 20142 | 0, // DPR:dsub_3 |
| 20143 | 0, // DPR:dsub_4 |
| 20144 | 0, // DPR:dsub_5 |
| 20145 | 0, // DPR:dsub_6 |
| 20146 | 0, // DPR:dsub_7 |
| 20147 | 0, // DPR:gsub_0 |
| 20148 | 0, // DPR:gsub_1 |
| 20149 | 0, // DPR:qqsub_0 |
| 20150 | 0, // DPR:qqsub_1 |
| 20151 | 0, // DPR:qsub_0 |
| 20152 | 0, // DPR:qsub_1 |
| 20153 | 0, // DPR:qsub_2 |
| 20154 | 0, // DPR:qsub_3 |
| 20155 | 3, // DPR:ssub_0 -> SPR |
| 20156 | 3, // DPR:ssub_1 -> SPR |
| 20157 | 0, // DPR:ssub_2 |
| 20158 | 0, // DPR:ssub_3 |
| 20159 | 0, // DPR:ssub_4 |
| 20160 | 0, // DPR:ssub_5 |
| 20161 | 0, // DPR:ssub_6 |
| 20162 | 0, // DPR:ssub_7 |
| 20163 | 0, // DPR:ssub_8 |
| 20164 | 0, // DPR:ssub_9 |
| 20165 | 0, // DPR:ssub_10 |
| 20166 | 0, // DPR:ssub_11 |
| 20167 | 0, // DPR:ssub_12 |
| 20168 | 0, // DPR:ssub_13 |
| 20169 | 0, // DPR:ssub_14 |
| 20170 | 0, // DPR:ssub_15 |
| 20171 | 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20172 | 0, // DPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20173 | 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20174 | 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20175 | 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20176 | 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20177 | 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20178 | 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20179 | 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20180 | 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20181 | 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20182 | 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20183 | 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20184 | 0, // DPR:ssub_6_ssub_7_dsub_5 |
| 20185 | 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20186 | 0, // DPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20187 | 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20188 | 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20189 | 0, // DPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20190 | 0, // DPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20191 | 0, // DPR:dsub_5_dsub_7 |
| 20192 | 0, // DPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20193 | 0, // DPR:dsub_5_ssub_12_ssub_13 |
| 20194 | 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20195 | }, |
| 20196 | { // DPR_VFP2 |
| 20197 | 0, // DPR_VFP2:dsub_0 |
| 20198 | 0, // DPR_VFP2:dsub_1 |
| 20199 | 0, // DPR_VFP2:dsub_2 |
| 20200 | 0, // DPR_VFP2:dsub_3 |
| 20201 | 0, // DPR_VFP2:dsub_4 |
| 20202 | 0, // DPR_VFP2:dsub_5 |
| 20203 | 0, // DPR_VFP2:dsub_6 |
| 20204 | 0, // DPR_VFP2:dsub_7 |
| 20205 | 0, // DPR_VFP2:gsub_0 |
| 20206 | 0, // DPR_VFP2:gsub_1 |
| 20207 | 0, // DPR_VFP2:qqsub_0 |
| 20208 | 0, // DPR_VFP2:qqsub_1 |
| 20209 | 0, // DPR_VFP2:qsub_0 |
| 20210 | 0, // DPR_VFP2:qsub_1 |
| 20211 | 0, // DPR_VFP2:qsub_2 |
| 20212 | 0, // DPR_VFP2:qsub_3 |
| 20213 | 3, // DPR_VFP2:ssub_0 -> SPR |
| 20214 | 3, // DPR_VFP2:ssub_1 -> SPR |
| 20215 | 0, // DPR_VFP2:ssub_2 |
| 20216 | 0, // DPR_VFP2:ssub_3 |
| 20217 | 0, // DPR_VFP2:ssub_4 |
| 20218 | 0, // DPR_VFP2:ssub_5 |
| 20219 | 0, // DPR_VFP2:ssub_6 |
| 20220 | 0, // DPR_VFP2:ssub_7 |
| 20221 | 0, // DPR_VFP2:ssub_8 |
| 20222 | 0, // DPR_VFP2:ssub_9 |
| 20223 | 0, // DPR_VFP2:ssub_10 |
| 20224 | 0, // DPR_VFP2:ssub_11 |
| 20225 | 0, // DPR_VFP2:ssub_12 |
| 20226 | 0, // DPR_VFP2:ssub_13 |
| 20227 | 0, // DPR_VFP2:ssub_14 |
| 20228 | 0, // DPR_VFP2:ssub_15 |
| 20229 | 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20230 | 0, // DPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20231 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20232 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20233 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20234 | 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20235 | 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20236 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20237 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20238 | 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20239 | 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20240 | 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20241 | 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20242 | 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5 |
| 20243 | 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20244 | 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20245 | 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20246 | 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20247 | 0, // DPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20248 | 0, // DPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20249 | 0, // DPR_VFP2:dsub_5_dsub_7 |
| 20250 | 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20251 | 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13 |
| 20252 | 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20253 | }, |
| 20254 | { // DPR_8 |
| 20255 | 0, // DPR_8:dsub_0 |
| 20256 | 0, // DPR_8:dsub_1 |
| 20257 | 0, // DPR_8:dsub_2 |
| 20258 | 0, // DPR_8:dsub_3 |
| 20259 | 0, // DPR_8:dsub_4 |
| 20260 | 0, // DPR_8:dsub_5 |
| 20261 | 0, // DPR_8:dsub_6 |
| 20262 | 0, // DPR_8:dsub_7 |
| 20263 | 0, // DPR_8:gsub_0 |
| 20264 | 0, // DPR_8:gsub_1 |
| 20265 | 0, // DPR_8:qqsub_0 |
| 20266 | 0, // DPR_8:qqsub_1 |
| 20267 | 0, // DPR_8:qsub_0 |
| 20268 | 0, // DPR_8:qsub_1 |
| 20269 | 0, // DPR_8:qsub_2 |
| 20270 | 0, // DPR_8:qsub_3 |
| 20271 | 8, // DPR_8:ssub_0 -> SPR_8 |
| 20272 | 8, // DPR_8:ssub_1 -> SPR_8 |
| 20273 | 0, // DPR_8:ssub_2 |
| 20274 | 0, // DPR_8:ssub_3 |
| 20275 | 0, // DPR_8:ssub_4 |
| 20276 | 0, // DPR_8:ssub_5 |
| 20277 | 0, // DPR_8:ssub_6 |
| 20278 | 0, // DPR_8:ssub_7 |
| 20279 | 0, // DPR_8:ssub_8 |
| 20280 | 0, // DPR_8:ssub_9 |
| 20281 | 0, // DPR_8:ssub_10 |
| 20282 | 0, // DPR_8:ssub_11 |
| 20283 | 0, // DPR_8:ssub_12 |
| 20284 | 0, // DPR_8:ssub_13 |
| 20285 | 0, // DPR_8:ssub_14 |
| 20286 | 0, // DPR_8:ssub_15 |
| 20287 | 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20288 | 0, // DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20289 | 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20290 | 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20291 | 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20292 | 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20293 | 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20294 | 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20295 | 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20296 | 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20297 | 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20298 | 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20299 | 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20300 | 0, // DPR_8:ssub_6_ssub_7_dsub_5 |
| 20301 | 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20302 | 0, // DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20303 | 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20304 | 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20305 | 0, // DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20306 | 0, // DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20307 | 0, // DPR_8:dsub_5_dsub_7 |
| 20308 | 0, // DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20309 | 0, // DPR_8:dsub_5_ssub_12_ssub_13 |
| 20310 | 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20311 | }, |
| 20312 | { // GPRPair |
| 20313 | 0, // GPRPair:dsub_0 |
| 20314 | 0, // GPRPair:dsub_1 |
| 20315 | 0, // GPRPair:dsub_2 |
| 20316 | 0, // GPRPair:dsub_3 |
| 20317 | 0, // GPRPair:dsub_4 |
| 20318 | 0, // GPRPair:dsub_5 |
| 20319 | 0, // GPRPair:dsub_6 |
| 20320 | 0, // GPRPair:dsub_7 |
| 20321 | 23, // GPRPair:gsub_0 -> tGPREven |
| 20322 | 16, // GPRPair:gsub_1 -> GPRnoip_and_GPRnopc |
| 20323 | 0, // GPRPair:qqsub_0 |
| 20324 | 0, // GPRPair:qqsub_1 |
| 20325 | 0, // GPRPair:qsub_0 |
| 20326 | 0, // GPRPair:qsub_1 |
| 20327 | 0, // GPRPair:qsub_2 |
| 20328 | 0, // GPRPair:qsub_3 |
| 20329 | 0, // GPRPair:ssub_0 |
| 20330 | 0, // GPRPair:ssub_1 |
| 20331 | 0, // GPRPair:ssub_2 |
| 20332 | 0, // GPRPair:ssub_3 |
| 20333 | 0, // GPRPair:ssub_4 |
| 20334 | 0, // GPRPair:ssub_5 |
| 20335 | 0, // GPRPair:ssub_6 |
| 20336 | 0, // GPRPair:ssub_7 |
| 20337 | 0, // GPRPair:ssub_8 |
| 20338 | 0, // GPRPair:ssub_9 |
| 20339 | 0, // GPRPair:ssub_10 |
| 20340 | 0, // GPRPair:ssub_11 |
| 20341 | 0, // GPRPair:ssub_12 |
| 20342 | 0, // GPRPair:ssub_13 |
| 20343 | 0, // GPRPair:ssub_14 |
| 20344 | 0, // GPRPair:ssub_15 |
| 20345 | 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20346 | 0, // GPRPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20347 | 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20348 | 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20349 | 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20350 | 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20351 | 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20352 | 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20353 | 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20354 | 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20355 | 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20356 | 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20357 | 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20358 | 0, // GPRPair:ssub_6_ssub_7_dsub_5 |
| 20359 | 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20360 | 0, // GPRPair:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20361 | 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20362 | 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20363 | 0, // GPRPair:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20364 | 0, // GPRPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20365 | 0, // GPRPair:dsub_5_dsub_7 |
| 20366 | 0, // GPRPair:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20367 | 0, // GPRPair:dsub_5_ssub_12_ssub_13 |
| 20368 | 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20369 | }, |
| 20370 | { // GPRPairnosp |
| 20371 | 0, // GPRPairnosp:dsub_0 |
| 20372 | 0, // GPRPairnosp:dsub_1 |
| 20373 | 0, // GPRPairnosp:dsub_2 |
| 20374 | 0, // GPRPairnosp:dsub_3 |
| 20375 | 0, // GPRPairnosp:dsub_4 |
| 20376 | 0, // GPRPairnosp:dsub_5 |
| 20377 | 0, // GPRPairnosp:dsub_6 |
| 20378 | 0, // GPRPairnosp:dsub_7 |
| 20379 | 27, // GPRPairnosp:gsub_0 -> GPRnoip_and_tGPREven |
| 20380 | 29, // GPRPairnosp:gsub_1 -> tGPROdd |
| 20381 | 0, // GPRPairnosp:qqsub_0 |
| 20382 | 0, // GPRPairnosp:qqsub_1 |
| 20383 | 0, // GPRPairnosp:qsub_0 |
| 20384 | 0, // GPRPairnosp:qsub_1 |
| 20385 | 0, // GPRPairnosp:qsub_2 |
| 20386 | 0, // GPRPairnosp:qsub_3 |
| 20387 | 0, // GPRPairnosp:ssub_0 |
| 20388 | 0, // GPRPairnosp:ssub_1 |
| 20389 | 0, // GPRPairnosp:ssub_2 |
| 20390 | 0, // GPRPairnosp:ssub_3 |
| 20391 | 0, // GPRPairnosp:ssub_4 |
| 20392 | 0, // GPRPairnosp:ssub_5 |
| 20393 | 0, // GPRPairnosp:ssub_6 |
| 20394 | 0, // GPRPairnosp:ssub_7 |
| 20395 | 0, // GPRPairnosp:ssub_8 |
| 20396 | 0, // GPRPairnosp:ssub_9 |
| 20397 | 0, // GPRPairnosp:ssub_10 |
| 20398 | 0, // GPRPairnosp:ssub_11 |
| 20399 | 0, // GPRPairnosp:ssub_12 |
| 20400 | 0, // GPRPairnosp:ssub_13 |
| 20401 | 0, // GPRPairnosp:ssub_14 |
| 20402 | 0, // GPRPairnosp:ssub_15 |
| 20403 | 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20404 | 0, // GPRPairnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20405 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20406 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20407 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20408 | 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20409 | 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20410 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20411 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20412 | 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20413 | 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20414 | 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20415 | 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20416 | 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5 |
| 20417 | 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20418 | 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20419 | 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20420 | 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20421 | 0, // GPRPairnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20422 | 0, // GPRPairnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20423 | 0, // GPRPairnosp:dsub_5_dsub_7 |
| 20424 | 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20425 | 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13 |
| 20426 | 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20427 | }, |
| 20428 | { // GPRPair_with_gsub_0_in_tGPR |
| 20429 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_0 |
| 20430 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_1 |
| 20431 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_2 |
| 20432 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_3 |
| 20433 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_4 |
| 20434 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5 |
| 20435 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_6 |
| 20436 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_7 |
| 20437 | 35, // GPRPair_with_gsub_0_in_tGPR:gsub_0 -> tGPR_and_tGPREven |
| 20438 | 36, // GPRPair_with_gsub_0_in_tGPR:gsub_1 -> tGPR_and_tGPROdd |
| 20439 | 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_0 |
| 20440 | 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_1 |
| 20441 | 0, // GPRPair_with_gsub_0_in_tGPR:qsub_0 |
| 20442 | 0, // GPRPair_with_gsub_0_in_tGPR:qsub_1 |
| 20443 | 0, // GPRPair_with_gsub_0_in_tGPR:qsub_2 |
| 20444 | 0, // GPRPair_with_gsub_0_in_tGPR:qsub_3 |
| 20445 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0 |
| 20446 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_1 |
| 20447 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2 |
| 20448 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_3 |
| 20449 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4 |
| 20450 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_5 |
| 20451 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6 |
| 20452 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_7 |
| 20453 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8 |
| 20454 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_9 |
| 20455 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_10 |
| 20456 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_11 |
| 20457 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_12 |
| 20458 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_13 |
| 20459 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_14 |
| 20460 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_15 |
| 20461 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20462 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20463 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20464 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20465 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20466 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20467 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20468 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20469 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20470 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20471 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20472 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20473 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20474 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5 |
| 20475 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20476 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20477 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20478 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20479 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20480 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20481 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_dsub_7 |
| 20482 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20483 | 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13 |
| 20484 | 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20485 | }, |
| 20486 | { // GPRPair_with_gsub_0_in_hGPR |
| 20487 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_0 |
| 20488 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_1 |
| 20489 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_2 |
| 20490 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_3 |
| 20491 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_4 |
| 20492 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5 |
| 20493 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_6 |
| 20494 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_7 |
| 20495 | 34, // GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_tGPREven |
| 20496 | 30, // GPRPair_with_gsub_0_in_hGPR:gsub_1 -> GPRnopc_and_GPRnoip_and_hGPR |
| 20497 | 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_0 |
| 20498 | 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_1 |
| 20499 | 0, // GPRPair_with_gsub_0_in_hGPR:qsub_0 |
| 20500 | 0, // GPRPair_with_gsub_0_in_hGPR:qsub_1 |
| 20501 | 0, // GPRPair_with_gsub_0_in_hGPR:qsub_2 |
| 20502 | 0, // GPRPair_with_gsub_0_in_hGPR:qsub_3 |
| 20503 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0 |
| 20504 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_1 |
| 20505 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2 |
| 20506 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_3 |
| 20507 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4 |
| 20508 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_5 |
| 20509 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6 |
| 20510 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_7 |
| 20511 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8 |
| 20512 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_9 |
| 20513 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_10 |
| 20514 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_11 |
| 20515 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_12 |
| 20516 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_13 |
| 20517 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_14 |
| 20518 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_15 |
| 20519 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20520 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20521 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20522 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20523 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20524 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20525 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20526 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20527 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20528 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20529 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20530 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20531 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20532 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5 |
| 20533 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20534 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20535 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20536 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20537 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20538 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20539 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7 |
| 20540 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20541 | 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13 |
| 20542 | 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20543 | }, |
| 20544 | { // GPRPair_with_gsub_0_in_tcGPR |
| 20545 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_0 |
| 20546 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_1 |
| 20547 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_2 |
| 20548 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_3 |
| 20549 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_4 |
| 20550 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5 |
| 20551 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_6 |
| 20552 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_7 |
| 20553 | 38, // GPRPair_with_gsub_0_in_tcGPR:gsub_0 -> tGPREven_and_tcGPR |
| 20554 | 16, // GPRPair_with_gsub_0_in_tcGPR:gsub_1 -> GPRnoip_and_GPRnopc |
| 20555 | 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_0 |
| 20556 | 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_1 |
| 20557 | 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_0 |
| 20558 | 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_1 |
| 20559 | 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_2 |
| 20560 | 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_3 |
| 20561 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0 |
| 20562 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_1 |
| 20563 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2 |
| 20564 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_3 |
| 20565 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4 |
| 20566 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_5 |
| 20567 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6 |
| 20568 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_7 |
| 20569 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8 |
| 20570 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_9 |
| 20571 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_10 |
| 20572 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_11 |
| 20573 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_12 |
| 20574 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_13 |
| 20575 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_14 |
| 20576 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_15 |
| 20577 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20578 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20579 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20580 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20581 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20582 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20583 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20584 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20585 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20586 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20587 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20588 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20589 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20590 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5 |
| 20591 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20592 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20593 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20594 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20595 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20596 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20597 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_dsub_7 |
| 20598 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20599 | 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13 |
| 20600 | 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20601 | }, |
| 20602 | { // GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 20603 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_0 |
| 20604 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_1 |
| 20605 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_2 |
| 20606 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_3 |
| 20607 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_4 |
| 20608 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5 |
| 20609 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_6 |
| 20610 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_7 |
| 20611 | 42, // GPRPair_with_gsub_0_in_tcGPRnotr12:gsub_0 -> tGPREven_and_tcGPRnotr12 |
| 20612 | 43, // GPRPair_with_gsub_0_in_tcGPRnotr12:gsub_1 -> tGPROdd_and_tcGPR |
| 20613 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qqsub_0 |
| 20614 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qqsub_1 |
| 20615 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_0 |
| 20616 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_1 |
| 20617 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_2 |
| 20618 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_3 |
| 20619 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0 |
| 20620 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_1 |
| 20621 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2 |
| 20622 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_3 |
| 20623 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4 |
| 20624 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_5 |
| 20625 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6 |
| 20626 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_7 |
| 20627 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8 |
| 20628 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_9 |
| 20629 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_10 |
| 20630 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_11 |
| 20631 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_12 |
| 20632 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_13 |
| 20633 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_14 |
| 20634 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_15 |
| 20635 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20636 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20637 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20638 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20639 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20640 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20641 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20642 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20643 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20644 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20645 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20646 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20647 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20648 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_dsub_5 |
| 20649 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20650 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20651 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20652 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20653 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20654 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20655 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_dsub_7 |
| 20656 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20657 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_ssub_12_ssub_13 |
| 20658 | 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20659 | }, |
| 20660 | { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 20661 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_0 |
| 20662 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_1 |
| 20663 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_2 |
| 20664 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_3 |
| 20665 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_4 |
| 20666 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5 |
| 20667 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_6 |
| 20668 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_7 |
| 20669 | 40, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_GPRnoip_and_tGPREven |
| 20670 | 41, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_1 -> hGPR_and_tGPROdd |
| 20671 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_0 |
| 20672 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_1 |
| 20673 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_0 |
| 20674 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_1 |
| 20675 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_2 |
| 20676 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_3 |
| 20677 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0 |
| 20678 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_1 |
| 20679 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2 |
| 20680 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_3 |
| 20681 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4 |
| 20682 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_5 |
| 20683 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6 |
| 20684 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_7 |
| 20685 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8 |
| 20686 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_9 |
| 20687 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_10 |
| 20688 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_11 |
| 20689 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_12 |
| 20690 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_13 |
| 20691 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_14 |
| 20692 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_15 |
| 20693 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20694 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20695 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20696 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20697 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20698 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20699 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20700 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20701 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20702 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20703 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20704 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20705 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20706 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5 |
| 20707 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20708 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20709 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20710 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20711 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20712 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20713 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7 |
| 20714 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20715 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13 |
| 20716 | 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20717 | }, |
| 20718 | { // GPRPair_with_gsub_1_in_GPRsp |
| 20719 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_0 |
| 20720 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_1 |
| 20721 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_2 |
| 20722 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_3 |
| 20723 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_4 |
| 20724 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5 |
| 20725 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_6 |
| 20726 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_7 |
| 20727 | 51, // GPRPair_with_gsub_1_in_GPRsp:gsub_0 -> hGPR_and_tcGPR |
| 20728 | 47, // GPRPair_with_gsub_1_in_GPRsp:gsub_1 -> GPRsp |
| 20729 | 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_0 |
| 20730 | 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_1 |
| 20731 | 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_0 |
| 20732 | 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_1 |
| 20733 | 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_2 |
| 20734 | 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_3 |
| 20735 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0 |
| 20736 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_1 |
| 20737 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2 |
| 20738 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_3 |
| 20739 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4 |
| 20740 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_5 |
| 20741 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6 |
| 20742 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_7 |
| 20743 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8 |
| 20744 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_9 |
| 20745 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_10 |
| 20746 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_11 |
| 20747 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_12 |
| 20748 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_13 |
| 20749 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_14 |
| 20750 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_15 |
| 20751 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20752 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20753 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20754 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20755 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20756 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20757 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20758 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20759 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20760 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20761 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20762 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20763 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20764 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5 |
| 20765 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20766 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20767 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20768 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20769 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20770 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20771 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_dsub_7 |
| 20772 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20773 | 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13 |
| 20774 | 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20775 | }, |
| 20776 | { // DPairSpc |
| 20777 | 52, // DPairSpc:dsub_0 -> DPR |
| 20778 | 0, // DPairSpc:dsub_1 |
| 20779 | 52, // DPairSpc:dsub_2 -> DPR |
| 20780 | 0, // DPairSpc:dsub_3 |
| 20781 | 0, // DPairSpc:dsub_4 |
| 20782 | 0, // DPairSpc:dsub_5 |
| 20783 | 0, // DPairSpc:dsub_6 |
| 20784 | 0, // DPairSpc:dsub_7 |
| 20785 | 0, // DPairSpc:gsub_0 |
| 20786 | 0, // DPairSpc:gsub_1 |
| 20787 | 0, // DPairSpc:qqsub_0 |
| 20788 | 0, // DPairSpc:qqsub_1 |
| 20789 | 0, // DPairSpc:qsub_0 |
| 20790 | 0, // DPairSpc:qsub_1 |
| 20791 | 0, // DPairSpc:qsub_2 |
| 20792 | 0, // DPairSpc:qsub_3 |
| 20793 | 3, // DPairSpc:ssub_0 -> SPR |
| 20794 | 3, // DPairSpc:ssub_1 -> SPR |
| 20795 | 0, // DPairSpc:ssub_2 |
| 20796 | 0, // DPairSpc:ssub_3 |
| 20797 | 3, // DPairSpc:ssub_4 -> SPR |
| 20798 | 3, // DPairSpc:ssub_5 -> SPR |
| 20799 | 0, // DPairSpc:ssub_6 |
| 20800 | 0, // DPairSpc:ssub_7 |
| 20801 | 0, // DPairSpc:ssub_8 |
| 20802 | 0, // DPairSpc:ssub_9 |
| 20803 | 0, // DPairSpc:ssub_10 |
| 20804 | 0, // DPairSpc:ssub_11 |
| 20805 | 0, // DPairSpc:ssub_12 |
| 20806 | 0, // DPairSpc:ssub_13 |
| 20807 | 0, // DPairSpc:ssub_14 |
| 20808 | 0, // DPairSpc:ssub_15 |
| 20809 | 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20810 | 0, // DPairSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20811 | 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20812 | 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20813 | 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20814 | 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20815 | 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20816 | 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20817 | 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20818 | 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20819 | 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20820 | 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20821 | 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20822 | 0, // DPairSpc:ssub_6_ssub_7_dsub_5 |
| 20823 | 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20824 | 0, // DPairSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20825 | 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20826 | 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20827 | 0, // DPairSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20828 | 0, // DPairSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20829 | 0, // DPairSpc:dsub_5_dsub_7 |
| 20830 | 0, // DPairSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20831 | 0, // DPairSpc:dsub_5_ssub_12_ssub_13 |
| 20832 | 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20833 | }, |
| 20834 | { // DPairSpc_with_ssub_0 |
| 20835 | 4, // DPairSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 20836 | 0, // DPairSpc_with_ssub_0:dsub_1 |
| 20837 | 52, // DPairSpc_with_ssub_0:dsub_2 -> DPR |
| 20838 | 0, // DPairSpc_with_ssub_0:dsub_3 |
| 20839 | 0, // DPairSpc_with_ssub_0:dsub_4 |
| 20840 | 0, // DPairSpc_with_ssub_0:dsub_5 |
| 20841 | 0, // DPairSpc_with_ssub_0:dsub_6 |
| 20842 | 0, // DPairSpc_with_ssub_0:dsub_7 |
| 20843 | 0, // DPairSpc_with_ssub_0:gsub_0 |
| 20844 | 0, // DPairSpc_with_ssub_0:gsub_1 |
| 20845 | 0, // DPairSpc_with_ssub_0:qqsub_0 |
| 20846 | 0, // DPairSpc_with_ssub_0:qqsub_1 |
| 20847 | 0, // DPairSpc_with_ssub_0:qsub_0 |
| 20848 | 0, // DPairSpc_with_ssub_0:qsub_1 |
| 20849 | 0, // DPairSpc_with_ssub_0:qsub_2 |
| 20850 | 0, // DPairSpc_with_ssub_0:qsub_3 |
| 20851 | 3, // DPairSpc_with_ssub_0:ssub_0 -> SPR |
| 20852 | 3, // DPairSpc_with_ssub_0:ssub_1 -> SPR |
| 20853 | 0, // DPairSpc_with_ssub_0:ssub_2 |
| 20854 | 0, // DPairSpc_with_ssub_0:ssub_3 |
| 20855 | 3, // DPairSpc_with_ssub_0:ssub_4 -> SPR |
| 20856 | 3, // DPairSpc_with_ssub_0:ssub_5 -> SPR |
| 20857 | 0, // DPairSpc_with_ssub_0:ssub_6 |
| 20858 | 0, // DPairSpc_with_ssub_0:ssub_7 |
| 20859 | 0, // DPairSpc_with_ssub_0:ssub_8 |
| 20860 | 0, // DPairSpc_with_ssub_0:ssub_9 |
| 20861 | 0, // DPairSpc_with_ssub_0:ssub_10 |
| 20862 | 0, // DPairSpc_with_ssub_0:ssub_11 |
| 20863 | 0, // DPairSpc_with_ssub_0:ssub_12 |
| 20864 | 0, // DPairSpc_with_ssub_0:ssub_13 |
| 20865 | 0, // DPairSpc_with_ssub_0:ssub_14 |
| 20866 | 0, // DPairSpc_with_ssub_0:ssub_15 |
| 20867 | 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20868 | 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20869 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20870 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20871 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20872 | 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20873 | 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20874 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20875 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20876 | 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20877 | 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20878 | 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20879 | 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20880 | 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 20881 | 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20882 | 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20883 | 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20884 | 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20885 | 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20886 | 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20887 | 0, // DPairSpc_with_ssub_0:dsub_5_dsub_7 |
| 20888 | 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20889 | 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 20890 | 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20891 | }, |
| 20892 | { // DPairSpc_with_ssub_4 |
| 20893 | 53, // DPairSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 20894 | 0, // DPairSpc_with_ssub_4:dsub_1 |
| 20895 | 53, // DPairSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 20896 | 0, // DPairSpc_with_ssub_4:dsub_3 |
| 20897 | 0, // DPairSpc_with_ssub_4:dsub_4 |
| 20898 | 0, // DPairSpc_with_ssub_4:dsub_5 |
| 20899 | 0, // DPairSpc_with_ssub_4:dsub_6 |
| 20900 | 0, // DPairSpc_with_ssub_4:dsub_7 |
| 20901 | 0, // DPairSpc_with_ssub_4:gsub_0 |
| 20902 | 0, // DPairSpc_with_ssub_4:gsub_1 |
| 20903 | 0, // DPairSpc_with_ssub_4:qqsub_0 |
| 20904 | 0, // DPairSpc_with_ssub_4:qqsub_1 |
| 20905 | 0, // DPairSpc_with_ssub_4:qsub_0 |
| 20906 | 0, // DPairSpc_with_ssub_4:qsub_1 |
| 20907 | 0, // DPairSpc_with_ssub_4:qsub_2 |
| 20908 | 0, // DPairSpc_with_ssub_4:qsub_3 |
| 20909 | 3, // DPairSpc_with_ssub_4:ssub_0 -> SPR |
| 20910 | 3, // DPairSpc_with_ssub_4:ssub_1 -> SPR |
| 20911 | 0, // DPairSpc_with_ssub_4:ssub_2 |
| 20912 | 0, // DPairSpc_with_ssub_4:ssub_3 |
| 20913 | 3, // DPairSpc_with_ssub_4:ssub_4 -> SPR |
| 20914 | 3, // DPairSpc_with_ssub_4:ssub_5 -> SPR |
| 20915 | 0, // DPairSpc_with_ssub_4:ssub_6 |
| 20916 | 0, // DPairSpc_with_ssub_4:ssub_7 |
| 20917 | 0, // DPairSpc_with_ssub_4:ssub_8 |
| 20918 | 0, // DPairSpc_with_ssub_4:ssub_9 |
| 20919 | 0, // DPairSpc_with_ssub_4:ssub_10 |
| 20920 | 0, // DPairSpc_with_ssub_4:ssub_11 |
| 20921 | 0, // DPairSpc_with_ssub_4:ssub_12 |
| 20922 | 0, // DPairSpc_with_ssub_4:ssub_13 |
| 20923 | 0, // DPairSpc_with_ssub_4:ssub_14 |
| 20924 | 0, // DPairSpc_with_ssub_4:ssub_15 |
| 20925 | 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20926 | 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20927 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20928 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20929 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20930 | 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20931 | 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20932 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20933 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20934 | 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20935 | 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20936 | 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20937 | 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20938 | 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 20939 | 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20940 | 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20941 | 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 20942 | 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20943 | 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 20944 | 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 20945 | 0, // DPairSpc_with_ssub_4:dsub_5_dsub_7 |
| 20946 | 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 20947 | 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 20948 | 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 20949 | }, |
| 20950 | { // DPairSpc_with_dsub_0_in_DPR_8 |
| 20951 | 20, // DPairSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 20952 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 20953 | 53, // DPairSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 20954 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 20955 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_4 |
| 20956 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 20957 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 20958 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 20959 | 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 20960 | 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 20961 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 20962 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 20963 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 20964 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 20965 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 20966 | 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 20967 | 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 20968 | 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 20969 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 20970 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 20971 | 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 20972 | 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 20973 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 20974 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 20975 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8 |
| 20976 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_9 |
| 20977 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 20978 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 20979 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 20980 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 20981 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 20982 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 20983 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 20984 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 20985 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 20986 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 20987 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 20988 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 20989 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20990 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 20991 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 20992 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20993 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 20994 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 20995 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 20996 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 20997 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 20998 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 20999 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21000 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21001 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21002 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21003 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 21004 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21005 | 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 21006 | 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21007 | }, |
| 21008 | { // DPairSpc_with_dsub_2_in_DPR_8 |
| 21009 | 54, // DPairSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 21010 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 21011 | 54, // DPairSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 21012 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 21013 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_4 |
| 21014 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 21015 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 21016 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 21017 | 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 21018 | 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 21019 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 21020 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 21021 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 21022 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 21023 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 21024 | 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 21025 | 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 21026 | 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 21027 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 21028 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 21029 | 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 21030 | 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 21031 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 21032 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 21033 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8 |
| 21034 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_9 |
| 21035 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 21036 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 21037 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 21038 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 21039 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 21040 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 21041 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21042 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21043 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21044 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21045 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21046 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21047 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21048 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21049 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21050 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21051 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21052 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21053 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21054 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 21055 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21056 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21057 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21058 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21059 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21060 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21061 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 21062 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21063 | 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 21064 | 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21065 | }, |
| 21066 | { // DPair |
| 21067 | 52, // DPair:dsub_0 -> DPR |
| 21068 | 52, // DPair:dsub_1 -> DPR |
| 21069 | 0, // DPair:dsub_2 |
| 21070 | 0, // DPair:dsub_3 |
| 21071 | 0, // DPair:dsub_4 |
| 21072 | 0, // DPair:dsub_5 |
| 21073 | 0, // DPair:dsub_6 |
| 21074 | 0, // DPair:dsub_7 |
| 21075 | 0, // DPair:gsub_0 |
| 21076 | 0, // DPair:gsub_1 |
| 21077 | 0, // DPair:qqsub_0 |
| 21078 | 0, // DPair:qqsub_1 |
| 21079 | 0, // DPair:qsub_0 |
| 21080 | 0, // DPair:qsub_1 |
| 21081 | 0, // DPair:qsub_2 |
| 21082 | 0, // DPair:qsub_3 |
| 21083 | 3, // DPair:ssub_0 -> SPR |
| 21084 | 3, // DPair:ssub_1 -> SPR |
| 21085 | 3, // DPair:ssub_2 -> SPR |
| 21086 | 3, // DPair:ssub_3 -> SPR |
| 21087 | 0, // DPair:ssub_4 |
| 21088 | 0, // DPair:ssub_5 |
| 21089 | 0, // DPair:ssub_6 |
| 21090 | 0, // DPair:ssub_7 |
| 21091 | 0, // DPair:ssub_8 |
| 21092 | 0, // DPair:ssub_9 |
| 21093 | 0, // DPair:ssub_10 |
| 21094 | 0, // DPair:ssub_11 |
| 21095 | 0, // DPair:ssub_12 |
| 21096 | 0, // DPair:ssub_13 |
| 21097 | 0, // DPair:ssub_14 |
| 21098 | 0, // DPair:ssub_15 |
| 21099 | 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21100 | 0, // DPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21101 | 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21102 | 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21103 | 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21104 | 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21105 | 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21106 | 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21107 | 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21108 | 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21109 | 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21110 | 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21111 | 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21112 | 0, // DPair:ssub_6_ssub_7_dsub_5 |
| 21113 | 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21114 | 0, // DPair:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21115 | 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21116 | 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21117 | 0, // DPair:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21118 | 0, // DPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21119 | 0, // DPair:dsub_5_dsub_7 |
| 21120 | 0, // DPair:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21121 | 0, // DPair:dsub_5_ssub_12_ssub_13 |
| 21122 | 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21123 | }, |
| 21124 | { // DPair_with_ssub_0 |
| 21125 | 4, // DPair_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 21126 | 52, // DPair_with_ssub_0:dsub_1 -> DPR |
| 21127 | 0, // DPair_with_ssub_0:dsub_2 |
| 21128 | 0, // DPair_with_ssub_0:dsub_3 |
| 21129 | 0, // DPair_with_ssub_0:dsub_4 |
| 21130 | 0, // DPair_with_ssub_0:dsub_5 |
| 21131 | 0, // DPair_with_ssub_0:dsub_6 |
| 21132 | 0, // DPair_with_ssub_0:dsub_7 |
| 21133 | 0, // DPair_with_ssub_0:gsub_0 |
| 21134 | 0, // DPair_with_ssub_0:gsub_1 |
| 21135 | 0, // DPair_with_ssub_0:qqsub_0 |
| 21136 | 0, // DPair_with_ssub_0:qqsub_1 |
| 21137 | 0, // DPair_with_ssub_0:qsub_0 |
| 21138 | 0, // DPair_with_ssub_0:qsub_1 |
| 21139 | 0, // DPair_with_ssub_0:qsub_2 |
| 21140 | 0, // DPair_with_ssub_0:qsub_3 |
| 21141 | 3, // DPair_with_ssub_0:ssub_0 -> SPR |
| 21142 | 3, // DPair_with_ssub_0:ssub_1 -> SPR |
| 21143 | 3, // DPair_with_ssub_0:ssub_2 -> SPR |
| 21144 | 3, // DPair_with_ssub_0:ssub_3 -> SPR |
| 21145 | 0, // DPair_with_ssub_0:ssub_4 |
| 21146 | 0, // DPair_with_ssub_0:ssub_5 |
| 21147 | 0, // DPair_with_ssub_0:ssub_6 |
| 21148 | 0, // DPair_with_ssub_0:ssub_7 |
| 21149 | 0, // DPair_with_ssub_0:ssub_8 |
| 21150 | 0, // DPair_with_ssub_0:ssub_9 |
| 21151 | 0, // DPair_with_ssub_0:ssub_10 |
| 21152 | 0, // DPair_with_ssub_0:ssub_11 |
| 21153 | 0, // DPair_with_ssub_0:ssub_12 |
| 21154 | 0, // DPair_with_ssub_0:ssub_13 |
| 21155 | 0, // DPair_with_ssub_0:ssub_14 |
| 21156 | 0, // DPair_with_ssub_0:ssub_15 |
| 21157 | 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21158 | 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21159 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21160 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21161 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21162 | 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21163 | 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21164 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21165 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21166 | 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21167 | 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21168 | 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21169 | 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21170 | 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 21171 | 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21172 | 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21173 | 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21174 | 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21175 | 0, // DPair_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21176 | 0, // DPair_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21177 | 0, // DPair_with_ssub_0:dsub_5_dsub_7 |
| 21178 | 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21179 | 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 21180 | 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21181 | }, |
| 21182 | { // QPR |
| 21183 | 52, // QPR:dsub_0 -> DPR |
| 21184 | 52, // QPR:dsub_1 -> DPR |
| 21185 | 0, // QPR:dsub_2 |
| 21186 | 0, // QPR:dsub_3 |
| 21187 | 0, // QPR:dsub_4 |
| 21188 | 0, // QPR:dsub_5 |
| 21189 | 0, // QPR:dsub_6 |
| 21190 | 0, // QPR:dsub_7 |
| 21191 | 0, // QPR:gsub_0 |
| 21192 | 0, // QPR:gsub_1 |
| 21193 | 0, // QPR:qqsub_0 |
| 21194 | 0, // QPR:qqsub_1 |
| 21195 | 0, // QPR:qsub_0 |
| 21196 | 0, // QPR:qsub_1 |
| 21197 | 0, // QPR:qsub_2 |
| 21198 | 0, // QPR:qsub_3 |
| 21199 | 3, // QPR:ssub_0 -> SPR |
| 21200 | 3, // QPR:ssub_1 -> SPR |
| 21201 | 3, // QPR:ssub_2 -> SPR |
| 21202 | 3, // QPR:ssub_3 -> SPR |
| 21203 | 0, // QPR:ssub_4 |
| 21204 | 0, // QPR:ssub_5 |
| 21205 | 0, // QPR:ssub_6 |
| 21206 | 0, // QPR:ssub_7 |
| 21207 | 0, // QPR:ssub_8 |
| 21208 | 0, // QPR:ssub_9 |
| 21209 | 0, // QPR:ssub_10 |
| 21210 | 0, // QPR:ssub_11 |
| 21211 | 0, // QPR:ssub_12 |
| 21212 | 0, // QPR:ssub_13 |
| 21213 | 0, // QPR:ssub_14 |
| 21214 | 0, // QPR:ssub_15 |
| 21215 | 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21216 | 0, // QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21217 | 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21218 | 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21219 | 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21220 | 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21221 | 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21222 | 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21223 | 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21224 | 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21225 | 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21226 | 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21227 | 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21228 | 0, // QPR:ssub_6_ssub_7_dsub_5 |
| 21229 | 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21230 | 0, // QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21231 | 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21232 | 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21233 | 0, // QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21234 | 0, // QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21235 | 0, // QPR:dsub_5_dsub_7 |
| 21236 | 0, // QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21237 | 0, // QPR:dsub_5_ssub_12_ssub_13 |
| 21238 | 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21239 | }, |
| 21240 | { // DPair_with_ssub_2 |
| 21241 | 53, // DPair_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 21242 | 53, // DPair_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 21243 | 0, // DPair_with_ssub_2:dsub_2 |
| 21244 | 0, // DPair_with_ssub_2:dsub_3 |
| 21245 | 0, // DPair_with_ssub_2:dsub_4 |
| 21246 | 0, // DPair_with_ssub_2:dsub_5 |
| 21247 | 0, // DPair_with_ssub_2:dsub_6 |
| 21248 | 0, // DPair_with_ssub_2:dsub_7 |
| 21249 | 0, // DPair_with_ssub_2:gsub_0 |
| 21250 | 0, // DPair_with_ssub_2:gsub_1 |
| 21251 | 0, // DPair_with_ssub_2:qqsub_0 |
| 21252 | 0, // DPair_with_ssub_2:qqsub_1 |
| 21253 | 0, // DPair_with_ssub_2:qsub_0 |
| 21254 | 0, // DPair_with_ssub_2:qsub_1 |
| 21255 | 0, // DPair_with_ssub_2:qsub_2 |
| 21256 | 0, // DPair_with_ssub_2:qsub_3 |
| 21257 | 3, // DPair_with_ssub_2:ssub_0 -> SPR |
| 21258 | 3, // DPair_with_ssub_2:ssub_1 -> SPR |
| 21259 | 3, // DPair_with_ssub_2:ssub_2 -> SPR |
| 21260 | 3, // DPair_with_ssub_2:ssub_3 -> SPR |
| 21261 | 0, // DPair_with_ssub_2:ssub_4 |
| 21262 | 0, // DPair_with_ssub_2:ssub_5 |
| 21263 | 0, // DPair_with_ssub_2:ssub_6 |
| 21264 | 0, // DPair_with_ssub_2:ssub_7 |
| 21265 | 0, // DPair_with_ssub_2:ssub_8 |
| 21266 | 0, // DPair_with_ssub_2:ssub_9 |
| 21267 | 0, // DPair_with_ssub_2:ssub_10 |
| 21268 | 0, // DPair_with_ssub_2:ssub_11 |
| 21269 | 0, // DPair_with_ssub_2:ssub_12 |
| 21270 | 0, // DPair_with_ssub_2:ssub_13 |
| 21271 | 0, // DPair_with_ssub_2:ssub_14 |
| 21272 | 0, // DPair_with_ssub_2:ssub_15 |
| 21273 | 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21274 | 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21275 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21276 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21277 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21278 | 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21279 | 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21280 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21281 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21282 | 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21283 | 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21284 | 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21285 | 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21286 | 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 21287 | 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21288 | 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21289 | 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21290 | 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21291 | 0, // DPair_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21292 | 0, // DPair_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21293 | 0, // DPair_with_ssub_2:dsub_5_dsub_7 |
| 21294 | 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21295 | 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 21296 | 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21297 | }, |
| 21298 | { // DPair_with_dsub_0_in_DPR_8 |
| 21299 | 20, // DPair_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 21300 | 53, // DPair_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 21301 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_2 |
| 21302 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_3 |
| 21303 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_4 |
| 21304 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_5 |
| 21305 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_6 |
| 21306 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_7 |
| 21307 | 0, // DPair_with_dsub_0_in_DPR_8:gsub_0 |
| 21308 | 0, // DPair_with_dsub_0_in_DPR_8:gsub_1 |
| 21309 | 0, // DPair_with_dsub_0_in_DPR_8:qqsub_0 |
| 21310 | 0, // DPair_with_dsub_0_in_DPR_8:qqsub_1 |
| 21311 | 0, // DPair_with_dsub_0_in_DPR_8:qsub_0 |
| 21312 | 0, // DPair_with_dsub_0_in_DPR_8:qsub_1 |
| 21313 | 0, // DPair_with_dsub_0_in_DPR_8:qsub_2 |
| 21314 | 0, // DPair_with_dsub_0_in_DPR_8:qsub_3 |
| 21315 | 8, // DPair_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 21316 | 8, // DPair_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 21317 | 3, // DPair_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 21318 | 3, // DPair_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 21319 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_4 |
| 21320 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_5 |
| 21321 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6 |
| 21322 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_7 |
| 21323 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_8 |
| 21324 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_9 |
| 21325 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_10 |
| 21326 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_11 |
| 21327 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_12 |
| 21328 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_13 |
| 21329 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_14 |
| 21330 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_15 |
| 21331 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21332 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21333 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21334 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21335 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21336 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21337 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21338 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21339 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21340 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21341 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21342 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21343 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21344 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 21345 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21346 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21347 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21348 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21349 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21350 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21351 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 21352 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21353 | 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 21354 | 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21355 | }, |
| 21356 | { // MQPR |
| 21357 | 53, // MQPR:dsub_0 -> DPR_VFP2 |
| 21358 | 53, // MQPR:dsub_1 -> DPR_VFP2 |
| 21359 | 0, // MQPR:dsub_2 |
| 21360 | 0, // MQPR:dsub_3 |
| 21361 | 0, // MQPR:dsub_4 |
| 21362 | 0, // MQPR:dsub_5 |
| 21363 | 0, // MQPR:dsub_6 |
| 21364 | 0, // MQPR:dsub_7 |
| 21365 | 0, // MQPR:gsub_0 |
| 21366 | 0, // MQPR:gsub_1 |
| 21367 | 0, // MQPR:qqsub_0 |
| 21368 | 0, // MQPR:qqsub_1 |
| 21369 | 0, // MQPR:qsub_0 |
| 21370 | 0, // MQPR:qsub_1 |
| 21371 | 0, // MQPR:qsub_2 |
| 21372 | 0, // MQPR:qsub_3 |
| 21373 | 3, // MQPR:ssub_0 -> SPR |
| 21374 | 3, // MQPR:ssub_1 -> SPR |
| 21375 | 3, // MQPR:ssub_2 -> SPR |
| 21376 | 3, // MQPR:ssub_3 -> SPR |
| 21377 | 0, // MQPR:ssub_4 |
| 21378 | 0, // MQPR:ssub_5 |
| 21379 | 0, // MQPR:ssub_6 |
| 21380 | 0, // MQPR:ssub_7 |
| 21381 | 0, // MQPR:ssub_8 |
| 21382 | 0, // MQPR:ssub_9 |
| 21383 | 0, // MQPR:ssub_10 |
| 21384 | 0, // MQPR:ssub_11 |
| 21385 | 0, // MQPR:ssub_12 |
| 21386 | 0, // MQPR:ssub_13 |
| 21387 | 0, // MQPR:ssub_14 |
| 21388 | 0, // MQPR:ssub_15 |
| 21389 | 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21390 | 0, // MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21391 | 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21392 | 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21393 | 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21394 | 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21395 | 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21396 | 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21397 | 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21398 | 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21399 | 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21400 | 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21401 | 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21402 | 0, // MQPR:ssub_6_ssub_7_dsub_5 |
| 21403 | 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21404 | 0, // MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21405 | 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21406 | 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21407 | 0, // MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21408 | 0, // MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21409 | 0, // MQPR:dsub_5_dsub_7 |
| 21410 | 0, // MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21411 | 0, // MQPR:dsub_5_ssub_12_ssub_13 |
| 21412 | 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21413 | }, |
| 21414 | { // QPR_VFP2 |
| 21415 | 53, // QPR_VFP2:dsub_0 -> DPR_VFP2 |
| 21416 | 53, // QPR_VFP2:dsub_1 -> DPR_VFP2 |
| 21417 | 0, // QPR_VFP2:dsub_2 |
| 21418 | 0, // QPR_VFP2:dsub_3 |
| 21419 | 0, // QPR_VFP2:dsub_4 |
| 21420 | 0, // QPR_VFP2:dsub_5 |
| 21421 | 0, // QPR_VFP2:dsub_6 |
| 21422 | 0, // QPR_VFP2:dsub_7 |
| 21423 | 0, // QPR_VFP2:gsub_0 |
| 21424 | 0, // QPR_VFP2:gsub_1 |
| 21425 | 0, // QPR_VFP2:qqsub_0 |
| 21426 | 0, // QPR_VFP2:qqsub_1 |
| 21427 | 0, // QPR_VFP2:qsub_0 |
| 21428 | 0, // QPR_VFP2:qsub_1 |
| 21429 | 0, // QPR_VFP2:qsub_2 |
| 21430 | 0, // QPR_VFP2:qsub_3 |
| 21431 | 3, // QPR_VFP2:ssub_0 -> SPR |
| 21432 | 3, // QPR_VFP2:ssub_1 -> SPR |
| 21433 | 3, // QPR_VFP2:ssub_2 -> SPR |
| 21434 | 3, // QPR_VFP2:ssub_3 -> SPR |
| 21435 | 0, // QPR_VFP2:ssub_4 |
| 21436 | 0, // QPR_VFP2:ssub_5 |
| 21437 | 0, // QPR_VFP2:ssub_6 |
| 21438 | 0, // QPR_VFP2:ssub_7 |
| 21439 | 0, // QPR_VFP2:ssub_8 |
| 21440 | 0, // QPR_VFP2:ssub_9 |
| 21441 | 0, // QPR_VFP2:ssub_10 |
| 21442 | 0, // QPR_VFP2:ssub_11 |
| 21443 | 0, // QPR_VFP2:ssub_12 |
| 21444 | 0, // QPR_VFP2:ssub_13 |
| 21445 | 0, // QPR_VFP2:ssub_14 |
| 21446 | 0, // QPR_VFP2:ssub_15 |
| 21447 | 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21448 | 0, // QPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21449 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21450 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21451 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21452 | 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21453 | 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21454 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21455 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21456 | 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21457 | 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21458 | 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21459 | 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21460 | 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5 |
| 21461 | 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21462 | 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21463 | 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21464 | 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21465 | 0, // QPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21466 | 0, // QPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21467 | 0, // QPR_VFP2:dsub_5_dsub_7 |
| 21468 | 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21469 | 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13 |
| 21470 | 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21471 | }, |
| 21472 | { // DPair_with_dsub_1_in_DPR_8 |
| 21473 | 54, // DPair_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 21474 | 54, // DPair_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 21475 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_2 |
| 21476 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_3 |
| 21477 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_4 |
| 21478 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_5 |
| 21479 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_6 |
| 21480 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_7 |
| 21481 | 0, // DPair_with_dsub_1_in_DPR_8:gsub_0 |
| 21482 | 0, // DPair_with_dsub_1_in_DPR_8:gsub_1 |
| 21483 | 0, // DPair_with_dsub_1_in_DPR_8:qqsub_0 |
| 21484 | 0, // DPair_with_dsub_1_in_DPR_8:qqsub_1 |
| 21485 | 0, // DPair_with_dsub_1_in_DPR_8:qsub_0 |
| 21486 | 0, // DPair_with_dsub_1_in_DPR_8:qsub_1 |
| 21487 | 0, // DPair_with_dsub_1_in_DPR_8:qsub_2 |
| 21488 | 0, // DPair_with_dsub_1_in_DPR_8:qsub_3 |
| 21489 | 8, // DPair_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 21490 | 8, // DPair_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 21491 | 8, // DPair_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 21492 | 8, // DPair_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 21493 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_4 |
| 21494 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_5 |
| 21495 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6 |
| 21496 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_7 |
| 21497 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_8 |
| 21498 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_9 |
| 21499 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_10 |
| 21500 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_11 |
| 21501 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_12 |
| 21502 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_13 |
| 21503 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_14 |
| 21504 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_15 |
| 21505 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21506 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21507 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21508 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21509 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21510 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21511 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21512 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21513 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21514 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21515 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21516 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21517 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21518 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 21519 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21520 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21521 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21522 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21523 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21524 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21525 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 21526 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21527 | 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 21528 | 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21529 | }, |
| 21530 | { // QPR_8 |
| 21531 | 54, // QPR_8:dsub_0 -> DPR_8 |
| 21532 | 54, // QPR_8:dsub_1 -> DPR_8 |
| 21533 | 0, // QPR_8:dsub_2 |
| 21534 | 0, // QPR_8:dsub_3 |
| 21535 | 0, // QPR_8:dsub_4 |
| 21536 | 0, // QPR_8:dsub_5 |
| 21537 | 0, // QPR_8:dsub_6 |
| 21538 | 0, // QPR_8:dsub_7 |
| 21539 | 0, // QPR_8:gsub_0 |
| 21540 | 0, // QPR_8:gsub_1 |
| 21541 | 0, // QPR_8:qqsub_0 |
| 21542 | 0, // QPR_8:qqsub_1 |
| 21543 | 0, // QPR_8:qsub_0 |
| 21544 | 0, // QPR_8:qsub_1 |
| 21545 | 0, // QPR_8:qsub_2 |
| 21546 | 0, // QPR_8:qsub_3 |
| 21547 | 8, // QPR_8:ssub_0 -> SPR_8 |
| 21548 | 8, // QPR_8:ssub_1 -> SPR_8 |
| 21549 | 8, // QPR_8:ssub_2 -> SPR_8 |
| 21550 | 8, // QPR_8:ssub_3 -> SPR_8 |
| 21551 | 0, // QPR_8:ssub_4 |
| 21552 | 0, // QPR_8:ssub_5 |
| 21553 | 0, // QPR_8:ssub_6 |
| 21554 | 0, // QPR_8:ssub_7 |
| 21555 | 0, // QPR_8:ssub_8 |
| 21556 | 0, // QPR_8:ssub_9 |
| 21557 | 0, // QPR_8:ssub_10 |
| 21558 | 0, // QPR_8:ssub_11 |
| 21559 | 0, // QPR_8:ssub_12 |
| 21560 | 0, // QPR_8:ssub_13 |
| 21561 | 0, // QPR_8:ssub_14 |
| 21562 | 0, // QPR_8:ssub_15 |
| 21563 | 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 21564 | 0, // QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21565 | 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21566 | 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21567 | 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21568 | 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21569 | 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21570 | 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21571 | 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21572 | 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21573 | 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21574 | 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21575 | 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21576 | 0, // QPR_8:ssub_6_ssub_7_dsub_5 |
| 21577 | 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21578 | 0, // QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21579 | 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21580 | 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21581 | 0, // QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21582 | 0, // QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21583 | 0, // QPR_8:dsub_5_dsub_7 |
| 21584 | 0, // QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21585 | 0, // QPR_8:dsub_5_ssub_12_ssub_13 |
| 21586 | 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21587 | }, |
| 21588 | { // DTriple |
| 21589 | 52, // DTriple:dsub_0 -> DPR |
| 21590 | 52, // DTriple:dsub_1 -> DPR |
| 21591 | 52, // DTriple:dsub_2 -> DPR |
| 21592 | 0, // DTriple:dsub_3 |
| 21593 | 0, // DTriple:dsub_4 |
| 21594 | 0, // DTriple:dsub_5 |
| 21595 | 0, // DTriple:dsub_6 |
| 21596 | 0, // DTriple:dsub_7 |
| 21597 | 0, // DTriple:gsub_0 |
| 21598 | 0, // DTriple:gsub_1 |
| 21599 | 0, // DTriple:qqsub_0 |
| 21600 | 0, // DTriple:qqsub_1 |
| 21601 | 68, // DTriple:qsub_0 -> DPair |
| 21602 | 0, // DTriple:qsub_1 |
| 21603 | 0, // DTriple:qsub_2 |
| 21604 | 0, // DTriple:qsub_3 |
| 21605 | 3, // DTriple:ssub_0 -> SPR |
| 21606 | 3, // DTriple:ssub_1 -> SPR |
| 21607 | 3, // DTriple:ssub_2 -> SPR |
| 21608 | 3, // DTriple:ssub_3 -> SPR |
| 21609 | 3, // DTriple:ssub_4 -> SPR |
| 21610 | 3, // DTriple:ssub_5 -> SPR |
| 21611 | 0, // DTriple:ssub_6 |
| 21612 | 0, // DTriple:ssub_7 |
| 21613 | 0, // DTriple:ssub_8 |
| 21614 | 0, // DTriple:ssub_9 |
| 21615 | 0, // DTriple:ssub_10 |
| 21616 | 0, // DTriple:ssub_11 |
| 21617 | 0, // DTriple:ssub_12 |
| 21618 | 0, // DTriple:ssub_13 |
| 21619 | 0, // DTriple:ssub_14 |
| 21620 | 0, // DTriple:ssub_15 |
| 21621 | 63, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 21622 | 0, // DTriple:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21623 | 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21624 | 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21625 | 68, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 21626 | 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21627 | 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21628 | 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21629 | 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21630 | 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21631 | 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21632 | 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21633 | 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21634 | 0, // DTriple:ssub_6_ssub_7_dsub_5 |
| 21635 | 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21636 | 0, // DTriple:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21637 | 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21638 | 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21639 | 0, // DTriple:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21640 | 0, // DTriple:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21641 | 0, // DTriple:dsub_5_dsub_7 |
| 21642 | 0, // DTriple:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21643 | 0, // DTriple:dsub_5_ssub_12_ssub_13 |
| 21644 | 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21645 | }, |
| 21646 | { // DTripleSpc |
| 21647 | 52, // DTripleSpc:dsub_0 -> DPR |
| 21648 | 0, // DTripleSpc:dsub_1 |
| 21649 | 52, // DTripleSpc:dsub_2 -> DPR |
| 21650 | 0, // DTripleSpc:dsub_3 |
| 21651 | 52, // DTripleSpc:dsub_4 -> DPR |
| 21652 | 0, // DTripleSpc:dsub_5 |
| 21653 | 0, // DTripleSpc:dsub_6 |
| 21654 | 0, // DTripleSpc:dsub_7 |
| 21655 | 0, // DTripleSpc:gsub_0 |
| 21656 | 0, // DTripleSpc:gsub_1 |
| 21657 | 0, // DTripleSpc:qqsub_0 |
| 21658 | 0, // DTripleSpc:qqsub_1 |
| 21659 | 0, // DTripleSpc:qsub_0 |
| 21660 | 0, // DTripleSpc:qsub_1 |
| 21661 | 0, // DTripleSpc:qsub_2 |
| 21662 | 0, // DTripleSpc:qsub_3 |
| 21663 | 3, // DTripleSpc:ssub_0 -> SPR |
| 21664 | 3, // DTripleSpc:ssub_1 -> SPR |
| 21665 | 0, // DTripleSpc:ssub_2 |
| 21666 | 0, // DTripleSpc:ssub_3 |
| 21667 | 3, // DTripleSpc:ssub_4 -> SPR |
| 21668 | 3, // DTripleSpc:ssub_5 -> SPR |
| 21669 | 0, // DTripleSpc:ssub_6 |
| 21670 | 0, // DTripleSpc:ssub_7 |
| 21671 | 3, // DTripleSpc:ssub_8 -> SPR |
| 21672 | 3, // DTripleSpc:ssub_9 -> SPR |
| 21673 | 0, // DTripleSpc:ssub_10 |
| 21674 | 0, // DTripleSpc:ssub_11 |
| 21675 | 0, // DTripleSpc:ssub_12 |
| 21676 | 0, // DTripleSpc:ssub_13 |
| 21677 | 0, // DTripleSpc:ssub_14 |
| 21678 | 0, // DTripleSpc:ssub_15 |
| 21679 | 63, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 21680 | 0, // DTripleSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21681 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21682 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21683 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21684 | 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21685 | 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21686 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21687 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21688 | 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21689 | 63, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 21690 | 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21691 | 0, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21692 | 0, // DTripleSpc:ssub_6_ssub_7_dsub_5 |
| 21693 | 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21694 | 0, // DTripleSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21695 | 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21696 | 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21697 | 0, // DTripleSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21698 | 0, // DTripleSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21699 | 0, // DTripleSpc:dsub_5_dsub_7 |
| 21700 | 0, // DTripleSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21701 | 0, // DTripleSpc:dsub_5_ssub_12_ssub_13 |
| 21702 | 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21703 | }, |
| 21704 | { // DTripleSpc_with_ssub_0 |
| 21705 | 4, // DTripleSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 21706 | 0, // DTripleSpc_with_ssub_0:dsub_1 |
| 21707 | 52, // DTripleSpc_with_ssub_0:dsub_2 -> DPR |
| 21708 | 0, // DTripleSpc_with_ssub_0:dsub_3 |
| 21709 | 52, // DTripleSpc_with_ssub_0:dsub_4 -> DPR |
| 21710 | 0, // DTripleSpc_with_ssub_0:dsub_5 |
| 21711 | 0, // DTripleSpc_with_ssub_0:dsub_6 |
| 21712 | 0, // DTripleSpc_with_ssub_0:dsub_7 |
| 21713 | 0, // DTripleSpc_with_ssub_0:gsub_0 |
| 21714 | 0, // DTripleSpc_with_ssub_0:gsub_1 |
| 21715 | 0, // DTripleSpc_with_ssub_0:qqsub_0 |
| 21716 | 0, // DTripleSpc_with_ssub_0:qqsub_1 |
| 21717 | 0, // DTripleSpc_with_ssub_0:qsub_0 |
| 21718 | 0, // DTripleSpc_with_ssub_0:qsub_1 |
| 21719 | 0, // DTripleSpc_with_ssub_0:qsub_2 |
| 21720 | 0, // DTripleSpc_with_ssub_0:qsub_3 |
| 21721 | 3, // DTripleSpc_with_ssub_0:ssub_0 -> SPR |
| 21722 | 3, // DTripleSpc_with_ssub_0:ssub_1 -> SPR |
| 21723 | 0, // DTripleSpc_with_ssub_0:ssub_2 |
| 21724 | 0, // DTripleSpc_with_ssub_0:ssub_3 |
| 21725 | 3, // DTripleSpc_with_ssub_0:ssub_4 -> SPR |
| 21726 | 3, // DTripleSpc_with_ssub_0:ssub_5 -> SPR |
| 21727 | 0, // DTripleSpc_with_ssub_0:ssub_6 |
| 21728 | 0, // DTripleSpc_with_ssub_0:ssub_7 |
| 21729 | 3, // DTripleSpc_with_ssub_0:ssub_8 -> SPR |
| 21730 | 3, // DTripleSpc_with_ssub_0:ssub_9 -> SPR |
| 21731 | 0, // DTripleSpc_with_ssub_0:ssub_10 |
| 21732 | 0, // DTripleSpc_with_ssub_0:ssub_11 |
| 21733 | 0, // DTripleSpc_with_ssub_0:ssub_12 |
| 21734 | 0, // DTripleSpc_with_ssub_0:ssub_13 |
| 21735 | 0, // DTripleSpc_with_ssub_0:ssub_14 |
| 21736 | 0, // DTripleSpc_with_ssub_0:ssub_15 |
| 21737 | 64, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 21738 | 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21739 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21740 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21741 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 21742 | 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21743 | 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21744 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21745 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21746 | 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21747 | 63, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 21748 | 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21749 | 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21750 | 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 21751 | 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21752 | 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21753 | 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21754 | 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21755 | 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21756 | 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21757 | 0, // DTripleSpc_with_ssub_0:dsub_5_dsub_7 |
| 21758 | 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21759 | 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 21760 | 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21761 | }, |
| 21762 | { // DTriple_with_ssub_0 |
| 21763 | 4, // DTriple_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 21764 | 52, // DTriple_with_ssub_0:dsub_1 -> DPR |
| 21765 | 52, // DTriple_with_ssub_0:dsub_2 -> DPR |
| 21766 | 0, // DTriple_with_ssub_0:dsub_3 |
| 21767 | 0, // DTriple_with_ssub_0:dsub_4 |
| 21768 | 0, // DTriple_with_ssub_0:dsub_5 |
| 21769 | 0, // DTriple_with_ssub_0:dsub_6 |
| 21770 | 0, // DTriple_with_ssub_0:dsub_7 |
| 21771 | 0, // DTriple_with_ssub_0:gsub_0 |
| 21772 | 0, // DTriple_with_ssub_0:gsub_1 |
| 21773 | 0, // DTriple_with_ssub_0:qqsub_0 |
| 21774 | 0, // DTriple_with_ssub_0:qqsub_1 |
| 21775 | 69, // DTriple_with_ssub_0:qsub_0 -> DPair_with_ssub_0 |
| 21776 | 0, // DTriple_with_ssub_0:qsub_1 |
| 21777 | 0, // DTriple_with_ssub_0:qsub_2 |
| 21778 | 0, // DTriple_with_ssub_0:qsub_3 |
| 21779 | 3, // DTriple_with_ssub_0:ssub_0 -> SPR |
| 21780 | 3, // DTriple_with_ssub_0:ssub_1 -> SPR |
| 21781 | 3, // DTriple_with_ssub_0:ssub_2 -> SPR |
| 21782 | 3, // DTriple_with_ssub_0:ssub_3 -> SPR |
| 21783 | 3, // DTriple_with_ssub_0:ssub_4 -> SPR |
| 21784 | 3, // DTriple_with_ssub_0:ssub_5 -> SPR |
| 21785 | 0, // DTriple_with_ssub_0:ssub_6 |
| 21786 | 0, // DTriple_with_ssub_0:ssub_7 |
| 21787 | 0, // DTriple_with_ssub_0:ssub_8 |
| 21788 | 0, // DTriple_with_ssub_0:ssub_9 |
| 21789 | 0, // DTriple_with_ssub_0:ssub_10 |
| 21790 | 0, // DTriple_with_ssub_0:ssub_11 |
| 21791 | 0, // DTriple_with_ssub_0:ssub_12 |
| 21792 | 0, // DTriple_with_ssub_0:ssub_13 |
| 21793 | 0, // DTriple_with_ssub_0:ssub_14 |
| 21794 | 0, // DTriple_with_ssub_0:ssub_15 |
| 21795 | 64, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 21796 | 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21797 | 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21798 | 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21799 | 68, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 21800 | 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21801 | 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21802 | 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21803 | 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21804 | 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21805 | 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21806 | 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21807 | 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21808 | 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 21809 | 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21810 | 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21811 | 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21812 | 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21813 | 0, // DTriple_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21814 | 0, // DTriple_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21815 | 0, // DTriple_with_ssub_0:dsub_5_dsub_7 |
| 21816 | 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21817 | 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 21818 | 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21819 | }, |
| 21820 | { // DTriple_with_qsub_0_in_QPR |
| 21821 | 52, // DTriple_with_qsub_0_in_QPR:dsub_0 -> DPR |
| 21822 | 52, // DTriple_with_qsub_0_in_QPR:dsub_1 -> DPR |
| 21823 | 52, // DTriple_with_qsub_0_in_QPR:dsub_2 -> DPR |
| 21824 | 0, // DTriple_with_qsub_0_in_QPR:dsub_3 |
| 21825 | 0, // DTriple_with_qsub_0_in_QPR:dsub_4 |
| 21826 | 0, // DTriple_with_qsub_0_in_QPR:dsub_5 |
| 21827 | 0, // DTriple_with_qsub_0_in_QPR:dsub_6 |
| 21828 | 0, // DTriple_with_qsub_0_in_QPR:dsub_7 |
| 21829 | 0, // DTriple_with_qsub_0_in_QPR:gsub_0 |
| 21830 | 0, // DTriple_with_qsub_0_in_QPR:gsub_1 |
| 21831 | 0, // DTriple_with_qsub_0_in_QPR:qqsub_0 |
| 21832 | 0, // DTriple_with_qsub_0_in_QPR:qqsub_1 |
| 21833 | 70, // DTriple_with_qsub_0_in_QPR:qsub_0 -> QPR |
| 21834 | 0, // DTriple_with_qsub_0_in_QPR:qsub_1 |
| 21835 | 0, // DTriple_with_qsub_0_in_QPR:qsub_2 |
| 21836 | 0, // DTriple_with_qsub_0_in_QPR:qsub_3 |
| 21837 | 3, // DTriple_with_qsub_0_in_QPR:ssub_0 -> SPR |
| 21838 | 3, // DTriple_with_qsub_0_in_QPR:ssub_1 -> SPR |
| 21839 | 3, // DTriple_with_qsub_0_in_QPR:ssub_2 -> SPR |
| 21840 | 3, // DTriple_with_qsub_0_in_QPR:ssub_3 -> SPR |
| 21841 | 3, // DTriple_with_qsub_0_in_QPR:ssub_4 -> SPR |
| 21842 | 3, // DTriple_with_qsub_0_in_QPR:ssub_5 -> SPR |
| 21843 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6 |
| 21844 | 0, // DTriple_with_qsub_0_in_QPR:ssub_7 |
| 21845 | 0, // DTriple_with_qsub_0_in_QPR:ssub_8 |
| 21846 | 0, // DTriple_with_qsub_0_in_QPR:ssub_9 |
| 21847 | 0, // DTriple_with_qsub_0_in_QPR:ssub_10 |
| 21848 | 0, // DTriple_with_qsub_0_in_QPR:ssub_11 |
| 21849 | 0, // DTriple_with_qsub_0_in_QPR:ssub_12 |
| 21850 | 0, // DTriple_with_qsub_0_in_QPR:ssub_13 |
| 21851 | 0, // DTriple_with_qsub_0_in_QPR:ssub_14 |
| 21852 | 0, // DTriple_with_qsub_0_in_QPR:ssub_15 |
| 21853 | 63, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 21854 | 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21855 | 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21856 | 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21857 | 68, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 21858 | 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21859 | 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21860 | 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21861 | 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21862 | 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21863 | 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21864 | 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21865 | 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21866 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5 |
| 21867 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21868 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21869 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21870 | 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21871 | 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21872 | 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21873 | 0, // DTriple_with_qsub_0_in_QPR:dsub_5_dsub_7 |
| 21874 | 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21875 | 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13 |
| 21876 | 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21877 | }, |
| 21878 | { // DTriple_with_ssub_2 |
| 21879 | 53, // DTriple_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 21880 | 53, // DTriple_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 21881 | 52, // DTriple_with_ssub_2:dsub_2 -> DPR |
| 21882 | 0, // DTriple_with_ssub_2:dsub_3 |
| 21883 | 0, // DTriple_with_ssub_2:dsub_4 |
| 21884 | 0, // DTriple_with_ssub_2:dsub_5 |
| 21885 | 0, // DTriple_with_ssub_2:dsub_6 |
| 21886 | 0, // DTriple_with_ssub_2:dsub_7 |
| 21887 | 0, // DTriple_with_ssub_2:gsub_0 |
| 21888 | 0, // DTriple_with_ssub_2:gsub_1 |
| 21889 | 0, // DTriple_with_ssub_2:qqsub_0 |
| 21890 | 0, // DTriple_with_ssub_2:qqsub_1 |
| 21891 | 71, // DTriple_with_ssub_2:qsub_0 -> DPair_with_ssub_2 |
| 21892 | 0, // DTriple_with_ssub_2:qsub_1 |
| 21893 | 0, // DTriple_with_ssub_2:qsub_2 |
| 21894 | 0, // DTriple_with_ssub_2:qsub_3 |
| 21895 | 3, // DTriple_with_ssub_2:ssub_0 -> SPR |
| 21896 | 3, // DTriple_with_ssub_2:ssub_1 -> SPR |
| 21897 | 3, // DTriple_with_ssub_2:ssub_2 -> SPR |
| 21898 | 3, // DTriple_with_ssub_2:ssub_3 -> SPR |
| 21899 | 3, // DTriple_with_ssub_2:ssub_4 -> SPR |
| 21900 | 3, // DTriple_with_ssub_2:ssub_5 -> SPR |
| 21901 | 0, // DTriple_with_ssub_2:ssub_6 |
| 21902 | 0, // DTriple_with_ssub_2:ssub_7 |
| 21903 | 0, // DTriple_with_ssub_2:ssub_8 |
| 21904 | 0, // DTriple_with_ssub_2:ssub_9 |
| 21905 | 0, // DTriple_with_ssub_2:ssub_10 |
| 21906 | 0, // DTriple_with_ssub_2:ssub_11 |
| 21907 | 0, // DTriple_with_ssub_2:ssub_12 |
| 21908 | 0, // DTriple_with_ssub_2:ssub_13 |
| 21909 | 0, // DTriple_with_ssub_2:ssub_14 |
| 21910 | 0, // DTriple_with_ssub_2:ssub_15 |
| 21911 | 64, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 21912 | 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21913 | 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21914 | 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21915 | 69, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 21916 | 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21917 | 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21918 | 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21919 | 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21920 | 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21921 | 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21922 | 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21923 | 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21924 | 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 21925 | 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21926 | 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21927 | 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21928 | 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21929 | 0, // DTriple_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21930 | 0, // DTriple_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21931 | 0, // DTriple_with_ssub_2:dsub_5_dsub_7 |
| 21932 | 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21933 | 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 21934 | 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21935 | }, |
| 21936 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 21937 | 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR |
| 21938 | 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 21939 | 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 21940 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 |
| 21941 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 21942 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 21943 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 21944 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 21945 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 21946 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 21947 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 21948 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 21949 | 68, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair |
| 21950 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 |
| 21951 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 21952 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 21953 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 21954 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 21955 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 21956 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 21957 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 21958 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 21959 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 |
| 21960 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 |
| 21961 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 21962 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 21963 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 21964 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 21965 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 21966 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 21967 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 21968 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 21969 | 63, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 21970 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 21971 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 21972 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 21973 | 70, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 21974 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 21975 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21976 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 21977 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 21978 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21979 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 21980 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 21981 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 21982 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 21983 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 21984 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 21985 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 21986 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21987 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 21988 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 21989 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 21990 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 21991 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 21992 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 21993 | }, |
| 21994 | { // DTripleSpc_with_ssub_4 |
| 21995 | 53, // DTripleSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 21996 | 0, // DTripleSpc_with_ssub_4:dsub_1 |
| 21997 | 53, // DTripleSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 21998 | 0, // DTripleSpc_with_ssub_4:dsub_3 |
| 21999 | 52, // DTripleSpc_with_ssub_4:dsub_4 -> DPR |
| 22000 | 0, // DTripleSpc_with_ssub_4:dsub_5 |
| 22001 | 0, // DTripleSpc_with_ssub_4:dsub_6 |
| 22002 | 0, // DTripleSpc_with_ssub_4:dsub_7 |
| 22003 | 0, // DTripleSpc_with_ssub_4:gsub_0 |
| 22004 | 0, // DTripleSpc_with_ssub_4:gsub_1 |
| 22005 | 0, // DTripleSpc_with_ssub_4:qqsub_0 |
| 22006 | 0, // DTripleSpc_with_ssub_4:qqsub_1 |
| 22007 | 0, // DTripleSpc_with_ssub_4:qsub_0 |
| 22008 | 0, // DTripleSpc_with_ssub_4:qsub_1 |
| 22009 | 0, // DTripleSpc_with_ssub_4:qsub_2 |
| 22010 | 0, // DTripleSpc_with_ssub_4:qsub_3 |
| 22011 | 3, // DTripleSpc_with_ssub_4:ssub_0 -> SPR |
| 22012 | 3, // DTripleSpc_with_ssub_4:ssub_1 -> SPR |
| 22013 | 0, // DTripleSpc_with_ssub_4:ssub_2 |
| 22014 | 0, // DTripleSpc_with_ssub_4:ssub_3 |
| 22015 | 3, // DTripleSpc_with_ssub_4:ssub_4 -> SPR |
| 22016 | 3, // DTripleSpc_with_ssub_4:ssub_5 -> SPR |
| 22017 | 0, // DTripleSpc_with_ssub_4:ssub_6 |
| 22018 | 0, // DTripleSpc_with_ssub_4:ssub_7 |
| 22019 | 3, // DTripleSpc_with_ssub_4:ssub_8 -> SPR |
| 22020 | 3, // DTripleSpc_with_ssub_4:ssub_9 -> SPR |
| 22021 | 0, // DTripleSpc_with_ssub_4:ssub_10 |
| 22022 | 0, // DTripleSpc_with_ssub_4:ssub_11 |
| 22023 | 0, // DTripleSpc_with_ssub_4:ssub_12 |
| 22024 | 0, // DTripleSpc_with_ssub_4:ssub_13 |
| 22025 | 0, // DTripleSpc_with_ssub_4:ssub_14 |
| 22026 | 0, // DTripleSpc_with_ssub_4:ssub_15 |
| 22027 | 65, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 22028 | 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22029 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22030 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22031 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 22032 | 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22033 | 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22034 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22035 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22036 | 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22037 | 64, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 22038 | 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22039 | 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22040 | 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 22041 | 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22042 | 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22043 | 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22044 | 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22045 | 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22046 | 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22047 | 0, // DTripleSpc_with_ssub_4:dsub_5_dsub_7 |
| 22048 | 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22049 | 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 22050 | 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22051 | }, |
| 22052 | { // DTriple_with_ssub_4 |
| 22053 | 53, // DTriple_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 22054 | 53, // DTriple_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 22055 | 53, // DTriple_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 22056 | 0, // DTriple_with_ssub_4:dsub_3 |
| 22057 | 0, // DTriple_with_ssub_4:dsub_4 |
| 22058 | 0, // DTriple_with_ssub_4:dsub_5 |
| 22059 | 0, // DTriple_with_ssub_4:dsub_6 |
| 22060 | 0, // DTriple_with_ssub_4:dsub_7 |
| 22061 | 0, // DTriple_with_ssub_4:gsub_0 |
| 22062 | 0, // DTriple_with_ssub_4:gsub_1 |
| 22063 | 0, // DTriple_with_ssub_4:qqsub_0 |
| 22064 | 0, // DTriple_with_ssub_4:qqsub_1 |
| 22065 | 71, // DTriple_with_ssub_4:qsub_0 -> DPair_with_ssub_2 |
| 22066 | 0, // DTriple_with_ssub_4:qsub_1 |
| 22067 | 0, // DTriple_with_ssub_4:qsub_2 |
| 22068 | 0, // DTriple_with_ssub_4:qsub_3 |
| 22069 | 3, // DTriple_with_ssub_4:ssub_0 -> SPR |
| 22070 | 3, // DTriple_with_ssub_4:ssub_1 -> SPR |
| 22071 | 3, // DTriple_with_ssub_4:ssub_2 -> SPR |
| 22072 | 3, // DTriple_with_ssub_4:ssub_3 -> SPR |
| 22073 | 3, // DTriple_with_ssub_4:ssub_4 -> SPR |
| 22074 | 3, // DTriple_with_ssub_4:ssub_5 -> SPR |
| 22075 | 0, // DTriple_with_ssub_4:ssub_6 |
| 22076 | 0, // DTriple_with_ssub_4:ssub_7 |
| 22077 | 0, // DTriple_with_ssub_4:ssub_8 |
| 22078 | 0, // DTriple_with_ssub_4:ssub_9 |
| 22079 | 0, // DTriple_with_ssub_4:ssub_10 |
| 22080 | 0, // DTriple_with_ssub_4:ssub_11 |
| 22081 | 0, // DTriple_with_ssub_4:ssub_12 |
| 22082 | 0, // DTriple_with_ssub_4:ssub_13 |
| 22083 | 0, // DTriple_with_ssub_4:ssub_14 |
| 22084 | 0, // DTriple_with_ssub_4:ssub_15 |
| 22085 | 65, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 22086 | 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22087 | 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22088 | 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22089 | 71, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 22090 | 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22091 | 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22092 | 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22093 | 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22094 | 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22095 | 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22096 | 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22097 | 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22098 | 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 22099 | 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22100 | 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22101 | 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22102 | 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22103 | 0, // DTriple_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22104 | 0, // DTriple_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22105 | 0, // DTriple_with_ssub_4:dsub_5_dsub_7 |
| 22106 | 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22107 | 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 22108 | 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22109 | }, |
| 22110 | { // DTripleSpc_with_ssub_8 |
| 22111 | 53, // DTripleSpc_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 22112 | 0, // DTripleSpc_with_ssub_8:dsub_1 |
| 22113 | 53, // DTripleSpc_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 22114 | 0, // DTripleSpc_with_ssub_8:dsub_3 |
| 22115 | 53, // DTripleSpc_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 22116 | 0, // DTripleSpc_with_ssub_8:dsub_5 |
| 22117 | 0, // DTripleSpc_with_ssub_8:dsub_6 |
| 22118 | 0, // DTripleSpc_with_ssub_8:dsub_7 |
| 22119 | 0, // DTripleSpc_with_ssub_8:gsub_0 |
| 22120 | 0, // DTripleSpc_with_ssub_8:gsub_1 |
| 22121 | 0, // DTripleSpc_with_ssub_8:qqsub_0 |
| 22122 | 0, // DTripleSpc_with_ssub_8:qqsub_1 |
| 22123 | 0, // DTripleSpc_with_ssub_8:qsub_0 |
| 22124 | 0, // DTripleSpc_with_ssub_8:qsub_1 |
| 22125 | 0, // DTripleSpc_with_ssub_8:qsub_2 |
| 22126 | 0, // DTripleSpc_with_ssub_8:qsub_3 |
| 22127 | 3, // DTripleSpc_with_ssub_8:ssub_0 -> SPR |
| 22128 | 3, // DTripleSpc_with_ssub_8:ssub_1 -> SPR |
| 22129 | 0, // DTripleSpc_with_ssub_8:ssub_2 |
| 22130 | 0, // DTripleSpc_with_ssub_8:ssub_3 |
| 22131 | 3, // DTripleSpc_with_ssub_8:ssub_4 -> SPR |
| 22132 | 3, // DTripleSpc_with_ssub_8:ssub_5 -> SPR |
| 22133 | 0, // DTripleSpc_with_ssub_8:ssub_6 |
| 22134 | 0, // DTripleSpc_with_ssub_8:ssub_7 |
| 22135 | 3, // DTripleSpc_with_ssub_8:ssub_8 -> SPR |
| 22136 | 3, // DTripleSpc_with_ssub_8:ssub_9 -> SPR |
| 22137 | 0, // DTripleSpc_with_ssub_8:ssub_10 |
| 22138 | 0, // DTripleSpc_with_ssub_8:ssub_11 |
| 22139 | 0, // DTripleSpc_with_ssub_8:ssub_12 |
| 22140 | 0, // DTripleSpc_with_ssub_8:ssub_13 |
| 22141 | 0, // DTripleSpc_with_ssub_8:ssub_14 |
| 22142 | 0, // DTripleSpc_with_ssub_8:ssub_15 |
| 22143 | 65, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 22144 | 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22145 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22146 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22147 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 22148 | 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22149 | 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22150 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22151 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22152 | 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22153 | 65, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 22154 | 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22155 | 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22156 | 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5 |
| 22157 | 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22158 | 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22159 | 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22160 | 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22161 | 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22162 | 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22163 | 0, // DTripleSpc_with_ssub_8:dsub_5_dsub_7 |
| 22164 | 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22165 | 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13 |
| 22166 | 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22167 | }, |
| 22168 | { // DTripleSpc_with_dsub_0_in_DPR_8 |
| 22169 | 20, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 22170 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 22171 | 53, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 22172 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 22173 | 53, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 22174 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 22175 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 22176 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 22177 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 22178 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 22179 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 22180 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 22181 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 22182 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 22183 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 22184 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 22185 | 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 22186 | 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 22187 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 22188 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 22189 | 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 22190 | 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 22191 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 22192 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 22193 | 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR |
| 22194 | 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR |
| 22195 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 22196 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 22197 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 22198 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 22199 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 22200 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 22201 | 66, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22202 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22203 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22204 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22205 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 22206 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22207 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22208 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22209 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22210 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22211 | 65, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 22212 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22213 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22214 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22215 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22216 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22217 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22218 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22219 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22220 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22221 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 22222 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22223 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22224 | 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22225 | }, |
| 22226 | { // DTriple_with_dsub_0_in_DPR_8 |
| 22227 | 20, // DTriple_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 22228 | 53, // DTriple_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 22229 | 53, // DTriple_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 22230 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_3 |
| 22231 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_4 |
| 22232 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5 |
| 22233 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_6 |
| 22234 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_7 |
| 22235 | 0, // DTriple_with_dsub_0_in_DPR_8:gsub_0 |
| 22236 | 0, // DTriple_with_dsub_0_in_DPR_8:gsub_1 |
| 22237 | 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_0 |
| 22238 | 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_1 |
| 22239 | 72, // DTriple_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 22240 | 0, // DTriple_with_dsub_0_in_DPR_8:qsub_1 |
| 22241 | 0, // DTriple_with_dsub_0_in_DPR_8:qsub_2 |
| 22242 | 0, // DTriple_with_dsub_0_in_DPR_8:qsub_3 |
| 22243 | 8, // DTriple_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 22244 | 8, // DTriple_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 22245 | 3, // DTriple_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 22246 | 3, // DTriple_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 22247 | 3, // DTriple_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 22248 | 3, // DTriple_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 22249 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6 |
| 22250 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_7 |
| 22251 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8 |
| 22252 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_9 |
| 22253 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_10 |
| 22254 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_11 |
| 22255 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_12 |
| 22256 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_13 |
| 22257 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_14 |
| 22258 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_15 |
| 22259 | 66, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22260 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22261 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22262 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22263 | 71, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 22264 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22265 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22266 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22267 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22268 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22269 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22270 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22271 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22272 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22273 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22274 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22275 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22276 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22277 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22278 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22279 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 22280 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22281 | 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22282 | 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22283 | }, |
| 22284 | { // DTriple_with_qsub_0_in_MQPR |
| 22285 | 53, // DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2 |
| 22286 | 53, // DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2 |
| 22287 | 52, // DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR |
| 22288 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_3 |
| 22289 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_4 |
| 22290 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_5 |
| 22291 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_6 |
| 22292 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_7 |
| 22293 | 0, // DTriple_with_qsub_0_in_MQPR:gsub_0 |
| 22294 | 0, // DTriple_with_qsub_0_in_MQPR:gsub_1 |
| 22295 | 0, // DTriple_with_qsub_0_in_MQPR:qqsub_0 |
| 22296 | 0, // DTriple_with_qsub_0_in_MQPR:qqsub_1 |
| 22297 | 73, // DTriple_with_qsub_0_in_MQPR:qsub_0 -> MQPR |
| 22298 | 0, // DTriple_with_qsub_0_in_MQPR:qsub_1 |
| 22299 | 0, // DTriple_with_qsub_0_in_MQPR:qsub_2 |
| 22300 | 0, // DTriple_with_qsub_0_in_MQPR:qsub_3 |
| 22301 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR |
| 22302 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR |
| 22303 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR |
| 22304 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR |
| 22305 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR |
| 22306 | 3, // DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR |
| 22307 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6 |
| 22308 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_7 |
| 22309 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_8 |
| 22310 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_9 |
| 22311 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_10 |
| 22312 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_11 |
| 22313 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_12 |
| 22314 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_13 |
| 22315 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_14 |
| 22316 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_15 |
| 22317 | 64, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 22318 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22319 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22320 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22321 | 69, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 22322 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22323 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22324 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22325 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22326 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22327 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22328 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22329 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22330 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 22331 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22332 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22333 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22334 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22335 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22336 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22337 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 22338 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22339 | 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 22340 | 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22341 | }, |
| 22342 | { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 22343 | 53, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2 |
| 22344 | 52, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 22345 | 52, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 22346 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 |
| 22347 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 22348 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 22349 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 22350 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 22351 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 22352 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 22353 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 22354 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 22355 | 69, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0 |
| 22356 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 |
| 22357 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 22358 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 22359 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 22360 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 22361 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 22362 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 22363 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 22364 | 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 22365 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 |
| 22366 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 |
| 22367 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 22368 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 22369 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 22370 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 22371 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 22372 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 22373 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 22374 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 22375 | 64, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 22376 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22377 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22378 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22379 | 70, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 22380 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22381 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22382 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22383 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22384 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22385 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22386 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22387 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22388 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 22389 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22390 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22391 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22392 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22393 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22394 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22395 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 22396 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22397 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 22398 | 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22399 | }, |
| 22400 | { // DTriple_with_dsub_1_in_DPR_8 |
| 22401 | 54, // DTriple_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 22402 | 54, // DTriple_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 22403 | 53, // DTriple_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 22404 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_3 |
| 22405 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_4 |
| 22406 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5 |
| 22407 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_6 |
| 22408 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_7 |
| 22409 | 0, // DTriple_with_dsub_1_in_DPR_8:gsub_0 |
| 22410 | 0, // DTriple_with_dsub_1_in_DPR_8:gsub_1 |
| 22411 | 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_0 |
| 22412 | 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_1 |
| 22413 | 75, // DTriple_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 22414 | 0, // DTriple_with_dsub_1_in_DPR_8:qsub_1 |
| 22415 | 0, // DTriple_with_dsub_1_in_DPR_8:qsub_2 |
| 22416 | 0, // DTriple_with_dsub_1_in_DPR_8:qsub_3 |
| 22417 | 8, // DTriple_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 22418 | 8, // DTriple_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 22419 | 8, // DTriple_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 22420 | 8, // DTriple_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 22421 | 3, // DTriple_with_dsub_1_in_DPR_8:ssub_4 -> SPR |
| 22422 | 3, // DTriple_with_dsub_1_in_DPR_8:ssub_5 -> SPR |
| 22423 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6 |
| 22424 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_7 |
| 22425 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8 |
| 22426 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_9 |
| 22427 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_10 |
| 22428 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_11 |
| 22429 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_12 |
| 22430 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_13 |
| 22431 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_14 |
| 22432 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_15 |
| 22433 | 66, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22434 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22435 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22436 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22437 | 72, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 22438 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22439 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22440 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22441 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22442 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22443 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22444 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22445 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22446 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22447 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22448 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22449 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22450 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22451 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22452 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22453 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 22454 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22455 | 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22456 | 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22457 | }, |
| 22458 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 22459 | 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 22460 | 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 22461 | 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 22462 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 |
| 22463 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 22464 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 22465 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 22466 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 22467 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 22468 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 22469 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 22470 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 22471 | 71, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 22472 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 |
| 22473 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 22474 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 22475 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 22476 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 22477 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 22478 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 22479 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 22480 | 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 22481 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 |
| 22482 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 |
| 22483 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 22484 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 22485 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 22486 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 22487 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 22488 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 22489 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 22490 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 22491 | 65, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 22492 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22493 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22494 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22495 | 74, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 22496 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22497 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22498 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22499 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22500 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22501 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22502 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22503 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22504 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 22505 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22506 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22507 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22508 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22509 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22510 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22511 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 22512 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22513 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 22514 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22515 | }, |
| 22516 | { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 22517 | 53, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2 |
| 22518 | 53, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2 |
| 22519 | 53, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR_VFP2 |
| 22520 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_3 |
| 22521 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_4 |
| 22522 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5 |
| 22523 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_6 |
| 22524 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_7 |
| 22525 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_0 |
| 22526 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_1 |
| 22527 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_0 |
| 22528 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_1 |
| 22529 | 74, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_0 -> QPR_VFP2 |
| 22530 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_1 |
| 22531 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_2 |
| 22532 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_3 |
| 22533 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR |
| 22534 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR |
| 22535 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR |
| 22536 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR |
| 22537 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR |
| 22538 | 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR |
| 22539 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6 |
| 22540 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_7 |
| 22541 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8 |
| 22542 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_9 |
| 22543 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_10 |
| 22544 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_11 |
| 22545 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_12 |
| 22546 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_13 |
| 22547 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_14 |
| 22548 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_15 |
| 22549 | 65, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 22550 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22551 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22552 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22553 | 71, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 22554 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22555 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22556 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22557 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22558 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22559 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22560 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22561 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22562 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 22563 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22564 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22565 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22566 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22567 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22568 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22569 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 22570 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22571 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 22572 | 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22573 | }, |
| 22574 | { // DTripleSpc_with_dsub_2_in_DPR_8 |
| 22575 | 54, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 22576 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 22577 | 54, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 22578 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 22579 | 53, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 22580 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 22581 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 22582 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 22583 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 22584 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 22585 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 22586 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 22587 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 22588 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 22589 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 22590 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 22591 | 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 22592 | 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 22593 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 22594 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 22595 | 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 22596 | 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 22597 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 22598 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 22599 | 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 22600 | 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 22601 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 22602 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 22603 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 22604 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 22605 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 22606 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 22607 | 67, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22608 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22609 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22610 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22611 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 22612 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22613 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22614 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22615 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22616 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22617 | 66, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22618 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22619 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22620 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22621 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22622 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22623 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22624 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22625 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22626 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22627 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 22628 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22629 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22630 | 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22631 | }, |
| 22632 | { // DTriple_with_dsub_2_in_DPR_8 |
| 22633 | 54, // DTriple_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 22634 | 54, // DTriple_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 22635 | 54, // DTriple_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 22636 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_3 |
| 22637 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_4 |
| 22638 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5 |
| 22639 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_6 |
| 22640 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_7 |
| 22641 | 0, // DTriple_with_dsub_2_in_DPR_8:gsub_0 |
| 22642 | 0, // DTriple_with_dsub_2_in_DPR_8:gsub_1 |
| 22643 | 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_0 |
| 22644 | 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_1 |
| 22645 | 75, // DTriple_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 22646 | 0, // DTriple_with_dsub_2_in_DPR_8:qsub_1 |
| 22647 | 0, // DTriple_with_dsub_2_in_DPR_8:qsub_2 |
| 22648 | 0, // DTriple_with_dsub_2_in_DPR_8:qsub_3 |
| 22649 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 22650 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 22651 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 22652 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 22653 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 22654 | 8, // DTriple_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 22655 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6 |
| 22656 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_7 |
| 22657 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8 |
| 22658 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_9 |
| 22659 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_10 |
| 22660 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_11 |
| 22661 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_12 |
| 22662 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_13 |
| 22663 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_14 |
| 22664 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_15 |
| 22665 | 67, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22666 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22667 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22668 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22669 | 75, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 22670 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22671 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22672 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22673 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22674 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22675 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22676 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22677 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22678 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22679 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22680 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22681 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22682 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22683 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22684 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22685 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 22686 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22687 | 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22688 | 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22689 | }, |
| 22690 | { // DTripleSpc_with_dsub_4_in_DPR_8 |
| 22691 | 54, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8 |
| 22692 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_1 |
| 22693 | 54, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8 |
| 22694 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_3 |
| 22695 | 54, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8 |
| 22696 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5 |
| 22697 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_6 |
| 22698 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_7 |
| 22699 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_0 |
| 22700 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_1 |
| 22701 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_0 |
| 22702 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_1 |
| 22703 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_0 |
| 22704 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_1 |
| 22705 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_2 |
| 22706 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_3 |
| 22707 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8 |
| 22708 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8 |
| 22709 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2 |
| 22710 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_3 |
| 22711 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8 |
| 22712 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8 |
| 22713 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6 |
| 22714 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_7 |
| 22715 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8 |
| 22716 | 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8 |
| 22717 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_10 |
| 22718 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_11 |
| 22719 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_12 |
| 22720 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_13 |
| 22721 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_14 |
| 22722 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_15 |
| 22723 | 67, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22724 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22725 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22726 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22727 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 22728 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22729 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22730 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22731 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22732 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22733 | 67, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22734 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22735 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22736 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22737 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22738 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22739 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22740 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22741 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22742 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22743 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7 |
| 22744 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22745 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22746 | 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22747 | }, |
| 22748 | { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 22749 | 54, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8 |
| 22750 | 53, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 22751 | 53, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 22752 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 |
| 22753 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 22754 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 22755 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 22756 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 22757 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 22758 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 22759 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 22760 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 22761 | 72, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 22762 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 |
| 22763 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 22764 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 22765 | 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8 |
| 22766 | 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8 |
| 22767 | 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 22768 | 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 22769 | 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 22770 | 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 22771 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 |
| 22772 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 |
| 22773 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 22774 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 22775 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 22776 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 22777 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 22778 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 22779 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 22780 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 22781 | 66, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22782 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22783 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22784 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22785 | 74, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 22786 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22787 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22788 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22789 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22790 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22791 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22792 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22793 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22794 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 22795 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22796 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22797 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22798 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22799 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22800 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22801 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 22802 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22803 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 22804 | 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22805 | }, |
| 22806 | { // DTriple_with_qsub_0_in_QPR_8 |
| 22807 | 54, // DTriple_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8 |
| 22808 | 54, // DTriple_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8 |
| 22809 | 53, // DTriple_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2 |
| 22810 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_3 |
| 22811 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_4 |
| 22812 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5 |
| 22813 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_6 |
| 22814 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_7 |
| 22815 | 0, // DTriple_with_qsub_0_in_QPR_8:gsub_0 |
| 22816 | 0, // DTriple_with_qsub_0_in_QPR_8:gsub_1 |
| 22817 | 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_0 |
| 22818 | 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_1 |
| 22819 | 76, // DTriple_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8 |
| 22820 | 0, // DTriple_with_qsub_0_in_QPR_8:qsub_1 |
| 22821 | 0, // DTriple_with_qsub_0_in_QPR_8:qsub_2 |
| 22822 | 0, // DTriple_with_qsub_0_in_QPR_8:qsub_3 |
| 22823 | 8, // DTriple_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8 |
| 22824 | 8, // DTriple_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8 |
| 22825 | 8, // DTriple_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8 |
| 22826 | 8, // DTriple_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8 |
| 22827 | 3, // DTriple_with_qsub_0_in_QPR_8:ssub_4 -> SPR |
| 22828 | 3, // DTriple_with_qsub_0_in_QPR_8:ssub_5 -> SPR |
| 22829 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6 |
| 22830 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_7 |
| 22831 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8 |
| 22832 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_9 |
| 22833 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_10 |
| 22834 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_11 |
| 22835 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_12 |
| 22836 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_13 |
| 22837 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_14 |
| 22838 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_15 |
| 22839 | 66, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 22840 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22841 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22842 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22843 | 72, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 22844 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22845 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22846 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22847 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22848 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22849 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22850 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22851 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22852 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 22853 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22854 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22855 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22856 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22857 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22858 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22859 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_dsub_7 |
| 22860 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22861 | 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 22862 | 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22863 | }, |
| 22864 | { // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 22865 | 54, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 22866 | 54, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 22867 | 54, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 22868 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_3 |
| 22869 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_4 |
| 22870 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5 |
| 22871 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_6 |
| 22872 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_7 |
| 22873 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:gsub_0 |
| 22874 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:gsub_1 |
| 22875 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qqsub_0 |
| 22876 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qqsub_1 |
| 22877 | 76, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8 |
| 22878 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_1 |
| 22879 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_2 |
| 22880 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_3 |
| 22881 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 22882 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 22883 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 22884 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 22885 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 22886 | 8, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 22887 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6 |
| 22888 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_7 |
| 22889 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8 |
| 22890 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_9 |
| 22891 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_10 |
| 22892 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_11 |
| 22893 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_12 |
| 22894 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_13 |
| 22895 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_14 |
| 22896 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_15 |
| 22897 | 67, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22898 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22899 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22900 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22901 | 75, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 22902 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22903 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22904 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22905 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22906 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22907 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22908 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22909 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22910 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 22911 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22912 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22913 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22914 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22915 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22916 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22917 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 22918 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22919 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 22920 | 0, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22921 | }, |
| 22922 | { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 22923 | 54, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8 |
| 22924 | 54, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8 |
| 22925 | 54, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8 |
| 22926 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3 |
| 22927 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4 |
| 22928 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5 |
| 22929 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6 |
| 22930 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7 |
| 22931 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0 |
| 22932 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1 |
| 22933 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0 |
| 22934 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1 |
| 22935 | 75, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 22936 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1 |
| 22937 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2 |
| 22938 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3 |
| 22939 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8 |
| 22940 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8 |
| 22941 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8 |
| 22942 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8 |
| 22943 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8 |
| 22944 | 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8 |
| 22945 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6 |
| 22946 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7 |
| 22947 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8 |
| 22948 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9 |
| 22949 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10 |
| 22950 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11 |
| 22951 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12 |
| 22952 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13 |
| 22953 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14 |
| 22954 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15 |
| 22955 | 67, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 22956 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 22957 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 22958 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 22959 | 76, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 22960 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 22961 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22962 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 22963 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 22964 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22965 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 22966 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 22967 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 22968 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 22969 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 22970 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 22971 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 22972 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22973 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 22974 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 22975 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7 |
| 22976 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 22977 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 22978 | 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 22979 | }, |
| 22980 | { // DQuadSpc |
| 22981 | 52, // DQuadSpc:dsub_0 -> DPR |
| 22982 | 0, // DQuadSpc:dsub_1 |
| 22983 | 52, // DQuadSpc:dsub_2 -> DPR |
| 22984 | 0, // DQuadSpc:dsub_3 |
| 22985 | 52, // DQuadSpc:dsub_4 -> DPR |
| 22986 | 0, // DQuadSpc:dsub_5 |
| 22987 | 0, // DQuadSpc:dsub_6 |
| 22988 | 0, // DQuadSpc:dsub_7 |
| 22989 | 0, // DQuadSpc:gsub_0 |
| 22990 | 0, // DQuadSpc:gsub_1 |
| 22991 | 0, // DQuadSpc:qqsub_0 |
| 22992 | 0, // DQuadSpc:qqsub_1 |
| 22993 | 0, // DQuadSpc:qsub_0 |
| 22994 | 0, // DQuadSpc:qsub_1 |
| 22995 | 0, // DQuadSpc:qsub_2 |
| 22996 | 0, // DQuadSpc:qsub_3 |
| 22997 | 3, // DQuadSpc:ssub_0 -> SPR |
| 22998 | 3, // DQuadSpc:ssub_1 -> SPR |
| 22999 | 0, // DQuadSpc:ssub_2 |
| 23000 | 0, // DQuadSpc:ssub_3 |
| 23001 | 3, // DQuadSpc:ssub_4 -> SPR |
| 23002 | 3, // DQuadSpc:ssub_5 -> SPR |
| 23003 | 0, // DQuadSpc:ssub_6 |
| 23004 | 0, // DQuadSpc:ssub_7 |
| 23005 | 3, // DQuadSpc:ssub_8 -> SPR |
| 23006 | 3, // DQuadSpc:ssub_9 -> SPR |
| 23007 | 0, // DQuadSpc:ssub_10 |
| 23008 | 0, // DQuadSpc:ssub_11 |
| 23009 | 0, // DQuadSpc:ssub_12 |
| 23010 | 0, // DQuadSpc:ssub_13 |
| 23011 | 0, // DQuadSpc:ssub_14 |
| 23012 | 0, // DQuadSpc:ssub_15 |
| 23013 | 63, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 23014 | 0, // DQuadSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23015 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23016 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23017 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23018 | 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23019 | 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23020 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23021 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23022 | 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23023 | 63, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 23024 | 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23025 | 0, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23026 | 0, // DQuadSpc:ssub_6_ssub_7_dsub_5 |
| 23027 | 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23028 | 0, // DQuadSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23029 | 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23030 | 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23031 | 0, // DQuadSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23032 | 0, // DQuadSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23033 | 0, // DQuadSpc:dsub_5_dsub_7 |
| 23034 | 0, // DQuadSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23035 | 0, // DQuadSpc:dsub_5_ssub_12_ssub_13 |
| 23036 | 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23037 | }, |
| 23038 | { // DQuadSpc_with_ssub_0 |
| 23039 | 4, // DQuadSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 23040 | 0, // DQuadSpc_with_ssub_0:dsub_1 |
| 23041 | 52, // DQuadSpc_with_ssub_0:dsub_2 -> DPR |
| 23042 | 0, // DQuadSpc_with_ssub_0:dsub_3 |
| 23043 | 52, // DQuadSpc_with_ssub_0:dsub_4 -> DPR |
| 23044 | 0, // DQuadSpc_with_ssub_0:dsub_5 |
| 23045 | 0, // DQuadSpc_with_ssub_0:dsub_6 |
| 23046 | 0, // DQuadSpc_with_ssub_0:dsub_7 |
| 23047 | 0, // DQuadSpc_with_ssub_0:gsub_0 |
| 23048 | 0, // DQuadSpc_with_ssub_0:gsub_1 |
| 23049 | 0, // DQuadSpc_with_ssub_0:qqsub_0 |
| 23050 | 0, // DQuadSpc_with_ssub_0:qqsub_1 |
| 23051 | 0, // DQuadSpc_with_ssub_0:qsub_0 |
| 23052 | 0, // DQuadSpc_with_ssub_0:qsub_1 |
| 23053 | 0, // DQuadSpc_with_ssub_0:qsub_2 |
| 23054 | 0, // DQuadSpc_with_ssub_0:qsub_3 |
| 23055 | 3, // DQuadSpc_with_ssub_0:ssub_0 -> SPR |
| 23056 | 3, // DQuadSpc_with_ssub_0:ssub_1 -> SPR |
| 23057 | 0, // DQuadSpc_with_ssub_0:ssub_2 |
| 23058 | 0, // DQuadSpc_with_ssub_0:ssub_3 |
| 23059 | 3, // DQuadSpc_with_ssub_0:ssub_4 -> SPR |
| 23060 | 3, // DQuadSpc_with_ssub_0:ssub_5 -> SPR |
| 23061 | 0, // DQuadSpc_with_ssub_0:ssub_6 |
| 23062 | 0, // DQuadSpc_with_ssub_0:ssub_7 |
| 23063 | 3, // DQuadSpc_with_ssub_0:ssub_8 -> SPR |
| 23064 | 3, // DQuadSpc_with_ssub_0:ssub_9 -> SPR |
| 23065 | 0, // DQuadSpc_with_ssub_0:ssub_10 |
| 23066 | 0, // DQuadSpc_with_ssub_0:ssub_11 |
| 23067 | 0, // DQuadSpc_with_ssub_0:ssub_12 |
| 23068 | 0, // DQuadSpc_with_ssub_0:ssub_13 |
| 23069 | 0, // DQuadSpc_with_ssub_0:ssub_14 |
| 23070 | 0, // DQuadSpc_with_ssub_0:ssub_15 |
| 23071 | 64, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 23072 | 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23073 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23074 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23075 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23076 | 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23077 | 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23078 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23079 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23080 | 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23081 | 63, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 23082 | 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23083 | 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23084 | 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 23085 | 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23086 | 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23087 | 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23088 | 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23089 | 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23090 | 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23091 | 0, // DQuadSpc_with_ssub_0:dsub_5_dsub_7 |
| 23092 | 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23093 | 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 23094 | 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23095 | }, |
| 23096 | { // DQuadSpc_with_ssub_4 |
| 23097 | 53, // DQuadSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 23098 | 0, // DQuadSpc_with_ssub_4:dsub_1 |
| 23099 | 53, // DQuadSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 23100 | 0, // DQuadSpc_with_ssub_4:dsub_3 |
| 23101 | 52, // DQuadSpc_with_ssub_4:dsub_4 -> DPR |
| 23102 | 0, // DQuadSpc_with_ssub_4:dsub_5 |
| 23103 | 0, // DQuadSpc_with_ssub_4:dsub_6 |
| 23104 | 0, // DQuadSpc_with_ssub_4:dsub_7 |
| 23105 | 0, // DQuadSpc_with_ssub_4:gsub_0 |
| 23106 | 0, // DQuadSpc_with_ssub_4:gsub_1 |
| 23107 | 0, // DQuadSpc_with_ssub_4:qqsub_0 |
| 23108 | 0, // DQuadSpc_with_ssub_4:qqsub_1 |
| 23109 | 0, // DQuadSpc_with_ssub_4:qsub_0 |
| 23110 | 0, // DQuadSpc_with_ssub_4:qsub_1 |
| 23111 | 0, // DQuadSpc_with_ssub_4:qsub_2 |
| 23112 | 0, // DQuadSpc_with_ssub_4:qsub_3 |
| 23113 | 3, // DQuadSpc_with_ssub_4:ssub_0 -> SPR |
| 23114 | 3, // DQuadSpc_with_ssub_4:ssub_1 -> SPR |
| 23115 | 0, // DQuadSpc_with_ssub_4:ssub_2 |
| 23116 | 0, // DQuadSpc_with_ssub_4:ssub_3 |
| 23117 | 3, // DQuadSpc_with_ssub_4:ssub_4 -> SPR |
| 23118 | 3, // DQuadSpc_with_ssub_4:ssub_5 -> SPR |
| 23119 | 0, // DQuadSpc_with_ssub_4:ssub_6 |
| 23120 | 0, // DQuadSpc_with_ssub_4:ssub_7 |
| 23121 | 3, // DQuadSpc_with_ssub_4:ssub_8 -> SPR |
| 23122 | 3, // DQuadSpc_with_ssub_4:ssub_9 -> SPR |
| 23123 | 0, // DQuadSpc_with_ssub_4:ssub_10 |
| 23124 | 0, // DQuadSpc_with_ssub_4:ssub_11 |
| 23125 | 0, // DQuadSpc_with_ssub_4:ssub_12 |
| 23126 | 0, // DQuadSpc_with_ssub_4:ssub_13 |
| 23127 | 0, // DQuadSpc_with_ssub_4:ssub_14 |
| 23128 | 0, // DQuadSpc_with_ssub_4:ssub_15 |
| 23129 | 65, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 23130 | 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23131 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23132 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23133 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23134 | 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23135 | 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23136 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23137 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23138 | 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23139 | 64, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 23140 | 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23141 | 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23142 | 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 23143 | 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23144 | 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23145 | 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23146 | 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23147 | 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23148 | 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23149 | 0, // DQuadSpc_with_ssub_4:dsub_5_dsub_7 |
| 23150 | 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23151 | 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 23152 | 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23153 | }, |
| 23154 | { // DQuadSpc_with_ssub_8 |
| 23155 | 53, // DQuadSpc_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 23156 | 0, // DQuadSpc_with_ssub_8:dsub_1 |
| 23157 | 53, // DQuadSpc_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 23158 | 0, // DQuadSpc_with_ssub_8:dsub_3 |
| 23159 | 53, // DQuadSpc_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 23160 | 0, // DQuadSpc_with_ssub_8:dsub_5 |
| 23161 | 0, // DQuadSpc_with_ssub_8:dsub_6 |
| 23162 | 0, // DQuadSpc_with_ssub_8:dsub_7 |
| 23163 | 0, // DQuadSpc_with_ssub_8:gsub_0 |
| 23164 | 0, // DQuadSpc_with_ssub_8:gsub_1 |
| 23165 | 0, // DQuadSpc_with_ssub_8:qqsub_0 |
| 23166 | 0, // DQuadSpc_with_ssub_8:qqsub_1 |
| 23167 | 0, // DQuadSpc_with_ssub_8:qsub_0 |
| 23168 | 0, // DQuadSpc_with_ssub_8:qsub_1 |
| 23169 | 0, // DQuadSpc_with_ssub_8:qsub_2 |
| 23170 | 0, // DQuadSpc_with_ssub_8:qsub_3 |
| 23171 | 3, // DQuadSpc_with_ssub_8:ssub_0 -> SPR |
| 23172 | 3, // DQuadSpc_with_ssub_8:ssub_1 -> SPR |
| 23173 | 0, // DQuadSpc_with_ssub_8:ssub_2 |
| 23174 | 0, // DQuadSpc_with_ssub_8:ssub_3 |
| 23175 | 3, // DQuadSpc_with_ssub_8:ssub_4 -> SPR |
| 23176 | 3, // DQuadSpc_with_ssub_8:ssub_5 -> SPR |
| 23177 | 0, // DQuadSpc_with_ssub_8:ssub_6 |
| 23178 | 0, // DQuadSpc_with_ssub_8:ssub_7 |
| 23179 | 3, // DQuadSpc_with_ssub_8:ssub_8 -> SPR |
| 23180 | 3, // DQuadSpc_with_ssub_8:ssub_9 -> SPR |
| 23181 | 0, // DQuadSpc_with_ssub_8:ssub_10 |
| 23182 | 0, // DQuadSpc_with_ssub_8:ssub_11 |
| 23183 | 0, // DQuadSpc_with_ssub_8:ssub_12 |
| 23184 | 0, // DQuadSpc_with_ssub_8:ssub_13 |
| 23185 | 0, // DQuadSpc_with_ssub_8:ssub_14 |
| 23186 | 0, // DQuadSpc_with_ssub_8:ssub_15 |
| 23187 | 65, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 23188 | 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23189 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23190 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23191 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23192 | 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23193 | 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23194 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23195 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23196 | 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23197 | 65, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 23198 | 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23199 | 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23200 | 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5 |
| 23201 | 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23202 | 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23203 | 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23204 | 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23205 | 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23206 | 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23207 | 0, // DQuadSpc_with_ssub_8:dsub_5_dsub_7 |
| 23208 | 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23209 | 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13 |
| 23210 | 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23211 | }, |
| 23212 | { // DQuadSpc_with_dsub_0_in_DPR_8 |
| 23213 | 20, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 23214 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 23215 | 53, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 23216 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 23217 | 53, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 23218 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 23219 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 23220 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 23221 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 23222 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 23223 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 23224 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 23225 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 23226 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 23227 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 23228 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 23229 | 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 23230 | 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 23231 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 23232 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 23233 | 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 23234 | 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 23235 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 23236 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 23237 | 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR |
| 23238 | 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR |
| 23239 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 23240 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 23241 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 23242 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 23243 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 23244 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 23245 | 66, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 23246 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23247 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23248 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23249 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23250 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23251 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23252 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23253 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23254 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23255 | 65, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 23256 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23257 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23258 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 23259 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23260 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23261 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23262 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23263 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23264 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23265 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 23266 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23267 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 23268 | 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23269 | }, |
| 23270 | { // DQuadSpc_with_dsub_2_in_DPR_8 |
| 23271 | 54, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 23272 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 23273 | 54, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 23274 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 23275 | 53, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 23276 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 23277 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 23278 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 23279 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 23280 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 23281 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 23282 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 23283 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 23284 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 23285 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 23286 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 23287 | 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 23288 | 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 23289 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 23290 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 23291 | 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 23292 | 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 23293 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 23294 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 23295 | 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 23296 | 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 23297 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 23298 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 23299 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 23300 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 23301 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 23302 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 23303 | 67, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 23304 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23305 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23306 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23307 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23308 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23309 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23310 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23311 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23312 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23313 | 66, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 23314 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23315 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23316 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 23317 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23318 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23319 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23320 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23321 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23322 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23323 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 23324 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23325 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 23326 | 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23327 | }, |
| 23328 | { // DQuadSpc_with_dsub_4_in_DPR_8 |
| 23329 | 54, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8 |
| 23330 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_1 |
| 23331 | 54, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8 |
| 23332 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_3 |
| 23333 | 54, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8 |
| 23334 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5 |
| 23335 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_6 |
| 23336 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_7 |
| 23337 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_0 |
| 23338 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_1 |
| 23339 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_0 |
| 23340 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_1 |
| 23341 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_0 |
| 23342 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_1 |
| 23343 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_2 |
| 23344 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_3 |
| 23345 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8 |
| 23346 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8 |
| 23347 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2 |
| 23348 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_3 |
| 23349 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8 |
| 23350 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8 |
| 23351 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6 |
| 23352 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_7 |
| 23353 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8 |
| 23354 | 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8 |
| 23355 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_10 |
| 23356 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_11 |
| 23357 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_12 |
| 23358 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_13 |
| 23359 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_14 |
| 23360 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_15 |
| 23361 | 67, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 23362 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 23363 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 23364 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 23365 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 23366 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23367 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23368 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23369 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23370 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23371 | 67, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 23372 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23373 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23374 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 23375 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23376 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23377 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23378 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23379 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23380 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23381 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7 |
| 23382 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23383 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 23384 | 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23385 | }, |
| 23386 | { // DQuad |
| 23387 | 52, // DQuad:dsub_0 -> DPR |
| 23388 | 52, // DQuad:dsub_1 -> DPR |
| 23389 | 52, // DQuad:dsub_2 -> DPR |
| 23390 | 52, // DQuad:dsub_3 -> DPR |
| 23391 | 0, // DQuad:dsub_4 |
| 23392 | 0, // DQuad:dsub_5 |
| 23393 | 0, // DQuad:dsub_6 |
| 23394 | 0, // DQuad:dsub_7 |
| 23395 | 0, // DQuad:gsub_0 |
| 23396 | 0, // DQuad:gsub_1 |
| 23397 | 0, // DQuad:qqsub_0 |
| 23398 | 0, // DQuad:qqsub_1 |
| 23399 | 68, // DQuad:qsub_0 -> DPair |
| 23400 | 68, // DQuad:qsub_1 -> DPair |
| 23401 | 0, // DQuad:qsub_2 |
| 23402 | 0, // DQuad:qsub_3 |
| 23403 | 3, // DQuad:ssub_0 -> SPR |
| 23404 | 3, // DQuad:ssub_1 -> SPR |
| 23405 | 3, // DQuad:ssub_2 -> SPR |
| 23406 | 3, // DQuad:ssub_3 -> SPR |
| 23407 | 3, // DQuad:ssub_4 -> SPR |
| 23408 | 3, // DQuad:ssub_5 -> SPR |
| 23409 | 3, // DQuad:ssub_6 -> SPR |
| 23410 | 3, // DQuad:ssub_7 -> SPR |
| 23411 | 0, // DQuad:ssub_8 |
| 23412 | 0, // DQuad:ssub_9 |
| 23413 | 0, // DQuad:ssub_10 |
| 23414 | 0, // DQuad:ssub_11 |
| 23415 | 0, // DQuad:ssub_12 |
| 23416 | 0, // DQuad:ssub_13 |
| 23417 | 0, // DQuad:ssub_14 |
| 23418 | 0, // DQuad:ssub_15 |
| 23419 | 63, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 23420 | 77, // DQuad:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple |
| 23421 | 63, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 23422 | 77, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple |
| 23423 | 68, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 23424 | 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23425 | 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23426 | 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23427 | 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23428 | 0, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23429 | 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23430 | 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23431 | 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23432 | 0, // DQuad:ssub_6_ssub_7_dsub_5 |
| 23433 | 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23434 | 0, // DQuad:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23435 | 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23436 | 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23437 | 0, // DQuad:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23438 | 0, // DQuad:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23439 | 0, // DQuad:dsub_5_dsub_7 |
| 23440 | 0, // DQuad:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23441 | 0, // DQuad:dsub_5_ssub_12_ssub_13 |
| 23442 | 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23443 | }, |
| 23444 | { // DQuad_with_ssub_0 |
| 23445 | 4, // DQuad_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 23446 | 52, // DQuad_with_ssub_0:dsub_1 -> DPR |
| 23447 | 52, // DQuad_with_ssub_0:dsub_2 -> DPR |
| 23448 | 52, // DQuad_with_ssub_0:dsub_3 -> DPR |
| 23449 | 0, // DQuad_with_ssub_0:dsub_4 |
| 23450 | 0, // DQuad_with_ssub_0:dsub_5 |
| 23451 | 0, // DQuad_with_ssub_0:dsub_6 |
| 23452 | 0, // DQuad_with_ssub_0:dsub_7 |
| 23453 | 0, // DQuad_with_ssub_0:gsub_0 |
| 23454 | 0, // DQuad_with_ssub_0:gsub_1 |
| 23455 | 0, // DQuad_with_ssub_0:qqsub_0 |
| 23456 | 0, // DQuad_with_ssub_0:qqsub_1 |
| 23457 | 69, // DQuad_with_ssub_0:qsub_0 -> DPair_with_ssub_0 |
| 23458 | 68, // DQuad_with_ssub_0:qsub_1 -> DPair |
| 23459 | 0, // DQuad_with_ssub_0:qsub_2 |
| 23460 | 0, // DQuad_with_ssub_0:qsub_3 |
| 23461 | 3, // DQuad_with_ssub_0:ssub_0 -> SPR |
| 23462 | 3, // DQuad_with_ssub_0:ssub_1 -> SPR |
| 23463 | 3, // DQuad_with_ssub_0:ssub_2 -> SPR |
| 23464 | 3, // DQuad_with_ssub_0:ssub_3 -> SPR |
| 23465 | 3, // DQuad_with_ssub_0:ssub_4 -> SPR |
| 23466 | 3, // DQuad_with_ssub_0:ssub_5 -> SPR |
| 23467 | 3, // DQuad_with_ssub_0:ssub_6 -> SPR |
| 23468 | 3, // DQuad_with_ssub_0:ssub_7 -> SPR |
| 23469 | 0, // DQuad_with_ssub_0:ssub_8 |
| 23470 | 0, // DQuad_with_ssub_0:ssub_9 |
| 23471 | 0, // DQuad_with_ssub_0:ssub_10 |
| 23472 | 0, // DQuad_with_ssub_0:ssub_11 |
| 23473 | 0, // DQuad_with_ssub_0:ssub_12 |
| 23474 | 0, // DQuad_with_ssub_0:ssub_13 |
| 23475 | 0, // DQuad_with_ssub_0:ssub_14 |
| 23476 | 0, // DQuad_with_ssub_0:ssub_15 |
| 23477 | 64, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 23478 | 80, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 23479 | 63, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 23480 | 77, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple |
| 23481 | 68, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 23482 | 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23483 | 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23484 | 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23485 | 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23486 | 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23487 | 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23488 | 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23489 | 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23490 | 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 23491 | 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23492 | 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23493 | 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23494 | 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23495 | 0, // DQuad_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23496 | 0, // DQuad_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23497 | 0, // DQuad_with_ssub_0:dsub_5_dsub_7 |
| 23498 | 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23499 | 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 23500 | 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23501 | }, |
| 23502 | { // DQuad_with_ssub_2 |
| 23503 | 53, // DQuad_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 23504 | 53, // DQuad_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 23505 | 52, // DQuad_with_ssub_2:dsub_2 -> DPR |
| 23506 | 52, // DQuad_with_ssub_2:dsub_3 -> DPR |
| 23507 | 0, // DQuad_with_ssub_2:dsub_4 |
| 23508 | 0, // DQuad_with_ssub_2:dsub_5 |
| 23509 | 0, // DQuad_with_ssub_2:dsub_6 |
| 23510 | 0, // DQuad_with_ssub_2:dsub_7 |
| 23511 | 0, // DQuad_with_ssub_2:gsub_0 |
| 23512 | 0, // DQuad_with_ssub_2:gsub_1 |
| 23513 | 0, // DQuad_with_ssub_2:qqsub_0 |
| 23514 | 0, // DQuad_with_ssub_2:qqsub_1 |
| 23515 | 71, // DQuad_with_ssub_2:qsub_0 -> DPair_with_ssub_2 |
| 23516 | 68, // DQuad_with_ssub_2:qsub_1 -> DPair |
| 23517 | 0, // DQuad_with_ssub_2:qsub_2 |
| 23518 | 0, // DQuad_with_ssub_2:qsub_3 |
| 23519 | 3, // DQuad_with_ssub_2:ssub_0 -> SPR |
| 23520 | 3, // DQuad_with_ssub_2:ssub_1 -> SPR |
| 23521 | 3, // DQuad_with_ssub_2:ssub_2 -> SPR |
| 23522 | 3, // DQuad_with_ssub_2:ssub_3 -> SPR |
| 23523 | 3, // DQuad_with_ssub_2:ssub_4 -> SPR |
| 23524 | 3, // DQuad_with_ssub_2:ssub_5 -> SPR |
| 23525 | 3, // DQuad_with_ssub_2:ssub_6 -> SPR |
| 23526 | 3, // DQuad_with_ssub_2:ssub_7 -> SPR |
| 23527 | 0, // DQuad_with_ssub_2:ssub_8 |
| 23528 | 0, // DQuad_with_ssub_2:ssub_9 |
| 23529 | 0, // DQuad_with_ssub_2:ssub_10 |
| 23530 | 0, // DQuad_with_ssub_2:ssub_11 |
| 23531 | 0, // DQuad_with_ssub_2:ssub_12 |
| 23532 | 0, // DQuad_with_ssub_2:ssub_13 |
| 23533 | 0, // DQuad_with_ssub_2:ssub_14 |
| 23534 | 0, // DQuad_with_ssub_2:ssub_15 |
| 23535 | 64, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 23536 | 82, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 23537 | 64, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 23538 | 80, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0 |
| 23539 | 69, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 23540 | 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23541 | 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23542 | 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23543 | 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23544 | 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23545 | 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23546 | 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23547 | 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23548 | 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 23549 | 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23550 | 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23551 | 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23552 | 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23553 | 0, // DQuad_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23554 | 0, // DQuad_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23555 | 0, // DQuad_with_ssub_2:dsub_5_dsub_7 |
| 23556 | 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23557 | 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 23558 | 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23559 | }, |
| 23560 | { // QQPR |
| 23561 | 52, // QQPR:dsub_0 -> DPR |
| 23562 | 52, // QQPR:dsub_1 -> DPR |
| 23563 | 52, // QQPR:dsub_2 -> DPR |
| 23564 | 52, // QQPR:dsub_3 -> DPR |
| 23565 | 0, // QQPR:dsub_4 |
| 23566 | 0, // QQPR:dsub_5 |
| 23567 | 0, // QQPR:dsub_6 |
| 23568 | 0, // QQPR:dsub_7 |
| 23569 | 0, // QQPR:gsub_0 |
| 23570 | 0, // QQPR:gsub_1 |
| 23571 | 0, // QQPR:qqsub_0 |
| 23572 | 0, // QQPR:qqsub_1 |
| 23573 | 70, // QQPR:qsub_0 -> QPR |
| 23574 | 70, // QQPR:qsub_1 -> QPR |
| 23575 | 0, // QQPR:qsub_2 |
| 23576 | 0, // QQPR:qsub_3 |
| 23577 | 3, // QQPR:ssub_0 -> SPR |
| 23578 | 3, // QQPR:ssub_1 -> SPR |
| 23579 | 3, // QQPR:ssub_2 -> SPR |
| 23580 | 3, // QQPR:ssub_3 -> SPR |
| 23581 | 3, // QQPR:ssub_4 -> SPR |
| 23582 | 3, // QQPR:ssub_5 -> SPR |
| 23583 | 3, // QQPR:ssub_6 -> SPR |
| 23584 | 3, // QQPR:ssub_7 -> SPR |
| 23585 | 0, // QQPR:ssub_8 |
| 23586 | 0, // QQPR:ssub_9 |
| 23587 | 0, // QQPR:ssub_10 |
| 23588 | 0, // QQPR:ssub_11 |
| 23589 | 0, // QQPR:ssub_12 |
| 23590 | 0, // QQPR:ssub_13 |
| 23591 | 0, // QQPR:ssub_14 |
| 23592 | 0, // QQPR:ssub_15 |
| 23593 | 63, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 23594 | 81, // QQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 23595 | 63, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 23596 | 83, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23597 | 68, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 23598 | 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23599 | 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23600 | 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23601 | 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23602 | 0, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23603 | 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23604 | 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23605 | 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23606 | 0, // QQPR:ssub_6_ssub_7_dsub_5 |
| 23607 | 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23608 | 0, // QQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23609 | 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23610 | 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23611 | 0, // QQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23612 | 0, // QQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23613 | 0, // QQPR:dsub_5_dsub_7 |
| 23614 | 0, // QQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23615 | 0, // QQPR:dsub_5_ssub_12_ssub_13 |
| 23616 | 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23617 | }, |
| 23618 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23619 | 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR |
| 23620 | 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 23621 | 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 23622 | 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR |
| 23623 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 23624 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 23625 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 23626 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 23627 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 23628 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 23629 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 23630 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 23631 | 68, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair |
| 23632 | 68, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair |
| 23633 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 23634 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 23635 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 23636 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 23637 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 23638 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 23639 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 23640 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 23641 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR |
| 23642 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR |
| 23643 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 23644 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 23645 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 23646 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 23647 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 23648 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 23649 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 23650 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 23651 | 63, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 23652 | 83, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23653 | 63, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 23654 | 81, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR |
| 23655 | 70, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 23656 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23657 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23658 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23659 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23660 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23661 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23662 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23663 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23664 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 23665 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23666 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23667 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23668 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23669 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23670 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23671 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 23672 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23673 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 23674 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23675 | }, |
| 23676 | { // DQuad_with_ssub_4 |
| 23677 | 53, // DQuad_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 23678 | 53, // DQuad_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 23679 | 53, // DQuad_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 23680 | 52, // DQuad_with_ssub_4:dsub_3 -> DPR |
| 23681 | 0, // DQuad_with_ssub_4:dsub_4 |
| 23682 | 0, // DQuad_with_ssub_4:dsub_5 |
| 23683 | 0, // DQuad_with_ssub_4:dsub_6 |
| 23684 | 0, // DQuad_with_ssub_4:dsub_7 |
| 23685 | 0, // DQuad_with_ssub_4:gsub_0 |
| 23686 | 0, // DQuad_with_ssub_4:gsub_1 |
| 23687 | 0, // DQuad_with_ssub_4:qqsub_0 |
| 23688 | 0, // DQuad_with_ssub_4:qqsub_1 |
| 23689 | 71, // DQuad_with_ssub_4:qsub_0 -> DPair_with_ssub_2 |
| 23690 | 69, // DQuad_with_ssub_4:qsub_1 -> DPair_with_ssub_0 |
| 23691 | 0, // DQuad_with_ssub_4:qsub_2 |
| 23692 | 0, // DQuad_with_ssub_4:qsub_3 |
| 23693 | 3, // DQuad_with_ssub_4:ssub_0 -> SPR |
| 23694 | 3, // DQuad_with_ssub_4:ssub_1 -> SPR |
| 23695 | 3, // DQuad_with_ssub_4:ssub_2 -> SPR |
| 23696 | 3, // DQuad_with_ssub_4:ssub_3 -> SPR |
| 23697 | 3, // DQuad_with_ssub_4:ssub_4 -> SPR |
| 23698 | 3, // DQuad_with_ssub_4:ssub_5 -> SPR |
| 23699 | 3, // DQuad_with_ssub_4:ssub_6 -> SPR |
| 23700 | 3, // DQuad_with_ssub_4:ssub_7 -> SPR |
| 23701 | 0, // DQuad_with_ssub_4:ssub_8 |
| 23702 | 0, // DQuad_with_ssub_4:ssub_9 |
| 23703 | 0, // DQuad_with_ssub_4:ssub_10 |
| 23704 | 0, // DQuad_with_ssub_4:ssub_11 |
| 23705 | 0, // DQuad_with_ssub_4:ssub_12 |
| 23706 | 0, // DQuad_with_ssub_4:ssub_13 |
| 23707 | 0, // DQuad_with_ssub_4:ssub_14 |
| 23708 | 0, // DQuad_with_ssub_4:ssub_15 |
| 23709 | 65, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 23710 | 85, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 23711 | 64, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 23712 | 82, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2 |
| 23713 | 71, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 23714 | 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23715 | 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23716 | 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23717 | 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23718 | 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23719 | 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23720 | 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23721 | 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23722 | 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 23723 | 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23724 | 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23725 | 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23726 | 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23727 | 0, // DQuad_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23728 | 0, // DQuad_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23729 | 0, // DQuad_with_ssub_4:dsub_5_dsub_7 |
| 23730 | 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23731 | 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 23732 | 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23733 | }, |
| 23734 | { // DQuad_with_ssub_6 |
| 23735 | 53, // DQuad_with_ssub_6:dsub_0 -> DPR_VFP2 |
| 23736 | 53, // DQuad_with_ssub_6:dsub_1 -> DPR_VFP2 |
| 23737 | 53, // DQuad_with_ssub_6:dsub_2 -> DPR_VFP2 |
| 23738 | 53, // DQuad_with_ssub_6:dsub_3 -> DPR_VFP2 |
| 23739 | 0, // DQuad_with_ssub_6:dsub_4 |
| 23740 | 0, // DQuad_with_ssub_6:dsub_5 |
| 23741 | 0, // DQuad_with_ssub_6:dsub_6 |
| 23742 | 0, // DQuad_with_ssub_6:dsub_7 |
| 23743 | 0, // DQuad_with_ssub_6:gsub_0 |
| 23744 | 0, // DQuad_with_ssub_6:gsub_1 |
| 23745 | 0, // DQuad_with_ssub_6:qqsub_0 |
| 23746 | 0, // DQuad_with_ssub_6:qqsub_1 |
| 23747 | 71, // DQuad_with_ssub_6:qsub_0 -> DPair_with_ssub_2 |
| 23748 | 71, // DQuad_with_ssub_6:qsub_1 -> DPair_with_ssub_2 |
| 23749 | 0, // DQuad_with_ssub_6:qsub_2 |
| 23750 | 0, // DQuad_with_ssub_6:qsub_3 |
| 23751 | 3, // DQuad_with_ssub_6:ssub_0 -> SPR |
| 23752 | 3, // DQuad_with_ssub_6:ssub_1 -> SPR |
| 23753 | 3, // DQuad_with_ssub_6:ssub_2 -> SPR |
| 23754 | 3, // DQuad_with_ssub_6:ssub_3 -> SPR |
| 23755 | 3, // DQuad_with_ssub_6:ssub_4 -> SPR |
| 23756 | 3, // DQuad_with_ssub_6:ssub_5 -> SPR |
| 23757 | 3, // DQuad_with_ssub_6:ssub_6 -> SPR |
| 23758 | 3, // DQuad_with_ssub_6:ssub_7 -> SPR |
| 23759 | 0, // DQuad_with_ssub_6:ssub_8 |
| 23760 | 0, // DQuad_with_ssub_6:ssub_9 |
| 23761 | 0, // DQuad_with_ssub_6:ssub_10 |
| 23762 | 0, // DQuad_with_ssub_6:ssub_11 |
| 23763 | 0, // DQuad_with_ssub_6:ssub_12 |
| 23764 | 0, // DQuad_with_ssub_6:ssub_13 |
| 23765 | 0, // DQuad_with_ssub_6:ssub_14 |
| 23766 | 0, // DQuad_with_ssub_6:ssub_15 |
| 23767 | 65, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 23768 | 85, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 23769 | 65, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 23770 | 85, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4 |
| 23771 | 71, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 23772 | 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23773 | 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23774 | 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23775 | 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23776 | 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23777 | 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23778 | 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23779 | 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23780 | 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5 |
| 23781 | 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23782 | 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23783 | 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23784 | 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23785 | 0, // DQuad_with_ssub_6:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23786 | 0, // DQuad_with_ssub_6:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23787 | 0, // DQuad_with_ssub_6:dsub_5_dsub_7 |
| 23788 | 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23789 | 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13 |
| 23790 | 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23791 | }, |
| 23792 | { // DQuad_with_dsub_0_in_DPR_8 |
| 23793 | 20, // DQuad_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 23794 | 53, // DQuad_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 23795 | 53, // DQuad_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 23796 | 53, // DQuad_with_dsub_0_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 23797 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_4 |
| 23798 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5 |
| 23799 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_6 |
| 23800 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_7 |
| 23801 | 0, // DQuad_with_dsub_0_in_DPR_8:gsub_0 |
| 23802 | 0, // DQuad_with_dsub_0_in_DPR_8:gsub_1 |
| 23803 | 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_0 |
| 23804 | 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_1 |
| 23805 | 72, // DQuad_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 23806 | 71, // DQuad_with_dsub_0_in_DPR_8:qsub_1 -> DPair_with_ssub_2 |
| 23807 | 0, // DQuad_with_dsub_0_in_DPR_8:qsub_2 |
| 23808 | 0, // DQuad_with_dsub_0_in_DPR_8:qsub_3 |
| 23809 | 8, // DQuad_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 23810 | 8, // DQuad_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 23811 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 23812 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 23813 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 23814 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 23815 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_6 -> SPR |
| 23816 | 3, // DQuad_with_dsub_0_in_DPR_8:ssub_7 -> SPR |
| 23817 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8 |
| 23818 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_9 |
| 23819 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_10 |
| 23820 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_11 |
| 23821 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_12 |
| 23822 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_13 |
| 23823 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_14 |
| 23824 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_15 |
| 23825 | 66, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 23826 | 88, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 23827 | 65, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 23828 | 85, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4 |
| 23829 | 71, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 23830 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23831 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23832 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23833 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23834 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23835 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23836 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23837 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23838 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 23839 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23840 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23841 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23842 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23843 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23844 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23845 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 23846 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23847 | 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 23848 | 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23849 | }, |
| 23850 | { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23851 | 53, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2 |
| 23852 | 52, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 23853 | 52, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 23854 | 52, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR |
| 23855 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 23856 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 23857 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 23858 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 23859 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 23860 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 23861 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 23862 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 23863 | 69, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0 |
| 23864 | 68, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair |
| 23865 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 23866 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 23867 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 23868 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 23869 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 23870 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 23871 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 23872 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 23873 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR |
| 23874 | 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR |
| 23875 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 23876 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 23877 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 23878 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 23879 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 23880 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 23881 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 23882 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 23883 | 64, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 23884 | 90, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23885 | 63, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 23886 | 81, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR |
| 23887 | 70, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 23888 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23889 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23890 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23891 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23892 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23893 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23894 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23895 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23896 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 23897 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23898 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23899 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23900 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23901 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23902 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23903 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 23904 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23905 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 23906 | 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23907 | }, |
| 23908 | { // QQPR_with_ssub_0 |
| 23909 | 53, // QQPR_with_ssub_0:dsub_0 -> DPR_VFP2 |
| 23910 | 53, // QQPR_with_ssub_0:dsub_1 -> DPR_VFP2 |
| 23911 | 52, // QQPR_with_ssub_0:dsub_2 -> DPR |
| 23912 | 52, // QQPR_with_ssub_0:dsub_3 -> DPR |
| 23913 | 0, // QQPR_with_ssub_0:dsub_4 |
| 23914 | 0, // QQPR_with_ssub_0:dsub_5 |
| 23915 | 0, // QQPR_with_ssub_0:dsub_6 |
| 23916 | 0, // QQPR_with_ssub_0:dsub_7 |
| 23917 | 0, // QQPR_with_ssub_0:gsub_0 |
| 23918 | 0, // QQPR_with_ssub_0:gsub_1 |
| 23919 | 0, // QQPR_with_ssub_0:qqsub_0 |
| 23920 | 0, // QQPR_with_ssub_0:qqsub_1 |
| 23921 | 73, // QQPR_with_ssub_0:qsub_0 -> MQPR |
| 23922 | 70, // QQPR_with_ssub_0:qsub_1 -> QPR |
| 23923 | 0, // QQPR_with_ssub_0:qsub_2 |
| 23924 | 0, // QQPR_with_ssub_0:qsub_3 |
| 23925 | 3, // QQPR_with_ssub_0:ssub_0 -> SPR |
| 23926 | 3, // QQPR_with_ssub_0:ssub_1 -> SPR |
| 23927 | 3, // QQPR_with_ssub_0:ssub_2 -> SPR |
| 23928 | 3, // QQPR_with_ssub_0:ssub_3 -> SPR |
| 23929 | 3, // QQPR_with_ssub_0:ssub_4 -> SPR |
| 23930 | 3, // QQPR_with_ssub_0:ssub_5 -> SPR |
| 23931 | 3, // QQPR_with_ssub_0:ssub_6 -> SPR |
| 23932 | 3, // QQPR_with_ssub_0:ssub_7 -> SPR |
| 23933 | 0, // QQPR_with_ssub_0:ssub_8 |
| 23934 | 0, // QQPR_with_ssub_0:ssub_9 |
| 23935 | 0, // QQPR_with_ssub_0:ssub_10 |
| 23936 | 0, // QQPR_with_ssub_0:ssub_11 |
| 23937 | 0, // QQPR_with_ssub_0:ssub_12 |
| 23938 | 0, // QQPR_with_ssub_0:ssub_13 |
| 23939 | 0, // QQPR_with_ssub_0:ssub_14 |
| 23940 | 0, // QQPR_with_ssub_0:ssub_15 |
| 23941 | 64, // QQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 23942 | 89, // QQPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 23943 | 64, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 23944 | 90, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 23945 | 69, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 23946 | 0, // QQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 23947 | 0, // QQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23948 | 0, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 23949 | 0, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 23950 | 0, // QQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23951 | 0, // QQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 23952 | 0, // QQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 23953 | 0, // QQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 23954 | 0, // QQPR_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 23955 | 0, // QQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 23956 | 0, // QQPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 23957 | 0, // QQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 23958 | 0, // QQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23959 | 0, // QQPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 23960 | 0, // QQPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 23961 | 0, // QQPR_with_ssub_0:dsub_5_dsub_7 |
| 23962 | 0, // QQPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 23963 | 0, // QQPR_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 23964 | 0, // QQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 23965 | }, |
| 23966 | { // DQuad_with_dsub_1_in_DPR_8 |
| 23967 | 54, // DQuad_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 23968 | 54, // DQuad_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 23969 | 53, // DQuad_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 23970 | 53, // DQuad_with_dsub_1_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 23971 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_4 |
| 23972 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5 |
| 23973 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_6 |
| 23974 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_7 |
| 23975 | 0, // DQuad_with_dsub_1_in_DPR_8:gsub_0 |
| 23976 | 0, // DQuad_with_dsub_1_in_DPR_8:gsub_1 |
| 23977 | 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_0 |
| 23978 | 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_1 |
| 23979 | 75, // DQuad_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 23980 | 71, // DQuad_with_dsub_1_in_DPR_8:qsub_1 -> DPair_with_ssub_2 |
| 23981 | 0, // DQuad_with_dsub_1_in_DPR_8:qsub_2 |
| 23982 | 0, // DQuad_with_dsub_1_in_DPR_8:qsub_3 |
| 23983 | 8, // DQuad_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 23984 | 8, // DQuad_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 23985 | 8, // DQuad_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 23986 | 8, // DQuad_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 23987 | 3, // DQuad_with_dsub_1_in_DPR_8:ssub_4 -> SPR |
| 23988 | 3, // DQuad_with_dsub_1_in_DPR_8:ssub_5 -> SPR |
| 23989 | 3, // DQuad_with_dsub_1_in_DPR_8:ssub_6 -> SPR |
| 23990 | 3, // DQuad_with_dsub_1_in_DPR_8:ssub_7 -> SPR |
| 23991 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8 |
| 23992 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_9 |
| 23993 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_10 |
| 23994 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_11 |
| 23995 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_12 |
| 23996 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_13 |
| 23997 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_14 |
| 23998 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_15 |
| 23999 | 66, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24000 | 91, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 24001 | 66, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24002 | 88, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8 |
| 24003 | 72, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 24004 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24005 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24006 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24007 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24008 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24009 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24010 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24011 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24012 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24013 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24014 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24015 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24016 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24017 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24018 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24019 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 24020 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24021 | 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 24022 | 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24023 | }, |
| 24024 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24025 | 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 24026 | 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 24027 | 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 24028 | 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR |
| 24029 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 24030 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 24031 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 24032 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 24033 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 24034 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 24035 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 24036 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 24037 | 71, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 24038 | 69, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_0 |
| 24039 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 24040 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 24041 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 24042 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 24043 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 24044 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 24045 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 24046 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 24047 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 24048 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 24049 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 24050 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 24051 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 24052 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 24053 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 24054 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 24055 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 24056 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 24057 | 65, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24058 | 92, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24059 | 64, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 24060 | 89, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_MQPR |
| 24061 | 74, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 24062 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24063 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24064 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24065 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24066 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24067 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24068 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24069 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24070 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 24071 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24072 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24073 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24074 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24075 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24076 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24077 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 24078 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24079 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 24080 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24081 | }, |
| 24082 | { // MQQPR |
| 24083 | 53, // MQQPR:dsub_0 -> DPR_VFP2 |
| 24084 | 53, // MQQPR:dsub_1 -> DPR_VFP2 |
| 24085 | 53, // MQQPR:dsub_2 -> DPR_VFP2 |
| 24086 | 53, // MQQPR:dsub_3 -> DPR_VFP2 |
| 24087 | 0, // MQQPR:dsub_4 |
| 24088 | 0, // MQQPR:dsub_5 |
| 24089 | 0, // MQQPR:dsub_6 |
| 24090 | 0, // MQQPR:dsub_7 |
| 24091 | 0, // MQQPR:gsub_0 |
| 24092 | 0, // MQQPR:gsub_1 |
| 24093 | 0, // MQQPR:qqsub_0 |
| 24094 | 0, // MQQPR:qqsub_1 |
| 24095 | 74, // MQQPR:qsub_0 -> QPR_VFP2 |
| 24096 | 74, // MQQPR:qsub_1 -> QPR_VFP2 |
| 24097 | 0, // MQQPR:qsub_2 |
| 24098 | 0, // MQQPR:qsub_3 |
| 24099 | 3, // MQQPR:ssub_0 -> SPR |
| 24100 | 3, // MQQPR:ssub_1 -> SPR |
| 24101 | 3, // MQQPR:ssub_2 -> SPR |
| 24102 | 3, // MQQPR:ssub_3 -> SPR |
| 24103 | 3, // MQQPR:ssub_4 -> SPR |
| 24104 | 3, // MQQPR:ssub_5 -> SPR |
| 24105 | 3, // MQQPR:ssub_6 -> SPR |
| 24106 | 3, // MQQPR:ssub_7 -> SPR |
| 24107 | 0, // MQQPR:ssub_8 |
| 24108 | 0, // MQQPR:ssub_9 |
| 24109 | 0, // MQQPR:ssub_10 |
| 24110 | 0, // MQQPR:ssub_11 |
| 24111 | 0, // MQQPR:ssub_12 |
| 24112 | 0, // MQQPR:ssub_13 |
| 24113 | 0, // MQQPR:ssub_14 |
| 24114 | 0, // MQQPR:ssub_15 |
| 24115 | 65, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24116 | 93, // MQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24117 | 65, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24118 | 92, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24119 | 71, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 24120 | 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24121 | 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24122 | 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24123 | 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24124 | 0, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24125 | 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24126 | 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24127 | 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24128 | 0, // MQQPR:ssub_6_ssub_7_dsub_5 |
| 24129 | 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24130 | 0, // MQQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24131 | 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24132 | 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24133 | 0, // MQQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24134 | 0, // MQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24135 | 0, // MQQPR:dsub_5_dsub_7 |
| 24136 | 0, // MQQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24137 | 0, // MQQPR:dsub_5_ssub_12_ssub_13 |
| 24138 | 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24139 | }, |
| 24140 | { // DQuad_with_dsub_2_in_DPR_8 |
| 24141 | 54, // DQuad_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 24142 | 54, // DQuad_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 24143 | 54, // DQuad_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 24144 | 53, // DQuad_with_dsub_2_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 24145 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_4 |
| 24146 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5 |
| 24147 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_6 |
| 24148 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_7 |
| 24149 | 0, // DQuad_with_dsub_2_in_DPR_8:gsub_0 |
| 24150 | 0, // DQuad_with_dsub_2_in_DPR_8:gsub_1 |
| 24151 | 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_0 |
| 24152 | 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_1 |
| 24153 | 75, // DQuad_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 24154 | 72, // DQuad_with_dsub_2_in_DPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 24155 | 0, // DQuad_with_dsub_2_in_DPR_8:qsub_2 |
| 24156 | 0, // DQuad_with_dsub_2_in_DPR_8:qsub_3 |
| 24157 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 24158 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 24159 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 24160 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 24161 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 24162 | 8, // DQuad_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 24163 | 3, // DQuad_with_dsub_2_in_DPR_8:ssub_6 -> SPR |
| 24164 | 3, // DQuad_with_dsub_2_in_DPR_8:ssub_7 -> SPR |
| 24165 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8 |
| 24166 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_9 |
| 24167 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_10 |
| 24168 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_11 |
| 24169 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_12 |
| 24170 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_13 |
| 24171 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_14 |
| 24172 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_15 |
| 24173 | 67, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24174 | 95, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 24175 | 66, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24176 | 91, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_1_in_DPR_8 |
| 24177 | 75, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 24178 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24179 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24180 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24181 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24182 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24183 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24184 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24185 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24186 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24187 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24188 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24189 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24190 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24191 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24192 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24193 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 24194 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24195 | 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 24196 | 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24197 | }, |
| 24198 | { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24199 | 53, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 24200 | 53, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 24201 | 53, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 24202 | 53, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2 |
| 24203 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 24204 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 24205 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 24206 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 24207 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 24208 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 24209 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 24210 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 24211 | 71, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 24212 | 71, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2 |
| 24213 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 24214 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 24215 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 24216 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 24217 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 24218 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 24219 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 24220 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 24221 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 24222 | 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 24223 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 24224 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 24225 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 24226 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 24227 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 24228 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 24229 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 24230 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 24231 | 65, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24232 | 92, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24233 | 65, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24234 | 93, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24235 | 74, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 24236 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24237 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24238 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24239 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24240 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24241 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24242 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24243 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24244 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 24245 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24246 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24247 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24248 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24249 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24250 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24251 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 24252 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24253 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 24254 | 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24255 | }, |
| 24256 | { // DQuad_with_dsub_3_in_DPR_8 |
| 24257 | 54, // DQuad_with_dsub_3_in_DPR_8:dsub_0 -> DPR_8 |
| 24258 | 54, // DQuad_with_dsub_3_in_DPR_8:dsub_1 -> DPR_8 |
| 24259 | 54, // DQuad_with_dsub_3_in_DPR_8:dsub_2 -> DPR_8 |
| 24260 | 54, // DQuad_with_dsub_3_in_DPR_8:dsub_3 -> DPR_8 |
| 24261 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_4 |
| 24262 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5 |
| 24263 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_6 |
| 24264 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_7 |
| 24265 | 0, // DQuad_with_dsub_3_in_DPR_8:gsub_0 |
| 24266 | 0, // DQuad_with_dsub_3_in_DPR_8:gsub_1 |
| 24267 | 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_0 |
| 24268 | 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_1 |
| 24269 | 75, // DQuad_with_dsub_3_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 24270 | 75, // DQuad_with_dsub_3_in_DPR_8:qsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 24271 | 0, // DQuad_with_dsub_3_in_DPR_8:qsub_2 |
| 24272 | 0, // DQuad_with_dsub_3_in_DPR_8:qsub_3 |
| 24273 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_0 -> SPR_8 |
| 24274 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_1 -> SPR_8 |
| 24275 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_2 -> SPR_8 |
| 24276 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_3 -> SPR_8 |
| 24277 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_4 -> SPR_8 |
| 24278 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_5 -> SPR_8 |
| 24279 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_6 -> SPR_8 |
| 24280 | 8, // DQuad_with_dsub_3_in_DPR_8:ssub_7 -> SPR_8 |
| 24281 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8 |
| 24282 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_9 |
| 24283 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_10 |
| 24284 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_11 |
| 24285 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_12 |
| 24286 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_13 |
| 24287 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_14 |
| 24288 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_15 |
| 24289 | 67, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24290 | 95, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 24291 | 67, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24292 | 95, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_2_in_DPR_8 |
| 24293 | 75, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 24294 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24295 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24296 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24297 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24298 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24299 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24300 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24301 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24302 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24303 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24304 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24305 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24306 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24307 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24308 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24309 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_dsub_7 |
| 24310 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24311 | 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 24312 | 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24313 | }, |
| 24314 | { // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24315 | 54, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8 |
| 24316 | 53, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 24317 | 53, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 24318 | 53, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2 |
| 24319 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 24320 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 24321 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 24322 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 24323 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 24324 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 24325 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 24326 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 24327 | 72, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 24328 | 71, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2 |
| 24329 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 24330 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 24331 | 8, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8 |
| 24332 | 8, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8 |
| 24333 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 24334 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 24335 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 24336 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 24337 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 24338 | 3, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 24339 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 24340 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 24341 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 24342 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 24343 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 24344 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 24345 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 24346 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 24347 | 66, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24348 | 97, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24349 | 65, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24350 | 93, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24351 | 74, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 24352 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24353 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24354 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24355 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24356 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24357 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24358 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24359 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24360 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 24361 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24362 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24363 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24364 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24365 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24366 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24367 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 24368 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24369 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 24370 | 0, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24371 | }, |
| 24372 | { // MQQPR_with_qsub_0_in_QPR_8 |
| 24373 | 54, // MQQPR_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8 |
| 24374 | 54, // MQQPR_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8 |
| 24375 | 53, // MQQPR_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2 |
| 24376 | 53, // MQQPR_with_qsub_0_in_QPR_8:dsub_3 -> DPR_VFP2 |
| 24377 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_4 |
| 24378 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_5 |
| 24379 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_6 |
| 24380 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_7 |
| 24381 | 0, // MQQPR_with_qsub_0_in_QPR_8:gsub_0 |
| 24382 | 0, // MQQPR_with_qsub_0_in_QPR_8:gsub_1 |
| 24383 | 0, // MQQPR_with_qsub_0_in_QPR_8:qqsub_0 |
| 24384 | 0, // MQQPR_with_qsub_0_in_QPR_8:qqsub_1 |
| 24385 | 76, // MQQPR_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8 |
| 24386 | 74, // MQQPR_with_qsub_0_in_QPR_8:qsub_1 -> QPR_VFP2 |
| 24387 | 0, // MQQPR_with_qsub_0_in_QPR_8:qsub_2 |
| 24388 | 0, // MQQPR_with_qsub_0_in_QPR_8:qsub_3 |
| 24389 | 8, // MQQPR_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8 |
| 24390 | 8, // MQQPR_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8 |
| 24391 | 8, // MQQPR_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8 |
| 24392 | 8, // MQQPR_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8 |
| 24393 | 3, // MQQPR_with_qsub_0_in_QPR_8:ssub_4 -> SPR |
| 24394 | 3, // MQQPR_with_qsub_0_in_QPR_8:ssub_5 -> SPR |
| 24395 | 3, // MQQPR_with_qsub_0_in_QPR_8:ssub_6 -> SPR |
| 24396 | 3, // MQQPR_with_qsub_0_in_QPR_8:ssub_7 -> SPR |
| 24397 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_8 |
| 24398 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_9 |
| 24399 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_10 |
| 24400 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_11 |
| 24401 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_12 |
| 24402 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_13 |
| 24403 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_14 |
| 24404 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_15 |
| 24405 | 66, // MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24406 | 98, // MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 24407 | 66, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24408 | 97, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24409 | 72, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 24410 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24411 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24412 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24413 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24414 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24415 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24416 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24417 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24418 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 24419 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24420 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24421 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24422 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24423 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24424 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24425 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_5_dsub_7 |
| 24426 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24427 | 0, // MQQPR_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 24428 | 0, // MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24429 | }, |
| 24430 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24431 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8 |
| 24432 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8 |
| 24433 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8 |
| 24434 | 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3 -> DPR_VFP2 |
| 24435 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4 |
| 24436 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5 |
| 24437 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6 |
| 24438 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7 |
| 24439 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0 |
| 24440 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1 |
| 24441 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0 |
| 24442 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1 |
| 24443 | 75, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 24444 | 72, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 24445 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2 |
| 24446 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3 |
| 24447 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8 |
| 24448 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8 |
| 24449 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8 |
| 24450 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8 |
| 24451 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8 |
| 24452 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8 |
| 24453 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6 -> SPR |
| 24454 | 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7 -> SPR |
| 24455 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8 |
| 24456 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9 |
| 24457 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10 |
| 24458 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11 |
| 24459 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12 |
| 24460 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13 |
| 24461 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14 |
| 24462 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15 |
| 24463 | 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24464 | 100, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24465 | 66, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24466 | 98, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR_8 |
| 24467 | 76, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 24468 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24469 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24470 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24471 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24472 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24473 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24474 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24475 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24476 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 24477 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24478 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24479 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24480 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24481 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24482 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24483 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7 |
| 24484 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24485 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 24486 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24487 | }, |
| 24488 | { // MQQPR_with_dsub_2_in_DPR_8 |
| 24489 | 54, // MQQPR_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 24490 | 54, // MQQPR_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 24491 | 54, // MQQPR_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 24492 | 54, // MQQPR_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8 |
| 24493 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_4 |
| 24494 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_5 |
| 24495 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_6 |
| 24496 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_7 |
| 24497 | 0, // MQQPR_with_dsub_2_in_DPR_8:gsub_0 |
| 24498 | 0, // MQQPR_with_dsub_2_in_DPR_8:gsub_1 |
| 24499 | 0, // MQQPR_with_dsub_2_in_DPR_8:qqsub_0 |
| 24500 | 0, // MQQPR_with_dsub_2_in_DPR_8:qqsub_1 |
| 24501 | 76, // MQQPR_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8 |
| 24502 | 76, // MQQPR_with_dsub_2_in_DPR_8:qsub_1 -> QPR_8 |
| 24503 | 0, // MQQPR_with_dsub_2_in_DPR_8:qsub_2 |
| 24504 | 0, // MQQPR_with_dsub_2_in_DPR_8:qsub_3 |
| 24505 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 24506 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 24507 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 24508 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 24509 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 24510 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 24511 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8 |
| 24512 | 8, // MQQPR_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8 |
| 24513 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_8 |
| 24514 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_9 |
| 24515 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_10 |
| 24516 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_11 |
| 24517 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_12 |
| 24518 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_13 |
| 24519 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_14 |
| 24520 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_15 |
| 24521 | 67, // MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24522 | 99, // MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 24523 | 67, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24524 | 100, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24525 | 75, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 24526 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24527 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24528 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24529 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24530 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24531 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24532 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24533 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24534 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24535 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24536 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24537 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24538 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24539 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24540 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24541 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 24542 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24543 | 0, // MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 24544 | 0, // MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24545 | }, |
| 24546 | { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 24547 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 24548 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 24549 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 24550 | 54, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8 |
| 24551 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_4 |
| 24552 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5 |
| 24553 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_6 |
| 24554 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_7 |
| 24555 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:gsub_0 |
| 24556 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:gsub_1 |
| 24557 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qqsub_0 |
| 24558 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qqsub_1 |
| 24559 | 75, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 24560 | 75, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 24561 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_2 |
| 24562 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:qsub_3 |
| 24563 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 24564 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 24565 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 24566 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 24567 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 24568 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 24569 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8 |
| 24570 | 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8 |
| 24571 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8 |
| 24572 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_9 |
| 24573 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_10 |
| 24574 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_11 |
| 24575 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_12 |
| 24576 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_13 |
| 24577 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_14 |
| 24578 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_15 |
| 24579 | 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24580 | 100, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24581 | 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24582 | 99, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 24583 | 76, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 24584 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 24585 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24586 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 24587 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24588 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24589 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 24590 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 24591 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24592 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24593 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 24594 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 24595 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 24596 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24597 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 24598 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 24599 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 24600 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 24601 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 24602 | 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| 24603 | }, |
| 24604 | { // QQQQPR |
| 24605 | 52, // QQQQPR:dsub_0 -> DPR |
| 24606 | 52, // QQQQPR:dsub_1 -> DPR |
| 24607 | 52, // QQQQPR:dsub_2 -> DPR |
| 24608 | 52, // QQQQPR:dsub_3 -> DPR |
| 24609 | 52, // QQQQPR:dsub_4 -> DPR |
| 24610 | 52, // QQQQPR:dsub_5 -> DPR |
| 24611 | 52, // QQQQPR:dsub_6 -> DPR |
| 24612 | 52, // QQQQPR:dsub_7 -> DPR |
| 24613 | 0, // QQQQPR:gsub_0 |
| 24614 | 0, // QQQQPR:gsub_1 |
| 24615 | 111, // QQQQPR:qqsub_0 -> QQPR |
| 24616 | 111, // QQQQPR:qqsub_1 -> QQPR |
| 24617 | 70, // QQQQPR:qsub_0 -> QPR |
| 24618 | 70, // QQQQPR:qsub_1 -> QPR |
| 24619 | 70, // QQQQPR:qsub_2 -> QPR |
| 24620 | 70, // QQQQPR:qsub_3 -> QPR |
| 24621 | 3, // QQQQPR:ssub_0 -> SPR |
| 24622 | 3, // QQQQPR:ssub_1 -> SPR |
| 24623 | 3, // QQQQPR:ssub_2 -> SPR |
| 24624 | 3, // QQQQPR:ssub_3 -> SPR |
| 24625 | 3, // QQQQPR:ssub_4 -> SPR |
| 24626 | 3, // QQQQPR:ssub_5 -> SPR |
| 24627 | 3, // QQQQPR:ssub_6 -> SPR |
| 24628 | 3, // QQQQPR:ssub_7 -> SPR |
| 24629 | 3, // QQQQPR:ssub_8 -> SPR |
| 24630 | 3, // QQQQPR:ssub_9 -> SPR |
| 24631 | 3, // QQQQPR:ssub_10 -> SPR |
| 24632 | 3, // QQQQPR:ssub_11 -> SPR |
| 24633 | 3, // QQQQPR:ssub_12 -> SPR |
| 24634 | 3, // QQQQPR:ssub_13 -> SPR |
| 24635 | 3, // QQQQPR:ssub_14 -> SPR |
| 24636 | 3, // QQQQPR:ssub_15 -> SPR |
| 24637 | 63, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 24638 | 81, // QQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 24639 | 63, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 24640 | 83, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24641 | 68, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 24642 | 101, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc |
| 24643 | 0, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24644 | 101, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc |
| 24645 | 0, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24646 | 112, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24647 | 63, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 24648 | 81, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR |
| 24649 | 101, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc |
| 24650 | 0, // QQQQPR:ssub_6_ssub_7_dsub_5 |
| 24651 | 83, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24652 | 101, // QQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc |
| 24653 | 68, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair |
| 24654 | 112, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24655 | 63, // QQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 24656 | 81, // QQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 24657 | 63, // QQQQPR:dsub_5_dsub_7 -> DPairSpc |
| 24658 | 83, // QQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24659 | 68, // QQQQPR:dsub_5_ssub_12_ssub_13 -> DPair |
| 24660 | 111, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR |
| 24661 | }, |
| 24662 | { // QQQQPR_with_ssub_0 |
| 24663 | 53, // QQQQPR_with_ssub_0:dsub_0 -> DPR_VFP2 |
| 24664 | 53, // QQQQPR_with_ssub_0:dsub_1 -> DPR_VFP2 |
| 24665 | 52, // QQQQPR_with_ssub_0:dsub_2 -> DPR |
| 24666 | 52, // QQQQPR_with_ssub_0:dsub_3 -> DPR |
| 24667 | 52, // QQQQPR_with_ssub_0:dsub_4 -> DPR |
| 24668 | 52, // QQQQPR_with_ssub_0:dsub_5 -> DPR |
| 24669 | 52, // QQQQPR_with_ssub_0:dsub_6 -> DPR |
| 24670 | 52, // QQQQPR_with_ssub_0:dsub_7 -> DPR |
| 24671 | 0, // QQQQPR_with_ssub_0:gsub_0 |
| 24672 | 0, // QQQQPR_with_ssub_0:gsub_1 |
| 24673 | 117, // QQQQPR_with_ssub_0:qqsub_0 -> QQPR_with_ssub_0 |
| 24674 | 111, // QQQQPR_with_ssub_0:qqsub_1 -> QQPR |
| 24675 | 73, // QQQQPR_with_ssub_0:qsub_0 -> MQPR |
| 24676 | 70, // QQQQPR_with_ssub_0:qsub_1 -> QPR |
| 24677 | 70, // QQQQPR_with_ssub_0:qsub_2 -> QPR |
| 24678 | 70, // QQQQPR_with_ssub_0:qsub_3 -> QPR |
| 24679 | 3, // QQQQPR_with_ssub_0:ssub_0 -> SPR |
| 24680 | 3, // QQQQPR_with_ssub_0:ssub_1 -> SPR |
| 24681 | 3, // QQQQPR_with_ssub_0:ssub_2 -> SPR |
| 24682 | 3, // QQQQPR_with_ssub_0:ssub_3 -> SPR |
| 24683 | 3, // QQQQPR_with_ssub_0:ssub_4 -> SPR |
| 24684 | 3, // QQQQPR_with_ssub_0:ssub_5 -> SPR |
| 24685 | 3, // QQQQPR_with_ssub_0:ssub_6 -> SPR |
| 24686 | 3, // QQQQPR_with_ssub_0:ssub_7 -> SPR |
| 24687 | 3, // QQQQPR_with_ssub_0:ssub_8 -> SPR |
| 24688 | 3, // QQQQPR_with_ssub_0:ssub_9 -> SPR |
| 24689 | 3, // QQQQPR_with_ssub_0:ssub_10 -> SPR |
| 24690 | 3, // QQQQPR_with_ssub_0:ssub_11 -> SPR |
| 24691 | 3, // QQQQPR_with_ssub_0:ssub_12 -> SPR |
| 24692 | 3, // QQQQPR_with_ssub_0:ssub_13 -> SPR |
| 24693 | 3, // QQQQPR_with_ssub_0:ssub_14 -> SPR |
| 24694 | 3, // QQQQPR_with_ssub_0:ssub_15 -> SPR |
| 24695 | 64, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 24696 | 89, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 24697 | 64, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 24698 | 90, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24699 | 69, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 24700 | 102, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0 |
| 24701 | 0, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24702 | 102, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_0 |
| 24703 | 0, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24704 | 116, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24705 | 63, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 24706 | 81, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR |
| 24707 | 101, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc |
| 24708 | 0, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 24709 | 83, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24710 | 101, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc |
| 24711 | 68, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair |
| 24712 | 112, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24713 | 63, // QQQQPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 24714 | 81, // QQQQPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 24715 | 63, // QQQQPR_with_ssub_0:dsub_5_dsub_7 -> DPairSpc |
| 24716 | 83, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24717 | 68, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13 -> DPair |
| 24718 | 111, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR |
| 24719 | }, |
| 24720 | { // QQQQPR_with_ssub_4 |
| 24721 | 53, // QQQQPR_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 24722 | 53, // QQQQPR_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 24723 | 53, // QQQQPR_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 24724 | 53, // QQQQPR_with_ssub_4:dsub_3 -> DPR_VFP2 |
| 24725 | 52, // QQQQPR_with_ssub_4:dsub_4 -> DPR |
| 24726 | 52, // QQQQPR_with_ssub_4:dsub_5 -> DPR |
| 24727 | 52, // QQQQPR_with_ssub_4:dsub_6 -> DPR |
| 24728 | 52, // QQQQPR_with_ssub_4:dsub_7 -> DPR |
| 24729 | 0, // QQQQPR_with_ssub_4:gsub_0 |
| 24730 | 0, // QQQQPR_with_ssub_4:gsub_1 |
| 24731 | 120, // QQQQPR_with_ssub_4:qqsub_0 -> MQQPR |
| 24732 | 111, // QQQQPR_with_ssub_4:qqsub_1 -> QQPR |
| 24733 | 74, // QQQQPR_with_ssub_4:qsub_0 -> QPR_VFP2 |
| 24734 | 74, // QQQQPR_with_ssub_4:qsub_1 -> QPR_VFP2 |
| 24735 | 70, // QQQQPR_with_ssub_4:qsub_2 -> QPR |
| 24736 | 70, // QQQQPR_with_ssub_4:qsub_3 -> QPR |
| 24737 | 3, // QQQQPR_with_ssub_4:ssub_0 -> SPR |
| 24738 | 3, // QQQQPR_with_ssub_4:ssub_1 -> SPR |
| 24739 | 3, // QQQQPR_with_ssub_4:ssub_2 -> SPR |
| 24740 | 3, // QQQQPR_with_ssub_4:ssub_3 -> SPR |
| 24741 | 3, // QQQQPR_with_ssub_4:ssub_4 -> SPR |
| 24742 | 3, // QQQQPR_with_ssub_4:ssub_5 -> SPR |
| 24743 | 3, // QQQQPR_with_ssub_4:ssub_6 -> SPR |
| 24744 | 3, // QQQQPR_with_ssub_4:ssub_7 -> SPR |
| 24745 | 3, // QQQQPR_with_ssub_4:ssub_8 -> SPR |
| 24746 | 3, // QQQQPR_with_ssub_4:ssub_9 -> SPR |
| 24747 | 3, // QQQQPR_with_ssub_4:ssub_10 -> SPR |
| 24748 | 3, // QQQQPR_with_ssub_4:ssub_11 -> SPR |
| 24749 | 3, // QQQQPR_with_ssub_4:ssub_12 -> SPR |
| 24750 | 3, // QQQQPR_with_ssub_4:ssub_13 -> SPR |
| 24751 | 3, // QQQQPR_with_ssub_4:ssub_14 -> SPR |
| 24752 | 3, // QQQQPR_with_ssub_4:ssub_15 -> SPR |
| 24753 | 65, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24754 | 93, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24755 | 65, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24756 | 92, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24757 | 71, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 24758 | 103, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4 |
| 24759 | 0, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24760 | 103, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_4 |
| 24761 | 0, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24762 | 119, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24763 | 64, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 24764 | 89, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_MQPR |
| 24765 | 102, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_0 |
| 24766 | 0, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 24767 | 90, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24768 | 102, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_0 |
| 24769 | 69, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_0 |
| 24770 | 116, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24771 | 63, // QQQQPR_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 24772 | 81, // QQQQPR_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 24773 | 63, // QQQQPR_with_ssub_4:dsub_5_dsub_7 -> DPairSpc |
| 24774 | 83, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24775 | 68, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13 -> DPair |
| 24776 | 117, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR_with_ssub_0 |
| 24777 | }, |
| 24778 | { // QQQQPR_with_ssub_8 |
| 24779 | 53, // QQQQPR_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 24780 | 53, // QQQQPR_with_ssub_8:dsub_1 -> DPR_VFP2 |
| 24781 | 53, // QQQQPR_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 24782 | 53, // QQQQPR_with_ssub_8:dsub_3 -> DPR_VFP2 |
| 24783 | 53, // QQQQPR_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 24784 | 53, // QQQQPR_with_ssub_8:dsub_5 -> DPR_VFP2 |
| 24785 | 52, // QQQQPR_with_ssub_8:dsub_6 -> DPR |
| 24786 | 52, // QQQQPR_with_ssub_8:dsub_7 -> DPR |
| 24787 | 0, // QQQQPR_with_ssub_8:gsub_0 |
| 24788 | 0, // QQQQPR_with_ssub_8:gsub_1 |
| 24789 | 120, // QQQQPR_with_ssub_8:qqsub_0 -> MQQPR |
| 24790 | 117, // QQQQPR_with_ssub_8:qqsub_1 -> QQPR_with_ssub_0 |
| 24791 | 74, // QQQQPR_with_ssub_8:qsub_0 -> QPR_VFP2 |
| 24792 | 74, // QQQQPR_with_ssub_8:qsub_1 -> QPR_VFP2 |
| 24793 | 74, // QQQQPR_with_ssub_8:qsub_2 -> QPR_VFP2 |
| 24794 | 70, // QQQQPR_with_ssub_8:qsub_3 -> QPR |
| 24795 | 3, // QQQQPR_with_ssub_8:ssub_0 -> SPR |
| 24796 | 3, // QQQQPR_with_ssub_8:ssub_1 -> SPR |
| 24797 | 3, // QQQQPR_with_ssub_8:ssub_2 -> SPR |
| 24798 | 3, // QQQQPR_with_ssub_8:ssub_3 -> SPR |
| 24799 | 3, // QQQQPR_with_ssub_8:ssub_4 -> SPR |
| 24800 | 3, // QQQQPR_with_ssub_8:ssub_5 -> SPR |
| 24801 | 3, // QQQQPR_with_ssub_8:ssub_6 -> SPR |
| 24802 | 3, // QQQQPR_with_ssub_8:ssub_7 -> SPR |
| 24803 | 3, // QQQQPR_with_ssub_8:ssub_8 -> SPR |
| 24804 | 3, // QQQQPR_with_ssub_8:ssub_9 -> SPR |
| 24805 | 3, // QQQQPR_with_ssub_8:ssub_10 -> SPR |
| 24806 | 3, // QQQQPR_with_ssub_8:ssub_11 -> SPR |
| 24807 | 3, // QQQQPR_with_ssub_8:ssub_12 -> SPR |
| 24808 | 3, // QQQQPR_with_ssub_8:ssub_13 -> SPR |
| 24809 | 3, // QQQQPR_with_ssub_8:ssub_14 -> SPR |
| 24810 | 3, // QQQQPR_with_ssub_8:ssub_15 -> SPR |
| 24811 | 65, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24812 | 93, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24813 | 65, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24814 | 92, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24815 | 71, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 24816 | 104, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 24817 | 0, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24818 | 104, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8 |
| 24819 | 0, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24820 | 122, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24821 | 65, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 24822 | 93, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24823 | 103, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_4 |
| 24824 | 0, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5 |
| 24825 | 92, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24826 | 103, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_4 |
| 24827 | 71, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 24828 | 119, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24829 | 64, // QQQQPR_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_0 |
| 24830 | 89, // QQQQPR_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_MQPR |
| 24831 | 64, // QQQQPR_with_ssub_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_0 |
| 24832 | 90, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 24833 | 69, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_0 |
| 24834 | 120, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| 24835 | }, |
| 24836 | { // MQQQQPR |
| 24837 | 53, // MQQQQPR:dsub_0 -> DPR_VFP2 |
| 24838 | 53, // MQQQQPR:dsub_1 -> DPR_VFP2 |
| 24839 | 53, // MQQQQPR:dsub_2 -> DPR_VFP2 |
| 24840 | 53, // MQQQQPR:dsub_3 -> DPR_VFP2 |
| 24841 | 53, // MQQQQPR:dsub_4 -> DPR_VFP2 |
| 24842 | 53, // MQQQQPR:dsub_5 -> DPR_VFP2 |
| 24843 | 53, // MQQQQPR:dsub_6 -> DPR_VFP2 |
| 24844 | 53, // MQQQQPR:dsub_7 -> DPR_VFP2 |
| 24845 | 0, // MQQQQPR:gsub_0 |
| 24846 | 0, // MQQQQPR:gsub_1 |
| 24847 | 120, // MQQQQPR:qqsub_0 -> MQQPR |
| 24848 | 120, // MQQQQPR:qqsub_1 -> MQQPR |
| 24849 | 74, // MQQQQPR:qsub_0 -> QPR_VFP2 |
| 24850 | 74, // MQQQQPR:qsub_1 -> QPR_VFP2 |
| 24851 | 74, // MQQQQPR:qsub_2 -> QPR_VFP2 |
| 24852 | 74, // MQQQQPR:qsub_3 -> QPR_VFP2 |
| 24853 | 3, // MQQQQPR:ssub_0 -> SPR |
| 24854 | 3, // MQQQQPR:ssub_1 -> SPR |
| 24855 | 3, // MQQQQPR:ssub_2 -> SPR |
| 24856 | 3, // MQQQQPR:ssub_3 -> SPR |
| 24857 | 3, // MQQQQPR:ssub_4 -> SPR |
| 24858 | 3, // MQQQQPR:ssub_5 -> SPR |
| 24859 | 3, // MQQQQPR:ssub_6 -> SPR |
| 24860 | 3, // MQQQQPR:ssub_7 -> SPR |
| 24861 | 3, // MQQQQPR:ssub_8 -> SPR |
| 24862 | 3, // MQQQQPR:ssub_9 -> SPR |
| 24863 | 3, // MQQQQPR:ssub_10 -> SPR |
| 24864 | 3, // MQQQQPR:ssub_11 -> SPR |
| 24865 | 3, // MQQQQPR:ssub_12 -> SPR |
| 24866 | 3, // MQQQQPR:ssub_13 -> SPR |
| 24867 | 3, // MQQQQPR:ssub_14 -> SPR |
| 24868 | 3, // MQQQQPR:ssub_15 -> SPR |
| 24869 | 65, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 24870 | 93, // MQQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24871 | 65, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 24872 | 92, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24873 | 71, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 24874 | 104, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 24875 | 0, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24876 | 104, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8 |
| 24877 | 0, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24878 | 122, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24879 | 65, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 24880 | 93, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24881 | 104, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8 |
| 24882 | 0, // MQQQQPR:ssub_6_ssub_7_dsub_5 |
| 24883 | 92, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24884 | 104, // MQQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8 |
| 24885 | 71, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 24886 | 122, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24887 | 65, // MQQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 24888 | 93, // MQQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24889 | 65, // MQQQQPR:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 24890 | 92, // MQQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24891 | 71, // MQQQQPR:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 24892 | 120, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| 24893 | }, |
| 24894 | { // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 24895 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8 |
| 24896 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8 |
| 24897 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2 |
| 24898 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_3 -> DPR_VFP2 |
| 24899 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_4 -> DPR_VFP2 |
| 24900 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_5 -> DPR_VFP2 |
| 24901 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_6 -> DPR_VFP2 |
| 24902 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_7 -> DPR_VFP2 |
| 24903 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:gsub_0 |
| 24904 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:gsub_1 |
| 24905 | 125, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qqsub_0 -> MQQPR_with_qsub_0_in_QPR_8 |
| 24906 | 120, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qqsub_1 -> MQQPR |
| 24907 | 76, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8 |
| 24908 | 74, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qsub_1 -> QPR_VFP2 |
| 24909 | 74, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qsub_2 -> QPR_VFP2 |
| 24910 | 74, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:qsub_3 -> QPR_VFP2 |
| 24911 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8 |
| 24912 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8 |
| 24913 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8 |
| 24914 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8 |
| 24915 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_4 -> SPR |
| 24916 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_5 -> SPR |
| 24917 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6 -> SPR |
| 24918 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_7 -> SPR |
| 24919 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_8 -> SPR |
| 24920 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_9 -> SPR |
| 24921 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_10 -> SPR |
| 24922 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_11 -> SPR |
| 24923 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_12 -> SPR |
| 24924 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_13 -> SPR |
| 24925 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_14 -> SPR |
| 24926 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_15 -> SPR |
| 24927 | 66, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24928 | 98, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 24929 | 66, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24930 | 97, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24931 | 72, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 24932 | 105, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 24933 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24934 | 105, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 24935 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24936 | 124, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24937 | 65, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 24938 | 93, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24939 | 104, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8 |
| 24940 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 24941 | 92, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24942 | 104, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8 |
| 24943 | 71, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 24944 | 122, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24945 | 65, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 24946 | 93, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 24947 | 65, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 24948 | 92, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 24949 | 71, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 24950 | 120, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| 24951 | }, |
| 24952 | { // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 24953 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 24954 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 24955 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 24956 | 54, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8 |
| 24957 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 24958 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5 -> DPR_VFP2 |
| 24959 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_6 -> DPR_VFP2 |
| 24960 | 53, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_7 -> DPR_VFP2 |
| 24961 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:gsub_0 |
| 24962 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:gsub_1 |
| 24963 | 127, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qqsub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 24964 | 120, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qqsub_1 -> MQQPR |
| 24965 | 76, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8 |
| 24966 | 76, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qsub_1 -> QPR_8 |
| 24967 | 74, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qsub_2 -> QPR_VFP2 |
| 24968 | 74, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:qsub_3 -> QPR_VFP2 |
| 24969 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 24970 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 24971 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 24972 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 24973 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 24974 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 24975 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8 |
| 24976 | 8, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8 |
| 24977 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 24978 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 24979 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_10 -> SPR |
| 24980 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_11 -> SPR |
| 24981 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_12 -> SPR |
| 24982 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_13 -> SPR |
| 24983 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_14 -> SPR |
| 24984 | 3, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_15 -> SPR |
| 24985 | 67, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24986 | 99, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 24987 | 67, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 24988 | 100, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24989 | 75, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 24990 | 106, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 24991 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 24992 | 106, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 24993 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 24994 | 126, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 24995 | 66, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 24996 | 98, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR_8 |
| 24997 | 105, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 24998 | 0, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 24999 | 97, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25000 | 105, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 25001 | 72, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_0_in_DPR_8 |
| 25002 | 124, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25003 | 65, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 25004 | 93, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 25005 | 65, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 25006 | 92, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25007 | 71, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 25008 | 125, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR_with_qsub_0_in_QPR_8 |
| 25009 | }, |
| 25010 | { // MQQQQPR_with_qsub_2_in_QPR_8 |
| 25011 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_0 -> DPR_8 |
| 25012 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_1 -> DPR_8 |
| 25013 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_2 -> DPR_8 |
| 25014 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_3 -> DPR_8 |
| 25015 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_4 -> DPR_8 |
| 25016 | 54, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_5 -> DPR_8 |
| 25017 | 53, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_6 -> DPR_VFP2 |
| 25018 | 53, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_7 -> DPR_VFP2 |
| 25019 | 0, // MQQQQPR_with_qsub_2_in_QPR_8:gsub_0 |
| 25020 | 0, // MQQQQPR_with_qsub_2_in_QPR_8:gsub_1 |
| 25021 | 127, // MQQQQPR_with_qsub_2_in_QPR_8:qqsub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 25022 | 125, // MQQQQPR_with_qsub_2_in_QPR_8:qqsub_1 -> MQQPR_with_qsub_0_in_QPR_8 |
| 25023 | 76, // MQQQQPR_with_qsub_2_in_QPR_8:qsub_0 -> QPR_8 |
| 25024 | 76, // MQQQQPR_with_qsub_2_in_QPR_8:qsub_1 -> QPR_8 |
| 25025 | 76, // MQQQQPR_with_qsub_2_in_QPR_8:qsub_2 -> QPR_8 |
| 25026 | 74, // MQQQQPR_with_qsub_2_in_QPR_8:qsub_3 -> QPR_VFP2 |
| 25027 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_0 -> SPR_8 |
| 25028 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_1 -> SPR_8 |
| 25029 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2 -> SPR_8 |
| 25030 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_3 -> SPR_8 |
| 25031 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_4 -> SPR_8 |
| 25032 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_5 -> SPR_8 |
| 25033 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6 -> SPR_8 |
| 25034 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_7 -> SPR_8 |
| 25035 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_8 -> SPR_8 |
| 25036 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_9 -> SPR_8 |
| 25037 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_10 -> SPR_8 |
| 25038 | 8, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_11 -> SPR_8 |
| 25039 | 3, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_12 -> SPR |
| 25040 | 3, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_13 -> SPR |
| 25041 | 3, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_14 -> SPR |
| 25042 | 3, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_15 -> SPR |
| 25043 | 67, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25044 | 99, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25045 | 67, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25046 | 100, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25047 | 75, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 25048 | 107, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25049 | 0, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 25050 | 107, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25051 | 0, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 25052 | 128, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25053 | 67, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25054 | 99, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25055 | 106, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 25056 | 0, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 25057 | 100, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25058 | 106, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 25059 | 75, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8 |
| 25060 | 126, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25061 | 66, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 25062 | 98, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR_8 |
| 25063 | 66, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 25064 | 97, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25065 | 72, // MQQQQPR_with_qsub_2_in_QPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_0_in_DPR_8 |
| 25066 | 127, // MQQQQPR_with_qsub_2_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR_with_dsub_2_in_DPR_8 |
| 25067 | }, |
| 25068 | { // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 25069 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 25070 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 25071 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 25072 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8 |
| 25073 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_4 -> DPR_8 |
| 25074 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5 -> DPR_8 |
| 25075 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_6 -> DPR_8 |
| 25076 | 54, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_7 -> DPR_8 |
| 25077 | 0, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:gsub_0 |
| 25078 | 0, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:gsub_1 |
| 25079 | 127, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qqsub_0 -> MQQPR_with_dsub_2_in_DPR_8 |
| 25080 | 127, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qqsub_1 -> MQQPR_with_dsub_2_in_DPR_8 |
| 25081 | 76, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8 |
| 25082 | 76, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qsub_1 -> QPR_8 |
| 25083 | 76, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qsub_2 -> QPR_8 |
| 25084 | 76, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:qsub_3 -> QPR_8 |
| 25085 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 25086 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 25087 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 25088 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 25089 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 25090 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 25091 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8 |
| 25092 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8 |
| 25093 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8 -> SPR_8 |
| 25094 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_9 -> SPR_8 |
| 25095 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_10 -> SPR_8 |
| 25096 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_11 -> SPR_8 |
| 25097 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_12 -> SPR_8 |
| 25098 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_13 -> SPR_8 |
| 25099 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_14 -> SPR_8 |
| 25100 | 8, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_15 -> SPR_8 |
| 25101 | 67, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25102 | 99, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25103 | 67, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25104 | 100, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25105 | 75, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 25106 | 107, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25107 | 0, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 25108 | 107, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25109 | 0, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 25110 | 128, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25111 | 67, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25112 | 99, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25113 | 107, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25114 | 0, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 25115 | 100, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25116 | 107, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 25117 | 75, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8 |
| 25118 | 128, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25119 | 67, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25120 | 99, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25121 | 67, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 25122 | 100, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25123 | 75, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_1_in_DPR_8 |
| 25124 | 127, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR_with_dsub_2_in_DPR_8 |
| 25125 | }, |
| 25126 | }; |
| 25127 | assert(RC && "Missing regclass" ); |
| 25128 | if (!Idx) return RC; |
| 25129 | --Idx; |
| 25130 | assert(Idx < 56 && "Bad subreg" ); |
| 25131 | unsigned TV = Table[RC->getID()][Idx]; |
| 25132 | return TV ? getRegClass(TV - 1) : nullptr; |
| 25133 | } |
| 25134 | |
| 25135 | /// Get the weight in units of pressure for this register class. |
| 25136 | const RegClassWeight &ARMGenRegisterInfo:: |
| 25137 | getRegClassWeight(const TargetRegisterClass *RC) const { |
| 25138 | static const RegClassWeight RCWeightTable[] = { |
| 25139 | {1, 32}, // HPR |
| 25140 | {1, 65}, // FPWithVPR |
| 25141 | {1, 32}, // SPR |
| 25142 | {2, 32}, // FPWithVPR_with_ssub_0 |
| 25143 | {1, 16}, // GPR |
| 25144 | {1, 16}, // GPRwithAPSR |
| 25145 | {1, 16}, // GPRwithZR |
| 25146 | {1, 16}, // SPR_8 |
| 25147 | {1, 15}, // GPRnopc |
| 25148 | {1, 15}, // GPRnosp |
| 25149 | {1, 15}, // GPRwithAPSR_NZCVnosp |
| 25150 | {0, 14}, // GPRwithAPSRnosp |
| 25151 | {1, 15}, // GPRwithZRnosp |
| 25152 | {1, 14}, // GPRnoip |
| 25153 | {1, 14}, // rGPR |
| 25154 | {1, 13}, // GPRnoip_and_GPRnopc |
| 25155 | {1, 13}, // GPRnoip_and_GPRnosp |
| 25156 | {1, 12}, // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 25157 | {1, 9}, // tGPRwithpc |
| 25158 | {2, 16}, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 25159 | {1, 8}, // hGPR |
| 25160 | {1, 8}, // tGPR |
| 25161 | {1, 8}, // tGPREven |
| 25162 | {1, 7}, // GPRnopc_and_hGPR |
| 25163 | {1, 7}, // GPRnosp_and_hGPR |
| 25164 | {1, 6}, // GPRnoip_and_hGPR |
| 25165 | {1, 6}, // GPRnoip_and_tGPREven |
| 25166 | {1, 6}, // GPRnosp_and_GPRnopc_and_hGPR |
| 25167 | {1, 6}, // tGPROdd |
| 25168 | {1, 5}, // GPRnopc_and_GPRnoip_and_hGPR |
| 25169 | {1, 5}, // GPRnosp_and_GPRnoip_and_hGPR |
| 25170 | {1, 5}, // tcGPR |
| 25171 | {1, 4}, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 25172 | {1, 4}, // hGPR_and_tGPREven |
| 25173 | {1, 4}, // tGPR_and_tGPREven |
| 25174 | {1, 4}, // tGPR_and_tGPROdd |
| 25175 | {1, 4}, // tcGPRnotr12 |
| 25176 | {1, 3}, // tGPREven_and_tcGPR |
| 25177 | {0, 1}, // FP_STATUS_REGS |
| 25178 | {1, 2}, // hGPR_and_GPRnoip_and_tGPREven |
| 25179 | {1, 2}, // hGPR_and_tGPROdd |
| 25180 | {1, 2}, // tGPREven_and_tcGPRnotr12 |
| 25181 | {1, 2}, // tGPROdd_and_tcGPR |
| 25182 | {0, 0}, // CCR |
| 25183 | {1, 1}, // FPCXTRegs |
| 25184 | {1, 1}, // GPRlr |
| 25185 | {1, 1}, // GPRsp |
| 25186 | {1, 1}, // VCCR |
| 25187 | {2, 2}, // cl_FPSCR_NZCV |
| 25188 | {1, 1}, // hGPR_and_tGPRwithpc |
| 25189 | {1, 1}, // hGPR_and_tcGPR |
| 25190 | {2, 64}, // DPR |
| 25191 | {2, 32}, // DPR_VFP2 |
| 25192 | {2, 16}, // DPR_8 |
| 25193 | {2, 14}, // GPRPair |
| 25194 | {2, 12}, // GPRPairnosp |
| 25195 | {2, 8}, // GPRPair_with_gsub_0_in_tGPR |
| 25196 | {2, 6}, // GPRPair_with_gsub_0_in_hGPR |
| 25197 | {2, 6}, // GPRPair_with_gsub_0_in_tcGPR |
| 25198 | {2, 4}, // GPRPair_with_gsub_0_in_tcGPRnotr12 |
| 25199 | {2, 4}, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 25200 | {2, 2}, // GPRPair_with_gsub_1_in_GPRsp |
| 25201 | {4, 64}, // DPairSpc |
| 25202 | {4, 36}, // DPairSpc_with_ssub_0 |
| 25203 | {4, 32}, // DPairSpc_with_ssub_4 |
| 25204 | {4, 20}, // DPairSpc_with_dsub_0_in_DPR_8 |
| 25205 | {4, 16}, // DPairSpc_with_dsub_2_in_DPR_8 |
| 25206 | {4, 64}, // DPair |
| 25207 | {4, 34}, // DPair_with_ssub_0 |
| 25208 | {4, 64}, // QPR |
| 25209 | {4, 32}, // DPair_with_ssub_2 |
| 25210 | {4, 18}, // DPair_with_dsub_0_in_DPR_8 |
| 25211 | {4, 32}, // MQPR |
| 25212 | {4, 32}, // QPR_VFP2 |
| 25213 | {4, 16}, // DPair_with_dsub_1_in_DPR_8 |
| 25214 | {4, 16}, // QPR_8 |
| 25215 | {6, 64}, // DTriple |
| 25216 | {6, 64}, // DTripleSpc |
| 25217 | {6, 40}, // DTripleSpc_with_ssub_0 |
| 25218 | {6, 36}, // DTriple_with_ssub_0 |
| 25219 | {6, 62}, // DTriple_with_qsub_0_in_QPR |
| 25220 | {6, 34}, // DTriple_with_ssub_2 |
| 25221 | {6, 62}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25222 | {6, 36}, // DTripleSpc_with_ssub_4 |
| 25223 | {6, 32}, // DTriple_with_ssub_4 |
| 25224 | {6, 32}, // DTripleSpc_with_ssub_8 |
| 25225 | {6, 24}, // DTripleSpc_with_dsub_0_in_DPR_8 |
| 25226 | {6, 20}, // DTriple_with_dsub_0_in_DPR_8 |
| 25227 | {6, 34}, // DTriple_with_qsub_0_in_MQPR |
| 25228 | {6, 34}, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25229 | {6, 18}, // DTriple_with_dsub_1_in_DPR_8 |
| 25230 | {6, 30}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25231 | {6, 30}, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 25232 | {6, 20}, // DTripleSpc_with_dsub_2_in_DPR_8 |
| 25233 | {6, 16}, // DTriple_with_dsub_2_in_DPR_8 |
| 25234 | {6, 16}, // DTripleSpc_with_dsub_4_in_DPR_8 |
| 25235 | {6, 18}, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25236 | {6, 18}, // DTriple_with_qsub_0_in_QPR_8 |
| 25237 | {6, 14}, // DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25238 | {6, 14}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25239 | {6, 64}, // DQuadSpc |
| 25240 | {6, 40}, // DQuadSpc_with_ssub_0 |
| 25241 | {6, 36}, // DQuadSpc_with_ssub_4 |
| 25242 | {6, 32}, // DQuadSpc_with_ssub_8 |
| 25243 | {6, 24}, // DQuadSpc_with_dsub_0_in_DPR_8 |
| 25244 | {6, 20}, // DQuadSpc_with_dsub_2_in_DPR_8 |
| 25245 | {6, 16}, // DQuadSpc_with_dsub_4_in_DPR_8 |
| 25246 | {8, 64}, // DQuad |
| 25247 | {8, 38}, // DQuad_with_ssub_0 |
| 25248 | {8, 36}, // DQuad_with_ssub_2 |
| 25249 | {8, 64}, // QQPR |
| 25250 | {8, 60}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25251 | {8, 34}, // DQuad_with_ssub_4 |
| 25252 | {8, 32}, // DQuad_with_ssub_6 |
| 25253 | {8, 22}, // DQuad_with_dsub_0_in_DPR_8 |
| 25254 | {8, 36}, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25255 | {8, 36}, // QQPR_with_ssub_0 |
| 25256 | {8, 20}, // DQuad_with_dsub_1_in_DPR_8 |
| 25257 | {8, 32}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25258 | {8, 32}, // MQQPR |
| 25259 | {8, 18}, // DQuad_with_dsub_2_in_DPR_8 |
| 25260 | {8, 28}, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25261 | {8, 16}, // DQuad_with_dsub_3_in_DPR_8 |
| 25262 | {8, 20}, // DQuad_with_ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5_in_DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25263 | {8, 20}, // MQQPR_with_qsub_0_in_QPR_8 |
| 25264 | {8, 16}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 25265 | {8, 16}, // MQQPR_with_dsub_2_in_DPR_8 |
| 25266 | {8, 12}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_in_DTriple_with_qsub_0_in_MQPR_and_DTriple_with_dsub_2_in_DPR_8 |
| 25267 | {16, 64}, // QQQQPR |
| 25268 | {16, 44}, // QQQQPR_with_ssub_0 |
| 25269 | {16, 40}, // QQQQPR_with_ssub_4 |
| 25270 | {16, 36}, // QQQQPR_with_ssub_8 |
| 25271 | {16, 32}, // MQQQQPR |
| 25272 | {16, 28}, // MQQQQPR_with_qqsub_0_in_MQQPR_with_qsub_0_in_QPR_8 |
| 25273 | {16, 24}, // MQQQQPR_with_qqsub_0_in_MQQPR_with_dsub_2_in_DPR_8 |
| 25274 | {16, 20}, // MQQQQPR_with_qsub_2_in_QPR_8 |
| 25275 | {16, 16}, // MQQQQPR_with_qqsub_1_in_MQQPR_with_dsub_2_in_DPR_8 |
| 25276 | }; |
| 25277 | return RCWeightTable[RC->getID()]; |
| 25278 | } |
| 25279 | |
| 25280 | /// Get the weight in units of pressure for this register unit. |
| 25281 | unsigned ARMGenRegisterInfo:: |
| 25282 | getRegUnitWeight(unsigned RegUnit) const { |
| 25283 | assert(RegUnit < 86 && "invalid register unit" ); |
| 25284 | static const uint8_t RUWeightTable[] = { |
| 25285 | 0, 1, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; |
| 25286 | return RUWeightTable[RegUnit]; |
| 25287 | } |
| 25288 | |
| 25289 | |
| 25290 | // Get the number of dimensions of register pressure. |
| 25291 | unsigned ARMGenRegisterInfo::getNumRegPressureSets() const { |
| 25292 | return 34; |
| 25293 | } |
| 25294 | |
| 25295 | // Get the name of this register unit pressure set. |
| 25296 | const char *ARMGenRegisterInfo:: |
| 25297 | getRegPressureSetName(unsigned Idx) const { |
| 25298 | static const char *PressureNameTable[] = { |
| 25299 | "FPCXTRegs" , |
| 25300 | "GPRlr" , |
| 25301 | "VCCR" , |
| 25302 | "hGPR_and_tGPRwithpc" , |
| 25303 | "cl_FPSCR_NZCV" , |
| 25304 | "GPRsp" , |
| 25305 | "tGPROdd" , |
| 25306 | "tcGPR" , |
| 25307 | "hGPR" , |
| 25308 | "tGPROdd_with_tcGPR" , |
| 25309 | "tGPR" , |
| 25310 | "tGPR_with_tcGPR" , |
| 25311 | "tGPREven" , |
| 25312 | "hGPR_with_tGPREven" , |
| 25313 | "hGPR_with_tGPROdd" , |
| 25314 | "hGPR_with_tcGPR" , |
| 25315 | "tGPR_with_tGPREven" , |
| 25316 | "GPR" , |
| 25317 | "GPRwithZR" , |
| 25318 | "GPRwithAPSR_with_GPRwithZR" , |
| 25319 | "DQuad_with_dsub_0_in_DPR_8" , |
| 25320 | "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR" , |
| 25321 | "HPR" , |
| 25322 | "DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR" , |
| 25323 | "DPair_with_ssub_0" , |
| 25324 | "DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR" , |
| 25325 | "DPairSpc_with_ssub_0" , |
| 25326 | "DQuad_with_ssub_0" , |
| 25327 | "DTripleSpc_with_ssub_0" , |
| 25328 | "QQQQPR_with_ssub_0" , |
| 25329 | "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR" , |
| 25330 | "DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR" , |
| 25331 | "DTriple_with_qsub_0_in_QPR" , |
| 25332 | "DPR" , |
| 25333 | }; |
| 25334 | return PressureNameTable[Idx]; |
| 25335 | } |
| 25336 | |
| 25337 | // Get the register unit pressure limit for this dimension. |
| 25338 | // This limit must be adjusted dynamically for reserved registers. |
| 25339 | unsigned ARMGenRegisterInfo:: |
| 25340 | getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const { |
| 25341 | static const uint8_t PressureLimitTable[] = { |
| 25342 | 1, // 0: FPCXTRegs |
| 25343 | 1, // 1: GPRlr |
| 25344 | 1, // 2: VCCR |
| 25345 | 1, // 3: hGPR_and_tGPRwithpc |
| 25346 | 2, // 4: cl_FPSCR_NZCV |
| 25347 | 2, // 5: GPRsp |
| 25348 | 6, // 6: tGPROdd |
| 25349 | 6, // 7: tcGPR |
| 25350 | 8, // 8: hGPR |
| 25351 | 10, // 9: tGPROdd_with_tcGPR |
| 25352 | 11, // 10: tGPR |
| 25353 | 11, // 11: tGPR_with_tcGPR |
| 25354 | 11, // 12: tGPREven |
| 25355 | 12, // 13: hGPR_with_tGPREven |
| 25356 | 12, // 14: hGPR_with_tGPROdd |
| 25357 | 12, // 15: hGPR_with_tcGPR |
| 25358 | 13, // 16: tGPR_with_tGPREven |
| 25359 | 17, // 17: GPR |
| 25360 | 17, // 18: GPRwithZR |
| 25361 | 17, // 19: GPRwithAPSR_with_GPRwithZR |
| 25362 | 24, // 20: DQuad_with_dsub_0_in_DPR_8 |
| 25363 | 32, // 21: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 25364 | 32, // 22: HPR |
| 25365 | 34, // 23: DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25366 | 34, // 24: DPair_with_ssub_0 |
| 25367 | 36, // 25: DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25368 | 36, // 26: DPairSpc_with_ssub_0 |
| 25369 | 38, // 27: DQuad_with_ssub_0 |
| 25370 | 40, // 28: DTripleSpc_with_ssub_0 |
| 25371 | 44, // 29: QQQQPR_with_ssub_0 |
| 25372 | 60, // 30: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25373 | 62, // 31: DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 25374 | 62, // 32: DTriple_with_qsub_0_in_QPR |
| 25375 | 64, // 33: DPR |
| 25376 | }; |
| 25377 | return PressureLimitTable[Idx]; |
| 25378 | } |
| 25379 | |
| 25380 | /// Table of pressure sets per register class or unit. |
| 25381 | static const int RCSetsTable[] = { |
| 25382 | /* 0 */ 0, -1, |
| 25383 | /* 2 */ 2, -1, |
| 25384 | /* 4 */ 4, -1, |
| 25385 | /* 6 */ 8, 13, 14, 15, 17, 18, -1, |
| 25386 | /* 13 */ 10, 11, 16, 17, 18, -1, |
| 25387 | /* 19 */ 3, 8, 10, 11, 13, 14, 15, 16, 17, 18, -1, |
| 25388 | /* 30 */ 17, 19, -1, |
| 25389 | /* 33 */ 6, 9, 10, 14, 17, 18, 19, -1, |
| 25390 | /* 41 */ 7, 9, 11, 12, 15, 17, 18, 19, -1, |
| 25391 | /* 50 */ 8, 13, 14, 15, 17, 18, 19, -1, |
| 25392 | /* 58 */ 6, 8, 9, 10, 13, 14, 15, 17, 18, 19, -1, |
| 25393 | /* 69 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 17, 18, 19, -1, |
| 25394 | /* 82 */ 10, 11, 16, 17, 18, 19, -1, |
| 25395 | /* 89 */ 10, 11, 12, 13, 16, 17, 18, 19, -1, |
| 25396 | /* 98 */ 6, 9, 10, 11, 14, 16, 17, 18, 19, -1, |
| 25397 | /* 108 */ 7, 9, 11, 12, 15, 16, 17, 18, 19, -1, |
| 25398 | /* 118 */ 7, 9, 10, 11, 12, 15, 16, 17, 18, 19, -1, |
| 25399 | /* 129 */ 7, 9, 11, 12, 13, 15, 16, 17, 18, 19, -1, |
| 25400 | /* 140 */ 7, 9, 10, 11, 12, 13, 15, 16, 17, 18, 19, -1, |
| 25401 | /* 152 */ 6, 7, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, -1, |
| 25402 | /* 165 */ 1, 8, 12, 13, 14, 15, 16, 17, 18, 19, -1, |
| 25403 | /* 176 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19, -1, |
| 25404 | /* 190 */ 31, 33, -1, |
| 25405 | /* 193 */ 20, 22, 24, 26, 27, 28, 29, 32, 33, -1, |
| 25406 | /* 203 */ 25, 27, 28, 29, 30, 31, 32, 33, -1, |
| 25407 | /* 212 */ 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| 25408 | /* 223 */ 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| 25409 | /* 236 */ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| 25410 | }; |
| 25411 | |
| 25412 | /// Get the dimensions of register pressure impacted by this register class. |
| 25413 | /// Returns a -1 terminated array of pressure set IDs |
| 25414 | const int *ARMGenRegisterInfo:: |
| 25415 | getRegClassPressureSets(const TargetRegisterClass *RC) const { |
| 25416 | static const uint8_t RCSetStartTable[] = { |
| 25417 | 194,1,194,1,10,30,38,193,37,10,1,1,38,10,37,37,10,37,13,1,6,82,91,50,6,6,91,50,33,50,6,108,50,166,89,98,118,129,1,166,58,140,152,1,0,165,69,2,4,19,176,191,194,193,37,37,82,50,41,118,50,69,191,196,194,193,193,191,195,191,194,193,194,194,193,193,191,191,198,196,200,195,190,196,194,194,193,193,195,212,193,237,194,193,193,193,236,193,193,236,191,198,196,194,193,193,193,191,197,196,191,207,195,194,193,203,196,193,223,194,193,237,193,236,193,236,193,236,191,199,198,196,194,194,193,193,193,}; |
| 25418 | return &RCSetsTable[RCSetStartTable[RC->getID()]]; |
| 25419 | } |
| 25420 | |
| 25421 | /// Get the dimensions of register pressure impacted by this register unit. |
| 25422 | /// Returns a -1 terminated array of pressure set IDs |
| 25423 | const int *ARMGenRegisterInfo:: |
| 25424 | getRegUnitPressureSets(unsigned RegUnit) const { |
| 25425 | assert(RegUnit < 86 && "invalid register unit" ); |
| 25426 | static const uint8_t RUSetStartTable[] = { |
| 25427 | 1,30,1,0,1,1,1,1,4,4,1,1,1,165,19,1,69,1,2,38,193,193,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,237,237,237,237,237,237,237,223,212,203,205,206,206,207,207,207,207,207,207,207,207,207,190,1,1,1,1,1,140,152,140,152,89,98,89,98,166,58,166,58,176,}; |
| 25428 | return &RCSetsTable[RUSetStartTable[RegUnit]]; |
| 25429 | } |
| 25430 | |
| 25431 | extern const MCRegisterDesc ARMRegDesc[]; |
| 25432 | extern const int16_t ARMRegDiffLists[]; |
| 25433 | extern const LaneBitmask ARMLaneMaskLists[]; |
| 25434 | extern const char ARMRegStrings[]; |
| 25435 | extern const char ARMRegClassStrings[]; |
| 25436 | extern const MCPhysReg ARMRegUnitRoots[][2]; |
| 25437 | extern const uint16_t ARMSubRegIdxLists[]; |
| 25438 | extern const uint16_t ARMRegEncodingTable[]; |
| 25439 | // ARM Dwarf<->LLVM register mappings. |
| 25440 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[]; |
| 25441 | extern const unsigned ARMDwarfFlavour0Dwarf2LSize; |
| 25442 | |
| 25443 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[]; |
| 25444 | extern const unsigned ARMEHFlavour0Dwarf2LSize; |
| 25445 | |
| 25446 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[]; |
| 25447 | extern const unsigned ARMDwarfFlavour0L2DwarfSize; |
| 25448 | |
| 25449 | extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[]; |
| 25450 | extern const unsigned ARMEHFlavour0L2DwarfSize; |
| 25451 | |
| 25452 | ARMGenRegisterInfo:: |
| 25453 | ARMGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour, |
| 25454 | unsigned PC, unsigned HwMode) |
| 25455 | : TargetRegisterInfo(&ARMRegInfoDesc, RegisterClasses, RegisterClasses+137, |
| 25456 | SubRegIndexNameTable, SubRegIdxRangeTable, SubRegIndexLaneMaskTable, |
| 25457 | LaneBitmask(0xFFFFFFFFFFFFFFFF), RegClassInfos, VTLists, HwMode) { |
| 25458 | InitMCRegisterInfo(ARMRegDesc, 296, RA, PC, |
| 25459 | ARMMCRegisterClasses, 137, |
| 25460 | ARMRegUnitRoots, |
| 25461 | 86, |
| 25462 | ARMRegDiffLists, |
| 25463 | ARMLaneMaskLists, |
| 25464 | ARMRegStrings, |
| 25465 | ARMRegClassStrings, |
| 25466 | ARMSubRegIdxLists, |
| 25467 | 57, |
| 25468 | ARMRegEncodingTable); |
| 25469 | |
| 25470 | switch (DwarfFlavour) { |
| 25471 | default: |
| 25472 | llvm_unreachable("Unknown DWARF flavour" ); |
| 25473 | case 0: |
| 25474 | mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false); |
| 25475 | break; |
| 25476 | } |
| 25477 | switch (EHFlavour) { |
| 25478 | default: |
| 25479 | llvm_unreachable("Unknown DWARF flavour" ); |
| 25480 | case 0: |
| 25481 | mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true); |
| 25482 | break; |
| 25483 | } |
| 25484 | switch (DwarfFlavour) { |
| 25485 | default: |
| 25486 | llvm_unreachable("Unknown DWARF flavour" ); |
| 25487 | case 0: |
| 25488 | mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false); |
| 25489 | break; |
| 25490 | } |
| 25491 | switch (EHFlavour) { |
| 25492 | default: |
| 25493 | llvm_unreachable("Unknown DWARF flavour" ); |
| 25494 | case 0: |
| 25495 | mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true); |
| 25496 | break; |
| 25497 | } |
| 25498 | } |
| 25499 | |
| 25500 | static const MCPhysReg CSR_AAPCS_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25501 | static const uint32_t CSR_AAPCS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25502 | static const MCPhysReg CSR_AAPCS_FP_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::FPSCR, ARM::FPEXC, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25503 | static const uint32_t CSR_AAPCS_FP_RegMask[] = { 0xfff02140, 0xfe00000f, 0xffdfe001, 0xffffffff, 0x07f0000f, 0xffbc00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25504 | static const MCPhysReg CSR_AAPCS_SplitPush_R7_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25505 | static const uint32_t CSR_AAPCS_SplitPush_R7_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25506 | static const MCPhysReg CSR_AAPCS_SplitPush_R11_SaveList[] = { ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::LR, ARM::R11, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25507 | static const uint32_t CSR_AAPCS_SplitPush_R11_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25508 | static const MCPhysReg CSR_AAPCS_SwiftError_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25509 | static const uint32_t CSR_AAPCS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25510 | static const MCPhysReg CSR_AAPCS_SwiftTail_SaveList[] = { ARM::LR, ARM::R11, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25511 | static const uint32_t CSR_AAPCS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25512 | static const MCPhysReg CSR_AAPCS_ThisReturn_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 }; |
| 25513 | static const uint32_t CSR_AAPCS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe201, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25514 | static const MCPhysReg CSR_ATPCS_SplitPush_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25515 | static const uint32_t CSR_ATPCS_SplitPush_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25516 | static const MCPhysReg CSR_ATPCS_SplitPush_FP_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::FPSCR, ARM::FPEXC, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25517 | static const uint32_t CSR_ATPCS_SplitPush_FP_RegMask[] = { 0xfff02140, 0xfe00000f, 0xffdfe001, 0xffffffff, 0x07f0000f, 0xffbc00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25518 | static const MCPhysReg CSR_ATPCS_SplitPush_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25519 | static const uint32_t CSR_ATPCS_SplitPush_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25520 | static const MCPhysReg CSR_ATPCS_SplitPush_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25521 | static const uint32_t CSR_ATPCS_SplitPush_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25522 | static const MCPhysReg CSR_FIQ_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 }; |
| 25523 | static const uint32_t CSR_FIQ_RegMask[] = { 0x00002000, 0x00000000, 0x0011fe00, 0x00000000, 0x00000000, 0x000f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 25524 | static const MCPhysReg CSR_FIQ_FP_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25525 | static const uint32_t CSR_FIQ_FP_RegMask[] = { 0xfff02140, 0xfe00000f, 0xffd1fe01, 0xffffffff, 0x07f0000f, 0xff8f00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25526 | static const MCPhysReg CSR_FIQ_FP_NEON_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, 0 }; |
| 25527 | static const uint32_t CSR_FIQ_FP_NEON_RegMask[] = { 0xfff02140, 0xfe0fffff, 0xffd1ffff, 0xffffffff, 0xffffffff, 0xff8fffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25528 | static const MCPhysReg CSR_FPRegs_SaveList[] = { ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, 0 }; |
| 25529 | static const uint32_t CSR_FPRegs_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffc001ff, 0xffffffff, 0xffffffff, 0xff80ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25530 | static const MCPhysReg CSR_FP_Interrupt_Regs_SaveList[] = { ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25531 | static const uint32_t CSR_FP_Interrupt_Regs_RegMask[] = { 0xfff00140, 0xfe00000f, 0xffc00001, 0xffffffff, 0x07f0000f, 0xff8000f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25532 | static const MCPhysReg CSR_FP_NEON_Interrupt_Regs_SaveList[] = { ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, 0 }; |
| 25533 | static const uint32_t CSR_FP_NEON_Interrupt_Regs_RegMask[] = { 0xfff00140, 0xfe0fffff, 0xffc001ff, 0xffffffff, 0xffffffff, 0xff80ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25534 | static const MCPhysReg CSR_GenericInt_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 }; |
| 25535 | static const uint32_t CSR_GenericInt_RegMask[] = { 0x00002000, 0x00000000, 0x003ffe00, 0x00000000, 0x00000000, 0x003f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 25536 | static const MCPhysReg CSR_GenericInt_FP_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25537 | static const uint32_t CSR_GenericInt_FP_RegMask[] = { 0xfff02140, 0xfe00000f, 0xfffffe01, 0xffffffff, 0x07f0000f, 0xffbf00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25538 | static const MCPhysReg CSR_GenericInt_FP_NEON_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::FPSCR, ARM::FPEXC, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, 0 }; |
| 25539 | static const uint32_t CSR_GenericInt_FP_NEON_RegMask[] = { 0xfff02140, 0xfe0fffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffbfffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25540 | static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 }; |
| 25541 | static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 25542 | static const MCPhysReg CSR_Win_AAPCS_CFGuard_Check_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25543 | static const uint32_t CSR_Win_AAPCS_CFGuard_Check_RegMask[] = { 0xfff02000, 0xfe00000f, 0xffdfe001, 0xffffffff, 0x07f0000f, 0xffbc00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| 25544 | static const MCPhysReg CSR_Win_SplitFP_SaveList[] = { ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::LR, ARM::R11, 0 }; |
| 25545 | static const uint32_t CSR_Win_SplitFP_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25546 | static const MCPhysReg CSR_iOS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25547 | static const uint32_t CSR_iOS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25548 | static const MCPhysReg CSR_iOS_CXX_TLS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R12, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25549 | static const uint32_t CSR_iOS_CXX_TLS_RegMask[] = { 0xfff02000, 0xfe0fffff, 0xfffffdff, 0xffffffff, 0xffffffff, 0xffbeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25550 | static const MCPhysReg CSR_iOS_CXX_TLS_PE_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R7, ARM::R5, ARM::R4, 0 }; |
| 25551 | static const uint32_t CSR_iOS_CXX_TLS_PE_RegMask[] = { 0x00002000, 0x00000000, 0x00316000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 25552 | static const MCPhysReg CSR_iOS_CXX_TLS_ViaCopy_SaveList[] = { ARM::R6, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25553 | static const uint32_t CSR_iOS_CXX_TLS_ViaCopy_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffce9dff, 0xffffffff, 0xffffffff, 0xff92ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25554 | static const MCPhysReg CSR_iOS_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25555 | static const uint32_t CSR_iOS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x0019e001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25556 | static const MCPhysReg CSR_iOS_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| 25557 | static const uint32_t CSR_iOS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0013e001, 0xc03fffc0, 0x0700000f, 0x800c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25558 | static const MCPhysReg CSR_iOS_TLSCall_SaveList[] = { ARM::LR, ARM::SP, ARM::R11, ARM::R10, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| 25559 | static const uint32_t CSR_iOS_TLSCall_RegMask[] = { 0xfff12000, 0xfe0fffff, 0xffdbfdff, 0xffffffff, 0xffffffff, 0xffaeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| 25560 | static const MCPhysReg CSR_iOS_ThisReturn_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 }; |
| 25561 | static const uint32_t CSR_iOS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be201, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| 25562 | |
| 25563 | |
| 25564 | ArrayRef<const uint32_t *> ARMGenRegisterInfo::getRegMasks() const { |
| 25565 | static const uint32_t *const Masks[] = { |
| 25566 | CSR_AAPCS_RegMask, |
| 25567 | CSR_AAPCS_FP_RegMask, |
| 25568 | CSR_AAPCS_SplitPush_R7_RegMask, |
| 25569 | CSR_AAPCS_SplitPush_R11_RegMask, |
| 25570 | CSR_AAPCS_SwiftError_RegMask, |
| 25571 | CSR_AAPCS_SwiftTail_RegMask, |
| 25572 | CSR_AAPCS_ThisReturn_RegMask, |
| 25573 | CSR_ATPCS_SplitPush_RegMask, |
| 25574 | CSR_ATPCS_SplitPush_FP_RegMask, |
| 25575 | CSR_ATPCS_SplitPush_SwiftError_RegMask, |
| 25576 | CSR_ATPCS_SplitPush_SwiftTail_RegMask, |
| 25577 | CSR_FIQ_RegMask, |
| 25578 | CSR_FIQ_FP_RegMask, |
| 25579 | CSR_FIQ_FP_NEON_RegMask, |
| 25580 | CSR_FPRegs_RegMask, |
| 25581 | CSR_FP_Interrupt_Regs_RegMask, |
| 25582 | CSR_FP_NEON_Interrupt_Regs_RegMask, |
| 25583 | CSR_GenericInt_RegMask, |
| 25584 | CSR_GenericInt_FP_RegMask, |
| 25585 | CSR_GenericInt_FP_NEON_RegMask, |
| 25586 | CSR_NoRegs_RegMask, |
| 25587 | CSR_Win_AAPCS_CFGuard_Check_RegMask, |
| 25588 | CSR_Win_SplitFP_RegMask, |
| 25589 | CSR_iOS_RegMask, |
| 25590 | CSR_iOS_CXX_TLS_RegMask, |
| 25591 | CSR_iOS_CXX_TLS_PE_RegMask, |
| 25592 | CSR_iOS_CXX_TLS_ViaCopy_RegMask, |
| 25593 | CSR_iOS_SwiftError_RegMask, |
| 25594 | CSR_iOS_SwiftTail_RegMask, |
| 25595 | CSR_iOS_TLSCall_RegMask, |
| 25596 | CSR_iOS_ThisReturn_RegMask, |
| 25597 | }; |
| 25598 | return ArrayRef(Masks); |
| 25599 | } |
| 25600 | |
| 25601 | bool ARMGenRegisterInfo:: |
| 25602 | isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 25603 | return |
| 25604 | false; |
| 25605 | } |
| 25606 | |
| 25607 | bool ARMGenRegisterInfo:: |
| 25608 | isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const { |
| 25609 | return |
| 25610 | false; |
| 25611 | } |
| 25612 | |
| 25613 | bool ARMGenRegisterInfo:: |
| 25614 | isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 25615 | return |
| 25616 | false; |
| 25617 | } |
| 25618 | |
| 25619 | bool ARMGenRegisterInfo:: |
| 25620 | isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 25621 | return |
| 25622 | false; |
| 25623 | } |
| 25624 | |
| 25625 | bool ARMGenRegisterInfo:: |
| 25626 | isConstantPhysReg(MCRegister PhysReg) const { |
| 25627 | return |
| 25628 | false; |
| 25629 | } |
| 25630 | |
| 25631 | ArrayRef<const char *> ARMGenRegisterInfo::getRegMaskNames() const { |
| 25632 | static const char *Names[] = { |
| 25633 | "CSR_AAPCS" , |
| 25634 | "CSR_AAPCS_FP" , |
| 25635 | "CSR_AAPCS_SplitPush_R7" , |
| 25636 | "CSR_AAPCS_SplitPush_R11" , |
| 25637 | "CSR_AAPCS_SwiftError" , |
| 25638 | "CSR_AAPCS_SwiftTail" , |
| 25639 | "CSR_AAPCS_ThisReturn" , |
| 25640 | "CSR_ATPCS_SplitPush" , |
| 25641 | "CSR_ATPCS_SplitPush_FP" , |
| 25642 | "CSR_ATPCS_SplitPush_SwiftError" , |
| 25643 | "CSR_ATPCS_SplitPush_SwiftTail" , |
| 25644 | "CSR_FIQ" , |
| 25645 | "CSR_FIQ_FP" , |
| 25646 | "CSR_FIQ_FP_NEON" , |
| 25647 | "CSR_FPRegs" , |
| 25648 | "CSR_FP_Interrupt_Regs" , |
| 25649 | "CSR_FP_NEON_Interrupt_Regs" , |
| 25650 | "CSR_GenericInt" , |
| 25651 | "CSR_GenericInt_FP" , |
| 25652 | "CSR_GenericInt_FP_NEON" , |
| 25653 | "CSR_NoRegs" , |
| 25654 | "CSR_Win_AAPCS_CFGuard_Check" , |
| 25655 | "CSR_Win_SplitFP" , |
| 25656 | "CSR_iOS" , |
| 25657 | "CSR_iOS_CXX_TLS" , |
| 25658 | "CSR_iOS_CXX_TLS_PE" , |
| 25659 | "CSR_iOS_CXX_TLS_ViaCopy" , |
| 25660 | "CSR_iOS_SwiftError" , |
| 25661 | "CSR_iOS_SwiftTail" , |
| 25662 | "CSR_iOS_TLSCall" , |
| 25663 | "CSR_iOS_ThisReturn" , |
| 25664 | }; |
| 25665 | return ArrayRef(Names); |
| 25666 | } |
| 25667 | |
| 25668 | const ARMFrameLowering * |
| 25669 | ARMGenRegisterInfo::getFrameLowering(const MachineFunction &MF) { |
| 25670 | return static_cast<const ARMFrameLowering *>( |
| 25671 | MF.getSubtarget().getFrameLowering()); |
| 25672 | } |
| 25673 | |
| 25674 | } // end namespace llvm |
| 25675 | |
| 25676 | #endif // GET_REGINFO_TARGET_DESC |
| 25677 | |
| 25678 | |