1 | #ifdef GET_BankedRegsList_DECL |
2 | const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding); |
3 | const BankedReg *lookupBankedRegByName(StringRef Name); |
4 | #endif |
5 | |
6 | #ifdef GET_BankedRegsList_IMPL |
7 | constexpr BankedReg BankedRegsList[] = { |
8 | { "r8_usr" , 0x0 }, // 0 |
9 | { "r9_usr" , 0x1 }, // 1 |
10 | { "r10_usr" , 0x2 }, // 2 |
11 | { "r11_usr" , 0x3 }, // 3 |
12 | { "r12_usr" , 0x4 }, // 4 |
13 | { "sp_usr" , 0x5 }, // 5 |
14 | { "lr_usr" , 0x6 }, // 6 |
15 | { "r8_fiq" , 0x8 }, // 7 |
16 | { "r9_fiq" , 0x9 }, // 8 |
17 | { "r10_fiq" , 0xA }, // 9 |
18 | { "r11_fiq" , 0xB }, // 10 |
19 | { "r12_fiq" , 0xC }, // 11 |
20 | { "sp_fiq" , 0xD }, // 12 |
21 | { "lr_fiq" , 0xE }, // 13 |
22 | { "lr_irq" , 0x10 }, // 14 |
23 | { "sp_irq" , 0x11 }, // 15 |
24 | { "lr_svc" , 0x12 }, // 16 |
25 | { "sp_svc" , 0x13 }, // 17 |
26 | { "lr_abt" , 0x14 }, // 18 |
27 | { "sp_abt" , 0x15 }, // 19 |
28 | { "lr_und" , 0x16 }, // 20 |
29 | { "sp_und" , 0x17 }, // 21 |
30 | { "lr_mon" , 0x1C }, // 22 |
31 | { "sp_mon" , 0x1D }, // 23 |
32 | { "elr_hyp" , 0x1E }, // 24 |
33 | { "sp_hyp" , 0x1F }, // 25 |
34 | { "spsr_fiq" , 0x2E }, // 26 |
35 | { "spsr_irq" , 0x30 }, // 27 |
36 | { "spsr_svc" , 0x32 }, // 28 |
37 | { "spsr_abt" , 0x34 }, // 29 |
38 | { "spsr_und" , 0x36 }, // 30 |
39 | { "spsr_mon" , 0x3C }, // 31 |
40 | { "spsr_hyp" , 0x3E }, // 32 |
41 | }; |
42 | |
43 | const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding) { |
44 | struct KeyType { |
45 | uint8_t Encoding; |
46 | }; |
47 | KeyType Key = {Encoding}; |
48 | struct Comp { |
49 | bool operator()(const BankedReg &LHS, const KeyType &RHS) const { |
50 | if (LHS.Encoding < RHS.Encoding) |
51 | return true; |
52 | if (LHS.Encoding > RHS.Encoding) |
53 | return false; |
54 | return false; |
55 | } |
56 | }; |
57 | auto Table = ArrayRef(BankedRegsList); |
58 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
59 | if (Idx == Table.end() || |
60 | Key.Encoding != Idx->Encoding) |
61 | return nullptr; |
62 | |
63 | return &*Idx; |
64 | } |
65 | |
66 | const BankedReg *lookupBankedRegByName(StringRef Name) { |
67 | struct IndexType { |
68 | const char * Name; |
69 | unsigned _index; |
70 | }; |
71 | static const struct IndexType Index[] = { |
72 | { "ELR_HYP" , 24 }, |
73 | { "LR_ABT" , 18 }, |
74 | { "LR_FIQ" , 13 }, |
75 | { "LR_IRQ" , 14 }, |
76 | { "LR_MON" , 22 }, |
77 | { "LR_SVC" , 16 }, |
78 | { "LR_UND" , 20 }, |
79 | { "LR_USR" , 6 }, |
80 | { "R10_FIQ" , 9 }, |
81 | { "R10_USR" , 2 }, |
82 | { "R11_FIQ" , 10 }, |
83 | { "R11_USR" , 3 }, |
84 | { "R12_FIQ" , 11 }, |
85 | { "R12_USR" , 4 }, |
86 | { "R8_FIQ" , 7 }, |
87 | { "R8_USR" , 0 }, |
88 | { "R9_FIQ" , 8 }, |
89 | { "R9_USR" , 1 }, |
90 | { "SPSR_ABT" , 29 }, |
91 | { "SPSR_FIQ" , 26 }, |
92 | { "SPSR_HYP" , 32 }, |
93 | { "SPSR_IRQ" , 27 }, |
94 | { "SPSR_MON" , 31 }, |
95 | { "SPSR_SVC" , 28 }, |
96 | { "SPSR_UND" , 30 }, |
97 | { "SP_ABT" , 19 }, |
98 | { "SP_FIQ" , 12 }, |
99 | { "SP_HYP" , 25 }, |
100 | { "SP_IRQ" , 15 }, |
101 | { "SP_MON" , 23 }, |
102 | { "SP_SVC" , 17 }, |
103 | { "SP_UND" , 21 }, |
104 | { "SP_USR" , 5 }, |
105 | }; |
106 | |
107 | struct KeyType { |
108 | std::string Name; |
109 | }; |
110 | KeyType Key = {Name.upper()}; |
111 | struct Comp { |
112 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
113 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
114 | if (CmpName < 0) return true; |
115 | if (CmpName > 0) return false; |
116 | return false; |
117 | } |
118 | }; |
119 | auto Table = ArrayRef(Index); |
120 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
121 | if (Idx == Table.end() || |
122 | Key.Name != Idx->Name) |
123 | return nullptr; |
124 | |
125 | return &BankedRegsList[Idx->_index]; |
126 | } |
127 | #endif |
128 | |
129 | #ifdef GET_MClassSysRegsList_DECL |
130 | const MClassSysReg *lookupMClassSysRegByM1Encoding12(uint16_t M1Encoding12); |
131 | const MClassSysReg *lookupMClassSysRegByM2M3Encoding8(uint16_t M2M3Encoding8); |
132 | const MClassSysReg *lookupMClassSysRegByName(StringRef Name); |
133 | #endif |
134 | |
135 | #ifdef GET_MClassSysRegsList_IMPL |
136 | constexpr MClassSysReg MClassSysRegsList[] = { |
137 | { "apsr" , 0x800, 0x100, 0x800, {} }, // 0 |
138 | { "apsr_g" , 0x400, 0x0, 0x400, {ARM::FeatureDSP} }, // 1 |
139 | { "apsr_nzcvq" , 0x1800, 0x200, 0x800, {} }, // 2 |
140 | { "apsr_nzcvqg" , 0xC00, 0x300, 0xC00, {ARM::FeatureDSP} }, // 3 |
141 | { "basepri" , 0x811, 0x111, 0x811, {ARM::HasV7Ops} }, // 4 |
142 | { "basepri_max" , 0x812, 0x112, 0x812, {ARM::HasV7Ops} }, // 5 |
143 | { "basepri_ns" , 0x891, 0x191, 0x891, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 6 |
144 | { "control" , 0x814, 0x114, 0x814, {} }, // 7 |
145 | { "control_ns" , 0x894, 0x194, 0x894, {ARM::Feature8MSecExt} }, // 8 |
146 | { "eapsr" , 0x802, 0x102, 0x802, {} }, // 9 |
147 | { "eapsr_g" , 0x402, 0x2, 0x402, {ARM::FeatureDSP} }, // 10 |
148 | { "eapsr_nzcvq" , 0x1802, 0x202, 0x802, {} }, // 11 |
149 | { "eapsr_nzcvqg" , 0xC02, 0x302, 0xC02, {ARM::FeatureDSP} }, // 12 |
150 | { "epsr" , 0x806, 0x106, 0x806, {} }, // 13 |
151 | { "faultmask" , 0x813, 0x113, 0x813, {ARM::HasV7Ops} }, // 14 |
152 | { "faultmask_ns" , 0x893, 0x193, 0x893, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 15 |
153 | { "iapsr" , 0x801, 0x101, 0x801, {} }, // 16 |
154 | { "iapsr_g" , 0x401, 0x1, 0x401, {ARM::FeatureDSP} }, // 17 |
155 | { "iapsr_nzcvq" , 0x1801, 0x201, 0x801, {} }, // 18 |
156 | { "iapsr_nzcvqg" , 0xC01, 0x301, 0xC01, {ARM::FeatureDSP} }, // 19 |
157 | { "iepsr" , 0x807, 0x107, 0x807, {} }, // 20 |
158 | { "ipsr" , 0x805, 0x105, 0x805, {} }, // 21 |
159 | { "msp" , 0x808, 0x108, 0x808, {} }, // 22 |
160 | { "msplim" , 0x80A, 0x10A, 0x80A, {ARM::HasV8MBaselineOps} }, // 23 |
161 | { "msplim_ns" , 0x88A, 0x18A, 0x88A, {ARM::Feature8MSecExt, ARM::HasV8MBaselineOps} }, // 24 |
162 | { "msp_ns" , 0x888, 0x188, 0x888, {ARM::Feature8MSecExt} }, // 25 |
163 | { "pac_key_p_0" , 0x820, 0x120, 0x820, {ARM::FeaturePACBTI} }, // 26 |
164 | { "pac_key_p_0_ns" , 0x8A0, 0x1A0, 0x8A0, {ARM::FeaturePACBTI} }, // 27 |
165 | { "pac_key_p_1" , 0x821, 0x121, 0x821, {ARM::FeaturePACBTI} }, // 28 |
166 | { "pac_key_p_1_ns" , 0x8A1, 0x1A1, 0x8A1, {ARM::FeaturePACBTI} }, // 29 |
167 | { "pac_key_p_2" , 0x822, 0x122, 0x822, {ARM::FeaturePACBTI} }, // 30 |
168 | { "pac_key_p_2_ns" , 0x8A2, 0x1A2, 0x8A2, {ARM::FeaturePACBTI} }, // 31 |
169 | { "pac_key_p_3" , 0x823, 0x123, 0x823, {ARM::FeaturePACBTI} }, // 32 |
170 | { "pac_key_p_3_ns" , 0x8A3, 0x1A3, 0x8A3, {ARM::FeaturePACBTI} }, // 33 |
171 | { "pac_key_u_0" , 0x824, 0x124, 0x824, {ARM::FeaturePACBTI} }, // 34 |
172 | { "pac_key_u_0_ns" , 0x8A4, 0x1A4, 0x8A4, {ARM::FeaturePACBTI} }, // 35 |
173 | { "pac_key_u_1" , 0x825, 0x125, 0x825, {ARM::FeaturePACBTI} }, // 36 |
174 | { "pac_key_u_1_ns" , 0x8A5, 0x1A5, 0x8A5, {ARM::FeaturePACBTI} }, // 37 |
175 | { "pac_key_u_2" , 0x826, 0x126, 0x826, {ARM::FeaturePACBTI} }, // 38 |
176 | { "pac_key_u_2_ns" , 0x8A6, 0x1A6, 0x8A6, {ARM::FeaturePACBTI} }, // 39 |
177 | { "pac_key_u_3" , 0x827, 0x127, 0x827, {ARM::FeaturePACBTI} }, // 40 |
178 | { "pac_key_u_3_ns" , 0x8A7, 0x1A7, 0x8A7, {ARM::FeaturePACBTI} }, // 41 |
179 | { "primask" , 0x810, 0x110, 0x810, {} }, // 42 |
180 | { "primask_ns" , 0x890, 0x190, 0x890, {} }, // 43 |
181 | { "psp" , 0x809, 0x109, 0x809, {} }, // 44 |
182 | { "psplim" , 0x80B, 0x10B, 0x80B, {ARM::HasV8MBaselineOps} }, // 45 |
183 | { "psplim_ns" , 0x88B, 0x18B, 0x88B, {ARM::Feature8MSecExt, ARM::HasV8MBaselineOps} }, // 46 |
184 | { "psp_ns" , 0x889, 0x189, 0x889, {ARM::Feature8MSecExt} }, // 47 |
185 | { "sp_ns" , 0x898, 0x198, 0x898, {ARM::Feature8MSecExt} }, // 48 |
186 | { "xpsr" , 0x803, 0x103, 0x803, {} }, // 49 |
187 | { "xpsr_g" , 0x403, 0x3, 0x403, {ARM::FeatureDSP} }, // 50 |
188 | { "xpsr_nzcvq" , 0x1803, 0x203, 0x803, {} }, // 51 |
189 | { "xpsr_nzcvqg" , 0xC03, 0x303, 0xC03, {ARM::FeatureDSP} }, // 52 |
190 | }; |
191 | |
192 | const MClassSysReg *lookupMClassSysRegByM1Encoding12(uint16_t M1Encoding12) { |
193 | struct IndexType { |
194 | uint16_t M1Encoding12; |
195 | unsigned _index; |
196 | }; |
197 | static const struct IndexType Index[] = { |
198 | { 0x400, 1 }, |
199 | { 0x401, 17 }, |
200 | { 0x402, 10 }, |
201 | { 0x403, 50 }, |
202 | { 0x800, 0 }, |
203 | { 0x801, 16 }, |
204 | { 0x802, 9 }, |
205 | { 0x803, 49 }, |
206 | { 0x805, 21 }, |
207 | { 0x806, 13 }, |
208 | { 0x807, 20 }, |
209 | { 0x808, 22 }, |
210 | { 0x809, 44 }, |
211 | { 0x80A, 23 }, |
212 | { 0x80B, 45 }, |
213 | { 0x810, 42 }, |
214 | { 0x811, 4 }, |
215 | { 0x812, 5 }, |
216 | { 0x813, 14 }, |
217 | { 0x814, 7 }, |
218 | { 0x820, 26 }, |
219 | { 0x821, 28 }, |
220 | { 0x822, 30 }, |
221 | { 0x823, 32 }, |
222 | { 0x824, 34 }, |
223 | { 0x825, 36 }, |
224 | { 0x826, 38 }, |
225 | { 0x827, 40 }, |
226 | { 0x888, 25 }, |
227 | { 0x889, 47 }, |
228 | { 0x88A, 24 }, |
229 | { 0x88B, 46 }, |
230 | { 0x890, 43 }, |
231 | { 0x891, 6 }, |
232 | { 0x893, 15 }, |
233 | { 0x894, 8 }, |
234 | { 0x898, 48 }, |
235 | { 0x8A0, 27 }, |
236 | { 0x8A1, 29 }, |
237 | { 0x8A2, 31 }, |
238 | { 0x8A3, 33 }, |
239 | { 0x8A4, 35 }, |
240 | { 0x8A5, 37 }, |
241 | { 0x8A6, 39 }, |
242 | { 0x8A7, 41 }, |
243 | { 0xC00, 3 }, |
244 | { 0xC01, 19 }, |
245 | { 0xC02, 12 }, |
246 | { 0xC03, 52 }, |
247 | { 0x1800, 2 }, |
248 | { 0x1801, 18 }, |
249 | { 0x1802, 11 }, |
250 | { 0x1803, 51 }, |
251 | }; |
252 | |
253 | struct KeyType { |
254 | uint16_t M1Encoding12; |
255 | }; |
256 | KeyType Key = {M1Encoding12}; |
257 | struct Comp { |
258 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
259 | if (LHS.M1Encoding12 < RHS.M1Encoding12) |
260 | return true; |
261 | if (LHS.M1Encoding12 > RHS.M1Encoding12) |
262 | return false; |
263 | return false; |
264 | } |
265 | }; |
266 | auto Table = ArrayRef(Index); |
267 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
268 | if (Idx == Table.end() || |
269 | Key.M1Encoding12 != Idx->M1Encoding12) |
270 | return nullptr; |
271 | |
272 | return &MClassSysRegsList[Idx->_index]; |
273 | } |
274 | |
275 | const MClassSysReg *lookupMClassSysRegByM2M3Encoding8(uint16_t M2M3Encoding8) { |
276 | struct IndexType { |
277 | uint16_t M2M3Encoding8; |
278 | unsigned _index; |
279 | }; |
280 | static const struct IndexType Index[] = { |
281 | { 0x0, 1 }, |
282 | { 0x1, 17 }, |
283 | { 0x2, 10 }, |
284 | { 0x3, 50 }, |
285 | { 0x100, 0 }, |
286 | { 0x101, 16 }, |
287 | { 0x102, 9 }, |
288 | { 0x103, 49 }, |
289 | { 0x105, 21 }, |
290 | { 0x106, 13 }, |
291 | { 0x107, 20 }, |
292 | { 0x108, 22 }, |
293 | { 0x109, 44 }, |
294 | { 0x10A, 23 }, |
295 | { 0x10B, 45 }, |
296 | { 0x110, 42 }, |
297 | { 0x111, 4 }, |
298 | { 0x112, 5 }, |
299 | { 0x113, 14 }, |
300 | { 0x114, 7 }, |
301 | { 0x120, 26 }, |
302 | { 0x121, 28 }, |
303 | { 0x122, 30 }, |
304 | { 0x123, 32 }, |
305 | { 0x124, 34 }, |
306 | { 0x125, 36 }, |
307 | { 0x126, 38 }, |
308 | { 0x127, 40 }, |
309 | { 0x188, 25 }, |
310 | { 0x189, 47 }, |
311 | { 0x18A, 24 }, |
312 | { 0x18B, 46 }, |
313 | { 0x190, 43 }, |
314 | { 0x191, 6 }, |
315 | { 0x193, 15 }, |
316 | { 0x194, 8 }, |
317 | { 0x198, 48 }, |
318 | { 0x1A0, 27 }, |
319 | { 0x1A1, 29 }, |
320 | { 0x1A2, 31 }, |
321 | { 0x1A3, 33 }, |
322 | { 0x1A4, 35 }, |
323 | { 0x1A5, 37 }, |
324 | { 0x1A6, 39 }, |
325 | { 0x1A7, 41 }, |
326 | { 0x200, 2 }, |
327 | { 0x201, 18 }, |
328 | { 0x202, 11 }, |
329 | { 0x203, 51 }, |
330 | { 0x300, 3 }, |
331 | { 0x301, 19 }, |
332 | { 0x302, 12 }, |
333 | { 0x303, 52 }, |
334 | }; |
335 | |
336 | struct KeyType { |
337 | uint16_t M2M3Encoding8; |
338 | }; |
339 | KeyType Key = {M2M3Encoding8}; |
340 | struct Comp { |
341 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
342 | if (LHS.M2M3Encoding8 < RHS.M2M3Encoding8) |
343 | return true; |
344 | if (LHS.M2M3Encoding8 > RHS.M2M3Encoding8) |
345 | return false; |
346 | return false; |
347 | } |
348 | }; |
349 | auto Table = ArrayRef(Index); |
350 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
351 | if (Idx == Table.end() || |
352 | Key.M2M3Encoding8 != Idx->M2M3Encoding8) |
353 | return nullptr; |
354 | |
355 | return &MClassSysRegsList[Idx->_index]; |
356 | } |
357 | |
358 | const MClassSysReg *lookupMClassSysRegByName(StringRef Name) { |
359 | struct IndexType { |
360 | const char * Name; |
361 | unsigned _index; |
362 | }; |
363 | static const struct IndexType Index[] = { |
364 | { "APSR" , 0 }, |
365 | { "APSR_G" , 1 }, |
366 | { "APSR_NZCVQ" , 2 }, |
367 | { "APSR_NZCVQG" , 3 }, |
368 | { "BASEPRI" , 4 }, |
369 | { "BASEPRI_MAX" , 5 }, |
370 | { "BASEPRI_NS" , 6 }, |
371 | { "CONTROL" , 7 }, |
372 | { "CONTROL_NS" , 8 }, |
373 | { "EAPSR" , 9 }, |
374 | { "EAPSR_G" , 10 }, |
375 | { "EAPSR_NZCVQ" , 11 }, |
376 | { "EAPSR_NZCVQG" , 12 }, |
377 | { "EPSR" , 13 }, |
378 | { "FAULTMASK" , 14 }, |
379 | { "FAULTMASK_NS" , 15 }, |
380 | { "IAPSR" , 16 }, |
381 | { "IAPSR_G" , 17 }, |
382 | { "IAPSR_NZCVQ" , 18 }, |
383 | { "IAPSR_NZCVQG" , 19 }, |
384 | { "IEPSR" , 20 }, |
385 | { "IPSR" , 21 }, |
386 | { "MSP" , 22 }, |
387 | { "MSPLIM" , 23 }, |
388 | { "MSPLIM_NS" , 24 }, |
389 | { "MSP_NS" , 25 }, |
390 | { "PAC_KEY_P_0" , 26 }, |
391 | { "PAC_KEY_P_0_NS" , 27 }, |
392 | { "PAC_KEY_P_1" , 28 }, |
393 | { "PAC_KEY_P_1_NS" , 29 }, |
394 | { "PAC_KEY_P_2" , 30 }, |
395 | { "PAC_KEY_P_2_NS" , 31 }, |
396 | { "PAC_KEY_P_3" , 32 }, |
397 | { "PAC_KEY_P_3_NS" , 33 }, |
398 | { "PAC_KEY_U_0" , 34 }, |
399 | { "PAC_KEY_U_0_NS" , 35 }, |
400 | { "PAC_KEY_U_1" , 36 }, |
401 | { "PAC_KEY_U_1_NS" , 37 }, |
402 | { "PAC_KEY_U_2" , 38 }, |
403 | { "PAC_KEY_U_2_NS" , 39 }, |
404 | { "PAC_KEY_U_3" , 40 }, |
405 | { "PAC_KEY_U_3_NS" , 41 }, |
406 | { "PRIMASK" , 42 }, |
407 | { "PRIMASK_NS" , 43 }, |
408 | { "PSP" , 44 }, |
409 | { "PSPLIM" , 45 }, |
410 | { "PSPLIM_NS" , 46 }, |
411 | { "PSP_NS" , 47 }, |
412 | { "SP_NS" , 48 }, |
413 | { "XPSR" , 49 }, |
414 | { "XPSR_G" , 50 }, |
415 | { "XPSR_NZCVQ" , 51 }, |
416 | { "XPSR_NZCVQG" , 52 }, |
417 | }; |
418 | |
419 | struct KeyType { |
420 | std::string Name; |
421 | }; |
422 | KeyType Key = {Name.upper()}; |
423 | struct Comp { |
424 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
425 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
426 | if (CmpName < 0) return true; |
427 | if (CmpName > 0) return false; |
428 | return false; |
429 | } |
430 | }; |
431 | auto Table = ArrayRef(Index); |
432 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
433 | if (Idx == Table.end() || |
434 | Key.Name != Idx->Name) |
435 | return nullptr; |
436 | |
437 | return &MClassSysRegsList[Idx->_index]; |
438 | } |
439 | #endif |
440 | |
441 | #undef GET_BankedRegsList_DECL |
442 | #undef GET_BankedRegsList_IMPL |
443 | #undef GET_MClassSysRegsList_DECL |
444 | #undef GET_MClassSysRegsList_IMPL |
445 | |