| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Assembly Matcher Source Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* From: BPF.td *| |
| 7 | |* *| |
| 8 | \*===----------------------------------------------------------------------===*/ |
| 9 | |
| 10 | |
| 11 | #ifdef GET_ASSEMBLER_HEADER |
| 12 | #undef GET_ASSEMBLER_HEADER |
| 13 | // This should be included into the middle of the declaration of |
| 14 | // your subclasses implementation of MCTargetAsmParser. |
| 15 | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
| 16 | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 17 | const OperandVector &Operands); |
| 18 | void convertToMapAndConstraints(unsigned Kind, |
| 19 | const OperandVector &Operands) override; |
| 20 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 21 | MCInst &Inst, |
| 22 | uint64_t &ErrorInfo, |
| 23 | FeatureBitset &MissingFeatures, |
| 24 | bool matchingInlineAsm, |
| 25 | unsigned VariantID = 0); |
| 26 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 27 | MCInst &Inst, |
| 28 | uint64_t &ErrorInfo, |
| 29 | bool matchingInlineAsm, |
| 30 | unsigned VariantID = 0) { |
| 31 | FeatureBitset MissingFeatures; |
| 32 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
| 33 | matchingInlineAsm, VariantID); |
| 34 | } |
| 35 | |
| 36 | #endif // GET_ASSEMBLER_HEADER |
| 37 | |
| 38 | |
| 39 | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
| 40 | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
| 41 | |
| 42 | Match_InvalidBrTarget, |
| 43 | Match_InvalidSImm16, |
| 44 | END_OPERAND_DIAGNOSTIC_TYPES |
| 45 | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
| 46 | |
| 47 | |
| 48 | #ifdef GET_REGISTER_MATCHER |
| 49 | #undef GET_REGISTER_MATCHER |
| 50 | |
| 51 | // Bits for subtarget features that participate in instruction matching. |
| 52 | enum SubtargetFeatureBits : uint8_t { |
| 53 | }; |
| 54 | |
| 55 | static MCRegister MatchRegisterName(StringRef Name) { |
| 56 | switch (Name.size()) { |
| 57 | default: break; |
| 58 | case 2: // 20 strings to match. |
| 59 | switch (Name[0]) { |
| 60 | default: break; |
| 61 | case 'r': // 10 strings to match. |
| 62 | switch (Name[1]) { |
| 63 | default: break; |
| 64 | case '0': // 1 string to match. |
| 65 | return BPF::R0; // "r0" |
| 66 | case '1': // 1 string to match. |
| 67 | return BPF::R1; // "r1" |
| 68 | case '2': // 1 string to match. |
| 69 | return BPF::R2; // "r2" |
| 70 | case '3': // 1 string to match. |
| 71 | return BPF::R3; // "r3" |
| 72 | case '4': // 1 string to match. |
| 73 | return BPF::R4; // "r4" |
| 74 | case '5': // 1 string to match. |
| 75 | return BPF::R5; // "r5" |
| 76 | case '6': // 1 string to match. |
| 77 | return BPF::R6; // "r6" |
| 78 | case '7': // 1 string to match. |
| 79 | return BPF::R7; // "r7" |
| 80 | case '8': // 1 string to match. |
| 81 | return BPF::R8; // "r8" |
| 82 | case '9': // 1 string to match. |
| 83 | return BPF::R9; // "r9" |
| 84 | } |
| 85 | break; |
| 86 | case 'w': // 10 strings to match. |
| 87 | switch (Name[1]) { |
| 88 | default: break; |
| 89 | case '0': // 1 string to match. |
| 90 | return BPF::W0; // "w0" |
| 91 | case '1': // 1 string to match. |
| 92 | return BPF::W1; // "w1" |
| 93 | case '2': // 1 string to match. |
| 94 | return BPF::W2; // "w2" |
| 95 | case '3': // 1 string to match. |
| 96 | return BPF::W3; // "w3" |
| 97 | case '4': // 1 string to match. |
| 98 | return BPF::W4; // "w4" |
| 99 | case '5': // 1 string to match. |
| 100 | return BPF::W5; // "w5" |
| 101 | case '6': // 1 string to match. |
| 102 | return BPF::W6; // "w6" |
| 103 | case '7': // 1 string to match. |
| 104 | return BPF::W7; // "w7" |
| 105 | case '8': // 1 string to match. |
| 106 | return BPF::W8; // "w8" |
| 107 | case '9': // 1 string to match. |
| 108 | return BPF::W9; // "w9" |
| 109 | } |
| 110 | break; |
| 111 | } |
| 112 | break; |
| 113 | case 3: // 4 strings to match. |
| 114 | switch (Name[0]) { |
| 115 | default: break; |
| 116 | case 'r': // 2 strings to match. |
| 117 | if (Name[1] != '1') |
| 118 | break; |
| 119 | switch (Name[2]) { |
| 120 | default: break; |
| 121 | case '0': // 1 string to match. |
| 122 | return BPF::R10; // "r10" |
| 123 | case '1': // 1 string to match. |
| 124 | return BPF::R11; // "r11" |
| 125 | } |
| 126 | break; |
| 127 | case 'w': // 2 strings to match. |
| 128 | if (Name[1] != '1') |
| 129 | break; |
| 130 | switch (Name[2]) { |
| 131 | default: break; |
| 132 | case '0': // 1 string to match. |
| 133 | return BPF::W10; // "w10" |
| 134 | case '1': // 1 string to match. |
| 135 | return BPF::W11; // "w11" |
| 136 | } |
| 137 | break; |
| 138 | } |
| 139 | break; |
| 140 | } |
| 141 | return BPF::NoRegister; |
| 142 | } |
| 143 | |
| 144 | #endif // GET_REGISTER_MATCHER |
| 145 | |
| 146 | |
| 147 | #ifdef GET_SUBTARGET_FEATURE_NAME |
| 148 | #undef GET_SUBTARGET_FEATURE_NAME |
| 149 | |
| 150 | // User-level names for subtarget features that participate in |
| 151 | // instruction matching. |
| 152 | static const char *getSubtargetFeatureName(uint64_t Val) { |
| 153 | return "(unknown)" ; |
| 154 | } |
| 155 | |
| 156 | #endif // GET_SUBTARGET_FEATURE_NAME |
| 157 | |
| 158 | |
| 159 | #ifdef GET_MATCHER_IMPLEMENTATION |
| 160 | #undef GET_MATCHER_IMPLEMENTATION |
| 161 | |
| 162 | enum { |
| 163 | Tie0_0_0, |
| 164 | Tie0_0_3, |
| 165 | Tie0_0_6, |
| 166 | Tie0_0_12, |
| 167 | Tie0_12_12, |
| 168 | }; |
| 169 | |
| 170 | static const uint8_t TiedAsmOperandTable[][3] = { |
| 171 | /* Tie0_0_0 */ { 0, 0, 0 }, |
| 172 | /* Tie0_0_3 */ { 0, 0, 3 }, |
| 173 | /* Tie0_0_6 */ { 0, 0, 6 }, |
| 174 | /* Tie0_0_12 */ { 0, 0, 12 }, |
| 175 | /* Tie0_12_12 */ { 0, 12, 12 }, |
| 176 | }; |
| 177 | |
| 178 | namespace { |
| 179 | enum OperatorConversionKind { |
| 180 | CVT_Done, |
| 181 | CVT_Reg, |
| 182 | CVT_Tied, |
| 183 | CVT_95_Reg, |
| 184 | CVT_95_addImmOperands, |
| 185 | CVT_imm_95_0, |
| 186 | CVT_NUM_CONVERTERS |
| 187 | }; |
| 188 | |
| 189 | enum InstructionConversionKind { |
| 190 | Convert__Reg1_0__Reg1_2, |
| 191 | Convert__Reg1_0__Imm1_2, |
| 192 | Convert__Reg1_0__Tie0_0_0__Reg1_3, |
| 193 | Convert__Reg1_0__Tie0_0_0__Imm1_3, |
| 194 | Convert__Reg1_0__Tie0_0_3, |
| 195 | Convert__Reg1_0__Tie0_0_0__Reg1_4, |
| 196 | Convert__Reg1_0__Tie0_0_0__Imm1_4, |
| 197 | Convert__Reg1_0__Reg1_5, |
| 198 | Convert__Reg1_0__Tie0_0_0__Reg1_5, |
| 199 | Convert__Reg1_0__Tie0_0_0__Imm1_5, |
| 200 | Convert__Reg1_0__Reg1_4__Imm1_5__Imm1_6, |
| 201 | Convert__Reg1_0__Reg1_4__SImm161_5__Tie0_0_6, |
| 202 | Convert__Reg1_0__Reg1_8__SImm161_9, |
| 203 | Convert__Reg1_0__Reg1_9__SImm161_10, |
| 204 | Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, |
| 205 | Convert__Reg1_10__Reg1_6__SImm161_7, |
| 206 | Convert__Imm1_10__Reg1_6__SImm161_7, |
| 207 | Convert__Imm1_1, |
| 208 | Convert__Reg1_1, |
| 209 | Convert_NoOperands, |
| 210 | Convert__BrTarget1_1, |
| 211 | Convert__Reg1_1__Reg1_3__BrTarget1_5, |
| 212 | Convert__Reg1_1__Imm1_3__BrTarget1_5, |
| 213 | Convert__Reg1_1__Reg1_4__BrTarget1_6, |
| 214 | Convert__Reg1_1__Imm1_4__BrTarget1_6, |
| 215 | Convert__Reg1_1__Reg1_5__BrTarget1_7, |
| 216 | Convert__Reg1_1__Imm1_5__BrTarget1_7, |
| 217 | Convert__Reg1_1__Imm1_2__Imm1_3, |
| 218 | Convert__Reg1_1__Reg1_2__SImm161_3, |
| 219 | Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, |
| 220 | Convert__Reg1_4__SImm161_5__Reg1_7, |
| 221 | Convert__imm_95_0__Reg1_9, |
| 222 | Convert__imm_95_0__Imm1_9, |
| 223 | Convert__Reg1_10__Reg1_7__SImm161_8, |
| 224 | CVT_NUM_SIGNATURES |
| 225 | }; |
| 226 | |
| 227 | } // end anonymous namespace |
| 228 | |
| 229 | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][9] = { |
| 230 | // Convert__Reg1_0__Reg1_2 |
| 231 | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_Done }, |
| 232 | // Convert__Reg1_0__Imm1_2 |
| 233 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
| 234 | // Convert__Reg1_0__Tie0_0_0__Reg1_3 |
| 235 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 3, CVT_Done }, |
| 236 | // Convert__Reg1_0__Tie0_0_0__Imm1_3 |
| 237 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 238 | // Convert__Reg1_0__Tie0_0_3 |
| 239 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_3, CVT_Done }, |
| 240 | // Convert__Reg1_0__Tie0_0_0__Reg1_4 |
| 241 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_Done }, |
| 242 | // Convert__Reg1_0__Tie0_0_0__Imm1_4 |
| 243 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 4, CVT_Done }, |
| 244 | // Convert__Reg1_0__Reg1_5 |
| 245 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_Done }, |
| 246 | // Convert__Reg1_0__Tie0_0_0__Reg1_5 |
| 247 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_Done }, |
| 248 | // Convert__Reg1_0__Tie0_0_0__Imm1_5 |
| 249 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 250 | // Convert__Reg1_0__Reg1_4__Imm1_5__Imm1_6 |
| 251 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, |
| 252 | // Convert__Reg1_0__Reg1_4__SImm161_5__Tie0_0_6 |
| 253 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Tied, Tie0_0_6, CVT_Done }, |
| 254 | // Convert__Reg1_0__Reg1_8__SImm161_9 |
| 255 | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_addImmOperands, 9, CVT_Done }, |
| 256 | // Convert__Reg1_0__Reg1_9__SImm161_10 |
| 257 | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_addImmOperands, 10, CVT_Done }, |
| 258 | // Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12 |
| 259 | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_addImmOperands, 10, CVT_Tied, Tie0_0_12, CVT_Done }, |
| 260 | // Convert__Reg1_10__Reg1_6__SImm161_7 |
| 261 | { CVT_95_Reg, 10, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done }, |
| 262 | // Convert__Imm1_10__Reg1_6__SImm161_7 |
| 263 | { CVT_95_addImmOperands, 10, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done }, |
| 264 | // Convert__Imm1_1 |
| 265 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 266 | // Convert__Reg1_1 |
| 267 | { CVT_95_Reg, 1, CVT_Done }, |
| 268 | // Convert_NoOperands |
| 269 | { CVT_Done }, |
| 270 | // Convert__BrTarget1_1 |
| 271 | { CVT_95_addImmOperands, 1, CVT_Done }, |
| 272 | // Convert__Reg1_1__Reg1_3__BrTarget1_5 |
| 273 | { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done }, |
| 274 | // Convert__Reg1_1__Imm1_3__BrTarget1_5 |
| 275 | { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, |
| 276 | // Convert__Reg1_1__Reg1_4__BrTarget1_6 |
| 277 | { CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 278 | // Convert__Reg1_1__Imm1_4__BrTarget1_6 |
| 279 | { CVT_95_Reg, 1, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 280 | // Convert__Reg1_1__Reg1_5__BrTarget1_7 |
| 281 | { CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 282 | // Convert__Reg1_1__Imm1_5__BrTarget1_7 |
| 283 | { CVT_95_Reg, 1, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 284 | // Convert__Reg1_1__Imm1_2__Imm1_3 |
| 285 | { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 286 | // Convert__Reg1_1__Reg1_2__SImm161_3 |
| 287 | { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
| 288 | // Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12 |
| 289 | { CVT_95_Reg, 12, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Tied, Tie0_12_12, CVT_Done }, |
| 290 | // Convert__Reg1_4__SImm161_5__Reg1_7 |
| 291 | { CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_Reg, 7, CVT_Done }, |
| 292 | // Convert__imm_95_0__Reg1_9 |
| 293 | { CVT_imm_95_0, 0, CVT_95_Reg, 9, CVT_Done }, |
| 294 | // Convert__imm_95_0__Imm1_9 |
| 295 | { CVT_imm_95_0, 0, CVT_95_addImmOperands, 9, CVT_Done }, |
| 296 | // Convert__Reg1_10__Reg1_7__SImm161_8 |
| 297 | { CVT_95_Reg, 10, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done }, |
| 298 | }; |
| 299 | |
| 300 | void BPFAsmParser:: |
| 301 | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 302 | const OperandVector &Operands) { |
| 303 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 304 | const uint8_t *Converter = ConversionTable[Kind]; |
| 305 | Inst.setOpcode(Opcode); |
| 306 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 307 | unsigned OpIdx = *(p + 1); |
| 308 | switch (*p) { |
| 309 | default: llvm_unreachable("invalid conversion entry!" ); |
| 310 | case CVT_Reg: |
| 311 | static_cast<BPFOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 312 | break; |
| 313 | case CVT_Tied: { |
| 314 | assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - |
| 315 | std::begin(TiedAsmOperandTable)) && |
| 316 | "Tied operand not found" ); |
| 317 | unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; |
| 318 | if (TiedResOpnd != (uint8_t)-1) |
| 319 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
| 320 | break; |
| 321 | } |
| 322 | case CVT_95_Reg: |
| 323 | static_cast<BPFOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 324 | break; |
| 325 | case CVT_95_addImmOperands: |
| 326 | static_cast<BPFOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
| 327 | break; |
| 328 | case CVT_imm_95_0: |
| 329 | Inst.addOperand(MCOperand::createImm(0)); |
| 330 | break; |
| 331 | } |
| 332 | } |
| 333 | } |
| 334 | |
| 335 | void BPFAsmParser:: |
| 336 | convertToMapAndConstraints(unsigned Kind, |
| 337 | const OperandVector &Operands) { |
| 338 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 339 | unsigned NumMCOperands = 0; |
| 340 | const uint8_t *Converter = ConversionTable[Kind]; |
| 341 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 342 | switch (*p) { |
| 343 | default: llvm_unreachable("invalid conversion entry!" ); |
| 344 | case CVT_Reg: |
| 345 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 346 | Operands[*(p + 1)]->setConstraint("r" ); |
| 347 | ++NumMCOperands; |
| 348 | break; |
| 349 | case CVT_Tied: |
| 350 | ++NumMCOperands; |
| 351 | break; |
| 352 | case CVT_95_Reg: |
| 353 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 354 | Operands[*(p + 1)]->setConstraint("r" ); |
| 355 | NumMCOperands += 1; |
| 356 | break; |
| 357 | case CVT_95_addImmOperands: |
| 358 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 359 | Operands[*(p + 1)]->setConstraint("m" ); |
| 360 | NumMCOperands += 1; |
| 361 | break; |
| 362 | case CVT_imm_95_0: |
| 363 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 364 | Operands[*(p + 1)]->setConstraint("" ); |
| 365 | ++NumMCOperands; |
| 366 | break; |
| 367 | } |
| 368 | } |
| 369 | } |
| 370 | |
| 371 | namespace { |
| 372 | |
| 373 | /// MatchClassKind - The kinds of classes which participate in |
| 374 | /// instruction matching. |
| 375 | enum MatchClassKind { |
| 376 | InvalidMatchClass = 0, |
| 377 | OptionalMatchClass = 1, |
| 378 | MCK__EXCLAIM_, // '!' |
| 379 | MCK__PCT_, // '%' |
| 380 | MCK__38_, // '&' |
| 381 | MCK__40_, // '(' |
| 382 | MCK__41_, // ')' |
| 383 | MCK__STAR_, // '*' |
| 384 | MCK__43_, // '+' |
| 385 | MCK__MINUS_, // '-' |
| 386 | MCK__47_, // '/' |
| 387 | MCK__LT_, // '<' |
| 388 | MCK__61_, // '=' |
| 389 | MCK__GT_, // '>' |
| 390 | MCK__91_, // '[' |
| 391 | MCK__93_, // ']' |
| 392 | MCK__94_, // '^' |
| 393 | MCK_addr_95_space_95_cast, // 'addr_space_cast' |
| 394 | MCK_atomic_95_fetch_95_add, // 'atomic_fetch_add' |
| 395 | MCK_atomic_95_fetch_95_and, // 'atomic_fetch_and' |
| 396 | MCK_atomic_95_fetch_95_or, // 'atomic_fetch_or' |
| 397 | MCK_atomic_95_fetch_95_xor, // 'atomic_fetch_xor' |
| 398 | MCK_be16, // 'be16' |
| 399 | MCK_be32, // 'be32' |
| 400 | MCK_be64, // 'be64' |
| 401 | MCK_bswap16, // 'bswap16' |
| 402 | MCK_bswap32, // 'bswap32' |
| 403 | MCK_bswap64, // 'bswap64' |
| 404 | MCK_call, // 'call' |
| 405 | MCK_callx, // 'callx' |
| 406 | MCK_cmpxchg32_95_32, // 'cmpxchg32_32' |
| 407 | MCK_cmpxchg_95_64, // 'cmpxchg_64' |
| 408 | MCK_exit, // 'exit' |
| 409 | MCK_goto, // 'goto' |
| 410 | MCK_gotol, // 'gotol' |
| 411 | MCK_if, // 'if' |
| 412 | MCK_ld_95_pseudo, // 'ld_pseudo' |
| 413 | MCK_le16, // 'le16' |
| 414 | MCK_le32, // 'le32' |
| 415 | MCK_le64, // 'le64' |
| 416 | MCK_lea, // 'lea' |
| 417 | MCK_ll, // 'll' |
| 418 | MCK_load_95_acquire, // 'load_acquire' |
| 419 | MCK_lock, // 'lock' |
| 420 | MCK_may_95_goto, // 'may_goto' |
| 421 | MCK_s, // 's' |
| 422 | MCK_s16, // 's16' |
| 423 | MCK_s32, // 's32' |
| 424 | MCK_s8, // 's8' |
| 425 | MCK_skb, // 'skb' |
| 426 | MCK_store_95_release, // 'store_release' |
| 427 | MCK_u16, // 'u16' |
| 428 | MCK_u32, // 'u32' |
| 429 | MCK_u64, // 'u64' |
| 430 | MCK_u8, // 'u8' |
| 431 | MCK_xchg32_95_32, // 'xchg32_32' |
| 432 | MCK_xchg_95_64, // 'xchg_64' |
| 433 | MCK__124_, // '|' |
| 434 | MCK_LAST_TOKEN = MCK__124_, |
| 435 | MCK_R0, // register class 'R0' |
| 436 | MCK_W0, // register class 'W0' |
| 437 | MCK_GPR, // register class 'GPR' |
| 438 | MCK_GPR32, // register class 'GPR32' |
| 439 | MCK_LAST_REGISTER = MCK_GPR32, |
| 440 | MCK_Imm, // user defined class 'ImmAsmOperand' |
| 441 | MCK_SImm16, // user defined class 'SImm16AsmOperand' |
| 442 | MCK_BrTarget, // user defined class 'anonymous_8672' |
| 443 | NumMatchClassKinds |
| 444 | }; |
| 445 | |
| 446 | } // end anonymous namespace |
| 447 | |
| 448 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
| 449 | return MCTargetAsmParser::Match_InvalidOperand; |
| 450 | } |
| 451 | |
| 452 | static MatchClassKind matchTokenString(StringRef Name) { |
| 453 | switch (Name.size()) { |
| 454 | default: break; |
| 455 | case 1: // 17 strings to match. |
| 456 | switch (Name[0]) { |
| 457 | default: break; |
| 458 | case '!': // 1 string to match. |
| 459 | return MCK__EXCLAIM_; // "!" |
| 460 | case '%': // 1 string to match. |
| 461 | return MCK__PCT_; // "%" |
| 462 | case '&': // 1 string to match. |
| 463 | return MCK__38_; // "&" |
| 464 | case '(': // 1 string to match. |
| 465 | return MCK__40_; // "(" |
| 466 | case ')': // 1 string to match. |
| 467 | return MCK__41_; // ")" |
| 468 | case '*': // 1 string to match. |
| 469 | return MCK__STAR_; // "*" |
| 470 | case '+': // 1 string to match. |
| 471 | return MCK__43_; // "+" |
| 472 | case '-': // 1 string to match. |
| 473 | return MCK__MINUS_; // "-" |
| 474 | case '/': // 1 string to match. |
| 475 | return MCK__47_; // "/" |
| 476 | case '<': // 1 string to match. |
| 477 | return MCK__LT_; // "<" |
| 478 | case '=': // 1 string to match. |
| 479 | return MCK__61_; // "=" |
| 480 | case '>': // 1 string to match. |
| 481 | return MCK__GT_; // ">" |
| 482 | case '[': // 1 string to match. |
| 483 | return MCK__91_; // "[" |
| 484 | case ']': // 1 string to match. |
| 485 | return MCK__93_; // "]" |
| 486 | case '^': // 1 string to match. |
| 487 | return MCK__94_; // "^" |
| 488 | case 's': // 1 string to match. |
| 489 | return MCK_s; // "s" |
| 490 | case '|': // 1 string to match. |
| 491 | return MCK__124_; // "|" |
| 492 | } |
| 493 | break; |
| 494 | case 2: // 4 strings to match. |
| 495 | switch (Name[0]) { |
| 496 | default: break; |
| 497 | case 'i': // 1 string to match. |
| 498 | if (Name[1] != 'f') |
| 499 | break; |
| 500 | return MCK_if; // "if" |
| 501 | case 'l': // 1 string to match. |
| 502 | if (Name[1] != 'l') |
| 503 | break; |
| 504 | return MCK_ll; // "ll" |
| 505 | case 's': // 1 string to match. |
| 506 | if (Name[1] != '8') |
| 507 | break; |
| 508 | return MCK_s8; // "s8" |
| 509 | case 'u': // 1 string to match. |
| 510 | if (Name[1] != '8') |
| 511 | break; |
| 512 | return MCK_u8; // "u8" |
| 513 | } |
| 514 | break; |
| 515 | case 3: // 7 strings to match. |
| 516 | switch (Name[0]) { |
| 517 | default: break; |
| 518 | case 'l': // 1 string to match. |
| 519 | if (memcmp(Name.data()+1, "ea" , 2) != 0) |
| 520 | break; |
| 521 | return MCK_lea; // "lea" |
| 522 | case 's': // 3 strings to match. |
| 523 | switch (Name[1]) { |
| 524 | default: break; |
| 525 | case '1': // 1 string to match. |
| 526 | if (Name[2] != '6') |
| 527 | break; |
| 528 | return MCK_s16; // "s16" |
| 529 | case '3': // 1 string to match. |
| 530 | if (Name[2] != '2') |
| 531 | break; |
| 532 | return MCK_s32; // "s32" |
| 533 | case 'k': // 1 string to match. |
| 534 | if (Name[2] != 'b') |
| 535 | break; |
| 536 | return MCK_skb; // "skb" |
| 537 | } |
| 538 | break; |
| 539 | case 'u': // 3 strings to match. |
| 540 | switch (Name[1]) { |
| 541 | default: break; |
| 542 | case '1': // 1 string to match. |
| 543 | if (Name[2] != '6') |
| 544 | break; |
| 545 | return MCK_u16; // "u16" |
| 546 | case '3': // 1 string to match. |
| 547 | if (Name[2] != '2') |
| 548 | break; |
| 549 | return MCK_u32; // "u32" |
| 550 | case '6': // 1 string to match. |
| 551 | if (Name[2] != '4') |
| 552 | break; |
| 553 | return MCK_u64; // "u64" |
| 554 | } |
| 555 | break; |
| 556 | } |
| 557 | break; |
| 558 | case 4: // 10 strings to match. |
| 559 | switch (Name[0]) { |
| 560 | default: break; |
| 561 | case 'b': // 3 strings to match. |
| 562 | if (Name[1] != 'e') |
| 563 | break; |
| 564 | switch (Name[2]) { |
| 565 | default: break; |
| 566 | case '1': // 1 string to match. |
| 567 | if (Name[3] != '6') |
| 568 | break; |
| 569 | return MCK_be16; // "be16" |
| 570 | case '3': // 1 string to match. |
| 571 | if (Name[3] != '2') |
| 572 | break; |
| 573 | return MCK_be32; // "be32" |
| 574 | case '6': // 1 string to match. |
| 575 | if (Name[3] != '4') |
| 576 | break; |
| 577 | return MCK_be64; // "be64" |
| 578 | } |
| 579 | break; |
| 580 | case 'c': // 1 string to match. |
| 581 | if (memcmp(Name.data()+1, "all" , 3) != 0) |
| 582 | break; |
| 583 | return MCK_call; // "call" |
| 584 | case 'e': // 1 string to match. |
| 585 | if (memcmp(Name.data()+1, "xit" , 3) != 0) |
| 586 | break; |
| 587 | return MCK_exit; // "exit" |
| 588 | case 'g': // 1 string to match. |
| 589 | if (memcmp(Name.data()+1, "oto" , 3) != 0) |
| 590 | break; |
| 591 | return MCK_goto; // "goto" |
| 592 | case 'l': // 4 strings to match. |
| 593 | switch (Name[1]) { |
| 594 | default: break; |
| 595 | case 'e': // 3 strings to match. |
| 596 | switch (Name[2]) { |
| 597 | default: break; |
| 598 | case '1': // 1 string to match. |
| 599 | if (Name[3] != '6') |
| 600 | break; |
| 601 | return MCK_le16; // "le16" |
| 602 | case '3': // 1 string to match. |
| 603 | if (Name[3] != '2') |
| 604 | break; |
| 605 | return MCK_le32; // "le32" |
| 606 | case '6': // 1 string to match. |
| 607 | if (Name[3] != '4') |
| 608 | break; |
| 609 | return MCK_le64; // "le64" |
| 610 | } |
| 611 | break; |
| 612 | case 'o': // 1 string to match. |
| 613 | if (memcmp(Name.data()+2, "ck" , 2) != 0) |
| 614 | break; |
| 615 | return MCK_lock; // "lock" |
| 616 | } |
| 617 | break; |
| 618 | } |
| 619 | break; |
| 620 | case 5: // 2 strings to match. |
| 621 | switch (Name[0]) { |
| 622 | default: break; |
| 623 | case 'c': // 1 string to match. |
| 624 | if (memcmp(Name.data()+1, "allx" , 4) != 0) |
| 625 | break; |
| 626 | return MCK_callx; // "callx" |
| 627 | case 'g': // 1 string to match. |
| 628 | if (memcmp(Name.data()+1, "otol" , 4) != 0) |
| 629 | break; |
| 630 | return MCK_gotol; // "gotol" |
| 631 | } |
| 632 | break; |
| 633 | case 7: // 4 strings to match. |
| 634 | switch (Name[0]) { |
| 635 | default: break; |
| 636 | case 'b': // 3 strings to match. |
| 637 | if (memcmp(Name.data()+1, "swap" , 4) != 0) |
| 638 | break; |
| 639 | switch (Name[5]) { |
| 640 | default: break; |
| 641 | case '1': // 1 string to match. |
| 642 | if (Name[6] != '6') |
| 643 | break; |
| 644 | return MCK_bswap16; // "bswap16" |
| 645 | case '3': // 1 string to match. |
| 646 | if (Name[6] != '2') |
| 647 | break; |
| 648 | return MCK_bswap32; // "bswap32" |
| 649 | case '6': // 1 string to match. |
| 650 | if (Name[6] != '4') |
| 651 | break; |
| 652 | return MCK_bswap64; // "bswap64" |
| 653 | } |
| 654 | break; |
| 655 | case 'x': // 1 string to match. |
| 656 | if (memcmp(Name.data()+1, "chg_64" , 6) != 0) |
| 657 | break; |
| 658 | return MCK_xchg_95_64; // "xchg_64" |
| 659 | } |
| 660 | break; |
| 661 | case 8: // 1 string to match. |
| 662 | if (memcmp(Name.data()+0, "may_goto" , 8) != 0) |
| 663 | break; |
| 664 | return MCK_may_95_goto; // "may_goto" |
| 665 | case 9: // 2 strings to match. |
| 666 | switch (Name[0]) { |
| 667 | default: break; |
| 668 | case 'l': // 1 string to match. |
| 669 | if (memcmp(Name.data()+1, "d_pseudo" , 8) != 0) |
| 670 | break; |
| 671 | return MCK_ld_95_pseudo; // "ld_pseudo" |
| 672 | case 'x': // 1 string to match. |
| 673 | if (memcmp(Name.data()+1, "chg32_32" , 8) != 0) |
| 674 | break; |
| 675 | return MCK_xchg32_95_32; // "xchg32_32" |
| 676 | } |
| 677 | break; |
| 678 | case 10: // 1 string to match. |
| 679 | if (memcmp(Name.data()+0, "cmpxchg_64" , 10) != 0) |
| 680 | break; |
| 681 | return MCK_cmpxchg_95_64; // "cmpxchg_64" |
| 682 | case 12: // 2 strings to match. |
| 683 | switch (Name[0]) { |
| 684 | default: break; |
| 685 | case 'c': // 1 string to match. |
| 686 | if (memcmp(Name.data()+1, "mpxchg32_32" , 11) != 0) |
| 687 | break; |
| 688 | return MCK_cmpxchg32_95_32; // "cmpxchg32_32" |
| 689 | case 'l': // 1 string to match. |
| 690 | if (memcmp(Name.data()+1, "oad_acquire" , 11) != 0) |
| 691 | break; |
| 692 | return MCK_load_95_acquire; // "load_acquire" |
| 693 | } |
| 694 | break; |
| 695 | case 13: // 1 string to match. |
| 696 | if (memcmp(Name.data()+0, "store_release" , 13) != 0) |
| 697 | break; |
| 698 | return MCK_store_95_release; // "store_release" |
| 699 | case 15: // 2 strings to match. |
| 700 | if (Name[0] != 'a') |
| 701 | break; |
| 702 | switch (Name[1]) { |
| 703 | default: break; |
| 704 | case 'd': // 1 string to match. |
| 705 | if (memcmp(Name.data()+2, "dr_space_cast" , 13) != 0) |
| 706 | break; |
| 707 | return MCK_addr_95_space_95_cast; // "addr_space_cast" |
| 708 | case 't': // 1 string to match. |
| 709 | if (memcmp(Name.data()+2, "omic_fetch_or" , 13) != 0) |
| 710 | break; |
| 711 | return MCK_atomic_95_fetch_95_or; // "atomic_fetch_or" |
| 712 | } |
| 713 | break; |
| 714 | case 16: // 3 strings to match. |
| 715 | if (memcmp(Name.data()+0, "atomic_fetch_" , 13) != 0) |
| 716 | break; |
| 717 | switch (Name[13]) { |
| 718 | default: break; |
| 719 | case 'a': // 2 strings to match. |
| 720 | switch (Name[14]) { |
| 721 | default: break; |
| 722 | case 'd': // 1 string to match. |
| 723 | if (Name[15] != 'd') |
| 724 | break; |
| 725 | return MCK_atomic_95_fetch_95_add; // "atomic_fetch_add" |
| 726 | case 'n': // 1 string to match. |
| 727 | if (Name[15] != 'd') |
| 728 | break; |
| 729 | return MCK_atomic_95_fetch_95_and; // "atomic_fetch_and" |
| 730 | } |
| 731 | break; |
| 732 | case 'x': // 1 string to match. |
| 733 | if (memcmp(Name.data()+14, "or" , 2) != 0) |
| 734 | break; |
| 735 | return MCK_atomic_95_fetch_95_xor; // "atomic_fetch_xor" |
| 736 | } |
| 737 | break; |
| 738 | } |
| 739 | return InvalidMatchClass; |
| 740 | } |
| 741 | |
| 742 | /// isSubclass - Compute whether \p A is a subclass of \p B. |
| 743 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
| 744 | if (A == B) |
| 745 | return true; |
| 746 | |
| 747 | [[maybe_unused]] static constexpr struct { |
| 748 | uint32_t Offset; |
| 749 | uint16_t Start; |
| 750 | uint16_t Length; |
| 751 | } Table[] = { |
| 752 | {0, 0, 0}, |
| 753 | {0, 0, 0}, |
| 754 | {0, 0, 0}, |
| 755 | {0, 0, 0}, |
| 756 | {0, 0, 0}, |
| 757 | {0, 0, 0}, |
| 758 | {0, 0, 0}, |
| 759 | {0, 0, 0}, |
| 760 | {0, 0, 0}, |
| 761 | {0, 0, 0}, |
| 762 | {0, 0, 0}, |
| 763 | {0, 0, 0}, |
| 764 | {0, 0, 0}, |
| 765 | {0, 0, 0}, |
| 766 | {0, 0, 0}, |
| 767 | {0, 0, 0}, |
| 768 | {0, 0, 0}, |
| 769 | {0, 0, 0}, |
| 770 | {0, 0, 0}, |
| 771 | {0, 0, 0}, |
| 772 | {0, 0, 0}, |
| 773 | {0, 0, 0}, |
| 774 | {0, 0, 0}, |
| 775 | {0, 0, 0}, |
| 776 | {0, 0, 0}, |
| 777 | {0, 0, 0}, |
| 778 | {0, 0, 0}, |
| 779 | {0, 0, 0}, |
| 780 | {0, 0, 0}, |
| 781 | {0, 0, 0}, |
| 782 | {0, 0, 0}, |
| 783 | {0, 0, 0}, |
| 784 | {0, 0, 0}, |
| 785 | {0, 0, 0}, |
| 786 | {0, 0, 0}, |
| 787 | {0, 0, 0}, |
| 788 | {0, 0, 0}, |
| 789 | {0, 0, 0}, |
| 790 | {0, 0, 0}, |
| 791 | {0, 0, 0}, |
| 792 | {0, 0, 0}, |
| 793 | {0, 0, 0}, |
| 794 | {0, 0, 0}, |
| 795 | {0, 0, 0}, |
| 796 | {0, 0, 0}, |
| 797 | {0, 0, 0}, |
| 798 | {0, 0, 0}, |
| 799 | {0, 0, 0}, |
| 800 | {0, 0, 0}, |
| 801 | {0, 0, 0}, |
| 802 | {0, 0, 0}, |
| 803 | {0, 0, 0}, |
| 804 | {0, 0, 0}, |
| 805 | {0, 0, 0}, |
| 806 | {0, 0, 0}, |
| 807 | {0, 0, 0}, |
| 808 | {0, 0, 0}, |
| 809 | {0, 0, 0}, |
| 810 | {0, 60, 1}, |
| 811 | {1, 61, 1}, |
| 812 | {2, 0, 0}, |
| 813 | {2, 0, 0}, |
| 814 | {2, 0, 0}, |
| 815 | {2, 0, 0}, |
| 816 | {2, 0, 0}, |
| 817 | }; |
| 818 | |
| 819 | static constexpr uint8_t Data[] = { |
| 820 | 0x03, |
| 821 | }; |
| 822 | |
| 823 | auto &Entry = Table[A]; |
| 824 | unsigned Idx = B - Entry.Start; |
| 825 | if (Idx >= Entry.Length) |
| 826 | return false; |
| 827 | Idx += Entry.Offset; |
| 828 | return (Data[Idx / 8] >> (Idx % 8)) & 1; |
| 829 | } |
| 830 | |
| 831 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
| 832 | BPFOperand &Operand = (BPFOperand &)GOp; |
| 833 | if (Kind == InvalidMatchClass) |
| 834 | return MCTargetAsmParser::Match_InvalidOperand; |
| 835 | |
| 836 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
| 837 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
| 838 | MCTargetAsmParser::Match_Success : |
| 839 | MCTargetAsmParser::Match_InvalidOperand; |
| 840 | |
| 841 | switch (Kind) { |
| 842 | default: break; |
| 843 | case MCK_Imm: { |
| 844 | DiagnosticPredicate DP(Operand.isImm()); |
| 845 | if (DP.isMatch()) |
| 846 | return MCTargetAsmParser::Match_Success; |
| 847 | break; |
| 848 | } |
| 849 | case MCK_SImm16: { |
| 850 | DiagnosticPredicate DP(Operand.isSImm16()); |
| 851 | if (DP.isMatch()) |
| 852 | return MCTargetAsmParser::Match_Success; |
| 853 | if (DP.isNearMatch()) |
| 854 | return BPFAsmParser::Match_InvalidSImm16; |
| 855 | break; |
| 856 | } |
| 857 | case MCK_BrTarget: { |
| 858 | DiagnosticPredicate DP(Operand.isBrTarget()); |
| 859 | if (DP.isMatch()) |
| 860 | return MCTargetAsmParser::Match_Success; |
| 861 | if (DP.isNearMatch()) |
| 862 | return BPFAsmParser::Match_InvalidBrTarget; |
| 863 | break; |
| 864 | } |
| 865 | } // end switch (Kind) |
| 866 | |
| 867 | if (Operand.isReg()) { |
| 868 | static constexpr uint16_t Table[BPF::NUM_TARGET_REGS] = { |
| 869 | InvalidMatchClass, |
| 870 | MCK_R0, |
| 871 | MCK_GPR, |
| 872 | MCK_GPR, |
| 873 | MCK_GPR, |
| 874 | MCK_GPR, |
| 875 | MCK_GPR, |
| 876 | MCK_GPR, |
| 877 | MCK_GPR, |
| 878 | MCK_GPR, |
| 879 | MCK_GPR, |
| 880 | MCK_GPR, |
| 881 | MCK_GPR, |
| 882 | MCK_W0, |
| 883 | MCK_GPR32, |
| 884 | MCK_GPR32, |
| 885 | MCK_GPR32, |
| 886 | MCK_GPR32, |
| 887 | MCK_GPR32, |
| 888 | MCK_GPR32, |
| 889 | MCK_GPR32, |
| 890 | MCK_GPR32, |
| 891 | MCK_GPR32, |
| 892 | MCK_GPR32, |
| 893 | MCK_GPR32, |
| 894 | }; |
| 895 | |
| 896 | MCRegister Reg = Operand.getReg(); |
| 897 | MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass; |
| 898 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
| 899 | getDiagKindFromRegisterClass(Kind); |
| 900 | } |
| 901 | |
| 902 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
| 903 | return getDiagKindFromRegisterClass(Kind); |
| 904 | |
| 905 | return MCTargetAsmParser::Match_InvalidOperand; |
| 906 | } |
| 907 | |
| 908 | #ifndef NDEBUG |
| 909 | const char *getMatchClassName(MatchClassKind Kind) { |
| 910 | switch (Kind) { |
| 911 | case InvalidMatchClass: return "InvalidMatchClass" ; |
| 912 | case OptionalMatchClass: return "OptionalMatchClass" ; |
| 913 | case MCK__EXCLAIM_: return "MCK__EXCLAIM_" ; |
| 914 | case MCK__PCT_: return "MCK__PCT_" ; |
| 915 | case MCK__38_: return "MCK__38_" ; |
| 916 | case MCK__40_: return "MCK__40_" ; |
| 917 | case MCK__41_: return "MCK__41_" ; |
| 918 | case MCK__STAR_: return "MCK__STAR_" ; |
| 919 | case MCK__43_: return "MCK__43_" ; |
| 920 | case MCK__MINUS_: return "MCK__MINUS_" ; |
| 921 | case MCK__47_: return "MCK__47_" ; |
| 922 | case MCK__LT_: return "MCK__LT_" ; |
| 923 | case MCK__61_: return "MCK__61_" ; |
| 924 | case MCK__GT_: return "MCK__GT_" ; |
| 925 | case MCK__91_: return "MCK__91_" ; |
| 926 | case MCK__93_: return "MCK__93_" ; |
| 927 | case MCK__94_: return "MCK__94_" ; |
| 928 | case MCK_addr_95_space_95_cast: return "MCK_addr_95_space_95_cast" ; |
| 929 | case MCK_atomic_95_fetch_95_add: return "MCK_atomic_95_fetch_95_add" ; |
| 930 | case MCK_atomic_95_fetch_95_and: return "MCK_atomic_95_fetch_95_and" ; |
| 931 | case MCK_atomic_95_fetch_95_or: return "MCK_atomic_95_fetch_95_or" ; |
| 932 | case MCK_atomic_95_fetch_95_xor: return "MCK_atomic_95_fetch_95_xor" ; |
| 933 | case MCK_be16: return "MCK_be16" ; |
| 934 | case MCK_be32: return "MCK_be32" ; |
| 935 | case MCK_be64: return "MCK_be64" ; |
| 936 | case MCK_bswap16: return "MCK_bswap16" ; |
| 937 | case MCK_bswap32: return "MCK_bswap32" ; |
| 938 | case MCK_bswap64: return "MCK_bswap64" ; |
| 939 | case MCK_call: return "MCK_call" ; |
| 940 | case MCK_callx: return "MCK_callx" ; |
| 941 | case MCK_cmpxchg32_95_32: return "MCK_cmpxchg32_95_32" ; |
| 942 | case MCK_cmpxchg_95_64: return "MCK_cmpxchg_95_64" ; |
| 943 | case MCK_exit: return "MCK_exit" ; |
| 944 | case MCK_goto: return "MCK_goto" ; |
| 945 | case MCK_gotol: return "MCK_gotol" ; |
| 946 | case MCK_if: return "MCK_if" ; |
| 947 | case MCK_ld_95_pseudo: return "MCK_ld_95_pseudo" ; |
| 948 | case MCK_le16: return "MCK_le16" ; |
| 949 | case MCK_le32: return "MCK_le32" ; |
| 950 | case MCK_le64: return "MCK_le64" ; |
| 951 | case MCK_lea: return "MCK_lea" ; |
| 952 | case MCK_ll: return "MCK_ll" ; |
| 953 | case MCK_load_95_acquire: return "MCK_load_95_acquire" ; |
| 954 | case MCK_lock: return "MCK_lock" ; |
| 955 | case MCK_may_95_goto: return "MCK_may_95_goto" ; |
| 956 | case MCK_s: return "MCK_s" ; |
| 957 | case MCK_s16: return "MCK_s16" ; |
| 958 | case MCK_s32: return "MCK_s32" ; |
| 959 | case MCK_s8: return "MCK_s8" ; |
| 960 | case MCK_skb: return "MCK_skb" ; |
| 961 | case MCK_store_95_release: return "MCK_store_95_release" ; |
| 962 | case MCK_u16: return "MCK_u16" ; |
| 963 | case MCK_u32: return "MCK_u32" ; |
| 964 | case MCK_u64: return "MCK_u64" ; |
| 965 | case MCK_u8: return "MCK_u8" ; |
| 966 | case MCK_xchg32_95_32: return "MCK_xchg32_95_32" ; |
| 967 | case MCK_xchg_95_64: return "MCK_xchg_95_64" ; |
| 968 | case MCK__124_: return "MCK__124_" ; |
| 969 | case MCK_R0: return "MCK_R0" ; |
| 970 | case MCK_W0: return "MCK_W0" ; |
| 971 | case MCK_GPR: return "MCK_GPR" ; |
| 972 | case MCK_GPR32: return "MCK_GPR32" ; |
| 973 | case MCK_Imm: return "MCK_Imm" ; |
| 974 | case MCK_SImm16: return "MCK_SImm16" ; |
| 975 | case MCK_BrTarget: return "MCK_BrTarget" ; |
| 976 | case NumMatchClassKinds: return "NumMatchClassKinds" ; |
| 977 | } |
| 978 | llvm_unreachable("unhandled MatchClassKind!" ); |
| 979 | } |
| 980 | |
| 981 | #endif // NDEBUG |
| 982 | FeatureBitset BPFAsmParser:: |
| 983 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
| 984 | FeatureBitset Features; |
| 985 | return Features; |
| 986 | } |
| 987 | |
| 988 | static bool checkAsmTiedOperandConstraints(const BPFAsmParser&AsmParser, |
| 989 | unsigned Kind, const OperandVector &Operands, |
| 990 | uint64_t &ErrorInfo) { |
| 991 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 992 | const uint8_t *Converter = ConversionTable[Kind]; |
| 993 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 994 | switch (*p) { |
| 995 | case CVT_Tied: { |
| 996 | unsigned OpIdx = *(p + 1); |
| 997 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
| 998 | std::begin(TiedAsmOperandTable)) && |
| 999 | "Tied operand not found" ); |
| 1000 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
| 1001 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
| 1002 | if (OpndNum1 != OpndNum2) { |
| 1003 | auto &SrcOp1 = Operands[OpndNum1]; |
| 1004 | auto &SrcOp2 = Operands[OpndNum2]; |
| 1005 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
| 1006 | ErrorInfo = OpndNum2; |
| 1007 | return false; |
| 1008 | } |
| 1009 | } |
| 1010 | break; |
| 1011 | } |
| 1012 | default: |
| 1013 | break; |
| 1014 | } |
| 1015 | } |
| 1016 | return true; |
| 1017 | } |
| 1018 | |
| 1019 | static const char MnemonicTable[] = |
| 1020 | "\000\000\001*\004call\005callx\004exit\004goto\005gotol\002if\tld_pseud" |
| 1021 | "o\003lea\004lock\010may_goto\002r0\015store_release\002w0" ; |
| 1022 | |
| 1023 | // Feature bitsets. |
| 1024 | enum : uint8_t { |
| 1025 | AMFBS_None, |
| 1026 | }; |
| 1027 | |
| 1028 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 1029 | {}, // AMFBS_None |
| 1030 | }; |
| 1031 | |
| 1032 | namespace { |
| 1033 | struct MatchEntry { |
| 1034 | uint8_t Mnemonic; |
| 1035 | uint16_t Opcode; |
| 1036 | uint8_t ConvertFn; |
| 1037 | uint8_t RequiredFeaturesIdx; |
| 1038 | uint8_t Classes[14]; |
| 1039 | StringRef getMnemonic() const { |
| 1040 | return StringRef(MnemonicTable + Mnemonic + 1, |
| 1041 | MnemonicTable[Mnemonic]); |
| 1042 | } |
| 1043 | }; |
| 1044 | |
| 1045 | // Predicate for searching for an opcode. |
| 1046 | struct LessOpcode { |
| 1047 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
| 1048 | return LHS.getMnemonic() < RHS; |
| 1049 | } |
| 1050 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
| 1051 | return LHS < RHS.getMnemonic(); |
| 1052 | } |
| 1053 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
| 1054 | return LHS.getMnemonic() < RHS.getMnemonic(); |
| 1055 | } |
| 1056 | }; |
| 1057 | } // end anonymous namespace |
| 1058 | |
| 1059 | static const MatchEntry MatchTable0[] = { |
| 1060 | { 1 /* */, BPF::MOV_rr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GPR, MCK__61_, MCK_GPR }, }, |
| 1061 | { 1 /* */, BPF::MOV_ri, Convert__Reg1_0__Imm1_2, AMFBS_None, { MCK_GPR, MCK__61_, MCK_Imm }, }, |
| 1062 | { 1 /* */, BPF::MOV_rr_32, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_GPR32 }, }, |
| 1063 | { 1 /* */, BPF::MOV_ri_32, Convert__Reg1_0__Imm1_2, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_Imm }, }, |
| 1064 | { 1 /* */, BPF::MOD_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__PCT_, MCK__61_, MCK_GPR }, }, |
| 1065 | { 1 /* */, BPF::MOD_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__PCT_, MCK__61_, MCK_Imm }, }, |
| 1066 | { 1 /* */, BPF::AND_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__38_, MCK__61_, MCK_GPR }, }, |
| 1067 | { 1 /* */, BPF::AND_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__38_, MCK__61_, MCK_Imm }, }, |
| 1068 | { 1 /* */, BPF::MUL_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__STAR_, MCK__61_, MCK_GPR }, }, |
| 1069 | { 1 /* */, BPF::MUL_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__STAR_, MCK__61_, MCK_Imm }, }, |
| 1070 | { 1 /* */, BPF::ADD_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__43_, MCK__61_, MCK_GPR }, }, |
| 1071 | { 1 /* */, BPF::ADD_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__43_, MCK__61_, MCK_Imm }, }, |
| 1072 | { 1 /* */, BPF::SUB_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__MINUS_, MCK__61_, MCK_GPR }, }, |
| 1073 | { 1 /* */, BPF::SUB_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__MINUS_, MCK__61_, MCK_Imm }, }, |
| 1074 | { 1 /* */, BPF::DIV_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__47_, MCK__61_, MCK_GPR }, }, |
| 1075 | { 1 /* */, BPF::DIV_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__47_, MCK__61_, MCK_Imm }, }, |
| 1076 | { 1 /* */, BPF::NEG_64, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK__MINUS_, MCK_GPR }, }, |
| 1077 | { 1 /* */, BPF::BE16, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_be16, MCK_GPR }, }, |
| 1078 | { 1 /* */, BPF::BE32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_be32, MCK_GPR }, }, |
| 1079 | { 1 /* */, BPF::BE64, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_be64, MCK_GPR }, }, |
| 1080 | { 1 /* */, BPF::BSWAP16, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_bswap16, MCK_GPR }, }, |
| 1081 | { 1 /* */, BPF::BSWAP32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_bswap32, MCK_GPR }, }, |
| 1082 | { 1 /* */, BPF::BSWAP64, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_bswap64, MCK_GPR }, }, |
| 1083 | { 1 /* */, BPF::LE16, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_le16, MCK_GPR }, }, |
| 1084 | { 1 /* */, BPF::LE32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_le32, MCK_GPR }, }, |
| 1085 | { 1 /* */, BPF::LE64, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR, MCK__61_, MCK_le64, MCK_GPR }, }, |
| 1086 | { 1 /* */, BPF::LD_imm64, Convert__Reg1_0__Imm1_2, AMFBS_None, { MCK_GPR, MCK__61_, MCK_Imm, MCK_ll }, }, |
| 1087 | { 1 /* */, BPF::XOR_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__94_, MCK__61_, MCK_GPR }, }, |
| 1088 | { 1 /* */, BPF::XOR_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__94_, MCK__61_, MCK_Imm }, }, |
| 1089 | { 1 /* */, BPF::OR_rr, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR, MCK__124_, MCK__61_, MCK_GPR }, }, |
| 1090 | { 1 /* */, BPF::OR_ri, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR, MCK__124_, MCK__61_, MCK_Imm }, }, |
| 1091 | { 1 /* */, BPF::MOD_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__PCT_, MCK__61_, MCK_GPR32 }, }, |
| 1092 | { 1 /* */, BPF::MOD_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__PCT_, MCK__61_, MCK_Imm }, }, |
| 1093 | { 1 /* */, BPF::AND_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__38_, MCK__61_, MCK_GPR32 }, }, |
| 1094 | { 1 /* */, BPF::AND_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__38_, MCK__61_, MCK_Imm }, }, |
| 1095 | { 1 /* */, BPF::MUL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__STAR_, MCK__61_, MCK_GPR32 }, }, |
| 1096 | { 1 /* */, BPF::MUL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__STAR_, MCK__61_, MCK_Imm }, }, |
| 1097 | { 1 /* */, BPF::ADD_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__43_, MCK__61_, MCK_GPR32 }, }, |
| 1098 | { 1 /* */, BPF::ADD_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__43_, MCK__61_, MCK_Imm }, }, |
| 1099 | { 1 /* */, BPF::SUB_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__MINUS_, MCK__61_, MCK_GPR32 }, }, |
| 1100 | { 1 /* */, BPF::SUB_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__MINUS_, MCK__61_, MCK_Imm }, }, |
| 1101 | { 1 /* */, BPF::DIV_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__47_, MCK__61_, MCK_GPR32 }, }, |
| 1102 | { 1 /* */, BPF::DIV_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__47_, MCK__61_, MCK_Imm }, }, |
| 1103 | { 1 /* */, BPF::NEG_32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__MINUS_, MCK_GPR32 }, }, |
| 1104 | { 1 /* */, BPF::XOR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__94_, MCK__61_, MCK_GPR32 }, }, |
| 1105 | { 1 /* */, BPF::XOR_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__94_, MCK__61_, MCK_Imm }, }, |
| 1106 | { 1 /* */, BPF::OR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__124_, MCK__61_, MCK_GPR32 }, }, |
| 1107 | { 1 /* */, BPF::OR_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__124_, MCK__61_, MCK_Imm }, }, |
| 1108 | { 1 /* */, BPF::SLL_rr, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR, MCK__LT_, MCK__LT_, MCK__61_, MCK_GPR }, }, |
| 1109 | { 1 /* */, BPF::SLL_ri, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR, MCK__LT_, MCK__LT_, MCK__61_, MCK_Imm }, }, |
| 1110 | { 1 /* */, BPF::SRL_rr, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR }, }, |
| 1111 | { 1 /* */, BPF::SRL_ri, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, }, |
| 1112 | { 1 /* */, BPF::SMOD_rr, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR, MCK_s, MCK__PCT_, MCK__61_, MCK_GPR }, }, |
| 1113 | { 1 /* */, BPF::SMOD_ri, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR, MCK_s, MCK__PCT_, MCK__61_, MCK_Imm }, }, |
| 1114 | { 1 /* */, BPF::SDIV_rr, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR, MCK_s, MCK__47_, MCK__61_, MCK_GPR }, }, |
| 1115 | { 1 /* */, BPF::SDIV_ri, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR, MCK_s, MCK__47_, MCK__61_, MCK_Imm }, }, |
| 1116 | { 1 /* */, BPF::SLL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__LT_, MCK__LT_, MCK__61_, MCK_GPR32 }, }, |
| 1117 | { 1 /* */, BPF::SLL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK__LT_, MCK__LT_, MCK__61_, MCK_Imm }, }, |
| 1118 | { 1 /* */, BPF::SRL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, }, |
| 1119 | { 1 /* */, BPF::SRL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, }, |
| 1120 | { 1 /* */, BPF::SMOD_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK_s, MCK__PCT_, MCK__61_, MCK_GPR32 }, }, |
| 1121 | { 1 /* */, BPF::SMOD_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK_s, MCK__PCT_, MCK__61_, MCK_Imm }, }, |
| 1122 | { 1 /* */, BPF::SDIV_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK_s, MCK__47_, MCK__61_, MCK_GPR32 }, }, |
| 1123 | { 1 /* */, BPF::SDIV_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK_s, MCK__47_, MCK__61_, MCK_Imm }, }, |
| 1124 | { 1 /* */, BPF::MOVSX_rr_16, Convert__Reg1_0__Reg1_5, AMFBS_None, { MCK_GPR, MCK__61_, MCK__40_, MCK_s16, MCK__41_, MCK_GPR }, }, |
| 1125 | { 1 /* */, BPF::MOVSX_rr_32, Convert__Reg1_0__Reg1_5, AMFBS_None, { MCK_GPR, MCK__61_, MCK__40_, MCK_s32, MCK__41_, MCK_GPR }, }, |
| 1126 | { 1 /* */, BPF::MOVSX_rr_8, Convert__Reg1_0__Reg1_5, AMFBS_None, { MCK_GPR, MCK__61_, MCK__40_, MCK_s8, MCK__41_, MCK_GPR }, }, |
| 1127 | { 1 /* */, BPF::SRA_rr, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_None, { MCK_GPR, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR }, }, |
| 1128 | { 1 /* */, BPF::SRA_ri, Convert__Reg1_0__Tie0_0_0__Imm1_5, AMFBS_None, { MCK_GPR, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, }, |
| 1129 | { 1 /* */, BPF::MOVSX_rr_32_16, Convert__Reg1_0__Reg1_5, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__40_, MCK_s16, MCK__41_, MCK_GPR32 }, }, |
| 1130 | { 1 /* */, BPF::MOVSX_rr_32_8, Convert__Reg1_0__Reg1_5, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__40_, MCK_s8, MCK__41_, MCK_GPR32 }, }, |
| 1131 | { 1 /* */, BPF::SRA_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_None, { MCK_GPR32, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, }, |
| 1132 | { 1 /* */, BPF::SRA_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_5, AMFBS_None, { MCK_GPR32, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, }, |
| 1133 | { 1 /* */, BPF::ADDR_SPACE_CAST, Convert__Reg1_0__Reg1_4__Imm1_5__Imm1_6, AMFBS_None, { MCK_GPR, MCK__61_, MCK_addr_95_space_95_cast, MCK__40_, MCK_GPR, MCK_Imm, MCK_Imm, MCK__41_ }, }, |
| 1134 | { 1 /* */, BPF::XCHGD, Convert__Reg1_0__Reg1_4__SImm161_5__Tie0_0_6, AMFBS_None, { MCK_GPR, MCK__61_, MCK_xchg_95_64, MCK__40_, MCK_GPR, MCK_SImm16, MCK_GPR, MCK__41_ }, }, |
| 1135 | { 1 /* */, BPF::XCHGW32, Convert__Reg1_0__Reg1_4__SImm161_5__Tie0_0_6, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_xchg32_95_32, MCK__40_, MCK_GPR, MCK_SImm16, MCK_GPR32, MCK__41_ }, }, |
| 1136 | { 1 /* */, BPF::LDHSX, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_s16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1137 | { 1 /* */, BPF::LDWSX, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_s32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1138 | { 1 /* */, BPF::LDBSX, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_s8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1139 | { 1 /* */, BPF::LDH, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1140 | { 1 /* */, BPF::LDW, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1141 | { 1 /* */, BPF::LDD, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1142 | { 1 /* */, BPF::LDB, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR, MCK__61_, MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1143 | { 1 /* */, BPF::LDH32, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1144 | { 1 /* */, BPF::LDW32, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1145 | { 1 /* */, BPF::LDB32, Convert__Reg1_0__Reg1_8__SImm161_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_ }, }, |
| 1146 | { 1 /* */, BPF::LDDACQ, Convert__Reg1_0__Reg1_9__SImm161_10, AMFBS_None, { MCK_GPR, MCK__61_, MCK_load_95_acquire, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__41_ }, }, |
| 1147 | { 1 /* */, BPF::LDHACQ32, Convert__Reg1_0__Reg1_9__SImm161_10, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_load_95_acquire, MCK__40_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__41_ }, }, |
| 1148 | { 1 /* */, BPF::LDWACQ32, Convert__Reg1_0__Reg1_9__SImm161_10, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_load_95_acquire, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__41_ }, }, |
| 1149 | { 1 /* */, BPF::LDBACQ32, Convert__Reg1_0__Reg1_9__SImm161_10, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_load_95_acquire, MCK__40_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__41_ }, }, |
| 1150 | { 1 /* */, BPF::XFADDD, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR, MCK__61_, MCK_atomic_95_fetch_95_add, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR, MCK__41_ }, }, |
| 1151 | { 1 /* */, BPF::XFANDD, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR, MCK__61_, MCK_atomic_95_fetch_95_and, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR, MCK__41_ }, }, |
| 1152 | { 1 /* */, BPF::XFORD, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR, MCK__61_, MCK_atomic_95_fetch_95_or, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR, MCK__41_ }, }, |
| 1153 | { 1 /* */, BPF::XFXORD, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR, MCK__61_, MCK_atomic_95_fetch_95_xor, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR, MCK__41_ }, }, |
| 1154 | { 1 /* */, BPF::XFADDW32, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_atomic_95_fetch_95_add, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1155 | { 1 /* */, BPF::XFANDW32, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_atomic_95_fetch_95_and, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1156 | { 1 /* */, BPF::XFORW32, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_atomic_95_fetch_95_or, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1157 | { 1 /* */, BPF::XFXORW32, Convert__Reg1_0__Reg1_9__SImm161_10__Tie0_0_12, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_atomic_95_fetch_95_xor, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1158 | { 2 /* * */, BPF::STH, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR }, }, |
| 1159 | { 2 /* * */, BPF::STH32, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR32 }, }, |
| 1160 | { 2 /* * */, BPF::STH_imm, Convert__Imm1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_Imm }, }, |
| 1161 | { 2 /* * */, BPF::STW, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR }, }, |
| 1162 | { 2 /* * */, BPF::STW32, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR32 }, }, |
| 1163 | { 2 /* * */, BPF::STW_imm, Convert__Imm1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_Imm }, }, |
| 1164 | { 2 /* * */, BPF::STD, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR }, }, |
| 1165 | { 2 /* * */, BPF::STD_imm, Convert__Imm1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_Imm }, }, |
| 1166 | { 2 /* * */, BPF::STB, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR }, }, |
| 1167 | { 2 /* * */, BPF::STB32, Convert__Reg1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_GPR32 }, }, |
| 1168 | { 2 /* * */, BPF::STB_imm, Convert__Imm1_10__Reg1_6__SImm161_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__61_, MCK_Imm }, }, |
| 1169 | { 4 /* call */, BPF::JAL, Convert__Imm1_1, AMFBS_None, { MCK_call, MCK_Imm }, }, |
| 1170 | { 9 /* callx */, BPF::JALX, Convert__Reg1_1, AMFBS_None, { MCK_callx, MCK_GPR }, }, |
| 1171 | { 15 /* exit */, BPF::RET, Convert_NoOperands, AMFBS_None, { MCK_exit }, }, |
| 1172 | { 20 /* goto */, BPF::JMP, Convert__BrTarget1_1, AMFBS_None, { MCK_goto, MCK_BrTarget }, }, |
| 1173 | { 25 /* gotol */, BPF::JMPL, Convert__BrTarget1_1, AMFBS_None, { MCK_gotol, MCK_BrTarget }, }, |
| 1174 | { 31 /* if */, BPF::JSET_rr, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__38_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1175 | { 31 /* if */, BPF::JSET_ri, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__38_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1176 | { 31 /* if */, BPF::JULT_rr, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__LT_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1177 | { 31 /* if */, BPF::JULT_ri, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__LT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1178 | { 31 /* if */, BPF::JUGT_rr, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__GT_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1179 | { 31 /* if */, BPF::JUGT_ri, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR, MCK__GT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1180 | { 31 /* if */, BPF::JSET_rr_32, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__38_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1181 | { 31 /* if */, BPF::JSET_ri_32, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__38_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1182 | { 31 /* if */, BPF::JULT_rr_32, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1183 | { 31 /* if */, BPF::JULT_ri_32, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1184 | { 31 /* if */, BPF::JUGT_rr_32, Convert__Reg1_1__Reg1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1185 | { 31 /* if */, BPF::JUGT_ri_32, Convert__Reg1_1__Imm1_3__BrTarget1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1186 | { 31 /* if */, BPF::JNE_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__EXCLAIM_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1187 | { 31 /* if */, BPF::JNE_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__EXCLAIM_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1188 | { 31 /* if */, BPF::JULE_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__LT_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1189 | { 31 /* if */, BPF::JULE_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1190 | { 31 /* if */, BPF::JEQ_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__61_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1191 | { 31 /* if */, BPF::JEQ_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__61_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1192 | { 31 /* if */, BPF::JUGE_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__GT_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1193 | { 31 /* if */, BPF::JUGE_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1194 | { 31 /* if */, BPF::JSLT_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__LT_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1195 | { 31 /* if */, BPF::JSLT_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__LT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1196 | { 31 /* if */, BPF::JSGT_rr, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__GT_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1197 | { 31 /* if */, BPF::JSGT_ri, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__GT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1198 | { 31 /* if */, BPF::JNE_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__EXCLAIM_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1199 | { 31 /* if */, BPF::JNE_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__EXCLAIM_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1200 | { 31 /* if */, BPF::JULE_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1201 | { 31 /* if */, BPF::JULE_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1202 | { 31 /* if */, BPF::JEQ_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__61_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1203 | { 31 /* if */, BPF::JEQ_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__61_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1204 | { 31 /* if */, BPF::JUGE_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1205 | { 31 /* if */, BPF::JUGE_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1206 | { 31 /* if */, BPF::JSLT_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1207 | { 31 /* if */, BPF::JSLT_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1208 | { 31 /* if */, BPF::JSGT_rr_32, Convert__Reg1_1__Reg1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1209 | { 31 /* if */, BPF::JSGT_ri_32, Convert__Reg1_1__Imm1_4__BrTarget1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1210 | { 31 /* if */, BPF::JSLE_rr, Convert__Reg1_1__Reg1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__LT_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1211 | { 31 /* if */, BPF::JSLE_ri, Convert__Reg1_1__Imm1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1212 | { 31 /* if */, BPF::JSGE_rr, Convert__Reg1_1__Reg1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__GT_, MCK__61_, MCK_GPR, MCK_goto, MCK_BrTarget }, }, |
| 1213 | { 31 /* if */, BPF::JSGE_ri, Convert__Reg1_1__Imm1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR, MCK_s, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1214 | { 31 /* if */, BPF::JSLE_rr_32, Convert__Reg1_1__Reg1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1215 | { 31 /* if */, BPF::JSLE_ri_32, Convert__Reg1_1__Imm1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1216 | { 31 /* if */, BPF::JSGE_rr_32, Convert__Reg1_1__Reg1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_BrTarget }, }, |
| 1217 | { 31 /* if */, BPF::JSGE_ri_32, Convert__Reg1_1__Imm1_5__BrTarget1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_BrTarget }, }, |
| 1218 | { 34 /* ld_pseudo */, BPF::LD_pseudo, Convert__Reg1_1__Imm1_2__Imm1_3, AMFBS_None, { MCK_ld_95_pseudo, MCK_GPR, MCK_Imm, MCK_Imm }, }, |
| 1219 | { 44 /* lea */, BPF::FI_ri, Convert__Reg1_1__Reg1_2__SImm161_3, AMFBS_None, { MCK_lea, MCK_GPR, MCK_GPR, MCK_SImm16 }, }, |
| 1220 | { 48 /* lock */, BPF::XANDW32, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__38_, MCK__61_, MCK_GPR32 }, }, |
| 1221 | { 48 /* lock */, BPF::XADDW, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__43_, MCK__61_, MCK_GPR }, }, |
| 1222 | { 48 /* lock */, BPF::XADDW32, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__43_, MCK__61_, MCK_GPR32 }, }, |
| 1223 | { 48 /* lock */, BPF::XXORW32, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__94_, MCK__61_, MCK_GPR32 }, }, |
| 1224 | { 48 /* lock */, BPF::XORW32, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__124_, MCK__61_, MCK_GPR32 }, }, |
| 1225 | { 48 /* lock */, BPF::XANDD, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__38_, MCK__61_, MCK_GPR }, }, |
| 1226 | { 48 /* lock */, BPF::XADDD, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__43_, MCK__61_, MCK_GPR }, }, |
| 1227 | { 48 /* lock */, BPF::XXORD, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__94_, MCK__61_, MCK_GPR }, }, |
| 1228 | { 48 /* lock */, BPF::XORD, Convert__Reg1_12__Reg1_7__SImm161_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK__124_, MCK__61_, MCK_GPR }, }, |
| 1229 | { 53 /* may_goto */, BPF::JCOND, Convert__BrTarget1_1, AMFBS_None, { MCK_may_95_goto, MCK_BrTarget }, }, |
| 1230 | { 62 /* r0 */, BPF::CMPXCHGD, Convert__Reg1_4__SImm161_5__Reg1_7, AMFBS_None, { MCK_R0, MCK__61_, MCK_cmpxchg_95_64, MCK__40_, MCK_GPR, MCK_SImm16, MCK_R0, MCK_GPR, MCK__41_ }, }, |
| 1231 | { 62 /* r0 */, BPF::LD_IND_H, Convert__imm_95_0__Reg1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_GPR, MCK__93_ }, }, |
| 1232 | { 62 /* r0 */, BPF::LD_ABS_H, Convert__imm_95_0__Imm1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_Imm, MCK__93_ }, }, |
| 1233 | { 62 /* r0 */, BPF::LD_IND_W, Convert__imm_95_0__Reg1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_GPR, MCK__93_ }, }, |
| 1234 | { 62 /* r0 */, BPF::LD_ABS_W, Convert__imm_95_0__Imm1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_Imm, MCK__93_ }, }, |
| 1235 | { 62 /* r0 */, BPF::LD_IND_B, Convert__imm_95_0__Reg1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_GPR, MCK__93_ }, }, |
| 1236 | { 62 /* r0 */, BPF::LD_ABS_B, Convert__imm_95_0__Imm1_9, AMFBS_None, { MCK_R0, MCK__61_, MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK_skb, MCK__91_, MCK_Imm, MCK__93_ }, }, |
| 1237 | { 65 /* store_release */, BPF::STHREL32, Convert__Reg1_10__Reg1_7__SImm161_8, AMFBS_None, { MCK_store_95_release, MCK__40_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1238 | { 65 /* store_release */, BPF::STWREL32, Convert__Reg1_10__Reg1_7__SImm161_8, AMFBS_None, { MCK_store_95_release, MCK__40_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1239 | { 65 /* store_release */, BPF::STDREL, Convert__Reg1_10__Reg1_7__SImm161_8, AMFBS_None, { MCK_store_95_release, MCK__40_, MCK__40_, MCK_u64, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR, MCK__41_ }, }, |
| 1240 | { 65 /* store_release */, BPF::STBREL32, Convert__Reg1_10__Reg1_7__SImm161_8, AMFBS_None, { MCK_store_95_release, MCK__40_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_SImm16, MCK__41_, MCK_GPR32, MCK__41_ }, }, |
| 1241 | { 79 /* w0 */, BPF::CMPXCHGW32, Convert__Reg1_4__SImm161_5__Reg1_7, AMFBS_None, { MCK_W0, MCK__61_, MCK_cmpxchg32_95_32, MCK__40_, MCK_GPR, MCK_SImm16, MCK_W0, MCK_GPR32, MCK__41_ }, }, |
| 1242 | }; |
| 1243 | |
| 1244 | #include "llvm/Support/Debug.h" |
| 1245 | #include "llvm/Support/Format.h" |
| 1246 | |
| 1247 | unsigned BPFAsmParser:: |
| 1248 | MatchInstructionImpl(const OperandVector &Operands, |
| 1249 | MCInst &Inst, |
| 1250 | uint64_t &ErrorInfo, |
| 1251 | FeatureBitset &MissingFeatures, |
| 1252 | bool matchingInlineAsm, unsigned VariantID) { |
| 1253 | // Eliminate obvious mismatches. |
| 1254 | if (Operands.size() > 14) { |
| 1255 | ErrorInfo = 14; |
| 1256 | return Match_InvalidOperand; |
| 1257 | } |
| 1258 | |
| 1259 | // Get the current feature set. |
| 1260 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
| 1261 | |
| 1262 | // Get the instruction mnemonic, which is the first token. |
| 1263 | StringRef Mnemonic; |
| 1264 | if (Operands[0]->isToken()) |
| 1265 | Mnemonic = ((BPFOperand &)*Operands[0]).getToken(); |
| 1266 | |
| 1267 | // Some state to try to produce better error messages. |
| 1268 | bool HadMatchOtherThanFeatures = false; |
| 1269 | bool HadMatchOtherThanPredicate = false; |
| 1270 | unsigned RetCode = Match_InvalidOperand; |
| 1271 | MissingFeatures.set(); |
| 1272 | // Set ErrorInfo to the operand that mismatches if it is |
| 1273 | // wrong for all instances of the instruction. |
| 1274 | ErrorInfo = ~0ULL; |
| 1275 | // Find the appropriate table for this asm variant. |
| 1276 | const MatchEntry *Start, *End; |
| 1277 | switch (VariantID) { |
| 1278 | default: llvm_unreachable("invalid variant!" ); |
| 1279 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1280 | } |
| 1281 | // Search the table. |
| 1282 | auto MnemonicRange = std::pair(Start, End); |
| 1283 | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
| 1284 | if (!Mnemonic.empty()) |
| 1285 | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
| 1286 | |
| 1287 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "AsmMatcher: found " << |
| 1288 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
| 1289 | " encodings with mnemonic '" << Mnemonic << "'\n" ); |
| 1290 | |
| 1291 | // Return a more specific error code if no mnemonics match. |
| 1292 | if (MnemonicRange.first == MnemonicRange.second) |
| 1293 | return Match_MnemonicFail; |
| 1294 | |
| 1295 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 1296 | it != ie; ++it) { |
| 1297 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
| 1298 | bool HasRequiredFeatures = |
| 1299 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
| 1300 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Trying to match opcode " |
| 1301 | << MII.getName(it->Opcode) << "\n" ); |
| 1302 | bool OperandsValid = true; |
| 1303 | for (unsigned FormalIdx = SIndex, ActualIdx = SIndex; FormalIdx != 14; ++FormalIdx) { |
| 1304 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
| 1305 | DEBUG_WITH_TYPE("asm-matcher" , |
| 1306 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
| 1307 | << " against actual operand at index " << ActualIdx); |
| 1308 | if (ActualIdx < Operands.size()) |
| 1309 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << " (" ; |
| 1310 | Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): " ); |
| 1311 | else |
| 1312 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << ": " ); |
| 1313 | if (ActualIdx >= Operands.size()) { |
| 1314 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "actual operand index out of range\n" ); |
| 1315 | if (Formal == InvalidMatchClass) { |
| 1316 | break; |
| 1317 | } |
| 1318 | if (isSubclass(Formal, OptionalMatchClass)) { |
| 1319 | continue; |
| 1320 | } |
| 1321 | OperandsValid = false; |
| 1322 | ErrorInfo = ActualIdx; |
| 1323 | break; |
| 1324 | } |
| 1325 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
| 1326 | unsigned Diag = validateOperandClass(Actual, Formal); |
| 1327 | if (Diag == Match_Success) { |
| 1328 | DEBUG_WITH_TYPE("asm-matcher" , |
| 1329 | dbgs() << "match success using generic matcher\n" ); |
| 1330 | ++ActualIdx; |
| 1331 | continue; |
| 1332 | } |
| 1333 | // If the generic handler indicates an invalid operand |
| 1334 | // failure, check for a special case. |
| 1335 | if (Diag != Match_Success) { |
| 1336 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
| 1337 | if (TargetDiag == Match_Success) { |
| 1338 | DEBUG_WITH_TYPE("asm-matcher" , |
| 1339 | dbgs() << "match success using target matcher\n" ); |
| 1340 | ++ActualIdx; |
| 1341 | continue; |
| 1342 | } |
| 1343 | // If the target matcher returned a specific error code use |
| 1344 | // that, else use the one from the generic matcher. |
| 1345 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
| 1346 | Diag = TargetDiag; |
| 1347 | } |
| 1348 | // If current formal operand wasn't matched and it is optional |
| 1349 | // then try to match next formal operand |
| 1350 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
| 1351 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "ignoring optional operand\n" ); |
| 1352 | continue; |
| 1353 | } |
| 1354 | // If this operand is broken for all of the instances of this |
| 1355 | // mnemonic, keep track of it so we can report loc info. |
| 1356 | // If we already had a match that only failed due to a |
| 1357 | // target predicate, that diagnostic is preferred. |
| 1358 | if (!HadMatchOtherThanPredicate && |
| 1359 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
| 1360 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
| 1361 | RetCode = Diag; |
| 1362 | ErrorInfo = ActualIdx; |
| 1363 | } |
| 1364 | // Otherwise, just reject this instance of the mnemonic. |
| 1365 | OperandsValid = false; |
| 1366 | break; |
| 1367 | } |
| 1368 | |
| 1369 | if (!OperandsValid) { |
| 1370 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Opcode result: multiple " |
| 1371 | "operand mismatches, ignoring " |
| 1372 | "this opcode\n" ); |
| 1373 | continue; |
| 1374 | } |
| 1375 | if (!HasRequiredFeatures) { |
| 1376 | HadMatchOtherThanFeatures = true; |
| 1377 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
| 1378 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Missing target features:" ; |
| 1379 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
| 1380 | if (NewMissingFeatures[I]) |
| 1381 | dbgs() << ' ' << I; |
| 1382 | dbgs() << "\n" ); |
| 1383 | if (NewMissingFeatures.count() <= |
| 1384 | MissingFeatures.count()) |
| 1385 | MissingFeatures = NewMissingFeatures; |
| 1386 | continue; |
| 1387 | } |
| 1388 | |
| 1389 | Inst.clear(); |
| 1390 | |
| 1391 | Inst.setOpcode(it->Opcode); |
| 1392 | // We have a potential match but have not rendered the operands. |
| 1393 | // Check the target predicate to handle any context sensitive |
| 1394 | // constraints. |
| 1395 | // For example, Ties that are referenced multiple times must be |
| 1396 | // checked here to ensure the input is the same for each match |
| 1397 | // constraints. If we leave it any later the ties will have been |
| 1398 | // canonicalized |
| 1399 | unsigned MatchResult; |
| 1400 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
| 1401 | Inst.clear(); |
| 1402 | DEBUG_WITH_TYPE( |
| 1403 | "asm-matcher" , |
| 1404 | dbgs() << "Early target match predicate failed with diag code " |
| 1405 | << MatchResult << "\n" ); |
| 1406 | RetCode = MatchResult; |
| 1407 | HadMatchOtherThanPredicate = true; |
| 1408 | continue; |
| 1409 | } |
| 1410 | |
| 1411 | if (matchingInlineAsm) { |
| 1412 | convertToMapAndConstraints(it->ConvertFn, Operands); |
| 1413 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 1414 | ErrorInfo)) |
| 1415 | return Match_InvalidTiedOperand; |
| 1416 | |
| 1417 | return Match_Success; |
| 1418 | } |
| 1419 | |
| 1420 | // We have selected a definite instruction, convert the parsed |
| 1421 | // operands into the appropriate MCInst. |
| 1422 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
| 1423 | |
| 1424 | // We have a potential match. Check the target predicate to |
| 1425 | // handle any context sensitive constraints. |
| 1426 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
| 1427 | DEBUG_WITH_TYPE("asm-matcher" , |
| 1428 | dbgs() << "Target match predicate failed with diag code " |
| 1429 | << MatchResult << "\n" ); |
| 1430 | Inst.clear(); |
| 1431 | RetCode = MatchResult; |
| 1432 | HadMatchOtherThanPredicate = true; |
| 1433 | continue; |
| 1434 | } |
| 1435 | |
| 1436 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 1437 | ErrorInfo)) |
| 1438 | return Match_InvalidTiedOperand; |
| 1439 | |
| 1440 | DEBUG_WITH_TYPE( |
| 1441 | "asm-matcher" , |
| 1442 | dbgs() << "Opcode result: complete match, selecting this opcode\n" ); |
| 1443 | return Match_Success; |
| 1444 | } |
| 1445 | |
| 1446 | // Okay, we had no match. Try to return a useful error code. |
| 1447 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
| 1448 | return RetCode; |
| 1449 | |
| 1450 | ErrorInfo = 0; |
| 1451 | return Match_MissingFeature; |
| 1452 | } |
| 1453 | |
| 1454 | #endif // GET_MATCHER_IMPLEMENTATION |
| 1455 | |
| 1456 | |
| 1457 | #ifdef GET_MNEMONIC_SPELL_CHECKER |
| 1458 | #undef GET_MNEMONIC_SPELL_CHECKER |
| 1459 | |
| 1460 | static std::string BPFMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
| 1461 | const unsigned MaxEditDist = 2; |
| 1462 | std::vector<StringRef> Candidates; |
| 1463 | StringRef Prev = "" ; |
| 1464 | |
| 1465 | // Find the appropriate table for this asm variant. |
| 1466 | const MatchEntry *Start, *End; |
| 1467 | switch (VariantID) { |
| 1468 | default: llvm_unreachable("invalid variant!" ); |
| 1469 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1470 | } |
| 1471 | |
| 1472 | for (auto I = Start; I < End; I++) { |
| 1473 | // Ignore unsupported instructions. |
| 1474 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
| 1475 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
| 1476 | continue; |
| 1477 | |
| 1478 | StringRef T = I->getMnemonic(); |
| 1479 | // Avoid recomputing the edit distance for the same string. |
| 1480 | if (T == Prev) |
| 1481 | continue; |
| 1482 | |
| 1483 | Prev = T; |
| 1484 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
| 1485 | if (Dist <= MaxEditDist) |
| 1486 | Candidates.push_back(T); |
| 1487 | } |
| 1488 | |
| 1489 | if (Candidates.empty()) |
| 1490 | return "" ; |
| 1491 | |
| 1492 | std::string Res = ", did you mean: " ; |
| 1493 | unsigned i = 0; |
| 1494 | for (; i < Candidates.size() - 1; i++) |
| 1495 | Res += Candidates[i].str() + ", " ; |
| 1496 | return Res + Candidates[i].str() + "?" ; |
| 1497 | } |
| 1498 | |
| 1499 | #endif // GET_MNEMONIC_SPELL_CHECKER |
| 1500 | |
| 1501 | |
| 1502 | #ifdef GET_MNEMONIC_CHECKER |
| 1503 | #undef GET_MNEMONIC_CHECKER |
| 1504 | |
| 1505 | static bool BPFCheckMnemonic(StringRef Mnemonic, |
| 1506 | const FeatureBitset &AvailableFeatures, |
| 1507 | unsigned VariantID) { |
| 1508 | // Find the appropriate table for this asm variant. |
| 1509 | const MatchEntry *Start, *End; |
| 1510 | switch (VariantID) { |
| 1511 | default: llvm_unreachable("invalid variant!" ); |
| 1512 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 1513 | } |
| 1514 | |
| 1515 | // Search the table. |
| 1516 | auto MnemonicRange = std::pair(Start, End); |
| 1517 | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
| 1518 | if (!Mnemonic.empty()) |
| 1519 | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
| 1520 | |
| 1521 | if (MnemonicRange.first == MnemonicRange.second) |
| 1522 | return false; |
| 1523 | |
| 1524 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 1525 | it != ie; ++it) { |
| 1526 | const FeatureBitset &RequiredFeatures = |
| 1527 | FeatureBitsets[it->RequiredFeaturesIdx]; |
| 1528 | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
| 1529 | return true; |
| 1530 | } |
| 1531 | return false; |
| 1532 | } |
| 1533 | |
| 1534 | #endif // GET_MNEMONIC_CHECKER |
| 1535 | |
| 1536 | |