| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Assembly Matcher Source Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* From: Hexagon.td *| |
| 7 | |* *| |
| 8 | \*===----------------------------------------------------------------------===*/ |
| 9 | |
| 10 | |
| 11 | #ifdef GET_ASSEMBLER_HEADER |
| 12 | #undef GET_ASSEMBLER_HEADER |
| 13 | // This should be included into the middle of the declaration of |
| 14 | // your subclasses implementation of MCTargetAsmParser. |
| 15 | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
| 16 | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 17 | const OperandVector &Operands); |
| 18 | void convertToMapAndConstraints(unsigned Kind, |
| 19 | const OperandVector &Operands) override; |
| 20 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 21 | MCInst &Inst, |
| 22 | uint64_t &ErrorInfo, |
| 23 | FeatureBitset &MissingFeatures, |
| 24 | bool matchingInlineAsm, |
| 25 | unsigned VariantID = 0); |
| 26 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
| 27 | MCInst &Inst, |
| 28 | uint64_t &ErrorInfo, |
| 29 | bool matchingInlineAsm, |
| 30 | unsigned VariantID = 0) { |
| 31 | FeatureBitset MissingFeatures; |
| 32 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
| 33 | matchingInlineAsm, VariantID); |
| 34 | } |
| 35 | |
| 36 | #endif // GET_ASSEMBLER_HEADER |
| 37 | |
| 38 | |
| 39 | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
| 40 | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
| 41 | |
| 42 | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
| 43 | |
| 44 | |
| 45 | #ifdef GET_REGISTER_MATCHER |
| 46 | #undef GET_REGISTER_MATCHER |
| 47 | |
| 48 | // Bits for subtarget features that participate in instruction matching. |
| 49 | enum SubtargetFeatureBits : uint8_t { |
| 50 | Feature_HasV5Bit = 2, |
| 51 | Feature_HasV55Bit = 3, |
| 52 | Feature_HasV60Bit = 4, |
| 53 | Feature_HasV62Bit = 5, |
| 54 | Feature_HasV65Bit = 6, |
| 55 | Feature_HasV66Bit = 7, |
| 56 | Feature_HasV67Bit = 8, |
| 57 | Feature_HasV68Bit = 9, |
| 58 | Feature_HasV69Bit = 10, |
| 59 | Feature_HasV71Bit = 11, |
| 60 | Feature_HasV73Bit = 12, |
| 61 | Feature_HasV75Bit = 13, |
| 62 | Feature_HasV79Bit = 14, |
| 63 | Feature_UseHVX64BBit = 18, |
| 64 | Feature_UseHVX128BBit = 19, |
| 65 | Feature_UseHVXBit = 17, |
| 66 | Feature_UseHVXV60Bit = 22, |
| 67 | Feature_UseHVXV62Bit = 23, |
| 68 | Feature_UseHVXV65Bit = 24, |
| 69 | Feature_UseHVXV66Bit = 25, |
| 70 | Feature_UseHVXV67Bit = 26, |
| 71 | Feature_UseHVXV68Bit = 27, |
| 72 | Feature_UseHVXV69Bit = 28, |
| 73 | Feature_UseHVXV71Bit = 29, |
| 74 | Feature_UseHVXV73Bit = 30, |
| 75 | Feature_UseHVXV75Bit = 31, |
| 76 | Feature_UseHVXV79Bit = 32, |
| 77 | Feature_UseAudioBit = 15, |
| 78 | Feature_UseZRegBit = 33, |
| 79 | Feature_HasPreV65Bit = 1, |
| 80 | Feature_UseHVXIEEEFPBit = 20, |
| 81 | Feature_UseHVXQFloatBit = 21, |
| 82 | Feature_HasMemNoShufBit = 0, |
| 83 | Feature_UseCabacBit = 16, |
| 84 | }; |
| 85 | |
| 86 | static MCRegister MatchRegisterName(StringRef Name) { |
| 87 | switch (Name.size()) { |
| 88 | default: break; |
| 89 | case 2: // 40 strings to match. |
| 90 | switch (Name[0]) { |
| 91 | default: break; |
| 92 | case 'c': // 2 strings to match. |
| 93 | switch (Name[1]) { |
| 94 | default: break; |
| 95 | case '5': // 1 string to match. |
| 96 | return Hexagon::C5; // "c5" |
| 97 | case '8': // 1 string to match. |
| 98 | return Hexagon::C8; // "c8" |
| 99 | } |
| 100 | break; |
| 101 | case 'g': // 7 strings to match. |
| 102 | switch (Name[1]) { |
| 103 | default: break; |
| 104 | case '4': // 1 string to match. |
| 105 | return Hexagon::G4; // "g4" |
| 106 | case '5': // 1 string to match. |
| 107 | return Hexagon::G5; // "g5" |
| 108 | case '6': // 1 string to match. |
| 109 | return Hexagon::G6; // "g6" |
| 110 | case '7': // 1 string to match. |
| 111 | return Hexagon::G7; // "g7" |
| 112 | case '8': // 1 string to match. |
| 113 | return Hexagon::G8; // "g8" |
| 114 | case '9': // 1 string to match. |
| 115 | return Hexagon::G9; // "g9" |
| 116 | case 'p': // 1 string to match. |
| 117 | return Hexagon::GP; // "gp" |
| 118 | } |
| 119 | break; |
| 120 | case 'm': // 2 strings to match. |
| 121 | switch (Name[1]) { |
| 122 | default: break; |
| 123 | case '0': // 1 string to match. |
| 124 | return Hexagon::M0; // "m0" |
| 125 | case '1': // 1 string to match. |
| 126 | return Hexagon::M1; // "m1" |
| 127 | } |
| 128 | break; |
| 129 | case 'p': // 5 strings to match. |
| 130 | switch (Name[1]) { |
| 131 | default: break; |
| 132 | case '0': // 1 string to match. |
| 133 | return Hexagon::P0; // "p0" |
| 134 | case '1': // 1 string to match. |
| 135 | return Hexagon::P1; // "p1" |
| 136 | case '2': // 1 string to match. |
| 137 | return Hexagon::P2; // "p2" |
| 138 | case '3': // 1 string to match. |
| 139 | return Hexagon::P3; // "p3" |
| 140 | case 'c': // 1 string to match. |
| 141 | return Hexagon::PC; // "pc" |
| 142 | } |
| 143 | break; |
| 144 | case 'q': // 4 strings to match. |
| 145 | switch (Name[1]) { |
| 146 | default: break; |
| 147 | case '0': // 1 string to match. |
| 148 | return Hexagon::Q0; // "q0" |
| 149 | case '1': // 1 string to match. |
| 150 | return Hexagon::Q1; // "q1" |
| 151 | case '2': // 1 string to match. |
| 152 | return Hexagon::Q2; // "q2" |
| 153 | case '3': // 1 string to match. |
| 154 | return Hexagon::Q3; // "q3" |
| 155 | } |
| 156 | break; |
| 157 | case 'r': // 10 strings to match. |
| 158 | switch (Name[1]) { |
| 159 | default: break; |
| 160 | case '0': // 1 string to match. |
| 161 | return Hexagon::R0; // "r0" |
| 162 | case '1': // 1 string to match. |
| 163 | return Hexagon::R1; // "r1" |
| 164 | case '2': // 1 string to match. |
| 165 | return Hexagon::R2; // "r2" |
| 166 | case '3': // 1 string to match. |
| 167 | return Hexagon::R3; // "r3" |
| 168 | case '4': // 1 string to match. |
| 169 | return Hexagon::R4; // "r4" |
| 170 | case '5': // 1 string to match. |
| 171 | return Hexagon::R5; // "r5" |
| 172 | case '6': // 1 string to match. |
| 173 | return Hexagon::R6; // "r6" |
| 174 | case '7': // 1 string to match. |
| 175 | return Hexagon::R7; // "r7" |
| 176 | case '8': // 1 string to match. |
| 177 | return Hexagon::R8; // "r8" |
| 178 | case '9': // 1 string to match. |
| 179 | return Hexagon::R9; // "r9" |
| 180 | } |
| 181 | break; |
| 182 | case 'v': // 10 strings to match. |
| 183 | switch (Name[1]) { |
| 184 | default: break; |
| 185 | case '0': // 1 string to match. |
| 186 | return Hexagon::V0; // "v0" |
| 187 | case '1': // 1 string to match. |
| 188 | return Hexagon::V1; // "v1" |
| 189 | case '2': // 1 string to match. |
| 190 | return Hexagon::V2; // "v2" |
| 191 | case '3': // 1 string to match. |
| 192 | return Hexagon::V3; // "v3" |
| 193 | case '4': // 1 string to match. |
| 194 | return Hexagon::V4; // "v4" |
| 195 | case '5': // 1 string to match. |
| 196 | return Hexagon::V5; // "v5" |
| 197 | case '6': // 1 string to match. |
| 198 | return Hexagon::V6; // "v6" |
| 199 | case '7': // 1 string to match. |
| 200 | return Hexagon::V7; // "v7" |
| 201 | case '8': // 1 string to match. |
| 202 | return Hexagon::V8; // "v8" |
| 203 | case '9': // 1 string to match. |
| 204 | return Hexagon::V9; // "v9" |
| 205 | } |
| 206 | break; |
| 207 | } |
| 208 | break; |
| 209 | case 3: // 115 strings to match. |
| 210 | switch (Name[0]) { |
| 211 | default: break; |
| 212 | case 'c': // 3 strings to match. |
| 213 | switch (Name[1]) { |
| 214 | default: break; |
| 215 | case 'c': // 1 string to match. |
| 216 | if (Name[2] != 'r') |
| 217 | break; |
| 218 | return Hexagon::CCR; // "ccr" |
| 219 | case 's': // 2 strings to match. |
| 220 | switch (Name[2]) { |
| 221 | default: break; |
| 222 | case '0': // 1 string to match. |
| 223 | return Hexagon::CS0; // "cs0" |
| 224 | case '1': // 1 string to match. |
| 225 | return Hexagon::CS1; // "cs1" |
| 226 | } |
| 227 | break; |
| 228 | } |
| 229 | break; |
| 230 | case 'e': // 2 strings to match. |
| 231 | switch (Name[1]) { |
| 232 | default: break; |
| 233 | case 'l': // 1 string to match. |
| 234 | if (Name[2] != 'r') |
| 235 | break; |
| 236 | return Hexagon::ELR; // "elr" |
| 237 | case 'v': // 1 string to match. |
| 238 | if (Name[2] != 'b') |
| 239 | break; |
| 240 | return Hexagon::EVB; // "evb" |
| 241 | } |
| 242 | break; |
| 243 | case 'g': // 13 strings to match. |
| 244 | switch (Name[1]) { |
| 245 | default: break; |
| 246 | case '1': // 6 strings to match. |
| 247 | switch (Name[2]) { |
| 248 | default: break; |
| 249 | case '0': // 1 string to match. |
| 250 | return Hexagon::G10; // "g10" |
| 251 | case '1': // 1 string to match. |
| 252 | return Hexagon::G11; // "g11" |
| 253 | case '2': // 1 string to match. |
| 254 | return Hexagon::G12; // "g12" |
| 255 | case '3': // 1 string to match. |
| 256 | return Hexagon::G13; // "g13" |
| 257 | case '4': // 1 string to match. |
| 258 | return Hexagon::G14; // "g14" |
| 259 | case '5': // 1 string to match. |
| 260 | return Hexagon::G15; // "g15" |
| 261 | } |
| 262 | break; |
| 263 | case '2': // 4 strings to match. |
| 264 | switch (Name[2]) { |
| 265 | default: break; |
| 266 | case '0': // 1 string to match. |
| 267 | return Hexagon::G20; // "g20" |
| 268 | case '1': // 1 string to match. |
| 269 | return Hexagon::G21; // "g21" |
| 270 | case '2': // 1 string to match. |
| 271 | return Hexagon::G22; // "g22" |
| 272 | case '3': // 1 string to match. |
| 273 | return Hexagon::G23; // "g23" |
| 274 | } |
| 275 | break; |
| 276 | case '3': // 2 strings to match. |
| 277 | switch (Name[2]) { |
| 278 | default: break; |
| 279 | case '0': // 1 string to match. |
| 280 | return Hexagon::G30; // "g30" |
| 281 | case '1': // 1 string to match. |
| 282 | return Hexagon::G31; // "g31" |
| 283 | } |
| 284 | break; |
| 285 | case 's': // 1 string to match. |
| 286 | if (Name[2] != 'r') |
| 287 | break; |
| 288 | return Hexagon::GSR; // "gsr" |
| 289 | } |
| 290 | break; |
| 291 | case 'l': // 2 strings to match. |
| 292 | if (Name[1] != 'c') |
| 293 | break; |
| 294 | switch (Name[2]) { |
| 295 | default: break; |
| 296 | case '0': // 1 string to match. |
| 297 | return Hexagon::LC0; // "lc0" |
| 298 | case '1': // 1 string to match. |
| 299 | return Hexagon::LC1; // "lc1" |
| 300 | } |
| 301 | break; |
| 302 | case 'r': // 23 strings to match. |
| 303 | switch (Name[1]) { |
| 304 | default: break; |
| 305 | case '1': // 10 strings to match. |
| 306 | switch (Name[2]) { |
| 307 | default: break; |
| 308 | case '0': // 1 string to match. |
| 309 | return Hexagon::R10; // "r10" |
| 310 | case '1': // 1 string to match. |
| 311 | return Hexagon::R11; // "r11" |
| 312 | case '2': // 1 string to match. |
| 313 | return Hexagon::R12; // "r12" |
| 314 | case '3': // 1 string to match. |
| 315 | return Hexagon::R13; // "r13" |
| 316 | case '4': // 1 string to match. |
| 317 | return Hexagon::R14; // "r14" |
| 318 | case '5': // 1 string to match. |
| 319 | return Hexagon::R15; // "r15" |
| 320 | case '6': // 1 string to match. |
| 321 | return Hexagon::R16; // "r16" |
| 322 | case '7': // 1 string to match. |
| 323 | return Hexagon::R17; // "r17" |
| 324 | case '8': // 1 string to match. |
| 325 | return Hexagon::R18; // "r18" |
| 326 | case '9': // 1 string to match. |
| 327 | return Hexagon::R19; // "r19" |
| 328 | } |
| 329 | break; |
| 330 | case '2': // 10 strings to match. |
| 331 | switch (Name[2]) { |
| 332 | default: break; |
| 333 | case '0': // 1 string to match. |
| 334 | return Hexagon::R20; // "r20" |
| 335 | case '1': // 1 string to match. |
| 336 | return Hexagon::R21; // "r21" |
| 337 | case '2': // 1 string to match. |
| 338 | return Hexagon::R22; // "r22" |
| 339 | case '3': // 1 string to match. |
| 340 | return Hexagon::R23; // "r23" |
| 341 | case '4': // 1 string to match. |
| 342 | return Hexagon::R24; // "r24" |
| 343 | case '5': // 1 string to match. |
| 344 | return Hexagon::R25; // "r25" |
| 345 | case '6': // 1 string to match. |
| 346 | return Hexagon::R26; // "r26" |
| 347 | case '7': // 1 string to match. |
| 348 | return Hexagon::R27; // "r27" |
| 349 | case '8': // 1 string to match. |
| 350 | return Hexagon::R28; // "r28" |
| 351 | case '9': // 1 string to match. |
| 352 | return Hexagon::R29; // "r29" |
| 353 | } |
| 354 | break; |
| 355 | case '3': // 2 strings to match. |
| 356 | switch (Name[2]) { |
| 357 | default: break; |
| 358 | case '0': // 1 string to match. |
| 359 | return Hexagon::R30; // "r30" |
| 360 | case '1': // 1 string to match. |
| 361 | return Hexagon::R31; // "r31" |
| 362 | } |
| 363 | break; |
| 364 | case 'e': // 1 string to match. |
| 365 | if (Name[2] != 'v') |
| 366 | break; |
| 367 | return Hexagon::REV; // "rev" |
| 368 | } |
| 369 | break; |
| 370 | case 's': // 47 strings to match. |
| 371 | switch (Name[1]) { |
| 372 | default: break; |
| 373 | case '1': // 6 strings to match. |
| 374 | switch (Name[2]) { |
| 375 | default: break; |
| 376 | case '1': // 1 string to match. |
| 377 | return Hexagon::S11; // "s11" |
| 378 | case '2': // 1 string to match. |
| 379 | return Hexagon::S12; // "s12" |
| 380 | case '3': // 1 string to match. |
| 381 | return Hexagon::S13; // "s13" |
| 382 | case '4': // 1 string to match. |
| 383 | return Hexagon::S14; // "s14" |
| 384 | case '5': // 1 string to match. |
| 385 | return Hexagon::S15; // "s15" |
| 386 | case '9': // 1 string to match. |
| 387 | return Hexagon::S19; // "s19" |
| 388 | } |
| 389 | break; |
| 390 | case '2': // 6 strings to match. |
| 391 | switch (Name[2]) { |
| 392 | default: break; |
| 393 | case '0': // 1 string to match. |
| 394 | return Hexagon::S20; // "s20" |
| 395 | case '2': // 1 string to match. |
| 396 | return Hexagon::S22; // "s22" |
| 397 | case '3': // 1 string to match. |
| 398 | return Hexagon::S23; // "s23" |
| 399 | case '4': // 1 string to match. |
| 400 | return Hexagon::S24; // "s24" |
| 401 | case '5': // 1 string to match. |
| 402 | return Hexagon::S25; // "s25" |
| 403 | case '6': // 1 string to match. |
| 404 | return Hexagon::S26; // "s26" |
| 405 | } |
| 406 | break; |
| 407 | case '3': // 1 string to match. |
| 408 | if (Name[2] != '5') |
| 409 | break; |
| 410 | return Hexagon::S35; // "s35" |
| 411 | case '4': // 4 strings to match. |
| 412 | switch (Name[2]) { |
| 413 | default: break; |
| 414 | case '4': // 1 string to match. |
| 415 | return Hexagon::S44; // "s44" |
| 416 | case '5': // 1 string to match. |
| 417 | return Hexagon::S45; // "s45" |
| 418 | case '6': // 1 string to match. |
| 419 | return Hexagon::S46; // "s46" |
| 420 | case '7': // 1 string to match. |
| 421 | return Hexagon::S47; // "s47" |
| 422 | } |
| 423 | break; |
| 424 | case '5': // 6 strings to match. |
| 425 | switch (Name[2]) { |
| 426 | default: break; |
| 427 | case '4': // 1 string to match. |
| 428 | return Hexagon::S54; // "s54" |
| 429 | case '5': // 1 string to match. |
| 430 | return Hexagon::S55; // "s55" |
| 431 | case '6': // 1 string to match. |
| 432 | return Hexagon::S56; // "s56" |
| 433 | case '7': // 1 string to match. |
| 434 | return Hexagon::S57; // "s57" |
| 435 | case '8': // 1 string to match. |
| 436 | return Hexagon::S58; // "s58" |
| 437 | case '9': // 1 string to match. |
| 438 | return Hexagon::S59; // "s59" |
| 439 | } |
| 440 | break; |
| 441 | case '6': // 10 strings to match. |
| 442 | switch (Name[2]) { |
| 443 | default: break; |
| 444 | case '0': // 1 string to match. |
| 445 | return Hexagon::S60; // "s60" |
| 446 | case '1': // 1 string to match. |
| 447 | return Hexagon::S61; // "s61" |
| 448 | case '2': // 1 string to match. |
| 449 | return Hexagon::S62; // "s62" |
| 450 | case '3': // 1 string to match. |
| 451 | return Hexagon::S63; // "s63" |
| 452 | case '4': // 1 string to match. |
| 453 | return Hexagon::S64; // "s64" |
| 454 | case '5': // 1 string to match. |
| 455 | return Hexagon::S65; // "s65" |
| 456 | case '6': // 1 string to match. |
| 457 | return Hexagon::S66; // "s66" |
| 458 | case '7': // 1 string to match. |
| 459 | return Hexagon::S67; // "s67" |
| 460 | case '8': // 1 string to match. |
| 461 | return Hexagon::S68; // "s68" |
| 462 | case '9': // 1 string to match. |
| 463 | return Hexagon::S69; // "s69" |
| 464 | } |
| 465 | break; |
| 466 | case '7': // 10 strings to match. |
| 467 | switch (Name[2]) { |
| 468 | default: break; |
| 469 | case '0': // 1 string to match. |
| 470 | return Hexagon::S70; // "s70" |
| 471 | case '1': // 1 string to match. |
| 472 | return Hexagon::S71; // "s71" |
| 473 | case '2': // 1 string to match. |
| 474 | return Hexagon::S72; // "s72" |
| 475 | case '3': // 1 string to match. |
| 476 | return Hexagon::S73; // "s73" |
| 477 | case '4': // 1 string to match. |
| 478 | return Hexagon::S74; // "s74" |
| 479 | case '5': // 1 string to match. |
| 480 | return Hexagon::S75; // "s75" |
| 481 | case '6': // 1 string to match. |
| 482 | return Hexagon::S76; // "s76" |
| 483 | case '7': // 1 string to match. |
| 484 | return Hexagon::S77; // "s77" |
| 485 | case '8': // 1 string to match. |
| 486 | return Hexagon::S78; // "s78" |
| 487 | case '9': // 1 string to match. |
| 488 | return Hexagon::S79; // "s79" |
| 489 | } |
| 490 | break; |
| 491 | case '8': // 1 string to match. |
| 492 | if (Name[2] != '0') |
| 493 | break; |
| 494 | return Hexagon::S80; // "s80" |
| 495 | case 'a': // 2 strings to match. |
| 496 | switch (Name[2]) { |
| 497 | default: break; |
| 498 | case '0': // 1 string to match. |
| 499 | return Hexagon::SA0; // "sa0" |
| 500 | case '1': // 1 string to match. |
| 501 | return Hexagon::SA1; // "sa1" |
| 502 | } |
| 503 | break; |
| 504 | case 's': // 1 string to match. |
| 505 | if (Name[2] != 'r') |
| 506 | break; |
| 507 | return Hexagon::SSR; // "ssr" |
| 508 | } |
| 509 | break; |
| 510 | case 'u': // 2 strings to match. |
| 511 | switch (Name[1]) { |
| 512 | default: break; |
| 513 | case 'g': // 1 string to match. |
| 514 | if (Name[2] != 'p') |
| 515 | break; |
| 516 | return Hexagon::UGP; // "ugp" |
| 517 | case 's': // 1 string to match. |
| 518 | if (Name[2] != 'r') |
| 519 | break; |
| 520 | return Hexagon::USR; // "usr" |
| 521 | } |
| 522 | break; |
| 523 | case 'v': // 23 strings to match. |
| 524 | switch (Name[1]) { |
| 525 | default: break; |
| 526 | case '1': // 10 strings to match. |
| 527 | switch (Name[2]) { |
| 528 | default: break; |
| 529 | case '0': // 1 string to match. |
| 530 | return Hexagon::V10; // "v10" |
| 531 | case '1': // 1 string to match. |
| 532 | return Hexagon::V11; // "v11" |
| 533 | case '2': // 1 string to match. |
| 534 | return Hexagon::V12; // "v12" |
| 535 | case '3': // 1 string to match. |
| 536 | return Hexagon::V13; // "v13" |
| 537 | case '4': // 1 string to match. |
| 538 | return Hexagon::V14; // "v14" |
| 539 | case '5': // 1 string to match. |
| 540 | return Hexagon::V15; // "v15" |
| 541 | case '6': // 1 string to match. |
| 542 | return Hexagon::V16; // "v16" |
| 543 | case '7': // 1 string to match. |
| 544 | return Hexagon::V17; // "v17" |
| 545 | case '8': // 1 string to match. |
| 546 | return Hexagon::V18; // "v18" |
| 547 | case '9': // 1 string to match. |
| 548 | return Hexagon::V19; // "v19" |
| 549 | } |
| 550 | break; |
| 551 | case '2': // 10 strings to match. |
| 552 | switch (Name[2]) { |
| 553 | default: break; |
| 554 | case '0': // 1 string to match. |
| 555 | return Hexagon::V20; // "v20" |
| 556 | case '1': // 1 string to match. |
| 557 | return Hexagon::V21; // "v21" |
| 558 | case '2': // 1 string to match. |
| 559 | return Hexagon::V22; // "v22" |
| 560 | case '3': // 1 string to match. |
| 561 | return Hexagon::V23; // "v23" |
| 562 | case '4': // 1 string to match. |
| 563 | return Hexagon::V24; // "v24" |
| 564 | case '5': // 1 string to match. |
| 565 | return Hexagon::V25; // "v25" |
| 566 | case '6': // 1 string to match. |
| 567 | return Hexagon::V26; // "v26" |
| 568 | case '7': // 1 string to match. |
| 569 | return Hexagon::V27; // "v27" |
| 570 | case '8': // 1 string to match. |
| 571 | return Hexagon::V28; // "v28" |
| 572 | case '9': // 1 string to match. |
| 573 | return Hexagon::V29; // "v29" |
| 574 | } |
| 575 | break; |
| 576 | case '3': // 2 strings to match. |
| 577 | switch (Name[2]) { |
| 578 | default: break; |
| 579 | case '0': // 1 string to match. |
| 580 | return Hexagon::V30; // "v30" |
| 581 | case '1': // 1 string to match. |
| 582 | return Hexagon::V31; // "v31" |
| 583 | } |
| 584 | break; |
| 585 | case 'i': // 1 string to match. |
| 586 | if (Name[2] != 'd') |
| 587 | break; |
| 588 | return Hexagon::VID; // "vid" |
| 589 | } |
| 590 | break; |
| 591 | } |
| 592 | break; |
| 593 | case 4: // 41 strings to match. |
| 594 | switch (Name[0]) { |
| 595 | default: break; |
| 596 | case 'c': // 5 strings to match. |
| 597 | switch (Name[1]) { |
| 598 | default: break; |
| 599 | case '1': // 1 string to match. |
| 600 | if (memcmp(Name.data()+2, ":0" , 2) != 0) |
| 601 | break; |
| 602 | return Hexagon::C1_0; // "c1:0" |
| 603 | case '3': // 1 string to match. |
| 604 | if (memcmp(Name.data()+2, ":2" , 2) != 0) |
| 605 | break; |
| 606 | return Hexagon::C3_2; // "c3:2" |
| 607 | case '5': // 1 string to match. |
| 608 | if (memcmp(Name.data()+2, ":4" , 2) != 0) |
| 609 | break; |
| 610 | return Hexagon::C5_4; // "c5:4" |
| 611 | case '7': // 1 string to match. |
| 612 | if (memcmp(Name.data()+2, ":6" , 2) != 0) |
| 613 | break; |
| 614 | return Hexagon::C7_6; // "c7:6" |
| 615 | case '9': // 1 string to match. |
| 616 | if (memcmp(Name.data()+2, ":8" , 2) != 0) |
| 617 | break; |
| 618 | return Hexagon::C9_8; // "c9:8" |
| 619 | } |
| 620 | break; |
| 621 | case 'd': // 1 string to match. |
| 622 | if (memcmp(Name.data()+1, "iag" , 3) != 0) |
| 623 | break; |
| 624 | return Hexagon::DIAG; // "diag" |
| 625 | case 'g': // 7 strings to match. |
| 626 | switch (Name[1]) { |
| 627 | default: break; |
| 628 | case '1': // 1 string to match. |
| 629 | if (memcmp(Name.data()+2, ":0" , 2) != 0) |
| 630 | break; |
| 631 | return Hexagon::G1_0; // "g1:0" |
| 632 | case '3': // 1 string to match. |
| 633 | if (memcmp(Name.data()+2, ":2" , 2) != 0) |
| 634 | break; |
| 635 | return Hexagon::G3_2; // "g3:2" |
| 636 | case '5': // 1 string to match. |
| 637 | if (memcmp(Name.data()+2, ":4" , 2) != 0) |
| 638 | break; |
| 639 | return Hexagon::G5_4; // "g5:4" |
| 640 | case '7': // 1 string to match. |
| 641 | if (memcmp(Name.data()+2, ":6" , 2) != 0) |
| 642 | break; |
| 643 | return Hexagon::G7_6; // "g7:6" |
| 644 | case '9': // 1 string to match. |
| 645 | if (memcmp(Name.data()+2, ":8" , 2) != 0) |
| 646 | break; |
| 647 | return Hexagon::G9_8; // "g9:8" |
| 648 | case 'e': // 1 string to match. |
| 649 | if (memcmp(Name.data()+2, "lr" , 2) != 0) |
| 650 | break; |
| 651 | return Hexagon::GELR; // "gelr" |
| 652 | case 'o': // 1 string to match. |
| 653 | if (memcmp(Name.data()+2, "sp" , 2) != 0) |
| 654 | break; |
| 655 | return Hexagon::GOSP; // "gosp" |
| 656 | } |
| 657 | break; |
| 658 | case 'h': // 1 string to match. |
| 659 | if (memcmp(Name.data()+1, "tid" , 3) != 0) |
| 660 | break; |
| 661 | return Hexagon::HTID; // "htid" |
| 662 | case 'p': // 1 string to match. |
| 663 | if (memcmp(Name.data()+1, "3:0" , 3) != 0) |
| 664 | break; |
| 665 | return Hexagon::P3_0; // "p3:0" |
| 666 | case 'r': // 5 strings to match. |
| 667 | switch (Name[1]) { |
| 668 | default: break; |
| 669 | case '1': // 1 string to match. |
| 670 | if (memcmp(Name.data()+2, ":0" , 2) != 0) |
| 671 | break; |
| 672 | return Hexagon::D0; // "r1:0" |
| 673 | case '3': // 1 string to match. |
| 674 | if (memcmp(Name.data()+2, ":2" , 2) != 0) |
| 675 | break; |
| 676 | return Hexagon::D1; // "r3:2" |
| 677 | case '5': // 1 string to match. |
| 678 | if (memcmp(Name.data()+2, ":4" , 2) != 0) |
| 679 | break; |
| 680 | return Hexagon::D2; // "r5:4" |
| 681 | case '7': // 1 string to match. |
| 682 | if (memcmp(Name.data()+2, ":6" , 2) != 0) |
| 683 | break; |
| 684 | return Hexagon::D3; // "r7:6" |
| 685 | case '9': // 1 string to match. |
| 686 | if (memcmp(Name.data()+2, ":8" , 2) != 0) |
| 687 | break; |
| 688 | return Hexagon::D4; // "r9:8" |
| 689 | } |
| 690 | break; |
| 691 | case 's': // 8 strings to match. |
| 692 | switch (Name[1]) { |
| 693 | default: break; |
| 694 | case '1': // 1 string to match. |
| 695 | if (memcmp(Name.data()+2, ":0" , 2) != 0) |
| 696 | break; |
| 697 | return Hexagon::SGP1_0; // "s1:0" |
| 698 | case '3': // 1 string to match. |
| 699 | if (memcmp(Name.data()+2, ":2" , 2) != 0) |
| 700 | break; |
| 701 | return Hexagon::S3_2; // "s3:2" |
| 702 | case '5': // 1 string to match. |
| 703 | if (memcmp(Name.data()+2, ":4" , 2) != 0) |
| 704 | break; |
| 705 | return Hexagon::S5_4; // "s5:4" |
| 706 | case '7': // 1 string to match. |
| 707 | if (memcmp(Name.data()+2, ":6" , 2) != 0) |
| 708 | break; |
| 709 | return Hexagon::S7_6; // "s7:6" |
| 710 | case '9': // 1 string to match. |
| 711 | if (memcmp(Name.data()+2, ":8" , 2) != 0) |
| 712 | break; |
| 713 | return Hexagon::S9_8; // "s9:8" |
| 714 | case 'g': // 2 strings to match. |
| 715 | if (Name[2] != 'p') |
| 716 | break; |
| 717 | switch (Name[3]) { |
| 718 | default: break; |
| 719 | case '0': // 1 string to match. |
| 720 | return Hexagon::SGP0; // "sgp0" |
| 721 | case '1': // 1 string to match. |
| 722 | return Hexagon::SGP1; // "sgp1" |
| 723 | } |
| 724 | break; |
| 725 | case 't': // 1 string to match. |
| 726 | if (memcmp(Name.data()+2, "id" , 2) != 0) |
| 727 | break; |
| 728 | return Hexagon::STID; // "stid" |
| 729 | } |
| 730 | break; |
| 731 | case 'v': // 13 strings to match. |
| 732 | switch (Name[1]) { |
| 733 | default: break; |
| 734 | case '0': // 1 string to match. |
| 735 | if (memcmp(Name.data()+2, ":1" , 2) != 0) |
| 736 | break; |
| 737 | return Hexagon::WR0; // "v0:1" |
| 738 | case '1': // 1 string to match. |
| 739 | if (memcmp(Name.data()+2, ":0" , 2) != 0) |
| 740 | break; |
| 741 | return Hexagon::W0; // "v1:0" |
| 742 | case '2': // 1 string to match. |
| 743 | if (memcmp(Name.data()+2, ":3" , 2) != 0) |
| 744 | break; |
| 745 | return Hexagon::WR1; // "v2:3" |
| 746 | case '3': // 2 strings to match. |
| 747 | if (Name[2] != ':') |
| 748 | break; |
| 749 | switch (Name[3]) { |
| 750 | default: break; |
| 751 | case '0': // 1 string to match. |
| 752 | return Hexagon::VQ0; // "v3:0" |
| 753 | case '2': // 1 string to match. |
| 754 | return Hexagon::W1; // "v3:2" |
| 755 | } |
| 756 | break; |
| 757 | case '4': // 1 string to match. |
| 758 | if (memcmp(Name.data()+2, ":5" , 2) != 0) |
| 759 | break; |
| 760 | return Hexagon::WR2; // "v4:5" |
| 761 | case '5': // 1 string to match. |
| 762 | if (memcmp(Name.data()+2, ":4" , 2) != 0) |
| 763 | break; |
| 764 | return Hexagon::W2; // "v5:4" |
| 765 | case '6': // 1 string to match. |
| 766 | if (memcmp(Name.data()+2, ":7" , 2) != 0) |
| 767 | break; |
| 768 | return Hexagon::WR3; // "v6:7" |
| 769 | case '7': // 2 strings to match. |
| 770 | if (Name[2] != ':') |
| 771 | break; |
| 772 | switch (Name[3]) { |
| 773 | default: break; |
| 774 | case '4': // 1 string to match. |
| 775 | return Hexagon::VQ1; // "v7:4" |
| 776 | case '6': // 1 string to match. |
| 777 | return Hexagon::W3; // "v7:6" |
| 778 | } |
| 779 | break; |
| 780 | case '8': // 1 string to match. |
| 781 | if (memcmp(Name.data()+2, ":9" , 2) != 0) |
| 782 | break; |
| 783 | return Hexagon::WR4; // "v8:9" |
| 784 | case '9': // 1 string to match. |
| 785 | if (memcmp(Name.data()+2, ":8" , 2) != 0) |
| 786 | break; |
| 787 | return Hexagon::W4; // "v9:8" |
| 788 | case 't': // 1 string to match. |
| 789 | if (memcmp(Name.data()+2, "mp" , 2) != 0) |
| 790 | break; |
| 791 | return Hexagon::VTMP; // "vtmp" |
| 792 | } |
| 793 | break; |
| 794 | } |
| 795 | break; |
| 796 | case 5: // 3 strings to match. |
| 797 | switch (Name[0]) { |
| 798 | default: break; |
| 799 | case 'b': // 1 string to match. |
| 800 | if (memcmp(Name.data()+1, "adva" , 4) != 0) |
| 801 | break; |
| 802 | return Hexagon::BADVA; // "badva" |
| 803 | case 'i': // 1 string to match. |
| 804 | if (memcmp(Name.data()+1, "mask" , 4) != 0) |
| 805 | break; |
| 806 | return Hexagon::IMASK; // "imask" |
| 807 | case 'v': // 1 string to match. |
| 808 | if (memcmp(Name.data()+1, "11:8" , 4) != 0) |
| 809 | break; |
| 810 | return Hexagon::VQ2; // "v11:8" |
| 811 | } |
| 812 | break; |
| 813 | case 6: // 97 strings to match. |
| 814 | switch (Name[0]) { |
| 815 | default: break; |
| 816 | case 'b': // 2 strings to match. |
| 817 | if (memcmp(Name.data()+1, "adva" , 4) != 0) |
| 818 | break; |
| 819 | switch (Name[5]) { |
| 820 | default: break; |
| 821 | case '0': // 1 string to match. |
| 822 | return Hexagon::BADVA0; // "badva0" |
| 823 | case '1': // 1 string to match. |
| 824 | return Hexagon::BADVA1; // "badva1" |
| 825 | } |
| 826 | break; |
| 827 | case 'c': // 6 strings to match. |
| 828 | switch (Name[1]) { |
| 829 | default: break; |
| 830 | case '1': // 5 strings to match. |
| 831 | switch (Name[2]) { |
| 832 | default: break; |
| 833 | case '1': // 1 string to match. |
| 834 | if (memcmp(Name.data()+3, ":10" , 3) != 0) |
| 835 | break; |
| 836 | return Hexagon::C11_10; // "c11:10" |
| 837 | case '3': // 1 string to match. |
| 838 | if (memcmp(Name.data()+3, ":12" , 3) != 0) |
| 839 | break; |
| 840 | return Hexagon::CS; // "c13:12" |
| 841 | case '5': // 1 string to match. |
| 842 | if (memcmp(Name.data()+3, ":14" , 3) != 0) |
| 843 | break; |
| 844 | return Hexagon::UPCYCLE; // "c15:14" |
| 845 | case '7': // 1 string to match. |
| 846 | if (memcmp(Name.data()+3, ":16" , 3) != 0) |
| 847 | break; |
| 848 | return Hexagon::C17_16; // "c17:16" |
| 849 | case '9': // 1 string to match. |
| 850 | if (memcmp(Name.data()+3, ":18" , 3) != 0) |
| 851 | break; |
| 852 | return Hexagon::PKTCOUNT; // "c19:18" |
| 853 | } |
| 854 | break; |
| 855 | case '3': // 1 string to match. |
| 856 | if (memcmp(Name.data()+2, "1:30" , 4) != 0) |
| 857 | break; |
| 858 | return Hexagon::UTIMER; // "c31:30" |
| 859 | } |
| 860 | break; |
| 861 | case 'g': // 12 strings to match. |
| 862 | switch (Name[1]) { |
| 863 | default: break; |
| 864 | case '1': // 5 strings to match. |
| 865 | switch (Name[2]) { |
| 866 | default: break; |
| 867 | case '1': // 1 string to match. |
| 868 | if (memcmp(Name.data()+3, ":10" , 3) != 0) |
| 869 | break; |
| 870 | return Hexagon::G11_10; // "g11:10" |
| 871 | case '3': // 1 string to match. |
| 872 | if (memcmp(Name.data()+3, ":12" , 3) != 0) |
| 873 | break; |
| 874 | return Hexagon::G13_12; // "g13:12" |
| 875 | case '5': // 1 string to match. |
| 876 | if (memcmp(Name.data()+3, ":14" , 3) != 0) |
| 877 | break; |
| 878 | return Hexagon::G15_14; // "g15:14" |
| 879 | case '7': // 1 string to match. |
| 880 | if (memcmp(Name.data()+3, ":16" , 3) != 0) |
| 881 | break; |
| 882 | return Hexagon::G17_16; // "g17:16" |
| 883 | case '9': // 1 string to match. |
| 884 | if (memcmp(Name.data()+3, ":18" , 3) != 0) |
| 885 | break; |
| 886 | return Hexagon::G19_18; // "g19:18" |
| 887 | } |
| 888 | break; |
| 889 | case '2': // 5 strings to match. |
| 890 | switch (Name[2]) { |
| 891 | default: break; |
| 892 | case '1': // 1 string to match. |
| 893 | if (memcmp(Name.data()+3, ":20" , 3) != 0) |
| 894 | break; |
| 895 | return Hexagon::G21_20; // "g21:20" |
| 896 | case '3': // 1 string to match. |
| 897 | if (memcmp(Name.data()+3, ":22" , 3) != 0) |
| 898 | break; |
| 899 | return Hexagon::G23_22; // "g23:22" |
| 900 | case '5': // 1 string to match. |
| 901 | if (memcmp(Name.data()+3, ":24" , 3) != 0) |
| 902 | break; |
| 903 | return Hexagon::G25_24; // "g25:24" |
| 904 | case '7': // 1 string to match. |
| 905 | if (memcmp(Name.data()+3, ":26" , 3) != 0) |
| 906 | break; |
| 907 | return Hexagon::G27_26; // "g27:26" |
| 908 | case '9': // 1 string to match. |
| 909 | if (memcmp(Name.data()+3, ":28" , 3) != 0) |
| 910 | break; |
| 911 | return Hexagon::G29_28; // "g29:28" |
| 912 | } |
| 913 | break; |
| 914 | case '3': // 1 string to match. |
| 915 | if (memcmp(Name.data()+2, "1:30" , 4) != 0) |
| 916 | break; |
| 917 | return Hexagon::G31_30; // "g31:30" |
| 918 | case 'b': // 1 string to match. |
| 919 | if (memcmp(Name.data()+2, "adva" , 4) != 0) |
| 920 | break; |
| 921 | return Hexagon::G3; // "gbadva" |
| 922 | } |
| 923 | break; |
| 924 | case 'i': // 2 strings to match. |
| 925 | if (memcmp(Name.data()+1, "sdb" , 3) != 0) |
| 926 | break; |
| 927 | switch (Name[4]) { |
| 928 | default: break; |
| 929 | case 'e': // 1 string to match. |
| 930 | if (Name[5] != 'n') |
| 931 | break; |
| 932 | return Hexagon::ISDBEN; // "isdben" |
| 933 | case 's': // 1 string to match. |
| 934 | if (Name[5] != 't') |
| 935 | break; |
| 936 | return Hexagon::ISDBST; // "isdbst" |
| 937 | } |
| 938 | break; |
| 939 | case 'p': // 1 string to match. |
| 940 | if (memcmp(Name.data()+1, "mucfg" , 5) != 0) |
| 941 | break; |
| 942 | return Hexagon::PMUCFG; // "pmucfg" |
| 943 | case 'r': // 11 strings to match. |
| 944 | switch (Name[1]) { |
| 945 | default: break; |
| 946 | case '1': // 5 strings to match. |
| 947 | switch (Name[2]) { |
| 948 | default: break; |
| 949 | case '1': // 1 string to match. |
| 950 | if (memcmp(Name.data()+3, ":10" , 3) != 0) |
| 951 | break; |
| 952 | return Hexagon::D5; // "r11:10" |
| 953 | case '3': // 1 string to match. |
| 954 | if (memcmp(Name.data()+3, ":12" , 3) != 0) |
| 955 | break; |
| 956 | return Hexagon::D6; // "r13:12" |
| 957 | case '5': // 1 string to match. |
| 958 | if (memcmp(Name.data()+3, ":14" , 3) != 0) |
| 959 | break; |
| 960 | return Hexagon::D7; // "r15:14" |
| 961 | case '7': // 1 string to match. |
| 962 | if (memcmp(Name.data()+3, ":16" , 3) != 0) |
| 963 | break; |
| 964 | return Hexagon::D8; // "r17:16" |
| 965 | case '9': // 1 string to match. |
| 966 | if (memcmp(Name.data()+3, ":18" , 3) != 0) |
| 967 | break; |
| 968 | return Hexagon::D9; // "r19:18" |
| 969 | } |
| 970 | break; |
| 971 | case '2': // 5 strings to match. |
| 972 | switch (Name[2]) { |
| 973 | default: break; |
| 974 | case '1': // 1 string to match. |
| 975 | if (memcmp(Name.data()+3, ":20" , 3) != 0) |
| 976 | break; |
| 977 | return Hexagon::D10; // "r21:20" |
| 978 | case '3': // 1 string to match. |
| 979 | if (memcmp(Name.data()+3, ":22" , 3) != 0) |
| 980 | break; |
| 981 | return Hexagon::D11; // "r23:22" |
| 982 | case '5': // 1 string to match. |
| 983 | if (memcmp(Name.data()+3, ":24" , 3) != 0) |
| 984 | break; |
| 985 | return Hexagon::D12; // "r25:24" |
| 986 | case '7': // 1 string to match. |
| 987 | if (memcmp(Name.data()+3, ":26" , 3) != 0) |
| 988 | break; |
| 989 | return Hexagon::D13; // "r27:26" |
| 990 | case '9': // 1 string to match. |
| 991 | if (memcmp(Name.data()+3, ":28" , 3) != 0) |
| 992 | break; |
| 993 | return Hexagon::D14; // "r29:28" |
| 994 | } |
| 995 | break; |
| 996 | case '3': // 1 string to match. |
| 997 | if (memcmp(Name.data()+2, "1:30" , 4) != 0) |
| 998 | break; |
| 999 | return Hexagon::D15; // "r31:30" |
| 1000 | } |
| 1001 | break; |
| 1002 | case 's': // 36 strings to match. |
| 1003 | switch (Name[1]) { |
| 1004 | default: break; |
| 1005 | case '1': // 5 strings to match. |
| 1006 | switch (Name[2]) { |
| 1007 | default: break; |
| 1008 | case '1': // 1 string to match. |
| 1009 | if (memcmp(Name.data()+3, ":10" , 3) != 0) |
| 1010 | break; |
| 1011 | return Hexagon::S11_10; // "s11:10" |
| 1012 | case '3': // 1 string to match. |
| 1013 | if (memcmp(Name.data()+3, ":12" , 3) != 0) |
| 1014 | break; |
| 1015 | return Hexagon::S13_12; // "s13:12" |
| 1016 | case '5': // 1 string to match. |
| 1017 | if (memcmp(Name.data()+3, ":14" , 3) != 0) |
| 1018 | break; |
| 1019 | return Hexagon::S15_14; // "s15:14" |
| 1020 | case '7': // 1 string to match. |
| 1021 | if (memcmp(Name.data()+3, ":16" , 3) != 0) |
| 1022 | break; |
| 1023 | return Hexagon::S17_16; // "s17:16" |
| 1024 | case '9': // 1 string to match. |
| 1025 | if (memcmp(Name.data()+3, ":18" , 3) != 0) |
| 1026 | break; |
| 1027 | return Hexagon::S19_18; // "s19:18" |
| 1028 | } |
| 1029 | break; |
| 1030 | case '2': // 5 strings to match. |
| 1031 | switch (Name[2]) { |
| 1032 | default: break; |
| 1033 | case '1': // 1 string to match. |
| 1034 | if (memcmp(Name.data()+3, ":20" , 3) != 0) |
| 1035 | break; |
| 1036 | return Hexagon::S21_20; // "s21:20" |
| 1037 | case '3': // 1 string to match. |
| 1038 | if (memcmp(Name.data()+3, ":22" , 3) != 0) |
| 1039 | break; |
| 1040 | return Hexagon::S23_22; // "s23:22" |
| 1041 | case '5': // 1 string to match. |
| 1042 | if (memcmp(Name.data()+3, ":24" , 3) != 0) |
| 1043 | break; |
| 1044 | return Hexagon::S25_24; // "s25:24" |
| 1045 | case '7': // 1 string to match. |
| 1046 | if (memcmp(Name.data()+3, ":26" , 3) != 0) |
| 1047 | break; |
| 1048 | return Hexagon::S27_26; // "s27:26" |
| 1049 | case '9': // 1 string to match. |
| 1050 | if (memcmp(Name.data()+3, ":28" , 3) != 0) |
| 1051 | break; |
| 1052 | return Hexagon::S29_28; // "s29:28" |
| 1053 | } |
| 1054 | break; |
| 1055 | case '3': // 5 strings to match. |
| 1056 | switch (Name[2]) { |
| 1057 | default: break; |
| 1058 | case '1': // 1 string to match. |
| 1059 | if (memcmp(Name.data()+3, ":30" , 3) != 0) |
| 1060 | break; |
| 1061 | return Hexagon::S31_30; // "s31:30" |
| 1062 | case '3': // 1 string to match. |
| 1063 | if (memcmp(Name.data()+3, ":32" , 3) != 0) |
| 1064 | break; |
| 1065 | return Hexagon::S33_32; // "s33:32" |
| 1066 | case '5': // 1 string to match. |
| 1067 | if (memcmp(Name.data()+3, ":34" , 3) != 0) |
| 1068 | break; |
| 1069 | return Hexagon::S35_34; // "s35:34" |
| 1070 | case '7': // 1 string to match. |
| 1071 | if (memcmp(Name.data()+3, ":36" , 3) != 0) |
| 1072 | break; |
| 1073 | return Hexagon::S37_36; // "s37:36" |
| 1074 | case '9': // 1 string to match. |
| 1075 | if (memcmp(Name.data()+3, ":38" , 3) != 0) |
| 1076 | break; |
| 1077 | return Hexagon::S39_38; // "s39:38" |
| 1078 | } |
| 1079 | break; |
| 1080 | case '4': // 5 strings to match. |
| 1081 | switch (Name[2]) { |
| 1082 | default: break; |
| 1083 | case '1': // 1 string to match. |
| 1084 | if (memcmp(Name.data()+3, ":40" , 3) != 0) |
| 1085 | break; |
| 1086 | return Hexagon::S41_40; // "s41:40" |
| 1087 | case '3': // 1 string to match. |
| 1088 | if (memcmp(Name.data()+3, ":42" , 3) != 0) |
| 1089 | break; |
| 1090 | return Hexagon::S43_42; // "s43:42" |
| 1091 | case '5': // 1 string to match. |
| 1092 | if (memcmp(Name.data()+3, ":44" , 3) != 0) |
| 1093 | break; |
| 1094 | return Hexagon::S45_44; // "s45:44" |
| 1095 | case '7': // 1 string to match. |
| 1096 | if (memcmp(Name.data()+3, ":46" , 3) != 0) |
| 1097 | break; |
| 1098 | return Hexagon::S47_46; // "s47:46" |
| 1099 | case '9': // 1 string to match. |
| 1100 | if (memcmp(Name.data()+3, ":48" , 3) != 0) |
| 1101 | break; |
| 1102 | return Hexagon::S49_48; // "s49:48" |
| 1103 | } |
| 1104 | break; |
| 1105 | case '5': // 5 strings to match. |
| 1106 | switch (Name[2]) { |
| 1107 | default: break; |
| 1108 | case '1': // 1 string to match. |
| 1109 | if (memcmp(Name.data()+3, ":50" , 3) != 0) |
| 1110 | break; |
| 1111 | return Hexagon::S51_50; // "s51:50" |
| 1112 | case '3': // 1 string to match. |
| 1113 | if (memcmp(Name.data()+3, ":52" , 3) != 0) |
| 1114 | break; |
| 1115 | return Hexagon::S53_52; // "s53:52" |
| 1116 | case '5': // 1 string to match. |
| 1117 | if (memcmp(Name.data()+3, ":54" , 3) != 0) |
| 1118 | break; |
| 1119 | return Hexagon::S55_54; // "s55:54" |
| 1120 | case '7': // 1 string to match. |
| 1121 | if (memcmp(Name.data()+3, ":56" , 3) != 0) |
| 1122 | break; |
| 1123 | return Hexagon::S57_56; // "s57:56" |
| 1124 | case '9': // 1 string to match. |
| 1125 | if (memcmp(Name.data()+3, ":58" , 3) != 0) |
| 1126 | break; |
| 1127 | return Hexagon::S59_58; // "s59:58" |
| 1128 | } |
| 1129 | break; |
| 1130 | case '6': // 5 strings to match. |
| 1131 | switch (Name[2]) { |
| 1132 | default: break; |
| 1133 | case '1': // 1 string to match. |
| 1134 | if (memcmp(Name.data()+3, ":60" , 3) != 0) |
| 1135 | break; |
| 1136 | return Hexagon::S61_60; // "s61:60" |
| 1137 | case '3': // 1 string to match. |
| 1138 | if (memcmp(Name.data()+3, ":62" , 3) != 0) |
| 1139 | break; |
| 1140 | return Hexagon::S63_62; // "s63:62" |
| 1141 | case '5': // 1 string to match. |
| 1142 | if (memcmp(Name.data()+3, ":64" , 3) != 0) |
| 1143 | break; |
| 1144 | return Hexagon::S65_64; // "s65:64" |
| 1145 | case '7': // 1 string to match. |
| 1146 | if (memcmp(Name.data()+3, ":66" , 3) != 0) |
| 1147 | break; |
| 1148 | return Hexagon::S67_66; // "s67:66" |
| 1149 | case '9': // 1 string to match. |
| 1150 | if (memcmp(Name.data()+3, ":68" , 3) != 0) |
| 1151 | break; |
| 1152 | return Hexagon::S69_68; // "s69:68" |
| 1153 | } |
| 1154 | break; |
| 1155 | case '7': // 5 strings to match. |
| 1156 | switch (Name[2]) { |
| 1157 | default: break; |
| 1158 | case '1': // 1 string to match. |
| 1159 | if (memcmp(Name.data()+3, ":70" , 3) != 0) |
| 1160 | break; |
| 1161 | return Hexagon::S71_70; // "s71:70" |
| 1162 | case '3': // 1 string to match. |
| 1163 | if (memcmp(Name.data()+3, ":72" , 3) != 0) |
| 1164 | break; |
| 1165 | return Hexagon::S73_72; // "s73:72" |
| 1166 | case '5': // 1 string to match. |
| 1167 | if (memcmp(Name.data()+3, ":74" , 3) != 0) |
| 1168 | break; |
| 1169 | return Hexagon::S75_74; // "s75:74" |
| 1170 | case '7': // 1 string to match. |
| 1171 | if (memcmp(Name.data()+3, ":76" , 3) != 0) |
| 1172 | break; |
| 1173 | return Hexagon::S77_76; // "s77:76" |
| 1174 | case '9': // 1 string to match. |
| 1175 | if (memcmp(Name.data()+3, ":78" , 3) != 0) |
| 1176 | break; |
| 1177 | return Hexagon::S79_78; // "s79:78" |
| 1178 | } |
| 1179 | break; |
| 1180 | case 'y': // 1 string to match. |
| 1181 | if (memcmp(Name.data()+2, "scfg" , 4) != 0) |
| 1182 | break; |
| 1183 | return Hexagon::SYSCFG; // "syscfg" |
| 1184 | } |
| 1185 | break; |
| 1186 | case 'v': // 27 strings to match. |
| 1187 | switch (Name[1]) { |
| 1188 | default: break; |
| 1189 | case '1': // 12 strings to match. |
| 1190 | switch (Name[2]) { |
| 1191 | default: break; |
| 1192 | case '0': // 1 string to match. |
| 1193 | if (memcmp(Name.data()+3, ":11" , 3) != 0) |
| 1194 | break; |
| 1195 | return Hexagon::WR5; // "v10:11" |
| 1196 | case '1': // 1 string to match. |
| 1197 | if (memcmp(Name.data()+3, ":10" , 3) != 0) |
| 1198 | break; |
| 1199 | return Hexagon::W5; // "v11:10" |
| 1200 | case '2': // 1 string to match. |
| 1201 | if (memcmp(Name.data()+3, ":13" , 3) != 0) |
| 1202 | break; |
| 1203 | return Hexagon::WR6; // "v12:13" |
| 1204 | case '3': // 1 string to match. |
| 1205 | if (memcmp(Name.data()+3, ":12" , 3) != 0) |
| 1206 | break; |
| 1207 | return Hexagon::W6; // "v13:12" |
| 1208 | case '4': // 1 string to match. |
| 1209 | if (memcmp(Name.data()+3, ":15" , 3) != 0) |
| 1210 | break; |
| 1211 | return Hexagon::WR7; // "v14:15" |
| 1212 | case '5': // 2 strings to match. |
| 1213 | if (memcmp(Name.data()+3, ":1" , 2) != 0) |
| 1214 | break; |
| 1215 | switch (Name[5]) { |
| 1216 | default: break; |
| 1217 | case '2': // 1 string to match. |
| 1218 | return Hexagon::VQ3; // "v15:12" |
| 1219 | case '4': // 1 string to match. |
| 1220 | return Hexagon::W7; // "v15:14" |
| 1221 | } |
| 1222 | break; |
| 1223 | case '6': // 1 string to match. |
| 1224 | if (memcmp(Name.data()+3, ":17" , 3) != 0) |
| 1225 | break; |
| 1226 | return Hexagon::WR8; // "v16:17" |
| 1227 | case '7': // 1 string to match. |
| 1228 | if (memcmp(Name.data()+3, ":16" , 3) != 0) |
| 1229 | break; |
| 1230 | return Hexagon::W8; // "v17:16" |
| 1231 | case '8': // 1 string to match. |
| 1232 | if (memcmp(Name.data()+3, ":19" , 3) != 0) |
| 1233 | break; |
| 1234 | return Hexagon::WR9; // "v18:19" |
| 1235 | case '9': // 2 strings to match. |
| 1236 | if (memcmp(Name.data()+3, ":1" , 2) != 0) |
| 1237 | break; |
| 1238 | switch (Name[5]) { |
| 1239 | default: break; |
| 1240 | case '6': // 1 string to match. |
| 1241 | return Hexagon::VQ4; // "v19:16" |
| 1242 | case '8': // 1 string to match. |
| 1243 | return Hexagon::W9; // "v19:18" |
| 1244 | } |
| 1245 | break; |
| 1246 | } |
| 1247 | break; |
| 1248 | case '2': // 12 strings to match. |
| 1249 | switch (Name[2]) { |
| 1250 | default: break; |
| 1251 | case '0': // 1 string to match. |
| 1252 | if (memcmp(Name.data()+3, ":21" , 3) != 0) |
| 1253 | break; |
| 1254 | return Hexagon::WR10; // "v20:21" |
| 1255 | case '1': // 1 string to match. |
| 1256 | if (memcmp(Name.data()+3, ":20" , 3) != 0) |
| 1257 | break; |
| 1258 | return Hexagon::W10; // "v21:20" |
| 1259 | case '2': // 1 string to match. |
| 1260 | if (memcmp(Name.data()+3, ":23" , 3) != 0) |
| 1261 | break; |
| 1262 | return Hexagon::WR11; // "v22:23" |
| 1263 | case '3': // 2 strings to match. |
| 1264 | if (memcmp(Name.data()+3, ":2" , 2) != 0) |
| 1265 | break; |
| 1266 | switch (Name[5]) { |
| 1267 | default: break; |
| 1268 | case '0': // 1 string to match. |
| 1269 | return Hexagon::VQ5; // "v23:20" |
| 1270 | case '2': // 1 string to match. |
| 1271 | return Hexagon::W11; // "v23:22" |
| 1272 | } |
| 1273 | break; |
| 1274 | case '4': // 1 string to match. |
| 1275 | if (memcmp(Name.data()+3, ":25" , 3) != 0) |
| 1276 | break; |
| 1277 | return Hexagon::WR12; // "v24:25" |
| 1278 | case '5': // 1 string to match. |
| 1279 | if (memcmp(Name.data()+3, ":24" , 3) != 0) |
| 1280 | break; |
| 1281 | return Hexagon::W12; // "v25:24" |
| 1282 | case '6': // 1 string to match. |
| 1283 | if (memcmp(Name.data()+3, ":27" , 3) != 0) |
| 1284 | break; |
| 1285 | return Hexagon::WR13; // "v26:27" |
| 1286 | case '7': // 2 strings to match. |
| 1287 | if (memcmp(Name.data()+3, ":2" , 2) != 0) |
| 1288 | break; |
| 1289 | switch (Name[5]) { |
| 1290 | default: break; |
| 1291 | case '4': // 1 string to match. |
| 1292 | return Hexagon::VQ6; // "v27:24" |
| 1293 | case '6': // 1 string to match. |
| 1294 | return Hexagon::W13; // "v27:26" |
| 1295 | } |
| 1296 | break; |
| 1297 | case '8': // 1 string to match. |
| 1298 | if (memcmp(Name.data()+3, ":29" , 3) != 0) |
| 1299 | break; |
| 1300 | return Hexagon::WR14; // "v28:29" |
| 1301 | case '9': // 1 string to match. |
| 1302 | if (memcmp(Name.data()+3, ":28" , 3) != 0) |
| 1303 | break; |
| 1304 | return Hexagon::W14; // "v29:28" |
| 1305 | } |
| 1306 | break; |
| 1307 | case '3': // 3 strings to match. |
| 1308 | switch (Name[2]) { |
| 1309 | default: break; |
| 1310 | case '0': // 1 string to match. |
| 1311 | if (memcmp(Name.data()+3, ":31" , 3) != 0) |
| 1312 | break; |
| 1313 | return Hexagon::WR15; // "v30:31" |
| 1314 | case '1': // 2 strings to match. |
| 1315 | if (Name[3] != ':') |
| 1316 | break; |
| 1317 | switch (Name[4]) { |
| 1318 | default: break; |
| 1319 | case '2': // 1 string to match. |
| 1320 | if (Name[5] != '8') |
| 1321 | break; |
| 1322 | return Hexagon::VQ7; // "v31:28" |
| 1323 | case '3': // 1 string to match. |
| 1324 | if (Name[5] != '0') |
| 1325 | break; |
| 1326 | return Hexagon::W15; // "v31:30" |
| 1327 | } |
| 1328 | break; |
| 1329 | } |
| 1330 | break; |
| 1331 | } |
| 1332 | break; |
| 1333 | } |
| 1334 | break; |
| 1335 | case 7: // 8 strings to match. |
| 1336 | switch (Name[0]) { |
| 1337 | default: break; |
| 1338 | case 'c': // 1 string to match. |
| 1339 | if (memcmp(Name.data()+1, "fgbase" , 6) != 0) |
| 1340 | break; |
| 1341 | return Hexagon::CFGBASE; // "cfgbase" |
| 1342 | case 'i': // 1 string to match. |
| 1343 | if (memcmp(Name.data()+1, "sdbgpr" , 6) != 0) |
| 1344 | break; |
| 1345 | return Hexagon::ISDBGPR; // "isdbgpr" |
| 1346 | case 'm': // 1 string to match. |
| 1347 | if (memcmp(Name.data()+1, "odectl" , 6) != 0) |
| 1348 | break; |
| 1349 | return Hexagon::MODECTL; // "modectl" |
| 1350 | case 'p': // 4 strings to match. |
| 1351 | if (memcmp(Name.data()+1, "mucnt" , 5) != 0) |
| 1352 | break; |
| 1353 | switch (Name[6]) { |
| 1354 | default: break; |
| 1355 | case '0': // 1 string to match. |
| 1356 | return Hexagon::PMUCNT0; // "pmucnt0" |
| 1357 | case '1': // 1 string to match. |
| 1358 | return Hexagon::PMUCNT1; // "pmucnt1" |
| 1359 | case '2': // 1 string to match. |
| 1360 | return Hexagon::PMUCNT2; // "pmucnt2" |
| 1361 | case '3': // 1 string to match. |
| 1362 | return Hexagon::PMUCNT3; // "pmucnt3" |
| 1363 | } |
| 1364 | break; |
| 1365 | case 'u': // 1 string to match. |
| 1366 | if (memcmp(Name.data()+1, "sr.ovf" , 6) != 0) |
| 1367 | break; |
| 1368 | return Hexagon::USR_OVF; // "usr.ovf" |
| 1369 | } |
| 1370 | break; |
| 1371 | case 8: // 18 strings to match. |
| 1372 | switch (Name[0]) { |
| 1373 | default: break; |
| 1374 | case '_': // 1 string to match. |
| 1375 | if (memcmp(Name.data()+1, "_999999" , 7) != 0) |
| 1376 | break; |
| 1377 | return Hexagon::VF0; // "__999999" |
| 1378 | case 'b': // 2 strings to match. |
| 1379 | if (memcmp(Name.data()+1, "rkptpc" , 6) != 0) |
| 1380 | break; |
| 1381 | switch (Name[7]) { |
| 1382 | default: break; |
| 1383 | case '0': // 1 string to match. |
| 1384 | return Hexagon::BRKPTPC0; // "brkptpc0" |
| 1385 | case '1': // 1 string to match. |
| 1386 | return Hexagon::BRKPTPC1; // "brkptpc1" |
| 1387 | } |
| 1388 | break; |
| 1389 | case 'f': // 1 string to match. |
| 1390 | if (memcmp(Name.data()+1, "ramekey" , 7) != 0) |
| 1391 | break; |
| 1392 | return Hexagon::FRAMEKEY; // "framekey" |
| 1393 | case 'g': // 8 strings to match. |
| 1394 | if (memcmp(Name.data()+1, "pmucnt" , 6) != 0) |
| 1395 | break; |
| 1396 | switch (Name[7]) { |
| 1397 | default: break; |
| 1398 | case '0': // 1 string to match. |
| 1399 | return Hexagon::GPMUCNT0; // "gpmucnt0" |
| 1400 | case '1': // 1 string to match. |
| 1401 | return Hexagon::GPMUCNT1; // "gpmucnt1" |
| 1402 | case '2': // 1 string to match. |
| 1403 | return Hexagon::GPMUCNT2; // "gpmucnt2" |
| 1404 | case '3': // 1 string to match. |
| 1405 | return Hexagon::GPMUCNT3; // "gpmucnt3" |
| 1406 | case '4': // 1 string to match. |
| 1407 | return Hexagon::GPMUCNT4; // "gpmucnt4" |
| 1408 | case '5': // 1 string to match. |
| 1409 | return Hexagon::GPMUCNT5; // "gpmucnt5" |
| 1410 | case '6': // 1 string to match. |
| 1411 | return Hexagon::GPMUCNT6; // "gpmucnt6" |
| 1412 | case '7': // 1 string to match. |
| 1413 | return Hexagon::GPMUCNT7; // "gpmucnt7" |
| 1414 | } |
| 1415 | break; |
| 1416 | case 'i': // 2 strings to match. |
| 1417 | if (memcmp(Name.data()+1, "sdbcfg" , 6) != 0) |
| 1418 | break; |
| 1419 | switch (Name[7]) { |
| 1420 | default: break; |
| 1421 | case '0': // 1 string to match. |
| 1422 | return Hexagon::ISDBCFG0; // "isdbcfg0" |
| 1423 | case '1': // 1 string to match. |
| 1424 | return Hexagon::ISDBCFG1; // "isdbcfg1" |
| 1425 | } |
| 1426 | break; |
| 1427 | case 'p': // 2 strings to match. |
| 1428 | if (memcmp(Name.data()+1, "cycle" , 5) != 0) |
| 1429 | break; |
| 1430 | switch (Name[6]) { |
| 1431 | default: break; |
| 1432 | case 'h': // 1 string to match. |
| 1433 | if (Name[7] != 'i') |
| 1434 | break; |
| 1435 | return Hexagon::PCYCLEHI; // "pcyclehi" |
| 1436 | case 'l': // 1 string to match. |
| 1437 | if (Name[7] != 'o') |
| 1438 | break; |
| 1439 | return Hexagon::PCYCLELO; // "pcyclelo" |
| 1440 | } |
| 1441 | break; |
| 1442 | case 'u': // 2 strings to match. |
| 1443 | if (memcmp(Name.data()+1, "timer" , 5) != 0) |
| 1444 | break; |
| 1445 | switch (Name[6]) { |
| 1446 | default: break; |
| 1447 | case 'h': // 1 string to match. |
| 1448 | if (Name[7] != 'i') |
| 1449 | break; |
| 1450 | return Hexagon::UTIMERHI; // "utimerhi" |
| 1451 | case 'l': // 1 string to match. |
| 1452 | if (Name[7] != 'o') |
| 1453 | break; |
| 1454 | return Hexagon::UTIMERLO; // "utimerlo" |
| 1455 | } |
| 1456 | break; |
| 1457 | } |
| 1458 | break; |
| 1459 | case 9: // 40 strings to match. |
| 1460 | switch (Name[0]) { |
| 1461 | default: break; |
| 1462 | case '_': // 32 strings to match. |
| 1463 | if (Name[1] != '_') |
| 1464 | break; |
| 1465 | switch (Name[2]) { |
| 1466 | default: break; |
| 1467 | case '1': // 31 strings to match. |
| 1468 | if (memcmp(Name.data()+3, "0000" , 4) != 0) |
| 1469 | break; |
| 1470 | switch (Name[7]) { |
| 1471 | default: break; |
| 1472 | case '0': // 10 strings to match. |
| 1473 | switch (Name[8]) { |
| 1474 | default: break; |
| 1475 | case '0': // 1 string to match. |
| 1476 | return Hexagon::VF1; // "__1000000" |
| 1477 | case '1': // 1 string to match. |
| 1478 | return Hexagon::VF2; // "__1000001" |
| 1479 | case '2': // 1 string to match. |
| 1480 | return Hexagon::VF3; // "__1000002" |
| 1481 | case '3': // 1 string to match. |
| 1482 | return Hexagon::VF4; // "__1000003" |
| 1483 | case '4': // 1 string to match. |
| 1484 | return Hexagon::VF5; // "__1000004" |
| 1485 | case '5': // 1 string to match. |
| 1486 | return Hexagon::VF6; // "__1000005" |
| 1487 | case '6': // 1 string to match. |
| 1488 | return Hexagon::VF7; // "__1000006" |
| 1489 | case '7': // 1 string to match. |
| 1490 | return Hexagon::VF8; // "__1000007" |
| 1491 | case '8': // 1 string to match. |
| 1492 | return Hexagon::VF9; // "__1000008" |
| 1493 | case '9': // 1 string to match. |
| 1494 | return Hexagon::VF10; // "__1000009" |
| 1495 | } |
| 1496 | break; |
| 1497 | case '1': // 10 strings to match. |
| 1498 | switch (Name[8]) { |
| 1499 | default: break; |
| 1500 | case '0': // 1 string to match. |
| 1501 | return Hexagon::VF11; // "__1000010" |
| 1502 | case '1': // 1 string to match. |
| 1503 | return Hexagon::VF12; // "__1000011" |
| 1504 | case '2': // 1 string to match. |
| 1505 | return Hexagon::VF13; // "__1000012" |
| 1506 | case '3': // 1 string to match. |
| 1507 | return Hexagon::VF14; // "__1000013" |
| 1508 | case '4': // 1 string to match. |
| 1509 | return Hexagon::VF15; // "__1000014" |
| 1510 | case '5': // 1 string to match. |
| 1511 | return Hexagon::VF16; // "__1000015" |
| 1512 | case '6': // 1 string to match. |
| 1513 | return Hexagon::VF17; // "__1000016" |
| 1514 | case '7': // 1 string to match. |
| 1515 | return Hexagon::VF18; // "__1000017" |
| 1516 | case '8': // 1 string to match. |
| 1517 | return Hexagon::VF19; // "__1000018" |
| 1518 | case '9': // 1 string to match. |
| 1519 | return Hexagon::VF20; // "__1000019" |
| 1520 | } |
| 1521 | break; |
| 1522 | case '2': // 10 strings to match. |
| 1523 | switch (Name[8]) { |
| 1524 | default: break; |
| 1525 | case '0': // 1 string to match. |
| 1526 | return Hexagon::VF21; // "__1000020" |
| 1527 | case '1': // 1 string to match. |
| 1528 | return Hexagon::VF22; // "__1000021" |
| 1529 | case '2': // 1 string to match. |
| 1530 | return Hexagon::VF23; // "__1000022" |
| 1531 | case '3': // 1 string to match. |
| 1532 | return Hexagon::VF24; // "__1000023" |
| 1533 | case '4': // 1 string to match. |
| 1534 | return Hexagon::VF25; // "__1000024" |
| 1535 | case '5': // 1 string to match. |
| 1536 | return Hexagon::VF26; // "__1000025" |
| 1537 | case '6': // 1 string to match. |
| 1538 | return Hexagon::VF27; // "__1000026" |
| 1539 | case '7': // 1 string to match. |
| 1540 | return Hexagon::VF28; // "__1000027" |
| 1541 | case '8': // 1 string to match. |
| 1542 | return Hexagon::VF29; // "__1000028" |
| 1543 | case '9': // 1 string to match. |
| 1544 | return Hexagon::VF30; // "__1000029" |
| 1545 | } |
| 1546 | break; |
| 1547 | case '3': // 1 string to match. |
| 1548 | if (Name[8] != '0') |
| 1549 | break; |
| 1550 | return Hexagon::VF31; // "__1000030" |
| 1551 | } |
| 1552 | break; |
| 1553 | case '9': // 1 string to match. |
| 1554 | if (memcmp(Name.data()+3, "999999" , 6) != 0) |
| 1555 | break; |
| 1556 | return Hexagon::VFR0; // "__9999999" |
| 1557 | } |
| 1558 | break; |
| 1559 | case 'b': // 2 strings to match. |
| 1560 | if (memcmp(Name.data()+1, "rkptcfg" , 7) != 0) |
| 1561 | break; |
| 1562 | switch (Name[8]) { |
| 1563 | default: break; |
| 1564 | case '0': // 1 string to match. |
| 1565 | return Hexagon::BRKPTCFG0; // "brkptcfg0" |
| 1566 | case '1': // 1 string to match. |
| 1567 | return Hexagon::BRKPTCFG1; // "brkptcfg1" |
| 1568 | } |
| 1569 | break; |
| 1570 | case 'g': // 2 strings to match. |
| 1571 | if (memcmp(Name.data()+1, "pcycle" , 6) != 0) |
| 1572 | break; |
| 1573 | switch (Name[7]) { |
| 1574 | default: break; |
| 1575 | case 'h': // 1 string to match. |
| 1576 | if (Name[8] != 'i') |
| 1577 | break; |
| 1578 | return Hexagon::GPCYCLEHI; // "gpcyclehi" |
| 1579 | case 'l': // 1 string to match. |
| 1580 | if (Name[8] != 'o') |
| 1581 | break; |
| 1582 | return Hexagon::GPCYCLELO; // "gpcyclelo" |
| 1583 | } |
| 1584 | break; |
| 1585 | case 'i': // 1 string to match. |
| 1586 | if (memcmp(Name.data()+1, "sdbmbxin" , 8) != 0) |
| 1587 | break; |
| 1588 | return Hexagon::ISDBMBXIN; // "isdbmbxin" |
| 1589 | case 'p': // 1 string to match. |
| 1590 | if (memcmp(Name.data()+1, "muevtcfg" , 8) != 0) |
| 1591 | break; |
| 1592 | return Hexagon::PMUEVTCFG; // "pmuevtcfg" |
| 1593 | case 'u': // 2 strings to match. |
| 1594 | if (memcmp(Name.data()+1, "pcycle" , 6) != 0) |
| 1595 | break; |
| 1596 | switch (Name[7]) { |
| 1597 | default: break; |
| 1598 | case 'h': // 1 string to match. |
| 1599 | if (Name[8] != 'i') |
| 1600 | break; |
| 1601 | return Hexagon::UPCYCLEHI; // "upcyclehi" |
| 1602 | case 'l': // 1 string to match. |
| 1603 | if (Name[8] != 'o') |
| 1604 | break; |
| 1605 | return Hexagon::UPCYCLELO; // "upcyclelo" |
| 1606 | } |
| 1607 | break; |
| 1608 | } |
| 1609 | break; |
| 1610 | case 10: // 35 strings to match. |
| 1611 | switch (Name[0]) { |
| 1612 | default: break; |
| 1613 | case '_': // 31 strings to match. |
| 1614 | if (memcmp(Name.data()+1, "_100000" , 7) != 0) |
| 1615 | break; |
| 1616 | switch (Name[8]) { |
| 1617 | default: break; |
| 1618 | case '0': // 10 strings to match. |
| 1619 | switch (Name[9]) { |
| 1620 | default: break; |
| 1621 | case '0': // 1 string to match. |
| 1622 | return Hexagon::VFR1; // "__10000000" |
| 1623 | case '1': // 1 string to match. |
| 1624 | return Hexagon::VFR2; // "__10000001" |
| 1625 | case '2': // 1 string to match. |
| 1626 | return Hexagon::VFR3; // "__10000002" |
| 1627 | case '3': // 1 string to match. |
| 1628 | return Hexagon::VFR4; // "__10000003" |
| 1629 | case '4': // 1 string to match. |
| 1630 | return Hexagon::VFR5; // "__10000004" |
| 1631 | case '5': // 1 string to match. |
| 1632 | return Hexagon::VFR6; // "__10000005" |
| 1633 | case '6': // 1 string to match. |
| 1634 | return Hexagon::VFR7; // "__10000006" |
| 1635 | case '7': // 1 string to match. |
| 1636 | return Hexagon::VFR8; // "__10000007" |
| 1637 | case '8': // 1 string to match. |
| 1638 | return Hexagon::VFR9; // "__10000008" |
| 1639 | case '9': // 1 string to match. |
| 1640 | return Hexagon::VFR10; // "__10000009" |
| 1641 | } |
| 1642 | break; |
| 1643 | case '1': // 10 strings to match. |
| 1644 | switch (Name[9]) { |
| 1645 | default: break; |
| 1646 | case '0': // 1 string to match. |
| 1647 | return Hexagon::VFR11; // "__10000010" |
| 1648 | case '1': // 1 string to match. |
| 1649 | return Hexagon::VFR12; // "__10000011" |
| 1650 | case '2': // 1 string to match. |
| 1651 | return Hexagon::VFR13; // "__10000012" |
| 1652 | case '3': // 1 string to match. |
| 1653 | return Hexagon::VFR14; // "__10000013" |
| 1654 | case '4': // 1 string to match. |
| 1655 | return Hexagon::VFR15; // "__10000014" |
| 1656 | case '5': // 1 string to match. |
| 1657 | return Hexagon::VFR16; // "__10000015" |
| 1658 | case '6': // 1 string to match. |
| 1659 | return Hexagon::VFR17; // "__10000016" |
| 1660 | case '7': // 1 string to match. |
| 1661 | return Hexagon::VFR18; // "__10000017" |
| 1662 | case '8': // 1 string to match. |
| 1663 | return Hexagon::VFR19; // "__10000018" |
| 1664 | case '9': // 1 string to match. |
| 1665 | return Hexagon::VFR20; // "__10000019" |
| 1666 | } |
| 1667 | break; |
| 1668 | case '2': // 10 strings to match. |
| 1669 | switch (Name[9]) { |
| 1670 | default: break; |
| 1671 | case '0': // 1 string to match. |
| 1672 | return Hexagon::VFR21; // "__10000020" |
| 1673 | case '1': // 1 string to match. |
| 1674 | return Hexagon::VFR22; // "__10000021" |
| 1675 | case '2': // 1 string to match. |
| 1676 | return Hexagon::VFR23; // "__10000022" |
| 1677 | case '3': // 1 string to match. |
| 1678 | return Hexagon::VFR24; // "__10000023" |
| 1679 | case '4': // 1 string to match. |
| 1680 | return Hexagon::VFR25; // "__10000024" |
| 1681 | case '5': // 1 string to match. |
| 1682 | return Hexagon::VFR26; // "__10000025" |
| 1683 | case '6': // 1 string to match. |
| 1684 | return Hexagon::VFR27; // "__10000026" |
| 1685 | case '7': // 1 string to match. |
| 1686 | return Hexagon::VFR28; // "__10000027" |
| 1687 | case '8': // 1 string to match. |
| 1688 | return Hexagon::VFR29; // "__10000028" |
| 1689 | case '9': // 1 string to match. |
| 1690 | return Hexagon::VFR30; // "__10000029" |
| 1691 | } |
| 1692 | break; |
| 1693 | case '3': // 1 string to match. |
| 1694 | if (Name[9] != '0') |
| 1695 | break; |
| 1696 | return Hexagon::VFR31; // "__10000030" |
| 1697 | } |
| 1698 | break; |
| 1699 | case 'f': // 1 string to match. |
| 1700 | if (memcmp(Name.data()+1, "ramelimit" , 9) != 0) |
| 1701 | break; |
| 1702 | return Hexagon::FRAMELIMIT; // "framelimit" |
| 1703 | case 'i': // 1 string to match. |
| 1704 | if (memcmp(Name.data()+1, "sdbmbxout" , 9) != 0) |
| 1705 | break; |
| 1706 | return Hexagon::ISDBMBXOUT; // "isdbmbxout" |
| 1707 | case 'p': // 2 strings to match. |
| 1708 | if (memcmp(Name.data()+1, "ktcount" , 7) != 0) |
| 1709 | break; |
| 1710 | switch (Name[8]) { |
| 1711 | default: break; |
| 1712 | case 'h': // 1 string to match. |
| 1713 | if (Name[9] != 'i') |
| 1714 | break; |
| 1715 | return Hexagon::PKTCOUNTHI; // "pktcounthi" |
| 1716 | case 'l': // 1 string to match. |
| 1717 | if (Name[9] != 'o') |
| 1718 | break; |
| 1719 | return Hexagon::PKTCOUNTLO; // "pktcountlo" |
| 1720 | } |
| 1721 | break; |
| 1722 | } |
| 1723 | break; |
| 1724 | } |
| 1725 | return Hexagon::NoRegister; |
| 1726 | } |
| 1727 | |
| 1728 | static MCRegister MatchRegisterAltName(StringRef Name) { |
| 1729 | switch (Name.size()) { |
| 1730 | default: break; |
| 1731 | case 2: // 27 strings to match. |
| 1732 | switch (Name[0]) { |
| 1733 | default: break; |
| 1734 | case 'c': // 10 strings to match. |
| 1735 | switch (Name[1]) { |
| 1736 | default: break; |
| 1737 | case '0': // 1 string to match. |
| 1738 | return Hexagon::SA0; // "c0" |
| 1739 | case '1': // 1 string to match. |
| 1740 | return Hexagon::LC0; // "c1" |
| 1741 | case '2': // 1 string to match. |
| 1742 | return Hexagon::SA1; // "c2" |
| 1743 | case '3': // 1 string to match. |
| 1744 | return Hexagon::LC1; // "c3" |
| 1745 | case '4': // 1 string to match. |
| 1746 | return Hexagon::P3_0; // "c4" |
| 1747 | case '5': // 1 string to match. |
| 1748 | return Hexagon::C5; // "c5" |
| 1749 | case '6': // 1 string to match. |
| 1750 | return Hexagon::M0; // "c6" |
| 1751 | case '7': // 1 string to match. |
| 1752 | return Hexagon::M1; // "c7" |
| 1753 | case '8': // 1 string to match. |
| 1754 | return Hexagon::USR; // "c8" |
| 1755 | case '9': // 1 string to match. |
| 1756 | return Hexagon::PC; // "c9" |
| 1757 | } |
| 1758 | break; |
| 1759 | case 'f': // 1 string to match. |
| 1760 | if (Name[1] != 'p') |
| 1761 | break; |
| 1762 | return Hexagon::R30; // "fp" |
| 1763 | case 'g': // 4 strings to match. |
| 1764 | switch (Name[1]) { |
| 1765 | default: break; |
| 1766 | case '0': // 1 string to match. |
| 1767 | return Hexagon::GELR; // "g0" |
| 1768 | case '1': // 1 string to match. |
| 1769 | return Hexagon::GSR; // "g1" |
| 1770 | case '2': // 1 string to match. |
| 1771 | return Hexagon::GOSP; // "g2" |
| 1772 | case '3': // 1 string to match. |
| 1773 | return Hexagon::G3; // "g3" |
| 1774 | } |
| 1775 | break; |
| 1776 | case 'l': // 1 string to match. |
| 1777 | if (Name[1] != 'r') |
| 1778 | break; |
| 1779 | return Hexagon::R31; // "lr" |
| 1780 | case 's': // 11 strings to match. |
| 1781 | switch (Name[1]) { |
| 1782 | default: break; |
| 1783 | case '0': // 1 string to match. |
| 1784 | return Hexagon::SGP0; // "s0" |
| 1785 | case '1': // 1 string to match. |
| 1786 | return Hexagon::SGP1; // "s1" |
| 1787 | case '2': // 1 string to match. |
| 1788 | return Hexagon::STID; // "s2" |
| 1789 | case '3': // 1 string to match. |
| 1790 | return Hexagon::ELR; // "s3" |
| 1791 | case '4': // 1 string to match. |
| 1792 | return Hexagon::BADVA0; // "s4" |
| 1793 | case '5': // 1 string to match. |
| 1794 | return Hexagon::BADVA1; // "s5" |
| 1795 | case '6': // 1 string to match. |
| 1796 | return Hexagon::SSR; // "s6" |
| 1797 | case '7': // 1 string to match. |
| 1798 | return Hexagon::CCR; // "s7" |
| 1799 | case '8': // 1 string to match. |
| 1800 | return Hexagon::HTID; // "s8" |
| 1801 | case '9': // 1 string to match. |
| 1802 | return Hexagon::BADVA; // "s9" |
| 1803 | case 'p': // 1 string to match. |
| 1804 | return Hexagon::R29; // "sp" |
| 1805 | } |
| 1806 | break; |
| 1807 | } |
| 1808 | break; |
| 1809 | case 3: // 52 strings to match. |
| 1810 | switch (Name[0]) { |
| 1811 | default: break; |
| 1812 | case 'c': // 12 strings to match. |
| 1813 | switch (Name[1]) { |
| 1814 | default: break; |
| 1815 | case '1': // 10 strings to match. |
| 1816 | switch (Name[2]) { |
| 1817 | default: break; |
| 1818 | case '0': // 1 string to match. |
| 1819 | return Hexagon::UGP; // "c10" |
| 1820 | case '1': // 1 string to match. |
| 1821 | return Hexagon::GP; // "c11" |
| 1822 | case '2': // 1 string to match. |
| 1823 | return Hexagon::CS0; // "c12" |
| 1824 | case '3': // 1 string to match. |
| 1825 | return Hexagon::CS1; // "c13" |
| 1826 | case '4': // 1 string to match. |
| 1827 | return Hexagon::UPCYCLELO; // "c14" |
| 1828 | case '5': // 1 string to match. |
| 1829 | return Hexagon::UPCYCLEHI; // "c15" |
| 1830 | case '6': // 1 string to match. |
| 1831 | return Hexagon::FRAMELIMIT; // "c16" |
| 1832 | case '7': // 1 string to match. |
| 1833 | return Hexagon::FRAMEKEY; // "c17" |
| 1834 | case '8': // 1 string to match. |
| 1835 | return Hexagon::PKTCOUNTLO; // "c18" |
| 1836 | case '9': // 1 string to match. |
| 1837 | return Hexagon::PKTCOUNTHI; // "c19" |
| 1838 | } |
| 1839 | break; |
| 1840 | case '3': // 2 strings to match. |
| 1841 | switch (Name[2]) { |
| 1842 | default: break; |
| 1843 | case '0': // 1 string to match. |
| 1844 | return Hexagon::UTIMERLO; // "c30" |
| 1845 | case '1': // 1 string to match. |
| 1846 | return Hexagon::UTIMERHI; // "c31" |
| 1847 | } |
| 1848 | break; |
| 1849 | } |
| 1850 | break; |
| 1851 | case 'g': // 10 strings to match. |
| 1852 | switch (Name[1]) { |
| 1853 | default: break; |
| 1854 | case '1': // 4 strings to match. |
| 1855 | switch (Name[2]) { |
| 1856 | default: break; |
| 1857 | case '6': // 1 string to match. |
| 1858 | return Hexagon::GPMUCNT4; // "g16" |
| 1859 | case '7': // 1 string to match. |
| 1860 | return Hexagon::GPMUCNT5; // "g17" |
| 1861 | case '8': // 1 string to match. |
| 1862 | return Hexagon::GPMUCNT6; // "g18" |
| 1863 | case '9': // 1 string to match. |
| 1864 | return Hexagon::GPMUCNT7; // "g19" |
| 1865 | } |
| 1866 | break; |
| 1867 | case '2': // 6 strings to match. |
| 1868 | switch (Name[2]) { |
| 1869 | default: break; |
| 1870 | case '4': // 1 string to match. |
| 1871 | return Hexagon::GPCYCLELO; // "g24" |
| 1872 | case '5': // 1 string to match. |
| 1873 | return Hexagon::GPCYCLEHI; // "g25" |
| 1874 | case '6': // 1 string to match. |
| 1875 | return Hexagon::GPMUCNT0; // "g26" |
| 1876 | case '7': // 1 string to match. |
| 1877 | return Hexagon::GPMUCNT1; // "g27" |
| 1878 | case '8': // 1 string to match. |
| 1879 | return Hexagon::GPMUCNT2; // "g28" |
| 1880 | case '9': // 1 string to match. |
| 1881 | return Hexagon::GPMUCNT3; // "g29" |
| 1882 | } |
| 1883 | break; |
| 1884 | } |
| 1885 | break; |
| 1886 | case 's': // 30 strings to match. |
| 1887 | switch (Name[1]) { |
| 1888 | default: break; |
| 1889 | case '1': // 5 strings to match. |
| 1890 | switch (Name[2]) { |
| 1891 | default: break; |
| 1892 | case '0': // 1 string to match. |
| 1893 | return Hexagon::IMASK; // "s10" |
| 1894 | case '6': // 1 string to match. |
| 1895 | return Hexagon::EVB; // "s16" |
| 1896 | case '7': // 1 string to match. |
| 1897 | return Hexagon::MODECTL; // "s17" |
| 1898 | case '8': // 1 string to match. |
| 1899 | return Hexagon::SYSCFG; // "s18" |
| 1900 | case '9': // 1 string to match. |
| 1901 | return Hexagon::S19; // "s19" |
| 1902 | } |
| 1903 | break; |
| 1904 | case '2': // 6 strings to match. |
| 1905 | switch (Name[2]) { |
| 1906 | default: break; |
| 1907 | case '0': // 1 string to match. |
| 1908 | return Hexagon::S20; // "s20" |
| 1909 | case '1': // 1 string to match. |
| 1910 | return Hexagon::VID; // "s21" |
| 1911 | case '2': // 1 string to match. |
| 1912 | return Hexagon::S22; // "s22" |
| 1913 | case '7': // 1 string to match. |
| 1914 | return Hexagon::CFGBASE; // "s27" |
| 1915 | case '8': // 1 string to match. |
| 1916 | return Hexagon::DIAG; // "s28" |
| 1917 | case '9': // 1 string to match. |
| 1918 | return Hexagon::REV; // "s29" |
| 1919 | } |
| 1920 | break; |
| 1921 | case '3': // 9 strings to match. |
| 1922 | switch (Name[2]) { |
| 1923 | default: break; |
| 1924 | case '0': // 1 string to match. |
| 1925 | return Hexagon::PCYCLELO; // "s30" |
| 1926 | case '1': // 1 string to match. |
| 1927 | return Hexagon::PCYCLEHI; // "s31" |
| 1928 | case '2': // 1 string to match. |
| 1929 | return Hexagon::ISDBST; // "s32" |
| 1930 | case '3': // 1 string to match. |
| 1931 | return Hexagon::ISDBCFG0; // "s33" |
| 1932 | case '4': // 1 string to match. |
| 1933 | return Hexagon::ISDBCFG1; // "s34" |
| 1934 | case '6': // 1 string to match. |
| 1935 | return Hexagon::BRKPTPC0; // "s36" |
| 1936 | case '7': // 1 string to match. |
| 1937 | return Hexagon::BRKPTCFG0; // "s37" |
| 1938 | case '8': // 1 string to match. |
| 1939 | return Hexagon::BRKPTPC1; // "s38" |
| 1940 | case '9': // 1 string to match. |
| 1941 | return Hexagon::BRKPTCFG1; // "s39" |
| 1942 | } |
| 1943 | break; |
| 1944 | case '4': // 6 strings to match. |
| 1945 | switch (Name[2]) { |
| 1946 | default: break; |
| 1947 | case '0': // 1 string to match. |
| 1948 | return Hexagon::ISDBMBXIN; // "s40" |
| 1949 | case '1': // 1 string to match. |
| 1950 | return Hexagon::ISDBMBXOUT; // "s41" |
| 1951 | case '2': // 1 string to match. |
| 1952 | return Hexagon::ISDBEN; // "s42" |
| 1953 | case '3': // 1 string to match. |
| 1954 | return Hexagon::ISDBGPR; // "s43" |
| 1955 | case '8': // 1 string to match. |
| 1956 | return Hexagon::PMUCNT0; // "s48" |
| 1957 | case '9': // 1 string to match. |
| 1958 | return Hexagon::PMUCNT1; // "s49" |
| 1959 | } |
| 1960 | break; |
| 1961 | case '5': // 4 strings to match. |
| 1962 | switch (Name[2]) { |
| 1963 | default: break; |
| 1964 | case '0': // 1 string to match. |
| 1965 | return Hexagon::PMUCNT2; // "s50" |
| 1966 | case '1': // 1 string to match. |
| 1967 | return Hexagon::PMUCNT3; // "s51" |
| 1968 | case '2': // 1 string to match. |
| 1969 | return Hexagon::PMUEVTCFG; // "s52" |
| 1970 | case '3': // 1 string to match. |
| 1971 | return Hexagon::PMUCFG; // "s53" |
| 1972 | } |
| 1973 | break; |
| 1974 | } |
| 1975 | break; |
| 1976 | } |
| 1977 | break; |
| 1978 | case 4: // 1 string to match. |
| 1979 | if (memcmp(Name.data()+0, "m1:0" , 4) != 0) |
| 1980 | break; |
| 1981 | return Hexagon::C7_6; // "m1:0" |
| 1982 | case 5: // 2 strings to match. |
| 1983 | switch (Name[0]) { |
| 1984 | default: break; |
| 1985 | case 'c': // 1 string to match. |
| 1986 | if (memcmp(Name.data()+1, "s1:0" , 4) != 0) |
| 1987 | break; |
| 1988 | return Hexagon::CS; // "cs1:0" |
| 1989 | case 'l': // 1 string to match. |
| 1990 | if (memcmp(Name.data()+1, "r:fp" , 4) != 0) |
| 1991 | break; |
| 1992 | return Hexagon::D15; // "lr:fp" |
| 1993 | } |
| 1994 | break; |
| 1995 | case 6: // 3 strings to match. |
| 1996 | switch (Name[0]) { |
| 1997 | default: break; |
| 1998 | case 'p': // 1 string to match. |
| 1999 | if (memcmp(Name.data()+1, "cycle" , 5) != 0) |
| 2000 | break; |
| 2001 | return Hexagon::S31_30; // "pcycle" |
| 2002 | case 's': // 1 string to match. |
| 2003 | if (memcmp(Name.data()+1, "gp1:0" , 5) != 0) |
| 2004 | break; |
| 2005 | return Hexagon::SGP1_0; // "sgp1:0" |
| 2006 | case 'u': // 1 string to match. |
| 2007 | if (memcmp(Name.data()+1, "timer" , 5) != 0) |
| 2008 | break; |
| 2009 | return Hexagon::UTIMER; // "utimer" |
| 2010 | } |
| 2011 | break; |
| 2012 | case 7: // 4 strings to match. |
| 2013 | switch (Name[0]) { |
| 2014 | default: break; |
| 2015 | case 'c': // 1 string to match. |
| 2016 | if (memcmp(Name.data()+1, "cr:ssr" , 6) != 0) |
| 2017 | break; |
| 2018 | return Hexagon::S7_6; // "ccr:ssr" |
| 2019 | case 'l': // 2 strings to match. |
| 2020 | if (Name[1] != 'c') |
| 2021 | break; |
| 2022 | switch (Name[2]) { |
| 2023 | default: break; |
| 2024 | case '0': // 1 string to match. |
| 2025 | if (memcmp(Name.data()+3, ":sa0" , 4) != 0) |
| 2026 | break; |
| 2027 | return Hexagon::C1_0; // "lc0:sa0" |
| 2028 | case '1': // 1 string to match. |
| 2029 | if (memcmp(Name.data()+3, ":sa1" , 4) != 0) |
| 2030 | break; |
| 2031 | return Hexagon::C3_2; // "lc1:sa1" |
| 2032 | } |
| 2033 | break; |
| 2034 | case 'u': // 1 string to match. |
| 2035 | if (memcmp(Name.data()+1, "pcycle" , 6) != 0) |
| 2036 | break; |
| 2037 | return Hexagon::UPCYCLE; // "upcycle" |
| 2038 | } |
| 2039 | break; |
| 2040 | case 8: // 2 strings to match. |
| 2041 | switch (Name[0]) { |
| 2042 | default: break; |
| 2043 | case 'b': // 1 string to match. |
| 2044 | if (memcmp(Name.data()+1, "adva1:0" , 7) != 0) |
| 2045 | break; |
| 2046 | return Hexagon::S5_4; // "badva1:0" |
| 2047 | case 'p': // 1 string to match. |
| 2048 | if (memcmp(Name.data()+1, "ktcount" , 7) != 0) |
| 2049 | break; |
| 2050 | return Hexagon::PKTCOUNT; // "pktcount" |
| 2051 | } |
| 2052 | break; |
| 2053 | } |
| 2054 | return Hexagon::NoRegister; |
| 2055 | } |
| 2056 | |
| 2057 | #endif // GET_REGISTER_MATCHER |
| 2058 | |
| 2059 | |
| 2060 | #ifdef GET_SUBTARGET_FEATURE_NAME |
| 2061 | #undef GET_SUBTARGET_FEATURE_NAME |
| 2062 | |
| 2063 | // User-level names for subtarget features that participate in |
| 2064 | // instruction matching. |
| 2065 | static const char *getSubtargetFeatureName(uint64_t Val) { |
| 2066 | switch(Val) { |
| 2067 | case Feature_HasV5Bit: return "" ; |
| 2068 | case Feature_HasV55Bit: return "" ; |
| 2069 | case Feature_HasV60Bit: return "" ; |
| 2070 | case Feature_HasV62Bit: return "" ; |
| 2071 | case Feature_HasV65Bit: return "" ; |
| 2072 | case Feature_HasV66Bit: return "" ; |
| 2073 | case Feature_HasV67Bit: return "" ; |
| 2074 | case Feature_HasV68Bit: return "" ; |
| 2075 | case Feature_HasV69Bit: return "" ; |
| 2076 | case Feature_HasV71Bit: return "" ; |
| 2077 | case Feature_HasV73Bit: return "" ; |
| 2078 | case Feature_HasV75Bit: return "" ; |
| 2079 | case Feature_HasV79Bit: return "" ; |
| 2080 | case Feature_UseHVX64BBit: return "" ; |
| 2081 | case Feature_UseHVX128BBit: return "" ; |
| 2082 | case Feature_UseHVXBit: return "" ; |
| 2083 | case Feature_UseHVXV60Bit: return "" ; |
| 2084 | case Feature_UseHVXV62Bit: return "" ; |
| 2085 | case Feature_UseHVXV65Bit: return "" ; |
| 2086 | case Feature_UseHVXV66Bit: return "" ; |
| 2087 | case Feature_UseHVXV67Bit: return "" ; |
| 2088 | case Feature_UseHVXV68Bit: return "" ; |
| 2089 | case Feature_UseHVXV69Bit: return "" ; |
| 2090 | case Feature_UseHVXV71Bit: return "" ; |
| 2091 | case Feature_UseHVXV73Bit: return "" ; |
| 2092 | case Feature_UseHVXV75Bit: return "" ; |
| 2093 | case Feature_UseHVXV79Bit: return "" ; |
| 2094 | case Feature_UseAudioBit: return "" ; |
| 2095 | case Feature_UseZRegBit: return "" ; |
| 2096 | case Feature_HasPreV65Bit: return "" ; |
| 2097 | case Feature_UseHVXIEEEFPBit: return "" ; |
| 2098 | case Feature_UseHVXQFloatBit: return "" ; |
| 2099 | case Feature_HasMemNoShufBit: return "" ; |
| 2100 | case Feature_UseCabacBit: return "" ; |
| 2101 | default: return "(unknown)" ; |
| 2102 | } |
| 2103 | } |
| 2104 | |
| 2105 | #endif // GET_SUBTARGET_FEATURE_NAME |
| 2106 | |
| 2107 | |
| 2108 | #ifdef GET_MATCHER_IMPLEMENTATION |
| 2109 | #undef GET_MATCHER_IMPLEMENTATION |
| 2110 | |
| 2111 | enum { |
| 2112 | Tie0_0_0, |
| 2113 | Tie0_0_6, |
| 2114 | Tie0_0_7, |
| 2115 | Tie0_0_8, |
| 2116 | Tie0_2_2, |
| 2117 | Tie0_6_6, |
| 2118 | Tie0_7_7, |
| 2119 | Tie1_0_0, |
| 2120 | Tie1_3_3, |
| 2121 | Tie1_9_9, |
| 2122 | Tie1_10_10, |
| 2123 | Tie1_11_11, |
| 2124 | }; |
| 2125 | |
| 2126 | static const uint8_t TiedAsmOperandTable[][3] = { |
| 2127 | /* Tie0_0_0 */ { 0, 0, 0 }, |
| 2128 | /* Tie0_0_6 */ { 0, 0, 6 }, |
| 2129 | /* Tie0_0_7 */ { 0, 0, 7 }, |
| 2130 | /* Tie0_0_8 */ { 0, 0, 8 }, |
| 2131 | /* Tie0_2_2 */ { 0, 2, 2 }, |
| 2132 | /* Tie0_6_6 */ { 0, 6, 6 }, |
| 2133 | /* Tie0_7_7 */ { 0, 7, 7 }, |
| 2134 | /* Tie1_0_0 */ { 1, 0, 0 }, |
| 2135 | /* Tie1_3_3 */ { 1, 3, 3 }, |
| 2136 | /* Tie1_9_9 */ { 1, 9, 9 }, |
| 2137 | /* Tie1_10_10 */ { 1, 10, 10 }, |
| 2138 | /* Tie1_11_11 */ { 1, 11, 11 }, |
| 2139 | }; |
| 2140 | |
| 2141 | namespace { |
| 2142 | enum OperatorConversionKind { |
| 2143 | CVT_Done, |
| 2144 | CVT_Reg, |
| 2145 | CVT_Tied, |
| 2146 | CVT_95_Reg, |
| 2147 | CVT_95_addSignedImmOperands, |
| 2148 | CVT_95_addImmOperands, |
| 2149 | CVT_regW15, |
| 2150 | CVT_imm_95_0, |
| 2151 | CVT_imm_95__MINUS_1, |
| 2152 | CVT_imm_95_255, |
| 2153 | CVT_regR29, |
| 2154 | CVT_95_addsgp10ConstOperands, |
| 2155 | CVT_regD15, |
| 2156 | CVT_regR30, |
| 2157 | CVT_95_addn1ConstOperands, |
| 2158 | CVT_regR0, |
| 2159 | CVT_NUM_CONVERTERS |
| 2160 | }; |
| 2161 | |
| 2162 | enum InstructionConversionKind { |
| 2163 | Convert__Reg1_0__Reg1_2__Reg1_2, |
| 2164 | Convert__Reg1_0__Reg1_2, |
| 2165 | Convert__Reg1_0, |
| 2166 | Convert__Reg1_0__s8_0Imm1_3, |
| 2167 | Convert__Reg1_0__u64_0Imm1_3, |
| 2168 | Convert__Reg1_0__regW15__regW15, |
| 2169 | Convert__Reg1_0__s32_0Imm1_3, |
| 2170 | Convert__Reg1_0__Reg1_0__Reg1_0, |
| 2171 | Convert__Reg1_0__Reg1_4, |
| 2172 | Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, |
| 2173 | Convert__Reg1_0__Reg1_4__imm_95_0, |
| 2174 | Convert__Reg1_0__Reg1_2__b30_2Imm1_5, |
| 2175 | Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, |
| 2176 | Convert__Reg1_0__u16_0Imm1_5, |
| 2177 | Convert__Reg1_0__imm_95_0__Reg1_4, |
| 2178 | Convert__Reg1_0__imm_95__MINUS_1__Reg1_4, |
| 2179 | Convert__Reg1_0__Reg1_4__imm_95_255, |
| 2180 | Convert__Reg1_0__Reg1_4__Reg1_5, |
| 2181 | Convert__Reg1_0__Imm1_5, |
| 2182 | Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, |
| 2183 | Convert__Reg1_0__u29_3Imm1_5, |
| 2184 | Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6, |
| 2185 | Convert__Reg1_0__Tie0_0_0__Reg1_5, |
| 2186 | Convert__Reg1_0__s27_2Imm1_5, |
| 2187 | Convert__Reg1_0__u32_0Imm1_5, |
| 2188 | Convert__Reg1_0__u31_1Imm1_5, |
| 2189 | Convert__Reg1_0__u30_2Imm1_5, |
| 2190 | Convert__Reg1_0__Reg1_1__Reg1_5, |
| 2191 | Convert__Reg1_0__Reg1_4__Reg1_6, |
| 2192 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, |
| 2193 | Convert__Reg1_0__Reg1_5__Reg1_6, |
| 2194 | Convert__Reg1_0__Reg1_4__u6_0Imm1_6, |
| 2195 | Convert__Reg1_0__Reg1_4__u5_0Imm1_6, |
| 2196 | Convert__Reg1_0__s32_0Imm1_5__Reg1_6, |
| 2197 | Convert__Reg1_0__Reg1_4__s32_0Imm1_6, |
| 2198 | Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, |
| 2199 | Convert__Reg1_0__Reg1_4__u4_0Imm1_6, |
| 2200 | Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6, |
| 2201 | Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, |
| 2202 | Convert__Reg1_0__u32_0Imm1_6, |
| 2203 | Convert__Reg1_0__s6_0Imm1_5__Reg1_6, |
| 2204 | Convert__Reg1_0__Reg1_4__m32_0Imm1_6, |
| 2205 | Convert__Reg1_0__Reg1_6, |
| 2206 | Convert__Reg1_0__Tie0_0_0__Reg1_6, |
| 2207 | Convert__Reg1_0__Reg1_5__u6_0Imm1_7, |
| 2208 | Convert__Reg1_0__Reg1_5__u5_0Imm1_7, |
| 2209 | Convert__Reg1_0__Reg1_6__Reg1_7, |
| 2210 | Convert__Reg1_0__Reg1_7__Reg1_6, |
| 2211 | Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, |
| 2212 | Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, |
| 2213 | Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7, |
| 2214 | Convert__Reg1_0__u10_0Imm1_5, |
| 2215 | Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, |
| 2216 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, |
| 2217 | Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, |
| 2218 | Convert__Reg1_0__Reg1_4__s30_2Imm1_7, |
| 2219 | Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, |
| 2220 | Convert__Reg1_0__Reg1_4__u32_0Imm1_7, |
| 2221 | Convert__Reg1_0__u29_3Imm1_7, |
| 2222 | Convert__Reg1_0__Reg1_4__s29_3Imm1_7, |
| 2223 | Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7, |
| 2224 | Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, |
| 2225 | Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7, |
| 2226 | Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, |
| 2227 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, |
| 2228 | Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, |
| 2229 | Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, |
| 2230 | Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, |
| 2231 | Convert__Reg1_0__Reg1_5__u32_0Imm1_7, |
| 2232 | Convert__Reg1_0__Reg1_5__u8_0Imm1_7, |
| 2233 | Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7, |
| 2234 | Convert__Reg1_0__u32_0Imm1_7, |
| 2235 | Convert__Reg1_0__Reg1_4__s32_0Imm1_7, |
| 2236 | Convert__Reg1_0__Reg1_4__s31_1Imm1_7, |
| 2237 | Convert__Reg1_0__u31_1Imm1_7, |
| 2238 | Convert__Reg1_0__u30_2Imm1_7, |
| 2239 | Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7, |
| 2240 | Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7, |
| 2241 | Convert__Reg1_0__Reg1_4__Reg1_7, |
| 2242 | Convert__Reg1_0__Reg1_4__s4_0Imm1_7, |
| 2243 | Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7, |
| 2244 | Convert__Reg1_0__Reg1_7__Reg1_8, |
| 2245 | Convert__Reg1_0__Reg1_6__s32_0Imm1_8, |
| 2246 | Convert__Reg1_0__Reg1_6__s8_0Imm1_8, |
| 2247 | Convert__Reg1_0__Reg1_6__u8_0Imm1_8, |
| 2248 | Convert__Reg1_0__Reg1_6__u32_0Imm1_8, |
| 2249 | Convert__Reg1_0__Reg1_6__u7_0Imm1_8, |
| 2250 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8, |
| 2251 | Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, |
| 2252 | Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, |
| 2253 | Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, |
| 2254 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, |
| 2255 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, |
| 2256 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8, |
| 2257 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8, |
| 2258 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, |
| 2259 | Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, |
| 2260 | Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, |
| 2261 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, |
| 2262 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, |
| 2263 | Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8, |
| 2264 | Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, |
| 2265 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, |
| 2266 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, |
| 2267 | Convert__Reg1_0__Reg1_7__s32_0Imm1_9, |
| 2268 | Convert__Reg1_0__Reg1_7__u32_0Imm1_9, |
| 2269 | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, |
| 2270 | Convert__Reg1_0__Tie0_0_0__Reg1_7, |
| 2271 | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7, |
| 2272 | Convert__Reg1_0__Reg1_6__s6_0Imm1_9, |
| 2273 | Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8, |
| 2274 | Convert__Reg1_0__Reg1_6__s4_0Imm1_9, |
| 2275 | Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, |
| 2276 | Convert__Reg1_0__Reg1_6__Reg1_9, |
| 2277 | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, |
| 2278 | Convert__Reg1_0__Reg1_8__Reg1_9, |
| 2279 | Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, |
| 2280 | Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9, |
| 2281 | Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9, |
| 2282 | Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, |
| 2283 | Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9, |
| 2284 | Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9, |
| 2285 | Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9, |
| 2286 | Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, |
| 2287 | Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, |
| 2288 | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, |
| 2289 | Convert__Reg1_0__Reg1_9__Reg1_10, |
| 2290 | Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, |
| 2291 | Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, |
| 2292 | Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9, |
| 2293 | Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, |
| 2294 | Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10, |
| 2295 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, |
| 2296 | Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, |
| 2297 | Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, |
| 2298 | Convert__Reg1_0__Reg1_7__Reg1_10, |
| 2299 | Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, |
| 2300 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, |
| 2301 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, |
| 2302 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12, |
| 2303 | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12, |
| 2304 | Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, |
| 2305 | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, |
| 2306 | Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, |
| 2307 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, |
| 2308 | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, |
| 2309 | Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11, |
| 2310 | Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, |
| 2311 | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, |
| 2312 | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, |
| 2313 | Convert__Reg1_0__Reg1_8__Reg1_12, |
| 2314 | Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, |
| 2315 | Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, |
| 2316 | Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, |
| 2317 | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, |
| 2318 | Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, |
| 2319 | Convert__regR29__Tie0_0_0__u11_3Imm1_3, |
| 2320 | Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4, |
| 2321 | Convert_NoOperands, |
| 2322 | Convert__a30_2Imm1_1, |
| 2323 | Convert__Reg1_1, |
| 2324 | Convert__Reg1_2, |
| 2325 | Convert__Reg1_2__Tie0_0_0__sgp10Const1_3, |
| 2326 | Convert__Reg1_2__Tie0_2_2, |
| 2327 | Convert__Reg1_2__Tie0_0_0, |
| 2328 | Convert__Reg1_2__imm_95_0, |
| 2329 | Convert__Reg1_2__u11_3Imm1_5, |
| 2330 | Convert__Reg1_2__Reg1_3, |
| 2331 | Convert__regD15__regR30, |
| 2332 | Convert__imm_95_0, |
| 2333 | Convert__regD15__Reg1_2__regR30, |
| 2334 | Convert__regD15__Reg1_3__regR30, |
| 2335 | Convert__Reg1_2__a30_2Imm1_5, |
| 2336 | Convert__Reg1_2__Reg1_5, |
| 2337 | Convert__Reg1_2__b30_2Imm1_5, |
| 2338 | Convert__Reg1_3__a30_2Imm1_6, |
| 2339 | Convert__Reg1_3__Reg1_6, |
| 2340 | Convert__Reg1_3__b30_2Imm1_6, |
| 2341 | Convert__Reg1_4__Reg1_2__Reg1_6, |
| 2342 | Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0, |
| 2343 | Convert__Reg1_5__Reg1_3__Reg1_7, |
| 2344 | Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0, |
| 2345 | Convert__Reg1_2__b30_2Imm1_7, |
| 2346 | Convert__Reg1_2__Reg1_7, |
| 2347 | Convert__Reg1_4__Reg1_2__s32_0Imm1_7, |
| 2348 | Convert__Reg1_3__b30_2Imm1_8, |
| 2349 | Convert__Reg1_3__Reg1_8, |
| 2350 | Convert__Reg1_5__Reg1_3__s32_0Imm1_8, |
| 2351 | Convert__Reg1_6__Reg1_2__Reg1_8, |
| 2352 | Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0, |
| 2353 | Convert__Reg1_7__Reg1_3__Reg1_9, |
| 2354 | Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0, |
| 2355 | Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, |
| 2356 | Convert__Reg1_2__Reg1_8__imm_95_0, |
| 2357 | Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, |
| 2358 | Convert__Reg1_4__Reg1_2__Reg1_8, |
| 2359 | Convert__Reg1_2__b30_2Imm1_9, |
| 2360 | Convert__Reg1_2__Reg1_9, |
| 2361 | Convert__Reg1_6__Reg1_2__s32_0Imm1_9, |
| 2362 | Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, |
| 2363 | Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, |
| 2364 | Convert__Reg1_5__Reg1_3__Reg1_9, |
| 2365 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, |
| 2366 | Convert__Reg1_3__b30_2Imm1_10, |
| 2367 | Convert__Reg1_3__Reg1_10, |
| 2368 | Convert__Reg1_7__Reg1_3__s32_0Imm1_10, |
| 2369 | Convert__Reg1_2__u32_0Imm1_7__Reg1_10, |
| 2370 | Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, |
| 2371 | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, |
| 2372 | Convert__Reg1_4__Reg1_2__u32_0Imm1_9, |
| 2373 | Convert__Reg1_3__u32_0Imm1_8__Reg1_11, |
| 2374 | Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, |
| 2375 | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, |
| 2376 | Convert__Reg1_5__Reg1_3__u32_0Imm1_10, |
| 2377 | Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, |
| 2378 | Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, |
| 2379 | Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10, |
| 2380 | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, |
| 2381 | Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, |
| 2382 | Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, |
| 2383 | Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, |
| 2384 | Convert__Reg1_6__Reg1_2__Reg1_10, |
| 2385 | Convert__Reg1_2__b13_2Imm1_11, |
| 2386 | Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, |
| 2387 | Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, |
| 2388 | Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11, |
| 2389 | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, |
| 2390 | Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, |
| 2391 | Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, |
| 2392 | Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, |
| 2393 | Convert__Reg1_7__Reg1_3__Reg1_11, |
| 2394 | Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, |
| 2395 | Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, |
| 2396 | Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, |
| 2397 | Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12, |
| 2398 | Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, |
| 2399 | Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, |
| 2400 | Convert__Reg1_2__Reg1_8__s4_0Imm1_11, |
| 2401 | Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11, |
| 2402 | Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11, |
| 2403 | Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, |
| 2404 | Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, |
| 2405 | Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11, |
| 2406 | Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, |
| 2407 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, |
| 2408 | Convert__Reg1_2__u32_0Imm1_9__Reg1_12, |
| 2409 | Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, |
| 2410 | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, |
| 2411 | Convert__Reg1_6__Reg1_2__u32_0Imm1_11, |
| 2412 | Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, |
| 2413 | Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, |
| 2414 | Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, |
| 2415 | Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13, |
| 2416 | Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, |
| 2417 | Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, |
| 2418 | Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12, |
| 2419 | Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, |
| 2420 | Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, |
| 2421 | Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12, |
| 2422 | Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, |
| 2423 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, |
| 2424 | Convert__Reg1_3__u32_0Imm1_10__Reg1_13, |
| 2425 | Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, |
| 2426 | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, |
| 2427 | Convert__Reg1_7__Reg1_3__u32_0Imm1_12, |
| 2428 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, |
| 2429 | Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, |
| 2430 | Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13, |
| 2431 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, |
| 2432 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13, |
| 2433 | Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13, |
| 2434 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, |
| 2435 | Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13, |
| 2436 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, |
| 2437 | Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, |
| 2438 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12, |
| 2439 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, |
| 2440 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, |
| 2441 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12, |
| 2442 | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, |
| 2443 | Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12, |
| 2444 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, |
| 2445 | Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, |
| 2446 | Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14, |
| 2447 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, |
| 2448 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14, |
| 2449 | Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14, |
| 2450 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, |
| 2451 | Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14, |
| 2452 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, |
| 2453 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13, |
| 2454 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, |
| 2455 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, |
| 2456 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13, |
| 2457 | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, |
| 2458 | Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13, |
| 2459 | Convert__Reg1_4__b30_2Imm1_14, |
| 2460 | Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, |
| 2461 | Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, |
| 2462 | Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, |
| 2463 | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, |
| 2464 | Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, |
| 2465 | Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14, |
| 2466 | Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, |
| 2467 | Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, |
| 2468 | Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13, |
| 2469 | Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, |
| 2470 | Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, |
| 2471 | Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13, |
| 2472 | Convert__Reg1_5__b30_2Imm1_15, |
| 2473 | Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, |
| 2474 | Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, |
| 2475 | Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, |
| 2476 | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, |
| 2477 | Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, |
| 2478 | Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15, |
| 2479 | Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, |
| 2480 | Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, |
| 2481 | Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14, |
| 2482 | Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, |
| 2483 | Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, |
| 2484 | Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14, |
| 2485 | Convert__Reg1_6__Reg1_9__b30_2Imm1_15, |
| 2486 | Convert__Reg1_6__Reg1_7__b30_2Imm1_15, |
| 2487 | Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, |
| 2488 | Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, |
| 2489 | Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, |
| 2490 | Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, |
| 2491 | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, |
| 2492 | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, |
| 2493 | Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15, |
| 2494 | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, |
| 2495 | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15, |
| 2496 | Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15, |
| 2497 | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, |
| 2498 | Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15, |
| 2499 | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, |
| 2500 | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14, |
| 2501 | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, |
| 2502 | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, |
| 2503 | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14, |
| 2504 | Convert__Reg1_7__Reg1_10__b30_2Imm1_16, |
| 2505 | Convert__Reg1_7__Reg1_8__b30_2Imm1_16, |
| 2506 | Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, |
| 2507 | Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, |
| 2508 | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, |
| 2509 | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, |
| 2510 | Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16, |
| 2511 | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, |
| 2512 | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16, |
| 2513 | Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16, |
| 2514 | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, |
| 2515 | Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16, |
| 2516 | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, |
| 2517 | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15, |
| 2518 | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, |
| 2519 | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, |
| 2520 | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15, |
| 2521 | Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, |
| 2522 | Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, |
| 2523 | Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, |
| 2524 | Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, |
| 2525 | Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, |
| 2526 | Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, |
| 2527 | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, |
| 2528 | Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, |
| 2529 | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, |
| 2530 | Convert__u26_6Imm1_3, |
| 2531 | Convert__b30_2Imm1_1, |
| 2532 | Convert__b30_2Imm1_2__Reg1_3, |
| 2533 | Convert__b30_2Imm1_2__u10_0Imm1_4, |
| 2534 | Convert__Reg1_2__imm_95_0__Reg1_5, |
| 2535 | Convert__u32_0Imm1_3__Reg1_6, |
| 2536 | Convert__Reg1_2__imm_95_0__Reg1_6, |
| 2537 | Convert__Reg1_2__imm_95_0__s32_0Imm1_6, |
| 2538 | Convert__Reg1_2__imm_95_0__u5_0Imm1_7, |
| 2539 | Convert__u32_0Imm1_5__Reg1_8, |
| 2540 | Convert__Reg1_2__s32_0Imm1_5__Reg1_8, |
| 2541 | Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, |
| 2542 | Convert__Reg1_2__u32_0Imm1_5__Reg1_8, |
| 2543 | Convert__Reg1_2__imm_95_0__u5_0Imm1_8, |
| 2544 | Convert__Reg1_2__u32_0Imm1_5__Reg1_9, |
| 2545 | Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9, |
| 2546 | Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, |
| 2547 | Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, |
| 2548 | Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, |
| 2549 | Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, |
| 2550 | Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, |
| 2551 | Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, |
| 2552 | Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, |
| 2553 | Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, |
| 2554 | Convert__Reg1_2__Reg1_3__Reg1_4, |
| 2555 | Convert__u29_3Imm1_3__Reg1_6, |
| 2556 | Convert__u29_3Imm1_5__Reg1_8, |
| 2557 | Convert__Reg1_2__s29_3Imm1_5__Reg1_8, |
| 2558 | Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9, |
| 2559 | Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14, |
| 2560 | Convert__Reg1_3__Reg1_2__Reg1_6, |
| 2561 | Convert__u31_1Imm1_3__Reg1_6, |
| 2562 | Convert__u31_1Imm1_5__Reg1_8, |
| 2563 | Convert__Reg1_2__s31_1Imm1_5__Reg1_8, |
| 2564 | Convert__Reg1_2__u31_1Imm1_5__Reg1_9, |
| 2565 | Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9, |
| 2566 | Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, |
| 2567 | Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, |
| 2568 | Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, |
| 2569 | Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, |
| 2570 | Convert__u30_2Imm1_3__Reg1_6, |
| 2571 | Convert__u30_2Imm1_5__Reg1_8, |
| 2572 | Convert__Reg1_2__s30_2Imm1_5__Reg1_8, |
| 2573 | Convert__Reg1_2__u30_2Imm1_5__Reg1_9, |
| 2574 | Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9, |
| 2575 | Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, |
| 2576 | Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, |
| 2577 | Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, |
| 2578 | Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, |
| 2579 | Convert__Reg1_4__b30_2Imm1_18, |
| 2580 | Convert__Reg1_6__Reg1_7__b30_2Imm1_19, |
| 2581 | Convert__Reg1_4__b30_2Imm1_19, |
| 2582 | Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, |
| 2583 | Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, |
| 2584 | Convert__Reg1_6__Reg1_7__b30_2Imm1_20, |
| 2585 | Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, |
| 2586 | Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, |
| 2587 | Convert__b30_2Imm1_4__Reg1_5, |
| 2588 | Convert__b30_2Imm1_4__u10_0Imm1_6, |
| 2589 | Convert__u10_0Imm1_3, |
| 2590 | Convert__u8_0Imm1_3, |
| 2591 | Convert__regR0__Tie0_0_0__u8_0Imm1_3, |
| 2592 | Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4, |
| 2593 | Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, |
| 2594 | Convert__Reg1_2__imm_95_0__Reg1_7, |
| 2595 | Convert__Reg1_2__s4_0Imm1_5, |
| 2596 | Convert__Reg1_2__s4_0Imm1_5__Reg1_8, |
| 2597 | Convert__Reg1_2__Tie0_0_0__Reg1_5, |
| 2598 | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6, |
| 2599 | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, |
| 2600 | Convert__Reg1_2__s4_0Imm1_5__Reg1_10, |
| 2601 | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, |
| 2602 | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, |
| 2603 | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, |
| 2604 | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, |
| 2605 | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, |
| 2606 | Convert__Reg1_6__Reg1_7__Reg1_8, |
| 2607 | Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4, |
| 2608 | Convert__u1_0Imm1_3, |
| 2609 | Convert__Reg1_2__u1_0Imm1_4, |
| 2610 | Convert__Reg1_4__imm_95_0, |
| 2611 | Convert__Reg1_4__s4_0Imm1_7, |
| 2612 | Convert__Reg1_4__Tie0_0_0__Reg1_7, |
| 2613 | Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, |
| 2614 | CVT_NUM_SIGNATURES |
| 2615 | }; |
| 2616 | |
| 2617 | } // end anonymous namespace |
| 2618 | |
| 2619 | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { |
| 2620 | // Convert__Reg1_0__Reg1_2__Reg1_2 |
| 2621 | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_Done }, |
| 2622 | // Convert__Reg1_0__Reg1_2 |
| 2623 | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_Done }, |
| 2624 | // Convert__Reg1_0 |
| 2625 | { CVT_95_Reg, 0, CVT_Done }, |
| 2626 | // Convert__Reg1_0__s8_0Imm1_3 |
| 2627 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 3, CVT_Done }, |
| 2628 | // Convert__Reg1_0__u64_0Imm1_3 |
| 2629 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2630 | // Convert__Reg1_0__regW15__regW15 |
| 2631 | { CVT_95_Reg, 0, CVT_regW15, 0, CVT_regW15, 0, CVT_Done }, |
| 2632 | // Convert__Reg1_0__s32_0Imm1_3 |
| 2633 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 3, CVT_Done }, |
| 2634 | // Convert__Reg1_0__Reg1_0__Reg1_0 |
| 2635 | { CVT_95_Reg, 0, CVT_95_Reg, 0, CVT_95_Reg, 0, CVT_Done }, |
| 2636 | // Convert__Reg1_0__Reg1_4 |
| 2637 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Done }, |
| 2638 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0 |
| 2639 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 2640 | // Convert__Reg1_0__Reg1_4__imm_95_0 |
| 2641 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 2642 | // Convert__Reg1_0__Reg1_2__b30_2Imm1_5 |
| 2643 | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
| 2644 | // Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5 |
| 2645 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2646 | // Convert__Reg1_0__u16_0Imm1_5 |
| 2647 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2648 | // Convert__Reg1_0__imm_95_0__Reg1_4 |
| 2649 | { CVT_95_Reg, 0, CVT_imm_95_0, 0, CVT_95_Reg, 4, CVT_Done }, |
| 2650 | // Convert__Reg1_0__imm_95__MINUS_1__Reg1_4 |
| 2651 | { CVT_95_Reg, 0, CVT_imm_95__MINUS_1, 0, CVT_95_Reg, 4, CVT_Done }, |
| 2652 | // Convert__Reg1_0__Reg1_4__imm_95_255 |
| 2653 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_imm_95_255, 0, CVT_Done }, |
| 2654 | // Convert__Reg1_0__Reg1_4__Reg1_5 |
| 2655 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
| 2656 | // Convert__Reg1_0__Imm1_5 |
| 2657 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2658 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5 |
| 2659 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
| 2660 | // Convert__Reg1_0__u29_3Imm1_5 |
| 2661 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2662 | // Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6 |
| 2663 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 2664 | // Convert__Reg1_0__Tie0_0_0__Reg1_5 |
| 2665 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_Done }, |
| 2666 | // Convert__Reg1_0__s27_2Imm1_5 |
| 2667 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
| 2668 | // Convert__Reg1_0__u32_0Imm1_5 |
| 2669 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2670 | // Convert__Reg1_0__u31_1Imm1_5 |
| 2671 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2672 | // Convert__Reg1_0__u30_2Imm1_5 |
| 2673 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2674 | // Convert__Reg1_0__Reg1_1__Reg1_5 |
| 2675 | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done }, |
| 2676 | // Convert__Reg1_0__Reg1_4__Reg1_6 |
| 2677 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_Done }, |
| 2678 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6 |
| 2679 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2680 | // Convert__Reg1_0__Reg1_5__Reg1_6 |
| 2681 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2682 | // Convert__Reg1_0__Reg1_4__u6_0Imm1_6 |
| 2683 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 2684 | // Convert__Reg1_0__Reg1_4__u5_0Imm1_6 |
| 2685 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 2686 | // Convert__Reg1_0__s32_0Imm1_5__Reg1_6 |
| 2687 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2688 | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6 |
| 2689 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 2690 | // Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6 |
| 2691 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2692 | // Convert__Reg1_0__Reg1_4__u4_0Imm1_6 |
| 2693 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 2694 | // Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6 |
| 2695 | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2696 | // Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6 |
| 2697 | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2698 | // Convert__Reg1_0__u32_0Imm1_6 |
| 2699 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 6, CVT_Done }, |
| 2700 | // Convert__Reg1_0__s6_0Imm1_5__Reg1_6 |
| 2701 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
| 2702 | // Convert__Reg1_0__Reg1_4__m32_0Imm1_6 |
| 2703 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 2704 | // Convert__Reg1_0__Reg1_6 |
| 2705 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Done }, |
| 2706 | // Convert__Reg1_0__Tie0_0_0__Reg1_6 |
| 2707 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_Done }, |
| 2708 | // Convert__Reg1_0__Reg1_5__u6_0Imm1_7 |
| 2709 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2710 | // Convert__Reg1_0__Reg1_5__u5_0Imm1_7 |
| 2711 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2712 | // Convert__Reg1_0__Reg1_6__Reg1_7 |
| 2713 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
| 2714 | // Convert__Reg1_0__Reg1_7__Reg1_6 |
| 2715 | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 6, CVT_Done }, |
| 2716 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7 |
| 2717 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2718 | // Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7 |
| 2719 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2720 | // Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7 |
| 2721 | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2722 | // Convert__Reg1_0__u10_0Imm1_5 |
| 2723 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2724 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7 |
| 2725 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2726 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7 |
| 2727 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 7, CVT_Done }, |
| 2728 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7 |
| 2729 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2730 | // Convert__Reg1_0__Reg1_4__s30_2Imm1_7 |
| 2731 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2732 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7 |
| 2733 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_Reg, 7, CVT_Done }, |
| 2734 | // Convert__Reg1_0__Reg1_4__u32_0Imm1_7 |
| 2735 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2736 | // Convert__Reg1_0__u29_3Imm1_7 |
| 2737 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2738 | // Convert__Reg1_0__Reg1_4__s29_3Imm1_7 |
| 2739 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2740 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7 |
| 2741 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2742 | // Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7 |
| 2743 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2744 | // Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7 |
| 2745 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2746 | // Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7 |
| 2747 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2748 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7 |
| 2749 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_Done }, |
| 2750 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7 |
| 2751 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2752 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7 |
| 2753 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2754 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7 |
| 2755 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2756 | // Convert__Reg1_0__Reg1_5__u32_0Imm1_7 |
| 2757 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2758 | // Convert__Reg1_0__Reg1_5__u8_0Imm1_7 |
| 2759 | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2760 | // Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7 |
| 2761 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2762 | // Convert__Reg1_0__u32_0Imm1_7 |
| 2763 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2764 | // Convert__Reg1_0__Reg1_4__s32_0Imm1_7 |
| 2765 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2766 | // Convert__Reg1_0__Reg1_4__s31_1Imm1_7 |
| 2767 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2768 | // Convert__Reg1_0__u31_1Imm1_7 |
| 2769 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2770 | // Convert__Reg1_0__u30_2Imm1_7 |
| 2771 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 2772 | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7 |
| 2773 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 7, CVT_Done }, |
| 2774 | // Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7 |
| 2775 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2776 | // Convert__Reg1_0__Reg1_4__Reg1_7 |
| 2777 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_Done }, |
| 2778 | // Convert__Reg1_0__Reg1_4__s4_0Imm1_7 |
| 2779 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2780 | // Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7 |
| 2781 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
| 2782 | // Convert__Reg1_0__Reg1_7__Reg1_8 |
| 2783 | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
| 2784 | // Convert__Reg1_0__Reg1_6__s32_0Imm1_8 |
| 2785 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2786 | // Convert__Reg1_0__Reg1_6__s8_0Imm1_8 |
| 2787 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2788 | // Convert__Reg1_0__Reg1_6__u8_0Imm1_8 |
| 2789 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2790 | // Convert__Reg1_0__Reg1_6__u32_0Imm1_8 |
| 2791 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2792 | // Convert__Reg1_0__Reg1_6__u7_0Imm1_8 |
| 2793 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2794 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8 |
| 2795 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2796 | // Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0 |
| 2797 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Tied, Tie1_0_0, CVT_Done }, |
| 2798 | // Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8 |
| 2799 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2800 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8 |
| 2801 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2802 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8 |
| 2803 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2804 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8 |
| 2805 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2806 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8 |
| 2807 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2808 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8 |
| 2809 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2810 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8 |
| 2811 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2812 | // Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8 |
| 2813 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2814 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8 |
| 2815 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2816 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8 |
| 2817 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2818 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8 |
| 2819 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2820 | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8 |
| 2821 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2822 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8 |
| 2823 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
| 2824 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8 |
| 2825 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2826 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8 |
| 2827 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
| 2828 | // Convert__Reg1_0__Reg1_7__s32_0Imm1_9 |
| 2829 | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 2830 | // Convert__Reg1_0__Reg1_7__u32_0Imm1_9 |
| 2831 | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, |
| 2832 | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8 |
| 2833 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
| 2834 | // Convert__Reg1_0__Tie0_0_0__Reg1_7 |
| 2835 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Done }, |
| 2836 | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7 |
| 2837 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
| 2838 | // Convert__Reg1_0__Reg1_6__s6_0Imm1_9 |
| 2839 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 2840 | // Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8 |
| 2841 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_7, CVT_95_Reg, 8, CVT_Done }, |
| 2842 | // Convert__Reg1_0__Reg1_6__s4_0Imm1_9 |
| 2843 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 2844 | // Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9 |
| 2845 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_95_Reg, 9, CVT_Done }, |
| 2846 | // Convert__Reg1_0__Reg1_6__Reg1_9 |
| 2847 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Done }, |
| 2848 | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9 |
| 2849 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_Done }, |
| 2850 | // Convert__Reg1_0__Reg1_8__Reg1_9 |
| 2851 | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
| 2852 | // Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10 |
| 2853 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addImmOperands, 10, CVT_Done }, |
| 2854 | // Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9 |
| 2855 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
| 2856 | // Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9 |
| 2857 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 2858 | // Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9 |
| 2859 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
| 2860 | // Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9 |
| 2861 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, |
| 2862 | // Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9 |
| 2863 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
| 2864 | // Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9 |
| 2865 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 2866 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8 |
| 2867 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2868 | // Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10 |
| 2869 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
| 2870 | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10 |
| 2871 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
| 2872 | // Convert__Reg1_0__Reg1_9__Reg1_10 |
| 2873 | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_Reg, 10, CVT_Done }, |
| 2874 | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11 |
| 2875 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 2876 | // Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11 |
| 2877 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 2878 | // Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9 |
| 2879 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Done }, |
| 2880 | // Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10 |
| 2881 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Tied, Tie0_0_8, CVT_95_addImmOperands, 10, CVT_Done }, |
| 2882 | // Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10 |
| 2883 | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_95_addImmOperands, 10, CVT_Done }, |
| 2884 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11 |
| 2885 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
| 2886 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11 |
| 2887 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
| 2888 | // Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12 |
| 2889 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
| 2890 | // Convert__Reg1_0__Reg1_7__Reg1_10 |
| 2891 | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
| 2892 | // Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0 |
| 2893 | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_Done }, |
| 2894 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12 |
| 2895 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2896 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12 |
| 2897 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2898 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12 |
| 2899 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2900 | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12 |
| 2901 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2902 | // Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13 |
| 2903 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
| 2904 | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13 |
| 2905 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
| 2906 | // Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13 |
| 2907 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
| 2908 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12 |
| 2909 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2910 | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12 |
| 2911 | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2912 | // Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11 |
| 2913 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 8, CVT_95_Reg, 11, CVT_Done }, |
| 2914 | // Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0 |
| 2915 | { CVT_95_Reg, 0, CVT_95_Reg, 10, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Tied, Tie1_0_0, CVT_Done }, |
| 2916 | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14 |
| 2917 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
| 2918 | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14 |
| 2919 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
| 2920 | // Convert__Reg1_0__Reg1_8__Reg1_12 |
| 2921 | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_Reg, 12, CVT_Done }, |
| 2922 | // Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0 |
| 2923 | { CVT_95_Reg, 0, CVT_95_Reg, 12, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Tied, Tie1_0_0, CVT_Done }, |
| 2924 | // Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10 |
| 2925 | { CVT_95_Reg, 0, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
| 2926 | // Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13 |
| 2927 | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
| 2928 | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14 |
| 2929 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
| 2930 | // Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12 |
| 2931 | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_6, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
| 2932 | // Convert__regR29__Tie0_0_0__u11_3Imm1_3 |
| 2933 | { CVT_regR29, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 2934 | // Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4 |
| 2935 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 4, CVT_Done }, |
| 2936 | // Convert_NoOperands |
| 2937 | { CVT_Done }, |
| 2938 | // Convert__a30_2Imm1_1 |
| 2939 | { CVT_95_addSignedImmOperands, 1, CVT_Done }, |
| 2940 | // Convert__Reg1_1 |
| 2941 | { CVT_95_Reg, 1, CVT_Done }, |
| 2942 | // Convert__Reg1_2 |
| 2943 | { CVT_95_Reg, 2, CVT_Done }, |
| 2944 | // Convert__Reg1_2__Tie0_0_0__sgp10Const1_3 |
| 2945 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addsgp10ConstOperands, 3, CVT_Done }, |
| 2946 | // Convert__Reg1_2__Tie0_2_2 |
| 2947 | { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done }, |
| 2948 | // Convert__Reg1_2__Tie0_0_0 |
| 2949 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_Done }, |
| 2950 | // Convert__Reg1_2__imm_95_0 |
| 2951 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, |
| 2952 | // Convert__Reg1_2__u11_3Imm1_5 |
| 2953 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_Done }, |
| 2954 | // Convert__Reg1_2__Reg1_3 |
| 2955 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, |
| 2956 | // Convert__regD15__regR30 |
| 2957 | { CVT_regD15, 0, CVT_regR30, 0, CVT_Done }, |
| 2958 | // Convert__imm_95_0 |
| 2959 | { CVT_imm_95_0, 0, CVT_Done }, |
| 2960 | // Convert__regD15__Reg1_2__regR30 |
| 2961 | { CVT_regD15, 0, CVT_95_Reg, 2, CVT_regR30, 0, CVT_Done }, |
| 2962 | // Convert__regD15__Reg1_3__regR30 |
| 2963 | { CVT_regD15, 0, CVT_95_Reg, 3, CVT_regR30, 0, CVT_Done }, |
| 2964 | // Convert__Reg1_2__a30_2Imm1_5 |
| 2965 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
| 2966 | // Convert__Reg1_2__Reg1_5 |
| 2967 | { CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Done }, |
| 2968 | // Convert__Reg1_2__b30_2Imm1_5 |
| 2969 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
| 2970 | // Convert__Reg1_3__a30_2Imm1_6 |
| 2971 | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 2972 | // Convert__Reg1_3__Reg1_6 |
| 2973 | { CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done }, |
| 2974 | // Convert__Reg1_3__b30_2Imm1_6 |
| 2975 | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 2976 | // Convert__Reg1_4__Reg1_2__Reg1_6 |
| 2977 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
| 2978 | // Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0 |
| 2979 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_Done }, |
| 2980 | // Convert__Reg1_5__Reg1_3__Reg1_7 |
| 2981 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_Done }, |
| 2982 | // Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0 |
| 2983 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_Done }, |
| 2984 | // Convert__Reg1_2__b30_2Imm1_7 |
| 2985 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2986 | // Convert__Reg1_2__Reg1_7 |
| 2987 | { CVT_95_Reg, 2, CVT_95_Reg, 7, CVT_Done }, |
| 2988 | // Convert__Reg1_4__Reg1_2__s32_0Imm1_7 |
| 2989 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 2990 | // Convert__Reg1_3__b30_2Imm1_8 |
| 2991 | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2992 | // Convert__Reg1_3__Reg1_8 |
| 2993 | { CVT_95_Reg, 3, CVT_95_Reg, 8, CVT_Done }, |
| 2994 | // Convert__Reg1_5__Reg1_3__s32_0Imm1_8 |
| 2995 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 2996 | // Convert__Reg1_6__Reg1_2__Reg1_8 |
| 2997 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
| 2998 | // Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0 |
| 2999 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
| 3000 | // Convert__Reg1_7__Reg1_3__Reg1_9 |
| 3001 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
| 3002 | // Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0 |
| 3003 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_Done }, |
| 3004 | // Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9 |
| 3005 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_Reg, 9, CVT_Done }, |
| 3006 | // Convert__Reg1_2__Reg1_8__imm_95_0 |
| 3007 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
| 3008 | // Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0 |
| 3009 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
| 3010 | // Convert__Reg1_4__Reg1_2__Reg1_8 |
| 3011 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
| 3012 | // Convert__Reg1_2__b30_2Imm1_9 |
| 3013 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 3014 | // Convert__Reg1_2__Reg1_9 |
| 3015 | { CVT_95_Reg, 2, CVT_95_Reg, 9, CVT_Done }, |
| 3016 | // Convert__Reg1_6__Reg1_2__s32_0Imm1_9 |
| 3017 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 3018 | // Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10 |
| 3019 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_Reg, 10, CVT_Done }, |
| 3020 | // Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0 |
| 3021 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_Done }, |
| 3022 | // Convert__Reg1_5__Reg1_3__Reg1_9 |
| 3023 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
| 3024 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0 |
| 3025 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_9_9, CVT_imm_95_0, 0, CVT_Done }, |
| 3026 | // Convert__Reg1_3__b30_2Imm1_10 |
| 3027 | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
| 3028 | // Convert__Reg1_3__Reg1_10 |
| 3029 | { CVT_95_Reg, 3, CVT_95_Reg, 10, CVT_Done }, |
| 3030 | // Convert__Reg1_7__Reg1_3__s32_0Imm1_10 |
| 3031 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
| 3032 | // Convert__Reg1_2__u32_0Imm1_7__Reg1_10 |
| 3033 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 7, CVT_95_Reg, 10, CVT_Done }, |
| 3034 | // Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10 |
| 3035 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
| 3036 | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9 |
| 3037 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
| 3038 | // Convert__Reg1_4__Reg1_2__u32_0Imm1_9 |
| 3039 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 9, CVT_Done }, |
| 3040 | // Convert__Reg1_3__u32_0Imm1_8__Reg1_11 |
| 3041 | { CVT_95_Reg, 3, CVT_95_addImmOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
| 3042 | // Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11 |
| 3043 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
| 3044 | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10 |
| 3045 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 10, CVT_Done }, |
| 3046 | // Convert__Reg1_5__Reg1_3__u32_0Imm1_10 |
| 3047 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addImmOperands, 10, CVT_Done }, |
| 3048 | // Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11 |
| 3049 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_Reg, 11, CVT_Done }, |
| 3050 | // Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9 |
| 3051 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_Done }, |
| 3052 | // Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10 |
| 3053 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
| 3054 | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0 |
| 3055 | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_10_10, CVT_imm_95_0, 0, CVT_Done }, |
| 3056 | // Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0 |
| 3057 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_Done }, |
| 3058 | // Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11 |
| 3059 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_Reg, 11, CVT_Done }, |
| 3060 | // Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0 |
| 3061 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_Done }, |
| 3062 | // Convert__Reg1_6__Reg1_2__Reg1_10 |
| 3063 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_Done }, |
| 3064 | // Convert__Reg1_2__b13_2Imm1_11 |
| 3065 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
| 3066 | // Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12 |
| 3067 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_Reg, 12, CVT_Done }, |
| 3068 | // Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10 |
| 3069 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_Done }, |
| 3070 | // Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11 |
| 3071 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
| 3072 | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0 |
| 3073 | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_11_11, CVT_imm_95_0, 0, CVT_Done }, |
| 3074 | // Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0 |
| 3075 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_imm_95_0, 0, CVT_Done }, |
| 3076 | // Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12 |
| 3077 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_Reg, 12, CVT_Done }, |
| 3078 | // Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0 |
| 3079 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_imm_95_0, 0, CVT_Done }, |
| 3080 | // Convert__Reg1_7__Reg1_3__Reg1_11 |
| 3081 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_Done }, |
| 3082 | // Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12 |
| 3083 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3084 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12 |
| 3085 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3086 | // Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12 |
| 3087 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3088 | // Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12 |
| 3089 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3090 | // Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12 |
| 3091 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3092 | // Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12 |
| 3093 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3094 | // Convert__Reg1_2__Reg1_8__s4_0Imm1_11 |
| 3095 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
| 3096 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11 |
| 3097 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 11, CVT_Done }, |
| 3098 | // Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11 |
| 3099 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3100 | // Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11 |
| 3101 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3102 | // Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11 |
| 3103 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3104 | // Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11 |
| 3105 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3106 | // Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11 |
| 3107 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
| 3108 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11 |
| 3109 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
| 3110 | // Convert__Reg1_2__u32_0Imm1_9__Reg1_12 |
| 3111 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3112 | // Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12 |
| 3113 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3114 | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11 |
| 3115 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 11, CVT_Done }, |
| 3116 | // Convert__Reg1_6__Reg1_2__u32_0Imm1_11 |
| 3117 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3118 | // Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13 |
| 3119 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3120 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13 |
| 3121 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3122 | // Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13 |
| 3123 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3124 | // Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13 |
| 3125 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3126 | // Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13 |
| 3127 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3128 | // Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13 |
| 3129 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3130 | // Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12 |
| 3131 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
| 3132 | // Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12 |
| 3133 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
| 3134 | // Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12 |
| 3135 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
| 3136 | // Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12 |
| 3137 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
| 3138 | // Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12 |
| 3139 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3140 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12 |
| 3141 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_Reg, 12, CVT_Done }, |
| 3142 | // Convert__Reg1_3__u32_0Imm1_10__Reg1_13 |
| 3143 | { CVT_95_Reg, 3, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3144 | // Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13 |
| 3145 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3146 | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12 |
| 3147 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 12, CVT_Done }, |
| 3148 | // Convert__Reg1_7__Reg1_3__u32_0Imm1_12 |
| 3149 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_addImmOperands, 12, CVT_Done }, |
| 3150 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13 |
| 3151 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3152 | // Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11 |
| 3153 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_6_6, CVT_95_Reg, 11, CVT_Done }, |
| 3154 | // Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13 |
| 3155 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3156 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13 |
| 3157 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3158 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13 |
| 3159 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3160 | // Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13 |
| 3161 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3162 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13 |
| 3163 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3164 | // Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13 |
| 3165 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3166 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13 |
| 3167 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
| 3168 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12 |
| 3169 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3170 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12 |
| 3171 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3172 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12 |
| 3173 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3174 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12 |
| 3175 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3176 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12 |
| 3177 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3178 | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12 |
| 3179 | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3180 | // Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12 |
| 3181 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
| 3182 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14 |
| 3183 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3184 | // Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12 |
| 3185 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_7_7, CVT_95_Reg, 12, CVT_Done }, |
| 3186 | // Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14 |
| 3187 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3188 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14 |
| 3189 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3190 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14 |
| 3191 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3192 | // Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14 |
| 3193 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3194 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14 |
| 3195 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3196 | // Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14 |
| 3197 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3198 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14 |
| 3199 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3200 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13 |
| 3201 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3202 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13 |
| 3203 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3204 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13 |
| 3205 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3206 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13 |
| 3207 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3208 | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13 |
| 3209 | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3210 | // Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13 |
| 3211 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3212 | // Convert__Reg1_4__b30_2Imm1_14 |
| 3213 | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3214 | // Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14 |
| 3215 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_95_Reg, 14, CVT_Done }, |
| 3216 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14 |
| 3217 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 14, CVT_Done }, |
| 3218 | // Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13 |
| 3219 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
| 3220 | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13 |
| 3221 | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_Reg, 13, CVT_Done }, |
| 3222 | // Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14 |
| 3223 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3224 | // Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14 |
| 3225 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3226 | // Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14 |
| 3227 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3228 | // Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14 |
| 3229 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
| 3230 | // Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13 |
| 3231 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
| 3232 | // Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13 |
| 3233 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
| 3234 | // Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13 |
| 3235 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
| 3236 | // Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13 |
| 3237 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
| 3238 | // Convert__Reg1_5__b30_2Imm1_15 |
| 3239 | { CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3240 | // Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15 |
| 3241 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
| 3242 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15 |
| 3243 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_95_Reg, 15, CVT_Done }, |
| 3244 | // Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14 |
| 3245 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3246 | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14 |
| 3247 | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_Reg, 14, CVT_Done }, |
| 3248 | // Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15 |
| 3249 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3250 | // Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15 |
| 3251 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3252 | // Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15 |
| 3253 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3254 | // Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15 |
| 3255 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3256 | // Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14 |
| 3257 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
| 3258 | // Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14 |
| 3259 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
| 3260 | // Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14 |
| 3261 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
| 3262 | // Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14 |
| 3263 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
| 3264 | // Convert__Reg1_6__Reg1_9__b30_2Imm1_15 |
| 3265 | { CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3266 | // Convert__Reg1_6__Reg1_7__b30_2Imm1_15 |
| 3267 | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3268 | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15 |
| 3269 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
| 3270 | // Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15 |
| 3271 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_Reg, 15, CVT_Done }, |
| 3272 | // Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13 |
| 3273 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_Reg, 13, CVT_Done }, |
| 3274 | // Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15 |
| 3275 | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3276 | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14 |
| 3277 | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
| 3278 | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14 |
| 3279 | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3280 | // Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15 |
| 3281 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3282 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15 |
| 3283 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3284 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15 |
| 3285 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3286 | // Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15 |
| 3287 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3288 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15 |
| 3289 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3290 | // Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15 |
| 3291 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3292 | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15 |
| 3293 | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
| 3294 | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14 |
| 3295 | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3296 | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14 |
| 3297 | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3298 | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14 |
| 3299 | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3300 | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14 |
| 3301 | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
| 3302 | // Convert__Reg1_7__Reg1_10__b30_2Imm1_16 |
| 3303 | { CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3304 | // Convert__Reg1_7__Reg1_8__b30_2Imm1_16 |
| 3305 | { CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3306 | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16 |
| 3307 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 16, CVT_Done }, |
| 3308 | // Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16 |
| 3309 | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
| 3310 | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15 |
| 3311 | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addImmOperands, 15, CVT_Done }, |
| 3312 | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15 |
| 3313 | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3314 | // Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16 |
| 3315 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3316 | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16 |
| 3317 | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
| 3318 | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16 |
| 3319 | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
| 3320 | // Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16 |
| 3321 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3322 | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16 |
| 3323 | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
| 3324 | // Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16 |
| 3325 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3326 | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16 |
| 3327 | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
| 3328 | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15 |
| 3329 | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3330 | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15 |
| 3331 | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3332 | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15 |
| 3333 | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3334 | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15 |
| 3335 | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
| 3336 | // Convert__Reg1_6__n1Const1_10__b30_2Imm1_16 |
| 3337 | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3338 | // Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16 |
| 3339 | { CVT_95_Reg, 6, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
| 3340 | // Convert__Reg1_7__n1Const1_11__b30_2Imm1_17 |
| 3341 | { CVT_95_Reg, 7, CVT_95_addn1ConstOperands, 11, CVT_95_addSignedImmOperands, 17, CVT_Done }, |
| 3342 | // Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17 |
| 3343 | { CVT_95_Reg, 7, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 17, CVT_Done }, |
| 3344 | // Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12 |
| 3345 | { CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 11, CVT_95_Reg, 12, CVT_Done }, |
| 3346 | // Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17 |
| 3347 | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_95_Reg, 17, CVT_Done }, |
| 3348 | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16 |
| 3349 | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 12, CVT_95_addImmOperands, 16, CVT_Done }, |
| 3350 | // Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18 |
| 3351 | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addImmOperands, 15, CVT_95_Reg, 18, CVT_Done }, |
| 3352 | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17 |
| 3353 | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 13, CVT_95_addImmOperands, 17, CVT_Done }, |
| 3354 | // Convert__u26_6Imm1_3 |
| 3355 | { CVT_95_addImmOperands, 3, CVT_Done }, |
| 3356 | // Convert__b30_2Imm1_1 |
| 3357 | { CVT_95_addSignedImmOperands, 1, CVT_Done }, |
| 3358 | // Convert__b30_2Imm1_2__Reg1_3 |
| 3359 | { CVT_95_addSignedImmOperands, 2, CVT_95_Reg, 3, CVT_Done }, |
| 3360 | // Convert__b30_2Imm1_2__u10_0Imm1_4 |
| 3361 | { CVT_95_addSignedImmOperands, 2, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3362 | // Convert__Reg1_2__imm_95_0__Reg1_5 |
| 3363 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 5, CVT_Done }, |
| 3364 | // Convert__u32_0Imm1_3__Reg1_6 |
| 3365 | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
| 3366 | // Convert__Reg1_2__imm_95_0__Reg1_6 |
| 3367 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 6, CVT_Done }, |
| 3368 | // Convert__Reg1_2__imm_95_0__s32_0Imm1_6 |
| 3369 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 3370 | // Convert__Reg1_2__imm_95_0__u5_0Imm1_7 |
| 3371 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
| 3372 | // Convert__u32_0Imm1_5__Reg1_8 |
| 3373 | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3374 | // Convert__Reg1_2__s32_0Imm1_5__Reg1_8 |
| 3375 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3376 | // Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8 |
| 3377 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3378 | // Convert__Reg1_2__u32_0Imm1_5__Reg1_8 |
| 3379 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3380 | // Convert__Reg1_2__imm_95_0__u5_0Imm1_8 |
| 3381 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 8, CVT_Done }, |
| 3382 | // Convert__Reg1_2__u32_0Imm1_5__Reg1_9 |
| 3383 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
| 3384 | // Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9 |
| 3385 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 3386 | // Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9 |
| 3387 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
| 3388 | // Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10 |
| 3389 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
| 3390 | // Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10 |
| 3391 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 10, CVT_Done }, |
| 3392 | // Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11 |
| 3393 | { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
| 3394 | // Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11 |
| 3395 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3396 | // Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12 |
| 3397 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
| 3398 | // Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13 |
| 3399 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 13, CVT_Done }, |
| 3400 | // Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14 |
| 3401 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
| 3402 | // Convert__Reg1_2__Reg1_3__Reg1_4 |
| 3403 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, |
| 3404 | // Convert__u29_3Imm1_3__Reg1_6 |
| 3405 | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
| 3406 | // Convert__u29_3Imm1_5__Reg1_8 |
| 3407 | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3408 | // Convert__Reg1_2__s29_3Imm1_5__Reg1_8 |
| 3409 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3410 | // Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9 |
| 3411 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
| 3412 | // Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14 |
| 3413 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
| 3414 | // Convert__Reg1_3__Reg1_2__Reg1_6 |
| 3415 | { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
| 3416 | // Convert__u31_1Imm1_3__Reg1_6 |
| 3417 | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
| 3418 | // Convert__u31_1Imm1_5__Reg1_8 |
| 3419 | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3420 | // Convert__Reg1_2__s31_1Imm1_5__Reg1_8 |
| 3421 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3422 | // Convert__Reg1_2__u31_1Imm1_5__Reg1_9 |
| 3423 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
| 3424 | // Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9 |
| 3425 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 3426 | // Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9 |
| 3427 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
| 3428 | // Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10 |
| 3429 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
| 3430 | // Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11 |
| 3431 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3432 | // Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14 |
| 3433 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
| 3434 | // Convert__u30_2Imm1_3__Reg1_6 |
| 3435 | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
| 3436 | // Convert__u30_2Imm1_5__Reg1_8 |
| 3437 | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3438 | // Convert__Reg1_2__s30_2Imm1_5__Reg1_8 |
| 3439 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3440 | // Convert__Reg1_2__u30_2Imm1_5__Reg1_9 |
| 3441 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
| 3442 | // Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9 |
| 3443 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
| 3444 | // Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9 |
| 3445 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
| 3446 | // Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10 |
| 3447 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
| 3448 | // Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11 |
| 3449 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
| 3450 | // Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14 |
| 3451 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
| 3452 | // Convert__Reg1_4__b30_2Imm1_18 |
| 3453 | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 18, CVT_Done }, |
| 3454 | // Convert__Reg1_6__Reg1_7__b30_2Imm1_19 |
| 3455 | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 19, CVT_Done }, |
| 3456 | // Convert__Reg1_4__b30_2Imm1_19 |
| 3457 | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 19, CVT_Done }, |
| 3458 | // Convert__Reg1_6__n1Const1_8__b30_2Imm1_20 |
| 3459 | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 8, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
| 3460 | // Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20 |
| 3461 | { CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
| 3462 | // Convert__Reg1_6__Reg1_7__b30_2Imm1_20 |
| 3463 | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
| 3464 | // Convert__Reg1_6__n1Const1_8__b30_2Imm1_21 |
| 3465 | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 8, CVT_95_addSignedImmOperands, 21, CVT_Done }, |
| 3466 | // Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21 |
| 3467 | { CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_95_addSignedImmOperands, 21, CVT_Done }, |
| 3468 | // Convert__b30_2Imm1_4__Reg1_5 |
| 3469 | { CVT_95_addSignedImmOperands, 4, CVT_95_Reg, 5, CVT_Done }, |
| 3470 | // Convert__b30_2Imm1_4__u10_0Imm1_6 |
| 3471 | { CVT_95_addSignedImmOperands, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
| 3472 | // Convert__u10_0Imm1_3 |
| 3473 | { CVT_95_addImmOperands, 3, CVT_Done }, |
| 3474 | // Convert__u8_0Imm1_3 |
| 3475 | { CVT_95_addImmOperands, 3, CVT_Done }, |
| 3476 | // Convert__regR0__Tie0_0_0__u8_0Imm1_3 |
| 3477 | { CVT_regR0, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 3, CVT_Done }, |
| 3478 | // Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4 |
| 3479 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3480 | // Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4 |
| 3481 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 4, CVT_Done }, |
| 3482 | // Convert__Reg1_2__imm_95_0__Reg1_7 |
| 3483 | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 7, CVT_Done }, |
| 3484 | // Convert__Reg1_2__s4_0Imm1_5 |
| 3485 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
| 3486 | // Convert__Reg1_2__s4_0Imm1_5__Reg1_8 |
| 3487 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
| 3488 | // Convert__Reg1_2__Tie0_0_0__Reg1_5 |
| 3489 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_Done }, |
| 3490 | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6 |
| 3491 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
| 3492 | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9 |
| 3493 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
| 3494 | // Convert__Reg1_2__s4_0Imm1_5__Reg1_10 |
| 3495 | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 10, CVT_Done }, |
| 3496 | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11 |
| 3497 | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 11, CVT_Done }, |
| 3498 | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11 |
| 3499 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 11, CVT_Done }, |
| 3500 | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9 |
| 3501 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 9, CVT_Done }, |
| 3502 | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10 |
| 3503 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_Done }, |
| 3504 | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12 |
| 3505 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 12, CVT_Done }, |
| 3506 | // Convert__Reg1_6__Reg1_7__Reg1_8 |
| 3507 | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
| 3508 | // Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4 |
| 3509 | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_3_3, CVT_95_Reg, 4, CVT_Done }, |
| 3510 | // Convert__u1_0Imm1_3 |
| 3511 | { CVT_95_addImmOperands, 3, CVT_Done }, |
| 3512 | // Convert__Reg1_2__u1_0Imm1_4 |
| 3513 | { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done }, |
| 3514 | // Convert__Reg1_4__imm_95_0 |
| 3515 | { CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
| 3516 | // Convert__Reg1_4__s4_0Imm1_7 |
| 3517 | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
| 3518 | // Convert__Reg1_4__Tie0_0_0__Reg1_7 |
| 3519 | { CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Done }, |
| 3520 | // Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8 |
| 3521 | { CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
| 3522 | }; |
| 3523 | |
| 3524 | void HexagonAsmParser:: |
| 3525 | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
| 3526 | const OperandVector &Operands) { |
| 3527 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 3528 | const uint8_t *Converter = ConversionTable[Kind]; |
| 3529 | Inst.setOpcode(Opcode); |
| 3530 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 3531 | unsigned OpIdx = *(p + 1); |
| 3532 | switch (*p) { |
| 3533 | default: llvm_unreachable("invalid conversion entry!" ); |
| 3534 | case CVT_Reg: |
| 3535 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 3536 | break; |
| 3537 | case CVT_Tied: { |
| 3538 | assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - |
| 3539 | std::begin(TiedAsmOperandTable)) && |
| 3540 | "Tied operand not found" ); |
| 3541 | unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; |
| 3542 | if (TiedResOpnd != (uint8_t)-1) |
| 3543 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
| 3544 | break; |
| 3545 | } |
| 3546 | case CVT_95_Reg: |
| 3547 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
| 3548 | break; |
| 3549 | case CVT_95_addSignedImmOperands: |
| 3550 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addSignedImmOperands(Inst, 1); |
| 3551 | break; |
| 3552 | case CVT_95_addImmOperands: |
| 3553 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
| 3554 | break; |
| 3555 | case CVT_regW15: |
| 3556 | Inst.addOperand(MCOperand::createReg(Hexagon::W15)); |
| 3557 | break; |
| 3558 | case CVT_imm_95_0: |
| 3559 | Inst.addOperand(MCOperand::createImm(0)); |
| 3560 | break; |
| 3561 | case CVT_imm_95__MINUS_1: |
| 3562 | Inst.addOperand(MCOperand::createImm(-1)); |
| 3563 | break; |
| 3564 | case CVT_imm_95_255: |
| 3565 | Inst.addOperand(MCOperand::createImm(255)); |
| 3566 | break; |
| 3567 | case CVT_regR29: |
| 3568 | Inst.addOperand(MCOperand::createReg(Hexagon::R29)); |
| 3569 | break; |
| 3570 | case CVT_95_addsgp10ConstOperands: |
| 3571 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addsgp10ConstOperands(Inst, 1); |
| 3572 | break; |
| 3573 | case CVT_regD15: |
| 3574 | Inst.addOperand(MCOperand::createReg(Hexagon::D15)); |
| 3575 | break; |
| 3576 | case CVT_regR30: |
| 3577 | Inst.addOperand(MCOperand::createReg(Hexagon::R30)); |
| 3578 | break; |
| 3579 | case CVT_95_addn1ConstOperands: |
| 3580 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addn1ConstOperands(Inst, 1); |
| 3581 | break; |
| 3582 | case CVT_regR0: |
| 3583 | Inst.addOperand(MCOperand::createReg(Hexagon::R0)); |
| 3584 | break; |
| 3585 | } |
| 3586 | } |
| 3587 | } |
| 3588 | |
| 3589 | void HexagonAsmParser:: |
| 3590 | convertToMapAndConstraints(unsigned Kind, |
| 3591 | const OperandVector &Operands) { |
| 3592 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 3593 | unsigned NumMCOperands = 0; |
| 3594 | const uint8_t *Converter = ConversionTable[Kind]; |
| 3595 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 3596 | switch (*p) { |
| 3597 | default: llvm_unreachable("invalid conversion entry!" ); |
| 3598 | case CVT_Reg: |
| 3599 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3600 | Operands[*(p + 1)]->setConstraint("r" ); |
| 3601 | ++NumMCOperands; |
| 3602 | break; |
| 3603 | case CVT_Tied: |
| 3604 | ++NumMCOperands; |
| 3605 | break; |
| 3606 | case CVT_95_Reg: |
| 3607 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3608 | Operands[*(p + 1)]->setConstraint("r" ); |
| 3609 | NumMCOperands += 1; |
| 3610 | break; |
| 3611 | case CVT_95_addSignedImmOperands: |
| 3612 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3613 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3614 | NumMCOperands += 1; |
| 3615 | break; |
| 3616 | case CVT_95_addImmOperands: |
| 3617 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3618 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3619 | NumMCOperands += 1; |
| 3620 | break; |
| 3621 | case CVT_regW15: |
| 3622 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3623 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3624 | ++NumMCOperands; |
| 3625 | break; |
| 3626 | case CVT_imm_95_0: |
| 3627 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3628 | Operands[*(p + 1)]->setConstraint("" ); |
| 3629 | ++NumMCOperands; |
| 3630 | break; |
| 3631 | case CVT_imm_95__MINUS_1: |
| 3632 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3633 | Operands[*(p + 1)]->setConstraint("" ); |
| 3634 | ++NumMCOperands; |
| 3635 | break; |
| 3636 | case CVT_imm_95_255: |
| 3637 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3638 | Operands[*(p + 1)]->setConstraint("" ); |
| 3639 | ++NumMCOperands; |
| 3640 | break; |
| 3641 | case CVT_regR29: |
| 3642 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3643 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3644 | ++NumMCOperands; |
| 3645 | break; |
| 3646 | case CVT_95_addsgp10ConstOperands: |
| 3647 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3648 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3649 | NumMCOperands += 1; |
| 3650 | break; |
| 3651 | case CVT_regD15: |
| 3652 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3653 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3654 | ++NumMCOperands; |
| 3655 | break; |
| 3656 | case CVT_regR30: |
| 3657 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3658 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3659 | ++NumMCOperands; |
| 3660 | break; |
| 3661 | case CVT_95_addn1ConstOperands: |
| 3662 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3663 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3664 | NumMCOperands += 1; |
| 3665 | break; |
| 3666 | case CVT_regR0: |
| 3667 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
| 3668 | Operands[*(p + 1)]->setConstraint("m" ); |
| 3669 | ++NumMCOperands; |
| 3670 | break; |
| 3671 | } |
| 3672 | } |
| 3673 | } |
| 3674 | |
| 3675 | namespace { |
| 3676 | |
| 3677 | /// MatchClassKind - The kinds of classes which participate in |
| 3678 | /// instruction matching. |
| 3679 | enum MatchClassKind { |
| 3680 | InvalidMatchClass = 0, |
| 3681 | OptionalMatchClass = 1, |
| 3682 | MCK__EXCLAIM_, // '!' |
| 3683 | MCK__HASH_, // '#' |
| 3684 | MCK__38_, // '&' |
| 3685 | MCK__40_, // '(' |
| 3686 | MCK__41_, // ')' |
| 3687 | MCK__STAR_, // '*' |
| 3688 | MCK__43_, // '+' |
| 3689 | MCK__MINUS_, // '-' |
| 3690 | MCK__DOT_, // '.' |
| 3691 | MCK_0, // '0' |
| 3692 | MCK_1, // '1' |
| 3693 | MCK_16, // '16' |
| 3694 | MCK__COLON_, // ':' |
| 3695 | MCK__59_, // ';' |
| 3696 | MCK__LT_, // '<' |
| 3697 | MCK__61_, // '=' |
| 3698 | MCK__GT_, // '>' |
| 3699 | MCK_CONST32, // 'CONST32' |
| 3700 | MCK_CONST64, // 'CONST64' |
| 3701 | MCK_DUPLEX, // 'DUPLEX' |
| 3702 | MCK_I, // 'I' |
| 3703 | MCK__94_, // '^' |
| 3704 | MCK_abs, // 'abs' |
| 3705 | MCK_add, // 'add' |
| 3706 | MCK_addasl, // 'addasl' |
| 3707 | MCK_all8, // 'all8' |
| 3708 | MCK_allocframe, // 'allocframe' |
| 3709 | MCK_and, // 'and' |
| 3710 | MCK_any8, // 'any8' |
| 3711 | MCK_asl, // 'asl' |
| 3712 | MCK_aslh, // 'aslh' |
| 3713 | MCK_asr, // 'asr' |
| 3714 | MCK_asrh, // 'asrh' |
| 3715 | MCK_asrrnd, // 'asrrnd' |
| 3716 | MCK_at, // 'at' |
| 3717 | MCK_b, // 'b' |
| 3718 | MCK_b10, // 'b10' |
| 3719 | MCK_barrier, // 'barrier' |
| 3720 | MCK_bf, // 'bf' |
| 3721 | MCK_bitsclr, // 'bitsclr' |
| 3722 | MCK_bitsplit, // 'bitsplit' |
| 3723 | MCK_bitsset, // 'bitsset' |
| 3724 | MCK_boundscheck, // 'boundscheck' |
| 3725 | MCK_brev, // 'brev' |
| 3726 | MCK_brkpt, // 'brkpt' |
| 3727 | MCK_c, // 'c' |
| 3728 | MCK_call, // 'call' |
| 3729 | MCK_callr, // 'callr' |
| 3730 | MCK_callrh, // 'callrh' |
| 3731 | MCK_carry, // 'carry' |
| 3732 | MCK_chop, // 'chop' |
| 3733 | MCK_ciad, // 'ciad' |
| 3734 | MCK_circ, // 'circ' |
| 3735 | MCK_cl0, // 'cl0' |
| 3736 | MCK_cl1, // 'cl1' |
| 3737 | MCK_clb, // 'clb' |
| 3738 | MCK_clip, // 'clip' |
| 3739 | MCK_clrbit, // 'clrbit' |
| 3740 | MCK_cmp, // 'cmp' |
| 3741 | MCK_cmpb, // 'cmpb' |
| 3742 | MCK_cmph, // 'cmph' |
| 3743 | MCK_cmpy, // 'cmpy' |
| 3744 | MCK_cmpyi, // 'cmpyi' |
| 3745 | MCK_cmpyiw, // 'cmpyiw' |
| 3746 | MCK_cmpyiwh, // 'cmpyiwh' |
| 3747 | MCK_cmpyr, // 'cmpyr' |
| 3748 | MCK_cmpyrw, // 'cmpyrw' |
| 3749 | MCK_cmpyrwh, // 'cmpyrwh' |
| 3750 | MCK_combine, // 'combine' |
| 3751 | MCK_convert_95_d2df, // 'convert_d2df' |
| 3752 | MCK_convert_95_d2sf, // 'convert_d2sf' |
| 3753 | MCK_convert_95_df2d, // 'convert_df2d' |
| 3754 | MCK_convert_95_df2sf, // 'convert_df2sf' |
| 3755 | MCK_convert_95_df2ud, // 'convert_df2ud' |
| 3756 | MCK_convert_95_df2uw, // 'convert_df2uw' |
| 3757 | MCK_convert_95_df2w, // 'convert_df2w' |
| 3758 | MCK_convert_95_sf2d, // 'convert_sf2d' |
| 3759 | MCK_convert_95_sf2df, // 'convert_sf2df' |
| 3760 | MCK_convert_95_sf2ud, // 'convert_sf2ud' |
| 3761 | MCK_convert_95_sf2uw, // 'convert_sf2uw' |
| 3762 | MCK_convert_95_sf2w, // 'convert_sf2w' |
| 3763 | MCK_convert_95_ud2df, // 'convert_ud2df' |
| 3764 | MCK_convert_95_ud2sf, // 'convert_ud2sf' |
| 3765 | MCK_convert_95_uw2df, // 'convert_uw2df' |
| 3766 | MCK_convert_95_uw2sf, // 'convert_uw2sf' |
| 3767 | MCK_convert_95_w2df, // 'convert_w2df' |
| 3768 | MCK_convert_95_w2sf, // 'convert_w2sf' |
| 3769 | MCK_crnd, // 'crnd' |
| 3770 | MCK_cround, // 'cround' |
| 3771 | MCK_crswap, // 'crswap' |
| 3772 | MCK_cswi, // 'cswi' |
| 3773 | MCK_ct0, // 'ct0' |
| 3774 | MCK_ct1, // 'ct1' |
| 3775 | MCK_ctlbw, // 'ctlbw' |
| 3776 | MCK_cur, // 'cur' |
| 3777 | MCK_dccleana, // 'dccleana' |
| 3778 | MCK_dccleanidx, // 'dccleanidx' |
| 3779 | MCK_dccleaninva, // 'dccleaninva' |
| 3780 | MCK_dccleaninvidx, // 'dccleaninvidx' |
| 3781 | MCK_dcfetch, // 'dcfetch' |
| 3782 | MCK_dcinva, // 'dcinva' |
| 3783 | MCK_dcinvidx, // 'dcinvidx' |
| 3784 | MCK_dckill, // 'dckill' |
| 3785 | MCK_dctagr, // 'dctagr' |
| 3786 | MCK_dctagw, // 'dctagw' |
| 3787 | MCK_dczeroa, // 'dczeroa' |
| 3788 | MCK_dealloc_95_return, // 'dealloc_return' |
| 3789 | MCK_deallocframe, // 'deallocframe' |
| 3790 | MCK_decbin, // 'decbin' |
| 3791 | MCK_deinterleave, // 'deinterleave' |
| 3792 | MCK_deprecated, // 'deprecated' |
| 3793 | MCK_dfadd, // 'dfadd' |
| 3794 | MCK_dfclass, // 'dfclass' |
| 3795 | MCK_dfcmp, // 'dfcmp' |
| 3796 | MCK_dfmake, // 'dfmake' |
| 3797 | MCK_dfmax, // 'dfmax' |
| 3798 | MCK_dfmin, // 'dfmin' |
| 3799 | MCK_dfmpyfix, // 'dfmpyfix' |
| 3800 | MCK_dfmpyhh, // 'dfmpyhh' |
| 3801 | MCK_dfmpylh, // 'dfmpylh' |
| 3802 | MCK_dfmpyll, // 'dfmpyll' |
| 3803 | MCK_dfsub, // 'dfsub' |
| 3804 | MCK_diag0, // 'diag0' |
| 3805 | MCK_diag1, // 'diag1' |
| 3806 | MCK_dmlink, // 'dmlink' |
| 3807 | MCK_dmpause, // 'dmpause' |
| 3808 | MCK_dmpoll, // 'dmpoll' |
| 3809 | MCK_dmresume, // 'dmresume' |
| 3810 | MCK_dmstart, // 'dmstart' |
| 3811 | MCK_dmwait, // 'dmwait' |
| 3812 | MCK_endloop0, // 'endloop0' |
| 3813 | MCK_endloop01, // 'endloop01' |
| 3814 | MCK_endloop1, // 'endloop1' |
| 3815 | MCK_eq, // 'eq' |
| 3816 | MCK_extract, // 'extract' |
| 3817 | MCK_extractu, // 'extractu' |
| 3818 | MCK_f8, // 'f8' |
| 3819 | MCK_fastcorner9, // 'fastcorner9' |
| 3820 | MCK_ge, // 'ge' |
| 3821 | MCK_getimask, // 'getimask' |
| 3822 | MCK_geu, // 'geu' |
| 3823 | MCK_gt, // 'gt' |
| 3824 | MCK_gtu, // 'gtu' |
| 3825 | MCK_h, // 'h' |
| 3826 | MCK_hf, // 'hf' |
| 3827 | MCK_hi, // 'hi' |
| 3828 | MCK_hintjr, // 'hintjr' |
| 3829 | MCK_iassignr, // 'iassignr' |
| 3830 | MCK_iassignw, // 'iassignw' |
| 3831 | MCK_icdatar, // 'icdatar' |
| 3832 | MCK_icdataw, // 'icdataw' |
| 3833 | MCK_icinva, // 'icinva' |
| 3834 | MCK_icinvidx, // 'icinvidx' |
| 3835 | MCK_ickill, // 'ickill' |
| 3836 | MCK_iconst, // 'iconst' |
| 3837 | MCK_ictagr, // 'ictagr' |
| 3838 | MCK_ictagw, // 'ictagw' |
| 3839 | MCK_if, // 'if' |
| 3840 | MCK_immext, // 'immext' |
| 3841 | MCK_insert, // 'insert' |
| 3842 | MCK_interleave, // 'interleave' |
| 3843 | MCK_isync, // 'isync' |
| 3844 | MCK_jump, // 'jump' |
| 3845 | MCK_jumpr, // 'jumpr' |
| 3846 | MCK_jumprh, // 'jumprh' |
| 3847 | MCK_k0lock, // 'k0lock' |
| 3848 | MCK_k0unlock, // 'k0unlock' |
| 3849 | MCK_l, // 'l' |
| 3850 | MCK_l2cleanidx, // 'l2cleanidx' |
| 3851 | MCK_l2cleaninvidx, // 'l2cleaninvidx' |
| 3852 | MCK_l2fetch, // 'l2fetch' |
| 3853 | MCK_l2gclean, // 'l2gclean' |
| 3854 | MCK_l2gcleaninv, // 'l2gcleaninv' |
| 3855 | MCK_l2gunlock, // 'l2gunlock' |
| 3856 | MCK_l2invidx, // 'l2invidx' |
| 3857 | MCK_l2kill, // 'l2kill' |
| 3858 | MCK_l2locka, // 'l2locka' |
| 3859 | MCK_l2tagr, // 'l2tagr' |
| 3860 | MCK_l2tagw, // 'l2tagw' |
| 3861 | MCK_l2unlocka, // 'l2unlocka' |
| 3862 | MCK_lfs, // 'lfs' |
| 3863 | MCK_lib, // 'lib' |
| 3864 | MCK_lo, // 'lo' |
| 3865 | MCK_loop0, // 'loop0' |
| 3866 | MCK_loop1, // 'loop1' |
| 3867 | MCK_lsl, // 'lsl' |
| 3868 | MCK_lsr, // 'lsr' |
| 3869 | MCK_lt, // 'lt' |
| 3870 | MCK_ltu, // 'ltu' |
| 3871 | MCK_mask, // 'mask' |
| 3872 | MCK_max, // 'max' |
| 3873 | MCK_maxu, // 'maxu' |
| 3874 | MCK_memb, // 'memb' |
| 3875 | MCK_memb_95_fifo, // 'memb_fifo' |
| 3876 | MCK_membh, // 'membh' |
| 3877 | MCK_memcpy, // 'memcpy' |
| 3878 | MCK_memd, // 'memd' |
| 3879 | MCK_memd_95_aq, // 'memd_aq' |
| 3880 | MCK_memd_95_locked, // 'memd_locked' |
| 3881 | MCK_memd_95_rl, // 'memd_rl' |
| 3882 | MCK_memh, // 'memh' |
| 3883 | MCK_memh_95_fifo, // 'memh_fifo' |
| 3884 | MCK_memub, // 'memub' |
| 3885 | MCK_memubh, // 'memubh' |
| 3886 | MCK_memuh, // 'memuh' |
| 3887 | MCK_memw, // 'memw' |
| 3888 | MCK_memw_95_aq, // 'memw_aq' |
| 3889 | MCK_memw_95_locked, // 'memw_locked' |
| 3890 | MCK_memw_95_phys, // 'memw_phys' |
| 3891 | MCK_memw_95_rl, // 'memw_rl' |
| 3892 | MCK_min, // 'min' |
| 3893 | MCK_minu, // 'minu' |
| 3894 | MCK_modwrap, // 'modwrap' |
| 3895 | MCK_mpy, // 'mpy' |
| 3896 | MCK_mpyi, // 'mpyi' |
| 3897 | MCK_mpysu, // 'mpysu' |
| 3898 | MCK_mpyu, // 'mpyu' |
| 3899 | MCK_mpyui, // 'mpyui' |
| 3900 | MCK_mux, // 'mux' |
| 3901 | MCK_n, // 'n' |
| 3902 | MCK_neg, // 'neg' |
| 3903 | MCK_new, // 'new' |
| 3904 | MCK_nmi, // 'nmi' |
| 3905 | MCK_nomatch, // 'nomatch' |
| 3906 | MCK_nop, // 'nop' |
| 3907 | MCK_normamt, // 'normamt' |
| 3908 | MCK_not, // 'not' |
| 3909 | MCK_nt, // 'nt' |
| 3910 | MCK_or, // 'or' |
| 3911 | MCK_packhl, // 'packhl' |
| 3912 | MCK_parity, // 'parity' |
| 3913 | MCK_pause, // 'pause' |
| 3914 | MCK_pmpyw, // 'pmpyw' |
| 3915 | MCK_popcount, // 'popcount' |
| 3916 | MCK_pos, // 'pos' |
| 3917 | MCK_prefixsum, // 'prefixsum' |
| 3918 | MCK_qf16, // 'qf16' |
| 3919 | MCK_qf32, // 'qf32' |
| 3920 | MCK_raw, // 'raw' |
| 3921 | MCK_release, // 'release' |
| 3922 | MCK_resume, // 'resume' |
| 3923 | MCK_rnd, // 'rnd' |
| 3924 | MCK_rol, // 'rol' |
| 3925 | MCK_round, // 'round' |
| 3926 | MCK_rte, // 'rte' |
| 3927 | MCK_sat, // 'sat' |
| 3928 | MCK_satb, // 'satb' |
| 3929 | MCK_sath, // 'sath' |
| 3930 | MCK_satub, // 'satub' |
| 3931 | MCK_satuh, // 'satuh' |
| 3932 | MCK_scale, // 'scale' |
| 3933 | MCK_scatter_95_release, // 'scatter_release' |
| 3934 | MCK_setbit, // 'setbit' |
| 3935 | MCK_setimask, // 'setimask' |
| 3936 | MCK_setprio, // 'setprio' |
| 3937 | MCK_sf, // 'sf' |
| 3938 | MCK_sfadd, // 'sfadd' |
| 3939 | MCK_sfclass, // 'sfclass' |
| 3940 | MCK_sfcmp, // 'sfcmp' |
| 3941 | MCK_sffixupd, // 'sffixupd' |
| 3942 | MCK_sffixupn, // 'sffixupn' |
| 3943 | MCK_sffixupr, // 'sffixupr' |
| 3944 | MCK_sfinvsqrta, // 'sfinvsqrta' |
| 3945 | MCK_sfmake, // 'sfmake' |
| 3946 | MCK_sfmax, // 'sfmax' |
| 3947 | MCK_sfmin, // 'sfmin' |
| 3948 | MCK_sfmpy, // 'sfmpy' |
| 3949 | MCK_sfrecipa, // 'sfrecipa' |
| 3950 | MCK_sfsub, // 'sfsub' |
| 3951 | MCK_sgp, // 'sgp' |
| 3952 | MCK_shift, // 'shift' |
| 3953 | MCK_shuffeb, // 'shuffeb' |
| 3954 | MCK_shuffeh, // 'shuffeh' |
| 3955 | MCK_shuffob, // 'shuffob' |
| 3956 | MCK_shuffoh, // 'shuffoh' |
| 3957 | MCK_siad, // 'siad' |
| 3958 | MCK_sp1loop0, // 'sp1loop0' |
| 3959 | MCK_sp2loop0, // 'sp2loop0' |
| 3960 | MCK_sp3loop0, // 'sp3loop0' |
| 3961 | MCK_st, // 'st' |
| 3962 | MCK_start, // 'start' |
| 3963 | MCK_stop, // 'stop' |
| 3964 | MCK_sub, // 'sub' |
| 3965 | MCK_swi, // 'swi' |
| 3966 | MCK_swiz, // 'swiz' |
| 3967 | MCK_sxtb, // 'sxtb' |
| 3968 | MCK_sxth, // 'sxth' |
| 3969 | MCK_sxtw, // 'sxtw' |
| 3970 | MCK_syncht, // 'syncht' |
| 3971 | MCK_t, // 't' |
| 3972 | MCK_tableidxb, // 'tableidxb' |
| 3973 | MCK_tableidxd, // 'tableidxd' |
| 3974 | MCK_tableidxh, // 'tableidxh' |
| 3975 | MCK_tableidxw, // 'tableidxw' |
| 3976 | MCK_tlbinvasid, // 'tlbinvasid' |
| 3977 | MCK_tlblock, // 'tlblock' |
| 3978 | MCK_tlbmatch, // 'tlbmatch' |
| 3979 | MCK_tlboc, // 'tlboc' |
| 3980 | MCK_tlbp, // 'tlbp' |
| 3981 | MCK_tlbr, // 'tlbr' |
| 3982 | MCK_tlbunlock, // 'tlbunlock' |
| 3983 | MCK_tlbw, // 'tlbw' |
| 3984 | MCK_tmp, // 'tmp' |
| 3985 | MCK_togglebit, // 'togglebit' |
| 3986 | MCK_trace, // 'trace' |
| 3987 | MCK_trap0, // 'trap0' |
| 3988 | MCK_trap1, // 'trap1' |
| 3989 | MCK_tstbit, // 'tstbit' |
| 3990 | MCK_ub, // 'ub' |
| 3991 | MCK_uh, // 'uh' |
| 3992 | MCK_unpause, // 'unpause' |
| 3993 | MCK_uo, // 'uo' |
| 3994 | MCK_uw, // 'uw' |
| 3995 | MCK_v, // 'v' |
| 3996 | MCK_v10mpy, // 'v10mpy' |
| 3997 | MCK_v6mpy, // 'v6mpy' |
| 3998 | MCK_vabs, // 'vabs' |
| 3999 | MCK_vabsb, // 'vabsb' |
| 4000 | MCK_vabsdiff, // 'vabsdiff' |
| 4001 | MCK_vabsdiffb, // 'vabsdiffb' |
| 4002 | MCK_vabsdiffh, // 'vabsdiffh' |
| 4003 | MCK_vabsdiffub, // 'vabsdiffub' |
| 4004 | MCK_vabsdiffuh, // 'vabsdiffuh' |
| 4005 | MCK_vabsdiffw, // 'vabsdiffw' |
| 4006 | MCK_vabsh, // 'vabsh' |
| 4007 | MCK_vabsw, // 'vabsw' |
| 4008 | MCK_vacsh, // 'vacsh' |
| 4009 | MCK_vadd, // 'vadd' |
| 4010 | MCK_vaddb, // 'vaddb' |
| 4011 | MCK_vaddh, // 'vaddh' |
| 4012 | MCK_vaddhub, // 'vaddhub' |
| 4013 | MCK_vaddub, // 'vaddub' |
| 4014 | MCK_vadduh, // 'vadduh' |
| 4015 | MCK_vadduw, // 'vadduw' |
| 4016 | MCK_vaddw, // 'vaddw' |
| 4017 | MCK_valign, // 'valign' |
| 4018 | MCK_valignb, // 'valignb' |
| 4019 | MCK_vand, // 'vand' |
| 4020 | MCK_vasl, // 'vasl' |
| 4021 | MCK_vaslh, // 'vaslh' |
| 4022 | MCK_vaslw, // 'vaslw' |
| 4023 | MCK_vasr, // 'vasr' |
| 4024 | MCK_vasrh, // 'vasrh' |
| 4025 | MCK_vasrhub, // 'vasrhub' |
| 4026 | MCK_vasrinto, // 'vasrinto' |
| 4027 | MCK_vasrw, // 'vasrw' |
| 4028 | MCK_vavg, // 'vavg' |
| 4029 | MCK_vavgb, // 'vavgb' |
| 4030 | MCK_vavgh, // 'vavgh' |
| 4031 | MCK_vavgub, // 'vavgub' |
| 4032 | MCK_vavguh, // 'vavguh' |
| 4033 | MCK_vavguw, // 'vavguw' |
| 4034 | MCK_vavgw, // 'vavgw' |
| 4035 | MCK_vcl0, // 'vcl0' |
| 4036 | MCK_vcl0h, // 'vcl0h' |
| 4037 | MCK_vcl0w, // 'vcl0w' |
| 4038 | MCK_vclb, // 'vclb' |
| 4039 | MCK_vclip, // 'vclip' |
| 4040 | MCK_vcmp, // 'vcmp' |
| 4041 | MCK_vcmpb, // 'vcmpb' |
| 4042 | MCK_vcmph, // 'vcmph' |
| 4043 | MCK_vcmpw, // 'vcmpw' |
| 4044 | MCK_vcmpyi, // 'vcmpyi' |
| 4045 | MCK_vcmpyr, // 'vcmpyr' |
| 4046 | MCK_vcnegh, // 'vcnegh' |
| 4047 | MCK_vcombine, // 'vcombine' |
| 4048 | MCK_vconj, // 'vconj' |
| 4049 | MCK_vcrotate, // 'vcrotate' |
| 4050 | MCK_vcvt, // 'vcvt' |
| 4051 | MCK_vcvt2, // 'vcvt2' |
| 4052 | MCK_vdeal, // 'vdeal' |
| 4053 | MCK_vdealb, // 'vdealb' |
| 4054 | MCK_vdealb4w, // 'vdealb4w' |
| 4055 | MCK_vdeale, // 'vdeale' |
| 4056 | MCK_vdealh, // 'vdealh' |
| 4057 | MCK_vdelta, // 'vdelta' |
| 4058 | MCK_vdmpy, // 'vdmpy' |
| 4059 | MCK_vdmpybsu, // 'vdmpybsu' |
| 4060 | MCK_vdmpybus, // 'vdmpybus' |
| 4061 | MCK_vdmpyh, // 'vdmpyh' |
| 4062 | MCK_vdmpyhb, // 'vdmpyhb' |
| 4063 | MCK_vdmpyhsu, // 'vdmpyhsu' |
| 4064 | MCK_vdmpyw, // 'vdmpyw' |
| 4065 | MCK_vdsad, // 'vdsad' |
| 4066 | MCK_vdsaduh, // 'vdsaduh' |
| 4067 | MCK_vextract, // 'vextract' |
| 4068 | MCK_vfmax, // 'vfmax' |
| 4069 | MCK_vfmin, // 'vfmin' |
| 4070 | MCK_vfmv, // 'vfmv' |
| 4071 | MCK_vfneg, // 'vfneg' |
| 4072 | MCK_vgather, // 'vgather' |
| 4073 | MCK_vgetqfext, // 'vgetqfext' |
| 4074 | MCK_vhist, // 'vhist' |
| 4075 | MCK_vinsert, // 'vinsert' |
| 4076 | MCK_vitpack, // 'vitpack' |
| 4077 | MCK_vlalign, // 'vlalign' |
| 4078 | MCK_vlslh, // 'vlslh' |
| 4079 | MCK_vlslw, // 'vlslw' |
| 4080 | MCK_vlsr, // 'vlsr' |
| 4081 | MCK_vlsrh, // 'vlsrh' |
| 4082 | MCK_vlsrw, // 'vlsrw' |
| 4083 | MCK_vlut16, // 'vlut16' |
| 4084 | MCK_vlut32, // 'vlut32' |
| 4085 | MCK_vlut4, // 'vlut4' |
| 4086 | MCK_vmax, // 'vmax' |
| 4087 | MCK_vmaxb, // 'vmaxb' |
| 4088 | MCK_vmaxh, // 'vmaxh' |
| 4089 | MCK_vmaxub, // 'vmaxub' |
| 4090 | MCK_vmaxuh, // 'vmaxuh' |
| 4091 | MCK_vmaxuw, // 'vmaxuw' |
| 4092 | MCK_vmaxw, // 'vmaxw' |
| 4093 | MCK_vmem, // 'vmem' |
| 4094 | MCK_vmemu, // 'vmemu' |
| 4095 | MCK_vmerge, // 'vmerge' |
| 4096 | MCK_vmin, // 'vmin' |
| 4097 | MCK_vminb, // 'vminb' |
| 4098 | MCK_vminh, // 'vminh' |
| 4099 | MCK_vminub, // 'vminub' |
| 4100 | MCK_vminuh, // 'vminuh' |
| 4101 | MCK_vminuw, // 'vminuw' |
| 4102 | MCK_vminw, // 'vminw' |
| 4103 | MCK_vmpa, // 'vmpa' |
| 4104 | MCK_vmpabus, // 'vmpabus' |
| 4105 | MCK_vmpabuu, // 'vmpabuu' |
| 4106 | MCK_vmpahb, // 'vmpahb' |
| 4107 | MCK_vmpauhb, // 'vmpauhb' |
| 4108 | MCK_vmps, // 'vmps' |
| 4109 | MCK_vmpy, // 'vmpy' |
| 4110 | MCK_vmpyb, // 'vmpyb' |
| 4111 | MCK_vmpybsu, // 'vmpybsu' |
| 4112 | MCK_vmpybu, // 'vmpybu' |
| 4113 | MCK_vmpybus, // 'vmpybus' |
| 4114 | MCK_vmpye, // 'vmpye' |
| 4115 | MCK_vmpyeh, // 'vmpyeh' |
| 4116 | MCK_vmpyewuh, // 'vmpyewuh' |
| 4117 | MCK_vmpyh, // 'vmpyh' |
| 4118 | MCK_vmpyhsu, // 'vmpyhsu' |
| 4119 | MCK_vmpyhus, // 'vmpyhus' |
| 4120 | MCK_vmpyi, // 'vmpyi' |
| 4121 | MCK_vmpyie, // 'vmpyie' |
| 4122 | MCK_vmpyieo, // 'vmpyieo' |
| 4123 | MCK_vmpyiewh, // 'vmpyiewh' |
| 4124 | MCK_vmpyiewuh, // 'vmpyiewuh' |
| 4125 | MCK_vmpyih, // 'vmpyih' |
| 4126 | MCK_vmpyihb, // 'vmpyihb' |
| 4127 | MCK_vmpyio, // 'vmpyio' |
| 4128 | MCK_vmpyiowh, // 'vmpyiowh' |
| 4129 | MCK_vmpyiwb, // 'vmpyiwb' |
| 4130 | MCK_vmpyiwh, // 'vmpyiwh' |
| 4131 | MCK_vmpyiwub, // 'vmpyiwub' |
| 4132 | MCK_vmpyo, // 'vmpyo' |
| 4133 | MCK_vmpyowh, // 'vmpyowh' |
| 4134 | MCK_vmpyub, // 'vmpyub' |
| 4135 | MCK_vmpyuh, // 'vmpyuh' |
| 4136 | MCK_vmpyweh, // 'vmpyweh' |
| 4137 | MCK_vmpyweuh, // 'vmpyweuh' |
| 4138 | MCK_vmpywoh, // 'vmpywoh' |
| 4139 | MCK_vmpywouh, // 'vmpywouh' |
| 4140 | MCK_vmux, // 'vmux' |
| 4141 | MCK_vnavg, // 'vnavg' |
| 4142 | MCK_vnavgb, // 'vnavgb' |
| 4143 | MCK_vnavgh, // 'vnavgh' |
| 4144 | MCK_vnavgub, // 'vnavgub' |
| 4145 | MCK_vnavgw, // 'vnavgw' |
| 4146 | MCK_vnormamt, // 'vnormamt' |
| 4147 | MCK_vnormamth, // 'vnormamth' |
| 4148 | MCK_vnormamtw, // 'vnormamtw' |
| 4149 | MCK_vnot, // 'vnot' |
| 4150 | MCK_vor, // 'vor' |
| 4151 | MCK_vpack, // 'vpack' |
| 4152 | MCK_vpacke, // 'vpacke' |
| 4153 | MCK_vpackeb, // 'vpackeb' |
| 4154 | MCK_vpackeh, // 'vpackeh' |
| 4155 | MCK_vpackhb, // 'vpackhb' |
| 4156 | MCK_vpackhub, // 'vpackhub' |
| 4157 | MCK_vpacko, // 'vpacko' |
| 4158 | MCK_vpackob, // 'vpackob' |
| 4159 | MCK_vpackoh, // 'vpackoh' |
| 4160 | MCK_vpackwh, // 'vpackwh' |
| 4161 | MCK_vpackwuh, // 'vpackwuh' |
| 4162 | MCK_vpmpyh, // 'vpmpyh' |
| 4163 | MCK_vpopcount, // 'vpopcount' |
| 4164 | MCK_vpopcounth, // 'vpopcounth' |
| 4165 | MCK_vr16mpyz, // 'vr16mpyz' |
| 4166 | MCK_vr16mpyzs, // 'vr16mpyzs' |
| 4167 | MCK_vr8mpyz, // 'vr8mpyz' |
| 4168 | MCK_vraddh, // 'vraddh' |
| 4169 | MCK_vraddub, // 'vraddub' |
| 4170 | MCK_vradduh, // 'vradduh' |
| 4171 | MCK_vrcmpyi, // 'vrcmpyi' |
| 4172 | MCK_vrcmpyr, // 'vrcmpyr' |
| 4173 | MCK_vrcmpys, // 'vrcmpys' |
| 4174 | MCK_vrcnegh, // 'vrcnegh' |
| 4175 | MCK_vrcrotate, // 'vrcrotate' |
| 4176 | MCK_vrdelta, // 'vrdelta' |
| 4177 | MCK_vrmaxh, // 'vrmaxh' |
| 4178 | MCK_vrmaxuh, // 'vrmaxuh' |
| 4179 | MCK_vrmaxuw, // 'vrmaxuw' |
| 4180 | MCK_vrmaxw, // 'vrmaxw' |
| 4181 | MCK_vrminh, // 'vrminh' |
| 4182 | MCK_vrminuh, // 'vrminuh' |
| 4183 | MCK_vrminuw, // 'vrminuw' |
| 4184 | MCK_vrminw, // 'vrminw' |
| 4185 | MCK_vrmpy, // 'vrmpy' |
| 4186 | MCK_vrmpyb, // 'vrmpyb' |
| 4187 | MCK_vrmpybsu, // 'vrmpybsu' |
| 4188 | MCK_vrmpybu, // 'vrmpybu' |
| 4189 | MCK_vrmpybus, // 'vrmpybus' |
| 4190 | MCK_vrmpyh, // 'vrmpyh' |
| 4191 | MCK_vrmpyub, // 'vrmpyub' |
| 4192 | MCK_vrmpyweh, // 'vrmpyweh' |
| 4193 | MCK_vrmpywoh, // 'vrmpywoh' |
| 4194 | MCK_vrmpyz, // 'vrmpyz' |
| 4195 | MCK_vrndwh, // 'vrndwh' |
| 4196 | MCK_vror, // 'vror' |
| 4197 | MCK_vrotr, // 'vrotr' |
| 4198 | MCK_vround, // 'vround' |
| 4199 | MCK_vroundhb, // 'vroundhb' |
| 4200 | MCK_vroundhub, // 'vroundhub' |
| 4201 | MCK_vrounduhub, // 'vrounduhub' |
| 4202 | MCK_vrounduwuh, // 'vrounduwuh' |
| 4203 | MCK_vroundwh, // 'vroundwh' |
| 4204 | MCK_vroundwuh, // 'vroundwuh' |
| 4205 | MCK_vrsad, // 'vrsad' |
| 4206 | MCK_vrsadub, // 'vrsadub' |
| 4207 | MCK_vsat, // 'vsat' |
| 4208 | MCK_vsatdw, // 'vsatdw' |
| 4209 | MCK_vsathb, // 'vsathb' |
| 4210 | MCK_vsathub, // 'vsathub' |
| 4211 | MCK_vsatuwuh, // 'vsatuwuh' |
| 4212 | MCK_vsatwh, // 'vsatwh' |
| 4213 | MCK_vsatwuh, // 'vsatwuh' |
| 4214 | MCK_vscatter, // 'vscatter' |
| 4215 | MCK_vsetq, // 'vsetq' |
| 4216 | MCK_vsetq2, // 'vsetq2' |
| 4217 | MCK_vsetqfext, // 'vsetqfext' |
| 4218 | MCK_vshuff, // 'vshuff' |
| 4219 | MCK_vshuffb, // 'vshuffb' |
| 4220 | MCK_vshuffe, // 'vshuffe' |
| 4221 | MCK_vshuffeb, // 'vshuffeb' |
| 4222 | MCK_vshuffeh, // 'vshuffeh' |
| 4223 | MCK_vshuffh, // 'vshuffh' |
| 4224 | MCK_vshuffo, // 'vshuffo' |
| 4225 | MCK_vshuffob, // 'vshuffob' |
| 4226 | MCK_vshuffoe, // 'vshuffoe' |
| 4227 | MCK_vshuffoeb, // 'vshuffoeb' |
| 4228 | MCK_vshuffoeh, // 'vshuffoeh' |
| 4229 | MCK_vshuffoh, // 'vshuffoh' |
| 4230 | MCK_vsplat, // 'vsplat' |
| 4231 | MCK_vsplatb, // 'vsplatb' |
| 4232 | MCK_vsplath, // 'vsplath' |
| 4233 | MCK_vspliceb, // 'vspliceb' |
| 4234 | MCK_vsub, // 'vsub' |
| 4235 | MCK_vsubb, // 'vsubb' |
| 4236 | MCK_vsubh, // 'vsubh' |
| 4237 | MCK_vsubub, // 'vsubub' |
| 4238 | MCK_vsubuh, // 'vsubuh' |
| 4239 | MCK_vsubuw, // 'vsubuw' |
| 4240 | MCK_vsubw, // 'vsubw' |
| 4241 | MCK_vswap, // 'vswap' |
| 4242 | MCK_vsxt, // 'vsxt' |
| 4243 | MCK_vsxtb, // 'vsxtb' |
| 4244 | MCK_vsxtbh, // 'vsxtbh' |
| 4245 | MCK_vsxth, // 'vsxth' |
| 4246 | MCK_vsxthw, // 'vsxthw' |
| 4247 | MCK_vtmpy, // 'vtmpy' |
| 4248 | MCK_vtmpyb, // 'vtmpyb' |
| 4249 | MCK_vtmpybus, // 'vtmpybus' |
| 4250 | MCK_vtmpyhb, // 'vtmpyhb' |
| 4251 | MCK_vtrans2x2, // 'vtrans2x2' |
| 4252 | MCK_vtrunehb, // 'vtrunehb' |
| 4253 | MCK_vtrunewh, // 'vtrunewh' |
| 4254 | MCK_vtrunohb, // 'vtrunohb' |
| 4255 | MCK_vtrunowh, // 'vtrunowh' |
| 4256 | MCK_vunpack, // 'vunpack' |
| 4257 | MCK_vunpackb, // 'vunpackb' |
| 4258 | MCK_vunpackh, // 'vunpackh' |
| 4259 | MCK_vunpacko, // 'vunpacko' |
| 4260 | MCK_vunpackob, // 'vunpackob' |
| 4261 | MCK_vunpackoh, // 'vunpackoh' |
| 4262 | MCK_vunpackub, // 'vunpackub' |
| 4263 | MCK_vunpackuh, // 'vunpackuh' |
| 4264 | MCK_vwhist128, // 'vwhist128' |
| 4265 | MCK_vwhist256, // 'vwhist256' |
| 4266 | MCK_vxaddsubh, // 'vxaddsubh' |
| 4267 | MCK_vxaddsubw, // 'vxaddsubw' |
| 4268 | MCK_vxor, // 'vxor' |
| 4269 | MCK_vxsubaddh, // 'vxsubaddh' |
| 4270 | MCK_vxsubaddw, // 'vxsubaddw' |
| 4271 | MCK_vzxt, // 'vzxt' |
| 4272 | MCK_vzxtb, // 'vzxtb' |
| 4273 | MCK_vzxtbh, // 'vzxtbh' |
| 4274 | MCK_vzxth, // 'vzxth' |
| 4275 | MCK_vzxthw, // 'vzxthw' |
| 4276 | MCK_w, // 'w' |
| 4277 | MCK_wait, // 'wait' |
| 4278 | MCK_x, // 'x' |
| 4279 | MCK_xor, // 'xor' |
| 4280 | MCK_z, // 'z' |
| 4281 | MCK_zextract, // 'zextract' |
| 4282 | MCK_zxtb, // 'zxtb' |
| 4283 | MCK_zxth, // 'zxth' |
| 4284 | MCK__124_, // '|' |
| 4285 | MCK__126_, // '~' |
| 4286 | MCK_LAST_TOKEN = MCK__126_, |
| 4287 | MCK_Reg19, // derived register class |
| 4288 | MCK_Reg11, // derived register class |
| 4289 | MCK_DIAG, // register class 'DIAG' |
| 4290 | MCK_GP, // register class 'GP' |
| 4291 | MCK_P0, // register class 'P0' |
| 4292 | MCK_P1, // register class 'P1' |
| 4293 | MCK_P3, // register class 'P3' |
| 4294 | MCK_PC, // register class 'PC' |
| 4295 | MCK_SGP0, // register class 'SGP0' |
| 4296 | MCK_SGP1, // register class 'SGP1' |
| 4297 | MCK_UsrBits, // register class 'UsrBits' |
| 4298 | MCK_V65Regs, // register class 'V65Regs,VTMP' |
| 4299 | MCK_ModRegs, // register class 'ModRegs' |
| 4300 | MCK_Reg20, // derived register class |
| 4301 | MCK_Reg3, // derived register class |
| 4302 | MCK_HvxQR, // register class 'HvxQR' |
| 4303 | MCK_PredRegs, // register class 'PredRegs' |
| 4304 | MCK_Reg16, // derived register class |
| 4305 | MCK_GeneralDoubleLow8Regs, // register class 'GeneralDoubleLow8Regs' |
| 4306 | MCK_HvxVQR, // register class 'HvxVQR' |
| 4307 | MCK_IntRegsLow8, // register class 'IntRegsLow8' |
| 4308 | MCK_V62Regs, // register class 'V62Regs' |
| 4309 | MCK_CtrRegs64, // register class 'CtrRegs64' |
| 4310 | MCK_DoubleRegs, // register class 'DoubleRegs' |
| 4311 | MCK_GeneralSubRegs, // register class 'GeneralSubRegs' |
| 4312 | MCK_GuestRegs64, // register class 'GuestRegs64' |
| 4313 | MCK_VectRegRev, // register class 'VectRegRev' |
| 4314 | MCK_CtrRegs, // register class 'CtrRegs' |
| 4315 | MCK_GuestRegs, // register class 'GuestRegs' |
| 4316 | MCK_HvxWR, // register class 'HvxWR' |
| 4317 | MCK_IntRegs, // register class 'IntRegs' |
| 4318 | MCK_HvxVR, // register class 'HvxVR' |
| 4319 | MCK_SysRegs64, // register class 'SysRegs64' |
| 4320 | MCK_SysRegs, // register class 'SysRegs' |
| 4321 | MCK_LAST_REGISTER = MCK_SysRegs, |
| 4322 | MCK_Imm, // user defined class 'ImmAsmOperand' |
| 4323 | MCK_a30_2Imm, // user defined class 'a30_2ImmOperand' |
| 4324 | MCK_b13_2Imm, // user defined class 'b13_2ImmOperand' |
| 4325 | MCK_b15_2Imm, // user defined class 'b15_2ImmOperand' |
| 4326 | MCK_b30_2Imm, // user defined class 'b30_2ImmOperand' |
| 4327 | MCK_f32Imm, // user defined class 'f32ImmOperand' |
| 4328 | MCK_f64Imm, // user defined class 'f64ImmOperand' |
| 4329 | MCK_m32_0Imm, // user defined class 'm32_0ImmOperand' |
| 4330 | MCK_n1Const, // user defined class 'n1ConstOperand' |
| 4331 | MCK_s27_2Imm, // user defined class 's27_2ImmOperand' |
| 4332 | MCK_s29_3Imm, // user defined class 's29_3ImmOperand' |
| 4333 | MCK_s30_2Imm, // user defined class 's30_2ImmOperand' |
| 4334 | MCK_s31_1Imm, // user defined class 's31_1ImmOperand' |
| 4335 | MCK_s32_0Imm, // user defined class 's32_0ImmOperand' |
| 4336 | MCK_s3_0Imm, // user defined class 's3_0ImmOperand' |
| 4337 | MCK_s4_0Imm, // user defined class 's4_0ImmOperand' |
| 4338 | MCK_s4_1Imm, // user defined class 's4_1ImmOperand' |
| 4339 | MCK_s4_2Imm, // user defined class 's4_2ImmOperand' |
| 4340 | MCK_s4_3Imm, // user defined class 's4_3ImmOperand' |
| 4341 | MCK_s6_0Imm, // user defined class 's6_0ImmOperand' |
| 4342 | MCK_s6_3Imm, // user defined class 's6_3ImmOperand' |
| 4343 | MCK_s8_0Imm, // user defined class 's8_0ImmOperand' |
| 4344 | MCK_s9_0Imm, // user defined class 's9_0ImmOperand' |
| 4345 | MCK_sgp10Const, // user defined class 'sgp10ConstOperand' |
| 4346 | MCK_u10_0Imm, // user defined class 'u10_0ImmOperand' |
| 4347 | MCK_u11_3Imm, // user defined class 'u11_3ImmOperand' |
| 4348 | MCK_u16_0Imm, // user defined class 'u16_0ImmOperand' |
| 4349 | MCK_u1_0Imm, // user defined class 'u1_0ImmOperand' |
| 4350 | MCK_u26_6Imm, // user defined class 'u26_6ImmOperand' |
| 4351 | MCK_u29_3Imm, // user defined class 'u29_3ImmOperand' |
| 4352 | MCK_u2_0Imm, // user defined class 'u2_0ImmOperand' |
| 4353 | MCK_u30_2Imm, // user defined class 'u30_2ImmOperand' |
| 4354 | MCK_u31_1Imm, // user defined class 'u31_1ImmOperand' |
| 4355 | MCK_u32_0Imm, // user defined class 'u32_0ImmOperand' |
| 4356 | MCK_u3_0Imm, // user defined class 'u3_0ImmOperand' |
| 4357 | MCK_u3_1Imm, // user defined class 'u3_1ImmOperand' |
| 4358 | MCK_u4_0Imm, // user defined class 'u4_0ImmOperand' |
| 4359 | MCK_u4_2Imm, // user defined class 'u4_2ImmOperand' |
| 4360 | MCK_u5_0Imm, // user defined class 'u5_0ImmOperand' |
| 4361 | MCK_u5_2Imm, // user defined class 'u5_2ImmOperand' |
| 4362 | MCK_u5_3Imm, // user defined class 'u5_3ImmOperand' |
| 4363 | MCK_u64_0Imm, // user defined class 'u64_0ImmOperand' |
| 4364 | MCK_u6_0Imm, // user defined class 'u6_0ImmOperand' |
| 4365 | MCK_u6_1Imm, // user defined class 'u6_1ImmOperand' |
| 4366 | MCK_u6_2Imm, // user defined class 'u6_2ImmOperand' |
| 4367 | MCK_u7_0Imm, // user defined class 'u7_0ImmOperand' |
| 4368 | MCK_u8_0Imm, // user defined class 'u8_0ImmOperand' |
| 4369 | NumMatchClassKinds |
| 4370 | }; |
| 4371 | |
| 4372 | } // end anonymous namespace |
| 4373 | |
| 4374 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
| 4375 | return MCTargetAsmParser::Match_InvalidOperand; |
| 4376 | } |
| 4377 | |
| 4378 | static MatchClassKind matchTokenString(StringRef Name) { |
| 4379 | switch (Name.size()) { |
| 4380 | default: break; |
| 4381 | case 1: // 30 strings to match. |
| 4382 | switch (Name[0]) { |
| 4383 | default: break; |
| 4384 | case '!': // 1 string to match. |
| 4385 | return MCK__EXCLAIM_; // "!" |
| 4386 | case '#': // 1 string to match. |
| 4387 | return MCK__HASH_; // "#" |
| 4388 | case '&': // 1 string to match. |
| 4389 | return MCK__38_; // "&" |
| 4390 | case '(': // 1 string to match. |
| 4391 | return MCK__40_; // "(" |
| 4392 | case ')': // 1 string to match. |
| 4393 | return MCK__41_; // ")" |
| 4394 | case '*': // 1 string to match. |
| 4395 | return MCK__STAR_; // "*" |
| 4396 | case '+': // 1 string to match. |
| 4397 | return MCK__43_; // "+" |
| 4398 | case '-': // 1 string to match. |
| 4399 | return MCK__MINUS_; // "-" |
| 4400 | case '.': // 1 string to match. |
| 4401 | return MCK__DOT_; // "." |
| 4402 | case '0': // 1 string to match. |
| 4403 | return MCK_0; // "0" |
| 4404 | case '1': // 1 string to match. |
| 4405 | return MCK_1; // "1" |
| 4406 | case ':': // 1 string to match. |
| 4407 | return MCK__COLON_; // ":" |
| 4408 | case ';': // 1 string to match. |
| 4409 | return MCK__59_; // ";" |
| 4410 | case '<': // 1 string to match. |
| 4411 | return MCK__LT_; // "<" |
| 4412 | case '=': // 1 string to match. |
| 4413 | return MCK__61_; // "=" |
| 4414 | case '>': // 1 string to match. |
| 4415 | return MCK__GT_; // ">" |
| 4416 | case 'I': // 1 string to match. |
| 4417 | return MCK_I; // "I" |
| 4418 | case '^': // 1 string to match. |
| 4419 | return MCK__94_; // "^" |
| 4420 | case 'b': // 1 string to match. |
| 4421 | return MCK_b; // "b" |
| 4422 | case 'c': // 1 string to match. |
| 4423 | return MCK_c; // "c" |
| 4424 | case 'h': // 1 string to match. |
| 4425 | return MCK_h; // "h" |
| 4426 | case 'l': // 1 string to match. |
| 4427 | return MCK_l; // "l" |
| 4428 | case 'n': // 1 string to match. |
| 4429 | return MCK_n; // "n" |
| 4430 | case 't': // 1 string to match. |
| 4431 | return MCK_t; // "t" |
| 4432 | case 'v': // 1 string to match. |
| 4433 | return MCK_v; // "v" |
| 4434 | case 'w': // 1 string to match. |
| 4435 | return MCK_w; // "w" |
| 4436 | case 'x': // 1 string to match. |
| 4437 | return MCK_x; // "x" |
| 4438 | case 'z': // 1 string to match. |
| 4439 | return MCK_z; // "z" |
| 4440 | case '|': // 1 string to match. |
| 4441 | return MCK__124_; // "|" |
| 4442 | case '~': // 1 string to match. |
| 4443 | return MCK__126_; // "~" |
| 4444 | } |
| 4445 | break; |
| 4446 | case 2: // 20 strings to match. |
| 4447 | switch (Name[0]) { |
| 4448 | default: break; |
| 4449 | case '1': // 1 string to match. |
| 4450 | if (Name[1] != '6') |
| 4451 | break; |
| 4452 | return MCK_16; // "16" |
| 4453 | case 'a': // 1 string to match. |
| 4454 | if (Name[1] != 't') |
| 4455 | break; |
| 4456 | return MCK_at; // "at" |
| 4457 | case 'b': // 1 string to match. |
| 4458 | if (Name[1] != 'f') |
| 4459 | break; |
| 4460 | return MCK_bf; // "bf" |
| 4461 | case 'e': // 1 string to match. |
| 4462 | if (Name[1] != 'q') |
| 4463 | break; |
| 4464 | return MCK_eq; // "eq" |
| 4465 | case 'f': // 1 string to match. |
| 4466 | if (Name[1] != '8') |
| 4467 | break; |
| 4468 | return MCK_f8; // "f8" |
| 4469 | case 'g': // 2 strings to match. |
| 4470 | switch (Name[1]) { |
| 4471 | default: break; |
| 4472 | case 'e': // 1 string to match. |
| 4473 | return MCK_ge; // "ge" |
| 4474 | case 't': // 1 string to match. |
| 4475 | return MCK_gt; // "gt" |
| 4476 | } |
| 4477 | break; |
| 4478 | case 'h': // 2 strings to match. |
| 4479 | switch (Name[1]) { |
| 4480 | default: break; |
| 4481 | case 'f': // 1 string to match. |
| 4482 | return MCK_hf; // "hf" |
| 4483 | case 'i': // 1 string to match. |
| 4484 | return MCK_hi; // "hi" |
| 4485 | } |
| 4486 | break; |
| 4487 | case 'i': // 1 string to match. |
| 4488 | if (Name[1] != 'f') |
| 4489 | break; |
| 4490 | return MCK_if; // "if" |
| 4491 | case 'l': // 2 strings to match. |
| 4492 | switch (Name[1]) { |
| 4493 | default: break; |
| 4494 | case 'o': // 1 string to match. |
| 4495 | return MCK_lo; // "lo" |
| 4496 | case 't': // 1 string to match. |
| 4497 | return MCK_lt; // "lt" |
| 4498 | } |
| 4499 | break; |
| 4500 | case 'n': // 1 string to match. |
| 4501 | if (Name[1] != 't') |
| 4502 | break; |
| 4503 | return MCK_nt; // "nt" |
| 4504 | case 'o': // 1 string to match. |
| 4505 | if (Name[1] != 'r') |
| 4506 | break; |
| 4507 | return MCK_or; // "or" |
| 4508 | case 's': // 2 strings to match. |
| 4509 | switch (Name[1]) { |
| 4510 | default: break; |
| 4511 | case 'f': // 1 string to match. |
| 4512 | return MCK_sf; // "sf" |
| 4513 | case 't': // 1 string to match. |
| 4514 | return MCK_st; // "st" |
| 4515 | } |
| 4516 | break; |
| 4517 | case 'u': // 4 strings to match. |
| 4518 | switch (Name[1]) { |
| 4519 | default: break; |
| 4520 | case 'b': // 1 string to match. |
| 4521 | return MCK_ub; // "ub" |
| 4522 | case 'h': // 1 string to match. |
| 4523 | return MCK_uh; // "uh" |
| 4524 | case 'o': // 1 string to match. |
| 4525 | return MCK_uo; // "uo" |
| 4526 | case 'w': // 1 string to match. |
| 4527 | return MCK_uw; // "uw" |
| 4528 | } |
| 4529 | break; |
| 4530 | } |
| 4531 | break; |
| 4532 | case 3: // 41 strings to match. |
| 4533 | switch (Name[0]) { |
| 4534 | default: break; |
| 4535 | case 'a': // 5 strings to match. |
| 4536 | switch (Name[1]) { |
| 4537 | default: break; |
| 4538 | case 'b': // 1 string to match. |
| 4539 | if (Name[2] != 's') |
| 4540 | break; |
| 4541 | return MCK_abs; // "abs" |
| 4542 | case 'd': // 1 string to match. |
| 4543 | if (Name[2] != 'd') |
| 4544 | break; |
| 4545 | return MCK_add; // "add" |
| 4546 | case 'n': // 1 string to match. |
| 4547 | if (Name[2] != 'd') |
| 4548 | break; |
| 4549 | return MCK_and; // "and" |
| 4550 | case 's': // 2 strings to match. |
| 4551 | switch (Name[2]) { |
| 4552 | default: break; |
| 4553 | case 'l': // 1 string to match. |
| 4554 | return MCK_asl; // "asl" |
| 4555 | case 'r': // 1 string to match. |
| 4556 | return MCK_asr; // "asr" |
| 4557 | } |
| 4558 | break; |
| 4559 | } |
| 4560 | break; |
| 4561 | case 'b': // 1 string to match. |
| 4562 | if (memcmp(Name.data()+1, "10" , 2) != 0) |
| 4563 | break; |
| 4564 | return MCK_b10; // "b10" |
| 4565 | case 'c': // 7 strings to match. |
| 4566 | switch (Name[1]) { |
| 4567 | default: break; |
| 4568 | case 'l': // 3 strings to match. |
| 4569 | switch (Name[2]) { |
| 4570 | default: break; |
| 4571 | case '0': // 1 string to match. |
| 4572 | return MCK_cl0; // "cl0" |
| 4573 | case '1': // 1 string to match. |
| 4574 | return MCK_cl1; // "cl1" |
| 4575 | case 'b': // 1 string to match. |
| 4576 | return MCK_clb; // "clb" |
| 4577 | } |
| 4578 | break; |
| 4579 | case 'm': // 1 string to match. |
| 4580 | if (Name[2] != 'p') |
| 4581 | break; |
| 4582 | return MCK_cmp; // "cmp" |
| 4583 | case 't': // 2 strings to match. |
| 4584 | switch (Name[2]) { |
| 4585 | default: break; |
| 4586 | case '0': // 1 string to match. |
| 4587 | return MCK_ct0; // "ct0" |
| 4588 | case '1': // 1 string to match. |
| 4589 | return MCK_ct1; // "ct1" |
| 4590 | } |
| 4591 | break; |
| 4592 | case 'u': // 1 string to match. |
| 4593 | if (Name[2] != 'r') |
| 4594 | break; |
| 4595 | return MCK_cur; // "cur" |
| 4596 | } |
| 4597 | break; |
| 4598 | case 'g': // 2 strings to match. |
| 4599 | switch (Name[1]) { |
| 4600 | default: break; |
| 4601 | case 'e': // 1 string to match. |
| 4602 | if (Name[2] != 'u') |
| 4603 | break; |
| 4604 | return MCK_geu; // "geu" |
| 4605 | case 't': // 1 string to match. |
| 4606 | if (Name[2] != 'u') |
| 4607 | break; |
| 4608 | return MCK_gtu; // "gtu" |
| 4609 | } |
| 4610 | break; |
| 4611 | case 'l': // 5 strings to match. |
| 4612 | switch (Name[1]) { |
| 4613 | default: break; |
| 4614 | case 'f': // 1 string to match. |
| 4615 | if (Name[2] != 's') |
| 4616 | break; |
| 4617 | return MCK_lfs; // "lfs" |
| 4618 | case 'i': // 1 string to match. |
| 4619 | if (Name[2] != 'b') |
| 4620 | break; |
| 4621 | return MCK_lib; // "lib" |
| 4622 | case 's': // 2 strings to match. |
| 4623 | switch (Name[2]) { |
| 4624 | default: break; |
| 4625 | case 'l': // 1 string to match. |
| 4626 | return MCK_lsl; // "lsl" |
| 4627 | case 'r': // 1 string to match. |
| 4628 | return MCK_lsr; // "lsr" |
| 4629 | } |
| 4630 | break; |
| 4631 | case 't': // 1 string to match. |
| 4632 | if (Name[2] != 'u') |
| 4633 | break; |
| 4634 | return MCK_ltu; // "ltu" |
| 4635 | } |
| 4636 | break; |
| 4637 | case 'm': // 4 strings to match. |
| 4638 | switch (Name[1]) { |
| 4639 | default: break; |
| 4640 | case 'a': // 1 string to match. |
| 4641 | if (Name[2] != 'x') |
| 4642 | break; |
| 4643 | return MCK_max; // "max" |
| 4644 | case 'i': // 1 string to match. |
| 4645 | if (Name[2] != 'n') |
| 4646 | break; |
| 4647 | return MCK_min; // "min" |
| 4648 | case 'p': // 1 string to match. |
| 4649 | if (Name[2] != 'y') |
| 4650 | break; |
| 4651 | return MCK_mpy; // "mpy" |
| 4652 | case 'u': // 1 string to match. |
| 4653 | if (Name[2] != 'x') |
| 4654 | break; |
| 4655 | return MCK_mux; // "mux" |
| 4656 | } |
| 4657 | break; |
| 4658 | case 'n': // 5 strings to match. |
| 4659 | switch (Name[1]) { |
| 4660 | default: break; |
| 4661 | case 'e': // 2 strings to match. |
| 4662 | switch (Name[2]) { |
| 4663 | default: break; |
| 4664 | case 'g': // 1 string to match. |
| 4665 | return MCK_neg; // "neg" |
| 4666 | case 'w': // 1 string to match. |
| 4667 | return MCK_new; // "new" |
| 4668 | } |
| 4669 | break; |
| 4670 | case 'm': // 1 string to match. |
| 4671 | if (Name[2] != 'i') |
| 4672 | break; |
| 4673 | return MCK_nmi; // "nmi" |
| 4674 | case 'o': // 2 strings to match. |
| 4675 | switch (Name[2]) { |
| 4676 | default: break; |
| 4677 | case 'p': // 1 string to match. |
| 4678 | return MCK_nop; // "nop" |
| 4679 | case 't': // 1 string to match. |
| 4680 | return MCK_not; // "not" |
| 4681 | } |
| 4682 | break; |
| 4683 | } |
| 4684 | break; |
| 4685 | case 'p': // 1 string to match. |
| 4686 | if (memcmp(Name.data()+1, "os" , 2) != 0) |
| 4687 | break; |
| 4688 | return MCK_pos; // "pos" |
| 4689 | case 'r': // 4 strings to match. |
| 4690 | switch (Name[1]) { |
| 4691 | default: break; |
| 4692 | case 'a': // 1 string to match. |
| 4693 | if (Name[2] != 'w') |
| 4694 | break; |
| 4695 | return MCK_raw; // "raw" |
| 4696 | case 'n': // 1 string to match. |
| 4697 | if (Name[2] != 'd') |
| 4698 | break; |
| 4699 | return MCK_rnd; // "rnd" |
| 4700 | case 'o': // 1 string to match. |
| 4701 | if (Name[2] != 'l') |
| 4702 | break; |
| 4703 | return MCK_rol; // "rol" |
| 4704 | case 't': // 1 string to match. |
| 4705 | if (Name[2] != 'e') |
| 4706 | break; |
| 4707 | return MCK_rte; // "rte" |
| 4708 | } |
| 4709 | break; |
| 4710 | case 's': // 4 strings to match. |
| 4711 | switch (Name[1]) { |
| 4712 | default: break; |
| 4713 | case 'a': // 1 string to match. |
| 4714 | if (Name[2] != 't') |
| 4715 | break; |
| 4716 | return MCK_sat; // "sat" |
| 4717 | case 'g': // 1 string to match. |
| 4718 | if (Name[2] != 'p') |
| 4719 | break; |
| 4720 | return MCK_sgp; // "sgp" |
| 4721 | case 'u': // 1 string to match. |
| 4722 | if (Name[2] != 'b') |
| 4723 | break; |
| 4724 | return MCK_sub; // "sub" |
| 4725 | case 'w': // 1 string to match. |
| 4726 | if (Name[2] != 'i') |
| 4727 | break; |
| 4728 | return MCK_swi; // "swi" |
| 4729 | } |
| 4730 | break; |
| 4731 | case 't': // 1 string to match. |
| 4732 | if (memcmp(Name.data()+1, "mp" , 2) != 0) |
| 4733 | break; |
| 4734 | return MCK_tmp; // "tmp" |
| 4735 | case 'v': // 1 string to match. |
| 4736 | if (memcmp(Name.data()+1, "or" , 2) != 0) |
| 4737 | break; |
| 4738 | return MCK_vor; // "vor" |
| 4739 | case 'x': // 1 string to match. |
| 4740 | if (memcmp(Name.data()+1, "or" , 2) != 0) |
| 4741 | break; |
| 4742 | return MCK_xor; // "xor" |
| 4743 | } |
| 4744 | break; |
| 4745 | case 4: // 67 strings to match. |
| 4746 | switch (Name[0]) { |
| 4747 | default: break; |
| 4748 | case 'a': // 4 strings to match. |
| 4749 | switch (Name[1]) { |
| 4750 | default: break; |
| 4751 | case 'l': // 1 string to match. |
| 4752 | if (memcmp(Name.data()+2, "l8" , 2) != 0) |
| 4753 | break; |
| 4754 | return MCK_all8; // "all8" |
| 4755 | case 'n': // 1 string to match. |
| 4756 | if (memcmp(Name.data()+2, "y8" , 2) != 0) |
| 4757 | break; |
| 4758 | return MCK_any8; // "any8" |
| 4759 | case 's': // 2 strings to match. |
| 4760 | switch (Name[2]) { |
| 4761 | default: break; |
| 4762 | case 'l': // 1 string to match. |
| 4763 | if (Name[3] != 'h') |
| 4764 | break; |
| 4765 | return MCK_aslh; // "aslh" |
| 4766 | case 'r': // 1 string to match. |
| 4767 | if (Name[3] != 'h') |
| 4768 | break; |
| 4769 | return MCK_asrh; // "asrh" |
| 4770 | } |
| 4771 | break; |
| 4772 | } |
| 4773 | break; |
| 4774 | case 'b': // 1 string to match. |
| 4775 | if (memcmp(Name.data()+1, "rev" , 3) != 0) |
| 4776 | break; |
| 4777 | return MCK_brev; // "brev" |
| 4778 | case 'c': // 10 strings to match. |
| 4779 | switch (Name[1]) { |
| 4780 | default: break; |
| 4781 | case 'a': // 1 string to match. |
| 4782 | if (memcmp(Name.data()+2, "ll" , 2) != 0) |
| 4783 | break; |
| 4784 | return MCK_call; // "call" |
| 4785 | case 'h': // 1 string to match. |
| 4786 | if (memcmp(Name.data()+2, "op" , 2) != 0) |
| 4787 | break; |
| 4788 | return MCK_chop; // "chop" |
| 4789 | case 'i': // 2 strings to match. |
| 4790 | switch (Name[2]) { |
| 4791 | default: break; |
| 4792 | case 'a': // 1 string to match. |
| 4793 | if (Name[3] != 'd') |
| 4794 | break; |
| 4795 | return MCK_ciad; // "ciad" |
| 4796 | case 'r': // 1 string to match. |
| 4797 | if (Name[3] != 'c') |
| 4798 | break; |
| 4799 | return MCK_circ; // "circ" |
| 4800 | } |
| 4801 | break; |
| 4802 | case 'l': // 1 string to match. |
| 4803 | if (memcmp(Name.data()+2, "ip" , 2) != 0) |
| 4804 | break; |
| 4805 | return MCK_clip; // "clip" |
| 4806 | case 'm': // 3 strings to match. |
| 4807 | if (Name[2] != 'p') |
| 4808 | break; |
| 4809 | switch (Name[3]) { |
| 4810 | default: break; |
| 4811 | case 'b': // 1 string to match. |
| 4812 | return MCK_cmpb; // "cmpb" |
| 4813 | case 'h': // 1 string to match. |
| 4814 | return MCK_cmph; // "cmph" |
| 4815 | case 'y': // 1 string to match. |
| 4816 | return MCK_cmpy; // "cmpy" |
| 4817 | } |
| 4818 | break; |
| 4819 | case 'r': // 1 string to match. |
| 4820 | if (memcmp(Name.data()+2, "nd" , 2) != 0) |
| 4821 | break; |
| 4822 | return MCK_crnd; // "crnd" |
| 4823 | case 's': // 1 string to match. |
| 4824 | if (memcmp(Name.data()+2, "wi" , 2) != 0) |
| 4825 | break; |
| 4826 | return MCK_cswi; // "cswi" |
| 4827 | } |
| 4828 | break; |
| 4829 | case 'j': // 1 string to match. |
| 4830 | if (memcmp(Name.data()+1, "ump" , 3) != 0) |
| 4831 | break; |
| 4832 | return MCK_jump; // "jump" |
| 4833 | case 'm': // 9 strings to match. |
| 4834 | switch (Name[1]) { |
| 4835 | default: break; |
| 4836 | case 'a': // 2 strings to match. |
| 4837 | switch (Name[2]) { |
| 4838 | default: break; |
| 4839 | case 's': // 1 string to match. |
| 4840 | if (Name[3] != 'k') |
| 4841 | break; |
| 4842 | return MCK_mask; // "mask" |
| 4843 | case 'x': // 1 string to match. |
| 4844 | if (Name[3] != 'u') |
| 4845 | break; |
| 4846 | return MCK_maxu; // "maxu" |
| 4847 | } |
| 4848 | break; |
| 4849 | case 'e': // 4 strings to match. |
| 4850 | if (Name[2] != 'm') |
| 4851 | break; |
| 4852 | switch (Name[3]) { |
| 4853 | default: break; |
| 4854 | case 'b': // 1 string to match. |
| 4855 | return MCK_memb; // "memb" |
| 4856 | case 'd': // 1 string to match. |
| 4857 | return MCK_memd; // "memd" |
| 4858 | case 'h': // 1 string to match. |
| 4859 | return MCK_memh; // "memh" |
| 4860 | case 'w': // 1 string to match. |
| 4861 | return MCK_memw; // "memw" |
| 4862 | } |
| 4863 | break; |
| 4864 | case 'i': // 1 string to match. |
| 4865 | if (memcmp(Name.data()+2, "nu" , 2) != 0) |
| 4866 | break; |
| 4867 | return MCK_minu; // "minu" |
| 4868 | case 'p': // 2 strings to match. |
| 4869 | if (Name[2] != 'y') |
| 4870 | break; |
| 4871 | switch (Name[3]) { |
| 4872 | default: break; |
| 4873 | case 'i': // 1 string to match. |
| 4874 | return MCK_mpyi; // "mpyi" |
| 4875 | case 'u': // 1 string to match. |
| 4876 | return MCK_mpyu; // "mpyu" |
| 4877 | } |
| 4878 | break; |
| 4879 | } |
| 4880 | break; |
| 4881 | case 'q': // 2 strings to match. |
| 4882 | if (Name[1] != 'f') |
| 4883 | break; |
| 4884 | switch (Name[2]) { |
| 4885 | default: break; |
| 4886 | case '1': // 1 string to match. |
| 4887 | if (Name[3] != '6') |
| 4888 | break; |
| 4889 | return MCK_qf16; // "qf16" |
| 4890 | case '3': // 1 string to match. |
| 4891 | if (Name[3] != '2') |
| 4892 | break; |
| 4893 | return MCK_qf32; // "qf32" |
| 4894 | } |
| 4895 | break; |
| 4896 | case 's': // 8 strings to match. |
| 4897 | switch (Name[1]) { |
| 4898 | default: break; |
| 4899 | case 'a': // 2 strings to match. |
| 4900 | if (Name[2] != 't') |
| 4901 | break; |
| 4902 | switch (Name[3]) { |
| 4903 | default: break; |
| 4904 | case 'b': // 1 string to match. |
| 4905 | return MCK_satb; // "satb" |
| 4906 | case 'h': // 1 string to match. |
| 4907 | return MCK_sath; // "sath" |
| 4908 | } |
| 4909 | break; |
| 4910 | case 'i': // 1 string to match. |
| 4911 | if (memcmp(Name.data()+2, "ad" , 2) != 0) |
| 4912 | break; |
| 4913 | return MCK_siad; // "siad" |
| 4914 | case 't': // 1 string to match. |
| 4915 | if (memcmp(Name.data()+2, "op" , 2) != 0) |
| 4916 | break; |
| 4917 | return MCK_stop; // "stop" |
| 4918 | case 'w': // 1 string to match. |
| 4919 | if (memcmp(Name.data()+2, "iz" , 2) != 0) |
| 4920 | break; |
| 4921 | return MCK_swiz; // "swiz" |
| 4922 | case 'x': // 3 strings to match. |
| 4923 | if (Name[2] != 't') |
| 4924 | break; |
| 4925 | switch (Name[3]) { |
| 4926 | default: break; |
| 4927 | case 'b': // 1 string to match. |
| 4928 | return MCK_sxtb; // "sxtb" |
| 4929 | case 'h': // 1 string to match. |
| 4930 | return MCK_sxth; // "sxth" |
| 4931 | case 'w': // 1 string to match. |
| 4932 | return MCK_sxtw; // "sxtw" |
| 4933 | } |
| 4934 | break; |
| 4935 | } |
| 4936 | break; |
| 4937 | case 't': // 3 strings to match. |
| 4938 | if (memcmp(Name.data()+1, "lb" , 2) != 0) |
| 4939 | break; |
| 4940 | switch (Name[3]) { |
| 4941 | default: break; |
| 4942 | case 'p': // 1 string to match. |
| 4943 | return MCK_tlbp; // "tlbp" |
| 4944 | case 'r': // 1 string to match. |
| 4945 | return MCK_tlbr; // "tlbr" |
| 4946 | case 'w': // 1 string to match. |
| 4947 | return MCK_tlbw; // "tlbw" |
| 4948 | } |
| 4949 | break; |
| 4950 | case 'v': // 26 strings to match. |
| 4951 | switch (Name[1]) { |
| 4952 | default: break; |
| 4953 | case 'a': // 6 strings to match. |
| 4954 | switch (Name[2]) { |
| 4955 | default: break; |
| 4956 | case 'b': // 1 string to match. |
| 4957 | if (Name[3] != 's') |
| 4958 | break; |
| 4959 | return MCK_vabs; // "vabs" |
| 4960 | case 'd': // 1 string to match. |
| 4961 | if (Name[3] != 'd') |
| 4962 | break; |
| 4963 | return MCK_vadd; // "vadd" |
| 4964 | case 'n': // 1 string to match. |
| 4965 | if (Name[3] != 'd') |
| 4966 | break; |
| 4967 | return MCK_vand; // "vand" |
| 4968 | case 's': // 2 strings to match. |
| 4969 | switch (Name[3]) { |
| 4970 | default: break; |
| 4971 | case 'l': // 1 string to match. |
| 4972 | return MCK_vasl; // "vasl" |
| 4973 | case 'r': // 1 string to match. |
| 4974 | return MCK_vasr; // "vasr" |
| 4975 | } |
| 4976 | break; |
| 4977 | case 'v': // 1 string to match. |
| 4978 | if (Name[3] != 'g') |
| 4979 | break; |
| 4980 | return MCK_vavg; // "vavg" |
| 4981 | } |
| 4982 | break; |
| 4983 | case 'c': // 4 strings to match. |
| 4984 | switch (Name[2]) { |
| 4985 | default: break; |
| 4986 | case 'l': // 2 strings to match. |
| 4987 | switch (Name[3]) { |
| 4988 | default: break; |
| 4989 | case '0': // 1 string to match. |
| 4990 | return MCK_vcl0; // "vcl0" |
| 4991 | case 'b': // 1 string to match. |
| 4992 | return MCK_vclb; // "vclb" |
| 4993 | } |
| 4994 | break; |
| 4995 | case 'm': // 1 string to match. |
| 4996 | if (Name[3] != 'p') |
| 4997 | break; |
| 4998 | return MCK_vcmp; // "vcmp" |
| 4999 | case 'v': // 1 string to match. |
| 5000 | if (Name[3] != 't') |
| 5001 | break; |
| 5002 | return MCK_vcvt; // "vcvt" |
| 5003 | } |
| 5004 | break; |
| 5005 | case 'f': // 1 string to match. |
| 5006 | if (memcmp(Name.data()+2, "mv" , 2) != 0) |
| 5007 | break; |
| 5008 | return MCK_vfmv; // "vfmv" |
| 5009 | case 'l': // 1 string to match. |
| 5010 | if (memcmp(Name.data()+2, "sr" , 2) != 0) |
| 5011 | break; |
| 5012 | return MCK_vlsr; // "vlsr" |
| 5013 | case 'm': // 7 strings to match. |
| 5014 | switch (Name[2]) { |
| 5015 | default: break; |
| 5016 | case 'a': // 1 string to match. |
| 5017 | if (Name[3] != 'x') |
| 5018 | break; |
| 5019 | return MCK_vmax; // "vmax" |
| 5020 | case 'e': // 1 string to match. |
| 5021 | if (Name[3] != 'm') |
| 5022 | break; |
| 5023 | return MCK_vmem; // "vmem" |
| 5024 | case 'i': // 1 string to match. |
| 5025 | if (Name[3] != 'n') |
| 5026 | break; |
| 5027 | return MCK_vmin; // "vmin" |
| 5028 | case 'p': // 3 strings to match. |
| 5029 | switch (Name[3]) { |
| 5030 | default: break; |
| 5031 | case 'a': // 1 string to match. |
| 5032 | return MCK_vmpa; // "vmpa" |
| 5033 | case 's': // 1 string to match. |
| 5034 | return MCK_vmps; // "vmps" |
| 5035 | case 'y': // 1 string to match. |
| 5036 | return MCK_vmpy; // "vmpy" |
| 5037 | } |
| 5038 | break; |
| 5039 | case 'u': // 1 string to match. |
| 5040 | if (Name[3] != 'x') |
| 5041 | break; |
| 5042 | return MCK_vmux; // "vmux" |
| 5043 | } |
| 5044 | break; |
| 5045 | case 'n': // 1 string to match. |
| 5046 | if (memcmp(Name.data()+2, "ot" , 2) != 0) |
| 5047 | break; |
| 5048 | return MCK_vnot; // "vnot" |
| 5049 | case 'r': // 1 string to match. |
| 5050 | if (memcmp(Name.data()+2, "or" , 2) != 0) |
| 5051 | break; |
| 5052 | return MCK_vror; // "vror" |
| 5053 | case 's': // 3 strings to match. |
| 5054 | switch (Name[2]) { |
| 5055 | default: break; |
| 5056 | case 'a': // 1 string to match. |
| 5057 | if (Name[3] != 't') |
| 5058 | break; |
| 5059 | return MCK_vsat; // "vsat" |
| 5060 | case 'u': // 1 string to match. |
| 5061 | if (Name[3] != 'b') |
| 5062 | break; |
| 5063 | return MCK_vsub; // "vsub" |
| 5064 | case 'x': // 1 string to match. |
| 5065 | if (Name[3] != 't') |
| 5066 | break; |
| 5067 | return MCK_vsxt; // "vsxt" |
| 5068 | } |
| 5069 | break; |
| 5070 | case 'x': // 1 string to match. |
| 5071 | if (memcmp(Name.data()+2, "or" , 2) != 0) |
| 5072 | break; |
| 5073 | return MCK_vxor; // "vxor" |
| 5074 | case 'z': // 1 string to match. |
| 5075 | if (memcmp(Name.data()+2, "xt" , 2) != 0) |
| 5076 | break; |
| 5077 | return MCK_vzxt; // "vzxt" |
| 5078 | } |
| 5079 | break; |
| 5080 | case 'w': // 1 string to match. |
| 5081 | if (memcmp(Name.data()+1, "ait" , 3) != 0) |
| 5082 | break; |
| 5083 | return MCK_wait; // "wait" |
| 5084 | case 'z': // 2 strings to match. |
| 5085 | if (memcmp(Name.data()+1, "xt" , 2) != 0) |
| 5086 | break; |
| 5087 | switch (Name[3]) { |
| 5088 | default: break; |
| 5089 | case 'b': // 1 string to match. |
| 5090 | return MCK_zxtb; // "zxtb" |
| 5091 | case 'h': // 1 string to match. |
| 5092 | return MCK_zxth; // "zxth" |
| 5093 | } |
| 5094 | break; |
| 5095 | } |
| 5096 | break; |
| 5097 | case 5: // 102 strings to match. |
| 5098 | switch (Name[0]) { |
| 5099 | default: break; |
| 5100 | case 'b': // 1 string to match. |
| 5101 | if (memcmp(Name.data()+1, "rkpt" , 4) != 0) |
| 5102 | break; |
| 5103 | return MCK_brkpt; // "brkpt" |
| 5104 | case 'c': // 5 strings to match. |
| 5105 | switch (Name[1]) { |
| 5106 | default: break; |
| 5107 | case 'a': // 2 strings to match. |
| 5108 | switch (Name[2]) { |
| 5109 | default: break; |
| 5110 | case 'l': // 1 string to match. |
| 5111 | if (memcmp(Name.data()+3, "lr" , 2) != 0) |
| 5112 | break; |
| 5113 | return MCK_callr; // "callr" |
| 5114 | case 'r': // 1 string to match. |
| 5115 | if (memcmp(Name.data()+3, "ry" , 2) != 0) |
| 5116 | break; |
| 5117 | return MCK_carry; // "carry" |
| 5118 | } |
| 5119 | break; |
| 5120 | case 'm': // 2 strings to match. |
| 5121 | if (memcmp(Name.data()+2, "py" , 2) != 0) |
| 5122 | break; |
| 5123 | switch (Name[4]) { |
| 5124 | default: break; |
| 5125 | case 'i': // 1 string to match. |
| 5126 | return MCK_cmpyi; // "cmpyi" |
| 5127 | case 'r': // 1 string to match. |
| 5128 | return MCK_cmpyr; // "cmpyr" |
| 5129 | } |
| 5130 | break; |
| 5131 | case 't': // 1 string to match. |
| 5132 | if (memcmp(Name.data()+2, "lbw" , 3) != 0) |
| 5133 | break; |
| 5134 | return MCK_ctlbw; // "ctlbw" |
| 5135 | } |
| 5136 | break; |
| 5137 | case 'd': // 7 strings to match. |
| 5138 | switch (Name[1]) { |
| 5139 | default: break; |
| 5140 | case 'f': // 5 strings to match. |
| 5141 | switch (Name[2]) { |
| 5142 | default: break; |
| 5143 | case 'a': // 1 string to match. |
| 5144 | if (memcmp(Name.data()+3, "dd" , 2) != 0) |
| 5145 | break; |
| 5146 | return MCK_dfadd; // "dfadd" |
| 5147 | case 'c': // 1 string to match. |
| 5148 | if (memcmp(Name.data()+3, "mp" , 2) != 0) |
| 5149 | break; |
| 5150 | return MCK_dfcmp; // "dfcmp" |
| 5151 | case 'm': // 2 strings to match. |
| 5152 | switch (Name[3]) { |
| 5153 | default: break; |
| 5154 | case 'a': // 1 string to match. |
| 5155 | if (Name[4] != 'x') |
| 5156 | break; |
| 5157 | return MCK_dfmax; // "dfmax" |
| 5158 | case 'i': // 1 string to match. |
| 5159 | if (Name[4] != 'n') |
| 5160 | break; |
| 5161 | return MCK_dfmin; // "dfmin" |
| 5162 | } |
| 5163 | break; |
| 5164 | case 's': // 1 string to match. |
| 5165 | if (memcmp(Name.data()+3, "ub" , 2) != 0) |
| 5166 | break; |
| 5167 | return MCK_dfsub; // "dfsub" |
| 5168 | } |
| 5169 | break; |
| 5170 | case 'i': // 2 strings to match. |
| 5171 | if (memcmp(Name.data()+2, "ag" , 2) != 0) |
| 5172 | break; |
| 5173 | switch (Name[4]) { |
| 5174 | default: break; |
| 5175 | case '0': // 1 string to match. |
| 5176 | return MCK_diag0; // "diag0" |
| 5177 | case '1': // 1 string to match. |
| 5178 | return MCK_diag1; // "diag1" |
| 5179 | } |
| 5180 | break; |
| 5181 | } |
| 5182 | break; |
| 5183 | case 'i': // 1 string to match. |
| 5184 | if (memcmp(Name.data()+1, "sync" , 4) != 0) |
| 5185 | break; |
| 5186 | return MCK_isync; // "isync" |
| 5187 | case 'j': // 1 string to match. |
| 5188 | if (memcmp(Name.data()+1, "umpr" , 4) != 0) |
| 5189 | break; |
| 5190 | return MCK_jumpr; // "jumpr" |
| 5191 | case 'l': // 2 strings to match. |
| 5192 | if (memcmp(Name.data()+1, "oop" , 3) != 0) |
| 5193 | break; |
| 5194 | switch (Name[4]) { |
| 5195 | default: break; |
| 5196 | case '0': // 1 string to match. |
| 5197 | return MCK_loop0; // "loop0" |
| 5198 | case '1': // 1 string to match. |
| 5199 | return MCK_loop1; // "loop1" |
| 5200 | } |
| 5201 | break; |
| 5202 | case 'm': // 5 strings to match. |
| 5203 | switch (Name[1]) { |
| 5204 | default: break; |
| 5205 | case 'e': // 3 strings to match. |
| 5206 | if (Name[2] != 'm') |
| 5207 | break; |
| 5208 | switch (Name[3]) { |
| 5209 | default: break; |
| 5210 | case 'b': // 1 string to match. |
| 5211 | if (Name[4] != 'h') |
| 5212 | break; |
| 5213 | return MCK_membh; // "membh" |
| 5214 | case 'u': // 2 strings to match. |
| 5215 | switch (Name[4]) { |
| 5216 | default: break; |
| 5217 | case 'b': // 1 string to match. |
| 5218 | return MCK_memub; // "memub" |
| 5219 | case 'h': // 1 string to match. |
| 5220 | return MCK_memuh; // "memuh" |
| 5221 | } |
| 5222 | break; |
| 5223 | } |
| 5224 | break; |
| 5225 | case 'p': // 2 strings to match. |
| 5226 | if (Name[2] != 'y') |
| 5227 | break; |
| 5228 | switch (Name[3]) { |
| 5229 | default: break; |
| 5230 | case 's': // 1 string to match. |
| 5231 | if (Name[4] != 'u') |
| 5232 | break; |
| 5233 | return MCK_mpysu; // "mpysu" |
| 5234 | case 'u': // 1 string to match. |
| 5235 | if (Name[4] != 'i') |
| 5236 | break; |
| 5237 | return MCK_mpyui; // "mpyui" |
| 5238 | } |
| 5239 | break; |
| 5240 | } |
| 5241 | break; |
| 5242 | case 'p': // 2 strings to match. |
| 5243 | switch (Name[1]) { |
| 5244 | default: break; |
| 5245 | case 'a': // 1 string to match. |
| 5246 | if (memcmp(Name.data()+2, "use" , 3) != 0) |
| 5247 | break; |
| 5248 | return MCK_pause; // "pause" |
| 5249 | case 'm': // 1 string to match. |
| 5250 | if (memcmp(Name.data()+2, "pyw" , 3) != 0) |
| 5251 | break; |
| 5252 | return MCK_pmpyw; // "pmpyw" |
| 5253 | } |
| 5254 | break; |
| 5255 | case 'r': // 1 string to match. |
| 5256 | if (memcmp(Name.data()+1, "ound" , 4) != 0) |
| 5257 | break; |
| 5258 | return MCK_round; // "round" |
| 5259 | case 's': // 11 strings to match. |
| 5260 | switch (Name[1]) { |
| 5261 | default: break; |
| 5262 | case 'a': // 2 strings to match. |
| 5263 | if (memcmp(Name.data()+2, "tu" , 2) != 0) |
| 5264 | break; |
| 5265 | switch (Name[4]) { |
| 5266 | default: break; |
| 5267 | case 'b': // 1 string to match. |
| 5268 | return MCK_satub; // "satub" |
| 5269 | case 'h': // 1 string to match. |
| 5270 | return MCK_satuh; // "satuh" |
| 5271 | } |
| 5272 | break; |
| 5273 | case 'c': // 1 string to match. |
| 5274 | if (memcmp(Name.data()+2, "ale" , 3) != 0) |
| 5275 | break; |
| 5276 | return MCK_scale; // "scale" |
| 5277 | case 'f': // 6 strings to match. |
| 5278 | switch (Name[2]) { |
| 5279 | default: break; |
| 5280 | case 'a': // 1 string to match. |
| 5281 | if (memcmp(Name.data()+3, "dd" , 2) != 0) |
| 5282 | break; |
| 5283 | return MCK_sfadd; // "sfadd" |
| 5284 | case 'c': // 1 string to match. |
| 5285 | if (memcmp(Name.data()+3, "mp" , 2) != 0) |
| 5286 | break; |
| 5287 | return MCK_sfcmp; // "sfcmp" |
| 5288 | case 'm': // 3 strings to match. |
| 5289 | switch (Name[3]) { |
| 5290 | default: break; |
| 5291 | case 'a': // 1 string to match. |
| 5292 | if (Name[4] != 'x') |
| 5293 | break; |
| 5294 | return MCK_sfmax; // "sfmax" |
| 5295 | case 'i': // 1 string to match. |
| 5296 | if (Name[4] != 'n') |
| 5297 | break; |
| 5298 | return MCK_sfmin; // "sfmin" |
| 5299 | case 'p': // 1 string to match. |
| 5300 | if (Name[4] != 'y') |
| 5301 | break; |
| 5302 | return MCK_sfmpy; // "sfmpy" |
| 5303 | } |
| 5304 | break; |
| 5305 | case 's': // 1 string to match. |
| 5306 | if (memcmp(Name.data()+3, "ub" , 2) != 0) |
| 5307 | break; |
| 5308 | return MCK_sfsub; // "sfsub" |
| 5309 | } |
| 5310 | break; |
| 5311 | case 'h': // 1 string to match. |
| 5312 | if (memcmp(Name.data()+2, "ift" , 3) != 0) |
| 5313 | break; |
| 5314 | return MCK_shift; // "shift" |
| 5315 | case 't': // 1 string to match. |
| 5316 | if (memcmp(Name.data()+2, "art" , 3) != 0) |
| 5317 | break; |
| 5318 | return MCK_start; // "start" |
| 5319 | } |
| 5320 | break; |
| 5321 | case 't': // 4 strings to match. |
| 5322 | switch (Name[1]) { |
| 5323 | default: break; |
| 5324 | case 'l': // 1 string to match. |
| 5325 | if (memcmp(Name.data()+2, "boc" , 3) != 0) |
| 5326 | break; |
| 5327 | return MCK_tlboc; // "tlboc" |
| 5328 | case 'r': // 3 strings to match. |
| 5329 | if (Name[2] != 'a') |
| 5330 | break; |
| 5331 | switch (Name[3]) { |
| 5332 | default: break; |
| 5333 | case 'c': // 1 string to match. |
| 5334 | if (Name[4] != 'e') |
| 5335 | break; |
| 5336 | return MCK_trace; // "trace" |
| 5337 | case 'p': // 2 strings to match. |
| 5338 | switch (Name[4]) { |
| 5339 | default: break; |
| 5340 | case '0': // 1 string to match. |
| 5341 | return MCK_trap0; // "trap0" |
| 5342 | case '1': // 1 string to match. |
| 5343 | return MCK_trap1; // "trap1" |
| 5344 | } |
| 5345 | break; |
| 5346 | } |
| 5347 | break; |
| 5348 | } |
| 5349 | break; |
| 5350 | case 'v': // 62 strings to match. |
| 5351 | switch (Name[1]) { |
| 5352 | default: break; |
| 5353 | case '6': // 1 string to match. |
| 5354 | if (memcmp(Name.data()+2, "mpy" , 3) != 0) |
| 5355 | break; |
| 5356 | return MCK_v6mpy; // "v6mpy" |
| 5357 | case 'a': // 14 strings to match. |
| 5358 | switch (Name[2]) { |
| 5359 | default: break; |
| 5360 | case 'b': // 3 strings to match. |
| 5361 | if (Name[3] != 's') |
| 5362 | break; |
| 5363 | switch (Name[4]) { |
| 5364 | default: break; |
| 5365 | case 'b': // 1 string to match. |
| 5366 | return MCK_vabsb; // "vabsb" |
| 5367 | case 'h': // 1 string to match. |
| 5368 | return MCK_vabsh; // "vabsh" |
| 5369 | case 'w': // 1 string to match. |
| 5370 | return MCK_vabsw; // "vabsw" |
| 5371 | } |
| 5372 | break; |
| 5373 | case 'c': // 1 string to match. |
| 5374 | if (memcmp(Name.data()+3, "sh" , 2) != 0) |
| 5375 | break; |
| 5376 | return MCK_vacsh; // "vacsh" |
| 5377 | case 'd': // 3 strings to match. |
| 5378 | if (Name[3] != 'd') |
| 5379 | break; |
| 5380 | switch (Name[4]) { |
| 5381 | default: break; |
| 5382 | case 'b': // 1 string to match. |
| 5383 | return MCK_vaddb; // "vaddb" |
| 5384 | case 'h': // 1 string to match. |
| 5385 | return MCK_vaddh; // "vaddh" |
| 5386 | case 'w': // 1 string to match. |
| 5387 | return MCK_vaddw; // "vaddw" |
| 5388 | } |
| 5389 | break; |
| 5390 | case 's': // 4 strings to match. |
| 5391 | switch (Name[3]) { |
| 5392 | default: break; |
| 5393 | case 'l': // 2 strings to match. |
| 5394 | switch (Name[4]) { |
| 5395 | default: break; |
| 5396 | case 'h': // 1 string to match. |
| 5397 | return MCK_vaslh; // "vaslh" |
| 5398 | case 'w': // 1 string to match. |
| 5399 | return MCK_vaslw; // "vaslw" |
| 5400 | } |
| 5401 | break; |
| 5402 | case 'r': // 2 strings to match. |
| 5403 | switch (Name[4]) { |
| 5404 | default: break; |
| 5405 | case 'h': // 1 string to match. |
| 5406 | return MCK_vasrh; // "vasrh" |
| 5407 | case 'w': // 1 string to match. |
| 5408 | return MCK_vasrw; // "vasrw" |
| 5409 | } |
| 5410 | break; |
| 5411 | } |
| 5412 | break; |
| 5413 | case 'v': // 3 strings to match. |
| 5414 | if (Name[3] != 'g') |
| 5415 | break; |
| 5416 | switch (Name[4]) { |
| 5417 | default: break; |
| 5418 | case 'b': // 1 string to match. |
| 5419 | return MCK_vavgb; // "vavgb" |
| 5420 | case 'h': // 1 string to match. |
| 5421 | return MCK_vavgh; // "vavgh" |
| 5422 | case 'w': // 1 string to match. |
| 5423 | return MCK_vavgw; // "vavgw" |
| 5424 | } |
| 5425 | break; |
| 5426 | } |
| 5427 | break; |
| 5428 | case 'c': // 8 strings to match. |
| 5429 | switch (Name[2]) { |
| 5430 | default: break; |
| 5431 | case 'l': // 3 strings to match. |
| 5432 | switch (Name[3]) { |
| 5433 | default: break; |
| 5434 | case '0': // 2 strings to match. |
| 5435 | switch (Name[4]) { |
| 5436 | default: break; |
| 5437 | case 'h': // 1 string to match. |
| 5438 | return MCK_vcl0h; // "vcl0h" |
| 5439 | case 'w': // 1 string to match. |
| 5440 | return MCK_vcl0w; // "vcl0w" |
| 5441 | } |
| 5442 | break; |
| 5443 | case 'i': // 1 string to match. |
| 5444 | if (Name[4] != 'p') |
| 5445 | break; |
| 5446 | return MCK_vclip; // "vclip" |
| 5447 | } |
| 5448 | break; |
| 5449 | case 'm': // 3 strings to match. |
| 5450 | if (Name[3] != 'p') |
| 5451 | break; |
| 5452 | switch (Name[4]) { |
| 5453 | default: break; |
| 5454 | case 'b': // 1 string to match. |
| 5455 | return MCK_vcmpb; // "vcmpb" |
| 5456 | case 'h': // 1 string to match. |
| 5457 | return MCK_vcmph; // "vcmph" |
| 5458 | case 'w': // 1 string to match. |
| 5459 | return MCK_vcmpw; // "vcmpw" |
| 5460 | } |
| 5461 | break; |
| 5462 | case 'o': // 1 string to match. |
| 5463 | if (memcmp(Name.data()+3, "nj" , 2) != 0) |
| 5464 | break; |
| 5465 | return MCK_vconj; // "vconj" |
| 5466 | case 'v': // 1 string to match. |
| 5467 | if (memcmp(Name.data()+3, "t2" , 2) != 0) |
| 5468 | break; |
| 5469 | return MCK_vcvt2; // "vcvt2" |
| 5470 | } |
| 5471 | break; |
| 5472 | case 'd': // 3 strings to match. |
| 5473 | switch (Name[2]) { |
| 5474 | default: break; |
| 5475 | case 'e': // 1 string to match. |
| 5476 | if (memcmp(Name.data()+3, "al" , 2) != 0) |
| 5477 | break; |
| 5478 | return MCK_vdeal; // "vdeal" |
| 5479 | case 'm': // 1 string to match. |
| 5480 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 5481 | break; |
| 5482 | return MCK_vdmpy; // "vdmpy" |
| 5483 | case 's': // 1 string to match. |
| 5484 | if (memcmp(Name.data()+3, "ad" , 2) != 0) |
| 5485 | break; |
| 5486 | return MCK_vdsad; // "vdsad" |
| 5487 | } |
| 5488 | break; |
| 5489 | case 'f': // 3 strings to match. |
| 5490 | switch (Name[2]) { |
| 5491 | default: break; |
| 5492 | case 'm': // 2 strings to match. |
| 5493 | switch (Name[3]) { |
| 5494 | default: break; |
| 5495 | case 'a': // 1 string to match. |
| 5496 | if (Name[4] != 'x') |
| 5497 | break; |
| 5498 | return MCK_vfmax; // "vfmax" |
| 5499 | case 'i': // 1 string to match. |
| 5500 | if (Name[4] != 'n') |
| 5501 | break; |
| 5502 | return MCK_vfmin; // "vfmin" |
| 5503 | } |
| 5504 | break; |
| 5505 | case 'n': // 1 string to match. |
| 5506 | if (memcmp(Name.data()+3, "eg" , 2) != 0) |
| 5507 | break; |
| 5508 | return MCK_vfneg; // "vfneg" |
| 5509 | } |
| 5510 | break; |
| 5511 | case 'h': // 1 string to match. |
| 5512 | if (memcmp(Name.data()+2, "ist" , 3) != 0) |
| 5513 | break; |
| 5514 | return MCK_vhist; // "vhist" |
| 5515 | case 'l': // 5 strings to match. |
| 5516 | switch (Name[2]) { |
| 5517 | default: break; |
| 5518 | case 's': // 4 strings to match. |
| 5519 | switch (Name[3]) { |
| 5520 | default: break; |
| 5521 | case 'l': // 2 strings to match. |
| 5522 | switch (Name[4]) { |
| 5523 | default: break; |
| 5524 | case 'h': // 1 string to match. |
| 5525 | return MCK_vlslh; // "vlslh" |
| 5526 | case 'w': // 1 string to match. |
| 5527 | return MCK_vlslw; // "vlslw" |
| 5528 | } |
| 5529 | break; |
| 5530 | case 'r': // 2 strings to match. |
| 5531 | switch (Name[4]) { |
| 5532 | default: break; |
| 5533 | case 'h': // 1 string to match. |
| 5534 | return MCK_vlsrh; // "vlsrh" |
| 5535 | case 'w': // 1 string to match. |
| 5536 | return MCK_vlsrw; // "vlsrw" |
| 5537 | } |
| 5538 | break; |
| 5539 | } |
| 5540 | break; |
| 5541 | case 'u': // 1 string to match. |
| 5542 | if (memcmp(Name.data()+3, "t4" , 2) != 0) |
| 5543 | break; |
| 5544 | return MCK_vlut4; // "vlut4" |
| 5545 | } |
| 5546 | break; |
| 5547 | case 'm': // 12 strings to match. |
| 5548 | switch (Name[2]) { |
| 5549 | default: break; |
| 5550 | case 'a': // 3 strings to match. |
| 5551 | if (Name[3] != 'x') |
| 5552 | break; |
| 5553 | switch (Name[4]) { |
| 5554 | default: break; |
| 5555 | case 'b': // 1 string to match. |
| 5556 | return MCK_vmaxb; // "vmaxb" |
| 5557 | case 'h': // 1 string to match. |
| 5558 | return MCK_vmaxh; // "vmaxh" |
| 5559 | case 'w': // 1 string to match. |
| 5560 | return MCK_vmaxw; // "vmaxw" |
| 5561 | } |
| 5562 | break; |
| 5563 | case 'e': // 1 string to match. |
| 5564 | if (memcmp(Name.data()+3, "mu" , 2) != 0) |
| 5565 | break; |
| 5566 | return MCK_vmemu; // "vmemu" |
| 5567 | case 'i': // 3 strings to match. |
| 5568 | if (Name[3] != 'n') |
| 5569 | break; |
| 5570 | switch (Name[4]) { |
| 5571 | default: break; |
| 5572 | case 'b': // 1 string to match. |
| 5573 | return MCK_vminb; // "vminb" |
| 5574 | case 'h': // 1 string to match. |
| 5575 | return MCK_vminh; // "vminh" |
| 5576 | case 'w': // 1 string to match. |
| 5577 | return MCK_vminw; // "vminw" |
| 5578 | } |
| 5579 | break; |
| 5580 | case 'p': // 5 strings to match. |
| 5581 | if (Name[3] != 'y') |
| 5582 | break; |
| 5583 | switch (Name[4]) { |
| 5584 | default: break; |
| 5585 | case 'b': // 1 string to match. |
| 5586 | return MCK_vmpyb; // "vmpyb" |
| 5587 | case 'e': // 1 string to match. |
| 5588 | return MCK_vmpye; // "vmpye" |
| 5589 | case 'h': // 1 string to match. |
| 5590 | return MCK_vmpyh; // "vmpyh" |
| 5591 | case 'i': // 1 string to match. |
| 5592 | return MCK_vmpyi; // "vmpyi" |
| 5593 | case 'o': // 1 string to match. |
| 5594 | return MCK_vmpyo; // "vmpyo" |
| 5595 | } |
| 5596 | break; |
| 5597 | } |
| 5598 | break; |
| 5599 | case 'n': // 1 string to match. |
| 5600 | if (memcmp(Name.data()+2, "avg" , 3) != 0) |
| 5601 | break; |
| 5602 | return MCK_vnavg; // "vnavg" |
| 5603 | case 'p': // 1 string to match. |
| 5604 | if (memcmp(Name.data()+2, "ack" , 3) != 0) |
| 5605 | break; |
| 5606 | return MCK_vpack; // "vpack" |
| 5607 | case 'r': // 3 strings to match. |
| 5608 | switch (Name[2]) { |
| 5609 | default: break; |
| 5610 | case 'm': // 1 string to match. |
| 5611 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 5612 | break; |
| 5613 | return MCK_vrmpy; // "vrmpy" |
| 5614 | case 'o': // 1 string to match. |
| 5615 | if (memcmp(Name.data()+3, "tr" , 2) != 0) |
| 5616 | break; |
| 5617 | return MCK_vrotr; // "vrotr" |
| 5618 | case 's': // 1 string to match. |
| 5619 | if (memcmp(Name.data()+3, "ad" , 2) != 0) |
| 5620 | break; |
| 5621 | return MCK_vrsad; // "vrsad" |
| 5622 | } |
| 5623 | break; |
| 5624 | case 's': // 7 strings to match. |
| 5625 | switch (Name[2]) { |
| 5626 | default: break; |
| 5627 | case 'e': // 1 string to match. |
| 5628 | if (memcmp(Name.data()+3, "tq" , 2) != 0) |
| 5629 | break; |
| 5630 | return MCK_vsetq; // "vsetq" |
| 5631 | case 'u': // 3 strings to match. |
| 5632 | if (Name[3] != 'b') |
| 5633 | break; |
| 5634 | switch (Name[4]) { |
| 5635 | default: break; |
| 5636 | case 'b': // 1 string to match. |
| 5637 | return MCK_vsubb; // "vsubb" |
| 5638 | case 'h': // 1 string to match. |
| 5639 | return MCK_vsubh; // "vsubh" |
| 5640 | case 'w': // 1 string to match. |
| 5641 | return MCK_vsubw; // "vsubw" |
| 5642 | } |
| 5643 | break; |
| 5644 | case 'w': // 1 string to match. |
| 5645 | if (memcmp(Name.data()+3, "ap" , 2) != 0) |
| 5646 | break; |
| 5647 | return MCK_vswap; // "vswap" |
| 5648 | case 'x': // 2 strings to match. |
| 5649 | if (Name[3] != 't') |
| 5650 | break; |
| 5651 | switch (Name[4]) { |
| 5652 | default: break; |
| 5653 | case 'b': // 1 string to match. |
| 5654 | return MCK_vsxtb; // "vsxtb" |
| 5655 | case 'h': // 1 string to match. |
| 5656 | return MCK_vsxth; // "vsxth" |
| 5657 | } |
| 5658 | break; |
| 5659 | } |
| 5660 | break; |
| 5661 | case 't': // 1 string to match. |
| 5662 | if (memcmp(Name.data()+2, "mpy" , 3) != 0) |
| 5663 | break; |
| 5664 | return MCK_vtmpy; // "vtmpy" |
| 5665 | case 'z': // 2 strings to match. |
| 5666 | if (memcmp(Name.data()+2, "xt" , 2) != 0) |
| 5667 | break; |
| 5668 | switch (Name[4]) { |
| 5669 | default: break; |
| 5670 | case 'b': // 1 string to match. |
| 5671 | return MCK_vzxtb; // "vzxtb" |
| 5672 | case 'h': // 1 string to match. |
| 5673 | return MCK_vzxth; // "vzxth" |
| 5674 | } |
| 5675 | break; |
| 5676 | } |
| 5677 | break; |
| 5678 | } |
| 5679 | break; |
| 5680 | case 6: // 104 strings to match. |
| 5681 | switch (Name[0]) { |
| 5682 | default: break; |
| 5683 | case 'D': // 1 string to match. |
| 5684 | if (memcmp(Name.data()+1, "UPLEX" , 5) != 0) |
| 5685 | break; |
| 5686 | return MCK_DUPLEX; // "DUPLEX" |
| 5687 | case 'a': // 2 strings to match. |
| 5688 | switch (Name[1]) { |
| 5689 | default: break; |
| 5690 | case 'd': // 1 string to match. |
| 5691 | if (memcmp(Name.data()+2, "dasl" , 4) != 0) |
| 5692 | break; |
| 5693 | return MCK_addasl; // "addasl" |
| 5694 | case 's': // 1 string to match. |
| 5695 | if (memcmp(Name.data()+2, "rrnd" , 4) != 0) |
| 5696 | break; |
| 5697 | return MCK_asrrnd; // "asrrnd" |
| 5698 | } |
| 5699 | break; |
| 5700 | case 'c': // 6 strings to match. |
| 5701 | switch (Name[1]) { |
| 5702 | default: break; |
| 5703 | case 'a': // 1 string to match. |
| 5704 | if (memcmp(Name.data()+2, "llrh" , 4) != 0) |
| 5705 | break; |
| 5706 | return MCK_callrh; // "callrh" |
| 5707 | case 'l': // 1 string to match. |
| 5708 | if (memcmp(Name.data()+2, "rbit" , 4) != 0) |
| 5709 | break; |
| 5710 | return MCK_clrbit; // "clrbit" |
| 5711 | case 'm': // 2 strings to match. |
| 5712 | if (memcmp(Name.data()+2, "py" , 2) != 0) |
| 5713 | break; |
| 5714 | switch (Name[4]) { |
| 5715 | default: break; |
| 5716 | case 'i': // 1 string to match. |
| 5717 | if (Name[5] != 'w') |
| 5718 | break; |
| 5719 | return MCK_cmpyiw; // "cmpyiw" |
| 5720 | case 'r': // 1 string to match. |
| 5721 | if (Name[5] != 'w') |
| 5722 | break; |
| 5723 | return MCK_cmpyrw; // "cmpyrw" |
| 5724 | } |
| 5725 | break; |
| 5726 | case 'r': // 2 strings to match. |
| 5727 | switch (Name[2]) { |
| 5728 | default: break; |
| 5729 | case 'o': // 1 string to match. |
| 5730 | if (memcmp(Name.data()+3, "und" , 3) != 0) |
| 5731 | break; |
| 5732 | return MCK_cround; // "cround" |
| 5733 | case 's': // 1 string to match. |
| 5734 | if (memcmp(Name.data()+3, "wap" , 3) != 0) |
| 5735 | break; |
| 5736 | return MCK_crswap; // "crswap" |
| 5737 | } |
| 5738 | break; |
| 5739 | } |
| 5740 | break; |
| 5741 | case 'd': // 9 strings to match. |
| 5742 | switch (Name[1]) { |
| 5743 | default: break; |
| 5744 | case 'c': // 4 strings to match. |
| 5745 | switch (Name[2]) { |
| 5746 | default: break; |
| 5747 | case 'i': // 1 string to match. |
| 5748 | if (memcmp(Name.data()+3, "nva" , 3) != 0) |
| 5749 | break; |
| 5750 | return MCK_dcinva; // "dcinva" |
| 5751 | case 'k': // 1 string to match. |
| 5752 | if (memcmp(Name.data()+3, "ill" , 3) != 0) |
| 5753 | break; |
| 5754 | return MCK_dckill; // "dckill" |
| 5755 | case 't': // 2 strings to match. |
| 5756 | if (memcmp(Name.data()+3, "ag" , 2) != 0) |
| 5757 | break; |
| 5758 | switch (Name[5]) { |
| 5759 | default: break; |
| 5760 | case 'r': // 1 string to match. |
| 5761 | return MCK_dctagr; // "dctagr" |
| 5762 | case 'w': // 1 string to match. |
| 5763 | return MCK_dctagw; // "dctagw" |
| 5764 | } |
| 5765 | break; |
| 5766 | } |
| 5767 | break; |
| 5768 | case 'e': // 1 string to match. |
| 5769 | if (memcmp(Name.data()+2, "cbin" , 4) != 0) |
| 5770 | break; |
| 5771 | return MCK_decbin; // "decbin" |
| 5772 | case 'f': // 1 string to match. |
| 5773 | if (memcmp(Name.data()+2, "make" , 4) != 0) |
| 5774 | break; |
| 5775 | return MCK_dfmake; // "dfmake" |
| 5776 | case 'm': // 3 strings to match. |
| 5777 | switch (Name[2]) { |
| 5778 | default: break; |
| 5779 | case 'l': // 1 string to match. |
| 5780 | if (memcmp(Name.data()+3, "ink" , 3) != 0) |
| 5781 | break; |
| 5782 | return MCK_dmlink; // "dmlink" |
| 5783 | case 'p': // 1 string to match. |
| 5784 | if (memcmp(Name.data()+3, "oll" , 3) != 0) |
| 5785 | break; |
| 5786 | return MCK_dmpoll; // "dmpoll" |
| 5787 | case 'w': // 1 string to match. |
| 5788 | if (memcmp(Name.data()+3, "ait" , 3) != 0) |
| 5789 | break; |
| 5790 | return MCK_dmwait; // "dmwait" |
| 5791 | } |
| 5792 | break; |
| 5793 | } |
| 5794 | break; |
| 5795 | case 'h': // 1 string to match. |
| 5796 | if (memcmp(Name.data()+1, "intjr" , 5) != 0) |
| 5797 | break; |
| 5798 | return MCK_hintjr; // "hintjr" |
| 5799 | case 'i': // 7 strings to match. |
| 5800 | switch (Name[1]) { |
| 5801 | default: break; |
| 5802 | case 'c': // 5 strings to match. |
| 5803 | switch (Name[2]) { |
| 5804 | default: break; |
| 5805 | case 'i': // 1 string to match. |
| 5806 | if (memcmp(Name.data()+3, "nva" , 3) != 0) |
| 5807 | break; |
| 5808 | return MCK_icinva; // "icinva" |
| 5809 | case 'k': // 1 string to match. |
| 5810 | if (memcmp(Name.data()+3, "ill" , 3) != 0) |
| 5811 | break; |
| 5812 | return MCK_ickill; // "ickill" |
| 5813 | case 'o': // 1 string to match. |
| 5814 | if (memcmp(Name.data()+3, "nst" , 3) != 0) |
| 5815 | break; |
| 5816 | return MCK_iconst; // "iconst" |
| 5817 | case 't': // 2 strings to match. |
| 5818 | if (memcmp(Name.data()+3, "ag" , 2) != 0) |
| 5819 | break; |
| 5820 | switch (Name[5]) { |
| 5821 | default: break; |
| 5822 | case 'r': // 1 string to match. |
| 5823 | return MCK_ictagr; // "ictagr" |
| 5824 | case 'w': // 1 string to match. |
| 5825 | return MCK_ictagw; // "ictagw" |
| 5826 | } |
| 5827 | break; |
| 5828 | } |
| 5829 | break; |
| 5830 | case 'm': // 1 string to match. |
| 5831 | if (memcmp(Name.data()+2, "mext" , 4) != 0) |
| 5832 | break; |
| 5833 | return MCK_immext; // "immext" |
| 5834 | case 'n': // 1 string to match. |
| 5835 | if (memcmp(Name.data()+2, "sert" , 4) != 0) |
| 5836 | break; |
| 5837 | return MCK_insert; // "insert" |
| 5838 | } |
| 5839 | break; |
| 5840 | case 'j': // 1 string to match. |
| 5841 | if (memcmp(Name.data()+1, "umprh" , 5) != 0) |
| 5842 | break; |
| 5843 | return MCK_jumprh; // "jumprh" |
| 5844 | case 'k': // 1 string to match. |
| 5845 | if (memcmp(Name.data()+1, "0lock" , 5) != 0) |
| 5846 | break; |
| 5847 | return MCK_k0lock; // "k0lock" |
| 5848 | case 'l': // 3 strings to match. |
| 5849 | if (Name[1] != '2') |
| 5850 | break; |
| 5851 | switch (Name[2]) { |
| 5852 | default: break; |
| 5853 | case 'k': // 1 string to match. |
| 5854 | if (memcmp(Name.data()+3, "ill" , 3) != 0) |
| 5855 | break; |
| 5856 | return MCK_l2kill; // "l2kill" |
| 5857 | case 't': // 2 strings to match. |
| 5858 | if (memcmp(Name.data()+3, "ag" , 2) != 0) |
| 5859 | break; |
| 5860 | switch (Name[5]) { |
| 5861 | default: break; |
| 5862 | case 'r': // 1 string to match. |
| 5863 | return MCK_l2tagr; // "l2tagr" |
| 5864 | case 'w': // 1 string to match. |
| 5865 | return MCK_l2tagw; // "l2tagw" |
| 5866 | } |
| 5867 | break; |
| 5868 | } |
| 5869 | break; |
| 5870 | case 'm': // 2 strings to match. |
| 5871 | if (memcmp(Name.data()+1, "em" , 2) != 0) |
| 5872 | break; |
| 5873 | switch (Name[3]) { |
| 5874 | default: break; |
| 5875 | case 'c': // 1 string to match. |
| 5876 | if (memcmp(Name.data()+4, "py" , 2) != 0) |
| 5877 | break; |
| 5878 | return MCK_memcpy; // "memcpy" |
| 5879 | case 'u': // 1 string to match. |
| 5880 | if (memcmp(Name.data()+4, "bh" , 2) != 0) |
| 5881 | break; |
| 5882 | return MCK_memubh; // "memubh" |
| 5883 | } |
| 5884 | break; |
| 5885 | case 'p': // 2 strings to match. |
| 5886 | if (Name[1] != 'a') |
| 5887 | break; |
| 5888 | switch (Name[2]) { |
| 5889 | default: break; |
| 5890 | case 'c': // 1 string to match. |
| 5891 | if (memcmp(Name.data()+3, "khl" , 3) != 0) |
| 5892 | break; |
| 5893 | return MCK_packhl; // "packhl" |
| 5894 | case 'r': // 1 string to match. |
| 5895 | if (memcmp(Name.data()+3, "ity" , 3) != 0) |
| 5896 | break; |
| 5897 | return MCK_parity; // "parity" |
| 5898 | } |
| 5899 | break; |
| 5900 | case 'r': // 1 string to match. |
| 5901 | if (memcmp(Name.data()+1, "esume" , 5) != 0) |
| 5902 | break; |
| 5903 | return MCK_resume; // "resume" |
| 5904 | case 's': // 3 strings to match. |
| 5905 | switch (Name[1]) { |
| 5906 | default: break; |
| 5907 | case 'e': // 1 string to match. |
| 5908 | if (memcmp(Name.data()+2, "tbit" , 4) != 0) |
| 5909 | break; |
| 5910 | return MCK_setbit; // "setbit" |
| 5911 | case 'f': // 1 string to match. |
| 5912 | if (memcmp(Name.data()+2, "make" , 4) != 0) |
| 5913 | break; |
| 5914 | return MCK_sfmake; // "sfmake" |
| 5915 | case 'y': // 1 string to match. |
| 5916 | if (memcmp(Name.data()+2, "ncht" , 4) != 0) |
| 5917 | break; |
| 5918 | return MCK_syncht; // "syncht" |
| 5919 | } |
| 5920 | break; |
| 5921 | case 't': // 1 string to match. |
| 5922 | if (memcmp(Name.data()+1, "stbit" , 5) != 0) |
| 5923 | break; |
| 5924 | return MCK_tstbit; // "tstbit" |
| 5925 | case 'v': // 64 strings to match. |
| 5926 | switch (Name[1]) { |
| 5927 | default: break; |
| 5928 | case '1': // 1 string to match. |
| 5929 | if (memcmp(Name.data()+2, "0mpy" , 4) != 0) |
| 5930 | break; |
| 5931 | return MCK_v10mpy; // "v10mpy" |
| 5932 | case 'a': // 7 strings to match. |
| 5933 | switch (Name[2]) { |
| 5934 | default: break; |
| 5935 | case 'd': // 3 strings to match. |
| 5936 | if (memcmp(Name.data()+3, "du" , 2) != 0) |
| 5937 | break; |
| 5938 | switch (Name[5]) { |
| 5939 | default: break; |
| 5940 | case 'b': // 1 string to match. |
| 5941 | return MCK_vaddub; // "vaddub" |
| 5942 | case 'h': // 1 string to match. |
| 5943 | return MCK_vadduh; // "vadduh" |
| 5944 | case 'w': // 1 string to match. |
| 5945 | return MCK_vadduw; // "vadduw" |
| 5946 | } |
| 5947 | break; |
| 5948 | case 'l': // 1 string to match. |
| 5949 | if (memcmp(Name.data()+3, "ign" , 3) != 0) |
| 5950 | break; |
| 5951 | return MCK_valign; // "valign" |
| 5952 | case 'v': // 3 strings to match. |
| 5953 | if (memcmp(Name.data()+3, "gu" , 2) != 0) |
| 5954 | break; |
| 5955 | switch (Name[5]) { |
| 5956 | default: break; |
| 5957 | case 'b': // 1 string to match. |
| 5958 | return MCK_vavgub; // "vavgub" |
| 5959 | case 'h': // 1 string to match. |
| 5960 | return MCK_vavguh; // "vavguh" |
| 5961 | case 'w': // 1 string to match. |
| 5962 | return MCK_vavguw; // "vavguw" |
| 5963 | } |
| 5964 | break; |
| 5965 | } |
| 5966 | break; |
| 5967 | case 'c': // 3 strings to match. |
| 5968 | switch (Name[2]) { |
| 5969 | default: break; |
| 5970 | case 'm': // 2 strings to match. |
| 5971 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 5972 | break; |
| 5973 | switch (Name[5]) { |
| 5974 | default: break; |
| 5975 | case 'i': // 1 string to match. |
| 5976 | return MCK_vcmpyi; // "vcmpyi" |
| 5977 | case 'r': // 1 string to match. |
| 5978 | return MCK_vcmpyr; // "vcmpyr" |
| 5979 | } |
| 5980 | break; |
| 5981 | case 'n': // 1 string to match. |
| 5982 | if (memcmp(Name.data()+3, "egh" , 3) != 0) |
| 5983 | break; |
| 5984 | return MCK_vcnegh; // "vcnegh" |
| 5985 | } |
| 5986 | break; |
| 5987 | case 'd': // 6 strings to match. |
| 5988 | switch (Name[2]) { |
| 5989 | default: break; |
| 5990 | case 'e': // 4 strings to match. |
| 5991 | switch (Name[3]) { |
| 5992 | default: break; |
| 5993 | case 'a': // 3 strings to match. |
| 5994 | if (Name[4] != 'l') |
| 5995 | break; |
| 5996 | switch (Name[5]) { |
| 5997 | default: break; |
| 5998 | case 'b': // 1 string to match. |
| 5999 | return MCK_vdealb; // "vdealb" |
| 6000 | case 'e': // 1 string to match. |
| 6001 | return MCK_vdeale; // "vdeale" |
| 6002 | case 'h': // 1 string to match. |
| 6003 | return MCK_vdealh; // "vdealh" |
| 6004 | } |
| 6005 | break; |
| 6006 | case 'l': // 1 string to match. |
| 6007 | if (memcmp(Name.data()+4, "ta" , 2) != 0) |
| 6008 | break; |
| 6009 | return MCK_vdelta; // "vdelta" |
| 6010 | } |
| 6011 | break; |
| 6012 | case 'm': // 2 strings to match. |
| 6013 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 6014 | break; |
| 6015 | switch (Name[5]) { |
| 6016 | default: break; |
| 6017 | case 'h': // 1 string to match. |
| 6018 | return MCK_vdmpyh; // "vdmpyh" |
| 6019 | case 'w': // 1 string to match. |
| 6020 | return MCK_vdmpyw; // "vdmpyw" |
| 6021 | } |
| 6022 | break; |
| 6023 | } |
| 6024 | break; |
| 6025 | case 'l': // 2 strings to match. |
| 6026 | if (memcmp(Name.data()+2, "ut" , 2) != 0) |
| 6027 | break; |
| 6028 | switch (Name[4]) { |
| 6029 | default: break; |
| 6030 | case '1': // 1 string to match. |
| 6031 | if (Name[5] != '6') |
| 6032 | break; |
| 6033 | return MCK_vlut16; // "vlut16" |
| 6034 | case '3': // 1 string to match. |
| 6035 | if (Name[5] != '2') |
| 6036 | break; |
| 6037 | return MCK_vlut32; // "vlut32" |
| 6038 | } |
| 6039 | break; |
| 6040 | case 'm': // 15 strings to match. |
| 6041 | switch (Name[2]) { |
| 6042 | default: break; |
| 6043 | case 'a': // 3 strings to match. |
| 6044 | if (memcmp(Name.data()+3, "xu" , 2) != 0) |
| 6045 | break; |
| 6046 | switch (Name[5]) { |
| 6047 | default: break; |
| 6048 | case 'b': // 1 string to match. |
| 6049 | return MCK_vmaxub; // "vmaxub" |
| 6050 | case 'h': // 1 string to match. |
| 6051 | return MCK_vmaxuh; // "vmaxuh" |
| 6052 | case 'w': // 1 string to match. |
| 6053 | return MCK_vmaxuw; // "vmaxuw" |
| 6054 | } |
| 6055 | break; |
| 6056 | case 'e': // 1 string to match. |
| 6057 | if (memcmp(Name.data()+3, "rge" , 3) != 0) |
| 6058 | break; |
| 6059 | return MCK_vmerge; // "vmerge" |
| 6060 | case 'i': // 3 strings to match. |
| 6061 | if (memcmp(Name.data()+3, "nu" , 2) != 0) |
| 6062 | break; |
| 6063 | switch (Name[5]) { |
| 6064 | default: break; |
| 6065 | case 'b': // 1 string to match. |
| 6066 | return MCK_vminub; // "vminub" |
| 6067 | case 'h': // 1 string to match. |
| 6068 | return MCK_vminuh; // "vminuh" |
| 6069 | case 'w': // 1 string to match. |
| 6070 | return MCK_vminuw; // "vminuw" |
| 6071 | } |
| 6072 | break; |
| 6073 | case 'p': // 8 strings to match. |
| 6074 | switch (Name[3]) { |
| 6075 | default: break; |
| 6076 | case 'a': // 1 string to match. |
| 6077 | if (memcmp(Name.data()+4, "hb" , 2) != 0) |
| 6078 | break; |
| 6079 | return MCK_vmpahb; // "vmpahb" |
| 6080 | case 'y': // 7 strings to match. |
| 6081 | switch (Name[4]) { |
| 6082 | default: break; |
| 6083 | case 'b': // 1 string to match. |
| 6084 | if (Name[5] != 'u') |
| 6085 | break; |
| 6086 | return MCK_vmpybu; // "vmpybu" |
| 6087 | case 'e': // 1 string to match. |
| 6088 | if (Name[5] != 'h') |
| 6089 | break; |
| 6090 | return MCK_vmpyeh; // "vmpyeh" |
| 6091 | case 'i': // 3 strings to match. |
| 6092 | switch (Name[5]) { |
| 6093 | default: break; |
| 6094 | case 'e': // 1 string to match. |
| 6095 | return MCK_vmpyie; // "vmpyie" |
| 6096 | case 'h': // 1 string to match. |
| 6097 | return MCK_vmpyih; // "vmpyih" |
| 6098 | case 'o': // 1 string to match. |
| 6099 | return MCK_vmpyio; // "vmpyio" |
| 6100 | } |
| 6101 | break; |
| 6102 | case 'u': // 2 strings to match. |
| 6103 | switch (Name[5]) { |
| 6104 | default: break; |
| 6105 | case 'b': // 1 string to match. |
| 6106 | return MCK_vmpyub; // "vmpyub" |
| 6107 | case 'h': // 1 string to match. |
| 6108 | return MCK_vmpyuh; // "vmpyuh" |
| 6109 | } |
| 6110 | break; |
| 6111 | } |
| 6112 | break; |
| 6113 | } |
| 6114 | break; |
| 6115 | } |
| 6116 | break; |
| 6117 | case 'n': // 3 strings to match. |
| 6118 | if (memcmp(Name.data()+2, "avg" , 3) != 0) |
| 6119 | break; |
| 6120 | switch (Name[5]) { |
| 6121 | default: break; |
| 6122 | case 'b': // 1 string to match. |
| 6123 | return MCK_vnavgb; // "vnavgb" |
| 6124 | case 'h': // 1 string to match. |
| 6125 | return MCK_vnavgh; // "vnavgh" |
| 6126 | case 'w': // 1 string to match. |
| 6127 | return MCK_vnavgw; // "vnavgw" |
| 6128 | } |
| 6129 | break; |
| 6130 | case 'p': // 3 strings to match. |
| 6131 | switch (Name[2]) { |
| 6132 | default: break; |
| 6133 | case 'a': // 2 strings to match. |
| 6134 | if (memcmp(Name.data()+3, "ck" , 2) != 0) |
| 6135 | break; |
| 6136 | switch (Name[5]) { |
| 6137 | default: break; |
| 6138 | case 'e': // 1 string to match. |
| 6139 | return MCK_vpacke; // "vpacke" |
| 6140 | case 'o': // 1 string to match. |
| 6141 | return MCK_vpacko; // "vpacko" |
| 6142 | } |
| 6143 | break; |
| 6144 | case 'm': // 1 string to match. |
| 6145 | if (memcmp(Name.data()+3, "pyh" , 3) != 0) |
| 6146 | break; |
| 6147 | return MCK_vpmpyh; // "vpmpyh" |
| 6148 | } |
| 6149 | break; |
| 6150 | case 'r': // 10 strings to match. |
| 6151 | switch (Name[2]) { |
| 6152 | default: break; |
| 6153 | case 'a': // 1 string to match. |
| 6154 | if (memcmp(Name.data()+3, "ddh" , 3) != 0) |
| 6155 | break; |
| 6156 | return MCK_vraddh; // "vraddh" |
| 6157 | case 'm': // 7 strings to match. |
| 6158 | switch (Name[3]) { |
| 6159 | default: break; |
| 6160 | case 'a': // 2 strings to match. |
| 6161 | if (Name[4] != 'x') |
| 6162 | break; |
| 6163 | switch (Name[5]) { |
| 6164 | default: break; |
| 6165 | case 'h': // 1 string to match. |
| 6166 | return MCK_vrmaxh; // "vrmaxh" |
| 6167 | case 'w': // 1 string to match. |
| 6168 | return MCK_vrmaxw; // "vrmaxw" |
| 6169 | } |
| 6170 | break; |
| 6171 | case 'i': // 2 strings to match. |
| 6172 | if (Name[4] != 'n') |
| 6173 | break; |
| 6174 | switch (Name[5]) { |
| 6175 | default: break; |
| 6176 | case 'h': // 1 string to match. |
| 6177 | return MCK_vrminh; // "vrminh" |
| 6178 | case 'w': // 1 string to match. |
| 6179 | return MCK_vrminw; // "vrminw" |
| 6180 | } |
| 6181 | break; |
| 6182 | case 'p': // 3 strings to match. |
| 6183 | if (Name[4] != 'y') |
| 6184 | break; |
| 6185 | switch (Name[5]) { |
| 6186 | default: break; |
| 6187 | case 'b': // 1 string to match. |
| 6188 | return MCK_vrmpyb; // "vrmpyb" |
| 6189 | case 'h': // 1 string to match. |
| 6190 | return MCK_vrmpyh; // "vrmpyh" |
| 6191 | case 'z': // 1 string to match. |
| 6192 | return MCK_vrmpyz; // "vrmpyz" |
| 6193 | } |
| 6194 | break; |
| 6195 | } |
| 6196 | break; |
| 6197 | case 'n': // 1 string to match. |
| 6198 | if (memcmp(Name.data()+3, "dwh" , 3) != 0) |
| 6199 | break; |
| 6200 | return MCK_vrndwh; // "vrndwh" |
| 6201 | case 'o': // 1 string to match. |
| 6202 | if (memcmp(Name.data()+3, "und" , 3) != 0) |
| 6203 | break; |
| 6204 | return MCK_vround; // "vround" |
| 6205 | } |
| 6206 | break; |
| 6207 | case 's': // 11 strings to match. |
| 6208 | switch (Name[2]) { |
| 6209 | default: break; |
| 6210 | case 'a': // 3 strings to match. |
| 6211 | if (Name[3] != 't') |
| 6212 | break; |
| 6213 | switch (Name[4]) { |
| 6214 | default: break; |
| 6215 | case 'd': // 1 string to match. |
| 6216 | if (Name[5] != 'w') |
| 6217 | break; |
| 6218 | return MCK_vsatdw; // "vsatdw" |
| 6219 | case 'h': // 1 string to match. |
| 6220 | if (Name[5] != 'b') |
| 6221 | break; |
| 6222 | return MCK_vsathb; // "vsathb" |
| 6223 | case 'w': // 1 string to match. |
| 6224 | if (Name[5] != 'h') |
| 6225 | break; |
| 6226 | return MCK_vsatwh; // "vsatwh" |
| 6227 | } |
| 6228 | break; |
| 6229 | case 'e': // 1 string to match. |
| 6230 | if (memcmp(Name.data()+3, "tq2" , 3) != 0) |
| 6231 | break; |
| 6232 | return MCK_vsetq2; // "vsetq2" |
| 6233 | case 'h': // 1 string to match. |
| 6234 | if (memcmp(Name.data()+3, "uff" , 3) != 0) |
| 6235 | break; |
| 6236 | return MCK_vshuff; // "vshuff" |
| 6237 | case 'p': // 1 string to match. |
| 6238 | if (memcmp(Name.data()+3, "lat" , 3) != 0) |
| 6239 | break; |
| 6240 | return MCK_vsplat; // "vsplat" |
| 6241 | case 'u': // 3 strings to match. |
| 6242 | if (memcmp(Name.data()+3, "bu" , 2) != 0) |
| 6243 | break; |
| 6244 | switch (Name[5]) { |
| 6245 | default: break; |
| 6246 | case 'b': // 1 string to match. |
| 6247 | return MCK_vsubub; // "vsubub" |
| 6248 | case 'h': // 1 string to match. |
| 6249 | return MCK_vsubuh; // "vsubuh" |
| 6250 | case 'w': // 1 string to match. |
| 6251 | return MCK_vsubuw; // "vsubuw" |
| 6252 | } |
| 6253 | break; |
| 6254 | case 'x': // 2 strings to match. |
| 6255 | if (Name[3] != 't') |
| 6256 | break; |
| 6257 | switch (Name[4]) { |
| 6258 | default: break; |
| 6259 | case 'b': // 1 string to match. |
| 6260 | if (Name[5] != 'h') |
| 6261 | break; |
| 6262 | return MCK_vsxtbh; // "vsxtbh" |
| 6263 | case 'h': // 1 string to match. |
| 6264 | if (Name[5] != 'w') |
| 6265 | break; |
| 6266 | return MCK_vsxthw; // "vsxthw" |
| 6267 | } |
| 6268 | break; |
| 6269 | } |
| 6270 | break; |
| 6271 | case 't': // 1 string to match. |
| 6272 | if (memcmp(Name.data()+2, "mpyb" , 4) != 0) |
| 6273 | break; |
| 6274 | return MCK_vtmpyb; // "vtmpyb" |
| 6275 | case 'z': // 2 strings to match. |
| 6276 | if (memcmp(Name.data()+2, "xt" , 2) != 0) |
| 6277 | break; |
| 6278 | switch (Name[4]) { |
| 6279 | default: break; |
| 6280 | case 'b': // 1 string to match. |
| 6281 | if (Name[5] != 'h') |
| 6282 | break; |
| 6283 | return MCK_vzxtbh; // "vzxtbh" |
| 6284 | case 'h': // 1 string to match. |
| 6285 | if (Name[5] != 'w') |
| 6286 | break; |
| 6287 | return MCK_vzxthw; // "vzxthw" |
| 6288 | } |
| 6289 | break; |
| 6290 | } |
| 6291 | break; |
| 6292 | } |
| 6293 | break; |
| 6294 | case 7: // 92 strings to match. |
| 6295 | switch (Name[0]) { |
| 6296 | default: break; |
| 6297 | case 'C': // 2 strings to match. |
| 6298 | if (memcmp(Name.data()+1, "ONST" , 4) != 0) |
| 6299 | break; |
| 6300 | switch (Name[5]) { |
| 6301 | default: break; |
| 6302 | case '3': // 1 string to match. |
| 6303 | if (Name[6] != '2') |
| 6304 | break; |
| 6305 | return MCK_CONST32; // "CONST32" |
| 6306 | case '6': // 1 string to match. |
| 6307 | if (Name[6] != '4') |
| 6308 | break; |
| 6309 | return MCK_CONST64; // "CONST64" |
| 6310 | } |
| 6311 | break; |
| 6312 | case 'b': // 3 strings to match. |
| 6313 | switch (Name[1]) { |
| 6314 | default: break; |
| 6315 | case 'a': // 1 string to match. |
| 6316 | if (memcmp(Name.data()+2, "rrier" , 5) != 0) |
| 6317 | break; |
| 6318 | return MCK_barrier; // "barrier" |
| 6319 | case 'i': // 2 strings to match. |
| 6320 | if (memcmp(Name.data()+2, "ts" , 2) != 0) |
| 6321 | break; |
| 6322 | switch (Name[4]) { |
| 6323 | default: break; |
| 6324 | case 'c': // 1 string to match. |
| 6325 | if (memcmp(Name.data()+5, "lr" , 2) != 0) |
| 6326 | break; |
| 6327 | return MCK_bitsclr; // "bitsclr" |
| 6328 | case 's': // 1 string to match. |
| 6329 | if (memcmp(Name.data()+5, "et" , 2) != 0) |
| 6330 | break; |
| 6331 | return MCK_bitsset; // "bitsset" |
| 6332 | } |
| 6333 | break; |
| 6334 | } |
| 6335 | break; |
| 6336 | case 'c': // 3 strings to match. |
| 6337 | switch (Name[1]) { |
| 6338 | default: break; |
| 6339 | case 'm': // 2 strings to match. |
| 6340 | if (memcmp(Name.data()+2, "py" , 2) != 0) |
| 6341 | break; |
| 6342 | switch (Name[4]) { |
| 6343 | default: break; |
| 6344 | case 'i': // 1 string to match. |
| 6345 | if (memcmp(Name.data()+5, "wh" , 2) != 0) |
| 6346 | break; |
| 6347 | return MCK_cmpyiwh; // "cmpyiwh" |
| 6348 | case 'r': // 1 string to match. |
| 6349 | if (memcmp(Name.data()+5, "wh" , 2) != 0) |
| 6350 | break; |
| 6351 | return MCK_cmpyrwh; // "cmpyrwh" |
| 6352 | } |
| 6353 | break; |
| 6354 | case 'o': // 1 string to match. |
| 6355 | if (memcmp(Name.data()+2, "mbine" , 5) != 0) |
| 6356 | break; |
| 6357 | return MCK_combine; // "combine" |
| 6358 | } |
| 6359 | break; |
| 6360 | case 'd': // 8 strings to match. |
| 6361 | switch (Name[1]) { |
| 6362 | default: break; |
| 6363 | case 'c': // 2 strings to match. |
| 6364 | switch (Name[2]) { |
| 6365 | default: break; |
| 6366 | case 'f': // 1 string to match. |
| 6367 | if (memcmp(Name.data()+3, "etch" , 4) != 0) |
| 6368 | break; |
| 6369 | return MCK_dcfetch; // "dcfetch" |
| 6370 | case 'z': // 1 string to match. |
| 6371 | if (memcmp(Name.data()+3, "eroa" , 4) != 0) |
| 6372 | break; |
| 6373 | return MCK_dczeroa; // "dczeroa" |
| 6374 | } |
| 6375 | break; |
| 6376 | case 'f': // 4 strings to match. |
| 6377 | switch (Name[2]) { |
| 6378 | default: break; |
| 6379 | case 'c': // 1 string to match. |
| 6380 | if (memcmp(Name.data()+3, "lass" , 4) != 0) |
| 6381 | break; |
| 6382 | return MCK_dfclass; // "dfclass" |
| 6383 | case 'm': // 3 strings to match. |
| 6384 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 6385 | break; |
| 6386 | switch (Name[5]) { |
| 6387 | default: break; |
| 6388 | case 'h': // 1 string to match. |
| 6389 | if (Name[6] != 'h') |
| 6390 | break; |
| 6391 | return MCK_dfmpyhh; // "dfmpyhh" |
| 6392 | case 'l': // 2 strings to match. |
| 6393 | switch (Name[6]) { |
| 6394 | default: break; |
| 6395 | case 'h': // 1 string to match. |
| 6396 | return MCK_dfmpylh; // "dfmpylh" |
| 6397 | case 'l': // 1 string to match. |
| 6398 | return MCK_dfmpyll; // "dfmpyll" |
| 6399 | } |
| 6400 | break; |
| 6401 | } |
| 6402 | break; |
| 6403 | } |
| 6404 | break; |
| 6405 | case 'm': // 2 strings to match. |
| 6406 | switch (Name[2]) { |
| 6407 | default: break; |
| 6408 | case 'p': // 1 string to match. |
| 6409 | if (memcmp(Name.data()+3, "ause" , 4) != 0) |
| 6410 | break; |
| 6411 | return MCK_dmpause; // "dmpause" |
| 6412 | case 's': // 1 string to match. |
| 6413 | if (memcmp(Name.data()+3, "tart" , 4) != 0) |
| 6414 | break; |
| 6415 | return MCK_dmstart; // "dmstart" |
| 6416 | } |
| 6417 | break; |
| 6418 | } |
| 6419 | break; |
| 6420 | case 'e': // 1 string to match. |
| 6421 | if (memcmp(Name.data()+1, "xtract" , 6) != 0) |
| 6422 | break; |
| 6423 | return MCK_extract; // "extract" |
| 6424 | case 'i': // 2 strings to match. |
| 6425 | if (memcmp(Name.data()+1, "cdata" , 5) != 0) |
| 6426 | break; |
| 6427 | switch (Name[6]) { |
| 6428 | default: break; |
| 6429 | case 'r': // 1 string to match. |
| 6430 | return MCK_icdatar; // "icdatar" |
| 6431 | case 'w': // 1 string to match. |
| 6432 | return MCK_icdataw; // "icdataw" |
| 6433 | } |
| 6434 | break; |
| 6435 | case 'l': // 2 strings to match. |
| 6436 | if (Name[1] != '2') |
| 6437 | break; |
| 6438 | switch (Name[2]) { |
| 6439 | default: break; |
| 6440 | case 'f': // 1 string to match. |
| 6441 | if (memcmp(Name.data()+3, "etch" , 4) != 0) |
| 6442 | break; |
| 6443 | return MCK_l2fetch; // "l2fetch" |
| 6444 | case 'l': // 1 string to match. |
| 6445 | if (memcmp(Name.data()+3, "ocka" , 4) != 0) |
| 6446 | break; |
| 6447 | return MCK_l2locka; // "l2locka" |
| 6448 | } |
| 6449 | break; |
| 6450 | case 'm': // 5 strings to match. |
| 6451 | switch (Name[1]) { |
| 6452 | default: break; |
| 6453 | case 'e': // 4 strings to match. |
| 6454 | if (Name[2] != 'm') |
| 6455 | break; |
| 6456 | switch (Name[3]) { |
| 6457 | default: break; |
| 6458 | case 'd': // 2 strings to match. |
| 6459 | if (Name[4] != '_') |
| 6460 | break; |
| 6461 | switch (Name[5]) { |
| 6462 | default: break; |
| 6463 | case 'a': // 1 string to match. |
| 6464 | if (Name[6] != 'q') |
| 6465 | break; |
| 6466 | return MCK_memd_95_aq; // "memd_aq" |
| 6467 | case 'r': // 1 string to match. |
| 6468 | if (Name[6] != 'l') |
| 6469 | break; |
| 6470 | return MCK_memd_95_rl; // "memd_rl" |
| 6471 | } |
| 6472 | break; |
| 6473 | case 'w': // 2 strings to match. |
| 6474 | if (Name[4] != '_') |
| 6475 | break; |
| 6476 | switch (Name[5]) { |
| 6477 | default: break; |
| 6478 | case 'a': // 1 string to match. |
| 6479 | if (Name[6] != 'q') |
| 6480 | break; |
| 6481 | return MCK_memw_95_aq; // "memw_aq" |
| 6482 | case 'r': // 1 string to match. |
| 6483 | if (Name[6] != 'l') |
| 6484 | break; |
| 6485 | return MCK_memw_95_rl; // "memw_rl" |
| 6486 | } |
| 6487 | break; |
| 6488 | } |
| 6489 | break; |
| 6490 | case 'o': // 1 string to match. |
| 6491 | if (memcmp(Name.data()+2, "dwrap" , 5) != 0) |
| 6492 | break; |
| 6493 | return MCK_modwrap; // "modwrap" |
| 6494 | } |
| 6495 | break; |
| 6496 | case 'n': // 2 strings to match. |
| 6497 | if (Name[1] != 'o') |
| 6498 | break; |
| 6499 | switch (Name[2]) { |
| 6500 | default: break; |
| 6501 | case 'm': // 1 string to match. |
| 6502 | if (memcmp(Name.data()+3, "atch" , 4) != 0) |
| 6503 | break; |
| 6504 | return MCK_nomatch; // "nomatch" |
| 6505 | case 'r': // 1 string to match. |
| 6506 | if (memcmp(Name.data()+3, "mamt" , 4) != 0) |
| 6507 | break; |
| 6508 | return MCK_normamt; // "normamt" |
| 6509 | } |
| 6510 | break; |
| 6511 | case 'r': // 1 string to match. |
| 6512 | if (memcmp(Name.data()+1, "elease" , 6) != 0) |
| 6513 | break; |
| 6514 | return MCK_release; // "release" |
| 6515 | case 's': // 6 strings to match. |
| 6516 | switch (Name[1]) { |
| 6517 | default: break; |
| 6518 | case 'e': // 1 string to match. |
| 6519 | if (memcmp(Name.data()+2, "tprio" , 5) != 0) |
| 6520 | break; |
| 6521 | return MCK_setprio; // "setprio" |
| 6522 | case 'f': // 1 string to match. |
| 6523 | if (memcmp(Name.data()+2, "class" , 5) != 0) |
| 6524 | break; |
| 6525 | return MCK_sfclass; // "sfclass" |
| 6526 | case 'h': // 4 strings to match. |
| 6527 | if (memcmp(Name.data()+2, "uff" , 3) != 0) |
| 6528 | break; |
| 6529 | switch (Name[5]) { |
| 6530 | default: break; |
| 6531 | case 'e': // 2 strings to match. |
| 6532 | switch (Name[6]) { |
| 6533 | default: break; |
| 6534 | case 'b': // 1 string to match. |
| 6535 | return MCK_shuffeb; // "shuffeb" |
| 6536 | case 'h': // 1 string to match. |
| 6537 | return MCK_shuffeh; // "shuffeh" |
| 6538 | } |
| 6539 | break; |
| 6540 | case 'o': // 2 strings to match. |
| 6541 | switch (Name[6]) { |
| 6542 | default: break; |
| 6543 | case 'b': // 1 string to match. |
| 6544 | return MCK_shuffob; // "shuffob" |
| 6545 | case 'h': // 1 string to match. |
| 6546 | return MCK_shuffoh; // "shuffoh" |
| 6547 | } |
| 6548 | break; |
| 6549 | } |
| 6550 | break; |
| 6551 | } |
| 6552 | break; |
| 6553 | case 't': // 1 string to match. |
| 6554 | if (memcmp(Name.data()+1, "lblock" , 6) != 0) |
| 6555 | break; |
| 6556 | return MCK_tlblock; // "tlblock" |
| 6557 | case 'u': // 1 string to match. |
| 6558 | if (memcmp(Name.data()+1, "npause" , 6) != 0) |
| 6559 | break; |
| 6560 | return MCK_unpause; // "unpause" |
| 6561 | case 'v': // 55 strings to match. |
| 6562 | switch (Name[1]) { |
| 6563 | default: break; |
| 6564 | case 'a': // 3 strings to match. |
| 6565 | switch (Name[2]) { |
| 6566 | default: break; |
| 6567 | case 'd': // 1 string to match. |
| 6568 | if (memcmp(Name.data()+3, "dhub" , 4) != 0) |
| 6569 | break; |
| 6570 | return MCK_vaddhub; // "vaddhub" |
| 6571 | case 'l': // 1 string to match. |
| 6572 | if (memcmp(Name.data()+3, "ignb" , 4) != 0) |
| 6573 | break; |
| 6574 | return MCK_valignb; // "valignb" |
| 6575 | case 's': // 1 string to match. |
| 6576 | if (memcmp(Name.data()+3, "rhub" , 4) != 0) |
| 6577 | break; |
| 6578 | return MCK_vasrhub; // "vasrhub" |
| 6579 | } |
| 6580 | break; |
| 6581 | case 'd': // 2 strings to match. |
| 6582 | switch (Name[2]) { |
| 6583 | default: break; |
| 6584 | case 'm': // 1 string to match. |
| 6585 | if (memcmp(Name.data()+3, "pyhb" , 4) != 0) |
| 6586 | break; |
| 6587 | return MCK_vdmpyhb; // "vdmpyhb" |
| 6588 | case 's': // 1 string to match. |
| 6589 | if (memcmp(Name.data()+3, "aduh" , 4) != 0) |
| 6590 | break; |
| 6591 | return MCK_vdsaduh; // "vdsaduh" |
| 6592 | } |
| 6593 | break; |
| 6594 | case 'g': // 1 string to match. |
| 6595 | if (memcmp(Name.data()+2, "ather" , 5) != 0) |
| 6596 | break; |
| 6597 | return MCK_vgather; // "vgather" |
| 6598 | case 'i': // 2 strings to match. |
| 6599 | switch (Name[2]) { |
| 6600 | default: break; |
| 6601 | case 'n': // 1 string to match. |
| 6602 | if (memcmp(Name.data()+3, "sert" , 4) != 0) |
| 6603 | break; |
| 6604 | return MCK_vinsert; // "vinsert" |
| 6605 | case 't': // 1 string to match. |
| 6606 | if (memcmp(Name.data()+3, "pack" , 4) != 0) |
| 6607 | break; |
| 6608 | return MCK_vitpack; // "vitpack" |
| 6609 | } |
| 6610 | break; |
| 6611 | case 'l': // 1 string to match. |
| 6612 | if (memcmp(Name.data()+2, "align" , 5) != 0) |
| 6613 | break; |
| 6614 | return MCK_vlalign; // "vlalign" |
| 6615 | case 'm': // 14 strings to match. |
| 6616 | if (Name[2] != 'p') |
| 6617 | break; |
| 6618 | switch (Name[3]) { |
| 6619 | default: break; |
| 6620 | case 'a': // 3 strings to match. |
| 6621 | switch (Name[4]) { |
| 6622 | default: break; |
| 6623 | case 'b': // 2 strings to match. |
| 6624 | if (Name[5] != 'u') |
| 6625 | break; |
| 6626 | switch (Name[6]) { |
| 6627 | default: break; |
| 6628 | case 's': // 1 string to match. |
| 6629 | return MCK_vmpabus; // "vmpabus" |
| 6630 | case 'u': // 1 string to match. |
| 6631 | return MCK_vmpabuu; // "vmpabuu" |
| 6632 | } |
| 6633 | break; |
| 6634 | case 'u': // 1 string to match. |
| 6635 | if (memcmp(Name.data()+5, "hb" , 2) != 0) |
| 6636 | break; |
| 6637 | return MCK_vmpauhb; // "vmpauhb" |
| 6638 | } |
| 6639 | break; |
| 6640 | case 'y': // 11 strings to match. |
| 6641 | switch (Name[4]) { |
| 6642 | default: break; |
| 6643 | case 'b': // 2 strings to match. |
| 6644 | switch (Name[5]) { |
| 6645 | default: break; |
| 6646 | case 's': // 1 string to match. |
| 6647 | if (Name[6] != 'u') |
| 6648 | break; |
| 6649 | return MCK_vmpybsu; // "vmpybsu" |
| 6650 | case 'u': // 1 string to match. |
| 6651 | if (Name[6] != 's') |
| 6652 | break; |
| 6653 | return MCK_vmpybus; // "vmpybus" |
| 6654 | } |
| 6655 | break; |
| 6656 | case 'h': // 2 strings to match. |
| 6657 | switch (Name[5]) { |
| 6658 | default: break; |
| 6659 | case 's': // 1 string to match. |
| 6660 | if (Name[6] != 'u') |
| 6661 | break; |
| 6662 | return MCK_vmpyhsu; // "vmpyhsu" |
| 6663 | case 'u': // 1 string to match. |
| 6664 | if (Name[6] != 's') |
| 6665 | break; |
| 6666 | return MCK_vmpyhus; // "vmpyhus" |
| 6667 | } |
| 6668 | break; |
| 6669 | case 'i': // 4 strings to match. |
| 6670 | switch (Name[5]) { |
| 6671 | default: break; |
| 6672 | case 'e': // 1 string to match. |
| 6673 | if (Name[6] != 'o') |
| 6674 | break; |
| 6675 | return MCK_vmpyieo; // "vmpyieo" |
| 6676 | case 'h': // 1 string to match. |
| 6677 | if (Name[6] != 'b') |
| 6678 | break; |
| 6679 | return MCK_vmpyihb; // "vmpyihb" |
| 6680 | case 'w': // 2 strings to match. |
| 6681 | switch (Name[6]) { |
| 6682 | default: break; |
| 6683 | case 'b': // 1 string to match. |
| 6684 | return MCK_vmpyiwb; // "vmpyiwb" |
| 6685 | case 'h': // 1 string to match. |
| 6686 | return MCK_vmpyiwh; // "vmpyiwh" |
| 6687 | } |
| 6688 | break; |
| 6689 | } |
| 6690 | break; |
| 6691 | case 'o': // 1 string to match. |
| 6692 | if (memcmp(Name.data()+5, "wh" , 2) != 0) |
| 6693 | break; |
| 6694 | return MCK_vmpyowh; // "vmpyowh" |
| 6695 | case 'w': // 2 strings to match. |
| 6696 | switch (Name[5]) { |
| 6697 | default: break; |
| 6698 | case 'e': // 1 string to match. |
| 6699 | if (Name[6] != 'h') |
| 6700 | break; |
| 6701 | return MCK_vmpyweh; // "vmpyweh" |
| 6702 | case 'o': // 1 string to match. |
| 6703 | if (Name[6] != 'h') |
| 6704 | break; |
| 6705 | return MCK_vmpywoh; // "vmpywoh" |
| 6706 | } |
| 6707 | break; |
| 6708 | } |
| 6709 | break; |
| 6710 | } |
| 6711 | break; |
| 6712 | case 'n': // 1 string to match. |
| 6713 | if (memcmp(Name.data()+2, "avgub" , 5) != 0) |
| 6714 | break; |
| 6715 | return MCK_vnavgub; // "vnavgub" |
| 6716 | case 'p': // 6 strings to match. |
| 6717 | if (memcmp(Name.data()+2, "ack" , 3) != 0) |
| 6718 | break; |
| 6719 | switch (Name[5]) { |
| 6720 | default: break; |
| 6721 | case 'e': // 2 strings to match. |
| 6722 | switch (Name[6]) { |
| 6723 | default: break; |
| 6724 | case 'b': // 1 string to match. |
| 6725 | return MCK_vpackeb; // "vpackeb" |
| 6726 | case 'h': // 1 string to match. |
| 6727 | return MCK_vpackeh; // "vpackeh" |
| 6728 | } |
| 6729 | break; |
| 6730 | case 'h': // 1 string to match. |
| 6731 | if (Name[6] != 'b') |
| 6732 | break; |
| 6733 | return MCK_vpackhb; // "vpackhb" |
| 6734 | case 'o': // 2 strings to match. |
| 6735 | switch (Name[6]) { |
| 6736 | default: break; |
| 6737 | case 'b': // 1 string to match. |
| 6738 | return MCK_vpackob; // "vpackob" |
| 6739 | case 'h': // 1 string to match. |
| 6740 | return MCK_vpackoh; // "vpackoh" |
| 6741 | } |
| 6742 | break; |
| 6743 | case 'w': // 1 string to match. |
| 6744 | if (Name[6] != 'h') |
| 6745 | break; |
| 6746 | return MCK_vpackwh; // "vpackwh" |
| 6747 | } |
| 6748 | break; |
| 6749 | case 'r': // 15 strings to match. |
| 6750 | switch (Name[2]) { |
| 6751 | default: break; |
| 6752 | case '8': // 1 string to match. |
| 6753 | if (memcmp(Name.data()+3, "mpyz" , 4) != 0) |
| 6754 | break; |
| 6755 | return MCK_vr8mpyz; // "vr8mpyz" |
| 6756 | case 'a': // 2 strings to match. |
| 6757 | if (memcmp(Name.data()+3, "ddu" , 3) != 0) |
| 6758 | break; |
| 6759 | switch (Name[6]) { |
| 6760 | default: break; |
| 6761 | case 'b': // 1 string to match. |
| 6762 | return MCK_vraddub; // "vraddub" |
| 6763 | case 'h': // 1 string to match. |
| 6764 | return MCK_vradduh; // "vradduh" |
| 6765 | } |
| 6766 | break; |
| 6767 | case 'c': // 4 strings to match. |
| 6768 | switch (Name[3]) { |
| 6769 | default: break; |
| 6770 | case 'm': // 3 strings to match. |
| 6771 | if (memcmp(Name.data()+4, "py" , 2) != 0) |
| 6772 | break; |
| 6773 | switch (Name[6]) { |
| 6774 | default: break; |
| 6775 | case 'i': // 1 string to match. |
| 6776 | return MCK_vrcmpyi; // "vrcmpyi" |
| 6777 | case 'r': // 1 string to match. |
| 6778 | return MCK_vrcmpyr; // "vrcmpyr" |
| 6779 | case 's': // 1 string to match. |
| 6780 | return MCK_vrcmpys; // "vrcmpys" |
| 6781 | } |
| 6782 | break; |
| 6783 | case 'n': // 1 string to match. |
| 6784 | if (memcmp(Name.data()+4, "egh" , 3) != 0) |
| 6785 | break; |
| 6786 | return MCK_vrcnegh; // "vrcnegh" |
| 6787 | } |
| 6788 | break; |
| 6789 | case 'd': // 1 string to match. |
| 6790 | if (memcmp(Name.data()+3, "elta" , 4) != 0) |
| 6791 | break; |
| 6792 | return MCK_vrdelta; // "vrdelta" |
| 6793 | case 'm': // 6 strings to match. |
| 6794 | switch (Name[3]) { |
| 6795 | default: break; |
| 6796 | case 'a': // 2 strings to match. |
| 6797 | if (memcmp(Name.data()+4, "xu" , 2) != 0) |
| 6798 | break; |
| 6799 | switch (Name[6]) { |
| 6800 | default: break; |
| 6801 | case 'h': // 1 string to match. |
| 6802 | return MCK_vrmaxuh; // "vrmaxuh" |
| 6803 | case 'w': // 1 string to match. |
| 6804 | return MCK_vrmaxuw; // "vrmaxuw" |
| 6805 | } |
| 6806 | break; |
| 6807 | case 'i': // 2 strings to match. |
| 6808 | if (memcmp(Name.data()+4, "nu" , 2) != 0) |
| 6809 | break; |
| 6810 | switch (Name[6]) { |
| 6811 | default: break; |
| 6812 | case 'h': // 1 string to match. |
| 6813 | return MCK_vrminuh; // "vrminuh" |
| 6814 | case 'w': // 1 string to match. |
| 6815 | return MCK_vrminuw; // "vrminuw" |
| 6816 | } |
| 6817 | break; |
| 6818 | case 'p': // 2 strings to match. |
| 6819 | if (Name[4] != 'y') |
| 6820 | break; |
| 6821 | switch (Name[5]) { |
| 6822 | default: break; |
| 6823 | case 'b': // 1 string to match. |
| 6824 | if (Name[6] != 'u') |
| 6825 | break; |
| 6826 | return MCK_vrmpybu; // "vrmpybu" |
| 6827 | case 'u': // 1 string to match. |
| 6828 | if (Name[6] != 'b') |
| 6829 | break; |
| 6830 | return MCK_vrmpyub; // "vrmpyub" |
| 6831 | } |
| 6832 | break; |
| 6833 | } |
| 6834 | break; |
| 6835 | case 's': // 1 string to match. |
| 6836 | if (memcmp(Name.data()+3, "adub" , 4) != 0) |
| 6837 | break; |
| 6838 | return MCK_vrsadub; // "vrsadub" |
| 6839 | } |
| 6840 | break; |
| 6841 | case 's': // 8 strings to match. |
| 6842 | switch (Name[2]) { |
| 6843 | default: break; |
| 6844 | case 'a': // 2 strings to match. |
| 6845 | if (Name[3] != 't') |
| 6846 | break; |
| 6847 | switch (Name[4]) { |
| 6848 | default: break; |
| 6849 | case 'h': // 1 string to match. |
| 6850 | if (memcmp(Name.data()+5, "ub" , 2) != 0) |
| 6851 | break; |
| 6852 | return MCK_vsathub; // "vsathub" |
| 6853 | case 'w': // 1 string to match. |
| 6854 | if (memcmp(Name.data()+5, "uh" , 2) != 0) |
| 6855 | break; |
| 6856 | return MCK_vsatwuh; // "vsatwuh" |
| 6857 | } |
| 6858 | break; |
| 6859 | case 'h': // 4 strings to match. |
| 6860 | if (memcmp(Name.data()+3, "uff" , 3) != 0) |
| 6861 | break; |
| 6862 | switch (Name[6]) { |
| 6863 | default: break; |
| 6864 | case 'b': // 1 string to match. |
| 6865 | return MCK_vshuffb; // "vshuffb" |
| 6866 | case 'e': // 1 string to match. |
| 6867 | return MCK_vshuffe; // "vshuffe" |
| 6868 | case 'h': // 1 string to match. |
| 6869 | return MCK_vshuffh; // "vshuffh" |
| 6870 | case 'o': // 1 string to match. |
| 6871 | return MCK_vshuffo; // "vshuffo" |
| 6872 | } |
| 6873 | break; |
| 6874 | case 'p': // 2 strings to match. |
| 6875 | if (memcmp(Name.data()+3, "lat" , 3) != 0) |
| 6876 | break; |
| 6877 | switch (Name[6]) { |
| 6878 | default: break; |
| 6879 | case 'b': // 1 string to match. |
| 6880 | return MCK_vsplatb; // "vsplatb" |
| 6881 | case 'h': // 1 string to match. |
| 6882 | return MCK_vsplath; // "vsplath" |
| 6883 | } |
| 6884 | break; |
| 6885 | } |
| 6886 | break; |
| 6887 | case 't': // 1 string to match. |
| 6888 | if (memcmp(Name.data()+2, "mpyhb" , 5) != 0) |
| 6889 | break; |
| 6890 | return MCK_vtmpyhb; // "vtmpyhb" |
| 6891 | case 'u': // 1 string to match. |
| 6892 | if (memcmp(Name.data()+2, "npack" , 5) != 0) |
| 6893 | break; |
| 6894 | return MCK_vunpack; // "vunpack" |
| 6895 | } |
| 6896 | break; |
| 6897 | } |
| 6898 | break; |
| 6899 | case 8: // 67 strings to match. |
| 6900 | switch (Name[0]) { |
| 6901 | default: break; |
| 6902 | case 'b': // 1 string to match. |
| 6903 | if (memcmp(Name.data()+1, "itsplit" , 7) != 0) |
| 6904 | break; |
| 6905 | return MCK_bitsplit; // "bitsplit" |
| 6906 | case 'd': // 4 strings to match. |
| 6907 | switch (Name[1]) { |
| 6908 | default: break; |
| 6909 | case 'c': // 2 strings to match. |
| 6910 | switch (Name[2]) { |
| 6911 | default: break; |
| 6912 | case 'c': // 1 string to match. |
| 6913 | if (memcmp(Name.data()+3, "leana" , 5) != 0) |
| 6914 | break; |
| 6915 | return MCK_dccleana; // "dccleana" |
| 6916 | case 'i': // 1 string to match. |
| 6917 | if (memcmp(Name.data()+3, "nvidx" , 5) != 0) |
| 6918 | break; |
| 6919 | return MCK_dcinvidx; // "dcinvidx" |
| 6920 | } |
| 6921 | break; |
| 6922 | case 'f': // 1 string to match. |
| 6923 | if (memcmp(Name.data()+2, "mpyfix" , 6) != 0) |
| 6924 | break; |
| 6925 | return MCK_dfmpyfix; // "dfmpyfix" |
| 6926 | case 'm': // 1 string to match. |
| 6927 | if (memcmp(Name.data()+2, "resume" , 6) != 0) |
| 6928 | break; |
| 6929 | return MCK_dmresume; // "dmresume" |
| 6930 | } |
| 6931 | break; |
| 6932 | case 'e': // 3 strings to match. |
| 6933 | switch (Name[1]) { |
| 6934 | default: break; |
| 6935 | case 'n': // 2 strings to match. |
| 6936 | if (memcmp(Name.data()+2, "dloop" , 5) != 0) |
| 6937 | break; |
| 6938 | switch (Name[7]) { |
| 6939 | default: break; |
| 6940 | case '0': // 1 string to match. |
| 6941 | return MCK_endloop0; // "endloop0" |
| 6942 | case '1': // 1 string to match. |
| 6943 | return MCK_endloop1; // "endloop1" |
| 6944 | } |
| 6945 | break; |
| 6946 | case 'x': // 1 string to match. |
| 6947 | if (memcmp(Name.data()+2, "tractu" , 6) != 0) |
| 6948 | break; |
| 6949 | return MCK_extractu; // "extractu" |
| 6950 | } |
| 6951 | break; |
| 6952 | case 'g': // 1 string to match. |
| 6953 | if (memcmp(Name.data()+1, "etimask" , 7) != 0) |
| 6954 | break; |
| 6955 | return MCK_getimask; // "getimask" |
| 6956 | case 'i': // 3 strings to match. |
| 6957 | switch (Name[1]) { |
| 6958 | default: break; |
| 6959 | case 'a': // 2 strings to match. |
| 6960 | if (memcmp(Name.data()+2, "ssign" , 5) != 0) |
| 6961 | break; |
| 6962 | switch (Name[7]) { |
| 6963 | default: break; |
| 6964 | case 'r': // 1 string to match. |
| 6965 | return MCK_iassignr; // "iassignr" |
| 6966 | case 'w': // 1 string to match. |
| 6967 | return MCK_iassignw; // "iassignw" |
| 6968 | } |
| 6969 | break; |
| 6970 | case 'c': // 1 string to match. |
| 6971 | if (memcmp(Name.data()+2, "invidx" , 6) != 0) |
| 6972 | break; |
| 6973 | return MCK_icinvidx; // "icinvidx" |
| 6974 | } |
| 6975 | break; |
| 6976 | case 'k': // 1 string to match. |
| 6977 | if (memcmp(Name.data()+1, "0unlock" , 7) != 0) |
| 6978 | break; |
| 6979 | return MCK_k0unlock; // "k0unlock" |
| 6980 | case 'l': // 2 strings to match. |
| 6981 | if (Name[1] != '2') |
| 6982 | break; |
| 6983 | switch (Name[2]) { |
| 6984 | default: break; |
| 6985 | case 'g': // 1 string to match. |
| 6986 | if (memcmp(Name.data()+3, "clean" , 5) != 0) |
| 6987 | break; |
| 6988 | return MCK_l2gclean; // "l2gclean" |
| 6989 | case 'i': // 1 string to match. |
| 6990 | if (memcmp(Name.data()+3, "nvidx" , 5) != 0) |
| 6991 | break; |
| 6992 | return MCK_l2invidx; // "l2invidx" |
| 6993 | } |
| 6994 | break; |
| 6995 | case 'p': // 1 string to match. |
| 6996 | if (memcmp(Name.data()+1, "opcount" , 7) != 0) |
| 6997 | break; |
| 6998 | return MCK_popcount; // "popcount" |
| 6999 | case 's': // 8 strings to match. |
| 7000 | switch (Name[1]) { |
| 7001 | default: break; |
| 7002 | case 'e': // 1 string to match. |
| 7003 | if (memcmp(Name.data()+2, "timask" , 6) != 0) |
| 7004 | break; |
| 7005 | return MCK_setimask; // "setimask" |
| 7006 | case 'f': // 4 strings to match. |
| 7007 | switch (Name[2]) { |
| 7008 | default: break; |
| 7009 | case 'f': // 3 strings to match. |
| 7010 | if (memcmp(Name.data()+3, "ixup" , 4) != 0) |
| 7011 | break; |
| 7012 | switch (Name[7]) { |
| 7013 | default: break; |
| 7014 | case 'd': // 1 string to match. |
| 7015 | return MCK_sffixupd; // "sffixupd" |
| 7016 | case 'n': // 1 string to match. |
| 7017 | return MCK_sffixupn; // "sffixupn" |
| 7018 | case 'r': // 1 string to match. |
| 7019 | return MCK_sffixupr; // "sffixupr" |
| 7020 | } |
| 7021 | break; |
| 7022 | case 'r': // 1 string to match. |
| 7023 | if (memcmp(Name.data()+3, "ecipa" , 5) != 0) |
| 7024 | break; |
| 7025 | return MCK_sfrecipa; // "sfrecipa" |
| 7026 | } |
| 7027 | break; |
| 7028 | case 'p': // 3 strings to match. |
| 7029 | switch (Name[2]) { |
| 7030 | default: break; |
| 7031 | case '1': // 1 string to match. |
| 7032 | if (memcmp(Name.data()+3, "loop0" , 5) != 0) |
| 7033 | break; |
| 7034 | return MCK_sp1loop0; // "sp1loop0" |
| 7035 | case '2': // 1 string to match. |
| 7036 | if (memcmp(Name.data()+3, "loop0" , 5) != 0) |
| 7037 | break; |
| 7038 | return MCK_sp2loop0; // "sp2loop0" |
| 7039 | case '3': // 1 string to match. |
| 7040 | if (memcmp(Name.data()+3, "loop0" , 5) != 0) |
| 7041 | break; |
| 7042 | return MCK_sp3loop0; // "sp3loop0" |
| 7043 | } |
| 7044 | break; |
| 7045 | } |
| 7046 | break; |
| 7047 | case 't': // 1 string to match. |
| 7048 | if (memcmp(Name.data()+1, "lbmatch" , 7) != 0) |
| 7049 | break; |
| 7050 | return MCK_tlbmatch; // "tlbmatch" |
| 7051 | case 'v': // 41 strings to match. |
| 7052 | switch (Name[1]) { |
| 7053 | default: break; |
| 7054 | case 'a': // 2 strings to match. |
| 7055 | switch (Name[2]) { |
| 7056 | default: break; |
| 7057 | case 'b': // 1 string to match. |
| 7058 | if (memcmp(Name.data()+3, "sdiff" , 5) != 0) |
| 7059 | break; |
| 7060 | return MCK_vabsdiff; // "vabsdiff" |
| 7061 | case 's': // 1 string to match. |
| 7062 | if (memcmp(Name.data()+3, "rinto" , 5) != 0) |
| 7063 | break; |
| 7064 | return MCK_vasrinto; // "vasrinto" |
| 7065 | } |
| 7066 | break; |
| 7067 | case 'c': // 2 strings to match. |
| 7068 | switch (Name[2]) { |
| 7069 | default: break; |
| 7070 | case 'o': // 1 string to match. |
| 7071 | if (memcmp(Name.data()+3, "mbine" , 5) != 0) |
| 7072 | break; |
| 7073 | return MCK_vcombine; // "vcombine" |
| 7074 | case 'r': // 1 string to match. |
| 7075 | if (memcmp(Name.data()+3, "otate" , 5) != 0) |
| 7076 | break; |
| 7077 | return MCK_vcrotate; // "vcrotate" |
| 7078 | } |
| 7079 | break; |
| 7080 | case 'd': // 4 strings to match. |
| 7081 | switch (Name[2]) { |
| 7082 | default: break; |
| 7083 | case 'e': // 1 string to match. |
| 7084 | if (memcmp(Name.data()+3, "alb4w" , 5) != 0) |
| 7085 | break; |
| 7086 | return MCK_vdealb4w; // "vdealb4w" |
| 7087 | case 'm': // 3 strings to match. |
| 7088 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 7089 | break; |
| 7090 | switch (Name[5]) { |
| 7091 | default: break; |
| 7092 | case 'b': // 2 strings to match. |
| 7093 | switch (Name[6]) { |
| 7094 | default: break; |
| 7095 | case 's': // 1 string to match. |
| 7096 | if (Name[7] != 'u') |
| 7097 | break; |
| 7098 | return MCK_vdmpybsu; // "vdmpybsu" |
| 7099 | case 'u': // 1 string to match. |
| 7100 | if (Name[7] != 's') |
| 7101 | break; |
| 7102 | return MCK_vdmpybus; // "vdmpybus" |
| 7103 | } |
| 7104 | break; |
| 7105 | case 'h': // 1 string to match. |
| 7106 | if (memcmp(Name.data()+6, "su" , 2) != 0) |
| 7107 | break; |
| 7108 | return MCK_vdmpyhsu; // "vdmpyhsu" |
| 7109 | } |
| 7110 | break; |
| 7111 | } |
| 7112 | break; |
| 7113 | case 'e': // 1 string to match. |
| 7114 | if (memcmp(Name.data()+2, "xtract" , 6) != 0) |
| 7115 | break; |
| 7116 | return MCK_vextract; // "vextract" |
| 7117 | case 'm': // 6 strings to match. |
| 7118 | if (memcmp(Name.data()+2, "py" , 2) != 0) |
| 7119 | break; |
| 7120 | switch (Name[4]) { |
| 7121 | default: break; |
| 7122 | case 'e': // 1 string to match. |
| 7123 | if (memcmp(Name.data()+5, "wuh" , 3) != 0) |
| 7124 | break; |
| 7125 | return MCK_vmpyewuh; // "vmpyewuh" |
| 7126 | case 'i': // 3 strings to match. |
| 7127 | switch (Name[5]) { |
| 7128 | default: break; |
| 7129 | case 'e': // 1 string to match. |
| 7130 | if (memcmp(Name.data()+6, "wh" , 2) != 0) |
| 7131 | break; |
| 7132 | return MCK_vmpyiewh; // "vmpyiewh" |
| 7133 | case 'o': // 1 string to match. |
| 7134 | if (memcmp(Name.data()+6, "wh" , 2) != 0) |
| 7135 | break; |
| 7136 | return MCK_vmpyiowh; // "vmpyiowh" |
| 7137 | case 'w': // 1 string to match. |
| 7138 | if (memcmp(Name.data()+6, "ub" , 2) != 0) |
| 7139 | break; |
| 7140 | return MCK_vmpyiwub; // "vmpyiwub" |
| 7141 | } |
| 7142 | break; |
| 7143 | case 'w': // 2 strings to match. |
| 7144 | switch (Name[5]) { |
| 7145 | default: break; |
| 7146 | case 'e': // 1 string to match. |
| 7147 | if (memcmp(Name.data()+6, "uh" , 2) != 0) |
| 7148 | break; |
| 7149 | return MCK_vmpyweuh; // "vmpyweuh" |
| 7150 | case 'o': // 1 string to match. |
| 7151 | if (memcmp(Name.data()+6, "uh" , 2) != 0) |
| 7152 | break; |
| 7153 | return MCK_vmpywouh; // "vmpywouh" |
| 7154 | } |
| 7155 | break; |
| 7156 | } |
| 7157 | break; |
| 7158 | case 'n': // 1 string to match. |
| 7159 | if (memcmp(Name.data()+2, "ormamt" , 6) != 0) |
| 7160 | break; |
| 7161 | return MCK_vnormamt; // "vnormamt" |
| 7162 | case 'p': // 2 strings to match. |
| 7163 | if (memcmp(Name.data()+2, "ack" , 3) != 0) |
| 7164 | break; |
| 7165 | switch (Name[5]) { |
| 7166 | default: break; |
| 7167 | case 'h': // 1 string to match. |
| 7168 | if (memcmp(Name.data()+6, "ub" , 2) != 0) |
| 7169 | break; |
| 7170 | return MCK_vpackhub; // "vpackhub" |
| 7171 | case 'w': // 1 string to match. |
| 7172 | if (memcmp(Name.data()+6, "uh" , 2) != 0) |
| 7173 | break; |
| 7174 | return MCK_vpackwuh; // "vpackwuh" |
| 7175 | } |
| 7176 | break; |
| 7177 | case 'r': // 7 strings to match. |
| 7178 | switch (Name[2]) { |
| 7179 | default: break; |
| 7180 | case '1': // 1 string to match. |
| 7181 | if (memcmp(Name.data()+3, "6mpyz" , 5) != 0) |
| 7182 | break; |
| 7183 | return MCK_vr16mpyz; // "vr16mpyz" |
| 7184 | case 'm': // 4 strings to match. |
| 7185 | if (memcmp(Name.data()+3, "py" , 2) != 0) |
| 7186 | break; |
| 7187 | switch (Name[5]) { |
| 7188 | default: break; |
| 7189 | case 'b': // 2 strings to match. |
| 7190 | switch (Name[6]) { |
| 7191 | default: break; |
| 7192 | case 's': // 1 string to match. |
| 7193 | if (Name[7] != 'u') |
| 7194 | break; |
| 7195 | return MCK_vrmpybsu; // "vrmpybsu" |
| 7196 | case 'u': // 1 string to match. |
| 7197 | if (Name[7] != 's') |
| 7198 | break; |
| 7199 | return MCK_vrmpybus; // "vrmpybus" |
| 7200 | } |
| 7201 | break; |
| 7202 | case 'w': // 2 strings to match. |
| 7203 | switch (Name[6]) { |
| 7204 | default: break; |
| 7205 | case 'e': // 1 string to match. |
| 7206 | if (Name[7] != 'h') |
| 7207 | break; |
| 7208 | return MCK_vrmpyweh; // "vrmpyweh" |
| 7209 | case 'o': // 1 string to match. |
| 7210 | if (Name[7] != 'h') |
| 7211 | break; |
| 7212 | return MCK_vrmpywoh; // "vrmpywoh" |
| 7213 | } |
| 7214 | break; |
| 7215 | } |
| 7216 | break; |
| 7217 | case 'o': // 2 strings to match. |
| 7218 | if (memcmp(Name.data()+3, "und" , 3) != 0) |
| 7219 | break; |
| 7220 | switch (Name[6]) { |
| 7221 | default: break; |
| 7222 | case 'h': // 1 string to match. |
| 7223 | if (Name[7] != 'b') |
| 7224 | break; |
| 7225 | return MCK_vroundhb; // "vroundhb" |
| 7226 | case 'w': // 1 string to match. |
| 7227 | if (Name[7] != 'h') |
| 7228 | break; |
| 7229 | return MCK_vroundwh; // "vroundwh" |
| 7230 | } |
| 7231 | break; |
| 7232 | } |
| 7233 | break; |
| 7234 | case 's': // 8 strings to match. |
| 7235 | switch (Name[2]) { |
| 7236 | default: break; |
| 7237 | case 'a': // 1 string to match. |
| 7238 | if (memcmp(Name.data()+3, "tuwuh" , 5) != 0) |
| 7239 | break; |
| 7240 | return MCK_vsatuwuh; // "vsatuwuh" |
| 7241 | case 'c': // 1 string to match. |
| 7242 | if (memcmp(Name.data()+3, "atter" , 5) != 0) |
| 7243 | break; |
| 7244 | return MCK_vscatter; // "vscatter" |
| 7245 | case 'h': // 5 strings to match. |
| 7246 | if (memcmp(Name.data()+3, "uff" , 3) != 0) |
| 7247 | break; |
| 7248 | switch (Name[6]) { |
| 7249 | default: break; |
| 7250 | case 'e': // 2 strings to match. |
| 7251 | switch (Name[7]) { |
| 7252 | default: break; |
| 7253 | case 'b': // 1 string to match. |
| 7254 | return MCK_vshuffeb; // "vshuffeb" |
| 7255 | case 'h': // 1 string to match. |
| 7256 | return MCK_vshuffeh; // "vshuffeh" |
| 7257 | } |
| 7258 | break; |
| 7259 | case 'o': // 3 strings to match. |
| 7260 | switch (Name[7]) { |
| 7261 | default: break; |
| 7262 | case 'b': // 1 string to match. |
| 7263 | return MCK_vshuffob; // "vshuffob" |
| 7264 | case 'e': // 1 string to match. |
| 7265 | return MCK_vshuffoe; // "vshuffoe" |
| 7266 | case 'h': // 1 string to match. |
| 7267 | return MCK_vshuffoh; // "vshuffoh" |
| 7268 | } |
| 7269 | break; |
| 7270 | } |
| 7271 | break; |
| 7272 | case 'p': // 1 string to match. |
| 7273 | if (memcmp(Name.data()+3, "liceb" , 5) != 0) |
| 7274 | break; |
| 7275 | return MCK_vspliceb; // "vspliceb" |
| 7276 | } |
| 7277 | break; |
| 7278 | case 't': // 5 strings to match. |
| 7279 | switch (Name[2]) { |
| 7280 | default: break; |
| 7281 | case 'm': // 1 string to match. |
| 7282 | if (memcmp(Name.data()+3, "pybus" , 5) != 0) |
| 7283 | break; |
| 7284 | return MCK_vtmpybus; // "vtmpybus" |
| 7285 | case 'r': // 4 strings to match. |
| 7286 | if (memcmp(Name.data()+3, "un" , 2) != 0) |
| 7287 | break; |
| 7288 | switch (Name[5]) { |
| 7289 | default: break; |
| 7290 | case 'e': // 2 strings to match. |
| 7291 | switch (Name[6]) { |
| 7292 | default: break; |
| 7293 | case 'h': // 1 string to match. |
| 7294 | if (Name[7] != 'b') |
| 7295 | break; |
| 7296 | return MCK_vtrunehb; // "vtrunehb" |
| 7297 | case 'w': // 1 string to match. |
| 7298 | if (Name[7] != 'h') |
| 7299 | break; |
| 7300 | return MCK_vtrunewh; // "vtrunewh" |
| 7301 | } |
| 7302 | break; |
| 7303 | case 'o': // 2 strings to match. |
| 7304 | switch (Name[6]) { |
| 7305 | default: break; |
| 7306 | case 'h': // 1 string to match. |
| 7307 | if (Name[7] != 'b') |
| 7308 | break; |
| 7309 | return MCK_vtrunohb; // "vtrunohb" |
| 7310 | case 'w': // 1 string to match. |
| 7311 | if (Name[7] != 'h') |
| 7312 | break; |
| 7313 | return MCK_vtrunowh; // "vtrunowh" |
| 7314 | } |
| 7315 | break; |
| 7316 | } |
| 7317 | break; |
| 7318 | } |
| 7319 | break; |
| 7320 | case 'u': // 3 strings to match. |
| 7321 | if (memcmp(Name.data()+2, "npack" , 5) != 0) |
| 7322 | break; |
| 7323 | switch (Name[7]) { |
| 7324 | default: break; |
| 7325 | case 'b': // 1 string to match. |
| 7326 | return MCK_vunpackb; // "vunpackb" |
| 7327 | case 'h': // 1 string to match. |
| 7328 | return MCK_vunpackh; // "vunpackh" |
| 7329 | case 'o': // 1 string to match. |
| 7330 | return MCK_vunpacko; // "vunpacko" |
| 7331 | } |
| 7332 | break; |
| 7333 | } |
| 7334 | break; |
| 7335 | case 'z': // 1 string to match. |
| 7336 | if (memcmp(Name.data()+1, "extract" , 7) != 0) |
| 7337 | break; |
| 7338 | return MCK_zextract; // "zextract" |
| 7339 | } |
| 7340 | break; |
| 7341 | case 9: // 39 strings to match. |
| 7342 | switch (Name[0]) { |
| 7343 | default: break; |
| 7344 | case 'e': // 1 string to match. |
| 7345 | if (memcmp(Name.data()+1, "ndloop01" , 8) != 0) |
| 7346 | break; |
| 7347 | return MCK_endloop01; // "endloop01" |
| 7348 | case 'l': // 2 strings to match. |
| 7349 | if (Name[1] != '2') |
| 7350 | break; |
| 7351 | switch (Name[2]) { |
| 7352 | default: break; |
| 7353 | case 'g': // 1 string to match. |
| 7354 | if (memcmp(Name.data()+3, "unlock" , 6) != 0) |
| 7355 | break; |
| 7356 | return MCK_l2gunlock; // "l2gunlock" |
| 7357 | case 'u': // 1 string to match. |
| 7358 | if (memcmp(Name.data()+3, "nlocka" , 6) != 0) |
| 7359 | break; |
| 7360 | return MCK_l2unlocka; // "l2unlocka" |
| 7361 | } |
| 7362 | break; |
| 7363 | case 'm': // 3 strings to match. |
| 7364 | if (memcmp(Name.data()+1, "em" , 2) != 0) |
| 7365 | break; |
| 7366 | switch (Name[3]) { |
| 7367 | default: break; |
| 7368 | case 'b': // 1 string to match. |
| 7369 | if (memcmp(Name.data()+4, "_fifo" , 5) != 0) |
| 7370 | break; |
| 7371 | return MCK_memb_95_fifo; // "memb_fifo" |
| 7372 | case 'h': // 1 string to match. |
| 7373 | if (memcmp(Name.data()+4, "_fifo" , 5) != 0) |
| 7374 | break; |
| 7375 | return MCK_memh_95_fifo; // "memh_fifo" |
| 7376 | case 'w': // 1 string to match. |
| 7377 | if (memcmp(Name.data()+4, "_phys" , 5) != 0) |
| 7378 | break; |
| 7379 | return MCK_memw_95_phys; // "memw_phys" |
| 7380 | } |
| 7381 | break; |
| 7382 | case 'p': // 1 string to match. |
| 7383 | if (memcmp(Name.data()+1, "refixsum" , 8) != 0) |
| 7384 | break; |
| 7385 | return MCK_prefixsum; // "prefixsum" |
| 7386 | case 't': // 6 strings to match. |
| 7387 | switch (Name[1]) { |
| 7388 | default: break; |
| 7389 | case 'a': // 4 strings to match. |
| 7390 | if (memcmp(Name.data()+2, "bleidx" , 6) != 0) |
| 7391 | break; |
| 7392 | switch (Name[8]) { |
| 7393 | default: break; |
| 7394 | case 'b': // 1 string to match. |
| 7395 | return MCK_tableidxb; // "tableidxb" |
| 7396 | case 'd': // 1 string to match. |
| 7397 | return MCK_tableidxd; // "tableidxd" |
| 7398 | case 'h': // 1 string to match. |
| 7399 | return MCK_tableidxh; // "tableidxh" |
| 7400 | case 'w': // 1 string to match. |
| 7401 | return MCK_tableidxw; // "tableidxw" |
| 7402 | } |
| 7403 | break; |
| 7404 | case 'l': // 1 string to match. |
| 7405 | if (memcmp(Name.data()+2, "bunlock" , 7) != 0) |
| 7406 | break; |
| 7407 | return MCK_tlbunlock; // "tlbunlock" |
| 7408 | case 'o': // 1 string to match. |
| 7409 | if (memcmp(Name.data()+2, "gglebit" , 7) != 0) |
| 7410 | break; |
| 7411 | return MCK_togglebit; // "togglebit" |
| 7412 | } |
| 7413 | break; |
| 7414 | case 'v': // 26 strings to match. |
| 7415 | switch (Name[1]) { |
| 7416 | default: break; |
| 7417 | case 'a': // 3 strings to match. |
| 7418 | if (memcmp(Name.data()+2, "bsdiff" , 6) != 0) |
| 7419 | break; |
| 7420 | switch (Name[8]) { |
| 7421 | default: break; |
| 7422 | case 'b': // 1 string to match. |
| 7423 | return MCK_vabsdiffb; // "vabsdiffb" |
| 7424 | case 'h': // 1 string to match. |
| 7425 | return MCK_vabsdiffh; // "vabsdiffh" |
| 7426 | case 'w': // 1 string to match. |
| 7427 | return MCK_vabsdiffw; // "vabsdiffw" |
| 7428 | } |
| 7429 | break; |
| 7430 | case 'g': // 1 string to match. |
| 7431 | if (memcmp(Name.data()+2, "etqfext" , 7) != 0) |
| 7432 | break; |
| 7433 | return MCK_vgetqfext; // "vgetqfext" |
| 7434 | case 'm': // 1 string to match. |
| 7435 | if (memcmp(Name.data()+2, "pyiewuh" , 7) != 0) |
| 7436 | break; |
| 7437 | return MCK_vmpyiewuh; // "vmpyiewuh" |
| 7438 | case 'n': // 2 strings to match. |
| 7439 | if (memcmp(Name.data()+2, "ormamt" , 6) != 0) |
| 7440 | break; |
| 7441 | switch (Name[8]) { |
| 7442 | default: break; |
| 7443 | case 'h': // 1 string to match. |
| 7444 | return MCK_vnormamth; // "vnormamth" |
| 7445 | case 'w': // 1 string to match. |
| 7446 | return MCK_vnormamtw; // "vnormamtw" |
| 7447 | } |
| 7448 | break; |
| 7449 | case 'p': // 1 string to match. |
| 7450 | if (memcmp(Name.data()+2, "opcount" , 7) != 0) |
| 7451 | break; |
| 7452 | return MCK_vpopcount; // "vpopcount" |
| 7453 | case 'r': // 4 strings to match. |
| 7454 | switch (Name[2]) { |
| 7455 | default: break; |
| 7456 | case '1': // 1 string to match. |
| 7457 | if (memcmp(Name.data()+3, "6mpyzs" , 6) != 0) |
| 7458 | break; |
| 7459 | return MCK_vr16mpyzs; // "vr16mpyzs" |
| 7460 | case 'c': // 1 string to match. |
| 7461 | if (memcmp(Name.data()+3, "rotate" , 6) != 0) |
| 7462 | break; |
| 7463 | return MCK_vrcrotate; // "vrcrotate" |
| 7464 | case 'o': // 2 strings to match. |
| 7465 | if (memcmp(Name.data()+3, "und" , 3) != 0) |
| 7466 | break; |
| 7467 | switch (Name[6]) { |
| 7468 | default: break; |
| 7469 | case 'h': // 1 string to match. |
| 7470 | if (memcmp(Name.data()+7, "ub" , 2) != 0) |
| 7471 | break; |
| 7472 | return MCK_vroundhub; // "vroundhub" |
| 7473 | case 'w': // 1 string to match. |
| 7474 | if (memcmp(Name.data()+7, "uh" , 2) != 0) |
| 7475 | break; |
| 7476 | return MCK_vroundwuh; // "vroundwuh" |
| 7477 | } |
| 7478 | break; |
| 7479 | } |
| 7480 | break; |
| 7481 | case 's': // 3 strings to match. |
| 7482 | switch (Name[2]) { |
| 7483 | default: break; |
| 7484 | case 'e': // 1 string to match. |
| 7485 | if (memcmp(Name.data()+3, "tqfext" , 6) != 0) |
| 7486 | break; |
| 7487 | return MCK_vsetqfext; // "vsetqfext" |
| 7488 | case 'h': // 2 strings to match. |
| 7489 | if (memcmp(Name.data()+3, "uffoe" , 5) != 0) |
| 7490 | break; |
| 7491 | switch (Name[8]) { |
| 7492 | default: break; |
| 7493 | case 'b': // 1 string to match. |
| 7494 | return MCK_vshuffoeb; // "vshuffoeb" |
| 7495 | case 'h': // 1 string to match. |
| 7496 | return MCK_vshuffoeh; // "vshuffoeh" |
| 7497 | } |
| 7498 | break; |
| 7499 | } |
| 7500 | break; |
| 7501 | case 't': // 1 string to match. |
| 7502 | if (memcmp(Name.data()+2, "rans2x2" , 7) != 0) |
| 7503 | break; |
| 7504 | return MCK_vtrans2x2; // "vtrans2x2" |
| 7505 | case 'u': // 4 strings to match. |
| 7506 | if (memcmp(Name.data()+2, "npack" , 5) != 0) |
| 7507 | break; |
| 7508 | switch (Name[7]) { |
| 7509 | default: break; |
| 7510 | case 'o': // 2 strings to match. |
| 7511 | switch (Name[8]) { |
| 7512 | default: break; |
| 7513 | case 'b': // 1 string to match. |
| 7514 | return MCK_vunpackob; // "vunpackob" |
| 7515 | case 'h': // 1 string to match. |
| 7516 | return MCK_vunpackoh; // "vunpackoh" |
| 7517 | } |
| 7518 | break; |
| 7519 | case 'u': // 2 strings to match. |
| 7520 | switch (Name[8]) { |
| 7521 | default: break; |
| 7522 | case 'b': // 1 string to match. |
| 7523 | return MCK_vunpackub; // "vunpackub" |
| 7524 | case 'h': // 1 string to match. |
| 7525 | return MCK_vunpackuh; // "vunpackuh" |
| 7526 | } |
| 7527 | break; |
| 7528 | } |
| 7529 | break; |
| 7530 | case 'w': // 2 strings to match. |
| 7531 | if (memcmp(Name.data()+2, "hist" , 4) != 0) |
| 7532 | break; |
| 7533 | switch (Name[6]) { |
| 7534 | default: break; |
| 7535 | case '1': // 1 string to match. |
| 7536 | if (memcmp(Name.data()+7, "28" , 2) != 0) |
| 7537 | break; |
| 7538 | return MCK_vwhist128; // "vwhist128" |
| 7539 | case '2': // 1 string to match. |
| 7540 | if (memcmp(Name.data()+7, "56" , 2) != 0) |
| 7541 | break; |
| 7542 | return MCK_vwhist256; // "vwhist256" |
| 7543 | } |
| 7544 | break; |
| 7545 | case 'x': // 4 strings to match. |
| 7546 | switch (Name[2]) { |
| 7547 | default: break; |
| 7548 | case 'a': // 2 strings to match. |
| 7549 | if (memcmp(Name.data()+3, "ddsub" , 5) != 0) |
| 7550 | break; |
| 7551 | switch (Name[8]) { |
| 7552 | default: break; |
| 7553 | case 'h': // 1 string to match. |
| 7554 | return MCK_vxaddsubh; // "vxaddsubh" |
| 7555 | case 'w': // 1 string to match. |
| 7556 | return MCK_vxaddsubw; // "vxaddsubw" |
| 7557 | } |
| 7558 | break; |
| 7559 | case 's': // 2 strings to match. |
| 7560 | if (memcmp(Name.data()+3, "ubadd" , 5) != 0) |
| 7561 | break; |
| 7562 | switch (Name[8]) { |
| 7563 | default: break; |
| 7564 | case 'h': // 1 string to match. |
| 7565 | return MCK_vxsubaddh; // "vxsubaddh" |
| 7566 | case 'w': // 1 string to match. |
| 7567 | return MCK_vxsubaddw; // "vxsubaddw" |
| 7568 | } |
| 7569 | break; |
| 7570 | } |
| 7571 | break; |
| 7572 | } |
| 7573 | break; |
| 7574 | } |
| 7575 | break; |
| 7576 | case 10: // 12 strings to match. |
| 7577 | switch (Name[0]) { |
| 7578 | default: break; |
| 7579 | case 'a': // 1 string to match. |
| 7580 | if (memcmp(Name.data()+1, "llocframe" , 9) != 0) |
| 7581 | break; |
| 7582 | return MCK_allocframe; // "allocframe" |
| 7583 | case 'd': // 2 strings to match. |
| 7584 | switch (Name[1]) { |
| 7585 | default: break; |
| 7586 | case 'c': // 1 string to match. |
| 7587 | if (memcmp(Name.data()+2, "cleanidx" , 8) != 0) |
| 7588 | break; |
| 7589 | return MCK_dccleanidx; // "dccleanidx" |
| 7590 | case 'e': // 1 string to match. |
| 7591 | if (memcmp(Name.data()+2, "precated" , 8) != 0) |
| 7592 | break; |
| 7593 | return MCK_deprecated; // "deprecated" |
| 7594 | } |
| 7595 | break; |
| 7596 | case 'i': // 1 string to match. |
| 7597 | if (memcmp(Name.data()+1, "nterleave" , 9) != 0) |
| 7598 | break; |
| 7599 | return MCK_interleave; // "interleave" |
| 7600 | case 'l': // 1 string to match. |
| 7601 | if (memcmp(Name.data()+1, "2cleanidx" , 9) != 0) |
| 7602 | break; |
| 7603 | return MCK_l2cleanidx; // "l2cleanidx" |
| 7604 | case 's': // 1 string to match. |
| 7605 | if (memcmp(Name.data()+1, "finvsqrta" , 9) != 0) |
| 7606 | break; |
| 7607 | return MCK_sfinvsqrta; // "sfinvsqrta" |
| 7608 | case 't': // 1 string to match. |
| 7609 | if (memcmp(Name.data()+1, "lbinvasid" , 9) != 0) |
| 7610 | break; |
| 7611 | return MCK_tlbinvasid; // "tlbinvasid" |
| 7612 | case 'v': // 5 strings to match. |
| 7613 | switch (Name[1]) { |
| 7614 | default: break; |
| 7615 | case 'a': // 2 strings to match. |
| 7616 | if (memcmp(Name.data()+2, "bsdiffu" , 7) != 0) |
| 7617 | break; |
| 7618 | switch (Name[9]) { |
| 7619 | default: break; |
| 7620 | case 'b': // 1 string to match. |
| 7621 | return MCK_vabsdiffub; // "vabsdiffub" |
| 7622 | case 'h': // 1 string to match. |
| 7623 | return MCK_vabsdiffuh; // "vabsdiffuh" |
| 7624 | } |
| 7625 | break; |
| 7626 | case 'p': // 1 string to match. |
| 7627 | if (memcmp(Name.data()+2, "opcounth" , 8) != 0) |
| 7628 | break; |
| 7629 | return MCK_vpopcounth; // "vpopcounth" |
| 7630 | case 'r': // 2 strings to match. |
| 7631 | if (memcmp(Name.data()+2, "oundu" , 5) != 0) |
| 7632 | break; |
| 7633 | switch (Name[7]) { |
| 7634 | default: break; |
| 7635 | case 'h': // 1 string to match. |
| 7636 | if (memcmp(Name.data()+8, "ub" , 2) != 0) |
| 7637 | break; |
| 7638 | return MCK_vrounduhub; // "vrounduhub" |
| 7639 | case 'w': // 1 string to match. |
| 7640 | if (memcmp(Name.data()+8, "uh" , 2) != 0) |
| 7641 | break; |
| 7642 | return MCK_vrounduwuh; // "vrounduwuh" |
| 7643 | } |
| 7644 | break; |
| 7645 | } |
| 7646 | break; |
| 7647 | } |
| 7648 | break; |
| 7649 | case 11: // 6 strings to match. |
| 7650 | switch (Name[0]) { |
| 7651 | default: break; |
| 7652 | case 'b': // 1 string to match. |
| 7653 | if (memcmp(Name.data()+1, "oundscheck" , 10) != 0) |
| 7654 | break; |
| 7655 | return MCK_boundscheck; // "boundscheck" |
| 7656 | case 'd': // 1 string to match. |
| 7657 | if (memcmp(Name.data()+1, "ccleaninva" , 10) != 0) |
| 7658 | break; |
| 7659 | return MCK_dccleaninva; // "dccleaninva" |
| 7660 | case 'f': // 1 string to match. |
| 7661 | if (memcmp(Name.data()+1, "astcorner9" , 10) != 0) |
| 7662 | break; |
| 7663 | return MCK_fastcorner9; // "fastcorner9" |
| 7664 | case 'l': // 1 string to match. |
| 7665 | if (memcmp(Name.data()+1, "2gcleaninv" , 10) != 0) |
| 7666 | break; |
| 7667 | return MCK_l2gcleaninv; // "l2gcleaninv" |
| 7668 | case 'm': // 2 strings to match. |
| 7669 | if (memcmp(Name.data()+1, "em" , 2) != 0) |
| 7670 | break; |
| 7671 | switch (Name[3]) { |
| 7672 | default: break; |
| 7673 | case 'd': // 1 string to match. |
| 7674 | if (memcmp(Name.data()+4, "_locked" , 7) != 0) |
| 7675 | break; |
| 7676 | return MCK_memd_95_locked; // "memd_locked" |
| 7677 | case 'w': // 1 string to match. |
| 7678 | if (memcmp(Name.data()+4, "_locked" , 7) != 0) |
| 7679 | break; |
| 7680 | return MCK_memw_95_locked; // "memw_locked" |
| 7681 | } |
| 7682 | break; |
| 7683 | } |
| 7684 | break; |
| 7685 | case 12: // 10 strings to match. |
| 7686 | switch (Name[0]) { |
| 7687 | default: break; |
| 7688 | case 'c': // 8 strings to match. |
| 7689 | if (memcmp(Name.data()+1, "onvert_" , 7) != 0) |
| 7690 | break; |
| 7691 | switch (Name[8]) { |
| 7692 | default: break; |
| 7693 | case 'd': // 4 strings to match. |
| 7694 | switch (Name[9]) { |
| 7695 | default: break; |
| 7696 | case '2': // 2 strings to match. |
| 7697 | switch (Name[10]) { |
| 7698 | default: break; |
| 7699 | case 'd': // 1 string to match. |
| 7700 | if (Name[11] != 'f') |
| 7701 | break; |
| 7702 | return MCK_convert_95_d2df; // "convert_d2df" |
| 7703 | case 's': // 1 string to match. |
| 7704 | if (Name[11] != 'f') |
| 7705 | break; |
| 7706 | return MCK_convert_95_d2sf; // "convert_d2sf" |
| 7707 | } |
| 7708 | break; |
| 7709 | case 'f': // 2 strings to match. |
| 7710 | if (Name[10] != '2') |
| 7711 | break; |
| 7712 | switch (Name[11]) { |
| 7713 | default: break; |
| 7714 | case 'd': // 1 string to match. |
| 7715 | return MCK_convert_95_df2d; // "convert_df2d" |
| 7716 | case 'w': // 1 string to match. |
| 7717 | return MCK_convert_95_df2w; // "convert_df2w" |
| 7718 | } |
| 7719 | break; |
| 7720 | } |
| 7721 | break; |
| 7722 | case 's': // 2 strings to match. |
| 7723 | if (memcmp(Name.data()+9, "f2" , 2) != 0) |
| 7724 | break; |
| 7725 | switch (Name[11]) { |
| 7726 | default: break; |
| 7727 | case 'd': // 1 string to match. |
| 7728 | return MCK_convert_95_sf2d; // "convert_sf2d" |
| 7729 | case 'w': // 1 string to match. |
| 7730 | return MCK_convert_95_sf2w; // "convert_sf2w" |
| 7731 | } |
| 7732 | break; |
| 7733 | case 'w': // 2 strings to match. |
| 7734 | if (Name[9] != '2') |
| 7735 | break; |
| 7736 | switch (Name[10]) { |
| 7737 | default: break; |
| 7738 | case 'd': // 1 string to match. |
| 7739 | if (Name[11] != 'f') |
| 7740 | break; |
| 7741 | return MCK_convert_95_w2df; // "convert_w2df" |
| 7742 | case 's': // 1 string to match. |
| 7743 | if (Name[11] != 'f') |
| 7744 | break; |
| 7745 | return MCK_convert_95_w2sf; // "convert_w2sf" |
| 7746 | } |
| 7747 | break; |
| 7748 | } |
| 7749 | break; |
| 7750 | case 'd': // 2 strings to match. |
| 7751 | if (Name[1] != 'e') |
| 7752 | break; |
| 7753 | switch (Name[2]) { |
| 7754 | default: break; |
| 7755 | case 'a': // 1 string to match. |
| 7756 | if (memcmp(Name.data()+3, "llocframe" , 9) != 0) |
| 7757 | break; |
| 7758 | return MCK_deallocframe; // "deallocframe" |
| 7759 | case 'i': // 1 string to match. |
| 7760 | if (memcmp(Name.data()+3, "nterleave" , 9) != 0) |
| 7761 | break; |
| 7762 | return MCK_deinterleave; // "deinterleave" |
| 7763 | } |
| 7764 | break; |
| 7765 | } |
| 7766 | break; |
| 7767 | case 13: // 12 strings to match. |
| 7768 | switch (Name[0]) { |
| 7769 | default: break; |
| 7770 | case 'c': // 10 strings to match. |
| 7771 | if (memcmp(Name.data()+1, "onvert_" , 7) != 0) |
| 7772 | break; |
| 7773 | switch (Name[8]) { |
| 7774 | default: break; |
| 7775 | case 'd': // 3 strings to match. |
| 7776 | if (memcmp(Name.data()+9, "f2" , 2) != 0) |
| 7777 | break; |
| 7778 | switch (Name[11]) { |
| 7779 | default: break; |
| 7780 | case 's': // 1 string to match. |
| 7781 | if (Name[12] != 'f') |
| 7782 | break; |
| 7783 | return MCK_convert_95_df2sf; // "convert_df2sf" |
| 7784 | case 'u': // 2 strings to match. |
| 7785 | switch (Name[12]) { |
| 7786 | default: break; |
| 7787 | case 'd': // 1 string to match. |
| 7788 | return MCK_convert_95_df2ud; // "convert_df2ud" |
| 7789 | case 'w': // 1 string to match. |
| 7790 | return MCK_convert_95_df2uw; // "convert_df2uw" |
| 7791 | } |
| 7792 | break; |
| 7793 | } |
| 7794 | break; |
| 7795 | case 's': // 3 strings to match. |
| 7796 | if (memcmp(Name.data()+9, "f2" , 2) != 0) |
| 7797 | break; |
| 7798 | switch (Name[11]) { |
| 7799 | default: break; |
| 7800 | case 'd': // 1 string to match. |
| 7801 | if (Name[12] != 'f') |
| 7802 | break; |
| 7803 | return MCK_convert_95_sf2df; // "convert_sf2df" |
| 7804 | case 'u': // 2 strings to match. |
| 7805 | switch (Name[12]) { |
| 7806 | default: break; |
| 7807 | case 'd': // 1 string to match. |
| 7808 | return MCK_convert_95_sf2ud; // "convert_sf2ud" |
| 7809 | case 'w': // 1 string to match. |
| 7810 | return MCK_convert_95_sf2uw; // "convert_sf2uw" |
| 7811 | } |
| 7812 | break; |
| 7813 | } |
| 7814 | break; |
| 7815 | case 'u': // 4 strings to match. |
| 7816 | switch (Name[9]) { |
| 7817 | default: break; |
| 7818 | case 'd': // 2 strings to match. |
| 7819 | if (Name[10] != '2') |
| 7820 | break; |
| 7821 | switch (Name[11]) { |
| 7822 | default: break; |
| 7823 | case 'd': // 1 string to match. |
| 7824 | if (Name[12] != 'f') |
| 7825 | break; |
| 7826 | return MCK_convert_95_ud2df; // "convert_ud2df" |
| 7827 | case 's': // 1 string to match. |
| 7828 | if (Name[12] != 'f') |
| 7829 | break; |
| 7830 | return MCK_convert_95_ud2sf; // "convert_ud2sf" |
| 7831 | } |
| 7832 | break; |
| 7833 | case 'w': // 2 strings to match. |
| 7834 | if (Name[10] != '2') |
| 7835 | break; |
| 7836 | switch (Name[11]) { |
| 7837 | default: break; |
| 7838 | case 'd': // 1 string to match. |
| 7839 | if (Name[12] != 'f') |
| 7840 | break; |
| 7841 | return MCK_convert_95_uw2df; // "convert_uw2df" |
| 7842 | case 's': // 1 string to match. |
| 7843 | if (Name[12] != 'f') |
| 7844 | break; |
| 7845 | return MCK_convert_95_uw2sf; // "convert_uw2sf" |
| 7846 | } |
| 7847 | break; |
| 7848 | } |
| 7849 | break; |
| 7850 | } |
| 7851 | break; |
| 7852 | case 'd': // 1 string to match. |
| 7853 | if (memcmp(Name.data()+1, "ccleaninvidx" , 12) != 0) |
| 7854 | break; |
| 7855 | return MCK_dccleaninvidx; // "dccleaninvidx" |
| 7856 | case 'l': // 1 string to match. |
| 7857 | if (memcmp(Name.data()+1, "2cleaninvidx" , 12) != 0) |
| 7858 | break; |
| 7859 | return MCK_l2cleaninvidx; // "l2cleaninvidx" |
| 7860 | } |
| 7861 | break; |
| 7862 | case 14: // 1 string to match. |
| 7863 | if (memcmp(Name.data()+0, "dealloc_return" , 14) != 0) |
| 7864 | break; |
| 7865 | return MCK_dealloc_95_return; // "dealloc_return" |
| 7866 | case 15: // 1 string to match. |
| 7867 | if (memcmp(Name.data()+0, "scatter_release" , 15) != 0) |
| 7868 | break; |
| 7869 | return MCK_scatter_95_release; // "scatter_release" |
| 7870 | } |
| 7871 | return InvalidMatchClass; |
| 7872 | } |
| 7873 | |
| 7874 | /// isSubclass - Compute whether \p A is a subclass of \p B. |
| 7875 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
| 7876 | if (A == B) |
| 7877 | return true; |
| 7878 | |
| 7879 | [[maybe_unused]] static constexpr struct { |
| 7880 | uint32_t Offset; |
| 7881 | uint16_t Start; |
| 7882 | uint16_t Length; |
| 7883 | } Table[] = { |
| 7884 | {0, 0, 0}, |
| 7885 | {0, 0, 0}, |
| 7886 | {0, 0, 0}, |
| 7887 | {0, 0, 0}, |
| 7888 | {0, 0, 0}, |
| 7889 | {0, 0, 0}, |
| 7890 | {0, 0, 0}, |
| 7891 | {0, 0, 0}, |
| 7892 | {0, 0, 0}, |
| 7893 | {0, 0, 0}, |
| 7894 | {0, 0, 0}, |
| 7895 | {0, 0, 0}, |
| 7896 | {0, 0, 0}, |
| 7897 | {0, 0, 0}, |
| 7898 | {0, 0, 0}, |
| 7899 | {0, 0, 0}, |
| 7900 | {0, 0, 0}, |
| 7901 | {0, 0, 0}, |
| 7902 | {0, 0, 0}, |
| 7903 | {0, 0, 0}, |
| 7904 | {0, 0, 0}, |
| 7905 | {0, 0, 0}, |
| 7906 | {0, 0, 0}, |
| 7907 | {0, 0, 0}, |
| 7908 | {0, 0, 0}, |
| 7909 | {0, 0, 0}, |
| 7910 | {0, 0, 0}, |
| 7911 | {0, 0, 0}, |
| 7912 | {0, 0, 0}, |
| 7913 | {0, 0, 0}, |
| 7914 | {0, 0, 0}, |
| 7915 | {0, 0, 0}, |
| 7916 | {0, 0, 0}, |
| 7917 | {0, 0, 0}, |
| 7918 | {0, 0, 0}, |
| 7919 | {0, 0, 0}, |
| 7920 | {0, 0, 0}, |
| 7921 | {0, 0, 0}, |
| 7922 | {0, 0, 0}, |
| 7923 | {0, 0, 0}, |
| 7924 | {0, 0, 0}, |
| 7925 | {0, 0, 0}, |
| 7926 | {0, 0, 0}, |
| 7927 | {0, 0, 0}, |
| 7928 | {0, 0, 0}, |
| 7929 | {0, 0, 0}, |
| 7930 | {0, 0, 0}, |
| 7931 | {0, 0, 0}, |
| 7932 | {0, 0, 0}, |
| 7933 | {0, 0, 0}, |
| 7934 | {0, 0, 0}, |
| 7935 | {0, 0, 0}, |
| 7936 | {0, 0, 0}, |
| 7937 | {0, 0, 0}, |
| 7938 | {0, 0, 0}, |
| 7939 | {0, 0, 0}, |
| 7940 | {0, 0, 0}, |
| 7941 | {0, 0, 0}, |
| 7942 | {0, 0, 0}, |
| 7943 | {0, 0, 0}, |
| 7944 | {0, 0, 0}, |
| 7945 | {0, 0, 0}, |
| 7946 | {0, 0, 0}, |
| 7947 | {0, 0, 0}, |
| 7948 | {0, 0, 0}, |
| 7949 | {0, 0, 0}, |
| 7950 | {0, 0, 0}, |
| 7951 | {0, 0, 0}, |
| 7952 | {0, 0, 0}, |
| 7953 | {0, 0, 0}, |
| 7954 | {0, 0, 0}, |
| 7955 | {0, 0, 0}, |
| 7956 | {0, 0, 0}, |
| 7957 | {0, 0, 0}, |
| 7958 | {0, 0, 0}, |
| 7959 | {0, 0, 0}, |
| 7960 | {0, 0, 0}, |
| 7961 | {0, 0, 0}, |
| 7962 | {0, 0, 0}, |
| 7963 | {0, 0, 0}, |
| 7964 | {0, 0, 0}, |
| 7965 | {0, 0, 0}, |
| 7966 | {0, 0, 0}, |
| 7967 | {0, 0, 0}, |
| 7968 | {0, 0, 0}, |
| 7969 | {0, 0, 0}, |
| 7970 | {0, 0, 0}, |
| 7971 | {0, 0, 0}, |
| 7972 | {0, 0, 0}, |
| 7973 | {0, 0, 0}, |
| 7974 | {0, 0, 0}, |
| 7975 | {0, 0, 0}, |
| 7976 | {0, 0, 0}, |
| 7977 | {0, 0, 0}, |
| 7978 | {0, 0, 0}, |
| 7979 | {0, 0, 0}, |
| 7980 | {0, 0, 0}, |
| 7981 | {0, 0, 0}, |
| 7982 | {0, 0, 0}, |
| 7983 | {0, 0, 0}, |
| 7984 | {0, 0, 0}, |
| 7985 | {0, 0, 0}, |
| 7986 | {0, 0, 0}, |
| 7987 | {0, 0, 0}, |
| 7988 | {0, 0, 0}, |
| 7989 | {0, 0, 0}, |
| 7990 | {0, 0, 0}, |
| 7991 | {0, 0, 0}, |
| 7992 | {0, 0, 0}, |
| 7993 | {0, 0, 0}, |
| 7994 | {0, 0, 0}, |
| 7995 | {0, 0, 0}, |
| 7996 | {0, 0, 0}, |
| 7997 | {0, 0, 0}, |
| 7998 | {0, 0, 0}, |
| 7999 | {0, 0, 0}, |
| 8000 | {0, 0, 0}, |
| 8001 | {0, 0, 0}, |
| 8002 | {0, 0, 0}, |
| 8003 | {0, 0, 0}, |
| 8004 | {0, 0, 0}, |
| 8005 | {0, 0, 0}, |
| 8006 | {0, 0, 0}, |
| 8007 | {0, 0, 0}, |
| 8008 | {0, 0, 0}, |
| 8009 | {0, 0, 0}, |
| 8010 | {0, 0, 0}, |
| 8011 | {0, 0, 0}, |
| 8012 | {0, 0, 0}, |
| 8013 | {0, 0, 0}, |
| 8014 | {0, 0, 0}, |
| 8015 | {0, 0, 0}, |
| 8016 | {0, 0, 0}, |
| 8017 | {0, 0, 0}, |
| 8018 | {0, 0, 0}, |
| 8019 | {0, 0, 0}, |
| 8020 | {0, 0, 0}, |
| 8021 | {0, 0, 0}, |
| 8022 | {0, 0, 0}, |
| 8023 | {0, 0, 0}, |
| 8024 | {0, 0, 0}, |
| 8025 | {0, 0, 0}, |
| 8026 | {0, 0, 0}, |
| 8027 | {0, 0, 0}, |
| 8028 | {0, 0, 0}, |
| 8029 | {0, 0, 0}, |
| 8030 | {0, 0, 0}, |
| 8031 | {0, 0, 0}, |
| 8032 | {0, 0, 0}, |
| 8033 | {0, 0, 0}, |
| 8034 | {0, 0, 0}, |
| 8035 | {0, 0, 0}, |
| 8036 | {0, 0, 0}, |
| 8037 | {0, 0, 0}, |
| 8038 | {0, 0, 0}, |
| 8039 | {0, 0, 0}, |
| 8040 | {0, 0, 0}, |
| 8041 | {0, 0, 0}, |
| 8042 | {0, 0, 0}, |
| 8043 | {0, 0, 0}, |
| 8044 | {0, 0, 0}, |
| 8045 | {0, 0, 0}, |
| 8046 | {0, 0, 0}, |
| 8047 | {0, 0, 0}, |
| 8048 | {0, 0, 0}, |
| 8049 | {0, 0, 0}, |
| 8050 | {0, 0, 0}, |
| 8051 | {0, 0, 0}, |
| 8052 | {0, 0, 0}, |
| 8053 | {0, 0, 0}, |
| 8054 | {0, 0, 0}, |
| 8055 | {0, 0, 0}, |
| 8056 | {0, 0, 0}, |
| 8057 | {0, 0, 0}, |
| 8058 | {0, 0, 0}, |
| 8059 | {0, 0, 0}, |
| 8060 | {0, 0, 0}, |
| 8061 | {0, 0, 0}, |
| 8062 | {0, 0, 0}, |
| 8063 | {0, 0, 0}, |
| 8064 | {0, 0, 0}, |
| 8065 | {0, 0, 0}, |
| 8066 | {0, 0, 0}, |
| 8067 | {0, 0, 0}, |
| 8068 | {0, 0, 0}, |
| 8069 | {0, 0, 0}, |
| 8070 | {0, 0, 0}, |
| 8071 | {0, 0, 0}, |
| 8072 | {0, 0, 0}, |
| 8073 | {0, 0, 0}, |
| 8074 | {0, 0, 0}, |
| 8075 | {0, 0, 0}, |
| 8076 | {0, 0, 0}, |
| 8077 | {0, 0, 0}, |
| 8078 | {0, 0, 0}, |
| 8079 | {0, 0, 0}, |
| 8080 | {0, 0, 0}, |
| 8081 | {0, 0, 0}, |
| 8082 | {0, 0, 0}, |
| 8083 | {0, 0, 0}, |
| 8084 | {0, 0, 0}, |
| 8085 | {0, 0, 0}, |
| 8086 | {0, 0, 0}, |
| 8087 | {0, 0, 0}, |
| 8088 | {0, 0, 0}, |
| 8089 | {0, 0, 0}, |
| 8090 | {0, 0, 0}, |
| 8091 | {0, 0, 0}, |
| 8092 | {0, 0, 0}, |
| 8093 | {0, 0, 0}, |
| 8094 | {0, 0, 0}, |
| 8095 | {0, 0, 0}, |
| 8096 | {0, 0, 0}, |
| 8097 | {0, 0, 0}, |
| 8098 | {0, 0, 0}, |
| 8099 | {0, 0, 0}, |
| 8100 | {0, 0, 0}, |
| 8101 | {0, 0, 0}, |
| 8102 | {0, 0, 0}, |
| 8103 | {0, 0, 0}, |
| 8104 | {0, 0, 0}, |
| 8105 | {0, 0, 0}, |
| 8106 | {0, 0, 0}, |
| 8107 | {0, 0, 0}, |
| 8108 | {0, 0, 0}, |
| 8109 | {0, 0, 0}, |
| 8110 | {0, 0, 0}, |
| 8111 | {0, 0, 0}, |
| 8112 | {0, 0, 0}, |
| 8113 | {0, 0, 0}, |
| 8114 | {0, 0, 0}, |
| 8115 | {0, 0, 0}, |
| 8116 | {0, 0, 0}, |
| 8117 | {0, 0, 0}, |
| 8118 | {0, 0, 0}, |
| 8119 | {0, 0, 0}, |
| 8120 | {0, 0, 0}, |
| 8121 | {0, 0, 0}, |
| 8122 | {0, 0, 0}, |
| 8123 | {0, 0, 0}, |
| 8124 | {0, 0, 0}, |
| 8125 | {0, 0, 0}, |
| 8126 | {0, 0, 0}, |
| 8127 | {0, 0, 0}, |
| 8128 | {0, 0, 0}, |
| 8129 | {0, 0, 0}, |
| 8130 | {0, 0, 0}, |
| 8131 | {0, 0, 0}, |
| 8132 | {0, 0, 0}, |
| 8133 | {0, 0, 0}, |
| 8134 | {0, 0, 0}, |
| 8135 | {0, 0, 0}, |
| 8136 | {0, 0, 0}, |
| 8137 | {0, 0, 0}, |
| 8138 | {0, 0, 0}, |
| 8139 | {0, 0, 0}, |
| 8140 | {0, 0, 0}, |
| 8141 | {0, 0, 0}, |
| 8142 | {0, 0, 0}, |
| 8143 | {0, 0, 0}, |
| 8144 | {0, 0, 0}, |
| 8145 | {0, 0, 0}, |
| 8146 | {0, 0, 0}, |
| 8147 | {0, 0, 0}, |
| 8148 | {0, 0, 0}, |
| 8149 | {0, 0, 0}, |
| 8150 | {0, 0, 0}, |
| 8151 | {0, 0, 0}, |
| 8152 | {0, 0, 0}, |
| 8153 | {0, 0, 0}, |
| 8154 | {0, 0, 0}, |
| 8155 | {0, 0, 0}, |
| 8156 | {0, 0, 0}, |
| 8157 | {0, 0, 0}, |
| 8158 | {0, 0, 0}, |
| 8159 | {0, 0, 0}, |
| 8160 | {0, 0, 0}, |
| 8161 | {0, 0, 0}, |
| 8162 | {0, 0, 0}, |
| 8163 | {0, 0, 0}, |
| 8164 | {0, 0, 0}, |
| 8165 | {0, 0, 0}, |
| 8166 | {0, 0, 0}, |
| 8167 | {0, 0, 0}, |
| 8168 | {0, 0, 0}, |
| 8169 | {0, 0, 0}, |
| 8170 | {0, 0, 0}, |
| 8171 | {0, 0, 0}, |
| 8172 | {0, 0, 0}, |
| 8173 | {0, 0, 0}, |
| 8174 | {0, 0, 0}, |
| 8175 | {0, 0, 0}, |
| 8176 | {0, 0, 0}, |
| 8177 | {0, 0, 0}, |
| 8178 | {0, 0, 0}, |
| 8179 | {0, 0, 0}, |
| 8180 | {0, 0, 0}, |
| 8181 | {0, 0, 0}, |
| 8182 | {0, 0, 0}, |
| 8183 | {0, 0, 0}, |
| 8184 | {0, 0, 0}, |
| 8185 | {0, 0, 0}, |
| 8186 | {0, 0, 0}, |
| 8187 | {0, 0, 0}, |
| 8188 | {0, 0, 0}, |
| 8189 | {0, 0, 0}, |
| 8190 | {0, 0, 0}, |
| 8191 | {0, 0, 0}, |
| 8192 | {0, 0, 0}, |
| 8193 | {0, 0, 0}, |
| 8194 | {0, 0, 0}, |
| 8195 | {0, 0, 0}, |
| 8196 | {0, 0, 0}, |
| 8197 | {0, 0, 0}, |
| 8198 | {0, 0, 0}, |
| 8199 | {0, 0, 0}, |
| 8200 | {0, 0, 0}, |
| 8201 | {0, 0, 0}, |
| 8202 | {0, 0, 0}, |
| 8203 | {0, 0, 0}, |
| 8204 | {0, 0, 0}, |
| 8205 | {0, 0, 0}, |
| 8206 | {0, 0, 0}, |
| 8207 | {0, 0, 0}, |
| 8208 | {0, 0, 0}, |
| 8209 | {0, 0, 0}, |
| 8210 | {0, 0, 0}, |
| 8211 | {0, 0, 0}, |
| 8212 | {0, 0, 0}, |
| 8213 | {0, 0, 0}, |
| 8214 | {0, 0, 0}, |
| 8215 | {0, 0, 0}, |
| 8216 | {0, 0, 0}, |
| 8217 | {0, 0, 0}, |
| 8218 | {0, 0, 0}, |
| 8219 | {0, 0, 0}, |
| 8220 | {0, 0, 0}, |
| 8221 | {0, 0, 0}, |
| 8222 | {0, 0, 0}, |
| 8223 | {0, 0, 0}, |
| 8224 | {0, 0, 0}, |
| 8225 | {0, 0, 0}, |
| 8226 | {0, 0, 0}, |
| 8227 | {0, 0, 0}, |
| 8228 | {0, 0, 0}, |
| 8229 | {0, 0, 0}, |
| 8230 | {0, 0, 0}, |
| 8231 | {0, 0, 0}, |
| 8232 | {0, 0, 0}, |
| 8233 | {0, 0, 0}, |
| 8234 | {0, 0, 0}, |
| 8235 | {0, 0, 0}, |
| 8236 | {0, 0, 0}, |
| 8237 | {0, 0, 0}, |
| 8238 | {0, 0, 0}, |
| 8239 | {0, 0, 0}, |
| 8240 | {0, 0, 0}, |
| 8241 | {0, 0, 0}, |
| 8242 | {0, 0, 0}, |
| 8243 | {0, 0, 0}, |
| 8244 | {0, 0, 0}, |
| 8245 | {0, 0, 0}, |
| 8246 | {0, 0, 0}, |
| 8247 | {0, 0, 0}, |
| 8248 | {0, 0, 0}, |
| 8249 | {0, 0, 0}, |
| 8250 | {0, 0, 0}, |
| 8251 | {0, 0, 0}, |
| 8252 | {0, 0, 0}, |
| 8253 | {0, 0, 0}, |
| 8254 | {0, 0, 0}, |
| 8255 | {0, 0, 0}, |
| 8256 | {0, 0, 0}, |
| 8257 | {0, 0, 0}, |
| 8258 | {0, 0, 0}, |
| 8259 | {0, 0, 0}, |
| 8260 | {0, 0, 0}, |
| 8261 | {0, 0, 0}, |
| 8262 | {0, 0, 0}, |
| 8263 | {0, 0, 0}, |
| 8264 | {0, 0, 0}, |
| 8265 | {0, 0, 0}, |
| 8266 | {0, 0, 0}, |
| 8267 | {0, 0, 0}, |
| 8268 | {0, 0, 0}, |
| 8269 | {0, 0, 0}, |
| 8270 | {0, 0, 0}, |
| 8271 | {0, 0, 0}, |
| 8272 | {0, 0, 0}, |
| 8273 | {0, 0, 0}, |
| 8274 | {0, 0, 0}, |
| 8275 | {0, 0, 0}, |
| 8276 | {0, 0, 0}, |
| 8277 | {0, 0, 0}, |
| 8278 | {0, 0, 0}, |
| 8279 | {0, 0, 0}, |
| 8280 | {0, 0, 0}, |
| 8281 | {0, 0, 0}, |
| 8282 | {0, 0, 0}, |
| 8283 | {0, 0, 0}, |
| 8284 | {0, 0, 0}, |
| 8285 | {0, 0, 0}, |
| 8286 | {0, 0, 0}, |
| 8287 | {0, 0, 0}, |
| 8288 | {0, 0, 0}, |
| 8289 | {0, 0, 0}, |
| 8290 | {0, 0, 0}, |
| 8291 | {0, 0, 0}, |
| 8292 | {0, 0, 0}, |
| 8293 | {0, 0, 0}, |
| 8294 | {0, 0, 0}, |
| 8295 | {0, 0, 0}, |
| 8296 | {0, 0, 0}, |
| 8297 | {0, 0, 0}, |
| 8298 | {0, 0, 0}, |
| 8299 | {0, 0, 0}, |
| 8300 | {0, 0, 0}, |
| 8301 | {0, 0, 0}, |
| 8302 | {0, 0, 0}, |
| 8303 | {0, 0, 0}, |
| 8304 | {0, 0, 0}, |
| 8305 | {0, 0, 0}, |
| 8306 | {0, 0, 0}, |
| 8307 | {0, 0, 0}, |
| 8308 | {0, 0, 0}, |
| 8309 | {0, 0, 0}, |
| 8310 | {0, 0, 0}, |
| 8311 | {0, 0, 0}, |
| 8312 | {0, 0, 0}, |
| 8313 | {0, 0, 0}, |
| 8314 | {0, 0, 0}, |
| 8315 | {0, 0, 0}, |
| 8316 | {0, 0, 0}, |
| 8317 | {0, 0, 0}, |
| 8318 | {0, 0, 0}, |
| 8319 | {0, 0, 0}, |
| 8320 | {0, 0, 0}, |
| 8321 | {0, 0, 0}, |
| 8322 | {0, 0, 0}, |
| 8323 | {0, 0, 0}, |
| 8324 | {0, 0, 0}, |
| 8325 | {0, 0, 0}, |
| 8326 | {0, 0, 0}, |
| 8327 | {0, 0, 0}, |
| 8328 | {0, 0, 0}, |
| 8329 | {0, 0, 0}, |
| 8330 | {0, 0, 0}, |
| 8331 | {0, 0, 0}, |
| 8332 | {0, 0, 0}, |
| 8333 | {0, 0, 0}, |
| 8334 | {0, 0, 0}, |
| 8335 | {0, 0, 0}, |
| 8336 | {0, 0, 0}, |
| 8337 | {0, 0, 0}, |
| 8338 | {0, 0, 0}, |
| 8339 | {0, 0, 0}, |
| 8340 | {0, 0, 0}, |
| 8341 | {0, 0, 0}, |
| 8342 | {0, 0, 0}, |
| 8343 | {0, 0, 0}, |
| 8344 | {0, 0, 0}, |
| 8345 | {0, 0, 0}, |
| 8346 | {0, 0, 0}, |
| 8347 | {0, 0, 0}, |
| 8348 | {0, 0, 0}, |
| 8349 | {0, 0, 0}, |
| 8350 | {0, 0, 0}, |
| 8351 | {0, 0, 0}, |
| 8352 | {0, 0, 0}, |
| 8353 | {0, 0, 0}, |
| 8354 | {0, 0, 0}, |
| 8355 | {0, 0, 0}, |
| 8356 | {0, 0, 0}, |
| 8357 | {0, 0, 0}, |
| 8358 | {0, 0, 0}, |
| 8359 | {0, 0, 0}, |
| 8360 | {0, 0, 0}, |
| 8361 | {0, 0, 0}, |
| 8362 | {0, 0, 0}, |
| 8363 | {0, 0, 0}, |
| 8364 | {0, 0, 0}, |
| 8365 | {0, 0, 0}, |
| 8366 | {0, 0, 0}, |
| 8367 | {0, 0, 0}, |
| 8368 | {0, 0, 0}, |
| 8369 | {0, 0, 0}, |
| 8370 | {0, 0, 0}, |
| 8371 | {0, 0, 0}, |
| 8372 | {0, 0, 0}, |
| 8373 | {0, 0, 0}, |
| 8374 | {0, 0, 0}, |
| 8375 | {0, 0, 0}, |
| 8376 | {0, 0, 0}, |
| 8377 | {0, 0, 0}, |
| 8378 | {0, 0, 0}, |
| 8379 | {0, 0, 0}, |
| 8380 | {0, 0, 0}, |
| 8381 | {0, 0, 0}, |
| 8382 | {0, 0, 0}, |
| 8383 | {0, 0, 0}, |
| 8384 | {0, 0, 0}, |
| 8385 | {0, 0, 0}, |
| 8386 | {0, 0, 0}, |
| 8387 | {0, 0, 0}, |
| 8388 | {0, 0, 0}, |
| 8389 | {0, 0, 0}, |
| 8390 | {0, 0, 0}, |
| 8391 | {0, 0, 0}, |
| 8392 | {0, 0, 0}, |
| 8393 | {0, 0, 0}, |
| 8394 | {0, 0, 0}, |
| 8395 | {0, 0, 0}, |
| 8396 | {0, 0, 0}, |
| 8397 | {0, 0, 0}, |
| 8398 | {0, 0, 0}, |
| 8399 | {0, 0, 0}, |
| 8400 | {0, 0, 0}, |
| 8401 | {0, 0, 0}, |
| 8402 | {0, 0, 0}, |
| 8403 | {0, 0, 0}, |
| 8404 | {0, 0, 0}, |
| 8405 | {0, 0, 0}, |
| 8406 | {0, 0, 0}, |
| 8407 | {0, 0, 0}, |
| 8408 | {0, 0, 0}, |
| 8409 | {0, 0, 0}, |
| 8410 | {0, 0, 0}, |
| 8411 | {0, 0, 0}, |
| 8412 | {0, 0, 0}, |
| 8413 | {0, 0, 0}, |
| 8414 | {0, 0, 0}, |
| 8415 | {0, 0, 0}, |
| 8416 | {0, 0, 0}, |
| 8417 | {0, 0, 0}, |
| 8418 | {0, 0, 0}, |
| 8419 | {0, 0, 0}, |
| 8420 | {0, 0, 0}, |
| 8421 | {0, 0, 0}, |
| 8422 | {0, 0, 0}, |
| 8423 | {0, 0, 0}, |
| 8424 | {0, 0, 0}, |
| 8425 | {0, 0, 0}, |
| 8426 | {0, 0, 0}, |
| 8427 | {0, 0, 0}, |
| 8428 | {0, 0, 0}, |
| 8429 | {0, 0, 0}, |
| 8430 | {0, 0, 0}, |
| 8431 | {0, 0, 0}, |
| 8432 | {0, 0, 0}, |
| 8433 | {0, 0, 0}, |
| 8434 | {0, 0, 0}, |
| 8435 | {0, 0, 0}, |
| 8436 | {0, 0, 0}, |
| 8437 | {0, 0, 0}, |
| 8438 | {0, 0, 0}, |
| 8439 | {0, 0, 0}, |
| 8440 | {0, 0, 0}, |
| 8441 | {0, 0, 0}, |
| 8442 | {0, 0, 0}, |
| 8443 | {0, 0, 0}, |
| 8444 | {0, 0, 0}, |
| 8445 | {0, 0, 0}, |
| 8446 | {0, 0, 0}, |
| 8447 | {0, 0, 0}, |
| 8448 | {0, 0, 0}, |
| 8449 | {0, 0, 0}, |
| 8450 | {0, 0, 0}, |
| 8451 | {0, 0, 0}, |
| 8452 | {0, 0, 0}, |
| 8453 | {0, 0, 0}, |
| 8454 | {0, 0, 0}, |
| 8455 | {0, 0, 0}, |
| 8456 | {0, 0, 0}, |
| 8457 | {0, 0, 0}, |
| 8458 | {0, 0, 0}, |
| 8459 | {0, 0, 0}, |
| 8460 | {0, 0, 0}, |
| 8461 | {0, 0, 0}, |
| 8462 | {0, 0, 0}, |
| 8463 | {0, 0, 0}, |
| 8464 | {0, 0, 0}, |
| 8465 | {0, 0, 0}, |
| 8466 | {0, 0, 0}, |
| 8467 | {0, 0, 0}, |
| 8468 | {0, 0, 0}, |
| 8469 | {0, 0, 0}, |
| 8470 | {0, 0, 0}, |
| 8471 | {0, 0, 0}, |
| 8472 | {0, 0, 0}, |
| 8473 | {0, 0, 0}, |
| 8474 | {0, 0, 0}, |
| 8475 | {0, 0, 0}, |
| 8476 | {0, 0, 0}, |
| 8477 | {0, 0, 0}, |
| 8478 | {0, 0, 0}, |
| 8479 | {0, 0, 0}, |
| 8480 | {0, 0, 0}, |
| 8481 | {0, 0, 0}, |
| 8482 | {0, 0, 0}, |
| 8483 | {0, 0, 0}, |
| 8484 | {0, 0, 0}, |
| 8485 | {0, 0, 0}, |
| 8486 | {0, 0, 0}, |
| 8487 | {0, 0, 0}, |
| 8488 | {0, 0, 0}, |
| 8489 | {0, 0, 0}, |
| 8490 | {0, 628, 1}, |
| 8491 | {1, 633, 1}, |
| 8492 | {2, 639, 1}, |
| 8493 | {3, 633, 1}, |
| 8494 | {4, 622, 1}, |
| 8495 | {5, 622, 1}, |
| 8496 | {6, 622, 1}, |
| 8497 | {7, 633, 1}, |
| 8498 | {8, 639, 1}, |
| 8499 | {9, 639, 1}, |
| 8500 | {10, 0, 0}, |
| 8501 | {10, 637, 1}, |
| 8502 | {11, 633, 1}, |
| 8503 | {12, 627, 2}, |
| 8504 | {14, 624, 6}, |
| 8505 | {20, 0, 0}, |
| 8506 | {20, 0, 0}, |
| 8507 | {20, 627, 7}, |
| 8508 | {27, 629, 1}, |
| 8509 | {28, 0, 0}, |
| 8510 | {28, 630, 7}, |
| 8511 | {35, 0, 0}, |
| 8512 | {35, 0, 0}, |
| 8513 | {35, 0, 0}, |
| 8514 | {35, 636, 1}, |
| 8515 | {36, 0, 0}, |
| 8516 | {36, 635, 1}, |
| 8517 | {37, 0, 0}, |
| 8518 | {37, 0, 0}, |
| 8519 | {37, 0, 0}, |
| 8520 | {37, 0, 0}, |
| 8521 | {37, 0, 0}, |
| 8522 | {37, 0, 0}, |
| 8523 | {37, 0, 0}, |
| 8524 | {37, 0, 0}, |
| 8525 | {37, 0, 0}, |
| 8526 | {37, 0, 0}, |
| 8527 | {37, 0, 0}, |
| 8528 | {37, 0, 0}, |
| 8529 | {37, 0, 0}, |
| 8530 | {37, 0, 0}, |
| 8531 | {37, 0, 0}, |
| 8532 | {37, 0, 0}, |
| 8533 | {37, 0, 0}, |
| 8534 | {37, 0, 0}, |
| 8535 | {37, 0, 0}, |
| 8536 | {37, 0, 0}, |
| 8537 | {37, 0, 0}, |
| 8538 | {37, 0, 0}, |
| 8539 | {37, 0, 0}, |
| 8540 | {37, 0, 0}, |
| 8541 | {37, 0, 0}, |
| 8542 | {37, 0, 0}, |
| 8543 | {37, 0, 0}, |
| 8544 | {37, 0, 0}, |
| 8545 | {37, 0, 0}, |
| 8546 | {37, 0, 0}, |
| 8547 | {37, 0, 0}, |
| 8548 | {37, 0, 0}, |
| 8549 | {37, 0, 0}, |
| 8550 | {37, 0, 0}, |
| 8551 | {37, 0, 0}, |
| 8552 | {37, 0, 0}, |
| 8553 | {37, 0, 0}, |
| 8554 | {37, 0, 0}, |
| 8555 | {37, 0, 0}, |
| 8556 | {37, 0, 0}, |
| 8557 | {37, 0, 0}, |
| 8558 | {37, 0, 0}, |
| 8559 | {37, 0, 0}, |
| 8560 | {37, 0, 0}, |
| 8561 | {37, 0, 0}, |
| 8562 | {37, 0, 0}, |
| 8563 | {37, 0, 0}, |
| 8564 | {37, 0, 0}, |
| 8565 | {37, 0, 0}, |
| 8566 | {37, 0, 0}, |
| 8567 | {37, 0, 0}, |
| 8568 | {37, 0, 0}, |
| 8569 | {37, 0, 0}, |
| 8570 | {37, 0, 0}, |
| 8571 | }; |
| 8572 | |
| 8573 | static constexpr uint8_t Data[] = { |
| 8574 | 0xFF, |
| 8575 | 0x7F, |
| 8576 | 0x18, |
| 8577 | 0x1C, |
| 8578 | 0x1C, |
| 8579 | }; |
| 8580 | |
| 8581 | auto &Entry = Table[A]; |
| 8582 | unsigned Idx = B - Entry.Start; |
| 8583 | if (Idx >= Entry.Length) |
| 8584 | return false; |
| 8585 | Idx += Entry.Offset; |
| 8586 | return (Data[Idx / 8] >> (Idx % 8)) & 1; |
| 8587 | } |
| 8588 | |
| 8589 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
| 8590 | HexagonOperand &Operand = (HexagonOperand &)GOp; |
| 8591 | if (Kind == InvalidMatchClass) |
| 8592 | return MCTargetAsmParser::Match_InvalidOperand; |
| 8593 | |
| 8594 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
| 8595 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
| 8596 | MCTargetAsmParser::Match_Success : |
| 8597 | MCTargetAsmParser::Match_InvalidOperand; |
| 8598 | |
| 8599 | switch (Kind) { |
| 8600 | default: break; |
| 8601 | case MCK_Imm: { |
| 8602 | DiagnosticPredicate DP(Operand.isImm()); |
| 8603 | if (DP.isMatch()) |
| 8604 | return MCTargetAsmParser::Match_Success; |
| 8605 | break; |
| 8606 | } |
| 8607 | case MCK_a30_2Imm: { |
| 8608 | DiagnosticPredicate DP(Operand.isa30_2Imm()); |
| 8609 | if (DP.isMatch()) |
| 8610 | return MCTargetAsmParser::Match_Success; |
| 8611 | break; |
| 8612 | } |
| 8613 | case MCK_b13_2Imm: { |
| 8614 | DiagnosticPredicate DP(Operand.isb13_2Imm()); |
| 8615 | if (DP.isMatch()) |
| 8616 | return MCTargetAsmParser::Match_Success; |
| 8617 | break; |
| 8618 | } |
| 8619 | case MCK_b15_2Imm: { |
| 8620 | DiagnosticPredicate DP(Operand.isb15_2Imm()); |
| 8621 | if (DP.isMatch()) |
| 8622 | return MCTargetAsmParser::Match_Success; |
| 8623 | break; |
| 8624 | } |
| 8625 | case MCK_b30_2Imm: { |
| 8626 | DiagnosticPredicate DP(Operand.isb30_2Imm()); |
| 8627 | if (DP.isMatch()) |
| 8628 | return MCTargetAsmParser::Match_Success; |
| 8629 | break; |
| 8630 | } |
| 8631 | case MCK_f32Imm: { |
| 8632 | DiagnosticPredicate DP(Operand.isf32Imm()); |
| 8633 | if (DP.isMatch()) |
| 8634 | return MCTargetAsmParser::Match_Success; |
| 8635 | break; |
| 8636 | } |
| 8637 | case MCK_f64Imm: { |
| 8638 | DiagnosticPredicate DP(Operand.isf64Imm()); |
| 8639 | if (DP.isMatch()) |
| 8640 | return MCTargetAsmParser::Match_Success; |
| 8641 | break; |
| 8642 | } |
| 8643 | case MCK_m32_0Imm: { |
| 8644 | DiagnosticPredicate DP(Operand.ism32_0Imm()); |
| 8645 | if (DP.isMatch()) |
| 8646 | return MCTargetAsmParser::Match_Success; |
| 8647 | break; |
| 8648 | } |
| 8649 | case MCK_n1Const: { |
| 8650 | DiagnosticPredicate DP(Operand.isn1Const()); |
| 8651 | if (DP.isMatch()) |
| 8652 | return MCTargetAsmParser::Match_Success; |
| 8653 | break; |
| 8654 | } |
| 8655 | case MCK_s27_2Imm: { |
| 8656 | DiagnosticPredicate DP(Operand.iss27_2Imm()); |
| 8657 | if (DP.isMatch()) |
| 8658 | return MCTargetAsmParser::Match_Success; |
| 8659 | break; |
| 8660 | } |
| 8661 | case MCK_s29_3Imm: { |
| 8662 | DiagnosticPredicate DP(Operand.iss29_3Imm()); |
| 8663 | if (DP.isMatch()) |
| 8664 | return MCTargetAsmParser::Match_Success; |
| 8665 | break; |
| 8666 | } |
| 8667 | case MCK_s30_2Imm: { |
| 8668 | DiagnosticPredicate DP(Operand.iss30_2Imm()); |
| 8669 | if (DP.isMatch()) |
| 8670 | return MCTargetAsmParser::Match_Success; |
| 8671 | break; |
| 8672 | } |
| 8673 | case MCK_s31_1Imm: { |
| 8674 | DiagnosticPredicate DP(Operand.iss31_1Imm()); |
| 8675 | if (DP.isMatch()) |
| 8676 | return MCTargetAsmParser::Match_Success; |
| 8677 | break; |
| 8678 | } |
| 8679 | case MCK_s32_0Imm: { |
| 8680 | DiagnosticPredicate DP(Operand.iss32_0Imm()); |
| 8681 | if (DP.isMatch()) |
| 8682 | return MCTargetAsmParser::Match_Success; |
| 8683 | break; |
| 8684 | } |
| 8685 | case MCK_s3_0Imm: { |
| 8686 | DiagnosticPredicate DP(Operand.iss3_0Imm()); |
| 8687 | if (DP.isMatch()) |
| 8688 | return MCTargetAsmParser::Match_Success; |
| 8689 | break; |
| 8690 | } |
| 8691 | case MCK_s4_0Imm: { |
| 8692 | DiagnosticPredicate DP(Operand.iss4_0Imm()); |
| 8693 | if (DP.isMatch()) |
| 8694 | return MCTargetAsmParser::Match_Success; |
| 8695 | break; |
| 8696 | } |
| 8697 | case MCK_s4_1Imm: { |
| 8698 | DiagnosticPredicate DP(Operand.iss4_1Imm()); |
| 8699 | if (DP.isMatch()) |
| 8700 | return MCTargetAsmParser::Match_Success; |
| 8701 | break; |
| 8702 | } |
| 8703 | case MCK_s4_2Imm: { |
| 8704 | DiagnosticPredicate DP(Operand.iss4_2Imm()); |
| 8705 | if (DP.isMatch()) |
| 8706 | return MCTargetAsmParser::Match_Success; |
| 8707 | break; |
| 8708 | } |
| 8709 | case MCK_s4_3Imm: { |
| 8710 | DiagnosticPredicate DP(Operand.iss4_3Imm()); |
| 8711 | if (DP.isMatch()) |
| 8712 | return MCTargetAsmParser::Match_Success; |
| 8713 | break; |
| 8714 | } |
| 8715 | case MCK_s6_0Imm: { |
| 8716 | DiagnosticPredicate DP(Operand.iss6_0Imm()); |
| 8717 | if (DP.isMatch()) |
| 8718 | return MCTargetAsmParser::Match_Success; |
| 8719 | break; |
| 8720 | } |
| 8721 | case MCK_s6_3Imm: { |
| 8722 | DiagnosticPredicate DP(Operand.iss6_3Imm()); |
| 8723 | if (DP.isMatch()) |
| 8724 | return MCTargetAsmParser::Match_Success; |
| 8725 | break; |
| 8726 | } |
| 8727 | case MCK_s8_0Imm: { |
| 8728 | DiagnosticPredicate DP(Operand.iss8_0Imm()); |
| 8729 | if (DP.isMatch()) |
| 8730 | return MCTargetAsmParser::Match_Success; |
| 8731 | break; |
| 8732 | } |
| 8733 | case MCK_s9_0Imm: { |
| 8734 | DiagnosticPredicate DP(Operand.iss9_0Imm()); |
| 8735 | if (DP.isMatch()) |
| 8736 | return MCTargetAsmParser::Match_Success; |
| 8737 | break; |
| 8738 | } |
| 8739 | case MCK_sgp10Const: { |
| 8740 | DiagnosticPredicate DP(Operand.issgp10Const()); |
| 8741 | if (DP.isMatch()) |
| 8742 | return MCTargetAsmParser::Match_Success; |
| 8743 | break; |
| 8744 | } |
| 8745 | case MCK_u10_0Imm: { |
| 8746 | DiagnosticPredicate DP(Operand.isu10_0Imm()); |
| 8747 | if (DP.isMatch()) |
| 8748 | return MCTargetAsmParser::Match_Success; |
| 8749 | break; |
| 8750 | } |
| 8751 | case MCK_u11_3Imm: { |
| 8752 | DiagnosticPredicate DP(Operand.isu11_3Imm()); |
| 8753 | if (DP.isMatch()) |
| 8754 | return MCTargetAsmParser::Match_Success; |
| 8755 | break; |
| 8756 | } |
| 8757 | case MCK_u16_0Imm: { |
| 8758 | DiagnosticPredicate DP(Operand.isu16_0Imm()); |
| 8759 | if (DP.isMatch()) |
| 8760 | return MCTargetAsmParser::Match_Success; |
| 8761 | break; |
| 8762 | } |
| 8763 | case MCK_u1_0Imm: { |
| 8764 | DiagnosticPredicate DP(Operand.isu1_0Imm()); |
| 8765 | if (DP.isMatch()) |
| 8766 | return MCTargetAsmParser::Match_Success; |
| 8767 | break; |
| 8768 | } |
| 8769 | case MCK_u26_6Imm: { |
| 8770 | DiagnosticPredicate DP(Operand.isu26_6Imm()); |
| 8771 | if (DP.isMatch()) |
| 8772 | return MCTargetAsmParser::Match_Success; |
| 8773 | break; |
| 8774 | } |
| 8775 | case MCK_u29_3Imm: { |
| 8776 | DiagnosticPredicate DP(Operand.isu29_3Imm()); |
| 8777 | if (DP.isMatch()) |
| 8778 | return MCTargetAsmParser::Match_Success; |
| 8779 | break; |
| 8780 | } |
| 8781 | case MCK_u2_0Imm: { |
| 8782 | DiagnosticPredicate DP(Operand.isu2_0Imm()); |
| 8783 | if (DP.isMatch()) |
| 8784 | return MCTargetAsmParser::Match_Success; |
| 8785 | break; |
| 8786 | } |
| 8787 | case MCK_u30_2Imm: { |
| 8788 | DiagnosticPredicate DP(Operand.isu30_2Imm()); |
| 8789 | if (DP.isMatch()) |
| 8790 | return MCTargetAsmParser::Match_Success; |
| 8791 | break; |
| 8792 | } |
| 8793 | case MCK_u31_1Imm: { |
| 8794 | DiagnosticPredicate DP(Operand.isu31_1Imm()); |
| 8795 | if (DP.isMatch()) |
| 8796 | return MCTargetAsmParser::Match_Success; |
| 8797 | break; |
| 8798 | } |
| 8799 | case MCK_u32_0Imm: { |
| 8800 | DiagnosticPredicate DP(Operand.isu32_0Imm()); |
| 8801 | if (DP.isMatch()) |
| 8802 | return MCTargetAsmParser::Match_Success; |
| 8803 | break; |
| 8804 | } |
| 8805 | case MCK_u3_0Imm: { |
| 8806 | DiagnosticPredicate DP(Operand.isu3_0Imm()); |
| 8807 | if (DP.isMatch()) |
| 8808 | return MCTargetAsmParser::Match_Success; |
| 8809 | break; |
| 8810 | } |
| 8811 | case MCK_u3_1Imm: { |
| 8812 | DiagnosticPredicate DP(Operand.isu3_1Imm()); |
| 8813 | if (DP.isMatch()) |
| 8814 | return MCTargetAsmParser::Match_Success; |
| 8815 | break; |
| 8816 | } |
| 8817 | case MCK_u4_0Imm: { |
| 8818 | DiagnosticPredicate DP(Operand.isu4_0Imm()); |
| 8819 | if (DP.isMatch()) |
| 8820 | return MCTargetAsmParser::Match_Success; |
| 8821 | break; |
| 8822 | } |
| 8823 | case MCK_u4_2Imm: { |
| 8824 | DiagnosticPredicate DP(Operand.isu4_2Imm()); |
| 8825 | if (DP.isMatch()) |
| 8826 | return MCTargetAsmParser::Match_Success; |
| 8827 | break; |
| 8828 | } |
| 8829 | case MCK_u5_0Imm: { |
| 8830 | DiagnosticPredicate DP(Operand.isu5_0Imm()); |
| 8831 | if (DP.isMatch()) |
| 8832 | return MCTargetAsmParser::Match_Success; |
| 8833 | break; |
| 8834 | } |
| 8835 | case MCK_u5_2Imm: { |
| 8836 | DiagnosticPredicate DP(Operand.isu5_2Imm()); |
| 8837 | if (DP.isMatch()) |
| 8838 | return MCTargetAsmParser::Match_Success; |
| 8839 | break; |
| 8840 | } |
| 8841 | case MCK_u5_3Imm: { |
| 8842 | DiagnosticPredicate DP(Operand.isu5_3Imm()); |
| 8843 | if (DP.isMatch()) |
| 8844 | return MCTargetAsmParser::Match_Success; |
| 8845 | break; |
| 8846 | } |
| 8847 | case MCK_u64_0Imm: { |
| 8848 | DiagnosticPredicate DP(Operand.isu64_0Imm()); |
| 8849 | if (DP.isMatch()) |
| 8850 | return MCTargetAsmParser::Match_Success; |
| 8851 | break; |
| 8852 | } |
| 8853 | case MCK_u6_0Imm: { |
| 8854 | DiagnosticPredicate DP(Operand.isu6_0Imm()); |
| 8855 | if (DP.isMatch()) |
| 8856 | return MCTargetAsmParser::Match_Success; |
| 8857 | break; |
| 8858 | } |
| 8859 | case MCK_u6_1Imm: { |
| 8860 | DiagnosticPredicate DP(Operand.isu6_1Imm()); |
| 8861 | if (DP.isMatch()) |
| 8862 | return MCTargetAsmParser::Match_Success; |
| 8863 | break; |
| 8864 | } |
| 8865 | case MCK_u6_2Imm: { |
| 8866 | DiagnosticPredicate DP(Operand.isu6_2Imm()); |
| 8867 | if (DP.isMatch()) |
| 8868 | return MCTargetAsmParser::Match_Success; |
| 8869 | break; |
| 8870 | } |
| 8871 | case MCK_u7_0Imm: { |
| 8872 | DiagnosticPredicate DP(Operand.isu7_0Imm()); |
| 8873 | if (DP.isMatch()) |
| 8874 | return MCTargetAsmParser::Match_Success; |
| 8875 | break; |
| 8876 | } |
| 8877 | case MCK_u8_0Imm: { |
| 8878 | DiagnosticPredicate DP(Operand.isu8_0Imm()); |
| 8879 | if (DP.isMatch()) |
| 8880 | return MCTargetAsmParser::Match_Success; |
| 8881 | break; |
| 8882 | } |
| 8883 | } // end switch (Kind) |
| 8884 | |
| 8885 | if (Operand.isReg()) { |
| 8886 | static constexpr uint16_t Table[Hexagon::NUM_TARGET_REGS] = { |
| 8887 | InvalidMatchClass, |
| 8888 | MCK_SysRegs, |
| 8889 | MCK_SysRegs, |
| 8890 | MCK_SysRegs, |
| 8891 | MCK_CtrRegs64, |
| 8892 | MCK_DIAG, |
| 8893 | MCK_SysRegs, |
| 8894 | MCK_SysRegs, |
| 8895 | MCK_Reg16, |
| 8896 | MCK_Reg16, |
| 8897 | MCK_GuestRegs, |
| 8898 | MCK_GuestRegs, |
| 8899 | MCK_GP, |
| 8900 | MCK_GuestRegs, |
| 8901 | MCK_GuestRegs, |
| 8902 | MCK_GuestRegs, |
| 8903 | MCK_SysRegs, |
| 8904 | MCK_SysRegs, |
| 8905 | MCK_SysRegs, |
| 8906 | MCK_SysRegs, |
| 8907 | MCK_SysRegs, |
| 8908 | MCK_SysRegs, |
| 8909 | MCK_SysRegs, |
| 8910 | MCK_SysRegs, |
| 8911 | MCK_PC, |
| 8912 | MCK_SysRegs, |
| 8913 | MCK_SysRegs, |
| 8914 | MCK_Reg20, |
| 8915 | MCK_Reg16, |
| 8916 | MCK_Reg16, |
| 8917 | MCK_SysRegs, |
| 8918 | MCK_SysRegs, |
| 8919 | MCK_SysRegs, |
| 8920 | MCK_SysRegs, |
| 8921 | MCK_SysRegs, |
| 8922 | MCK_SysRegs, |
| 8923 | MCK_CtrRegs, |
| 8924 | MCK_CtrRegs64, |
| 8925 | MCK_CtrRegs, |
| 8926 | MCK_CtrRegs, |
| 8927 | MCK_Reg11, |
| 8928 | MCK_UsrBits, |
| 8929 | MCK_Reg20, |
| 8930 | MCK_Reg16, |
| 8931 | MCK_Reg16, |
| 8932 | MCK_SysRegs, |
| 8933 | MCK_V65Regs, |
| 8934 | MCK_SysRegs, |
| 8935 | MCK_SysRegs, |
| 8936 | MCK_SysRegs, |
| 8937 | MCK_SysRegs, |
| 8938 | MCK_SysRegs, |
| 8939 | MCK_SysRegs, |
| 8940 | MCK_CtrRegs, |
| 8941 | MCK_CtrRegs, |
| 8942 | MCK_CtrRegs, |
| 8943 | MCK_CtrRegs, |
| 8944 | MCK_Reg3, |
| 8945 | MCK_Reg3, |
| 8946 | MCK_Reg3, |
| 8947 | MCK_Reg3, |
| 8948 | MCK_DoubleRegs, |
| 8949 | MCK_DoubleRegs, |
| 8950 | MCK_DoubleRegs, |
| 8951 | MCK_DoubleRegs, |
| 8952 | MCK_GeneralDoubleLow8Regs, |
| 8953 | MCK_GeneralDoubleLow8Regs, |
| 8954 | MCK_GeneralDoubleLow8Regs, |
| 8955 | MCK_GeneralDoubleLow8Regs, |
| 8956 | MCK_DoubleRegs, |
| 8957 | MCK_DoubleRegs, |
| 8958 | MCK_DoubleRegs, |
| 8959 | MCK_DoubleRegs, |
| 8960 | MCK_GuestRegs, |
| 8961 | MCK_GuestRegs, |
| 8962 | MCK_GuestRegs, |
| 8963 | MCK_GuestRegs, |
| 8964 | MCK_GuestRegs, |
| 8965 | MCK_GuestRegs, |
| 8966 | MCK_GuestRegs, |
| 8967 | MCK_GuestRegs, |
| 8968 | MCK_GuestRegs, |
| 8969 | MCK_GuestRegs, |
| 8970 | MCK_GuestRegs, |
| 8971 | MCK_GuestRegs, |
| 8972 | MCK_GuestRegs, |
| 8973 | MCK_GuestRegs, |
| 8974 | MCK_GuestRegs, |
| 8975 | MCK_GuestRegs, |
| 8976 | MCK_GuestRegs, |
| 8977 | MCK_GuestRegs, |
| 8978 | MCK_GuestRegs, |
| 8979 | MCK_GuestRegs, |
| 8980 | MCK_GuestRegs, |
| 8981 | MCK_GuestRegs, |
| 8982 | MCK_GuestRegs, |
| 8983 | MCK_GuestRegs, |
| 8984 | MCK_GuestRegs, |
| 8985 | MCK_GuestRegs, |
| 8986 | MCK_GuestRegs, |
| 8987 | MCK_SysRegs, |
| 8988 | MCK_SysRegs, |
| 8989 | MCK_CtrRegs, |
| 8990 | MCK_CtrRegs, |
| 8991 | MCK_ModRegs, |
| 8992 | MCK_ModRegs, |
| 8993 | MCK_P0, |
| 8994 | MCK_P1, |
| 8995 | MCK_PredRegs, |
| 8996 | MCK_P3, |
| 8997 | MCK_SysRegs, |
| 8998 | MCK_SysRegs, |
| 8999 | MCK_SysRegs, |
| 9000 | MCK_SysRegs, |
| 9001 | MCK_HvxQR, |
| 9002 | MCK_HvxQR, |
| 9003 | MCK_HvxQR, |
| 9004 | MCK_HvxQR, |
| 9005 | MCK_IntRegsLow8, |
| 9006 | MCK_IntRegsLow8, |
| 9007 | MCK_IntRegsLow8, |
| 9008 | MCK_IntRegsLow8, |
| 9009 | MCK_IntRegsLow8, |
| 9010 | MCK_IntRegsLow8, |
| 9011 | MCK_IntRegsLow8, |
| 9012 | MCK_IntRegsLow8, |
| 9013 | MCK_IntRegs, |
| 9014 | MCK_IntRegs, |
| 9015 | MCK_IntRegs, |
| 9016 | MCK_IntRegs, |
| 9017 | MCK_IntRegs, |
| 9018 | MCK_IntRegs, |
| 9019 | MCK_IntRegs, |
| 9020 | MCK_IntRegs, |
| 9021 | MCK_GeneralSubRegs, |
| 9022 | MCK_GeneralSubRegs, |
| 9023 | MCK_GeneralSubRegs, |
| 9024 | MCK_GeneralSubRegs, |
| 9025 | MCK_GeneralSubRegs, |
| 9026 | MCK_GeneralSubRegs, |
| 9027 | MCK_GeneralSubRegs, |
| 9028 | MCK_GeneralSubRegs, |
| 9029 | MCK_IntRegs, |
| 9030 | MCK_IntRegs, |
| 9031 | MCK_IntRegs, |
| 9032 | MCK_IntRegs, |
| 9033 | MCK_IntRegs, |
| 9034 | MCK_IntRegs, |
| 9035 | MCK_IntRegs, |
| 9036 | MCK_IntRegs, |
| 9037 | MCK_SysRegs, |
| 9038 | MCK_SysRegs, |
| 9039 | MCK_SysRegs, |
| 9040 | MCK_SysRegs, |
| 9041 | MCK_SysRegs, |
| 9042 | MCK_SysRegs, |
| 9043 | MCK_SysRegs, |
| 9044 | MCK_SysRegs, |
| 9045 | MCK_SysRegs, |
| 9046 | MCK_SysRegs, |
| 9047 | MCK_SysRegs, |
| 9048 | MCK_SysRegs, |
| 9049 | MCK_SysRegs, |
| 9050 | MCK_SysRegs, |
| 9051 | MCK_SysRegs, |
| 9052 | MCK_SysRegs, |
| 9053 | MCK_SysRegs, |
| 9054 | MCK_SysRegs, |
| 9055 | MCK_SysRegs, |
| 9056 | MCK_SysRegs, |
| 9057 | MCK_SysRegs, |
| 9058 | MCK_SysRegs, |
| 9059 | MCK_SysRegs, |
| 9060 | MCK_SysRegs, |
| 9061 | MCK_SysRegs, |
| 9062 | MCK_SysRegs, |
| 9063 | MCK_SysRegs, |
| 9064 | MCK_SysRegs, |
| 9065 | MCK_SysRegs, |
| 9066 | MCK_SysRegs, |
| 9067 | MCK_SysRegs, |
| 9068 | MCK_SysRegs, |
| 9069 | MCK_SysRegs, |
| 9070 | MCK_SysRegs, |
| 9071 | MCK_SysRegs, |
| 9072 | MCK_SysRegs, |
| 9073 | MCK_SysRegs, |
| 9074 | MCK_SysRegs, |
| 9075 | MCK_SysRegs, |
| 9076 | MCK_SysRegs, |
| 9077 | MCK_SysRegs, |
| 9078 | MCK_SysRegs, |
| 9079 | MCK_SysRegs, |
| 9080 | MCK_SysRegs, |
| 9081 | MCK_CtrRegs, |
| 9082 | MCK_CtrRegs, |
| 9083 | MCK_SGP0, |
| 9084 | MCK_SGP1, |
| 9085 | MCK_HvxVR, |
| 9086 | MCK_HvxVR, |
| 9087 | MCK_HvxVR, |
| 9088 | MCK_HvxVR, |
| 9089 | MCK_HvxVR, |
| 9090 | MCK_HvxVR, |
| 9091 | MCK_HvxVR, |
| 9092 | MCK_HvxVR, |
| 9093 | MCK_HvxVR, |
| 9094 | MCK_HvxVR, |
| 9095 | MCK_HvxVR, |
| 9096 | MCK_HvxVR, |
| 9097 | MCK_HvxVR, |
| 9098 | MCK_HvxVR, |
| 9099 | MCK_HvxVR, |
| 9100 | MCK_HvxVR, |
| 9101 | MCK_HvxVR, |
| 9102 | MCK_HvxVR, |
| 9103 | MCK_HvxVR, |
| 9104 | MCK_HvxVR, |
| 9105 | MCK_HvxVR, |
| 9106 | MCK_HvxVR, |
| 9107 | MCK_HvxVR, |
| 9108 | MCK_HvxVR, |
| 9109 | MCK_HvxVR, |
| 9110 | MCK_HvxVR, |
| 9111 | MCK_HvxVR, |
| 9112 | MCK_HvxVR, |
| 9113 | MCK_HvxVR, |
| 9114 | MCK_HvxVR, |
| 9115 | MCK_HvxVR, |
| 9116 | MCK_HvxVR, |
| 9117 | InvalidMatchClass, |
| 9118 | InvalidMatchClass, |
| 9119 | InvalidMatchClass, |
| 9120 | InvalidMatchClass, |
| 9121 | InvalidMatchClass, |
| 9122 | InvalidMatchClass, |
| 9123 | InvalidMatchClass, |
| 9124 | InvalidMatchClass, |
| 9125 | InvalidMatchClass, |
| 9126 | InvalidMatchClass, |
| 9127 | InvalidMatchClass, |
| 9128 | InvalidMatchClass, |
| 9129 | InvalidMatchClass, |
| 9130 | InvalidMatchClass, |
| 9131 | InvalidMatchClass, |
| 9132 | InvalidMatchClass, |
| 9133 | InvalidMatchClass, |
| 9134 | InvalidMatchClass, |
| 9135 | InvalidMatchClass, |
| 9136 | InvalidMatchClass, |
| 9137 | InvalidMatchClass, |
| 9138 | InvalidMatchClass, |
| 9139 | InvalidMatchClass, |
| 9140 | InvalidMatchClass, |
| 9141 | InvalidMatchClass, |
| 9142 | InvalidMatchClass, |
| 9143 | InvalidMatchClass, |
| 9144 | InvalidMatchClass, |
| 9145 | InvalidMatchClass, |
| 9146 | InvalidMatchClass, |
| 9147 | InvalidMatchClass, |
| 9148 | InvalidMatchClass, |
| 9149 | InvalidMatchClass, |
| 9150 | InvalidMatchClass, |
| 9151 | InvalidMatchClass, |
| 9152 | InvalidMatchClass, |
| 9153 | InvalidMatchClass, |
| 9154 | InvalidMatchClass, |
| 9155 | InvalidMatchClass, |
| 9156 | InvalidMatchClass, |
| 9157 | InvalidMatchClass, |
| 9158 | InvalidMatchClass, |
| 9159 | InvalidMatchClass, |
| 9160 | InvalidMatchClass, |
| 9161 | InvalidMatchClass, |
| 9162 | InvalidMatchClass, |
| 9163 | InvalidMatchClass, |
| 9164 | InvalidMatchClass, |
| 9165 | InvalidMatchClass, |
| 9166 | InvalidMatchClass, |
| 9167 | InvalidMatchClass, |
| 9168 | InvalidMatchClass, |
| 9169 | InvalidMatchClass, |
| 9170 | InvalidMatchClass, |
| 9171 | InvalidMatchClass, |
| 9172 | InvalidMatchClass, |
| 9173 | InvalidMatchClass, |
| 9174 | InvalidMatchClass, |
| 9175 | InvalidMatchClass, |
| 9176 | InvalidMatchClass, |
| 9177 | InvalidMatchClass, |
| 9178 | InvalidMatchClass, |
| 9179 | InvalidMatchClass, |
| 9180 | InvalidMatchClass, |
| 9181 | MCK_HvxVQR, |
| 9182 | MCK_HvxVQR, |
| 9183 | MCK_HvxVQR, |
| 9184 | MCK_HvxVQR, |
| 9185 | MCK_HvxVQR, |
| 9186 | MCK_HvxVQR, |
| 9187 | MCK_HvxVQR, |
| 9188 | MCK_HvxVQR, |
| 9189 | MCK_HvxWR, |
| 9190 | MCK_HvxWR, |
| 9191 | MCK_HvxWR, |
| 9192 | MCK_HvxWR, |
| 9193 | MCK_HvxWR, |
| 9194 | MCK_HvxWR, |
| 9195 | MCK_HvxWR, |
| 9196 | MCK_HvxWR, |
| 9197 | MCK_HvxWR, |
| 9198 | MCK_HvxWR, |
| 9199 | MCK_HvxWR, |
| 9200 | MCK_HvxWR, |
| 9201 | MCK_HvxWR, |
| 9202 | MCK_HvxWR, |
| 9203 | MCK_HvxWR, |
| 9204 | MCK_HvxWR, |
| 9205 | MCK_VectRegRev, |
| 9206 | MCK_VectRegRev, |
| 9207 | MCK_VectRegRev, |
| 9208 | MCK_VectRegRev, |
| 9209 | MCK_VectRegRev, |
| 9210 | MCK_VectRegRev, |
| 9211 | MCK_VectRegRev, |
| 9212 | MCK_VectRegRev, |
| 9213 | MCK_VectRegRev, |
| 9214 | MCK_VectRegRev, |
| 9215 | MCK_VectRegRev, |
| 9216 | MCK_VectRegRev, |
| 9217 | MCK_VectRegRev, |
| 9218 | MCK_VectRegRev, |
| 9219 | MCK_VectRegRev, |
| 9220 | MCK_VectRegRev, |
| 9221 | MCK_CtrRegs64, |
| 9222 | MCK_CtrRegs64, |
| 9223 | MCK_CtrRegs64, |
| 9224 | MCK_Reg19, |
| 9225 | MCK_CtrRegs64, |
| 9226 | MCK_CtrRegs64, |
| 9227 | MCK_Reg20, |
| 9228 | MCK_GuestRegs64, |
| 9229 | MCK_GuestRegs64, |
| 9230 | MCK_GuestRegs64, |
| 9231 | MCK_GuestRegs64, |
| 9232 | MCK_GuestRegs64, |
| 9233 | MCK_GuestRegs64, |
| 9234 | MCK_GuestRegs64, |
| 9235 | MCK_GuestRegs64, |
| 9236 | MCK_GuestRegs64, |
| 9237 | MCK_GuestRegs64, |
| 9238 | MCK_GuestRegs64, |
| 9239 | MCK_GuestRegs64, |
| 9240 | MCK_GuestRegs64, |
| 9241 | MCK_GuestRegs64, |
| 9242 | MCK_GuestRegs64, |
| 9243 | MCK_GuestRegs64, |
| 9244 | MCK_CtrRegs, |
| 9245 | MCK_SysRegs64, |
| 9246 | MCK_SysRegs64, |
| 9247 | MCK_SysRegs64, |
| 9248 | MCK_SysRegs64, |
| 9249 | MCK_SysRegs64, |
| 9250 | MCK_SysRegs64, |
| 9251 | MCK_SysRegs64, |
| 9252 | MCK_SysRegs64, |
| 9253 | MCK_SysRegs64, |
| 9254 | MCK_SysRegs64, |
| 9255 | MCK_SysRegs64, |
| 9256 | MCK_SysRegs64, |
| 9257 | MCK_SysRegs64, |
| 9258 | MCK_SysRegs64, |
| 9259 | MCK_SysRegs64, |
| 9260 | MCK_SysRegs64, |
| 9261 | MCK_SysRegs64, |
| 9262 | MCK_SysRegs64, |
| 9263 | MCK_SysRegs64, |
| 9264 | MCK_SysRegs64, |
| 9265 | MCK_SysRegs64, |
| 9266 | MCK_SysRegs64, |
| 9267 | MCK_SysRegs64, |
| 9268 | MCK_SysRegs64, |
| 9269 | MCK_SysRegs64, |
| 9270 | MCK_SysRegs64, |
| 9271 | MCK_SysRegs64, |
| 9272 | MCK_SysRegs64, |
| 9273 | MCK_SysRegs64, |
| 9274 | MCK_SysRegs64, |
| 9275 | MCK_SysRegs64, |
| 9276 | MCK_SysRegs64, |
| 9277 | MCK_SysRegs64, |
| 9278 | MCK_SysRegs64, |
| 9279 | MCK_SysRegs64, |
| 9280 | MCK_SysRegs64, |
| 9281 | MCK_SysRegs64, |
| 9282 | MCK_SysRegs64, |
| 9283 | MCK_SysRegs64, |
| 9284 | MCK_SysRegs64, |
| 9285 | }; |
| 9286 | |
| 9287 | MCRegister Reg = Operand.getReg(); |
| 9288 | MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass; |
| 9289 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
| 9290 | getDiagKindFromRegisterClass(Kind); |
| 9291 | } |
| 9292 | |
| 9293 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
| 9294 | return getDiagKindFromRegisterClass(Kind); |
| 9295 | |
| 9296 | return MCTargetAsmParser::Match_InvalidOperand; |
| 9297 | } |
| 9298 | |
| 9299 | #ifndef NDEBUG |
| 9300 | const char *getMatchClassName(MatchClassKind Kind) { |
| 9301 | switch (Kind) { |
| 9302 | case InvalidMatchClass: return "InvalidMatchClass" ; |
| 9303 | case OptionalMatchClass: return "OptionalMatchClass" ; |
| 9304 | case MCK__EXCLAIM_: return "MCK__EXCLAIM_" ; |
| 9305 | case MCK__HASH_: return "MCK__HASH_" ; |
| 9306 | case MCK__38_: return "MCK__38_" ; |
| 9307 | case MCK__40_: return "MCK__40_" ; |
| 9308 | case MCK__41_: return "MCK__41_" ; |
| 9309 | case MCK__STAR_: return "MCK__STAR_" ; |
| 9310 | case MCK__43_: return "MCK__43_" ; |
| 9311 | case MCK__MINUS_: return "MCK__MINUS_" ; |
| 9312 | case MCK__DOT_: return "MCK__DOT_" ; |
| 9313 | case MCK_0: return "MCK_0" ; |
| 9314 | case MCK_1: return "MCK_1" ; |
| 9315 | case MCK_16: return "MCK_16" ; |
| 9316 | case MCK__COLON_: return "MCK__COLON_" ; |
| 9317 | case MCK__59_: return "MCK__59_" ; |
| 9318 | case MCK__LT_: return "MCK__LT_" ; |
| 9319 | case MCK__61_: return "MCK__61_" ; |
| 9320 | case MCK__GT_: return "MCK__GT_" ; |
| 9321 | case MCK_CONST32: return "MCK_CONST32" ; |
| 9322 | case MCK_CONST64: return "MCK_CONST64" ; |
| 9323 | case MCK_DUPLEX: return "MCK_DUPLEX" ; |
| 9324 | case MCK_I: return "MCK_I" ; |
| 9325 | case MCK__94_: return "MCK__94_" ; |
| 9326 | case MCK_abs: return "MCK_abs" ; |
| 9327 | case MCK_add: return "MCK_add" ; |
| 9328 | case MCK_addasl: return "MCK_addasl" ; |
| 9329 | case MCK_all8: return "MCK_all8" ; |
| 9330 | case MCK_allocframe: return "MCK_allocframe" ; |
| 9331 | case MCK_and: return "MCK_and" ; |
| 9332 | case MCK_any8: return "MCK_any8" ; |
| 9333 | case MCK_asl: return "MCK_asl" ; |
| 9334 | case MCK_aslh: return "MCK_aslh" ; |
| 9335 | case MCK_asr: return "MCK_asr" ; |
| 9336 | case MCK_asrh: return "MCK_asrh" ; |
| 9337 | case MCK_asrrnd: return "MCK_asrrnd" ; |
| 9338 | case MCK_at: return "MCK_at" ; |
| 9339 | case MCK_b: return "MCK_b" ; |
| 9340 | case MCK_b10: return "MCK_b10" ; |
| 9341 | case MCK_barrier: return "MCK_barrier" ; |
| 9342 | case MCK_bf: return "MCK_bf" ; |
| 9343 | case MCK_bitsclr: return "MCK_bitsclr" ; |
| 9344 | case MCK_bitsplit: return "MCK_bitsplit" ; |
| 9345 | case MCK_bitsset: return "MCK_bitsset" ; |
| 9346 | case MCK_boundscheck: return "MCK_boundscheck" ; |
| 9347 | case MCK_brev: return "MCK_brev" ; |
| 9348 | case MCK_brkpt: return "MCK_brkpt" ; |
| 9349 | case MCK_c: return "MCK_c" ; |
| 9350 | case MCK_call: return "MCK_call" ; |
| 9351 | case MCK_callr: return "MCK_callr" ; |
| 9352 | case MCK_callrh: return "MCK_callrh" ; |
| 9353 | case MCK_carry: return "MCK_carry" ; |
| 9354 | case MCK_chop: return "MCK_chop" ; |
| 9355 | case MCK_ciad: return "MCK_ciad" ; |
| 9356 | case MCK_circ: return "MCK_circ" ; |
| 9357 | case MCK_cl0: return "MCK_cl0" ; |
| 9358 | case MCK_cl1: return "MCK_cl1" ; |
| 9359 | case MCK_clb: return "MCK_clb" ; |
| 9360 | case MCK_clip: return "MCK_clip" ; |
| 9361 | case MCK_clrbit: return "MCK_clrbit" ; |
| 9362 | case MCK_cmp: return "MCK_cmp" ; |
| 9363 | case MCK_cmpb: return "MCK_cmpb" ; |
| 9364 | case MCK_cmph: return "MCK_cmph" ; |
| 9365 | case MCK_cmpy: return "MCK_cmpy" ; |
| 9366 | case MCK_cmpyi: return "MCK_cmpyi" ; |
| 9367 | case MCK_cmpyiw: return "MCK_cmpyiw" ; |
| 9368 | case MCK_cmpyiwh: return "MCK_cmpyiwh" ; |
| 9369 | case MCK_cmpyr: return "MCK_cmpyr" ; |
| 9370 | case MCK_cmpyrw: return "MCK_cmpyrw" ; |
| 9371 | case MCK_cmpyrwh: return "MCK_cmpyrwh" ; |
| 9372 | case MCK_combine: return "MCK_combine" ; |
| 9373 | case MCK_convert_95_d2df: return "MCK_convert_95_d2df" ; |
| 9374 | case MCK_convert_95_d2sf: return "MCK_convert_95_d2sf" ; |
| 9375 | case MCK_convert_95_df2d: return "MCK_convert_95_df2d" ; |
| 9376 | case MCK_convert_95_df2sf: return "MCK_convert_95_df2sf" ; |
| 9377 | case MCK_convert_95_df2ud: return "MCK_convert_95_df2ud" ; |
| 9378 | case MCK_convert_95_df2uw: return "MCK_convert_95_df2uw" ; |
| 9379 | case MCK_convert_95_df2w: return "MCK_convert_95_df2w" ; |
| 9380 | case MCK_convert_95_sf2d: return "MCK_convert_95_sf2d" ; |
| 9381 | case MCK_convert_95_sf2df: return "MCK_convert_95_sf2df" ; |
| 9382 | case MCK_convert_95_sf2ud: return "MCK_convert_95_sf2ud" ; |
| 9383 | case MCK_convert_95_sf2uw: return "MCK_convert_95_sf2uw" ; |
| 9384 | case MCK_convert_95_sf2w: return "MCK_convert_95_sf2w" ; |
| 9385 | case MCK_convert_95_ud2df: return "MCK_convert_95_ud2df" ; |
| 9386 | case MCK_convert_95_ud2sf: return "MCK_convert_95_ud2sf" ; |
| 9387 | case MCK_convert_95_uw2df: return "MCK_convert_95_uw2df" ; |
| 9388 | case MCK_convert_95_uw2sf: return "MCK_convert_95_uw2sf" ; |
| 9389 | case MCK_convert_95_w2df: return "MCK_convert_95_w2df" ; |
| 9390 | case MCK_convert_95_w2sf: return "MCK_convert_95_w2sf" ; |
| 9391 | case MCK_crnd: return "MCK_crnd" ; |
| 9392 | case MCK_cround: return "MCK_cround" ; |
| 9393 | case MCK_crswap: return "MCK_crswap" ; |
| 9394 | case MCK_cswi: return "MCK_cswi" ; |
| 9395 | case MCK_ct0: return "MCK_ct0" ; |
| 9396 | case MCK_ct1: return "MCK_ct1" ; |
| 9397 | case MCK_ctlbw: return "MCK_ctlbw" ; |
| 9398 | case MCK_cur: return "MCK_cur" ; |
| 9399 | case MCK_dccleana: return "MCK_dccleana" ; |
| 9400 | case MCK_dccleanidx: return "MCK_dccleanidx" ; |
| 9401 | case MCK_dccleaninva: return "MCK_dccleaninva" ; |
| 9402 | case MCK_dccleaninvidx: return "MCK_dccleaninvidx" ; |
| 9403 | case MCK_dcfetch: return "MCK_dcfetch" ; |
| 9404 | case MCK_dcinva: return "MCK_dcinva" ; |
| 9405 | case MCK_dcinvidx: return "MCK_dcinvidx" ; |
| 9406 | case MCK_dckill: return "MCK_dckill" ; |
| 9407 | case MCK_dctagr: return "MCK_dctagr" ; |
| 9408 | case MCK_dctagw: return "MCK_dctagw" ; |
| 9409 | case MCK_dczeroa: return "MCK_dczeroa" ; |
| 9410 | case MCK_dealloc_95_return: return "MCK_dealloc_95_return" ; |
| 9411 | case MCK_deallocframe: return "MCK_deallocframe" ; |
| 9412 | case MCK_decbin: return "MCK_decbin" ; |
| 9413 | case MCK_deinterleave: return "MCK_deinterleave" ; |
| 9414 | case MCK_deprecated: return "MCK_deprecated" ; |
| 9415 | case MCK_dfadd: return "MCK_dfadd" ; |
| 9416 | case MCK_dfclass: return "MCK_dfclass" ; |
| 9417 | case MCK_dfcmp: return "MCK_dfcmp" ; |
| 9418 | case MCK_dfmake: return "MCK_dfmake" ; |
| 9419 | case MCK_dfmax: return "MCK_dfmax" ; |
| 9420 | case MCK_dfmin: return "MCK_dfmin" ; |
| 9421 | case MCK_dfmpyfix: return "MCK_dfmpyfix" ; |
| 9422 | case MCK_dfmpyhh: return "MCK_dfmpyhh" ; |
| 9423 | case MCK_dfmpylh: return "MCK_dfmpylh" ; |
| 9424 | case MCK_dfmpyll: return "MCK_dfmpyll" ; |
| 9425 | case MCK_dfsub: return "MCK_dfsub" ; |
| 9426 | case MCK_diag0: return "MCK_diag0" ; |
| 9427 | case MCK_diag1: return "MCK_diag1" ; |
| 9428 | case MCK_dmlink: return "MCK_dmlink" ; |
| 9429 | case MCK_dmpause: return "MCK_dmpause" ; |
| 9430 | case MCK_dmpoll: return "MCK_dmpoll" ; |
| 9431 | case MCK_dmresume: return "MCK_dmresume" ; |
| 9432 | case MCK_dmstart: return "MCK_dmstart" ; |
| 9433 | case MCK_dmwait: return "MCK_dmwait" ; |
| 9434 | case MCK_endloop0: return "MCK_endloop0" ; |
| 9435 | case MCK_endloop01: return "MCK_endloop01" ; |
| 9436 | case MCK_endloop1: return "MCK_endloop1" ; |
| 9437 | case MCK_eq: return "MCK_eq" ; |
| 9438 | case MCK_extract: return "MCK_extract" ; |
| 9439 | case MCK_extractu: return "MCK_extractu" ; |
| 9440 | case MCK_f8: return "MCK_f8" ; |
| 9441 | case MCK_fastcorner9: return "MCK_fastcorner9" ; |
| 9442 | case MCK_ge: return "MCK_ge" ; |
| 9443 | case MCK_getimask: return "MCK_getimask" ; |
| 9444 | case MCK_geu: return "MCK_geu" ; |
| 9445 | case MCK_gt: return "MCK_gt" ; |
| 9446 | case MCK_gtu: return "MCK_gtu" ; |
| 9447 | case MCK_h: return "MCK_h" ; |
| 9448 | case MCK_hf: return "MCK_hf" ; |
| 9449 | case MCK_hi: return "MCK_hi" ; |
| 9450 | case MCK_hintjr: return "MCK_hintjr" ; |
| 9451 | case MCK_iassignr: return "MCK_iassignr" ; |
| 9452 | case MCK_iassignw: return "MCK_iassignw" ; |
| 9453 | case MCK_icdatar: return "MCK_icdatar" ; |
| 9454 | case MCK_icdataw: return "MCK_icdataw" ; |
| 9455 | case MCK_icinva: return "MCK_icinva" ; |
| 9456 | case MCK_icinvidx: return "MCK_icinvidx" ; |
| 9457 | case MCK_ickill: return "MCK_ickill" ; |
| 9458 | case MCK_iconst: return "MCK_iconst" ; |
| 9459 | case MCK_ictagr: return "MCK_ictagr" ; |
| 9460 | case MCK_ictagw: return "MCK_ictagw" ; |
| 9461 | case MCK_if: return "MCK_if" ; |
| 9462 | case MCK_immext: return "MCK_immext" ; |
| 9463 | case MCK_insert: return "MCK_insert" ; |
| 9464 | case MCK_interleave: return "MCK_interleave" ; |
| 9465 | case MCK_isync: return "MCK_isync" ; |
| 9466 | case MCK_jump: return "MCK_jump" ; |
| 9467 | case MCK_jumpr: return "MCK_jumpr" ; |
| 9468 | case MCK_jumprh: return "MCK_jumprh" ; |
| 9469 | case MCK_k0lock: return "MCK_k0lock" ; |
| 9470 | case MCK_k0unlock: return "MCK_k0unlock" ; |
| 9471 | case MCK_l: return "MCK_l" ; |
| 9472 | case MCK_l2cleanidx: return "MCK_l2cleanidx" ; |
| 9473 | case MCK_l2cleaninvidx: return "MCK_l2cleaninvidx" ; |
| 9474 | case MCK_l2fetch: return "MCK_l2fetch" ; |
| 9475 | case MCK_l2gclean: return "MCK_l2gclean" ; |
| 9476 | case MCK_l2gcleaninv: return "MCK_l2gcleaninv" ; |
| 9477 | case MCK_l2gunlock: return "MCK_l2gunlock" ; |
| 9478 | case MCK_l2invidx: return "MCK_l2invidx" ; |
| 9479 | case MCK_l2kill: return "MCK_l2kill" ; |
| 9480 | case MCK_l2locka: return "MCK_l2locka" ; |
| 9481 | case MCK_l2tagr: return "MCK_l2tagr" ; |
| 9482 | case MCK_l2tagw: return "MCK_l2tagw" ; |
| 9483 | case MCK_l2unlocka: return "MCK_l2unlocka" ; |
| 9484 | case MCK_lfs: return "MCK_lfs" ; |
| 9485 | case MCK_lib: return "MCK_lib" ; |
| 9486 | case MCK_lo: return "MCK_lo" ; |
| 9487 | case MCK_loop0: return "MCK_loop0" ; |
| 9488 | case MCK_loop1: return "MCK_loop1" ; |
| 9489 | case MCK_lsl: return "MCK_lsl" ; |
| 9490 | case MCK_lsr: return "MCK_lsr" ; |
| 9491 | case MCK_lt: return "MCK_lt" ; |
| 9492 | case MCK_ltu: return "MCK_ltu" ; |
| 9493 | case MCK_mask: return "MCK_mask" ; |
| 9494 | case MCK_max: return "MCK_max" ; |
| 9495 | case MCK_maxu: return "MCK_maxu" ; |
| 9496 | case MCK_memb: return "MCK_memb" ; |
| 9497 | case MCK_memb_95_fifo: return "MCK_memb_95_fifo" ; |
| 9498 | case MCK_membh: return "MCK_membh" ; |
| 9499 | case MCK_memcpy: return "MCK_memcpy" ; |
| 9500 | case MCK_memd: return "MCK_memd" ; |
| 9501 | case MCK_memd_95_aq: return "MCK_memd_95_aq" ; |
| 9502 | case MCK_memd_95_locked: return "MCK_memd_95_locked" ; |
| 9503 | case MCK_memd_95_rl: return "MCK_memd_95_rl" ; |
| 9504 | case MCK_memh: return "MCK_memh" ; |
| 9505 | case MCK_memh_95_fifo: return "MCK_memh_95_fifo" ; |
| 9506 | case MCK_memub: return "MCK_memub" ; |
| 9507 | case MCK_memubh: return "MCK_memubh" ; |
| 9508 | case MCK_memuh: return "MCK_memuh" ; |
| 9509 | case MCK_memw: return "MCK_memw" ; |
| 9510 | case MCK_memw_95_aq: return "MCK_memw_95_aq" ; |
| 9511 | case MCK_memw_95_locked: return "MCK_memw_95_locked" ; |
| 9512 | case MCK_memw_95_phys: return "MCK_memw_95_phys" ; |
| 9513 | case MCK_memw_95_rl: return "MCK_memw_95_rl" ; |
| 9514 | case MCK_min: return "MCK_min" ; |
| 9515 | case MCK_minu: return "MCK_minu" ; |
| 9516 | case MCK_modwrap: return "MCK_modwrap" ; |
| 9517 | case MCK_mpy: return "MCK_mpy" ; |
| 9518 | case MCK_mpyi: return "MCK_mpyi" ; |
| 9519 | case MCK_mpysu: return "MCK_mpysu" ; |
| 9520 | case MCK_mpyu: return "MCK_mpyu" ; |
| 9521 | case MCK_mpyui: return "MCK_mpyui" ; |
| 9522 | case MCK_mux: return "MCK_mux" ; |
| 9523 | case MCK_n: return "MCK_n" ; |
| 9524 | case MCK_neg: return "MCK_neg" ; |
| 9525 | case MCK_new: return "MCK_new" ; |
| 9526 | case MCK_nmi: return "MCK_nmi" ; |
| 9527 | case MCK_nomatch: return "MCK_nomatch" ; |
| 9528 | case MCK_nop: return "MCK_nop" ; |
| 9529 | case MCK_normamt: return "MCK_normamt" ; |
| 9530 | case MCK_not: return "MCK_not" ; |
| 9531 | case MCK_nt: return "MCK_nt" ; |
| 9532 | case MCK_or: return "MCK_or" ; |
| 9533 | case MCK_packhl: return "MCK_packhl" ; |
| 9534 | case MCK_parity: return "MCK_parity" ; |
| 9535 | case MCK_pause: return "MCK_pause" ; |
| 9536 | case MCK_pmpyw: return "MCK_pmpyw" ; |
| 9537 | case MCK_popcount: return "MCK_popcount" ; |
| 9538 | case MCK_pos: return "MCK_pos" ; |
| 9539 | case MCK_prefixsum: return "MCK_prefixsum" ; |
| 9540 | case MCK_qf16: return "MCK_qf16" ; |
| 9541 | case MCK_qf32: return "MCK_qf32" ; |
| 9542 | case MCK_raw: return "MCK_raw" ; |
| 9543 | case MCK_release: return "MCK_release" ; |
| 9544 | case MCK_resume: return "MCK_resume" ; |
| 9545 | case MCK_rnd: return "MCK_rnd" ; |
| 9546 | case MCK_rol: return "MCK_rol" ; |
| 9547 | case MCK_round: return "MCK_round" ; |
| 9548 | case MCK_rte: return "MCK_rte" ; |
| 9549 | case MCK_sat: return "MCK_sat" ; |
| 9550 | case MCK_satb: return "MCK_satb" ; |
| 9551 | case MCK_sath: return "MCK_sath" ; |
| 9552 | case MCK_satub: return "MCK_satub" ; |
| 9553 | case MCK_satuh: return "MCK_satuh" ; |
| 9554 | case MCK_scale: return "MCK_scale" ; |
| 9555 | case MCK_scatter_95_release: return "MCK_scatter_95_release" ; |
| 9556 | case MCK_setbit: return "MCK_setbit" ; |
| 9557 | case MCK_setimask: return "MCK_setimask" ; |
| 9558 | case MCK_setprio: return "MCK_setprio" ; |
| 9559 | case MCK_sf: return "MCK_sf" ; |
| 9560 | case MCK_sfadd: return "MCK_sfadd" ; |
| 9561 | case MCK_sfclass: return "MCK_sfclass" ; |
| 9562 | case MCK_sfcmp: return "MCK_sfcmp" ; |
| 9563 | case MCK_sffixupd: return "MCK_sffixupd" ; |
| 9564 | case MCK_sffixupn: return "MCK_sffixupn" ; |
| 9565 | case MCK_sffixupr: return "MCK_sffixupr" ; |
| 9566 | case MCK_sfinvsqrta: return "MCK_sfinvsqrta" ; |
| 9567 | case MCK_sfmake: return "MCK_sfmake" ; |
| 9568 | case MCK_sfmax: return "MCK_sfmax" ; |
| 9569 | case MCK_sfmin: return "MCK_sfmin" ; |
| 9570 | case MCK_sfmpy: return "MCK_sfmpy" ; |
| 9571 | case MCK_sfrecipa: return "MCK_sfrecipa" ; |
| 9572 | case MCK_sfsub: return "MCK_sfsub" ; |
| 9573 | case MCK_sgp: return "MCK_sgp" ; |
| 9574 | case MCK_shift: return "MCK_shift" ; |
| 9575 | case MCK_shuffeb: return "MCK_shuffeb" ; |
| 9576 | case MCK_shuffeh: return "MCK_shuffeh" ; |
| 9577 | case MCK_shuffob: return "MCK_shuffob" ; |
| 9578 | case MCK_shuffoh: return "MCK_shuffoh" ; |
| 9579 | case MCK_siad: return "MCK_siad" ; |
| 9580 | case MCK_sp1loop0: return "MCK_sp1loop0" ; |
| 9581 | case MCK_sp2loop0: return "MCK_sp2loop0" ; |
| 9582 | case MCK_sp3loop0: return "MCK_sp3loop0" ; |
| 9583 | case MCK_st: return "MCK_st" ; |
| 9584 | case MCK_start: return "MCK_start" ; |
| 9585 | case MCK_stop: return "MCK_stop" ; |
| 9586 | case MCK_sub: return "MCK_sub" ; |
| 9587 | case MCK_swi: return "MCK_swi" ; |
| 9588 | case MCK_swiz: return "MCK_swiz" ; |
| 9589 | case MCK_sxtb: return "MCK_sxtb" ; |
| 9590 | case MCK_sxth: return "MCK_sxth" ; |
| 9591 | case MCK_sxtw: return "MCK_sxtw" ; |
| 9592 | case MCK_syncht: return "MCK_syncht" ; |
| 9593 | case MCK_t: return "MCK_t" ; |
| 9594 | case MCK_tableidxb: return "MCK_tableidxb" ; |
| 9595 | case MCK_tableidxd: return "MCK_tableidxd" ; |
| 9596 | case MCK_tableidxh: return "MCK_tableidxh" ; |
| 9597 | case MCK_tableidxw: return "MCK_tableidxw" ; |
| 9598 | case MCK_tlbinvasid: return "MCK_tlbinvasid" ; |
| 9599 | case MCK_tlblock: return "MCK_tlblock" ; |
| 9600 | case MCK_tlbmatch: return "MCK_tlbmatch" ; |
| 9601 | case MCK_tlboc: return "MCK_tlboc" ; |
| 9602 | case MCK_tlbp: return "MCK_tlbp" ; |
| 9603 | case MCK_tlbr: return "MCK_tlbr" ; |
| 9604 | case MCK_tlbunlock: return "MCK_tlbunlock" ; |
| 9605 | case MCK_tlbw: return "MCK_tlbw" ; |
| 9606 | case MCK_tmp: return "MCK_tmp" ; |
| 9607 | case MCK_togglebit: return "MCK_togglebit" ; |
| 9608 | case MCK_trace: return "MCK_trace" ; |
| 9609 | case MCK_trap0: return "MCK_trap0" ; |
| 9610 | case MCK_trap1: return "MCK_trap1" ; |
| 9611 | case MCK_tstbit: return "MCK_tstbit" ; |
| 9612 | case MCK_ub: return "MCK_ub" ; |
| 9613 | case MCK_uh: return "MCK_uh" ; |
| 9614 | case MCK_unpause: return "MCK_unpause" ; |
| 9615 | case MCK_uo: return "MCK_uo" ; |
| 9616 | case MCK_uw: return "MCK_uw" ; |
| 9617 | case MCK_v: return "MCK_v" ; |
| 9618 | case MCK_v10mpy: return "MCK_v10mpy" ; |
| 9619 | case MCK_v6mpy: return "MCK_v6mpy" ; |
| 9620 | case MCK_vabs: return "MCK_vabs" ; |
| 9621 | case MCK_vabsb: return "MCK_vabsb" ; |
| 9622 | case MCK_vabsdiff: return "MCK_vabsdiff" ; |
| 9623 | case MCK_vabsdiffb: return "MCK_vabsdiffb" ; |
| 9624 | case MCK_vabsdiffh: return "MCK_vabsdiffh" ; |
| 9625 | case MCK_vabsdiffub: return "MCK_vabsdiffub" ; |
| 9626 | case MCK_vabsdiffuh: return "MCK_vabsdiffuh" ; |
| 9627 | case MCK_vabsdiffw: return "MCK_vabsdiffw" ; |
| 9628 | case MCK_vabsh: return "MCK_vabsh" ; |
| 9629 | case MCK_vabsw: return "MCK_vabsw" ; |
| 9630 | case MCK_vacsh: return "MCK_vacsh" ; |
| 9631 | case MCK_vadd: return "MCK_vadd" ; |
| 9632 | case MCK_vaddb: return "MCK_vaddb" ; |
| 9633 | case MCK_vaddh: return "MCK_vaddh" ; |
| 9634 | case MCK_vaddhub: return "MCK_vaddhub" ; |
| 9635 | case MCK_vaddub: return "MCK_vaddub" ; |
| 9636 | case MCK_vadduh: return "MCK_vadduh" ; |
| 9637 | case MCK_vadduw: return "MCK_vadduw" ; |
| 9638 | case MCK_vaddw: return "MCK_vaddw" ; |
| 9639 | case MCK_valign: return "MCK_valign" ; |
| 9640 | case MCK_valignb: return "MCK_valignb" ; |
| 9641 | case MCK_vand: return "MCK_vand" ; |
| 9642 | case MCK_vasl: return "MCK_vasl" ; |
| 9643 | case MCK_vaslh: return "MCK_vaslh" ; |
| 9644 | case MCK_vaslw: return "MCK_vaslw" ; |
| 9645 | case MCK_vasr: return "MCK_vasr" ; |
| 9646 | case MCK_vasrh: return "MCK_vasrh" ; |
| 9647 | case MCK_vasrhub: return "MCK_vasrhub" ; |
| 9648 | case MCK_vasrinto: return "MCK_vasrinto" ; |
| 9649 | case MCK_vasrw: return "MCK_vasrw" ; |
| 9650 | case MCK_vavg: return "MCK_vavg" ; |
| 9651 | case MCK_vavgb: return "MCK_vavgb" ; |
| 9652 | case MCK_vavgh: return "MCK_vavgh" ; |
| 9653 | case MCK_vavgub: return "MCK_vavgub" ; |
| 9654 | case MCK_vavguh: return "MCK_vavguh" ; |
| 9655 | case MCK_vavguw: return "MCK_vavguw" ; |
| 9656 | case MCK_vavgw: return "MCK_vavgw" ; |
| 9657 | case MCK_vcl0: return "MCK_vcl0" ; |
| 9658 | case MCK_vcl0h: return "MCK_vcl0h" ; |
| 9659 | case MCK_vcl0w: return "MCK_vcl0w" ; |
| 9660 | case MCK_vclb: return "MCK_vclb" ; |
| 9661 | case MCK_vclip: return "MCK_vclip" ; |
| 9662 | case MCK_vcmp: return "MCK_vcmp" ; |
| 9663 | case MCK_vcmpb: return "MCK_vcmpb" ; |
| 9664 | case MCK_vcmph: return "MCK_vcmph" ; |
| 9665 | case MCK_vcmpw: return "MCK_vcmpw" ; |
| 9666 | case MCK_vcmpyi: return "MCK_vcmpyi" ; |
| 9667 | case MCK_vcmpyr: return "MCK_vcmpyr" ; |
| 9668 | case MCK_vcnegh: return "MCK_vcnegh" ; |
| 9669 | case MCK_vcombine: return "MCK_vcombine" ; |
| 9670 | case MCK_vconj: return "MCK_vconj" ; |
| 9671 | case MCK_vcrotate: return "MCK_vcrotate" ; |
| 9672 | case MCK_vcvt: return "MCK_vcvt" ; |
| 9673 | case MCK_vcvt2: return "MCK_vcvt2" ; |
| 9674 | case MCK_vdeal: return "MCK_vdeal" ; |
| 9675 | case MCK_vdealb: return "MCK_vdealb" ; |
| 9676 | case MCK_vdealb4w: return "MCK_vdealb4w" ; |
| 9677 | case MCK_vdeale: return "MCK_vdeale" ; |
| 9678 | case MCK_vdealh: return "MCK_vdealh" ; |
| 9679 | case MCK_vdelta: return "MCK_vdelta" ; |
| 9680 | case MCK_vdmpy: return "MCK_vdmpy" ; |
| 9681 | case MCK_vdmpybsu: return "MCK_vdmpybsu" ; |
| 9682 | case MCK_vdmpybus: return "MCK_vdmpybus" ; |
| 9683 | case MCK_vdmpyh: return "MCK_vdmpyh" ; |
| 9684 | case MCK_vdmpyhb: return "MCK_vdmpyhb" ; |
| 9685 | case MCK_vdmpyhsu: return "MCK_vdmpyhsu" ; |
| 9686 | case MCK_vdmpyw: return "MCK_vdmpyw" ; |
| 9687 | case MCK_vdsad: return "MCK_vdsad" ; |
| 9688 | case MCK_vdsaduh: return "MCK_vdsaduh" ; |
| 9689 | case MCK_vextract: return "MCK_vextract" ; |
| 9690 | case MCK_vfmax: return "MCK_vfmax" ; |
| 9691 | case MCK_vfmin: return "MCK_vfmin" ; |
| 9692 | case MCK_vfmv: return "MCK_vfmv" ; |
| 9693 | case MCK_vfneg: return "MCK_vfneg" ; |
| 9694 | case MCK_vgather: return "MCK_vgather" ; |
| 9695 | case MCK_vgetqfext: return "MCK_vgetqfext" ; |
| 9696 | case MCK_vhist: return "MCK_vhist" ; |
| 9697 | case MCK_vinsert: return "MCK_vinsert" ; |
| 9698 | case MCK_vitpack: return "MCK_vitpack" ; |
| 9699 | case MCK_vlalign: return "MCK_vlalign" ; |
| 9700 | case MCK_vlslh: return "MCK_vlslh" ; |
| 9701 | case MCK_vlslw: return "MCK_vlslw" ; |
| 9702 | case MCK_vlsr: return "MCK_vlsr" ; |
| 9703 | case MCK_vlsrh: return "MCK_vlsrh" ; |
| 9704 | case MCK_vlsrw: return "MCK_vlsrw" ; |
| 9705 | case MCK_vlut16: return "MCK_vlut16" ; |
| 9706 | case MCK_vlut32: return "MCK_vlut32" ; |
| 9707 | case MCK_vlut4: return "MCK_vlut4" ; |
| 9708 | case MCK_vmax: return "MCK_vmax" ; |
| 9709 | case MCK_vmaxb: return "MCK_vmaxb" ; |
| 9710 | case MCK_vmaxh: return "MCK_vmaxh" ; |
| 9711 | case MCK_vmaxub: return "MCK_vmaxub" ; |
| 9712 | case MCK_vmaxuh: return "MCK_vmaxuh" ; |
| 9713 | case MCK_vmaxuw: return "MCK_vmaxuw" ; |
| 9714 | case MCK_vmaxw: return "MCK_vmaxw" ; |
| 9715 | case MCK_vmem: return "MCK_vmem" ; |
| 9716 | case MCK_vmemu: return "MCK_vmemu" ; |
| 9717 | case MCK_vmerge: return "MCK_vmerge" ; |
| 9718 | case MCK_vmin: return "MCK_vmin" ; |
| 9719 | case MCK_vminb: return "MCK_vminb" ; |
| 9720 | case MCK_vminh: return "MCK_vminh" ; |
| 9721 | case MCK_vminub: return "MCK_vminub" ; |
| 9722 | case MCK_vminuh: return "MCK_vminuh" ; |
| 9723 | case MCK_vminuw: return "MCK_vminuw" ; |
| 9724 | case MCK_vminw: return "MCK_vminw" ; |
| 9725 | case MCK_vmpa: return "MCK_vmpa" ; |
| 9726 | case MCK_vmpabus: return "MCK_vmpabus" ; |
| 9727 | case MCK_vmpabuu: return "MCK_vmpabuu" ; |
| 9728 | case MCK_vmpahb: return "MCK_vmpahb" ; |
| 9729 | case MCK_vmpauhb: return "MCK_vmpauhb" ; |
| 9730 | case MCK_vmps: return "MCK_vmps" ; |
| 9731 | case MCK_vmpy: return "MCK_vmpy" ; |
| 9732 | case MCK_vmpyb: return "MCK_vmpyb" ; |
| 9733 | case MCK_vmpybsu: return "MCK_vmpybsu" ; |
| 9734 | case MCK_vmpybu: return "MCK_vmpybu" ; |
| 9735 | case MCK_vmpybus: return "MCK_vmpybus" ; |
| 9736 | case MCK_vmpye: return "MCK_vmpye" ; |
| 9737 | case MCK_vmpyeh: return "MCK_vmpyeh" ; |
| 9738 | case MCK_vmpyewuh: return "MCK_vmpyewuh" ; |
| 9739 | case MCK_vmpyh: return "MCK_vmpyh" ; |
| 9740 | case MCK_vmpyhsu: return "MCK_vmpyhsu" ; |
| 9741 | case MCK_vmpyhus: return "MCK_vmpyhus" ; |
| 9742 | case MCK_vmpyi: return "MCK_vmpyi" ; |
| 9743 | case MCK_vmpyie: return "MCK_vmpyie" ; |
| 9744 | case MCK_vmpyieo: return "MCK_vmpyieo" ; |
| 9745 | case MCK_vmpyiewh: return "MCK_vmpyiewh" ; |
| 9746 | case MCK_vmpyiewuh: return "MCK_vmpyiewuh" ; |
| 9747 | case MCK_vmpyih: return "MCK_vmpyih" ; |
| 9748 | case MCK_vmpyihb: return "MCK_vmpyihb" ; |
| 9749 | case MCK_vmpyio: return "MCK_vmpyio" ; |
| 9750 | case MCK_vmpyiowh: return "MCK_vmpyiowh" ; |
| 9751 | case MCK_vmpyiwb: return "MCK_vmpyiwb" ; |
| 9752 | case MCK_vmpyiwh: return "MCK_vmpyiwh" ; |
| 9753 | case MCK_vmpyiwub: return "MCK_vmpyiwub" ; |
| 9754 | case MCK_vmpyo: return "MCK_vmpyo" ; |
| 9755 | case MCK_vmpyowh: return "MCK_vmpyowh" ; |
| 9756 | case MCK_vmpyub: return "MCK_vmpyub" ; |
| 9757 | case MCK_vmpyuh: return "MCK_vmpyuh" ; |
| 9758 | case MCK_vmpyweh: return "MCK_vmpyweh" ; |
| 9759 | case MCK_vmpyweuh: return "MCK_vmpyweuh" ; |
| 9760 | case MCK_vmpywoh: return "MCK_vmpywoh" ; |
| 9761 | case MCK_vmpywouh: return "MCK_vmpywouh" ; |
| 9762 | case MCK_vmux: return "MCK_vmux" ; |
| 9763 | case MCK_vnavg: return "MCK_vnavg" ; |
| 9764 | case MCK_vnavgb: return "MCK_vnavgb" ; |
| 9765 | case MCK_vnavgh: return "MCK_vnavgh" ; |
| 9766 | case MCK_vnavgub: return "MCK_vnavgub" ; |
| 9767 | case MCK_vnavgw: return "MCK_vnavgw" ; |
| 9768 | case MCK_vnormamt: return "MCK_vnormamt" ; |
| 9769 | case MCK_vnormamth: return "MCK_vnormamth" ; |
| 9770 | case MCK_vnormamtw: return "MCK_vnormamtw" ; |
| 9771 | case MCK_vnot: return "MCK_vnot" ; |
| 9772 | case MCK_vor: return "MCK_vor" ; |
| 9773 | case MCK_vpack: return "MCK_vpack" ; |
| 9774 | case MCK_vpacke: return "MCK_vpacke" ; |
| 9775 | case MCK_vpackeb: return "MCK_vpackeb" ; |
| 9776 | case MCK_vpackeh: return "MCK_vpackeh" ; |
| 9777 | case MCK_vpackhb: return "MCK_vpackhb" ; |
| 9778 | case MCK_vpackhub: return "MCK_vpackhub" ; |
| 9779 | case MCK_vpacko: return "MCK_vpacko" ; |
| 9780 | case MCK_vpackob: return "MCK_vpackob" ; |
| 9781 | case MCK_vpackoh: return "MCK_vpackoh" ; |
| 9782 | case MCK_vpackwh: return "MCK_vpackwh" ; |
| 9783 | case MCK_vpackwuh: return "MCK_vpackwuh" ; |
| 9784 | case MCK_vpmpyh: return "MCK_vpmpyh" ; |
| 9785 | case MCK_vpopcount: return "MCK_vpopcount" ; |
| 9786 | case MCK_vpopcounth: return "MCK_vpopcounth" ; |
| 9787 | case MCK_vr16mpyz: return "MCK_vr16mpyz" ; |
| 9788 | case MCK_vr16mpyzs: return "MCK_vr16mpyzs" ; |
| 9789 | case MCK_vr8mpyz: return "MCK_vr8mpyz" ; |
| 9790 | case MCK_vraddh: return "MCK_vraddh" ; |
| 9791 | case MCK_vraddub: return "MCK_vraddub" ; |
| 9792 | case MCK_vradduh: return "MCK_vradduh" ; |
| 9793 | case MCK_vrcmpyi: return "MCK_vrcmpyi" ; |
| 9794 | case MCK_vrcmpyr: return "MCK_vrcmpyr" ; |
| 9795 | case MCK_vrcmpys: return "MCK_vrcmpys" ; |
| 9796 | case MCK_vrcnegh: return "MCK_vrcnegh" ; |
| 9797 | case MCK_vrcrotate: return "MCK_vrcrotate" ; |
| 9798 | case MCK_vrdelta: return "MCK_vrdelta" ; |
| 9799 | case MCK_vrmaxh: return "MCK_vrmaxh" ; |
| 9800 | case MCK_vrmaxuh: return "MCK_vrmaxuh" ; |
| 9801 | case MCK_vrmaxuw: return "MCK_vrmaxuw" ; |
| 9802 | case MCK_vrmaxw: return "MCK_vrmaxw" ; |
| 9803 | case MCK_vrminh: return "MCK_vrminh" ; |
| 9804 | case MCK_vrminuh: return "MCK_vrminuh" ; |
| 9805 | case MCK_vrminuw: return "MCK_vrminuw" ; |
| 9806 | case MCK_vrminw: return "MCK_vrminw" ; |
| 9807 | case MCK_vrmpy: return "MCK_vrmpy" ; |
| 9808 | case MCK_vrmpyb: return "MCK_vrmpyb" ; |
| 9809 | case MCK_vrmpybsu: return "MCK_vrmpybsu" ; |
| 9810 | case MCK_vrmpybu: return "MCK_vrmpybu" ; |
| 9811 | case MCK_vrmpybus: return "MCK_vrmpybus" ; |
| 9812 | case MCK_vrmpyh: return "MCK_vrmpyh" ; |
| 9813 | case MCK_vrmpyub: return "MCK_vrmpyub" ; |
| 9814 | case MCK_vrmpyweh: return "MCK_vrmpyweh" ; |
| 9815 | case MCK_vrmpywoh: return "MCK_vrmpywoh" ; |
| 9816 | case MCK_vrmpyz: return "MCK_vrmpyz" ; |
| 9817 | case MCK_vrndwh: return "MCK_vrndwh" ; |
| 9818 | case MCK_vror: return "MCK_vror" ; |
| 9819 | case MCK_vrotr: return "MCK_vrotr" ; |
| 9820 | case MCK_vround: return "MCK_vround" ; |
| 9821 | case MCK_vroundhb: return "MCK_vroundhb" ; |
| 9822 | case MCK_vroundhub: return "MCK_vroundhub" ; |
| 9823 | case MCK_vrounduhub: return "MCK_vrounduhub" ; |
| 9824 | case MCK_vrounduwuh: return "MCK_vrounduwuh" ; |
| 9825 | case MCK_vroundwh: return "MCK_vroundwh" ; |
| 9826 | case MCK_vroundwuh: return "MCK_vroundwuh" ; |
| 9827 | case MCK_vrsad: return "MCK_vrsad" ; |
| 9828 | case MCK_vrsadub: return "MCK_vrsadub" ; |
| 9829 | case MCK_vsat: return "MCK_vsat" ; |
| 9830 | case MCK_vsatdw: return "MCK_vsatdw" ; |
| 9831 | case MCK_vsathb: return "MCK_vsathb" ; |
| 9832 | case MCK_vsathub: return "MCK_vsathub" ; |
| 9833 | case MCK_vsatuwuh: return "MCK_vsatuwuh" ; |
| 9834 | case MCK_vsatwh: return "MCK_vsatwh" ; |
| 9835 | case MCK_vsatwuh: return "MCK_vsatwuh" ; |
| 9836 | case MCK_vscatter: return "MCK_vscatter" ; |
| 9837 | case MCK_vsetq: return "MCK_vsetq" ; |
| 9838 | case MCK_vsetq2: return "MCK_vsetq2" ; |
| 9839 | case MCK_vsetqfext: return "MCK_vsetqfext" ; |
| 9840 | case MCK_vshuff: return "MCK_vshuff" ; |
| 9841 | case MCK_vshuffb: return "MCK_vshuffb" ; |
| 9842 | case MCK_vshuffe: return "MCK_vshuffe" ; |
| 9843 | case MCK_vshuffeb: return "MCK_vshuffeb" ; |
| 9844 | case MCK_vshuffeh: return "MCK_vshuffeh" ; |
| 9845 | case MCK_vshuffh: return "MCK_vshuffh" ; |
| 9846 | case MCK_vshuffo: return "MCK_vshuffo" ; |
| 9847 | case MCK_vshuffob: return "MCK_vshuffob" ; |
| 9848 | case MCK_vshuffoe: return "MCK_vshuffoe" ; |
| 9849 | case MCK_vshuffoeb: return "MCK_vshuffoeb" ; |
| 9850 | case MCK_vshuffoeh: return "MCK_vshuffoeh" ; |
| 9851 | case MCK_vshuffoh: return "MCK_vshuffoh" ; |
| 9852 | case MCK_vsplat: return "MCK_vsplat" ; |
| 9853 | case MCK_vsplatb: return "MCK_vsplatb" ; |
| 9854 | case MCK_vsplath: return "MCK_vsplath" ; |
| 9855 | case MCK_vspliceb: return "MCK_vspliceb" ; |
| 9856 | case MCK_vsub: return "MCK_vsub" ; |
| 9857 | case MCK_vsubb: return "MCK_vsubb" ; |
| 9858 | case MCK_vsubh: return "MCK_vsubh" ; |
| 9859 | case MCK_vsubub: return "MCK_vsubub" ; |
| 9860 | case MCK_vsubuh: return "MCK_vsubuh" ; |
| 9861 | case MCK_vsubuw: return "MCK_vsubuw" ; |
| 9862 | case MCK_vsubw: return "MCK_vsubw" ; |
| 9863 | case MCK_vswap: return "MCK_vswap" ; |
| 9864 | case MCK_vsxt: return "MCK_vsxt" ; |
| 9865 | case MCK_vsxtb: return "MCK_vsxtb" ; |
| 9866 | case MCK_vsxtbh: return "MCK_vsxtbh" ; |
| 9867 | case MCK_vsxth: return "MCK_vsxth" ; |
| 9868 | case MCK_vsxthw: return "MCK_vsxthw" ; |
| 9869 | case MCK_vtmpy: return "MCK_vtmpy" ; |
| 9870 | case MCK_vtmpyb: return "MCK_vtmpyb" ; |
| 9871 | case MCK_vtmpybus: return "MCK_vtmpybus" ; |
| 9872 | case MCK_vtmpyhb: return "MCK_vtmpyhb" ; |
| 9873 | case MCK_vtrans2x2: return "MCK_vtrans2x2" ; |
| 9874 | case MCK_vtrunehb: return "MCK_vtrunehb" ; |
| 9875 | case MCK_vtrunewh: return "MCK_vtrunewh" ; |
| 9876 | case MCK_vtrunohb: return "MCK_vtrunohb" ; |
| 9877 | case MCK_vtrunowh: return "MCK_vtrunowh" ; |
| 9878 | case MCK_vunpack: return "MCK_vunpack" ; |
| 9879 | case MCK_vunpackb: return "MCK_vunpackb" ; |
| 9880 | case MCK_vunpackh: return "MCK_vunpackh" ; |
| 9881 | case MCK_vunpacko: return "MCK_vunpacko" ; |
| 9882 | case MCK_vunpackob: return "MCK_vunpackob" ; |
| 9883 | case MCK_vunpackoh: return "MCK_vunpackoh" ; |
| 9884 | case MCK_vunpackub: return "MCK_vunpackub" ; |
| 9885 | case MCK_vunpackuh: return "MCK_vunpackuh" ; |
| 9886 | case MCK_vwhist128: return "MCK_vwhist128" ; |
| 9887 | case MCK_vwhist256: return "MCK_vwhist256" ; |
| 9888 | case MCK_vxaddsubh: return "MCK_vxaddsubh" ; |
| 9889 | case MCK_vxaddsubw: return "MCK_vxaddsubw" ; |
| 9890 | case MCK_vxor: return "MCK_vxor" ; |
| 9891 | case MCK_vxsubaddh: return "MCK_vxsubaddh" ; |
| 9892 | case MCK_vxsubaddw: return "MCK_vxsubaddw" ; |
| 9893 | case MCK_vzxt: return "MCK_vzxt" ; |
| 9894 | case MCK_vzxtb: return "MCK_vzxtb" ; |
| 9895 | case MCK_vzxtbh: return "MCK_vzxtbh" ; |
| 9896 | case MCK_vzxth: return "MCK_vzxth" ; |
| 9897 | case MCK_vzxthw: return "MCK_vzxthw" ; |
| 9898 | case MCK_w: return "MCK_w" ; |
| 9899 | case MCK_wait: return "MCK_wait" ; |
| 9900 | case MCK_x: return "MCK_x" ; |
| 9901 | case MCK_xor: return "MCK_xor" ; |
| 9902 | case MCK_z: return "MCK_z" ; |
| 9903 | case MCK_zextract: return "MCK_zextract" ; |
| 9904 | case MCK_zxtb: return "MCK_zxtb" ; |
| 9905 | case MCK_zxth: return "MCK_zxth" ; |
| 9906 | case MCK__124_: return "MCK__124_" ; |
| 9907 | case MCK__126_: return "MCK__126_" ; |
| 9908 | case MCK_Reg19: return "MCK_Reg19" ; |
| 9909 | case MCK_Reg11: return "MCK_Reg11" ; |
| 9910 | case MCK_DIAG: return "MCK_DIAG" ; |
| 9911 | case MCK_GP: return "MCK_GP" ; |
| 9912 | case MCK_P0: return "MCK_P0" ; |
| 9913 | case MCK_P1: return "MCK_P1" ; |
| 9914 | case MCK_P3: return "MCK_P3" ; |
| 9915 | case MCK_PC: return "MCK_PC" ; |
| 9916 | case MCK_SGP0: return "MCK_SGP0" ; |
| 9917 | case MCK_SGP1: return "MCK_SGP1" ; |
| 9918 | case MCK_UsrBits: return "MCK_UsrBits" ; |
| 9919 | case MCK_V65Regs: return "MCK_V65Regs" ; |
| 9920 | case MCK_ModRegs: return "MCK_ModRegs" ; |
| 9921 | case MCK_Reg20: return "MCK_Reg20" ; |
| 9922 | case MCK_Reg3: return "MCK_Reg3" ; |
| 9923 | case MCK_HvxQR: return "MCK_HvxQR" ; |
| 9924 | case MCK_PredRegs: return "MCK_PredRegs" ; |
| 9925 | case MCK_Reg16: return "MCK_Reg16" ; |
| 9926 | case MCK_GeneralDoubleLow8Regs: return "MCK_GeneralDoubleLow8Regs" ; |
| 9927 | case MCK_HvxVQR: return "MCK_HvxVQR" ; |
| 9928 | case MCK_IntRegsLow8: return "MCK_IntRegsLow8" ; |
| 9929 | case MCK_V62Regs: return "MCK_V62Regs" ; |
| 9930 | case MCK_CtrRegs64: return "MCK_CtrRegs64" ; |
| 9931 | case MCK_DoubleRegs: return "MCK_DoubleRegs" ; |
| 9932 | case MCK_GeneralSubRegs: return "MCK_GeneralSubRegs" ; |
| 9933 | case MCK_GuestRegs64: return "MCK_GuestRegs64" ; |
| 9934 | case MCK_VectRegRev: return "MCK_VectRegRev" ; |
| 9935 | case MCK_CtrRegs: return "MCK_CtrRegs" ; |
| 9936 | case MCK_GuestRegs: return "MCK_GuestRegs" ; |
| 9937 | case MCK_HvxWR: return "MCK_HvxWR" ; |
| 9938 | case MCK_IntRegs: return "MCK_IntRegs" ; |
| 9939 | case MCK_HvxVR: return "MCK_HvxVR" ; |
| 9940 | case MCK_SysRegs64: return "MCK_SysRegs64" ; |
| 9941 | case MCK_SysRegs: return "MCK_SysRegs" ; |
| 9942 | case MCK_Imm: return "MCK_Imm" ; |
| 9943 | case MCK_a30_2Imm: return "MCK_a30_2Imm" ; |
| 9944 | case MCK_b13_2Imm: return "MCK_b13_2Imm" ; |
| 9945 | case MCK_b15_2Imm: return "MCK_b15_2Imm" ; |
| 9946 | case MCK_b30_2Imm: return "MCK_b30_2Imm" ; |
| 9947 | case MCK_f32Imm: return "MCK_f32Imm" ; |
| 9948 | case MCK_f64Imm: return "MCK_f64Imm" ; |
| 9949 | case MCK_m32_0Imm: return "MCK_m32_0Imm" ; |
| 9950 | case MCK_n1Const: return "MCK_n1Const" ; |
| 9951 | case MCK_s27_2Imm: return "MCK_s27_2Imm" ; |
| 9952 | case MCK_s29_3Imm: return "MCK_s29_3Imm" ; |
| 9953 | case MCK_s30_2Imm: return "MCK_s30_2Imm" ; |
| 9954 | case MCK_s31_1Imm: return "MCK_s31_1Imm" ; |
| 9955 | case MCK_s32_0Imm: return "MCK_s32_0Imm" ; |
| 9956 | case MCK_s3_0Imm: return "MCK_s3_0Imm" ; |
| 9957 | case MCK_s4_0Imm: return "MCK_s4_0Imm" ; |
| 9958 | case MCK_s4_1Imm: return "MCK_s4_1Imm" ; |
| 9959 | case MCK_s4_2Imm: return "MCK_s4_2Imm" ; |
| 9960 | case MCK_s4_3Imm: return "MCK_s4_3Imm" ; |
| 9961 | case MCK_s6_0Imm: return "MCK_s6_0Imm" ; |
| 9962 | case MCK_s6_3Imm: return "MCK_s6_3Imm" ; |
| 9963 | case MCK_s8_0Imm: return "MCK_s8_0Imm" ; |
| 9964 | case MCK_s9_0Imm: return "MCK_s9_0Imm" ; |
| 9965 | case MCK_sgp10Const: return "MCK_sgp10Const" ; |
| 9966 | case MCK_u10_0Imm: return "MCK_u10_0Imm" ; |
| 9967 | case MCK_u11_3Imm: return "MCK_u11_3Imm" ; |
| 9968 | case MCK_u16_0Imm: return "MCK_u16_0Imm" ; |
| 9969 | case MCK_u1_0Imm: return "MCK_u1_0Imm" ; |
| 9970 | case MCK_u26_6Imm: return "MCK_u26_6Imm" ; |
| 9971 | case MCK_u29_3Imm: return "MCK_u29_3Imm" ; |
| 9972 | case MCK_u2_0Imm: return "MCK_u2_0Imm" ; |
| 9973 | case MCK_u30_2Imm: return "MCK_u30_2Imm" ; |
| 9974 | case MCK_u31_1Imm: return "MCK_u31_1Imm" ; |
| 9975 | case MCK_u32_0Imm: return "MCK_u32_0Imm" ; |
| 9976 | case MCK_u3_0Imm: return "MCK_u3_0Imm" ; |
| 9977 | case MCK_u3_1Imm: return "MCK_u3_1Imm" ; |
| 9978 | case MCK_u4_0Imm: return "MCK_u4_0Imm" ; |
| 9979 | case MCK_u4_2Imm: return "MCK_u4_2Imm" ; |
| 9980 | case MCK_u5_0Imm: return "MCK_u5_0Imm" ; |
| 9981 | case MCK_u5_2Imm: return "MCK_u5_2Imm" ; |
| 9982 | case MCK_u5_3Imm: return "MCK_u5_3Imm" ; |
| 9983 | case MCK_u64_0Imm: return "MCK_u64_0Imm" ; |
| 9984 | case MCK_u6_0Imm: return "MCK_u6_0Imm" ; |
| 9985 | case MCK_u6_1Imm: return "MCK_u6_1Imm" ; |
| 9986 | case MCK_u6_2Imm: return "MCK_u6_2Imm" ; |
| 9987 | case MCK_u7_0Imm: return "MCK_u7_0Imm" ; |
| 9988 | case MCK_u8_0Imm: return "MCK_u8_0Imm" ; |
| 9989 | case NumMatchClassKinds: return "NumMatchClassKinds" ; |
| 9990 | } |
| 9991 | llvm_unreachable("unhandled MatchClassKind!" ); |
| 9992 | } |
| 9993 | |
| 9994 | #endif // NDEBUG |
| 9995 | FeatureBitset HexagonAsmParser:: |
| 9996 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
| 9997 | FeatureBitset Features; |
| 9998 | if (FB[Hexagon::ArchV5]) |
| 9999 | Features.set(Feature_HasV5Bit); |
| 10000 | if (FB[Hexagon::ArchV55]) |
| 10001 | Features.set(Feature_HasV55Bit); |
| 10002 | if (FB[Hexagon::ArchV60]) |
| 10003 | Features.set(Feature_HasV60Bit); |
| 10004 | if (FB[Hexagon::ArchV62]) |
| 10005 | Features.set(Feature_HasV62Bit); |
| 10006 | if (FB[Hexagon::ArchV65]) |
| 10007 | Features.set(Feature_HasV65Bit); |
| 10008 | if (FB[Hexagon::ArchV66]) |
| 10009 | Features.set(Feature_HasV66Bit); |
| 10010 | if (FB[Hexagon::ArchV67]) |
| 10011 | Features.set(Feature_HasV67Bit); |
| 10012 | if (FB[Hexagon::ArchV68]) |
| 10013 | Features.set(Feature_HasV68Bit); |
| 10014 | if (FB[Hexagon::ArchV69]) |
| 10015 | Features.set(Feature_HasV69Bit); |
| 10016 | if (FB[Hexagon::ArchV71]) |
| 10017 | Features.set(Feature_HasV71Bit); |
| 10018 | if (FB[Hexagon::ArchV73]) |
| 10019 | Features.set(Feature_HasV73Bit); |
| 10020 | if (FB[Hexagon::ArchV75]) |
| 10021 | Features.set(Feature_HasV75Bit); |
| 10022 | if (FB[Hexagon::ArchV79]) |
| 10023 | Features.set(Feature_HasV79Bit); |
| 10024 | if (FB[Hexagon::ExtensionHVX64B]) |
| 10025 | Features.set(Feature_UseHVX64BBit); |
| 10026 | if (FB[Hexagon::ExtensionHVX128B]) |
| 10027 | Features.set(Feature_UseHVX128BBit); |
| 10028 | if (FB[Hexagon::ExtensionHVXV60]) |
| 10029 | Features.set(Feature_UseHVXBit); |
| 10030 | if (FB[Hexagon::ExtensionHVXV60]) |
| 10031 | Features.set(Feature_UseHVXV60Bit); |
| 10032 | if (FB[Hexagon::ExtensionHVXV62]) |
| 10033 | Features.set(Feature_UseHVXV62Bit); |
| 10034 | if (FB[Hexagon::ExtensionHVXV65]) |
| 10035 | Features.set(Feature_UseHVXV65Bit); |
| 10036 | if (FB[Hexagon::ExtensionHVXV66]) |
| 10037 | Features.set(Feature_UseHVXV66Bit); |
| 10038 | if (FB[Hexagon::ExtensionHVXV67]) |
| 10039 | Features.set(Feature_UseHVXV67Bit); |
| 10040 | if (FB[Hexagon::ExtensionHVXV68]) |
| 10041 | Features.set(Feature_UseHVXV68Bit); |
| 10042 | if (FB[Hexagon::ExtensionHVXV69]) |
| 10043 | Features.set(Feature_UseHVXV69Bit); |
| 10044 | if (FB[Hexagon::ExtensionHVXV71]) |
| 10045 | Features.set(Feature_UseHVXV71Bit); |
| 10046 | if (FB[Hexagon::ExtensionHVXV73]) |
| 10047 | Features.set(Feature_UseHVXV73Bit); |
| 10048 | if (FB[Hexagon::ExtensionHVXV75]) |
| 10049 | Features.set(Feature_UseHVXV75Bit); |
| 10050 | if (FB[Hexagon::ExtensionHVXV79]) |
| 10051 | Features.set(Feature_UseHVXV79Bit); |
| 10052 | if (FB[Hexagon::ExtensionAudio]) |
| 10053 | Features.set(Feature_UseAudioBit); |
| 10054 | if (FB[Hexagon::ExtensionZReg]) |
| 10055 | Features.set(Feature_UseZRegBit); |
| 10056 | if (FB[Hexagon::FeaturePreV65]) |
| 10057 | Features.set(Feature_HasPreV65Bit); |
| 10058 | if (FB[Hexagon::ExtensionHVXIEEEFP]) |
| 10059 | Features.set(Feature_UseHVXIEEEFPBit); |
| 10060 | if (FB[Hexagon::ExtensionHVXQFloat]) |
| 10061 | Features.set(Feature_UseHVXQFloatBit); |
| 10062 | if (FB[Hexagon::FeatureMemNoShuf]) |
| 10063 | Features.set(Feature_HasMemNoShufBit); |
| 10064 | if (FB[Hexagon::FeatureCabac]) |
| 10065 | Features.set(Feature_UseCabacBit); |
| 10066 | return Features; |
| 10067 | } |
| 10068 | |
| 10069 | static bool checkAsmTiedOperandConstraints(const HexagonAsmParser&AsmParser, |
| 10070 | unsigned Kind, const OperandVector &Operands, |
| 10071 | uint64_t &ErrorInfo) { |
| 10072 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
| 10073 | const uint8_t *Converter = ConversionTable[Kind]; |
| 10074 | for (const uint8_t *p = Converter; *p; p += 2) { |
| 10075 | switch (*p) { |
| 10076 | case CVT_Tied: { |
| 10077 | unsigned OpIdx = *(p + 1); |
| 10078 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
| 10079 | std::begin(TiedAsmOperandTable)) && |
| 10080 | "Tied operand not found" ); |
| 10081 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
| 10082 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
| 10083 | if (OpndNum1 != OpndNum2) { |
| 10084 | auto &SrcOp1 = Operands[OpndNum1]; |
| 10085 | auto &SrcOp2 = Operands[OpndNum2]; |
| 10086 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
| 10087 | ErrorInfo = OpndNum2; |
| 10088 | return false; |
| 10089 | } |
| 10090 | } |
| 10091 | break; |
| 10092 | } |
| 10093 | default: |
| 10094 | break; |
| 10095 | } |
| 10096 | } |
| 10097 | return true; |
| 10098 | } |
| 10099 | |
| 10100 | static const char MnemonicTable[] = |
| 10101 | "\000\000\nallocframe\007barrier\005brkpt\004call\005callr\006callrh\004" |
| 10102 | "ciad\006crswap\004cswi\010dccleana\ndccleanidx\013dccleaninva\015dcclea" |
| 10103 | "ninvidx\007dcfetch\006dcinva\010dcinvidx\006dckill\006dctagw\007dczeroa" |
| 10104 | "\016dealloc_return\014deallocframe\004diag\005diag0\005diag1\006dmlink\010" |
| 10105 | "dmresume\007dmstart\006duplex\010endloop0\tendloop01\010endloop1\006hin" |
| 10106 | "tjr\010iassignw\007icdataw\006icinva\010icinvidx\006ickill\006ictagw\002" |
| 10107 | "if\006immext\005isync\004jump\005jumpr\006jumprh\006k0lock\010k0unlock\n" |
| 10108 | "l2cleanidx\015l2cleaninvidx\007l2fetch\010l2gclean\013l2gcleaninv\tl2gu" |
| 10109 | "nlock\010l2invidx\006l2kill\006l2tagw\tl2unlocka\005loop0\005loop1\004m" |
| 10110 | "emb\006memcpy\004memd\013memd_locked\007memd_rl\004memh\004memw\013memw" |
| 10111 | "_locked\007memw_rl\003nmi\003nop\002p0\002p1\002p3\005pause\007release\006" |
| 10112 | "resume\003rte\010setimask\007setprio\004siad\005start\004stop\003swi\006" |
| 10113 | "syncht\ntlbinvasid\007tlblock\ttlbunlock\004tlbw\005trace\005trap0\005t" |
| 10114 | "rap1\007unpause\005vdeal\005vhist\004vmem\005vmemu\010vscatter\006vshuf" |
| 10115 | "f\004vtmp\tvtrans2x2\tvwhist128\tvwhist256\004wait\001z" ; |
| 10116 | |
| 10117 | // Feature bitsets. |
| 10118 | enum : uint8_t { |
| 10119 | AMFBS_None, |
| 10120 | AMFBS_HasPreV65, |
| 10121 | AMFBS_HasV55, |
| 10122 | AMFBS_HasV60, |
| 10123 | AMFBS_HasV62, |
| 10124 | AMFBS_HasV65, |
| 10125 | AMFBS_HasV66, |
| 10126 | AMFBS_HasV67, |
| 10127 | AMFBS_HasV68, |
| 10128 | AMFBS_HasV73, |
| 10129 | AMFBS_UseCabac, |
| 10130 | AMFBS_UseHVX, |
| 10131 | AMFBS_UseHVXV60, |
| 10132 | AMFBS_UseHVXV62, |
| 10133 | AMFBS_UseHVXV65, |
| 10134 | AMFBS_UseHVXV66, |
| 10135 | AMFBS_UseHVXV68, |
| 10136 | AMFBS_UseHVXV69, |
| 10137 | AMFBS_UseHVXV73, |
| 10138 | AMFBS_HasV67_UseAudio, |
| 10139 | AMFBS_UseHVXV66_UseZReg, |
| 10140 | AMFBS_UseHVXV68_UseHVXIEEEFP, |
| 10141 | AMFBS_UseHVXV68_UseHVXQFloat, |
| 10142 | AMFBS_UseHVXV73_UseHVXIEEEFP, |
| 10143 | AMFBS_UseHVXV73_UseHVXQFloat, |
| 10144 | AMFBS_UseHVXV79_UseHVXIEEEFP, |
| 10145 | AMFBS_UseHVXV79_UseHVXQFloat, |
| 10146 | }; |
| 10147 | |
| 10148 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 10149 | {}, // AMFBS_None |
| 10150 | {Feature_HasPreV65Bit, }, |
| 10151 | {Feature_HasV55Bit, }, |
| 10152 | {Feature_HasV60Bit, }, |
| 10153 | {Feature_HasV62Bit, }, |
| 10154 | {Feature_HasV65Bit, }, |
| 10155 | {Feature_HasV66Bit, }, |
| 10156 | {Feature_HasV67Bit, }, |
| 10157 | {Feature_HasV68Bit, }, |
| 10158 | {Feature_HasV73Bit, }, |
| 10159 | {Feature_UseCabacBit, }, |
| 10160 | {Feature_UseHVXBit, }, |
| 10161 | {Feature_UseHVXV60Bit, }, |
| 10162 | {Feature_UseHVXV62Bit, }, |
| 10163 | {Feature_UseHVXV65Bit, }, |
| 10164 | {Feature_UseHVXV66Bit, }, |
| 10165 | {Feature_UseHVXV68Bit, }, |
| 10166 | {Feature_UseHVXV69Bit, }, |
| 10167 | {Feature_UseHVXV73Bit, }, |
| 10168 | {Feature_HasV67Bit, Feature_UseAudioBit, }, |
| 10169 | {Feature_UseHVXV66Bit, Feature_UseZRegBit, }, |
| 10170 | {Feature_UseHVXV68Bit, Feature_UseHVXIEEEFPBit, }, |
| 10171 | {Feature_UseHVXV68Bit, Feature_UseHVXQFloatBit, }, |
| 10172 | {Feature_UseHVXV73Bit, Feature_UseHVXIEEEFPBit, }, |
| 10173 | {Feature_UseHVXV73Bit, Feature_UseHVXQFloatBit, }, |
| 10174 | {Feature_UseHVXV79Bit, Feature_UseHVXIEEEFPBit, }, |
| 10175 | {Feature_UseHVXV79Bit, Feature_UseHVXQFloatBit, }, |
| 10176 | }; |
| 10177 | |
| 10178 | namespace { |
| 10179 | struct MatchEntry { |
| 10180 | uint16_t Mnemonic; |
| 10181 | uint16_t Opcode; |
| 10182 | uint16_t ConvertFn; |
| 10183 | uint8_t RequiredFeaturesIdx; |
| 10184 | uint16_t Classes[24]; |
| 10185 | StringRef getMnemonic() const { |
| 10186 | return StringRef(MnemonicTable + Mnemonic + 1, |
| 10187 | MnemonicTable[Mnemonic]); |
| 10188 | } |
| 10189 | }; |
| 10190 | |
| 10191 | // Predicate for searching for an opcode. |
| 10192 | struct LessOpcode { |
| 10193 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
| 10194 | return LHS.getMnemonic() < RHS; |
| 10195 | } |
| 10196 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
| 10197 | return LHS < RHS.getMnemonic(); |
| 10198 | } |
| 10199 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
| 10200 | return LHS.getMnemonic() < RHS.getMnemonic(); |
| 10201 | } |
| 10202 | }; |
| 10203 | } // end anonymous namespace |
| 10204 | |
| 10205 | static const MatchEntry MatchTable0[] = { |
| 10206 | { 1 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_2__Reg1_2, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_PredRegs }, }, |
| 10207 | { 1 /* */, Hexagon::C2_tfrrp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_IntRegs }, }, |
| 10208 | { 1 /* */, Hexagon::A4_tfrpcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_CtrRegs64, MCK__61_, MCK_DoubleRegs }, }, |
| 10209 | { 1 /* */, Hexagon::A4_tfrcpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_CtrRegs64 }, }, |
| 10210 | { 1 /* */, Hexagon::A2_tfrp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
| 10211 | { 1 /* */, Hexagon::G4_tfrgcpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_GuestRegs64 }, }, |
| 10212 | { 1 /* */, Hexagon::Y4_tfrscpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_SysRegs64 }, }, |
| 10213 | { 1 /* */, Hexagon::G4_tfrgpcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GuestRegs64, MCK__61_, MCK_DoubleRegs }, }, |
| 10214 | { 1 /* */, Hexagon::A2_tfrrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_CtrRegs, MCK__61_, MCK_IntRegs }, }, |
| 10215 | { 1 /* */, Hexagon::G4_tfrgrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GuestRegs, MCK__61_, MCK_IntRegs }, }, |
| 10216 | { 1 /* */, Hexagon::V6_vassignp, Convert__Reg1_0__Reg1_2, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_HvxWR }, }, |
| 10217 | { 1 /* */, Hexagon::Y6_dmpause, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmpause }, }, |
| 10218 | { 1 /* */, Hexagon::Y6_dmpoll, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmpoll }, }, |
| 10219 | { 1 /* */, Hexagon::Y6_dmwait, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmwait }, }, |
| 10220 | { 1 /* */, Hexagon::C2_tfrpr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_PredRegs }, }, |
| 10221 | { 1 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_CtrRegs }, }, |
| 10222 | { 1 /* */, Hexagon::G4_tfrgcrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_GuestRegs }, }, |
| 10223 | { 1 /* */, Hexagon::A2_tfr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
| 10224 | { 1 /* */, Hexagon::Y2_tfrscrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_SysRegs }, }, |
| 10225 | { 1 /* */, Hexagon::V6_vassign, Convert__Reg1_0__Reg1_2, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
| 10226 | { 1 /* */, Hexagon::Y4_tfrspcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_SysRegs64, MCK__61_, MCK_DoubleRegs }, }, |
| 10227 | { 1 /* */, Hexagon::Y2_tfrsrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_SysRegs, MCK__61_, MCK_IntRegs }, }, |
| 10228 | { 1 /* */, Hexagon::A2_tfrpi, Convert__Reg1_0__s8_0Imm1_3, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK__HASH_, MCK_s8_0Imm }, }, |
| 10229 | { 1 /* */, Hexagon::TFRI64_V4, Convert__Reg1_0__u64_0Imm1_3, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK__HASH_, MCK_u64_0Imm }, }, |
| 10230 | { 1 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__regW15__regW15, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK__HASH_, MCK_0 }, }, |
| 10231 | { 1 /* */, Hexagon::A2_tfrsi, Convert__Reg1_0__s32_0Imm1_3, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 10232 | { 1 /* */, Hexagon::V6_vxor, Convert__Reg1_0__Reg1_0__Reg1_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK__HASH_, MCK_0 }, }, |
| 10233 | { 1 /* */, Hexagon::V6_vassign_tmp, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_HvxVR }, }, |
| 10234 | { 1 /* */, Hexagon::V6_pred_not, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_not, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 10235 | { 1 /* */, Hexagon::V6_pred_scalar2, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vsetq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10236 | { 1 /* */, Hexagon::V6_pred_scalar2v2, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__61_, MCK_vsetq2, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10237 | { 1 /* */, Hexagon::C2_all8, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_all8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
| 10238 | { 1 /* */, Hexagon::C2_any8, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
| 10239 | { 1 /* */, Hexagon::Y5_l2locka, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_l2locka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10240 | { 1 /* */, Hexagon::C2_not, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_not, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
| 10241 | { 1 /* */, Hexagon::A2_absp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_abs, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10242 | { 1 /* */, Hexagon::S2_brevp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_brev, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10243 | { 1 /* */, Hexagon::F2_conv_d2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_d2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10244 | { 1 /* */, Hexagon::F2_conv_df2d, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10245 | { 1 /* */, Hexagon::F2_conv_df2ud, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10246 | { 1 /* */, Hexagon::F2_conv_sf2d, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10247 | { 1 /* */, Hexagon::F2_conv_sf2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10248 | { 1 /* */, Hexagon::F2_conv_sf2ud, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10249 | { 1 /* */, Hexagon::F2_conv_ud2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_ud2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10250 | { 1 /* */, Hexagon::F2_conv_uw2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_uw2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10251 | { 1 /* */, Hexagon::F2_conv_w2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_w2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10252 | { 1 /* */, Hexagon::S2_deinterleave, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_deinterleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10253 | { 1 /* */, Hexagon::S2_interleave, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_interleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10254 | { 1 /* */, Hexagon::C2_mask, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mask, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
| 10255 | { 1 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10256 | { 1 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10257 | { 1 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10258 | { 1 /* */, Hexagon::L4_loadd_aq, Convert__Reg1_0__Reg1_4, AMFBS_HasV68, { MCK_DoubleRegs, MCK__61_, MCK_memd_95_aq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10259 | { 1 /* */, Hexagon::L4_loadd_locked, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10260 | { 1 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10261 | { 1 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10262 | { 1 /* */, Hexagon::A2_negp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_neg, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10263 | { 1 /* */, Hexagon::A2_notp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_not, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10264 | { 1 /* */, Hexagon::A2_sxtw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sxtw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10265 | { 1 /* */, Hexagon::Y2_tlbr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_tlbr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10266 | { 1 /* */, Hexagon::A2_vabsh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10267 | { 1 /* */, Hexagon::A2_vabsw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10268 | { 1 /* */, Hexagon::S2_vsathb_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10269 | { 1 /* */, Hexagon::S2_vsathub_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10270 | { 1 /* */, Hexagon::S2_vsatwh_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10271 | { 1 /* */, Hexagon::S2_vsatwuh_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10272 | { 1 /* */, Hexagon::S6_vsplatrbp, Convert__Reg1_0__Reg1_4, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vsplatb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10273 | { 1 /* */, Hexagon::S2_vsplatrh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsplath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10274 | { 1 /* */, Hexagon::S2_vsxtbh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10275 | { 1 /* */, Hexagon::S2_vsxthw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10276 | { 1 /* */, Hexagon::S2_vzxtbh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vzxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10277 | { 1 /* */, Hexagon::S2_vzxthw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vzxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10278 | { 1 /* */, Hexagon::J4_jumpsetr, Convert__Reg1_0__Reg1_2__b30_2Imm1_5, AMFBS_None, { MCK_GeneralSubRegs, MCK__61_, MCK_GeneralSubRegs, MCK__59_, MCK_jump, MCK_b30_2Imm }, }, |
| 10279 | { 1 /* */, Hexagon::V6_vsb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsxtb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10280 | { 1 /* */, Hexagon::V6_vsh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsxth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10281 | { 1 /* */, Hexagon::V6_vunpackb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10282 | { 1 /* */, Hexagon::V6_vunpackh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10283 | { 1 /* */, Hexagon::V6_vunpackub, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackub, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10284 | { 1 /* */, Hexagon::V6_vunpackuh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackuh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10285 | { 1 /* */, Hexagon::V6_vzb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vzxtb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10286 | { 1 /* */, Hexagon::V6_vzh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vzxth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10287 | { 1 /* */, Hexagon::A2_tfrih, Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
| 10288 | { 1 /* */, Hexagon::HI, Convert__Reg1_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
| 10289 | { 1 /* */, Hexagon::A2_tfril, Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
| 10290 | { 1 /* */, Hexagon::LO, Convert__Reg1_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
| 10291 | { 1 /* */, Hexagon::A2_abs, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10292 | { 1 /* */, Hexagon::A2_aslh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10293 | { 1 /* */, Hexagon::A2_asrh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10294 | { 1 /* */, Hexagon::S2_brev, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_brev, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10295 | { 1 /* */, Hexagon::S2_cl0p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10296 | { 1 /* */, Hexagon::S2_cl0, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10297 | { 1 /* */, Hexagon::S2_cl1p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10298 | { 1 /* */, Hexagon::S2_cl1, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10299 | { 1 /* */, Hexagon::S2_clbp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10300 | { 1 /* */, Hexagon::S2_clb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10301 | { 1 /* */, Hexagon::F2_conv_d2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_d2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10302 | { 1 /* */, Hexagon::F2_conv_df2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10303 | { 1 /* */, Hexagon::F2_conv_df2uw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10304 | { 1 /* */, Hexagon::F2_conv_df2w, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10305 | { 1 /* */, Hexagon::F2_conv_sf2uw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10306 | { 1 /* */, Hexagon::F2_conv_sf2w, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10307 | { 1 /* */, Hexagon::F2_conv_ud2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_ud2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10308 | { 1 /* */, Hexagon::F2_conv_uw2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_uw2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10309 | { 1 /* */, Hexagon::F2_conv_w2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_w2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10310 | { 1 /* */, Hexagon::S2_ct0p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10311 | { 1 /* */, Hexagon::S2_ct0, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10312 | { 1 /* */, Hexagon::S2_ct1p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10313 | { 1 /* */, Hexagon::S2_ct1, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10314 | { 1 /* */, Hexagon::Y2_dctagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_dctagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10315 | { 1 /* */, Hexagon::Y2_getimask, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_getimask, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10316 | { 1 /* */, Hexagon::Y2_iassignr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_iassignr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10317 | { 1 /* */, Hexagon::Y2_icdatar, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_icdatar, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10318 | { 1 /* */, Hexagon::Y2_ictagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ictagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10319 | { 1 /* */, Hexagon::Y4_l2tagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_l2tagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10320 | { 1 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10321 | { 1 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10322 | { 1 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10323 | { 1 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10324 | { 1 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10325 | { 1 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10326 | { 1 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10327 | { 1 /* */, Hexagon::L2_loadw_aq, Convert__Reg1_0__Reg1_4, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_memw_95_aq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10328 | { 1 /* */, Hexagon::L2_loadw_locked, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10329 | { 1 /* */, Hexagon::A2_subri, Convert__Reg1_0__imm_95_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10330 | { 1 /* */, Hexagon::S4_clbpnorm, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10331 | { 1 /* */, Hexagon::S2_clbnorm, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10332 | { 1 /* */, Hexagon::A2_subri, Convert__Reg1_0__imm_95__MINUS_1__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_not, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10333 | { 1 /* */, Hexagon::S5_popcountp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_popcount, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10334 | { 1 /* */, Hexagon::A2_sat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sat, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10335 | { 1 /* */, Hexagon::A2_satb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10336 | { 1 /* */, Hexagon::A2_sath, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10337 | { 1 /* */, Hexagon::A2_satub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10338 | { 1 /* */, Hexagon::A2_satuh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10339 | { 1 /* */, Hexagon::F2_sffixupr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10340 | { 1 /* */, Hexagon::A2_swiz, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_swiz, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10341 | { 1 /* */, Hexagon::A2_sxtb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10342 | { 1 /* */, Hexagon::A2_sxth, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10343 | { 1 /* */, Hexagon::Y5_tlboc, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tlboc, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10344 | { 1 /* */, Hexagon::Y2_tlbp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tlbp, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10345 | { 1 /* */, Hexagon::S2_vrndpackwh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10346 | { 1 /* */, Hexagon::S2_vsathb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10347 | { 1 /* */, Hexagon::S2_svsathb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10348 | { 1 /* */, Hexagon::S2_vsathub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10349 | { 1 /* */, Hexagon::S2_svsathub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10350 | { 1 /* */, Hexagon::S2_vsatwh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10351 | { 1 /* */, Hexagon::S2_vsatwuh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10352 | { 1 /* */, Hexagon::S2_vsplatrb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsplatb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10353 | { 1 /* */, Hexagon::S2_vtrunehb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vtrunehb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10354 | { 1 /* */, Hexagon::S2_vtrunohb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vtrunohb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10355 | { 1 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__imm_95_255, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10356 | { 1 /* */, Hexagon::A2_zxth, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10357 | { 1 /* */, Hexagon::V6_hi, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_hi, MCK__40_, MCK_HvxWR, MCK__41_ }, }, |
| 10358 | { 1 /* */, Hexagon::V6_lo, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_lo, MCK__40_, MCK_HvxWR, MCK__41_ }, }, |
| 10359 | { 1 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10360 | { 1 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10361 | { 1 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsw, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10362 | { 1 /* */, Hexagon::V6_vcl0h, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vcl0h, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10363 | { 1 /* */, Hexagon::V6_vcl0w, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vcl0w, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10364 | { 1 /* */, Hexagon::V6_vdealb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10365 | { 1 /* */, Hexagon::V6_vdealh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10366 | { 1 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10367 | { 1 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10368 | { 1 /* */, Hexagon::V6_vnormamth, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnormamth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10369 | { 1 /* */, Hexagon::V6_vnormamtw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnormamtw, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10370 | { 1 /* */, Hexagon::V6_vnot, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vnot, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10371 | { 1 /* */, Hexagon::V6_vpopcounth, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpopcounth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10372 | { 1 /* */, Hexagon::V6_vshuffb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10373 | { 1 /* */, Hexagon::V6_vshuffh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10374 | { 1 /* */, Hexagon::V6_lvsplatw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10375 | { 1 /* */, Hexagon::V6_zextract, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVR, MCK__61_, MCK_zextract, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10376 | { 1 /* */, Hexagon::V6_pred_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_and, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
| 10377 | { 1 /* */, Hexagon::V6_pred_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_or, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
| 10378 | { 1 /* */, Hexagon::V6_vandvrt, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10379 | { 1 /* */, Hexagon::V6_pred_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_xor, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
| 10380 | { 1 /* */, Hexagon::C2_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10381 | { 1 /* */, Hexagon::C2_bitsclr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10382 | { 1 /* */, Hexagon::C2_bitsset, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10383 | { 1 /* */, Hexagon::A4_boundscheck, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10384 | { 1 /* */, Hexagon::C4_fastcorner9, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10385 | { 1 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10386 | { 1 /* */, Hexagon::A4_tlbmatch, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tlbmatch, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10387 | { 1 /* */, Hexagon::S2_tstbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10388 | { 1 /* */, Hexagon::C2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_xor, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10389 | { 1 /* */, Hexagon::CONST64, Convert__Reg1_0__Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_CONST64, MCK__40_, MCK__HASH_, MCK_Imm, MCK__41_ }, }, |
| 10390 | { 1 /* */, Hexagon::A2_addp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10391 | { 1 /* */, Hexagon::A2_addsp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10392 | { 1 /* */, Hexagon::A2_andp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10393 | { 1 /* */, Hexagon::S2_asl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10394 | { 1 /* */, Hexagon::S2_asr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10395 | { 1 /* */, Hexagon::A4_bitsplit, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10396 | { 1 /* */, Hexagon::M2_cmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10397 | { 1 /* */, Hexagon::M7_dcmpyiw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10398 | { 1 /* */, Hexagon::M2_cmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10399 | { 1 /* */, Hexagon::M7_dcmpyrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10400 | { 1 /* */, Hexagon::A2_combinew, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10401 | { 1 /* */, Hexagon::A7_croundd_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cround, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10402 | { 1 /* */, Hexagon::S2_cabacdecbin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseCabac, { MCK_DoubleRegs, MCK__61_, MCK_decbin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10403 | { 1 /* */, Hexagon::F2_dfadd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV66, { MCK_DoubleRegs, MCK__61_, MCK_dfadd, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10404 | { 1 /* */, Hexagon::F2_dfmax, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmax, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10405 | { 1 /* */, Hexagon::F2_dfmin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10406 | { 1 /* */, Hexagon::F2_dfmpyfix, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmpyfix, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10407 | { 1 /* */, Hexagon::F2_dfmpyll, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmpyll, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10408 | { 1 /* */, Hexagon::F2_dfsub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV66, { MCK_DoubleRegs, MCK__61_, MCK_dfsub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10409 | { 1 /* */, Hexagon::S4_extractp_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10410 | { 1 /* */, Hexagon::S2_extractup_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10411 | { 1 /* */, Hexagon::S2_insertp_rp, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10412 | { 1 /* */, Hexagon::S2_lfsp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lfs, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10413 | { 1 /* */, Hexagon::S2_lsl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10414 | { 1 /* */, Hexagon::S2_lsr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10415 | { 1 /* */, Hexagon::A2_maxp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_max, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10416 | { 1 /* */, Hexagon::A2_maxup, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10417 | { 1 /* */, Hexagon::PS_loadrdabs, Convert__Reg1_0__u29_3Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 10418 | { 1 /* */, Hexagon::A2_minp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_min, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10419 | { 1 /* */, Hexagon::A2_minup, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_minu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10420 | { 1 /* */, Hexagon::M2_dpmpyss_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10421 | { 1 /* */, Hexagon::M2_dpmpyuu_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10422 | { 1 /* */, Hexagon::A2_orp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10423 | { 1 /* */, Hexagon::S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10424 | { 1 /* */, Hexagon::M4_pmpyw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10425 | { 1 /* */, Hexagon::S2_shuffeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffeb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10426 | { 1 /* */, Hexagon::S2_shuffeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10427 | { 1 /* */, Hexagon::S2_shuffob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffob, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10428 | { 1 /* */, Hexagon::S2_shuffoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10429 | { 1 /* */, Hexagon::A2_subp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10430 | { 1 /* */, Hexagon::M6_vabsdiffb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10431 | { 1 /* */, Hexagon::M2_vabsdiffh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10432 | { 1 /* */, Hexagon::M6_vabsdiffub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10433 | { 1 /* */, Hexagon::M2_vabsdiffw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10434 | { 1 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10435 | { 1 /* */, Hexagon::A2_vaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10436 | { 1 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10437 | { 1 /* */, Hexagon::A2_vaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10438 | { 1 /* */, Hexagon::S2_asl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10439 | { 1 /* */, Hexagon::S2_asl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10440 | { 1 /* */, Hexagon::S2_asr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10441 | { 1 /* */, Hexagon::S2_asr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10442 | { 1 /* */, Hexagon::A2_vavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10443 | { 1 /* */, Hexagon::A2_vavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10444 | { 1 /* */, Hexagon::A2_vavguh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10445 | { 1 /* */, Hexagon::A2_vavguw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10446 | { 1 /* */, Hexagon::A2_vavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10447 | { 1 /* */, Hexagon::S2_vcnegh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10448 | { 1 /* */, Hexagon::S2_vcrotate, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10449 | { 1 /* */, Hexagon::M7_dcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpyw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10450 | { 1 /* */, Hexagon::S2_lsl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10451 | { 1 /* */, Hexagon::S2_lsl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10452 | { 1 /* */, Hexagon::S2_lsr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10453 | { 1 /* */, Hexagon::S2_lsr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10454 | { 1 /* */, Hexagon::A2_vmaxb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10455 | { 1 /* */, Hexagon::A2_vmaxh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10456 | { 1 /* */, Hexagon::A2_vmaxub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10457 | { 1 /* */, Hexagon::A2_vmaxuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10458 | { 1 /* */, Hexagon::A2_vmaxuw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10459 | { 1 /* */, Hexagon::A2_vmaxw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10460 | { 1 /* */, Hexagon::A2_vminb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10461 | { 1 /* */, Hexagon::A2_vminh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10462 | { 1 /* */, Hexagon::A2_vminub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10463 | { 1 /* */, Hexagon::A2_vminuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10464 | { 1 /* */, Hexagon::A2_vminuw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10465 | { 1 /* */, Hexagon::A2_vminw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10466 | { 1 /* */, Hexagon::M5_vmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10467 | { 1 /* */, Hexagon::M5_vmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10468 | { 1 /* */, Hexagon::A2_vnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10469 | { 1 /* */, Hexagon::A2_vnavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10470 | { 1 /* */, Hexagon::M4_vpmpyh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10471 | { 1 /* */, Hexagon::A2_vraddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10472 | { 1 /* */, Hexagon::M2_vrcmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10473 | { 1 /* */, Hexagon::M2_vrcmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10474 | { 1 /* */, Hexagon::A4_vrmaxh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10475 | { 1 /* */, Hexagon::A4_vrmaxuh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10476 | { 1 /* */, Hexagon::A4_vrmaxuw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10477 | { 1 /* */, Hexagon::A4_vrmaxw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10478 | { 1 /* */, Hexagon::A4_vrminh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10479 | { 1 /* */, Hexagon::A4_vrminuh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10480 | { 1 /* */, Hexagon::A4_vrminuw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10481 | { 1 /* */, Hexagon::A4_vrminw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10482 | { 1 /* */, Hexagon::M5_vrmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10483 | { 1 /* */, Hexagon::M5_vrmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10484 | { 1 /* */, Hexagon::M2_vrmpy_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10485 | { 1 /* */, Hexagon::M4_vrmpyeh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10486 | { 1 /* */, Hexagon::M4_vrmpyoh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10487 | { 1 /* */, Hexagon::A2_vrsadub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10488 | { 1 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10489 | { 1 /* */, Hexagon::A2_vsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10490 | { 1 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10491 | { 1 /* */, Hexagon::A2_vsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10492 | { 1 /* */, Hexagon::S6_vtrunehb_ppp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vtrunehb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10493 | { 1 /* */, Hexagon::S2_vtrunewh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vtrunewh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10494 | { 1 /* */, Hexagon::S6_vtrunohb_ppp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vtrunohb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10495 | { 1 /* */, Hexagon::S2_vtrunowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vtrunowh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10496 | { 1 /* */, Hexagon::A2_xorp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10497 | { 1 /* */, Hexagon::J4_jumpseti, Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6, AMFBS_None, { MCK_GeneralSubRegs, MCK__61_, MCK__HASH_, MCK_u6_0Imm, MCK__59_, MCK_jump, MCK_b30_2Imm }, }, |
| 10498 | { 1 /* */, Hexagon::V6_vaddb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10499 | { 1 /* */, Hexagon::V6_vaddh_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10500 | { 1 /* */, Hexagon::V6_vaddhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10501 | { 1 /* */, Hexagon::V6_vaddubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10502 | { 1 /* */, Hexagon::V6_vadduhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10503 | { 1 /* */, Hexagon::V6_vaddw_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10504 | { 1 /* */, Hexagon::V6_vasr_into, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vasrinto, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10505 | { 1 /* */, Hexagon::V6_vcombine, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10506 | { 1 /* */, Hexagon::V6_vdmpybus_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10507 | { 1 /* */, Hexagon::V6_vdmpyhb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10508 | { 1 /* */, Hexagon::V6_vdsaduh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdsaduh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10509 | { 1 /* */, Hexagon::V6_vmpabusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10510 | { 1 /* */, Hexagon::V6_vmpabus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10511 | { 1 /* */, Hexagon::V6_vmpabuuv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10512 | { 1 /* */, Hexagon::V6_vmpabuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10513 | { 1 /* */, Hexagon::V6_vmpahb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpahb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10514 | { 1 /* */, Hexagon::V6_vmpauhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpauhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10515 | { 1 /* */, Hexagon::V6_vmpybv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10516 | { 1 /* */, Hexagon::V6_vmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10517 | { 1 /* */, Hexagon::V6_vmpybusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10518 | { 1 /* */, Hexagon::V6_vmpyh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10519 | { 1 /* */, Hexagon::V6_vmpyhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10520 | { 1 /* */, Hexagon::V6_vmpyhus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyhus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10521 | { 1 /* */, Hexagon::V6_vmpyub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10522 | { 1 /* */, Hexagon::V6_vmpyubv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10523 | { 1 /* */, Hexagon::V6_vmpyuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10524 | { 1 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10525 | { 1 /* */, Hexagon::V6_vshufoeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vshuffoeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10526 | { 1 /* */, Hexagon::V6_vshufoeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vshuffoeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10527 | { 1 /* */, Hexagon::V6_vsubb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10528 | { 1 /* */, Hexagon::V6_vsubh_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10529 | { 1 /* */, Hexagon::V6_vsubhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10530 | { 1 /* */, Hexagon::V6_vsububh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10531 | { 1 /* */, Hexagon::V6_vsubuhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10532 | { 1 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
| 10533 | { 1 /* */, Hexagon::V6_vtmpyb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpyb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10534 | { 1 /* */, Hexagon::V6_vtmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10535 | { 1 /* */, Hexagon::V6_vtmpyhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10536 | { 1 /* */, Hexagon::V6_vunpackob_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__124_, MCK__61_, MCK_vunpackob, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10537 | { 1 /* */, Hexagon::V6_vunpackoh, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__124_, MCK__61_, MCK_vunpackoh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
| 10538 | { 1 /* */, Hexagon::CONST32, Convert__Reg1_0__Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__HASH_, MCK_Imm, MCK__41_ }, }, |
| 10539 | { 1 /* */, Hexagon::A2_add, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10540 | { 1 /* */, Hexagon::A2_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10541 | { 1 /* */, Hexagon::S2_asl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10542 | { 1 /* */, Hexagon::S2_asr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10543 | { 1 /* */, Hexagon::S2_clrbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10544 | { 1 /* */, Hexagon::A4_cround_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10545 | { 1 /* */, Hexagon::Y5_ctlbw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ctlbw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10546 | { 1 /* */, Hexagon::S4_extract_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10547 | { 1 /* */, Hexagon::S2_extractu_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10548 | { 1 /* */, Hexagon::A2_iconst, Convert__Reg1_0__s27_2Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_iconst, MCK__40_, MCK__HASH_, MCK_s27_2Imm, MCK__41_ }, }, |
| 10549 | { 1 /* */, Hexagon::S2_insert_rp, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10550 | { 1 /* */, Hexagon::S2_lsl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10551 | { 1 /* */, Hexagon::S2_lsr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10552 | { 1 /* */, Hexagon::A2_max, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_max, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10553 | { 1 /* */, Hexagon::A2_maxu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10554 | { 1 /* */, Hexagon::PS_loadrbabs, Convert__Reg1_0__u32_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10555 | { 1 /* */, Hexagon::PS_loadrhabs, Convert__Reg1_0__u31_1Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 10556 | { 1 /* */, Hexagon::PS_loadrubabs, Convert__Reg1_0__u32_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10557 | { 1 /* */, Hexagon::PS_loadruhabs, Convert__Reg1_0__u31_1Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 10558 | { 1 /* */, Hexagon::PS_loadriabs, Convert__Reg1_0__u30_2Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 10559 | { 1 /* */, Hexagon::L4_loadw_phys, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw_95_phys, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10560 | { 1 /* */, Hexagon::A2_min, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_min, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10561 | { 1 /* */, Hexagon::A2_minu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_minu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10562 | { 1 /* */, Hexagon::A4_modwrapu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_modwrap, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10563 | { 1 /* */, Hexagon::M2_mpy_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10564 | { 1 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10565 | { 1 /* */, Hexagon::M2_mpysu_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpysu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10566 | { 1 /* */, Hexagon::M2_mpyu_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10567 | { 1 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyui, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10568 | { 1 /* */, Hexagon::A2_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10569 | { 1 /* */, Hexagon::S2_parityp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10570 | { 1 /* */, Hexagon::S4_parity, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10571 | { 1 /* */, Hexagon::A4_round_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10572 | { 1 /* */, Hexagon::S2_setbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10573 | { 1 /* */, Hexagon::F2_sfadd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfadd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10574 | { 1 /* */, Hexagon::F2_sffixupd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10575 | { 1 /* */, Hexagon::F2_sffixupn, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupn, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10576 | { 1 /* */, Hexagon::F2_sfmax, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmax, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10577 | { 1 /* */, Hexagon::F2_sfmin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmin, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10578 | { 1 /* */, Hexagon::F2_sfmpy, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10579 | { 1 /* */, Hexagon::F2_sfsub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfsub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10580 | { 1 /* */, Hexagon::A2_sub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10581 | { 1 /* */, Hexagon::S2_togglebit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10582 | { 1 /* */, Hexagon::A2_svaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10583 | { 1 /* */, Hexagon::S2_asr_r_svw_trun, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10584 | { 1 /* */, Hexagon::A2_svavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10585 | { 1 /* */, Hexagon::V6_extractw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_IntRegs, MCK__61_, MCK_vextract, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10586 | { 1 /* */, Hexagon::C2_vitpack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vitpack, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10587 | { 1 /* */, Hexagon::A2_svnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10588 | { 1 /* */, Hexagon::M2_vraddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vraddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10589 | { 1 /* */, Hexagon::M2_vradduh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vradduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10590 | { 1 /* */, Hexagon::A2_svsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10591 | { 1 /* */, Hexagon::A2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10592 | { 1 /* */, Hexagon::F2_sfinvsqrta, Convert__Reg1_0__Reg1_1__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfinvsqrta, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10593 | { 1 /* */, Hexagon::V6_vconv_h_hf, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_hf }, }, |
| 10594 | { 1 /* */, Hexagon::V6_vconv_hf_qf32, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxWR, MCK__DOT_, MCK_qf32 }, }, |
| 10595 | { 1 /* */, Hexagon::V6_vconv_hf_h, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 10596 | { 1 /* */, Hexagon::V6_vconv_hf_qf16, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_qf16 }, }, |
| 10597 | { 1 /* */, Hexagon::V6_vconv_sf_qf32, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_qf32 }, }, |
| 10598 | { 1 /* */, Hexagon::V6_vconv_sf_w, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 10599 | { 1 /* */, Hexagon::V6_vconv_w_sf, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_sf }, }, |
| 10600 | { 1 /* */, Hexagon::V6_vabsdiffh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10601 | { 1 /* */, Hexagon::V6_vabsdiffub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10602 | { 1 /* */, Hexagon::V6_vabsdiffuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10603 | { 1 /* */, Hexagon::V6_vabsdiffw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10604 | { 1 /* */, Hexagon::V6_vaddb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10605 | { 1 /* */, Hexagon::V6_vaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10606 | { 1 /* */, Hexagon::V6_vaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10607 | { 1 /* */, Hexagon::V6_vandqrt, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
| 10608 | { 1 /* */, Hexagon::V6_vandvqv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK__41_ }, }, |
| 10609 | { 1 /* */, Hexagon::V6_vand, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10610 | { 1 /* */, Hexagon::V6_vaslh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10611 | { 1 /* */, Hexagon::V6_vaslhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10612 | { 1 /* */, Hexagon::V6_vaslw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10613 | { 1 /* */, Hexagon::V6_vaslwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10614 | { 1 /* */, Hexagon::V6_vasrh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10615 | { 1 /* */, Hexagon::V6_vasrhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10616 | { 1 /* */, Hexagon::V6_vasrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10617 | { 1 /* */, Hexagon::V6_vasrwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10618 | { 1 /* */, Hexagon::V6_vavgb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10619 | { 1 /* */, Hexagon::V6_vavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10620 | { 1 /* */, Hexagon::V6_vavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10621 | { 1 /* */, Hexagon::V6_vavguh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10622 | { 1 /* */, Hexagon::V6_vavguw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10623 | { 1 /* */, Hexagon::V6_vavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10624 | { 1 /* */, Hexagon::V6_vdealb4w, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealb4w, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10625 | { 1 /* */, Hexagon::V6_vdelta, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vdelta, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10626 | { 1 /* */, Hexagon::V6_vdmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10627 | { 1 /* */, Hexagon::V6_vdmpyhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10628 | { 1 /* */, Hexagon::V6_vlsrh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10629 | { 1 /* */, Hexagon::V6_vlsrhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10630 | { 1 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10631 | { 1 /* */, Hexagon::V6_vlsrwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10632 | { 1 /* */, Hexagon::V6_vmaxb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10633 | { 1 /* */, Hexagon::V6_vmaxh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10634 | { 1 /* */, Hexagon::V6_vmaxub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10635 | { 1 /* */, Hexagon::V6_vmaxuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10636 | { 1 /* */, Hexagon::V6_vmaxw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10637 | { 1 /* */, Hexagon::V6_vminb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10638 | { 1 /* */, Hexagon::V6_vminh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10639 | { 1 /* */, Hexagon::V6_vminub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10640 | { 1 /* */, Hexagon::V6_vminuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10641 | { 1 /* */, Hexagon::V6_vminw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10642 | { 1 /* */, Hexagon::V6_vmpyewuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10643 | { 1 /* */, Hexagon::V6_vmpyiewuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10644 | { 1 /* */, Hexagon::V6_vmpyih, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyih, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10645 | { 1 /* */, Hexagon::V6_vmpyihb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyihb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10646 | { 1 /* */, Hexagon::V6_vmpyiowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10647 | { 1 /* */, Hexagon::V6_vmpyiwb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10648 | { 1 /* */, Hexagon::V6_vmpyiwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10649 | { 1 /* */, Hexagon::V6_vmpyiwub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10650 | { 1 /* */, Hexagon::V6_vnavgb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10651 | { 1 /* */, Hexagon::V6_vnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10652 | { 1 /* */, Hexagon::V6_vnavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10653 | { 1 /* */, Hexagon::V6_vnavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10654 | { 1 /* */, Hexagon::V6_vor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vor, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10655 | { 1 /* */, Hexagon::V6_vpackeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10656 | { 1 /* */, Hexagon::V6_vpackeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10657 | { 1 /* */, Hexagon::V6_vpackob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackob, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10658 | { 1 /* */, Hexagon::V6_vpackoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackoh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10659 | { 1 /* */, Hexagon::V6_vrdelta, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vrdelta, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10660 | { 1 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10661 | { 1 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10662 | { 1 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10663 | { 1 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10664 | { 1 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10665 | { 1 /* */, Hexagon::V6_vror, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vror, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10666 | { 1 /* */, Hexagon::V6_vrotr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrotr, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10667 | { 1 /* */, Hexagon::V6_vsathub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsathub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10668 | { 1 /* */, Hexagon::V6_vsatuwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsatuwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10669 | { 1 /* */, Hexagon::V6_vsatwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsatwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10670 | { 1 /* */, Hexagon::V6_vshuffeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10671 | { 1 /* */, Hexagon::V6_vshufeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10672 | { 1 /* */, Hexagon::V6_vshuffob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffob, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10673 | { 1 /* */, Hexagon::V6_vshufoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffoh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10674 | { 1 /* */, Hexagon::V6_vsubb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10675 | { 1 /* */, Hexagon::V6_vsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10676 | { 1 /* */, Hexagon::V6_vsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10677 | { 1 /* */, Hexagon::V6_vxor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vxor, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10678 | { 1 /* */, Hexagon::V6_pred_and_n, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_and, MCK__40_, MCK_HvxQR, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_ }, }, |
| 10679 | { 1 /* */, Hexagon::V6_pred_or_n, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_or, MCK__40_, MCK_HvxQR, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_ }, }, |
| 10680 | { 1 /* */, Hexagon::V6_vandvrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10681 | { 1 /* */, Hexagon::C4_nbitsclr, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10682 | { 1 /* */, Hexagon::C4_nbitsset, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10683 | { 1 /* */, Hexagon::C4_fastcorner9_not, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10684 | { 1 /* */, Hexagon::S4_ntstbit_r, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10685 | { 1 /* */, Hexagon::C2_andn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
| 10686 | { 1 /* */, Hexagon::C2_bitsclri, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10687 | { 1 /* */, Hexagon::F2_dfclass, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfclass, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10688 | { 1 /* */, Hexagon::C2_orn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
| 10689 | { 1 /* */, Hexagon::F2_sfclass, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfclass, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10690 | { 1 /* */, Hexagon::S2_tstbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10691 | { 1 /* */, Hexagon::S2_asl_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10692 | { 1 /* */, Hexagon::S2_asr_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10693 | { 1 /* */, Hexagon::S2_lsl_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10694 | { 1 /* */, Hexagon::S2_lsr_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10695 | { 1 /* */, Hexagon::S2_asl_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10696 | { 1 /* */, Hexagon::S2_asr_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10697 | { 1 /* */, Hexagon::M2_cmaci_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10698 | { 1 /* */, Hexagon::M7_dcmpyiw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10699 | { 1 /* */, Hexagon::M2_cmacr_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10700 | { 1 /* */, Hexagon::M7_dcmpyrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10701 | { 1 /* */, Hexagon::F2_dfmpyhh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_dfmpyhh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10702 | { 1 /* */, Hexagon::F2_dfmpylh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_dfmpylh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10703 | { 1 /* */, Hexagon::S2_lsl_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10704 | { 1 /* */, Hexagon::S2_lsr_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10705 | { 1 /* */, Hexagon::M2_dpmpyss_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10706 | { 1 /* */, Hexagon::M2_dpmpyuu_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10707 | { 1 /* */, Hexagon::M7_dcmpyrwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpyw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10708 | { 1 /* */, Hexagon::M5_vmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10709 | { 1 /* */, Hexagon::M5_vmacbuu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10710 | { 1 /* */, Hexagon::M2_vmac2es, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10711 | { 1 /* */, Hexagon::M2_vmac2, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10712 | { 1 /* */, Hexagon::A2_vraddub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10713 | { 1 /* */, Hexagon::M2_vrcmaci_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10714 | { 1 /* */, Hexagon::M2_vrcmacr_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10715 | { 1 /* */, Hexagon::S2_vrcnegh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10716 | { 1 /* */, Hexagon::M5_vrmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10717 | { 1 /* */, Hexagon::M5_vrmacbuu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10718 | { 1 /* */, Hexagon::M2_vrmac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10719 | { 1 /* */, Hexagon::M4_vrmpyeh_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10720 | { 1 /* */, Hexagon::M4_vrmpyoh_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10721 | { 1 /* */, Hexagon::A2_vrsadub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10722 | { 1 /* */, Hexagon::S2_asl_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10723 | { 1 /* */, Hexagon::S2_asr_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10724 | { 1 /* */, Hexagon::S2_lsl_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10725 | { 1 /* */, Hexagon::S2_lsr_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10726 | { 1 /* */, Hexagon::M2_dpmpyss_nac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10727 | { 1 /* */, Hexagon::M2_dpmpyuu_nac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10728 | { 1 /* */, Hexagon::A4_andnp, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10729 | { 1 /* */, Hexagon::S2_asl_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10730 | { 1 /* */, Hexagon::S2_asr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10731 | { 1 /* */, Hexagon::S2_asr_i_p_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10732 | { 1 /* */, Hexagon::A4_bitspliti, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10733 | { 1 /* */, Hexagon::M7_dcmpyiwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10734 | { 1 /* */, Hexagon::M7_dcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10735 | { 1 /* */, Hexagon::A4_combineir, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
| 10736 | { 1 /* */, Hexagon::A4_combineri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 10737 | { 1 /* */, Hexagon::F2_conv_df2d_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10738 | { 1 /* */, Hexagon::F2_conv_df2ud_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10739 | { 1 /* */, Hexagon::F2_conv_sf2d_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10740 | { 1 /* */, Hexagon::F2_conv_sf2ud_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10741 | { 1 /* */, Hexagon::A7_croundd_ri, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cround, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10742 | { 1 /* */, Hexagon::L4_return, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 10743 | { 1 /* */, Hexagon::L2_deallocframe, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_deallocframe, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 10744 | { 1 /* */, Hexagon::S2_lsr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10745 | { 1 /* */, Hexagon::A4_ornp, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
| 10746 | { 1 /* */, Hexagon::S6_rol_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_HasV60, { MCK_DoubleRegs, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10747 | { 1 /* */, Hexagon::A2_vabshsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10748 | { 1 /* */, Hexagon::A2_vabswsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10749 | { 1 /* */, Hexagon::S2_valignrb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10750 | { 1 /* */, Hexagon::S2_asl_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
| 10751 | { 1 /* */, Hexagon::S2_asl_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10752 | { 1 /* */, Hexagon::S2_asr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
| 10753 | { 1 /* */, Hexagon::S2_asr_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10754 | { 1 /* */, Hexagon::A7_vclip, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_vclip, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10755 | { 1 /* */, Hexagon::A2_vconj, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vconj, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10756 | { 1 /* */, Hexagon::S2_lsr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
| 10757 | { 1 /* */, Hexagon::S2_lsr_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10758 | { 1 /* */, Hexagon::C2_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmux, MCK__40_, MCK_PredRegs, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10759 | { 1 /* */, Hexagon::M2_vrcmpyi_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10760 | { 1 /* */, Hexagon::M2_vrcmpyr_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10761 | { 1 /* */, Hexagon::S2_vsplicerb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
| 10762 | { 1 /* */, Hexagon::S2_asl_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10763 | { 1 /* */, Hexagon::S2_asr_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10764 | { 1 /* */, Hexagon::S2_lsl_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10765 | { 1 /* */, Hexagon::S2_lsr_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10766 | { 1 /* */, Hexagon::M4_pmpyw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10767 | { 1 /* */, Hexagon::M4_vpmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10768 | { 1 /* */, Hexagon::M4_xor_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10769 | { 1 /* */, Hexagon::S2_asl_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10770 | { 1 /* */, Hexagon::S2_asr_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10771 | { 1 /* */, Hexagon::S2_lsl_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10772 | { 1 /* */, Hexagon::S2_lsr_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10773 | { 1 /* */, Hexagon::A5_ACS, Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV55, { MCK_DoubleRegs, MCK_PredRegs, MCK__61_, MCK_vacsh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10774 | { 1 /* */, Hexagon::A6_vminub_RdP, Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, AMFBS_HasV62, { MCK_DoubleRegs, MCK_PredRegs, MCK__61_, MCK_vminub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10775 | { 1 /* */, Hexagon::V6_vaddhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10776 | { 1 /* */, Hexagon::V6_vaddubh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10777 | { 1 /* */, Hexagon::V6_vadduhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10778 | { 1 /* */, Hexagon::V6_vdmpybus_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10779 | { 1 /* */, Hexagon::V6_vdmpyhb_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10780 | { 1 /* */, Hexagon::V6_vdsaduh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdsaduh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10781 | { 1 /* */, Hexagon::V6_vmpabus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10782 | { 1 /* */, Hexagon::V6_vmpabuu_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10783 | { 1 /* */, Hexagon::V6_vmpahb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpahb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10784 | { 1 /* */, Hexagon::V6_vmpauhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpauhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10785 | { 1 /* */, Hexagon::V6_vmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10786 | { 1 /* */, Hexagon::V6_vmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10787 | { 1 /* */, Hexagon::V6_vmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10788 | { 1 /* */, Hexagon::V6_vmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10789 | { 1 /* */, Hexagon::V6_vmpyhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10790 | { 1 /* */, Hexagon::V6_vmpyhus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyhus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10791 | { 1 /* */, Hexagon::V6_vmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10792 | { 1 /* */, Hexagon::V6_vmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10793 | { 1 /* */, Hexagon::V6_vmpyuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10794 | { 1 /* */, Hexagon::V6_vmpyuhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10795 | { 1 /* */, Hexagon::V6_vtmpyb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpyb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10796 | { 1 /* */, Hexagon::V6_vtmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10797 | { 1 /* */, Hexagon::V6_vtmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
| 10798 | { 1 /* */, Hexagon::V6_vdealvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
| 10799 | { 1 /* */, Hexagon::V6_vshuffvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
| 10800 | { 1 /* */, Hexagon::V6_vswap, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vswap, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10801 | { 1 /* */, Hexagon::M4_and_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10802 | { 1 /* */, Hexagon::S2_asl_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10803 | { 1 /* */, Hexagon::S2_asr_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10804 | { 1 /* */, Hexagon::S2_lsl_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10805 | { 1 /* */, Hexagon::S2_lsr_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10806 | { 1 /* */, Hexagon::M4_and_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10807 | { 1 /* */, Hexagon::M4_and_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10808 | { 1 /* */, Hexagon::M2_acci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10809 | { 1 /* */, Hexagon::S2_asl_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10810 | { 1 /* */, Hexagon::S2_asr_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10811 | { 1 /* */, Hexagon::S2_lsl_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10812 | { 1 /* */, Hexagon::S2_lsr_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10813 | { 1 /* */, Hexagon::M2_maci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10814 | { 1 /* */, Hexagon::F2_sffma, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10815 | { 1 /* */, Hexagon::M2_subacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10816 | { 1 /* */, Hexagon::M2_nacci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10817 | { 1 /* */, Hexagon::S2_asl_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10818 | { 1 /* */, Hexagon::S2_asr_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10819 | { 1 /* */, Hexagon::S2_lsl_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10820 | { 1 /* */, Hexagon::S2_lsr_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10821 | { 1 /* */, Hexagon::M2_mnaci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV66, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10822 | { 1 /* */, Hexagon::F2_sffms, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10823 | { 1 /* */, Hexagon::A2_abssat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10824 | { 1 /* */, Hexagon::C4_addipc, Convert__Reg1_0__u32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_PC, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10825 | { 1 /* */, Hexagon::A2_addi, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 10826 | { 1 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 10827 | { 1 /* */, Hexagon::A4_andn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
| 10828 | { 1 /* */, Hexagon::S2_asl_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10829 | { 1 /* */, Hexagon::S2_asr_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10830 | { 1 /* */, Hexagon::S2_asr_i_r_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10831 | { 1 /* */, Hexagon::A7_clip, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_clip, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10832 | { 1 /* */, Hexagon::S2_clrbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10833 | { 1 /* */, Hexagon::F2_conv_df2uw_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10834 | { 1 /* */, Hexagon::F2_conv_df2w_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10835 | { 1 /* */, Hexagon::F2_conv_sf2uw_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10836 | { 1 /* */, Hexagon::F2_conv_sf2w_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
| 10837 | { 1 /* */, Hexagon::A4_cround_ri, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10838 | { 1 /* */, Hexagon::S4_lsli, Convert__Reg1_0__s6_0Imm1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK__HASH_, MCK_s6_0Imm, MCK_IntRegs, MCK__41_ }, }, |
| 10839 | { 1 /* */, Hexagon::S2_lsr_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10840 | { 1 /* */, Hexagon::M2_mpysmi, Convert__Reg1_0__Reg1_4__m32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_m32_0Imm, MCK__41_ }, }, |
| 10841 | { 1 /* */, Hexagon::C2_mux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10842 | { 1 /* */, Hexagon::A2_negsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10843 | { 1 /* */, Hexagon::A2_orir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 10844 | { 1 /* */, Hexagon::A4_orn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
| 10845 | { 1 /* */, Hexagon::S6_rol_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV60, { MCK_IntRegs, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10846 | { 1 /* */, Hexagon::A2_roundsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10847 | { 1 /* */, Hexagon::A4_round_ri, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10848 | { 1 /* */, Hexagon::S2_setbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10849 | { 1 /* */, Hexagon::A2_subri, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
| 10850 | { 1 /* */, Hexagon::S2_togglebit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10851 | { 1 /* */, Hexagon::S2_asr_i_svw_trun, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10852 | { 1 /* */, Hexagon::S2_vrndpackwhs, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10853 | { 1 /* */, Hexagon::M4_xor_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10854 | { 1 /* */, Hexagon::M4_xor_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10855 | { 1 /* */, Hexagon::M2_xor_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10856 | { 1 /* */, Hexagon::M4_or_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10857 | { 1 /* */, Hexagon::S2_asl_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10858 | { 1 /* */, Hexagon::S2_asr_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10859 | { 1 /* */, Hexagon::S2_lsl_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10860 | { 1 /* */, Hexagon::S2_lsr_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10861 | { 1 /* */, Hexagon::M4_or_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10862 | { 1 /* */, Hexagon::M4_or_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10863 | { 1 /* */, Hexagon::F2_sfrecipa, Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfrecipa, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10864 | { 1 /* */, Hexagon::V6_vaslh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10865 | { 1 /* */, Hexagon::V6_vaslw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10866 | { 1 /* */, Hexagon::V6_vasrh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10867 | { 1 /* */, Hexagon::V6_vasrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10868 | { 1 /* */, Hexagon::V6_vdmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10869 | { 1 /* */, Hexagon::V6_vdmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10870 | { 1 /* */, Hexagon::V6_vmpyiewh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiewh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10871 | { 1 /* */, Hexagon::V6_vmpyiewuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10872 | { 1 /* */, Hexagon::V6_vmpyih_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyih, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10873 | { 1 /* */, Hexagon::V6_vmpyihb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyihb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10874 | { 1 /* */, Hexagon::V6_vmpyiwb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10875 | { 1 /* */, Hexagon::V6_vmpyiwh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10876 | { 1 /* */, Hexagon::V6_vmpyiwub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10877 | { 1 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10878 | { 1 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10879 | { 1 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10880 | { 1 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 10881 | { 1 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10882 | { 1 /* */, Hexagon::V6_vprefixqb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 10883 | { 1 /* */, Hexagon::V6_lvsplatb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10884 | { 1 /* */, Hexagon::V6_vprefixqh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 10885 | { 1 /* */, Hexagon::V6_lvsplath, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10886 | { 1 /* */, Hexagon::V6_vprefixqw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 10887 | { 1 /* */, Hexagon::V6_vinsertwr, Convert__Reg1_0__Tie0_0_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vinsert, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 10888 | { 1 /* */, Hexagon::V6_vabsb_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsb, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10889 | { 1 /* */, Hexagon::V6_vabsh_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsh, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10890 | { 1 /* */, Hexagon::V6_vabsw_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsw, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10891 | { 1 /* */, Hexagon::V6_valignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_valign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
| 10892 | { 1 /* */, Hexagon::V6_vandnqrt, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
| 10893 | { 1 /* */, Hexagon::V6_vandvnqv, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_HvxVR, MCK__41_ }, }, |
| 10894 | { 1 /* */, Hexagon::V6_vlalignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vlalign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
| 10895 | { 1 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 10896 | { 1 /* */, Hexagon::V6_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmux, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 10897 | { 1 /* */, Hexagon::V6_vandqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
| 10898 | { 1 /* */, Hexagon::C4_nbitsclri, Convert__Reg1_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10899 | { 1 /* */, Hexagon::S4_ntstbit_i, Convert__Reg1_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 10900 | { 1 /* */, Hexagon::C2_cmpeqp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10901 | { 1 /* */, Hexagon::C2_cmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10902 | { 1 /* */, Hexagon::C2_cmpgtp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10903 | { 1 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10904 | { 1 /* */, Hexagon::C2_cmpgtup, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10905 | { 1 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10906 | { 1 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_7__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_lt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10907 | { 1 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_7__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ltu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10908 | { 1 /* */, Hexagon::A4_cmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10909 | { 1 /* */, Hexagon::A4_cmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10910 | { 1 /* */, Hexagon::A4_cmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10911 | { 1 /* */, Hexagon::A4_cmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10912 | { 1 /* */, Hexagon::A4_cmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10913 | { 1 /* */, Hexagon::A4_cmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10914 | { 1 /* */, Hexagon::F2_dfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10915 | { 1 /* */, Hexagon::F2_dfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10916 | { 1 /* */, Hexagon::F2_dfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10917 | { 1 /* */, Hexagon::F2_dfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10918 | { 1 /* */, Hexagon::F2_sfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10919 | { 1 /* */, Hexagon::F2_sfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10920 | { 1 /* */, Hexagon::F2_sfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10921 | { 1 /* */, Hexagon::F2_sfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 10922 | { 1 /* */, Hexagon::A2_vcmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10923 | { 1 /* */, Hexagon::A4_vcmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10924 | { 1 /* */, Hexagon::A2_vcmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10925 | { 1 /* */, Hexagon::A2_vcmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10926 | { 1 /* */, Hexagon::A2_vcmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10927 | { 1 /* */, Hexagon::A2_vcmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10928 | { 1 /* */, Hexagon::A2_vcmpweq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10929 | { 1 /* */, Hexagon::A2_vcmpwgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10930 | { 1 /* */, Hexagon::A2_vcmpwgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 10931 | { 1 /* */, Hexagon::S2_asl_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10932 | { 1 /* */, Hexagon::S2_asr_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10933 | { 1 /* */, Hexagon::S2_lsr_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10934 | { 1 /* */, Hexagon::S6_rol_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10935 | { 1 /* */, Hexagon::S2_asl_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10936 | { 1 /* */, Hexagon::S2_asr_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10937 | { 1 /* */, Hexagon::M7_dcmpyiwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10938 | { 1 /* */, Hexagon::M7_dcmpyrwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10939 | { 1 /* */, Hexagon::S2_lsr_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10940 | { 1 /* */, Hexagon::S6_rol_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10941 | { 1 /* */, Hexagon::M2_vrcmaci_s0c, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10942 | { 1 /* */, Hexagon::M2_vrcmacr_s0c, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
| 10943 | { 1 /* */, Hexagon::S2_asl_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10944 | { 1 /* */, Hexagon::S2_asr_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10945 | { 1 /* */, Hexagon::S2_lsr_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10946 | { 1 /* */, Hexagon::S6_rol_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 10947 | { 1 /* */, Hexagon::A2_addpsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10948 | { 1 /* */, Hexagon::M2_cmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10949 | { 1 /* */, Hexagon::A2_combineii, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 10950 | { 1 /* */, Hexagon::TFRI64_V2_ext, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 10951 | { 1 /* */, Hexagon::A4_combineii, Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s8_0Imm, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10952 | { 1 /* */, Hexagon::F2_dfimm_n, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
| 10953 | { 1 /* */, Hexagon::F2_dfimm_p, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
| 10954 | { 1 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 10955 | { 1 /* */, Hexagon::L2_loadalignb_pr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 10956 | { 1 /* */, Hexagon::L4_loadalignb_ap, Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10957 | { 1 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
| 10958 | { 1 /* */, Hexagon::L2_loadbsw4_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 10959 | { 1 /* */, Hexagon::L4_loadbsw4_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10960 | { 1 /* */, Hexagon::L2_loadrdgp, Convert__Reg1_0__u29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 10961 | { 1 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__s29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_ }, }, |
| 10962 | { 1 /* */, Hexagon::L2_loadrd_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 10963 | { 1 /* */, Hexagon::L4_loadrd_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10964 | { 1 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
| 10965 | { 1 /* */, Hexagon::L2_loadalignh_pr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 10966 | { 1 /* */, Hexagon::L4_loadalignh_ap, Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10967 | { 1 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
| 10968 | { 1 /* */, Hexagon::L2_loadbzw4_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 10969 | { 1 /* */, Hexagon::L4_loadbzw4_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 10970 | { 1 /* */, Hexagon::dep_S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_deprecated }, }, |
| 10971 | { 1 /* */, Hexagon::A2_vaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10972 | { 1 /* */, Hexagon::A2_vaddubs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10973 | { 1 /* */, Hexagon::A2_vadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10974 | { 1 /* */, Hexagon::A2_vaddws, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10975 | { 1 /* */, Hexagon::S2_valignib, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 10976 | { 1 /* */, Hexagon::A2_vavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
| 10977 | { 1 /* */, Hexagon::A2_vavghr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 10978 | { 1 /* */, Hexagon::A2_vavgubr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 10979 | { 1 /* */, Hexagon::A2_vavguhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 10980 | { 1 /* */, Hexagon::A2_vavguwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 10981 | { 1 /* */, Hexagon::A2_vavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
| 10982 | { 1 /* */, Hexagon::A2_vavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 10983 | { 1 /* */, Hexagon::M2_vcmpy_s0_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10984 | { 1 /* */, Hexagon::M2_vcmpy_s0_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10985 | { 1 /* */, Hexagon::M2_vdmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10986 | { 1 /* */, Hexagon::M5_vdmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10987 | { 1 /* */, Hexagon::M2_vmpy2es_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10988 | { 1 /* */, Hexagon::M2_vmpy2s_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10989 | { 1 /* */, Hexagon::M2_vmpy2su_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10990 | { 1 /* */, Hexagon::M2_mmpyl_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10991 | { 1 /* */, Hexagon::M2_mmpyul_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10992 | { 1 /* */, Hexagon::M2_mmpyh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10993 | { 1 /* */, Hexagon::M2_mmpyuh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10994 | { 1 /* */, Hexagon::S4_vrcrotate, Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 10995 | { 1 /* */, Hexagon::S2_vspliceib, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 10996 | { 1 /* */, Hexagon::A2_vsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10997 | { 1 /* */, Hexagon::A2_vsububs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10998 | { 1 /* */, Hexagon::A2_vsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 10999 | { 1 /* */, Hexagon::A2_vsubws, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11000 | { 1 /* */, Hexagon::S4_vxaddsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11001 | { 1 /* */, Hexagon::S4_vxaddsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11002 | { 1 /* */, Hexagon::S4_vxsubaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11003 | { 1 /* */, Hexagon::S4_vxsubaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11004 | { 1 /* */, Hexagon::S2_asl_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11005 | { 1 /* */, Hexagon::S2_lsr_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11006 | { 1 /* */, Hexagon::S6_rol_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11007 | { 1 /* */, Hexagon::S2_asl_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11008 | { 1 /* */, Hexagon::S2_asr_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11009 | { 1 /* */, Hexagon::S2_lsr_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11010 | { 1 /* */, Hexagon::S6_rol_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11011 | { 1 /* */, Hexagon::V6_vcombine_tmp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 11012 | { 1 /* */, Hexagon::V6_vaddbsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11013 | { 1 /* */, Hexagon::V6_vaddhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11014 | { 1 /* */, Hexagon::V6_vaddubsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11015 | { 1 /* */, Hexagon::V6_vadduhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11016 | { 1 /* */, Hexagon::V6_vadduwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11017 | { 1 /* */, Hexagon::V6_vaddwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11018 | { 1 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11019 | { 1 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11020 | { 1 /* */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11021 | { 1 /* */, Hexagon::V6_vsubbsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11022 | { 1 /* */, Hexagon::V6_vsubhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11023 | { 1 /* */, Hexagon::V6_vsububsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11024 | { 1 /* */, Hexagon::V6_vsubuhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11025 | { 1 /* */, Hexagon::V6_vsubuwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11026 | { 1 /* */, Hexagon::V6_vsubwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11027 | { 1 /* */, Hexagon::M4_and_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
| 11028 | { 1 /* */, Hexagon::S2_asl_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11029 | { 1 /* */, Hexagon::S2_asr_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11030 | { 1 /* */, Hexagon::S2_lsr_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11031 | { 1 /* */, Hexagon::S6_rol_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11032 | { 1 /* */, Hexagon::M2_accii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11033 | { 1 /* */, Hexagon::S2_asl_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11034 | { 1 /* */, Hexagon::S2_asr_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11035 | { 1 /* */, Hexagon::S2_lsr_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11036 | { 1 /* */, Hexagon::M2_macsip, Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11037 | { 1 /* */, Hexagon::S6_rol_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11038 | { 1 /* */, Hexagon::M2_naccii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11039 | { 1 /* */, Hexagon::S2_asl_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11040 | { 1 /* */, Hexagon::S2_asr_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11041 | { 1 /* */, Hexagon::S2_lsr_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11042 | { 1 /* */, Hexagon::M2_macsin, Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11043 | { 1 /* */, Hexagon::S6_rol_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11044 | { 1 /* */, Hexagon::V6_extractw, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_UseHVX, { MCK_IntRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vextract, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 11045 | { 1 /* */, Hexagon::M2_mpysip, Convert__Reg1_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__43_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11046 | { 1 /* */, Hexagon::M2_mpysin, Convert__Reg1_0__Reg1_5__u8_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__MINUS_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 11047 | { 1 /* */, Hexagon::A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11048 | { 1 /* */, Hexagon::S2_addasl_rrri, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_addasl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11049 | { 1 /* */, Hexagon::S2_asl_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11050 | { 1 /* */, Hexagon::S2_asr_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11051 | { 1 /* */, Hexagon::A4_rcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 11052 | { 1 /* */, Hexagon::S2_mask, Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7, AMFBS_HasV66, { MCK_IntRegs, MCK__61_, MCK_mask, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11053 | { 1 /* */, Hexagon::L2_loadrbgp, Convert__Reg1_0__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11054 | { 1 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11055 | { 1 /* */, Hexagon::L2_loadrb_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11056 | { 1 /* */, Hexagon::L4_loadrb_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11057 | { 1 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
| 11058 | { 1 /* */, Hexagon::L2_loadbsw2_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11059 | { 1 /* */, Hexagon::L4_loadbsw2_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11060 | { 1 /* */, Hexagon::L2_loadrhgp, Convert__Reg1_0__u31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 11061 | { 1 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
| 11062 | { 1 /* */, Hexagon::L2_loadrh_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11063 | { 1 /* */, Hexagon::L4_loadrh_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11064 | { 1 /* */, Hexagon::L2_loadrubgp, Convert__Reg1_0__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11065 | { 1 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11066 | { 1 /* */, Hexagon::L2_loadrub_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11067 | { 1 /* */, Hexagon::L4_loadrub_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11068 | { 1 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
| 11069 | { 1 /* */, Hexagon::L2_loadbzw2_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11070 | { 1 /* */, Hexagon::L4_loadbzw2_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11071 | { 1 /* */, Hexagon::L2_loadruhgp, Convert__Reg1_0__u31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 11072 | { 1 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
| 11073 | { 1 /* */, Hexagon::L2_loadruh_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11074 | { 1 /* */, Hexagon::L4_loadruh_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11075 | { 1 /* */, Hexagon::L2_loadrigp, Convert__Reg1_0__u30_2Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 11076 | { 1 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
| 11077 | { 1 /* */, Hexagon::L2_loadri_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11078 | { 1 /* */, Hexagon::L4_loadri_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11079 | { 1 /* */, Hexagon::M2_dpmpyss_rnd_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11080 | { 1 /* */, Hexagon::C2_muxri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
| 11081 | { 1 /* */, Hexagon::C2_muxir, Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11082 | { 1 /* */, Hexagon::A4_round_rr_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11083 | { 1 /* */, Hexagon::F2_sfimm_n, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
| 11084 | { 1 /* */, Hexagon::F2_sfimm_p, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
| 11085 | { 1 /* */, Hexagon::A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11086 | { 1 /* */, Hexagon::A2_svaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11087 | { 1 /* */, Hexagon::A5_vaddhubs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddhub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11088 | { 1 /* */, Hexagon::A2_svadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11089 | { 1 /* */, Hexagon::A2_svavghs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11090 | { 1 /* */, Hexagon::A2_svsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11091 | { 1 /* */, Hexagon::A2_svsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11092 | { 1 /* */, Hexagon::M4_xor_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
| 11093 | { 1 /* */, Hexagon::S2_asl_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11094 | { 1 /* */, Hexagon::S2_lsr_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11095 | { 1 /* */, Hexagon::S6_rol_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11096 | { 1 /* */, Hexagon::S4_or_andi, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11097 | { 1 /* */, Hexagon::M4_or_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
| 11098 | { 1 /* */, Hexagon::S2_asl_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11099 | { 1 /* */, Hexagon::S2_asr_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11100 | { 1 /* */, Hexagon::S2_lsr_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11101 | { 1 /* */, Hexagon::S4_or_ori, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11102 | { 1 /* */, Hexagon::S6_rol_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11103 | { 1 /* */, Hexagon::V6_set_qfext, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_x, MCK__61_, MCK_vsetqfext, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 11104 | { 1 /* */, Hexagon::V6_vaddbsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11105 | { 1 /* */, Hexagon::V6_vaddhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11106 | { 1 /* */, Hexagon::V6_vaddubsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11107 | { 1 /* */, Hexagon::V6_vadduhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11108 | { 1 /* */, Hexagon::V6_vadduwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vadduw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11109 | { 1 /* */, Hexagon::V6_vaddwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11110 | { 1 /* */, Hexagon::V6_valignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_valign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11111 | { 1 /* */, Hexagon::V6_vavgbrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11112 | { 1 /* */, Hexagon::V6_vavghrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11113 | { 1 /* */, Hexagon::V6_vavgubrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11114 | { 1 /* */, Hexagon::V6_vavguhrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11115 | { 1 /* */, Hexagon::V6_vavguwrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11116 | { 1 /* */, Hexagon::V6_vavgwrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11117 | { 1 /* */, Hexagon::V6_vdmpyhisat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11118 | { 1 /* */, Hexagon::V6_vdmpyhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11119 | { 1 /* */, Hexagon::V6_vdmpyhvsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11120 | { 1 /* */, Hexagon::V6_vdmpyhsusat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11121 | { 1 /* */, Hexagon::V6_get_qfext, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__61_, MCK_vgetqfext, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_x, MCK_IntRegs, MCK__41_ }, }, |
| 11122 | { 1 /* */, Hexagon::V6_vlalignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vlalign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11123 | { 1 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11124 | { 1 /* */, Hexagon::V6_vL32b_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11125 | { 1 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11126 | { 1 /* */, Hexagon::V6_vL32Ub_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11127 | { 1 /* */, Hexagon::V6_vpackhb_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackhb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11128 | { 1 /* */, Hexagon::V6_vpackhub_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11129 | { 1 /* */, Hexagon::V6_vpackwh_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11130 | { 1 /* */, Hexagon::V6_vpackwuh_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11131 | { 1 /* */, Hexagon::V6_vroundhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundhb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11132 | { 1 /* */, Hexagon::V6_vroundhub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11133 | { 1 /* */, Hexagon::V6_vrounduhub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrounduhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11134 | { 1 /* */, Hexagon::V6_vrounduwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrounduwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11135 | { 1 /* */, Hexagon::V6_vroundwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11136 | { 1 /* */, Hexagon::V6_vroundwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11137 | { 1 /* */, Hexagon::V6_vsubbsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11138 | { 1 /* */, Hexagon::V6_vsubhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11139 | { 1 /* */, Hexagon::V6_vsububsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11140 | { 1 /* */, Hexagon::V6_vsubuhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11141 | { 1 /* */, Hexagon::V6_vsubuwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubuw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11142 | { 1 /* */, Hexagon::V6_vsubwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11143 | { 1 /* */, Hexagon::V6_vandnqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
| 11144 | { 1 /* */, Hexagon::C4_cmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 11145 | { 1 /* */, Hexagon::C4_cmplte, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 11146 | { 1 /* */, Hexagon::C4_cmplteu, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 11147 | { 1 /* */, Hexagon::C2_cmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11148 | { 1 /* */, Hexagon::C2_cmpgei, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11149 | { 1 /* */, Hexagon::C2_cmpgeui, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_geu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 11150 | { 1 /* */, Hexagon::C2_cmpgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11151 | { 1 /* */, Hexagon::C2_cmpgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11152 | { 1 /* */, Hexagon::A4_cmpbeqi, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 11153 | { 1 /* */, Hexagon::A4_cmpbgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11154 | { 1 /* */, Hexagon::A4_cmpbgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11155 | { 1 /* */, Hexagon::A4_cmpheqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11156 | { 1 /* */, Hexagon::A4_cmphgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11157 | { 1 /* */, Hexagon::A4_cmphgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11158 | { 1 /* */, Hexagon::A4_vcmpbeqi, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 11159 | { 1 /* */, Hexagon::A4_vcmpbgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11160 | { 1 /* */, Hexagon::A4_vcmpbgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
| 11161 | { 1 /* */, Hexagon::A4_vcmpheqi, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11162 | { 1 /* */, Hexagon::A4_vcmphgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11163 | { 1 /* */, Hexagon::A4_vcmphgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
| 11164 | { 1 /* */, Hexagon::A4_vcmpweqi, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11165 | { 1 /* */, Hexagon::A4_vcmpwgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11166 | { 1 /* */, Hexagon::A4_vcmpwgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
| 11167 | { 1 /* */, Hexagon::M2_cmacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11168 | { 1 /* */, Hexagon::M2_vcmac_s0_sat_i, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11169 | { 1 /* */, Hexagon::M2_vcmac_s0_sat_r, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11170 | { 1 /* */, Hexagon::M2_vdmacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11171 | { 1 /* */, Hexagon::M5_vdmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11172 | { 1 /* */, Hexagon::M2_vmac2es_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11173 | { 1 /* */, Hexagon::M2_vmac2s_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11174 | { 1 /* */, Hexagon::M2_vmac2su_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11175 | { 1 /* */, Hexagon::M2_mmacls_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11176 | { 1 /* */, Hexagon::M2_mmaculs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11177 | { 1 /* */, Hexagon::M2_mmachs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11178 | { 1 /* */, Hexagon::M2_mmacuhs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11179 | { 1 /* */, Hexagon::S4_vrcrotate_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11180 | { 1 /* */, Hexagon::M2_cnacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11181 | { 1 /* */, Hexagon::A4_addp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 11182 | { 1 /* */, Hexagon::S2_asr_i_p_rnd, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11183 | { 1 /* */, Hexagon::M2_cmpysc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11184 | { 1 /* */, Hexagon::S4_extractp, Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11185 | { 1 /* */, Hexagon::S2_extractup, Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11186 | { 1 /* */, Hexagon::S2_insertp, Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
| 11187 | { 1 /* */, Hexagon::L2_loadalignb_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11188 | { 1 /* */, Hexagon::L2_loadbsw4_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 11189 | { 1 /* */, Hexagon::L2_loadrd_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
| 11190 | { 1 /* */, Hexagon::L2_loadalignh_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 11191 | { 1 /* */, Hexagon::L2_loadbzw4_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 11192 | { 1 /* */, Hexagon::A4_subp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 11193 | { 1 /* */, Hexagon::S5_vasrhrnd, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11194 | { 1 /* */, Hexagon::S5_vasrhrnd_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11195 | { 1 /* */, Hexagon::V6_vmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11196 | { 1 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11197 | { 1 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11198 | { 1 /* */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11199 | { 1 /* */, Hexagon::V6_vsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11200 | { 1 /* */, Hexagon::V6_vunpackb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11201 | { 1 /* */, Hexagon::V6_vcvt_hf_b, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11202 | { 1 /* */, Hexagon::V6_vcvt_hf_f8, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11203 | { 1 /* */, Hexagon::V6_vcvt_hf_ub, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11204 | { 1 /* */, Hexagon::V6_vcvt2_hf_b, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt2, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11205 | { 1 /* */, Hexagon::V6_vcvt2_hf_ub, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt2, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11206 | { 1 /* */, Hexagon::V6_vcvt_sf_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11207 | { 1 /* */, Hexagon::V6_vunpackub, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11208 | { 1 /* */, Hexagon::V6_vzb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vzxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11209 | { 1 /* */, Hexagon::V6_vunpackuh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11210 | { 1 /* */, Hexagon::V6_vzh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vzxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11211 | { 1 /* */, Hexagon::V6_vsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11212 | { 1 /* */, Hexagon::V6_vunpackh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11213 | { 1 /* */, Hexagon::F2_sffma_lib, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
| 11214 | { 1 /* */, Hexagon::F2_sffms_lib, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
| 11215 | { 1 /* */, Hexagon::A4_rcmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 11216 | { 1 /* */, Hexagon::S2_asl_i_r_sat, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11217 | { 1 /* */, Hexagon::S2_asr_i_r_rnd, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11218 | { 1 /* */, Hexagon::A4_rcmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11219 | { 1 /* */, Hexagon::S4_extract, Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11220 | { 1 /* */, Hexagon::S2_extractu, Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11221 | { 1 /* */, Hexagon::S2_insert, Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11222 | { 1 /* */, Hexagon::L2_loadrb_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11223 | { 1 /* */, Hexagon::L2_loadbsw2_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 11224 | { 1 /* */, Hexagon::L2_loadrh_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 11225 | { 1 /* */, Hexagon::L2_loadrub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11226 | { 1 /* */, Hexagon::L2_loadbzw2_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 11227 | { 1 /* */, Hexagon::L2_loadruh_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 11228 | { 1 /* */, Hexagon::L2_loadri_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 11229 | { 1 /* */, Hexagon::C2_muxii, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
| 11230 | { 1 /* */, Hexagon::A4_round_ri_sat, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11231 | { 1 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11232 | { 1 /* */, Hexagon::S2_tableidxd_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11233 | { 1 /* */, Hexagon::S2_tableidxh_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11234 | { 1 /* */, Hexagon::S2_tableidxw_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 11235 | { 1 /* */, Hexagon::S5_asrhub_rnd_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11236 | { 1 /* */, Hexagon::S5_asrhub_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11237 | { 1 /* */, Hexagon::V6_vdmpyhisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11238 | { 1 /* */, Hexagon::V6_vdmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11239 | { 1 /* */, Hexagon::V6_vdmpyhvsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11240 | { 1 /* */, Hexagon::V6_vdmpyhsusat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11241 | { 1 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11242 | { 1 /* */, Hexagon::V6_vdealb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11243 | { 1 /* */, Hexagon::V6_vshuffb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11244 | { 1 /* */, Hexagon::V6_vabs_f8, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11245 | { 1 /* */, Hexagon::V6_vfneg_f8, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__61_, MCK_vfneg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11246 | { 1 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11247 | { 1 /* */, Hexagon::V6_vcvt_h_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11248 | { 1 /* */, Hexagon::V6_vdealh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11249 | { 1 /* */, Hexagon::V6_vnormamth, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vnormamt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11250 | { 1 /* */, Hexagon::V6_vpopcounth, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpopcount, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11251 | { 1 /* */, Hexagon::V6_vshuffh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11252 | { 1 /* */, Hexagon::V6_vabs_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11253 | { 1 /* */, Hexagon::V6_vcvt_hf_h, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11254 | { 1 /* */, Hexagon::V6_vcvt_hf_uh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11255 | { 1 /* */, Hexagon::V6_vfneg_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfneg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11256 | { 1 /* */, Hexagon::V6_vabs_sf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11257 | { 1 /* */, Hexagon::V6_vfneg_sf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfneg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11258 | { 1 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11259 | { 1 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11260 | { 1 /* */, Hexagon::V6_vcl0h, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vcl0, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11261 | { 1 /* */, Hexagon::V6_vcvt_uh_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11262 | { 1 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11263 | { 1 /* */, Hexagon::V6_vcl0w, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vcl0, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11264 | { 1 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11265 | { 1 /* */, Hexagon::V6_vassign_fp, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vfmv, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11266 | { 1 /* */, Hexagon::V6_vnormamtw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vnormamt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11267 | { 1 /* */, Hexagon::V6_vL32b_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 11268 | { 1 /* */, Hexagon::V6_vL32Ub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 11269 | { 1 /* */, Hexagon::V6_get_qfext_oracc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__124_, MCK__61_, MCK_vgetqfext, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_x, MCK_IntRegs, MCK__41_ }, }, |
| 11270 | { 1 /* */, Hexagon::C4_cmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11271 | { 1 /* */, Hexagon::C4_cmpltei, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11272 | { 1 /* */, Hexagon::C4_cmplteui, Convert__Reg1_0__Reg1_7__u32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11273 | { 1 /* */, Hexagon::C4_and_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11274 | { 1 /* */, Hexagon::C4_and_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11275 | { 1 /* */, Hexagon::A4_boundscheck_hi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
| 11276 | { 1 /* */, Hexagon::A4_boundscheck_lo, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
| 11277 | { 1 /* */, Hexagon::C4_or_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11278 | { 1 /* */, Hexagon::C4_or_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11279 | { 1 /* */, Hexagon::M2_cmacsc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11280 | { 1 /* */, Hexagon::M2_cnacsc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11281 | { 1 /* */, Hexagon::A2_addsph, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
| 11282 | { 1 /* */, Hexagon::A2_addspl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
| 11283 | { 1 /* */, Hexagon::L2_loadalignb_pbr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11284 | { 1 /* */, Hexagon::L2_loadbsw4_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11285 | { 1 /* */, Hexagon::L2_loadrd_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11286 | { 1 /* */, Hexagon::L2_loadalignh_pbr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11287 | { 1 /* */, Hexagon::L2_loadbzw4_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11288 | { 1 /* */, Hexagon::M2_mpyd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11289 | { 1 /* */, Hexagon::M2_mpyd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11290 | { 1 /* */, Hexagon::M2_mpyd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11291 | { 1 /* */, Hexagon::M2_mpyd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11292 | { 1 /* */, Hexagon::M2_mpyud_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11293 | { 1 /* */, Hexagon::M2_mpyud_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11294 | { 1 /* */, Hexagon::M2_mpyud_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11295 | { 1 /* */, Hexagon::M2_mpyud_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11296 | { 1 /* */, Hexagon::M2_mmpyl_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11297 | { 1 /* */, Hexagon::M2_mmpyul_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11298 | { 1 /* */, Hexagon::M2_mmpyh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11299 | { 1 /* */, Hexagon::M2_mmpyuh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11300 | { 1 /* */, Hexagon::A2_vnavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
| 11301 | { 1 /* */, Hexagon::A2_vnavghr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11302 | { 1 /* */, Hexagon::A2_vnavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
| 11303 | { 1 /* */, Hexagon::A2_vnavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11304 | { 1 /* */, Hexagon::M4_vrmpyeh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11305 | { 1 /* */, Hexagon::M4_vrmpyoh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11306 | { 1 /* */, Hexagon::V6_vunpackob, Convert__Reg1_0__Tie0_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11307 | { 1 /* */, Hexagon::V6_vunpackoh, Convert__Reg1_0__Tie0_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11308 | { 1 /* */, Hexagon::V6_vmpyewuh_64, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11309 | { 1 /* */, Hexagon::F2_sffma_sc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_scale }, }, |
| 11310 | { 1 /* */, Hexagon::A4_rcmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 11311 | { 1 /* */, Hexagon::S4_clbpaddi, Convert__Reg1_0__Reg1_6__s6_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__HASH_, MCK_s6_0Imm, MCK__41_ }, }, |
| 11312 | { 1 /* */, Hexagon::S4_clbaddi, Convert__Reg1_0__Reg1_6__s6_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__HASH_, MCK_s6_0Imm, MCK__41_ }, }, |
| 11313 | { 1 /* */, Hexagon::A2_addh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11314 | { 1 /* */, Hexagon::A2_addh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11315 | { 1 /* */, Hexagon::M4_mpyrr_addr, Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
| 11316 | { 1 /* */, Hexagon::dep_A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
| 11317 | { 1 /* */, Hexagon::M2_cmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11318 | { 1 /* */, Hexagon::A2_combine_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11319 | { 1 /* */, Hexagon::A2_combine_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11320 | { 1 /* */, Hexagon::A2_combine_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11321 | { 1 /* */, Hexagon::A2_combine_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11322 | { 1 /* */, Hexagon::L2_loadrb_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11323 | { 1 /* */, Hexagon::L2_loadbsw2_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11324 | { 1 /* */, Hexagon::L2_loadrh_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11325 | { 1 /* */, Hexagon::L2_loadrub_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11326 | { 1 /* */, Hexagon::L2_loadbzw2_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11327 | { 1 /* */, Hexagon::L2_loadruh_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11328 | { 1 /* */, Hexagon::L2_loadri_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
| 11329 | { 1 /* */, Hexagon::M2_mpy_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11330 | { 1 /* */, Hexagon::M2_mpy_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11331 | { 1 /* */, Hexagon::M2_mpy_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11332 | { 1 /* */, Hexagon::M2_mpy_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11333 | { 1 /* */, Hexagon::M2_mpy_up_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11334 | { 1 /* */, Hexagon::M2_mpyu_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11335 | { 1 /* */, Hexagon::M2_mpyu_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11336 | { 1 /* */, Hexagon::M2_mpyu_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11337 | { 1 /* */, Hexagon::M2_mpyu_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11338 | { 1 /* */, Hexagon::A2_subh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11339 | { 1 /* */, Hexagon::A2_subh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11340 | { 1 /* */, Hexagon::dep_A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
| 11341 | { 1 /* */, Hexagon::M2_vdmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11342 | { 1 /* */, Hexagon::M2_vmpy2s_s0pack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11343 | { 1 /* */, Hexagon::V6_vL32b_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11344 | { 1 /* */, Hexagon::V6_vL32b_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11345 | { 1 /* */, Hexagon::V6_vaslh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
| 11346 | { 1 /* */, Hexagon::V6_vasrh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
| 11347 | { 1 /* */, Hexagon::V6_vL32b_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 11348 | { 1 /* */, Hexagon::V6_vL32b_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 11349 | { 1 /* */, Hexagon::V6_vlsrb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__41_ }, }, |
| 11350 | { 1 /* */, Hexagon::V6_vlsrh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__41_ }, }, |
| 11351 | { 1 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegs, MCK__41_ }, }, |
| 11352 | { 1 /* */, Hexagon::V6_vaslw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
| 11353 | { 1 /* */, Hexagon::V6_vasrw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
| 11354 | { 1 /* */, Hexagon::V6_vdmpyhsuisat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11355 | { 1 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11356 | { 1 /* */, Hexagon::V6_vL32b_nt_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11357 | { 1 /* */, Hexagon::V6_vmerge_qf, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__61_, MCK_vmerge, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_x, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11358 | { 1 /* */, Hexagon::C4_and_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11359 | { 1 /* */, Hexagon::C4_and_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11360 | { 1 /* */, Hexagon::A4_vcmpbeq_any, Convert__Reg1_0__Reg1_8__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__41_ }, }, |
| 11361 | { 1 /* */, Hexagon::C4_or_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11362 | { 1 /* */, Hexagon::C4_or_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
| 11363 | { 1 /* */, Hexagon::M2_mpyd_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11364 | { 1 /* */, Hexagon::M2_mpyd_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11365 | { 1 /* */, Hexagon::M2_mpyd_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11366 | { 1 /* */, Hexagon::M2_mpyd_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11367 | { 1 /* */, Hexagon::M2_mpyud_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11368 | { 1 /* */, Hexagon::M2_mpyud_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11369 | { 1 /* */, Hexagon::M2_mpyud_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11370 | { 1 /* */, Hexagon::M2_mpyud_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11371 | { 1 /* */, Hexagon::M2_mmacls_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11372 | { 1 /* */, Hexagon::M2_mmaculs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11373 | { 1 /* */, Hexagon::M2_mmachs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11374 | { 1 /* */, Hexagon::M2_mmacuhs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11375 | { 1 /* */, Hexagon::M4_vrmpyeh_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11376 | { 1 /* */, Hexagon::M4_vrmpyoh_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11377 | { 1 /* */, Hexagon::M2_mpyd_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11378 | { 1 /* */, Hexagon::M2_mpyd_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11379 | { 1 /* */, Hexagon::M2_mpyd_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11380 | { 1 /* */, Hexagon::M2_mpyd_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11381 | { 1 /* */, Hexagon::M2_mpyud_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11382 | { 1 /* */, Hexagon::M2_mpyud_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11383 | { 1 /* */, Hexagon::M2_mpyud_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11384 | { 1 /* */, Hexagon::M2_mpyud_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11385 | { 1 /* */, Hexagon::L4_loadrd_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11386 | { 1 /* */, Hexagon::V6_vmpyowh_64_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11387 | { 1 /* */, Hexagon::M2_mpy_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11388 | { 1 /* */, Hexagon::M2_mpy_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11389 | { 1 /* */, Hexagon::M2_mpy_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11390 | { 1 /* */, Hexagon::M2_mpy_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11391 | { 1 /* */, Hexagon::M2_mpyu_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11392 | { 1 /* */, Hexagon::M2_mpyu_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11393 | { 1 /* */, Hexagon::M2_mpyu_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11394 | { 1 /* */, Hexagon::M2_mpyu_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11395 | { 1 /* */, Hexagon::M2_mpy_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11396 | { 1 /* */, Hexagon::M2_mpy_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11397 | { 1 /* */, Hexagon::M2_mpy_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11398 | { 1 /* */, Hexagon::M2_mpy_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11399 | { 1 /* */, Hexagon::M2_mpyu_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11400 | { 1 /* */, Hexagon::M2_mpyu_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11401 | { 1 /* */, Hexagon::M2_mpyu_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11402 | { 1 /* */, Hexagon::M2_mpyu_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
| 11403 | { 1 /* */, Hexagon::M4_mpyrr_addi, Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
| 11404 | { 1 /* */, Hexagon::S4_addaddi, Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, }, |
| 11405 | { 1 /* */, Hexagon::M4_mpyri_addr_u2, Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK__HASH_, MCK_u6_2Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
| 11406 | { 1 /* */, Hexagon::M4_mpyri_addr, Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__41_ }, }, |
| 11407 | { 1 /* */, Hexagon::S4_subaddi, Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
| 11408 | { 1 /* */, Hexagon::M2_cmpyrsc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11409 | { 1 /* */, Hexagon::L4_loadrb_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11410 | { 1 /* */, Hexagon::L4_loadrh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11411 | { 1 /* */, Hexagon::L4_loadrub_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11412 | { 1 /* */, Hexagon::L4_loadruh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11413 | { 1 /* */, Hexagon::L4_loadri_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 11414 | { 1 /* */, Hexagon::S4_or_andix, Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, }, |
| 11415 | { 1 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11416 | { 1 /* */, Hexagon::S2_tableidxd, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11417 | { 1 /* */, Hexagon::S2_tableidxh, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11418 | { 1 /* */, Hexagon::S2_tableidxw, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 11419 | { 1 /* */, Hexagon::S5_asrhub_rnd_sat_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11420 | { 1 /* */, Hexagon::V6_vdmpyhsuisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11421 | { 1 /* */, Hexagon::V6_vabsb_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11422 | { 1 /* */, Hexagon::V6_vL32b_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 11423 | { 1 /* */, Hexagon::V6_vaslh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
| 11424 | { 1 /* */, Hexagon::V6_vasrh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
| 11425 | { 1 /* */, Hexagon::V6_vabsh_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11426 | { 1 /* */, Hexagon::V6_vL32b_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 11427 | { 1 /* */, Hexagon::V6_vaslw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
| 11428 | { 1 /* */, Hexagon::V6_vasrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
| 11429 | { 1 /* */, Hexagon::V6_vabsw_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11430 | { 1 /* */, Hexagon::V6_vL32b_nt_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11431 | { 1 /* */, Hexagon::V6_shuffeqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11432 | { 1 /* */, Hexagon::V6_shuffeqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11433 | { 1 /* */, Hexagon::V6_vandvrt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11434 | { 1 /* */, Hexagon::V6_veqb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11435 | { 1 /* */, Hexagon::V6_veqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11436 | { 1 /* */, Hexagon::V6_veqb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11437 | { 1 /* */, Hexagon::V6_veqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11438 | { 1 /* */, Hexagon::V6_veqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11439 | { 1 /* */, Hexagon::V6_veqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11440 | { 1 /* */, Hexagon::V6_vgtb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11441 | { 1 /* */, Hexagon::V6_vgtbf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11442 | { 1 /* */, Hexagon::V6_vgth, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11443 | { 1 /* */, Hexagon::V6_vgthf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11444 | { 1 /* */, Hexagon::V6_vgtsf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11445 | { 1 /* */, Hexagon::V6_vgtub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11446 | { 1 /* */, Hexagon::V6_vgtuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11447 | { 1 /* */, Hexagon::V6_vgtuw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11448 | { 1 /* */, Hexagon::V6_vgtw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11449 | { 1 /* */, Hexagon::A6_vcmpbeq_notany, Convert__Reg1_0__Reg1_9__Reg1_10, AMFBS_HasV65, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_any8, MCK__40_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__41_ }, }, |
| 11450 | { 1 /* */, Hexagon::V6_vrmpyzcb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11451 | { 1 /* */, Hexagon::V6_vrmpyzcbs_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11452 | { 1 /* */, Hexagon::V6_vrmpyznb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11453 | { 1 /* */, Hexagon::V6_vrmpyzbb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11454 | { 1 /* */, Hexagon::V6_vrmpyzbub_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11455 | { 1 /* */, Hexagon::M2_cmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11456 | { 1 /* */, Hexagon::L4_loadalignb_ur, Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11457 | { 1 /* */, Hexagon::L4_loadbsw4_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11458 | { 1 /* */, Hexagon::L4_loadrd_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11459 | { 1 /* */, Hexagon::L4_loadalignh_ur, Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11460 | { 1 /* */, Hexagon::L4_loadbzw4_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11461 | { 1 /* */, Hexagon::M2_mpyd_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11462 | { 1 /* */, Hexagon::M2_mpyd_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11463 | { 1 /* */, Hexagon::M2_mpyd_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11464 | { 1 /* */, Hexagon::M2_mpyd_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11465 | { 1 /* */, Hexagon::M2_vcmpy_s1_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11466 | { 1 /* */, Hexagon::M2_vcmpy_s1_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11467 | { 1 /* */, Hexagon::M2_vdmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11468 | { 1 /* */, Hexagon::M2_vmpy2es_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11469 | { 1 /* */, Hexagon::M2_vmpy2s_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11470 | { 1 /* */, Hexagon::M2_vmpy2su_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11471 | { 1 /* */, Hexagon::M2_mmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11472 | { 1 /* */, Hexagon::M2_mmpyul_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11473 | { 1 /* */, Hexagon::M2_mmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11474 | { 1 /* */, Hexagon::M2_mmpyuh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11475 | { 1 /* */, Hexagon::M2_vrcmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11476 | { 1 /* */, Hexagon::V6_vaddb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11477 | { 1 /* */, Hexagon::V6_vshufoeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11478 | { 1 /* */, Hexagon::V6_vsubb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11479 | { 1 /* */, Hexagon::V6_vaddh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11480 | { 1 /* */, Hexagon::V6_vaddubh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11481 | { 1 /* */, Hexagon::V6_vdmpybus_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11482 | { 1 /* */, Hexagon::V6_vmpabusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11483 | { 1 /* */, Hexagon::V6_vmpabuuv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11484 | { 1 /* */, Hexagon::V6_vmpabus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11485 | { 1 /* */, Hexagon::V6_vmpabuu, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11486 | { 1 /* */, Hexagon::V6_vmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11487 | { 1 /* */, Hexagon::V6_vmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11488 | { 1 /* */, Hexagon::V6_vmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11489 | { 1 /* */, Hexagon::V6_vshufoeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11490 | { 1 /* */, Hexagon::V6_vsubh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11491 | { 1 /* */, Hexagon::V6_vsububh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11492 | { 1 /* */, Hexagon::V6_vtmpyb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11493 | { 1 /* */, Hexagon::V6_vtmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11494 | { 1 /* */, Hexagon::V6_vadd_hf_f8, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11495 | { 1 /* */, Hexagon::V6_vmpy_hf_f8, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11496 | { 1 /* */, Hexagon::V6_vsub_hf_f8, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11497 | { 1 /* */, Hexagon::V6_vmpy_qf32_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11498 | { 1 /* */, Hexagon::V6_vmpy_qf32_mix_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11499 | { 1 /* */, Hexagon::V6_vmpy_qf32_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
| 11500 | { 1 /* */, Hexagon::V6_vadd_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11501 | { 1 /* */, Hexagon::V6_vadd_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11502 | { 1 /* */, Hexagon::V6_vmpy_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11503 | { 1 /* */, Hexagon::V6_vmpy_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11504 | { 1 /* */, Hexagon::V6_vsub_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11505 | { 1 /* */, Hexagon::V6_vsub_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11506 | { 1 /* */, Hexagon::V6_vmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11507 | { 1 /* */, Hexagon::V6_vmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11508 | { 1 /* */, Hexagon::V6_vdsaduh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vdsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11509 | { 1 /* */, Hexagon::V6_vmpyuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11510 | { 1 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11511 | { 1 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11512 | { 1 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11513 | { 1 /* */, Hexagon::V6_vaddw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11514 | { 1 /* */, Hexagon::V6_vaddhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11515 | { 1 /* */, Hexagon::V6_vadduhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11516 | { 1 /* */, Hexagon::V6_vasr_into, Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasrinto, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11517 | { 1 /* */, Hexagon::V6_vdmpyhb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11518 | { 1 /* */, Hexagon::V6_vmpahb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11519 | { 1 /* */, Hexagon::V6_vmpauhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11520 | { 1 /* */, Hexagon::V6_vmpyh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11521 | { 1 /* */, Hexagon::V6_vmpyhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11522 | { 1 /* */, Hexagon::V6_vmpyhus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11523 | { 1 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11524 | { 1 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11525 | { 1 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11526 | { 1 /* */, Hexagon::V6_vsubhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11527 | { 1 /* */, Hexagon::V6_vsubuhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11528 | { 1 /* */, Hexagon::V6_vtmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11529 | { 1 /* */, Hexagon::S4_addi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11530 | { 1 /* */, Hexagon::S4_addi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11531 | { 1 /* */, Hexagon::M4_mpyri_addi, Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__41_ }, }, |
| 11532 | { 1 /* */, Hexagon::A2_addh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11533 | { 1 /* */, Hexagon::A2_addh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11534 | { 1 /* */, Hexagon::S4_andi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11535 | { 1 /* */, Hexagon::S4_andi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11536 | { 1 /* */, Hexagon::M7_wcmpyiw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11537 | { 1 /* */, Hexagon::M7_wcmpyrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11538 | { 1 /* */, Hexagon::L4_loadrb_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11539 | { 1 /* */, Hexagon::L4_loadbsw2_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11540 | { 1 /* */, Hexagon::L4_loadrh_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11541 | { 1 /* */, Hexagon::L4_loadrub_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11542 | { 1 /* */, Hexagon::L4_loadbzw2_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11543 | { 1 /* */, Hexagon::L4_loadruh_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11544 | { 1 /* */, Hexagon::L4_loadri_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 11545 | { 1 /* */, Hexagon::M2_mpy_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11546 | { 1 /* */, Hexagon::M2_mpy_sat_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11547 | { 1 /* */, Hexagon::M2_mpy_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11548 | { 1 /* */, Hexagon::M2_mpy_sat_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11549 | { 1 /* */, Hexagon::M2_mpy_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11550 | { 1 /* */, Hexagon::M2_mpy_sat_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11551 | { 1 /* */, Hexagon::M2_mpy_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11552 | { 1 /* */, Hexagon::M2_mpy_sat_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11553 | { 1 /* */, Hexagon::M2_mpy_up_s1_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11554 | { 1 /* */, Hexagon::S4_ori_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11555 | { 1 /* */, Hexagon::S4_ori_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11556 | { 1 /* */, Hexagon::S4_subi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11557 | { 1 /* */, Hexagon::S4_subi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
| 11558 | { 1 /* */, Hexagon::A2_subh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11559 | { 1 /* */, Hexagon::A2_subh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11560 | { 1 /* */, Hexagon::V6_vaddb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11561 | { 1 /* */, Hexagon::V6_vavgb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11562 | { 1 /* */, Hexagon::V6_vcvt_b_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11563 | { 1 /* */, Hexagon::V6_vcvt2_b_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vcvt2, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11564 | { 1 /* */, Hexagon::V6_vdealb4w, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeale, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11565 | { 1 /* */, Hexagon::V6_vmaxb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11566 | { 1 /* */, Hexagon::V6_vminb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11567 | { 1 /* */, Hexagon::V6_vnavgb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11568 | { 1 /* */, Hexagon::V6_vnavgub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11569 | { 1 /* */, Hexagon::V6_vpackeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacke, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11570 | { 1 /* */, Hexagon::V6_vpackob, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11571 | { 1 /* */, Hexagon::V6_vshuffeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11572 | { 1 /* */, Hexagon::V6_vshuffob, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11573 | { 1 /* */, Hexagon::V6_vsubb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11574 | { 1 /* */, Hexagon::V6_vcvt_bf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11575 | { 1 /* */, Hexagon::V6_vmax_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11576 | { 1 /* */, Hexagon::V6_vmin_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11577 | { 1 /* */, Hexagon::V6_vL32b_nt_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11578 | { 1 /* */, Hexagon::V6_vL32b_nt_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11579 | { 1 /* */, Hexagon::V6_vcvt_f8_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11580 | { 1 /* */, Hexagon::V6_vfmax_f8, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__61_, MCK_vfmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11581 | { 1 /* */, Hexagon::V6_vfmin_f8, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__61_, MCK_vfmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11582 | { 1 /* */, Hexagon::V6_vaddh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11583 | { 1 /* */, Hexagon::V6_vaslhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11584 | { 1 /* */, Hexagon::V6_vasrhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11585 | { 1 /* */, Hexagon::V6_vavgh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11586 | { 1 /* */, Hexagon::V6_vdmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11587 | { 1 /* */, Hexagon::V6_vlsrhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11588 | { 1 /* */, Hexagon::V6_vlut4, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut4, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11589 | { 1 /* */, Hexagon::V6_vmaxh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11590 | { 1 /* */, Hexagon::V6_vminh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11591 | { 1 /* */, Hexagon::V6_vmpyihb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11592 | { 1 /* */, Hexagon::V6_vmpyih, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11593 | { 1 /* */, Hexagon::V6_vnavgh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11594 | { 1 /* */, Hexagon::V6_vpackeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacke, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11595 | { 1 /* */, Hexagon::V6_vpackoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11596 | { 1 /* */, Hexagon::V6_vsatwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11597 | { 1 /* */, Hexagon::V6_vshufeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11598 | { 1 /* */, Hexagon::V6_vshufoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11599 | { 1 /* */, Hexagon::V6_vsubh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11600 | { 1 /* */, Hexagon::V6_vadd_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11601 | { 1 /* */, Hexagon::V6_vcvt_hf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11602 | { 1 /* */, Hexagon::V6_vfmax_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11603 | { 1 /* */, Hexagon::V6_vfmin_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11604 | { 1 /* */, Hexagon::V6_vmax_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11605 | { 1 /* */, Hexagon::V6_vmin_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11606 | { 1 /* */, Hexagon::V6_vmpy_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11607 | { 1 /* */, Hexagon::V6_vsub_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11608 | { 1 /* */, Hexagon::V6_vadd_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11609 | { 1 /* */, Hexagon::V6_vadd_qf16_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11610 | { 1 /* */, Hexagon::V6_vadd_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
| 11611 | { 1 /* */, Hexagon::V6_vmpy_rt_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_IntRegs, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11612 | { 1 /* */, Hexagon::V6_vmpy_qf16_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11613 | { 1 /* */, Hexagon::V6_vmpy_rt_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_IntRegs, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11614 | { 1 /* */, Hexagon::V6_vmpy_qf16_mix_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11615 | { 1 /* */, Hexagon::V6_vmpy_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
| 11616 | { 1 /* */, Hexagon::V6_vsub_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11617 | { 1 /* */, Hexagon::V6_vsub_qf16_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11618 | { 1 /* */, Hexagon::V6_vsub_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
| 11619 | { 1 /* */, Hexagon::V6_vadd_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
| 11620 | { 1 /* */, Hexagon::V6_vadd_qf32_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11621 | { 1 /* */, Hexagon::V6_vadd_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11622 | { 1 /* */, Hexagon::V6_vmpy_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
| 11623 | { 1 /* */, Hexagon::V6_vmpy_rt_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_IntRegs, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11624 | { 1 /* */, Hexagon::V6_vmpy_qf32_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11625 | { 1 /* */, Hexagon::V6_vsub_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
| 11626 | { 1 /* */, Hexagon::V6_vsub_qf32_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11627 | { 1 /* */, Hexagon::V6_vsub_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11628 | { 1 /* */, Hexagon::V6_vadd_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11629 | { 1 /* */, Hexagon::V6_vdmpy_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11630 | { 1 /* */, Hexagon::V6_vfmax_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11631 | { 1 /* */, Hexagon::V6_vfmin_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11632 | { 1 /* */, Hexagon::V6_vmax_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11633 | { 1 /* */, Hexagon::V6_vmin_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11634 | { 1 /* */, Hexagon::V6_vmpy_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11635 | { 1 /* */, Hexagon::V6_vsub_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11636 | { 1 /* */, Hexagon::V6_vL32b_nt_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11637 | { 1 /* */, Hexagon::V6_vL32b_nt_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11638 | { 1 /* */, Hexagon::V6_vabsdiffub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11639 | { 1 /* */, Hexagon::V6_vandqrt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11640 | { 1 /* */, Hexagon::V6_vavgub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11641 | { 1 /* */, Hexagon::V6_vcvt_ub_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11642 | { 1 /* */, Hexagon::V6_vcvt2_ub_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vcvt2, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11643 | { 1 /* */, Hexagon::V6_vmaxub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11644 | { 1 /* */, Hexagon::V6_vminub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11645 | { 1 /* */, Hexagon::V6_vsathub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11646 | { 1 /* */, Hexagon::V6_vabsdiffh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11647 | { 1 /* */, Hexagon::V6_vabsdiffuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11648 | { 1 /* */, Hexagon::V6_vavguh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11649 | { 1 /* */, Hexagon::V6_vmaxuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11650 | { 1 /* */, Hexagon::V6_vminuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11651 | { 1 /* */, Hexagon::V6_vsatuwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11652 | { 1 /* */, Hexagon::V6_vabsdiffw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11653 | { 1 /* */, Hexagon::V6_vavguw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11654 | { 1 /* */, Hexagon::V6_vmpyuhe, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11655 | { 1 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11656 | { 1 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11657 | { 1 /* */, Hexagon::V6_vrotr, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrotr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11658 | { 1 /* */, Hexagon::V6_vaddw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11659 | { 1 /* */, Hexagon::V6_vaslwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11660 | { 1 /* */, Hexagon::V6_vasrwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11661 | { 1 /* */, Hexagon::V6_vavgw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11662 | { 1 /* */, Hexagon::V6_vdmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11663 | { 1 /* */, Hexagon::V6_vlsrwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11664 | { 1 /* */, Hexagon::V6_vmaxw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11665 | { 1 /* */, Hexagon::V6_vminw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11666 | { 1 /* */, Hexagon::V6_vmpyewuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11667 | { 1 /* */, Hexagon::V6_vmpyiwb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11668 | { 1 /* */, Hexagon::V6_vmpyiwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11669 | { 1 /* */, Hexagon::V6_vmpyiwub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11670 | { 1 /* */, Hexagon::V6_vmpyiewuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11671 | { 1 /* */, Hexagon::V6_vmpyieoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyieo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11672 | { 1 /* */, Hexagon::V6_vmpyiowh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyio, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11673 | { 1 /* */, Hexagon::V6_vnavgw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11674 | { 1 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11675 | { 1 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11676 | { 1 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11677 | { 1 /* */, Hexagon::V6_vsatdw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsatdw, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11678 | { 1 /* */, Hexagon::V6_vsubw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11679 | { 1 /* */, Hexagon::V6_vmpyhss, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11680 | { 1 /* */, Hexagon::V6_vmpyowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11681 | { 1 /* */, Hexagon::V6_veqb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11682 | { 1 /* */, Hexagon::V6_veqh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11683 | { 1 /* */, Hexagon::V6_veqb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11684 | { 1 /* */, Hexagon::V6_veqh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11685 | { 1 /* */, Hexagon::V6_veqw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11686 | { 1 /* */, Hexagon::V6_veqw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11687 | { 1 /* */, Hexagon::V6_vgtb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11688 | { 1 /* */, Hexagon::V6_vgtbf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11689 | { 1 /* */, Hexagon::V6_vgth_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11690 | { 1 /* */, Hexagon::V6_vgthf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11691 | { 1 /* */, Hexagon::V6_vgtsf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11692 | { 1 /* */, Hexagon::V6_vgtub_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11693 | { 1 /* */, Hexagon::V6_vgtuh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11694 | { 1 /* */, Hexagon::V6_vgtuw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11695 | { 1 /* */, Hexagon::V6_vgtw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11696 | { 1 /* */, Hexagon::V6_vandvrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11697 | { 1 /* */, Hexagon::V6_veqb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11698 | { 1 /* */, Hexagon::V6_veqh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11699 | { 1 /* */, Hexagon::V6_veqb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11700 | { 1 /* */, Hexagon::V6_veqh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11701 | { 1 /* */, Hexagon::V6_veqw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11702 | { 1 /* */, Hexagon::V6_veqw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11703 | { 1 /* */, Hexagon::V6_vgtb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11704 | { 1 /* */, Hexagon::V6_vgtbf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11705 | { 1 /* */, Hexagon::V6_vgth_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11706 | { 1 /* */, Hexagon::V6_vgthf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11707 | { 1 /* */, Hexagon::V6_vgtsf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11708 | { 1 /* */, Hexagon::V6_vgtub_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11709 | { 1 /* */, Hexagon::V6_vgtuh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11710 | { 1 /* */, Hexagon::V6_vgtuw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11711 | { 1 /* */, Hexagon::V6_vgtw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11712 | { 1 /* */, Hexagon::V6_veqb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11713 | { 1 /* */, Hexagon::V6_veqh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11714 | { 1 /* */, Hexagon::V6_veqb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11715 | { 1 /* */, Hexagon::V6_veqh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11716 | { 1 /* */, Hexagon::V6_veqw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11717 | { 1 /* */, Hexagon::V6_veqw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11718 | { 1 /* */, Hexagon::V6_vgtb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11719 | { 1 /* */, Hexagon::V6_vgtbf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11720 | { 1 /* */, Hexagon::V6_vgth_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11721 | { 1 /* */, Hexagon::V6_vgthf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11722 | { 1 /* */, Hexagon::V6_vgtsf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
| 11723 | { 1 /* */, Hexagon::V6_vgtub_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11724 | { 1 /* */, Hexagon::V6_vgtuh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11725 | { 1 /* */, Hexagon::V6_vgtuw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
| 11726 | { 1 /* */, Hexagon::V6_vgtw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 11727 | { 1 /* */, Hexagon::V6_vrmpyzcb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11728 | { 1 /* */, Hexagon::V6_vrmpyzcbs_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11729 | { 1 /* */, Hexagon::V6_vrmpyznb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11730 | { 1 /* */, Hexagon::V6_vrmpyzbb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11731 | { 1 /* */, Hexagon::V6_vrmpyzbub_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11732 | { 1 /* */, Hexagon::M2_cmacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11733 | { 1 /* */, Hexagon::M2_vdmacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11734 | { 1 /* */, Hexagon::M2_vmac2es_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11735 | { 1 /* */, Hexagon::M2_vmac2s_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11736 | { 1 /* */, Hexagon::M2_vmac2su_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11737 | { 1 /* */, Hexagon::M2_mmacls_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11738 | { 1 /* */, Hexagon::M2_mmaculs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11739 | { 1 /* */, Hexagon::M2_mmachs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11740 | { 1 /* */, Hexagon::M2_mmacuhs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11741 | { 1 /* */, Hexagon::M2_vrcmpys_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11742 | { 1 /* */, Hexagon::M2_cnacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11743 | { 1 /* */, Hexagon::M2_cmpysc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11744 | { 1 /* */, Hexagon::L2_loadalignb_pcr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11745 | { 1 /* */, Hexagon::L2_loadbsw4_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11746 | { 1 /* */, Hexagon::L2_loadrd_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11747 | { 1 /* */, Hexagon::L2_loadalignh_pcr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11748 | { 1 /* */, Hexagon::L2_loadbzw4_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11749 | { 1 /* */, Hexagon::V6_vaddubh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11750 | { 1 /* */, Hexagon::V6_vdmpybus_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11751 | { 1 /* */, Hexagon::V6_vmpabus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11752 | { 1 /* */, Hexagon::V6_vmpabuu_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11753 | { 1 /* */, Hexagon::V6_vmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11754 | { 1 /* */, Hexagon::V6_vmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11755 | { 1 /* */, Hexagon::V6_vmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11756 | { 1 /* */, Hexagon::V6_vtmpyb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11757 | { 1 /* */, Hexagon::V6_vtmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11758 | { 1 /* */, Hexagon::V6_vlutvwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
| 11759 | { 1 /* */, Hexagon::V6_vmpy_hf_f8_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV79_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK_HvxVR, MCK__DOT_, MCK_f8, MCK__41_ }, }, |
| 11760 | { 1 /* */, Hexagon::V6_vmpy_sf_bf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
| 11761 | { 1 /* */, Hexagon::V6_vmpy_sf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11762 | { 1 /* */, Hexagon::V6_vmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11763 | { 1 /* */, Hexagon::V6_vmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11764 | { 1 /* */, Hexagon::V6_vdsaduh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vdsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11765 | { 1 /* */, Hexagon::V6_vmpyuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11766 | { 1 /* */, Hexagon::V6_vmpyuhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11767 | { 1 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11768 | { 1 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11769 | { 1 /* */, Hexagon::V6_vaddhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11770 | { 1 /* */, Hexagon::V6_vadduhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11771 | { 1 /* */, Hexagon::V6_vdmpyhb_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11772 | { 1 /* */, Hexagon::V6_vmpahb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11773 | { 1 /* */, Hexagon::V6_vmpauhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11774 | { 1 /* */, Hexagon::V6_vmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11775 | { 1 /* */, Hexagon::V6_vmpyhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11776 | { 1 /* */, Hexagon::V6_vmpyhus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11777 | { 1 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11778 | { 1 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11779 | { 1 /* */, Hexagon::V6_vtmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11780 | { 1 /* */, Hexagon::M2_mpy_acc_sat_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11781 | { 1 /* */, Hexagon::M2_mpy_acc_sat_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11782 | { 1 /* */, Hexagon::M2_mpy_acc_sat_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11783 | { 1 /* */, Hexagon::M2_mpy_acc_sat_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11784 | { 1 /* */, Hexagon::M4_mac_up_s1_sat, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11785 | { 1 /* */, Hexagon::M2_mpy_nac_sat_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11786 | { 1 /* */, Hexagon::M2_mpy_nac_sat_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11787 | { 1 /* */, Hexagon::M2_mpy_nac_sat_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11788 | { 1 /* */, Hexagon::M2_mpy_nac_sat_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11789 | { 1 /* */, Hexagon::M4_nac_up_s1_sat, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11790 | { 1 /* */, Hexagon::M7_wcmpyiwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11791 | { 1 /* */, Hexagon::M7_wcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11792 | { 1 /* */, Hexagon::L2_loadrb_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11793 | { 1 /* */, Hexagon::L2_loadbsw2_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11794 | { 1 /* */, Hexagon::L2_loadrh_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11795 | { 1 /* */, Hexagon::L2_loadrub_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11796 | { 1 /* */, Hexagon::L2_loadbzw2_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11797 | { 1 /* */, Hexagon::L2_loadruh_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11798 | { 1 /* */, Hexagon::L2_loadri_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11799 | { 1 /* */, Hexagon::V6_vlutvvb, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
| 11800 | { 1 /* */, Hexagon::V6_vL32b_nt_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11801 | { 1 /* */, Hexagon::V6_vdmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11802 | { 1 /* */, Hexagon::V6_vmpyihb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11803 | { 1 /* */, Hexagon::V6_vmpyih_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11804 | { 1 /* */, Hexagon::V6_vasrwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_ }, }, |
| 11805 | { 1 /* */, Hexagon::V6_vmpy_hf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11806 | { 1 /* */, Hexagon::V6_vdmpy_sf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
| 11807 | { 1 /* */, Hexagon::V6_vL32b_nt_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 11808 | { 1 /* */, Hexagon::V6_vandnqrt, Convert__Reg1_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11809 | { 1 /* */, Hexagon::V6_vandqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11810 | { 1 /* */, Hexagon::V6_vmpyuhe_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11811 | { 1 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11812 | { 1 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11813 | { 1 /* */, Hexagon::V6_vdmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11814 | { 1 /* */, Hexagon::V6_vmpyiwb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11815 | { 1 /* */, Hexagon::V6_vmpyiwh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11816 | { 1 /* */, Hexagon::V6_vmpyiwub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11817 | { 1 /* */, Hexagon::V6_vmpyiewh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 11818 | { 1 /* */, Hexagon::V6_vmpyiewuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
| 11819 | { 1 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11820 | { 1 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11821 | { 1 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
| 11822 | { 1 /* */, Hexagon::V6_vrmpyzcb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11823 | { 1 /* */, Hexagon::V6_vrmpyzcbs_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11824 | { 1 /* */, Hexagon::V6_vrmpyznb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11825 | { 1 /* */, Hexagon::V6_vrmpyzbb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11826 | { 1 /* */, Hexagon::V6_vrmpyzbub_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11827 | { 1 /* */, Hexagon::M2_cmacsc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11828 | { 1 /* */, Hexagon::M2_cnacsc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11829 | { 1 /* */, Hexagon::L2_loadalignb_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11830 | { 1 /* */, Hexagon::L2_loadbsw4_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11831 | { 1 /* */, Hexagon::L2_loadrd_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11832 | { 1 /* */, Hexagon::L2_loadalignh_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11833 | { 1 /* */, Hexagon::L2_loadbzw4_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11834 | { 1 /* */, Hexagon::M2_mpyd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11835 | { 1 /* */, Hexagon::M2_mpyd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11836 | { 1 /* */, Hexagon::M2_mpyd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11837 | { 1 /* */, Hexagon::M2_mpyd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11838 | { 1 /* */, Hexagon::M2_mpyud_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11839 | { 1 /* */, Hexagon::M2_mpyud_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11840 | { 1 /* */, Hexagon::M2_mpyud_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11841 | { 1 /* */, Hexagon::M2_mpyud_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11842 | { 1 /* */, Hexagon::M2_mmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11843 | { 1 /* */, Hexagon::M2_mmpyul_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11844 | { 1 /* */, Hexagon::M2_mmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11845 | { 1 /* */, Hexagon::M2_mmpyuh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11846 | { 1 /* */, Hexagon::S4_vxaddsubhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11847 | { 1 /* */, Hexagon::S4_vxsubaddhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11848 | { 1 /* */, Hexagon::V6_vaddbsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11849 | { 1 /* */, Hexagon::V6_vsubbsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11850 | { 1 /* */, Hexagon::V6_vaddhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11851 | { 1 /* */, Hexagon::V6_vlutvwhi, Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11852 | { 1 /* */, Hexagon::V6_vsubhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11853 | { 1 /* */, Hexagon::V6_vlutvwh_oracc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
| 11854 | { 1 /* */, Hexagon::V6_vaddubsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11855 | { 1 /* */, Hexagon::V6_vsububsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11856 | { 1 /* */, Hexagon::V6_vadduhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11857 | { 1 /* */, Hexagon::V6_vsubuhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11858 | { 1 /* */, Hexagon::V6_vadduwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11859 | { 1 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11860 | { 1 /* */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11861 | { 1 /* */, Hexagon::V6_vsubuwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11862 | { 1 /* */, Hexagon::V6_v10mpyubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v10mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11863 | { 1 /* */, Hexagon::V6_vaddwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11864 | { 1 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11865 | { 1 /* */, Hexagon::V6_vsubwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11866 | { 1 /* */, Hexagon::A2_addh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11867 | { 1 /* */, Hexagon::A2_addh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11868 | { 1 /* */, Hexagon::A2_addh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11869 | { 1 /* */, Hexagon::A2_addh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11870 | { 1 /* */, Hexagon::M2_cmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11871 | { 1 /* */, Hexagon::M7_wcmpyiw_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11872 | { 1 /* */, Hexagon::M4_cmpyi_wh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11873 | { 1 /* */, Hexagon::M7_wcmpyrw_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11874 | { 1 /* */, Hexagon::M4_cmpyr_wh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11875 | { 1 /* */, Hexagon::L2_loadrb_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11876 | { 1 /* */, Hexagon::L2_loadbsw2_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11877 | { 1 /* */, Hexagon::L2_loadrh_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11878 | { 1 /* */, Hexagon::L2_loadrub_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11879 | { 1 /* */, Hexagon::L2_loadbzw2_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11880 | { 1 /* */, Hexagon::L2_loadruh_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11881 | { 1 /* */, Hexagon::L2_loadri_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
| 11882 | { 1 /* */, Hexagon::M2_mpy_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11883 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11884 | { 1 /* */, Hexagon::M2_mpy_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11885 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11886 | { 1 /* */, Hexagon::M2_mpy_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11887 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11888 | { 1 /* */, Hexagon::M2_mpy_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11889 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11890 | { 1 /* */, Hexagon::M2_hmmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11891 | { 1 /* */, Hexagon::M2_hmmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 11892 | { 1 /* */, Hexagon::M2_mpyu_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11893 | { 1 /* */, Hexagon::M2_mpyu_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11894 | { 1 /* */, Hexagon::M2_mpyu_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11895 | { 1 /* */, Hexagon::M2_mpyu_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11896 | { 1 /* */, Hexagon::A2_subh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11897 | { 1 /* */, Hexagon::A2_subh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11898 | { 1 /* */, Hexagon::A2_subh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11899 | { 1 /* */, Hexagon::A2_subh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 11900 | { 1 /* */, Hexagon::M2_vdmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11901 | { 1 /* */, Hexagon::M2_vmpy2s_s1pack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11902 | { 1 /* */, Hexagon::M2_vrcmpys_s1rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11903 | { 1 /* */, Hexagon::V6_vaddbsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11904 | { 1 /* */, Hexagon::V6_vavgbrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11905 | { 1 /* */, Hexagon::V6_vlutvvbi, Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11906 | { 1 /* */, Hexagon::V6_vpackhb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11907 | { 1 /* */, Hexagon::V6_vroundhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11908 | { 1 /* */, Hexagon::V6_vsubbsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11909 | { 1 /* */, Hexagon::V6_vlutvvb_oracc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__124_, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
| 11910 | { 1 /* */, Hexagon::V6_vaddhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11911 | { 1 /* */, Hexagon::V6_vavghrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11912 | { 1 /* */, Hexagon::V6_vpackwh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11913 | { 1 /* */, Hexagon::V6_vroundwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11914 | { 1 /* */, Hexagon::V6_vsubhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11915 | { 1 /* */, Hexagon::V6_vaddububb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11916 | { 1 /* */, Hexagon::V6_vaddubsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11917 | { 1 /* */, Hexagon::V6_vasrvuhubsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11918 | { 1 /* */, Hexagon::V6_vavgubrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11919 | { 1 /* */, Hexagon::V6_vpackhub_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11920 | { 1 /* */, Hexagon::V6_vroundhub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11921 | { 1 /* */, Hexagon::V6_vrounduhub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11922 | { 1 /* */, Hexagon::V6_vsubububb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11923 | { 1 /* */, Hexagon::V6_vsububsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11924 | { 1 /* */, Hexagon::V6_vandnqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
| 11925 | { 1 /* */, Hexagon::V6_vadduhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11926 | { 1 /* */, Hexagon::V6_vasrvwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11927 | { 1 /* */, Hexagon::V6_vavguhrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11928 | { 1 /* */, Hexagon::V6_vpackwuh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11929 | { 1 /* */, Hexagon::V6_vrounduwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11930 | { 1 /* */, Hexagon::V6_vroundwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11931 | { 1 /* */, Hexagon::V6_vsubuhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11932 | { 1 /* */, Hexagon::V6_vadduwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11933 | { 1 /* */, Hexagon::V6_vavguwrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11934 | { 1 /* */, Hexagon::V6_vsubuwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11935 | { 1 /* */, Hexagon::V6_vaddwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11936 | { 1 /* */, Hexagon::V6_vavgwrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
| 11937 | { 1 /* */, Hexagon::V6_vdmpyhisat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11938 | { 1 /* */, Hexagon::V6_vdmpyhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11939 | { 1 /* */, Hexagon::V6_vdmpyhsusat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11940 | { 1 /* */, Hexagon::V6_vdmpyhvsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11941 | { 1 /* */, Hexagon::V6_vsubwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11942 | { 1 /* */, Hexagon::V6_vmpyhsrs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11943 | { 1 /* */, Hexagon::V6_vmpyhvsrs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11944 | { 1 /* */, Hexagon::V6_vmpyowh_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11945 | { 1 /* */, Hexagon::V6_vrmpyzcb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11946 | { 1 /* */, Hexagon::V6_vrmpyzcbs_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11947 | { 1 /* */, Hexagon::V6_vrmpyznb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11948 | { 1 /* */, Hexagon::V6_vrmpyzbb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11949 | { 1 /* */, Hexagon::V6_vrmpyzbub_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__43_, MCK__43_, MCK__41_ }, }, |
| 11950 | { 1 /* */, Hexagon::M2_mpyd_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11951 | { 1 /* */, Hexagon::M2_mpyd_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11952 | { 1 /* */, Hexagon::M2_mpyd_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11953 | { 1 /* */, Hexagon::M2_mpyd_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11954 | { 1 /* */, Hexagon::M2_mpyud_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11955 | { 1 /* */, Hexagon::M2_mpyud_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11956 | { 1 /* */, Hexagon::M2_mpyud_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11957 | { 1 /* */, Hexagon::M2_mpyud_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11958 | { 1 /* */, Hexagon::M2_mmacls_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11959 | { 1 /* */, Hexagon::M2_mmaculs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11960 | { 1 /* */, Hexagon::M2_mmachs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11961 | { 1 /* */, Hexagon::M2_mmacuhs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11962 | { 1 /* */, Hexagon::M2_mpyd_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11963 | { 1 /* */, Hexagon::M2_mpyd_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11964 | { 1 /* */, Hexagon::M2_mpyd_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11965 | { 1 /* */, Hexagon::M2_mpyd_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11966 | { 1 /* */, Hexagon::M2_mpyud_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11967 | { 1 /* */, Hexagon::M2_mpyud_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11968 | { 1 /* */, Hexagon::M2_mpyud_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11969 | { 1 /* */, Hexagon::M2_mpyud_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11970 | { 1 /* */, Hexagon::V6_vlutvwh_nm, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_nomatch }, }, |
| 11971 | { 1 /* */, Hexagon::V6_vlutvwh_oracci, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 11972 | { 1 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11973 | { 1 /* */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11974 | { 1 /* */, Hexagon::V6_v10mpyubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v10mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11975 | { 1 /* */, Hexagon::V6_vmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 11976 | { 1 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 11977 | { 1 /* */, Hexagon::M2_mpy_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11978 | { 1 /* */, Hexagon::M2_mpy_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11979 | { 1 /* */, Hexagon::M2_mpy_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11980 | { 1 /* */, Hexagon::M2_mpy_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11981 | { 1 /* */, Hexagon::M2_mpyu_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11982 | { 1 /* */, Hexagon::M2_mpyu_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11983 | { 1 /* */, Hexagon::M2_mpyu_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11984 | { 1 /* */, Hexagon::M2_mpyu_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11985 | { 1 /* */, Hexagon::M2_mpy_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11986 | { 1 /* */, Hexagon::M2_mpy_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11987 | { 1 /* */, Hexagon::M2_mpy_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11988 | { 1 /* */, Hexagon::M2_mpy_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11989 | { 1 /* */, Hexagon::M2_mpyu_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11990 | { 1 /* */, Hexagon::M2_mpyu_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11991 | { 1 /* */, Hexagon::M2_mpyu_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11992 | { 1 /* */, Hexagon::M2_mpyu_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
| 11993 | { 1 /* */, Hexagon::M2_cmpyrsc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11994 | { 1 /* */, Hexagon::M7_wcmpyiwc_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11995 | { 1 /* */, Hexagon::M4_cmpyi_whc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11996 | { 1 /* */, Hexagon::M7_wcmpyrwc_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11997 | { 1 /* */, Hexagon::M4_cmpyr_whc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 11998 | { 1 /* */, Hexagon::V6_vmpyowh_sacc_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
| 11999 | { 1 /* */, Hexagon::V6_vasrhbsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12000 | { 1 /* */, Hexagon::V6_vlutvvb_nm, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_nomatch }, }, |
| 12001 | { 1 /* */, Hexagon::V6_vlutvvb_oracci, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__124_, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
| 12002 | { 1 /* */, Hexagon::V6_vaddclbh, Convert__Reg1_0__Reg1_8__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_vclb, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
| 12003 | { 1 /* */, Hexagon::V6_vasrwhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12004 | { 1 /* */, Hexagon::V6_vasrhubsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12005 | { 1 /* */, Hexagon::V6_vasruhubsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12006 | { 1 /* */, Hexagon::V6_vasruwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12007 | { 1 /* */, Hexagon::V6_vasrwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12008 | { 1 /* */, Hexagon::V6_vdmpyhisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12009 | { 1 /* */, Hexagon::V6_vdmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12010 | { 1 /* */, Hexagon::V6_vdmpyhsusat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12011 | { 1 /* */, Hexagon::V6_vdmpyhvsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12012 | { 1 /* */, Hexagon::V6_vaddclbw, Convert__Reg1_0__Reg1_8__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_vclb, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
| 12013 | { 1 /* */, Hexagon::V6_vaddcarry, Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 12014 | { 1 /* */, Hexagon::V6_vsubcarry, Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 12015 | { 1 /* */, Hexagon::V6_vaddcarryo, Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 12016 | { 1 /* */, Hexagon::V6_vsubcarryo, Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_carry }, }, |
| 12017 | { 1 /* */, Hexagon::M2_mpyd_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12018 | { 1 /* */, Hexagon::M2_mpyd_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12019 | { 1 /* */, Hexagon::M2_mpyd_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12020 | { 1 /* */, Hexagon::M2_mpyd_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12021 | { 1 /* */, Hexagon::M2_vrcmpys_s1_h, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
| 12022 | { 1 /* */, Hexagon::M2_vrcmpys_s1_l, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
| 12023 | { 1 /* */, Hexagon::V6_v6mpyhubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
| 12024 | { 1 /* */, Hexagon::V6_v6mpyvubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
| 12025 | { 1 /* */, Hexagon::V6_v6mpyhubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b10, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
| 12026 | { 1 /* */, Hexagon::V6_v6mpyvubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b10, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
| 12027 | { 1 /* */, Hexagon::A2_addh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12028 | { 1 /* */, Hexagon::A2_addh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12029 | { 1 /* */, Hexagon::A2_addh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12030 | { 1 /* */, Hexagon::A2_addh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12031 | { 1 /* */, Hexagon::M2_mpy_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12032 | { 1 /* */, Hexagon::M2_mpy_sat_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12033 | { 1 /* */, Hexagon::M2_mpy_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12034 | { 1 /* */, Hexagon::M2_mpy_sat_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12035 | { 1 /* */, Hexagon::M2_mpy_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12036 | { 1 /* */, Hexagon::M2_mpy_sat_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12037 | { 1 /* */, Hexagon::M2_mpy_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
| 12038 | { 1 /* */, Hexagon::M2_mpy_sat_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12039 | { 1 /* */, Hexagon::M2_hmmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12040 | { 1 /* */, Hexagon::M2_hmmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12041 | { 1 /* */, Hexagon::A2_subh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12042 | { 1 /* */, Hexagon::A2_subh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12043 | { 1 /* */, Hexagon::A2_subh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12044 | { 1 /* */, Hexagon::A2_subh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
| 12045 | { 1 /* */, Hexagon::V6_vasrvuhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12046 | { 1 /* */, Hexagon::V6_vasrvwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12047 | { 1 /* */, Hexagon::V6_vmpyuhvs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_16 }, }, |
| 12048 | { 1 /* */, Hexagon::V6_vdmpyhsuisat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12049 | { 1 /* */, Hexagon::M2_vrcmpys_acc_s1_h, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
| 12050 | { 1 /* */, Hexagon::M2_vrcmpys_acc_s1_l, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
| 12051 | { 1 /* */, Hexagon::V6_v6mpyhubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
| 12052 | { 1 /* */, Hexagon::V6_v6mpyvubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
| 12053 | { 1 /* */, Hexagon::M2_mpy_acc_sat_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12054 | { 1 /* */, Hexagon::M2_mpy_acc_sat_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12055 | { 1 /* */, Hexagon::M2_mpy_acc_sat_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12056 | { 1 /* */, Hexagon::M2_mpy_acc_sat_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12057 | { 1 /* */, Hexagon::M2_mpy_nac_sat_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12058 | { 1 /* */, Hexagon::M2_mpy_nac_sat_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12059 | { 1 /* */, Hexagon::M2_mpy_nac_sat_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12060 | { 1 /* */, Hexagon::M2_mpy_nac_sat_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12061 | { 1 /* */, Hexagon::V6_vmpyowh_rnd_sacc_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
| 12062 | { 1 /* */, Hexagon::V6_vasrhbrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12063 | { 1 /* */, Hexagon::V6_vasrwhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12064 | { 1 /* */, Hexagon::V6_vmpahhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_DoubleRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12065 | { 1 /* */, Hexagon::V6_vmpauhuhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12066 | { 1 /* */, Hexagon::V6_vmpsuhuhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmps, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12067 | { 1 /* */, Hexagon::V6_vasrhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12068 | { 1 /* */, Hexagon::V6_vasruhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12069 | { 1 /* */, Hexagon::V6_vasruwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12070 | { 1 /* */, Hexagon::V6_vasrwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12071 | { 1 /* */, Hexagon::V6_vdmpyhsuisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 12072 | { 1 /* */, Hexagon::V6_vaddcarrysat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry, MCK__COLON_, MCK_sat }, }, |
| 12073 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12074 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12075 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12076 | { 1 /* */, Hexagon::M2_mpy_sat_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12077 | { 1 /* */, Hexagon::M2_vrcmpys_s1rp_h, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
| 12078 | { 1 /* */, Hexagon::M2_vrcmpys_s1rp_l, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
| 12079 | { 1 /* */, Hexagon::V6_vmpyhss, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12080 | { 1 /* */, Hexagon::V6_vmpyowh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
| 12081 | { 1 /* */, Hexagon::V6_vmpyhsrs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12082 | { 1 /* */, Hexagon::V6_vmpyhvsrs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12083 | { 1 /* */, Hexagon::V6_vmpyowh_rnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
| 12084 | { 1 /* */, Hexagon::V6_vmpyowh_sacc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
| 12085 | { 1 /* */, Hexagon::V6_vmpyowh_rnd_sacc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
| 12086 | { 2 /* allocframe */, Hexagon::S2_allocframe, Convert__regR29__Tie0_0_0__u11_3Imm1_3, AMFBS_None, { MCK_allocframe, MCK__40_, MCK__HASH_, MCK_u11_3Imm, MCK__41_ }, }, |
| 12087 | { 2 /* allocframe */, Hexagon::S2_allocframe, Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4, AMFBS_None, { MCK_allocframe, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u11_3Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 12088 | { 13 /* barrier */, Hexagon::Y2_barrier, Convert_NoOperands, AMFBS_None, { MCK_barrier }, }, |
| 12089 | { 21 /* brkpt */, Hexagon::Y2_break, Convert_NoOperands, AMFBS_None, { MCK_brkpt }, }, |
| 12090 | { 27 /* call */, Hexagon::J2_call, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12091 | { 27 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12092 | { 27 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12093 | { 27 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12094 | { 27 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12095 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12096 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12097 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12098 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12099 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12100 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12101 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12102 | { 27 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
| 12103 | { 32 /* callr */, Hexagon::J2_callr, Convert__Reg1_1, AMFBS_None, { MCK_callr, MCK_IntRegs }, }, |
| 12104 | { 38 /* callrh */, Hexagon::J2_callrh, Convert__Reg1_1, AMFBS_HasV73, { MCK_callrh, MCK_IntRegs }, }, |
| 12105 | { 45 /* ciad */, Hexagon::Y2_ciad, Convert__Reg1_2, AMFBS_None, { MCK_ciad, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12106 | { 50 /* crswap */, Hexagon::Y4_crswap10, Convert__Reg1_2__Tie0_0_0__sgp10Const1_3, AMFBS_None, { MCK_crswap, MCK__40_, MCK_DoubleRegs, MCK_sgp10Const, MCK__41_ }, }, |
| 12107 | { 50 /* crswap */, Hexagon::Y2_crswap0, Convert__Reg1_2__Tie0_2_2, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_sgp, MCK__41_ }, }, |
| 12108 | { 50 /* crswap */, Hexagon::Y2_crswap0, Convert__Reg1_2__Tie0_0_0, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_SGP0, MCK__41_ }, }, |
| 12109 | { 50 /* crswap */, Hexagon::Y4_crswap1, Convert__Reg1_2__Tie0_0_0, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_SGP1, MCK__41_ }, }, |
| 12110 | { 57 /* cswi */, Hexagon::Y2_cswi, Convert__Reg1_2, AMFBS_None, { MCK_cswi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12111 | { 62 /* dccleana */, Hexagon::Y2_dccleana, Convert__Reg1_2, AMFBS_None, { MCK_dccleana, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12112 | { 71 /* dccleanidx */, Hexagon::Y2_dccleanidx, Convert__Reg1_2, AMFBS_None, { MCK_dccleanidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12113 | { 82 /* dccleaninva */, Hexagon::Y2_dccleaninva, Convert__Reg1_2, AMFBS_None, { MCK_dccleaninva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12114 | { 94 /* dccleaninvidx */, Hexagon::Y2_dccleaninvidx, Convert__Reg1_2, AMFBS_None, { MCK_dccleaninvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12115 | { 108 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__imm_95_0, AMFBS_None, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12116 | { 108 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__u11_3Imm1_5, AMFBS_None, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u11_3Imm, MCK__41_ }, }, |
| 12117 | { 116 /* dcinva */, Hexagon::Y2_dcinva, Convert__Reg1_2, AMFBS_None, { MCK_dcinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12118 | { 123 /* dcinvidx */, Hexagon::Y2_dcinvidx, Convert__Reg1_2, AMFBS_None, { MCK_dcinvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12119 | { 132 /* dckill */, Hexagon::Y2_dckill, Convert_NoOperands, AMFBS_None, { MCK_dckill }, }, |
| 12120 | { 139 /* dctagw */, Hexagon::Y2_dctagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_dctagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12121 | { 146 /* dczeroa */, Hexagon::Y2_dczeroa, Convert__Reg1_2, AMFBS_None, { MCK_dczeroa, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12122 | { 154 /* dealloc_return */, Hexagon::L4_return, Convert__regD15__regR30, AMFBS_None, { MCK_dealloc_95_return }, }, |
| 12123 | { 169 /* deallocframe */, Hexagon::L2_deallocframe, Convert__regD15__regR30, AMFBS_None, { MCK_deallocframe }, }, |
| 12124 | { 182 /* diag */, Hexagon::Y6_diag, Convert__Reg1_2, AMFBS_HasV67, { MCK_DIAG, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12125 | { 187 /* diag0 */, Hexagon::Y6_diag0, Convert__Reg1_2__Reg1_3, AMFBS_HasV67, { MCK_diag0, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 12126 | { 193 /* diag1 */, Hexagon::Y6_diag1, Convert__Reg1_2__Reg1_3, AMFBS_HasV67, { MCK_diag1, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 12127 | { 199 /* dmlink */, Hexagon::Y6_dmlink, Convert__Reg1_2__Reg1_3, AMFBS_HasV68, { MCK_dmlink, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12128 | { 206 /* dmresume */, Hexagon::Y6_dmresume, Convert__Reg1_2, AMFBS_HasV68, { MCK_dmresume, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12129 | { 215 /* dmstart */, Hexagon::Y6_dmstart, Convert__Reg1_2, AMFBS_HasV68, { MCK_dmstart, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12130 | { 223 /* DUPLEX */, Hexagon::DUPLEX_Pseudo, Convert__imm_95_0, AMFBS_None, { MCK_DUPLEX }, }, |
| 12131 | { 230 /* endloop0 */, Hexagon::J2_endloop0, Convert_NoOperands, AMFBS_None, { MCK_endloop0 }, }, |
| 12132 | { 239 /* endloop01 */, Hexagon::J2_endloop01, Convert_NoOperands, AMFBS_None, { MCK_endloop01 }, }, |
| 12133 | { 249 /* endloop1 */, Hexagon::J2_endloop1, Convert_NoOperands, AMFBS_None, { MCK_endloop1 }, }, |
| 12134 | { 258 /* hintjr */, Hexagon::J4_hintjumpr, Convert__Reg1_2, AMFBS_None, { MCK_hintjr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12135 | { 265 /* iassignw */, Hexagon::Y2_iassignw, Convert__Reg1_2, AMFBS_None, { MCK_iassignw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12136 | { 274 /* icdataw */, Hexagon::Y2_icdataw, Convert__Reg1_2__Reg1_3, AMFBS_HasV66, { MCK_icdataw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12137 | { 282 /* icinva */, Hexagon::Y2_icinva, Convert__Reg1_2, AMFBS_None, { MCK_icinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12138 | { 289 /* icinvidx */, Hexagon::Y2_icinvidx, Convert__Reg1_2, AMFBS_None, { MCK_icinvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12139 | { 298 /* ickill */, Hexagon::Y2_ickill, Convert_NoOperands, AMFBS_None, { MCK_ickill }, }, |
| 12140 | { 305 /* ictagw */, Hexagon::Y2_ictagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_ictagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12141 | { 312 /* if */, Hexagon::L4_return_t, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
| 12142 | { 312 /* if */, Hexagon::L4_return_f, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
| 12143 | { 312 /* if */, Hexagon::J2_callt, Convert__Reg1_2__a30_2Imm1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_call, MCK_a30_2Imm }, }, |
| 12144 | { 312 /* if */, Hexagon::J2_callrt, Convert__Reg1_2__Reg1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
| 12145 | { 312 /* if */, Hexagon::J2_jumpt, Convert__Reg1_2__b30_2Imm1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_b30_2Imm }, }, |
| 12146 | { 312 /* if */, Hexagon::J2_jumprt, Convert__Reg1_2__Reg1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
| 12147 | { 312 /* if */, Hexagon::J2_callf, Convert__Reg1_3__a30_2Imm1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_call, MCK_a30_2Imm }, }, |
| 12148 | { 312 /* if */, Hexagon::J2_callrf, Convert__Reg1_3__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
| 12149 | { 312 /* if */, Hexagon::J2_jumpf, Convert__Reg1_3__b30_2Imm1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_b30_2Imm }, }, |
| 12150 | { 312 /* if */, Hexagon::J2_jumprf, Convert__Reg1_3__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
| 12151 | { 312 /* if */, Hexagon::A2_tfrpt, Convert__Reg1_4__Reg1_2__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
| 12152 | { 312 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
| 12153 | { 312 /* if */, Hexagon::V6_vcmov, Convert__Reg1_4__Reg1_2__Reg1_6, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
| 12154 | { 312 /* if */, Hexagon::A2_tfrpf, Convert__Reg1_5__Reg1_3__Reg1_7, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
| 12155 | { 312 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
| 12156 | { 312 /* if */, Hexagon::V6_vncmov, Convert__Reg1_5__Reg1_3__Reg1_7, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
| 12157 | { 312 /* if */, Hexagon::J2_jumpt, Convert__Reg1_2__b30_2Imm1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12158 | { 312 /* if */, Hexagon::J2_jumptpt, Convert__Reg1_2__b30_2Imm1_7, AMFBS_HasV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12159 | { 312 /* if */, Hexagon::J2_jumprt, Convert__Reg1_2__Reg1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
| 12160 | { 312 /* if */, Hexagon::J2_jumprtpt, Convert__Reg1_2__Reg1_7, AMFBS_HasV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
| 12161 | { 312 /* if */, Hexagon::C2_cmoveit, Convert__Reg1_4__Reg1_2__s32_0Imm1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12162 | { 312 /* if */, Hexagon::J2_jumpf, Convert__Reg1_3__b30_2Imm1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12163 | { 312 /* if */, Hexagon::J2_jumpfpt, Convert__Reg1_3__b30_2Imm1_8, AMFBS_HasV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12164 | { 312 /* if */, Hexagon::J2_jumprf, Convert__Reg1_3__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
| 12165 | { 312 /* if */, Hexagon::J2_jumprfpt, Convert__Reg1_3__Reg1_8, AMFBS_HasV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
| 12166 | { 312 /* if */, Hexagon::C2_cmoveif, Convert__Reg1_5__Reg1_3__s32_0Imm1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12167 | { 312 /* if */, Hexagon::L4_return_tnew_pnt, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
| 12168 | { 312 /* if */, Hexagon::L4_return_tnew_pt, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
| 12169 | { 312 /* if */, Hexagon::A2_tfrptnew, Convert__Reg1_6__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
| 12170 | { 312 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
| 12171 | { 312 /* if */, Hexagon::L4_return_fnew_pnt, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
| 12172 | { 312 /* if */, Hexagon::L4_return_fnew_pt, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
| 12173 | { 312 /* if */, Hexagon::A2_tfrpfnew, Convert__Reg1_7__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
| 12174 | { 312 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
| 12175 | { 312 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12176 | { 312 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12177 | { 312 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12178 | { 312 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12179 | { 312 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12180 | { 312 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12181 | { 312 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12182 | { 312 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12183 | { 312 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12184 | { 312 /* if */, Hexagon::A4_paslht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12185 | { 312 /* if */, Hexagon::A4_pasrht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12186 | { 312 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12187 | { 312 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12188 | { 312 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12189 | { 312 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12190 | { 312 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12191 | { 312 /* if */, Hexagon::A4_psxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12192 | { 312 /* if */, Hexagon::A4_psxtht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12193 | { 312 /* if */, Hexagon::A4_pzxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12194 | { 312 /* if */, Hexagon::A4_pzxtht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12195 | { 312 /* if */, Hexagon::V6_vL32b_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12196 | { 312 /* if */, Hexagon::J2_jumptnew, Convert__Reg1_2__b30_2Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12197 | { 312 /* if */, Hexagon::J2_jumptnewpt, Convert__Reg1_2__b30_2Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12198 | { 312 /* if */, Hexagon::J2_jumprtnew, Convert__Reg1_2__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
| 12199 | { 312 /* if */, Hexagon::J2_jumprtnewpt, Convert__Reg1_2__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
| 12200 | { 312 /* if */, Hexagon::C2_cmovenewit, Convert__Reg1_6__Reg1_2__s32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12201 | { 312 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12202 | { 312 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12203 | { 312 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12204 | { 312 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12205 | { 312 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12206 | { 312 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12207 | { 312 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12208 | { 312 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12209 | { 312 /* if */, Hexagon::A4_paslhf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12210 | { 312 /* if */, Hexagon::A4_pasrhf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12211 | { 312 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12212 | { 312 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12213 | { 312 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12214 | { 312 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12215 | { 312 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12216 | { 312 /* if */, Hexagon::A4_psxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12217 | { 312 /* if */, Hexagon::A4_psxthf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12218 | { 312 /* if */, Hexagon::A4_pzxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12219 | { 312 /* if */, Hexagon::A4_pzxthf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12220 | { 312 /* if */, Hexagon::V6_vL32b_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12221 | { 312 /* if */, Hexagon::J2_jumpfnew, Convert__Reg1_3__b30_2Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12222 | { 312 /* if */, Hexagon::J2_jumpfnewpt, Convert__Reg1_3__b30_2Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12223 | { 312 /* if */, Hexagon::J2_jumprfnew, Convert__Reg1_3__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
| 12224 | { 312 /* if */, Hexagon::J2_jumprfnewpt, Convert__Reg1_3__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
| 12225 | { 312 /* if */, Hexagon::C2_cmovenewif, Convert__Reg1_7__Reg1_3__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12226 | { 312 /* if */, Hexagon::S4_pstorerbt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12227 | { 312 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12228 | { 312 /* if */, Hexagon::S4_pstorerdt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12229 | { 312 /* if */, Hexagon::S4_pstorerht_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12230 | { 312 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12231 | { 312 /* if */, Hexagon::S4_pstorerit_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12232 | { 312 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12233 | { 312 /* if */, Hexagon::C2_ccombinewt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12234 | { 312 /* if */, Hexagon::L4_ploadrdt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12235 | { 312 /* if */, Hexagon::V6_vccombine, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 12236 | { 312 /* if */, Hexagon::A2_paddt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12237 | { 312 /* if */, Hexagon::A2_pandt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12238 | { 312 /* if */, Hexagon::L4_ploadrbt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12239 | { 312 /* if */, Hexagon::L4_ploadrht_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12240 | { 312 /* if */, Hexagon::L4_ploadrubt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12241 | { 312 /* if */, Hexagon::L4_ploadruht_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12242 | { 312 /* if */, Hexagon::L4_ploadrit_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12243 | { 312 /* if */, Hexagon::A2_port, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12244 | { 312 /* if */, Hexagon::A2_psubt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12245 | { 312 /* if */, Hexagon::A2_pxort, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12246 | { 312 /* if */, Hexagon::S4_pstorerbf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12247 | { 312 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12248 | { 312 /* if */, Hexagon::S4_pstorerdf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12249 | { 312 /* if */, Hexagon::S4_pstorerhf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12250 | { 312 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12251 | { 312 /* if */, Hexagon::S4_pstorerif_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12252 | { 312 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12253 | { 312 /* if */, Hexagon::C2_ccombinewf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12254 | { 312 /* if */, Hexagon::L4_ploadrdf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12255 | { 312 /* if */, Hexagon::V6_vnccombine, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
| 12256 | { 312 /* if */, Hexagon::A2_paddf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12257 | { 312 /* if */, Hexagon::A2_pandf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12258 | { 312 /* if */, Hexagon::L4_ploadrbf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12259 | { 312 /* if */, Hexagon::L4_ploadrhf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12260 | { 312 /* if */, Hexagon::L4_ploadrubf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12261 | { 312 /* if */, Hexagon::L4_ploadruhf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12262 | { 312 /* if */, Hexagon::L4_ploadrif_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12263 | { 312 /* if */, Hexagon::A2_porf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12264 | { 312 /* if */, Hexagon::A2_psubf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12265 | { 312 /* if */, Hexagon::A2_pxorf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12266 | { 312 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12267 | { 312 /* if */, Hexagon::V6_vaddbq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12268 | { 312 /* if */, Hexagon::V6_vsubbq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12269 | { 312 /* if */, Hexagon::V6_vaddhq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12270 | { 312 /* if */, Hexagon::V6_vsubhq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12271 | { 312 /* if */, Hexagon::V6_vaddwq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12272 | { 312 /* if */, Hexagon::V6_vsubwq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12273 | { 312 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12274 | { 312 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12275 | { 312 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12276 | { 312 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12277 | { 312 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12278 | { 312 /* if */, Hexagon::L4_return_t, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 12279 | { 312 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 12280 | { 312 /* if */, Hexagon::V6_vL32b_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12281 | { 312 /* if */, Hexagon::V6_vL32b_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12282 | { 312 /* if */, Hexagon::V6_vL32b_nt_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12283 | { 312 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12284 | { 312 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12285 | { 312 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12286 | { 312 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12287 | { 312 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12288 | { 312 /* if */, Hexagon::A4_paslhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12289 | { 312 /* if */, Hexagon::A4_pasrhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12290 | { 312 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12291 | { 312 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12292 | { 312 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12293 | { 312 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12294 | { 312 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12295 | { 312 /* if */, Hexagon::A4_psxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12296 | { 312 /* if */, Hexagon::A4_psxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12297 | { 312 /* if */, Hexagon::A4_pzxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12298 | { 312 /* if */, Hexagon::A4_pzxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12299 | { 312 /* if */, Hexagon::J2_jumprz, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
| 12300 | { 312 /* if */, Hexagon::J2_jumprzpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
| 12301 | { 312 /* if */, Hexagon::J2_jumprltez, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
| 12302 | { 312 /* if */, Hexagon::J2_jumprltezpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
| 12303 | { 312 /* if */, Hexagon::J2_jumprnz, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
| 12304 | { 312 /* if */, Hexagon::J2_jumprnzpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
| 12305 | { 312 /* if */, Hexagon::J2_jumprgtez, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
| 12306 | { 312 /* if */, Hexagon::J2_jumprgtezpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
| 12307 | { 312 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12308 | { 312 /* if */, Hexagon::V6_vaddbnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12309 | { 312 /* if */, Hexagon::V6_vsubbnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12310 | { 312 /* if */, Hexagon::V6_vaddhnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12311 | { 312 /* if */, Hexagon::V6_vsubhnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12312 | { 312 /* if */, Hexagon::V6_vaddwnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12313 | { 312 /* if */, Hexagon::V6_vsubwnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12314 | { 312 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12315 | { 312 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12316 | { 312 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12317 | { 312 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12318 | { 312 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12319 | { 312 /* if */, Hexagon::L4_return_f, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
| 12320 | { 312 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 12321 | { 312 /* if */, Hexagon::V6_vL32b_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12322 | { 312 /* if */, Hexagon::V6_vL32b_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12323 | { 312 /* if */, Hexagon::V6_vL32b_nt_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12324 | { 312 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12325 | { 312 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12326 | { 312 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12327 | { 312 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12328 | { 312 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12329 | { 312 /* if */, Hexagon::A4_paslhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12330 | { 312 /* if */, Hexagon::A4_pasrhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12331 | { 312 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12332 | { 312 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12333 | { 312 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12334 | { 312 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12335 | { 312 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12336 | { 312 /* if */, Hexagon::A4_psxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12337 | { 312 /* if */, Hexagon::A4_psxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12338 | { 312 /* if */, Hexagon::A4_pzxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12339 | { 312 /* if */, Hexagon::A4_pzxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12340 | { 312 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12341 | { 312 /* if */, Hexagon::V6_vS32b_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12342 | { 312 /* if */, Hexagon::S4_pstorerbnewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12343 | { 312 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12344 | { 312 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12345 | { 312 /* if */, Hexagon::S4_pstorerft_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12346 | { 312 /* if */, Hexagon::S4_pstorerhnewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12347 | { 312 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12348 | { 312 /* if */, Hexagon::S4_pstorerinewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12349 | { 312 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12350 | { 312 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12351 | { 312 /* if */, Hexagon::V6_vS32b_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12352 | { 312 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12353 | { 312 /* if */, Hexagon::V6_vS32Ub_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12354 | { 312 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12355 | { 312 /* if */, Hexagon::V6_zLd_pred_ppu, Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12356 | { 312 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 12357 | { 312 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12358 | { 312 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12359 | { 312 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12360 | { 312 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12361 | { 312 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 12362 | { 312 /* if */, Hexagon::V6_vL32b_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12363 | { 312 /* if */, Hexagon::V6_vL32b_pred_ppu, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12364 | { 312 /* if */, Hexagon::S4_pstorerbtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12365 | { 312 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12366 | { 312 /* if */, Hexagon::S4_pstorerdtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12367 | { 312 /* if */, Hexagon::S4_pstorerhtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12368 | { 312 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12369 | { 312 /* if */, Hexagon::S4_pstoreritnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12370 | { 312 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12371 | { 312 /* if */, Hexagon::C2_ccombinewnewt, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12372 | { 312 /* if */, Hexagon::L4_ploadrdtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12373 | { 312 /* if */, Hexagon::A2_paddtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12374 | { 312 /* if */, Hexagon::A2_pandtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12375 | { 312 /* if */, Hexagon::L4_ploadrbtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12376 | { 312 /* if */, Hexagon::L4_ploadrhtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12377 | { 312 /* if */, Hexagon::L4_ploadrubtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12378 | { 312 /* if */, Hexagon::L4_ploadruhtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12379 | { 312 /* if */, Hexagon::L4_ploadritnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12380 | { 312 /* if */, Hexagon::A2_portnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12381 | { 312 /* if */, Hexagon::A2_psubtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12382 | { 312 /* if */, Hexagon::A2_pxortnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12383 | { 312 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12384 | { 312 /* if */, Hexagon::V6_vS32b_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12385 | { 312 /* if */, Hexagon::S4_pstorerbnewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12386 | { 312 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12387 | { 312 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12388 | { 312 /* if */, Hexagon::S4_pstorerff_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12389 | { 312 /* if */, Hexagon::S4_pstorerhnewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12390 | { 312 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12391 | { 312 /* if */, Hexagon::S4_pstorerinewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12392 | { 312 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12393 | { 312 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12394 | { 312 /* if */, Hexagon::V6_vS32b_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12395 | { 312 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12396 | { 312 /* if */, Hexagon::V6_vS32Ub_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12397 | { 312 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 12398 | { 312 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12399 | { 312 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12400 | { 312 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12401 | { 312 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12402 | { 312 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 12403 | { 312 /* if */, Hexagon::V6_vL32b_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12404 | { 312 /* if */, Hexagon::V6_vL32b_npred_ppu, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12405 | { 312 /* if */, Hexagon::S4_pstorerbfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12406 | { 312 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12407 | { 312 /* if */, Hexagon::S4_pstorerdfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12408 | { 312 /* if */, Hexagon::S4_pstorerhfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12409 | { 312 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12410 | { 312 /* if */, Hexagon::S4_pstorerifnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12411 | { 312 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12412 | { 312 /* if */, Hexagon::C2_ccombinewnewf, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12413 | { 312 /* if */, Hexagon::L4_ploadrdfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12414 | { 312 /* if */, Hexagon::A2_paddfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12415 | { 312 /* if */, Hexagon::A2_pandfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12416 | { 312 /* if */, Hexagon::L4_ploadrbfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12417 | { 312 /* if */, Hexagon::L4_ploadrhfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12418 | { 312 /* if */, Hexagon::L4_ploadrubfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12419 | { 312 /* if */, Hexagon::L4_ploadruhfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12420 | { 312 /* if */, Hexagon::L4_ploadrifnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12421 | { 312 /* if */, Hexagon::A2_porfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12422 | { 312 /* if */, Hexagon::A2_psubfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12423 | { 312 /* if */, Hexagon::A2_pxorfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12424 | { 312 /* if */, Hexagon::V6_vS32b_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12425 | { 312 /* if */, Hexagon::V6_vaddbq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12426 | { 312 /* if */, Hexagon::V6_vsubbq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12427 | { 312 /* if */, Hexagon::V6_vaddhq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12428 | { 312 /* if */, Hexagon::V6_vsubhq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12429 | { 312 /* if */, Hexagon::V6_vaddwq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12430 | { 312 /* if */, Hexagon::V6_vsubwq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12431 | { 312 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12432 | { 312 /* if */, Hexagon::S2_pstorerbt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12433 | { 312 /* if */, Hexagon::S2_pstorerdt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12434 | { 312 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12435 | { 312 /* if */, Hexagon::S2_pstorerht_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12436 | { 312 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12437 | { 312 /* if */, Hexagon::S2_pstorerit_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12438 | { 312 /* if */, Hexagon::V6_vS32b_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12439 | { 312 /* if */, Hexagon::V6_vS32Ub_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12440 | { 312 /* if */, Hexagon::V6_zLd_pred_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12441 | { 312 /* if */, Hexagon::L2_ploadrdt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
| 12442 | { 312 /* if */, Hexagon::L2_ploadrbt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12443 | { 312 /* if */, Hexagon::L2_ploadrht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12444 | { 312 /* if */, Hexagon::L2_ploadrubt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12445 | { 312 /* if */, Hexagon::L2_ploadruht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12446 | { 312 /* if */, Hexagon::L2_ploadrit_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 12447 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12448 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12449 | { 312 /* if */, Hexagon::V6_vL32b_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12450 | { 312 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12451 | { 312 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12452 | { 312 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12453 | { 312 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12454 | { 312 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 12455 | { 312 /* if */, Hexagon::V6_vS32b_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12456 | { 312 /* if */, Hexagon::V6_vaddbnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12457 | { 312 /* if */, Hexagon::V6_vsubbnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
| 12458 | { 312 /* if */, Hexagon::V6_vaddhnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12459 | { 312 /* if */, Hexagon::V6_vsubhnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12460 | { 312 /* if */, Hexagon::V6_vaddwnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12461 | { 312 /* if */, Hexagon::V6_vsubwnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12462 | { 312 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12463 | { 312 /* if */, Hexagon::S2_pstorerbf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12464 | { 312 /* if */, Hexagon::S2_pstorerdf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12465 | { 312 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12466 | { 312 /* if */, Hexagon::S2_pstorerhf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12467 | { 312 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12468 | { 312 /* if */, Hexagon::S2_pstorerif_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12469 | { 312 /* if */, Hexagon::V6_vS32b_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12470 | { 312 /* if */, Hexagon::V6_vS32Ub_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 12471 | { 312 /* if */, Hexagon::L2_ploadrdf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
| 12472 | { 312 /* if */, Hexagon::L2_ploadrbf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12473 | { 312 /* if */, Hexagon::L2_ploadrhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12474 | { 312 /* if */, Hexagon::L2_ploadrubf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12475 | { 312 /* if */, Hexagon::L2_ploadruhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12476 | { 312 /* if */, Hexagon::L2_ploadrif_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 12477 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12478 | { 312 /* if */, Hexagon::V6_vL32b_nt_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12479 | { 312 /* if */, Hexagon::V6_vL32b_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12480 | { 312 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12481 | { 312 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12482 | { 312 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12483 | { 312 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12484 | { 312 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
| 12485 | { 312 /* if */, Hexagon::J4_tstbit0_t_jumpnv_nt, Convert__Reg1_4__b30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12486 | { 312 /* if */, Hexagon::J4_tstbit0_t_jumpnv_t, Convert__Reg1_4__b30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12487 | { 312 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12488 | { 312 /* if */, Hexagon::V6_vS32b_nt_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12489 | { 312 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12490 | { 312 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12491 | { 312 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12492 | { 312 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12493 | { 312 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12494 | { 312 /* if */, Hexagon::V6_vS32b_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12495 | { 312 /* if */, Hexagon::V6_vS32b_nt_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12496 | { 312 /* if */, Hexagon::V6_vS32b_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12497 | { 312 /* if */, Hexagon::V6_vL32b_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12498 | { 312 /* if */, Hexagon::V6_vL32b_cur_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12499 | { 312 /* if */, Hexagon::V6_vL32b_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12500 | { 312 /* if */, Hexagon::V6_vL32b_tmp_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12501 | { 312 /* if */, Hexagon::V6_vL32b_nt_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12502 | { 312 /* if */, Hexagon::V6_vL32b_nt_pred_ppu, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12503 | { 312 /* if */, Hexagon::S4_pstorerbnewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12504 | { 312 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12505 | { 312 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12506 | { 312 /* if */, Hexagon::S4_pstorerftnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12507 | { 312 /* if */, Hexagon::S4_pstorerhnewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12508 | { 312 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12509 | { 312 /* if */, Hexagon::S4_pstorerinewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12510 | { 312 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12511 | { 312 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 12512 | { 312 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12513 | { 312 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12514 | { 312 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12515 | { 312 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12516 | { 312 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 12517 | { 312 /* if */, Hexagon::J4_tstbit0_f_jumpnv_nt, Convert__Reg1_5__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12518 | { 312 /* if */, Hexagon::J4_tstbit0_f_jumpnv_t, Convert__Reg1_5__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12519 | { 312 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12520 | { 312 /* if */, Hexagon::V6_vS32b_nt_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12521 | { 312 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12522 | { 312 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12523 | { 312 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12524 | { 312 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12525 | { 312 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12526 | { 312 /* if */, Hexagon::V6_vS32b_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12527 | { 312 /* if */, Hexagon::V6_vS32b_nt_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12528 | { 312 /* if */, Hexagon::V6_vS32b_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12529 | { 312 /* if */, Hexagon::V6_vL32b_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12530 | { 312 /* if */, Hexagon::V6_vL32b_cur_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12531 | { 312 /* if */, Hexagon::V6_vL32b_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12532 | { 312 /* if */, Hexagon::V6_vL32b_tmp_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 12533 | { 312 /* if */, Hexagon::V6_vL32b_nt_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12534 | { 312 /* if */, Hexagon::V6_vL32b_nt_npred_ppu, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12535 | { 312 /* if */, Hexagon::S4_pstorerbnewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12536 | { 312 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12537 | { 312 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12538 | { 312 /* if */, Hexagon::S4_pstorerffnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12539 | { 312 /* if */, Hexagon::S4_pstorerhnewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12540 | { 312 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12541 | { 312 /* if */, Hexagon::S4_pstorerinewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12542 | { 312 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12543 | { 312 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
| 12544 | { 312 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12545 | { 312 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12546 | { 312 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
| 12547 | { 312 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
| 12548 | { 312 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
| 12549 | { 312 /* if */, Hexagon::J4_cmpeq_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12550 | { 312 /* if */, Hexagon::J4_cmpeq_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12551 | { 312 /* if */, Hexagon::J4_cmpgt_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12552 | { 312 /* if */, Hexagon::J4_cmpgt_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12553 | { 312 /* if */, Hexagon::J4_cmplt_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12554 | { 312 /* if */, Hexagon::J4_cmplt_t_jumpnv_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12555 | { 312 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12556 | { 312 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12557 | { 312 /* if */, Hexagon::J4_cmpltu_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12558 | { 312 /* if */, Hexagon::J4_cmpltu_t_jumpnv_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12559 | { 312 /* if */, Hexagon::V6_vS32b_nt_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12560 | { 312 /* if */, Hexagon::V6_vscattermhwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
| 12561 | { 312 /* if */, Hexagon::V6_vscattermhwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12562 | { 312 /* if */, Hexagon::V6_vscattermhq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
| 12563 | { 312 /* if */, Hexagon::V6_vscattermhq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 12564 | { 312 /* if */, Hexagon::V6_vscattermwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR }, }, |
| 12565 | { 312 /* if */, Hexagon::V6_vscattermwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 12566 | { 312 /* if */, Hexagon::S2_pstorerbnewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12567 | { 312 /* if */, Hexagon::S4_pstorerbt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12568 | { 312 /* if */, Hexagon::S4_pstorerdt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12569 | { 312 /* if */, Hexagon::S2_pstorerft_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12570 | { 312 /* if */, Hexagon::S2_pstorerhnewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12571 | { 312 /* if */, Hexagon::S4_pstorerht_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12572 | { 312 /* if */, Hexagon::S2_pstorerinewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12573 | { 312 /* if */, Hexagon::S4_pstorerit_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12574 | { 312 /* if */, Hexagon::V6_vS32b_nt_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12575 | { 312 /* if */, Hexagon::V6_vS32b_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12576 | { 312 /* if */, Hexagon::L4_ploadrdt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12577 | { 312 /* if */, Hexagon::L4_ploadrbt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12578 | { 312 /* if */, Hexagon::L4_ploadrht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12579 | { 312 /* if */, Hexagon::L4_ploadrubt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12580 | { 312 /* if */, Hexagon::L4_ploadruht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12581 | { 312 /* if */, Hexagon::L4_ploadrit_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12582 | { 312 /* if */, Hexagon::V6_vL32b_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12583 | { 312 /* if */, Hexagon::V6_vL32b_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12584 | { 312 /* if */, Hexagon::V6_vL32b_nt_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12585 | { 312 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12586 | { 312 /* if */, Hexagon::S2_pstorerbtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12587 | { 312 /* if */, Hexagon::S2_pstorerdtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12588 | { 312 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12589 | { 312 /* if */, Hexagon::S2_pstorerhtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12590 | { 312 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12591 | { 312 /* if */, Hexagon::S2_pstoreritnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12592 | { 312 /* if */, Hexagon::L4_return_tnew_pnt, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__COLON_, MCK_raw }, }, |
| 12593 | { 312 /* if */, Hexagon::L4_return_tnew_pt, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_t, MCK__COLON_, MCK_raw }, }, |
| 12594 | { 312 /* if */, Hexagon::L2_ploadrdtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
| 12595 | { 312 /* if */, Hexagon::L2_ploadrbtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12596 | { 312 /* if */, Hexagon::L2_ploadrhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12597 | { 312 /* if */, Hexagon::L2_ploadrubtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12598 | { 312 /* if */, Hexagon::L2_ploadruhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12599 | { 312 /* if */, Hexagon::L2_ploadritnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 12600 | { 312 /* if */, Hexagon::J4_cmpeq_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12601 | { 312 /* if */, Hexagon::J4_cmpeq_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12602 | { 312 /* if */, Hexagon::J4_cmpgt_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12603 | { 312 /* if */, Hexagon::J4_cmpgt_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12604 | { 312 /* if */, Hexagon::J4_cmplt_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12605 | { 312 /* if */, Hexagon::J4_cmplt_f_jumpnv_t, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12606 | { 312 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12607 | { 312 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12608 | { 312 /* if */, Hexagon::J4_cmpltu_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12609 | { 312 /* if */, Hexagon::J4_cmpltu_f_jumpnv_t, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12610 | { 312 /* if */, Hexagon::V6_vS32b_nt_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12611 | { 312 /* if */, Hexagon::S2_pstorerbnewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12612 | { 312 /* if */, Hexagon::S4_pstorerbf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12613 | { 312 /* if */, Hexagon::S4_pstorerdf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12614 | { 312 /* if */, Hexagon::S2_pstorerff_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12615 | { 312 /* if */, Hexagon::S2_pstorerhnewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12616 | { 312 /* if */, Hexagon::S4_pstorerhf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12617 | { 312 /* if */, Hexagon::S2_pstorerinewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12618 | { 312 /* if */, Hexagon::S4_pstorerif_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12619 | { 312 /* if */, Hexagon::V6_vS32b_nt_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 12620 | { 312 /* if */, Hexagon::V6_vS32b_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12621 | { 312 /* if */, Hexagon::L4_ploadrdf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12622 | { 312 /* if */, Hexagon::L4_ploadrbf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12623 | { 312 /* if */, Hexagon::L4_ploadrhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12624 | { 312 /* if */, Hexagon::L4_ploadrubf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12625 | { 312 /* if */, Hexagon::L4_ploadruhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12626 | { 312 /* if */, Hexagon::L4_ploadrif_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12627 | { 312 /* if */, Hexagon::V6_vL32b_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12628 | { 312 /* if */, Hexagon::V6_vL32b_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 12629 | { 312 /* if */, Hexagon::V6_vL32b_nt_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12630 | { 312 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12631 | { 312 /* if */, Hexagon::S2_pstorerbfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12632 | { 312 /* if */, Hexagon::S2_pstorerdfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12633 | { 312 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12634 | { 312 /* if */, Hexagon::S2_pstorerhfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12635 | { 312 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12636 | { 312 /* if */, Hexagon::S2_pstorerifnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12637 | { 312 /* if */, Hexagon::L4_return_fnew_pnt, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__COLON_, MCK_raw }, }, |
| 12638 | { 312 /* if */, Hexagon::L4_return_fnew_pt, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_t, MCK__COLON_, MCK_raw }, }, |
| 12639 | { 312 /* if */, Hexagon::L2_ploadrdfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
| 12640 | { 312 /* if */, Hexagon::L2_ploadrbfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12641 | { 312 /* if */, Hexagon::L2_ploadrhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12642 | { 312 /* if */, Hexagon::L2_ploadrubfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 12643 | { 312 /* if */, Hexagon::L2_ploadruhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
| 12644 | { 312 /* if */, Hexagon::L2_ploadrifnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
| 12645 | { 312 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_nt, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12646 | { 312 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_t, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12647 | { 312 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12648 | { 312 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12649 | { 312 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_nt, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12650 | { 312 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_t, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12651 | { 312 /* if */, Hexagon::J4_cmpgti_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12652 | { 312 /* if */, Hexagon::J4_cmpgti_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12653 | { 312 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12654 | { 312 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12655 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12656 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12657 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12658 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12659 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12660 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12661 | { 312 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12662 | { 312 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12663 | { 312 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12664 | { 312 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12665 | { 312 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_nt, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12666 | { 312 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_t, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12667 | { 312 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12668 | { 312 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12669 | { 312 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_nt, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12670 | { 312 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_t, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12671 | { 312 /* if */, Hexagon::J4_cmpgti_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12672 | { 312 /* if */, Hexagon::J4_cmpgti_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12673 | { 312 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12674 | { 312 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12675 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12676 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12677 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12678 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12679 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12680 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12681 | { 312 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12682 | { 312 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12683 | { 312 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12684 | { 312 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12685 | { 312 /* if */, Hexagon::V6_vgathermhwq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h }, }, |
| 12686 | { 312 /* if */, Hexagon::V6_vgathermhq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h }, }, |
| 12687 | { 312 /* if */, Hexagon::V6_vgathermwq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_w, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w }, }, |
| 12688 | { 312 /* if */, Hexagon::S4_pstorerbnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12689 | { 312 /* if */, Hexagon::S4_pstorerft_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12690 | { 312 /* if */, Hexagon::S4_pstorerhnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12691 | { 312 /* if */, Hexagon::S4_pstorerinewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12692 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12693 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12694 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12695 | { 312 /* if */, Hexagon::S2_pstorerbnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12696 | { 312 /* if */, Hexagon::S4_pstorerbtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12697 | { 312 /* if */, Hexagon::S4_pstorerdtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12698 | { 312 /* if */, Hexagon::S2_pstorerftnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12699 | { 312 /* if */, Hexagon::S2_pstorerhnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12700 | { 312 /* if */, Hexagon::S4_pstorerhtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12701 | { 312 /* if */, Hexagon::S2_pstorerinewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12702 | { 312 /* if */, Hexagon::S4_pstoreritnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12703 | { 312 /* if */, Hexagon::L4_ploadrdtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12704 | { 312 /* if */, Hexagon::L4_ploadrbtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12705 | { 312 /* if */, Hexagon::L4_ploadrhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12706 | { 312 /* if */, Hexagon::L4_ploadrubtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12707 | { 312 /* if */, Hexagon::L4_ploadruhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12708 | { 312 /* if */, Hexagon::L4_ploadritnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12709 | { 312 /* if */, Hexagon::S4_pstorerbnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12710 | { 312 /* if */, Hexagon::S4_pstorerff_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12711 | { 312 /* if */, Hexagon::S4_pstorerhnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12712 | { 312 /* if */, Hexagon::S4_pstorerinewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12713 | { 312 /* if */, Hexagon::V6_vS32b_nt_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 12714 | { 312 /* if */, Hexagon::V6_vL32b_nt_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12715 | { 312 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
| 12716 | { 312 /* if */, Hexagon::S2_pstorerbnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12717 | { 312 /* if */, Hexagon::S4_pstorerbfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12718 | { 312 /* if */, Hexagon::S4_pstorerdfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12719 | { 312 /* if */, Hexagon::S2_pstorerffnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12720 | { 312 /* if */, Hexagon::S2_pstorerhnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12721 | { 312 /* if */, Hexagon::S4_pstorerhfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12722 | { 312 /* if */, Hexagon::S2_pstorerinewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12723 | { 312 /* if */, Hexagon::S4_pstorerifnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12724 | { 312 /* if */, Hexagon::L4_ploadrdfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12725 | { 312 /* if */, Hexagon::L4_ploadrbfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12726 | { 312 /* if */, Hexagon::L4_ploadrhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12727 | { 312 /* if */, Hexagon::L4_ploadrubfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12728 | { 312 /* if */, Hexagon::L4_ploadruhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12729 | { 312 /* if */, Hexagon::L4_ploadrifnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
| 12730 | { 312 /* if */, Hexagon::S4_pstorerbnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12731 | { 312 /* if */, Hexagon::S4_pstorerftnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12732 | { 312 /* if */, Hexagon::S4_pstorerhnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12733 | { 312 /* if */, Hexagon::S4_pstorerinewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12734 | { 312 /* if */, Hexagon::S4_pstorerbnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12735 | { 312 /* if */, Hexagon::S4_pstorerffnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12736 | { 312 /* if */, Hexagon::S4_pstorerhnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12737 | { 312 /* if */, Hexagon::S4_pstorerinewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12738 | { 315 /* immext */, Hexagon::A4_ext, Convert__u26_6Imm1_3, AMFBS_None, { MCK_immext, MCK__40_, MCK__HASH_, MCK_u26_6Imm, MCK__41_ }, }, |
| 12739 | { 322 /* isync */, Hexagon::Y2_isync, Convert_NoOperands, AMFBS_None, { MCK_isync }, }, |
| 12740 | { 328 /* jump */, Hexagon::J2_jump, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
| 12741 | { 328 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
| 12742 | { 328 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
| 12743 | { 328 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
| 12744 | { 328 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
| 12745 | { 333 /* jumpr */, Hexagon::J2_jumpr, Convert__Reg1_1, AMFBS_None, { MCK_jumpr, MCK_IntRegs }, }, |
| 12746 | { 339 /* jumprh */, Hexagon::J2_jumprh, Convert__Reg1_1, AMFBS_HasV73, { MCK_jumprh, MCK_IntRegs }, }, |
| 12747 | { 346 /* k0lock */, Hexagon::Y2_k0lock, Convert_NoOperands, AMFBS_None, { MCK_k0lock }, }, |
| 12748 | { 353 /* k0unlock */, Hexagon::Y2_k0unlock, Convert_NoOperands, AMFBS_None, { MCK_k0unlock }, }, |
| 12749 | { 362 /* l2cleanidx */, Hexagon::Y5_l2cleanidx, Convert__Reg1_2, AMFBS_None, { MCK_l2cleanidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12750 | { 373 /* l2cleaninvidx */, Hexagon::Y2_l2cleaninvidx, Convert__Reg1_2, AMFBS_None, { MCK_l2cleaninvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12751 | { 387 /* l2fetch */, Hexagon::Y5_l2fetch, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
| 12752 | { 387 /* l2fetch */, Hexagon::Y4_l2fetch, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12753 | { 395 /* l2gclean */, Hexagon::Y5_l2gclean, Convert_NoOperands, AMFBS_None, { MCK_l2gclean }, }, |
| 12754 | { 395 /* l2gclean */, Hexagon::Y6_l2gcleanpa, Convert__Reg1_2, AMFBS_None, { MCK_l2gclean, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 12755 | { 404 /* l2gcleaninv */, Hexagon::Y5_l2gcleaninv, Convert_NoOperands, AMFBS_None, { MCK_l2gcleaninv }, }, |
| 12756 | { 404 /* l2gcleaninv */, Hexagon::Y6_l2gcleaninvpa, Convert__Reg1_2, AMFBS_None, { MCK_l2gcleaninv, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
| 12757 | { 416 /* l2gunlock */, Hexagon::Y5_l2gunlock, Convert_NoOperands, AMFBS_None, { MCK_l2gunlock }, }, |
| 12758 | { 426 /* l2invidx */, Hexagon::Y5_l2invidx, Convert__Reg1_2, AMFBS_None, { MCK_l2invidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12759 | { 435 /* l2kill */, Hexagon::Y2_l2kill, Convert_NoOperands, AMFBS_None, { MCK_l2kill }, }, |
| 12760 | { 442 /* l2tagw */, Hexagon::Y4_l2tagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2tagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
| 12761 | { 449 /* l2unlocka */, Hexagon::Y5_l2unlocka, Convert__Reg1_2, AMFBS_None, { MCK_l2unlocka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12762 | { 459 /* loop0 */, Hexagon::J2_loop0r, Convert__b30_2Imm1_2__Reg1_3, AMFBS_None, { MCK_loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
| 12763 | { 459 /* loop0 */, Hexagon::J2_loop0i, Convert__b30_2Imm1_2__u10_0Imm1_4, AMFBS_None, { MCK_loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 12764 | { 465 /* loop1 */, Hexagon::J2_loop1r, Convert__b30_2Imm1_2__Reg1_3, AMFBS_None, { MCK_loop1, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
| 12765 | { 465 /* loop1 */, Hexagon::J2_loop1i, Convert__b30_2Imm1_2__u10_0Imm1_4, AMFBS_None, { MCK_loop1, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 12766 | { 471 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12767 | { 471 /* memb */, Hexagon::PS_storerbabs, Convert__u32_0Imm1_3__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12768 | { 471 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12769 | { 471 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12770 | { 471 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12771 | { 471 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12772 | { 471 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12773 | { 471 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12774 | { 471 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12775 | { 471 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12776 | { 471 /* memb */, Hexagon::PS_storerbnewabs, Convert__u32_0Imm1_3__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12777 | { 471 /* memb */, Hexagon::S2_storerbgp, Convert__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12778 | { 471 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12779 | { 471 /* memb */, Hexagon::S2_storerb_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12780 | { 471 /* memb */, Hexagon::S4_storerb_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12781 | { 471 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12782 | { 471 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12783 | { 471 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12784 | { 471 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12785 | { 471 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12786 | { 471 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12787 | { 471 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12788 | { 471 /* memb */, Hexagon::S2_storerb_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12789 | { 471 /* memb */, Hexagon::S2_storerbnewgp, Convert__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12790 | { 471 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12791 | { 471 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12792 | { 471 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12793 | { 471 /* memb */, Hexagon::S2_storerbnew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12794 | { 471 /* memb */, Hexagon::S2_storerb_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12795 | { 471 /* memb */, Hexagon::S4_storerbnew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12796 | { 471 /* memb */, Hexagon::S2_storerbnew_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12797 | { 471 /* memb */, Hexagon::S4_storerb_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12798 | { 471 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12799 | { 471 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12800 | { 471 /* memb */, Hexagon::S2_storerbnew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12801 | { 471 /* memb */, Hexagon::S4_storerb_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12802 | { 471 /* memb */, Hexagon::S2_storerb_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12803 | { 471 /* memb */, Hexagon::S4_storerbnew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12804 | { 471 /* memb */, Hexagon::S2_storerb_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12805 | { 471 /* memb */, Hexagon::S4_storerbnew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12806 | { 471 /* memb */, Hexagon::S2_storerbnew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12807 | { 471 /* memb */, Hexagon::S2_storerbnew_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12808 | { 476 /* memcpy */, Hexagon::L6_memcpy, Convert__Reg1_2__Reg1_3__Reg1_4, AMFBS_HasV66, { MCK_memcpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK_ModRegs, MCK__41_ }, }, |
| 12809 | { 483 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12810 | { 483 /* memd */, Hexagon::PS_storerdabs, Convert__u29_3Imm1_3__Reg1_6, AMFBS_None, { MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12811 | { 483 /* memd */, Hexagon::S2_storerdgp, Convert__u29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12812 | { 483 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__s29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12813 | { 483 /* memd */, Hexagon::S2_storerd_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12814 | { 483 /* memd */, Hexagon::S4_storerd_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12815 | { 483 /* memd */, Hexagon::S2_storerd_pi, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12816 | { 483 /* memd */, Hexagon::S2_storerd_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12817 | { 483 /* memd */, Hexagon::S4_storerd_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12818 | { 483 /* memd */, Hexagon::S4_storerd_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12819 | { 483 /* memd */, Hexagon::S2_storerd_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12820 | { 483 /* memd */, Hexagon::S2_storerd_pci, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12821 | { 488 /* memd_locked */, Hexagon::S4_stored_locked, Convert__Reg1_3__Reg1_2__Reg1_6, AMFBS_None, { MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
| 12822 | { 500 /* memd_rl */, Hexagon::S4_stored_rl_at_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memd_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at, MCK__61_, MCK_DoubleRegs }, }, |
| 12823 | { 500 /* memd_rl */, Hexagon::S4_stored_rl_st_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memd_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st, MCK__61_, MCK_DoubleRegs }, }, |
| 12824 | { 508 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12825 | { 508 /* memh */, Hexagon::PS_storerhabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12826 | { 508 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12827 | { 508 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12828 | { 508 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12829 | { 508 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12830 | { 508 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12831 | { 508 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12832 | { 508 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12833 | { 508 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12834 | { 508 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12835 | { 508 /* memh */, Hexagon::PS_storerfabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12836 | { 508 /* memh */, Hexagon::PS_storerhnewabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12837 | { 508 /* memh */, Hexagon::S2_storerhgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12838 | { 508 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12839 | { 508 /* memh */, Hexagon::S2_storerh_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12840 | { 508 /* memh */, Hexagon::S4_storerh_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12841 | { 508 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12842 | { 508 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12843 | { 508 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12844 | { 508 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12845 | { 508 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12846 | { 508 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12847 | { 508 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12848 | { 508 /* memh */, Hexagon::S2_storerh_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12849 | { 508 /* memh */, Hexagon::S2_storerfgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12850 | { 508 /* memh */, Hexagon::S2_storerhnewgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12851 | { 508 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12852 | { 508 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12853 | { 508 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12854 | { 508 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12855 | { 508 /* memh */, Hexagon::S2_storerf_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12856 | { 508 /* memh */, Hexagon::S2_storerhnew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12857 | { 508 /* memh */, Hexagon::S2_storerh_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12858 | { 508 /* memh */, Hexagon::S4_storerf_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12859 | { 508 /* memh */, Hexagon::S4_storerhnew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12860 | { 508 /* memh */, Hexagon::S2_storerf_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12861 | { 508 /* memh */, Hexagon::S2_storerhnew_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12862 | { 508 /* memh */, Hexagon::S4_storerh_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12863 | { 508 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12864 | { 508 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12865 | { 508 /* memh */, Hexagon::S2_storerf_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12866 | { 508 /* memh */, Hexagon::S2_storerhnew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12867 | { 508 /* memh */, Hexagon::S4_storerh_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12868 | { 508 /* memh */, Hexagon::S2_storerh_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12869 | { 508 /* memh */, Hexagon::S4_storerf_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12870 | { 508 /* memh */, Hexagon::S4_storerhnew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12871 | { 508 /* memh */, Hexagon::S2_storerh_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12872 | { 508 /* memh */, Hexagon::S4_storerf_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12873 | { 508 /* memh */, Hexagon::S4_storerhnew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12874 | { 508 /* memh */, Hexagon::S2_storerf_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12875 | { 508 /* memh */, Hexagon::S2_storerhnew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12876 | { 508 /* memh */, Hexagon::S2_storerf_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
| 12877 | { 508 /* memh */, Hexagon::S2_storerhnew_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12878 | { 513 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12879 | { 513 /* memw */, Hexagon::PS_storeriabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12880 | { 513 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12881 | { 513 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12882 | { 513 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12883 | { 513 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12884 | { 513 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12885 | { 513 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12886 | { 513 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12887 | { 513 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12888 | { 513 /* memw */, Hexagon::PS_storerinewabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12889 | { 513 /* memw */, Hexagon::S2_storerigp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12890 | { 513 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__s30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12891 | { 513 /* memw */, Hexagon::S2_storeri_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12892 | { 513 /* memw */, Hexagon::S4_storeri_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12893 | { 513 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12894 | { 513 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12895 | { 513 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
| 12896 | { 513 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
| 12897 | { 513 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
| 12898 | { 513 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
| 12899 | { 513 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
| 12900 | { 513 /* memw */, Hexagon::S2_storeri_pi, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12901 | { 513 /* memw */, Hexagon::S2_storerinewgp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12902 | { 513 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__s30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12903 | { 513 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12904 | { 513 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
| 12905 | { 513 /* memw */, Hexagon::S2_storerinew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12906 | { 513 /* memw */, Hexagon::S2_storeri_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12907 | { 513 /* memw */, Hexagon::S4_storerinew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12908 | { 513 /* memw */, Hexagon::S2_storerinew_pi, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12909 | { 513 /* memw */, Hexagon::S4_storeri_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12910 | { 513 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12911 | { 513 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
| 12912 | { 513 /* memw */, Hexagon::S2_storerinew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12913 | { 513 /* memw */, Hexagon::S4_storeri_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12914 | { 513 /* memw */, Hexagon::S2_storeri_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12915 | { 513 /* memw */, Hexagon::S4_storerinew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12916 | { 513 /* memw */, Hexagon::S2_storeri_pci, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12917 | { 513 /* memw */, Hexagon::S4_storerinew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12918 | { 513 /* memw */, Hexagon::S2_storerinew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12919 | { 513 /* memw */, Hexagon::S2_storerinew_pci, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
| 12920 | { 518 /* memw_locked */, Hexagon::S2_storew_locked, Convert__Reg1_3__Reg1_2__Reg1_6, AMFBS_None, { MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
| 12921 | { 530 /* memw_rl */, Hexagon::S2_storew_rl_at_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memw_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at, MCK__61_, MCK_IntRegs }, }, |
| 12922 | { 530 /* memw_rl */, Hexagon::S2_storew_rl_st_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memw_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st, MCK__61_, MCK_IntRegs }, }, |
| 12923 | { 538 /* nmi */, Hexagon::Y4_nmi, Convert__Reg1_2, AMFBS_None, { MCK_nmi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 12924 | { 542 /* nop */, Hexagon::A2_nop, Convert_NoOperands, AMFBS_None, { MCK_nop }, }, |
| 12925 | { 546 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_nt, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12926 | { 546 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_t, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12927 | { 546 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12928 | { 546 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12929 | { 546 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12930 | { 546 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12931 | { 546 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12932 | { 546 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12933 | { 546 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_nt, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12934 | { 546 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_t, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12935 | { 546 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12936 | { 546 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12937 | { 546 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12938 | { 546 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12939 | { 546 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12940 | { 546 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12941 | { 546 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12942 | { 546 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12943 | { 546 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12944 | { 546 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12945 | { 546 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12946 | { 546 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12947 | { 546 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12948 | { 546 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12949 | { 546 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12950 | { 546 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12951 | { 546 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12952 | { 546 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12953 | { 546 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12954 | { 546 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12955 | { 546 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12956 | { 546 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12957 | { 546 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12958 | { 546 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12959 | { 546 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12960 | { 546 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12961 | { 549 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_nt, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12962 | { 549 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_t, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12963 | { 549 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12964 | { 549 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12965 | { 549 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12966 | { 549 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12967 | { 549 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12968 | { 549 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12969 | { 549 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_nt, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12970 | { 549 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_t, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12971 | { 549 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12972 | { 549 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12973 | { 549 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12974 | { 549 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12975 | { 549 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12976 | { 549 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12977 | { 549 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12978 | { 549 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12979 | { 549 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12980 | { 549 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12981 | { 549 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12982 | { 549 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12983 | { 549 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12984 | { 549 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12985 | { 549 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12986 | { 549 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12987 | { 549 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12988 | { 549 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12989 | { 549 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12990 | { 549 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12991 | { 549 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12992 | { 549 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12993 | { 549 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12994 | { 549 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12995 | { 549 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
| 12996 | { 549 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
| 12997 | { 552 /* p3 */, Hexagon::J2_ploop1sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
| 12998 | { 552 /* p3 */, Hexagon::J2_ploop2sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
| 12999 | { 552 /* p3 */, Hexagon::J2_ploop3sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
| 13000 | { 552 /* p3 */, Hexagon::J2_ploop1si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 13001 | { 552 /* p3 */, Hexagon::J2_ploop2si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 13002 | { 552 /* p3 */, Hexagon::J2_ploop3si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 13003 | { 555 /* pause */, Hexagon::J2_pause, Convert__u10_0Imm1_3, AMFBS_None, { MCK_pause, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
| 13004 | { 561 /* release */, Hexagon::R6_release_at_vi, Convert__Reg1_2, AMFBS_HasV68, { MCK_release, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at }, }, |
| 13005 | { 561 /* release */, Hexagon::R6_release_st_vi, Convert__Reg1_2, AMFBS_HasV68, { MCK_release, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st }, }, |
| 13006 | { 569 /* resume */, Hexagon::Y2_resume, Convert__Reg1_2, AMFBS_None, { MCK_resume, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13007 | { 576 /* rte */, Hexagon::J2_rte, Convert_NoOperands, AMFBS_None, { MCK_rte }, }, |
| 13008 | { 580 /* setimask */, Hexagon::Y2_setimask, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_setimask, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__41_ }, }, |
| 13009 | { 589 /* setprio */, Hexagon::Y2_setprio, Convert__Reg1_2__Reg1_3, AMFBS_HasV66, { MCK_setprio, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__41_ }, }, |
| 13010 | { 597 /* siad */, Hexagon::Y4_siad, Convert__Reg1_2, AMFBS_None, { MCK_siad, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13011 | { 602 /* start */, Hexagon::Y2_start, Convert__Reg1_2, AMFBS_None, { MCK_start, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13012 | { 608 /* stop */, Hexagon::Y2_stop, Convert__Reg1_2, AMFBS_None, { MCK_stop, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13013 | { 613 /* swi */, Hexagon::Y2_swi, Convert__Reg1_2, AMFBS_None, { MCK_swi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13014 | { 617 /* syncht */, Hexagon::Y2_syncht, Convert_NoOperands, AMFBS_None, { MCK_syncht }, }, |
| 13015 | { 624 /* tlbinvasid */, Hexagon::Y5_tlbasidi, Convert__Reg1_2, AMFBS_None, { MCK_tlbinvasid, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13016 | { 635 /* tlblock */, Hexagon::Y2_tlblock, Convert_NoOperands, AMFBS_None, { MCK_tlblock }, }, |
| 13017 | { 643 /* tlbunlock */, Hexagon::Y2_tlbunlock, Convert_NoOperands, AMFBS_None, { MCK_tlbunlock }, }, |
| 13018 | { 653 /* tlbw */, Hexagon::Y2_tlbw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_tlbw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
| 13019 | { 658 /* trace */, Hexagon::Y4_trace, Convert__Reg1_2, AMFBS_None, { MCK_trace, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13020 | { 664 /* trap0 */, Hexagon::J2_trap0, Convert__u8_0Imm1_3, AMFBS_None, { MCK_trap0, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 13021 | { 670 /* trap1 */, Hexagon::PS_trap1, Convert__u8_0Imm1_3, AMFBS_HasPreV65, { MCK_trap1, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 13022 | { 670 /* trap1 */, Hexagon::J2_trap1, Convert__regR0__Tie0_0_0__u8_0Imm1_3, AMFBS_None, { MCK_trap1, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 13023 | { 670 /* trap1 */, Hexagon::J2_trap1, Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4, AMFBS_HasV65, { MCK_trap1, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
| 13024 | { 676 /* unpause */, Hexagon::J2_unpause, Convert_NoOperands, AMFBS_HasV73, { MCK_unpause }, }, |
| 13025 | { 684 /* vdeal */, Hexagon::V6_vdeal, Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, AMFBS_UseHVXV60, { MCK_vdeal, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 13026 | { 690 /* vhist */, Hexagon::V6_vhist, Convert_NoOperands, AMFBS_UseHVXV60, { MCK_vhist }, }, |
| 13027 | { 690 /* vhist */, Hexagon::V6_vhistq, Convert__Reg1_2, AMFBS_UseHVXV60, { MCK_vhist, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 13028 | { 696 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13029 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__imm_95_0__Reg1_7, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 13030 | { 696 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13031 | { 696 /* vmem */, Hexagon::V6_vS32b_srls_ai, Convert__Reg1_2__s4_0Imm1_5, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
| 13032 | { 696 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13033 | { 696 /* vmem */, Hexagon::V6_vS32b_srls_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
| 13034 | { 696 /* vmem */, Hexagon::V6_vS32b_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13035 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__imm_95_0__Reg1_7, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13036 | { 696 /* vmem */, Hexagon::V6_vS32b_srls_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
| 13037 | { 696 /* vmem */, Hexagon::V6_vS32b_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13038 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 13039 | { 696 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13040 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 13041 | { 696 /* vmem */, Hexagon::V6_vS32b_new_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13042 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
| 13043 | { 696 /* vmem */, Hexagon::V6_vS32b_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13044 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13045 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_new_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13046 | { 696 /* vmem */, Hexagon::V6_vS32b_nt_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
| 13047 | { 701 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13048 | { 701 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13049 | { 701 /* vmemu */, Hexagon::V6_vS32Ub_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13050 | { 701 /* vmemu */, Hexagon::V6_vS32Ub_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
| 13051 | { 707 /* vscatter */, Hexagon::V6_vscattermhw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
| 13052 | { 707 /* vscatter */, Hexagon::V6_vscattermhw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 13053 | { 707 /* vscatter */, Hexagon::V6_vscattermh, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
| 13054 | { 707 /* vscatter */, Hexagon::V6_vscattermh, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 13055 | { 707 /* vscatter */, Hexagon::V6_vscattermw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR }, }, |
| 13056 | { 707 /* vscatter */, Hexagon::V6_vscattermw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 13057 | { 707 /* vscatter */, Hexagon::V6_vscattermhw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 13058 | { 707 /* vscatter */, Hexagon::V6_vscattermhw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
| 13059 | { 707 /* vscatter */, Hexagon::V6_vscattermh_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
| 13060 | { 707 /* vscatter */, Hexagon::V6_vscattermh_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
| 13061 | { 707 /* vscatter */, Hexagon::V6_vscattermw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
| 13062 | { 707 /* vscatter */, Hexagon::V6_vscattermw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
| 13063 | { 716 /* vshuff */, Hexagon::V6_vshuff, Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, AMFBS_UseHVXV60, { MCK_vshuff, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 13064 | { 723 /* vtmp */, Hexagon::V6_vgathermhw, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h }, }, |
| 13065 | { 723 /* vtmp */, Hexagon::V6_vgathermh, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h }, }, |
| 13066 | { 723 /* vtmp */, Hexagon::V6_vgathermw, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_w, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w }, }, |
| 13067 | { 728 /* vtrans2x2 */, Hexagon::V6_vshuff, Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4, AMFBS_UseHVX, { MCK_vtrans2x2, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
| 13068 | { 738 /* vwhist128 */, Hexagon::V6_vwhist128, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist128 }, }, |
| 13069 | { 738 /* vwhist128 */, Hexagon::V6_vwhist128q, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 13070 | { 738 /* vwhist128 */, Hexagon::V6_vwhist128m, Convert__u1_0Imm1_3, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 13071 | { 738 /* vwhist128 */, Hexagon::V6_vwhist128qm, Convert__Reg1_2__u1_0Imm1_4, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK_HvxQR, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
| 13072 | { 748 /* vwhist256 */, Hexagon::V6_vwhist256, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist256 }, }, |
| 13073 | { 748 /* vwhist256 */, Hexagon::V6_vwhist256_sat, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__COLON_, MCK_sat }, }, |
| 13074 | { 748 /* vwhist256 */, Hexagon::V6_vwhist256q, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
| 13075 | { 748 /* vwhist256 */, Hexagon::V6_vwhist256q_sat, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__40_, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
| 13076 | { 758 /* wait */, Hexagon::Y2_wait, Convert__Reg1_2, AMFBS_HasV65, { MCK_wait, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13077 | { 763 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
| 13078 | { 763 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
| 13079 | { 763 /* z */, Hexagon::V6_zLd_ppu, Convert__Reg1_4__Tie0_0_0__Reg1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
| 13080 | { 763 /* z */, Hexagon::V6_zLd_pi, Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
| 13081 | }; |
| 13082 | |
| 13083 | #include "llvm/Support/Debug.h" |
| 13084 | #include "llvm/Support/Format.h" |
| 13085 | |
| 13086 | unsigned HexagonAsmParser:: |
| 13087 | MatchInstructionImpl(const OperandVector &Operands, |
| 13088 | MCInst &Inst, |
| 13089 | uint64_t &ErrorInfo, |
| 13090 | FeatureBitset &MissingFeatures, |
| 13091 | bool matchingInlineAsm, unsigned VariantID) { |
| 13092 | // Eliminate obvious mismatches. |
| 13093 | if (Operands.size() > 24) { |
| 13094 | ErrorInfo = 24; |
| 13095 | return Match_InvalidOperand; |
| 13096 | } |
| 13097 | |
| 13098 | // Get the current feature set. |
| 13099 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
| 13100 | |
| 13101 | // Get the instruction mnemonic, which is the first token. |
| 13102 | StringRef Mnemonic; |
| 13103 | if (Operands[0]->isToken()) |
| 13104 | Mnemonic = ((HexagonOperand &)*Operands[0]).getToken(); |
| 13105 | |
| 13106 | // Some state to try to produce better error messages. |
| 13107 | bool HadMatchOtherThanFeatures = false; |
| 13108 | bool HadMatchOtherThanPredicate = false; |
| 13109 | unsigned RetCode = Match_InvalidOperand; |
| 13110 | MissingFeatures.set(); |
| 13111 | // Set ErrorInfo to the operand that mismatches if it is |
| 13112 | // wrong for all instances of the instruction. |
| 13113 | ErrorInfo = ~0ULL; |
| 13114 | // Find the appropriate table for this asm variant. |
| 13115 | const MatchEntry *Start, *End; |
| 13116 | switch (VariantID) { |
| 13117 | default: llvm_unreachable("invalid variant!" ); |
| 13118 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 13119 | } |
| 13120 | // Search the table. |
| 13121 | auto MnemonicRange = std::pair(Start, End); |
| 13122 | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
| 13123 | if (!Mnemonic.empty()) |
| 13124 | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
| 13125 | |
| 13126 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "AsmMatcher: found " << |
| 13127 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
| 13128 | " encodings with mnemonic '" << Mnemonic << "'\n" ); |
| 13129 | |
| 13130 | // Return a more specific error code if no mnemonics match. |
| 13131 | if (MnemonicRange.first == MnemonicRange.second) |
| 13132 | return Match_MnemonicFail; |
| 13133 | |
| 13134 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 13135 | it != ie; ++it) { |
| 13136 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
| 13137 | bool HasRequiredFeatures = |
| 13138 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
| 13139 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Trying to match opcode " |
| 13140 | << MII.getName(it->Opcode) << "\n" ); |
| 13141 | bool OperandsValid = true; |
| 13142 | for (unsigned FormalIdx = SIndex, ActualIdx = SIndex; FormalIdx != 24; ++FormalIdx) { |
| 13143 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
| 13144 | DEBUG_WITH_TYPE("asm-matcher" , |
| 13145 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
| 13146 | << " against actual operand at index " << ActualIdx); |
| 13147 | if (ActualIdx < Operands.size()) |
| 13148 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << " (" ; |
| 13149 | Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): " ); |
| 13150 | else |
| 13151 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << ": " ); |
| 13152 | if (ActualIdx >= Operands.size()) { |
| 13153 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "actual operand index out of range\n" ); |
| 13154 | if (Formal == InvalidMatchClass) { |
| 13155 | break; |
| 13156 | } |
| 13157 | if (isSubclass(Formal, OptionalMatchClass)) { |
| 13158 | continue; |
| 13159 | } |
| 13160 | OperandsValid = false; |
| 13161 | ErrorInfo = ActualIdx; |
| 13162 | break; |
| 13163 | } |
| 13164 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
| 13165 | unsigned Diag = validateOperandClass(Actual, Formal); |
| 13166 | if (Diag == Match_Success) { |
| 13167 | DEBUG_WITH_TYPE("asm-matcher" , |
| 13168 | dbgs() << "match success using generic matcher\n" ); |
| 13169 | ++ActualIdx; |
| 13170 | continue; |
| 13171 | } |
| 13172 | // If the generic handler indicates an invalid operand |
| 13173 | // failure, check for a special case. |
| 13174 | if (Diag != Match_Success) { |
| 13175 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
| 13176 | if (TargetDiag == Match_Success) { |
| 13177 | DEBUG_WITH_TYPE("asm-matcher" , |
| 13178 | dbgs() << "match success using target matcher\n" ); |
| 13179 | ++ActualIdx; |
| 13180 | continue; |
| 13181 | } |
| 13182 | // If the target matcher returned a specific error code use |
| 13183 | // that, else use the one from the generic matcher. |
| 13184 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
| 13185 | Diag = TargetDiag; |
| 13186 | } |
| 13187 | // If current formal operand wasn't matched and it is optional |
| 13188 | // then try to match next formal operand |
| 13189 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
| 13190 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "ignoring optional operand\n" ); |
| 13191 | continue; |
| 13192 | } |
| 13193 | // If this operand is broken for all of the instances of this |
| 13194 | // mnemonic, keep track of it so we can report loc info. |
| 13195 | // If we already had a match that only failed due to a |
| 13196 | // target predicate, that diagnostic is preferred. |
| 13197 | if (!HadMatchOtherThanPredicate && |
| 13198 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
| 13199 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
| 13200 | RetCode = Diag; |
| 13201 | ErrorInfo = ActualIdx; |
| 13202 | } |
| 13203 | // Otherwise, just reject this instance of the mnemonic. |
| 13204 | OperandsValid = false; |
| 13205 | break; |
| 13206 | } |
| 13207 | |
| 13208 | if (!OperandsValid) { |
| 13209 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Opcode result: multiple " |
| 13210 | "operand mismatches, ignoring " |
| 13211 | "this opcode\n" ); |
| 13212 | continue; |
| 13213 | } |
| 13214 | if (!HasRequiredFeatures) { |
| 13215 | HadMatchOtherThanFeatures = true; |
| 13216 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
| 13217 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Missing target features:" ; |
| 13218 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
| 13219 | if (NewMissingFeatures[I]) |
| 13220 | dbgs() << ' ' << I; |
| 13221 | dbgs() << "\n" ); |
| 13222 | if (NewMissingFeatures.count() <= |
| 13223 | MissingFeatures.count()) |
| 13224 | MissingFeatures = NewMissingFeatures; |
| 13225 | continue; |
| 13226 | } |
| 13227 | |
| 13228 | Inst.clear(); |
| 13229 | |
| 13230 | Inst.setOpcode(it->Opcode); |
| 13231 | // We have a potential match but have not rendered the operands. |
| 13232 | // Check the target predicate to handle any context sensitive |
| 13233 | // constraints. |
| 13234 | // For example, Ties that are referenced multiple times must be |
| 13235 | // checked here to ensure the input is the same for each match |
| 13236 | // constraints. If we leave it any later the ties will have been |
| 13237 | // canonicalized |
| 13238 | unsigned MatchResult; |
| 13239 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
| 13240 | Inst.clear(); |
| 13241 | DEBUG_WITH_TYPE( |
| 13242 | "asm-matcher" , |
| 13243 | dbgs() << "Early target match predicate failed with diag code " |
| 13244 | << MatchResult << "\n" ); |
| 13245 | RetCode = MatchResult; |
| 13246 | HadMatchOtherThanPredicate = true; |
| 13247 | continue; |
| 13248 | } |
| 13249 | |
| 13250 | if (matchingInlineAsm) { |
| 13251 | convertToMapAndConstraints(it->ConvertFn, Operands); |
| 13252 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 13253 | ErrorInfo)) |
| 13254 | return Match_InvalidTiedOperand; |
| 13255 | |
| 13256 | return Match_Success; |
| 13257 | } |
| 13258 | |
| 13259 | // We have selected a definite instruction, convert the parsed |
| 13260 | // operands into the appropriate MCInst. |
| 13261 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
| 13262 | |
| 13263 | // We have a potential match. Check the target predicate to |
| 13264 | // handle any context sensitive constraints. |
| 13265 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
| 13266 | DEBUG_WITH_TYPE("asm-matcher" , |
| 13267 | dbgs() << "Target match predicate failed with diag code " |
| 13268 | << MatchResult << "\n" ); |
| 13269 | Inst.clear(); |
| 13270 | RetCode = MatchResult; |
| 13271 | HadMatchOtherThanPredicate = true; |
| 13272 | continue; |
| 13273 | } |
| 13274 | |
| 13275 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
| 13276 | ErrorInfo)) |
| 13277 | return Match_InvalidTiedOperand; |
| 13278 | |
| 13279 | DEBUG_WITH_TYPE( |
| 13280 | "asm-matcher" , |
| 13281 | dbgs() << "Opcode result: complete match, selecting this opcode\n" ); |
| 13282 | return Match_Success; |
| 13283 | } |
| 13284 | |
| 13285 | // Okay, we had no match. Try to return a useful error code. |
| 13286 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
| 13287 | return RetCode; |
| 13288 | |
| 13289 | ErrorInfo = 0; |
| 13290 | return Match_MissingFeature; |
| 13291 | } |
| 13292 | |
| 13293 | #endif // GET_MATCHER_IMPLEMENTATION |
| 13294 | |
| 13295 | |
| 13296 | #ifdef GET_MNEMONIC_SPELL_CHECKER |
| 13297 | #undef GET_MNEMONIC_SPELL_CHECKER |
| 13298 | |
| 13299 | static std::string HexagonMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
| 13300 | const unsigned MaxEditDist = 2; |
| 13301 | std::vector<StringRef> Candidates; |
| 13302 | StringRef Prev = "" ; |
| 13303 | |
| 13304 | // Find the appropriate table for this asm variant. |
| 13305 | const MatchEntry *Start, *End; |
| 13306 | switch (VariantID) { |
| 13307 | default: llvm_unreachable("invalid variant!" ); |
| 13308 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 13309 | } |
| 13310 | |
| 13311 | for (auto I = Start; I < End; I++) { |
| 13312 | // Ignore unsupported instructions. |
| 13313 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
| 13314 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
| 13315 | continue; |
| 13316 | |
| 13317 | StringRef T = I->getMnemonic(); |
| 13318 | // Avoid recomputing the edit distance for the same string. |
| 13319 | if (T == Prev) |
| 13320 | continue; |
| 13321 | |
| 13322 | Prev = T; |
| 13323 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
| 13324 | if (Dist <= MaxEditDist) |
| 13325 | Candidates.push_back(T); |
| 13326 | } |
| 13327 | |
| 13328 | if (Candidates.empty()) |
| 13329 | return "" ; |
| 13330 | |
| 13331 | std::string Res = ", did you mean: " ; |
| 13332 | unsigned i = 0; |
| 13333 | for (; i < Candidates.size() - 1; i++) |
| 13334 | Res += Candidates[i].str() + ", " ; |
| 13335 | return Res + Candidates[i].str() + "?" ; |
| 13336 | } |
| 13337 | |
| 13338 | #endif // GET_MNEMONIC_SPELL_CHECKER |
| 13339 | |
| 13340 | |
| 13341 | #ifdef GET_MNEMONIC_CHECKER |
| 13342 | #undef GET_MNEMONIC_CHECKER |
| 13343 | |
| 13344 | static bool HexagonCheckMnemonic(StringRef Mnemonic, |
| 13345 | const FeatureBitset &AvailableFeatures, |
| 13346 | unsigned VariantID) { |
| 13347 | // Find the appropriate table for this asm variant. |
| 13348 | const MatchEntry *Start, *End; |
| 13349 | switch (VariantID) { |
| 13350 | default: llvm_unreachable("invalid variant!" ); |
| 13351 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
| 13352 | } |
| 13353 | |
| 13354 | // Search the table. |
| 13355 | auto MnemonicRange = std::pair(Start, End); |
| 13356 | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
| 13357 | if (!Mnemonic.empty()) |
| 13358 | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
| 13359 | |
| 13360 | if (MnemonicRange.first == MnemonicRange.second) |
| 13361 | return false; |
| 13362 | |
| 13363 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
| 13364 | it != ie; ++it) { |
| 13365 | const FeatureBitset &RequiredFeatures = |
| 13366 | FeatureBitsets[it->RequiredFeaturesIdx]; |
| 13367 | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
| 13368 | return true; |
| 13369 | } |
| 13370 | return false; |
| 13371 | } |
| 13372 | |
| 13373 | #endif // GET_MNEMONIC_CHECKER |
| 13374 | |
| 13375 | |