1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: LoongArch.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10
11#ifdef GET_ASSEMBLER_HEADER
12#undef GET_ASSEMBLER_HEADER
13 // This should be included into the middle of the declaration of
14 // your subclasses implementation of MCTargetAsmParser.
15 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
16 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
17 const OperandVector &Operands);
18 void convertToMapAndConstraints(unsigned Kind,
19 const OperandVector &Operands) override;
20 unsigned MatchInstructionImpl(const OperandVector &Operands,
21 MCInst &Inst,
22 uint64_t &ErrorInfo,
23 FeatureBitset &MissingFeatures,
24 bool matchingInlineAsm,
25 unsigned VariantID = 0);
26 unsigned MatchInstructionImpl(const OperandVector &Operands,
27 MCInst &Inst,
28 uint64_t &ErrorInfo,
29 bool matchingInlineAsm,
30 unsigned VariantID = 0) {
31 FeatureBitset MissingFeatures;
32 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
33 matchingInlineAsm, VariantID);
34 }
35
36 ParseStatus MatchOperandParserImpl(
37 OperandVector &Operands,
38 StringRef Mnemonic,
39 bool ParseForAllFeatures = false);
40 ParseStatus tryCustomParseOperand(
41 OperandVector &Operands,
42 unsigned MCK);
43
44#endif // GET_ASSEMBLER_HEADER
45
46
47#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
48#undef GET_OPERAND_DIAGNOSTIC_TYPES
49
50 Match_InvalidBareSymbol,
51 Match_InvalidImm32,
52 Match_InvalidImm64,
53 Match_InvalidSImm10,
54 Match_InvalidSImm10lsl2,
55 Match_InvalidSImm11lsl1,
56 Match_InvalidSImm12,
57 Match_InvalidSImm12addlike,
58 Match_InvalidSImm12lu52id,
59 Match_InvalidSImm13,
60 Match_InvalidSImm14lsl2,
61 Match_InvalidSImm16,
62 Match_InvalidSImm16lsl2,
63 Match_InvalidSImm20,
64 Match_InvalidSImm20lu12iw,
65 Match_InvalidSImm20lu32id,
66 Match_InvalidSImm20pcaddi,
67 Match_InvalidSImm20pcaddu18i,
68 Match_InvalidSImm20pcalau12i,
69 Match_InvalidSImm21lsl2,
70 Match_InvalidSImm26Operand,
71 Match_InvalidSImm5,
72 Match_InvalidSImm8,
73 Match_InvalidSImm8lsl1,
74 Match_InvalidSImm8lsl2,
75 Match_InvalidSImm8lsl3,
76 Match_InvalidSImm9lsl3,
77 Match_InvalidTPRelAddSymbol,
78 Match_InvalidUImm1,
79 Match_InvalidUImm12,
80 Match_InvalidUImm12ori,
81 Match_InvalidUImm14,
82 Match_InvalidUImm15,
83 Match_InvalidUImm2,
84 Match_InvalidUImm2plus1,
85 Match_InvalidUImm3,
86 Match_InvalidUImm4,
87 Match_InvalidUImm5,
88 Match_InvalidUImm6,
89 Match_InvalidUImm7,
90 Match_InvalidUImm8,
91 END_OPERAND_DIAGNOSTIC_TYPES
92#endif // GET_OPERAND_DIAGNOSTIC_TYPES
93
94
95#ifdef GET_REGISTER_MATCHER
96#undef GET_REGISTER_MATCHER
97
98// Bits for subtarget features that participate in instruction matching.
99enum SubtargetFeatureBits : uint8_t {
100 Feature_IsLA64Bit = 4,
101 Feature_IsLA32Bit = 3,
102 Feature_HasLaGlobalWithPcrelBit = 1,
103 Feature_HasLaGlobalWithAbsBit = 0,
104 Feature_HasLaLocalWithAbsBit = 2,
105};
106
107static MCRegister MatchRegisterName(StringRef Name) {
108 switch (Name.size()) {
109 default: break;
110 case 2: // 30 strings to match.
111 switch (Name[0]) {
112 default: break;
113 case 'f': // 20 strings to match.
114 switch (Name[1]) {
115 default: break;
116 case '0': // 2 strings to match.
117 return LoongArch::F0; // "f0"
118 case '1': // 2 strings to match.
119 return LoongArch::F1; // "f1"
120 case '2': // 2 strings to match.
121 return LoongArch::F2; // "f2"
122 case '3': // 2 strings to match.
123 return LoongArch::F3; // "f3"
124 case '4': // 2 strings to match.
125 return LoongArch::F4; // "f4"
126 case '5': // 2 strings to match.
127 return LoongArch::F5; // "f5"
128 case '6': // 2 strings to match.
129 return LoongArch::F6; // "f6"
130 case '7': // 2 strings to match.
131 return LoongArch::F7; // "f7"
132 case '8': // 2 strings to match.
133 return LoongArch::F8; // "f8"
134 case '9': // 2 strings to match.
135 return LoongArch::F9; // "f9"
136 }
137 break;
138 case 'r': // 10 strings to match.
139 switch (Name[1]) {
140 default: break;
141 case '0': // 1 string to match.
142 return LoongArch::R0; // "r0"
143 case '1': // 1 string to match.
144 return LoongArch::R1; // "r1"
145 case '2': // 1 string to match.
146 return LoongArch::R2; // "r2"
147 case '3': // 1 string to match.
148 return LoongArch::R3; // "r3"
149 case '4': // 1 string to match.
150 return LoongArch::R4; // "r4"
151 case '5': // 1 string to match.
152 return LoongArch::R5; // "r5"
153 case '6': // 1 string to match.
154 return LoongArch::R6; // "r6"
155 case '7': // 1 string to match.
156 return LoongArch::R7; // "r7"
157 case '8': // 1 string to match.
158 return LoongArch::R8; // "r8"
159 case '9': // 1 string to match.
160 return LoongArch::R9; // "r9"
161 }
162 break;
163 }
164 break;
165 case 3: // 86 strings to match.
166 switch (Name[0]) {
167 default: break;
168 case 'f': // 44 strings to match.
169 switch (Name[1]) {
170 default: break;
171 case '1': // 20 strings to match.
172 switch (Name[2]) {
173 default: break;
174 case '0': // 2 strings to match.
175 return LoongArch::F10; // "f10"
176 case '1': // 2 strings to match.
177 return LoongArch::F11; // "f11"
178 case '2': // 2 strings to match.
179 return LoongArch::F12; // "f12"
180 case '3': // 2 strings to match.
181 return LoongArch::F13; // "f13"
182 case '4': // 2 strings to match.
183 return LoongArch::F14; // "f14"
184 case '5': // 2 strings to match.
185 return LoongArch::F15; // "f15"
186 case '6': // 2 strings to match.
187 return LoongArch::F16; // "f16"
188 case '7': // 2 strings to match.
189 return LoongArch::F17; // "f17"
190 case '8': // 2 strings to match.
191 return LoongArch::F18; // "f18"
192 case '9': // 2 strings to match.
193 return LoongArch::F19; // "f19"
194 }
195 break;
196 case '2': // 20 strings to match.
197 switch (Name[2]) {
198 default: break;
199 case '0': // 2 strings to match.
200 return LoongArch::F20; // "f20"
201 case '1': // 2 strings to match.
202 return LoongArch::F21; // "f21"
203 case '2': // 2 strings to match.
204 return LoongArch::F22; // "f22"
205 case '3': // 2 strings to match.
206 return LoongArch::F23; // "f23"
207 case '4': // 2 strings to match.
208 return LoongArch::F24; // "f24"
209 case '5': // 2 strings to match.
210 return LoongArch::F25; // "f25"
211 case '6': // 2 strings to match.
212 return LoongArch::F26; // "f26"
213 case '7': // 2 strings to match.
214 return LoongArch::F27; // "f27"
215 case '8': // 2 strings to match.
216 return LoongArch::F28; // "f28"
217 case '9': // 2 strings to match.
218 return LoongArch::F29; // "f29"
219 }
220 break;
221 case '3': // 4 strings to match.
222 switch (Name[2]) {
223 default: break;
224 case '0': // 2 strings to match.
225 return LoongArch::F30; // "f30"
226 case '1': // 2 strings to match.
227 return LoongArch::F31; // "f31"
228 }
229 break;
230 }
231 break;
232 case 'r': // 22 strings to match.
233 switch (Name[1]) {
234 default: break;
235 case '1': // 10 strings to match.
236 switch (Name[2]) {
237 default: break;
238 case '0': // 1 string to match.
239 return LoongArch::R10; // "r10"
240 case '1': // 1 string to match.
241 return LoongArch::R11; // "r11"
242 case '2': // 1 string to match.
243 return LoongArch::R12; // "r12"
244 case '3': // 1 string to match.
245 return LoongArch::R13; // "r13"
246 case '4': // 1 string to match.
247 return LoongArch::R14; // "r14"
248 case '5': // 1 string to match.
249 return LoongArch::R15; // "r15"
250 case '6': // 1 string to match.
251 return LoongArch::R16; // "r16"
252 case '7': // 1 string to match.
253 return LoongArch::R17; // "r17"
254 case '8': // 1 string to match.
255 return LoongArch::R18; // "r18"
256 case '9': // 1 string to match.
257 return LoongArch::R19; // "r19"
258 }
259 break;
260 case '2': // 10 strings to match.
261 switch (Name[2]) {
262 default: break;
263 case '0': // 1 string to match.
264 return LoongArch::R20; // "r20"
265 case '1': // 1 string to match.
266 return LoongArch::R21; // "r21"
267 case '2': // 1 string to match.
268 return LoongArch::R22; // "r22"
269 case '3': // 1 string to match.
270 return LoongArch::R23; // "r23"
271 case '4': // 1 string to match.
272 return LoongArch::R24; // "r24"
273 case '5': // 1 string to match.
274 return LoongArch::R25; // "r25"
275 case '6': // 1 string to match.
276 return LoongArch::R26; // "r26"
277 case '7': // 1 string to match.
278 return LoongArch::R27; // "r27"
279 case '8': // 1 string to match.
280 return LoongArch::R28; // "r28"
281 case '9': // 1 string to match.
282 return LoongArch::R29; // "r29"
283 }
284 break;
285 case '3': // 2 strings to match.
286 switch (Name[2]) {
287 default: break;
288 case '0': // 1 string to match.
289 return LoongArch::R30; // "r30"
290 case '1': // 1 string to match.
291 return LoongArch::R31; // "r31"
292 }
293 break;
294 }
295 break;
296 case 'v': // 10 strings to match.
297 if (Name[1] != 'r')
298 break;
299 switch (Name[2]) {
300 default: break;
301 case '0': // 1 string to match.
302 return LoongArch::VR0; // "vr0"
303 case '1': // 1 string to match.
304 return LoongArch::VR1; // "vr1"
305 case '2': // 1 string to match.
306 return LoongArch::VR2; // "vr2"
307 case '3': // 1 string to match.
308 return LoongArch::VR3; // "vr3"
309 case '4': // 1 string to match.
310 return LoongArch::VR4; // "vr4"
311 case '5': // 1 string to match.
312 return LoongArch::VR5; // "vr5"
313 case '6': // 1 string to match.
314 return LoongArch::VR6; // "vr6"
315 case '7': // 1 string to match.
316 return LoongArch::VR7; // "vr7"
317 case '8': // 1 string to match.
318 return LoongArch::VR8; // "vr8"
319 case '9': // 1 string to match.
320 return LoongArch::VR9; // "vr9"
321 }
322 break;
323 case 'x': // 10 strings to match.
324 if (Name[1] != 'r')
325 break;
326 switch (Name[2]) {
327 default: break;
328 case '0': // 1 string to match.
329 return LoongArch::XR0; // "xr0"
330 case '1': // 1 string to match.
331 return LoongArch::XR1; // "xr1"
332 case '2': // 1 string to match.
333 return LoongArch::XR2; // "xr2"
334 case '3': // 1 string to match.
335 return LoongArch::XR3; // "xr3"
336 case '4': // 1 string to match.
337 return LoongArch::XR4; // "xr4"
338 case '5': // 1 string to match.
339 return LoongArch::XR5; // "xr5"
340 case '6': // 1 string to match.
341 return LoongArch::XR6; // "xr6"
342 case '7': // 1 string to match.
343 return LoongArch::XR7; // "xr7"
344 case '8': // 1 string to match.
345 return LoongArch::XR8; // "xr8"
346 case '9': // 1 string to match.
347 return LoongArch::XR9; // "xr9"
348 }
349 break;
350 }
351 break;
352 case 4: // 56 strings to match.
353 switch (Name[0]) {
354 default: break;
355 case 'f': // 8 strings to match.
356 if (memcmp(Name.data()+1, "cc", 2) != 0)
357 break;
358 switch (Name[3]) {
359 default: break;
360 case '0': // 1 string to match.
361 return LoongArch::FCC0; // "fcc0"
362 case '1': // 1 string to match.
363 return LoongArch::FCC1; // "fcc1"
364 case '2': // 1 string to match.
365 return LoongArch::FCC2; // "fcc2"
366 case '3': // 1 string to match.
367 return LoongArch::FCC3; // "fcc3"
368 case '4': // 1 string to match.
369 return LoongArch::FCC4; // "fcc4"
370 case '5': // 1 string to match.
371 return LoongArch::FCC5; // "fcc5"
372 case '6': // 1 string to match.
373 return LoongArch::FCC6; // "fcc6"
374 case '7': // 1 string to match.
375 return LoongArch::FCC7; // "fcc7"
376 }
377 break;
378 case 's': // 4 strings to match.
379 if (memcmp(Name.data()+1, "cr", 2) != 0)
380 break;
381 switch (Name[3]) {
382 default: break;
383 case '0': // 1 string to match.
384 return LoongArch::SCR0; // "scr0"
385 case '1': // 1 string to match.
386 return LoongArch::SCR1; // "scr1"
387 case '2': // 1 string to match.
388 return LoongArch::SCR2; // "scr2"
389 case '3': // 1 string to match.
390 return LoongArch::SCR3; // "scr3"
391 }
392 break;
393 case 'v': // 22 strings to match.
394 if (Name[1] != 'r')
395 break;
396 switch (Name[2]) {
397 default: break;
398 case '1': // 10 strings to match.
399 switch (Name[3]) {
400 default: break;
401 case '0': // 1 string to match.
402 return LoongArch::VR10; // "vr10"
403 case '1': // 1 string to match.
404 return LoongArch::VR11; // "vr11"
405 case '2': // 1 string to match.
406 return LoongArch::VR12; // "vr12"
407 case '3': // 1 string to match.
408 return LoongArch::VR13; // "vr13"
409 case '4': // 1 string to match.
410 return LoongArch::VR14; // "vr14"
411 case '5': // 1 string to match.
412 return LoongArch::VR15; // "vr15"
413 case '6': // 1 string to match.
414 return LoongArch::VR16; // "vr16"
415 case '7': // 1 string to match.
416 return LoongArch::VR17; // "vr17"
417 case '8': // 1 string to match.
418 return LoongArch::VR18; // "vr18"
419 case '9': // 1 string to match.
420 return LoongArch::VR19; // "vr19"
421 }
422 break;
423 case '2': // 10 strings to match.
424 switch (Name[3]) {
425 default: break;
426 case '0': // 1 string to match.
427 return LoongArch::VR20; // "vr20"
428 case '1': // 1 string to match.
429 return LoongArch::VR21; // "vr21"
430 case '2': // 1 string to match.
431 return LoongArch::VR22; // "vr22"
432 case '3': // 1 string to match.
433 return LoongArch::VR23; // "vr23"
434 case '4': // 1 string to match.
435 return LoongArch::VR24; // "vr24"
436 case '5': // 1 string to match.
437 return LoongArch::VR25; // "vr25"
438 case '6': // 1 string to match.
439 return LoongArch::VR26; // "vr26"
440 case '7': // 1 string to match.
441 return LoongArch::VR27; // "vr27"
442 case '8': // 1 string to match.
443 return LoongArch::VR28; // "vr28"
444 case '9': // 1 string to match.
445 return LoongArch::VR29; // "vr29"
446 }
447 break;
448 case '3': // 2 strings to match.
449 switch (Name[3]) {
450 default: break;
451 case '0': // 1 string to match.
452 return LoongArch::VR30; // "vr30"
453 case '1': // 1 string to match.
454 return LoongArch::VR31; // "vr31"
455 }
456 break;
457 }
458 break;
459 case 'x': // 22 strings to match.
460 if (Name[1] != 'r')
461 break;
462 switch (Name[2]) {
463 default: break;
464 case '1': // 10 strings to match.
465 switch (Name[3]) {
466 default: break;
467 case '0': // 1 string to match.
468 return LoongArch::XR10; // "xr10"
469 case '1': // 1 string to match.
470 return LoongArch::XR11; // "xr11"
471 case '2': // 1 string to match.
472 return LoongArch::XR12; // "xr12"
473 case '3': // 1 string to match.
474 return LoongArch::XR13; // "xr13"
475 case '4': // 1 string to match.
476 return LoongArch::XR14; // "xr14"
477 case '5': // 1 string to match.
478 return LoongArch::XR15; // "xr15"
479 case '6': // 1 string to match.
480 return LoongArch::XR16; // "xr16"
481 case '7': // 1 string to match.
482 return LoongArch::XR17; // "xr17"
483 case '8': // 1 string to match.
484 return LoongArch::XR18; // "xr18"
485 case '9': // 1 string to match.
486 return LoongArch::XR19; // "xr19"
487 }
488 break;
489 case '2': // 10 strings to match.
490 switch (Name[3]) {
491 default: break;
492 case '0': // 1 string to match.
493 return LoongArch::XR20; // "xr20"
494 case '1': // 1 string to match.
495 return LoongArch::XR21; // "xr21"
496 case '2': // 1 string to match.
497 return LoongArch::XR22; // "xr22"
498 case '3': // 1 string to match.
499 return LoongArch::XR23; // "xr23"
500 case '4': // 1 string to match.
501 return LoongArch::XR24; // "xr24"
502 case '5': // 1 string to match.
503 return LoongArch::XR25; // "xr25"
504 case '6': // 1 string to match.
505 return LoongArch::XR26; // "xr26"
506 case '7': // 1 string to match.
507 return LoongArch::XR27; // "xr27"
508 case '8': // 1 string to match.
509 return LoongArch::XR28; // "xr28"
510 case '9': // 1 string to match.
511 return LoongArch::XR29; // "xr29"
512 }
513 break;
514 case '3': // 2 strings to match.
515 switch (Name[3]) {
516 default: break;
517 case '0': // 1 string to match.
518 return LoongArch::XR30; // "xr30"
519 case '1': // 1 string to match.
520 return LoongArch::XR31; // "xr31"
521 }
522 break;
523 }
524 break;
525 }
526 break;
527 case 5: // 4 strings to match.
528 if (memcmp(Name.data()+0, "fcsr", 4) != 0)
529 break;
530 switch (Name[4]) {
531 default: break;
532 case '0': // 1 string to match.
533 return LoongArch::FCSR0; // "fcsr0"
534 case '1': // 1 string to match.
535 return LoongArch::FCSR1; // "fcsr1"
536 case '2': // 1 string to match.
537 return LoongArch::FCSR2; // "fcsr2"
538 case '3': // 1 string to match.
539 return LoongArch::FCSR3; // "fcsr3"
540 }
541 break;
542 }
543 return LoongArch::NoRegister;
544}
545
546static MCRegister MatchRegisterAltName(StringRef Name) {
547 switch (Name.size()) {
548 default: break;
549 case 2: // 31 strings to match.
550 switch (Name[0]) {
551 default: break;
552 case 'a': // 8 strings to match.
553 switch (Name[1]) {
554 default: break;
555 case '0': // 1 string to match.
556 return LoongArch::R4; // "a0"
557 case '1': // 1 string to match.
558 return LoongArch::R5; // "a1"
559 case '2': // 1 string to match.
560 return LoongArch::R6; // "a2"
561 case '3': // 1 string to match.
562 return LoongArch::R7; // "a3"
563 case '4': // 1 string to match.
564 return LoongArch::R8; // "a4"
565 case '5': // 1 string to match.
566 return LoongArch::R9; // "a5"
567 case '6': // 1 string to match.
568 return LoongArch::R10; // "a6"
569 case '7': // 1 string to match.
570 return LoongArch::R11; // "a7"
571 }
572 break;
573 case 'f': // 1 string to match.
574 if (Name[1] != 'p')
575 break;
576 return LoongArch::R22; // "fp"
577 case 'r': // 1 string to match.
578 if (Name[1] != 'a')
579 break;
580 return LoongArch::R1; // "ra"
581 case 's': // 11 strings to match.
582 switch (Name[1]) {
583 default: break;
584 case '0': // 1 string to match.
585 return LoongArch::R23; // "s0"
586 case '1': // 1 string to match.
587 return LoongArch::R24; // "s1"
588 case '2': // 1 string to match.
589 return LoongArch::R25; // "s2"
590 case '3': // 1 string to match.
591 return LoongArch::R26; // "s3"
592 case '4': // 1 string to match.
593 return LoongArch::R27; // "s4"
594 case '5': // 1 string to match.
595 return LoongArch::R28; // "s5"
596 case '6': // 1 string to match.
597 return LoongArch::R29; // "s6"
598 case '7': // 1 string to match.
599 return LoongArch::R30; // "s7"
600 case '8': // 1 string to match.
601 return LoongArch::R31; // "s8"
602 case '9': // 1 string to match.
603 return LoongArch::R22; // "s9"
604 case 'p': // 1 string to match.
605 return LoongArch::R3; // "sp"
606 }
607 break;
608 case 't': // 10 strings to match.
609 switch (Name[1]) {
610 default: break;
611 case '0': // 1 string to match.
612 return LoongArch::R12; // "t0"
613 case '1': // 1 string to match.
614 return LoongArch::R13; // "t1"
615 case '2': // 1 string to match.
616 return LoongArch::R14; // "t2"
617 case '3': // 1 string to match.
618 return LoongArch::R15; // "t3"
619 case '4': // 1 string to match.
620 return LoongArch::R16; // "t4"
621 case '5': // 1 string to match.
622 return LoongArch::R17; // "t5"
623 case '6': // 1 string to match.
624 return LoongArch::R18; // "t6"
625 case '7': // 1 string to match.
626 return LoongArch::R19; // "t7"
627 case '8': // 1 string to match.
628 return LoongArch::R20; // "t8"
629 case 'p': // 1 string to match.
630 return LoongArch::R2; // "tp"
631 }
632 break;
633 }
634 break;
635 case 3: // 52 strings to match.
636 if (Name[0] != 'f')
637 break;
638 switch (Name[1]) {
639 default: break;
640 case 'a': // 16 strings to match.
641 switch (Name[2]) {
642 default: break;
643 case '0': // 2 strings to match.
644 return LoongArch::F0; // "fa0"
645 case '1': // 2 strings to match.
646 return LoongArch::F1; // "fa1"
647 case '2': // 2 strings to match.
648 return LoongArch::F2; // "fa2"
649 case '3': // 2 strings to match.
650 return LoongArch::F3; // "fa3"
651 case '4': // 2 strings to match.
652 return LoongArch::F4; // "fa4"
653 case '5': // 2 strings to match.
654 return LoongArch::F5; // "fa5"
655 case '6': // 2 strings to match.
656 return LoongArch::F6; // "fa6"
657 case '7': // 2 strings to match.
658 return LoongArch::F7; // "fa7"
659 }
660 break;
661 case 's': // 16 strings to match.
662 switch (Name[2]) {
663 default: break;
664 case '0': // 2 strings to match.
665 return LoongArch::F24; // "fs0"
666 case '1': // 2 strings to match.
667 return LoongArch::F25; // "fs1"
668 case '2': // 2 strings to match.
669 return LoongArch::F26; // "fs2"
670 case '3': // 2 strings to match.
671 return LoongArch::F27; // "fs3"
672 case '4': // 2 strings to match.
673 return LoongArch::F28; // "fs4"
674 case '5': // 2 strings to match.
675 return LoongArch::F29; // "fs5"
676 case '6': // 2 strings to match.
677 return LoongArch::F30; // "fs6"
678 case '7': // 2 strings to match.
679 return LoongArch::F31; // "fs7"
680 }
681 break;
682 case 't': // 20 strings to match.
683 switch (Name[2]) {
684 default: break;
685 case '0': // 2 strings to match.
686 return LoongArch::F8; // "ft0"
687 case '1': // 2 strings to match.
688 return LoongArch::F9; // "ft1"
689 case '2': // 2 strings to match.
690 return LoongArch::F10; // "ft2"
691 case '3': // 2 strings to match.
692 return LoongArch::F11; // "ft3"
693 case '4': // 2 strings to match.
694 return LoongArch::F12; // "ft4"
695 case '5': // 2 strings to match.
696 return LoongArch::F13; // "ft5"
697 case '6': // 2 strings to match.
698 return LoongArch::F14; // "ft6"
699 case '7': // 2 strings to match.
700 return LoongArch::F15; // "ft7"
701 case '8': // 2 strings to match.
702 return LoongArch::F16; // "ft8"
703 case '9': // 2 strings to match.
704 return LoongArch::F17; // "ft9"
705 }
706 break;
707 }
708 break;
709 case 4: // 13 strings to match.
710 switch (Name[0]) {
711 default: break;
712 case 'f': // 12 strings to match.
713 if (memcmp(Name.data()+1, "t1", 2) != 0)
714 break;
715 switch (Name[3]) {
716 default: break;
717 case '0': // 2 strings to match.
718 return LoongArch::F18; // "ft10"
719 case '1': // 2 strings to match.
720 return LoongArch::F19; // "ft11"
721 case '2': // 2 strings to match.
722 return LoongArch::F20; // "ft12"
723 case '3': // 2 strings to match.
724 return LoongArch::F21; // "ft13"
725 case '4': // 2 strings to match.
726 return LoongArch::F22; // "ft14"
727 case '5': // 2 strings to match.
728 return LoongArch::F23; // "ft15"
729 }
730 break;
731 case 'z': // 1 string to match.
732 if (memcmp(Name.data()+1, "ero", 3) != 0)
733 break;
734 return LoongArch::R0; // "zero"
735 }
736 break;
737 }
738 return LoongArch::NoRegister;
739}
740
741#endif // GET_REGISTER_MATCHER
742
743
744#ifdef GET_SUBTARGET_FEATURE_NAME
745#undef GET_SUBTARGET_FEATURE_NAME
746
747// User-level names for subtarget features that participate in
748// instruction matching.
749static const char *getSubtargetFeatureName(uint64_t Val) {
750 switch(Val) {
751 case Feature_IsLA64Bit: return "LA64 Basic Integer and Privilege Instruction Set";
752 case Feature_IsLA32Bit: return "LA32 Basic Integer and Privilege Instruction Set";
753 case Feature_HasLaGlobalWithPcrelBit: return "Expand la.global as la.pcrel";
754 case Feature_HasLaGlobalWithAbsBit: return "Expand la.global as la.abs";
755 case Feature_HasLaLocalWithAbsBit: return "Expand la.local as la.abs";
756 default: return "(unknown)";
757 }
758}
759
760#endif // GET_SUBTARGET_FEATURE_NAME
761
762
763#ifdef GET_MATCHER_IMPLEMENTATION
764#undef GET_MATCHER_IMPLEMENTATION
765
766enum {
767 Tie0_1_1,
768};
769
770static const uint8_t TiedAsmOperandTable[][3] = {
771 /* Tie0_1_1 */ { 0, 1, 1 },
772};
773
774namespace {
775enum OperatorConversionKind {
776 CVT_Done,
777 CVT_Reg,
778 CVT_Tied,
779 CVT_95_Reg,
780 CVT_95_addImmOperands,
781 CVT_95_addRegOperands,
782 CVT_regR0,
783 CVT_imm_95_0,
784 CVT_regR1,
785 CVT_NUM_CONVERTERS
786};
787
788enum InstructionConversionKind {
789 Convert__Reg1_0__Reg1_1__Reg1_2,
790 Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3,
791 Convert__Reg1_0__Reg1_1__SImm12addlike1_2,
792 Convert__Reg1_0__Reg1_1__SImm51_2,
793 Convert__Reg1_0__Reg1_1__SImm161_2,
794 Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3,
795 Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2,
796 Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2,
797 Convert__Reg1_0__Reg1_1__UImm121_2,
798 Convert__Reg1_0__Reg1_1__UImm41_2,
799 Convert__Reg1_0__UImm81_1,
800 Convert__Reg1_0__UImm41_1,
801 Convert__Reg1_0__UImm51_1__UImm41_2,
802 Convert__Reg1_0__Reg1_1,
803 Convert__SImm26OperandB1_0,
804 Convert__Reg1_0__SImm21lsl21_1,
805 Convert__Reg1_0__Reg1_1__SImm16lsl21_2,
806 Convert__Reg1_0__regR0__SImm16lsl21_1,
807 Convert__Reg1_1__Reg1_0__SImm16lsl21_2,
808 Convert__regR0__Reg1_0__SImm16lsl21_1,
809 Convert__SImm26OperandBL1_0,
810 Convert__UImm151_0,
811 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3,
812 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3,
813 Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3,
814 Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3,
815 Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3,
816 Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3,
817 Convert__UImm51_0__Reg1_1__SImm121_2,
818 Convert__BareSymbol1_0,
819 Convert__Reg1_0__UImm141_1,
820 Convert__Reg1_0__Tie0_1_1__UImm141_1,
821 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2,
822 Convert_NoOperands,
823 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
824 Convert__Reg1_2__Reg1_1__UImm51_0,
825 Convert__SImm21lsl21_0,
826 Convert__regR0__Reg1_0__imm_95_0,
827 Convert__Reg1_0__BareSymbol1_1,
828 Convert__Reg1_0__imm_95_0__BareSymbol1_1,
829 Convert__Reg1_0__Reg1_1__BareSymbol1_2,
830 Convert__Reg1_0__Reg1_1__UImm81_2,
831 Convert__Reg1_0__Reg1_1__SImm14lsl21_2,
832 Convert__Reg1_0__Imm641_1,
833 Convert__Reg1_0__Imm321_1,
834 Convert__Reg1_0__SImm20lu12iw1_1,
835 Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1,
836 Convert__Reg1_0__Reg1_1__SImm12lu52id1_2,
837 Convert__Reg1_0__Reg1_1__regR0,
838 Convert__Reg1_0__Tie0_1_1__Reg1_1,
839 Convert__regR0__regR0__imm_95_0,
840 Convert__Reg1_0__Reg1_1__UImm12ori1_2,
841 Convert__Reg1_0__SImm20pcaddi1_1,
842 Convert__Reg1_0__SImm201_1,
843 Convert__Reg1_0__SImm20pcaddu18i1_1,
844 Convert__Reg1_0__SImm20pcalau12i1_1,
845 Convert__UImm51_0__Reg1_1__Reg1_2,
846 Convert__Reg1_0__Reg1_1__UImm31_2,
847 Convert__Reg1_0__Reg1_1__UImm61_2,
848 Convert__Reg1_0__Reg1_1__UImm51_2,
849 Convert__regR0__Reg1_0,
850 Convert__Reg1_0__regR0,
851 Convert__regR0__regR1__imm_95_0,
852 Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2,
853 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
854 Convert__Reg1_0__Reg1_1__SImm121_2,
855 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2,
856 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2,
857 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2,
858 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2,
859 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2,
860 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2,
861 Convert__Reg1_0__SImm131_1,
862 Convert__Reg1_0__Reg1_1__SImm9lsl31_2,
863 Convert__Reg1_0__Reg1_1__SImm11lsl11_2,
864 Convert__Reg1_0__Reg1_1__SImm10lsl21_2,
865 Convert__Reg1_0__Reg1_1__UImm11_2,
866 Convert__Reg1_0__Reg1_1__UImm21_2,
867 Convert__Reg1_0__SImm101_1,
868 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2,
869 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2,
870 Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3,
871 Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3,
872 Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3,
873 Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3,
874 Convert__Reg1_0,
875 Convert__UImm31_0,
876 Convert__Reg1_0__UImm31_1,
877 Convert__Reg1_0__UImm61_1,
878 Convert__Reg1_0__UImm51_1,
879 Convert__Reg1_0__UImm51_1__UImm81_2,
880 Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3,
881 Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3,
882 Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3,
883 Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3,
884 CVT_NUM_SIGNATURES
885};
886
887} // end anonymous namespace
888
889static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
890 // Convert__Reg1_0__Reg1_1__Reg1_2
891 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
892 // Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3
893 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
894 // Convert__Reg1_0__Reg1_1__SImm12addlike1_2
895 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
896 // Convert__Reg1_0__Reg1_1__SImm51_2
897 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
898 // Convert__Reg1_0__Reg1_1__SImm161_2
899 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
900 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3
901 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
902 // Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2
903 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addRegOperands, 3, CVT_Done },
904 // Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2
905 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addRegOperands, 3, CVT_Done },
906 // Convert__Reg1_0__Reg1_1__UImm121_2
907 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
908 // Convert__Reg1_0__Reg1_1__UImm41_2
909 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
910 // Convert__Reg1_0__UImm81_1
911 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
912 // Convert__Reg1_0__UImm41_1
913 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
914 // Convert__Reg1_0__UImm51_1__UImm41_2
915 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
916 // Convert__Reg1_0__Reg1_1
917 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
918 // Convert__SImm26OperandB1_0
919 { CVT_95_addImmOperands, 1, CVT_Done },
920 // Convert__Reg1_0__SImm21lsl21_1
921 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
922 // Convert__Reg1_0__Reg1_1__SImm16lsl21_2
923 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
924 // Convert__Reg1_0__regR0__SImm16lsl21_1
925 { CVT_95_Reg, 1, CVT_regR0, 0, CVT_95_addImmOperands, 2, CVT_Done },
926 // Convert__Reg1_1__Reg1_0__SImm16lsl21_2
927 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_Done },
928 // Convert__regR0__Reg1_0__SImm16lsl21_1
929 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
930 // Convert__SImm26OperandBL1_0
931 { CVT_95_addImmOperands, 1, CVT_Done },
932 // Convert__UImm151_0
933 { CVT_95_addImmOperands, 1, CVT_Done },
934 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3
935 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
936 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3
937 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
938 // Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3
939 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
940 // Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3
941 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
942 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3
943 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
944 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3
945 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
946 // Convert__UImm51_0__Reg1_1__SImm121_2
947 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
948 // Convert__BareSymbol1_0
949 { CVT_95_addImmOperands, 1, CVT_Done },
950 // Convert__Reg1_0__UImm141_1
951 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
952 // Convert__Reg1_0__Tie0_1_1__UImm141_1
953 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
954 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2
955 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
956 // Convert_NoOperands
957 { CVT_Done },
958 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
959 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
960 // Convert__Reg1_2__Reg1_1__UImm51_0
961 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
962 // Convert__SImm21lsl21_0
963 { CVT_95_addImmOperands, 1, CVT_Done },
964 // Convert__regR0__Reg1_0__imm_95_0
965 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
966 // Convert__Reg1_0__BareSymbol1_1
967 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
968 // Convert__Reg1_0__imm_95_0__BareSymbol1_1
969 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_95_addImmOperands, 2, CVT_Done },
970 // Convert__Reg1_0__Reg1_1__BareSymbol1_2
971 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
972 // Convert__Reg1_0__Reg1_1__UImm81_2
973 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
974 // Convert__Reg1_0__Reg1_1__SImm14lsl21_2
975 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
976 // Convert__Reg1_0__Imm641_1
977 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
978 // Convert__Reg1_0__Imm321_1
979 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
980 // Convert__Reg1_0__SImm20lu12iw1_1
981 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
982 // Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1
983 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
984 // Convert__Reg1_0__Reg1_1__SImm12lu52id1_2
985 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
986 // Convert__Reg1_0__Reg1_1__regR0
987 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_regR0, 0, CVT_Done },
988 // Convert__Reg1_0__Tie0_1_1__Reg1_1
989 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
990 // Convert__regR0__regR0__imm_95_0
991 { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done },
992 // Convert__Reg1_0__Reg1_1__UImm12ori1_2
993 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
994 // Convert__Reg1_0__SImm20pcaddi1_1
995 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
996 // Convert__Reg1_0__SImm201_1
997 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
998 // Convert__Reg1_0__SImm20pcaddu18i1_1
999 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1000 // Convert__Reg1_0__SImm20pcalau12i1_1
1001 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1002 // Convert__UImm51_0__Reg1_1__Reg1_2
1003 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1004 // Convert__Reg1_0__Reg1_1__UImm31_2
1005 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1006 // Convert__Reg1_0__Reg1_1__UImm61_2
1007 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1008 // Convert__Reg1_0__Reg1_1__UImm51_2
1009 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1010 // Convert__regR0__Reg1_0
1011 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_Done },
1012 // Convert__Reg1_0__regR0
1013 { CVT_95_Reg, 1, CVT_regR0, 0, CVT_Done },
1014 // Convert__regR0__regR1__imm_95_0
1015 { CVT_regR0, 0, CVT_regR1, 0, CVT_imm_95_0, 0, CVT_Done },
1016 // Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2
1017 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1018 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
1019 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1020 // Convert__Reg1_0__Reg1_1__SImm121_2
1021 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1022 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2
1023 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1024 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2
1025 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1026 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2
1027 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1028 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2
1029 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1030 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2
1031 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1032 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2
1033 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1034 // Convert__Reg1_0__SImm131_1
1035 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1036 // Convert__Reg1_0__Reg1_1__SImm9lsl31_2
1037 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1038 // Convert__Reg1_0__Reg1_1__SImm11lsl11_2
1039 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1040 // Convert__Reg1_0__Reg1_1__SImm10lsl21_2
1041 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1042 // Convert__Reg1_0__Reg1_1__UImm11_2
1043 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1044 // Convert__Reg1_0__Reg1_1__UImm21_2
1045 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1046 // Convert__Reg1_0__SImm101_1
1047 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1048 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2
1049 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1050 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2
1051 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1052 // Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3
1053 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1054 // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3
1055 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1056 // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3
1057 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1058 // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3
1059 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1060 // Convert__Reg1_0
1061 { CVT_95_Reg, 1, CVT_Done },
1062 // Convert__UImm31_0
1063 { CVT_95_addImmOperands, 1, CVT_Done },
1064 // Convert__Reg1_0__UImm31_1
1065 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1066 // Convert__Reg1_0__UImm61_1
1067 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1068 // Convert__Reg1_0__UImm51_1
1069 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1070 // Convert__Reg1_0__UImm51_1__UImm81_2
1071 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
1072 // Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3
1073 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1074 // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3
1075 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1076 // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3
1077 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1078 // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3
1079 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1080};
1081
1082void LoongArchAsmParser::
1083convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
1084 const OperandVector &Operands) {
1085 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1086 const uint8_t *Converter = ConversionTable[Kind];
1087 Inst.setOpcode(Opcode);
1088 for (const uint8_t *p = Converter; *p; p += 2) {
1089 unsigned OpIdx = *(p + 1);
1090 switch (*p) {
1091 default: llvm_unreachable("invalid conversion entry!");
1092 case CVT_Reg:
1093 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1094 break;
1095 case CVT_Tied: {
1096 assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) -
1097 std::begin(TiedAsmOperandTable)) &&
1098 "Tied operand not found");
1099 unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0];
1100 if (TiedResOpnd != (uint8_t)-1)
1101 Inst.addOperand(Inst.getOperand(TiedResOpnd));
1102 break;
1103 }
1104 case CVT_95_Reg:
1105 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1106 break;
1107 case CVT_95_addImmOperands:
1108 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
1109 break;
1110 case CVT_95_addRegOperands:
1111 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1112 break;
1113 case CVT_regR0:
1114 Inst.addOperand(MCOperand::createReg(LoongArch::R0));
1115 break;
1116 case CVT_imm_95_0:
1117 Inst.addOperand(MCOperand::createImm(0));
1118 break;
1119 case CVT_regR1:
1120 Inst.addOperand(MCOperand::createReg(LoongArch::R1));
1121 break;
1122 }
1123 }
1124}
1125
1126void LoongArchAsmParser::
1127convertToMapAndConstraints(unsigned Kind,
1128 const OperandVector &Operands) {
1129 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1130 unsigned NumMCOperands = 0;
1131 const uint8_t *Converter = ConversionTable[Kind];
1132 for (const uint8_t *p = Converter; *p; p += 2) {
1133 switch (*p) {
1134 default: llvm_unreachable("invalid conversion entry!");
1135 case CVT_Reg:
1136 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1137 Operands[*(p + 1)]->setConstraint("r");
1138 ++NumMCOperands;
1139 break;
1140 case CVT_Tied:
1141 ++NumMCOperands;
1142 break;
1143 case CVT_95_Reg:
1144 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1145 Operands[*(p + 1)]->setConstraint("r");
1146 NumMCOperands += 1;
1147 break;
1148 case CVT_95_addImmOperands:
1149 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1150 Operands[*(p + 1)]->setConstraint("m");
1151 NumMCOperands += 1;
1152 break;
1153 case CVT_95_addRegOperands:
1154 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1155 Operands[*(p + 1)]->setConstraint("m");
1156 NumMCOperands += 1;
1157 break;
1158 case CVT_regR0:
1159 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1160 Operands[*(p + 1)]->setConstraint("m");
1161 ++NumMCOperands;
1162 break;
1163 case CVT_imm_95_0:
1164 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1165 Operands[*(p + 1)]->setConstraint("");
1166 ++NumMCOperands;
1167 break;
1168 case CVT_regR1:
1169 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1170 Operands[*(p + 1)]->setConstraint("m");
1171 ++NumMCOperands;
1172 break;
1173 }
1174 }
1175}
1176
1177namespace {
1178
1179/// MatchClassKind - The kinds of classes which participate in
1180/// instruction matching.
1181enum MatchClassKind {
1182 InvalidMatchClass = 0,
1183 OptionalMatchClass = 1,
1184 MCK_LAST_TOKEN = OptionalMatchClass,
1185 MCK_FCSR, // register class 'FCSR'
1186 MCK_SCR, // register class 'SCR'
1187 MCK_CFR, // register class 'CFR'
1188 MCK_GPRT, // register class 'GPRT'
1189 MCK_GPRNoR0R1, // register class 'GPRNoR0R1'
1190 MCK_GPRJR, // register class 'GPRJR'
1191 MCK_FPR32, // register class 'FPR32'
1192 MCK_FPR64, // register class 'FPR64'
1193 MCK_GPR, // register class 'GPR'
1194 MCK_LASX256, // register class 'LASX256'
1195 MCK_LSX128, // register class 'LSX128'
1196 MCK_LAST_REGISTER = MCK_LSX128,
1197 MCK_AtomicMemAsmOperand, // user defined class 'AtomicMemAsmOperand'
1198 MCK_BareSymbol, // user defined class 'BareSymbol'
1199 MCK_Imm, // user defined class 'ImmAsmOperand'
1200 MCK_SImm26OperandB, // user defined class 'SImm26OperandB'
1201 MCK_SImm26OperandBL, // user defined class 'SImm26OperandBL'
1202 MCK_TPRelAddSymbol, // user defined class 'TPRelAddSymbol'
1203 MCK_Imm32, // user defined class 'anonymous_8662'
1204 MCK_Imm64, // user defined class 'anonymous_8663'
1205 MCK_UImm1, // user defined class 'anonymous_8664'
1206 MCK_UImm2, // user defined class 'anonymous_8665'
1207 MCK_UImm2plus1, // user defined class 'anonymous_8666'
1208 MCK_UImm3, // user defined class 'anonymous_8667'
1209 MCK_UImm4, // user defined class 'anonymous_8668'
1210 MCK_UImm5, // user defined class 'anonymous_8669'
1211 MCK_UImm6, // user defined class 'anonymous_8670'
1212 MCK_UImm7, // user defined class 'anonymous_8671'
1213 MCK_UImm8, // user defined class 'anonymous_8672'
1214 MCK_UImm12, // user defined class 'anonymous_8673'
1215 MCK_UImm12ori, // user defined class 'anonymous_8674'
1216 MCK_UImm14, // user defined class 'anonymous_8675'
1217 MCK_UImm15, // user defined class 'anonymous_8676'
1218 MCK_SImm5, // user defined class 'anonymous_8677'
1219 MCK_SImm8, // user defined class 'anonymous_8678'
1220 MCK_SImm8lsl1, // user defined class 'anonymous_8679'
1221 MCK_SImm8lsl2, // user defined class 'anonymous_8680'
1222 MCK_SImm8lsl3, // user defined class 'anonymous_8681'
1223 MCK_SImm9lsl3, // user defined class 'anonymous_8682'
1224 MCK_SImm10, // user defined class 'anonymous_8683'
1225 MCK_SImm10lsl2, // user defined class 'anonymous_8684'
1226 MCK_SImm11lsl1, // user defined class 'anonymous_8685'
1227 MCK_SImm12, // user defined class 'anonymous_8686'
1228 MCK_SImm12addlike, // user defined class 'anonymous_8687'
1229 MCK_SImm12lu52id, // user defined class 'anonymous_8688'
1230 MCK_SImm13, // user defined class 'anonymous_8689'
1231 MCK_SImm14lsl2, // user defined class 'anonymous_8690'
1232 MCK_SImm16, // user defined class 'anonymous_8691'
1233 MCK_SImm16lsl2, // user defined class 'anonymous_8692'
1234 MCK_SImm20, // user defined class 'anonymous_8693'
1235 MCK_SImm20pcalau12i, // user defined class 'anonymous_8694'
1236 MCK_SImm20lu12iw, // user defined class 'anonymous_8695'
1237 MCK_SImm20lu32id, // user defined class 'anonymous_8696'
1238 MCK_SImm20pcaddu18i, // user defined class 'anonymous_8697'
1239 MCK_SImm20pcaddi, // user defined class 'anonymous_8698'
1240 MCK_SImm21lsl2, // user defined class 'anonymous_8699'
1241 NumMatchClassKinds
1242};
1243
1244} // end anonymous namespace
1245
1246static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
1247 return MCTargetAsmParser::Match_InvalidOperand;
1248}
1249
1250static MatchClassKind matchTokenString(StringRef Name) {
1251 return InvalidMatchClass;
1252}
1253
1254/// isSubclass - Compute whether \p A is a subclass of \p B.
1255static bool isSubclass(MatchClassKind A, MatchClassKind B) {
1256 if (A == B)
1257 return true;
1258
1259 [[maybe_unused]] static constexpr struct {
1260 uint32_t Offset;
1261 uint16_t Start;
1262 uint16_t Length;
1263 } Table[] = {
1264 {0, 0, 0},
1265 {0, 0, 0},
1266 {0, 0, 0},
1267 {0, 0, 0},
1268 {0, 0, 0},
1269 {0, 6, 5},
1270 {5, 7, 4},
1271 {9, 10, 1},
1272 {10, 0, 0},
1273 {10, 0, 0},
1274 {10, 0, 0},
1275 {10, 0, 0},
1276 {10, 0, 0},
1277 {10, 0, 0},
1278 {10, 0, 0},
1279 {10, 0, 0},
1280 {10, 0, 0},
1281 {10, 0, 0},
1282 {10, 0, 0},
1283 {10, 0, 0},
1284 {10, 0, 0},
1285 {10, 0, 0},
1286 {10, 0, 0},
1287 {10, 0, 0},
1288 {10, 0, 0},
1289 {10, 0, 0},
1290 {10, 0, 0},
1291 {10, 0, 0},
1292 {10, 0, 0},
1293 {10, 0, 0},
1294 {10, 0, 0},
1295 {10, 0, 0},
1296 {10, 0, 0},
1297 {10, 0, 0},
1298 {10, 0, 0},
1299 {10, 0, 0},
1300 {10, 0, 0},
1301 {10, 0, 0},
1302 {10, 0, 0},
1303 {10, 0, 0},
1304 {10, 0, 0},
1305 {10, 0, 0},
1306 {10, 0, 0},
1307 {10, 0, 0},
1308 {10, 0, 0},
1309 {10, 0, 0},
1310 {10, 0, 0},
1311 {10, 0, 0},
1312 {10, 0, 0},
1313 {10, 0, 0},
1314 {10, 0, 0},
1315 {10, 0, 0},
1316 {10, 0, 0},
1317 {10, 0, 0},
1318 {10, 0, 0},
1319 {10, 0, 0},
1320 {10, 0, 0},
1321 };
1322
1323 static constexpr uint8_t Data[] = {
1324 0x33,
1325 0x03,
1326 };
1327
1328 auto &Entry = Table[A];
1329 unsigned Idx = B - Entry.Start;
1330 if (Idx >= Entry.Length)
1331 return false;
1332 Idx += Entry.Offset;
1333 return (Data[Idx / 8] >> (Idx % 8)) & 1;
1334}
1335
1336static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
1337 LoongArchOperand &Operand = (LoongArchOperand &)GOp;
1338 if (Kind == InvalidMatchClass)
1339 return MCTargetAsmParser::Match_InvalidOperand;
1340
1341 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
1342 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
1343 MCTargetAsmParser::Match_Success :
1344 MCTargetAsmParser::Match_InvalidOperand;
1345
1346 switch (Kind) {
1347 default: break;
1348 case MCK_AtomicMemAsmOperand: {
1349 DiagnosticPredicate DP(Operand.isGPR());
1350 if (DP.isMatch())
1351 return MCTargetAsmParser::Match_Success;
1352 break;
1353 }
1354 case MCK_BareSymbol: {
1355 DiagnosticPredicate DP(Operand.isBareSymbol());
1356 if (DP.isMatch())
1357 return MCTargetAsmParser::Match_Success;
1358 if (DP.isNearMatch())
1359 return LoongArchAsmParser::Match_InvalidBareSymbol;
1360 break;
1361 }
1362 case MCK_Imm: {
1363 DiagnosticPredicate DP(Operand.isImm());
1364 if (DP.isMatch())
1365 return MCTargetAsmParser::Match_Success;
1366 break;
1367 }
1368 case MCK_SImm26OperandB: {
1369 DiagnosticPredicate DP(Operand.isSImm26Operand());
1370 if (DP.isMatch())
1371 return MCTargetAsmParser::Match_Success;
1372 if (DP.isNearMatch())
1373 return LoongArchAsmParser::Match_InvalidSImm26Operand;
1374 break;
1375 }
1376 case MCK_SImm26OperandBL: {
1377 DiagnosticPredicate DP(Operand.isSImm26Operand());
1378 if (DP.isMatch())
1379 return MCTargetAsmParser::Match_Success;
1380 if (DP.isNearMatch())
1381 return LoongArchAsmParser::Match_InvalidSImm26Operand;
1382 break;
1383 }
1384 case MCK_TPRelAddSymbol: {
1385 DiagnosticPredicate DP(Operand.isTPRelAddSymbol());
1386 if (DP.isMatch())
1387 return MCTargetAsmParser::Match_Success;
1388 if (DP.isNearMatch())
1389 return LoongArchAsmParser::Match_InvalidTPRelAddSymbol;
1390 break;
1391 }
1392 case MCK_Imm32: {
1393 DiagnosticPredicate DP(Operand.isImm32());
1394 if (DP.isMatch())
1395 return MCTargetAsmParser::Match_Success;
1396 if (DP.isNearMatch())
1397 return LoongArchAsmParser::Match_InvalidImm32;
1398 break;
1399 }
1400 case MCK_Imm64: {
1401 DiagnosticPredicate DP(Operand.isImm64());
1402 if (DP.isMatch())
1403 return MCTargetAsmParser::Match_Success;
1404 if (DP.isNearMatch())
1405 return LoongArchAsmParser::Match_InvalidImm64;
1406 break;
1407 }
1408 case MCK_UImm1: {
1409 DiagnosticPredicate DP(Operand.isUImm1());
1410 if (DP.isMatch())
1411 return MCTargetAsmParser::Match_Success;
1412 if (DP.isNearMatch())
1413 return LoongArchAsmParser::Match_InvalidUImm1;
1414 break;
1415 }
1416 case MCK_UImm2: {
1417 DiagnosticPredicate DP(Operand.isUImm2());
1418 if (DP.isMatch())
1419 return MCTargetAsmParser::Match_Success;
1420 if (DP.isNearMatch())
1421 return LoongArchAsmParser::Match_InvalidUImm2;
1422 break;
1423 }
1424 case MCK_UImm2plus1: {
1425 DiagnosticPredicate DP(Operand.isUImm2plus1());
1426 if (DP.isMatch())
1427 return MCTargetAsmParser::Match_Success;
1428 if (DP.isNearMatch())
1429 return LoongArchAsmParser::Match_InvalidUImm2plus1;
1430 break;
1431 }
1432 case MCK_UImm3: {
1433 DiagnosticPredicate DP(Operand.isUImm3());
1434 if (DP.isMatch())
1435 return MCTargetAsmParser::Match_Success;
1436 if (DP.isNearMatch())
1437 return LoongArchAsmParser::Match_InvalidUImm3;
1438 break;
1439 }
1440 case MCK_UImm4: {
1441 DiagnosticPredicate DP(Operand.isUImm4());
1442 if (DP.isMatch())
1443 return MCTargetAsmParser::Match_Success;
1444 if (DP.isNearMatch())
1445 return LoongArchAsmParser::Match_InvalidUImm4;
1446 break;
1447 }
1448 case MCK_UImm5: {
1449 DiagnosticPredicate DP(Operand.isUImm5());
1450 if (DP.isMatch())
1451 return MCTargetAsmParser::Match_Success;
1452 if (DP.isNearMatch())
1453 return LoongArchAsmParser::Match_InvalidUImm5;
1454 break;
1455 }
1456 case MCK_UImm6: {
1457 DiagnosticPredicate DP(Operand.isUImm6());
1458 if (DP.isMatch())
1459 return MCTargetAsmParser::Match_Success;
1460 if (DP.isNearMatch())
1461 return LoongArchAsmParser::Match_InvalidUImm6;
1462 break;
1463 }
1464 case MCK_UImm7: {
1465 DiagnosticPredicate DP(Operand.isUImm7());
1466 if (DP.isMatch())
1467 return MCTargetAsmParser::Match_Success;
1468 if (DP.isNearMatch())
1469 return LoongArchAsmParser::Match_InvalidUImm7;
1470 break;
1471 }
1472 case MCK_UImm8: {
1473 DiagnosticPredicate DP(Operand.isUImm8());
1474 if (DP.isMatch())
1475 return MCTargetAsmParser::Match_Success;
1476 if (DP.isNearMatch())
1477 return LoongArchAsmParser::Match_InvalidUImm8;
1478 break;
1479 }
1480 case MCK_UImm12: {
1481 DiagnosticPredicate DP(Operand.isUImm12());
1482 if (DP.isMatch())
1483 return MCTargetAsmParser::Match_Success;
1484 if (DP.isNearMatch())
1485 return LoongArchAsmParser::Match_InvalidUImm12;
1486 break;
1487 }
1488 case MCK_UImm12ori: {
1489 DiagnosticPredicate DP(Operand.isUImm12ori());
1490 if (DP.isMatch())
1491 return MCTargetAsmParser::Match_Success;
1492 if (DP.isNearMatch())
1493 return LoongArchAsmParser::Match_InvalidUImm12ori;
1494 break;
1495 }
1496 case MCK_UImm14: {
1497 DiagnosticPredicate DP(Operand.isUImm14());
1498 if (DP.isMatch())
1499 return MCTargetAsmParser::Match_Success;
1500 if (DP.isNearMatch())
1501 return LoongArchAsmParser::Match_InvalidUImm14;
1502 break;
1503 }
1504 case MCK_UImm15: {
1505 DiagnosticPredicate DP(Operand.isUImm15());
1506 if (DP.isMatch())
1507 return MCTargetAsmParser::Match_Success;
1508 if (DP.isNearMatch())
1509 return LoongArchAsmParser::Match_InvalidUImm15;
1510 break;
1511 }
1512 case MCK_SImm5: {
1513 DiagnosticPredicate DP(Operand.isSImm5());
1514 if (DP.isMatch())
1515 return MCTargetAsmParser::Match_Success;
1516 if (DP.isNearMatch())
1517 return LoongArchAsmParser::Match_InvalidSImm5;
1518 break;
1519 }
1520 case MCK_SImm8: {
1521 DiagnosticPredicate DP(Operand.isSImm8());
1522 if (DP.isMatch())
1523 return MCTargetAsmParser::Match_Success;
1524 if (DP.isNearMatch())
1525 return LoongArchAsmParser::Match_InvalidSImm8;
1526 break;
1527 }
1528 case MCK_SImm8lsl1: {
1529 DiagnosticPredicate DP(Operand.isSImm8lsl1());
1530 if (DP.isMatch())
1531 return MCTargetAsmParser::Match_Success;
1532 if (DP.isNearMatch())
1533 return LoongArchAsmParser::Match_InvalidSImm8lsl1;
1534 break;
1535 }
1536 case MCK_SImm8lsl2: {
1537 DiagnosticPredicate DP(Operand.isSImm8lsl2());
1538 if (DP.isMatch())
1539 return MCTargetAsmParser::Match_Success;
1540 if (DP.isNearMatch())
1541 return LoongArchAsmParser::Match_InvalidSImm8lsl2;
1542 break;
1543 }
1544 case MCK_SImm8lsl3: {
1545 DiagnosticPredicate DP(Operand.isSImm8lsl3());
1546 if (DP.isMatch())
1547 return MCTargetAsmParser::Match_Success;
1548 if (DP.isNearMatch())
1549 return LoongArchAsmParser::Match_InvalidSImm8lsl3;
1550 break;
1551 }
1552 case MCK_SImm9lsl3: {
1553 DiagnosticPredicate DP(Operand.isSImm9lsl3());
1554 if (DP.isMatch())
1555 return MCTargetAsmParser::Match_Success;
1556 if (DP.isNearMatch())
1557 return LoongArchAsmParser::Match_InvalidSImm9lsl3;
1558 break;
1559 }
1560 case MCK_SImm10: {
1561 DiagnosticPredicate DP(Operand.isSImm10());
1562 if (DP.isMatch())
1563 return MCTargetAsmParser::Match_Success;
1564 if (DP.isNearMatch())
1565 return LoongArchAsmParser::Match_InvalidSImm10;
1566 break;
1567 }
1568 case MCK_SImm10lsl2: {
1569 DiagnosticPredicate DP(Operand.isSImm10lsl2());
1570 if (DP.isMatch())
1571 return MCTargetAsmParser::Match_Success;
1572 if (DP.isNearMatch())
1573 return LoongArchAsmParser::Match_InvalidSImm10lsl2;
1574 break;
1575 }
1576 case MCK_SImm11lsl1: {
1577 DiagnosticPredicate DP(Operand.isSImm11lsl1());
1578 if (DP.isMatch())
1579 return MCTargetAsmParser::Match_Success;
1580 if (DP.isNearMatch())
1581 return LoongArchAsmParser::Match_InvalidSImm11lsl1;
1582 break;
1583 }
1584 case MCK_SImm12: {
1585 DiagnosticPredicate DP(Operand.isSImm12());
1586 if (DP.isMatch())
1587 return MCTargetAsmParser::Match_Success;
1588 if (DP.isNearMatch())
1589 return LoongArchAsmParser::Match_InvalidSImm12;
1590 break;
1591 }
1592 case MCK_SImm12addlike: {
1593 DiagnosticPredicate DP(Operand.isSImm12addlike());
1594 if (DP.isMatch())
1595 return MCTargetAsmParser::Match_Success;
1596 if (DP.isNearMatch())
1597 return LoongArchAsmParser::Match_InvalidSImm12addlike;
1598 break;
1599 }
1600 case MCK_SImm12lu52id: {
1601 DiagnosticPredicate DP(Operand.isSImm12lu52id());
1602 if (DP.isMatch())
1603 return MCTargetAsmParser::Match_Success;
1604 if (DP.isNearMatch())
1605 return LoongArchAsmParser::Match_InvalidSImm12lu52id;
1606 break;
1607 }
1608 case MCK_SImm13: {
1609 DiagnosticPredicate DP(Operand.isSImm13());
1610 if (DP.isMatch())
1611 return MCTargetAsmParser::Match_Success;
1612 if (DP.isNearMatch())
1613 return LoongArchAsmParser::Match_InvalidSImm13;
1614 break;
1615 }
1616 case MCK_SImm14lsl2: {
1617 DiagnosticPredicate DP(Operand.isSImm14lsl2());
1618 if (DP.isMatch())
1619 return MCTargetAsmParser::Match_Success;
1620 if (DP.isNearMatch())
1621 return LoongArchAsmParser::Match_InvalidSImm14lsl2;
1622 break;
1623 }
1624 case MCK_SImm16: {
1625 DiagnosticPredicate DP(Operand.isSImm16());
1626 if (DP.isMatch())
1627 return MCTargetAsmParser::Match_Success;
1628 if (DP.isNearMatch())
1629 return LoongArchAsmParser::Match_InvalidSImm16;
1630 break;
1631 }
1632 case MCK_SImm16lsl2: {
1633 DiagnosticPredicate DP(Operand.isSImm16lsl2());
1634 if (DP.isMatch())
1635 return MCTargetAsmParser::Match_Success;
1636 if (DP.isNearMatch())
1637 return LoongArchAsmParser::Match_InvalidSImm16lsl2;
1638 break;
1639 }
1640 case MCK_SImm20: {
1641 DiagnosticPredicate DP(Operand.isSImm20());
1642 if (DP.isMatch())
1643 return MCTargetAsmParser::Match_Success;
1644 if (DP.isNearMatch())
1645 return LoongArchAsmParser::Match_InvalidSImm20;
1646 break;
1647 }
1648 case MCK_SImm20pcalau12i: {
1649 DiagnosticPredicate DP(Operand.isSImm20pcalau12i());
1650 if (DP.isMatch())
1651 return MCTargetAsmParser::Match_Success;
1652 if (DP.isNearMatch())
1653 return LoongArchAsmParser::Match_InvalidSImm20pcalau12i;
1654 break;
1655 }
1656 case MCK_SImm20lu12iw: {
1657 DiagnosticPredicate DP(Operand.isSImm20lu12iw());
1658 if (DP.isMatch())
1659 return MCTargetAsmParser::Match_Success;
1660 if (DP.isNearMatch())
1661 return LoongArchAsmParser::Match_InvalidSImm20lu12iw;
1662 break;
1663 }
1664 case MCK_SImm20lu32id: {
1665 DiagnosticPredicate DP(Operand.isSImm20lu32id());
1666 if (DP.isMatch())
1667 return MCTargetAsmParser::Match_Success;
1668 if (DP.isNearMatch())
1669 return LoongArchAsmParser::Match_InvalidSImm20lu32id;
1670 break;
1671 }
1672 case MCK_SImm20pcaddu18i: {
1673 DiagnosticPredicate DP(Operand.isSImm20pcaddu18i());
1674 if (DP.isMatch())
1675 return MCTargetAsmParser::Match_Success;
1676 if (DP.isNearMatch())
1677 return LoongArchAsmParser::Match_InvalidSImm20pcaddu18i;
1678 break;
1679 }
1680 case MCK_SImm20pcaddi: {
1681 DiagnosticPredicate DP(Operand.isSImm20pcaddi());
1682 if (DP.isMatch())
1683 return MCTargetAsmParser::Match_Success;
1684 if (DP.isNearMatch())
1685 return LoongArchAsmParser::Match_InvalidSImm20pcaddi;
1686 break;
1687 }
1688 case MCK_SImm21lsl2: {
1689 DiagnosticPredicate DP(Operand.isSImm21lsl2());
1690 if (DP.isMatch())
1691 return MCTargetAsmParser::Match_Success;
1692 if (DP.isNearMatch())
1693 return LoongArchAsmParser::Match_InvalidSImm21lsl2;
1694 break;
1695 }
1696 } // end switch (Kind)
1697
1698 if (Operand.isReg()) {
1699 static constexpr uint16_t Table[LoongArch::NUM_TARGET_REGS] = {
1700 InvalidMatchClass,
1701 MCK_FPR32,
1702 MCK_FPR32,
1703 MCK_FPR32,
1704 MCK_FPR32,
1705 MCK_FPR32,
1706 MCK_FPR32,
1707 MCK_FPR32,
1708 MCK_FPR32,
1709 MCK_FPR32,
1710 MCK_FPR32,
1711 MCK_FPR32,
1712 MCK_FPR32,
1713 MCK_FPR32,
1714 MCK_FPR32,
1715 MCK_FPR32,
1716 MCK_FPR32,
1717 MCK_FPR32,
1718 MCK_FPR32,
1719 MCK_FPR32,
1720 MCK_FPR32,
1721 MCK_FPR32,
1722 MCK_FPR32,
1723 MCK_FPR32,
1724 MCK_FPR32,
1725 MCK_FPR32,
1726 MCK_FPR32,
1727 MCK_FPR32,
1728 MCK_FPR32,
1729 MCK_FPR32,
1730 MCK_FPR32,
1731 MCK_FPR32,
1732 MCK_FPR32,
1733 MCK_CFR,
1734 MCK_CFR,
1735 MCK_CFR,
1736 MCK_CFR,
1737 MCK_CFR,
1738 MCK_CFR,
1739 MCK_CFR,
1740 MCK_CFR,
1741 MCK_FCSR,
1742 MCK_FCSR,
1743 MCK_FCSR,
1744 MCK_FCSR,
1745 MCK_GPRJR,
1746 MCK_GPR,
1747 MCK_GPRNoR0R1,
1748 MCK_GPRNoR0R1,
1749 MCK_GPRT,
1750 MCK_GPRT,
1751 MCK_GPRT,
1752 MCK_GPRT,
1753 MCK_GPRT,
1754 MCK_GPRT,
1755 MCK_GPRT,
1756 MCK_GPRT,
1757 MCK_GPRT,
1758 MCK_GPRT,
1759 MCK_GPRT,
1760 MCK_GPRT,
1761 MCK_GPRT,
1762 MCK_GPRT,
1763 MCK_GPRT,
1764 MCK_GPRT,
1765 MCK_GPRT,
1766 MCK_GPRNoR0R1,
1767 MCK_GPRNoR0R1,
1768 MCK_GPRNoR0R1,
1769 MCK_GPRNoR0R1,
1770 MCK_GPRNoR0R1,
1771 MCK_GPRNoR0R1,
1772 MCK_GPRNoR0R1,
1773 MCK_GPRNoR0R1,
1774 MCK_GPRNoR0R1,
1775 MCK_GPRNoR0R1,
1776 MCK_GPRNoR0R1,
1777 MCK_SCR,
1778 MCK_SCR,
1779 MCK_SCR,
1780 MCK_SCR,
1781 MCK_LSX128,
1782 MCK_LSX128,
1783 MCK_LSX128,
1784 MCK_LSX128,
1785 MCK_LSX128,
1786 MCK_LSX128,
1787 MCK_LSX128,
1788 MCK_LSX128,
1789 MCK_LSX128,
1790 MCK_LSX128,
1791 MCK_LSX128,
1792 MCK_LSX128,
1793 MCK_LSX128,
1794 MCK_LSX128,
1795 MCK_LSX128,
1796 MCK_LSX128,
1797 MCK_LSX128,
1798 MCK_LSX128,
1799 MCK_LSX128,
1800 MCK_LSX128,
1801 MCK_LSX128,
1802 MCK_LSX128,
1803 MCK_LSX128,
1804 MCK_LSX128,
1805 MCK_LSX128,
1806 MCK_LSX128,
1807 MCK_LSX128,
1808 MCK_LSX128,
1809 MCK_LSX128,
1810 MCK_LSX128,
1811 MCK_LSX128,
1812 MCK_LSX128,
1813 MCK_LASX256,
1814 MCK_LASX256,
1815 MCK_LASX256,
1816 MCK_LASX256,
1817 MCK_LASX256,
1818 MCK_LASX256,
1819 MCK_LASX256,
1820 MCK_LASX256,
1821 MCK_LASX256,
1822 MCK_LASX256,
1823 MCK_LASX256,
1824 MCK_LASX256,
1825 MCK_LASX256,
1826 MCK_LASX256,
1827 MCK_LASX256,
1828 MCK_LASX256,
1829 MCK_LASX256,
1830 MCK_LASX256,
1831 MCK_LASX256,
1832 MCK_LASX256,
1833 MCK_LASX256,
1834 MCK_LASX256,
1835 MCK_LASX256,
1836 MCK_LASX256,
1837 MCK_LASX256,
1838 MCK_LASX256,
1839 MCK_LASX256,
1840 MCK_LASX256,
1841 MCK_LASX256,
1842 MCK_LASX256,
1843 MCK_LASX256,
1844 MCK_LASX256,
1845 MCK_FPR64,
1846 MCK_FPR64,
1847 MCK_FPR64,
1848 MCK_FPR64,
1849 MCK_FPR64,
1850 MCK_FPR64,
1851 MCK_FPR64,
1852 MCK_FPR64,
1853 MCK_FPR64,
1854 MCK_FPR64,
1855 MCK_FPR64,
1856 MCK_FPR64,
1857 MCK_FPR64,
1858 MCK_FPR64,
1859 MCK_FPR64,
1860 MCK_FPR64,
1861 MCK_FPR64,
1862 MCK_FPR64,
1863 MCK_FPR64,
1864 MCK_FPR64,
1865 MCK_FPR64,
1866 MCK_FPR64,
1867 MCK_FPR64,
1868 MCK_FPR64,
1869 MCK_FPR64,
1870 MCK_FPR64,
1871 MCK_FPR64,
1872 MCK_FPR64,
1873 MCK_FPR64,
1874 MCK_FPR64,
1875 MCK_FPR64,
1876 MCK_FPR64,
1877 };
1878
1879 MCRegister Reg = Operand.getReg();
1880 MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass;
1881 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
1882 getDiagKindFromRegisterClass(Kind);
1883 }
1884
1885 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
1886 return getDiagKindFromRegisterClass(Kind);
1887
1888 return MCTargetAsmParser::Match_InvalidOperand;
1889}
1890
1891#ifndef NDEBUG
1892const char *getMatchClassName(MatchClassKind Kind) {
1893 switch (Kind) {
1894 case InvalidMatchClass: return "InvalidMatchClass";
1895 case OptionalMatchClass: return "OptionalMatchClass";
1896 case MCK_FCSR: return "MCK_FCSR";
1897 case MCK_SCR: return "MCK_SCR";
1898 case MCK_CFR: return "MCK_CFR";
1899 case MCK_GPRT: return "MCK_GPRT";
1900 case MCK_GPRNoR0R1: return "MCK_GPRNoR0R1";
1901 case MCK_GPRJR: return "MCK_GPRJR";
1902 case MCK_FPR32: return "MCK_FPR32";
1903 case MCK_FPR64: return "MCK_FPR64";
1904 case MCK_GPR: return "MCK_GPR";
1905 case MCK_LASX256: return "MCK_LASX256";
1906 case MCK_LSX128: return "MCK_LSX128";
1907 case MCK_AtomicMemAsmOperand: return "MCK_AtomicMemAsmOperand";
1908 case MCK_BareSymbol: return "MCK_BareSymbol";
1909 case MCK_Imm: return "MCK_Imm";
1910 case MCK_SImm26OperandB: return "MCK_SImm26OperandB";
1911 case MCK_SImm26OperandBL: return "MCK_SImm26OperandBL";
1912 case MCK_TPRelAddSymbol: return "MCK_TPRelAddSymbol";
1913 case MCK_Imm32: return "MCK_Imm32";
1914 case MCK_Imm64: return "MCK_Imm64";
1915 case MCK_UImm1: return "MCK_UImm1";
1916 case MCK_UImm2: return "MCK_UImm2";
1917 case MCK_UImm2plus1: return "MCK_UImm2plus1";
1918 case MCK_UImm3: return "MCK_UImm3";
1919 case MCK_UImm4: return "MCK_UImm4";
1920 case MCK_UImm5: return "MCK_UImm5";
1921 case MCK_UImm6: return "MCK_UImm6";
1922 case MCK_UImm7: return "MCK_UImm7";
1923 case MCK_UImm8: return "MCK_UImm8";
1924 case MCK_UImm12: return "MCK_UImm12";
1925 case MCK_UImm12ori: return "MCK_UImm12ori";
1926 case MCK_UImm14: return "MCK_UImm14";
1927 case MCK_UImm15: return "MCK_UImm15";
1928 case MCK_SImm5: return "MCK_SImm5";
1929 case MCK_SImm8: return "MCK_SImm8";
1930 case MCK_SImm8lsl1: return "MCK_SImm8lsl1";
1931 case MCK_SImm8lsl2: return "MCK_SImm8lsl2";
1932 case MCK_SImm8lsl3: return "MCK_SImm8lsl3";
1933 case MCK_SImm9lsl3: return "MCK_SImm9lsl3";
1934 case MCK_SImm10: return "MCK_SImm10";
1935 case MCK_SImm10lsl2: return "MCK_SImm10lsl2";
1936 case MCK_SImm11lsl1: return "MCK_SImm11lsl1";
1937 case MCK_SImm12: return "MCK_SImm12";
1938 case MCK_SImm12addlike: return "MCK_SImm12addlike";
1939 case MCK_SImm12lu52id: return "MCK_SImm12lu52id";
1940 case MCK_SImm13: return "MCK_SImm13";
1941 case MCK_SImm14lsl2: return "MCK_SImm14lsl2";
1942 case MCK_SImm16: return "MCK_SImm16";
1943 case MCK_SImm16lsl2: return "MCK_SImm16lsl2";
1944 case MCK_SImm20: return "MCK_SImm20";
1945 case MCK_SImm20pcalau12i: return "MCK_SImm20pcalau12i";
1946 case MCK_SImm20lu12iw: return "MCK_SImm20lu12iw";
1947 case MCK_SImm20lu32id: return "MCK_SImm20lu32id";
1948 case MCK_SImm20pcaddu18i: return "MCK_SImm20pcaddu18i";
1949 case MCK_SImm20pcaddi: return "MCK_SImm20pcaddi";
1950 case MCK_SImm21lsl2: return "MCK_SImm21lsl2";
1951 case NumMatchClassKinds: return "NumMatchClassKinds";
1952 }
1953 llvm_unreachable("unhandled MatchClassKind!");
1954}
1955
1956#endif // NDEBUG
1957FeatureBitset LoongArchAsmParser::
1958ComputeAvailableFeatures(const FeatureBitset &FB) const {
1959 FeatureBitset Features;
1960 if (FB[LoongArch::Feature64Bit])
1961 Features.set(Feature_IsLA64Bit);
1962 if (!FB[LoongArch::Feature64Bit])
1963 Features.set(Feature_IsLA32Bit);
1964 if (FB[LoongArch::LaGlobalWithPcrel])
1965 Features.set(Feature_HasLaGlobalWithPcrelBit);
1966 if (FB[LoongArch::LaGlobalWithAbs])
1967 Features.set(Feature_HasLaGlobalWithAbsBit);
1968 if (FB[LoongArch::LaLocalWithAbs])
1969 Features.set(Feature_HasLaLocalWithAbsBit);
1970 return Features;
1971}
1972
1973static bool checkAsmTiedOperandConstraints(const LoongArchAsmParser&AsmParser,
1974 unsigned Kind, const OperandVector &Operands,
1975 uint64_t &ErrorInfo) {
1976 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1977 const uint8_t *Converter = ConversionTable[Kind];
1978 for (const uint8_t *p = Converter; *p; p += 2) {
1979 switch (*p) {
1980 case CVT_Tied: {
1981 unsigned OpIdx = *(p + 1);
1982 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
1983 std::begin(TiedAsmOperandTable)) &&
1984 "Tied operand not found");
1985 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
1986 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
1987 if (OpndNum1 != OpndNum2) {
1988 auto &SrcOp1 = Operands[OpndNum1];
1989 auto &SrcOp2 = Operands[OpndNum2];
1990 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) {
1991 ErrorInfo = OpndNum2;
1992 return false;
1993 }
1994 }
1995 break;
1996 }
1997 default:
1998 break;
1999 }
2000 }
2001 return true;
2002}
2003
2004static const char MnemonicTable[] =
2005 "\000\005adc.b\005adc.d\005adc.h\005adc.w\005add.d\005add.w\006addi.d\006"
2006 "addi.w\taddu12i.d\taddu12i.w\taddu16i.d\006alsl.d\006alsl.w\007alsl.wu\007"
2007 "amadd.b\007amadd.d\007amadd.h\007amadd.w\namadd_db.b\namadd_db.d\namadd"
2008 "_db.h\namadd_db.w\007amand.d\007amand.w\namand_db.d\namand_db.w\007amca"
2009 "s.b\007amcas.d\007amcas.h\007amcas.w\namcas_db.b\namcas_db.d\namcas_db."
2010 "h\namcas_db.w\007ammax.d\010ammax.du\007ammax.w\010ammax.wu\nammax_db.d"
2011 "\013ammax_db.du\nammax_db.w\013ammax_db.wu\007ammin.d\010ammin.du\007am"
2012 "min.w\010ammin.wu\nammin_db.d\013ammin_db.du\nammin_db.w\013ammin_db.wu"
2013 "\006amor.d\006amor.w\tamor_db.d\tamor_db.w\010amswap.b\010amswap.d\010a"
2014 "mswap.h\010amswap.w\013amswap_db.b\013amswap_db.d\013amswap_db.h\013ams"
2015 "wap_db.w\007amxor.d\007amxor.w\namxor_db.d\namxor_db.w\003and\004andi\004"
2016 "andn\010armadc.w\010armadd.w\010armand.w\tarmmfflag\010armmov.d\010armm"
2017 "ov.w\007armmove\tarmmtflag\010armnot.w\007armor.w\tarmrotr.w\narmrotri."
2018 "w\010armrrx.w\010armsbc.w\010armsll.w\tarmslli.w\010armsra.w\tarmsrai.w"
2019 "\010armsrl.w\tarmsrli.w\010armsub.w\010armxor.w\010asrtgt.d\010asrtle.d"
2020 "\001b\005bceqz\005bcnez\003beq\004beqz\003bge\004bgeu\004bgez\003bgt\004"
2021 "bgtu\004bgtz\tbitrev.4b\tbitrev.8b\010bitrev.d\010bitrev.w\002bl\003ble"
2022 "\004bleu\004blez\003blt\004bltu\004bltz\003bne\004bnez\005break\tbstrin"
2023 "s.d\tbstrins.w\nbstrpick.d\nbstrpick.w\nbytepick.d\nbytepick.w\005cacop"
2024 "\006call36\005clo.d\005clo.w\005clz.d\005clz.w\006cpucfg\tcrc.w.b.w\tcr"
2025 "c.w.d.w\tcrc.w.h.w\tcrc.w.w.w\ncrcc.w.b.w\ncrcc.w.d.w\ncrcc.w.h.w\ncrcc"
2026 ".w.w.w\005csrrd\005csrwr\007csrxchg\005cto.d\005cto.w\005ctz.d\005ctz.w"
2027 "\004dbar\004dbcl\005div.d\006div.du\005div.w\006div.wu\004ertn\007ext.w"
2028 ".b\007ext.w.h\006fabs.d\006fabs.s\006fadd.d\006fadd.s\010fclass.d\010fc"
2029 "lass.s\nfcmp.caf.d\nfcmp.caf.s\nfcmp.ceq.d\nfcmp.ceq.s\nfcmp.cle.d\nfcm"
2030 "p.cle.s\nfcmp.clt.d\nfcmp.clt.s\nfcmp.cne.d\nfcmp.cne.s\nfcmp.cor.d\nfc"
2031 "mp.cor.s\013fcmp.cueq.d\013fcmp.cueq.s\013fcmp.cule.d\013fcmp.cule.s\013"
2032 "fcmp.cult.d\013fcmp.cult.s\nfcmp.cun.d\nfcmp.cun.s\013fcmp.cune.d\013fc"
2033 "mp.cune.s\nfcmp.saf.d\nfcmp.saf.s\nfcmp.seq.d\nfcmp.seq.s\nfcmp.sle.d\n"
2034 "fcmp.sle.s\nfcmp.slt.d\nfcmp.slt.s\nfcmp.sne.d\nfcmp.sne.s\nfcmp.sor.d\n"
2035 "fcmp.sor.s\013fcmp.sueq.d\013fcmp.sueq.s\013fcmp.sule.d\013fcmp.sule.s\013"
2036 "fcmp.sult.d\013fcmp.sult.s\nfcmp.sun.d\nfcmp.sun.s\013fcmp.sune.d\013fc"
2037 "mp.sune.s\013fcopysign.d\013fcopysign.s\tfcvt.d.ld\010fcvt.d.s\tfcvt.ld"
2038 ".d\010fcvt.s.d\tfcvt.ud.d\006fdiv.d\006fdiv.s\tffint.d.l\tffint.d.w\tff"
2039 "int.s.l\tffint.s.w\005fld.d\005fld.s\007fldgt.d\007fldgt.s\007fldle.d\007"
2040 "fldle.s\006fldx.d\006fldx.s\007flogb.d\007flogb.s\007fmadd.d\007fmadd.s"
2041 "\006fmax.d\006fmax.s\007fmaxa.d\007fmaxa.s\006fmin.d\006fmin.s\007fmina"
2042 ".d\007fmina.s\006fmov.d\006fmov.s\007fmsub.d\007fmsub.s\006fmul.d\006fm"
2043 "ul.s\006fneg.d\006fneg.s\010fnmadd.d\010fnmadd.s\010fnmsub.d\010fnmsub."
2044 "s\010frecip.d\010frecip.s\tfrecipe.d\tfrecipe.s\007frint.d\007frint.s\010"
2045 "frsqrt.d\010frsqrt.s\tfrsqrte.d\tfrsqrte.s\tfscaleb.d\tfscaleb.s\004fse"
2046 "l\007fsqrt.d\007fsqrt.s\005fst.d\005fst.s\007fstgt.d\007fstgt.s\007fstl"
2047 "e.d\007fstle.s\006fstx.d\006fstx.s\006fsub.d\006fsub.s\tftint.l.d\tftin"
2048 "t.l.s\tftint.w.d\tftint.w.s\013ftintrm.l.d\013ftintrm.l.s\013ftintrm.w."
2049 "d\013ftintrm.w.s\014ftintrne.l.d\014ftintrne.l.s\014ftintrne.w.d\014fti"
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2215 "x86dec.b\010x86dec.d\010x86dec.h\010x86dec.w\tx86dectop\010x86inc.b\010"
2216 "x86inc.d\010x86inc.h\010x86inc.w\tx86inctop\tx86mfflag\010x86mftop\tx86"
2217 "mtflag\010x86mttop\010x86mul.b\tx86mul.bu\010x86mul.d\tx86mul.du\010x86"
2218 "mul.h\tx86mul.hu\010x86mul.w\tx86mul.wu\007x86or.b\007x86or.d\007x86or."
2219 "h\007x86or.w\010x86rcl.b\010x86rcl.d\010x86rcl.h\010x86rcl.w\tx86rcli.b"
2220 "\tx86rcli.d\tx86rcli.h\tx86rcli.w\010x86rcr.b\010x86rcr.d\010x86rcr.h\010"
2221 "x86rcr.w\tx86rcri.b\tx86rcri.d\tx86rcri.h\tx86rcri.w\tx86rotl.b\tx86rot"
2222 "l.d\tx86rotl.h\tx86rotl.w\nx86rotli.b\nx86rotli.d\nx86rotli.h\nx86rotli"
2223 ".w\tx86rotr.b\tx86rotr.d\tx86rotr.h\tx86rotr.w\nx86rotri.b\nx86rotri.d\n"
2224 "x86rotri.h\nx86rotri.w\010x86sbc.b\010x86sbc.d\010x86sbc.h\010x86sbc.w\t"
2225 "x86settag\010x86settm\010x86sll.b\010x86sll.d\010x86sll.h\010x86sll.w\t"
2226 "x86slli.b\tx86slli.d\tx86slli.h\tx86slli.w\010x86sra.b\010x86sra.d\010x"
2227 "86sra.h\010x86sra.w\tx86srai.b\tx86srai.d\tx86srai.h\tx86srai.w\010x86s"
2228 "rl.b\010x86srl.d\010x86srl.h\010x86srl.w\tx86srli.b\tx86srli.d\tx86srli"
2229 ".h\tx86srli.w\010x86sub.b\010x86sub.d\tx86sub.du\010x86sub.h\010x86sub."
2230 "w\tx86sub.wu\010x86xor.b\010x86xor.d\010x86xor.h\010x86xor.w\003xor\004"
2231 "xori\010xvabsd.b\txvabsd.bu\010xvabsd.d\txvabsd.du\010xvabsd.h\txvabsd."
2232 "hu\010xvabsd.w\txvabsd.wu\007xvadd.b\007xvadd.d\007xvadd.h\007xvadd.q\007"
2233 "xvadd.w\010xvadda.b\010xvadda.d\010xvadda.h\010xvadda.w\txvaddi.bu\txva"
2234 "ddi.du\txvaddi.hu\txvaddi.wu\014xvaddwev.d.w\015xvaddwev.d.wu\017xvaddw"
2235 "ev.d.wu.w\014xvaddwev.h.b\015xvaddwev.h.bu\017xvaddwev.h.bu.b\014xvaddw"
2236 "ev.q.d\015xvaddwev.q.du\017xvaddwev.q.du.d\014xvaddwev.w.h\015xvaddwev."
2237 "w.hu\017xvaddwev.w.hu.h\014xvaddwod.d.w\015xvaddwod.d.wu\017xvaddwod.d."
2238 "wu.w\014xvaddwod.h.b\015xvaddwod.h.bu\017xvaddwod.h.bu.b\014xvaddwod.q."
2239 "d\015xvaddwod.q.du\017xvaddwod.q.du.d\014xvaddwod.w.h\015xvaddwod.w.hu\017"
2240 "xvaddwod.w.hu.h\007xvand.v\010xvandi.b\010xvandn.v\007xvavg.b\010xvavg."
2241 "bu\007xvavg.d\010xvavg.du\007xvavg.h\010xvavg.hu\007xvavg.w\010xvavg.wu"
2242 "\010xvavgr.b\txvavgr.bu\010xvavgr.d\txvavgr.du\010xvavgr.h\txvavgr.hu\010"
2243 "xvavgr.w\txvavgr.wu\nxvbitclr.b\nxvbitclr.d\nxvbitclr.h\nxvbitclr.w\013"
2244 "xvbitclri.b\013xvbitclri.d\013xvbitclri.h\013xvbitclri.w\nxvbitrev.b\nx"
2245 "vbitrev.d\nxvbitrev.h\nxvbitrev.w\013xvbitrevi.b\013xvbitrevi.d\013xvbi"
2246 "trevi.h\013xvbitrevi.w\nxvbitsel.v\013xvbitseli.b\nxvbitset.b\nxvbitset"
2247 ".d\nxvbitset.h\nxvbitset.w\013xvbitseti.b\013xvbitseti.d\013xvbitseti.h"
2248 "\013xvbitseti.w\010xvbsll.v\010xvbsrl.v\007xvclo.b\007xvclo.d\007xvclo."
2249 "h\007xvclo.w\007xvclz.b\007xvclz.d\007xvclz.h\007xvclz.w\007xvdiv.b\010"
2250 "xvdiv.bu\007xvdiv.d\010xvdiv.du\007xvdiv.h\010xvdiv.hu\007xvdiv.w\010xv"
2251 "div.wu\nxvexth.d.w\014xvexth.du.wu\nxvexth.h.b\014xvexth.hu.bu\nxvexth."
2252 "q.d\014xvexth.qu.du\nxvexth.w.h\014xvexth.wu.hu\nxvextl.q.d\014xvextl.q"
2253 "u.du\013xvextrins.b\013xvextrins.d\013xvextrins.h\013xvextrins.w\010xvf"
2254 "add.d\010xvfadd.s\nxvfclass.d\nxvfclass.s\014xvfcmp.caf.d\014xvfcmp.caf"
2255 ".s\014xvfcmp.ceq.d\014xvfcmp.ceq.s\014xvfcmp.cle.d\014xvfcmp.cle.s\014x"
2256 "vfcmp.clt.d\014xvfcmp.clt.s\014xvfcmp.cne.d\014xvfcmp.cne.s\014xvfcmp.c"
2257 "or.d\014xvfcmp.cor.s\015xvfcmp.cueq.d\015xvfcmp.cueq.s\015xvfcmp.cule.d"
2258 "\015xvfcmp.cule.s\015xvfcmp.cult.d\015xvfcmp.cult.s\014xvfcmp.cun.d\014"
2259 "xvfcmp.cun.s\015xvfcmp.cune.d\015xvfcmp.cune.s\014xvfcmp.saf.d\014xvfcm"
2260 "p.saf.s\014xvfcmp.seq.d\014xvfcmp.seq.s\014xvfcmp.sle.d\014xvfcmp.sle.s"
2261 "\014xvfcmp.slt.d\014xvfcmp.slt.s\014xvfcmp.sne.d\014xvfcmp.sne.s\014xvf"
2262 "cmp.sor.d\014xvfcmp.sor.s\015xvfcmp.sueq.d\015xvfcmp.sueq.s\015xvfcmp.s"
2263 "ule.d\015xvfcmp.sule.s\015xvfcmp.sult.d\015xvfcmp.sult.s\014xvfcmp.sun."
2264 "d\014xvfcmp.sun.s\015xvfcmp.sune.d\015xvfcmp.sune.s\nxvfcvt.h.s\nxvfcvt"
2265 ".s.d\013xvfcvth.d.s\013xvfcvth.s.h\013xvfcvtl.d.s\013xvfcvtl.s.h\010xvf"
2266 "div.d\010xvfdiv.s\013xvffint.d.l\014xvffint.d.lu\013xvffint.s.l\013xvff"
2267 "int.s.w\014xvffint.s.wu\014xvffinth.d.w\014xvffintl.d.w\txvflogb.d\txvf"
2268 "logb.s\txvfmadd.d\txvfmadd.s\010xvfmax.d\010xvfmax.s\txvfmaxa.d\txvfmax"
2269 "a.s\010xvfmin.d\010xvfmin.s\txvfmina.d\txvfmina.s\txvfmsub.d\txvfmsub.s"
2270 "\010xvfmul.d\010xvfmul.s\nxvfnmadd.d\nxvfnmadd.s\nxvfnmsub.d\nxvfnmsub."
2271 "s\nxvfrecip.d\nxvfrecip.s\013xvfrecipe.d\013xvfrecipe.s\txvfrint.d\txvf"
2272 "rint.s\013xvfrintrm.d\013xvfrintrm.s\014xvfrintrne.d\014xvfrintrne.s\013"
2273 "xvfrintrp.d\013xvfrintrp.s\013xvfrintrz.d\013xvfrintrz.s\nxvfrsqrt.d\nx"
2274 "vfrsqrt.s\013xvfrsqrte.d\013xvfrsqrte.s\txvfrstp.b\txvfrstp.h\nxvfrstpi"
2275 ".b\nxvfrstpi.h\txvfsqrt.d\txvfsqrt.s\010xvfsub.d\010xvfsub.s\013xvftint"
2276 ".l.d\014xvftint.lu.d\013xvftint.w.d\013xvftint.w.s\014xvftint.wu.s\014x"
2277 "vftinth.l.s\014xvftintl.l.s\015xvftintrm.l.d\015xvftintrm.w.d\015xvftin"
2278 "trm.w.s\016xvftintrmh.l.s\016xvftintrml.l.s\016xvftintrne.l.d\016xvftin"
2279 "trne.w.d\016xvftintrne.w.s\017xvftintrneh.l.s\017xvftintrnel.l.s\015xvf"
2280 "tintrp.l.d\015xvftintrp.w.d\015xvftintrp.w.s\016xvftintrph.l.s\016xvfti"
2281 "ntrpl.l.s\015xvftintrz.l.d\016xvftintrz.lu.d\015xvftintrz.w.d\015xvftin"
2282 "trz.w.s\016xvftintrz.wu.s\016xvftintrzh.l.s\016xvftintrzl.l.s\013xvhadd"
2283 "w.d.w\015xvhaddw.du.wu\013xvhaddw.h.b\015xvhaddw.hu.bu\013xvhaddw.q.d\015"
2284 "xvhaddw.qu.du\013xvhaddw.w.h\015xvhaddw.wu.hu\txvhseli.d\013xvhsubw.d.w"
2285 "\015xvhsubw.du.wu\013xvhsubw.h.b\015xvhsubw.hu.bu\013xvhsubw.q.d\015xvh"
2286 "subw.qu.du\013xvhsubw.w.h\015xvhsubw.wu.hu\010xvilvh.b\010xvilvh.d\010x"
2287 "vilvh.h\010xvilvh.w\010xvilvl.b\010xvilvl.d\010xvilvl.h\010xvilvl.w\014"
2288 "xvinsgr2vr.d\014xvinsgr2vr.w\nxvinsve0.d\nxvinsve0.w\004xvld\005xvldi\n"
2289 "xvldrepl.b\nxvldrepl.d\nxvldrepl.h\nxvldrepl.w\005xvldx\010xvmadd.b\010"
2290 "xvmadd.d\010xvmadd.h\010xvmadd.w\015xvmaddwev.d.w\016xvmaddwev.d.wu\020"
2291 "xvmaddwev.d.wu.w\015xvmaddwev.h.b\016xvmaddwev.h.bu\020xvmaddwev.h.bu.b"
2292 "\015xvmaddwev.q.d\016xvmaddwev.q.du\020xvmaddwev.q.du.d\015xvmaddwev.w."
2293 "h\016xvmaddwev.w.hu\020xvmaddwev.w.hu.h\015xvmaddwod.d.w\016xvmaddwod.d"
2294 ".wu\020xvmaddwod.d.wu.w\015xvmaddwod.h.b\016xvmaddwod.h.bu\020xvmaddwod"
2295 ".h.bu.b\015xvmaddwod.q.d\016xvmaddwod.q.du\020xvmaddwod.q.du.d\015xvmad"
2296 "dwod.w.h\016xvmaddwod.w.hu\020xvmaddwod.w.hu.h\007xvmax.b\010xvmax.bu\007"
2297 "xvmax.d\010xvmax.du\007xvmax.h\010xvmax.hu\007xvmax.w\010xvmax.wu\010xv"
2298 "maxi.b\txvmaxi.bu\010xvmaxi.d\txvmaxi.du\010xvmaxi.h\txvmaxi.hu\010xvma"
2299 "xi.w\txvmaxi.wu\007xvmin.b\010xvmin.bu\007xvmin.d\010xvmin.du\007xvmin."
2300 "h\010xvmin.hu\007xvmin.w\010xvmin.wu\010xvmini.b\txvmini.bu\010xvmini.d"
2301 "\txvmini.du\010xvmini.h\txvmini.hu\010xvmini.w\txvmini.wu\007xvmod.b\010"
2302 "xvmod.bu\007xvmod.d\010xvmod.du\007xvmod.h\010xvmod.hu\007xvmod.w\010xv"
2303 "mod.wu\nxvmskgez.b\nxvmskltz.b\nxvmskltz.d\nxvmskltz.h\nxvmskltz.w\txvm"
2304 "sknz.b\010xvmsub.b\010xvmsub.d\010xvmsub.h\010xvmsub.w\007xvmuh.b\010xv"
2305 "muh.bu\007xvmuh.d\010xvmuh.du\007xvmuh.h\010xvmuh.hu\007xvmuh.w\010xvmu"
2306 "h.wu\007xvmul.b\007xvmul.d\007xvmul.h\007xvmul.w\014xvmulwev.d.w\015xvm"
2307 "ulwev.d.wu\017xvmulwev.d.wu.w\014xvmulwev.h.b\015xvmulwev.h.bu\017xvmul"
2308 "wev.h.bu.b\014xvmulwev.q.d\015xvmulwev.q.du\017xvmulwev.q.du.d\014xvmul"
2309 "wev.w.h\015xvmulwev.w.hu\017xvmulwev.w.hu.h\014xvmulwod.d.w\015xvmulwod"
2310 ".d.wu\017xvmulwod.d.wu.w\014xvmulwod.h.b\015xvmulwod.h.bu\017xvmulwod.h"
2311 ".bu.b\014xvmulwod.q.d\015xvmulwod.q.du\017xvmulwod.q.du.d\014xvmulwod.w"
2312 ".h\015xvmulwod.w.hu\017xvmulwod.w.hu.h\007xvneg.b\007xvneg.d\007xvneg.h"
2313 "\007xvneg.w\007xvnor.v\010xvnori.b\006xvor.v\007xvori.b\007xvorn.v\nxvp"
2314 "ackev.b\nxvpackev.d\nxvpackev.h\nxvpackev.w\nxvpackod.b\nxvpackod.d\nxv"
2315 "packod.h\nxvpackod.w\010xvpcnt.b\010xvpcnt.d\010xvpcnt.h\010xvpcnt.w\010"
2316 "xvperm.w\txvpermi.d\txvpermi.q\txvpermi.w\nxvpickev.b\nxvpickev.d\nxvpi"
2317 "ckev.h\nxvpickev.w\nxvpickod.b\nxvpickod.d\nxvpickod.h\nxvpickod.w\nxvp"
2318 "ickve.d\nxvpickve.w\015xvpickve2gr.d\016xvpickve2gr.du\015xvpickve2gr.w"
2319 "\016xvpickve2gr.wu\016xvrepl128vei.b\016xvrepl128vei.d\016xvrepl128vei."
2320 "h\016xvrepl128vei.w\015xvreplgr2vr.b\015xvreplgr2vr.d\015xvreplgr2vr.h\015"
2321 "xvreplgr2vr.w\txvrepli.b\txvrepli.d\txvrepli.h\txvrepli.w\nxvreplve.b\n"
2322 "xvreplve.d\nxvreplve.h\nxvreplve.w\013xvreplve0.b\013xvreplve0.d\013xvr"
2323 "eplve0.h\013xvreplve0.q\013xvreplve0.w\010xvrotr.b\010xvrotr.d\010xvrot"
2324 "r.h\010xvrotr.w\txvrotri.b\txvrotri.d\txvrotri.h\txvrotri.w\010xvsadd.b"
2325 "\txvsadd.bu\010xvsadd.d\txvsadd.du\010xvsadd.h\txvsadd.hu\010xvsadd.w\t"
2326 "xvsadd.wu\007xvsat.b\010xvsat.bu\007xvsat.d\010xvsat.du\007xvsat.h\010x"
2327 "vsat.hu\007xvsat.w\010xvsat.wu\007xvseq.b\007xvseq.d\007xvseq.h\007xvse"
2328 "q.w\010xvseqi.b\010xvseqi.d\010xvseqi.h\010xvseqi.w\015xvsetallnez.b\015"
2329 "xvsetallnez.d\015xvsetallnez.h\015xvsetallnez.w\015xvsetanyeqz.b\015xvs"
2330 "etanyeqz.d\015xvsetanyeqz.h\015xvsetanyeqz.w\nxvseteqz.v\nxvsetnez.v\010"
2331 "xvshuf.b\010xvshuf.d\010xvshuf.h\010xvshuf.w\nxvshuf4i.b\nxvshuf4i.d\nx"
2332 "vshuf4i.h\nxvshuf4i.w\013xvsigncov.b\013xvsigncov.d\013xvsigncov.h\013x"
2333 "vsigncov.w\007xvsle.b\010xvsle.bu\007xvsle.d\010xvsle.du\007xvsle.h\010"
2334 "xvsle.hu\007xvsle.w\010xvsle.wu\010xvslei.b\txvslei.bu\010xvslei.d\txvs"
2335 "lei.du\010xvslei.h\txvslei.hu\010xvslei.w\txvslei.wu\007xvsll.b\007xvsl"
2336 "l.d\007xvsll.h\007xvsll.w\010xvslli.b\010xvslli.d\010xvslli.h\010xvslli"
2337 ".w\014xvsllwil.d.w\016xvsllwil.du.wu\014xvsllwil.h.b\016xvsllwil.hu.bu\014"
2338 "xvsllwil.w.h\016xvsllwil.wu.hu\007xvslt.b\010xvslt.bu\007xvslt.d\010xvs"
2339 "lt.du\007xvslt.h\010xvslt.hu\007xvslt.w\010xvslt.wu\010xvslti.b\txvslti"
2340 ".bu\010xvslti.d\txvslti.du\010xvslti.h\txvslti.hu\010xvslti.w\txvslti.w"
2341 "u\007xvsra.b\007xvsra.d\007xvsra.h\007xvsra.w\010xvsrai.b\010xvsrai.d\010"
2342 "xvsrai.h\010xvsrai.w\nxvsran.b.h\nxvsran.h.w\nxvsran.w.d\013xvsrani.b.h"
2343 "\013xvsrani.d.q\013xvsrani.h.w\013xvsrani.w.d\010xvsrar.b\010xvsrar.d\010"
2344 "xvsrar.h\010xvsrar.w\txvsrari.b\txvsrari.d\txvsrari.h\txvsrari.w\013xvs"
2345 "rarn.b.h\013xvsrarn.h.w\013xvsrarn.w.d\014xvsrarni.b.h\014xvsrarni.d.q\014"
2346 "xvsrarni.h.w\014xvsrarni.w.d\007xvsrl.b\007xvsrl.d\007xvsrl.h\007xvsrl."
2347 "w\010xvsrli.b\010xvsrli.d\010xvsrli.h\010xvsrli.w\nxvsrln.b.h\nxvsrln.h"
2348 ".w\nxvsrln.w.d\013xvsrlni.b.h\013xvsrlni.d.q\013xvsrlni.h.w\013xvsrlni."
2349 "w.d\010xvsrlr.b\010xvsrlr.d\010xvsrlr.h\010xvsrlr.w\txvsrlri.b\txvsrlri"
2350 ".d\txvsrlri.h\txvsrlri.w\013xvsrlrn.b.h\013xvsrlrn.h.w\013xvsrlrn.w.d\014"
2351 "xvsrlrni.b.h\014xvsrlrni.d.q\014xvsrlrni.h.w\014xvsrlrni.w.d\013xvssran"
2352 ".b.h\014xvssran.bu.h\013xvssran.h.w\014xvssran.hu.w\013xvssran.w.d\014x"
2353 "vssran.wu.d\014xvssrani.b.h\015xvssrani.bu.h\014xvssrani.d.q\015xvssran"
2354 "i.du.q\014xvssrani.h.w\015xvssrani.hu.w\014xvssrani.w.d\015xvssrani.wu."
2355 "d\014xvssrarn.b.h\015xvssrarn.bu.h\014xvssrarn.h.w\015xvssrarn.hu.w\014"
2356 "xvssrarn.w.d\015xvssrarn.wu.d\015xvssrarni.b.h\016xvssrarni.bu.h\015xvs"
2357 "srarni.d.q\016xvssrarni.du.q\015xvssrarni.h.w\016xvssrarni.hu.w\015xvss"
2358 "rarni.w.d\016xvssrarni.wu.d\013xvssrln.b.h\014xvssrln.bu.h\013xvssrln.h"
2359 ".w\014xvssrln.hu.w\013xvssrln.w.d\014xvssrln.wu.d\014xvssrlni.b.h\015xv"
2360 "ssrlni.bu.h\014xvssrlni.d.q\015xvssrlni.du.q\014xvssrlni.h.w\015xvssrln"
2361 "i.hu.w\014xvssrlni.w.d\015xvssrlni.wu.d\014xvssrlrn.b.h\015xvssrlrn.bu."
2362 "h\014xvssrlrn.h.w\015xvssrlrn.hu.w\014xvssrlrn.w.d\015xvssrlrn.wu.d\015"
2363 "xvssrlrni.b.h\016xvssrlrni.bu.h\015xvssrlrni.d.q\016xvssrlrni.du.q\015x"
2364 "vssrlrni.h.w\016xvssrlrni.hu.w\015xvssrlrni.w.d\016xvssrlrni.wu.d\010xv"
2365 "ssub.b\txvssub.bu\010xvssub.d\txvssub.du\010xvssub.h\txvssub.hu\010xvss"
2366 "ub.w\txvssub.wu\004xvst\txvstelm.b\txvstelm.d\txvstelm.h\txvstelm.w\005"
2367 "xvstx\007xvsub.b\007xvsub.d\007xvsub.h\007xvsub.q\007xvsub.w\txvsubi.bu"
2368 "\txvsubi.du\txvsubi.hu\txvsubi.wu\014xvsubwev.d.w\015xvsubwev.d.wu\014x"
2369 "vsubwev.h.b\015xvsubwev.h.bu\014xvsubwev.q.d\015xvsubwev.q.du\014xvsubw"
2370 "ev.w.h\015xvsubwev.w.hu\014xvsubwod.d.w\015xvsubwod.d.wu\014xvsubwod.h."
2371 "b\015xvsubwod.h.bu\014xvsubwod.q.d\015xvsubwod.q.du\014xvsubwod.w.h\015"
2372 "xvsubwod.w.hu\007xvxor.v\010xvxori.b";
2373
2374// Feature bitsets.
2375enum : uint8_t {
2376 AMFBS_None,
2377 AMFBS_HasLaGlobalWithAbs,
2378 AMFBS_HasLaGlobalWithPcrel,
2379 AMFBS_HasLaLocalWithAbs,
2380 AMFBS_IsLA32,
2381 AMFBS_IsLA64,
2382};
2383
2384static constexpr FeatureBitset FeatureBitsets[] = {
2385 {}, // AMFBS_None
2386 {Feature_HasLaGlobalWithAbsBit, },
2387 {Feature_HasLaGlobalWithPcrelBit, },
2388 {Feature_HasLaLocalWithAbsBit, },
2389 {Feature_IsLA32Bit, },
2390 {Feature_IsLA64Bit, },
2391};
2392
2393namespace {
2394 struct MatchEntry {
2395 uint16_t Mnemonic;
2396 uint16_t Opcode;
2397 uint8_t ConvertFn;
2398 uint8_t RequiredFeaturesIdx;
2399 uint8_t Classes[4];
2400 StringRef getMnemonic() const {
2401 return StringRef(MnemonicTable + Mnemonic + 1,
2402 MnemonicTable[Mnemonic]);
2403 }
2404 };
2405
2406 // Predicate for searching for an opcode.
2407 struct LessOpcode {
2408 bool operator()(const MatchEntry &LHS, StringRef RHS) {
2409 return LHS.getMnemonic() < RHS;
2410 }
2411 bool operator()(StringRef LHS, const MatchEntry &RHS) {
2412 return LHS < RHS.getMnemonic();
2413 }
2414 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
2415 return LHS.getMnemonic() < RHS.getMnemonic();
2416 }
2417 };
2418} // end anonymous namespace
2419
2420static const MatchEntry MatchTable0[] = {
2421 { 1 /* adc.b */, LoongArch::ADC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2422 { 7 /* adc.d */, LoongArch::ADC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2423 { 13 /* adc.h */, LoongArch::ADC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2424 { 19 /* adc.w */, LoongArch::ADC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2425 { 25 /* add.d */, LoongArch::ADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2426 { 25 /* add.d */, LoongArch::PseudoAddTPRel_D, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, },
2427 { 31 /* add.w */, LoongArch::ADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2428 { 31 /* add.w */, LoongArch::PseudoAddTPRel_W, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA32, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, },
2429 { 37 /* addi.d */, LoongArch::ADDI_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2430 { 44 /* addi.w */, LoongArch::ADDI_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2431 { 51 /* addu12i.d */, LoongArch::ADDU12I_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm5 }, },
2432 { 61 /* addu12i.w */, LoongArch::ADDU12I_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm5 }, },
2433 { 71 /* addu16i.d */, LoongArch::ADDU16I_D, Convert__Reg1_0__Reg1_1__SImm161_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm16 }, },
2434 { 81 /* alsl.d */, LoongArch::ALSL_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2435 { 88 /* alsl.w */, LoongArch::ALSL_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2436 { 95 /* alsl.wu */, LoongArch::ALSL_WU, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2437 { 103 /* amadd.b */, LoongArch::AMADD_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2438 { 111 /* amadd.d */, LoongArch::AMADD_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2439 { 119 /* amadd.h */, LoongArch::AMADD_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2440 { 127 /* amadd.w */, LoongArch::AMADD_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2441 { 135 /* amadd_db.b */, LoongArch::AMADD__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2442 { 146 /* amadd_db.d */, LoongArch::AMADD__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2443 { 157 /* amadd_db.h */, LoongArch::AMADD__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2444 { 168 /* amadd_db.w */, LoongArch::AMADD__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2445 { 179 /* amand.d */, LoongArch::AMAND_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2446 { 187 /* amand.w */, LoongArch::AMAND_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2447 { 195 /* amand_db.d */, LoongArch::AMAND__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2448 { 206 /* amand_db.w */, LoongArch::AMAND__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2449 { 217 /* amcas.b */, LoongArch::AMCAS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2450 { 225 /* amcas.d */, LoongArch::AMCAS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2451 { 233 /* amcas.h */, LoongArch::AMCAS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2452 { 241 /* amcas.w */, LoongArch::AMCAS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2453 { 249 /* amcas_db.b */, LoongArch::AMCAS__DB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2454 { 260 /* amcas_db.d */, LoongArch::AMCAS__DB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2455 { 271 /* amcas_db.h */, LoongArch::AMCAS__DB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2456 { 282 /* amcas_db.w */, LoongArch::AMCAS__DB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2457 { 293 /* ammax.d */, LoongArch::AMMAX_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2458 { 301 /* ammax.du */, LoongArch::AMMAX_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2459 { 310 /* ammax.w */, LoongArch::AMMAX_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2460 { 318 /* ammax.wu */, LoongArch::AMMAX_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2461 { 327 /* ammax_db.d */, LoongArch::AMMAX__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2462 { 338 /* ammax_db.du */, LoongArch::AMMAX__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2463 { 350 /* ammax_db.w */, LoongArch::AMMAX__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2464 { 361 /* ammax_db.wu */, LoongArch::AMMAX__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2465 { 373 /* ammin.d */, LoongArch::AMMIN_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2466 { 381 /* ammin.du */, LoongArch::AMMIN_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2467 { 390 /* ammin.w */, LoongArch::AMMIN_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2468 { 398 /* ammin.wu */, LoongArch::AMMIN_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2469 { 407 /* ammin_db.d */, LoongArch::AMMIN__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2470 { 418 /* ammin_db.du */, LoongArch::AMMIN__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2471 { 430 /* ammin_db.w */, LoongArch::AMMIN__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2472 { 441 /* ammin_db.wu */, LoongArch::AMMIN__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2473 { 453 /* amor.d */, LoongArch::AMOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2474 { 460 /* amor.w */, LoongArch::AMOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2475 { 467 /* amor_db.d */, LoongArch::AMOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2476 { 477 /* amor_db.w */, LoongArch::AMOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2477 { 487 /* amswap.b */, LoongArch::AMSWAP_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2478 { 496 /* amswap.d */, LoongArch::AMSWAP_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2479 { 505 /* amswap.h */, LoongArch::AMSWAP_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2480 { 514 /* amswap.w */, LoongArch::AMSWAP_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2481 { 523 /* amswap_db.b */, LoongArch::AMSWAP__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2482 { 535 /* amswap_db.d */, LoongArch::AMSWAP__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2483 { 547 /* amswap_db.h */, LoongArch::AMSWAP__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2484 { 559 /* amswap_db.w */, LoongArch::AMSWAP__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2485 { 571 /* amxor.d */, LoongArch::AMXOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2486 { 579 /* amxor.w */, LoongArch::AMXOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2487 { 587 /* amxor_db.d */, LoongArch::AMXOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2488 { 598 /* amxor_db.w */, LoongArch::AMXOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2489 { 609 /* and */, LoongArch::AND, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2490 { 613 /* andi */, LoongArch::ANDI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, },
2491 { 618 /* andn */, LoongArch::ANDN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2492 { 623 /* armadc.w */, LoongArch::ARMADC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2493 { 632 /* armadd.w */, LoongArch::ARMADD_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2494 { 641 /* armand.w */, LoongArch::ARMAND_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2495 { 650 /* armmfflag */, LoongArch::ARMMFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2496 { 660 /* armmov.d */, LoongArch::ARMMOV_D, Convert__Reg1_0__UImm41_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm4 }, },
2497 { 669 /* armmov.w */, LoongArch::ARMMOV_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2498 { 678 /* armmove */, LoongArch::ARMMOVE, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2499 { 686 /* armmtflag */, LoongArch::ARMMTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2500 { 696 /* armnot.w */, LoongArch::ARMNOT_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2501 { 705 /* armor.w */, LoongArch::ARMOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2502 { 713 /* armrotr.w */, LoongArch::ARMROTR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2503 { 723 /* armrotri.w */, LoongArch::ARMROTRI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2504 { 734 /* armrrx.w */, LoongArch::ARMRRX_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2505 { 743 /* armsbc.w */, LoongArch::ARMSBC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2506 { 752 /* armsll.w */, LoongArch::ARMSLL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2507 { 761 /* armslli.w */, LoongArch::ARMSLLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2508 { 771 /* armsra.w */, LoongArch::ARMSRA_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2509 { 780 /* armsrai.w */, LoongArch::ARMSRAI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2510 { 790 /* armsrl.w */, LoongArch::ARMSRL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2511 { 799 /* armsrli.w */, LoongArch::ARMSRLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2512 { 809 /* armsub.w */, LoongArch::ARMSUB_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2513 { 818 /* armxor.w */, LoongArch::ARMXOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2514 { 827 /* asrtgt.d */, LoongArch::ASRTGT_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2515 { 836 /* asrtle.d */, LoongArch::ASRTLE_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2516 { 845 /* b */, LoongArch::B, Convert__SImm26OperandB1_0, AMFBS_None, { MCK_SImm26OperandB }, },
2517 { 847 /* bceqz */, LoongArch::BCEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, },
2518 { 853 /* bcnez */, LoongArch::BCNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, },
2519 { 859 /* beq */, LoongArch::BEQ, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2520 { 863 /* beqz */, LoongArch::BEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, },
2521 { 868 /* bge */, LoongArch::BGE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2522 { 872 /* bgeu */, LoongArch::BGEU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2523 { 877 /* bgez */, LoongArch::BGE, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2524 { 882 /* bgt */, LoongArch::BLT, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2525 { 886 /* bgtu */, LoongArch::BLTU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2526 { 891 /* bgtz */, LoongArch::BLT, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2527 { 896 /* bitrev.4b */, LoongArch::BITREV_4B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2528 { 906 /* bitrev.8b */, LoongArch::BITREV_8B, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2529 { 916 /* bitrev.d */, LoongArch::BITREV_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2530 { 925 /* bitrev.w */, LoongArch::BITREV_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2531 { 934 /* bl */, LoongArch::BL, Convert__SImm26OperandBL1_0, AMFBS_None, { MCK_SImm26OperandBL }, },
2532 { 937 /* ble */, LoongArch::BGE, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2533 { 941 /* bleu */, LoongArch::BGEU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2534 { 946 /* blez */, LoongArch::BGE, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2535 { 951 /* blt */, LoongArch::BLT, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2536 { 955 /* bltu */, LoongArch::BLTU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2537 { 960 /* bltz */, LoongArch::BLT, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2538 { 965 /* bne */, LoongArch::BNE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2539 { 969 /* bnez */, LoongArch::BNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, },
2540 { 974 /* break */, LoongArch::BREAK, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2541 { 980 /* bstrins.d */, LoongArch::BSTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, },
2542 { 990 /* bstrins.w */, LoongArch::BSTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, },
2543 { 1000 /* bstrpick.d */, LoongArch::BSTRPICK_D, Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, },
2544 { 1011 /* bstrpick.w */, LoongArch::BSTRPICK_W, Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, },
2545 { 1022 /* bytepick.d */, LoongArch::BYTEPICK_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2546 { 1033 /* bytepick.w */, LoongArch::BYTEPICK_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2 }, },
2547 { 1044 /* cacop */, LoongArch::CACOP, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, },
2548 { 1050 /* call36 */, LoongArch::PseudoCALL36, Convert__BareSymbol1_0, AMFBS_IsLA64, { MCK_BareSymbol }, },
2549 { 1057 /* clo.d */, LoongArch::CLO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2550 { 1063 /* clo.w */, LoongArch::CLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2551 { 1069 /* clz.d */, LoongArch::CLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2552 { 1075 /* clz.w */, LoongArch::CLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2553 { 1081 /* cpucfg */, LoongArch::CPUCFG, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2554 { 1088 /* crc.w.b.w */, LoongArch::CRC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2555 { 1098 /* crc.w.d.w */, LoongArch::CRC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2556 { 1108 /* crc.w.h.w */, LoongArch::CRC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2557 { 1118 /* crc.w.w.w */, LoongArch::CRC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2558 { 1128 /* crcc.w.b.w */, LoongArch::CRCC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2559 { 1139 /* crcc.w.d.w */, LoongArch::CRCC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2560 { 1150 /* crcc.w.h.w */, LoongArch::CRCC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2561 { 1161 /* crcc.w.w.w */, LoongArch::CRCC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2562 { 1172 /* csrrd */, LoongArch::CSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2563 { 1178 /* csrwr */, LoongArch::CSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2564 { 1184 /* csrxchg */, LoongArch::CSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPRNoR0R1, MCK_UImm14 }, },
2565 { 1192 /* cto.d */, LoongArch::CTO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2566 { 1198 /* cto.w */, LoongArch::CTO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2567 { 1204 /* ctz.d */, LoongArch::CTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2568 { 1210 /* ctz.w */, LoongArch::CTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2569 { 1216 /* dbar */, LoongArch::DBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2570 { 1221 /* dbcl */, LoongArch::DBCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2571 { 1226 /* div.d */, LoongArch::DIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2572 { 1232 /* div.du */, LoongArch::DIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2573 { 1239 /* div.w */, LoongArch::DIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2574 { 1245 /* div.wu */, LoongArch::DIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2575 { 1252 /* ertn */, LoongArch::ERTN, Convert_NoOperands, AMFBS_None, { }, },
2576 { 1257 /* ext.w.b */, LoongArch::EXT_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2577 { 1265 /* ext.w.h */, LoongArch::EXT_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2578 { 1273 /* fabs.d */, LoongArch::FABS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2579 { 1280 /* fabs.s */, LoongArch::FABS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2580 { 1287 /* fadd.d */, LoongArch::FADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2581 { 1294 /* fadd.s */, LoongArch::FADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2582 { 1301 /* fclass.d */, LoongArch::FCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2583 { 1310 /* fclass.s */, LoongArch::FCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2584 { 1319 /* fcmp.caf.d */, LoongArch::FCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2585 { 1330 /* fcmp.caf.s */, LoongArch::FCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2586 { 1341 /* fcmp.ceq.d */, LoongArch::FCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2587 { 1352 /* fcmp.ceq.s */, LoongArch::FCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2588 { 1363 /* fcmp.cle.d */, LoongArch::FCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2589 { 1374 /* fcmp.cle.s */, LoongArch::FCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2590 { 1385 /* fcmp.clt.d */, LoongArch::FCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2591 { 1396 /* fcmp.clt.s */, LoongArch::FCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2592 { 1407 /* fcmp.cne.d */, LoongArch::FCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2593 { 1418 /* fcmp.cne.s */, LoongArch::FCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2594 { 1429 /* fcmp.cor.d */, LoongArch::FCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2595 { 1440 /* fcmp.cor.s */, LoongArch::FCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2596 { 1451 /* fcmp.cueq.d */, LoongArch::FCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2597 { 1463 /* fcmp.cueq.s */, LoongArch::FCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2598 { 1475 /* fcmp.cule.d */, LoongArch::FCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2599 { 1487 /* fcmp.cule.s */, LoongArch::FCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2600 { 1499 /* fcmp.cult.d */, LoongArch::FCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2601 { 1511 /* fcmp.cult.s */, LoongArch::FCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2602 { 1523 /* fcmp.cun.d */, LoongArch::FCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2603 { 1534 /* fcmp.cun.s */, LoongArch::FCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2604 { 1545 /* fcmp.cune.d */, LoongArch::FCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2605 { 1557 /* fcmp.cune.s */, LoongArch::FCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2606 { 1569 /* fcmp.saf.d */, LoongArch::FCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2607 { 1580 /* fcmp.saf.s */, LoongArch::FCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2608 { 1591 /* fcmp.seq.d */, LoongArch::FCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2609 { 1602 /* fcmp.seq.s */, LoongArch::FCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2610 { 1613 /* fcmp.sle.d */, LoongArch::FCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2611 { 1624 /* fcmp.sle.s */, LoongArch::FCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2612 { 1635 /* fcmp.slt.d */, LoongArch::FCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2613 { 1646 /* fcmp.slt.s */, LoongArch::FCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2614 { 1657 /* fcmp.sne.d */, LoongArch::FCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2615 { 1668 /* fcmp.sne.s */, LoongArch::FCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2616 { 1679 /* fcmp.sor.d */, LoongArch::FCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2617 { 1690 /* fcmp.sor.s */, LoongArch::FCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2618 { 1701 /* fcmp.sueq.d */, LoongArch::FCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2619 { 1713 /* fcmp.sueq.s */, LoongArch::FCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2620 { 1725 /* fcmp.sule.d */, LoongArch::FCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2621 { 1737 /* fcmp.sule.s */, LoongArch::FCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2622 { 1749 /* fcmp.sult.d */, LoongArch::FCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2623 { 1761 /* fcmp.sult.s */, LoongArch::FCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2624 { 1773 /* fcmp.sun.d */, LoongArch::FCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2625 { 1784 /* fcmp.sun.s */, LoongArch::FCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2626 { 1795 /* fcmp.sune.d */, LoongArch::FCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2627 { 1807 /* fcmp.sune.s */, LoongArch::FCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2628 { 1819 /* fcopysign.d */, LoongArch::FCOPYSIGN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2629 { 1831 /* fcopysign.s */, LoongArch::FCOPYSIGN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2630 { 1843 /* fcvt.d.ld */, LoongArch::FCVT_D_LD, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2631 { 1853 /* fcvt.d.s */, LoongArch::FCVT_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2632 { 1862 /* fcvt.ld.d */, LoongArch::FCVT_LD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2633 { 1872 /* fcvt.s.d */, LoongArch::FCVT_S_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2634 { 1881 /* fcvt.ud.d */, LoongArch::FCVT_UD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2635 { 1891 /* fdiv.d */, LoongArch::FDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2636 { 1898 /* fdiv.s */, LoongArch::FDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2637 { 1905 /* ffint.d.l */, LoongArch::FFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2638 { 1915 /* ffint.d.w */, LoongArch::FFINT_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2639 { 1925 /* ffint.s.l */, LoongArch::FFINT_S_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2640 { 1935 /* ffint.s.w */, LoongArch::FFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2641 { 1945 /* fld.d */, LoongArch::FLD_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12addlike }, },
2642 { 1951 /* fld.s */, LoongArch::FLD_S, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12addlike }, },
2643 { 1957 /* fldgt.d */, LoongArch::FLDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2644 { 1965 /* fldgt.s */, LoongArch::FLDGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2645 { 1973 /* fldle.d */, LoongArch::FLDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2646 { 1981 /* fldle.s */, LoongArch::FLDLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2647 { 1989 /* fldx.d */, LoongArch::FLDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2648 { 1996 /* fldx.s */, LoongArch::FLDX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2649 { 2003 /* flogb.d */, LoongArch::FLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2650 { 2011 /* flogb.s */, LoongArch::FLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2651 { 2019 /* fmadd.d */, LoongArch::FMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2652 { 2027 /* fmadd.s */, LoongArch::FMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2653 { 2035 /* fmax.d */, LoongArch::FMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2654 { 2042 /* fmax.s */, LoongArch::FMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2655 { 2049 /* fmaxa.d */, LoongArch::FMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2656 { 2057 /* fmaxa.s */, LoongArch::FMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2657 { 2065 /* fmin.d */, LoongArch::FMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2658 { 2072 /* fmin.s */, LoongArch::FMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2659 { 2079 /* fmina.d */, LoongArch::FMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2660 { 2087 /* fmina.s */, LoongArch::FMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2661 { 2095 /* fmov.d */, LoongArch::FMOV_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2662 { 2102 /* fmov.s */, LoongArch::FMOV_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2663 { 2109 /* fmsub.d */, LoongArch::FMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2664 { 2117 /* fmsub.s */, LoongArch::FMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2665 { 2125 /* fmul.d */, LoongArch::FMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2666 { 2132 /* fmul.s */, LoongArch::FMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2667 { 2139 /* fneg.d */, LoongArch::FNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2668 { 2146 /* fneg.s */, LoongArch::FNEG_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2669 { 2153 /* fnmadd.d */, LoongArch::FNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2670 { 2162 /* fnmadd.s */, LoongArch::FNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2671 { 2171 /* fnmsub.d */, LoongArch::FNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2672 { 2180 /* fnmsub.s */, LoongArch::FNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2673 { 2189 /* frecip.d */, LoongArch::FRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2674 { 2198 /* frecip.s */, LoongArch::FRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2675 { 2207 /* frecipe.d */, LoongArch::FRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2676 { 2217 /* frecipe.s */, LoongArch::FRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2677 { 2227 /* frint.d */, LoongArch::FRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2678 { 2235 /* frint.s */, LoongArch::FRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2679 { 2243 /* frsqrt.d */, LoongArch::FRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2680 { 2252 /* frsqrt.s */, LoongArch::FRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2681 { 2261 /* frsqrte.d */, LoongArch::FRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2682 { 2271 /* frsqrte.s */, LoongArch::FRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2683 { 2281 /* fscaleb.d */, LoongArch::FSCALEB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2684 { 2291 /* fscaleb.s */, LoongArch::FSCALEB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2685 { 2301 /* fsel */, LoongArch::FSEL_xS, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CFR }, },
2686 { 2306 /* fsqrt.d */, LoongArch::FSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2687 { 2314 /* fsqrt.s */, LoongArch::FSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2688 { 2322 /* fst.d */, LoongArch::FST_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12addlike }, },
2689 { 2328 /* fst.s */, LoongArch::FST_S, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12addlike }, },
2690 { 2334 /* fstgt.d */, LoongArch::FSTGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2691 { 2342 /* fstgt.s */, LoongArch::FSTGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2692 { 2350 /* fstle.d */, LoongArch::FSTLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2693 { 2358 /* fstle.s */, LoongArch::FSTLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2694 { 2366 /* fstx.d */, LoongArch::FSTX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2695 { 2373 /* fstx.s */, LoongArch::FSTX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2696 { 2380 /* fsub.d */, LoongArch::FSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2697 { 2387 /* fsub.s */, LoongArch::FSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2698 { 2394 /* ftint.l.d */, LoongArch::FTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2699 { 2404 /* ftint.l.s */, LoongArch::FTINT_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2700 { 2414 /* ftint.w.d */, LoongArch::FTINT_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2701 { 2424 /* ftint.w.s */, LoongArch::FTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2702 { 2434 /* ftintrm.l.d */, LoongArch::FTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2703 { 2446 /* ftintrm.l.s */, LoongArch::FTINTRM_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2704 { 2458 /* ftintrm.w.d */, LoongArch::FTINTRM_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2705 { 2470 /* ftintrm.w.s */, LoongArch::FTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2706 { 2482 /* ftintrne.l.d */, LoongArch::FTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2707 { 2495 /* ftintrne.l.s */, LoongArch::FTINTRNE_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2708 { 2508 /* ftintrne.w.d */, LoongArch::FTINTRNE_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2709 { 2521 /* ftintrne.w.s */, LoongArch::FTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2710 { 2534 /* ftintrp.l.d */, LoongArch::FTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2711 { 2546 /* ftintrp.l.s */, LoongArch::FTINTRP_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2712 { 2558 /* ftintrp.w.d */, LoongArch::FTINTRP_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2713 { 2570 /* ftintrp.w.s */, LoongArch::FTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2714 { 2582 /* ftintrz.l.d */, LoongArch::FTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2715 { 2594 /* ftintrz.l.s */, LoongArch::FTINTRZ_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2716 { 2606 /* ftintrz.w.d */, LoongArch::FTINTRZ_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2717 { 2618 /* ftintrz.w.s */, LoongArch::FTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2718 { 2630 /* gcsrrd */, LoongArch::GCSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2719 { 2637 /* gcsrwr */, LoongArch::GCSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2720 { 2644 /* gcsrxchg */, LoongArch::GCSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPRNoR0R1, MCK_UImm14 }, },
2721 { 2653 /* gtlbflush */, LoongArch::GTLBFLUSH, Convert_NoOperands, AMFBS_None, { }, },
2722 { 2663 /* hvcl */, LoongArch::HVCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2723 { 2668 /* ibar */, LoongArch::IBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2724 { 2673 /* idle */, LoongArch::IDLE, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2725 { 2678 /* invtlb */, LoongArch::INVTLB, Convert__Reg1_2__Reg1_1__UImm51_0, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_GPR }, },
2726 { 2685 /* iocsrrd.b */, LoongArch::IOCSRRD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2727 { 2695 /* iocsrrd.d */, LoongArch::IOCSRRD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2728 { 2705 /* iocsrrd.h */, LoongArch::IOCSRRD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2729 { 2715 /* iocsrrd.w */, LoongArch::IOCSRRD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2730 { 2725 /* iocsrwr.b */, LoongArch::IOCSRWR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2731 { 2735 /* iocsrwr.d */, LoongArch::IOCSRWR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2732 { 2745 /* iocsrwr.h */, LoongArch::IOCSRWR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2733 { 2755 /* iocsrwr.w */, LoongArch::IOCSRWR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2734 { 2765 /* jirl */, LoongArch::JIRL, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2735 { 2770 /* jiscr0 */, LoongArch::JISCR0, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, },
2736 { 2777 /* jiscr1 */, LoongArch::JISCR1, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, },
2737 { 2784 /* jr */, LoongArch::JIRL, Convert__regR0__Reg1_0__imm_95_0, AMFBS_None, { MCK_GPR }, },
2738 { 2787 /* la */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, },
2739 { 2787 /* la */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2740 { 2787 /* la */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2741 { 2790 /* la.abs */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2742 { 2790 /* la.abs */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2743 { 2797 /* la.global */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, },
2744 { 2797 /* la.global */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2745 { 2797 /* la.global */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2746 { 2797 /* la.global */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2747 { 2797 /* la.global */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2748 { 2797 /* la.global */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2749 { 2807 /* la.got */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2750 { 2807 /* la.got */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2751 { 2814 /* la.local */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2752 { 2814 /* la.local */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2753 { 2814 /* la.local */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2754 { 2814 /* la.local */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2755 { 2823 /* la.pcrel */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2756 { 2823 /* la.pcrel */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2757 { 2832 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2758 { 2832 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2759 { 2844 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2760 { 2844 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2761 { 2854 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2762 { 2854 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2763 { 2864 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2764 { 2864 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2765 { 2874 /* la.tls.le */, LoongArch::PseudoLA_TLS_LE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2766 { 2884 /* ld.b */, LoongArch::LD_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2767 { 2889 /* ld.bu */, LoongArch::LD_BU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2768 { 2895 /* ld.d */, LoongArch::LD_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2769 { 2900 /* ld.h */, LoongArch::LD_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2770 { 2905 /* ld.hu */, LoongArch::LD_HU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2771 { 2911 /* ld.w */, LoongArch::LD_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2772 { 2916 /* ld.wu */, LoongArch::LD_WU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2773 { 2922 /* lddir */, LoongArch::LDDIR, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm8 }, },
2774 { 2928 /* ldgt.b */, LoongArch::LDGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2775 { 2935 /* ldgt.d */, LoongArch::LDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2776 { 2942 /* ldgt.h */, LoongArch::LDGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2777 { 2949 /* ldgt.w */, LoongArch::LDGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2778 { 2956 /* ldl.d */, LoongArch::LDL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2779 { 2962 /* ldl.w */, LoongArch::LDL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2780 { 2968 /* ldle.b */, LoongArch::LDLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2781 { 2975 /* ldle.d */, LoongArch::LDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2782 { 2982 /* ldle.h */, LoongArch::LDLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2783 { 2989 /* ldle.w */, LoongArch::LDLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2784 { 2996 /* ldpte */, LoongArch::LDPTE, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2785 { 3002 /* ldptr.d */, LoongArch::LDPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2786 { 3010 /* ldptr.w */, LoongArch::LDPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2787 { 3018 /* ldr.d */, LoongArch::LDR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2788 { 3024 /* ldr.w */, LoongArch::LDR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2789 { 3030 /* ldx.b */, LoongArch::LDX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2790 { 3036 /* ldx.bu */, LoongArch::LDX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2791 { 3043 /* ldx.d */, LoongArch::LDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2792 { 3049 /* ldx.h */, LoongArch::LDX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2793 { 3055 /* ldx.hu */, LoongArch::LDX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2794 { 3062 /* ldx.w */, LoongArch::LDX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2795 { 3068 /* ldx.wu */, LoongArch::LDX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2796 { 3075 /* li.d */, LoongArch::PseudoLI_D, Convert__Reg1_0__Imm641_1, AMFBS_IsLA64, { MCK_GPR, MCK_Imm64 }, },
2797 { 3080 /* li.w */, LoongArch::PseudoLI_W, Convert__Reg1_0__Imm321_1, AMFBS_None, { MCK_GPR, MCK_Imm32 }, },
2798 { 3085 /* ll.d */, LoongArch::LL_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2799 { 3090 /* ll.w */, LoongArch::LL_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2800 { 3095 /* llacq.d */, LoongArch::LLACQ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2801 { 3103 /* llacq.w */, LoongArch::LLACQ_W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2802 { 3111 /* lu12i.w */, LoongArch::LU12I_W, Convert__Reg1_0__SImm20lu12iw1_1, AMFBS_None, { MCK_GPR, MCK_SImm20lu12iw }, },
2803 { 3119 /* lu32i.d */, LoongArch::LU32I_D, Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20lu32id }, },
2804 { 3127 /* lu52i.d */, LoongArch::LU52I_D, Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12lu52id }, },
2805 { 3135 /* maskeqz */, LoongArch::MASKEQZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2806 { 3143 /* masknez */, LoongArch::MASKNEZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2807 { 3151 /* mod.d */, LoongArch::MOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2808 { 3157 /* mod.du */, LoongArch::MOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2809 { 3164 /* mod.w */, LoongArch::MOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2810 { 3170 /* mod.wu */, LoongArch::MOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2811 { 3177 /* movcf2fr */, LoongArch::MOVCF2FR_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_CFR }, },
2812 { 3186 /* movcf2gr */, LoongArch::MOVCF2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_CFR }, },
2813 { 3195 /* move */, LoongArch::OR, Convert__Reg1_0__Reg1_1__regR0, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2814 { 3200 /* movfcsr2gr */, LoongArch::MOVFCSR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FCSR }, },
2815 { 3211 /* movfr2cf */, LoongArch::MOVFR2CF_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_FPR32 }, },
2816 { 3220 /* movfr2gr.d */, LoongArch::MOVFR2GR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_FPR64 }, },
2817 { 3231 /* movfr2gr.s */, LoongArch::MOVFR2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR32 }, },
2818 { 3242 /* movfrh2gr.s */, LoongArch::MOVFRH2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR64 }, },
2819 { 3254 /* movgr2cf */, LoongArch::MOVGR2CF, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_GPR }, },
2820 { 3263 /* movgr2fcsr */, LoongArch::MOVGR2FCSR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FCSR, MCK_GPR }, },
2821 { 3274 /* movgr2fr.d */, LoongArch::MOVGR2FR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_FPR64, MCK_GPR }, },
2822 { 3285 /* movgr2fr.w */, LoongArch::MOVGR2FR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_GPR }, },
2823 { 3296 /* movgr2frh.w */, LoongArch::MOVGR2FRH_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_GPR }, },
2824 { 3308 /* movgr2scr */, LoongArch::MOVGR2SCR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SCR, MCK_GPR }, },
2825 { 3318 /* movscr2gr */, LoongArch::MOVSCR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_SCR }, },
2826 { 3328 /* mul.d */, LoongArch::MUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2827 { 3334 /* mul.w */, LoongArch::MUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2828 { 3340 /* mulh.d */, LoongArch::MULH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2829 { 3347 /* mulh.du */, LoongArch::MULH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2830 { 3355 /* mulh.w */, LoongArch::MULH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2831 { 3362 /* mulh.wu */, LoongArch::MULH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2832 { 3370 /* mulw.d.w */, LoongArch::MULW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2833 { 3379 /* mulw.d.wu */, LoongArch::MULW_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2834 { 3389 /* nop */, LoongArch::ANDI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, },
2835 { 3393 /* nor */, LoongArch::NOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2836 { 3397 /* or */, LoongArch::OR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2837 { 3400 /* ori */, LoongArch::ORI, Convert__Reg1_0__Reg1_1__UImm12ori1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12ori }, },
2838 { 3404 /* orn */, LoongArch::ORN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2839 { 3408 /* pcaddi */, LoongArch::PCADDI, Convert__Reg1_0__SImm20pcaddi1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcaddi }, },
2840 { 3415 /* pcaddu12i */, LoongArch::PCADDU12I, Convert__Reg1_0__SImm201_1, AMFBS_None, { MCK_GPR, MCK_SImm20 }, },
2841 { 3425 /* pcaddu18i */, LoongArch::PCADDU18I, Convert__Reg1_0__SImm20pcaddu18i1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20pcaddu18i }, },
2842 { 3435 /* pcalau12i */, LoongArch::PCALAU12I, Convert__Reg1_0__SImm20pcalau12i1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcalau12i }, },
2843 { 3445 /* preld */, LoongArch::PRELD, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, },
2844 { 3451 /* preldx */, LoongArch::PRELDX, Convert__UImm51_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_UImm5, MCK_GPR, MCK_GPR }, },
2845 { 3458 /* rcr.b */, LoongArch::RCR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2846 { 3464 /* rcr.d */, LoongArch::RCR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2847 { 3470 /* rcr.h */, LoongArch::RCR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2848 { 3476 /* rcr.w */, LoongArch::RCR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2849 { 3482 /* rcri.b */, LoongArch::RCRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2850 { 3489 /* rcri.d */, LoongArch::RCRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2851 { 3496 /* rcri.h */, LoongArch::RCRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2852 { 3503 /* rcri.w */, LoongArch::RCRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2853 { 3510 /* rdcntid.w */, LoongArch::RDTIMEL_W, Convert__regR0__Reg1_0, AMFBS_None, { MCK_GPR }, },
2854 { 3520 /* rdcntvh.w */, LoongArch::RDTIMEH_W, Convert__Reg1_0__regR0, AMFBS_None, { MCK_GPR }, },
2855 { 3530 /* rdcntvl.w */, LoongArch::RDTIMEL_W, Convert__Reg1_0__regR0, AMFBS_None, { MCK_GPR }, },
2856 { 3540 /* rdtime.d */, LoongArch::RDTIME_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2857 { 3549 /* rdtimeh.w */, LoongArch::RDTIMEH_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2858 { 3559 /* rdtimel.w */, LoongArch::RDTIMEL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2859 { 3569 /* ret */, LoongArch::JIRL, Convert__regR0__regR1__imm_95_0, AMFBS_None, { }, },
2860 { 3573 /* revb.2h */, LoongArch::REVB_2H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2861 { 3581 /* revb.2w */, LoongArch::REVB_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2862 { 3589 /* revb.4h */, LoongArch::REVB_4H, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2863 { 3597 /* revb.d */, LoongArch::REVB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2864 { 3604 /* revh.2w */, LoongArch::REVH_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2865 { 3612 /* revh.d */, LoongArch::REVH_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2866 { 3619 /* rotr.b */, LoongArch::ROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2867 { 3626 /* rotr.d */, LoongArch::ROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2868 { 3633 /* rotr.h */, LoongArch::ROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2869 { 3640 /* rotr.w */, LoongArch::ROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2870 { 3647 /* rotri.b */, LoongArch::ROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2871 { 3655 /* rotri.d */, LoongArch::ROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2872 { 3663 /* rotri.h */, LoongArch::ROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2873 { 3671 /* rotri.w */, LoongArch::ROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2874 { 3679 /* sbc.b */, LoongArch::SBC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2875 { 3685 /* sbc.d */, LoongArch::SBC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2876 { 3691 /* sbc.h */, LoongArch::SBC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2877 { 3697 /* sbc.w */, LoongArch::SBC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2878 { 3703 /* sc.d */, LoongArch::SC_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2879 { 3708 /* sc.q */, LoongArch::SC_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2880 { 3713 /* sc.w */, LoongArch::SC_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2881 { 3718 /* screl.d */, LoongArch::SCREL_D, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2882 { 3726 /* screl.w */, LoongArch::SCREL_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2883 { 3734 /* setarmj */, LoongArch::SETARMJ, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2884 { 3742 /* setx86j */, LoongArch::SETX86J, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2885 { 3750 /* setx86loope */, LoongArch::SETX86LOOPE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2886 { 3762 /* setx86loopne */, LoongArch::SETX86LOOPNE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2887 { 3775 /* sll.d */, LoongArch::SLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2888 { 3781 /* sll.w */, LoongArch::SLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2889 { 3787 /* slli.d */, LoongArch::SLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2890 { 3794 /* slli.w */, LoongArch::SLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2891 { 3801 /* slt */, LoongArch::SLT, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2892 { 3805 /* slti */, LoongArch::SLTI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, },
2893 { 3810 /* sltu */, LoongArch::SLTU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2894 { 3815 /* sltui */, LoongArch::SLTUI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, },
2895 { 3821 /* sra.d */, LoongArch::SRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2896 { 3827 /* sra.w */, LoongArch::SRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2897 { 3833 /* srai.d */, LoongArch::SRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2898 { 3840 /* srai.w */, LoongArch::SRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2899 { 3847 /* srl.d */, LoongArch::SRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2900 { 3853 /* srl.w */, LoongArch::SRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2901 { 3859 /* srli.d */, LoongArch::SRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2902 { 3866 /* srli.w */, LoongArch::SRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2903 { 3873 /* st.b */, LoongArch::ST_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2904 { 3878 /* st.d */, LoongArch::ST_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2905 { 3883 /* st.h */, LoongArch::ST_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2906 { 3888 /* st.w */, LoongArch::ST_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2907 { 3893 /* stgt.b */, LoongArch::STGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2908 { 3900 /* stgt.d */, LoongArch::STGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2909 { 3907 /* stgt.h */, LoongArch::STGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2910 { 3914 /* stgt.w */, LoongArch::STGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2911 { 3921 /* stl.d */, LoongArch::STL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2912 { 3927 /* stl.w */, LoongArch::STL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2913 { 3933 /* stle.b */, LoongArch::STLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2914 { 3940 /* stle.d */, LoongArch::STLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2915 { 3947 /* stle.h */, LoongArch::STLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2916 { 3954 /* stle.w */, LoongArch::STLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2917 { 3961 /* stptr.d */, LoongArch::STPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2918 { 3969 /* stptr.w */, LoongArch::STPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2919 { 3977 /* str.d */, LoongArch::STR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2920 { 3983 /* str.w */, LoongArch::STR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2921 { 3989 /* stx.b */, LoongArch::STX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2922 { 3995 /* stx.d */, LoongArch::STX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2923 { 4001 /* stx.h */, LoongArch::STX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2924 { 4007 /* stx.w */, LoongArch::STX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2925 { 4013 /* sub.d */, LoongArch::SUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2926 { 4019 /* sub.w */, LoongArch::SUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2927 { 4025 /* syscall */, LoongArch::SYSCALL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2928 { 4033 /* tail36 */, LoongArch::PseudoTAIL36, Convert__Reg1_0__BareSymbol1_1, AMFBS_IsLA64, { MCK_GPR, MCK_BareSymbol }, },
2929 { 4040 /* tlbclr */, LoongArch::TLBCLR, Convert_NoOperands, AMFBS_None, { }, },
2930 { 4047 /* tlbfill */, LoongArch::TLBFILL, Convert_NoOperands, AMFBS_None, { }, },
2931 { 4055 /* tlbflush */, LoongArch::TLBFLUSH, Convert_NoOperands, AMFBS_None, { }, },
2932 { 4064 /* tlbrd */, LoongArch::TLBRD, Convert_NoOperands, AMFBS_None, { }, },
2933 { 4070 /* tlbsrch */, LoongArch::TLBSRCH, Convert_NoOperands, AMFBS_None, { }, },
2934 { 4078 /* tlbwr */, LoongArch::TLBWR, Convert_NoOperands, AMFBS_None, { }, },
2935 { 4084 /* vabsd.b */, LoongArch::VABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2936 { 4092 /* vabsd.bu */, LoongArch::VABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2937 { 4101 /* vabsd.d */, LoongArch::VABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2938 { 4109 /* vabsd.du */, LoongArch::VABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2939 { 4118 /* vabsd.h */, LoongArch::VABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2940 { 4126 /* vabsd.hu */, LoongArch::VABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2941 { 4135 /* vabsd.w */, LoongArch::VABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2942 { 4143 /* vabsd.wu */, LoongArch::VABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2943 { 4152 /* vadd.b */, LoongArch::VADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2944 { 4159 /* vadd.d */, LoongArch::VADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2945 { 4166 /* vadd.h */, LoongArch::VADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2946 { 4173 /* vadd.q */, LoongArch::VADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2947 { 4180 /* vadd.w */, LoongArch::VADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2948 { 4187 /* vadda.b */, LoongArch::VADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2949 { 4195 /* vadda.d */, LoongArch::VADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2950 { 4203 /* vadda.h */, LoongArch::VADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2951 { 4211 /* vadda.w */, LoongArch::VADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2952 { 4219 /* vaddi.bu */, LoongArch::VADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2953 { 4228 /* vaddi.du */, LoongArch::VADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2954 { 4237 /* vaddi.hu */, LoongArch::VADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2955 { 4246 /* vaddi.wu */, LoongArch::VADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2956 { 4255 /* vaddwev.d.w */, LoongArch::VADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2957 { 4267 /* vaddwev.d.wu */, LoongArch::VADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2958 { 4280 /* vaddwev.d.wu.w */, LoongArch::VADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2959 { 4295 /* vaddwev.h.b */, LoongArch::VADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2960 { 4307 /* vaddwev.h.bu */, LoongArch::VADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2961 { 4320 /* vaddwev.h.bu.b */, LoongArch::VADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2962 { 4335 /* vaddwev.q.d */, LoongArch::VADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2963 { 4347 /* vaddwev.q.du */, LoongArch::VADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2964 { 4360 /* vaddwev.q.du.d */, LoongArch::VADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2965 { 4375 /* vaddwev.w.h */, LoongArch::VADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2966 { 4387 /* vaddwev.w.hu */, LoongArch::VADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2967 { 4400 /* vaddwev.w.hu.h */, LoongArch::VADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2968 { 4415 /* vaddwod.d.w */, LoongArch::VADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2969 { 4427 /* vaddwod.d.wu */, LoongArch::VADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2970 { 4440 /* vaddwod.d.wu.w */, LoongArch::VADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2971 { 4455 /* vaddwod.h.b */, LoongArch::VADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2972 { 4467 /* vaddwod.h.bu */, LoongArch::VADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2973 { 4480 /* vaddwod.h.bu.b */, LoongArch::VADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2974 { 4495 /* vaddwod.q.d */, LoongArch::VADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2975 { 4507 /* vaddwod.q.du */, LoongArch::VADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2976 { 4520 /* vaddwod.q.du.d */, LoongArch::VADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2977 { 4535 /* vaddwod.w.h */, LoongArch::VADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2978 { 4547 /* vaddwod.w.hu */, LoongArch::VADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2979 { 4560 /* vaddwod.w.hu.h */, LoongArch::VADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2980 { 4575 /* vand.v */, LoongArch::VAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2981 { 4582 /* vandi.b */, LoongArch::VANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
2982 { 4590 /* vandn.v */, LoongArch::VANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2983 { 4598 /* vavg.b */, LoongArch::VAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2984 { 4605 /* vavg.bu */, LoongArch::VAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2985 { 4613 /* vavg.d */, LoongArch::VAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2986 { 4620 /* vavg.du */, LoongArch::VAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2987 { 4628 /* vavg.h */, LoongArch::VAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2988 { 4635 /* vavg.hu */, LoongArch::VAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2989 { 4643 /* vavg.w */, LoongArch::VAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2990 { 4650 /* vavg.wu */, LoongArch::VAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2991 { 4658 /* vavgr.b */, LoongArch::VAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2992 { 4666 /* vavgr.bu */, LoongArch::VAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2993 { 4675 /* vavgr.d */, LoongArch::VAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2994 { 4683 /* vavgr.du */, LoongArch::VAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2995 { 4692 /* vavgr.h */, LoongArch::VAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2996 { 4700 /* vavgr.hu */, LoongArch::VAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2997 { 4709 /* vavgr.w */, LoongArch::VAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2998 { 4717 /* vavgr.wu */, LoongArch::VAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2999 { 4726 /* vbitclr.b */, LoongArch::VBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3000 { 4736 /* vbitclr.d */, LoongArch::VBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3001 { 4746 /* vbitclr.h */, LoongArch::VBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3002 { 4756 /* vbitclr.w */, LoongArch::VBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3003 { 4766 /* vbitclri.b */, LoongArch::VBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3004 { 4777 /* vbitclri.d */, LoongArch::VBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3005 { 4788 /* vbitclri.h */, LoongArch::VBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3006 { 4799 /* vbitclri.w */, LoongArch::VBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3007 { 4810 /* vbitrev.b */, LoongArch::VBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3008 { 4820 /* vbitrev.d */, LoongArch::VBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3009 { 4830 /* vbitrev.h */, LoongArch::VBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3010 { 4840 /* vbitrev.w */, LoongArch::VBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3011 { 4850 /* vbitrevi.b */, LoongArch::VBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3012 { 4861 /* vbitrevi.d */, LoongArch::VBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3013 { 4872 /* vbitrevi.h */, LoongArch::VBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3014 { 4883 /* vbitrevi.w */, LoongArch::VBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3015 { 4894 /* vbitsel.v */, LoongArch::VBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3016 { 4904 /* vbitseli.b */, LoongArch::VBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3017 { 4915 /* vbitset.b */, LoongArch::VBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3018 { 4925 /* vbitset.d */, LoongArch::VBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3019 { 4935 /* vbitset.h */, LoongArch::VBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3020 { 4945 /* vbitset.w */, LoongArch::VBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3021 { 4955 /* vbitseti.b */, LoongArch::VBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3022 { 4966 /* vbitseti.d */, LoongArch::VBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3023 { 4977 /* vbitseti.h */, LoongArch::VBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3024 { 4988 /* vbitseti.w */, LoongArch::VBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3025 { 4999 /* vbsll.v */, LoongArch::VBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3026 { 5007 /* vbsrl.v */, LoongArch::VBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3027 { 5015 /* vclo.b */, LoongArch::VCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3028 { 5022 /* vclo.d */, LoongArch::VCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3029 { 5029 /* vclo.h */, LoongArch::VCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3030 { 5036 /* vclo.w */, LoongArch::VCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3031 { 5043 /* vclz.b */, LoongArch::VCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3032 { 5050 /* vclz.d */, LoongArch::VCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3033 { 5057 /* vclz.h */, LoongArch::VCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3034 { 5064 /* vclz.w */, LoongArch::VCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3035 { 5071 /* vdiv.b */, LoongArch::VDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3036 { 5078 /* vdiv.bu */, LoongArch::VDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3037 { 5086 /* vdiv.d */, LoongArch::VDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3038 { 5093 /* vdiv.du */, LoongArch::VDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3039 { 5101 /* vdiv.h */, LoongArch::VDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3040 { 5108 /* vdiv.hu */, LoongArch::VDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3041 { 5116 /* vdiv.w */, LoongArch::VDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3042 { 5123 /* vdiv.wu */, LoongArch::VDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3043 { 5131 /* vext2xv.d.b */, LoongArch::VEXT2XV_D_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3044 { 5143 /* vext2xv.d.h */, LoongArch::VEXT2XV_D_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3045 { 5155 /* vext2xv.d.w */, LoongArch::VEXT2XV_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3046 { 5167 /* vext2xv.du.bu */, LoongArch::VEXT2XV_DU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3047 { 5181 /* vext2xv.du.hu */, LoongArch::VEXT2XV_DU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3048 { 5195 /* vext2xv.du.wu */, LoongArch::VEXT2XV_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3049 { 5209 /* vext2xv.h.b */, LoongArch::VEXT2XV_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3050 { 5221 /* vext2xv.hu.bu */, LoongArch::VEXT2XV_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3051 { 5235 /* vext2xv.w.b */, LoongArch::VEXT2XV_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3052 { 5247 /* vext2xv.w.h */, LoongArch::VEXT2XV_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3053 { 5259 /* vext2xv.wu.bu */, LoongArch::VEXT2XV_WU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3054 { 5273 /* vext2xv.wu.hu */, LoongArch::VEXT2XV_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3055 { 5287 /* vexth.d.w */, LoongArch::VEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3056 { 5297 /* vexth.du.wu */, LoongArch::VEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3057 { 5309 /* vexth.h.b */, LoongArch::VEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3058 { 5319 /* vexth.hu.bu */, LoongArch::VEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3059 { 5331 /* vexth.q.d */, LoongArch::VEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3060 { 5341 /* vexth.qu.du */, LoongArch::VEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3061 { 5353 /* vexth.w.h */, LoongArch::VEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3062 { 5363 /* vexth.wu.hu */, LoongArch::VEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3063 { 5375 /* vextl.q.d */, LoongArch::VEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3064 { 5385 /* vextl.qu.du */, LoongArch::VEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3065 { 5397 /* vextrins.b */, LoongArch::VEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3066 { 5408 /* vextrins.d */, LoongArch::VEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3067 { 5419 /* vextrins.h */, LoongArch::VEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3068 { 5430 /* vextrins.w */, LoongArch::VEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3069 { 5441 /* vfadd.d */, LoongArch::VFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3070 { 5449 /* vfadd.s */, LoongArch::VFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3071 { 5457 /* vfclass.d */, LoongArch::VFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3072 { 5467 /* vfclass.s */, LoongArch::VFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3073 { 5477 /* vfcmp.caf.d */, LoongArch::VFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3074 { 5489 /* vfcmp.caf.s */, LoongArch::VFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3075 { 5501 /* vfcmp.ceq.d */, LoongArch::VFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3076 { 5513 /* vfcmp.ceq.s */, LoongArch::VFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3077 { 5525 /* vfcmp.cle.d */, LoongArch::VFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3078 { 5537 /* vfcmp.cle.s */, LoongArch::VFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3079 { 5549 /* vfcmp.clt.d */, LoongArch::VFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3080 { 5561 /* vfcmp.clt.s */, LoongArch::VFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3081 { 5573 /* vfcmp.cne.d */, LoongArch::VFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3082 { 5585 /* vfcmp.cne.s */, LoongArch::VFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3083 { 5597 /* vfcmp.cor.d */, LoongArch::VFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3084 { 5609 /* vfcmp.cor.s */, LoongArch::VFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3085 { 5621 /* vfcmp.cueq.d */, LoongArch::VFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3086 { 5634 /* vfcmp.cueq.s */, LoongArch::VFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3087 { 5647 /* vfcmp.cule.d */, LoongArch::VFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3088 { 5660 /* vfcmp.cule.s */, LoongArch::VFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3089 { 5673 /* vfcmp.cult.d */, LoongArch::VFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3090 { 5686 /* vfcmp.cult.s */, LoongArch::VFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3091 { 5699 /* vfcmp.cun.d */, LoongArch::VFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3092 { 5711 /* vfcmp.cun.s */, LoongArch::VFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3093 { 5723 /* vfcmp.cune.d */, LoongArch::VFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3094 { 5736 /* vfcmp.cune.s */, LoongArch::VFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3095 { 5749 /* vfcmp.saf.d */, LoongArch::VFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3096 { 5761 /* vfcmp.saf.s */, LoongArch::VFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3097 { 5773 /* vfcmp.seq.d */, LoongArch::VFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3098 { 5785 /* vfcmp.seq.s */, LoongArch::VFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3099 { 5797 /* vfcmp.sle.d */, LoongArch::VFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3100 { 5809 /* vfcmp.sle.s */, LoongArch::VFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3101 { 5821 /* vfcmp.slt.d */, LoongArch::VFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3102 { 5833 /* vfcmp.slt.s */, LoongArch::VFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3103 { 5845 /* vfcmp.sne.d */, LoongArch::VFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3104 { 5857 /* vfcmp.sne.s */, LoongArch::VFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3105 { 5869 /* vfcmp.sor.d */, LoongArch::VFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3106 { 5881 /* vfcmp.sor.s */, LoongArch::VFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3107 { 5893 /* vfcmp.sueq.d */, LoongArch::VFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3108 { 5906 /* vfcmp.sueq.s */, LoongArch::VFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3109 { 5919 /* vfcmp.sule.d */, LoongArch::VFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3110 { 5932 /* vfcmp.sule.s */, LoongArch::VFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3111 { 5945 /* vfcmp.sult.d */, LoongArch::VFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3112 { 5958 /* vfcmp.sult.s */, LoongArch::VFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3113 { 5971 /* vfcmp.sun.d */, LoongArch::VFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3114 { 5983 /* vfcmp.sun.s */, LoongArch::VFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3115 { 5995 /* vfcmp.sune.d */, LoongArch::VFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3116 { 6008 /* vfcmp.sune.s */, LoongArch::VFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3117 { 6021 /* vfcvt.h.s */, LoongArch::VFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3118 { 6031 /* vfcvt.s.d */, LoongArch::VFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3119 { 6041 /* vfcvth.d.s */, LoongArch::VFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3120 { 6052 /* vfcvth.s.h */, LoongArch::VFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3121 { 6063 /* vfcvtl.d.s */, LoongArch::VFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3122 { 6074 /* vfcvtl.s.h */, LoongArch::VFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3123 { 6085 /* vfdiv.d */, LoongArch::VFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3124 { 6093 /* vfdiv.s */, LoongArch::VFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3125 { 6101 /* vffint.d.l */, LoongArch::VFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3126 { 6112 /* vffint.d.lu */, LoongArch::VFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3127 { 6124 /* vffint.s.l */, LoongArch::VFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3128 { 6135 /* vffint.s.w */, LoongArch::VFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3129 { 6146 /* vffint.s.wu */, LoongArch::VFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3130 { 6158 /* vffinth.d.w */, LoongArch::VFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3131 { 6170 /* vffintl.d.w */, LoongArch::VFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3132 { 6182 /* vflogb.d */, LoongArch::VFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3133 { 6191 /* vflogb.s */, LoongArch::VFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3134 { 6200 /* vfmadd.d */, LoongArch::VFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3135 { 6209 /* vfmadd.s */, LoongArch::VFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3136 { 6218 /* vfmax.d */, LoongArch::VFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3137 { 6226 /* vfmax.s */, LoongArch::VFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3138 { 6234 /* vfmaxa.d */, LoongArch::VFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3139 { 6243 /* vfmaxa.s */, LoongArch::VFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3140 { 6252 /* vfmin.d */, LoongArch::VFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3141 { 6260 /* vfmin.s */, LoongArch::VFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3142 { 6268 /* vfmina.d */, LoongArch::VFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3143 { 6277 /* vfmina.s */, LoongArch::VFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3144 { 6286 /* vfmsub.d */, LoongArch::VFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3145 { 6295 /* vfmsub.s */, LoongArch::VFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3146 { 6304 /* vfmul.d */, LoongArch::VFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3147 { 6312 /* vfmul.s */, LoongArch::VFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3148 { 6320 /* vfnmadd.d */, LoongArch::VFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3149 { 6330 /* vfnmadd.s */, LoongArch::VFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3150 { 6340 /* vfnmsub.d */, LoongArch::VFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3151 { 6350 /* vfnmsub.s */, LoongArch::VFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3152 { 6360 /* vfrecip.d */, LoongArch::VFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3153 { 6370 /* vfrecip.s */, LoongArch::VFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3154 { 6380 /* vfrecipe.d */, LoongArch::VFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3155 { 6391 /* vfrecipe.s */, LoongArch::VFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3156 { 6402 /* vfrint.d */, LoongArch::VFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3157 { 6411 /* vfrint.s */, LoongArch::VFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3158 { 6420 /* vfrintrm.d */, LoongArch::VFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3159 { 6431 /* vfrintrm.s */, LoongArch::VFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3160 { 6442 /* vfrintrne.d */, LoongArch::VFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3161 { 6454 /* vfrintrne.s */, LoongArch::VFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3162 { 6466 /* vfrintrp.d */, LoongArch::VFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3163 { 6477 /* vfrintrp.s */, LoongArch::VFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3164 { 6488 /* vfrintrz.d */, LoongArch::VFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3165 { 6499 /* vfrintrz.s */, LoongArch::VFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3166 { 6510 /* vfrsqrt.d */, LoongArch::VFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3167 { 6520 /* vfrsqrt.s */, LoongArch::VFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3168 { 6530 /* vfrsqrte.d */, LoongArch::VFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3169 { 6541 /* vfrsqrte.s */, LoongArch::VFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3170 { 6552 /* vfrstp.b */, LoongArch::VFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3171 { 6561 /* vfrstp.h */, LoongArch::VFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3172 { 6570 /* vfrstpi.b */, LoongArch::VFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3173 { 6580 /* vfrstpi.h */, LoongArch::VFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3174 { 6590 /* vfsqrt.d */, LoongArch::VFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3175 { 6599 /* vfsqrt.s */, LoongArch::VFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3176 { 6608 /* vfsub.d */, LoongArch::VFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3177 { 6616 /* vfsub.s */, LoongArch::VFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3178 { 6624 /* vftint.l.d */, LoongArch::VFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3179 { 6635 /* vftint.lu.d */, LoongArch::VFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3180 { 6647 /* vftint.w.d */, LoongArch::VFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3181 { 6658 /* vftint.w.s */, LoongArch::VFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3182 { 6669 /* vftint.wu.s */, LoongArch::VFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3183 { 6681 /* vftinth.l.s */, LoongArch::VFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3184 { 6693 /* vftintl.l.s */, LoongArch::VFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3185 { 6705 /* vftintrm.l.d */, LoongArch::VFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3186 { 6718 /* vftintrm.w.d */, LoongArch::VFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3187 { 6731 /* vftintrm.w.s */, LoongArch::VFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3188 { 6744 /* vftintrmh.l.s */, LoongArch::VFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3189 { 6758 /* vftintrml.l.s */, LoongArch::VFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3190 { 6772 /* vftintrne.l.d */, LoongArch::VFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3191 { 6786 /* vftintrne.w.d */, LoongArch::VFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3192 { 6800 /* vftintrne.w.s */, LoongArch::VFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3193 { 6814 /* vftintrneh.l.s */, LoongArch::VFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3194 { 6829 /* vftintrnel.l.s */, LoongArch::VFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3195 { 6844 /* vftintrp.l.d */, LoongArch::VFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3196 { 6857 /* vftintrp.w.d */, LoongArch::VFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3197 { 6870 /* vftintrp.w.s */, LoongArch::VFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3198 { 6883 /* vftintrph.l.s */, LoongArch::VFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3199 { 6897 /* vftintrpl.l.s */, LoongArch::VFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3200 { 6911 /* vftintrz.l.d */, LoongArch::VFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3201 { 6924 /* vftintrz.lu.d */, LoongArch::VFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3202 { 6938 /* vftintrz.w.d */, LoongArch::VFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3203 { 6951 /* vftintrz.w.s */, LoongArch::VFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3204 { 6964 /* vftintrz.wu.s */, LoongArch::VFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3205 { 6978 /* vftintrzh.l.s */, LoongArch::VFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3206 { 6992 /* vftintrzl.l.s */, LoongArch::VFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3207 { 7006 /* vhaddw.d.w */, LoongArch::VHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3208 { 7017 /* vhaddw.du.wu */, LoongArch::VHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3209 { 7030 /* vhaddw.h.b */, LoongArch::VHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3210 { 7041 /* vhaddw.hu.bu */, LoongArch::VHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3211 { 7054 /* vhaddw.q.d */, LoongArch::VHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3212 { 7065 /* vhaddw.qu.du */, LoongArch::VHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3213 { 7078 /* vhaddw.w.h */, LoongArch::VHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3214 { 7089 /* vhaddw.wu.hu */, LoongArch::VHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3215 { 7102 /* vhsubw.d.w */, LoongArch::VHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3216 { 7113 /* vhsubw.du.wu */, LoongArch::VHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3217 { 7126 /* vhsubw.h.b */, LoongArch::VHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3218 { 7137 /* vhsubw.hu.bu */, LoongArch::VHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3219 { 7150 /* vhsubw.q.d */, LoongArch::VHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3220 { 7161 /* vhsubw.qu.du */, LoongArch::VHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3221 { 7174 /* vhsubw.w.h */, LoongArch::VHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3222 { 7185 /* vhsubw.wu.hu */, LoongArch::VHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3223 { 7198 /* vilvh.b */, LoongArch::VILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3224 { 7206 /* vilvh.d */, LoongArch::VILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3225 { 7214 /* vilvh.h */, LoongArch::VILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3226 { 7222 /* vilvh.w */, LoongArch::VILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3227 { 7230 /* vilvl.b */, LoongArch::VILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3228 { 7238 /* vilvl.d */, LoongArch::VILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3229 { 7246 /* vilvl.h */, LoongArch::VILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3230 { 7254 /* vilvl.w */, LoongArch::VILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3231 { 7262 /* vinsgr2vr.b */, LoongArch::VINSGR2VR_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm4 }, },
3232 { 7274 /* vinsgr2vr.d */, LoongArch::VINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm1 }, },
3233 { 7286 /* vinsgr2vr.h */, LoongArch::VINSGR2VR_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm3 }, },
3234 { 7298 /* vinsgr2vr.w */, LoongArch::VINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm2 }, },
3235 { 7310 /* vld */, LoongArch::VLD, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12addlike }, },
3236 { 7314 /* vldi */, LoongArch::VLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LSX128, MCK_SImm13 }, },
3237 { 7319 /* vldrepl.b */, LoongArch::VLDREPL_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12addlike }, },
3238 { 7329 /* vldrepl.d */, LoongArch::VLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm9lsl3 }, },
3239 { 7339 /* vldrepl.h */, LoongArch::VLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm11lsl1 }, },
3240 { 7349 /* vldrepl.w */, LoongArch::VLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm10lsl2 }, },
3241 { 7359 /* vldx */, LoongArch::VLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, },
3242 { 7364 /* vmadd.b */, LoongArch::VMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3243 { 7372 /* vmadd.d */, LoongArch::VMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3244 { 7380 /* vmadd.h */, LoongArch::VMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3245 { 7388 /* vmadd.w */, LoongArch::VMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3246 { 7396 /* vmaddwev.d.w */, LoongArch::VMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3247 { 7409 /* vmaddwev.d.wu */, LoongArch::VMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3248 { 7423 /* vmaddwev.d.wu.w */, LoongArch::VMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3249 { 7439 /* vmaddwev.h.b */, LoongArch::VMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3250 { 7452 /* vmaddwev.h.bu */, LoongArch::VMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3251 { 7466 /* vmaddwev.h.bu.b */, LoongArch::VMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3252 { 7482 /* vmaddwev.q.d */, LoongArch::VMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3253 { 7495 /* vmaddwev.q.du */, LoongArch::VMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3254 { 7509 /* vmaddwev.q.du.d */, LoongArch::VMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3255 { 7525 /* vmaddwev.w.h */, LoongArch::VMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3256 { 7538 /* vmaddwev.w.hu */, LoongArch::VMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3257 { 7552 /* vmaddwev.w.hu.h */, LoongArch::VMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3258 { 7568 /* vmaddwod.d.w */, LoongArch::VMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3259 { 7581 /* vmaddwod.d.wu */, LoongArch::VMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3260 { 7595 /* vmaddwod.d.wu.w */, LoongArch::VMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3261 { 7611 /* vmaddwod.h.b */, LoongArch::VMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3262 { 7624 /* vmaddwod.h.bu */, LoongArch::VMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3263 { 7638 /* vmaddwod.h.bu.b */, LoongArch::VMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3264 { 7654 /* vmaddwod.q.d */, LoongArch::VMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3265 { 7667 /* vmaddwod.q.du */, LoongArch::VMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3266 { 7681 /* vmaddwod.q.du.d */, LoongArch::VMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3267 { 7697 /* vmaddwod.w.h */, LoongArch::VMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3268 { 7710 /* vmaddwod.w.hu */, LoongArch::VMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3269 { 7724 /* vmaddwod.w.hu.h */, LoongArch::VMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3270 { 7740 /* vmax.b */, LoongArch::VMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3271 { 7747 /* vmax.bu */, LoongArch::VMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3272 { 7755 /* vmax.d */, LoongArch::VMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3273 { 7762 /* vmax.du */, LoongArch::VMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3274 { 7770 /* vmax.h */, LoongArch::VMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3275 { 7777 /* vmax.hu */, LoongArch::VMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3276 { 7785 /* vmax.w */, LoongArch::VMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3277 { 7792 /* vmax.wu */, LoongArch::VMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3278 { 7800 /* vmaxi.b */, LoongArch::VMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3279 { 7808 /* vmaxi.bu */, LoongArch::VMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3280 { 7817 /* vmaxi.d */, LoongArch::VMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3281 { 7825 /* vmaxi.du */, LoongArch::VMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3282 { 7834 /* vmaxi.h */, LoongArch::VMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3283 { 7842 /* vmaxi.hu */, LoongArch::VMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3284 { 7851 /* vmaxi.w */, LoongArch::VMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3285 { 7859 /* vmaxi.wu */, LoongArch::VMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3286 { 7868 /* vmin.b */, LoongArch::VMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3287 { 7875 /* vmin.bu */, LoongArch::VMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3288 { 7883 /* vmin.d */, LoongArch::VMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3289 { 7890 /* vmin.du */, LoongArch::VMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3290 { 7898 /* vmin.h */, LoongArch::VMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3291 { 7905 /* vmin.hu */, LoongArch::VMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3292 { 7913 /* vmin.w */, LoongArch::VMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3293 { 7920 /* vmin.wu */, LoongArch::VMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3294 { 7928 /* vmini.b */, LoongArch::VMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3295 { 7936 /* vmini.bu */, LoongArch::VMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3296 { 7945 /* vmini.d */, LoongArch::VMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3297 { 7953 /* vmini.du */, LoongArch::VMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3298 { 7962 /* vmini.h */, LoongArch::VMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3299 { 7970 /* vmini.hu */, LoongArch::VMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3300 { 7979 /* vmini.w */, LoongArch::VMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3301 { 7987 /* vmini.wu */, LoongArch::VMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3302 { 7996 /* vmod.b */, LoongArch::VMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3303 { 8003 /* vmod.bu */, LoongArch::VMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3304 { 8011 /* vmod.d */, LoongArch::VMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3305 { 8018 /* vmod.du */, LoongArch::VMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3306 { 8026 /* vmod.h */, LoongArch::VMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3307 { 8033 /* vmod.hu */, LoongArch::VMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3308 { 8041 /* vmod.w */, LoongArch::VMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3309 { 8048 /* vmod.wu */, LoongArch::VMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3310 { 8056 /* vmskgez.b */, LoongArch::VMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3311 { 8066 /* vmskltz.b */, LoongArch::VMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3312 { 8076 /* vmskltz.d */, LoongArch::VMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3313 { 8086 /* vmskltz.h */, LoongArch::VMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3314 { 8096 /* vmskltz.w */, LoongArch::VMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3315 { 8106 /* vmsknz.b */, LoongArch::VMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3316 { 8115 /* vmsub.b */, LoongArch::VMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3317 { 8123 /* vmsub.d */, LoongArch::VMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3318 { 8131 /* vmsub.h */, LoongArch::VMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3319 { 8139 /* vmsub.w */, LoongArch::VMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3320 { 8147 /* vmuh.b */, LoongArch::VMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3321 { 8154 /* vmuh.bu */, LoongArch::VMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3322 { 8162 /* vmuh.d */, LoongArch::VMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3323 { 8169 /* vmuh.du */, LoongArch::VMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3324 { 8177 /* vmuh.h */, LoongArch::VMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3325 { 8184 /* vmuh.hu */, LoongArch::VMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3326 { 8192 /* vmuh.w */, LoongArch::VMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3327 { 8199 /* vmuh.wu */, LoongArch::VMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3328 { 8207 /* vmul.b */, LoongArch::VMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3329 { 8214 /* vmul.d */, LoongArch::VMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3330 { 8221 /* vmul.h */, LoongArch::VMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3331 { 8228 /* vmul.w */, LoongArch::VMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3332 { 8235 /* vmulwev.d.w */, LoongArch::VMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3333 { 8247 /* vmulwev.d.wu */, LoongArch::VMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3334 { 8260 /* vmulwev.d.wu.w */, LoongArch::VMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3335 { 8275 /* vmulwev.h.b */, LoongArch::VMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3336 { 8287 /* vmulwev.h.bu */, LoongArch::VMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3337 { 8300 /* vmulwev.h.bu.b */, LoongArch::VMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3338 { 8315 /* vmulwev.q.d */, LoongArch::VMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3339 { 8327 /* vmulwev.q.du */, LoongArch::VMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3340 { 8340 /* vmulwev.q.du.d */, LoongArch::VMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3341 { 8355 /* vmulwev.w.h */, LoongArch::VMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3342 { 8367 /* vmulwev.w.hu */, LoongArch::VMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3343 { 8380 /* vmulwev.w.hu.h */, LoongArch::VMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3344 { 8395 /* vmulwod.d.w */, LoongArch::VMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3345 { 8407 /* vmulwod.d.wu */, LoongArch::VMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3346 { 8420 /* vmulwod.d.wu.w */, LoongArch::VMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3347 { 8435 /* vmulwod.h.b */, LoongArch::VMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3348 { 8447 /* vmulwod.h.bu */, LoongArch::VMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3349 { 8460 /* vmulwod.h.bu.b */, LoongArch::VMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3350 { 8475 /* vmulwod.q.d */, LoongArch::VMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3351 { 8487 /* vmulwod.q.du */, LoongArch::VMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3352 { 8500 /* vmulwod.q.du.d */, LoongArch::VMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3353 { 8515 /* vmulwod.w.h */, LoongArch::VMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3354 { 8527 /* vmulwod.w.hu */, LoongArch::VMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3355 { 8540 /* vmulwod.w.hu.h */, LoongArch::VMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3356 { 8555 /* vneg.b */, LoongArch::VNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3357 { 8562 /* vneg.d */, LoongArch::VNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3358 { 8569 /* vneg.h */, LoongArch::VNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3359 { 8576 /* vneg.w */, LoongArch::VNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3360 { 8583 /* vnor.v */, LoongArch::VNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3361 { 8590 /* vnori.b */, LoongArch::VNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3362 { 8598 /* vor.v */, LoongArch::VOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3363 { 8604 /* vori.b */, LoongArch::VORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3364 { 8611 /* vorn.v */, LoongArch::VORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3365 { 8618 /* vpackev.b */, LoongArch::VPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3366 { 8628 /* vpackev.d */, LoongArch::VPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3367 { 8638 /* vpackev.h */, LoongArch::VPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3368 { 8648 /* vpackev.w */, LoongArch::VPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3369 { 8658 /* vpackod.b */, LoongArch::VPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3370 { 8668 /* vpackod.d */, LoongArch::VPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3371 { 8678 /* vpackod.h */, LoongArch::VPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3372 { 8688 /* vpackod.w */, LoongArch::VPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3373 { 8698 /* vpcnt.b */, LoongArch::VPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3374 { 8706 /* vpcnt.d */, LoongArch::VPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3375 { 8714 /* vpcnt.h */, LoongArch::VPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3376 { 8722 /* vpcnt.w */, LoongArch::VPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3377 { 8730 /* vpermi.w */, LoongArch::VPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3378 { 8739 /* vpickev.b */, LoongArch::VPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3379 { 8749 /* vpickev.d */, LoongArch::VPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3380 { 8759 /* vpickev.h */, LoongArch::VPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3381 { 8769 /* vpickev.w */, LoongArch::VPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3382 { 8779 /* vpickod.b */, LoongArch::VPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3383 { 8789 /* vpickod.d */, LoongArch::VPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3384 { 8799 /* vpickod.h */, LoongArch::VPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3385 { 8809 /* vpickod.w */, LoongArch::VPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3386 { 8819 /* vpickve2gr.b */, LoongArch::VPICKVE2GR_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, },
3387 { 8832 /* vpickve2gr.bu */, LoongArch::VPICKVE2GR_BU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, },
3388 { 8846 /* vpickve2gr.d */, LoongArch::VPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, },
3389 { 8859 /* vpickve2gr.du */, LoongArch::VPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, },
3390 { 8873 /* vpickve2gr.h */, LoongArch::VPICKVE2GR_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, },
3391 { 8886 /* vpickve2gr.hu */, LoongArch::VPICKVE2GR_HU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, },
3392 { 8900 /* vpickve2gr.w */, LoongArch::VPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, },
3393 { 8913 /* vpickve2gr.wu */, LoongArch::VPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, },
3394 { 8927 /* vreplgr2vr.b */, LoongArch::VREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3395 { 8940 /* vreplgr2vr.d */, LoongArch::VREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3396 { 8953 /* vreplgr2vr.h */, LoongArch::VREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3397 { 8966 /* vreplgr2vr.w */, LoongArch::VREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3398 { 8979 /* vrepli.b */, LoongArch::PseudoVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3399 { 8988 /* vrepli.d */, LoongArch::PseudoVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3400 { 8997 /* vrepli.h */, LoongArch::PseudoVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3401 { 9006 /* vrepli.w */, LoongArch::PseudoVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3402 { 9015 /* vreplve.b */, LoongArch::VREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3403 { 9025 /* vreplve.d */, LoongArch::VREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3404 { 9035 /* vreplve.h */, LoongArch::VREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3405 { 9045 /* vreplve.w */, LoongArch::VREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3406 { 9055 /* vreplvei.b */, LoongArch::VREPLVEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3407 { 9066 /* vreplvei.d */, LoongArch::VREPLVEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm1 }, },
3408 { 9077 /* vreplvei.h */, LoongArch::VREPLVEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3409 { 9088 /* vreplvei.w */, LoongArch::VREPLVEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm2 }, },
3410 { 9099 /* vrotr.b */, LoongArch::VROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3411 { 9107 /* vrotr.d */, LoongArch::VROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3412 { 9115 /* vrotr.h */, LoongArch::VROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3413 { 9123 /* vrotr.w */, LoongArch::VROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3414 { 9131 /* vrotri.b */, LoongArch::VROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3415 { 9140 /* vrotri.d */, LoongArch::VROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3416 { 9149 /* vrotri.h */, LoongArch::VROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3417 { 9158 /* vrotri.w */, LoongArch::VROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3418 { 9167 /* vsadd.b */, LoongArch::VSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3419 { 9175 /* vsadd.bu */, LoongArch::VSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3420 { 9184 /* vsadd.d */, LoongArch::VSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3421 { 9192 /* vsadd.du */, LoongArch::VSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3422 { 9201 /* vsadd.h */, LoongArch::VSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3423 { 9209 /* vsadd.hu */, LoongArch::VSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3424 { 9218 /* vsadd.w */, LoongArch::VSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3425 { 9226 /* vsadd.wu */, LoongArch::VSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3426 { 9235 /* vsat.b */, LoongArch::VSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3427 { 9242 /* vsat.bu */, LoongArch::VSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3428 { 9250 /* vsat.d */, LoongArch::VSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3429 { 9257 /* vsat.du */, LoongArch::VSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3430 { 9265 /* vsat.h */, LoongArch::VSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3431 { 9272 /* vsat.hu */, LoongArch::VSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3432 { 9280 /* vsat.w */, LoongArch::VSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3433 { 9287 /* vsat.wu */, LoongArch::VSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3434 { 9295 /* vseq.b */, LoongArch::VSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3435 { 9302 /* vseq.d */, LoongArch::VSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3436 { 9309 /* vseq.h */, LoongArch::VSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3437 { 9316 /* vseq.w */, LoongArch::VSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3438 { 9323 /* vseqi.b */, LoongArch::VSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3439 { 9331 /* vseqi.d */, LoongArch::VSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3440 { 9339 /* vseqi.h */, LoongArch::VSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3441 { 9347 /* vseqi.w */, LoongArch::VSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3442 { 9355 /* vsetallnez.b */, LoongArch::VSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3443 { 9368 /* vsetallnez.d */, LoongArch::VSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3444 { 9381 /* vsetallnez.h */, LoongArch::VSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3445 { 9394 /* vsetallnez.w */, LoongArch::VSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3446 { 9407 /* vsetanyeqz.b */, LoongArch::VSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3447 { 9420 /* vsetanyeqz.d */, LoongArch::VSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3448 { 9433 /* vsetanyeqz.h */, LoongArch::VSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3449 { 9446 /* vsetanyeqz.w */, LoongArch::VSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3450 { 9459 /* vseteqz.v */, LoongArch::VSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3451 { 9469 /* vsetnez.v */, LoongArch::VSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3452 { 9479 /* vshuf.b */, LoongArch::VSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3453 { 9487 /* vshuf.d */, LoongArch::VSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3454 { 9495 /* vshuf.h */, LoongArch::VSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3455 { 9503 /* vshuf.w */, LoongArch::VSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3456 { 9511 /* vshuf4i.b */, LoongArch::VSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3457 { 9521 /* vshuf4i.d */, LoongArch::VSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3458 { 9531 /* vshuf4i.h */, LoongArch::VSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3459 { 9541 /* vshuf4i.w */, LoongArch::VSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3460 { 9551 /* vsigncov.b */, LoongArch::VSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3461 { 9562 /* vsigncov.d */, LoongArch::VSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3462 { 9573 /* vsigncov.h */, LoongArch::VSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3463 { 9584 /* vsigncov.w */, LoongArch::VSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3464 { 9595 /* vsle.b */, LoongArch::VSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3465 { 9602 /* vsle.bu */, LoongArch::VSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3466 { 9610 /* vsle.d */, LoongArch::VSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3467 { 9617 /* vsle.du */, LoongArch::VSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3468 { 9625 /* vsle.h */, LoongArch::VSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3469 { 9632 /* vsle.hu */, LoongArch::VSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3470 { 9640 /* vsle.w */, LoongArch::VSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3471 { 9647 /* vsle.wu */, LoongArch::VSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3472 { 9655 /* vslei.b */, LoongArch::VSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3473 { 9663 /* vslei.bu */, LoongArch::VSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3474 { 9672 /* vslei.d */, LoongArch::VSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3475 { 9680 /* vslei.du */, LoongArch::VSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3476 { 9689 /* vslei.h */, LoongArch::VSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3477 { 9697 /* vslei.hu */, LoongArch::VSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3478 { 9706 /* vslei.w */, LoongArch::VSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3479 { 9714 /* vslei.wu */, LoongArch::VSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3480 { 9723 /* vsll.b */, LoongArch::VSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3481 { 9730 /* vsll.d */, LoongArch::VSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3482 { 9737 /* vsll.h */, LoongArch::VSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3483 { 9744 /* vsll.w */, LoongArch::VSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3484 { 9751 /* vslli.b */, LoongArch::VSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3485 { 9759 /* vslli.d */, LoongArch::VSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3486 { 9767 /* vslli.h */, LoongArch::VSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3487 { 9775 /* vslli.w */, LoongArch::VSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3488 { 9783 /* vsllwil.d.w */, LoongArch::VSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3489 { 9795 /* vsllwil.du.wu */, LoongArch::VSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3490 { 9809 /* vsllwil.h.b */, LoongArch::VSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3491 { 9821 /* vsllwil.hu.bu */, LoongArch::VSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3492 { 9835 /* vsllwil.w.h */, LoongArch::VSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3493 { 9847 /* vsllwil.wu.hu */, LoongArch::VSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3494 { 9861 /* vslt.b */, LoongArch::VSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3495 { 9868 /* vslt.bu */, LoongArch::VSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3496 { 9876 /* vslt.d */, LoongArch::VSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3497 { 9883 /* vslt.du */, LoongArch::VSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3498 { 9891 /* vslt.h */, LoongArch::VSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3499 { 9898 /* vslt.hu */, LoongArch::VSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3500 { 9906 /* vslt.w */, LoongArch::VSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3501 { 9913 /* vslt.wu */, LoongArch::VSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3502 { 9921 /* vslti.b */, LoongArch::VSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3503 { 9929 /* vslti.bu */, LoongArch::VSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3504 { 9938 /* vslti.d */, LoongArch::VSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3505 { 9946 /* vslti.du */, LoongArch::VSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3506 { 9955 /* vslti.h */, LoongArch::VSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3507 { 9963 /* vslti.hu */, LoongArch::VSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3508 { 9972 /* vslti.w */, LoongArch::VSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3509 { 9980 /* vslti.wu */, LoongArch::VSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3510 { 9989 /* vsra.b */, LoongArch::VSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3511 { 9996 /* vsra.d */, LoongArch::VSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3512 { 10003 /* vsra.h */, LoongArch::VSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3513 { 10010 /* vsra.w */, LoongArch::VSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3514 { 10017 /* vsrai.b */, LoongArch::VSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3515 { 10025 /* vsrai.d */, LoongArch::VSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3516 { 10033 /* vsrai.h */, LoongArch::VSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3517 { 10041 /* vsrai.w */, LoongArch::VSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3518 { 10049 /* vsran.b.h */, LoongArch::VSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3519 { 10059 /* vsran.h.w */, LoongArch::VSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3520 { 10069 /* vsran.w.d */, LoongArch::VSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3521 { 10079 /* vsrani.b.h */, LoongArch::VSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3522 { 10090 /* vsrani.d.q */, LoongArch::VSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3523 { 10101 /* vsrani.h.w */, LoongArch::VSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3524 { 10112 /* vsrani.w.d */, LoongArch::VSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3525 { 10123 /* vsrar.b */, LoongArch::VSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3526 { 10131 /* vsrar.d */, LoongArch::VSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3527 { 10139 /* vsrar.h */, LoongArch::VSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3528 { 10147 /* vsrar.w */, LoongArch::VSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3529 { 10155 /* vsrari.b */, LoongArch::VSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3530 { 10164 /* vsrari.d */, LoongArch::VSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3531 { 10173 /* vsrari.h */, LoongArch::VSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3532 { 10182 /* vsrari.w */, LoongArch::VSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3533 { 10191 /* vsrarn.b.h */, LoongArch::VSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3534 { 10202 /* vsrarn.h.w */, LoongArch::VSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3535 { 10213 /* vsrarn.w.d */, LoongArch::VSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3536 { 10224 /* vsrarni.b.h */, LoongArch::VSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3537 { 10236 /* vsrarni.d.q */, LoongArch::VSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3538 { 10248 /* vsrarni.h.w */, LoongArch::VSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3539 { 10260 /* vsrarni.w.d */, LoongArch::VSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3540 { 10272 /* vsrl.b */, LoongArch::VSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3541 { 10279 /* vsrl.d */, LoongArch::VSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3542 { 10286 /* vsrl.h */, LoongArch::VSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3543 { 10293 /* vsrl.w */, LoongArch::VSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3544 { 10300 /* vsrli.b */, LoongArch::VSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3545 { 10308 /* vsrli.d */, LoongArch::VSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3546 { 10316 /* vsrli.h */, LoongArch::VSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3547 { 10324 /* vsrli.w */, LoongArch::VSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3548 { 10332 /* vsrln.b.h */, LoongArch::VSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3549 { 10342 /* vsrln.h.w */, LoongArch::VSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3550 { 10352 /* vsrln.w.d */, LoongArch::VSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3551 { 10362 /* vsrlni.b.h */, LoongArch::VSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3552 { 10373 /* vsrlni.d.q */, LoongArch::VSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3553 { 10384 /* vsrlni.h.w */, LoongArch::VSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3554 { 10395 /* vsrlni.w.d */, LoongArch::VSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3555 { 10406 /* vsrlr.b */, LoongArch::VSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3556 { 10414 /* vsrlr.d */, LoongArch::VSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3557 { 10422 /* vsrlr.h */, LoongArch::VSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3558 { 10430 /* vsrlr.w */, LoongArch::VSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3559 { 10438 /* vsrlri.b */, LoongArch::VSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3560 { 10447 /* vsrlri.d */, LoongArch::VSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3561 { 10456 /* vsrlri.h */, LoongArch::VSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3562 { 10465 /* vsrlri.w */, LoongArch::VSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3563 { 10474 /* vsrlrn.b.h */, LoongArch::VSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3564 { 10485 /* vsrlrn.h.w */, LoongArch::VSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3565 { 10496 /* vsrlrn.w.d */, LoongArch::VSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3566 { 10507 /* vsrlrni.b.h */, LoongArch::VSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3567 { 10519 /* vsrlrni.d.q */, LoongArch::VSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3568 { 10531 /* vsrlrni.h.w */, LoongArch::VSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3569 { 10543 /* vsrlrni.w.d */, LoongArch::VSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3570 { 10555 /* vssran.b.h */, LoongArch::VSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3571 { 10566 /* vssran.bu.h */, LoongArch::VSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3572 { 10578 /* vssran.h.w */, LoongArch::VSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3573 { 10589 /* vssran.hu.w */, LoongArch::VSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3574 { 10601 /* vssran.w.d */, LoongArch::VSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3575 { 10612 /* vssran.wu.d */, LoongArch::VSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3576 { 10624 /* vssrani.b.h */, LoongArch::VSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3577 { 10636 /* vssrani.bu.h */, LoongArch::VSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3578 { 10649 /* vssrani.d.q */, LoongArch::VSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3579 { 10661 /* vssrani.du.q */, LoongArch::VSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3580 { 10674 /* vssrani.h.w */, LoongArch::VSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3581 { 10686 /* vssrani.hu.w */, LoongArch::VSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3582 { 10699 /* vssrani.w.d */, LoongArch::VSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3583 { 10711 /* vssrani.wu.d */, LoongArch::VSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3584 { 10724 /* vssrarn.b.h */, LoongArch::VSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3585 { 10736 /* vssrarn.bu.h */, LoongArch::VSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3586 { 10749 /* vssrarn.h.w */, LoongArch::VSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3587 { 10761 /* vssrarn.hu.w */, LoongArch::VSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3588 { 10774 /* vssrarn.w.d */, LoongArch::VSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3589 { 10786 /* vssrarn.wu.d */, LoongArch::VSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3590 { 10799 /* vssrarni.b.h */, LoongArch::VSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3591 { 10812 /* vssrarni.bu.h */, LoongArch::VSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3592 { 10826 /* vssrarni.d.q */, LoongArch::VSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3593 { 10839 /* vssrarni.du.q */, LoongArch::VSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3594 { 10853 /* vssrarni.h.w */, LoongArch::VSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3595 { 10866 /* vssrarni.hu.w */, LoongArch::VSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3596 { 10880 /* vssrarni.w.d */, LoongArch::VSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3597 { 10893 /* vssrarni.wu.d */, LoongArch::VSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3598 { 10907 /* vssrln.b.h */, LoongArch::VSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3599 { 10918 /* vssrln.bu.h */, LoongArch::VSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3600 { 10930 /* vssrln.h.w */, LoongArch::VSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3601 { 10941 /* vssrln.hu.w */, LoongArch::VSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3602 { 10953 /* vssrln.w.d */, LoongArch::VSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3603 { 10964 /* vssrln.wu.d */, LoongArch::VSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3604 { 10976 /* vssrlni.b.h */, LoongArch::VSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3605 { 10988 /* vssrlni.bu.h */, LoongArch::VSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3606 { 11001 /* vssrlni.d.q */, LoongArch::VSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3607 { 11013 /* vssrlni.du.q */, LoongArch::VSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3608 { 11026 /* vssrlni.h.w */, LoongArch::VSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3609 { 11038 /* vssrlni.hu.w */, LoongArch::VSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3610 { 11051 /* vssrlni.w.d */, LoongArch::VSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3611 { 11063 /* vssrlni.wu.d */, LoongArch::VSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3612 { 11076 /* vssrlrn.b.h */, LoongArch::VSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3613 { 11088 /* vssrlrn.bu.h */, LoongArch::VSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3614 { 11101 /* vssrlrn.h.w */, LoongArch::VSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3615 { 11113 /* vssrlrn.hu.w */, LoongArch::VSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3616 { 11126 /* vssrlrn.w.d */, LoongArch::VSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3617 { 11138 /* vssrlrn.wu.d */, LoongArch::VSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3618 { 11151 /* vssrlrni.b.h */, LoongArch::VSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3619 { 11164 /* vssrlrni.bu.h */, LoongArch::VSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3620 { 11178 /* vssrlrni.d.q */, LoongArch::VSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3621 { 11191 /* vssrlrni.du.q */, LoongArch::VSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3622 { 11205 /* vssrlrni.h.w */, LoongArch::VSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3623 { 11218 /* vssrlrni.hu.w */, LoongArch::VSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3624 { 11232 /* vssrlrni.w.d */, LoongArch::VSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3625 { 11245 /* vssrlrni.wu.d */, LoongArch::VSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3626 { 11259 /* vssub.b */, LoongArch::VSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3627 { 11267 /* vssub.bu */, LoongArch::VSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3628 { 11276 /* vssub.d */, LoongArch::VSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3629 { 11284 /* vssub.du */, LoongArch::VSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3630 { 11293 /* vssub.h */, LoongArch::VSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3631 { 11301 /* vssub.hu */, LoongArch::VSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3632 { 11310 /* vssub.w */, LoongArch::VSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3633 { 11318 /* vssub.wu */, LoongArch::VSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3634 { 11327 /* vst */, LoongArch::VST, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12addlike }, },
3635 { 11331 /* vstelm.b */, LoongArch::VSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8, MCK_UImm4 }, },
3636 { 11340 /* vstelm.d */, LoongArch::VSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl3, MCK_UImm1 }, },
3637 { 11349 /* vstelm.h */, LoongArch::VSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl1, MCK_UImm3 }, },
3638 { 11358 /* vstelm.w */, LoongArch::VSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl2, MCK_UImm2 }, },
3639 { 11367 /* vstx */, LoongArch::VSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, },
3640 { 11372 /* vsub.b */, LoongArch::VSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3641 { 11379 /* vsub.d */, LoongArch::VSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3642 { 11386 /* vsub.h */, LoongArch::VSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3643 { 11393 /* vsub.q */, LoongArch::VSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3644 { 11400 /* vsub.w */, LoongArch::VSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3645 { 11407 /* vsubi.bu */, LoongArch::VSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3646 { 11416 /* vsubi.du */, LoongArch::VSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3647 { 11425 /* vsubi.hu */, LoongArch::VSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3648 { 11434 /* vsubi.wu */, LoongArch::VSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3649 { 11443 /* vsubwev.d.w */, LoongArch::VSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3650 { 11455 /* vsubwev.d.wu */, LoongArch::VSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3651 { 11468 /* vsubwev.h.b */, LoongArch::VSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3652 { 11480 /* vsubwev.h.bu */, LoongArch::VSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3653 { 11493 /* vsubwev.q.d */, LoongArch::VSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3654 { 11505 /* vsubwev.q.du */, LoongArch::VSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3655 { 11518 /* vsubwev.w.h */, LoongArch::VSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3656 { 11530 /* vsubwev.w.hu */, LoongArch::VSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3657 { 11543 /* vsubwod.d.w */, LoongArch::VSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3658 { 11555 /* vsubwod.d.wu */, LoongArch::VSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3659 { 11568 /* vsubwod.h.b */, LoongArch::VSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3660 { 11580 /* vsubwod.h.bu */, LoongArch::VSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3661 { 11593 /* vsubwod.q.d */, LoongArch::VSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3662 { 11605 /* vsubwod.q.du */, LoongArch::VSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3663 { 11618 /* vsubwod.w.h */, LoongArch::VSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3664 { 11630 /* vsubwod.w.hu */, LoongArch::VSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3665 { 11643 /* vxor.v */, LoongArch::VXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3666 { 11650 /* vxori.b */, LoongArch::VXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3667 { 11658 /* x86adc.b */, LoongArch::X86ADC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3668 { 11667 /* x86adc.d */, LoongArch::X86ADC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3669 { 11676 /* x86adc.h */, LoongArch::X86ADC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3670 { 11685 /* x86adc.w */, LoongArch::X86ADC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3671 { 11694 /* x86add.b */, LoongArch::X86ADD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3672 { 11703 /* x86add.d */, LoongArch::X86ADD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3673 { 11712 /* x86add.du */, LoongArch::X86ADD_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3674 { 11722 /* x86add.h */, LoongArch::X86ADD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3675 { 11731 /* x86add.w */, LoongArch::X86ADD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3676 { 11740 /* x86add.wu */, LoongArch::X86ADD_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3677 { 11750 /* x86and.b */, LoongArch::X86AND_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3678 { 11759 /* x86and.d */, LoongArch::X86AND_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3679 { 11768 /* x86and.h */, LoongArch::X86AND_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3680 { 11777 /* x86and.w */, LoongArch::X86AND_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3681 { 11786 /* x86clrtm */, LoongArch::X86CLRTM, Convert_NoOperands, AMFBS_None, { }, },
3682 { 11795 /* x86dec.b */, LoongArch::X86DEC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3683 { 11804 /* x86dec.d */, LoongArch::X86DEC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, },
3684 { 11813 /* x86dec.h */, LoongArch::X86DEC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3685 { 11822 /* x86dec.w */, LoongArch::X86DEC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3686 { 11831 /* x86dectop */, LoongArch::X86DECTOP, Convert_NoOperands, AMFBS_None, { }, },
3687 { 11841 /* x86inc.b */, LoongArch::X86INC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3688 { 11850 /* x86inc.d */, LoongArch::X86INC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, },
3689 { 11859 /* x86inc.h */, LoongArch::X86INC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3690 { 11868 /* x86inc.w */, LoongArch::X86INC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3691 { 11877 /* x86inctop */, LoongArch::X86INCTOP, Convert_NoOperands, AMFBS_None, { }, },
3692 { 11887 /* x86mfflag */, LoongArch::X86MFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
3693 { 11897 /* x86mftop */, LoongArch::X86MFTOP, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3694 { 11906 /* x86mtflag */, LoongArch::X86MTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
3695 { 11916 /* x86mttop */, LoongArch::X86MTTOP, Convert__UImm31_0, AMFBS_None, { MCK_UImm3 }, },
3696 { 11925 /* x86mul.b */, LoongArch::X86MUL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3697 { 11934 /* x86mul.bu */, LoongArch::X86MUL_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3698 { 11944 /* x86mul.d */, LoongArch::X86MUL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3699 { 11953 /* x86mul.du */, LoongArch::X86MUL_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3700 { 11963 /* x86mul.h */, LoongArch::X86MUL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3701 { 11972 /* x86mul.hu */, LoongArch::X86MUL_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3702 { 11982 /* x86mul.w */, LoongArch::X86MUL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3703 { 11991 /* x86mul.wu */, LoongArch::X86MUL_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3704 { 12001 /* x86or.b */, LoongArch::X86OR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3705 { 12009 /* x86or.d */, LoongArch::X86OR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3706 { 12017 /* x86or.h */, LoongArch::X86OR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3707 { 12025 /* x86or.w */, LoongArch::X86OR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3708 { 12033 /* x86rcl.b */, LoongArch::X86RCL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3709 { 12042 /* x86rcl.d */, LoongArch::X86RCL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3710 { 12051 /* x86rcl.h */, LoongArch::X86RCL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3711 { 12060 /* x86rcl.w */, LoongArch::X86RCL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3712 { 12069 /* x86rcli.b */, LoongArch::X86RCLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3713 { 12079 /* x86rcli.d */, LoongArch::X86RCLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3714 { 12089 /* x86rcli.h */, LoongArch::X86RCLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3715 { 12099 /* x86rcli.w */, LoongArch::X86RCLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3716 { 12109 /* x86rcr.b */, LoongArch::X86RCR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3717 { 12118 /* x86rcr.d */, LoongArch::X86RCR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3718 { 12127 /* x86rcr.h */, LoongArch::X86RCR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3719 { 12136 /* x86rcr.w */, LoongArch::X86RCR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3720 { 12145 /* x86rcri.b */, LoongArch::X86RCRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3721 { 12155 /* x86rcri.d */, LoongArch::X86RCRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3722 { 12165 /* x86rcri.h */, LoongArch::X86RCRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3723 { 12175 /* x86rcri.w */, LoongArch::X86RCRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3724 { 12185 /* x86rotl.b */, LoongArch::X86ROTL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3725 { 12195 /* x86rotl.d */, LoongArch::X86ROTL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3726 { 12205 /* x86rotl.h */, LoongArch::X86ROTL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3727 { 12215 /* x86rotl.w */, LoongArch::X86ROTL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3728 { 12225 /* x86rotli.b */, LoongArch::X86ROTLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3729 { 12236 /* x86rotli.d */, LoongArch::X86ROTLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3730 { 12247 /* x86rotli.h */, LoongArch::X86ROTLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3731 { 12258 /* x86rotli.w */, LoongArch::X86ROTLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3732 { 12269 /* x86rotr.b */, LoongArch::X86ROTR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3733 { 12279 /* x86rotr.d */, LoongArch::X86ROTR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3734 { 12289 /* x86rotr.h */, LoongArch::X86ROTR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3735 { 12299 /* x86rotr.w */, LoongArch::X86ROTR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3736 { 12309 /* x86rotri.b */, LoongArch::X86ROTRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3737 { 12320 /* x86rotri.d */, LoongArch::X86ROTRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3738 { 12331 /* x86rotri.h */, LoongArch::X86ROTRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3739 { 12342 /* x86rotri.w */, LoongArch::X86ROTRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3740 { 12353 /* x86sbc.b */, LoongArch::X86SBC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3741 { 12362 /* x86sbc.d */, LoongArch::X86SBC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3742 { 12371 /* x86sbc.h */, LoongArch::X86SBC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3743 { 12380 /* x86sbc.w */, LoongArch::X86SBC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3744 { 12389 /* x86settag */, LoongArch::X86SETTAG, Convert__Reg1_0__UImm51_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm8 }, },
3745 { 12399 /* x86settm */, LoongArch::X86SETTM, Convert_NoOperands, AMFBS_None, { }, },
3746 { 12408 /* x86sll.b */, LoongArch::X86SLL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3747 { 12417 /* x86sll.d */, LoongArch::X86SLL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3748 { 12426 /* x86sll.h */, LoongArch::X86SLL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3749 { 12435 /* x86sll.w */, LoongArch::X86SLL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3750 { 12444 /* x86slli.b */, LoongArch::X86SLLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3751 { 12454 /* x86slli.d */, LoongArch::X86SLLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3752 { 12464 /* x86slli.h */, LoongArch::X86SLLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3753 { 12474 /* x86slli.w */, LoongArch::X86SLLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3754 { 12484 /* x86sra.b */, LoongArch::X86SRA_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3755 { 12493 /* x86sra.d */, LoongArch::X86SRA_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3756 { 12502 /* x86sra.h */, LoongArch::X86SRA_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3757 { 12511 /* x86sra.w */, LoongArch::X86SRA_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3758 { 12520 /* x86srai.b */, LoongArch::X86SRAI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3759 { 12530 /* x86srai.d */, LoongArch::X86SRAI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3760 { 12540 /* x86srai.h */, LoongArch::X86SRAI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3761 { 12550 /* x86srai.w */, LoongArch::X86SRAI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3762 { 12560 /* x86srl.b */, LoongArch::X86SRL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3763 { 12569 /* x86srl.d */, LoongArch::X86SRL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3764 { 12578 /* x86srl.h */, LoongArch::X86SRL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3765 { 12587 /* x86srl.w */, LoongArch::X86SRL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3766 { 12596 /* x86srli.b */, LoongArch::X86SRLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3767 { 12606 /* x86srli.d */, LoongArch::X86SRLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3768 { 12616 /* x86srli.h */, LoongArch::X86SRLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3769 { 12626 /* x86srli.w */, LoongArch::X86SRLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3770 { 12636 /* x86sub.b */, LoongArch::X86SUB_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3771 { 12645 /* x86sub.d */, LoongArch::X86SUB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3772 { 12654 /* x86sub.du */, LoongArch::X86SUB_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3773 { 12664 /* x86sub.h */, LoongArch::X86SUB_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3774 { 12673 /* x86sub.w */, LoongArch::X86SUB_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3775 { 12682 /* x86sub.wu */, LoongArch::X86SUB_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3776 { 12692 /* x86xor.b */, LoongArch::X86XOR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3777 { 12701 /* x86xor.d */, LoongArch::X86XOR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3778 { 12710 /* x86xor.h */, LoongArch::X86XOR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3779 { 12719 /* x86xor.w */, LoongArch::X86XOR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3780 { 12728 /* xor */, LoongArch::XOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
3781 { 12732 /* xori */, LoongArch::XORI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, },
3782 { 12737 /* xvabsd.b */, LoongArch::XVABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3783 { 12746 /* xvabsd.bu */, LoongArch::XVABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3784 { 12756 /* xvabsd.d */, LoongArch::XVABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3785 { 12765 /* xvabsd.du */, LoongArch::XVABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3786 { 12775 /* xvabsd.h */, LoongArch::XVABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3787 { 12784 /* xvabsd.hu */, LoongArch::XVABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3788 { 12794 /* xvabsd.w */, LoongArch::XVABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3789 { 12803 /* xvabsd.wu */, LoongArch::XVABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3790 { 12813 /* xvadd.b */, LoongArch::XVADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3791 { 12821 /* xvadd.d */, LoongArch::XVADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3792 { 12829 /* xvadd.h */, LoongArch::XVADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3793 { 12837 /* xvadd.q */, LoongArch::XVADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3794 { 12845 /* xvadd.w */, LoongArch::XVADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3795 { 12853 /* xvadda.b */, LoongArch::XVADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3796 { 12862 /* xvadda.d */, LoongArch::XVADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3797 { 12871 /* xvadda.h */, LoongArch::XVADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3798 { 12880 /* xvadda.w */, LoongArch::XVADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3799 { 12889 /* xvaddi.bu */, LoongArch::XVADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3800 { 12899 /* xvaddi.du */, LoongArch::XVADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3801 { 12909 /* xvaddi.hu */, LoongArch::XVADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3802 { 12919 /* xvaddi.wu */, LoongArch::XVADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3803 { 12929 /* xvaddwev.d.w */, LoongArch::XVADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3804 { 12942 /* xvaddwev.d.wu */, LoongArch::XVADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3805 { 12956 /* xvaddwev.d.wu.w */, LoongArch::XVADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3806 { 12972 /* xvaddwev.h.b */, LoongArch::XVADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3807 { 12985 /* xvaddwev.h.bu */, LoongArch::XVADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3808 { 12999 /* xvaddwev.h.bu.b */, LoongArch::XVADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3809 { 13015 /* xvaddwev.q.d */, LoongArch::XVADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3810 { 13028 /* xvaddwev.q.du */, LoongArch::XVADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3811 { 13042 /* xvaddwev.q.du.d */, LoongArch::XVADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3812 { 13058 /* xvaddwev.w.h */, LoongArch::XVADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3813 { 13071 /* xvaddwev.w.hu */, LoongArch::XVADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3814 { 13085 /* xvaddwev.w.hu.h */, LoongArch::XVADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3815 { 13101 /* xvaddwod.d.w */, LoongArch::XVADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3816 { 13114 /* xvaddwod.d.wu */, LoongArch::XVADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3817 { 13128 /* xvaddwod.d.wu.w */, LoongArch::XVADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3818 { 13144 /* xvaddwod.h.b */, LoongArch::XVADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3819 { 13157 /* xvaddwod.h.bu */, LoongArch::XVADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3820 { 13171 /* xvaddwod.h.bu.b */, LoongArch::XVADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3821 { 13187 /* xvaddwod.q.d */, LoongArch::XVADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3822 { 13200 /* xvaddwod.q.du */, LoongArch::XVADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3823 { 13214 /* xvaddwod.q.du.d */, LoongArch::XVADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3824 { 13230 /* xvaddwod.w.h */, LoongArch::XVADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3825 { 13243 /* xvaddwod.w.hu */, LoongArch::XVADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3826 { 13257 /* xvaddwod.w.hu.h */, LoongArch::XVADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3827 { 13273 /* xvand.v */, LoongArch::XVAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3828 { 13281 /* xvandi.b */, LoongArch::XVANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3829 { 13290 /* xvandn.v */, LoongArch::XVANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3830 { 13299 /* xvavg.b */, LoongArch::XVAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3831 { 13307 /* xvavg.bu */, LoongArch::XVAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3832 { 13316 /* xvavg.d */, LoongArch::XVAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3833 { 13324 /* xvavg.du */, LoongArch::XVAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3834 { 13333 /* xvavg.h */, LoongArch::XVAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3835 { 13341 /* xvavg.hu */, LoongArch::XVAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3836 { 13350 /* xvavg.w */, LoongArch::XVAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3837 { 13358 /* xvavg.wu */, LoongArch::XVAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3838 { 13367 /* xvavgr.b */, LoongArch::XVAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3839 { 13376 /* xvavgr.bu */, LoongArch::XVAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3840 { 13386 /* xvavgr.d */, LoongArch::XVAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3841 { 13395 /* xvavgr.du */, LoongArch::XVAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3842 { 13405 /* xvavgr.h */, LoongArch::XVAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3843 { 13414 /* xvavgr.hu */, LoongArch::XVAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3844 { 13424 /* xvavgr.w */, LoongArch::XVAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3845 { 13433 /* xvavgr.wu */, LoongArch::XVAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3846 { 13443 /* xvbitclr.b */, LoongArch::XVBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3847 { 13454 /* xvbitclr.d */, LoongArch::XVBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3848 { 13465 /* xvbitclr.h */, LoongArch::XVBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3849 { 13476 /* xvbitclr.w */, LoongArch::XVBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3850 { 13487 /* xvbitclri.b */, LoongArch::XVBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3851 { 13499 /* xvbitclri.d */, LoongArch::XVBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3852 { 13511 /* xvbitclri.h */, LoongArch::XVBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3853 { 13523 /* xvbitclri.w */, LoongArch::XVBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3854 { 13535 /* xvbitrev.b */, LoongArch::XVBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3855 { 13546 /* xvbitrev.d */, LoongArch::XVBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3856 { 13557 /* xvbitrev.h */, LoongArch::XVBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3857 { 13568 /* xvbitrev.w */, LoongArch::XVBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3858 { 13579 /* xvbitrevi.b */, LoongArch::XVBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3859 { 13591 /* xvbitrevi.d */, LoongArch::XVBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3860 { 13603 /* xvbitrevi.h */, LoongArch::XVBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3861 { 13615 /* xvbitrevi.w */, LoongArch::XVBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3862 { 13627 /* xvbitsel.v */, LoongArch::XVBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3863 { 13638 /* xvbitseli.b */, LoongArch::XVBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3864 { 13650 /* xvbitset.b */, LoongArch::XVBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3865 { 13661 /* xvbitset.d */, LoongArch::XVBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3866 { 13672 /* xvbitset.h */, LoongArch::XVBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3867 { 13683 /* xvbitset.w */, LoongArch::XVBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3868 { 13694 /* xvbitseti.b */, LoongArch::XVBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3869 { 13706 /* xvbitseti.d */, LoongArch::XVBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3870 { 13718 /* xvbitseti.h */, LoongArch::XVBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3871 { 13730 /* xvbitseti.w */, LoongArch::XVBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3872 { 13742 /* xvbsll.v */, LoongArch::XVBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3873 { 13751 /* xvbsrl.v */, LoongArch::XVBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3874 { 13760 /* xvclo.b */, LoongArch::XVCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3875 { 13768 /* xvclo.d */, LoongArch::XVCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3876 { 13776 /* xvclo.h */, LoongArch::XVCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3877 { 13784 /* xvclo.w */, LoongArch::XVCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3878 { 13792 /* xvclz.b */, LoongArch::XVCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3879 { 13800 /* xvclz.d */, LoongArch::XVCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3880 { 13808 /* xvclz.h */, LoongArch::XVCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3881 { 13816 /* xvclz.w */, LoongArch::XVCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3882 { 13824 /* xvdiv.b */, LoongArch::XVDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3883 { 13832 /* xvdiv.bu */, LoongArch::XVDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3884 { 13841 /* xvdiv.d */, LoongArch::XVDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3885 { 13849 /* xvdiv.du */, LoongArch::XVDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3886 { 13858 /* xvdiv.h */, LoongArch::XVDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3887 { 13866 /* xvdiv.hu */, LoongArch::XVDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3888 { 13875 /* xvdiv.w */, LoongArch::XVDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3889 { 13883 /* xvdiv.wu */, LoongArch::XVDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3890 { 13892 /* xvexth.d.w */, LoongArch::XVEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3891 { 13903 /* xvexth.du.wu */, LoongArch::XVEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3892 { 13916 /* xvexth.h.b */, LoongArch::XVEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3893 { 13927 /* xvexth.hu.bu */, LoongArch::XVEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3894 { 13940 /* xvexth.q.d */, LoongArch::XVEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3895 { 13951 /* xvexth.qu.du */, LoongArch::XVEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3896 { 13964 /* xvexth.w.h */, LoongArch::XVEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3897 { 13975 /* xvexth.wu.hu */, LoongArch::XVEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3898 { 13988 /* xvextl.q.d */, LoongArch::XVEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3899 { 13999 /* xvextl.qu.du */, LoongArch::XVEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3900 { 14012 /* xvextrins.b */, LoongArch::XVEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3901 { 14024 /* xvextrins.d */, LoongArch::XVEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3902 { 14036 /* xvextrins.h */, LoongArch::XVEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3903 { 14048 /* xvextrins.w */, LoongArch::XVEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3904 { 14060 /* xvfadd.d */, LoongArch::XVFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3905 { 14069 /* xvfadd.s */, LoongArch::XVFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3906 { 14078 /* xvfclass.d */, LoongArch::XVFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3907 { 14089 /* xvfclass.s */, LoongArch::XVFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3908 { 14100 /* xvfcmp.caf.d */, LoongArch::XVFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3909 { 14113 /* xvfcmp.caf.s */, LoongArch::XVFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3910 { 14126 /* xvfcmp.ceq.d */, LoongArch::XVFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3911 { 14139 /* xvfcmp.ceq.s */, LoongArch::XVFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3912 { 14152 /* xvfcmp.cle.d */, LoongArch::XVFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3913 { 14165 /* xvfcmp.cle.s */, LoongArch::XVFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3914 { 14178 /* xvfcmp.clt.d */, LoongArch::XVFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3915 { 14191 /* xvfcmp.clt.s */, LoongArch::XVFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3916 { 14204 /* xvfcmp.cne.d */, LoongArch::XVFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3917 { 14217 /* xvfcmp.cne.s */, LoongArch::XVFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3918 { 14230 /* xvfcmp.cor.d */, LoongArch::XVFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3919 { 14243 /* xvfcmp.cor.s */, LoongArch::XVFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3920 { 14256 /* xvfcmp.cueq.d */, LoongArch::XVFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3921 { 14270 /* xvfcmp.cueq.s */, LoongArch::XVFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3922 { 14284 /* xvfcmp.cule.d */, LoongArch::XVFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3923 { 14298 /* xvfcmp.cule.s */, LoongArch::XVFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3924 { 14312 /* xvfcmp.cult.d */, LoongArch::XVFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3925 { 14326 /* xvfcmp.cult.s */, LoongArch::XVFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3926 { 14340 /* xvfcmp.cun.d */, LoongArch::XVFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3927 { 14353 /* xvfcmp.cun.s */, LoongArch::XVFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3928 { 14366 /* xvfcmp.cune.d */, LoongArch::XVFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3929 { 14380 /* xvfcmp.cune.s */, LoongArch::XVFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3930 { 14394 /* xvfcmp.saf.d */, LoongArch::XVFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3931 { 14407 /* xvfcmp.saf.s */, LoongArch::XVFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3932 { 14420 /* xvfcmp.seq.d */, LoongArch::XVFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3933 { 14433 /* xvfcmp.seq.s */, LoongArch::XVFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3934 { 14446 /* xvfcmp.sle.d */, LoongArch::XVFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3935 { 14459 /* xvfcmp.sle.s */, LoongArch::XVFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3936 { 14472 /* xvfcmp.slt.d */, LoongArch::XVFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3937 { 14485 /* xvfcmp.slt.s */, LoongArch::XVFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3938 { 14498 /* xvfcmp.sne.d */, LoongArch::XVFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3939 { 14511 /* xvfcmp.sne.s */, LoongArch::XVFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3940 { 14524 /* xvfcmp.sor.d */, LoongArch::XVFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3941 { 14537 /* xvfcmp.sor.s */, LoongArch::XVFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3942 { 14550 /* xvfcmp.sueq.d */, LoongArch::XVFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3943 { 14564 /* xvfcmp.sueq.s */, LoongArch::XVFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3944 { 14578 /* xvfcmp.sule.d */, LoongArch::XVFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3945 { 14592 /* xvfcmp.sule.s */, LoongArch::XVFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3946 { 14606 /* xvfcmp.sult.d */, LoongArch::XVFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3947 { 14620 /* xvfcmp.sult.s */, LoongArch::XVFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3948 { 14634 /* xvfcmp.sun.d */, LoongArch::XVFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3949 { 14647 /* xvfcmp.sun.s */, LoongArch::XVFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3950 { 14660 /* xvfcmp.sune.d */, LoongArch::XVFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3951 { 14674 /* xvfcmp.sune.s */, LoongArch::XVFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3952 { 14688 /* xvfcvt.h.s */, LoongArch::XVFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3953 { 14699 /* xvfcvt.s.d */, LoongArch::XVFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3954 { 14710 /* xvfcvth.d.s */, LoongArch::XVFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3955 { 14722 /* xvfcvth.s.h */, LoongArch::XVFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3956 { 14734 /* xvfcvtl.d.s */, LoongArch::XVFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3957 { 14746 /* xvfcvtl.s.h */, LoongArch::XVFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3958 { 14758 /* xvfdiv.d */, LoongArch::XVFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3959 { 14767 /* xvfdiv.s */, LoongArch::XVFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3960 { 14776 /* xvffint.d.l */, LoongArch::XVFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3961 { 14788 /* xvffint.d.lu */, LoongArch::XVFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3962 { 14801 /* xvffint.s.l */, LoongArch::XVFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3963 { 14813 /* xvffint.s.w */, LoongArch::XVFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3964 { 14825 /* xvffint.s.wu */, LoongArch::XVFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3965 { 14838 /* xvffinth.d.w */, LoongArch::XVFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3966 { 14851 /* xvffintl.d.w */, LoongArch::XVFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3967 { 14864 /* xvflogb.d */, LoongArch::XVFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3968 { 14874 /* xvflogb.s */, LoongArch::XVFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3969 { 14884 /* xvfmadd.d */, LoongArch::XVFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3970 { 14894 /* xvfmadd.s */, LoongArch::XVFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3971 { 14904 /* xvfmax.d */, LoongArch::XVFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3972 { 14913 /* xvfmax.s */, LoongArch::XVFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3973 { 14922 /* xvfmaxa.d */, LoongArch::XVFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3974 { 14932 /* xvfmaxa.s */, LoongArch::XVFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3975 { 14942 /* xvfmin.d */, LoongArch::XVFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3976 { 14951 /* xvfmin.s */, LoongArch::XVFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3977 { 14960 /* xvfmina.d */, LoongArch::XVFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3978 { 14970 /* xvfmina.s */, LoongArch::XVFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3979 { 14980 /* xvfmsub.d */, LoongArch::XVFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3980 { 14990 /* xvfmsub.s */, LoongArch::XVFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3981 { 15000 /* xvfmul.d */, LoongArch::XVFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3982 { 15009 /* xvfmul.s */, LoongArch::XVFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3983 { 15018 /* xvfnmadd.d */, LoongArch::XVFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3984 { 15029 /* xvfnmadd.s */, LoongArch::XVFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3985 { 15040 /* xvfnmsub.d */, LoongArch::XVFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3986 { 15051 /* xvfnmsub.s */, LoongArch::XVFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3987 { 15062 /* xvfrecip.d */, LoongArch::XVFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3988 { 15073 /* xvfrecip.s */, LoongArch::XVFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3989 { 15084 /* xvfrecipe.d */, LoongArch::XVFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3990 { 15096 /* xvfrecipe.s */, LoongArch::XVFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3991 { 15108 /* xvfrint.d */, LoongArch::XVFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3992 { 15118 /* xvfrint.s */, LoongArch::XVFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3993 { 15128 /* xvfrintrm.d */, LoongArch::XVFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3994 { 15140 /* xvfrintrm.s */, LoongArch::XVFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3995 { 15152 /* xvfrintrne.d */, LoongArch::XVFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3996 { 15165 /* xvfrintrne.s */, LoongArch::XVFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3997 { 15178 /* xvfrintrp.d */, LoongArch::XVFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3998 { 15190 /* xvfrintrp.s */, LoongArch::XVFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3999 { 15202 /* xvfrintrz.d */, LoongArch::XVFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4000 { 15214 /* xvfrintrz.s */, LoongArch::XVFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4001 { 15226 /* xvfrsqrt.d */, LoongArch::XVFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4002 { 15237 /* xvfrsqrt.s */, LoongArch::XVFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4003 { 15248 /* xvfrsqrte.d */, LoongArch::XVFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4004 { 15260 /* xvfrsqrte.s */, LoongArch::XVFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4005 { 15272 /* xvfrstp.b */, LoongArch::XVFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4006 { 15282 /* xvfrstp.h */, LoongArch::XVFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4007 { 15292 /* xvfrstpi.b */, LoongArch::XVFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4008 { 15303 /* xvfrstpi.h */, LoongArch::XVFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4009 { 15314 /* xvfsqrt.d */, LoongArch::XVFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4010 { 15324 /* xvfsqrt.s */, LoongArch::XVFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4011 { 15334 /* xvfsub.d */, LoongArch::XVFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4012 { 15343 /* xvfsub.s */, LoongArch::XVFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4013 { 15352 /* xvftint.l.d */, LoongArch::XVFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4014 { 15364 /* xvftint.lu.d */, LoongArch::XVFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4015 { 15377 /* xvftint.w.d */, LoongArch::XVFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4016 { 15389 /* xvftint.w.s */, LoongArch::XVFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4017 { 15401 /* xvftint.wu.s */, LoongArch::XVFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4018 { 15414 /* xvftinth.l.s */, LoongArch::XVFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4019 { 15427 /* xvftintl.l.s */, LoongArch::XVFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4020 { 15440 /* xvftintrm.l.d */, LoongArch::XVFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4021 { 15454 /* xvftintrm.w.d */, LoongArch::XVFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4022 { 15468 /* xvftintrm.w.s */, LoongArch::XVFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4023 { 15482 /* xvftintrmh.l.s */, LoongArch::XVFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4024 { 15497 /* xvftintrml.l.s */, LoongArch::XVFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4025 { 15512 /* xvftintrne.l.d */, LoongArch::XVFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4026 { 15527 /* xvftintrne.w.d */, LoongArch::XVFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4027 { 15542 /* xvftintrne.w.s */, LoongArch::XVFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4028 { 15557 /* xvftintrneh.l.s */, LoongArch::XVFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4029 { 15573 /* xvftintrnel.l.s */, LoongArch::XVFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4030 { 15589 /* xvftintrp.l.d */, LoongArch::XVFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4031 { 15603 /* xvftintrp.w.d */, LoongArch::XVFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4032 { 15617 /* xvftintrp.w.s */, LoongArch::XVFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4033 { 15631 /* xvftintrph.l.s */, LoongArch::XVFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4034 { 15646 /* xvftintrpl.l.s */, LoongArch::XVFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4035 { 15661 /* xvftintrz.l.d */, LoongArch::XVFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4036 { 15675 /* xvftintrz.lu.d */, LoongArch::XVFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4037 { 15690 /* xvftintrz.w.d */, LoongArch::XVFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4038 { 15704 /* xvftintrz.w.s */, LoongArch::XVFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4039 { 15718 /* xvftintrz.wu.s */, LoongArch::XVFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4040 { 15733 /* xvftintrzh.l.s */, LoongArch::XVFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4041 { 15748 /* xvftintrzl.l.s */, LoongArch::XVFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4042 { 15763 /* xvhaddw.d.w */, LoongArch::XVHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4043 { 15775 /* xvhaddw.du.wu */, LoongArch::XVHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4044 { 15789 /* xvhaddw.h.b */, LoongArch::XVHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4045 { 15801 /* xvhaddw.hu.bu */, LoongArch::XVHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4046 { 15815 /* xvhaddw.q.d */, LoongArch::XVHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4047 { 15827 /* xvhaddw.qu.du */, LoongArch::XVHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4048 { 15841 /* xvhaddw.w.h */, LoongArch::XVHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4049 { 15853 /* xvhaddw.wu.hu */, LoongArch::XVHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4050 { 15867 /* xvhseli.d */, LoongArch::XVHSELI_D, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4051 { 15877 /* xvhsubw.d.w */, LoongArch::XVHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4052 { 15889 /* xvhsubw.du.wu */, LoongArch::XVHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4053 { 15903 /* xvhsubw.h.b */, LoongArch::XVHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4054 { 15915 /* xvhsubw.hu.bu */, LoongArch::XVHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4055 { 15929 /* xvhsubw.q.d */, LoongArch::XVHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4056 { 15941 /* xvhsubw.qu.du */, LoongArch::XVHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4057 { 15955 /* xvhsubw.w.h */, LoongArch::XVHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4058 { 15967 /* xvhsubw.wu.hu */, LoongArch::XVHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4059 { 15981 /* xvilvh.b */, LoongArch::XVILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4060 { 15990 /* xvilvh.d */, LoongArch::XVILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4061 { 15999 /* xvilvh.h */, LoongArch::XVILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4062 { 16008 /* xvilvh.w */, LoongArch::XVILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4063 { 16017 /* xvilvl.b */, LoongArch::XVILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4064 { 16026 /* xvilvl.d */, LoongArch::XVILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4065 { 16035 /* xvilvl.h */, LoongArch::XVILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4066 { 16044 /* xvilvl.w */, LoongArch::XVILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4067 { 16053 /* xvinsgr2vr.d */, LoongArch::XVINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm2 }, },
4068 { 16066 /* xvinsgr2vr.w */, LoongArch::XVINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm3 }, },
4069 { 16079 /* xvinsve0.d */, LoongArch::XVINSVE0_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4070 { 16090 /* xvinsve0.w */, LoongArch::XVINSVE0_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4071 { 16101 /* xvld */, LoongArch::XVLD, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12addlike }, },
4072 { 16106 /* xvldi */, LoongArch::XVLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LASX256, MCK_SImm13 }, },
4073 { 16112 /* xvldrepl.b */, LoongArch::XVLDREPL_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12addlike }, },
4074 { 16123 /* xvldrepl.d */, LoongArch::XVLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm9lsl3 }, },
4075 { 16134 /* xvldrepl.h */, LoongArch::XVLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm11lsl1 }, },
4076 { 16145 /* xvldrepl.w */, LoongArch::XVLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm10lsl2 }, },
4077 { 16156 /* xvldx */, LoongArch::XVLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, },
4078 { 16162 /* xvmadd.b */, LoongArch::XVMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4079 { 16171 /* xvmadd.d */, LoongArch::XVMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4080 { 16180 /* xvmadd.h */, LoongArch::XVMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4081 { 16189 /* xvmadd.w */, LoongArch::XVMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4082 { 16198 /* xvmaddwev.d.w */, LoongArch::XVMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4083 { 16212 /* xvmaddwev.d.wu */, LoongArch::XVMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4084 { 16227 /* xvmaddwev.d.wu.w */, LoongArch::XVMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4085 { 16244 /* xvmaddwev.h.b */, LoongArch::XVMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4086 { 16258 /* xvmaddwev.h.bu */, LoongArch::XVMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4087 { 16273 /* xvmaddwev.h.bu.b */, LoongArch::XVMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4088 { 16290 /* xvmaddwev.q.d */, LoongArch::XVMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4089 { 16304 /* xvmaddwev.q.du */, LoongArch::XVMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4090 { 16319 /* xvmaddwev.q.du.d */, LoongArch::XVMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4091 { 16336 /* xvmaddwev.w.h */, LoongArch::XVMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4092 { 16350 /* xvmaddwev.w.hu */, LoongArch::XVMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4093 { 16365 /* xvmaddwev.w.hu.h */, LoongArch::XVMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4094 { 16382 /* xvmaddwod.d.w */, LoongArch::XVMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4095 { 16396 /* xvmaddwod.d.wu */, LoongArch::XVMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4096 { 16411 /* xvmaddwod.d.wu.w */, LoongArch::XVMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4097 { 16428 /* xvmaddwod.h.b */, LoongArch::XVMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4098 { 16442 /* xvmaddwod.h.bu */, LoongArch::XVMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4099 { 16457 /* xvmaddwod.h.bu.b */, LoongArch::XVMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4100 { 16474 /* xvmaddwod.q.d */, LoongArch::XVMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4101 { 16488 /* xvmaddwod.q.du */, LoongArch::XVMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4102 { 16503 /* xvmaddwod.q.du.d */, LoongArch::XVMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4103 { 16520 /* xvmaddwod.w.h */, LoongArch::XVMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4104 { 16534 /* xvmaddwod.w.hu */, LoongArch::XVMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4105 { 16549 /* xvmaddwod.w.hu.h */, LoongArch::XVMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4106 { 16566 /* xvmax.b */, LoongArch::XVMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4107 { 16574 /* xvmax.bu */, LoongArch::XVMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4108 { 16583 /* xvmax.d */, LoongArch::XVMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4109 { 16591 /* xvmax.du */, LoongArch::XVMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4110 { 16600 /* xvmax.h */, LoongArch::XVMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4111 { 16608 /* xvmax.hu */, LoongArch::XVMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4112 { 16617 /* xvmax.w */, LoongArch::XVMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4113 { 16625 /* xvmax.wu */, LoongArch::XVMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4114 { 16634 /* xvmaxi.b */, LoongArch::XVMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4115 { 16643 /* xvmaxi.bu */, LoongArch::XVMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4116 { 16653 /* xvmaxi.d */, LoongArch::XVMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4117 { 16662 /* xvmaxi.du */, LoongArch::XVMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4118 { 16672 /* xvmaxi.h */, LoongArch::XVMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4119 { 16681 /* xvmaxi.hu */, LoongArch::XVMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4120 { 16691 /* xvmaxi.w */, LoongArch::XVMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4121 { 16700 /* xvmaxi.wu */, LoongArch::XVMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4122 { 16710 /* xvmin.b */, LoongArch::XVMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4123 { 16718 /* xvmin.bu */, LoongArch::XVMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4124 { 16727 /* xvmin.d */, LoongArch::XVMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4125 { 16735 /* xvmin.du */, LoongArch::XVMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4126 { 16744 /* xvmin.h */, LoongArch::XVMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4127 { 16752 /* xvmin.hu */, LoongArch::XVMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4128 { 16761 /* xvmin.w */, LoongArch::XVMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4129 { 16769 /* xvmin.wu */, LoongArch::XVMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4130 { 16778 /* xvmini.b */, LoongArch::XVMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4131 { 16787 /* xvmini.bu */, LoongArch::XVMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4132 { 16797 /* xvmini.d */, LoongArch::XVMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4133 { 16806 /* xvmini.du */, LoongArch::XVMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4134 { 16816 /* xvmini.h */, LoongArch::XVMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4135 { 16825 /* xvmini.hu */, LoongArch::XVMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4136 { 16835 /* xvmini.w */, LoongArch::XVMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4137 { 16844 /* xvmini.wu */, LoongArch::XVMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4138 { 16854 /* xvmod.b */, LoongArch::XVMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4139 { 16862 /* xvmod.bu */, LoongArch::XVMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4140 { 16871 /* xvmod.d */, LoongArch::XVMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4141 { 16879 /* xvmod.du */, LoongArch::XVMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4142 { 16888 /* xvmod.h */, LoongArch::XVMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4143 { 16896 /* xvmod.hu */, LoongArch::XVMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4144 { 16905 /* xvmod.w */, LoongArch::XVMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4145 { 16913 /* xvmod.wu */, LoongArch::XVMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4146 { 16922 /* xvmskgez.b */, LoongArch::XVMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4147 { 16933 /* xvmskltz.b */, LoongArch::XVMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4148 { 16944 /* xvmskltz.d */, LoongArch::XVMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4149 { 16955 /* xvmskltz.h */, LoongArch::XVMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4150 { 16966 /* xvmskltz.w */, LoongArch::XVMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4151 { 16977 /* xvmsknz.b */, LoongArch::XVMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4152 { 16987 /* xvmsub.b */, LoongArch::XVMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4153 { 16996 /* xvmsub.d */, LoongArch::XVMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4154 { 17005 /* xvmsub.h */, LoongArch::XVMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4155 { 17014 /* xvmsub.w */, LoongArch::XVMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4156 { 17023 /* xvmuh.b */, LoongArch::XVMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4157 { 17031 /* xvmuh.bu */, LoongArch::XVMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4158 { 17040 /* xvmuh.d */, LoongArch::XVMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4159 { 17048 /* xvmuh.du */, LoongArch::XVMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4160 { 17057 /* xvmuh.h */, LoongArch::XVMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4161 { 17065 /* xvmuh.hu */, LoongArch::XVMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4162 { 17074 /* xvmuh.w */, LoongArch::XVMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4163 { 17082 /* xvmuh.wu */, LoongArch::XVMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4164 { 17091 /* xvmul.b */, LoongArch::XVMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4165 { 17099 /* xvmul.d */, LoongArch::XVMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4166 { 17107 /* xvmul.h */, LoongArch::XVMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4167 { 17115 /* xvmul.w */, LoongArch::XVMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4168 { 17123 /* xvmulwev.d.w */, LoongArch::XVMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4169 { 17136 /* xvmulwev.d.wu */, LoongArch::XVMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4170 { 17150 /* xvmulwev.d.wu.w */, LoongArch::XVMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4171 { 17166 /* xvmulwev.h.b */, LoongArch::XVMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4172 { 17179 /* xvmulwev.h.bu */, LoongArch::XVMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4173 { 17193 /* xvmulwev.h.bu.b */, LoongArch::XVMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4174 { 17209 /* xvmulwev.q.d */, LoongArch::XVMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4175 { 17222 /* xvmulwev.q.du */, LoongArch::XVMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4176 { 17236 /* xvmulwev.q.du.d */, LoongArch::XVMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4177 { 17252 /* xvmulwev.w.h */, LoongArch::XVMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4178 { 17265 /* xvmulwev.w.hu */, LoongArch::XVMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4179 { 17279 /* xvmulwev.w.hu.h */, LoongArch::XVMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4180 { 17295 /* xvmulwod.d.w */, LoongArch::XVMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4181 { 17308 /* xvmulwod.d.wu */, LoongArch::XVMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4182 { 17322 /* xvmulwod.d.wu.w */, LoongArch::XVMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4183 { 17338 /* xvmulwod.h.b */, LoongArch::XVMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4184 { 17351 /* xvmulwod.h.bu */, LoongArch::XVMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4185 { 17365 /* xvmulwod.h.bu.b */, LoongArch::XVMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4186 { 17381 /* xvmulwod.q.d */, LoongArch::XVMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4187 { 17394 /* xvmulwod.q.du */, LoongArch::XVMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4188 { 17408 /* xvmulwod.q.du.d */, LoongArch::XVMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4189 { 17424 /* xvmulwod.w.h */, LoongArch::XVMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4190 { 17437 /* xvmulwod.w.hu */, LoongArch::XVMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4191 { 17451 /* xvmulwod.w.hu.h */, LoongArch::XVMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4192 { 17467 /* xvneg.b */, LoongArch::XVNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4193 { 17475 /* xvneg.d */, LoongArch::XVNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4194 { 17483 /* xvneg.h */, LoongArch::XVNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4195 { 17491 /* xvneg.w */, LoongArch::XVNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4196 { 17499 /* xvnor.v */, LoongArch::XVNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4197 { 17507 /* xvnori.b */, LoongArch::XVNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4198 { 17516 /* xvor.v */, LoongArch::XVOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4199 { 17523 /* xvori.b */, LoongArch::XVORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4200 { 17531 /* xvorn.v */, LoongArch::XVORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4201 { 17539 /* xvpackev.b */, LoongArch::XVPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4202 { 17550 /* xvpackev.d */, LoongArch::XVPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4203 { 17561 /* xvpackev.h */, LoongArch::XVPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4204 { 17572 /* xvpackev.w */, LoongArch::XVPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4205 { 17583 /* xvpackod.b */, LoongArch::XVPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4206 { 17594 /* xvpackod.d */, LoongArch::XVPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4207 { 17605 /* xvpackod.h */, LoongArch::XVPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4208 { 17616 /* xvpackod.w */, LoongArch::XVPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4209 { 17627 /* xvpcnt.b */, LoongArch::XVPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4210 { 17636 /* xvpcnt.d */, LoongArch::XVPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4211 { 17645 /* xvpcnt.h */, LoongArch::XVPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4212 { 17654 /* xvpcnt.w */, LoongArch::XVPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4213 { 17663 /* xvperm.w */, LoongArch::XVPERM_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4214 { 17672 /* xvpermi.d */, LoongArch::XVPERMI_D, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4215 { 17682 /* xvpermi.q */, LoongArch::XVPERMI_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4216 { 17692 /* xvpermi.w */, LoongArch::XVPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4217 { 17702 /* xvpickev.b */, LoongArch::XVPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4218 { 17713 /* xvpickev.d */, LoongArch::XVPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4219 { 17724 /* xvpickev.h */, LoongArch::XVPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4220 { 17735 /* xvpickev.w */, LoongArch::XVPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4221 { 17746 /* xvpickod.b */, LoongArch::XVPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4222 { 17757 /* xvpickod.d */, LoongArch::XVPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4223 { 17768 /* xvpickod.h */, LoongArch::XVPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4224 { 17779 /* xvpickod.w */, LoongArch::XVPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4225 { 17790 /* xvpickve.d */, LoongArch::XVPICKVE_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4226 { 17801 /* xvpickve.w */, LoongArch::XVPICKVE_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4227 { 17812 /* xvpickve2gr.d */, LoongArch::XVPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, },
4228 { 17826 /* xvpickve2gr.du */, LoongArch::XVPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, },
4229 { 17841 /* xvpickve2gr.w */, LoongArch::XVPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, },
4230 { 17855 /* xvpickve2gr.wu */, LoongArch::XVPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, },
4231 { 17870 /* xvrepl128vei.b */, LoongArch::XVREPL128VEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4232 { 17885 /* xvrepl128vei.d */, LoongArch::XVREPL128VEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm1 }, },
4233 { 17900 /* xvrepl128vei.h */, LoongArch::XVREPL128VEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4234 { 17915 /* xvrepl128vei.w */, LoongArch::XVREPL128VEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4235 { 17930 /* xvreplgr2vr.b */, LoongArch::XVREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4236 { 17944 /* xvreplgr2vr.d */, LoongArch::XVREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4237 { 17958 /* xvreplgr2vr.h */, LoongArch::XVREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4238 { 17972 /* xvreplgr2vr.w */, LoongArch::XVREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4239 { 17986 /* xvrepli.b */, LoongArch::PseudoXVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4240 { 17996 /* xvrepli.d */, LoongArch::PseudoXVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4241 { 18006 /* xvrepli.h */, LoongArch::PseudoXVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4242 { 18016 /* xvrepli.w */, LoongArch::PseudoXVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4243 { 18026 /* xvreplve.b */, LoongArch::XVREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4244 { 18037 /* xvreplve.d */, LoongArch::XVREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4245 { 18048 /* xvreplve.h */, LoongArch::XVREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4246 { 18059 /* xvreplve.w */, LoongArch::XVREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4247 { 18070 /* xvreplve0.b */, LoongArch::XVREPLVE0_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4248 { 18082 /* xvreplve0.d */, LoongArch::XVREPLVE0_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4249 { 18094 /* xvreplve0.h */, LoongArch::XVREPLVE0_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4250 { 18106 /* xvreplve0.q */, LoongArch::XVREPLVE0_Q, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4251 { 18118 /* xvreplve0.w */, LoongArch::XVREPLVE0_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4252 { 18130 /* xvrotr.b */, LoongArch::XVROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4253 { 18139 /* xvrotr.d */, LoongArch::XVROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4254 { 18148 /* xvrotr.h */, LoongArch::XVROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4255 { 18157 /* xvrotr.w */, LoongArch::XVROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4256 { 18166 /* xvrotri.b */, LoongArch::XVROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4257 { 18176 /* xvrotri.d */, LoongArch::XVROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4258 { 18186 /* xvrotri.h */, LoongArch::XVROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4259 { 18196 /* xvrotri.w */, LoongArch::XVROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4260 { 18206 /* xvsadd.b */, LoongArch::XVSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4261 { 18215 /* xvsadd.bu */, LoongArch::XVSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4262 { 18225 /* xvsadd.d */, LoongArch::XVSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4263 { 18234 /* xvsadd.du */, LoongArch::XVSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4264 { 18244 /* xvsadd.h */, LoongArch::XVSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4265 { 18253 /* xvsadd.hu */, LoongArch::XVSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4266 { 18263 /* xvsadd.w */, LoongArch::XVSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4267 { 18272 /* xvsadd.wu */, LoongArch::XVSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4268 { 18282 /* xvsat.b */, LoongArch::XVSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4269 { 18290 /* xvsat.bu */, LoongArch::XVSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4270 { 18299 /* xvsat.d */, LoongArch::XVSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4271 { 18307 /* xvsat.du */, LoongArch::XVSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4272 { 18316 /* xvsat.h */, LoongArch::XVSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4273 { 18324 /* xvsat.hu */, LoongArch::XVSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4274 { 18333 /* xvsat.w */, LoongArch::XVSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4275 { 18341 /* xvsat.wu */, LoongArch::XVSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4276 { 18350 /* xvseq.b */, LoongArch::XVSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4277 { 18358 /* xvseq.d */, LoongArch::XVSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4278 { 18366 /* xvseq.h */, LoongArch::XVSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4279 { 18374 /* xvseq.w */, LoongArch::XVSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4280 { 18382 /* xvseqi.b */, LoongArch::XVSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4281 { 18391 /* xvseqi.d */, LoongArch::XVSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4282 { 18400 /* xvseqi.h */, LoongArch::XVSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4283 { 18409 /* xvseqi.w */, LoongArch::XVSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4284 { 18418 /* xvsetallnez.b */, LoongArch::XVSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4285 { 18432 /* xvsetallnez.d */, LoongArch::XVSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4286 { 18446 /* xvsetallnez.h */, LoongArch::XVSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4287 { 18460 /* xvsetallnez.w */, LoongArch::XVSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4288 { 18474 /* xvsetanyeqz.b */, LoongArch::XVSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4289 { 18488 /* xvsetanyeqz.d */, LoongArch::XVSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4290 { 18502 /* xvsetanyeqz.h */, LoongArch::XVSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4291 { 18516 /* xvsetanyeqz.w */, LoongArch::XVSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4292 { 18530 /* xvseteqz.v */, LoongArch::XVSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4293 { 18541 /* xvsetnez.v */, LoongArch::XVSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4294 { 18552 /* xvshuf.b */, LoongArch::XVSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4295 { 18561 /* xvshuf.d */, LoongArch::XVSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4296 { 18570 /* xvshuf.h */, LoongArch::XVSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4297 { 18579 /* xvshuf.w */, LoongArch::XVSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4298 { 18588 /* xvshuf4i.b */, LoongArch::XVSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4299 { 18599 /* xvshuf4i.d */, LoongArch::XVSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4300 { 18610 /* xvshuf4i.h */, LoongArch::XVSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4301 { 18621 /* xvshuf4i.w */, LoongArch::XVSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4302 { 18632 /* xvsigncov.b */, LoongArch::XVSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4303 { 18644 /* xvsigncov.d */, LoongArch::XVSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4304 { 18656 /* xvsigncov.h */, LoongArch::XVSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4305 { 18668 /* xvsigncov.w */, LoongArch::XVSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4306 { 18680 /* xvsle.b */, LoongArch::XVSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4307 { 18688 /* xvsle.bu */, LoongArch::XVSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4308 { 18697 /* xvsle.d */, LoongArch::XVSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4309 { 18705 /* xvsle.du */, LoongArch::XVSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4310 { 18714 /* xvsle.h */, LoongArch::XVSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4311 { 18722 /* xvsle.hu */, LoongArch::XVSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4312 { 18731 /* xvsle.w */, LoongArch::XVSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4313 { 18739 /* xvsle.wu */, LoongArch::XVSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4314 { 18748 /* xvslei.b */, LoongArch::XVSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4315 { 18757 /* xvslei.bu */, LoongArch::XVSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4316 { 18767 /* xvslei.d */, LoongArch::XVSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4317 { 18776 /* xvslei.du */, LoongArch::XVSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4318 { 18786 /* xvslei.h */, LoongArch::XVSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4319 { 18795 /* xvslei.hu */, LoongArch::XVSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4320 { 18805 /* xvslei.w */, LoongArch::XVSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4321 { 18814 /* xvslei.wu */, LoongArch::XVSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4322 { 18824 /* xvsll.b */, LoongArch::XVSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4323 { 18832 /* xvsll.d */, LoongArch::XVSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4324 { 18840 /* xvsll.h */, LoongArch::XVSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4325 { 18848 /* xvsll.w */, LoongArch::XVSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4326 { 18856 /* xvslli.b */, LoongArch::XVSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4327 { 18865 /* xvslli.d */, LoongArch::XVSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4328 { 18874 /* xvslli.h */, LoongArch::XVSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4329 { 18883 /* xvslli.w */, LoongArch::XVSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4330 { 18892 /* xvsllwil.d.w */, LoongArch::XVSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4331 { 18905 /* xvsllwil.du.wu */, LoongArch::XVSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4332 { 18920 /* xvsllwil.h.b */, LoongArch::XVSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4333 { 18933 /* xvsllwil.hu.bu */, LoongArch::XVSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4334 { 18948 /* xvsllwil.w.h */, LoongArch::XVSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4335 { 18961 /* xvsllwil.wu.hu */, LoongArch::XVSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4336 { 18976 /* xvslt.b */, LoongArch::XVSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4337 { 18984 /* xvslt.bu */, LoongArch::XVSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4338 { 18993 /* xvslt.d */, LoongArch::XVSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4339 { 19001 /* xvslt.du */, LoongArch::XVSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4340 { 19010 /* xvslt.h */, LoongArch::XVSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4341 { 19018 /* xvslt.hu */, LoongArch::XVSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4342 { 19027 /* xvslt.w */, LoongArch::XVSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4343 { 19035 /* xvslt.wu */, LoongArch::XVSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4344 { 19044 /* xvslti.b */, LoongArch::XVSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4345 { 19053 /* xvslti.bu */, LoongArch::XVSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4346 { 19063 /* xvslti.d */, LoongArch::XVSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4347 { 19072 /* xvslti.du */, LoongArch::XVSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4348 { 19082 /* xvslti.h */, LoongArch::XVSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4349 { 19091 /* xvslti.hu */, LoongArch::XVSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4350 { 19101 /* xvslti.w */, LoongArch::XVSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4351 { 19110 /* xvslti.wu */, LoongArch::XVSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4352 { 19120 /* xvsra.b */, LoongArch::XVSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4353 { 19128 /* xvsra.d */, LoongArch::XVSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4354 { 19136 /* xvsra.h */, LoongArch::XVSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4355 { 19144 /* xvsra.w */, LoongArch::XVSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4356 { 19152 /* xvsrai.b */, LoongArch::XVSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4357 { 19161 /* xvsrai.d */, LoongArch::XVSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4358 { 19170 /* xvsrai.h */, LoongArch::XVSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4359 { 19179 /* xvsrai.w */, LoongArch::XVSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4360 { 19188 /* xvsran.b.h */, LoongArch::XVSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4361 { 19199 /* xvsran.h.w */, LoongArch::XVSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4362 { 19210 /* xvsran.w.d */, LoongArch::XVSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4363 { 19221 /* xvsrani.b.h */, LoongArch::XVSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4364 { 19233 /* xvsrani.d.q */, LoongArch::XVSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4365 { 19245 /* xvsrani.h.w */, LoongArch::XVSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4366 { 19257 /* xvsrani.w.d */, LoongArch::XVSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4367 { 19269 /* xvsrar.b */, LoongArch::XVSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4368 { 19278 /* xvsrar.d */, LoongArch::XVSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4369 { 19287 /* xvsrar.h */, LoongArch::XVSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4370 { 19296 /* xvsrar.w */, LoongArch::XVSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4371 { 19305 /* xvsrari.b */, LoongArch::XVSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4372 { 19315 /* xvsrari.d */, LoongArch::XVSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4373 { 19325 /* xvsrari.h */, LoongArch::XVSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4374 { 19335 /* xvsrari.w */, LoongArch::XVSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4375 { 19345 /* xvsrarn.b.h */, LoongArch::XVSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4376 { 19357 /* xvsrarn.h.w */, LoongArch::XVSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4377 { 19369 /* xvsrarn.w.d */, LoongArch::XVSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4378 { 19381 /* xvsrarni.b.h */, LoongArch::XVSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4379 { 19394 /* xvsrarni.d.q */, LoongArch::XVSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4380 { 19407 /* xvsrarni.h.w */, LoongArch::XVSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4381 { 19420 /* xvsrarni.w.d */, LoongArch::XVSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4382 { 19433 /* xvsrl.b */, LoongArch::XVSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4383 { 19441 /* xvsrl.d */, LoongArch::XVSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4384 { 19449 /* xvsrl.h */, LoongArch::XVSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4385 { 19457 /* xvsrl.w */, LoongArch::XVSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4386 { 19465 /* xvsrli.b */, LoongArch::XVSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4387 { 19474 /* xvsrli.d */, LoongArch::XVSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4388 { 19483 /* xvsrli.h */, LoongArch::XVSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4389 { 19492 /* xvsrli.w */, LoongArch::XVSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4390 { 19501 /* xvsrln.b.h */, LoongArch::XVSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4391 { 19512 /* xvsrln.h.w */, LoongArch::XVSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4392 { 19523 /* xvsrln.w.d */, LoongArch::XVSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4393 { 19534 /* xvsrlni.b.h */, LoongArch::XVSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4394 { 19546 /* xvsrlni.d.q */, LoongArch::XVSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4395 { 19558 /* xvsrlni.h.w */, LoongArch::XVSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4396 { 19570 /* xvsrlni.w.d */, LoongArch::XVSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4397 { 19582 /* xvsrlr.b */, LoongArch::XVSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4398 { 19591 /* xvsrlr.d */, LoongArch::XVSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4399 { 19600 /* xvsrlr.h */, LoongArch::XVSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4400 { 19609 /* xvsrlr.w */, LoongArch::XVSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4401 { 19618 /* xvsrlri.b */, LoongArch::XVSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4402 { 19628 /* xvsrlri.d */, LoongArch::XVSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4403 { 19638 /* xvsrlri.h */, LoongArch::XVSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4404 { 19648 /* xvsrlri.w */, LoongArch::XVSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4405 { 19658 /* xvsrlrn.b.h */, LoongArch::XVSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4406 { 19670 /* xvsrlrn.h.w */, LoongArch::XVSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4407 { 19682 /* xvsrlrn.w.d */, LoongArch::XVSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4408 { 19694 /* xvsrlrni.b.h */, LoongArch::XVSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4409 { 19707 /* xvsrlrni.d.q */, LoongArch::XVSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4410 { 19720 /* xvsrlrni.h.w */, LoongArch::XVSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4411 { 19733 /* xvsrlrni.w.d */, LoongArch::XVSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4412 { 19746 /* xvssran.b.h */, LoongArch::XVSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4413 { 19758 /* xvssran.bu.h */, LoongArch::XVSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4414 { 19771 /* xvssran.h.w */, LoongArch::XVSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4415 { 19783 /* xvssran.hu.w */, LoongArch::XVSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4416 { 19796 /* xvssran.w.d */, LoongArch::XVSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4417 { 19808 /* xvssran.wu.d */, LoongArch::XVSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4418 { 19821 /* xvssrani.b.h */, LoongArch::XVSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4419 { 19834 /* xvssrani.bu.h */, LoongArch::XVSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4420 { 19848 /* xvssrani.d.q */, LoongArch::XVSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4421 { 19861 /* xvssrani.du.q */, LoongArch::XVSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4422 { 19875 /* xvssrani.h.w */, LoongArch::XVSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4423 { 19888 /* xvssrani.hu.w */, LoongArch::XVSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4424 { 19902 /* xvssrani.w.d */, LoongArch::XVSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4425 { 19915 /* xvssrani.wu.d */, LoongArch::XVSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4426 { 19929 /* xvssrarn.b.h */, LoongArch::XVSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4427 { 19942 /* xvssrarn.bu.h */, LoongArch::XVSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4428 { 19956 /* xvssrarn.h.w */, LoongArch::XVSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4429 { 19969 /* xvssrarn.hu.w */, LoongArch::XVSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4430 { 19983 /* xvssrarn.w.d */, LoongArch::XVSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4431 { 19996 /* xvssrarn.wu.d */, LoongArch::XVSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4432 { 20010 /* xvssrarni.b.h */, LoongArch::XVSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4433 { 20024 /* xvssrarni.bu.h */, LoongArch::XVSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4434 { 20039 /* xvssrarni.d.q */, LoongArch::XVSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4435 { 20053 /* xvssrarni.du.q */, LoongArch::XVSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4436 { 20068 /* xvssrarni.h.w */, LoongArch::XVSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4437 { 20082 /* xvssrarni.hu.w */, LoongArch::XVSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4438 { 20097 /* xvssrarni.w.d */, LoongArch::XVSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4439 { 20111 /* xvssrarni.wu.d */, LoongArch::XVSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4440 { 20126 /* xvssrln.b.h */, LoongArch::XVSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4441 { 20138 /* xvssrln.bu.h */, LoongArch::XVSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4442 { 20151 /* xvssrln.h.w */, LoongArch::XVSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4443 { 20163 /* xvssrln.hu.w */, LoongArch::XVSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4444 { 20176 /* xvssrln.w.d */, LoongArch::XVSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4445 { 20188 /* xvssrln.wu.d */, LoongArch::XVSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4446 { 20201 /* xvssrlni.b.h */, LoongArch::XVSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4447 { 20214 /* xvssrlni.bu.h */, LoongArch::XVSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4448 { 20228 /* xvssrlni.d.q */, LoongArch::XVSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4449 { 20241 /* xvssrlni.du.q */, LoongArch::XVSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4450 { 20255 /* xvssrlni.h.w */, LoongArch::XVSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4451 { 20268 /* xvssrlni.hu.w */, LoongArch::XVSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4452 { 20282 /* xvssrlni.w.d */, LoongArch::XVSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4453 { 20295 /* xvssrlni.wu.d */, LoongArch::XVSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4454 { 20309 /* xvssrlrn.b.h */, LoongArch::XVSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4455 { 20322 /* xvssrlrn.bu.h */, LoongArch::XVSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4456 { 20336 /* xvssrlrn.h.w */, LoongArch::XVSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4457 { 20349 /* xvssrlrn.hu.w */, LoongArch::XVSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4458 { 20363 /* xvssrlrn.w.d */, LoongArch::XVSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4459 { 20376 /* xvssrlrn.wu.d */, LoongArch::XVSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4460 { 20390 /* xvssrlrni.b.h */, LoongArch::XVSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4461 { 20404 /* xvssrlrni.bu.h */, LoongArch::XVSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4462 { 20419 /* xvssrlrni.d.q */, LoongArch::XVSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4463 { 20433 /* xvssrlrni.du.q */, LoongArch::XVSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4464 { 20448 /* xvssrlrni.h.w */, LoongArch::XVSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4465 { 20462 /* xvssrlrni.hu.w */, LoongArch::XVSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4466 { 20477 /* xvssrlrni.w.d */, LoongArch::XVSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4467 { 20491 /* xvssrlrni.wu.d */, LoongArch::XVSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4468 { 20506 /* xvssub.b */, LoongArch::XVSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4469 { 20515 /* xvssub.bu */, LoongArch::XVSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4470 { 20525 /* xvssub.d */, LoongArch::XVSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4471 { 20534 /* xvssub.du */, LoongArch::XVSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4472 { 20544 /* xvssub.h */, LoongArch::XVSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4473 { 20553 /* xvssub.hu */, LoongArch::XVSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4474 { 20563 /* xvssub.w */, LoongArch::XVSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4475 { 20572 /* xvssub.wu */, LoongArch::XVSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4476 { 20582 /* xvst */, LoongArch::XVST, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12addlike }, },
4477 { 20587 /* xvstelm.b */, LoongArch::XVSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8, MCK_UImm5 }, },
4478 { 20597 /* xvstelm.d */, LoongArch::XVSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl3, MCK_UImm2 }, },
4479 { 20607 /* xvstelm.h */, LoongArch::XVSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl1, MCK_UImm4 }, },
4480 { 20617 /* xvstelm.w */, LoongArch::XVSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl2, MCK_UImm3 }, },
4481 { 20627 /* xvstx */, LoongArch::XVSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, },
4482 { 20633 /* xvsub.b */, LoongArch::XVSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4483 { 20641 /* xvsub.d */, LoongArch::XVSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4484 { 20649 /* xvsub.h */, LoongArch::XVSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4485 { 20657 /* xvsub.q */, LoongArch::XVSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4486 { 20665 /* xvsub.w */, LoongArch::XVSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4487 { 20673 /* xvsubi.bu */, LoongArch::XVSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4488 { 20683 /* xvsubi.du */, LoongArch::XVSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4489 { 20693 /* xvsubi.hu */, LoongArch::XVSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4490 { 20703 /* xvsubi.wu */, LoongArch::XVSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4491 { 20713 /* xvsubwev.d.w */, LoongArch::XVSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4492 { 20726 /* xvsubwev.d.wu */, LoongArch::XVSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4493 { 20740 /* xvsubwev.h.b */, LoongArch::XVSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4494 { 20753 /* xvsubwev.h.bu */, LoongArch::XVSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4495 { 20767 /* xvsubwev.q.d */, LoongArch::XVSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4496 { 20780 /* xvsubwev.q.du */, LoongArch::XVSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4497 { 20794 /* xvsubwev.w.h */, LoongArch::XVSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4498 { 20807 /* xvsubwev.w.hu */, LoongArch::XVSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4499 { 20821 /* xvsubwod.d.w */, LoongArch::XVSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4500 { 20834 /* xvsubwod.d.wu */, LoongArch::XVSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4501 { 20848 /* xvsubwod.h.b */, LoongArch::XVSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4502 { 20861 /* xvsubwod.h.bu */, LoongArch::XVSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4503 { 20875 /* xvsubwod.q.d */, LoongArch::XVSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4504 { 20888 /* xvsubwod.q.du */, LoongArch::XVSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4505 { 20902 /* xvsubwod.w.h */, LoongArch::XVSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4506 { 20915 /* xvsubwod.w.hu */, LoongArch::XVSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4507 { 20929 /* xvxor.v */, LoongArch::XVXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4508 { 20937 /* xvxori.b */, LoongArch::XVXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4509};
4510
4511#include "llvm/Support/Debug.h"
4512#include "llvm/Support/Format.h"
4513
4514unsigned LoongArchAsmParser::
4515MatchInstructionImpl(const OperandVector &Operands,
4516 MCInst &Inst,
4517 uint64_t &ErrorInfo,
4518 FeatureBitset &MissingFeatures,
4519 bool matchingInlineAsm, unsigned VariantID) {
4520 // Eliminate obvious mismatches.
4521 if (Operands.size() > 5) {
4522 ErrorInfo = 5;
4523 return Match_InvalidOperand;
4524 }
4525
4526 // Get the current feature set.
4527 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
4528
4529 // Get the instruction mnemonic, which is the first token.
4530 StringRef Mnemonic = ((LoongArchOperand &)*Operands[0]).getToken();
4531
4532 // Some state to try to produce better error messages.
4533 bool HadMatchOtherThanFeatures = false;
4534 bool HadMatchOtherThanPredicate = false;
4535 unsigned RetCode = Match_InvalidOperand;
4536 MissingFeatures.set();
4537 // Set ErrorInfo to the operand that mismatches if it is
4538 // wrong for all instances of the instruction.
4539 ErrorInfo = ~0ULL;
4540 // Find the appropriate table for this asm variant.
4541 const MatchEntry *Start, *End;
4542 switch (VariantID) {
4543 default: llvm_unreachable("invalid variant!");
4544 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4545 }
4546 // Search the table.
4547 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4548
4549 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
4550 std::distance(MnemonicRange.first, MnemonicRange.second) <<
4551 " encodings with mnemonic '" << Mnemonic << "'\n");
4552
4553 // Return a more specific error code if no mnemonics match.
4554 if (MnemonicRange.first == MnemonicRange.second)
4555 return Match_MnemonicFail;
4556
4557 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4558 it != ie; ++it) {
4559 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
4560 bool HasRequiredFeatures =
4561 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
4562 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
4563 << MII.getName(it->Opcode) << "\n");
4564 // equal_range guarantees that instruction mnemonic matches.
4565 assert(Mnemonic == it->getMnemonic());
4566 bool OperandsValid = true;
4567 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 4; ++FormalIdx) {
4568 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
4569 DEBUG_WITH_TYPE("asm-matcher",
4570 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
4571 << " against actual operand at index " << ActualIdx);
4572 if (ActualIdx < Operands.size())
4573 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
4574 Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): ");
4575 else
4576 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
4577 if (ActualIdx >= Operands.size()) {
4578 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n");
4579 if (Formal == InvalidMatchClass) {
4580 break;
4581 }
4582 if (isSubclass(Formal, OptionalMatchClass)) {
4583 continue;
4584 }
4585 OperandsValid = false;
4586 ErrorInfo = ActualIdx;
4587 break;
4588 }
4589 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
4590 unsigned Diag = validateOperandClass(Actual, Formal);
4591 if (Diag == Match_Success) {
4592 DEBUG_WITH_TYPE("asm-matcher",
4593 dbgs() << "match success using generic matcher\n");
4594 ++ActualIdx;
4595 continue;
4596 }
4597 // If the generic handler indicates an invalid operand
4598 // failure, check for a special case.
4599 if (Diag != Match_Success) {
4600 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
4601 if (TargetDiag == Match_Success) {
4602 DEBUG_WITH_TYPE("asm-matcher",
4603 dbgs() << "match success using target matcher\n");
4604 ++ActualIdx;
4605 continue;
4606 }
4607 // If the target matcher returned a specific error code use
4608 // that, else use the one from the generic matcher.
4609 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
4610 Diag = TargetDiag;
4611 }
4612 // If current formal operand wasn't matched and it is optional
4613 // then try to match next formal operand
4614 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
4615 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
4616 continue;
4617 }
4618 // If this operand is broken for all of the instances of this
4619 // mnemonic, keep track of it so we can report loc info.
4620 // If we already had a match that only failed due to a
4621 // target predicate, that diagnostic is preferred.
4622 if (!HadMatchOtherThanPredicate &&
4623 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
4624 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
4625 RetCode = Diag;
4626 ErrorInfo = ActualIdx;
4627 }
4628 // Otherwise, just reject this instance of the mnemonic.
4629 OperandsValid = false;
4630 break;
4631 }
4632
4633 if (!OperandsValid) {
4634 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
4635 "operand mismatches, ignoring "
4636 "this opcode\n");
4637 continue;
4638 }
4639 if (!HasRequiredFeatures) {
4640 HadMatchOtherThanFeatures = true;
4641 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
4642 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
4643 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
4644 if (NewMissingFeatures[I])
4645 dbgs() << ' ' << I;
4646 dbgs() << "\n");
4647 if (NewMissingFeatures.count() <=
4648 MissingFeatures.count())
4649 MissingFeatures = NewMissingFeatures;
4650 continue;
4651 }
4652
4653 Inst.clear();
4654
4655 Inst.setOpcode(it->Opcode);
4656 // We have a potential match but have not rendered the operands.
4657 // Check the target predicate to handle any context sensitive
4658 // constraints.
4659 // For example, Ties that are referenced multiple times must be
4660 // checked here to ensure the input is the same for each match
4661 // constraints. If we leave it any later the ties will have been
4662 // canonicalized
4663 unsigned MatchResult;
4664 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
4665 Inst.clear();
4666 DEBUG_WITH_TYPE(
4667 "asm-matcher",
4668 dbgs() << "Early target match predicate failed with diag code "
4669 << MatchResult << "\n");
4670 RetCode = MatchResult;
4671 HadMatchOtherThanPredicate = true;
4672 continue;
4673 }
4674
4675 if (matchingInlineAsm) {
4676 convertToMapAndConstraints(it->ConvertFn, Operands);
4677 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
4678 ErrorInfo))
4679 return Match_InvalidTiedOperand;
4680
4681 return Match_Success;
4682 }
4683
4684 // We have selected a definite instruction, convert the parsed
4685 // operands into the appropriate MCInst.
4686 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
4687
4688 // We have a potential match. Check the target predicate to
4689 // handle any context sensitive constraints.
4690 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
4691 DEBUG_WITH_TYPE("asm-matcher",
4692 dbgs() << "Target match predicate failed with diag code "
4693 << MatchResult << "\n");
4694 Inst.clear();
4695 RetCode = MatchResult;
4696 HadMatchOtherThanPredicate = true;
4697 continue;
4698 }
4699
4700 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
4701 ErrorInfo))
4702 return Match_InvalidTiedOperand;
4703
4704 DEBUG_WITH_TYPE(
4705 "asm-matcher",
4706 dbgs() << "Opcode result: complete match, selecting this opcode\n");
4707 return Match_Success;
4708 }
4709
4710 // Okay, we had no match. Try to return a useful error code.
4711 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
4712 return RetCode;
4713
4714 ErrorInfo = 0;
4715 return Match_MissingFeature;
4716}
4717
4718namespace {
4719 struct OperandMatchEntry {
4720 uint16_t Mnemonic;
4721 uint8_t OperandMask;
4722 uint8_t Class;
4723 uint8_t RequiredFeaturesIdx;
4724
4725 StringRef getMnemonic() const {
4726 return StringRef(MnemonicTable + Mnemonic + 1,
4727 MnemonicTable[Mnemonic]);
4728 }
4729 };
4730
4731 // Predicate for searching for an opcode.
4732 struct LessOpcodeOperand {
4733 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
4734 return LHS.getMnemonic() < RHS;
4735 }
4736 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
4737 return LHS < RHS.getMnemonic();
4738 }
4739 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
4740 return LHS.getMnemonic() < RHS.getMnemonic();
4741 }
4742 };
4743} // end anonymous namespace
4744
4745static const OperandMatchEntry OperandMatchTable[86] = {
4746 /* Operand List Mnemonic, Mask, Operand Class, Features */
4747 { 25 /* add.d */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA64 },
4748 { 31 /* add.w */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA32 },
4749 { 103 /* amadd.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4750 { 111 /* amadd.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4751 { 119 /* amadd.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4752 { 127 /* amadd.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4753 { 135 /* amadd_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4754 { 146 /* amadd_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4755 { 157 /* amadd_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4756 { 168 /* amadd_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4757 { 179 /* amand.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4758 { 187 /* amand.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4759 { 195 /* amand_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4760 { 206 /* amand_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4761 { 217 /* amcas.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4762 { 225 /* amcas.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4763 { 233 /* amcas.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4764 { 241 /* amcas.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4765 { 249 /* amcas_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4766 { 260 /* amcas_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4767 { 271 /* amcas_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4768 { 282 /* amcas_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4769 { 293 /* ammax.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4770 { 301 /* ammax.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4771 { 310 /* ammax.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4772 { 318 /* ammax.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4773 { 327 /* ammax_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4774 { 338 /* ammax_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4775 { 350 /* ammax_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4776 { 361 /* ammax_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4777 { 373 /* ammin.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4778 { 381 /* ammin.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4779 { 390 /* ammin.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4780 { 398 /* ammin.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4781 { 407 /* ammin_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4782 { 418 /* ammin_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4783 { 430 /* ammin_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4784 { 441 /* ammin_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4785 { 453 /* amor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4786 { 460 /* amor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4787 { 467 /* amor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4788 { 477 /* amor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4789 { 487 /* amswap.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4790 { 496 /* amswap.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4791 { 505 /* amswap.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4792 { 514 /* amswap.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4793 { 523 /* amswap_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4794 { 535 /* amswap_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4795 { 547 /* amswap_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4796 { 559 /* amswap_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4797 { 571 /* amxor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4798 { 579 /* amxor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4799 { 587 /* amxor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4800 { 598 /* amxor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4801 { 845 /* b */, 1 /* 0 */, MCK_SImm26OperandB, AMFBS_None },
4802 { 934 /* bl */, 1 /* 0 */, MCK_SImm26OperandBL, AMFBS_None },
4803 { 1050 /* call36 */, 1 /* 0 */, MCK_BareSymbol, AMFBS_IsLA64 },
4804 { 2787 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4805 { 2787 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4806 { 2787 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4807 { 2790 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4808 { 2790 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4809 { 2797 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4810 { 2797 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4811 { 2797 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4812 { 2797 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4813 { 2797 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4814 { 2797 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None },
4815 { 2807 /* la.got */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4816 { 2807 /* la.got */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4817 { 2814 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs },
4818 { 2814 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4819 { 2814 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs },
4820 { 2814 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None },
4821 { 2823 /* la.pcrel */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4822 { 2823 /* la.pcrel */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4823 { 2832 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4824 { 2832 /* la.tls.desc */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4825 { 2844 /* la.tls.gd */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4826 { 2844 /* la.tls.gd */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4827 { 2854 /* la.tls.ie */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4828 { 2854 /* la.tls.ie */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4829 { 2864 /* la.tls.ld */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4830 { 2864 /* la.tls.ld */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4831 { 2874 /* la.tls.le */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4832 { 4033 /* tail36 */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA64 },
4833};
4834
4835ParseStatus LoongArchAsmParser::
4836tryCustomParseOperand(OperandVector &Operands,
4837 unsigned MCK) {
4838
4839 switch(MCK) {
4840 case MCK_AtomicMemAsmOperand:
4841 return parseAtomicMemOp(Operands);
4842 case MCK_BareSymbol:
4843 return parseImmediate(Operands);
4844 case MCK_SImm26OperandB:
4845 return parseImmediate(Operands);
4846 case MCK_SImm26OperandBL:
4847 return parseSImm26Operand(Operands);
4848 case MCK_TPRelAddSymbol:
4849 return parseOperandWithModifier(Operands);
4850 default:
4851 return ParseStatus::NoMatch;
4852 }
4853 return ParseStatus::NoMatch;
4854}
4855
4856ParseStatus LoongArchAsmParser::
4857MatchOperandParserImpl(OperandVector &Operands,
4858 StringRef Mnemonic,
4859 bool ParseForAllFeatures) {
4860 // Get the current feature set.
4861 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
4862
4863 // Get the next operand index.
4864 unsigned NextOpNum = Operands.size() - 1;
4865 // Search the table.
4866 auto MnemonicRange =
4867 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
4868 Mnemonic, LessOpcodeOperand());
4869
4870 if (MnemonicRange.first == MnemonicRange.second)
4871 return ParseStatus::NoMatch;
4872
4873 for (const OperandMatchEntry *it = MnemonicRange.first,
4874 *ie = MnemonicRange.second; it != ie; ++it) {
4875 // equal_range guarantees that instruction mnemonic matches.
4876 assert(Mnemonic == it->getMnemonic());
4877
4878 // check if the available features match
4879 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
4880 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures)
4881 continue;
4882
4883 // check if the operand in question has a custom parser.
4884 if (!(it->OperandMask & (1 << NextOpNum)))
4885 continue;
4886
4887 // call custom parse method to handle the operand
4888 ParseStatus Result = tryCustomParseOperand(Operands, it->Class);
4889 if (!Result.isNoMatch())
4890 return Result;
4891 }
4892
4893 // Okay, we had no match.
4894 return ParseStatus::NoMatch;
4895}
4896
4897#endif // GET_MATCHER_IMPLEMENTATION
4898
4899
4900#ifdef GET_MNEMONIC_SPELL_CHECKER
4901#undef GET_MNEMONIC_SPELL_CHECKER
4902
4903static std::string LoongArchMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
4904 const unsigned MaxEditDist = 2;
4905 std::vector<StringRef> Candidates;
4906 StringRef Prev = "";
4907
4908 // Find the appropriate table for this asm variant.
4909 const MatchEntry *Start, *End;
4910 switch (VariantID) {
4911 default: llvm_unreachable("invalid variant!");
4912 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4913 }
4914
4915 for (auto I = Start; I < End; I++) {
4916 // Ignore unsupported instructions.
4917 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
4918 if ((FBS & RequiredFeatures) != RequiredFeatures)
4919 continue;
4920
4921 StringRef T = I->getMnemonic();
4922 // Avoid recomputing the edit distance for the same string.
4923 if (T == Prev)
4924 continue;
4925
4926 Prev = T;
4927 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
4928 if (Dist <= MaxEditDist)
4929 Candidates.push_back(T);
4930 }
4931
4932 if (Candidates.empty())
4933 return "";
4934
4935 std::string Res = ", did you mean: ";
4936 unsigned i = 0;
4937 for (; i < Candidates.size() - 1; i++)
4938 Res += Candidates[i].str() + ", ";
4939 return Res + Candidates[i].str() + "?";
4940}
4941
4942#endif // GET_MNEMONIC_SPELL_CHECKER
4943
4944
4945#ifdef GET_MNEMONIC_CHECKER
4946#undef GET_MNEMONIC_CHECKER
4947
4948static bool LoongArchCheckMnemonic(StringRef Mnemonic,
4949 const FeatureBitset &AvailableFeatures,
4950 unsigned VariantID) {
4951 // Find the appropriate table for this asm variant.
4952 const MatchEntry *Start, *End;
4953 switch (VariantID) {
4954 default: llvm_unreachable("invalid variant!");
4955 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4956 }
4957
4958 // Search the table.
4959 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4960
4961 if (MnemonicRange.first == MnemonicRange.second)
4962 return false;
4963
4964 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4965 it != ie; ++it) {
4966 const FeatureBitset &RequiredFeatures =
4967 FeatureBitsets[it->RequiredFeaturesIdx];
4968 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
4969 return true;
4970 }
4971 return false;
4972}
4973
4974#endif // GET_MNEMONIC_CHECKER
4975
4976