1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Global Instruction Selector for the SPIRV target *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | #ifdef GET_GLOBALISEL_PREDICATE_BITSET |
10 | const unsigned MAX_SUBTARGET_PREDICATES = 0; |
11 | using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>; |
12 | #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET |
13 | |
14 | #ifdef GET_GLOBALISEL_TEMPORARIES_DECL |
15 | mutable MatcherState State; |
16 | typedef ComplexRendererFns(SPIRVInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; |
17 | typedef void(SPIRVInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const; |
18 | const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo; |
19 | static SPIRVInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; |
20 | static SPIRVInstructionSelector::CustomRendererFn CustomRenderers[]; |
21 | bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; |
22 | bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; |
23 | bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; |
24 | const uint8_t *getMatchTable() const override; |
25 | bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override; |
26 | bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override; |
27 | bool testSimplePredicate(unsigned PredicateID) const override; |
28 | bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override; |
29 | #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL |
30 | |
31 | #ifdef GET_GLOBALISEL_TEMPORARIES_INIT |
32 | , State(0), |
33 | ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) |
34 | #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT |
35 | |
36 | #ifdef GET_GLOBALISEL_IMPL |
37 | // LLT Objects. |
38 | enum { |
39 | GILLT_p0s64, |
40 | GILLT_s64, |
41 | GILLT_v2s64, |
42 | }; |
43 | const static size_t NumTypeObjects = 3; |
44 | const static LLT TypeObjects[] = { |
45 | LLT::pointer(0, 64), |
46 | LLT::scalar(64), |
47 | LLT::vector(ElementCount::getFixed(2), 64), |
48 | }; |
49 | |
50 | // Bits for subtarget features that participate in instruction matching. |
51 | enum SubtargetFeatureBits : uint8_t { |
52 | }; |
53 | |
54 | PredicateBitset SPIRVInstructionSelector:: |
55 | computeAvailableModuleFeatures(const SPIRVSubtarget *Subtarget) const { |
56 | PredicateBitset Features{}; |
57 | return Features; |
58 | } |
59 | |
60 | void SPIRVInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) { |
61 | AvailableFunctionFeatures = computeAvailableFunctionFeatures((const SPIRVSubtarget *)&MF.getSubtarget(), &MF); |
62 | } |
63 | PredicateBitset SPIRVInstructionSelector:: |
64 | computeAvailableFunctionFeatures(const SPIRVSubtarget *Subtarget, const MachineFunction *MF) const { |
65 | PredicateBitset Features{}; |
66 | return Features; |
67 | } |
68 | |
69 | // Feature bitsets. |
70 | enum { |
71 | GIFBS_Invalid, |
72 | }; |
73 | constexpr static PredicateBitset FeatureBitsets[] { |
74 | {}, // GIFBS_Invalid |
75 | }; |
76 | |
77 | // ComplexPattern predicates. |
78 | enum { |
79 | GICP_Invalid, |
80 | }; |
81 | // See constructor for table contents |
82 | |
83 | SPIRVInstructionSelector::ComplexMatcherMemFn |
84 | SPIRVInstructionSelector::ComplexPredicateFns[] = { |
85 | nullptr, // GICP_Invalid |
86 | }; |
87 | |
88 | // PatFrag predicates. |
89 | bool SPIRVInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const { |
90 | const MachineFunction &MF = *MI.getParent()->getParent(); |
91 | const MachineRegisterInfo &MRI = MF.getRegInfo(); |
92 | const auto &Operands = State.RecordedOperands; |
93 | (void)Operands; |
94 | (void)MRI; |
95 | llvm_unreachable("Unknown predicate" ); |
96 | return false; |
97 | } |
98 | // PatFrag predicates. |
99 | bool SPIRVInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const { |
100 | const auto &Operands = State.RecordedOperands; |
101 | Register Reg = MO.getReg(); |
102 | (void)Operands; |
103 | (void)Reg; |
104 | llvm_unreachable("Unknown predicate" ); |
105 | return false; |
106 | } |
107 | // PatFrag predicates. |
108 | bool SPIRVInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { |
109 | llvm_unreachable("Unknown predicate" ); |
110 | return false; |
111 | } |
112 | // PatFrag predicates. |
113 | bool SPIRVInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { |
114 | llvm_unreachable("Unknown predicate" ); |
115 | return false; |
116 | } |
117 | // PatFrag predicates. |
118 | enum { |
119 | GICXXPred_APInt_Predicate_ConstPseudoFalse = GICXXPred_Invalid + 1, |
120 | GICXXPred_APInt_Predicate_ConstPseudoTrue, |
121 | }; |
122 | bool SPIRVInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { |
123 | switch (PredicateID) { |
124 | case GICXXPred_APInt_Predicate_ConstPseudoFalse: { |
125 | return Imm.getBitWidth() == 1 && Imm.getZExtValue() == 0; |
126 | } |
127 | case GICXXPred_APInt_Predicate_ConstPseudoTrue: { |
128 | return Imm.getBitWidth() == 1 && Imm.getZExtValue() == 1; |
129 | } |
130 | } |
131 | llvm_unreachable("Unknown predicate" ); |
132 | return false; |
133 | } |
134 | bool SPIRVInstructionSelector::testSimplePredicate(unsigned) const { |
135 | llvm_unreachable("SPIRVInstructionSelector does not support simple predicates!" ); |
136 | return false; |
137 | } |
138 | // Custom renderers. |
139 | enum { |
140 | GICR_Invalid, |
141 | }; |
142 | SPIRVInstructionSelector::CustomRendererFn |
143 | SPIRVInstructionSelector::CustomRenderers[] = { |
144 | nullptr, // GICR_Invalid |
145 | }; |
146 | |
147 | bool SPIRVInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { |
148 | const PredicateBitset AvailableFeatures = getAvailableFeatures(); |
149 | MachineIRBuilder B(I); |
150 | State.MIs.clear(); |
151 | State.MIs.push_back(&I); |
152 | |
153 | if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) { |
154 | return true; |
155 | } |
156 | |
157 | return false; |
158 | } |
159 | |
160 | bool SPIRVInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const { |
161 | llvm_unreachable("SPIRVInstructionSelector does not support custom C++ actions!" ); |
162 | } |
163 | #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ |
164 | #define GIMT_Encode2(Val) uint8_t(Val), uint8_t((uint16_t)Val >> 8) |
165 | #define GIMT_Encode4(Val) uint8_t(Val), uint8_t((uint32_t)Val >> 8), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 24) |
166 | #define GIMT_Encode8(Val) uint8_t(Val), uint8_t((uint64_t)Val >> 8), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 24), uint8_t((uint64_t)Val >> 32), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 56) |
167 | #else |
168 | #define GIMT_Encode2(Val) uint8_t((uint16_t)Val >> 8), uint8_t(Val) |
169 | #define GIMT_Encode4(Val) uint8_t((uint32_t)Val >> 24), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 8), uint8_t(Val) |
170 | #define GIMT_Encode8(Val) uint8_t((uint64_t)Val >> 56), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 32), uint8_t((uint64_t)Val >> 24), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 8), uint8_t(Val) |
171 | #endif |
172 | const uint8_t *SPIRVInstructionSelector::getMatchTable() const { |
173 | constexpr static uint8_t MatchTable0[] = { |
174 | /* 0 */ GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(3746), |
175 | /* 5 */ GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(SPIRV::ASSIGN_TYPE), |
176 | /* 9 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(3), /*)*//*default:*//*Label 4*/ GIMT_Encode4(3745), |
177 | /* 20 */ /*GILLT_p0s64*//*Label 1*/ GIMT_Encode4(32), |
178 | /* 24 */ /*GILLT_s64*//*Label 2*/ GIMT_Encode4(179), |
179 | /* 28 */ /*GILLT_v2s64*//*Label 3*/ GIMT_Encode4(2069), |
180 | /* 32 */ // Label 1: @32 |
181 | /* 32 */ GIM_Try, /*On fail goto*//*Label 5*/ GIMT_Encode4(178), |
182 | /* 37 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_p0s64, |
183 | /* 40 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, |
184 | /* 43 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::pIDRegClassID), |
185 | /* 47 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
186 | /* 51 */ GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(114), // Rule ID 54 // |
187 | /* 56 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
188 | /* 60 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
189 | /* 64 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
190 | /* 68 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_p0s64, |
191 | /* 72 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_p0s64, |
192 | /* 76 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
193 | /* 81 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::pIDRegClassID), |
194 | /* 86 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::pIDRegClassID), |
195 | /* 91 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
196 | /* 93 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } iID:{ *:[i64] }:$cond, pID:{ *:[i64] }:$src1, pID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSPSCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, pID:{ *:[i64] }:$src1, pID:{ *:[i64] }:$src2) |
197 | /* 93 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSPSCond), |
198 | /* 96 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
199 | /* 98 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
200 | /* 100 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
201 | /* 104 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
202 | /* 108 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
203 | /* 112 */ GIR_RootConstrainSelectedInstOperands, |
204 | /* 113 */ // GIR_Coverage, 54, |
205 | /* 113 */ GIR_EraseRootFromParent_Done, |
206 | /* 114 */ // Label 6: @114 |
207 | /* 114 */ GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(177), // Rule ID 55 // |
208 | /* 119 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
209 | /* 123 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
210 | /* 127 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
211 | /* 131 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_p0s64, |
212 | /* 135 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_p0s64, |
213 | /* 139 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
214 | /* 144 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::pIDRegClassID), |
215 | /* 149 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::pIDRegClassID), |
216 | /* 154 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
217 | /* 156 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } vID:{ *:[v2i64] }:$cond, pID:{ *:[i64] }:$src1, pID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSPVCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, pID:{ *:[i64] }:$src1, pID:{ *:[i64] }:$src2) |
218 | /* 156 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSPVCond), |
219 | /* 159 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
220 | /* 161 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
221 | /* 163 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
222 | /* 167 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
223 | /* 171 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
224 | /* 175 */ GIR_RootConstrainSelectedInstOperands, |
225 | /* 176 */ // GIR_Coverage, 55, |
226 | /* 176 */ GIR_EraseRootFromParent_Done, |
227 | /* 177 */ // Label 7: @177 |
228 | /* 177 */ GIM_Reject, |
229 | /* 178 */ // Label 5: @178 |
230 | /* 178 */ GIM_Reject, |
231 | /* 179 */ // Label 2: @179 |
232 | /* 179 */ GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(2068), |
233 | /* 184 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64, |
234 | /* 187 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, |
235 | /* 190 */ GIM_Try, /*On fail goto*//*Label 9*/ GIMT_Encode4(226), // Rule ID 0 // |
236 | /* 195 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
237 | /* 199 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
238 | /* 203 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), |
239 | /* 207 */ GIM_CheckAPIntImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_APInt_Predicate_ConstPseudoTrue), |
240 | /* 211 */ // MIs[1] Operand 1 |
241 | /* 211 */ // No operand predicates |
242 | /* 211 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
243 | /* 215 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
244 | /* 217 */ // (assigntype:{ *:[i64] } (imm:{ *:[i64] })<<P:Predicate_ConstPseudoTrue>>, TYPE:{ *:[i64] }:$src_ty) => (OpConstantTrue:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty) |
245 | /* 217 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpConstantTrue), |
246 | /* 220 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
247 | /* 222 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
248 | /* 224 */ GIR_RootConstrainSelectedInstOperands, |
249 | /* 225 */ // GIR_Coverage, 0, |
250 | /* 225 */ GIR_EraseRootFromParent_Done, |
251 | /* 226 */ // Label 9: @226 |
252 | /* 226 */ GIM_Try, /*On fail goto*//*Label 10*/ GIMT_Encode4(262), // Rule ID 1 // |
253 | /* 231 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
254 | /* 235 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
255 | /* 239 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT), |
256 | /* 243 */ GIM_CheckAPIntImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_APInt_Predicate_ConstPseudoFalse), |
257 | /* 247 */ // MIs[1] Operand 1 |
258 | /* 247 */ // No operand predicates |
259 | /* 247 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
260 | /* 251 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
261 | /* 253 */ // (assigntype:{ *:[i64] } (imm:{ *:[i64] })<<P:Predicate_ConstPseudoFalse>>, TYPE:{ *:[i64] }:$src_ty) => (OpConstantFalse:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty) |
262 | /* 253 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpConstantFalse), |
263 | /* 256 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
264 | /* 258 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
265 | /* 260 */ GIR_RootConstrainSelectedInstOperands, |
266 | /* 261 */ // GIR_Coverage, 1, |
267 | /* 261 */ GIR_EraseRootFromParent_Done, |
268 | /* 262 */ // Label 10: @262 |
269 | /* 262 */ GIM_Try, /*On fail goto*//*Label 11*/ GIMT_Encode4(333), // Rule ID 56 // |
270 | /* 267 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
271 | /* 271 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
272 | /* 275 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
273 | /* 279 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
274 | /* 283 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
275 | /* 287 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
276 | /* 291 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
277 | /* 296 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
278 | /* 301 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
279 | /* 306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
280 | /* 310 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
281 | /* 312 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } iID:{ *:[i64] }:$cond, iID:{ *:[i64] }:$src1, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSISCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, iID:{ *:[i64] }:$src1, iID:{ *:[i64] }:$src2) |
282 | /* 312 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSISCond), |
283 | /* 315 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
284 | /* 317 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
285 | /* 319 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
286 | /* 323 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
287 | /* 327 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
288 | /* 331 */ GIR_RootConstrainSelectedInstOperands, |
289 | /* 332 */ // GIR_Coverage, 56, |
290 | /* 332 */ GIR_EraseRootFromParent_Done, |
291 | /* 333 */ // Label 11: @333 |
292 | /* 333 */ GIM_Try, /*On fail goto*//*Label 12*/ GIMT_Encode4(404), // Rule ID 57 // |
293 | /* 338 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
294 | /* 342 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
295 | /* 346 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
296 | /* 350 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
297 | /* 354 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
298 | /* 358 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
299 | /* 362 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
300 | /* 367 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
301 | /* 372 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
302 | /* 377 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
303 | /* 381 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
304 | /* 383 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } vID:{ *:[v2i64] }:$cond, iID:{ *:[i64] }:$src1, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSIVCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, iID:{ *:[i64] }:$src1, iID:{ *:[i64] }:$src2) |
305 | /* 383 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSIVCond), |
306 | /* 386 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
307 | /* 388 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
308 | /* 390 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
309 | /* 394 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
310 | /* 398 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
311 | /* 402 */ GIR_RootConstrainSelectedInstOperands, |
312 | /* 403 */ // GIR_Coverage, 57, |
313 | /* 403 */ GIR_EraseRootFromParent_Done, |
314 | /* 404 */ // Label 12: @404 |
315 | /* 404 */ GIM_Try, /*On fail goto*//*Label 13*/ GIMT_Encode4(475), // Rule ID 58 // |
316 | /* 409 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
317 | /* 413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
318 | /* 417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
319 | /* 421 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
320 | /* 425 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
321 | /* 429 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
322 | /* 433 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
323 | /* 438 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
324 | /* 443 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
325 | /* 448 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
326 | /* 452 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
327 | /* 454 */ // (assigntype:{ *:[f64] } (select:{ *:[f64] } iID:{ *:[i64] }:$cond, fID:{ *:[f64] }:$src1, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSFSCond:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, fID:{ *:[f64] }:$src1, fID:{ *:[f64] }:$src2) |
328 | /* 454 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSFSCond), |
329 | /* 457 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
330 | /* 459 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
331 | /* 461 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
332 | /* 465 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
333 | /* 469 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
334 | /* 473 */ GIR_RootConstrainSelectedInstOperands, |
335 | /* 474 */ // GIR_Coverage, 58, |
336 | /* 474 */ GIR_EraseRootFromParent_Done, |
337 | /* 475 */ // Label 13: @475 |
338 | /* 475 */ GIM_Try, /*On fail goto*//*Label 14*/ GIMT_Encode4(546), // Rule ID 59 // |
339 | /* 480 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
340 | /* 484 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
341 | /* 488 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
342 | /* 492 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
343 | /* 496 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
344 | /* 500 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
345 | /* 504 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
346 | /* 509 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
347 | /* 514 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
348 | /* 519 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
349 | /* 523 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
350 | /* 525 */ // (assigntype:{ *:[f64] } (select:{ *:[f64] } vID:{ *:[v2i64] }:$cond, fID:{ *:[f64] }:$src1, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectSFVCond:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, fID:{ *:[f64] }:$src1, fID:{ *:[f64] }:$src2) |
351 | /* 525 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectSFVCond), |
352 | /* 528 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
353 | /* 530 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
354 | /* 532 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
355 | /* 536 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
356 | /* 540 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
357 | /* 544 */ GIR_RootConstrainSelectedInstOperands, |
358 | /* 545 */ // GIR_Coverage, 59, |
359 | /* 545 */ GIR_EraseRootFromParent_Done, |
360 | /* 546 */ // Label 14: @546 |
361 | /* 546 */ GIM_Try, /*On fail goto*//*Label 15*/ GIMT_Encode4(617), // Rule ID 60 // |
362 | /* 551 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
363 | /* 555 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
364 | /* 559 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
365 | /* 563 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
366 | /* 567 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
367 | /* 571 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
368 | /* 575 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
369 | /* 580 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
370 | /* 585 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
371 | /* 590 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
372 | /* 594 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
373 | /* 596 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } iID:{ *:[i64] }:$cond, vpID:{ *:[i64] }:$src1, vpID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVPSCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, vpID:{ *:[i64] }:$src1, vpID:{ *:[i64] }:$src2) |
374 | /* 596 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVPSCond), |
375 | /* 599 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
376 | /* 601 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
377 | /* 603 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
378 | /* 607 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
379 | /* 611 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
380 | /* 615 */ GIR_RootConstrainSelectedInstOperands, |
381 | /* 616 */ // GIR_Coverage, 60, |
382 | /* 616 */ GIR_EraseRootFromParent_Done, |
383 | /* 617 */ // Label 15: @617 |
384 | /* 617 */ GIM_Try, /*On fail goto*//*Label 16*/ GIMT_Encode4(688), // Rule ID 61 // |
385 | /* 622 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
386 | /* 626 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
387 | /* 630 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
388 | /* 634 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
389 | /* 638 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
390 | /* 642 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64, |
391 | /* 646 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
392 | /* 651 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
393 | /* 656 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vpIDRegClassID), |
394 | /* 661 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
395 | /* 665 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
396 | /* 667 */ // (assigntype:{ *:[i64] } (select:{ *:[i64] } vID:{ *:[v2i64] }:$cond, vpID:{ *:[i64] }:$src1, vpID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVPVCond:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, vpID:{ *:[i64] }:$src1, vpID:{ *:[i64] }:$src2) |
397 | /* 667 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVPVCond), |
398 | /* 670 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
399 | /* 672 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
400 | /* 674 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
401 | /* 678 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
402 | /* 682 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
403 | /* 686 */ GIR_RootConstrainSelectedInstOperands, |
404 | /* 687 */ // GIR_Coverage, 61, |
405 | /* 687 */ GIR_EraseRootFromParent_Done, |
406 | /* 688 */ // Label 16: @688 |
407 | /* 688 */ GIM_Try, /*On fail goto*//*Label 17*/ GIMT_Encode4(746), // Rule ID 4 // |
408 | /* 693 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
409 | /* 697 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
410 | /* 701 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), |
411 | /* 705 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
412 | /* 709 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
413 | /* 713 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
414 | /* 718 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
415 | /* 723 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
416 | /* 727 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
417 | /* 729 */ // (assigntype:{ *:[i64] } (add:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpIAddS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
418 | /* 729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpIAddS), |
419 | /* 732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
420 | /* 734 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
421 | /* 736 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
422 | /* 740 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
423 | /* 744 */ GIR_RootConstrainSelectedInstOperands, |
424 | /* 745 */ // GIR_Coverage, 4, |
425 | /* 745 */ GIR_EraseRootFromParent_Done, |
426 | /* 746 */ // Label 17: @746 |
427 | /* 746 */ GIM_Try, /*On fail goto*//*Label 18*/ GIMT_Encode4(804), // Rule ID 52 // |
428 | /* 751 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
429 | /* 755 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
430 | /* 759 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND), |
431 | /* 763 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
432 | /* 767 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
433 | /* 771 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
434 | /* 776 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
435 | /* 781 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
436 | /* 785 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
437 | /* 787 */ // (assigntype:{ *:[i64] } (and:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseAndS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
438 | /* 787 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseAndS), |
439 | /* 790 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
440 | /* 792 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
441 | /* 794 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
442 | /* 798 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
443 | /* 802 */ GIR_RootConstrainSelectedInstOperands, |
444 | /* 803 */ // GIR_Coverage, 52, |
445 | /* 803 */ GIR_EraseRootFromParent_Done, |
446 | /* 804 */ // Label 18: @804 |
447 | /* 804 */ GIM_Try, /*On fail goto*//*Label 19*/ GIMT_Encode4(862), // Rule ID 44 // |
448 | /* 809 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
449 | /* 813 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
450 | /* 817 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ASHR), |
451 | /* 821 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
452 | /* 825 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
453 | /* 829 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
454 | /* 834 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
455 | /* 839 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
456 | /* 843 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
457 | /* 845 */ // (assigntype:{ *:[i64] } (sra:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftRightArithmeticS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
458 | /* 845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftRightArithmeticS), |
459 | /* 848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
460 | /* 850 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
461 | /* 852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
462 | /* 856 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
463 | /* 860 */ GIR_RootConstrainSelectedInstOperands, |
464 | /* 861 */ // GIR_Coverage, 44, |
465 | /* 861 */ GIR_EraseRootFromParent_Done, |
466 | /* 862 */ // Label 19: @862 |
467 | /* 862 */ GIM_Try, /*On fail goto*//*Label 20*/ GIMT_Encode4(920), // Rule ID 6 // |
468 | /* 867 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
469 | /* 871 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
470 | /* 875 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FADD), |
471 | /* 879 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
472 | /* 883 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
473 | /* 887 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
474 | /* 892 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
475 | /* 897 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
476 | /* 901 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
477 | /* 903 */ // (assigntype:{ *:[f64] } (fadd:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFAddS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
478 | /* 903 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFAddS), |
479 | /* 906 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
480 | /* 908 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
481 | /* 910 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
482 | /* 914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
483 | /* 918 */ GIR_RootConstrainSelectedInstOperands, |
484 | /* 919 */ // GIR_Coverage, 6, |
485 | /* 919 */ GIR_EraseRootFromParent_Done, |
486 | /* 920 */ // Label 20: @920 |
487 | /* 920 */ GIM_Try, /*On fail goto*//*Label 21*/ GIMT_Encode4(978), // Rule ID 26 // |
488 | /* 925 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
489 | /* 929 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
490 | /* 933 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FDIV), |
491 | /* 937 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
492 | /* 941 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
493 | /* 945 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
494 | /* 950 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
495 | /* 955 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
496 | /* 959 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
497 | /* 961 */ // (assigntype:{ *:[f64] } (fdiv:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFDivS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
498 | /* 961 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFDivS), |
499 | /* 964 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
500 | /* 966 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
501 | /* 968 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
502 | /* 972 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
503 | /* 976 */ GIR_RootConstrainSelectedInstOperands, |
504 | /* 977 */ // GIR_Coverage, 26, |
505 | /* 977 */ GIR_EraseRootFromParent_Done, |
506 | /* 978 */ // Label 21: @978 |
507 | /* 978 */ GIM_Try, /*On fail goto*//*Label 22*/ GIMT_Encode4(1036), // Rule ID 18 // |
508 | /* 983 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
509 | /* 987 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
510 | /* 991 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL), |
511 | /* 995 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
512 | /* 999 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
513 | /* 1003 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
514 | /* 1008 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
515 | /* 1013 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
516 | /* 1017 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
517 | /* 1019 */ // (assigntype:{ *:[f64] } (fmul:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFMulS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
518 | /* 1019 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFMulS), |
519 | /* 1022 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
520 | /* 1024 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
521 | /* 1026 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
522 | /* 1030 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
523 | /* 1034 */ GIR_RootConstrainSelectedInstOperands, |
524 | /* 1035 */ // GIR_Coverage, 18, |
525 | /* 1035 */ GIR_EraseRootFromParent_Done, |
526 | /* 1036 */ // Label 22: @1036 |
527 | /* 1036 */ GIM_Try, /*On fail goto*//*Label 23*/ GIMT_Encode4(1094), // Rule ID 34 // |
528 | /* 1041 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
529 | /* 1045 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
530 | /* 1049 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FREM), |
531 | /* 1053 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
532 | /* 1057 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
533 | /* 1061 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
534 | /* 1066 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
535 | /* 1071 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
536 | /* 1075 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
537 | /* 1077 */ // (assigntype:{ *:[f64] } (frem:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFRemS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
538 | /* 1077 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFRemS), |
539 | /* 1080 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
540 | /* 1082 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
541 | /* 1084 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
542 | /* 1088 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
543 | /* 1092 */ GIR_RootConstrainSelectedInstOperands, |
544 | /* 1093 */ // GIR_Coverage, 34, |
545 | /* 1093 */ GIR_EraseRootFromParent_Done, |
546 | /* 1094 */ // Label 23: @1094 |
547 | /* 1094 */ GIM_Try, /*On fail goto*//*Label 24*/ GIMT_Encode4(1152), // Rule ID 12 // |
548 | /* 1099 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
549 | /* 1103 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
550 | /* 1107 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FSUB), |
551 | /* 1111 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
552 | /* 1115 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
553 | /* 1119 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
554 | /* 1124 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
555 | /* 1129 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
556 | /* 1133 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
557 | /* 1135 */ // (assigntype:{ *:[f64] } (fsub:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFSubS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
558 | /* 1135 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFSubS), |
559 | /* 1138 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
560 | /* 1140 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
561 | /* 1142 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
562 | /* 1146 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
563 | /* 1150 */ GIR_RootConstrainSelectedInstOperands, |
564 | /* 1151 */ // GIR_Coverage, 12, |
565 | /* 1151 */ GIR_EraseRootFromParent_Done, |
566 | /* 1152 */ // Label 24: @1152 |
567 | /* 1152 */ GIM_Try, /*On fail goto*//*Label 25*/ GIMT_Encode4(1210), // Rule ID 42 // |
568 | /* 1157 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
569 | /* 1161 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
570 | /* 1165 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LSHR), |
571 | /* 1169 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
572 | /* 1173 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
573 | /* 1177 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
574 | /* 1182 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
575 | /* 1187 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
576 | /* 1191 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
577 | /* 1193 */ // (assigntype:{ *:[i64] } (srl:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftRightLogicalS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
578 | /* 1193 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftRightLogicalS), |
579 | /* 1196 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
580 | /* 1198 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
581 | /* 1200 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
582 | /* 1204 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
583 | /* 1208 */ GIR_RootConstrainSelectedInstOperands, |
584 | /* 1209 */ // GIR_Coverage, 42, |
585 | /* 1209 */ GIR_EraseRootFromParent_Done, |
586 | /* 1210 */ // Label 25: @1210 |
587 | /* 1210 */ GIM_Try, /*On fail goto*//*Label 26*/ GIMT_Encode4(1268), // Rule ID 16 // |
588 | /* 1215 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
589 | /* 1219 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
590 | /* 1223 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), |
591 | /* 1227 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
592 | /* 1231 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
593 | /* 1235 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
594 | /* 1240 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
595 | /* 1245 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
596 | /* 1249 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
597 | /* 1251 */ // (assigntype:{ *:[i64] } (mul:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpIMulS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
598 | /* 1251 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpIMulS), |
599 | /* 1254 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
600 | /* 1256 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
601 | /* 1258 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
602 | /* 1262 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
603 | /* 1266 */ GIR_RootConstrainSelectedInstOperands, |
604 | /* 1267 */ // GIR_Coverage, 16, |
605 | /* 1267 */ GIR_EraseRootFromParent_Done, |
606 | /* 1268 */ // Label 26: @1268 |
607 | /* 1268 */ GIM_Try, /*On fail goto*//*Label 27*/ GIMT_Encode4(1326), // Rule ID 48 // |
608 | /* 1273 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
609 | /* 1277 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
610 | /* 1281 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_OR), |
611 | /* 1285 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
612 | /* 1289 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
613 | /* 1293 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
614 | /* 1298 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
615 | /* 1303 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
616 | /* 1307 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
617 | /* 1309 */ // (assigntype:{ *:[i64] } (or:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseOrS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
618 | /* 1309 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseOrS), |
619 | /* 1312 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
620 | /* 1314 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
621 | /* 1316 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
622 | /* 1320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
623 | /* 1324 */ GIR_RootConstrainSelectedInstOperands, |
624 | /* 1325 */ // GIR_Coverage, 48, |
625 | /* 1325 */ GIR_EraseRootFromParent_Done, |
626 | /* 1326 */ // Label 27: @1326 |
627 | /* 1326 */ GIM_Try, /*On fail goto*//*Label 28*/ GIMT_Encode4(1384), // Rule ID 24 // |
628 | /* 1331 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
629 | /* 1335 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
630 | /* 1339 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SDIV), |
631 | /* 1343 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
632 | /* 1347 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
633 | /* 1351 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
634 | /* 1356 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
635 | /* 1361 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
636 | /* 1365 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
637 | /* 1367 */ // (assigntype:{ *:[i64] } (sdiv:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSDivS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
638 | /* 1367 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSDivS), |
639 | /* 1370 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
640 | /* 1372 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
641 | /* 1374 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
642 | /* 1378 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
643 | /* 1382 */ GIR_RootConstrainSelectedInstOperands, |
644 | /* 1383 */ // GIR_Coverage, 24, |
645 | /* 1383 */ GIR_EraseRootFromParent_Done, |
646 | /* 1384 */ // Label 28: @1384 |
647 | /* 1384 */ GIM_Try, /*On fail goto*//*Label 29*/ GIMT_Encode4(1442), // Rule ID 46 // |
648 | /* 1389 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
649 | /* 1393 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
650 | /* 1397 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), |
651 | /* 1401 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
652 | /* 1405 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
653 | /* 1409 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
654 | /* 1414 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
655 | /* 1419 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
656 | /* 1423 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
657 | /* 1425 */ // (assigntype:{ *:[i64] } (shl:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftLeftLogicalS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
658 | /* 1425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftLeftLogicalS), |
659 | /* 1428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
660 | /* 1430 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
661 | /* 1432 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
662 | /* 1436 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
663 | /* 1440 */ GIR_RootConstrainSelectedInstOperands, |
664 | /* 1441 */ // GIR_Coverage, 46, |
665 | /* 1441 */ GIR_EraseRootFromParent_Done, |
666 | /* 1442 */ // Label 29: @1442 |
667 | /* 1442 */ GIM_Try, /*On fail goto*//*Label 30*/ GIMT_Encode4(1500), // Rule ID 32 // |
668 | /* 1447 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
669 | /* 1451 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
670 | /* 1455 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SREM), |
671 | /* 1459 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
672 | /* 1463 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
673 | /* 1467 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
674 | /* 1472 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
675 | /* 1477 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
676 | /* 1481 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
677 | /* 1483 */ // (assigntype:{ *:[i64] } (srem:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSRemS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
678 | /* 1483 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSRemS), |
679 | /* 1486 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
680 | /* 1488 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
681 | /* 1490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
682 | /* 1494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
683 | /* 1498 */ GIR_RootConstrainSelectedInstOperands, |
684 | /* 1499 */ // GIR_Coverage, 32, |
685 | /* 1499 */ GIR_EraseRootFromParent_Done, |
686 | /* 1500 */ // Label 30: @1500 |
687 | /* 1500 */ GIM_Try, /*On fail goto*//*Label 31*/ GIMT_Encode4(1558), // Rule ID 8 // |
688 | /* 1505 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
689 | /* 1509 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
690 | /* 1513 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FADD), |
691 | /* 1517 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
692 | /* 1521 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
693 | /* 1525 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
694 | /* 1530 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
695 | /* 1535 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
696 | /* 1539 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
697 | /* 1541 */ // (assigntype:{ *:[f64] } (strict_fadd:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFAddS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
698 | /* 1541 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFAddS), |
699 | /* 1544 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
700 | /* 1546 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
701 | /* 1548 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
702 | /* 1552 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
703 | /* 1556 */ GIR_RootConstrainSelectedInstOperands, |
704 | /* 1557 */ // GIR_Coverage, 8, |
705 | /* 1557 */ GIR_EraseRootFromParent_Done, |
706 | /* 1558 */ // Label 31: @1558 |
707 | /* 1558 */ GIM_Try, /*On fail goto*//*Label 32*/ GIMT_Encode4(1616), // Rule ID 28 // |
708 | /* 1563 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
709 | /* 1567 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
710 | /* 1571 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FDIV), |
711 | /* 1575 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
712 | /* 1579 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
713 | /* 1583 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
714 | /* 1588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
715 | /* 1593 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
716 | /* 1597 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
717 | /* 1599 */ // (assigntype:{ *:[f64] } (strict_fdiv:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFDivS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
718 | /* 1599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFDivS), |
719 | /* 1602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
720 | /* 1604 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
721 | /* 1606 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
722 | /* 1610 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
723 | /* 1614 */ GIR_RootConstrainSelectedInstOperands, |
724 | /* 1615 */ // GIR_Coverage, 28, |
725 | /* 1615 */ GIR_EraseRootFromParent_Done, |
726 | /* 1616 */ // Label 32: @1616 |
727 | /* 1616 */ GIM_Try, /*On fail goto*//*Label 33*/ GIMT_Encode4(1674), // Rule ID 20 // |
728 | /* 1621 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
729 | /* 1625 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
730 | /* 1629 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FMUL), |
731 | /* 1633 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
732 | /* 1637 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
733 | /* 1641 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
734 | /* 1646 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
735 | /* 1651 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
736 | /* 1655 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
737 | /* 1657 */ // (assigntype:{ *:[f64] } (strict_fmul:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFMulS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
738 | /* 1657 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFMulS), |
739 | /* 1660 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
740 | /* 1662 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
741 | /* 1664 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
742 | /* 1668 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
743 | /* 1672 */ GIR_RootConstrainSelectedInstOperands, |
744 | /* 1673 */ // GIR_Coverage, 20, |
745 | /* 1673 */ GIR_EraseRootFromParent_Done, |
746 | /* 1674 */ // Label 33: @1674 |
747 | /* 1674 */ GIM_Try, /*On fail goto*//*Label 34*/ GIMT_Encode4(1732), // Rule ID 36 // |
748 | /* 1679 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
749 | /* 1683 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
750 | /* 1687 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FREM), |
751 | /* 1691 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
752 | /* 1695 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
753 | /* 1699 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
754 | /* 1704 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
755 | /* 1709 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
756 | /* 1713 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
757 | /* 1715 */ // (assigntype:{ *:[f64] } (strict_frem:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFRemS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
758 | /* 1715 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFRemS), |
759 | /* 1718 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
760 | /* 1720 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
761 | /* 1722 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
762 | /* 1726 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
763 | /* 1730 */ GIR_RootConstrainSelectedInstOperands, |
764 | /* 1731 */ // GIR_Coverage, 36, |
765 | /* 1731 */ GIR_EraseRootFromParent_Done, |
766 | /* 1732 */ // Label 34: @1732 |
767 | /* 1732 */ GIM_Try, /*On fail goto*//*Label 35*/ GIMT_Encode4(1790), // Rule ID 14 // |
768 | /* 1737 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
769 | /* 1741 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
770 | /* 1745 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FSUB), |
771 | /* 1749 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
772 | /* 1753 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
773 | /* 1757 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
774 | /* 1762 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
775 | /* 1767 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
776 | /* 1771 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
777 | /* 1773 */ // (assigntype:{ *:[f64] } (strict_fsub:{ *:[f64] } fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFSubS:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src, fID:{ *:[f64] }:$src2) |
778 | /* 1773 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFSubS), |
779 | /* 1776 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
780 | /* 1778 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
781 | /* 1780 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
782 | /* 1784 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
783 | /* 1788 */ GIR_RootConstrainSelectedInstOperands, |
784 | /* 1789 */ // GIR_Coverage, 14, |
785 | /* 1789 */ GIR_EraseRootFromParent_Done, |
786 | /* 1790 */ // Label 35: @1790 |
787 | /* 1790 */ GIM_Try, /*On fail goto*//*Label 36*/ GIMT_Encode4(1848), // Rule ID 10 // |
788 | /* 1795 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
789 | /* 1799 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
790 | /* 1803 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), |
791 | /* 1807 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
792 | /* 1811 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
793 | /* 1815 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
794 | /* 1820 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
795 | /* 1825 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
796 | /* 1829 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
797 | /* 1831 */ // (assigntype:{ *:[i64] } (sub:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpISubS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
798 | /* 1831 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpISubS), |
799 | /* 1834 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
800 | /* 1836 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
801 | /* 1838 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
802 | /* 1842 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
803 | /* 1846 */ GIR_RootConstrainSelectedInstOperands, |
804 | /* 1847 */ // GIR_Coverage, 10, |
805 | /* 1847 */ GIR_EraseRootFromParent_Done, |
806 | /* 1848 */ // Label 36: @1848 |
807 | /* 1848 */ GIM_Try, /*On fail goto*//*Label 37*/ GIMT_Encode4(1906), // Rule ID 22 // |
808 | /* 1853 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
809 | /* 1857 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
810 | /* 1861 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_UDIV), |
811 | /* 1865 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
812 | /* 1869 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
813 | /* 1873 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
814 | /* 1878 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
815 | /* 1883 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
816 | /* 1887 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
817 | /* 1889 */ // (assigntype:{ *:[i64] } (udiv:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpUDivS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
818 | /* 1889 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpUDivS), |
819 | /* 1892 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
820 | /* 1894 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
821 | /* 1896 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
822 | /* 1900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
823 | /* 1904 */ GIR_RootConstrainSelectedInstOperands, |
824 | /* 1905 */ // GIR_Coverage, 22, |
825 | /* 1905 */ GIR_EraseRootFromParent_Done, |
826 | /* 1906 */ // Label 37: @1906 |
827 | /* 1906 */ GIM_Try, /*On fail goto*//*Label 38*/ GIMT_Encode4(1964), // Rule ID 30 // |
828 | /* 1911 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
829 | /* 1915 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
830 | /* 1919 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_UREM), |
831 | /* 1923 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
832 | /* 1927 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
833 | /* 1931 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
834 | /* 1936 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
835 | /* 1941 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
836 | /* 1945 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
837 | /* 1947 */ // (assigntype:{ *:[i64] } (urem:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpUModS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
838 | /* 1947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpUModS), |
839 | /* 1950 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
840 | /* 1952 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
841 | /* 1954 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
842 | /* 1958 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
843 | /* 1962 */ GIR_RootConstrainSelectedInstOperands, |
844 | /* 1963 */ // GIR_Coverage, 30, |
845 | /* 1963 */ GIR_EraseRootFromParent_Done, |
846 | /* 1964 */ // Label 38: @1964 |
847 | /* 1964 */ GIM_Try, /*On fail goto*//*Label 39*/ GIMT_Encode4(2022), // Rule ID 50 // |
848 | /* 1969 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
849 | /* 1973 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
850 | /* 1977 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), |
851 | /* 1981 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
852 | /* 1985 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64, |
853 | /* 1989 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
854 | /* 1994 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
855 | /* 1999 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
856 | /* 2003 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
857 | /* 2005 */ // (assigntype:{ *:[i64] } (xor:{ *:[i64] } iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseXorS:{ *:[i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$src, iID:{ *:[i64] }:$src2) |
858 | /* 2005 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseXorS), |
859 | /* 2008 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
860 | /* 2010 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
861 | /* 2012 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
862 | /* 2016 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
863 | /* 2020 */ GIR_RootConstrainSelectedInstOperands, |
864 | /* 2021 */ // GIR_Coverage, 50, |
865 | /* 2021 */ GIR_EraseRootFromParent_Done, |
866 | /* 2022 */ // Label 39: @2022 |
867 | /* 2022 */ GIM_Try, /*On fail goto*//*Label 40*/ GIMT_Encode4(2067), // Rule ID 2 // |
868 | /* 2027 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
869 | /* 2031 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
870 | /* 2035 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG), |
871 | /* 2039 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
872 | /* 2043 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::fIDRegClassID), |
873 | /* 2048 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
874 | /* 2052 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
875 | /* 2054 */ // (assigntype:{ *:[f64] } (fneg:{ *:[f64] } fID:{ *:[f64] }:$src), TYPE:{ *:[i64] }:$src_ty) => (OpFNegate:{ *:[f64] } TYPE:{ *:[i64] }:$src_ty, fID:{ *:[f64] }:$src) |
876 | /* 2054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFNegate), |
877 | /* 2057 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
878 | /* 2059 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
879 | /* 2061 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
880 | /* 2065 */ GIR_RootConstrainSelectedInstOperands, |
881 | /* 2066 */ // GIR_Coverage, 2, |
882 | /* 2066 */ GIR_EraseRootFromParent_Done, |
883 | /* 2067 */ // Label 40: @2067 |
884 | /* 2067 */ GIM_Reject, |
885 | /* 2068 */ // Label 8: @2068 |
886 | /* 2068 */ GIM_Reject, |
887 | /* 2069 */ // Label 3: @2069 |
888 | /* 2069 */ GIM_Try, /*On fail goto*//*Label 41*/ GIMT_Encode4(3744), |
889 | /* 2074 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64, |
890 | /* 2077 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64, |
891 | /* 2080 */ GIM_Try, /*On fail goto*//*Label 42*/ GIMT_Encode4(2151), // Rule ID 62 // |
892 | /* 2085 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
893 | /* 2089 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
894 | /* 2093 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
895 | /* 2097 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
896 | /* 2101 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
897 | /* 2105 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64, |
898 | /* 2109 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
899 | /* 2114 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
900 | /* 2119 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
901 | /* 2124 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
902 | /* 2128 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
903 | /* 2130 */ // (assigntype:{ *:[v2i64] } (select:{ *:[v2i64] } iID:{ *:[i64] }:$cond, vID:{ *:[v2i64] }:$src1, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVISCond:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, vID:{ *:[v2i64] }:$src1, vID:{ *:[v2i64] }:$src2) |
904 | /* 2130 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVISCond), |
905 | /* 2133 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
906 | /* 2135 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
907 | /* 2137 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
908 | /* 2141 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
909 | /* 2145 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
910 | /* 2149 */ GIR_RootConstrainSelectedInstOperands, |
911 | /* 2150 */ // GIR_Coverage, 62, |
912 | /* 2150 */ GIR_EraseRootFromParent_Done, |
913 | /* 2151 */ // Label 42: @2151 |
914 | /* 2151 */ GIM_Try, /*On fail goto*//*Label 43*/ GIMT_Encode4(2222), // Rule ID 63 // |
915 | /* 2156 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
916 | /* 2160 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
917 | /* 2164 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
918 | /* 2168 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
919 | /* 2172 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
920 | /* 2176 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64, |
921 | /* 2180 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
922 | /* 2185 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
923 | /* 2190 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
924 | /* 2195 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
925 | /* 2199 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
926 | /* 2201 */ // (assigntype:{ *:[v2i64] } (select:{ *:[v2i64] } vID:{ *:[v2i64] }:$cond, vID:{ *:[v2i64] }:$src1, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVIVCond:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, vID:{ *:[v2i64] }:$src1, vID:{ *:[v2i64] }:$src2) |
927 | /* 2201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVIVCond), |
928 | /* 2204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
929 | /* 2206 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
930 | /* 2208 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
931 | /* 2212 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
932 | /* 2216 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
933 | /* 2220 */ GIR_RootConstrainSelectedInstOperands, |
934 | /* 2221 */ // GIR_Coverage, 63, |
935 | /* 2221 */ GIR_EraseRootFromParent_Done, |
936 | /* 2222 */ // Label 43: @2222 |
937 | /* 2222 */ GIM_Try, /*On fail goto*//*Label 44*/ GIMT_Encode4(2293), // Rule ID 64 // |
938 | /* 2227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
939 | /* 2231 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
940 | /* 2235 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
941 | /* 2239 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64, |
942 | /* 2243 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
943 | /* 2247 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64, |
944 | /* 2251 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::iIDRegClassID), |
945 | /* 2256 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
946 | /* 2261 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
947 | /* 2266 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
948 | /* 2270 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
949 | /* 2272 */ // (assigntype:{ *:[v2f64] } (select:{ *:[v2f64] } iID:{ *:[i64] }:$cond, vfID:{ *:[v2f64] }:$src1, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVFSCond:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, iID:{ *:[i64] }:$cond, vfID:{ *:[v2f64] }:$src1, vfID:{ *:[v2f64] }:$src2) |
950 | /* 2272 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVFSCond), |
951 | /* 2275 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
952 | /* 2277 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
953 | /* 2279 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
954 | /* 2283 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
955 | /* 2287 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
956 | /* 2291 */ GIR_RootConstrainSelectedInstOperands, |
957 | /* 2292 */ // GIR_Coverage, 64, |
958 | /* 2292 */ GIR_EraseRootFromParent_Done, |
959 | /* 2293 */ // Label 44: @2293 |
960 | /* 2293 */ GIM_Try, /*On fail goto*//*Label 45*/ GIMT_Encode4(2364), // Rule ID 65 // |
961 | /* 2298 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
962 | /* 2302 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
963 | /* 2306 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SELECT), |
964 | /* 2310 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
965 | /* 2314 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
966 | /* 2318 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64, |
967 | /* 2322 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
968 | /* 2327 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
969 | /* 2332 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
970 | /* 2337 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
971 | /* 2341 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
972 | /* 2343 */ // (assigntype:{ *:[v2f64] } (select:{ *:[v2f64] } vID:{ *:[v2i64] }:$cond, vfID:{ *:[v2f64] }:$src1, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSelectVFVCond:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$cond, vfID:{ *:[v2f64] }:$src1, vfID:{ *:[v2f64] }:$src2) |
973 | /* 2343 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSelectVFVCond), |
974 | /* 2346 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
975 | /* 2348 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
976 | /* 2350 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // cond |
977 | /* 2354 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src1 |
978 | /* 2358 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // src2 |
979 | /* 2362 */ GIR_RootConstrainSelectedInstOperands, |
980 | /* 2363 */ // GIR_Coverage, 65, |
981 | /* 2363 */ GIR_EraseRootFromParent_Done, |
982 | /* 2364 */ // Label 45: @2364 |
983 | /* 2364 */ GIM_Try, /*On fail goto*//*Label 46*/ GIMT_Encode4(2422), // Rule ID 5 // |
984 | /* 2369 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
985 | /* 2373 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
986 | /* 2377 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ADD), |
987 | /* 2381 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
988 | /* 2385 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
989 | /* 2389 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
990 | /* 2394 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
991 | /* 2399 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
992 | /* 2403 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
993 | /* 2405 */ // (assigntype:{ *:[v2i64] } (add:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpIAddV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
994 | /* 2405 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpIAddV), |
995 | /* 2408 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
996 | /* 2410 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
997 | /* 2412 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
998 | /* 2416 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
999 | /* 2420 */ GIR_RootConstrainSelectedInstOperands, |
1000 | /* 2421 */ // GIR_Coverage, 5, |
1001 | /* 2421 */ GIR_EraseRootFromParent_Done, |
1002 | /* 2422 */ // Label 46: @2422 |
1003 | /* 2422 */ GIM_Try, /*On fail goto*//*Label 47*/ GIMT_Encode4(2480), // Rule ID 53 // |
1004 | /* 2427 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1005 | /* 2431 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1006 | /* 2435 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND), |
1007 | /* 2439 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1008 | /* 2443 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1009 | /* 2447 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1010 | /* 2452 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1011 | /* 2457 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1012 | /* 2461 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1013 | /* 2463 */ // (assigntype:{ *:[v2i64] } (and:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseAndV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1014 | /* 2463 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseAndV), |
1015 | /* 2466 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1016 | /* 2468 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1017 | /* 2470 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1018 | /* 2474 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1019 | /* 2478 */ GIR_RootConstrainSelectedInstOperands, |
1020 | /* 2479 */ // GIR_Coverage, 53, |
1021 | /* 2479 */ GIR_EraseRootFromParent_Done, |
1022 | /* 2480 */ // Label 47: @2480 |
1023 | /* 2480 */ GIM_Try, /*On fail goto*//*Label 48*/ GIMT_Encode4(2538), // Rule ID 45 // |
1024 | /* 2485 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1025 | /* 2489 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1026 | /* 2493 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ASHR), |
1027 | /* 2497 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1028 | /* 2501 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1029 | /* 2505 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1030 | /* 2510 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1031 | /* 2515 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1032 | /* 2519 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1033 | /* 2521 */ // (assigntype:{ *:[v2i64] } (sra:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftRightArithmeticV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1034 | /* 2521 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftRightArithmeticV), |
1035 | /* 2524 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1036 | /* 2526 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1037 | /* 2528 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1038 | /* 2532 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1039 | /* 2536 */ GIR_RootConstrainSelectedInstOperands, |
1040 | /* 2537 */ // GIR_Coverage, 45, |
1041 | /* 2537 */ GIR_EraseRootFromParent_Done, |
1042 | /* 2538 */ // Label 48: @2538 |
1043 | /* 2538 */ GIM_Try, /*On fail goto*//*Label 49*/ GIMT_Encode4(2596), // Rule ID 7 // |
1044 | /* 2543 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1045 | /* 2547 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1046 | /* 2551 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FADD), |
1047 | /* 2555 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1048 | /* 2559 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1049 | /* 2563 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1050 | /* 2568 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1051 | /* 2573 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1052 | /* 2577 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1053 | /* 2579 */ // (assigntype:{ *:[v2f64] } (fadd:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFAddV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1054 | /* 2579 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFAddV), |
1055 | /* 2582 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1056 | /* 2584 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1057 | /* 2586 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1058 | /* 2590 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1059 | /* 2594 */ GIR_RootConstrainSelectedInstOperands, |
1060 | /* 2595 */ // GIR_Coverage, 7, |
1061 | /* 2595 */ GIR_EraseRootFromParent_Done, |
1062 | /* 2596 */ // Label 49: @2596 |
1063 | /* 2596 */ GIM_Try, /*On fail goto*//*Label 50*/ GIMT_Encode4(2654), // Rule ID 27 // |
1064 | /* 2601 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1065 | /* 2605 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1066 | /* 2609 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FDIV), |
1067 | /* 2613 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1068 | /* 2617 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1069 | /* 2621 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1070 | /* 2626 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1071 | /* 2631 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1072 | /* 2635 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1073 | /* 2637 */ // (assigntype:{ *:[v2f64] } (fdiv:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFDivV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1074 | /* 2637 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFDivV), |
1075 | /* 2640 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1076 | /* 2642 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1077 | /* 2644 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1078 | /* 2648 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1079 | /* 2652 */ GIR_RootConstrainSelectedInstOperands, |
1080 | /* 2653 */ // GIR_Coverage, 27, |
1081 | /* 2653 */ GIR_EraseRootFromParent_Done, |
1082 | /* 2654 */ // Label 50: @2654 |
1083 | /* 2654 */ GIM_Try, /*On fail goto*//*Label 51*/ GIMT_Encode4(2712), // Rule ID 19 // |
1084 | /* 2659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1085 | /* 2663 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1086 | /* 2667 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL), |
1087 | /* 2671 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1088 | /* 2675 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1089 | /* 2679 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1090 | /* 2684 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1091 | /* 2689 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1092 | /* 2693 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1093 | /* 2695 */ // (assigntype:{ *:[v2f64] } (fmul:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFMulV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1094 | /* 2695 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFMulV), |
1095 | /* 2698 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1096 | /* 2700 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1097 | /* 2702 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1098 | /* 2706 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1099 | /* 2710 */ GIR_RootConstrainSelectedInstOperands, |
1100 | /* 2711 */ // GIR_Coverage, 19, |
1101 | /* 2711 */ GIR_EraseRootFromParent_Done, |
1102 | /* 2712 */ // Label 51: @2712 |
1103 | /* 2712 */ GIM_Try, /*On fail goto*//*Label 52*/ GIMT_Encode4(2770), // Rule ID 35 // |
1104 | /* 2717 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1105 | /* 2721 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1106 | /* 2725 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FREM), |
1107 | /* 2729 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1108 | /* 2733 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1109 | /* 2737 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1110 | /* 2742 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1111 | /* 2747 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1112 | /* 2751 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1113 | /* 2753 */ // (assigntype:{ *:[v2f64] } (frem:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFRemV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1114 | /* 2753 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFRemV), |
1115 | /* 2756 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1116 | /* 2758 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1117 | /* 2760 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1118 | /* 2764 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1119 | /* 2768 */ GIR_RootConstrainSelectedInstOperands, |
1120 | /* 2769 */ // GIR_Coverage, 35, |
1121 | /* 2769 */ GIR_EraseRootFromParent_Done, |
1122 | /* 2770 */ // Label 52: @2770 |
1123 | /* 2770 */ GIM_Try, /*On fail goto*//*Label 53*/ GIMT_Encode4(2828), // Rule ID 13 // |
1124 | /* 2775 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1125 | /* 2779 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1126 | /* 2783 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FSUB), |
1127 | /* 2787 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1128 | /* 2791 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1129 | /* 2795 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1130 | /* 2800 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1131 | /* 2805 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1132 | /* 2809 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1133 | /* 2811 */ // (assigntype:{ *:[v2f64] } (fsub:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpFSubV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1134 | /* 2811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFSubV), |
1135 | /* 2814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1136 | /* 2816 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1137 | /* 2818 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1138 | /* 2822 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1139 | /* 2826 */ GIR_RootConstrainSelectedInstOperands, |
1140 | /* 2827 */ // GIR_Coverage, 13, |
1141 | /* 2827 */ GIR_EraseRootFromParent_Done, |
1142 | /* 2828 */ // Label 53: @2828 |
1143 | /* 2828 */ GIM_Try, /*On fail goto*//*Label 54*/ GIMT_Encode4(2886), // Rule ID 43 // |
1144 | /* 2833 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1145 | /* 2837 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1146 | /* 2841 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LSHR), |
1147 | /* 2845 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1148 | /* 2849 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1149 | /* 2853 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1150 | /* 2858 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1151 | /* 2863 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1152 | /* 2867 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1153 | /* 2869 */ // (assigntype:{ *:[v2i64] } (srl:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftRightLogicalV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1154 | /* 2869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftRightLogicalV), |
1155 | /* 2872 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1156 | /* 2874 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1157 | /* 2876 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1158 | /* 2880 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1159 | /* 2884 */ GIR_RootConstrainSelectedInstOperands, |
1160 | /* 2885 */ // GIR_Coverage, 43, |
1161 | /* 2885 */ GIR_EraseRootFromParent_Done, |
1162 | /* 2886 */ // Label 54: @2886 |
1163 | /* 2886 */ GIM_Try, /*On fail goto*//*Label 55*/ GIMT_Encode4(2944), // Rule ID 17 // |
1164 | /* 2891 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1165 | /* 2895 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1166 | /* 2899 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_MUL), |
1167 | /* 2903 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1168 | /* 2907 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1169 | /* 2911 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1170 | /* 2916 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1171 | /* 2921 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1172 | /* 2925 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1173 | /* 2927 */ // (assigntype:{ *:[v2i64] } (mul:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpIMulV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1174 | /* 2927 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpIMulV), |
1175 | /* 2930 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1176 | /* 2932 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1177 | /* 2934 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1178 | /* 2938 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1179 | /* 2942 */ GIR_RootConstrainSelectedInstOperands, |
1180 | /* 2943 */ // GIR_Coverage, 17, |
1181 | /* 2943 */ GIR_EraseRootFromParent_Done, |
1182 | /* 2944 */ // Label 55: @2944 |
1183 | /* 2944 */ GIM_Try, /*On fail goto*//*Label 56*/ GIMT_Encode4(3002), // Rule ID 49 // |
1184 | /* 2949 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1185 | /* 2953 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1186 | /* 2957 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_OR), |
1187 | /* 2961 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1188 | /* 2965 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1189 | /* 2969 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1190 | /* 2974 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1191 | /* 2979 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1192 | /* 2983 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1193 | /* 2985 */ // (assigntype:{ *:[v2i64] } (or:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseOrV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1194 | /* 2985 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseOrV), |
1195 | /* 2988 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1196 | /* 2990 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1197 | /* 2992 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1198 | /* 2996 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1199 | /* 3000 */ GIR_RootConstrainSelectedInstOperands, |
1200 | /* 3001 */ // GIR_Coverage, 49, |
1201 | /* 3001 */ GIR_EraseRootFromParent_Done, |
1202 | /* 3002 */ // Label 56: @3002 |
1203 | /* 3002 */ GIM_Try, /*On fail goto*//*Label 57*/ GIMT_Encode4(3060), // Rule ID 25 // |
1204 | /* 3007 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1205 | /* 3011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1206 | /* 3015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SDIV), |
1207 | /* 3019 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1208 | /* 3023 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1209 | /* 3027 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1210 | /* 3032 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1211 | /* 3037 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1212 | /* 3041 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1213 | /* 3043 */ // (assigntype:{ *:[v2i64] } (sdiv:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSDivV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1214 | /* 3043 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSDivV), |
1215 | /* 3046 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1216 | /* 3048 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1217 | /* 3050 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1218 | /* 3054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1219 | /* 3058 */ GIR_RootConstrainSelectedInstOperands, |
1220 | /* 3059 */ // GIR_Coverage, 25, |
1221 | /* 3059 */ GIR_EraseRootFromParent_Done, |
1222 | /* 3060 */ // Label 57: @3060 |
1223 | /* 3060 */ GIM_Try, /*On fail goto*//*Label 58*/ GIMT_Encode4(3118), // Rule ID 47 // |
1224 | /* 3065 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1225 | /* 3069 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1226 | /* 3073 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SHL), |
1227 | /* 3077 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1228 | /* 3081 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1229 | /* 3085 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1230 | /* 3090 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1231 | /* 3095 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1232 | /* 3099 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1233 | /* 3101 */ // (assigntype:{ *:[v2i64] } (shl:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpShiftLeftLogicalV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1234 | /* 3101 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpShiftLeftLogicalV), |
1235 | /* 3104 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1236 | /* 3106 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1237 | /* 3108 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1238 | /* 3112 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1239 | /* 3116 */ GIR_RootConstrainSelectedInstOperands, |
1240 | /* 3117 */ // GIR_Coverage, 47, |
1241 | /* 3117 */ GIR_EraseRootFromParent_Done, |
1242 | /* 3118 */ // Label 58: @3118 |
1243 | /* 3118 */ GIM_Try, /*On fail goto*//*Label 59*/ GIMT_Encode4(3176), // Rule ID 33 // |
1244 | /* 3123 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1245 | /* 3127 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1246 | /* 3131 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SREM), |
1247 | /* 3135 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1248 | /* 3139 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1249 | /* 3143 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1250 | /* 3148 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1251 | /* 3153 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1252 | /* 3157 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1253 | /* 3159 */ // (assigntype:{ *:[v2i64] } (srem:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpSRemV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1254 | /* 3159 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpSRemV), |
1255 | /* 3162 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1256 | /* 3164 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1257 | /* 3166 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1258 | /* 3170 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1259 | /* 3174 */ GIR_RootConstrainSelectedInstOperands, |
1260 | /* 3175 */ // GIR_Coverage, 33, |
1261 | /* 3175 */ GIR_EraseRootFromParent_Done, |
1262 | /* 3176 */ // Label 59: @3176 |
1263 | /* 3176 */ GIM_Try, /*On fail goto*//*Label 60*/ GIMT_Encode4(3234), // Rule ID 9 // |
1264 | /* 3181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1265 | /* 3185 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1266 | /* 3189 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FADD), |
1267 | /* 3193 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1268 | /* 3197 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1269 | /* 3201 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1270 | /* 3206 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1271 | /* 3211 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1272 | /* 3215 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1273 | /* 3217 */ // (assigntype:{ *:[v2f64] } (strict_fadd:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFAddV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1274 | /* 3217 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFAddV), |
1275 | /* 3220 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1276 | /* 3222 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1277 | /* 3224 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1278 | /* 3228 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1279 | /* 3232 */ GIR_RootConstrainSelectedInstOperands, |
1280 | /* 3233 */ // GIR_Coverage, 9, |
1281 | /* 3233 */ GIR_EraseRootFromParent_Done, |
1282 | /* 3234 */ // Label 60: @3234 |
1283 | /* 3234 */ GIM_Try, /*On fail goto*//*Label 61*/ GIMT_Encode4(3292), // Rule ID 29 // |
1284 | /* 3239 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1285 | /* 3243 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1286 | /* 3247 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FDIV), |
1287 | /* 3251 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1288 | /* 3255 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1289 | /* 3259 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1290 | /* 3264 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1291 | /* 3269 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1292 | /* 3273 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1293 | /* 3275 */ // (assigntype:{ *:[v2f64] } (strict_fdiv:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFDivV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1294 | /* 3275 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFDivV), |
1295 | /* 3278 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1296 | /* 3280 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1297 | /* 3282 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1298 | /* 3286 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1299 | /* 3290 */ GIR_RootConstrainSelectedInstOperands, |
1300 | /* 3291 */ // GIR_Coverage, 29, |
1301 | /* 3291 */ GIR_EraseRootFromParent_Done, |
1302 | /* 3292 */ // Label 61: @3292 |
1303 | /* 3292 */ GIM_Try, /*On fail goto*//*Label 62*/ GIMT_Encode4(3350), // Rule ID 21 // |
1304 | /* 3297 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1305 | /* 3301 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1306 | /* 3305 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FMUL), |
1307 | /* 3309 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1308 | /* 3313 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1309 | /* 3317 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1310 | /* 3322 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1311 | /* 3327 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1312 | /* 3331 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1313 | /* 3333 */ // (assigntype:{ *:[v2f64] } (strict_fmul:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFMulV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1314 | /* 3333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFMulV), |
1315 | /* 3336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1316 | /* 3338 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1317 | /* 3340 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1318 | /* 3344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1319 | /* 3348 */ GIR_RootConstrainSelectedInstOperands, |
1320 | /* 3349 */ // GIR_Coverage, 21, |
1321 | /* 3349 */ GIR_EraseRootFromParent_Done, |
1322 | /* 3350 */ // Label 62: @3350 |
1323 | /* 3350 */ GIM_Try, /*On fail goto*//*Label 63*/ GIMT_Encode4(3408), // Rule ID 37 // |
1324 | /* 3355 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1325 | /* 3359 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1326 | /* 3363 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FREM), |
1327 | /* 3367 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1328 | /* 3371 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1329 | /* 3375 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1330 | /* 3380 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1331 | /* 3385 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1332 | /* 3389 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1333 | /* 3391 */ // (assigntype:{ *:[v2f64] } (strict_frem:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFRemV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1334 | /* 3391 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFRemV), |
1335 | /* 3394 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1336 | /* 3396 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1337 | /* 3398 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1338 | /* 3402 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1339 | /* 3406 */ GIR_RootConstrainSelectedInstOperands, |
1340 | /* 3407 */ // GIR_Coverage, 37, |
1341 | /* 3407 */ GIR_EraseRootFromParent_Done, |
1342 | /* 3408 */ // Label 63: @3408 |
1343 | /* 3408 */ GIM_Try, /*On fail goto*//*Label 64*/ GIMT_Encode4(3466), // Rule ID 15 // |
1344 | /* 3413 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1345 | /* 3417 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1346 | /* 3421 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_STRICT_FSUB), |
1347 | /* 3425 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1348 | /* 3429 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1349 | /* 3433 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1350 | /* 3438 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1351 | /* 3443 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1352 | /* 3447 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1353 | /* 3449 */ // (assigntype:{ *:[v2f64] } (strict_fsub:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpStrictFSubV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src, vfID:{ *:[v2f64] }:$src2) |
1354 | /* 3449 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpStrictFSubV), |
1355 | /* 3452 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1356 | /* 3454 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1357 | /* 3456 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1358 | /* 3460 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1359 | /* 3464 */ GIR_RootConstrainSelectedInstOperands, |
1360 | /* 3465 */ // GIR_Coverage, 15, |
1361 | /* 3465 */ GIR_EraseRootFromParent_Done, |
1362 | /* 3466 */ // Label 64: @3466 |
1363 | /* 3466 */ GIM_Try, /*On fail goto*//*Label 65*/ GIMT_Encode4(3524), // Rule ID 11 // |
1364 | /* 3471 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1365 | /* 3475 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1366 | /* 3479 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_SUB), |
1367 | /* 3483 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1368 | /* 3487 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1369 | /* 3491 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1370 | /* 3496 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1371 | /* 3501 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1372 | /* 3505 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1373 | /* 3507 */ // (assigntype:{ *:[v2i64] } (sub:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpISubV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1374 | /* 3507 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpISubV), |
1375 | /* 3510 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1376 | /* 3512 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1377 | /* 3514 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1378 | /* 3518 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1379 | /* 3522 */ GIR_RootConstrainSelectedInstOperands, |
1380 | /* 3523 */ // GIR_Coverage, 11, |
1381 | /* 3523 */ GIR_EraseRootFromParent_Done, |
1382 | /* 3524 */ // Label 65: @3524 |
1383 | /* 3524 */ GIM_Try, /*On fail goto*//*Label 66*/ GIMT_Encode4(3582), // Rule ID 23 // |
1384 | /* 3529 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1385 | /* 3533 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1386 | /* 3537 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_UDIV), |
1387 | /* 3541 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1388 | /* 3545 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1389 | /* 3549 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1390 | /* 3554 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1391 | /* 3559 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1392 | /* 3563 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1393 | /* 3565 */ // (assigntype:{ *:[v2i64] } (udiv:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpUDivV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1394 | /* 3565 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpUDivV), |
1395 | /* 3568 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1396 | /* 3570 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1397 | /* 3572 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1398 | /* 3576 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1399 | /* 3580 */ GIR_RootConstrainSelectedInstOperands, |
1400 | /* 3581 */ // GIR_Coverage, 23, |
1401 | /* 3581 */ GIR_EraseRootFromParent_Done, |
1402 | /* 3582 */ // Label 66: @3582 |
1403 | /* 3582 */ GIM_Try, /*On fail goto*//*Label 67*/ GIMT_Encode4(3640), // Rule ID 31 // |
1404 | /* 3587 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1405 | /* 3591 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1406 | /* 3595 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_UREM), |
1407 | /* 3599 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1408 | /* 3603 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1409 | /* 3607 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1410 | /* 3612 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1411 | /* 3617 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1412 | /* 3621 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1413 | /* 3623 */ // (assigntype:{ *:[v2i64] } (urem:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpUModV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1414 | /* 3623 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpUModV), |
1415 | /* 3626 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1416 | /* 3628 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1417 | /* 3630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1418 | /* 3634 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1419 | /* 3638 */ GIR_RootConstrainSelectedInstOperands, |
1420 | /* 3639 */ // GIR_Coverage, 31, |
1421 | /* 3639 */ GIR_EraseRootFromParent_Done, |
1422 | /* 3640 */ // Label 67: @3640 |
1423 | /* 3640 */ GIM_Try, /*On fail goto*//*Label 68*/ GIMT_Encode4(3698), // Rule ID 51 // |
1424 | /* 3645 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1425 | /* 3649 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1426 | /* 3653 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR), |
1427 | /* 3657 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1428 | /* 3661 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64, |
1429 | /* 3665 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1430 | /* 3670 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::vIDRegClassID), |
1431 | /* 3675 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1432 | /* 3679 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1433 | /* 3681 */ // (assigntype:{ *:[v2i64] } (xor:{ *:[v2i64] } vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2), TYPE:{ *:[i64] }:$src_ty) => (OpBitwiseXorV:{ *:[v2i64] } TYPE:{ *:[i64] }:$src_ty, vID:{ *:[v2i64] }:$src, vID:{ *:[v2i64] }:$src2) |
1434 | /* 3681 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpBitwiseXorV), |
1435 | /* 3684 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1436 | /* 3686 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1437 | /* 3688 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1438 | /* 3692 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
1439 | /* 3696 */ GIR_RootConstrainSelectedInstOperands, |
1440 | /* 3697 */ // GIR_Coverage, 51, |
1441 | /* 3697 */ GIR_EraseRootFromParent_Done, |
1442 | /* 3698 */ // Label 68: @3698 |
1443 | /* 3698 */ GIM_Try, /*On fail goto*//*Label 69*/ GIMT_Encode4(3743), // Rule ID 3 // |
1444 | /* 3703 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1445 | /* 3707 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
1446 | /* 3711 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG), |
1447 | /* 3715 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64, |
1448 | /* 3719 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(SPIRV::vfIDRegClassID), |
1449 | /* 3724 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(SPIRV::TYPERegClassID), |
1450 | /* 3728 */ GIM_CheckIsSafeToFold, /*NumInsns*/1, |
1451 | /* 3730 */ // (assigntype:{ *:[v2f64] } (fneg:{ *:[v2f64] } vfID:{ *:[v2f64] }:$src), TYPE:{ *:[i64] }:$src_ty) => (OpFNegateV:{ *:[v2f64] } TYPE:{ *:[i64] }:$src_ty, vfID:{ *:[v2f64] }:$src) |
1452 | /* 3730 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(SPIRV::OpFNegateV), |
1453 | /* 3733 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst] |
1454 | /* 3735 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_ty |
1455 | /* 3737 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src |
1456 | /* 3741 */ GIR_RootConstrainSelectedInstOperands, |
1457 | /* 3742 */ // GIR_Coverage, 3, |
1458 | /* 3742 */ GIR_EraseRootFromParent_Done, |
1459 | /* 3743 */ // Label 69: @3743 |
1460 | /* 3743 */ GIM_Reject, |
1461 | /* 3744 */ // Label 41: @3744 |
1462 | /* 3744 */ GIM_Reject, |
1463 | /* 3745 */ // Label 4: @3745 |
1464 | /* 3745 */ GIM_Reject, |
1465 | /* 3746 */ // Label 0: @3746 |
1466 | /* 3746 */ GIM_Reject, |
1467 | /* 3747 */ }; // Size: 3747 bytes |
1468 | return MatchTable0; |
1469 | } |
1470 | #undef GIMT_Encode2 |
1471 | #undef GIMT_Encode4 |
1472 | #undef GIMT_Encode8 |
1473 | |
1474 | #endif // ifdef GET_GLOBALISEL_IMPL |
1475 | |
1476 | #ifdef GET_GLOBALISEL_PREDICATES_DECL |
1477 | PredicateBitset AvailableModuleFeatures; |
1478 | mutable PredicateBitset AvailableFunctionFeatures; |
1479 | PredicateBitset getAvailableFeatures() const { |
1480 | return AvailableModuleFeatures | AvailableFunctionFeatures; |
1481 | } |
1482 | PredicateBitset |
1483 | computeAvailableModuleFeatures(const SPIRVSubtarget *Subtarget) const; |
1484 | PredicateBitset |
1485 | computeAvailableFunctionFeatures(const SPIRVSubtarget *Subtarget, |
1486 | const MachineFunction *MF) const; |
1487 | void setupGeneratedPerFunctionState(MachineFunction &MF) override; |
1488 | #endif // ifdef GET_GLOBALISEL_PREDICATES_DECL |
1489 | #ifdef GET_GLOBALISEL_PREDICATES_INIT |
1490 | AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)), |
1491 | AvailableFunctionFeatures() |
1492 | #endif // ifdef GET_GLOBALISEL_PREDICATES_INIT |
1493 | |