1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: VE.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10
11#ifdef GET_ASSEMBLER_HEADER
12#undef GET_ASSEMBLER_HEADER
13 // This should be included into the middle of the declaration of
14 // your subclasses implementation of MCTargetAsmParser.
15 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
16 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
17 const OperandVector &Operands);
18 void convertToMapAndConstraints(unsigned Kind,
19 const OperandVector &Operands) override;
20 unsigned MatchInstructionImpl(const OperandVector &Operands,
21 MCInst &Inst,
22 uint64_t &ErrorInfo,
23 FeatureBitset &MissingFeatures,
24 bool matchingInlineAsm,
25 unsigned VariantID = 0);
26 unsigned MatchInstructionImpl(const OperandVector &Operands,
27 MCInst &Inst,
28 uint64_t &ErrorInfo,
29 bool matchingInlineAsm,
30 unsigned VariantID = 0) {
31 FeatureBitset MissingFeatures;
32 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
33 matchingInlineAsm, VariantID);
34 }
35
36 ParseStatus MatchOperandParserImpl(
37 OperandVector &Operands,
38 StringRef Mnemonic,
39 bool ParseForAllFeatures = false);
40 ParseStatus tryCustomParseOperand(
41 OperandVector &Operands,
42 unsigned MCK);
43
44#endif // GET_ASSEMBLER_HEADER
45
46
47#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
48#undef GET_OPERAND_DIAGNOSTIC_TYPES
49
50#endif // GET_OPERAND_DIAGNOSTIC_TYPES
51
52
53#ifdef GET_REGISTER_MATCHER
54#undef GET_REGISTER_MATCHER
55
56// Bits for subtarget features that participate in instruction matching.
57enum SubtargetFeatureBits : uint8_t {
58};
59
60static MCRegister MatchRegisterName(StringRef Name) {
61 switch (Name.size()) {
62 default: break;
63 case 2: // 32 strings to match.
64 switch (Name[0]) {
65 default: break;
66 case 'i': // 1 string to match.
67 if (Name[1] != 'c')
68 break;
69 return VE::IC; // "ic"
70 case 'q': // 10 strings to match.
71 switch (Name[1]) {
72 default: break;
73 case '0': // 1 string to match.
74 return VE::Q0; // "q0"
75 case '1': // 1 string to match.
76 return VE::Q1; // "q1"
77 case '2': // 1 string to match.
78 return VE::Q2; // "q2"
79 case '3': // 1 string to match.
80 return VE::Q3; // "q3"
81 case '4': // 1 string to match.
82 return VE::Q4; // "q4"
83 case '5': // 1 string to match.
84 return VE::Q5; // "q5"
85 case '6': // 1 string to match.
86 return VE::Q6; // "q6"
87 case '7': // 1 string to match.
88 return VE::Q7; // "q7"
89 case '8': // 1 string to match.
90 return VE::Q8; // "q8"
91 case '9': // 1 string to match.
92 return VE::Q9; // "q9"
93 }
94 break;
95 case 's': // 10 strings to match.
96 switch (Name[1]) {
97 default: break;
98 case '0': // 1 string to match.
99 return VE::SX0; // "s0"
100 case '1': // 1 string to match.
101 return VE::SX1; // "s1"
102 case '2': // 1 string to match.
103 return VE::SX2; // "s2"
104 case '3': // 1 string to match.
105 return VE::SX3; // "s3"
106 case '4': // 1 string to match.
107 return VE::SX4; // "s4"
108 case '5': // 1 string to match.
109 return VE::SX5; // "s5"
110 case '6': // 1 string to match.
111 return VE::SX6; // "s6"
112 case '7': // 1 string to match.
113 return VE::SX7; // "s7"
114 case '8': // 1 string to match.
115 return VE::SX8; // "s8"
116 case '9': // 1 string to match.
117 return VE::SX9; // "s9"
118 }
119 break;
120 case 'v': // 11 strings to match.
121 switch (Name[1]) {
122 default: break;
123 case '0': // 1 string to match.
124 return VE::V0; // "v0"
125 case '1': // 1 string to match.
126 return VE::V1; // "v1"
127 case '2': // 1 string to match.
128 return VE::V2; // "v2"
129 case '3': // 1 string to match.
130 return VE::V3; // "v3"
131 case '4': // 1 string to match.
132 return VE::V4; // "v4"
133 case '5': // 1 string to match.
134 return VE::V5; // "v5"
135 case '6': // 1 string to match.
136 return VE::V6; // "v6"
137 case '7': // 1 string to match.
138 return VE::V7; // "v7"
139 case '8': // 1 string to match.
140 return VE::V8; // "v8"
141 case '9': // 1 string to match.
142 return VE::V9; // "v9"
143 case 'l': // 1 string to match.
144 return VE::VL; // "vl"
145 }
146 break;
147 }
148 break;
149 case 3: // 164 strings to match.
150 switch (Name[0]) {
151 default: break;
152 case 'p': // 1 string to match.
153 if (memcmp(Name.data()+1, "sw", 2) != 0)
154 break;
155 return VE::PSW; // "psw"
156 case 'q': // 22 strings to match.
157 switch (Name[1]) {
158 default: break;
159 case '1': // 10 strings to match.
160 switch (Name[2]) {
161 default: break;
162 case '0': // 1 string to match.
163 return VE::Q10; // "q10"
164 case '1': // 1 string to match.
165 return VE::Q11; // "q11"
166 case '2': // 1 string to match.
167 return VE::Q12; // "q12"
168 case '3': // 1 string to match.
169 return VE::Q13; // "q13"
170 case '4': // 1 string to match.
171 return VE::Q14; // "q14"
172 case '5': // 1 string to match.
173 return VE::Q15; // "q15"
174 case '6': // 1 string to match.
175 return VE::Q16; // "q16"
176 case '7': // 1 string to match.
177 return VE::Q17; // "q17"
178 case '8': // 1 string to match.
179 return VE::Q18; // "q18"
180 case '9': // 1 string to match.
181 return VE::Q19; // "q19"
182 }
183 break;
184 case '2': // 10 strings to match.
185 switch (Name[2]) {
186 default: break;
187 case '0': // 1 string to match.
188 return VE::Q20; // "q20"
189 case '1': // 1 string to match.
190 return VE::Q21; // "q21"
191 case '2': // 1 string to match.
192 return VE::Q22; // "q22"
193 case '3': // 1 string to match.
194 return VE::Q23; // "q23"
195 case '4': // 1 string to match.
196 return VE::Q24; // "q24"
197 case '5': // 1 string to match.
198 return VE::Q25; // "q25"
199 case '6': // 1 string to match.
200 return VE::Q26; // "q26"
201 case '7': // 1 string to match.
202 return VE::Q27; // "q27"
203 case '8': // 1 string to match.
204 return VE::Q28; // "q28"
205 case '9': // 1 string to match.
206 return VE::Q29; // "q29"
207 }
208 break;
209 case '3': // 2 strings to match.
210 switch (Name[2]) {
211 default: break;
212 case '0': // 1 string to match.
213 return VE::Q30; // "q30"
214 case '1': // 1 string to match.
215 return VE::Q31; // "q31"
216 }
217 break;
218 }
219 break;
220 case 's': // 75 strings to match.
221 switch (Name[1]) {
222 default: break;
223 case '1': // 10 strings to match.
224 switch (Name[2]) {
225 default: break;
226 case '0': // 1 string to match.
227 return VE::SX10; // "s10"
228 case '1': // 1 string to match.
229 return VE::SX11; // "s11"
230 case '2': // 1 string to match.
231 return VE::SX12; // "s12"
232 case '3': // 1 string to match.
233 return VE::SX13; // "s13"
234 case '4': // 1 string to match.
235 return VE::SX14; // "s14"
236 case '5': // 1 string to match.
237 return VE::SX15; // "s15"
238 case '6': // 1 string to match.
239 return VE::SX16; // "s16"
240 case '7': // 1 string to match.
241 return VE::SX17; // "s17"
242 case '8': // 1 string to match.
243 return VE::SX18; // "s18"
244 case '9': // 1 string to match.
245 return VE::SX19; // "s19"
246 }
247 break;
248 case '2': // 10 strings to match.
249 switch (Name[2]) {
250 default: break;
251 case '0': // 1 string to match.
252 return VE::SX20; // "s20"
253 case '1': // 1 string to match.
254 return VE::SX21; // "s21"
255 case '2': // 1 string to match.
256 return VE::SX22; // "s22"
257 case '3': // 1 string to match.
258 return VE::SX23; // "s23"
259 case '4': // 1 string to match.
260 return VE::SX24; // "s24"
261 case '5': // 1 string to match.
262 return VE::SX25; // "s25"
263 case '6': // 1 string to match.
264 return VE::SX26; // "s26"
265 case '7': // 1 string to match.
266 return VE::SX27; // "s27"
267 case '8': // 1 string to match.
268 return VE::SX28; // "s28"
269 case '9': // 1 string to match.
270 return VE::SX29; // "s29"
271 }
272 break;
273 case '3': // 10 strings to match.
274 switch (Name[2]) {
275 default: break;
276 case '0': // 1 string to match.
277 return VE::SX30; // "s30"
278 case '1': // 1 string to match.
279 return VE::SX31; // "s31"
280 case '2': // 1 string to match.
281 return VE::SX32; // "s32"
282 case '3': // 1 string to match.
283 return VE::SX33; // "s33"
284 case '4': // 1 string to match.
285 return VE::SX34; // "s34"
286 case '5': // 1 string to match.
287 return VE::SX35; // "s35"
288 case '6': // 1 string to match.
289 return VE::SX36; // "s36"
290 case '7': // 1 string to match.
291 return VE::SX37; // "s37"
292 case '8': // 1 string to match.
293 return VE::SX38; // "s38"
294 case '9': // 1 string to match.
295 return VE::SX39; // "s39"
296 }
297 break;
298 case '4': // 10 strings to match.
299 switch (Name[2]) {
300 default: break;
301 case '0': // 1 string to match.
302 return VE::SX40; // "s40"
303 case '1': // 1 string to match.
304 return VE::SX41; // "s41"
305 case '2': // 1 string to match.
306 return VE::SX42; // "s42"
307 case '3': // 1 string to match.
308 return VE::SX43; // "s43"
309 case '4': // 1 string to match.
310 return VE::SX44; // "s44"
311 case '5': // 1 string to match.
312 return VE::SX45; // "s45"
313 case '6': // 1 string to match.
314 return VE::SX46; // "s46"
315 case '7': // 1 string to match.
316 return VE::SX47; // "s47"
317 case '8': // 1 string to match.
318 return VE::SX48; // "s48"
319 case '9': // 1 string to match.
320 return VE::SX49; // "s49"
321 }
322 break;
323 case '5': // 10 strings to match.
324 switch (Name[2]) {
325 default: break;
326 case '0': // 1 string to match.
327 return VE::SX50; // "s50"
328 case '1': // 1 string to match.
329 return VE::SX51; // "s51"
330 case '2': // 1 string to match.
331 return VE::SX52; // "s52"
332 case '3': // 1 string to match.
333 return VE::SX53; // "s53"
334 case '4': // 1 string to match.
335 return VE::SX54; // "s54"
336 case '5': // 1 string to match.
337 return VE::SX55; // "s55"
338 case '6': // 1 string to match.
339 return VE::SX56; // "s56"
340 case '7': // 1 string to match.
341 return VE::SX57; // "s57"
342 case '8': // 1 string to match.
343 return VE::SX58; // "s58"
344 case '9': // 1 string to match.
345 return VE::SX59; // "s59"
346 }
347 break;
348 case '6': // 4 strings to match.
349 switch (Name[2]) {
350 default: break;
351 case '0': // 1 string to match.
352 return VE::SX60; // "s60"
353 case '1': // 1 string to match.
354 return VE::SX61; // "s61"
355 case '2': // 1 string to match.
356 return VE::SX62; // "s62"
357 case '3': // 1 string to match.
358 return VE::SX63; // "s63"
359 }
360 break;
361 case 'a': // 1 string to match.
362 if (Name[2] != 'r')
363 break;
364 return VE::SAR; // "sar"
365 case 'f': // 10 strings to match.
366 switch (Name[2]) {
367 default: break;
368 case '0': // 1 string to match.
369 return VE::SF0; // "sf0"
370 case '1': // 1 string to match.
371 return VE::SF1; // "sf1"
372 case '2': // 1 string to match.
373 return VE::SF2; // "sf2"
374 case '3': // 1 string to match.
375 return VE::SF3; // "sf3"
376 case '4': // 1 string to match.
377 return VE::SF4; // "sf4"
378 case '5': // 1 string to match.
379 return VE::SF5; // "sf5"
380 case '6': // 1 string to match.
381 return VE::SF6; // "sf6"
382 case '7': // 1 string to match.
383 return VE::SF7; // "sf7"
384 case '8': // 1 string to match.
385 return VE::SF8; // "sf8"
386 case '9': // 1 string to match.
387 return VE::SF9; // "sf9"
388 }
389 break;
390 case 'w': // 10 strings to match.
391 switch (Name[2]) {
392 default: break;
393 case '0': // 1 string to match.
394 return VE::SW0; // "sw0"
395 case '1': // 1 string to match.
396 return VE::SW1; // "sw1"
397 case '2': // 1 string to match.
398 return VE::SW2; // "sw2"
399 case '3': // 1 string to match.
400 return VE::SW3; // "sw3"
401 case '4': // 1 string to match.
402 return VE::SW4; // "sw4"
403 case '5': // 1 string to match.
404 return VE::SW5; // "sw5"
405 case '6': // 1 string to match.
406 return VE::SW6; // "sw6"
407 case '7': // 1 string to match.
408 return VE::SW7; // "sw7"
409 case '8': // 1 string to match.
410 return VE::SW8; // "sw8"
411 case '9': // 1 string to match.
412 return VE::SW9; // "sw9"
413 }
414 break;
415 }
416 break;
417 case 'v': // 66 strings to match.
418 switch (Name[1]) {
419 default: break;
420 case '1': // 10 strings to match.
421 switch (Name[2]) {
422 default: break;
423 case '0': // 1 string to match.
424 return VE::V10; // "v10"
425 case '1': // 1 string to match.
426 return VE::V11; // "v11"
427 case '2': // 1 string to match.
428 return VE::V12; // "v12"
429 case '3': // 1 string to match.
430 return VE::V13; // "v13"
431 case '4': // 1 string to match.
432 return VE::V14; // "v14"
433 case '5': // 1 string to match.
434 return VE::V15; // "v15"
435 case '6': // 1 string to match.
436 return VE::V16; // "v16"
437 case '7': // 1 string to match.
438 return VE::V17; // "v17"
439 case '8': // 1 string to match.
440 return VE::V18; // "v18"
441 case '9': // 1 string to match.
442 return VE::V19; // "v19"
443 }
444 break;
445 case '2': // 10 strings to match.
446 switch (Name[2]) {
447 default: break;
448 case '0': // 1 string to match.
449 return VE::V20; // "v20"
450 case '1': // 1 string to match.
451 return VE::V21; // "v21"
452 case '2': // 1 string to match.
453 return VE::V22; // "v22"
454 case '3': // 1 string to match.
455 return VE::V23; // "v23"
456 case '4': // 1 string to match.
457 return VE::V24; // "v24"
458 case '5': // 1 string to match.
459 return VE::V25; // "v25"
460 case '6': // 1 string to match.
461 return VE::V26; // "v26"
462 case '7': // 1 string to match.
463 return VE::V27; // "v27"
464 case '8': // 1 string to match.
465 return VE::V28; // "v28"
466 case '9': // 1 string to match.
467 return VE::V29; // "v29"
468 }
469 break;
470 case '3': // 10 strings to match.
471 switch (Name[2]) {
472 default: break;
473 case '0': // 1 string to match.
474 return VE::V30; // "v30"
475 case '1': // 1 string to match.
476 return VE::V31; // "v31"
477 case '2': // 1 string to match.
478 return VE::V32; // "v32"
479 case '3': // 1 string to match.
480 return VE::V33; // "v33"
481 case '4': // 1 string to match.
482 return VE::V34; // "v34"
483 case '5': // 1 string to match.
484 return VE::V35; // "v35"
485 case '6': // 1 string to match.
486 return VE::V36; // "v36"
487 case '7': // 1 string to match.
488 return VE::V37; // "v37"
489 case '8': // 1 string to match.
490 return VE::V38; // "v38"
491 case '9': // 1 string to match.
492 return VE::V39; // "v39"
493 }
494 break;
495 case '4': // 10 strings to match.
496 switch (Name[2]) {
497 default: break;
498 case '0': // 1 string to match.
499 return VE::V40; // "v40"
500 case '1': // 1 string to match.
501 return VE::V41; // "v41"
502 case '2': // 1 string to match.
503 return VE::V42; // "v42"
504 case '3': // 1 string to match.
505 return VE::V43; // "v43"
506 case '4': // 1 string to match.
507 return VE::V44; // "v44"
508 case '5': // 1 string to match.
509 return VE::V45; // "v45"
510 case '6': // 1 string to match.
511 return VE::V46; // "v46"
512 case '7': // 1 string to match.
513 return VE::V47; // "v47"
514 case '8': // 1 string to match.
515 return VE::V48; // "v48"
516 case '9': // 1 string to match.
517 return VE::V49; // "v49"
518 }
519 break;
520 case '5': // 10 strings to match.
521 switch (Name[2]) {
522 default: break;
523 case '0': // 1 string to match.
524 return VE::V50; // "v50"
525 case '1': // 1 string to match.
526 return VE::V51; // "v51"
527 case '2': // 1 string to match.
528 return VE::V52; // "v52"
529 case '3': // 1 string to match.
530 return VE::V53; // "v53"
531 case '4': // 1 string to match.
532 return VE::V54; // "v54"
533 case '5': // 1 string to match.
534 return VE::V55; // "v55"
535 case '6': // 1 string to match.
536 return VE::V56; // "v56"
537 case '7': // 1 string to match.
538 return VE::V57; // "v57"
539 case '8': // 1 string to match.
540 return VE::V58; // "v58"
541 case '9': // 1 string to match.
542 return VE::V59; // "v59"
543 }
544 break;
545 case '6': // 4 strings to match.
546 switch (Name[2]) {
547 default: break;
548 case '0': // 1 string to match.
549 return VE::V60; // "v60"
550 case '1': // 1 string to match.
551 return VE::V61; // "v61"
552 case '2': // 1 string to match.
553 return VE::V62; // "v62"
554 case '3': // 1 string to match.
555 return VE::V63; // "v63"
556 }
557 break;
558 case 'i': // 1 string to match.
559 if (Name[2] != 'x')
560 break;
561 return VE::VIX; // "vix"
562 case 'm': // 11 strings to match.
563 switch (Name[2]) {
564 default: break;
565 case '0': // 2 strings to match.
566 return VE::VM0; // "vm0"
567 case '1': // 1 string to match.
568 return VE::VM1; // "vm1"
569 case '2': // 1 string to match.
570 return VE::VM2; // "vm2"
571 case '3': // 1 string to match.
572 return VE::VM3; // "vm3"
573 case '4': // 1 string to match.
574 return VE::VM4; // "vm4"
575 case '5': // 1 string to match.
576 return VE::VM5; // "vm5"
577 case '6': // 1 string to match.
578 return VE::VM6; // "vm6"
579 case '7': // 1 string to match.
580 return VE::VM7; // "vm7"
581 case '8': // 1 string to match.
582 return VE::VM8; // "vm8"
583 case '9': // 1 string to match.
584 return VE::VM9; // "vm9"
585 }
586 break;
587 }
588 break;
589 }
590 break;
591 case 4: // 132 strings to match.
592 switch (Name[0]) {
593 default: break;
594 case 'p': // 11 strings to match.
595 if (Name[1] != 'm')
596 break;
597 switch (Name[2]) {
598 default: break;
599 case 'c': // 10 strings to match.
600 switch (Name[3]) {
601 default: break;
602 case '0': // 1 string to match.
603 return VE::PMC0; // "pmc0"
604 case '1': // 1 string to match.
605 return VE::PMC1; // "pmc1"
606 case '2': // 1 string to match.
607 return VE::PMC2; // "pmc2"
608 case '3': // 1 string to match.
609 return VE::PMC3; // "pmc3"
610 case '4': // 1 string to match.
611 return VE::PMC4; // "pmc4"
612 case '5': // 1 string to match.
613 return VE::PMC5; // "pmc5"
614 case '6': // 1 string to match.
615 return VE::PMC6; // "pmc6"
616 case '7': // 1 string to match.
617 return VE::PMC7; // "pmc7"
618 case '8': // 1 string to match.
619 return VE::PMC8; // "pmc8"
620 case '9': // 1 string to match.
621 return VE::PMC9; // "pmc9"
622 }
623 break;
624 case 'm': // 1 string to match.
625 if (Name[3] != 'r')
626 break;
627 return VE::PMMR; // "pmmr"
628 }
629 break;
630 case 's': // 108 strings to match.
631 switch (Name[1]) {
632 default: break;
633 case 'f': // 54 strings to match.
634 switch (Name[2]) {
635 default: break;
636 case '1': // 10 strings to match.
637 switch (Name[3]) {
638 default: break;
639 case '0': // 1 string to match.
640 return VE::SF10; // "sf10"
641 case '1': // 1 string to match.
642 return VE::SF11; // "sf11"
643 case '2': // 1 string to match.
644 return VE::SF12; // "sf12"
645 case '3': // 1 string to match.
646 return VE::SF13; // "sf13"
647 case '4': // 1 string to match.
648 return VE::SF14; // "sf14"
649 case '5': // 1 string to match.
650 return VE::SF15; // "sf15"
651 case '6': // 1 string to match.
652 return VE::SF16; // "sf16"
653 case '7': // 1 string to match.
654 return VE::SF17; // "sf17"
655 case '8': // 1 string to match.
656 return VE::SF18; // "sf18"
657 case '9': // 1 string to match.
658 return VE::SF19; // "sf19"
659 }
660 break;
661 case '2': // 10 strings to match.
662 switch (Name[3]) {
663 default: break;
664 case '0': // 1 string to match.
665 return VE::SF20; // "sf20"
666 case '1': // 1 string to match.
667 return VE::SF21; // "sf21"
668 case '2': // 1 string to match.
669 return VE::SF22; // "sf22"
670 case '3': // 1 string to match.
671 return VE::SF23; // "sf23"
672 case '4': // 1 string to match.
673 return VE::SF24; // "sf24"
674 case '5': // 1 string to match.
675 return VE::SF25; // "sf25"
676 case '6': // 1 string to match.
677 return VE::SF26; // "sf26"
678 case '7': // 1 string to match.
679 return VE::SF27; // "sf27"
680 case '8': // 1 string to match.
681 return VE::SF28; // "sf28"
682 case '9': // 1 string to match.
683 return VE::SF29; // "sf29"
684 }
685 break;
686 case '3': // 10 strings to match.
687 switch (Name[3]) {
688 default: break;
689 case '0': // 1 string to match.
690 return VE::SF30; // "sf30"
691 case '1': // 1 string to match.
692 return VE::SF31; // "sf31"
693 case '2': // 1 string to match.
694 return VE::SF32; // "sf32"
695 case '3': // 1 string to match.
696 return VE::SF33; // "sf33"
697 case '4': // 1 string to match.
698 return VE::SF34; // "sf34"
699 case '5': // 1 string to match.
700 return VE::SF35; // "sf35"
701 case '6': // 1 string to match.
702 return VE::SF36; // "sf36"
703 case '7': // 1 string to match.
704 return VE::SF37; // "sf37"
705 case '8': // 1 string to match.
706 return VE::SF38; // "sf38"
707 case '9': // 1 string to match.
708 return VE::SF39; // "sf39"
709 }
710 break;
711 case '4': // 10 strings to match.
712 switch (Name[3]) {
713 default: break;
714 case '0': // 1 string to match.
715 return VE::SF40; // "sf40"
716 case '1': // 1 string to match.
717 return VE::SF41; // "sf41"
718 case '2': // 1 string to match.
719 return VE::SF42; // "sf42"
720 case '3': // 1 string to match.
721 return VE::SF43; // "sf43"
722 case '4': // 1 string to match.
723 return VE::SF44; // "sf44"
724 case '5': // 1 string to match.
725 return VE::SF45; // "sf45"
726 case '6': // 1 string to match.
727 return VE::SF46; // "sf46"
728 case '7': // 1 string to match.
729 return VE::SF47; // "sf47"
730 case '8': // 1 string to match.
731 return VE::SF48; // "sf48"
732 case '9': // 1 string to match.
733 return VE::SF49; // "sf49"
734 }
735 break;
736 case '5': // 10 strings to match.
737 switch (Name[3]) {
738 default: break;
739 case '0': // 1 string to match.
740 return VE::SF50; // "sf50"
741 case '1': // 1 string to match.
742 return VE::SF51; // "sf51"
743 case '2': // 1 string to match.
744 return VE::SF52; // "sf52"
745 case '3': // 1 string to match.
746 return VE::SF53; // "sf53"
747 case '4': // 1 string to match.
748 return VE::SF54; // "sf54"
749 case '5': // 1 string to match.
750 return VE::SF55; // "sf55"
751 case '6': // 1 string to match.
752 return VE::SF56; // "sf56"
753 case '7': // 1 string to match.
754 return VE::SF57; // "sf57"
755 case '8': // 1 string to match.
756 return VE::SF58; // "sf58"
757 case '9': // 1 string to match.
758 return VE::SF59; // "sf59"
759 }
760 break;
761 case '6': // 4 strings to match.
762 switch (Name[3]) {
763 default: break;
764 case '0': // 1 string to match.
765 return VE::SF60; // "sf60"
766 case '1': // 1 string to match.
767 return VE::SF61; // "sf61"
768 case '2': // 1 string to match.
769 return VE::SF62; // "sf62"
770 case '3': // 1 string to match.
771 return VE::SF63; // "sf63"
772 }
773 break;
774 }
775 break;
776 case 'w': // 54 strings to match.
777 switch (Name[2]) {
778 default: break;
779 case '1': // 10 strings to match.
780 switch (Name[3]) {
781 default: break;
782 case '0': // 1 string to match.
783 return VE::SW10; // "sw10"
784 case '1': // 1 string to match.
785 return VE::SW11; // "sw11"
786 case '2': // 1 string to match.
787 return VE::SW12; // "sw12"
788 case '3': // 1 string to match.
789 return VE::SW13; // "sw13"
790 case '4': // 1 string to match.
791 return VE::SW14; // "sw14"
792 case '5': // 1 string to match.
793 return VE::SW15; // "sw15"
794 case '6': // 1 string to match.
795 return VE::SW16; // "sw16"
796 case '7': // 1 string to match.
797 return VE::SW17; // "sw17"
798 case '8': // 1 string to match.
799 return VE::SW18; // "sw18"
800 case '9': // 1 string to match.
801 return VE::SW19; // "sw19"
802 }
803 break;
804 case '2': // 10 strings to match.
805 switch (Name[3]) {
806 default: break;
807 case '0': // 1 string to match.
808 return VE::SW20; // "sw20"
809 case '1': // 1 string to match.
810 return VE::SW21; // "sw21"
811 case '2': // 1 string to match.
812 return VE::SW22; // "sw22"
813 case '3': // 1 string to match.
814 return VE::SW23; // "sw23"
815 case '4': // 1 string to match.
816 return VE::SW24; // "sw24"
817 case '5': // 1 string to match.
818 return VE::SW25; // "sw25"
819 case '6': // 1 string to match.
820 return VE::SW26; // "sw26"
821 case '7': // 1 string to match.
822 return VE::SW27; // "sw27"
823 case '8': // 1 string to match.
824 return VE::SW28; // "sw28"
825 case '9': // 1 string to match.
826 return VE::SW29; // "sw29"
827 }
828 break;
829 case '3': // 10 strings to match.
830 switch (Name[3]) {
831 default: break;
832 case '0': // 1 string to match.
833 return VE::SW30; // "sw30"
834 case '1': // 1 string to match.
835 return VE::SW31; // "sw31"
836 case '2': // 1 string to match.
837 return VE::SW32; // "sw32"
838 case '3': // 1 string to match.
839 return VE::SW33; // "sw33"
840 case '4': // 1 string to match.
841 return VE::SW34; // "sw34"
842 case '5': // 1 string to match.
843 return VE::SW35; // "sw35"
844 case '6': // 1 string to match.
845 return VE::SW36; // "sw36"
846 case '7': // 1 string to match.
847 return VE::SW37; // "sw37"
848 case '8': // 1 string to match.
849 return VE::SW38; // "sw38"
850 case '9': // 1 string to match.
851 return VE::SW39; // "sw39"
852 }
853 break;
854 case '4': // 10 strings to match.
855 switch (Name[3]) {
856 default: break;
857 case '0': // 1 string to match.
858 return VE::SW40; // "sw40"
859 case '1': // 1 string to match.
860 return VE::SW41; // "sw41"
861 case '2': // 1 string to match.
862 return VE::SW42; // "sw42"
863 case '3': // 1 string to match.
864 return VE::SW43; // "sw43"
865 case '4': // 1 string to match.
866 return VE::SW44; // "sw44"
867 case '5': // 1 string to match.
868 return VE::SW45; // "sw45"
869 case '6': // 1 string to match.
870 return VE::SW46; // "sw46"
871 case '7': // 1 string to match.
872 return VE::SW47; // "sw47"
873 case '8': // 1 string to match.
874 return VE::SW48; // "sw48"
875 case '9': // 1 string to match.
876 return VE::SW49; // "sw49"
877 }
878 break;
879 case '5': // 10 strings to match.
880 switch (Name[3]) {
881 default: break;
882 case '0': // 1 string to match.
883 return VE::SW50; // "sw50"
884 case '1': // 1 string to match.
885 return VE::SW51; // "sw51"
886 case '2': // 1 string to match.
887 return VE::SW52; // "sw52"
888 case '3': // 1 string to match.
889 return VE::SW53; // "sw53"
890 case '4': // 1 string to match.
891 return VE::SW54; // "sw54"
892 case '5': // 1 string to match.
893 return VE::SW55; // "sw55"
894 case '6': // 1 string to match.
895 return VE::SW56; // "sw56"
896 case '7': // 1 string to match.
897 return VE::SW57; // "sw57"
898 case '8': // 1 string to match.
899 return VE::SW58; // "sw58"
900 case '9': // 1 string to match.
901 return VE::SW59; // "sw59"
902 }
903 break;
904 case '6': // 4 strings to match.
905 switch (Name[3]) {
906 default: break;
907 case '0': // 1 string to match.
908 return VE::SW60; // "sw60"
909 case '1': // 1 string to match.
910 return VE::SW61; // "sw61"
911 case '2': // 1 string to match.
912 return VE::SW62; // "sw62"
913 case '3': // 1 string to match.
914 return VE::SW63; // "sw63"
915 }
916 break;
917 }
918 break;
919 }
920 break;
921 case 'v': // 13 strings to match.
922 if (Name[1] != 'm')
923 break;
924 switch (Name[2]) {
925 default: break;
926 case '1': // 6 strings to match.
927 switch (Name[3]) {
928 default: break;
929 case '0': // 1 string to match.
930 return VE::VM10; // "vm10"
931 case '1': // 1 string to match.
932 return VE::VM11; // "vm11"
933 case '2': // 1 string to match.
934 return VE::VM12; // "vm12"
935 case '3': // 1 string to match.
936 return VE::VM13; // "vm13"
937 case '4': // 1 string to match.
938 return VE::VM14; // "vm14"
939 case '5': // 1 string to match.
940 return VE::VM15; // "vm15"
941 }
942 break;
943 case 'p': // 7 strings to match.
944 switch (Name[3]) {
945 default: break;
946 case '1': // 1 string to match.
947 return VE::VMP1; // "vmp1"
948 case '2': // 1 string to match.
949 return VE::VMP2; // "vmp2"
950 case '3': // 1 string to match.
951 return VE::VMP3; // "vmp3"
952 case '4': // 1 string to match.
953 return VE::VMP4; // "vmp4"
954 case '5': // 1 string to match.
955 return VE::VMP5; // "vmp5"
956 case '6': // 1 string to match.
957 return VE::VMP6; // "vmp6"
958 case '7': // 1 string to match.
959 return VE::VMP7; // "vmp7"
960 }
961 break;
962 }
963 break;
964 }
965 break;
966 case 5: // 10 strings to match.
967 switch (Name[0]) {
968 default: break;
969 case 'p': // 9 strings to match.
970 if (memcmp(Name.data()+1, "mc", 2) != 0)
971 break;
972 switch (Name[3]) {
973 default: break;
974 case '1': // 5 strings to match.
975 switch (Name[4]) {
976 default: break;
977 case '0': // 1 string to match.
978 return VE::PMC10; // "pmc10"
979 case '1': // 1 string to match.
980 return VE::PMC11; // "pmc11"
981 case '2': // 1 string to match.
982 return VE::PMC12; // "pmc12"
983 case '3': // 1 string to match.
984 return VE::PMC13; // "pmc13"
985 case '4': // 1 string to match.
986 return VE::PMC14; // "pmc14"
987 }
988 break;
989 case 'r': // 4 strings to match.
990 switch (Name[4]) {
991 default: break;
992 case '0': // 1 string to match.
993 return VE::PMCR0; // "pmcr0"
994 case '1': // 1 string to match.
995 return VE::PMCR1; // "pmcr1"
996 case '2': // 1 string to match.
997 return VE::PMCR2; // "pmcr2"
998 case '3': // 1 string to match.
999 return VE::PMCR3; // "pmcr3"
1000 }
1001 break;
1002 }
1003 break;
1004 case 'u': // 1 string to match.
1005 if (memcmp(Name.data()+1, "srcc", 4) != 0)
1006 break;
1007 return VE::USRCC; // "usrcc"
1008 }
1009 break;
1010 }
1011 return VE::NoRegister;
1012}
1013
1014static MCRegister MatchRegisterAltName(StringRef Name) {
1015 switch (Name.size()) {
1016 default: break;
1017 case 2: // 50 strings to match.
1018 switch (Name[0]) {
1019 default: break;
1020 case 'f': // 1 string to match.
1021 if (Name[1] != 'p')
1022 break;
1023 return VE::SX9; // "fp"
1024 case 'l': // 1 string to match.
1025 if (Name[1] != 'r')
1026 break;
1027 return VE::SX10; // "lr"
1028 case 's': // 37 strings to match.
1029 switch (Name[1]) {
1030 default: break;
1031 case '0': // 4 strings to match.
1032 return VE::Q0; // "s0"
1033 case '1': // 3 strings to match.
1034 return VE::SF1; // "s1"
1035 case '2': // 4 strings to match.
1036 return VE::Q1; // "s2"
1037 case '3': // 3 strings to match.
1038 return VE::SF3; // "s3"
1039 case '4': // 4 strings to match.
1040 return VE::Q2; // "s4"
1041 case '5': // 3 strings to match.
1042 return VE::SF5; // "s5"
1043 case '6': // 4 strings to match.
1044 return VE::Q3; // "s6"
1045 case '7': // 3 strings to match.
1046 return VE::SF7; // "s7"
1047 case '8': // 4 strings to match.
1048 return VE::Q4; // "s8"
1049 case '9': // 3 strings to match.
1050 return VE::SF9; // "s9"
1051 case 'l': // 1 string to match.
1052 return VE::SX8; // "sl"
1053 case 'p': // 1 string to match.
1054 return VE::SX11; // "sp"
1055 }
1056 break;
1057 case 't': // 1 string to match.
1058 if (Name[1] != 'p')
1059 break;
1060 return VE::SX14; // "tp"
1061 case 'v': // 10 strings to match.
1062 switch (Name[1]) {
1063 default: break;
1064 case '0': // 1 string to match.
1065 return VE::V0; // "v0"
1066 case '1': // 1 string to match.
1067 return VE::V1; // "v1"
1068 case '2': // 1 string to match.
1069 return VE::V2; // "v2"
1070 case '3': // 1 string to match.
1071 return VE::V3; // "v3"
1072 case '4': // 1 string to match.
1073 return VE::V4; // "v4"
1074 case '5': // 1 string to match.
1075 return VE::V5; // "v5"
1076 case '6': // 1 string to match.
1077 return VE::V6; // "v6"
1078 case '7': // 1 string to match.
1079 return VE::V7; // "v7"
1080 case '8': // 1 string to match.
1081 return VE::V8; // "v8"
1082 case '9': // 1 string to match.
1083 return VE::V9; // "v9"
1084 }
1085 break;
1086 }
1087 break;
1088 case 3: // 261 strings to match.
1089 switch (Name[0]) {
1090 default: break;
1091 case 'g': // 1 string to match.
1092 if (memcmp(Name.data()+1, "ot", 2) != 0)
1093 break;
1094 return VE::SX15; // "got"
1095 case 'p': // 1 string to match.
1096 if (memcmp(Name.data()+1, "lt", 2) != 0)
1097 break;
1098 return VE::SX16; // "plt"
1099 case 's': // 189 strings to match.
1100 switch (Name[1]) {
1101 default: break;
1102 case '1': // 35 strings to match.
1103 switch (Name[2]) {
1104 default: break;
1105 case '0': // 4 strings to match.
1106 return VE::Q5; // "s10"
1107 case '1': // 3 strings to match.
1108 return VE::SF11; // "s11"
1109 case '2': // 4 strings to match.
1110 return VE::Q6; // "s12"
1111 case '3': // 3 strings to match.
1112 return VE::SF13; // "s13"
1113 case '4': // 4 strings to match.
1114 return VE::Q7; // "s14"
1115 case '5': // 3 strings to match.
1116 return VE::SF15; // "s15"
1117 case '6': // 4 strings to match.
1118 return VE::Q8; // "s16"
1119 case '7': // 3 strings to match.
1120 return VE::SF17; // "s17"
1121 case '8': // 4 strings to match.
1122 return VE::Q9; // "s18"
1123 case '9': // 3 strings to match.
1124 return VE::SF19; // "s19"
1125 }
1126 break;
1127 case '2': // 35 strings to match.
1128 switch (Name[2]) {
1129 default: break;
1130 case '0': // 4 strings to match.
1131 return VE::Q10; // "s20"
1132 case '1': // 3 strings to match.
1133 return VE::SF21; // "s21"
1134 case '2': // 4 strings to match.
1135 return VE::Q11; // "s22"
1136 case '3': // 3 strings to match.
1137 return VE::SF23; // "s23"
1138 case '4': // 4 strings to match.
1139 return VE::Q12; // "s24"
1140 case '5': // 3 strings to match.
1141 return VE::SF25; // "s25"
1142 case '6': // 4 strings to match.
1143 return VE::Q13; // "s26"
1144 case '7': // 3 strings to match.
1145 return VE::SF27; // "s27"
1146 case '8': // 4 strings to match.
1147 return VE::Q14; // "s28"
1148 case '9': // 3 strings to match.
1149 return VE::SF29; // "s29"
1150 }
1151 break;
1152 case '3': // 35 strings to match.
1153 switch (Name[2]) {
1154 default: break;
1155 case '0': // 4 strings to match.
1156 return VE::Q15; // "s30"
1157 case '1': // 3 strings to match.
1158 return VE::SF31; // "s31"
1159 case '2': // 4 strings to match.
1160 return VE::Q16; // "s32"
1161 case '3': // 3 strings to match.
1162 return VE::SF33; // "s33"
1163 case '4': // 4 strings to match.
1164 return VE::Q17; // "s34"
1165 case '5': // 3 strings to match.
1166 return VE::SF35; // "s35"
1167 case '6': // 4 strings to match.
1168 return VE::Q18; // "s36"
1169 case '7': // 3 strings to match.
1170 return VE::SF37; // "s37"
1171 case '8': // 4 strings to match.
1172 return VE::Q19; // "s38"
1173 case '9': // 3 strings to match.
1174 return VE::SF39; // "s39"
1175 }
1176 break;
1177 case '4': // 35 strings to match.
1178 switch (Name[2]) {
1179 default: break;
1180 case '0': // 4 strings to match.
1181 return VE::Q20; // "s40"
1182 case '1': // 3 strings to match.
1183 return VE::SF41; // "s41"
1184 case '2': // 4 strings to match.
1185 return VE::Q21; // "s42"
1186 case '3': // 3 strings to match.
1187 return VE::SF43; // "s43"
1188 case '4': // 4 strings to match.
1189 return VE::Q22; // "s44"
1190 case '5': // 3 strings to match.
1191 return VE::SF45; // "s45"
1192 case '6': // 4 strings to match.
1193 return VE::Q23; // "s46"
1194 case '7': // 3 strings to match.
1195 return VE::SF47; // "s47"
1196 case '8': // 4 strings to match.
1197 return VE::Q24; // "s48"
1198 case '9': // 3 strings to match.
1199 return VE::SF49; // "s49"
1200 }
1201 break;
1202 case '5': // 35 strings to match.
1203 switch (Name[2]) {
1204 default: break;
1205 case '0': // 4 strings to match.
1206 return VE::Q25; // "s50"
1207 case '1': // 3 strings to match.
1208 return VE::SF51; // "s51"
1209 case '2': // 4 strings to match.
1210 return VE::Q26; // "s52"
1211 case '3': // 3 strings to match.
1212 return VE::SF53; // "s53"
1213 case '4': // 4 strings to match.
1214 return VE::Q27; // "s54"
1215 case '5': // 3 strings to match.
1216 return VE::SF55; // "s55"
1217 case '6': // 4 strings to match.
1218 return VE::Q28; // "s56"
1219 case '7': // 3 strings to match.
1220 return VE::SF57; // "s57"
1221 case '8': // 4 strings to match.
1222 return VE::Q29; // "s58"
1223 case '9': // 3 strings to match.
1224 return VE::SF59; // "s59"
1225 }
1226 break;
1227 case '6': // 14 strings to match.
1228 switch (Name[2]) {
1229 default: break;
1230 case '0': // 4 strings to match.
1231 return VE::Q30; // "s60"
1232 case '1': // 3 strings to match.
1233 return VE::SF61; // "s61"
1234 case '2': // 4 strings to match.
1235 return VE::Q31; // "s62"
1236 case '3': // 3 strings to match.
1237 return VE::SF63; // "s63"
1238 }
1239 break;
1240 }
1241 break;
1242 case 'v': // 70 strings to match.
1243 switch (Name[1]) {
1244 default: break;
1245 case '1': // 10 strings to match.
1246 switch (Name[2]) {
1247 default: break;
1248 case '0': // 1 string to match.
1249 return VE::V10; // "v10"
1250 case '1': // 1 string to match.
1251 return VE::V11; // "v11"
1252 case '2': // 1 string to match.
1253 return VE::V12; // "v12"
1254 case '3': // 1 string to match.
1255 return VE::V13; // "v13"
1256 case '4': // 1 string to match.
1257 return VE::V14; // "v14"
1258 case '5': // 1 string to match.
1259 return VE::V15; // "v15"
1260 case '6': // 1 string to match.
1261 return VE::V16; // "v16"
1262 case '7': // 1 string to match.
1263 return VE::V17; // "v17"
1264 case '8': // 1 string to match.
1265 return VE::V18; // "v18"
1266 case '9': // 1 string to match.
1267 return VE::V19; // "v19"
1268 }
1269 break;
1270 case '2': // 10 strings to match.
1271 switch (Name[2]) {
1272 default: break;
1273 case '0': // 1 string to match.
1274 return VE::V20; // "v20"
1275 case '1': // 1 string to match.
1276 return VE::V21; // "v21"
1277 case '2': // 1 string to match.
1278 return VE::V22; // "v22"
1279 case '3': // 1 string to match.
1280 return VE::V23; // "v23"
1281 case '4': // 1 string to match.
1282 return VE::V24; // "v24"
1283 case '5': // 1 string to match.
1284 return VE::V25; // "v25"
1285 case '6': // 1 string to match.
1286 return VE::V26; // "v26"
1287 case '7': // 1 string to match.
1288 return VE::V27; // "v27"
1289 case '8': // 1 string to match.
1290 return VE::V28; // "v28"
1291 case '9': // 1 string to match.
1292 return VE::V29; // "v29"
1293 }
1294 break;
1295 case '3': // 10 strings to match.
1296 switch (Name[2]) {
1297 default: break;
1298 case '0': // 1 string to match.
1299 return VE::V30; // "v30"
1300 case '1': // 1 string to match.
1301 return VE::V31; // "v31"
1302 case '2': // 1 string to match.
1303 return VE::V32; // "v32"
1304 case '3': // 1 string to match.
1305 return VE::V33; // "v33"
1306 case '4': // 1 string to match.
1307 return VE::V34; // "v34"
1308 case '5': // 1 string to match.
1309 return VE::V35; // "v35"
1310 case '6': // 1 string to match.
1311 return VE::V36; // "v36"
1312 case '7': // 1 string to match.
1313 return VE::V37; // "v37"
1314 case '8': // 1 string to match.
1315 return VE::V38; // "v38"
1316 case '9': // 1 string to match.
1317 return VE::V39; // "v39"
1318 }
1319 break;
1320 case '4': // 10 strings to match.
1321 switch (Name[2]) {
1322 default: break;
1323 case '0': // 1 string to match.
1324 return VE::V40; // "v40"
1325 case '1': // 1 string to match.
1326 return VE::V41; // "v41"
1327 case '2': // 1 string to match.
1328 return VE::V42; // "v42"
1329 case '3': // 1 string to match.
1330 return VE::V43; // "v43"
1331 case '4': // 1 string to match.
1332 return VE::V44; // "v44"
1333 case '5': // 1 string to match.
1334 return VE::V45; // "v45"
1335 case '6': // 1 string to match.
1336 return VE::V46; // "v46"
1337 case '7': // 1 string to match.
1338 return VE::V47; // "v47"
1339 case '8': // 1 string to match.
1340 return VE::V48; // "v48"
1341 case '9': // 1 string to match.
1342 return VE::V49; // "v49"
1343 }
1344 break;
1345 case '5': // 10 strings to match.
1346 switch (Name[2]) {
1347 default: break;
1348 case '0': // 1 string to match.
1349 return VE::V50; // "v50"
1350 case '1': // 1 string to match.
1351 return VE::V51; // "v51"
1352 case '2': // 1 string to match.
1353 return VE::V52; // "v52"
1354 case '3': // 1 string to match.
1355 return VE::V53; // "v53"
1356 case '4': // 1 string to match.
1357 return VE::V54; // "v54"
1358 case '5': // 1 string to match.
1359 return VE::V55; // "v55"
1360 case '6': // 1 string to match.
1361 return VE::V56; // "v56"
1362 case '7': // 1 string to match.
1363 return VE::V57; // "v57"
1364 case '8': // 1 string to match.
1365 return VE::V58; // "v58"
1366 case '9': // 1 string to match.
1367 return VE::V59; // "v59"
1368 }
1369 break;
1370 case '6': // 4 strings to match.
1371 switch (Name[2]) {
1372 default: break;
1373 case '0': // 1 string to match.
1374 return VE::V60; // "v60"
1375 case '1': // 1 string to match.
1376 return VE::V61; // "v61"
1377 case '2': // 1 string to match.
1378 return VE::V62; // "v62"
1379 case '3': // 1 string to match.
1380 return VE::V63; // "v63"
1381 }
1382 break;
1383 case 'i': // 1 string to match.
1384 if (Name[2] != 'x')
1385 break;
1386 return VE::VIX; // "vix"
1387 case 'm': // 15 strings to match.
1388 switch (Name[2]) {
1389 default: break;
1390 case '0': // 2 strings to match.
1391 return VE::VM0; // "vm0"
1392 case '1': // 1 string to match.
1393 return VE::VM1; // "vm1"
1394 case '2': // 2 strings to match.
1395 return VE::VM2; // "vm2"
1396 case '3': // 1 string to match.
1397 return VE::VM3; // "vm3"
1398 case '4': // 2 strings to match.
1399 return VE::VM4; // "vm4"
1400 case '5': // 1 string to match.
1401 return VE::VM5; // "vm5"
1402 case '6': // 2 strings to match.
1403 return VE::VM6; // "vm6"
1404 case '7': // 1 string to match.
1405 return VE::VM7; // "vm7"
1406 case '8': // 2 strings to match.
1407 return VE::VM8; // "vm8"
1408 case '9': // 1 string to match.
1409 return VE::VM9; // "vm9"
1410 }
1411 break;
1412 }
1413 break;
1414 }
1415 break;
1416 case 4: // 9 strings to match.
1417 if (memcmp(Name.data()+0, "vm1", 3) != 0)
1418 break;
1419 switch (Name[3]) {
1420 default: break;
1421 case '0': // 2 strings to match.
1422 return VE::VM10; // "vm10"
1423 case '1': // 1 string to match.
1424 return VE::VM11; // "vm11"
1425 case '2': // 2 strings to match.
1426 return VE::VM12; // "vm12"
1427 case '3': // 1 string to match.
1428 return VE::VM13; // "vm13"
1429 case '4': // 2 strings to match.
1430 return VE::VM14; // "vm14"
1431 case '5': // 1 string to match.
1432 return VE::VM15; // "vm15"
1433 }
1434 break;
1435 }
1436 return VE::NoRegister;
1437}
1438
1439#endif // GET_REGISTER_MATCHER
1440
1441
1442#ifdef GET_SUBTARGET_FEATURE_NAME
1443#undef GET_SUBTARGET_FEATURE_NAME
1444
1445// User-level names for subtarget features that participate in
1446// instruction matching.
1447static const char *getSubtargetFeatureName(uint64_t Val) {
1448 return "(unknown)";
1449}
1450
1451#endif // GET_SUBTARGET_FEATURE_NAME
1452
1453
1454#ifdef GET_MATCHER_IMPLEMENTATION
1455#undef GET_MATCHER_IMPLEMENTATION
1456
1457static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) {
1458 switch (Mnemonic.size()) {
1459 default: break;
1460 case 4: // 1 string to match.
1461 if (memcmp(Mnemonic.data()+0, "vgtl", 4) != 0)
1462 break;
1463 Mnemonic = "vgtl.zx"; // "vgtl"
1464 return;
1465 case 6: // 12 strings to match.
1466 switch (Mnemonic[0]) {
1467 default: break;
1468 case 'c': // 4 strings to match.
1469 if (memcmp(Mnemonic.data()+1, "mov.", 4) != 0)
1470 break;
1471 switch (Mnemonic[5]) {
1472 default: break;
1473 case 'd': // 1 string to match.
1474 Mnemonic = "cmov.d.at"; // "cmov.d"
1475 return;
1476 case 'l': // 1 string to match.
1477 Mnemonic = "cmov.l.at"; // "cmov.l"
1478 return;
1479 case 's': // 1 string to match.
1480 Mnemonic = "cmov.s.at"; // "cmov.s"
1481 return;
1482 case 'w': // 1 string to match.
1483 Mnemonic = "cmov.w.at"; // "cmov.w"
1484 return;
1485 }
1486 break;
1487 case 'v': // 8 strings to match.
1488 switch (Mnemonic[1]) {
1489 default: break;
1490 case 'f': // 4 strings to match.
1491 if (memcmp(Mnemonic.data()+2, "mk.", 3) != 0)
1492 break;
1493 switch (Mnemonic[5]) {
1494 default: break;
1495 case 'd': // 1 string to match.
1496 Mnemonic = "vfmk.d.at"; // "vfmk.d"
1497 return;
1498 case 'l': // 1 string to match.
1499 Mnemonic = "vfmk.l.at"; // "vfmk.l"
1500 return;
1501 case 's': // 1 string to match.
1502 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s"
1503 return;
1504 case 'w': // 1 string to match.
1505 Mnemonic = "vfmk.w.at"; // "vfmk.w"
1506 return;
1507 }
1508 break;
1509 case 'm': // 1 string to match.
1510 if (memcmp(Mnemonic.data()+2, "rg.l", 4) != 0)
1511 break;
1512 Mnemonic = "vmrg"; // "vmrg.l"
1513 return;
1514 case 'r': // 1 string to match.
1515 if (memcmp(Mnemonic.data()+2, "cp.s", 4) != 0)
1516 break;
1517 Mnemonic = "pvrcp.up"; // "vrcp.s"
1518 return;
1519 case 's': // 2 strings to match.
1520 switch (Mnemonic[2]) {
1521 default: break;
1522 case 'l': // 1 string to match.
1523 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
1524 break;
1525 Mnemonic = "pvsla.lo"; // "vsla.w"
1526 return;
1527 case 'r': // 1 string to match.
1528 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
1529 break;
1530 Mnemonic = "pvsra.lo"; // "vsra.w"
1531 return;
1532 }
1533 break;
1534 }
1535 break;
1536 }
1537 break;
1538 case 7: // 19 strings to match.
1539 if (Mnemonic[0] != 'v')
1540 break;
1541 switch (Mnemonic[1]) {
1542 default: break;
1543 case 'a': // 2 strings to match.
1544 if (memcmp(Mnemonic.data()+2, "dd", 2) != 0)
1545 break;
1546 switch (Mnemonic[4]) {
1547 default: break;
1548 case 's': // 1 string to match.
1549 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1550 break;
1551 Mnemonic = "pvadds.lo"; // "vadds.w"
1552 return;
1553 case 'u': // 1 string to match.
1554 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1555 break;
1556 Mnemonic = "pvaddu.lo"; // "vaddu.w"
1557 return;
1558 }
1559 break;
1560 case 'c': // 2 strings to match.
1561 if (memcmp(Mnemonic.data()+2, "mp", 2) != 0)
1562 break;
1563 switch (Mnemonic[4]) {
1564 default: break;
1565 case 's': // 1 string to match.
1566 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1567 break;
1568 Mnemonic = "pvcmps.lo"; // "vcmps.w"
1569 return;
1570 case 'u': // 1 string to match.
1571 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1572 break;
1573 Mnemonic = "pvcmpu.lo"; // "vcmpu.w"
1574 return;
1575 }
1576 break;
1577 case 'd': // 1 string to match.
1578 if (memcmp(Mnemonic.data()+2, "ivs.w", 5) != 0)
1579 break;
1580 Mnemonic = "vdivs.w.zx"; // "vdivs.w"
1581 return;
1582 case 'f': // 8 strings to match.
1583 switch (Mnemonic[2]) {
1584 default: break;
1585 case 'a': // 1 string to match.
1586 if (memcmp(Mnemonic.data()+3, "dd.s", 4) != 0)
1587 break;
1588 Mnemonic = "pvfadd.up"; // "vfadd.s"
1589 return;
1590 case 'c': // 1 string to match.
1591 if (memcmp(Mnemonic.data()+3, "mp.s", 4) != 0)
1592 break;
1593 Mnemonic = "pvfcmp.up"; // "vfcmp.s"
1594 return;
1595 case 'm': // 5 strings to match.
1596 switch (Mnemonic[3]) {
1597 default: break;
1598 case 'a': // 2 strings to match.
1599 switch (Mnemonic[4]) {
1600 default: break;
1601 case 'd': // 1 string to match.
1602 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
1603 break;
1604 Mnemonic = "pvfmad.up"; // "vfmad.s"
1605 return;
1606 case 'x': // 1 string to match.
1607 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
1608 break;
1609 Mnemonic = "pvfmax.up"; // "vfmax.s"
1610 return;
1611 }
1612 break;
1613 case 'i': // 1 string to match.
1614 if (memcmp(Mnemonic.data()+4, "n.s", 3) != 0)
1615 break;
1616 Mnemonic = "pvfmin.up"; // "vfmin.s"
1617 return;
1618 case 's': // 1 string to match.
1619 if (memcmp(Mnemonic.data()+4, "b.s", 3) != 0)
1620 break;
1621 Mnemonic = "pvfmsb.up"; // "vfmsb.s"
1622 return;
1623 case 'u': // 1 string to match.
1624 if (memcmp(Mnemonic.data()+4, "l.s", 3) != 0)
1625 break;
1626 Mnemonic = "pvfmul.up"; // "vfmul.s"
1627 return;
1628 }
1629 break;
1630 case 's': // 1 string to match.
1631 if (memcmp(Mnemonic.data()+3, "ub.s", 4) != 0)
1632 break;
1633 Mnemonic = "pvfsub.up"; // "vfsub.s"
1634 return;
1635 }
1636 break;
1637 case 'g': // 1 string to match.
1638 if (memcmp(Mnemonic.data()+2, "tl.nc", 5) != 0)
1639 break;
1640 Mnemonic = "vgtl.zx.nc"; // "vgtl.nc"
1641 return;
1642 case 'm': // 3 strings to match.
1643 switch (Mnemonic[2]) {
1644 default: break;
1645 case 'a': // 1 string to match.
1646 if (memcmp(Mnemonic.data()+3, "xs.w", 4) != 0)
1647 break;
1648 Mnemonic = "pvmaxs.lo"; // "vmaxs.w"
1649 return;
1650 case 'i': // 1 string to match.
1651 if (memcmp(Mnemonic.data()+3, "ns.w", 4) != 0)
1652 break;
1653 Mnemonic = "pvmins.lo"; // "vmins.w"
1654 return;
1655 case 'u': // 1 string to match.
1656 if (memcmp(Mnemonic.data()+3, "ls.w", 4) != 0)
1657 break;
1658 Mnemonic = "vmuls.w.zx"; // "vmuls.w"
1659 return;
1660 }
1661 break;
1662 case 's': // 2 strings to match.
1663 if (memcmp(Mnemonic.data()+2, "ub", 2) != 0)
1664 break;
1665 switch (Mnemonic[4]) {
1666 default: break;
1667 case 's': // 1 string to match.
1668 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1669 break;
1670 Mnemonic = "pvsubs.lo"; // "vsubs.w"
1671 return;
1672 case 'u': // 1 string to match.
1673 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1674 break;
1675 Mnemonic = "pvsubu.lo"; // "vsubu.w"
1676 return;
1677 }
1678 break;
1679 }
1680 break;
1681 case 8: // 3 strings to match.
1682 if (Mnemonic[0] != 'v')
1683 break;
1684 switch (Mnemonic[1]) {
1685 default: break;
1686 case 'f': // 2 strings to match.
1687 if (memcmp(Mnemonic.data()+2, "nm", 2) != 0)
1688 break;
1689 switch (Mnemonic[4]) {
1690 default: break;
1691 case 'a': // 1 string to match.
1692 if (memcmp(Mnemonic.data()+5, "d.s", 3) != 0)
1693 break;
1694 Mnemonic = "pvfnmad.up"; // "vfnmad.s"
1695 return;
1696 case 's': // 1 string to match.
1697 if (memcmp(Mnemonic.data()+5, "b.s", 3) != 0)
1698 break;
1699 Mnemonic = "pvfnmsb.up"; // "vfnmsb.s"
1700 return;
1701 }
1702 break;
1703 case 'r': // 1 string to match.
1704 if (memcmp(Mnemonic.data()+2, "sqrt.s", 6) != 0)
1705 break;
1706 Mnemonic = "pvrsqrt.up"; // "vrsqrt.s"
1707 return;
1708 }
1709 break;
1710 case 9: // 10 strings to match.
1711 if (Mnemonic[0] != 'v')
1712 break;
1713 switch (Mnemonic[1]) {
1714 default: break;
1715 case 'f': // 8 strings to match.
1716 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
1717 break;
1718 switch (Mnemonic[7]) {
1719 default: break;
1720 case 'a': // 2 strings to match.
1721 switch (Mnemonic[8]) {
1722 default: break;
1723 case 'f': // 1 string to match.
1724 Mnemonic = "pvfmk.s.up.af"; // "vfmk.s.af"
1725 return;
1726 case 't': // 1 string to match.
1727 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s.at"
1728 return;
1729 }
1730 break;
1731 case 'e': // 1 string to match.
1732 if (Mnemonic[8] != 'q')
1733 break;
1734 Mnemonic = "pvfmk.s.up.eq"; // "vfmk.s.eq"
1735 return;
1736 case 'g': // 2 strings to match.
1737 switch (Mnemonic[8]) {
1738 default: break;
1739 case 'e': // 1 string to match.
1740 Mnemonic = "pvfmk.s.up.ge"; // "vfmk.s.ge"
1741 return;
1742 case 't': // 1 string to match.
1743 Mnemonic = "pvfmk.s.up.gt"; // "vfmk.s.gt"
1744 return;
1745 }
1746 break;
1747 case 'l': // 2 strings to match.
1748 switch (Mnemonic[8]) {
1749 default: break;
1750 case 'e': // 1 string to match.
1751 Mnemonic = "pvfmk.s.up.le"; // "vfmk.s.le"
1752 return;
1753 case 't': // 1 string to match.
1754 Mnemonic = "pvfmk.s.up.lt"; // "vfmk.s.lt"
1755 return;
1756 }
1757 break;
1758 case 'n': // 1 string to match.
1759 if (Mnemonic[8] != 'e')
1760 break;
1761 Mnemonic = "pvfmk.s.up.ne"; // "vfmk.s.ne"
1762 return;
1763 }
1764 break;
1765 case 's': // 2 strings to match.
1766 switch (Mnemonic[2]) {
1767 default: break;
1768 case 'l': // 1 string to match.
1769 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
1770 break;
1771 Mnemonic = "pvsla.lo"; // "vsla.w.zx"
1772 return;
1773 case 'r': // 1 string to match.
1774 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
1775 break;
1776 Mnemonic = "pvsra.lo"; // "vsra.w.zx"
1777 return;
1778 }
1779 break;
1780 }
1781 break;
1782 case 10: // 11 strings to match.
1783 switch (Mnemonic[0]) {
1784 default: break;
1785 case 'p': // 4 strings to match.
1786 if (memcmp(Mnemonic.data()+1, "vfmk.", 5) != 0)
1787 break;
1788 switch (Mnemonic[6]) {
1789 default: break;
1790 case 's': // 2 strings to match.
1791 if (Mnemonic[7] != '.')
1792 break;
1793 switch (Mnemonic[8]) {
1794 default: break;
1795 case 'l': // 1 string to match.
1796 if (Mnemonic[9] != 'o')
1797 break;
1798 Mnemonic = "pvfmk.s.lo.at"; // "pvfmk.s.lo"
1799 return;
1800 case 'u': // 1 string to match.
1801 if (Mnemonic[9] != 'p')
1802 break;
1803 Mnemonic = "pvfmk.s.up.at"; // "pvfmk.s.up"
1804 return;
1805 }
1806 break;
1807 case 'w': // 2 strings to match.
1808 if (Mnemonic[7] != '.')
1809 break;
1810 switch (Mnemonic[8]) {
1811 default: break;
1812 case 'l': // 1 string to match.
1813 if (Mnemonic[9] != 'o')
1814 break;
1815 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo"
1816 return;
1817 case 'u': // 1 string to match.
1818 if (Mnemonic[9] != 'p')
1819 break;
1820 Mnemonic = "pvfmk.w.up.at"; // "pvfmk.w.up"
1821 return;
1822 }
1823 break;
1824 }
1825 break;
1826 case 'v': // 7 strings to match.
1827 switch (Mnemonic[1]) {
1828 default: break;
1829 case 'a': // 1 string to match.
1830 if (memcmp(Mnemonic.data()+2, "dds.w.zx", 8) != 0)
1831 break;
1832 Mnemonic = "pvadds.lo"; // "vadds.w.zx"
1833 return;
1834 case 'c': // 1 string to match.
1835 if (memcmp(Mnemonic.data()+2, "mps.w.zx", 8) != 0)
1836 break;
1837 Mnemonic = "pvcmps.lo"; // "vcmps.w.zx"
1838 return;
1839 case 'f': // 2 strings to match.
1840 if (memcmp(Mnemonic.data()+2, "mk.s.n", 6) != 0)
1841 break;
1842 switch (Mnemonic[8]) {
1843 default: break;
1844 case 'a': // 1 string to match.
1845 if (Mnemonic[9] != 'n')
1846 break;
1847 Mnemonic = "pvfmk.s.up.nan"; // "vfmk.s.nan"
1848 return;
1849 case 'u': // 1 string to match.
1850 if (Mnemonic[9] != 'm')
1851 break;
1852 Mnemonic = "pvfmk.s.up.num"; // "vfmk.s.num"
1853 return;
1854 }
1855 break;
1856 case 'm': // 2 strings to match.
1857 switch (Mnemonic[2]) {
1858 default: break;
1859 case 'a': // 1 string to match.
1860 if (memcmp(Mnemonic.data()+3, "xs.w.zx", 7) != 0)
1861 break;
1862 Mnemonic = "pvmaxs.lo"; // "vmaxs.w.zx"
1863 return;
1864 case 'i': // 1 string to match.
1865 if (memcmp(Mnemonic.data()+3, "ns.w.zx", 7) != 0)
1866 break;
1867 Mnemonic = "pvmins.lo"; // "vmins.w.zx"
1868 return;
1869 }
1870 break;
1871 case 's': // 1 string to match.
1872 if (memcmp(Mnemonic.data()+2, "ubs.w.zx", 8) != 0)
1873 break;
1874 Mnemonic = "pvsubs.lo"; // "vsubs.w.zx"
1875 return;
1876 }
1877 break;
1878 }
1879 break;
1880 case 11: // 4 strings to match.
1881 if (memcmp(Mnemonic.data()+0, "pvs", 3) != 0)
1882 break;
1883 switch (Mnemonic[3]) {
1884 default: break;
1885 case 'l': // 2 strings to match.
1886 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
1887 break;
1888 switch (Mnemonic[9]) {
1889 default: break;
1890 case 's': // 1 string to match.
1891 if (Mnemonic[10] != 'x')
1892 break;
1893 Mnemonic = "vsla.w.sx"; // "pvsla.lo.sx"
1894 return;
1895 case 'z': // 1 string to match.
1896 if (Mnemonic[10] != 'x')
1897 break;
1898 Mnemonic = "pvsla.lo"; // "pvsla.lo.zx"
1899 return;
1900 }
1901 break;
1902 case 'r': // 2 strings to match.
1903 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
1904 break;
1905 switch (Mnemonic[9]) {
1906 default: break;
1907 case 's': // 1 string to match.
1908 if (Mnemonic[10] != 'x')
1909 break;
1910 Mnemonic = "vsra.w.sx"; // "pvsra.lo.sx"
1911 return;
1912 case 'z': // 1 string to match.
1913 if (Mnemonic[10] != 'x')
1914 break;
1915 Mnemonic = "pvsra.lo"; // "pvsra.lo.zx"
1916 return;
1917 }
1918 break;
1919 }
1920 break;
1921 case 12: // 17 strings to match.
1922 switch (Mnemonic[0]) {
1923 default: break;
1924 case 'p': // 10 strings to match.
1925 if (Mnemonic[1] != 'v')
1926 break;
1927 switch (Mnemonic[2]) {
1928 default: break;
1929 case 'a': // 2 strings to match.
1930 if (memcmp(Mnemonic.data()+3, "dds.lo.", 7) != 0)
1931 break;
1932 switch (Mnemonic[10]) {
1933 default: break;
1934 case 's': // 1 string to match.
1935 if (Mnemonic[11] != 'x')
1936 break;
1937 Mnemonic = "vadds.w.sx"; // "pvadds.lo.sx"
1938 return;
1939 case 'z': // 1 string to match.
1940 if (Mnemonic[11] != 'x')
1941 break;
1942 Mnemonic = "pvadds.lo"; // "pvadds.lo.zx"
1943 return;
1944 }
1945 break;
1946 case 'c': // 2 strings to match.
1947 if (memcmp(Mnemonic.data()+3, "mps.lo.", 7) != 0)
1948 break;
1949 switch (Mnemonic[10]) {
1950 default: break;
1951 case 's': // 1 string to match.
1952 if (Mnemonic[11] != 'x')
1953 break;
1954 Mnemonic = "vcmps.w.sx"; // "pvcmps.lo.sx"
1955 return;
1956 case 'z': // 1 string to match.
1957 if (Mnemonic[11] != 'x')
1958 break;
1959 Mnemonic = "pvcmps.lo"; // "pvcmps.lo.zx"
1960 return;
1961 }
1962 break;
1963 case 'm': // 4 strings to match.
1964 switch (Mnemonic[3]) {
1965 default: break;
1966 case 'a': // 2 strings to match.
1967 if (memcmp(Mnemonic.data()+4, "xs.lo.", 6) != 0)
1968 break;
1969 switch (Mnemonic[10]) {
1970 default: break;
1971 case 's': // 1 string to match.
1972 if (Mnemonic[11] != 'x')
1973 break;
1974 Mnemonic = "vmaxs.w.sx"; // "pvmaxs.lo.sx"
1975 return;
1976 case 'z': // 1 string to match.
1977 if (Mnemonic[11] != 'x')
1978 break;
1979 Mnemonic = "pvmaxs.lo"; // "pvmaxs.lo.zx"
1980 return;
1981 }
1982 break;
1983 case 'i': // 2 strings to match.
1984 if (memcmp(Mnemonic.data()+4, "ns.lo.", 6) != 0)
1985 break;
1986 switch (Mnemonic[10]) {
1987 default: break;
1988 case 's': // 1 string to match.
1989 if (Mnemonic[11] != 'x')
1990 break;
1991 Mnemonic = "vmins.w.sx"; // "pvmins.lo.sx"
1992 return;
1993 case 'z': // 1 string to match.
1994 if (Mnemonic[11] != 'x')
1995 break;
1996 Mnemonic = "pvmins.lo"; // "pvmins.lo.zx"
1997 return;
1998 }
1999 break;
2000 }
2001 break;
2002 case 's': // 2 strings to match.
2003 if (memcmp(Mnemonic.data()+3, "ubs.lo.", 7) != 0)
2004 break;
2005 switch (Mnemonic[10]) {
2006 default: break;
2007 case 's': // 1 string to match.
2008 if (Mnemonic[11] != 'x')
2009 break;
2010 Mnemonic = "vsubs.w.sx"; // "pvsubs.lo.sx"
2011 return;
2012 case 'z': // 1 string to match.
2013 if (Mnemonic[11] != 'x')
2014 break;
2015 Mnemonic = "pvsubs.lo"; // "pvsubs.lo.zx"
2016 return;
2017 }
2018 break;
2019 }
2020 break;
2021 case 'v': // 7 strings to match.
2022 switch (Mnemonic[1]) {
2023 default: break;
2024 case 'f': // 6 strings to match.
2025 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
2026 break;
2027 switch (Mnemonic[7]) {
2028 default: break;
2029 case 'e': // 1 string to match.
2030 if (memcmp(Mnemonic.data()+8, "qnan", 4) != 0)
2031 break;
2032 Mnemonic = "pvfmk.s.up.eqnan"; // "vfmk.s.eqnan"
2033 return;
2034 case 'g': // 2 strings to match.
2035 switch (Mnemonic[8]) {
2036 default: break;
2037 case 'e': // 1 string to match.
2038 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2039 break;
2040 Mnemonic = "pvfmk.s.up.genan"; // "vfmk.s.genan"
2041 return;
2042 case 't': // 1 string to match.
2043 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2044 break;
2045 Mnemonic = "pvfmk.s.up.gtnan"; // "vfmk.s.gtnan"
2046 return;
2047 }
2048 break;
2049 case 'l': // 2 strings to match.
2050 switch (Mnemonic[8]) {
2051 default: break;
2052 case 'e': // 1 string to match.
2053 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2054 break;
2055 Mnemonic = "pvfmk.s.up.lenan"; // "vfmk.s.lenan"
2056 return;
2057 case 't': // 1 string to match.
2058 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2059 break;
2060 Mnemonic = "pvfmk.s.up.ltnan"; // "vfmk.s.ltnan"
2061 return;
2062 }
2063 break;
2064 case 'n': // 1 string to match.
2065 if (memcmp(Mnemonic.data()+8, "enan", 4) != 0)
2066 break;
2067 Mnemonic = "pvfmk.s.up.nenan"; // "vfmk.s.nenan"
2068 return;
2069 }
2070 break;
2071 case 'r': // 1 string to match.
2072 if (memcmp(Mnemonic.data()+2, "sqrt.s.nex", 10) != 0)
2073 break;
2074 Mnemonic = "pvrsqrt.up.nex"; // "vrsqrt.s.nex"
2075 return;
2076 }
2077 break;
2078 }
2079 break;
2080 case 13: // 8 strings to match.
2081 if (memcmp(Mnemonic.data()+0, "pvfmk.w.lo.", 11) != 0)
2082 break;
2083 switch (Mnemonic[11]) {
2084 default: break;
2085 case 'a': // 2 strings to match.
2086 switch (Mnemonic[12]) {
2087 default: break;
2088 case 'f': // 1 string to match.
2089 Mnemonic = "vfmk.w.af"; // "pvfmk.w.lo.af"
2090 return;
2091 case 't': // 1 string to match.
2092 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo.at"
2093 return;
2094 }
2095 break;
2096 case 'e': // 1 string to match.
2097 if (Mnemonic[12] != 'q')
2098 break;
2099 Mnemonic = "vfmk.w.eq"; // "pvfmk.w.lo.eq"
2100 return;
2101 case 'g': // 2 strings to match.
2102 switch (Mnemonic[12]) {
2103 default: break;
2104 case 'e': // 1 string to match.
2105 Mnemonic = "vfmk.w.ge"; // "pvfmk.w.lo.ge"
2106 return;
2107 case 't': // 1 string to match.
2108 Mnemonic = "vfmk.w.gt"; // "pvfmk.w.lo.gt"
2109 return;
2110 }
2111 break;
2112 case 'l': // 2 strings to match.
2113 switch (Mnemonic[12]) {
2114 default: break;
2115 case 'e': // 1 string to match.
2116 Mnemonic = "vfmk.w.le"; // "pvfmk.w.lo.le"
2117 return;
2118 case 't': // 1 string to match.
2119 Mnemonic = "vfmk.w.lt"; // "pvfmk.w.lo.lt"
2120 return;
2121 }
2122 break;
2123 case 'n': // 1 string to match.
2124 if (Mnemonic[12] != 'e')
2125 break;
2126 Mnemonic = "vfmk.w.ne"; // "pvfmk.w.lo.ne"
2127 return;
2128 }
2129 break;
2130 }
2131}
2132
2133enum {
2134 Tie0_1_1,
2135};
2136
2137static const uint8_t TiedAsmOperandTable[][3] = {
2138 /* Tie0_1_1 */ { 0, 1, 1 },
2139};
2140
2141namespace {
2142enum OperatorConversionKind {
2143 CVT_Done,
2144 CVT_Reg,
2145 CVT_Tied,
2146 CVT_95_Reg,
2147 CVT_95_addMImmOperands,
2148 CVT_95_addSImm7Operands,
2149 CVT_95_addMEMriOperands,
2150 CVT_95_addUImm0to2Operands,
2151 CVT_95_addMEMziOperands,
2152 CVT_95_addCCOpOperands,
2153 CVT_95_addImmOperands,
2154 CVT_95_addZeroOperands,
2155 CVT_95_addMEMriiOperands,
2156 CVT_95_addMEMrriOperands,
2157 CVT_95_addMEMziiOperands,
2158 CVT_95_addMEMzriOperands,
2159 CVT_95_addUImm1Operands,
2160 CVT_95_addRDOpOperands,
2161 CVT_95_addUImm3Operands,
2162 CVT_95_addUImm2Operands,
2163 CVT_95_addUImm6Operands,
2164 CVT_95_addUImm7Operands,
2165 CVT_95_addUImm4Operands,
2166 CVT_NUM_CONVERTERS
2167};
2168
2169enum InstructionConversionKind {
2170 Convert__Reg1_0__Reg1_1__Reg1_2,
2171 Convert__Reg1_0__Reg1_1__MImm1_2,
2172 Convert__Reg1_0__Reg1_2__SImm71_1,
2173 Convert__Reg1_0__SImm71_1__MImm1_2,
2174 Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1,
2175 Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1,
2176 Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1,
2177 Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1,
2178 Convert__CCOp1_0__Reg1_2__MEMri2_3,
2179 Convert__CCOp1_0__Reg1_2__MEMzi2_3,
2180 Convert__CCOp1_0__SImm71_2__MEMri2_3,
2181 Convert__CCOp1_0__SImm71_2__MEMzi2_3,
2182 Convert__MEMri2_0,
2183 Convert__MEMzi2_0,
2184 Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4,
2185 Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4,
2186 Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4,
2187 Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4,
2188 Convert__Imm1_0,
2189 Convert__Reg1_0__Reg1_1,
2190 Convert__Reg1_0__MImm1_1,
2191 Convert__Reg1_0__MEMrii3_1,
2192 Convert__Reg1_0__MEMrri3_1,
2193 Convert__Reg1_0__MEMzii3_1,
2194 Convert__Reg1_0__MEMzri3_1,
2195 Convert__Reg1_0__Reg1_1__UImm11_2,
2196 Convert__Reg1_0__MImm1_1__UImm11_2,
2197 Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1,
2198 Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1,
2199 Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1,
2200 Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1,
2201 Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1,
2202 Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1,
2203 Convert__Reg1_0__SImm71_1__Reg1_2,
2204 Convert__Reg1_0__SImm71_1,
2205 Convert__Reg1_1__RDOp1_0__Reg1_2,
2206 Convert__Reg1_1__RDOp1_0__SImm71_2,
2207 Convert__UImm31_0,
2208 Convert_NoOperands,
2209 Convert__UImm21_0,
2210 Convert__Reg1_0__Reg1_1__UImm31_2,
2211 Convert__Reg1_0__SImm71_1__UImm31_2,
2212 Convert__Reg1_0__Reg1_1__Zero1_2,
2213 Convert__Reg1_0__SImm71_1__Zero1_2,
2214 Convert__Reg1_0,
2215 Convert__UImm61_0,
2216 Convert__Reg1_0__MEMri2_1,
2217 Convert__Reg1_0__MEMzi2_1,
2218 Convert__Reg1_0__Reg1_2__Reg1_4,
2219 Convert__Reg1_0__Reg1_2__MImm1_4,
2220 Convert__Reg1_0__UImm71_2__Reg1_4,
2221 Convert__Reg1_0__UImm71_2__MImm1_4,
2222 Convert__SImm71_0,
2223 Convert__Reg1_0__UImm21_1__Reg1_2,
2224 Convert__Reg1_0__UImm21_1__MImm1_2,
2225 Convert__Reg1_0__Reg1_1__Reg1_3,
2226 Convert__Reg1_0__Reg1_1__UImm71_3,
2227 Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1,
2228 Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1,
2229 Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1,
2230 Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1,
2231 Convert__MEMrii3_0,
2232 Convert__MEMrri3_0,
2233 Convert__MEMzii3_0,
2234 Convert__MEMzri3_0,
2235 Convert__Reg1_0__Zero1_1,
2236 Convert__SImm71_0__Reg1_1,
2237 Convert__SImm71_0__Zero1_1,
2238 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2239 Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3,
2240 Convert__Reg1_0__MImm1_1__Reg1_2,
2241 Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3,
2242 Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3,
2243 Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3,
2244 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4,
2245 Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4,
2246 Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4,
2247 Convert__Reg1_1__CCOp1_0__Reg1_2,
2248 Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3,
2249 Convert__Reg1_0__Reg1_1__UImm71_2,
2250 Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3,
2251 Convert__Reg1_1__Reg1_2__Reg1_0,
2252 Convert__Reg1_1__Zero1_2__Reg1_0,
2253 Convert__SImm71_1__Reg1_2__Reg1_0,
2254 Convert__SImm71_1__Zero1_2__Reg1_0,
2255 Convert__MEMri2_1__Reg1_0,
2256 Convert__MEMzi2_1__Reg1_0,
2257 Convert__Reg1_0__MImm1_1__UImm71_2,
2258 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
2259 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2,
2260 Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2,
2261 Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2,
2262 Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2,
2263 Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2,
2264 Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2,
2265 Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2,
2266 Convert__MEMrii3_1__Reg1_0,
2267 Convert__MEMrri3_1__Reg1_0,
2268 Convert__MEMzii3_1__Reg1_0,
2269 Convert__MEMzri3_1__Reg1_0,
2270 Convert__Reg1_0__Reg1_1__UImm21_2,
2271 Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1,
2272 Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1,
2273 Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1,
2274 Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1,
2275 Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1,
2276 Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1,
2277 Convert__Reg1_0__Reg1_1__SImm71_2,
2278 Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3,
2279 Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3,
2280 Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3,
2281 Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4,
2282 Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4,
2283 Convert__Reg1_0__UImm71_1__Reg1_2,
2284 Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3,
2285 Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0,
2286 Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0,
2287 Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0,
2288 Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0,
2289 Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4,
2290 Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4,
2291 Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4,
2292 Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4,
2293 Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3,
2294 Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3,
2295 Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3,
2296 Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4,
2297 Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4,
2298 Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4,
2299 Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3,
2300 Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5,
2301 Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5,
2302 Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6,
2303 Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6,
2304 Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3,
2305 Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3,
2306 Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3,
2307 Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3,
2308 CVT_NUM_SIGNATURES
2309};
2310
2311} // end anonymous namespace
2312
2313static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
2314 // Convert__Reg1_0__Reg1_1__Reg1_2
2315 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
2316 // Convert__Reg1_0__Reg1_1__MImm1_2
2317 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMImmOperands, 3, CVT_Done },
2318 // Convert__Reg1_0__Reg1_2__SImm71_1
2319 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addSImm7Operands, 2, CVT_Done },
2320 // Convert__Reg1_0__SImm71_1__MImm1_2
2321 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addMImmOperands, 3, CVT_Done },
2322 // Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1
2323 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2324 // Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1
2325 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm0to2Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2326 // Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1
2327 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2328 // Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1
2329 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm0to2Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2330 // Convert__CCOp1_0__Reg1_2__MEMri2_3
2331 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addMEMriOperands, 4, CVT_Done },
2332 // Convert__CCOp1_0__Reg1_2__MEMzi2_3
2333 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addMEMziOperands, 4, CVT_Done },
2334 // Convert__CCOp1_0__SImm71_2__MEMri2_3
2335 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addMEMriOperands, 4, CVT_Done },
2336 // Convert__CCOp1_0__SImm71_2__MEMzi2_3
2337 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addMEMziOperands, 4, CVT_Done },
2338 // Convert__MEMri2_0
2339 { CVT_95_addMEMriOperands, 1, CVT_Done },
2340 // Convert__MEMzi2_0
2341 { CVT_95_addMEMziOperands, 1, CVT_Done },
2342 // Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4
2343 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
2344 // Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4
2345 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
2346 // Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4
2347 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
2348 // Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4
2349 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
2350 // Convert__Imm1_0
2351 { CVT_95_addImmOperands, 1, CVT_Done },
2352 // Convert__Reg1_0__Reg1_1
2353 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
2354 // Convert__Reg1_0__MImm1_1
2355 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Done },
2356 // Convert__Reg1_0__MEMrii3_1
2357 { CVT_95_Reg, 1, CVT_95_addMEMriiOperands, 2, CVT_Done },
2358 // Convert__Reg1_0__MEMrri3_1
2359 { CVT_95_Reg, 1, CVT_95_addMEMrriOperands, 2, CVT_Done },
2360 // Convert__Reg1_0__MEMzii3_1
2361 { CVT_95_Reg, 1, CVT_95_addMEMziiOperands, 2, CVT_Done },
2362 // Convert__Reg1_0__MEMzri3_1
2363 { CVT_95_Reg, 1, CVT_95_addMEMzriOperands, 2, CVT_Done },
2364 // Convert__Reg1_0__Reg1_1__UImm11_2
2365 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm1Operands, 3, CVT_Done },
2366 // Convert__Reg1_0__MImm1_1__UImm11_2
2367 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Done },
2368 // Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1
2369 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addSImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2370 // Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1
2371 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addSImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2372 // Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1
2373 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2374 // Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1
2375 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2376 // Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1
2377 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 4, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2378 // Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1
2379 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 4, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2380 // Convert__Reg1_0__SImm71_1__Reg1_2
2381 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_Done },
2382 // Convert__Reg1_0__SImm71_1
2383 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_Done },
2384 // Convert__Reg1_1__RDOp1_0__Reg1_2
2385 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_Reg, 3, CVT_Done },
2386 // Convert__Reg1_1__RDOp1_0__SImm71_2
2387 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_Done },
2388 // Convert__UImm31_0
2389 { CVT_95_addUImm3Operands, 1, CVT_Done },
2390 // Convert_NoOperands
2391 { CVT_Done },
2392 // Convert__UImm21_0
2393 { CVT_95_addUImm2Operands, 1, CVT_Done },
2394 // Convert__Reg1_0__Reg1_1__UImm31_2
2395 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_Done },
2396 // Convert__Reg1_0__SImm71_1__UImm31_2
2397 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addUImm3Operands, 3, CVT_Done },
2398 // Convert__Reg1_0__Reg1_1__Zero1_2
2399 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_Done },
2400 // Convert__Reg1_0__SImm71_1__Zero1_2
2401 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_Done },
2402 // Convert__Reg1_0
2403 { CVT_95_Reg, 1, CVT_Done },
2404 // Convert__UImm61_0
2405 { CVT_95_addUImm6Operands, 1, CVT_Done },
2406 // Convert__Reg1_0__MEMri2_1
2407 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_Done },
2408 // Convert__Reg1_0__MEMzi2_1
2409 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_Done },
2410 // Convert__Reg1_0__Reg1_2__Reg1_4
2411 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
2412 // Convert__Reg1_0__Reg1_2__MImm1_4
2413 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMImmOperands, 5, CVT_Done },
2414 // Convert__Reg1_0__UImm71_2__Reg1_4
2415 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 3, CVT_95_Reg, 5, CVT_Done },
2416 // Convert__Reg1_0__UImm71_2__MImm1_4
2417 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 3, CVT_95_addMImmOperands, 5, CVT_Done },
2418 // Convert__SImm71_0
2419 { CVT_95_addSImm7Operands, 1, CVT_Done },
2420 // Convert__Reg1_0__UImm21_1__Reg1_2
2421 { CVT_95_Reg, 1, CVT_95_addUImm2Operands, 2, CVT_95_Reg, 3, CVT_Done },
2422 // Convert__Reg1_0__UImm21_1__MImm1_2
2423 { CVT_95_Reg, 1, CVT_95_addUImm2Operands, 2, CVT_95_addMImmOperands, 3, CVT_Done },
2424 // Convert__Reg1_0__Reg1_1__Reg1_3
2425 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Done },
2426 // Convert__Reg1_0__Reg1_1__UImm71_3
2427 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 4, CVT_Done },
2428 // Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1
2429 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2430 // Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1
2431 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2432 // Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1
2433 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2434 // Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1
2435 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2436 // Convert__MEMrii3_0
2437 { CVT_95_addMEMriiOperands, 1, CVT_Done },
2438 // Convert__MEMrri3_0
2439 { CVT_95_addMEMrriOperands, 1, CVT_Done },
2440 // Convert__MEMzii3_0
2441 { CVT_95_addMEMziiOperands, 1, CVT_Done },
2442 // Convert__MEMzri3_0
2443 { CVT_95_addMEMzriOperands, 1, CVT_Done },
2444 // Convert__Reg1_0__Zero1_1
2445 { CVT_95_Reg, 1, CVT_95_addZeroOperands, 2, CVT_Done },
2446 // Convert__SImm71_0__Reg1_1
2447 { CVT_95_addSImm7Operands, 1, CVT_95_Reg, 2, CVT_Done },
2448 // Convert__SImm71_0__Zero1_1
2449 { CVT_95_addSImm7Operands, 1, CVT_95_addZeroOperands, 2, CVT_Done },
2450 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
2451 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2452 // Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3
2453 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2454 // Convert__Reg1_0__MImm1_1__Reg1_2
2455 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_Done },
2456 // Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3
2457 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2458 // Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3
2459 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2460 // Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3
2461 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_Done },
2462 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4
2463 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
2464 // Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4
2465 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
2466 // Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4
2467 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
2468 // Convert__Reg1_1__CCOp1_0__Reg1_2
2469 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_Done },
2470 // Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3
2471 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2472 // Convert__Reg1_0__Reg1_1__UImm71_2
2473 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
2474 // Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3
2475 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_95_Reg, 4, CVT_Done },
2476 // Convert__Reg1_1__Reg1_2__Reg1_0
2477 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Done },
2478 // Convert__Reg1_1__Zero1_2__Reg1_0
2479 { CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_Done },
2480 // Convert__SImm71_1__Reg1_2__Reg1_0
2481 { CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Done },
2482 // Convert__SImm71_1__Zero1_2__Reg1_0
2483 { CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_Done },
2484 // Convert__MEMri2_1__Reg1_0
2485 { CVT_95_addMEMriOperands, 2, CVT_95_Reg, 1, CVT_Done },
2486 // Convert__MEMzi2_1__Reg1_0
2487 { CVT_95_addMEMziOperands, 2, CVT_95_Reg, 1, CVT_Done },
2488 // Convert__Reg1_0__MImm1_1__UImm71_2
2489 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
2490 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
2491 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
2492 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2
2493 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
2494 // Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2
2495 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_Done },
2496 // Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2
2497 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMImmOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
2498 // Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2
2499 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_Done },
2500 // Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2
2501 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addUImm7Operands, 3, CVT_Done },
2502 // Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2
2503 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_Done },
2504 // Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2
2505 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addUImm7Operands, 3, CVT_Done },
2506 // Convert__MEMrii3_1__Reg1_0
2507 { CVT_95_addMEMriiOperands, 2, CVT_95_Reg, 1, CVT_Done },
2508 // Convert__MEMrri3_1__Reg1_0
2509 { CVT_95_addMEMrriOperands, 2, CVT_95_Reg, 1, CVT_Done },
2510 // Convert__MEMzii3_1__Reg1_0
2511 { CVT_95_addMEMziiOperands, 2, CVT_95_Reg, 1, CVT_Done },
2512 // Convert__MEMzri3_1__Reg1_0
2513 { CVT_95_addMEMzriOperands, 2, CVT_95_Reg, 1, CVT_Done },
2514 // Convert__Reg1_0__Reg1_1__UImm21_2
2515 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm2Operands, 3, CVT_Done },
2516 // Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1
2517 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2518 // Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1
2519 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2520 // Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1
2521 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2522 // Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1
2523 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2524 // Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1
2525 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2526 // Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1
2527 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
2528 // Convert__Reg1_0__Reg1_1__SImm71_2
2529 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_Done },
2530 // Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3
2531 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addSImm7Operands, 4, CVT_Done },
2532 // Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3
2533 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_Done },
2534 // Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3
2535 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_Done },
2536 // Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4
2537 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 5, CVT_Done },
2538 // Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4
2539 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 5, CVT_Done },
2540 // Convert__Reg1_0__UImm71_1__Reg1_2
2541 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 2, CVT_95_Reg, 3, CVT_Done },
2542 // Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3
2543 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
2544 // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0
2545 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
2546 // Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0
2547 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_Done },
2548 // Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0
2549 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
2550 // Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0
2551 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_Done },
2552 // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4
2553 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
2554 // Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4
2555 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
2556 // Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4
2557 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
2558 // Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4
2559 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
2560 // Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3
2561 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMImmOperands, 4, CVT_Done },
2562 // Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3
2563 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_Reg, 4, CVT_Done },
2564 // Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3
2565 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_addMImmOperands, 4, CVT_Done },
2566 // Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4
2567 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMImmOperands, 4, CVT_95_Reg, 5, CVT_Done },
2568 // Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4
2569 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
2570 // Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4
2571 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_addMImmOperands, 4, CVT_95_Reg, 5, CVT_Done },
2572 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3
2573 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addUImm4Operands, 4, CVT_Done },
2574 // Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5
2575 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_Done },
2576 // Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5
2577 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addUImm7Operands, 6, CVT_Done },
2578 // Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6
2579 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
2580 // Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6
2581 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addUImm7Operands, 6, CVT_95_Reg, 7, CVT_Done },
2582 // Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3
2583 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
2584 // Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3
2585 { CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
2586 // Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3
2587 { CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
2588 // Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3
2589 { CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
2590};
2591
2592void VEAsmParser::
2593convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
2594 const OperandVector &Operands) {
2595 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2596 const uint8_t *Converter = ConversionTable[Kind];
2597 Inst.setOpcode(Opcode);
2598 for (const uint8_t *p = Converter; *p; p += 2) {
2599 unsigned OpIdx = *(p + 1);
2600 switch (*p) {
2601 default: llvm_unreachable("invalid conversion entry!");
2602 case CVT_Reg:
2603 static_cast<VEOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
2604 break;
2605 case CVT_Tied: {
2606 assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) -
2607 std::begin(TiedAsmOperandTable)) &&
2608 "Tied operand not found");
2609 unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0];
2610 if (TiedResOpnd != (uint8_t)-1)
2611 Inst.addOperand(Inst.getOperand(TiedResOpnd));
2612 break;
2613 }
2614 case CVT_95_Reg:
2615 static_cast<VEOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
2616 break;
2617 case CVT_95_addMImmOperands:
2618 static_cast<VEOperand &>(*Operands[OpIdx]).addMImmOperands(Inst, 1);
2619 break;
2620 case CVT_95_addSImm7Operands:
2621 static_cast<VEOperand &>(*Operands[OpIdx]).addSImm7Operands(Inst, 1);
2622 break;
2623 case CVT_95_addMEMriOperands:
2624 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
2625 break;
2626 case CVT_95_addUImm0to2Operands:
2627 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm0to2Operands(Inst, 1);
2628 break;
2629 case CVT_95_addMEMziOperands:
2630 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMziOperands(Inst, 2);
2631 break;
2632 case CVT_95_addCCOpOperands:
2633 static_cast<VEOperand &>(*Operands[OpIdx]).addCCOpOperands(Inst, 1);
2634 break;
2635 case CVT_95_addImmOperands:
2636 static_cast<VEOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
2637 break;
2638 case CVT_95_addZeroOperands:
2639 static_cast<VEOperand &>(*Operands[OpIdx]).addZeroOperands(Inst, 1);
2640 break;
2641 case CVT_95_addMEMriiOperands:
2642 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMriiOperands(Inst, 3);
2643 break;
2644 case CVT_95_addMEMrriOperands:
2645 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMrriOperands(Inst, 3);
2646 break;
2647 case CVT_95_addMEMziiOperands:
2648 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMziiOperands(Inst, 3);
2649 break;
2650 case CVT_95_addMEMzriOperands:
2651 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMzriOperands(Inst, 3);
2652 break;
2653 case CVT_95_addUImm1Operands:
2654 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm1Operands(Inst, 1);
2655 break;
2656 case CVT_95_addRDOpOperands:
2657 static_cast<VEOperand &>(*Operands[OpIdx]).addRDOpOperands(Inst, 1);
2658 break;
2659 case CVT_95_addUImm3Operands:
2660 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm3Operands(Inst, 1);
2661 break;
2662 case CVT_95_addUImm2Operands:
2663 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm2Operands(Inst, 1);
2664 break;
2665 case CVT_95_addUImm6Operands:
2666 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm6Operands(Inst, 1);
2667 break;
2668 case CVT_95_addUImm7Operands:
2669 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm7Operands(Inst, 1);
2670 break;
2671 case CVT_95_addUImm4Operands:
2672 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm4Operands(Inst, 1);
2673 break;
2674 }
2675 }
2676}
2677
2678void VEAsmParser::
2679convertToMapAndConstraints(unsigned Kind,
2680 const OperandVector &Operands) {
2681 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2682 unsigned NumMCOperands = 0;
2683 const uint8_t *Converter = ConversionTable[Kind];
2684 for (const uint8_t *p = Converter; *p; p += 2) {
2685 switch (*p) {
2686 default: llvm_unreachable("invalid conversion entry!");
2687 case CVT_Reg:
2688 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2689 Operands[*(p + 1)]->setConstraint("r");
2690 ++NumMCOperands;
2691 break;
2692 case CVT_Tied:
2693 ++NumMCOperands;
2694 break;
2695 case CVT_95_Reg:
2696 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2697 Operands[*(p + 1)]->setConstraint("r");
2698 NumMCOperands += 1;
2699 break;
2700 case CVT_95_addMImmOperands:
2701 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2702 Operands[*(p + 1)]->setConstraint("m");
2703 NumMCOperands += 1;
2704 break;
2705 case CVT_95_addSImm7Operands:
2706 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2707 Operands[*(p + 1)]->setConstraint("m");
2708 NumMCOperands += 1;
2709 break;
2710 case CVT_95_addMEMriOperands:
2711 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2712 Operands[*(p + 1)]->setConstraint("m");
2713 NumMCOperands += 2;
2714 break;
2715 case CVT_95_addUImm0to2Operands:
2716 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2717 Operands[*(p + 1)]->setConstraint("m");
2718 NumMCOperands += 1;
2719 break;
2720 case CVT_95_addMEMziOperands:
2721 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2722 Operands[*(p + 1)]->setConstraint("m");
2723 NumMCOperands += 2;
2724 break;
2725 case CVT_95_addCCOpOperands:
2726 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2727 Operands[*(p + 1)]->setConstraint("m");
2728 NumMCOperands += 1;
2729 break;
2730 case CVT_95_addImmOperands:
2731 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2732 Operands[*(p + 1)]->setConstraint("m");
2733 NumMCOperands += 1;
2734 break;
2735 case CVT_95_addZeroOperands:
2736 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2737 Operands[*(p + 1)]->setConstraint("m");
2738 NumMCOperands += 1;
2739 break;
2740 case CVT_95_addMEMriiOperands:
2741 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2742 Operands[*(p + 1)]->setConstraint("m");
2743 NumMCOperands += 3;
2744 break;
2745 case CVT_95_addMEMrriOperands:
2746 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2747 Operands[*(p + 1)]->setConstraint("m");
2748 NumMCOperands += 3;
2749 break;
2750 case CVT_95_addMEMziiOperands:
2751 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2752 Operands[*(p + 1)]->setConstraint("m");
2753 NumMCOperands += 3;
2754 break;
2755 case CVT_95_addMEMzriOperands:
2756 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2757 Operands[*(p + 1)]->setConstraint("m");
2758 NumMCOperands += 3;
2759 break;
2760 case CVT_95_addUImm1Operands:
2761 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2762 Operands[*(p + 1)]->setConstraint("m");
2763 NumMCOperands += 1;
2764 break;
2765 case CVT_95_addRDOpOperands:
2766 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2767 Operands[*(p + 1)]->setConstraint("m");
2768 NumMCOperands += 1;
2769 break;
2770 case CVT_95_addUImm3Operands:
2771 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2772 Operands[*(p + 1)]->setConstraint("m");
2773 NumMCOperands += 1;
2774 break;
2775 case CVT_95_addUImm2Operands:
2776 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2777 Operands[*(p + 1)]->setConstraint("m");
2778 NumMCOperands += 1;
2779 break;
2780 case CVT_95_addUImm6Operands:
2781 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2782 Operands[*(p + 1)]->setConstraint("m");
2783 NumMCOperands += 1;
2784 break;
2785 case CVT_95_addUImm7Operands:
2786 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2787 Operands[*(p + 1)]->setConstraint("m");
2788 NumMCOperands += 1;
2789 break;
2790 case CVT_95_addUImm4Operands:
2791 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2792 Operands[*(p + 1)]->setConstraint("m");
2793 NumMCOperands += 1;
2794 break;
2795 }
2796 }
2797}
2798
2799namespace {
2800
2801/// MatchClassKind - The kinds of classes which participate in
2802/// instruction matching.
2803enum MatchClassKind {
2804 InvalidMatchClass = 0,
2805 OptionalMatchClass = 1,
2806 MCK__40_, // '('
2807 MCK__41_, // ')'
2808 MCK__DOT_d, // '.d'
2809 MCK__DOT_d_DOT_nt, // '.d.nt'
2810 MCK__DOT_d_DOT_t, // '.d.t'
2811 MCK__DOT_l, // '.l'
2812 MCK__DOT_l_DOT_nt, // '.l.nt'
2813 MCK__DOT_l_DOT_t, // '.l.t'
2814 MCK__DOT_s, // '.s'
2815 MCK__DOT_s_DOT_nt, // '.s.nt'
2816 MCK__DOT_s_DOT_t, // '.s.t'
2817 MCK__DOT_w, // '.w'
2818 MCK__DOT_w_DOT_nt, // '.w.nt'
2819 MCK__DOT_w_DOT_t, // '.w.t'
2820 MCK_LAST_TOKEN = MCK__DOT_w_DOT_t,
2821 MCK_VLS, // register class 'VLS'
2822 MCK_Reg9, // derived register class
2823 MCK_VM512, // register class 'VM512'
2824 MCK_VM, // register class 'VM'
2825 MCK_MISC, // register class 'MISC'
2826 MCK_F128, // register class 'F128'
2827 MCK_F32, // register class 'F32'
2828 MCK_I32, // register class 'I32'
2829 MCK_I64, // register class 'I64'
2830 MCK_V64, // register class 'V64'
2831 MCK_LAST_REGISTER = MCK_V64,
2832 MCK_CCOp, // user defined class 'CCOpAsmOperand'
2833 MCK_Imm, // user defined class 'ImmAsmOperand'
2834 MCK_MImm, // user defined class 'MImmAsmOperand'
2835 MCK_RDOp, // user defined class 'RDOpAsmOperand'
2836 MCK_SImm7, // user defined class 'SImm7AsmOperand'
2837 MCK_UImm0to2, // user defined class 'UImm0to2AsmOperand'
2838 MCK_UImm1, // user defined class 'UImm1AsmOperand'
2839 MCK_UImm2, // user defined class 'UImm2AsmOperand'
2840 MCK_UImm3, // user defined class 'UImm3AsmOperand'
2841 MCK_UImm4, // user defined class 'UImm4AsmOperand'
2842 MCK_UImm6, // user defined class 'UImm6AsmOperand'
2843 MCK_UImm7, // user defined class 'UImm7AsmOperand'
2844 MCK_MEMri, // user defined class 'VEMEMriAsmOperand'
2845 MCK_MEMrii, // user defined class 'VEMEMriiAsmOperand'
2846 MCK_MEMrri, // user defined class 'VEMEMrriAsmOperand'
2847 MCK_MEMzi, // user defined class 'VEMEMziAsmOperand'
2848 MCK_MEMzii, // user defined class 'VEMEMziiAsmOperand'
2849 MCK_MEMzri, // user defined class 'VEMEMzriAsmOperand'
2850 MCK_Zero, // user defined class 'ZeroAsmOperand'
2851 NumMatchClassKinds
2852};
2853
2854} // end anonymous namespace
2855
2856static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
2857 return MCTargetAsmParser::Match_InvalidOperand;
2858}
2859
2860static MatchClassKind matchTokenString(StringRef Name) {
2861 switch (Name.size()) {
2862 default: break;
2863 case 1: // 2 strings to match.
2864 switch (Name[0]) {
2865 default: break;
2866 case '(': // 1 string to match.
2867 return MCK__40_; // "("
2868 case ')': // 1 string to match.
2869 return MCK__41_; // ")"
2870 }
2871 break;
2872 case 2: // 4 strings to match.
2873 if (Name[0] != '.')
2874 break;
2875 switch (Name[1]) {
2876 default: break;
2877 case 'd': // 1 string to match.
2878 return MCK__DOT_d; // ".d"
2879 case 'l': // 1 string to match.
2880 return MCK__DOT_l; // ".l"
2881 case 's': // 1 string to match.
2882 return MCK__DOT_s; // ".s"
2883 case 'w': // 1 string to match.
2884 return MCK__DOT_w; // ".w"
2885 }
2886 break;
2887 case 4: // 4 strings to match.
2888 if (Name[0] != '.')
2889 break;
2890 switch (Name[1]) {
2891 default: break;
2892 case 'd': // 1 string to match.
2893 if (memcmp(Name.data()+2, ".t", 2) != 0)
2894 break;
2895 return MCK__DOT_d_DOT_t; // ".d.t"
2896 case 'l': // 1 string to match.
2897 if (memcmp(Name.data()+2, ".t", 2) != 0)
2898 break;
2899 return MCK__DOT_l_DOT_t; // ".l.t"
2900 case 's': // 1 string to match.
2901 if (memcmp(Name.data()+2, ".t", 2) != 0)
2902 break;
2903 return MCK__DOT_s_DOT_t; // ".s.t"
2904 case 'w': // 1 string to match.
2905 if (memcmp(Name.data()+2, ".t", 2) != 0)
2906 break;
2907 return MCK__DOT_w_DOT_t; // ".w.t"
2908 }
2909 break;
2910 case 5: // 4 strings to match.
2911 if (Name[0] != '.')
2912 break;
2913 switch (Name[1]) {
2914 default: break;
2915 case 'd': // 1 string to match.
2916 if (memcmp(Name.data()+2, ".nt", 3) != 0)
2917 break;
2918 return MCK__DOT_d_DOT_nt; // ".d.nt"
2919 case 'l': // 1 string to match.
2920 if (memcmp(Name.data()+2, ".nt", 3) != 0)
2921 break;
2922 return MCK__DOT_l_DOT_nt; // ".l.nt"
2923 case 's': // 1 string to match.
2924 if (memcmp(Name.data()+2, ".nt", 3) != 0)
2925 break;
2926 return MCK__DOT_s_DOT_nt; // ".s.nt"
2927 case 'w': // 1 string to match.
2928 if (memcmp(Name.data()+2, ".nt", 3) != 0)
2929 break;
2930 return MCK__DOT_w_DOT_nt; // ".w.nt"
2931 }
2932 break;
2933 }
2934 return InvalidMatchClass;
2935}
2936
2937/// isSubclass - Compute whether \p A is a subclass of \p B.
2938static bool isSubclass(MatchClassKind A, MatchClassKind B) {
2939 if (A == B)
2940 return true;
2941
2942 [[maybe_unused]] static constexpr struct {
2943 uint32_t Offset;
2944 uint16_t Start;
2945 uint16_t Length;
2946 } Table[] = {
2947 {0, 0, 0},
2948 {0, 0, 0},
2949 {0, 0, 0},
2950 {0, 0, 0},
2951 {0, 0, 0},
2952 {0, 0, 0},
2953 {0, 0, 0},
2954 {0, 0, 0},
2955 {0, 0, 0},
2956 {0, 0, 0},
2957 {0, 0, 0},
2958 {0, 0, 0},
2959 {0, 0, 0},
2960 {0, 0, 0},
2961 {0, 0, 0},
2962 {0, 0, 0},
2963 {0, 0, 0},
2964 {0, 18, 1},
2965 {1, 0, 0},
2966 {1, 0, 0},
2967 {1, 0, 0},
2968 {1, 0, 0},
2969 {1, 0, 0},
2970 {1, 0, 0},
2971 {1, 0, 0},
2972 {1, 0, 0},
2973 {1, 0, 0},
2974 {1, 0, 0},
2975 {1, 0, 0},
2976 {1, 0, 0},
2977 {1, 0, 0},
2978 {1, 0, 0},
2979 {1, 0, 0},
2980 {1, 0, 0},
2981 {1, 0, 0},
2982 {1, 0, 0},
2983 {1, 0, 0},
2984 {1, 0, 0},
2985 {1, 0, 0},
2986 {1, 0, 0},
2987 {1, 0, 0},
2988 {1, 0, 0},
2989 {1, 0, 0},
2990 {1, 0, 0},
2991 {1, 0, 0},
2992 };
2993
2994 static constexpr uint8_t Data[] = {
2995 0x01,
2996 };
2997
2998 auto &Entry = Table[A];
2999 unsigned Idx = B - Entry.Start;
3000 if (Idx >= Entry.Length)
3001 return false;
3002 Idx += Entry.Offset;
3003 return (Data[Idx / 8] >> (Idx % 8)) & 1;
3004}
3005
3006static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
3007 VEOperand &Operand = (VEOperand &)GOp;
3008 if (Kind == InvalidMatchClass)
3009 return MCTargetAsmParser::Match_InvalidOperand;
3010
3011 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
3012 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
3013 MCTargetAsmParser::Match_Success :
3014 MCTargetAsmParser::Match_InvalidOperand;
3015
3016 switch (Kind) {
3017 default: break;
3018 case MCK_CCOp: {
3019 DiagnosticPredicate DP(Operand.isCCOp());
3020 if (DP.isMatch())
3021 return MCTargetAsmParser::Match_Success;
3022 break;
3023 }
3024 case MCK_Imm: {
3025 DiagnosticPredicate DP(Operand.isImm());
3026 if (DP.isMatch())
3027 return MCTargetAsmParser::Match_Success;
3028 break;
3029 }
3030 case MCK_MImm: {
3031 DiagnosticPredicate DP(Operand.isMImm());
3032 if (DP.isMatch())
3033 return MCTargetAsmParser::Match_Success;
3034 break;
3035 }
3036 case MCK_RDOp: {
3037 DiagnosticPredicate DP(Operand.isRDOp());
3038 if (DP.isMatch())
3039 return MCTargetAsmParser::Match_Success;
3040 break;
3041 }
3042 case MCK_SImm7: {
3043 DiagnosticPredicate DP(Operand.isSImm7());
3044 if (DP.isMatch())
3045 return MCTargetAsmParser::Match_Success;
3046 break;
3047 }
3048 case MCK_UImm0to2: {
3049 DiagnosticPredicate DP(Operand.isUImm0to2());
3050 if (DP.isMatch())
3051 return MCTargetAsmParser::Match_Success;
3052 break;
3053 }
3054 case MCK_UImm1: {
3055 DiagnosticPredicate DP(Operand.isUImm1());
3056 if (DP.isMatch())
3057 return MCTargetAsmParser::Match_Success;
3058 break;
3059 }
3060 case MCK_UImm2: {
3061 DiagnosticPredicate DP(Operand.isUImm2());
3062 if (DP.isMatch())
3063 return MCTargetAsmParser::Match_Success;
3064 break;
3065 }
3066 case MCK_UImm3: {
3067 DiagnosticPredicate DP(Operand.isUImm3());
3068 if (DP.isMatch())
3069 return MCTargetAsmParser::Match_Success;
3070 break;
3071 }
3072 case MCK_UImm4: {
3073 DiagnosticPredicate DP(Operand.isUImm4());
3074 if (DP.isMatch())
3075 return MCTargetAsmParser::Match_Success;
3076 break;
3077 }
3078 case MCK_UImm6: {
3079 DiagnosticPredicate DP(Operand.isUImm6());
3080 if (DP.isMatch())
3081 return MCTargetAsmParser::Match_Success;
3082 break;
3083 }
3084 case MCK_UImm7: {
3085 DiagnosticPredicate DP(Operand.isUImm7());
3086 if (DP.isMatch())
3087 return MCTargetAsmParser::Match_Success;
3088 break;
3089 }
3090 case MCK_MEMri: {
3091 DiagnosticPredicate DP(Operand.isMEMri());
3092 if (DP.isMatch())
3093 return MCTargetAsmParser::Match_Success;
3094 break;
3095 }
3096 case MCK_MEMrii: {
3097 DiagnosticPredicate DP(Operand.isMEMrii());
3098 if (DP.isMatch())
3099 return MCTargetAsmParser::Match_Success;
3100 break;
3101 }
3102 case MCK_MEMrri: {
3103 DiagnosticPredicate DP(Operand.isMEMrri());
3104 if (DP.isMatch())
3105 return MCTargetAsmParser::Match_Success;
3106 break;
3107 }
3108 case MCK_MEMzi: {
3109 DiagnosticPredicate DP(Operand.isMEMzi());
3110 if (DP.isMatch())
3111 return MCTargetAsmParser::Match_Success;
3112 break;
3113 }
3114 case MCK_MEMzii: {
3115 DiagnosticPredicate DP(Operand.isMEMzii());
3116 if (DP.isMatch())
3117 return MCTargetAsmParser::Match_Success;
3118 break;
3119 }
3120 case MCK_MEMzri: {
3121 DiagnosticPredicate DP(Operand.isMEMzri());
3122 if (DP.isMatch())
3123 return MCTargetAsmParser::Match_Success;
3124 break;
3125 }
3126 case MCK_Zero: {
3127 DiagnosticPredicate DP(Operand.isZero());
3128 if (DP.isMatch())
3129 return MCTargetAsmParser::Match_Success;
3130 break;
3131 }
3132 } // end switch (Kind)
3133
3134 if (Operand.isReg()) {
3135 static constexpr uint16_t Table[VE::NUM_TARGET_REGS] = {
3136 InvalidMatchClass,
3137 InvalidMatchClass,
3138 MCK_MISC,
3139 MCK_MISC,
3140 MCK_MISC,
3141 MCK_MISC,
3142 MCK_V64,
3143 MCK_VLS,
3144 MCK_MISC,
3145 MCK_MISC,
3146 MCK_MISC,
3147 MCK_MISC,
3148 MCK_MISC,
3149 MCK_MISC,
3150 MCK_MISC,
3151 MCK_MISC,
3152 MCK_MISC,
3153 MCK_MISC,
3154 MCK_MISC,
3155 MCK_MISC,
3156 MCK_MISC,
3157 MCK_MISC,
3158 MCK_MISC,
3159 MCK_MISC,
3160 MCK_MISC,
3161 MCK_MISC,
3162 MCK_MISC,
3163 MCK_F128,
3164 MCK_F128,
3165 MCK_F128,
3166 MCK_F128,
3167 MCK_F128,
3168 MCK_F128,
3169 MCK_F128,
3170 MCK_F128,
3171 MCK_F128,
3172 MCK_F128,
3173 MCK_F128,
3174 MCK_F128,
3175 MCK_F128,
3176 MCK_F128,
3177 MCK_F128,
3178 MCK_F128,
3179 MCK_F128,
3180 MCK_F128,
3181 MCK_F128,
3182 MCK_F128,
3183 MCK_F128,
3184 MCK_F128,
3185 MCK_F128,
3186 MCK_F128,
3187 MCK_F128,
3188 MCK_F128,
3189 MCK_F128,
3190 MCK_F128,
3191 MCK_F128,
3192 MCK_F128,
3193 MCK_F128,
3194 MCK_F128,
3195 MCK_F32,
3196 MCK_F32,
3197 MCK_F32,
3198 MCK_F32,
3199 MCK_F32,
3200 MCK_F32,
3201 MCK_F32,
3202 MCK_F32,
3203 MCK_F32,
3204 MCK_F32,
3205 MCK_F32,
3206 MCK_F32,
3207 MCK_F32,
3208 MCK_F32,
3209 MCK_F32,
3210 MCK_F32,
3211 MCK_F32,
3212 MCK_F32,
3213 MCK_F32,
3214 MCK_F32,
3215 MCK_F32,
3216 MCK_F32,
3217 MCK_F32,
3218 MCK_F32,
3219 MCK_F32,
3220 MCK_F32,
3221 MCK_F32,
3222 MCK_F32,
3223 MCK_F32,
3224 MCK_F32,
3225 MCK_F32,
3226 MCK_F32,
3227 MCK_F32,
3228 MCK_F32,
3229 MCK_F32,
3230 MCK_F32,
3231 MCK_F32,
3232 MCK_F32,
3233 MCK_F32,
3234 MCK_F32,
3235 MCK_F32,
3236 MCK_F32,
3237 MCK_F32,
3238 MCK_F32,
3239 MCK_F32,
3240 MCK_F32,
3241 MCK_F32,
3242 MCK_F32,
3243 MCK_F32,
3244 MCK_F32,
3245 MCK_F32,
3246 MCK_F32,
3247 MCK_F32,
3248 MCK_F32,
3249 MCK_F32,
3250 MCK_F32,
3251 MCK_F32,
3252 MCK_F32,
3253 MCK_F32,
3254 MCK_F32,
3255 MCK_F32,
3256 MCK_F32,
3257 MCK_F32,
3258 MCK_F32,
3259 MCK_I32,
3260 MCK_I32,
3261 MCK_I32,
3262 MCK_I32,
3263 MCK_I32,
3264 MCK_I32,
3265 MCK_I32,
3266 MCK_I32,
3267 MCK_I32,
3268 MCK_I32,
3269 MCK_I32,
3270 MCK_I32,
3271 MCK_I32,
3272 MCK_I32,
3273 MCK_I32,
3274 MCK_I32,
3275 MCK_I32,
3276 MCK_I32,
3277 MCK_I32,
3278 MCK_I32,
3279 MCK_I32,
3280 MCK_I32,
3281 MCK_I32,
3282 MCK_I32,
3283 MCK_I32,
3284 MCK_I32,
3285 MCK_I32,
3286 MCK_I32,
3287 MCK_I32,
3288 MCK_I32,
3289 MCK_I32,
3290 MCK_I32,
3291 MCK_I32,
3292 MCK_I32,
3293 MCK_I32,
3294 MCK_I32,
3295 MCK_I32,
3296 MCK_I32,
3297 MCK_I32,
3298 MCK_I32,
3299 MCK_I32,
3300 MCK_I32,
3301 MCK_I32,
3302 MCK_I32,
3303 MCK_I32,
3304 MCK_I32,
3305 MCK_I32,
3306 MCK_I32,
3307 MCK_I32,
3308 MCK_I32,
3309 MCK_I32,
3310 MCK_I32,
3311 MCK_I32,
3312 MCK_I32,
3313 MCK_I32,
3314 MCK_I32,
3315 MCK_I32,
3316 MCK_I32,
3317 MCK_I32,
3318 MCK_I32,
3319 MCK_I32,
3320 MCK_I32,
3321 MCK_I32,
3322 MCK_I32,
3323 MCK_I64,
3324 MCK_I64,
3325 MCK_I64,
3326 MCK_I64,
3327 MCK_I64,
3328 MCK_I64,
3329 MCK_I64,
3330 MCK_I64,
3331 MCK_I64,
3332 MCK_I64,
3333 MCK_I64,
3334 MCK_I64,
3335 MCK_I64,
3336 MCK_I64,
3337 MCK_I64,
3338 MCK_I64,
3339 MCK_I64,
3340 MCK_I64,
3341 MCK_I64,
3342 MCK_I64,
3343 MCK_I64,
3344 MCK_I64,
3345 MCK_I64,
3346 MCK_I64,
3347 MCK_I64,
3348 MCK_I64,
3349 MCK_I64,
3350 MCK_I64,
3351 MCK_I64,
3352 MCK_I64,
3353 MCK_I64,
3354 MCK_I64,
3355 MCK_I64,
3356 MCK_I64,
3357 MCK_I64,
3358 MCK_I64,
3359 MCK_I64,
3360 MCK_I64,
3361 MCK_I64,
3362 MCK_I64,
3363 MCK_I64,
3364 MCK_I64,
3365 MCK_I64,
3366 MCK_I64,
3367 MCK_I64,
3368 MCK_I64,
3369 MCK_I64,
3370 MCK_I64,
3371 MCK_I64,
3372 MCK_I64,
3373 MCK_I64,
3374 MCK_I64,
3375 MCK_I64,
3376 MCK_I64,
3377 MCK_I64,
3378 MCK_I64,
3379 MCK_I64,
3380 MCK_I64,
3381 MCK_I64,
3382 MCK_I64,
3383 MCK_I64,
3384 MCK_I64,
3385 MCK_I64,
3386 MCK_I64,
3387 MCK_V64,
3388 MCK_V64,
3389 MCK_V64,
3390 MCK_V64,
3391 MCK_V64,
3392 MCK_V64,
3393 MCK_V64,
3394 MCK_V64,
3395 MCK_V64,
3396 MCK_V64,
3397 MCK_V64,
3398 MCK_V64,
3399 MCK_V64,
3400 MCK_V64,
3401 MCK_V64,
3402 MCK_V64,
3403 MCK_V64,
3404 MCK_V64,
3405 MCK_V64,
3406 MCK_V64,
3407 MCK_V64,
3408 MCK_V64,
3409 MCK_V64,
3410 MCK_V64,
3411 MCK_V64,
3412 MCK_V64,
3413 MCK_V64,
3414 MCK_V64,
3415 MCK_V64,
3416 MCK_V64,
3417 MCK_V64,
3418 MCK_V64,
3419 MCK_V64,
3420 MCK_V64,
3421 MCK_V64,
3422 MCK_V64,
3423 MCK_V64,
3424 MCK_V64,
3425 MCK_V64,
3426 MCK_V64,
3427 MCK_V64,
3428 MCK_V64,
3429 MCK_V64,
3430 MCK_V64,
3431 MCK_V64,
3432 MCK_V64,
3433 MCK_V64,
3434 MCK_V64,
3435 MCK_V64,
3436 MCK_V64,
3437 MCK_V64,
3438 MCK_V64,
3439 MCK_V64,
3440 MCK_V64,
3441 MCK_V64,
3442 MCK_V64,
3443 MCK_V64,
3444 MCK_V64,
3445 MCK_V64,
3446 MCK_V64,
3447 MCK_V64,
3448 MCK_V64,
3449 MCK_V64,
3450 MCK_V64,
3451 MCK_VM,
3452 MCK_VM,
3453 MCK_VM,
3454 MCK_VM,
3455 MCK_VM,
3456 MCK_VM,
3457 MCK_VM,
3458 MCK_VM,
3459 MCK_VM,
3460 MCK_VM,
3461 MCK_VM,
3462 MCK_VM,
3463 MCK_VM,
3464 MCK_VM,
3465 MCK_VM,
3466 MCK_VM,
3467 MCK_VM512,
3468 MCK_Reg9,
3469 MCK_Reg9,
3470 MCK_Reg9,
3471 MCK_Reg9,
3472 MCK_Reg9,
3473 MCK_Reg9,
3474 MCK_Reg9,
3475 };
3476
3477 MCRegister Reg = Operand.getReg();
3478 MatchClassKind OpKind = Reg.isPhysical() ? (MatchClassKind)Table[Reg.id()] : InvalidMatchClass;
3479 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
3480 getDiagKindFromRegisterClass(Kind);
3481 }
3482
3483 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
3484 return getDiagKindFromRegisterClass(Kind);
3485
3486 return MCTargetAsmParser::Match_InvalidOperand;
3487}
3488
3489#ifndef NDEBUG
3490const char *getMatchClassName(MatchClassKind Kind) {
3491 switch (Kind) {
3492 case InvalidMatchClass: return "InvalidMatchClass";
3493 case OptionalMatchClass: return "OptionalMatchClass";
3494 case MCK__40_: return "MCK__40_";
3495 case MCK__41_: return "MCK__41_";
3496 case MCK__DOT_d: return "MCK__DOT_d";
3497 case MCK__DOT_d_DOT_nt: return "MCK__DOT_d_DOT_nt";
3498 case MCK__DOT_d_DOT_t: return "MCK__DOT_d_DOT_t";
3499 case MCK__DOT_l: return "MCK__DOT_l";
3500 case MCK__DOT_l_DOT_nt: return "MCK__DOT_l_DOT_nt";
3501 case MCK__DOT_l_DOT_t: return "MCK__DOT_l_DOT_t";
3502 case MCK__DOT_s: return "MCK__DOT_s";
3503 case MCK__DOT_s_DOT_nt: return "MCK__DOT_s_DOT_nt";
3504 case MCK__DOT_s_DOT_t: return "MCK__DOT_s_DOT_t";
3505 case MCK__DOT_w: return "MCK__DOT_w";
3506 case MCK__DOT_w_DOT_nt: return "MCK__DOT_w_DOT_nt";
3507 case MCK__DOT_w_DOT_t: return "MCK__DOT_w_DOT_t";
3508 case MCK_VLS: return "MCK_VLS";
3509 case MCK_Reg9: return "MCK_Reg9";
3510 case MCK_VM512: return "MCK_VM512";
3511 case MCK_VM: return "MCK_VM";
3512 case MCK_MISC: return "MCK_MISC";
3513 case MCK_F128: return "MCK_F128";
3514 case MCK_F32: return "MCK_F32";
3515 case MCK_I32: return "MCK_I32";
3516 case MCK_I64: return "MCK_I64";
3517 case MCK_V64: return "MCK_V64";
3518 case MCK_CCOp: return "MCK_CCOp";
3519 case MCK_Imm: return "MCK_Imm";
3520 case MCK_MImm: return "MCK_MImm";
3521 case MCK_RDOp: return "MCK_RDOp";
3522 case MCK_SImm7: return "MCK_SImm7";
3523 case MCK_UImm0to2: return "MCK_UImm0to2";
3524 case MCK_UImm1: return "MCK_UImm1";
3525 case MCK_UImm2: return "MCK_UImm2";
3526 case MCK_UImm3: return "MCK_UImm3";
3527 case MCK_UImm4: return "MCK_UImm4";
3528 case MCK_UImm6: return "MCK_UImm6";
3529 case MCK_UImm7: return "MCK_UImm7";
3530 case MCK_MEMri: return "MCK_MEMri";
3531 case MCK_MEMrii: return "MCK_MEMrii";
3532 case MCK_MEMrri: return "MCK_MEMrri";
3533 case MCK_MEMzi: return "MCK_MEMzi";
3534 case MCK_MEMzii: return "MCK_MEMzii";
3535 case MCK_MEMzri: return "MCK_MEMzri";
3536 case MCK_Zero: return "MCK_Zero";
3537 case NumMatchClassKinds: return "NumMatchClassKinds";
3538 }
3539 llvm_unreachable("unhandled MatchClassKind!");
3540}
3541
3542#endif // NDEBUG
3543FeatureBitset VEAsmParser::
3544ComputeAvailableFeatures(const FeatureBitset &FB) const {
3545 FeatureBitset Features;
3546 return Features;
3547}
3548
3549static bool checkAsmTiedOperandConstraints(const VEAsmParser&AsmParser,
3550 unsigned Kind, const OperandVector &Operands,
3551 uint64_t &ErrorInfo) {
3552 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
3553 const uint8_t *Converter = ConversionTable[Kind];
3554 for (const uint8_t *p = Converter; *p; p += 2) {
3555 switch (*p) {
3556 case CVT_Tied: {
3557 unsigned OpIdx = *(p + 1);
3558 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
3559 std::begin(TiedAsmOperandTable)) &&
3560 "Tied operand not found");
3561 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
3562 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
3563 if (OpndNum1 != OpndNum2) {
3564 auto &SrcOp1 = Operands[OpndNum1];
3565 auto &SrcOp2 = Operands[OpndNum2];
3566 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) {
3567 ErrorInfo = OpndNum2;
3568 return false;
3569 }
3570 }
3571 break;
3572 }
3573 default:
3574 break;
3575 }
3576 }
3577 return true;
3578}
3579
3580static const char MnemonicTable[] =
3581 "\000\006adds.l\tadds.w.sx\tadds.w.zx\006addu.l\006addu.w\003and\004andm"
3582 "\005atmam\001b\003b.d\006b.d.nt\005b.d.t\003b.l\006b.l.nt\005b.l.t\003b"
3583 ".s\006b.s.nt\005b.s.t\003b.w\006b.w.nt\005b.w.t\005baf.d\010baf.d.nt\007"
3584 "baf.d.t\005baf.l\010baf.l.nt\007baf.l.t\005baf.s\010baf.s.nt\007baf.s.t"
3585 "\005baf.w\010baf.w.nt\007baf.w.t\002br\004br.d\007br.d.nt\006br.d.t\004"
3586 "br.l\007br.l.nt\006br.l.t\004br.s\007br.s.nt\006br.s.t\004br.w\007br.w."
3587 "nt\006br.w.t\006braf.d\tbraf.d.nt\010braf.d.t\006braf.l\tbraf.l.nt\010b"
3588 "raf.l.t\006braf.s\tbraf.s.nt\010braf.s.t\006braf.w\tbraf.w.nt\010braf.w"
3589 ".t\003brv\004bsic\004bswp\005cas.l\005cas.w\007cmov.d.\007cmov.l.\007cm"
3590 "ov.s.\007cmov.w.\006cmps.l\tcmps.w.sx\tcmps.w.zx\006cmpu.l\006cmpu.w\007"
3591 "cvt.d.l\007cvt.d.q\007cvt.d.s\007cvt.d.w\007cvt.l.d\007cvt.q.d\007cvt.q"
3592 ".s\007cvt.s.d\007cvt.s.q\007cvt.s.w\ncvt.w.d.sx\ncvt.w.d.zx\ncvt.w.s.sx"
3593 "\ncvt.w.s.zx\006divs.l\tdivs.w.sx\tdivs.w.zx\006divu.l\006divu.w\003dld"
3594 "\007dldl.sx\007dldl.zx\004dldu\003eqv\004eqvm\006fadd.d\006fadd.q\006fa"
3595 "dd.s\006fcmp.d\006fcmp.q\006fcmp.s\006fdiv.d\006fdiv.s\006fencec\006fen"
3596 "cei\006fencem\005fidcr\006fmax.d\006fmax.s\006fmin.d\006fmin.s\006fmul."
3597 "d\006fmul.q\006fmul.s\006fsub.d\006fsub.q\006fsub.s\003lcr\002ld\007ld1"
3598 "b.sx\007ld1b.zx\007ld2b.sx\007ld2b.zx\006ldl.sx\006ldl.zx\003ldu\003ldz"
3599 "\003lea\006lea.sl\003lfr\005lhm.b\005lhm.h\005lhm.l\005lhm.w\003lpm\003"
3600 "lsv\004lvix\003lvl\003lvm\003lvs\004lzvm\006maxs.l\tmaxs.w.sx\tmaxs.w.z"
3601 "x\006mins.l\tmins.w.sx\tmins.w.zx\004monc\010monc.hdb\003mrg\006muls.l\010"
3602 "muls.l.w\tmuls.w.sx\tmuls.w.zx\006mulu.l\006mulu.w\004negm\003nnd\004nn"
3603 "dm\003nop\002or\003orm\004pcnt\004pcvm\004pfch\005pfchv\010pfchv.nc\006"
3604 "pvadds\tpvadds.lo\tpvadds.up\006pvaddu\tpvaddu.lo\tpvaddu.up\005pvand\010"
3605 "pvand.lo\010pvand.up\005pvbrd\005pvbrv\010pvbrv.lo\010pvbrv.up\006pvcmp"
3606 "s\tpvcmps.lo\tpvcmps.up\006pvcmpu\tpvcmpu.lo\tpvcmpu.up\tpvcvt.s.w\014p"
3607 "vcvt.s.w.lo\014pvcvt.s.w.up\tpvcvt.w.s\014pvcvt.w.s.lo\014pvcvt.w.s.up\005"
3608 "pveqv\010pveqv.lo\010pveqv.up\006pvfadd\tpvfadd.lo\tpvfadd.up\006pvfcmp"
3609 "\tpvfcmp.lo\tpvfcmp.up\006pvfmad\tpvfmad.lo\tpvfmad.up\006pvfmax\tpvfma"
3610 "x.lo\tpvfmax.up\006pvfmin\tpvfmin.lo\tpvfmin.up\013pvfmk.s.lo.\015pvfmk"
3611 ".s.lo.af\015pvfmk.s.lo.at\013pvfmk.s.up.\015pvfmk.s.up.af\015pvfmk.s.up"
3612 ".at\013pvfmk.w.up.\015pvfmk.w.up.af\015pvfmk.w.up.at\006pvfmsb\tpvfmsb."
3613 "lo\tpvfmsb.up\006pvfmul\tpvfmul.lo\tpvfmul.up\007pvfnmad\npvfnmad.lo\np"
3614 "vfnmad.up\007pvfnmsb\npvfnmsb.lo\npvfnmsb.up\006pvfsub\tpvfsub.lo\tpvfs"
3615 "ub.up\005pvldz\010pvldz.lo\010pvldz.up\006pvmaxs\tpvmaxs.lo\tpvmaxs.up\006"
3616 "pvmins\tpvmins.lo\tpvmins.up\004pvor\007pvor.lo\007pvor.up\006pvpcnt\tp"
3617 "vpcnt.lo\tpvpcnt.up\005pvrcp\010pvrcp.lo\010pvrcp.up\007pvrsqrt\npvrsqr"
3618 "t.lo\016pvrsqrt.lo.nex\013pvrsqrt.nex\npvrsqrt.up\016pvrsqrt.up.nex\005"
3619 "pvseq\010pvseq.lo\010pvseq.up\005pvsla\010pvsla.lo\010pvsla.up\005pvsll"
3620 "\010pvsll.lo\010pvsll.up\005pvsra\010pvsra.lo\010pvsra.up\005pvsrl\010p"
3621 "vsrl.lo\010pvsrl.up\006pvsubs\tpvsubs.lo\tpvsubs.up\006pvsubu\tpvsubu.l"
3622 "o\tpvsubu.up\005pvxor\010pvxor.lo\010pvxor.up\003scr\003sfr\005shm.b\005"
3623 "shm.h\005shm.l\005shm.w\003sic\005sla.l\010sla.w.sx\010sla.w.zx\003sld\003"
3624 "sll\004smir\004smvl\003spm\005sra.l\010sra.w.sx\010sra.w.zx\003srd\003s"
3625 "rl\002st\004st1b\004st2b\003stl\003stu\006subs.l\tsubs.w.sx\tsubs.w.zx\006"
3626 "subu.l\006subu.w\003svl\003svm\004svob\004tovm\007ts1am.l\007ts1am.w\005"
3627 "ts2am\005ts3am\004tscr\007vadds.l\nvadds.w.sx\007vaddu.l\004vand\004vbr"
3628 "d\005vbrdl\005vbrdu\004vbrv\007vcmps.l\nvcmps.w.sx\007vcmpu.l\003vcp\010"
3629 "vcvt.d.l\010vcvt.d.s\010vcvt.d.w\010vcvt.l.d\010vcvt.s.d\010vcvt.s.w\013"
3630 "vcvt.w.d.sx\013vcvt.w.d.zx\013vcvt.w.s.sx\013vcvt.w.s.zx\007vdivs.l\nvd"
3631 "ivs.w.sx\nvdivs.w.zx\007vdivu.l\007vdivu.w\004veqv\003vex\007vfadd.d\007"
3632 "vfcmp.d\007vfdiv.d\007vfdiv.s\006vfia.d\006vfia.s\007vfiam.d\007vfiam.s"
3633 "\006vfim.d\006vfim.s\007vfima.d\007vfima.s\007vfims.d\007vfims.s\006vfi"
3634 "s.d\006vfis.s\007vfism.d\007vfism.s\007vfmad.d\007vfmax.d\007vfmin.d\007"
3635 "vfmk.d.\tvfmk.d.af\tvfmk.d.at\007vfmk.l.\tvfmk.l.af\tvfmk.l.at\007vfmk."
3636 "w.\tvfmk.w.af\tvfmk.w.at\007vfmsb.d\007vfmul.d\010vfnmad.d\010vfnmsb.d\014"
3637 "vfrmax.d.fst\014vfrmax.d.lst\014vfrmax.s.fst\014vfrmax.s.lst\014vfrmin."
3638 "d.fst\014vfrmin.d.lst\014vfrmin.s.fst\014vfrmin.s.lst\010vfsqrt.d\010vf"
3639 "sqrt.s\007vfsub.d\007vfsum.d\007vfsum.s\003vgt\006vgt.nc\007vgtl.sx\nvg"
3640 "tl.sx.nc\007vgtl.zx\nvgtl.zx.nc\004vgtu\007vgtu.nc\003vld\006vld.nc\005"
3641 "vld2d\010vld2d.nc\007vldl.sx\nvldl.sx.nc\007vldl.zx\nvldl.zx.nc\tvldl2d"
3642 ".sx\014vldl2d.sx.nc\tvldl2d.zx\014vldl2d.zx.nc\004vldu\007vldu.nc\006vl"
3643 "du2d\tvldu2d.nc\004vldz\007vmaxs.l\nvmaxs.w.sx\007vmins.l\nvmins.w.sx\004"
3644 "vmrg\006vmrg.w\007vmuls.l\tvmuls.l.w\nvmuls.w.sx\nvmuls.w.zx\007vmulu.l"
3645 "\007vmulu.w\003vmv\003vor\005vpcnt\005vrand\006vrcp.d\014vrmaxs.l.fst\014"
3646 "vrmaxs.l.lst\017vrmaxs.w.fst.sx\017vrmaxs.w.fst.zx\017vrmaxs.w.lst.sx\017"
3647 "vrmaxs.w.lst.zx\014vrmins.l.fst\014vrmins.l.lst\017vrmins.w.fst.sx\017v"
3648 "rmins.w.fst.zx\017vrmins.w.lst.sx\017vrmins.w.lst.zx\004vror\010vrsqrt."
3649 "d\014vrsqrt.d.nex\005vrxor\003vsc\006vsc.nc\tvsc.nc.ot\006vsc.ot\004vsc"
3650 "l\007vscl.nc\nvscl.nc.ot\007vscl.ot\004vscu\007vscu.nc\nvscu.nc.ot\007v"
3651 "scu.ot\004vseq\004vsfa\004vshf\006vsla.l\tvsla.w.sx\004vsld\004vsll\006"
3652 "vsra.l\tvsra.w.sx\004vsrd\004vsrl\003vst\006vst.nc\tvst.nc.ot\006vst.ot"
3653 "\005vst2d\010vst2d.nc\013vst2d.nc.ot\010vst2d.ot\004vstl\007vstl.nc\nvs"
3654 "tl.nc.ot\007vstl.ot\006vstl2d\tvstl2d.nc\014vstl2d.nc.ot\tvstl2d.ot\004"
3655 "vstu\007vstu.nc\nvstu.nc.ot\007vstu.ot\006vstu2d\tvstu2d.nc\014vstu2d.n"
3656 "c.ot\tvstu2d.ot\007vsubs.l\nvsubs.w.sx\007vsubu.l\006vsum.l\tvsum.w.sx\t"
3657 "vsum.w.zx\004vxor\003xor\004xorm";
3658
3659// Feature bitsets.
3660enum : uint8_t {
3661 AMFBS_None,
3662};
3663
3664static constexpr FeatureBitset FeatureBitsets[] = {
3665 {}, // AMFBS_None
3666};
3667
3668namespace {
3669 struct MatchEntry {
3670 uint16_t Mnemonic;
3671 uint16_t Opcode;
3672 uint8_t ConvertFn;
3673 uint8_t RequiredFeaturesIdx;
3674 uint8_t Classes[7];
3675 StringRef getMnemonic() const {
3676 return StringRef(MnemonicTable + Mnemonic + 1,
3677 MnemonicTable[Mnemonic]);
3678 }
3679 };
3680
3681 // Predicate for searching for an opcode.
3682 struct LessOpcode {
3683 bool operator()(const MatchEntry &LHS, StringRef RHS) {
3684 return LHS.getMnemonic() < RHS;
3685 }
3686 bool operator()(StringRef LHS, const MatchEntry &RHS) {
3687 return LHS < RHS.getMnemonic();
3688 }
3689 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
3690 return LHS.getMnemonic() < RHS.getMnemonic();
3691 }
3692 };
3693} // end anonymous namespace
3694
3695static const MatchEntry MatchTable0[] = {
3696 { 1 /* adds.l */, VE::ADDSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3697 { 1 /* adds.l */, VE::ADDSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3698 { 1 /* adds.l */, VE::ADDSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3699 { 1 /* adds.l */, VE::ADDSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3700 { 8 /* adds.w.sx */, VE::ADDSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3701 { 8 /* adds.w.sx */, VE::ADDSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3702 { 8 /* adds.w.sx */, VE::ADDSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3703 { 8 /* adds.w.sx */, VE::ADDSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3704 { 18 /* adds.w.zx */, VE::ADDSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3705 { 18 /* adds.w.zx */, VE::ADDSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3706 { 18 /* adds.w.zx */, VE::ADDSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3707 { 18 /* adds.w.zx */, VE::ADDSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3708 { 28 /* addu.l */, VE::ADDULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3709 { 28 /* addu.l */, VE::ADDULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3710 { 28 /* addu.l */, VE::ADDULri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3711 { 28 /* addu.l */, VE::ADDULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3712 { 35 /* addu.w */, VE::ADDUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3713 { 35 /* addu.w */, VE::ADDUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3714 { 35 /* addu.w */, VE::ADDUWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3715 { 35 /* addu.w */, VE::ADDUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3716 { 42 /* and */, VE::ANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3717 { 42 /* and */, VE::ANDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3718 { 42 /* and */, VE::ANDri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3719 { 42 /* and */, VE::ANDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3720 { 46 /* andm */, VE::ANDMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
3721 { 51 /* atmam */, VE::ATMAMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
3722 { 51 /* atmam */, VE::ATMAMrii, Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm0to2 }, },
3723 { 51 /* atmam */, VE::ATMAMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
3724 { 51 /* atmam */, VE::ATMAMzii, Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm0to2 }, },
3725 { 57 /* b */, VE::BCFDrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_MEMri }, },
3726 { 57 /* b */, VE::BCFDrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_MEMzi }, },
3727 { 57 /* b */, VE::BCFDiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_MEMri }, },
3728 { 57 /* b */, VE::BCFDizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_MEMzi }, },
3729 { 57 /* b */, VE::BCFDrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_MEMri }, },
3730 { 57 /* b */, VE::BCFDrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_MEMzi }, },
3731 { 57 /* b */, VE::BCFDiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_MEMri }, },
3732 { 57 /* b */, VE::BCFDizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
3733 { 57 /* b */, VE::BCFDrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_MEMri }, },
3734 { 57 /* b */, VE::BCFDrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_MEMzi }, },
3735 { 57 /* b */, VE::BCFDiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_MEMri }, },
3736 { 57 /* b */, VE::BCFDizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_MEMzi }, },
3737 { 57 /* b */, VE::BCFLrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_MEMri }, },
3738 { 57 /* b */, VE::BCFLrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_MEMzi }, },
3739 { 57 /* b */, VE::BCFLiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_MEMri }, },
3740 { 57 /* b */, VE::BCFLizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_MEMzi }, },
3741 { 57 /* b */, VE::BCFLrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_MEMri }, },
3742 { 57 /* b */, VE::BCFLrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_MEMzi }, },
3743 { 57 /* b */, VE::BCFLiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_MEMri }, },
3744 { 57 /* b */, VE::BCFLizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
3745 { 57 /* b */, VE::BCFLrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_MEMri }, },
3746 { 57 /* b */, VE::BCFLrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_MEMzi }, },
3747 { 57 /* b */, VE::BCFLiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_MEMri }, },
3748 { 57 /* b */, VE::BCFLizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_MEMzi }, },
3749 { 57 /* b */, VE::BCFSrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_MEMri }, },
3750 { 57 /* b */, VE::BCFSrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_MEMzi }, },
3751 { 57 /* b */, VE::BCFSiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_MEMri }, },
3752 { 57 /* b */, VE::BCFSizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_MEMzi }, },
3753 { 57 /* b */, VE::BCFSrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_MEMri }, },
3754 { 57 /* b */, VE::BCFSrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_MEMzi }, },
3755 { 57 /* b */, VE::BCFSiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_MEMri }, },
3756 { 57 /* b */, VE::BCFSizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
3757 { 57 /* b */, VE::BCFSrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_MEMri }, },
3758 { 57 /* b */, VE::BCFSrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_MEMzi }, },
3759 { 57 /* b */, VE::BCFSiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_MEMri }, },
3760 { 57 /* b */, VE::BCFSizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_MEMzi }, },
3761 { 57 /* b */, VE::BCFWrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_MEMri }, },
3762 { 57 /* b */, VE::BCFWrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_MEMzi }, },
3763 { 57 /* b */, VE::BCFWiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_MEMri }, },
3764 { 57 /* b */, VE::BCFWizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_MEMzi }, },
3765 { 57 /* b */, VE::BCFWrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_MEMri }, },
3766 { 57 /* b */, VE::BCFWrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_MEMzi }, },
3767 { 57 /* b */, VE::BCFWiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_MEMri }, },
3768 { 57 /* b */, VE::BCFWizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
3769 { 57 /* b */, VE::BCFWrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_MEMri }, },
3770 { 57 /* b */, VE::BCFWrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_MEMzi }, },
3771 { 57 /* b */, VE::BCFWiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_MEMri }, },
3772 { 57 /* b */, VE::BCFWizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_MEMzi }, },
3773 { 59 /* b.d */, VE::BCFDari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3774 { 59 /* b.d */, VE::BCFDazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3775 { 63 /* b.d.nt */, VE::BCFDari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3776 { 63 /* b.d.nt */, VE::BCFDazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3777 { 70 /* b.d.t */, VE::BCFDari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3778 { 70 /* b.d.t */, VE::BCFDazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3779 { 76 /* b.l */, VE::BCFLari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3780 { 76 /* b.l */, VE::BCFLazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3781 { 80 /* b.l.nt */, VE::BCFLari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3782 { 80 /* b.l.nt */, VE::BCFLazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3783 { 87 /* b.l.t */, VE::BCFLari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3784 { 87 /* b.l.t */, VE::BCFLazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3785 { 93 /* b.s */, VE::BCFSari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3786 { 93 /* b.s */, VE::BCFSazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3787 { 97 /* b.s.nt */, VE::BCFSari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3788 { 97 /* b.s.nt */, VE::BCFSazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3789 { 104 /* b.s.t */, VE::BCFSari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3790 { 104 /* b.s.t */, VE::BCFSazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3791 { 110 /* b.w */, VE::BCFWari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3792 { 110 /* b.w */, VE::BCFWazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3793 { 114 /* b.w.nt */, VE::BCFWari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3794 { 114 /* b.w.nt */, VE::BCFWazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3795 { 121 /* b.w.t */, VE::BCFWari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3796 { 121 /* b.w.t */, VE::BCFWazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3797 { 127 /* baf.d */, VE::BCFDnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3798 { 127 /* baf.d */, VE::BCFDnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3799 { 133 /* baf.d.nt */, VE::BCFDnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3800 { 133 /* baf.d.nt */, VE::BCFDnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3801 { 142 /* baf.d.t */, VE::BCFDnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3802 { 142 /* baf.d.t */, VE::BCFDnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3803 { 150 /* baf.l */, VE::BCFLnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3804 { 150 /* baf.l */, VE::BCFLnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3805 { 156 /* baf.l.nt */, VE::BCFLnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3806 { 156 /* baf.l.nt */, VE::BCFLnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3807 { 165 /* baf.l.t */, VE::BCFLnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3808 { 165 /* baf.l.t */, VE::BCFLnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3809 { 173 /* baf.s */, VE::BCFSnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3810 { 173 /* baf.s */, VE::BCFSnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3811 { 179 /* baf.s.nt */, VE::BCFSnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3812 { 179 /* baf.s.nt */, VE::BCFSnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3813 { 188 /* baf.s.t */, VE::BCFSnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3814 { 188 /* baf.s.t */, VE::BCFSnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3815 { 196 /* baf.w */, VE::BCFWnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3816 { 196 /* baf.w */, VE::BCFWnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3817 { 202 /* baf.w.nt */, VE::BCFWnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3818 { 202 /* baf.w.nt */, VE::BCFWnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3819 { 211 /* baf.w.t */, VE::BCFWnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3820 { 211 /* baf.w.t */, VE::BCFWnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
3821 { 219 /* br */, VE::BRCFDrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_I64, MCK_Imm }, },
3822 { 219 /* br */, VE::BRCFDrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_Zero, MCK_Imm }, },
3823 { 219 /* br */, VE::BRCFDir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_I64, MCK_Imm }, },
3824 { 219 /* br */, VE::BRCFDiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3825 { 219 /* br */, VE::BRCFDrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_I64, MCK_Imm }, },
3826 { 219 /* br */, VE::BRCFDrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_Zero, MCK_Imm }, },
3827 { 219 /* br */, VE::BRCFDir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_I64, MCK_Imm }, },
3828 { 219 /* br */, VE::BRCFDiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3829 { 219 /* br */, VE::BRCFDrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_I64, MCK_Imm }, },
3830 { 219 /* br */, VE::BRCFDrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_Zero, MCK_Imm }, },
3831 { 219 /* br */, VE::BRCFDir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_I64, MCK_Imm }, },
3832 { 219 /* br */, VE::BRCFDiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3833 { 219 /* br */, VE::BRCFLrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_I64, MCK_Imm }, },
3834 { 219 /* br */, VE::BRCFLrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_Zero, MCK_Imm }, },
3835 { 219 /* br */, VE::BRCFLir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_I64, MCK_Imm }, },
3836 { 219 /* br */, VE::BRCFLiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3837 { 219 /* br */, VE::BRCFLrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_I64, MCK_Imm }, },
3838 { 219 /* br */, VE::BRCFLrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_Zero, MCK_Imm }, },
3839 { 219 /* br */, VE::BRCFLir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_I64, MCK_Imm }, },
3840 { 219 /* br */, VE::BRCFLiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3841 { 219 /* br */, VE::BRCFLrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_I64, MCK_Imm }, },
3842 { 219 /* br */, VE::BRCFLrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_Zero, MCK_Imm }, },
3843 { 219 /* br */, VE::BRCFLir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_I64, MCK_Imm }, },
3844 { 219 /* br */, VE::BRCFLiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3845 { 219 /* br */, VE::BRCFSrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_F32, MCK_Imm }, },
3846 { 219 /* br */, VE::BRCFSrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_Zero, MCK_Imm }, },
3847 { 219 /* br */, VE::BRCFSir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_F32, MCK_Imm }, },
3848 { 219 /* br */, VE::BRCFSiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3849 { 219 /* br */, VE::BRCFSrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_F32, MCK_Imm }, },
3850 { 219 /* br */, VE::BRCFSrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_Zero, MCK_Imm }, },
3851 { 219 /* br */, VE::BRCFSir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_F32, MCK_Imm }, },
3852 { 219 /* br */, VE::BRCFSiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3853 { 219 /* br */, VE::BRCFSrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_F32, MCK_Imm }, },
3854 { 219 /* br */, VE::BRCFSrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_Zero, MCK_Imm }, },
3855 { 219 /* br */, VE::BRCFSir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_F32, MCK_Imm }, },
3856 { 219 /* br */, VE::BRCFSiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3857 { 219 /* br */, VE::BRCFWrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_I32, MCK_Imm }, },
3858 { 219 /* br */, VE::BRCFWrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_Zero, MCK_Imm }, },
3859 { 219 /* br */, VE::BRCFWir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_I32, MCK_Imm }, },
3860 { 219 /* br */, VE::BRCFWiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3861 { 219 /* br */, VE::BRCFWrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_I32, MCK_Imm }, },
3862 { 219 /* br */, VE::BRCFWrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_Zero, MCK_Imm }, },
3863 { 219 /* br */, VE::BRCFWir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_I32, MCK_Imm }, },
3864 { 219 /* br */, VE::BRCFWiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3865 { 219 /* br */, VE::BRCFWrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_I32, MCK_Imm }, },
3866 { 219 /* br */, VE::BRCFWrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_Zero, MCK_Imm }, },
3867 { 219 /* br */, VE::BRCFWir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_I32, MCK_Imm }, },
3868 { 219 /* br */, VE::BRCFWiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
3869 { 222 /* br.d */, VE::BRCFDa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3870 { 227 /* br.d.nt */, VE::BRCFDa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3871 { 235 /* br.d.t */, VE::BRCFDa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3872 { 242 /* br.l */, VE::BRCFLa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3873 { 247 /* br.l.nt */, VE::BRCFLa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3874 { 255 /* br.l.t */, VE::BRCFLa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3875 { 262 /* br.s */, VE::BRCFSa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3876 { 267 /* br.s.nt */, VE::BRCFSa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3877 { 275 /* br.s.t */, VE::BRCFSa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3878 { 282 /* br.w */, VE::BRCFWa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3879 { 287 /* br.w.nt */, VE::BRCFWa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3880 { 295 /* br.w.t */, VE::BRCFWa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3881 { 302 /* braf.d */, VE::BRCFDna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3882 { 309 /* braf.d.nt */, VE::BRCFDna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3883 { 319 /* braf.d.t */, VE::BRCFDna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3884 { 328 /* braf.l */, VE::BRCFLna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3885 { 335 /* braf.l.nt */, VE::BRCFLna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3886 { 345 /* braf.l.t */, VE::BRCFLna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3887 { 354 /* braf.s */, VE::BRCFSna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3888 { 361 /* braf.s.nt */, VE::BRCFSna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3889 { 371 /* braf.s.t */, VE::BRCFSna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3890 { 380 /* braf.w */, VE::BRCFWna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3891 { 387 /* braf.w.nt */, VE::BRCFWna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3892 { 397 /* braf.w.t */, VE::BRCFWna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3893 { 406 /* brv */, VE::BRVr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
3894 { 406 /* brv */, VE::BRVm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
3895 { 410 /* bsic */, VE::BSICrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
3896 { 410 /* bsic */, VE::BSICrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
3897 { 410 /* bsic */, VE::BSICzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
3898 { 410 /* bsic */, VE::BSICzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
3899 { 415 /* bswp */, VE::BSWPri, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm1 }, },
3900 { 415 /* bswp */, VE::BSWPmi, Convert__Reg1_0__MImm1_1__UImm11_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm1 }, },
3901 { 420 /* cas.l */, VE::CASLrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
3902 { 420 /* cas.l */, VE::CASLrii, Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_SImm7 }, },
3903 { 420 /* cas.l */, VE::CASLzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
3904 { 420 /* cas.l */, VE::CASLzii, Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_SImm7 }, },
3905 { 426 /* cas.w */, VE::CASWrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_I32 }, },
3906 { 426 /* cas.w */, VE::CASWrii, Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_SImm7 }, },
3907 { 426 /* cas.w */, VE::CASWzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_I32 }, },
3908 { 426 /* cas.w */, VE::CASWzii, Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_SImm7 }, },
3909 { 432 /* cmov.d. */, VE::CMOVDrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I64 }, },
3910 { 432 /* cmov.d. */, VE::CMOVDir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
3911 { 432 /* cmov.d. */, VE::CMOVDrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I64 }, },
3912 { 432 /* cmov.d. */, VE::CMOVDim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
3913 { 440 /* cmov.l. */, VE::CMOVLrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I64 }, },
3914 { 440 /* cmov.l. */, VE::CMOVLir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
3915 { 440 /* cmov.l. */, VE::CMOVLrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I64 }, },
3916 { 440 /* cmov.l. */, VE::CMOVLim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
3917 { 448 /* cmov.s. */, VE::CMOVSrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_F32 }, },
3918 { 448 /* cmov.s. */, VE::CMOVSir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
3919 { 448 /* cmov.s. */, VE::CMOVSrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_F32 }, },
3920 { 448 /* cmov.s. */, VE::CMOVSim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
3921 { 456 /* cmov.w. */, VE::CMOVWrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I32 }, },
3922 { 456 /* cmov.w. */, VE::CMOVWir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
3923 { 456 /* cmov.w. */, VE::CMOVWrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I32 }, },
3924 { 456 /* cmov.w. */, VE::CMOVWim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
3925 { 464 /* cmps.l */, VE::CMPSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3926 { 464 /* cmps.l */, VE::CMPSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3927 { 464 /* cmps.l */, VE::CMPSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3928 { 464 /* cmps.l */, VE::CMPSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3929 { 471 /* cmps.w.sx */, VE::CMPSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3930 { 471 /* cmps.w.sx */, VE::CMPSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3931 { 471 /* cmps.w.sx */, VE::CMPSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3932 { 471 /* cmps.w.sx */, VE::CMPSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3933 { 481 /* cmps.w.zx */, VE::CMPSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3934 { 481 /* cmps.w.zx */, VE::CMPSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3935 { 481 /* cmps.w.zx */, VE::CMPSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3936 { 481 /* cmps.w.zx */, VE::CMPSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3937 { 491 /* cmpu.l */, VE::CMPULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3938 { 491 /* cmpu.l */, VE::CMPULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3939 { 491 /* cmpu.l */, VE::CMPULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3940 { 491 /* cmpu.l */, VE::CMPULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3941 { 498 /* cmpu.w */, VE::CMPUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3942 { 498 /* cmpu.w */, VE::CMPUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3943 { 498 /* cmpu.w */, VE::CMPUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3944 { 498 /* cmpu.w */, VE::CMPUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3945 { 505 /* cvt.d.l */, VE::CVTDLr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
3946 { 505 /* cvt.d.l */, VE::CVTDLi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
3947 { 513 /* cvt.d.q */, VE::CVTDQr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_F128 }, },
3948 { 513 /* cvt.d.q */, VE::CVTDQi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
3949 { 521 /* cvt.d.s */, VE::CVTDSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_F32 }, },
3950 { 521 /* cvt.d.s */, VE::CVTDSi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
3951 { 529 /* cvt.d.w */, VE::CVTDWr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I32 }, },
3952 { 529 /* cvt.d.w */, VE::CVTDWi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
3953 { 537 /* cvt.l.d */, VE::CVTLDr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I64, MCK_I64 }, },
3954 { 537 /* cvt.l.d */, VE::CVTLDi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I64, MCK_SImm7 }, },
3955 { 545 /* cvt.q.d */, VE::CVTQDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F128, MCK_I64 }, },
3956 { 545 /* cvt.q.d */, VE::CVTQDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F128, MCK_SImm7 }, },
3957 { 553 /* cvt.q.s */, VE::CVTQSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F128, MCK_F32 }, },
3958 { 553 /* cvt.q.s */, VE::CVTQSi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F128, MCK_SImm7 }, },
3959 { 561 /* cvt.s.d */, VE::CVTSDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_I64 }, },
3960 { 561 /* cvt.s.d */, VE::CVTSDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
3961 { 569 /* cvt.s.q */, VE::CVTSQr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_F128 }, },
3962 { 569 /* cvt.s.q */, VE::CVTSQi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
3963 { 577 /* cvt.s.w */, VE::CVTSWr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_I32 }, },
3964 { 577 /* cvt.s.w */, VE::CVTSWi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
3965 { 585 /* cvt.w.d.sx */, VE::CVTWDSXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_I64 }, },
3966 { 585 /* cvt.w.d.sx */, VE::CVTWDSXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
3967 { 596 /* cvt.w.d.zx */, VE::CVTWDZXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_I64 }, },
3968 { 596 /* cvt.w.d.zx */, VE::CVTWDZXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
3969 { 607 /* cvt.w.s.sx */, VE::CVTWSSXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_F32 }, },
3970 { 607 /* cvt.w.s.sx */, VE::CVTWSSXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
3971 { 618 /* cvt.w.s.zx */, VE::CVTWSZXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_F32 }, },
3972 { 618 /* cvt.w.s.zx */, VE::CVTWSZXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
3973 { 629 /* divs.l */, VE::DIVSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3974 { 629 /* divs.l */, VE::DIVSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3975 { 629 /* divs.l */, VE::DIVSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3976 { 629 /* divs.l */, VE::DIVSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3977 { 636 /* divs.w.sx */, VE::DIVSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3978 { 636 /* divs.w.sx */, VE::DIVSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3979 { 636 /* divs.w.sx */, VE::DIVSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3980 { 636 /* divs.w.sx */, VE::DIVSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3981 { 646 /* divs.w.zx */, VE::DIVSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3982 { 646 /* divs.w.zx */, VE::DIVSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3983 { 646 /* divs.w.zx */, VE::DIVSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3984 { 646 /* divs.w.zx */, VE::DIVSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3985 { 656 /* divu.l */, VE::DIVULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
3986 { 656 /* divu.l */, VE::DIVULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
3987 { 656 /* divu.l */, VE::DIVULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
3988 { 656 /* divu.l */, VE::DIVULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
3989 { 663 /* divu.w */, VE::DIVUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
3990 { 663 /* divu.w */, VE::DIVUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
3991 { 663 /* divu.w */, VE::DIVUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
3992 { 663 /* divu.w */, VE::DIVUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
3993 { 670 /* dld */, VE::DLDrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
3994 { 670 /* dld */, VE::DLDrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
3995 { 670 /* dld */, VE::DLDzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
3996 { 670 /* dld */, VE::DLDzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
3997 { 674 /* dldl.sx */, VE::DLDLSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
3998 { 674 /* dldl.sx */, VE::DLDLSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
3999 { 674 /* dldl.sx */, VE::DLDLSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4000 { 674 /* dldl.sx */, VE::DLDLSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4001 { 682 /* dldl.zx */, VE::DLDLZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4002 { 682 /* dldl.zx */, VE::DLDLZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4003 { 682 /* dldl.zx */, VE::DLDLZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4004 { 682 /* dldl.zx */, VE::DLDLZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4005 { 690 /* dldu */, VE::DLDUrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
4006 { 690 /* dldu */, VE::DLDUrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
4007 { 690 /* dldu */, VE::DLDUzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
4008 { 690 /* dldu */, VE::DLDUzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
4009 { 695 /* eqv */, VE::EQVrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4010 { 695 /* eqv */, VE::EQVrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4011 { 695 /* eqv */, VE::EQVri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4012 { 695 /* eqv */, VE::EQVim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4013 { 699 /* eqvm */, VE::EQVMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4014 { 704 /* fadd.d */, VE::FADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4015 { 704 /* fadd.d */, VE::FADDDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4016 { 704 /* fadd.d */, VE::FADDDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4017 { 704 /* fadd.d */, VE::FADDDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4018 { 711 /* fadd.q */, VE::FADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4019 { 711 /* fadd.q */, VE::FADDQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4020 { 711 /* fadd.q */, VE::FADDQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4021 { 711 /* fadd.q */, VE::FADDQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4022 { 718 /* fadd.s */, VE::FADDSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4023 { 718 /* fadd.s */, VE::FADDSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4024 { 718 /* fadd.s */, VE::FADDSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4025 { 718 /* fadd.s */, VE::FADDSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4026 { 725 /* fcmp.d */, VE::FCMPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4027 { 725 /* fcmp.d */, VE::FCMPDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4028 { 725 /* fcmp.d */, VE::FCMPDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4029 { 725 /* fcmp.d */, VE::FCMPDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4030 { 732 /* fcmp.q */, VE::FCMPQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_F128, MCK_F128 }, },
4031 { 732 /* fcmp.q */, VE::FCMPQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_F128, MCK_MImm }, },
4032 { 732 /* fcmp.q */, VE::FCMPQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_F128 }, },
4033 { 732 /* fcmp.q */, VE::FCMPQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4034 { 739 /* fcmp.s */, VE::FCMPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4035 { 739 /* fcmp.s */, VE::FCMPSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4036 { 739 /* fcmp.s */, VE::FCMPSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4037 { 739 /* fcmp.s */, VE::FCMPSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4038 { 746 /* fdiv.d */, VE::FDIVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4039 { 746 /* fdiv.d */, VE::FDIVDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4040 { 746 /* fdiv.d */, VE::FDIVDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4041 { 746 /* fdiv.d */, VE::FDIVDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4042 { 753 /* fdiv.s */, VE::FDIVSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4043 { 753 /* fdiv.s */, VE::FDIVSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4044 { 753 /* fdiv.s */, VE::FDIVSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4045 { 753 /* fdiv.s */, VE::FDIVSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4046 { 760 /* fencec */, VE::FENCEC, Convert__UImm31_0, AMFBS_None, { MCK_UImm3 }, },
4047 { 767 /* fencei */, VE::FENCEI, Convert_NoOperands, AMFBS_None, { }, },
4048 { 774 /* fencem */, VE::FENCEM, Convert__UImm21_0, AMFBS_None, { MCK_UImm2 }, },
4049 { 781 /* fidcr */, VE::FIDCRri, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm3 }, },
4050 { 781 /* fidcr */, VE::FIDCRii, Convert__Reg1_0__SImm71_1__UImm31_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_UImm3 }, },
4051 { 787 /* fmax.d */, VE::FMAXDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4052 { 787 /* fmax.d */, VE::FMAXDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4053 { 787 /* fmax.d */, VE::FMAXDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4054 { 787 /* fmax.d */, VE::FMAXDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4055 { 794 /* fmax.s */, VE::FMAXSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4056 { 794 /* fmax.s */, VE::FMAXSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4057 { 794 /* fmax.s */, VE::FMAXSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4058 { 794 /* fmax.s */, VE::FMAXSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4059 { 801 /* fmin.d */, VE::FMINDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4060 { 801 /* fmin.d */, VE::FMINDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4061 { 801 /* fmin.d */, VE::FMINDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4062 { 801 /* fmin.d */, VE::FMINDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4063 { 808 /* fmin.s */, VE::FMINSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4064 { 808 /* fmin.s */, VE::FMINSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4065 { 808 /* fmin.s */, VE::FMINSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4066 { 808 /* fmin.s */, VE::FMINSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4067 { 815 /* fmul.d */, VE::FMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4068 { 815 /* fmul.d */, VE::FMULDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4069 { 815 /* fmul.d */, VE::FMULDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4070 { 815 /* fmul.d */, VE::FMULDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4071 { 822 /* fmul.q */, VE::FMULQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4072 { 822 /* fmul.q */, VE::FMULQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4073 { 822 /* fmul.q */, VE::FMULQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4074 { 822 /* fmul.q */, VE::FMULQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4075 { 829 /* fmul.s */, VE::FMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4076 { 829 /* fmul.s */, VE::FMULSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4077 { 829 /* fmul.s */, VE::FMULSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4078 { 829 /* fmul.s */, VE::FMULSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4079 { 836 /* fsub.d */, VE::FSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4080 { 836 /* fsub.d */, VE::FSUBDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4081 { 836 /* fsub.d */, VE::FSUBDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4082 { 836 /* fsub.d */, VE::FSUBDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4083 { 843 /* fsub.q */, VE::FSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4084 { 843 /* fsub.q */, VE::FSUBQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4085 { 843 /* fsub.q */, VE::FSUBQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4086 { 843 /* fsub.q */, VE::FSUBQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4087 { 850 /* fsub.s */, VE::FSUBSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4088 { 850 /* fsub.s */, VE::FSUBSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4089 { 850 /* fsub.s */, VE::FSUBSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4090 { 850 /* fsub.s */, VE::FSUBSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4091 { 857 /* lcr */, VE::LCRrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4092 { 857 /* lcr */, VE::LCRrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
4093 { 857 /* lcr */, VE::LCRir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4094 { 857 /* lcr */, VE::LCRiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
4095 { 861 /* ld */, VE::LDrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4096 { 861 /* ld */, VE::LDrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4097 { 861 /* ld */, VE::LDzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4098 { 861 /* ld */, VE::LDzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4099 { 864 /* ld1b.sx */, VE::LD1BSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4100 { 864 /* ld1b.sx */, VE::LD1BSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4101 { 864 /* ld1b.sx */, VE::LD1BSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4102 { 864 /* ld1b.sx */, VE::LD1BSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4103 { 872 /* ld1b.zx */, VE::LD1BZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4104 { 872 /* ld1b.zx */, VE::LD1BZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4105 { 872 /* ld1b.zx */, VE::LD1BZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4106 { 872 /* ld1b.zx */, VE::LD1BZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4107 { 880 /* ld2b.sx */, VE::LD2BSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4108 { 880 /* ld2b.sx */, VE::LD2BSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4109 { 880 /* ld2b.sx */, VE::LD2BSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4110 { 880 /* ld2b.sx */, VE::LD2BSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4111 { 888 /* ld2b.zx */, VE::LD2BZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4112 { 888 /* ld2b.zx */, VE::LD2BZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4113 { 888 /* ld2b.zx */, VE::LD2BZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4114 { 888 /* ld2b.zx */, VE::LD2BZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4115 { 896 /* ldl.sx */, VE::LDLSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4116 { 896 /* ldl.sx */, VE::LDLSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4117 { 896 /* ldl.sx */, VE::LDLSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4118 { 896 /* ldl.sx */, VE::LDLSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4119 { 903 /* ldl.zx */, VE::LDLZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4120 { 903 /* ldl.zx */, VE::LDLZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4121 { 903 /* ldl.zx */, VE::LDLZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4122 { 903 /* ldl.zx */, VE::LDLZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4123 { 910 /* ldu */, VE::LDUrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
4124 { 910 /* ldu */, VE::LDUrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
4125 { 910 /* ldu */, VE::LDUzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
4126 { 910 /* ldu */, VE::LDUzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
4127 { 914 /* ldz */, VE::LDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4128 { 914 /* ldz */, VE::LDZm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
4129 { 918 /* lea */, VE::LEArii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4130 { 918 /* lea */, VE::LEArri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4131 { 918 /* lea */, VE::LEAzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4132 { 918 /* lea */, VE::LEAzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4133 { 922 /* lea.sl */, VE::LEASLrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4134 { 922 /* lea.sl */, VE::LEASLrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4135 { 922 /* lea.sl */, VE::LEASLzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4136 { 922 /* lea.sl */, VE::LEASLzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4137 { 929 /* lfr */, VE::LFRr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4138 { 929 /* lfr */, VE::LFRi, Convert__UImm61_0, AMFBS_None, { MCK_UImm6 }, },
4139 { 933 /* lhm.b */, VE::LHMBri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4140 { 933 /* lhm.b */, VE::LHMBzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4141 { 939 /* lhm.h */, VE::LHMHri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4142 { 939 /* lhm.h */, VE::LHMHzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4143 { 945 /* lhm.l */, VE::LHMLri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4144 { 945 /* lhm.l */, VE::LHMLzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4145 { 951 /* lhm.w */, VE::LHMWri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4146 { 951 /* lhm.w */, VE::LHMWzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4147 { 957 /* lpm */, VE::LPM, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4148 { 961 /* lsv */, VE::LSVrr, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_I64, MCK__41_, MCK_I64 }, },
4149 { 961 /* lsv */, VE::LSVrm, Convert__Reg1_0__Reg1_2__MImm1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_I64, MCK__41_, MCK_MImm }, },
4150 { 961 /* lsv */, VE::LSVir, Convert__Reg1_0__UImm71_2__Reg1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_UImm7, MCK__41_, MCK_I64 }, },
4151 { 961 /* lsv */, VE::LSVim, Convert__Reg1_0__UImm71_2__MImm1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_UImm7, MCK__41_, MCK_MImm }, },
4152 { 965 /* lvix */, VE::LVIXr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4153 { 965 /* lvix */, VE::LVIXi, Convert__UImm61_0, AMFBS_None, { MCK_UImm6 }, },
4154 { 970 /* lvl */, VE::LVLr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4155 { 970 /* lvl */, VE::LVLi, Convert__SImm71_0, AMFBS_None, { MCK_SImm7 }, },
4156 { 974 /* lvm */, VE::LVMrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_I64, MCK_I64 }, },
4157 { 974 /* lvm */, VE::LVMrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_VM, MCK_I64, MCK_MImm }, },
4158 { 974 /* lvm */, VE::LVMir, Convert__Reg1_0__UImm21_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_UImm2, MCK_I64 }, },
4159 { 974 /* lvm */, VE::LVMim, Convert__Reg1_0__UImm21_1__MImm1_2, AMFBS_None, { MCK_VM, MCK_UImm2, MCK_MImm }, },
4160 { 978 /* lvs */, VE::LVSvr, Convert__Reg1_0__Reg1_1__Reg1_3, AMFBS_None, { MCK_I64, MCK_V64, MCK__40_, MCK_I64, MCK__41_ }, },
4161 { 978 /* lvs */, VE::LVSvi, Convert__Reg1_0__Reg1_1__UImm71_3, AMFBS_None, { MCK_I64, MCK_V64, MCK__40_, MCK_UImm7, MCK__41_ }, },
4162 { 982 /* lzvm */, VE::LZVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
4163 { 987 /* maxs.l */, VE::MAXSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4164 { 987 /* maxs.l */, VE::MAXSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4165 { 987 /* maxs.l */, VE::MAXSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4166 { 987 /* maxs.l */, VE::MAXSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4167 { 994 /* maxs.w.sx */, VE::MAXSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4168 { 994 /* maxs.w.sx */, VE::MAXSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4169 { 994 /* maxs.w.sx */, VE::MAXSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4170 { 994 /* maxs.w.sx */, VE::MAXSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4171 { 1004 /* maxs.w.zx */, VE::MAXSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4172 { 1004 /* maxs.w.zx */, VE::MAXSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4173 { 1004 /* maxs.w.zx */, VE::MAXSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4174 { 1004 /* maxs.w.zx */, VE::MAXSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4175 { 1014 /* mins.l */, VE::MINSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4176 { 1014 /* mins.l */, VE::MINSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4177 { 1014 /* mins.l */, VE::MINSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4178 { 1014 /* mins.l */, VE::MINSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4179 { 1021 /* mins.w.sx */, VE::MINSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4180 { 1021 /* mins.w.sx */, VE::MINSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4181 { 1021 /* mins.w.sx */, VE::MINSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4182 { 1021 /* mins.w.sx */, VE::MINSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4183 { 1031 /* mins.w.zx */, VE::MINSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4184 { 1031 /* mins.w.zx */, VE::MINSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4185 { 1031 /* mins.w.zx */, VE::MINSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4186 { 1031 /* mins.w.zx */, VE::MINSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4187 { 1041 /* monc */, VE::MONC, Convert_NoOperands, AMFBS_None, { }, },
4188 { 1046 /* monc.hdb */, VE::MONCHDB, Convert_NoOperands, AMFBS_None, { }, },
4189 { 1055 /* mrg */, VE::MRGrr, Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4190 { 1055 /* mrg */, VE::MRGrm, Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4191 { 1055 /* mrg */, VE::MRGir, Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4192 { 1055 /* mrg */, VE::MRGim, Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4193 { 1059 /* muls.l */, VE::MULSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4194 { 1059 /* muls.l */, VE::MULSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4195 { 1059 /* muls.l */, VE::MULSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4196 { 1059 /* muls.l */, VE::MULSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4197 { 1066 /* muls.l.w */, VE::MULSLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I32, MCK_I32 }, },
4198 { 1066 /* muls.l.w */, VE::MULSLWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I32, MCK_MImm }, },
4199 { 1066 /* muls.l.w */, VE::MULSLWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I32 }, },
4200 { 1066 /* muls.l.w */, VE::MULSLWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4201 { 1075 /* muls.w.sx */, VE::MULSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4202 { 1075 /* muls.w.sx */, VE::MULSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4203 { 1075 /* muls.w.sx */, VE::MULSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4204 { 1075 /* muls.w.sx */, VE::MULSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4205 { 1085 /* muls.w.zx */, VE::MULSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4206 { 1085 /* muls.w.zx */, VE::MULSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4207 { 1085 /* muls.w.zx */, VE::MULSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4208 { 1085 /* muls.w.zx */, VE::MULSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4209 { 1095 /* mulu.l */, VE::MULULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4210 { 1095 /* mulu.l */, VE::MULULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4211 { 1095 /* mulu.l */, VE::MULULri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4212 { 1095 /* mulu.l */, VE::MULULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4213 { 1102 /* mulu.w */, VE::MULUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4214 { 1102 /* mulu.w */, VE::MULUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4215 { 1102 /* mulu.w */, VE::MULUWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4216 { 1102 /* mulu.w */, VE::MULUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4217 { 1109 /* negm */, VE::NEGMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4218 { 1114 /* nnd */, VE::NNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4219 { 1114 /* nnd */, VE::NNDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4220 { 1114 /* nnd */, VE::NNDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4221 { 1114 /* nnd */, VE::NNDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4222 { 1118 /* nndm */, VE::NNDMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4223 { 1123 /* nop */, VE::NOP, Convert_NoOperands, AMFBS_None, { }, },
4224 { 1127 /* or */, VE::ORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4225 { 1127 /* or */, VE::ORrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4226 { 1127 /* or */, VE::ORri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4227 { 1127 /* or */, VE::ORim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4228 { 1130 /* orm */, VE::ORMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4229 { 1134 /* pcnt */, VE::PCNTr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4230 { 1134 /* pcnt */, VE::PCNTm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
4231 { 1139 /* pcvm */, VE::PCVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
4232 { 1144 /* pfch */, VE::PFCHrii, Convert__MEMrii3_0, AMFBS_None, { MCK_MEMrii }, },
4233 { 1144 /* pfch */, VE::PFCHrri, Convert__MEMrri3_0, AMFBS_None, { MCK_MEMrri }, },
4234 { 1144 /* pfch */, VE::PFCHzii, Convert__MEMzii3_0, AMFBS_None, { MCK_MEMzii }, },
4235 { 1144 /* pfch */, VE::PFCHzri, Convert__MEMzri3_0, AMFBS_None, { MCK_MEMzri }, },
4236 { 1149 /* pfchv */, VE::PFCHVrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4237 { 1149 /* pfchv */, VE::PFCHVrz, Convert__Reg1_0__Zero1_1, AMFBS_None, { MCK_I64, MCK_Zero }, },
4238 { 1149 /* pfchv */, VE::PFCHVir, Convert__SImm71_0__Reg1_1, AMFBS_None, { MCK_SImm7, MCK_I64 }, },
4239 { 1149 /* pfchv */, VE::PFCHViz, Convert__SImm71_0__Zero1_1, AMFBS_None, { MCK_SImm7, MCK_Zero }, },
4240 { 1155 /* pfchv.nc */, VE::PFCHVNCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4241 { 1155 /* pfchv.nc */, VE::PFCHVNCrz, Convert__Reg1_0__Zero1_1, AMFBS_None, { MCK_I64, MCK_Zero }, },
4242 { 1155 /* pfchv.nc */, VE::PFCHVNCir, Convert__SImm71_0__Reg1_1, AMFBS_None, { MCK_SImm7, MCK_I64 }, },
4243 { 1155 /* pfchv.nc */, VE::PFCHVNCiz, Convert__SImm71_0__Zero1_1, AMFBS_None, { MCK_SImm7, MCK_Zero }, },
4244 { 1164 /* pvadds */, VE::PVADDSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4245 { 1164 /* pvadds */, VE::PVADDSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4246 { 1164 /* pvadds */, VE::PVADDSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4247 { 1164 /* pvadds */, VE::PVADDSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4248 { 1164 /* pvadds */, VE::PVADDSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4249 { 1164 /* pvadds */, VE::PVADDSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4250 { 1171 /* pvadds.lo */, VE::PVADDSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4251 { 1171 /* pvadds.lo */, VE::PVADDSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4252 { 1171 /* pvadds.lo */, VE::PVADDSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4253 { 1171 /* pvadds.lo */, VE::PVADDSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4254 { 1171 /* pvadds.lo */, VE::PVADDSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4255 { 1171 /* pvadds.lo */, VE::PVADDSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4256 { 1181 /* pvadds.up */, VE::PVADDSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4257 { 1181 /* pvadds.up */, VE::PVADDSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4258 { 1181 /* pvadds.up */, VE::PVADDSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4259 { 1181 /* pvadds.up */, VE::PVADDSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4260 { 1181 /* pvadds.up */, VE::PVADDSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4261 { 1181 /* pvadds.up */, VE::PVADDSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4262 { 1191 /* pvaddu */, VE::PVADDUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4263 { 1191 /* pvaddu */, VE::PVADDUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4264 { 1191 /* pvaddu */, VE::PVADDUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4265 { 1191 /* pvaddu */, VE::PVADDUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4266 { 1191 /* pvaddu */, VE::PVADDUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4267 { 1191 /* pvaddu */, VE::PVADDUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4268 { 1198 /* pvaddu.lo */, VE::PVADDULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4269 { 1198 /* pvaddu.lo */, VE::PVADDULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4270 { 1198 /* pvaddu.lo */, VE::PVADDULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4271 { 1198 /* pvaddu.lo */, VE::PVADDULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4272 { 1198 /* pvaddu.lo */, VE::PVADDULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4273 { 1198 /* pvaddu.lo */, VE::PVADDULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4274 { 1208 /* pvaddu.up */, VE::PVADDUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4275 { 1208 /* pvaddu.up */, VE::PVADDUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4276 { 1208 /* pvaddu.up */, VE::PVADDUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4277 { 1208 /* pvaddu.up */, VE::PVADDUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4278 { 1208 /* pvaddu.up */, VE::PVADDUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4279 { 1208 /* pvaddu.up */, VE::PVADDUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4280 { 1218 /* pvand */, VE::PVANDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4281 { 1218 /* pvand */, VE::PVANDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4282 { 1218 /* pvand */, VE::PVANDmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4283 { 1218 /* pvand */, VE::PVANDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4284 { 1218 /* pvand */, VE::PVANDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4285 { 1218 /* pvand */, VE::PVANDmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
4286 { 1224 /* pvand.lo */, VE::PVANDLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4287 { 1224 /* pvand.lo */, VE::PVANDLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4288 { 1224 /* pvand.lo */, VE::PVANDLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4289 { 1224 /* pvand.lo */, VE::PVANDLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4290 { 1224 /* pvand.lo */, VE::PVANDLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4291 { 1224 /* pvand.lo */, VE::PVANDLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4292 { 1233 /* pvand.up */, VE::PVANDUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4293 { 1233 /* pvand.up */, VE::PVANDUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4294 { 1233 /* pvand.up */, VE::PVANDUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4295 { 1233 /* pvand.up */, VE::PVANDUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4296 { 1233 /* pvand.up */, VE::PVANDUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4297 { 1233 /* pvand.up */, VE::PVANDUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4298 { 1242 /* pvbrd */, VE::PVBRDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I64 }, },
4299 { 1242 /* pvbrd */, VE::PVBRDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
4300 { 1242 /* pvbrd */, VE::PVBRDrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_VM512 }, },
4301 { 1242 /* pvbrd */, VE::PVBRDim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM512 }, },
4302 { 1248 /* pvbrv */, VE::PVBRVv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4303 { 1248 /* pvbrv */, VE::PVBRVvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4304 { 1254 /* pvbrv.lo */, VE::PVBRVLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4305 { 1254 /* pvbrv.lo */, VE::PVBRVLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4306 { 1263 /* pvbrv.up */, VE::PVBRVUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4307 { 1263 /* pvbrv.up */, VE::PVBRVUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4308 { 1272 /* pvcmps */, VE::PVCMPSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4309 { 1272 /* pvcmps */, VE::PVCMPSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4310 { 1272 /* pvcmps */, VE::PVCMPSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4311 { 1272 /* pvcmps */, VE::PVCMPSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4312 { 1272 /* pvcmps */, VE::PVCMPSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4313 { 1272 /* pvcmps */, VE::PVCMPSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4314 { 1279 /* pvcmps.lo */, VE::PVCMPSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4315 { 1279 /* pvcmps.lo */, VE::PVCMPSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4316 { 1279 /* pvcmps.lo */, VE::PVCMPSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4317 { 1279 /* pvcmps.lo */, VE::PVCMPSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4318 { 1279 /* pvcmps.lo */, VE::PVCMPSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4319 { 1279 /* pvcmps.lo */, VE::PVCMPSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4320 { 1289 /* pvcmps.up */, VE::PVCMPSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4321 { 1289 /* pvcmps.up */, VE::PVCMPSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4322 { 1289 /* pvcmps.up */, VE::PVCMPSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4323 { 1289 /* pvcmps.up */, VE::PVCMPSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4324 { 1289 /* pvcmps.up */, VE::PVCMPSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4325 { 1289 /* pvcmps.up */, VE::PVCMPSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4326 { 1299 /* pvcmpu */, VE::PVCMPUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4327 { 1299 /* pvcmpu */, VE::PVCMPUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4328 { 1299 /* pvcmpu */, VE::PVCMPUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4329 { 1299 /* pvcmpu */, VE::PVCMPUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4330 { 1299 /* pvcmpu */, VE::PVCMPUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4331 { 1299 /* pvcmpu */, VE::PVCMPUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4332 { 1306 /* pvcmpu.lo */, VE::PVCMPULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4333 { 1306 /* pvcmpu.lo */, VE::PVCMPULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4334 { 1306 /* pvcmpu.lo */, VE::PVCMPULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4335 { 1306 /* pvcmpu.lo */, VE::PVCMPULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4336 { 1306 /* pvcmpu.lo */, VE::PVCMPULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4337 { 1306 /* pvcmpu.lo */, VE::PVCMPULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4338 { 1316 /* pvcmpu.up */, VE::PVCMPUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4339 { 1316 /* pvcmpu.up */, VE::PVCMPUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4340 { 1316 /* pvcmpu.up */, VE::PVCMPUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4341 { 1316 /* pvcmpu.up */, VE::PVCMPUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4342 { 1316 /* pvcmpu.up */, VE::PVCMPUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4343 { 1316 /* pvcmpu.up */, VE::PVCMPUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4344 { 1326 /* pvcvt.s.w */, VE::PVCVTSWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4345 { 1326 /* pvcvt.s.w */, VE::PVCVTSWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4346 { 1336 /* pvcvt.s.w.lo */, VE::PVCVTSWLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4347 { 1336 /* pvcvt.s.w.lo */, VE::PVCVTSWLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4348 { 1349 /* pvcvt.s.w.up */, VE::PVCVTSWUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4349 { 1349 /* pvcvt.s.w.up */, VE::PVCVTSWUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4350 { 1362 /* pvcvt.w.s */, VE::PVCVTWSv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4351 { 1362 /* pvcvt.w.s */, VE::PVCVTWSvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM512 }, },
4352 { 1372 /* pvcvt.w.s.lo */, VE::PVCVTWSLOv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4353 { 1372 /* pvcvt.w.s.lo */, VE::PVCVTWSLOvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
4354 { 1385 /* pvcvt.w.s.up */, VE::PVCVTWSUPv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4355 { 1385 /* pvcvt.w.s.up */, VE::PVCVTWSUPvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
4356 { 1398 /* pveqv */, VE::PVEQVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4357 { 1398 /* pveqv */, VE::PVEQVvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4358 { 1398 /* pveqv */, VE::PVEQVmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4359 { 1398 /* pveqv */, VE::PVEQVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4360 { 1398 /* pveqv */, VE::PVEQVvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4361 { 1398 /* pveqv */, VE::PVEQVmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
4362 { 1404 /* pveqv.lo */, VE::PVEQVLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4363 { 1404 /* pveqv.lo */, VE::PVEQVLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4364 { 1404 /* pveqv.lo */, VE::PVEQVLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4365 { 1404 /* pveqv.lo */, VE::PVEQVLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4366 { 1404 /* pveqv.lo */, VE::PVEQVLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4367 { 1404 /* pveqv.lo */, VE::PVEQVLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4368 { 1413 /* pveqv.up */, VE::PVEQVUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4369 { 1413 /* pveqv.up */, VE::PVEQVUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4370 { 1413 /* pveqv.up */, VE::PVEQVUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4371 { 1413 /* pveqv.up */, VE::PVEQVUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4372 { 1413 /* pveqv.up */, VE::PVEQVUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4373 { 1413 /* pveqv.up */, VE::PVEQVUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4374 { 1422 /* pvfadd */, VE::PVFADDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4375 { 1422 /* pvfadd */, VE::PVFADDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4376 { 1422 /* pvfadd */, VE::PVFADDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4377 { 1422 /* pvfadd */, VE::PVFADDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4378 { 1422 /* pvfadd */, VE::PVFADDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4379 { 1422 /* pvfadd */, VE::PVFADDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4380 { 1429 /* pvfadd.lo */, VE::PVFADDLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4381 { 1429 /* pvfadd.lo */, VE::PVFADDLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4382 { 1429 /* pvfadd.lo */, VE::PVFADDLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4383 { 1429 /* pvfadd.lo */, VE::PVFADDLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4384 { 1429 /* pvfadd.lo */, VE::PVFADDLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4385 { 1429 /* pvfadd.lo */, VE::PVFADDLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4386 { 1439 /* pvfadd.up */, VE::PVFADDUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4387 { 1439 /* pvfadd.up */, VE::PVFADDUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4388 { 1439 /* pvfadd.up */, VE::PVFADDUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4389 { 1439 /* pvfadd.up */, VE::PVFADDUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4390 { 1439 /* pvfadd.up */, VE::PVFADDUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4391 { 1439 /* pvfadd.up */, VE::PVFADDUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4392 { 1449 /* pvfcmp */, VE::PVFCMPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4393 { 1449 /* pvfcmp */, VE::PVFCMPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4394 { 1449 /* pvfcmp */, VE::PVFCMPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4395 { 1449 /* pvfcmp */, VE::PVFCMPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4396 { 1449 /* pvfcmp */, VE::PVFCMPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4397 { 1449 /* pvfcmp */, VE::PVFCMPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4398 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4399 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4400 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4401 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4402 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4403 { 1456 /* pvfcmp.lo */, VE::PVFCMPLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4404 { 1466 /* pvfcmp.up */, VE::PVFCMPUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4405 { 1466 /* pvfcmp.up */, VE::PVFCMPUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4406 { 1466 /* pvfcmp.up */, VE::PVFCMPUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4407 { 1466 /* pvfcmp.up */, VE::PVFCMPUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4408 { 1466 /* pvfcmp.up */, VE::PVFCMPUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4409 { 1466 /* pvfcmp.up */, VE::PVFCMPUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4410 { 1476 /* pvfmad */, VE::PVFMADrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4411 { 1476 /* pvfmad */, VE::PVFMADvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4412 { 1476 /* pvfmad */, VE::PVFMADvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4413 { 1476 /* pvfmad */, VE::PVFMADviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4414 { 1476 /* pvfmad */, VE::PVFMADivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4415 { 1476 /* pvfmad */, VE::PVFMADrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
4416 { 1476 /* pvfmad */, VE::PVFMADvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4417 { 1476 /* pvfmad */, VE::PVFMADvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4418 { 1476 /* pvfmad */, VE::PVFMADvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4419 { 1476 /* pvfmad */, VE::PVFMADivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
4420 { 1483 /* pvfmad.lo */, VE::PVFMADLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4421 { 1483 /* pvfmad.lo */, VE::PVFMADLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4422 { 1483 /* pvfmad.lo */, VE::PVFMADLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4423 { 1483 /* pvfmad.lo */, VE::PVFMADLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4424 { 1483 /* pvfmad.lo */, VE::PVFMADLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4425 { 1483 /* pvfmad.lo */, VE::PVFMADLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
4426 { 1483 /* pvfmad.lo */, VE::PVFMADLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4427 { 1483 /* pvfmad.lo */, VE::PVFMADLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4428 { 1483 /* pvfmad.lo */, VE::PVFMADLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4429 { 1483 /* pvfmad.lo */, VE::PVFMADLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4430 { 1493 /* pvfmad.up */, VE::PVFMADUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
4431 { 1493 /* pvfmad.up */, VE::PVFMADUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
4432 { 1493 /* pvfmad.up */, VE::PVFMADUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4433 { 1493 /* pvfmad.up */, VE::PVFMADUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4434 { 1493 /* pvfmad.up */, VE::PVFMADUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4435 { 1493 /* pvfmad.up */, VE::PVFMADUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
4436 { 1493 /* pvfmad.up */, VE::PVFMADUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4437 { 1493 /* pvfmad.up */, VE::PVFMADUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4438 { 1493 /* pvfmad.up */, VE::PVFMADUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4439 { 1493 /* pvfmad.up */, VE::PVFMADUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4440 { 1503 /* pvfmax */, VE::PVFMAXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4441 { 1503 /* pvfmax */, VE::PVFMAXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4442 { 1503 /* pvfmax */, VE::PVFMAXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4443 { 1503 /* pvfmax */, VE::PVFMAXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4444 { 1503 /* pvfmax */, VE::PVFMAXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4445 { 1503 /* pvfmax */, VE::PVFMAXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4446 { 1510 /* pvfmax.lo */, VE::PVFMAXLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4447 { 1510 /* pvfmax.lo */, VE::PVFMAXLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4448 { 1510 /* pvfmax.lo */, VE::PVFMAXLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4449 { 1510 /* pvfmax.lo */, VE::PVFMAXLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4450 { 1510 /* pvfmax.lo */, VE::PVFMAXLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4451 { 1510 /* pvfmax.lo */, VE::PVFMAXLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4452 { 1520 /* pvfmax.up */, VE::PVFMAXUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4453 { 1520 /* pvfmax.up */, VE::PVFMAXUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4454 { 1520 /* pvfmax.up */, VE::PVFMAXUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4455 { 1520 /* pvfmax.up */, VE::PVFMAXUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4456 { 1520 /* pvfmax.up */, VE::PVFMAXUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4457 { 1520 /* pvfmax.up */, VE::PVFMAXUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4458 { 1530 /* pvfmin */, VE::PVFMINrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4459 { 1530 /* pvfmin */, VE::PVFMINvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4460 { 1530 /* pvfmin */, VE::PVFMINiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4461 { 1530 /* pvfmin */, VE::PVFMINrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4462 { 1530 /* pvfmin */, VE::PVFMINvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4463 { 1530 /* pvfmin */, VE::PVFMINivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4464 { 1537 /* pvfmin.lo */, VE::PVFMINLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4465 { 1537 /* pvfmin.lo */, VE::PVFMINLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4466 { 1537 /* pvfmin.lo */, VE::PVFMINLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4467 { 1537 /* pvfmin.lo */, VE::PVFMINLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4468 { 1537 /* pvfmin.lo */, VE::PVFMINLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4469 { 1537 /* pvfmin.lo */, VE::PVFMINLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4470 { 1547 /* pvfmin.up */, VE::PVFMINUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4471 { 1547 /* pvfmin.up */, VE::PVFMINUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4472 { 1547 /* pvfmin.up */, VE::PVFMINUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4473 { 1547 /* pvfmin.up */, VE::PVFMINUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4474 { 1547 /* pvfmin.up */, VE::PVFMINUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4475 { 1547 /* pvfmin.up */, VE::PVFMINUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4476 { 1557 /* pvfmk.s.lo. */, VE::PVFMKSLOv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
4477 { 1557 /* pvfmk.s.lo. */, VE::PVFMKSLOvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
4478 { 1569 /* pvfmk.s.lo.af */, VE::PVFMKSLOna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4479 { 1569 /* pvfmk.s.lo.af */, VE::PVFMKSLOnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4480 { 1583 /* pvfmk.s.lo.at */, VE::PVFMKSLOa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4481 { 1583 /* pvfmk.s.lo.at */, VE::PVFMKSLOam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4482 { 1597 /* pvfmk.s.up. */, VE::PVFMKSUPv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
4483 { 1597 /* pvfmk.s.up. */, VE::PVFMKSUPvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
4484 { 1609 /* pvfmk.s.up.af */, VE::PVFMKSUPna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4485 { 1609 /* pvfmk.s.up.af */, VE::PVFMKSUPnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4486 { 1623 /* pvfmk.s.up.at */, VE::PVFMKSUPa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4487 { 1623 /* pvfmk.s.up.at */, VE::PVFMKSUPam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4488 { 1637 /* pvfmk.w.up. */, VE::PVFMKWUPv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
4489 { 1637 /* pvfmk.w.up. */, VE::PVFMKWUPvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
4490 { 1649 /* pvfmk.w.up.af */, VE::PVFMKWUPna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4491 { 1649 /* pvfmk.w.up.af */, VE::PVFMKWUPnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4492 { 1663 /* pvfmk.w.up.at */, VE::PVFMKWUPa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
4493 { 1663 /* pvfmk.w.up.at */, VE::PVFMKWUPam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4494 { 1677 /* pvfmsb */, VE::PVFMSBrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4495 { 1677 /* pvfmsb */, VE::PVFMSBvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4496 { 1677 /* pvfmsb */, VE::PVFMSBvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4497 { 1677 /* pvfmsb */, VE::PVFMSBviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4498 { 1677 /* pvfmsb */, VE::PVFMSBivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4499 { 1677 /* pvfmsb */, VE::PVFMSBrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
4500 { 1677 /* pvfmsb */, VE::PVFMSBvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4501 { 1677 /* pvfmsb */, VE::PVFMSBvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4502 { 1677 /* pvfmsb */, VE::PVFMSBvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4503 { 1677 /* pvfmsb */, VE::PVFMSBivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
4504 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4505 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4506 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4507 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4508 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4509 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
4510 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4511 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4512 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4513 { 1684 /* pvfmsb.lo */, VE::PVFMSBLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4514 { 1694 /* pvfmsb.up */, VE::PVFMSBUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
4515 { 1694 /* pvfmsb.up */, VE::PVFMSBUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
4516 { 1694 /* pvfmsb.up */, VE::PVFMSBUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4517 { 1694 /* pvfmsb.up */, VE::PVFMSBUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4518 { 1694 /* pvfmsb.up */, VE::PVFMSBUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4519 { 1694 /* pvfmsb.up */, VE::PVFMSBUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
4520 { 1694 /* pvfmsb.up */, VE::PVFMSBUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4521 { 1694 /* pvfmsb.up */, VE::PVFMSBUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4522 { 1694 /* pvfmsb.up */, VE::PVFMSBUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4523 { 1694 /* pvfmsb.up */, VE::PVFMSBUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4524 { 1704 /* pvfmul */, VE::PVFMULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4525 { 1704 /* pvfmul */, VE::PVFMULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4526 { 1704 /* pvfmul */, VE::PVFMULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4527 { 1704 /* pvfmul */, VE::PVFMULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4528 { 1704 /* pvfmul */, VE::PVFMULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4529 { 1704 /* pvfmul */, VE::PVFMULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4530 { 1711 /* pvfmul.lo */, VE::PVFMULLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4531 { 1711 /* pvfmul.lo */, VE::PVFMULLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4532 { 1711 /* pvfmul.lo */, VE::PVFMULLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4533 { 1711 /* pvfmul.lo */, VE::PVFMULLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4534 { 1711 /* pvfmul.lo */, VE::PVFMULLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4535 { 1711 /* pvfmul.lo */, VE::PVFMULLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4536 { 1721 /* pvfmul.up */, VE::PVFMULUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4537 { 1721 /* pvfmul.up */, VE::PVFMULUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4538 { 1721 /* pvfmul.up */, VE::PVFMULUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4539 { 1721 /* pvfmul.up */, VE::PVFMULUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4540 { 1721 /* pvfmul.up */, VE::PVFMULUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4541 { 1721 /* pvfmul.up */, VE::PVFMULUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4542 { 1731 /* pvfnmad */, VE::PVFNMADrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4543 { 1731 /* pvfnmad */, VE::PVFNMADvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4544 { 1731 /* pvfnmad */, VE::PVFNMADvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4545 { 1731 /* pvfnmad */, VE::PVFNMADviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4546 { 1731 /* pvfnmad */, VE::PVFNMADivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4547 { 1731 /* pvfnmad */, VE::PVFNMADrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
4548 { 1731 /* pvfnmad */, VE::PVFNMADvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4549 { 1731 /* pvfnmad */, VE::PVFNMADvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4550 { 1731 /* pvfnmad */, VE::PVFNMADvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4551 { 1731 /* pvfnmad */, VE::PVFNMADivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
4552 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4553 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4554 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4555 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4556 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4557 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
4558 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4559 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4560 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4561 { 1739 /* pvfnmad.lo */, VE::PVFNMADLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4562 { 1750 /* pvfnmad.up */, VE::PVFNMADUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
4563 { 1750 /* pvfnmad.up */, VE::PVFNMADUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
4564 { 1750 /* pvfnmad.up */, VE::PVFNMADUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4565 { 1750 /* pvfnmad.up */, VE::PVFNMADUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4566 { 1750 /* pvfnmad.up */, VE::PVFNMADUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4567 { 1750 /* pvfnmad.up */, VE::PVFNMADUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
4568 { 1750 /* pvfnmad.up */, VE::PVFNMADUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4569 { 1750 /* pvfnmad.up */, VE::PVFNMADUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4570 { 1750 /* pvfnmad.up */, VE::PVFNMADUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4571 { 1750 /* pvfnmad.up */, VE::PVFNMADUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4572 { 1761 /* pvfnmsb */, VE::PVFNMSBrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4573 { 1761 /* pvfnmsb */, VE::PVFNMSBvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4574 { 1761 /* pvfnmsb */, VE::PVFNMSBvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4575 { 1761 /* pvfnmsb */, VE::PVFNMSBviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4576 { 1761 /* pvfnmsb */, VE::PVFNMSBivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4577 { 1761 /* pvfnmsb */, VE::PVFNMSBrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
4578 { 1761 /* pvfnmsb */, VE::PVFNMSBvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4579 { 1761 /* pvfnmsb */, VE::PVFNMSBvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4580 { 1761 /* pvfnmsb */, VE::PVFNMSBvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4581 { 1761 /* pvfnmsb */, VE::PVFNMSBivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
4582 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
4583 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
4584 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4585 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4586 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4587 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
4588 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4589 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4590 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4591 { 1769 /* pvfnmsb.lo */, VE::PVFNMSBLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4592 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
4593 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
4594 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
4595 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
4596 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
4597 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
4598 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4599 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4600 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4601 { 1780 /* pvfnmsb.up */, VE::PVFNMSBUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
4602 { 1791 /* pvfsub */, VE::PVFSUBrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4603 { 1791 /* pvfsub */, VE::PVFSUBvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4604 { 1791 /* pvfsub */, VE::PVFSUBiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4605 { 1791 /* pvfsub */, VE::PVFSUBrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4606 { 1791 /* pvfsub */, VE::PVFSUBvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4607 { 1791 /* pvfsub */, VE::PVFSUBivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4608 { 1798 /* pvfsub.lo */, VE::PVFSUBLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4609 { 1798 /* pvfsub.lo */, VE::PVFSUBLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4610 { 1798 /* pvfsub.lo */, VE::PVFSUBLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4611 { 1798 /* pvfsub.lo */, VE::PVFSUBLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4612 { 1798 /* pvfsub.lo */, VE::PVFSUBLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4613 { 1798 /* pvfsub.lo */, VE::PVFSUBLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4614 { 1808 /* pvfsub.up */, VE::PVFSUBUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4615 { 1808 /* pvfsub.up */, VE::PVFSUBUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4616 { 1808 /* pvfsub.up */, VE::PVFSUBUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4617 { 1808 /* pvfsub.up */, VE::PVFSUBUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4618 { 1808 /* pvfsub.up */, VE::PVFSUBUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4619 { 1808 /* pvfsub.up */, VE::PVFSUBUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4620 { 1818 /* pvldz */, VE::PVLDZv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4621 { 1818 /* pvldz */, VE::PVLDZvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4622 { 1824 /* pvldz.lo */, VE::PVLDZLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4623 { 1824 /* pvldz.lo */, VE::PVLDZLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4624 { 1833 /* pvldz.up */, VE::PVLDZUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4625 { 1833 /* pvldz.up */, VE::PVLDZUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4626 { 1842 /* pvmaxs */, VE::PVMAXSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4627 { 1842 /* pvmaxs */, VE::PVMAXSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4628 { 1842 /* pvmaxs */, VE::PVMAXSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4629 { 1842 /* pvmaxs */, VE::PVMAXSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4630 { 1842 /* pvmaxs */, VE::PVMAXSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4631 { 1842 /* pvmaxs */, VE::PVMAXSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4632 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4633 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4634 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4635 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4636 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4637 { 1849 /* pvmaxs.lo */, VE::PVMAXSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4638 { 1859 /* pvmaxs.up */, VE::PVMAXSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4639 { 1859 /* pvmaxs.up */, VE::PVMAXSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4640 { 1859 /* pvmaxs.up */, VE::PVMAXSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4641 { 1859 /* pvmaxs.up */, VE::PVMAXSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4642 { 1859 /* pvmaxs.up */, VE::PVMAXSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4643 { 1859 /* pvmaxs.up */, VE::PVMAXSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4644 { 1869 /* pvmins */, VE::PVMINSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4645 { 1869 /* pvmins */, VE::PVMINSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4646 { 1869 /* pvmins */, VE::PVMINSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4647 { 1869 /* pvmins */, VE::PVMINSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4648 { 1869 /* pvmins */, VE::PVMINSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4649 { 1869 /* pvmins */, VE::PVMINSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4650 { 1876 /* pvmins.lo */, VE::PVMINSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4651 { 1876 /* pvmins.lo */, VE::PVMINSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4652 { 1876 /* pvmins.lo */, VE::PVMINSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4653 { 1876 /* pvmins.lo */, VE::PVMINSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4654 { 1876 /* pvmins.lo */, VE::PVMINSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4655 { 1876 /* pvmins.lo */, VE::PVMINSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4656 { 1886 /* pvmins.up */, VE::PVMINSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4657 { 1886 /* pvmins.up */, VE::PVMINSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4658 { 1886 /* pvmins.up */, VE::PVMINSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4659 { 1886 /* pvmins.up */, VE::PVMINSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4660 { 1886 /* pvmins.up */, VE::PVMINSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4661 { 1886 /* pvmins.up */, VE::PVMINSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4662 { 1896 /* pvor */, VE::PVORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4663 { 1896 /* pvor */, VE::PVORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4664 { 1896 /* pvor */, VE::PVORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4665 { 1896 /* pvor */, VE::PVORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4666 { 1896 /* pvor */, VE::PVORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4667 { 1896 /* pvor */, VE::PVORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
4668 { 1901 /* pvor.lo */, VE::PVORLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4669 { 1901 /* pvor.lo */, VE::PVORLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4670 { 1901 /* pvor.lo */, VE::PVORLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4671 { 1901 /* pvor.lo */, VE::PVORLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4672 { 1901 /* pvor.lo */, VE::PVORLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4673 { 1901 /* pvor.lo */, VE::PVORLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4674 { 1909 /* pvor.up */, VE::PVORUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4675 { 1909 /* pvor.up */, VE::PVORUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4676 { 1909 /* pvor.up */, VE::PVORUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4677 { 1909 /* pvor.up */, VE::PVORUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4678 { 1909 /* pvor.up */, VE::PVORUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4679 { 1909 /* pvor.up */, VE::PVORUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4680 { 1917 /* pvpcnt */, VE::PVPCNTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4681 { 1917 /* pvpcnt */, VE::PVPCNTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4682 { 1924 /* pvpcnt.lo */, VE::PVPCNTLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4683 { 1924 /* pvpcnt.lo */, VE::PVPCNTLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4684 { 1934 /* pvpcnt.up */, VE::PVPCNTUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4685 { 1934 /* pvpcnt.up */, VE::PVPCNTUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4686 { 1944 /* pvrcp */, VE::PVRCPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4687 { 1944 /* pvrcp */, VE::PVRCPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4688 { 1950 /* pvrcp.lo */, VE::PVRCPLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4689 { 1950 /* pvrcp.lo */, VE::PVRCPLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4690 { 1959 /* pvrcp.up */, VE::PVRCPUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4691 { 1959 /* pvrcp.up */, VE::PVRCPUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4692 { 1968 /* pvrsqrt */, VE::PVRSQRTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4693 { 1968 /* pvrsqrt */, VE::PVRSQRTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4694 { 1976 /* pvrsqrt.lo */, VE::PVRSQRTLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4695 { 1976 /* pvrsqrt.lo */, VE::PVRSQRTLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4696 { 1987 /* pvrsqrt.lo.nex */, VE::PVRSQRTLONEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4697 { 1987 /* pvrsqrt.lo.nex */, VE::PVRSQRTLONEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4698 { 2002 /* pvrsqrt.nex */, VE::PVRSQRTNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4699 { 2002 /* pvrsqrt.nex */, VE::PVRSQRTNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4700 { 2014 /* pvrsqrt.up */, VE::PVRSQRTUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4701 { 2014 /* pvrsqrt.up */, VE::PVRSQRTUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4702 { 2025 /* pvrsqrt.up.nex */, VE::PVRSQRTUPNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4703 { 2025 /* pvrsqrt.up.nex */, VE::PVRSQRTUPNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4704 { 2040 /* pvseq */, VE::PVSEQ, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
4705 { 2040 /* pvseq */, VE::PVSEQm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM512 }, },
4706 { 2046 /* pvseq.lo */, VE::PVSEQLO, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
4707 { 2046 /* pvseq.lo */, VE::PVSEQLOm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
4708 { 2055 /* pvseq.up */, VE::PVSEQUP, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
4709 { 2055 /* pvseq.up */, VE::PVSEQUPm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
4710 { 2064 /* pvsla */, VE::PVSLAvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
4711 { 2064 /* pvsla */, VE::PVSLAvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4712 { 2064 /* pvsla */, VE::PVSLAvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4713 { 2064 /* pvsla */, VE::PVSLAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
4714 { 2064 /* pvsla */, VE::PVSLAvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4715 { 2064 /* pvsla */, VE::PVSLAvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
4716 { 2070 /* pvsla.lo */, VE::PVSLALOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
4717 { 2070 /* pvsla.lo */, VE::PVSLALOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4718 { 2070 /* pvsla.lo */, VE::PVSLALOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4719 { 2070 /* pvsla.lo */, VE::PVSLALOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
4720 { 2070 /* pvsla.lo */, VE::PVSLALOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4721 { 2070 /* pvsla.lo */, VE::PVSLALOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4722 { 2079 /* pvsla.up */, VE::PVSLAUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
4723 { 2079 /* pvsla.up */, VE::PVSLAUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4724 { 2079 /* pvsla.up */, VE::PVSLAUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4725 { 2079 /* pvsla.up */, VE::PVSLAUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
4726 { 2079 /* pvsla.up */, VE::PVSLAUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4727 { 2079 /* pvsla.up */, VE::PVSLAUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4728 { 2088 /* pvsll */, VE::PVSLLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
4729 { 2088 /* pvsll */, VE::PVSLLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4730 { 2088 /* pvsll */, VE::PVSLLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4731 { 2088 /* pvsll */, VE::PVSLLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
4732 { 2088 /* pvsll */, VE::PVSLLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4733 { 2088 /* pvsll */, VE::PVSLLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
4734 { 2094 /* pvsll.lo */, VE::PVSLLLOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
4735 { 2094 /* pvsll.lo */, VE::PVSLLLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4736 { 2094 /* pvsll.lo */, VE::PVSLLLOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4737 { 2094 /* pvsll.lo */, VE::PVSLLLOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
4738 { 2094 /* pvsll.lo */, VE::PVSLLLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4739 { 2094 /* pvsll.lo */, VE::PVSLLLOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4740 { 2103 /* pvsll.up */, VE::PVSLLUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
4741 { 2103 /* pvsll.up */, VE::PVSLLUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4742 { 2103 /* pvsll.up */, VE::PVSLLUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4743 { 2103 /* pvsll.up */, VE::PVSLLUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
4744 { 2103 /* pvsll.up */, VE::PVSLLUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4745 { 2103 /* pvsll.up */, VE::PVSLLUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4746 { 2112 /* pvsra */, VE::PVSRAvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
4747 { 2112 /* pvsra */, VE::PVSRAvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4748 { 2112 /* pvsra */, VE::PVSRAvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4749 { 2112 /* pvsra */, VE::PVSRAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
4750 { 2112 /* pvsra */, VE::PVSRAvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4751 { 2112 /* pvsra */, VE::PVSRAvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
4752 { 2118 /* pvsra.lo */, VE::PVSRALOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
4753 { 2118 /* pvsra.lo */, VE::PVSRALOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4754 { 2118 /* pvsra.lo */, VE::PVSRALOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4755 { 2118 /* pvsra.lo */, VE::PVSRALOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
4756 { 2118 /* pvsra.lo */, VE::PVSRALOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4757 { 2118 /* pvsra.lo */, VE::PVSRALOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4758 { 2127 /* pvsra.up */, VE::PVSRAUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
4759 { 2127 /* pvsra.up */, VE::PVSRAUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4760 { 2127 /* pvsra.up */, VE::PVSRAUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4761 { 2127 /* pvsra.up */, VE::PVSRAUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
4762 { 2127 /* pvsra.up */, VE::PVSRAUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4763 { 2127 /* pvsra.up */, VE::PVSRAUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4764 { 2136 /* pvsrl */, VE::PVSRLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
4765 { 2136 /* pvsrl */, VE::PVSRLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4766 { 2136 /* pvsrl */, VE::PVSRLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4767 { 2136 /* pvsrl */, VE::PVSRLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
4768 { 2136 /* pvsrl */, VE::PVSRLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4769 { 2136 /* pvsrl */, VE::PVSRLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
4770 { 2142 /* pvsrl.lo */, VE::PVSRLLOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
4771 { 2142 /* pvsrl.lo */, VE::PVSRLLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4772 { 2142 /* pvsrl.lo */, VE::PVSRLLOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4773 { 2142 /* pvsrl.lo */, VE::PVSRLLOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
4774 { 2142 /* pvsrl.lo */, VE::PVSRLLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4775 { 2142 /* pvsrl.lo */, VE::PVSRLLOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4776 { 2151 /* pvsrl.up */, VE::PVSRLUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
4777 { 2151 /* pvsrl.up */, VE::PVSRLUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4778 { 2151 /* pvsrl.up */, VE::PVSRLUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
4779 { 2151 /* pvsrl.up */, VE::PVSRLUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
4780 { 2151 /* pvsrl.up */, VE::PVSRLUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4781 { 2151 /* pvsrl.up */, VE::PVSRLUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
4782 { 2160 /* pvsubs */, VE::PVSUBSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4783 { 2160 /* pvsubs */, VE::PVSUBSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4784 { 2160 /* pvsubs */, VE::PVSUBSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4785 { 2160 /* pvsubs */, VE::PVSUBSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4786 { 2160 /* pvsubs */, VE::PVSUBSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4787 { 2160 /* pvsubs */, VE::PVSUBSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4788 { 2167 /* pvsubs.lo */, VE::PVSUBSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4789 { 2167 /* pvsubs.lo */, VE::PVSUBSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4790 { 2167 /* pvsubs.lo */, VE::PVSUBSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4791 { 2167 /* pvsubs.lo */, VE::PVSUBSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4792 { 2167 /* pvsubs.lo */, VE::PVSUBSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4793 { 2167 /* pvsubs.lo */, VE::PVSUBSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4794 { 2177 /* pvsubs.up */, VE::PVSUBSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4795 { 2177 /* pvsubs.up */, VE::PVSUBSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4796 { 2177 /* pvsubs.up */, VE::PVSUBSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4797 { 2177 /* pvsubs.up */, VE::PVSUBSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4798 { 2177 /* pvsubs.up */, VE::PVSUBSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4799 { 2177 /* pvsubs.up */, VE::PVSUBSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4800 { 2187 /* pvsubu */, VE::PVSUBUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4801 { 2187 /* pvsubu */, VE::PVSUBUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4802 { 2187 /* pvsubu */, VE::PVSUBUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4803 { 2187 /* pvsubu */, VE::PVSUBUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4804 { 2187 /* pvsubu */, VE::PVSUBUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4805 { 2187 /* pvsubu */, VE::PVSUBUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4806 { 2194 /* pvsubu.lo */, VE::PVSUBULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4807 { 2194 /* pvsubu.lo */, VE::PVSUBULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4808 { 2194 /* pvsubu.lo */, VE::PVSUBULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4809 { 2194 /* pvsubu.lo */, VE::PVSUBULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4810 { 2194 /* pvsubu.lo */, VE::PVSUBULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4811 { 2194 /* pvsubu.lo */, VE::PVSUBULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4812 { 2204 /* pvsubu.up */, VE::PVSUBUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4813 { 2204 /* pvsubu.up */, VE::PVSUBUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4814 { 2204 /* pvsubu.up */, VE::PVSUBUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4815 { 2204 /* pvsubu.up */, VE::PVSUBUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4816 { 2204 /* pvsubu.up */, VE::PVSUBUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4817 { 2204 /* pvsubu.up */, VE::PVSUBUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4818 { 2214 /* pvxor */, VE::PVXORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4819 { 2214 /* pvxor */, VE::PVXORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4820 { 2214 /* pvxor */, VE::PVXORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4821 { 2214 /* pvxor */, VE::PVXORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4822 { 2214 /* pvxor */, VE::PVXORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4823 { 2214 /* pvxor */, VE::PVXORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
4824 { 2220 /* pvxor.lo */, VE::PVXORLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4825 { 2220 /* pvxor.lo */, VE::PVXORLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4826 { 2220 /* pvxor.lo */, VE::PVXORLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4827 { 2220 /* pvxor.lo */, VE::PVXORLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4828 { 2220 /* pvxor.lo */, VE::PVXORLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4829 { 2220 /* pvxor.lo */, VE::PVXORLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4830 { 2229 /* pvxor.up */, VE::PVXORUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4831 { 2229 /* pvxor.up */, VE::PVXORUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4832 { 2229 /* pvxor.up */, VE::PVXORUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4833 { 2229 /* pvxor.up */, VE::PVXORUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4834 { 2229 /* pvxor.up */, VE::PVXORUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4835 { 2229 /* pvxor.up */, VE::PVXORUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4836 { 2238 /* scr */, VE::SCRrrr, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4837 { 2238 /* scr */, VE::SCRrzr, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
4838 { 2238 /* scr */, VE::SCRirr, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4839 { 2238 /* scr */, VE::SCRizr, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
4840 { 2242 /* sfr */, VE::SFR, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4841 { 2246 /* shm.b */, VE::SHMBri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4842 { 2246 /* shm.b */, VE::SHMBzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4843 { 2252 /* shm.h */, VE::SHMHri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4844 { 2252 /* shm.h */, VE::SHMHzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4845 { 2258 /* shm.l */, VE::SHMLri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4846 { 2258 /* shm.l */, VE::SHMLzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4847 { 2264 /* shm.w */, VE::SHMWri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4848 { 2264 /* shm.w */, VE::SHMWzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4849 { 2270 /* sic */, VE::SIC, Convert__Reg1_0, AMFBS_None, { MCK_I32 }, },
4850 { 2274 /* sla.l */, VE::SLALrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4851 { 2274 /* sla.l */, VE::SLALri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4852 { 2274 /* sla.l */, VE::SLALmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4853 { 2274 /* sla.l */, VE::SLALmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4854 { 2280 /* sla.w.sx */, VE::SLAWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4855 { 2280 /* sla.w.sx */, VE::SLAWSXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
4856 { 2280 /* sla.w.sx */, VE::SLAWSXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
4857 { 2280 /* sla.w.sx */, VE::SLAWSXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
4858 { 2289 /* sla.w.zx */, VE::SLAWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4859 { 2289 /* sla.w.zx */, VE::SLAWZXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
4860 { 2289 /* sla.w.zx */, VE::SLAWZXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
4861 { 2289 /* sla.w.zx */, VE::SLAWZXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
4862 { 2298 /* sld */, VE::SLDrrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4863 { 2298 /* sld */, VE::SLDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4864 { 2298 /* sld */, VE::SLDrmr, Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4865 { 2298 /* sld */, VE::SLDrmi, Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4866 { 2302 /* sll */, VE::SLLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4867 { 2302 /* sll */, VE::SLLri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4868 { 2302 /* sll */, VE::SLLmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4869 { 2302 /* sll */, VE::SLLmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4870 { 2306 /* smir */, VE::SMIR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_MISC }, },
4871 { 2311 /* smvl */, VE::SMVL, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4872 { 2316 /* spm */, VE::SPM, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4873 { 2320 /* sra.l */, VE::SRALrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4874 { 2320 /* sra.l */, VE::SRALri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4875 { 2320 /* sra.l */, VE::SRALmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4876 { 2320 /* sra.l */, VE::SRALmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4877 { 2326 /* sra.w.sx */, VE::SRAWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4878 { 2326 /* sra.w.sx */, VE::SRAWSXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
4879 { 2326 /* sra.w.sx */, VE::SRAWSXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
4880 { 2326 /* sra.w.sx */, VE::SRAWSXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
4881 { 2335 /* sra.w.zx */, VE::SRAWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4882 { 2335 /* sra.w.zx */, VE::SRAWZXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
4883 { 2335 /* sra.w.zx */, VE::SRAWZXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
4884 { 2335 /* sra.w.zx */, VE::SRAWZXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
4885 { 2344 /* srd */, VE::SRDrrr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4886 { 2344 /* srd */, VE::SRDrri, Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4887 { 2344 /* srd */, VE::SRDmrr, Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4888 { 2344 /* srd */, VE::SRDmri, Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4889 { 2348 /* srl */, VE::SRLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
4890 { 2348 /* srl */, VE::SRLri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
4891 { 2348 /* srl */, VE::SRLmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
4892 { 2348 /* srl */, VE::SRLmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
4893 { 2352 /* st */, VE::STrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4894 { 2352 /* st */, VE::STrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4895 { 2352 /* st */, VE::STzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4896 { 2352 /* st */, VE::STzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4897 { 2355 /* st1b */, VE::ST1Brii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4898 { 2355 /* st1b */, VE::ST1Brri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4899 { 2355 /* st1b */, VE::ST1Bzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4900 { 2355 /* st1b */, VE::ST1Bzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4901 { 2360 /* st2b */, VE::ST2Brii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4902 { 2360 /* st2b */, VE::ST2Brri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4903 { 2360 /* st2b */, VE::ST2Bzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4904 { 2360 /* st2b */, VE::ST2Bzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4905 { 2365 /* stl */, VE::STLrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4906 { 2365 /* stl */, VE::STLrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4907 { 2365 /* stl */, VE::STLzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4908 { 2365 /* stl */, VE::STLzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4909 { 2369 /* stu */, VE::STUrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
4910 { 2369 /* stu */, VE::STUrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
4911 { 2369 /* stu */, VE::STUzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
4912 { 2369 /* stu */, VE::STUzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
4913 { 2373 /* subs.l */, VE::SUBSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4914 { 2373 /* subs.l */, VE::SUBSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4915 { 2373 /* subs.l */, VE::SUBSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4916 { 2373 /* subs.l */, VE::SUBSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4917 { 2380 /* subs.w.sx */, VE::SUBSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4918 { 2380 /* subs.w.sx */, VE::SUBSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4919 { 2380 /* subs.w.sx */, VE::SUBSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4920 { 2380 /* subs.w.sx */, VE::SUBSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4921 { 2390 /* subs.w.zx */, VE::SUBSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4922 { 2390 /* subs.w.zx */, VE::SUBSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4923 { 2390 /* subs.w.zx */, VE::SUBSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4924 { 2390 /* subs.w.zx */, VE::SUBSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4925 { 2400 /* subu.l */, VE::SUBULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4926 { 2400 /* subu.l */, VE::SUBULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4927 { 2400 /* subu.l */, VE::SUBULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4928 { 2400 /* subu.l */, VE::SUBULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4929 { 2407 /* subu.w */, VE::SUBUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4930 { 2407 /* subu.w */, VE::SUBUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4931 { 2407 /* subu.w */, VE::SUBUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4932 { 2407 /* subu.w */, VE::SUBUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4933 { 2414 /* svl */, VE::SVL, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4934 { 2418 /* svm */, VE::SVMmr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_VM, MCK_I64 }, },
4935 { 2418 /* svm */, VE::SVMmi, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_I64, MCK_VM, MCK_UImm2 }, },
4936 { 2422 /* svob */, VE::SVOB, Convert_NoOperands, AMFBS_None, { }, },
4937 { 2427 /* tovm */, VE::TOVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
4938 { 2432 /* ts1am.l */, VE::TS1AMLrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
4939 { 2432 /* ts1am.l */, VE::TS1AMLrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm7 }, },
4940 { 2432 /* ts1am.l */, VE::TS1AMLzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
4941 { 2432 /* ts1am.l */, VE::TS1AMLzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm7 }, },
4942 { 2440 /* ts1am.w */, VE::TS1AMWrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_I32 }, },
4943 { 2440 /* ts1am.w */, VE::TS1AMWrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_UImm7 }, },
4944 { 2440 /* ts1am.w */, VE::TS1AMWzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_I32 }, },
4945 { 2440 /* ts1am.w */, VE::TS1AMWzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_UImm7 }, },
4946 { 2448 /* ts2am */, VE::TS2AMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
4947 { 2448 /* ts2am */, VE::TS2AMrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm7 }, },
4948 { 2448 /* ts2am */, VE::TS2AMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
4949 { 2448 /* ts2am */, VE::TS2AMzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm7 }, },
4950 { 2454 /* ts3am */, VE::TS3AMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
4951 { 2454 /* ts3am */, VE::TS3AMrii, Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm1 }, },
4952 { 2454 /* ts3am */, VE::TS3AMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
4953 { 2454 /* ts3am */, VE::TS3AMzii, Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm1 }, },
4954 { 2460 /* tscr */, VE::TSCRrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4955 { 2460 /* tscr */, VE::TSCRrzr, Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
4956 { 2460 /* tscr */, VE::TSCRirr, Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4957 { 2460 /* tscr */, VE::TSCRizr, Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
4958 { 2465 /* vadds.l */, VE::VADDSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4959 { 2465 /* vadds.l */, VE::VADDSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4960 { 2465 /* vadds.l */, VE::VADDSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4961 { 2465 /* vadds.l */, VE::VADDSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4962 { 2465 /* vadds.l */, VE::VADDSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4963 { 2465 /* vadds.l */, VE::VADDSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4964 { 2473 /* vadds.w.sx */, VE::VADDSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4965 { 2473 /* vadds.w.sx */, VE::VADDSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4966 { 2473 /* vadds.w.sx */, VE::VADDSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4967 { 2473 /* vadds.w.sx */, VE::VADDSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4968 { 2473 /* vadds.w.sx */, VE::VADDSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4969 { 2473 /* vadds.w.sx */, VE::VADDSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4970 { 2484 /* vaddu.l */, VE::VADDULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4971 { 2484 /* vaddu.l */, VE::VADDULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4972 { 2484 /* vaddu.l */, VE::VADDULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4973 { 2484 /* vaddu.l */, VE::VADDULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4974 { 2484 /* vaddu.l */, VE::VADDULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4975 { 2484 /* vaddu.l */, VE::VADDULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4976 { 2492 /* vand */, VE::VANDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4977 { 2492 /* vand */, VE::VANDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4978 { 2492 /* vand */, VE::VANDmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4979 { 2492 /* vand */, VE::VANDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4980 { 2492 /* vand */, VE::VANDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4981 { 2492 /* vand */, VE::VANDmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4982 { 2497 /* vbrd */, VE::VBRDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I64 }, },
4983 { 2497 /* vbrd */, VE::VBRDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
4984 { 2497 /* vbrd */, VE::VBRDrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_VM }, },
4985 { 2497 /* vbrd */, VE::VBRDim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
4986 { 2502 /* vbrdl */, VE::VBRDLr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I32 }, },
4987 { 2502 /* vbrdl */, VE::VBRDLi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
4988 { 2502 /* vbrdl */, VE::VBRDLrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_VM }, },
4989 { 2502 /* vbrdl */, VE::VBRDLim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
4990 { 2508 /* vbrdu */, VE::VBRDUr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_F32 }, },
4991 { 2508 /* vbrdu */, VE::VBRDUi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
4992 { 2508 /* vbrdu */, VE::VBRDUrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_VM }, },
4993 { 2508 /* vbrdu */, VE::VBRDUim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
4994 { 2514 /* vbrv */, VE::VBRVv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4995 { 2514 /* vbrv */, VE::VBRVvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4996 { 2519 /* vcmps.l */, VE::VCMPSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4997 { 2519 /* vcmps.l */, VE::VCMPSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4998 { 2519 /* vcmps.l */, VE::VCMPSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4999 { 2519 /* vcmps.l */, VE::VCMPSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5000 { 2519 /* vcmps.l */, VE::VCMPSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5001 { 2519 /* vcmps.l */, VE::VCMPSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5002 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5003 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5004 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5005 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5006 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5007 { 2527 /* vcmps.w.sx */, VE::VCMPSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5008 { 2538 /* vcmpu.l */, VE::VCMPULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5009 { 2538 /* vcmpu.l */, VE::VCMPULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5010 { 2538 /* vcmpu.l */, VE::VCMPULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5011 { 2538 /* vcmpu.l */, VE::VCMPULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5012 { 2538 /* vcmpu.l */, VE::VCMPULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5013 { 2538 /* vcmpu.l */, VE::VCMPULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5014 { 2546 /* vcp */, VE::VCPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5015 { 2546 /* vcp */, VE::VCPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5016 { 2550 /* vcvt.d.l */, VE::VCVTDLv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5017 { 2550 /* vcvt.d.l */, VE::VCVTDLvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5018 { 2559 /* vcvt.d.s */, VE::VCVTDSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5019 { 2559 /* vcvt.d.s */, VE::VCVTDSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5020 { 2568 /* vcvt.d.w */, VE::VCVTDWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5021 { 2568 /* vcvt.d.w */, VE::VCVTDWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5022 { 2577 /* vcvt.l.d */, VE::VCVTLDv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5023 { 2577 /* vcvt.l.d */, VE::VCVTLDvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5024 { 2586 /* vcvt.s.d */, VE::VCVTSDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5025 { 2586 /* vcvt.s.d */, VE::VCVTSDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5026 { 2595 /* vcvt.s.w */, VE::VCVTSWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5027 { 2595 /* vcvt.s.w */, VE::VCVTSWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5028 { 2604 /* vcvt.w.d.sx */, VE::VCVTWDSXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5029 { 2604 /* vcvt.w.d.sx */, VE::VCVTWDSXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5030 { 2616 /* vcvt.w.d.zx */, VE::VCVTWDZXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5031 { 2616 /* vcvt.w.d.zx */, VE::VCVTWDZXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5032 { 2628 /* vcvt.w.s.sx */, VE::VCVTWSSXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5033 { 2628 /* vcvt.w.s.sx */, VE::VCVTWSSXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5034 { 2640 /* vcvt.w.s.zx */, VE::VCVTWSZXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5035 { 2640 /* vcvt.w.s.zx */, VE::VCVTWSZXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5036 { 2652 /* vdivs.l */, VE::VDIVSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5037 { 2652 /* vdivs.l */, VE::VDIVSLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5038 { 2652 /* vdivs.l */, VE::VDIVSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5039 { 2652 /* vdivs.l */, VE::VDIVSLvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5040 { 2652 /* vdivs.l */, VE::VDIVSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5041 { 2652 /* vdivs.l */, VE::VDIVSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5042 { 2652 /* vdivs.l */, VE::VDIVSLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5043 { 2652 /* vdivs.l */, VE::VDIVSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5044 { 2652 /* vdivs.l */, VE::VDIVSLvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5045 { 2652 /* vdivs.l */, VE::VDIVSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5046 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5047 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5048 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5049 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5050 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5051 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5052 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5053 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5054 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5055 { 2660 /* vdivs.w.sx */, VE::VDIVSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5056 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5057 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5058 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5059 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5060 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5061 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5062 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5063 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5064 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5065 { 2671 /* vdivs.w.zx */, VE::VDIVSWZXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5066 { 2682 /* vdivu.l */, VE::VDIVULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5067 { 2682 /* vdivu.l */, VE::VDIVULvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5068 { 2682 /* vdivu.l */, VE::VDIVULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5069 { 2682 /* vdivu.l */, VE::VDIVULvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5070 { 2682 /* vdivu.l */, VE::VDIVULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5071 { 2682 /* vdivu.l */, VE::VDIVULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5072 { 2682 /* vdivu.l */, VE::VDIVULvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5073 { 2682 /* vdivu.l */, VE::VDIVULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5074 { 2682 /* vdivu.l */, VE::VDIVULvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5075 { 2682 /* vdivu.l */, VE::VDIVULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5076 { 2690 /* vdivu.w */, VE::VDIVUWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5077 { 2690 /* vdivu.w */, VE::VDIVUWvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5078 { 2690 /* vdivu.w */, VE::VDIVUWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5079 { 2690 /* vdivu.w */, VE::VDIVUWvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5080 { 2690 /* vdivu.w */, VE::VDIVUWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5081 { 2690 /* vdivu.w */, VE::VDIVUWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5082 { 2690 /* vdivu.w */, VE::VDIVUWvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5083 { 2690 /* vdivu.w */, VE::VDIVUWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5084 { 2690 /* vdivu.w */, VE::VDIVUWvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5085 { 2690 /* vdivu.w */, VE::VDIVUWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5086 { 2698 /* veqv */, VE::VEQVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5087 { 2698 /* veqv */, VE::VEQVvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5088 { 2698 /* veqv */, VE::VEQVmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5089 { 2698 /* veqv */, VE::VEQVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5090 { 2698 /* veqv */, VE::VEQVvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5091 { 2698 /* veqv */, VE::VEQVmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5092 { 2703 /* vex */, VE::VEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5093 { 2703 /* vex */, VE::VEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5094 { 2707 /* vfadd.d */, VE::VFADDDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5095 { 2707 /* vfadd.d */, VE::VFADDDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5096 { 2707 /* vfadd.d */, VE::VFADDDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5097 { 2707 /* vfadd.d */, VE::VFADDDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5098 { 2707 /* vfadd.d */, VE::VFADDDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5099 { 2707 /* vfadd.d */, VE::VFADDDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5100 { 2715 /* vfcmp.d */, VE::VFCMPDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5101 { 2715 /* vfcmp.d */, VE::VFCMPDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5102 { 2715 /* vfcmp.d */, VE::VFCMPDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5103 { 2715 /* vfcmp.d */, VE::VFCMPDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5104 { 2715 /* vfcmp.d */, VE::VFCMPDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5105 { 2715 /* vfcmp.d */, VE::VFCMPDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5106 { 2723 /* vfdiv.d */, VE::VFDIVDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5107 { 2723 /* vfdiv.d */, VE::VFDIVDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5108 { 2723 /* vfdiv.d */, VE::VFDIVDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5109 { 2723 /* vfdiv.d */, VE::VFDIVDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5110 { 2723 /* vfdiv.d */, VE::VFDIVDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5111 { 2723 /* vfdiv.d */, VE::VFDIVDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5112 { 2723 /* vfdiv.d */, VE::VFDIVDvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5113 { 2723 /* vfdiv.d */, VE::VFDIVDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5114 { 2723 /* vfdiv.d */, VE::VFDIVDvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5115 { 2723 /* vfdiv.d */, VE::VFDIVDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5116 { 2731 /* vfdiv.s */, VE::VFDIVSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5117 { 2731 /* vfdiv.s */, VE::VFDIVSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5118 { 2731 /* vfdiv.s */, VE::VFDIVSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5119 { 2731 /* vfdiv.s */, VE::VFDIVSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5120 { 2731 /* vfdiv.s */, VE::VFDIVSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5121 { 2731 /* vfdiv.s */, VE::VFDIVSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5122 { 2731 /* vfdiv.s */, VE::VFDIVSvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5123 { 2731 /* vfdiv.s */, VE::VFDIVSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5124 { 2731 /* vfdiv.s */, VE::VFDIVSvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5125 { 2731 /* vfdiv.s */, VE::VFDIVSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5126 { 2739 /* vfia.d */, VE::VFIADvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5127 { 2739 /* vfia.d */, VE::VFIADvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5128 { 2746 /* vfia.s */, VE::VFIASvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5129 { 2746 /* vfia.s */, VE::VFIASvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5130 { 2753 /* vfiam.d */, VE::VFIAMDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5131 { 2753 /* vfiam.d */, VE::VFIAMDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5132 { 2761 /* vfiam.s */, VE::VFIAMSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5133 { 2761 /* vfiam.s */, VE::VFIAMSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5134 { 2769 /* vfim.d */, VE::VFIMDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5135 { 2769 /* vfim.d */, VE::VFIMDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5136 { 2776 /* vfim.s */, VE::VFIMSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5137 { 2776 /* vfim.s */, VE::VFIMSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5138 { 2783 /* vfima.d */, VE::VFIMADvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5139 { 2783 /* vfima.d */, VE::VFIMADvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5140 { 2791 /* vfima.s */, VE::VFIMASvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5141 { 2791 /* vfima.s */, VE::VFIMASvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5142 { 2799 /* vfims.d */, VE::VFIMSDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5143 { 2799 /* vfims.d */, VE::VFIMSDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5144 { 2807 /* vfims.s */, VE::VFIMSSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5145 { 2807 /* vfims.s */, VE::VFIMSSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5146 { 2815 /* vfis.d */, VE::VFISDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5147 { 2815 /* vfis.d */, VE::VFISDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5148 { 2822 /* vfis.s */, VE::VFISSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5149 { 2822 /* vfis.s */, VE::VFISSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5150 { 2829 /* vfism.d */, VE::VFISMDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5151 { 2829 /* vfism.d */, VE::VFISMDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5152 { 2837 /* vfism.s */, VE::VFISMSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5153 { 2837 /* vfism.s */, VE::VFISMSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5154 { 2845 /* vfmad.d */, VE::VFMADDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5155 { 2845 /* vfmad.d */, VE::VFMADDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5156 { 2845 /* vfmad.d */, VE::VFMADDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5157 { 2845 /* vfmad.d */, VE::VFMADDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5158 { 2845 /* vfmad.d */, VE::VFMADDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5159 { 2845 /* vfmad.d */, VE::VFMADDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5160 { 2845 /* vfmad.d */, VE::VFMADDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5161 { 2845 /* vfmad.d */, VE::VFMADDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5162 { 2845 /* vfmad.d */, VE::VFMADDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5163 { 2845 /* vfmad.d */, VE::VFMADDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5164 { 2853 /* vfmax.d */, VE::VFMAXDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5165 { 2853 /* vfmax.d */, VE::VFMAXDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5166 { 2853 /* vfmax.d */, VE::VFMAXDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5167 { 2853 /* vfmax.d */, VE::VFMAXDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5168 { 2853 /* vfmax.d */, VE::VFMAXDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5169 { 2853 /* vfmax.d */, VE::VFMAXDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5170 { 2861 /* vfmin.d */, VE::VFMINDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5171 { 2861 /* vfmin.d */, VE::VFMINDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5172 { 2861 /* vfmin.d */, VE::VFMINDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5173 { 2861 /* vfmin.d */, VE::VFMINDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5174 { 2861 /* vfmin.d */, VE::VFMINDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5175 { 2861 /* vfmin.d */, VE::VFMINDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5176 { 2869 /* vfmk.d. */, VE::VFMKDv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5177 { 2869 /* vfmk.d. */, VE::VFMKDvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5178 { 2877 /* vfmk.d.af */, VE::VFMKDna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5179 { 2877 /* vfmk.d.af */, VE::VFMKDnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5180 { 2887 /* vfmk.d.at */, VE::VFMKDa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5181 { 2887 /* vfmk.d.at */, VE::VFMKDam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5182 { 2897 /* vfmk.l. */, VE::VFMKLv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5183 { 2897 /* vfmk.l. */, VE::VFMKLvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5184 { 2905 /* vfmk.l.af */, VE::VFMKLna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5185 { 2905 /* vfmk.l.af */, VE::VFMKLnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5186 { 2915 /* vfmk.l.at */, VE::VFMKLa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5187 { 2915 /* vfmk.l.at */, VE::VFMKLam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5188 { 2925 /* vfmk.w. */, VE::VFMKWv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5189 { 2925 /* vfmk.w. */, VE::VFMKWvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5190 { 2933 /* vfmk.w.af */, VE::VFMKWna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5191 { 2933 /* vfmk.w.af */, VE::VFMKWnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5192 { 2943 /* vfmk.w.at */, VE::VFMKWa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5193 { 2943 /* vfmk.w.at */, VE::VFMKWam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5194 { 2953 /* vfmsb.d */, VE::VFMSBDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5195 { 2953 /* vfmsb.d */, VE::VFMSBDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5196 { 2953 /* vfmsb.d */, VE::VFMSBDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5197 { 2953 /* vfmsb.d */, VE::VFMSBDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5198 { 2953 /* vfmsb.d */, VE::VFMSBDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5199 { 2953 /* vfmsb.d */, VE::VFMSBDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5200 { 2953 /* vfmsb.d */, VE::VFMSBDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5201 { 2953 /* vfmsb.d */, VE::VFMSBDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5202 { 2953 /* vfmsb.d */, VE::VFMSBDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5203 { 2953 /* vfmsb.d */, VE::VFMSBDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5204 { 2961 /* vfmul.d */, VE::VFMULDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5205 { 2961 /* vfmul.d */, VE::VFMULDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5206 { 2961 /* vfmul.d */, VE::VFMULDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5207 { 2961 /* vfmul.d */, VE::VFMULDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5208 { 2961 /* vfmul.d */, VE::VFMULDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5209 { 2961 /* vfmul.d */, VE::VFMULDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5210 { 2969 /* vfnmad.d */, VE::VFNMADDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5211 { 2969 /* vfnmad.d */, VE::VFNMADDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5212 { 2969 /* vfnmad.d */, VE::VFNMADDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5213 { 2969 /* vfnmad.d */, VE::VFNMADDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5214 { 2969 /* vfnmad.d */, VE::VFNMADDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5215 { 2969 /* vfnmad.d */, VE::VFNMADDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5216 { 2969 /* vfnmad.d */, VE::VFNMADDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5217 { 2969 /* vfnmad.d */, VE::VFNMADDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5218 { 2969 /* vfnmad.d */, VE::VFNMADDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5219 { 2969 /* vfnmad.d */, VE::VFNMADDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5220 { 2978 /* vfnmsb.d */, VE::VFNMSBDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5221 { 2978 /* vfnmsb.d */, VE::VFNMSBDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5222 { 2978 /* vfnmsb.d */, VE::VFNMSBDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5223 { 2978 /* vfnmsb.d */, VE::VFNMSBDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5224 { 2978 /* vfnmsb.d */, VE::VFNMSBDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5225 { 2978 /* vfnmsb.d */, VE::VFNMSBDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5226 { 2978 /* vfnmsb.d */, VE::VFNMSBDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5227 { 2978 /* vfnmsb.d */, VE::VFNMSBDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5228 { 2978 /* vfnmsb.d */, VE::VFNMSBDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5229 { 2978 /* vfnmsb.d */, VE::VFNMSBDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5230 { 2987 /* vfrmax.d.fst */, VE::VFRMAXDFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5231 { 2987 /* vfrmax.d.fst */, VE::VFRMAXDFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5232 { 3000 /* vfrmax.d.lst */, VE::VFRMAXDLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5233 { 3000 /* vfrmax.d.lst */, VE::VFRMAXDLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5234 { 3013 /* vfrmax.s.fst */, VE::VFRMAXSFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5235 { 3013 /* vfrmax.s.fst */, VE::VFRMAXSFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5236 { 3026 /* vfrmax.s.lst */, VE::VFRMAXSLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5237 { 3026 /* vfrmax.s.lst */, VE::VFRMAXSLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5238 { 3039 /* vfrmin.d.fst */, VE::VFRMINDFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5239 { 3039 /* vfrmin.d.fst */, VE::VFRMINDFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5240 { 3052 /* vfrmin.d.lst */, VE::VFRMINDLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5241 { 3052 /* vfrmin.d.lst */, VE::VFRMINDLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5242 { 3065 /* vfrmin.s.fst */, VE::VFRMINSFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5243 { 3065 /* vfrmin.s.fst */, VE::VFRMINSFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5244 { 3078 /* vfrmin.s.lst */, VE::VFRMINSLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5245 { 3078 /* vfrmin.s.lst */, VE::VFRMINSLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5246 { 3091 /* vfsqrt.d */, VE::VFSQRTDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5247 { 3091 /* vfsqrt.d */, VE::VFSQRTDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5248 { 3100 /* vfsqrt.s */, VE::VFSQRTSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5249 { 3100 /* vfsqrt.s */, VE::VFSQRTSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5250 { 3109 /* vfsub.d */, VE::VFSUBDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5251 { 3109 /* vfsub.d */, VE::VFSUBDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5252 { 3109 /* vfsub.d */, VE::VFSUBDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5253 { 3109 /* vfsub.d */, VE::VFSUBDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5254 { 3109 /* vfsub.d */, VE::VFSUBDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5255 { 3109 /* vfsub.d */, VE::VFSUBDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5256 { 3117 /* vfsum.d */, VE::VFSUMDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5257 { 3117 /* vfsum.d */, VE::VFSUMDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5258 { 3125 /* vfsum.s */, VE::VFSUMSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5259 { 3125 /* vfsum.s */, VE::VFSUMSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5260 { 3133 /* vgt */, VE::VGTsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5261 { 3133 /* vgt */, VE::VGTsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5262 { 3133 /* vgt */, VE::VGTsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5263 { 3133 /* vgt */, VE::VGTsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5264 { 3133 /* vgt */, VE::VGTvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5265 { 3133 /* vgt */, VE::VGTvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5266 { 3133 /* vgt */, VE::VGTvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5267 { 3133 /* vgt */, VE::VGTviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5268 { 3133 /* vgt */, VE::VGTsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5269 { 3133 /* vgt */, VE::VGTsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5270 { 3133 /* vgt */, VE::VGTsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5271 { 3133 /* vgt */, VE::VGTsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5272 { 3133 /* vgt */, VE::VGTvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5273 { 3133 /* vgt */, VE::VGTvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5274 { 3133 /* vgt */, VE::VGTvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5275 { 3133 /* vgt */, VE::VGTvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5276 { 3137 /* vgt.nc */, VE::VGTNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5277 { 3137 /* vgt.nc */, VE::VGTNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5278 { 3137 /* vgt.nc */, VE::VGTNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5279 { 3137 /* vgt.nc */, VE::VGTNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5280 { 3137 /* vgt.nc */, VE::VGTNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5281 { 3137 /* vgt.nc */, VE::VGTNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5282 { 3137 /* vgt.nc */, VE::VGTNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5283 { 3137 /* vgt.nc */, VE::VGTNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5284 { 3137 /* vgt.nc */, VE::VGTNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5285 { 3137 /* vgt.nc */, VE::VGTNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5286 { 3137 /* vgt.nc */, VE::VGTNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5287 { 3137 /* vgt.nc */, VE::VGTNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5288 { 3137 /* vgt.nc */, VE::VGTNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5289 { 3137 /* vgt.nc */, VE::VGTNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5290 { 3137 /* vgt.nc */, VE::VGTNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5291 { 3137 /* vgt.nc */, VE::VGTNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5292 { 3144 /* vgtl.sx */, VE::VGTLSXsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5293 { 3144 /* vgtl.sx */, VE::VGTLSXsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5294 { 3144 /* vgtl.sx */, VE::VGTLSXsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5295 { 3144 /* vgtl.sx */, VE::VGTLSXsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5296 { 3144 /* vgtl.sx */, VE::VGTLSXvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5297 { 3144 /* vgtl.sx */, VE::VGTLSXvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5298 { 3144 /* vgtl.sx */, VE::VGTLSXvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5299 { 3144 /* vgtl.sx */, VE::VGTLSXviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5300 { 3144 /* vgtl.sx */, VE::VGTLSXsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5301 { 3144 /* vgtl.sx */, VE::VGTLSXsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5302 { 3144 /* vgtl.sx */, VE::VGTLSXsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5303 { 3144 /* vgtl.sx */, VE::VGTLSXsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5304 { 3144 /* vgtl.sx */, VE::VGTLSXvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5305 { 3144 /* vgtl.sx */, VE::VGTLSXvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5306 { 3144 /* vgtl.sx */, VE::VGTLSXvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5307 { 3144 /* vgtl.sx */, VE::VGTLSXvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5308 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5309 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5310 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5311 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5312 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5313 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5314 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5315 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5316 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5317 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5318 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5319 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5320 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5321 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5322 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5323 { 3152 /* vgtl.sx.nc */, VE::VGTLSXNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5324 { 3163 /* vgtl.zx */, VE::VGTLZXsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5325 { 3163 /* vgtl.zx */, VE::VGTLZXsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5326 { 3163 /* vgtl.zx */, VE::VGTLZXsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5327 { 3163 /* vgtl.zx */, VE::VGTLZXsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5328 { 3163 /* vgtl.zx */, VE::VGTLZXvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5329 { 3163 /* vgtl.zx */, VE::VGTLZXvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5330 { 3163 /* vgtl.zx */, VE::VGTLZXvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5331 { 3163 /* vgtl.zx */, VE::VGTLZXviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5332 { 3163 /* vgtl.zx */, VE::VGTLZXsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5333 { 3163 /* vgtl.zx */, VE::VGTLZXsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5334 { 3163 /* vgtl.zx */, VE::VGTLZXsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5335 { 3163 /* vgtl.zx */, VE::VGTLZXsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5336 { 3163 /* vgtl.zx */, VE::VGTLZXvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5337 { 3163 /* vgtl.zx */, VE::VGTLZXvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5338 { 3163 /* vgtl.zx */, VE::VGTLZXvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5339 { 3163 /* vgtl.zx */, VE::VGTLZXvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5340 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5341 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5342 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5343 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5344 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5345 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5346 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5347 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5348 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5349 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5350 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5351 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5352 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5353 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5354 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5355 { 3171 /* vgtl.zx.nc */, VE::VGTLZXNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5356 { 3182 /* vgtu */, VE::VGTUsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5357 { 3182 /* vgtu */, VE::VGTUsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5358 { 3182 /* vgtu */, VE::VGTUsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5359 { 3182 /* vgtu */, VE::VGTUsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5360 { 3182 /* vgtu */, VE::VGTUvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5361 { 3182 /* vgtu */, VE::VGTUvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5362 { 3182 /* vgtu */, VE::VGTUvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5363 { 3182 /* vgtu */, VE::VGTUviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5364 { 3182 /* vgtu */, VE::VGTUsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5365 { 3182 /* vgtu */, VE::VGTUsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5366 { 3182 /* vgtu */, VE::VGTUsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5367 { 3182 /* vgtu */, VE::VGTUsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5368 { 3182 /* vgtu */, VE::VGTUvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5369 { 3182 /* vgtu */, VE::VGTUvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5370 { 3182 /* vgtu */, VE::VGTUvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5371 { 3182 /* vgtu */, VE::VGTUvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5372 { 3187 /* vgtu.nc */, VE::VGTUNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5373 { 3187 /* vgtu.nc */, VE::VGTUNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5374 { 3187 /* vgtu.nc */, VE::VGTUNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5375 { 3187 /* vgtu.nc */, VE::VGTUNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5376 { 3187 /* vgtu.nc */, VE::VGTUNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5377 { 3187 /* vgtu.nc */, VE::VGTUNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5378 { 3187 /* vgtu.nc */, VE::VGTUNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5379 { 3187 /* vgtu.nc */, VE::VGTUNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5380 { 3187 /* vgtu.nc */, VE::VGTUNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5381 { 3187 /* vgtu.nc */, VE::VGTUNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5382 { 3187 /* vgtu.nc */, VE::VGTUNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5383 { 3187 /* vgtu.nc */, VE::VGTUNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5384 { 3187 /* vgtu.nc */, VE::VGTUNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5385 { 3187 /* vgtu.nc */, VE::VGTUNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5386 { 3187 /* vgtu.nc */, VE::VGTUNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5387 { 3187 /* vgtu.nc */, VE::VGTUNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5388 { 3195 /* vld */, VE::VLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5389 { 3195 /* vld */, VE::VLDrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5390 { 3195 /* vld */, VE::VLDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5391 { 3195 /* vld */, VE::VLDiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5392 { 3199 /* vld.nc */, VE::VLDNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5393 { 3199 /* vld.nc */, VE::VLDNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5394 { 3199 /* vld.nc */, VE::VLDNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5395 { 3199 /* vld.nc */, VE::VLDNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5396 { 3206 /* vld2d */, VE::VLD2Drr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5397 { 3206 /* vld2d */, VE::VLD2Drz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5398 { 3206 /* vld2d */, VE::VLD2Dir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5399 { 3206 /* vld2d */, VE::VLD2Diz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5400 { 3212 /* vld2d.nc */, VE::VLD2DNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5401 { 3212 /* vld2d.nc */, VE::VLD2DNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5402 { 3212 /* vld2d.nc */, VE::VLD2DNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5403 { 3212 /* vld2d.nc */, VE::VLD2DNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5404 { 3221 /* vldl.sx */, VE::VLDLSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5405 { 3221 /* vldl.sx */, VE::VLDLSXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5406 { 3221 /* vldl.sx */, VE::VLDLSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5407 { 3221 /* vldl.sx */, VE::VLDLSXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5408 { 3229 /* vldl.sx.nc */, VE::VLDLSXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5409 { 3229 /* vldl.sx.nc */, VE::VLDLSXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5410 { 3229 /* vldl.sx.nc */, VE::VLDLSXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5411 { 3229 /* vldl.sx.nc */, VE::VLDLSXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5412 { 3240 /* vldl.zx */, VE::VLDLZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5413 { 3240 /* vldl.zx */, VE::VLDLZXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5414 { 3240 /* vldl.zx */, VE::VLDLZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5415 { 3240 /* vldl.zx */, VE::VLDLZXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5416 { 3248 /* vldl.zx.nc */, VE::VLDLZXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5417 { 3248 /* vldl.zx.nc */, VE::VLDLZXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5418 { 3248 /* vldl.zx.nc */, VE::VLDLZXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5419 { 3248 /* vldl.zx.nc */, VE::VLDLZXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5420 { 3259 /* vldl2d.sx */, VE::VLDL2DSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5421 { 3259 /* vldl2d.sx */, VE::VLDL2DSXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5422 { 3259 /* vldl2d.sx */, VE::VLDL2DSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5423 { 3259 /* vldl2d.sx */, VE::VLDL2DSXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5424 { 3269 /* vldl2d.sx.nc */, VE::VLDL2DSXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5425 { 3269 /* vldl2d.sx.nc */, VE::VLDL2DSXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5426 { 3269 /* vldl2d.sx.nc */, VE::VLDL2DSXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5427 { 3269 /* vldl2d.sx.nc */, VE::VLDL2DSXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5428 { 3282 /* vldl2d.zx */, VE::VLDL2DZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5429 { 3282 /* vldl2d.zx */, VE::VLDL2DZXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5430 { 3282 /* vldl2d.zx */, VE::VLDL2DZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5431 { 3282 /* vldl2d.zx */, VE::VLDL2DZXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5432 { 3292 /* vldl2d.zx.nc */, VE::VLDL2DZXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5433 { 3292 /* vldl2d.zx.nc */, VE::VLDL2DZXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5434 { 3292 /* vldl2d.zx.nc */, VE::VLDL2DZXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5435 { 3292 /* vldl2d.zx.nc */, VE::VLDL2DZXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5436 { 3305 /* vldu */, VE::VLDUrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5437 { 3305 /* vldu */, VE::VLDUrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5438 { 3305 /* vldu */, VE::VLDUir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5439 { 3305 /* vldu */, VE::VLDUiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5440 { 3310 /* vldu.nc */, VE::VLDUNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5441 { 3310 /* vldu.nc */, VE::VLDUNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5442 { 3310 /* vldu.nc */, VE::VLDUNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5443 { 3310 /* vldu.nc */, VE::VLDUNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5444 { 3318 /* vldu2d */, VE::VLDU2Drr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5445 { 3318 /* vldu2d */, VE::VLDU2Drz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5446 { 3318 /* vldu2d */, VE::VLDU2Dir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5447 { 3318 /* vldu2d */, VE::VLDU2Diz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5448 { 3325 /* vldu2d.nc */, VE::VLDU2DNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5449 { 3325 /* vldu2d.nc */, VE::VLDU2DNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5450 { 3325 /* vldu2d.nc */, VE::VLDU2DNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5451 { 3325 /* vldu2d.nc */, VE::VLDU2DNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5452 { 3335 /* vldz */, VE::VLDZv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5453 { 3335 /* vldz */, VE::VLDZvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5454 { 3340 /* vmaxs.l */, VE::VMAXSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5455 { 3340 /* vmaxs.l */, VE::VMAXSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5456 { 3340 /* vmaxs.l */, VE::VMAXSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5457 { 3340 /* vmaxs.l */, VE::VMAXSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5458 { 3340 /* vmaxs.l */, VE::VMAXSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5459 { 3340 /* vmaxs.l */, VE::VMAXSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5460 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5461 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5462 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5463 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5464 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5465 { 3348 /* vmaxs.w.sx */, VE::VMAXSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5466 { 3359 /* vmins.l */, VE::VMINSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5467 { 3359 /* vmins.l */, VE::VMINSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5468 { 3359 /* vmins.l */, VE::VMINSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5469 { 3359 /* vmins.l */, VE::VMINSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5470 { 3359 /* vmins.l */, VE::VMINSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5471 { 3359 /* vmins.l */, VE::VMINSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5472 { 3367 /* vmins.w.sx */, VE::VMINSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5473 { 3367 /* vmins.w.sx */, VE::VMINSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5474 { 3367 /* vmins.w.sx */, VE::VMINSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5475 { 3367 /* vmins.w.sx */, VE::VMINSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5476 { 3367 /* vmins.w.sx */, VE::VMINSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5477 { 3367 /* vmins.w.sx */, VE::VMINSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5478 { 3378 /* vmrg */, VE::VMRGrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5479 { 3378 /* vmrg */, VE::VMRGvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5480 { 3378 /* vmrg */, VE::VMRGiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5481 { 3378 /* vmrg */, VE::VMRGrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5482 { 3378 /* vmrg */, VE::VMRGvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5483 { 3378 /* vmrg */, VE::VMRGivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5484 { 3383 /* vmrg.w */, VE::VMRGWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5485 { 3383 /* vmrg.w */, VE::VMRGWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5486 { 3383 /* vmrg.w */, VE::VMRGWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5487 { 3383 /* vmrg.w */, VE::VMRGWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5488 { 3383 /* vmrg.w */, VE::VMRGWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5489 { 3383 /* vmrg.w */, VE::VMRGWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5490 { 3390 /* vmuls.l */, VE::VMULSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5491 { 3390 /* vmuls.l */, VE::VMULSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5492 { 3390 /* vmuls.l */, VE::VMULSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5493 { 3390 /* vmuls.l */, VE::VMULSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5494 { 3390 /* vmuls.l */, VE::VMULSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5495 { 3390 /* vmuls.l */, VE::VMULSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5496 { 3398 /* vmuls.l.w */, VE::VMULSLWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5497 { 3398 /* vmuls.l.w */, VE::VMULSLWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5498 { 3398 /* vmuls.l.w */, VE::VMULSLWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5499 { 3398 /* vmuls.l.w */, VE::VMULSLWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5500 { 3398 /* vmuls.l.w */, VE::VMULSLWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5501 { 3398 /* vmuls.l.w */, VE::VMULSLWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5502 { 3408 /* vmuls.w.sx */, VE::VMULSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5503 { 3408 /* vmuls.w.sx */, VE::VMULSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5504 { 3408 /* vmuls.w.sx */, VE::VMULSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5505 { 3408 /* vmuls.w.sx */, VE::VMULSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5506 { 3408 /* vmuls.w.sx */, VE::VMULSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5507 { 3408 /* vmuls.w.sx */, VE::VMULSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5508 { 3419 /* vmuls.w.zx */, VE::VMULSWZXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5509 { 3419 /* vmuls.w.zx */, VE::VMULSWZXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5510 { 3419 /* vmuls.w.zx */, VE::VMULSWZXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5511 { 3419 /* vmuls.w.zx */, VE::VMULSWZXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5512 { 3419 /* vmuls.w.zx */, VE::VMULSWZXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5513 { 3419 /* vmuls.w.zx */, VE::VMULSWZXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5514 { 3430 /* vmulu.l */, VE::VMULULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5515 { 3430 /* vmulu.l */, VE::VMULULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5516 { 3430 /* vmulu.l */, VE::VMULULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5517 { 3430 /* vmulu.l */, VE::VMULULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5518 { 3430 /* vmulu.l */, VE::VMULULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5519 { 3430 /* vmulu.l */, VE::VMULULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5520 { 3438 /* vmulu.w */, VE::VMULUWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5521 { 3438 /* vmulu.w */, VE::VMULUWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5522 { 3438 /* vmulu.w */, VE::VMULUWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5523 { 3438 /* vmulu.w */, VE::VMULUWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5524 { 3438 /* vmulu.w */, VE::VMULUWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5525 { 3438 /* vmulu.w */, VE::VMULUWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5526 { 3446 /* vmv */, VE::VMVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5527 { 3446 /* vmv */, VE::VMViv, Convert__Reg1_0__UImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_UImm7, MCK_V64 }, },
5528 { 3446 /* vmv */, VE::VMVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5529 { 3446 /* vmv */, VE::VMVivm, Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_UImm7, MCK_V64, MCK_VM }, },
5530 { 3450 /* vor */, VE::VORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5531 { 3450 /* vor */, VE::VORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5532 { 3450 /* vor */, VE::VORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5533 { 3450 /* vor */, VE::VORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5534 { 3450 /* vor */, VE::VORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5535 { 3450 /* vor */, VE::VORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5536 { 3454 /* vpcnt */, VE::VPCNTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5537 { 3454 /* vpcnt */, VE::VPCNTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5538 { 3460 /* vrand */, VE::VRANDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5539 { 3460 /* vrand */, VE::VRANDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5540 { 3466 /* vrcp.d */, VE::VRCPDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5541 { 3466 /* vrcp.d */, VE::VRCPDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5542 { 3473 /* vrmaxs.l.fst */, VE::VRMAXSLFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5543 { 3473 /* vrmaxs.l.fst */, VE::VRMAXSLFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5544 { 3486 /* vrmaxs.l.lst */, VE::VRMAXSLLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5545 { 3486 /* vrmaxs.l.lst */, VE::VRMAXSLLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5546 { 3499 /* vrmaxs.w.fst.sx */, VE::VRMAXSWFSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5547 { 3499 /* vrmaxs.w.fst.sx */, VE::VRMAXSWFSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5548 { 3515 /* vrmaxs.w.fst.zx */, VE::VRMAXSWFSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5549 { 3515 /* vrmaxs.w.fst.zx */, VE::VRMAXSWFSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5550 { 3531 /* vrmaxs.w.lst.sx */, VE::VRMAXSWLSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5551 { 3531 /* vrmaxs.w.lst.sx */, VE::VRMAXSWLSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5552 { 3547 /* vrmaxs.w.lst.zx */, VE::VRMAXSWLSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5553 { 3547 /* vrmaxs.w.lst.zx */, VE::VRMAXSWLSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5554 { 3563 /* vrmins.l.fst */, VE::VRMINSLFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5555 { 3563 /* vrmins.l.fst */, VE::VRMINSLFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5556 { 3576 /* vrmins.l.lst */, VE::VRMINSLLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5557 { 3576 /* vrmins.l.lst */, VE::VRMINSLLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5558 { 3589 /* vrmins.w.fst.sx */, VE::VRMINSWFSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5559 { 3589 /* vrmins.w.fst.sx */, VE::VRMINSWFSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5560 { 3605 /* vrmins.w.fst.zx */, VE::VRMINSWFSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5561 { 3605 /* vrmins.w.fst.zx */, VE::VRMINSWFSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5562 { 3621 /* vrmins.w.lst.sx */, VE::VRMINSWLSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5563 { 3621 /* vrmins.w.lst.sx */, VE::VRMINSWLSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5564 { 3637 /* vrmins.w.lst.zx */, VE::VRMINSWLSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5565 { 3637 /* vrmins.w.lst.zx */, VE::VRMINSWLSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5566 { 3653 /* vror */, VE::VRORv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5567 { 3653 /* vror */, VE::VRORvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5568 { 3658 /* vrsqrt.d */, VE::VRSQRTDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5569 { 3658 /* vrsqrt.d */, VE::VRSQRTDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5570 { 3667 /* vrsqrt.d.nex */, VE::VRSQRTDNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5571 { 3667 /* vrsqrt.d.nex */, VE::VRSQRTDNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5572 { 3680 /* vrxor */, VE::VRXORv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5573 { 3680 /* vrxor */, VE::VRXORvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5574 { 3686 /* vsc */, VE::VSCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5575 { 3686 /* vsc */, VE::VSCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5576 { 3686 /* vsc */, VE::VSCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5577 { 3686 /* vsc */, VE::VSCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5578 { 3686 /* vsc */, VE::VSCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5579 { 3686 /* vsc */, VE::VSCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5580 { 3686 /* vsc */, VE::VSCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5581 { 3686 /* vsc */, VE::VSCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5582 { 3686 /* vsc */, VE::VSCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5583 { 3686 /* vsc */, VE::VSCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5584 { 3686 /* vsc */, VE::VSCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5585 { 3686 /* vsc */, VE::VSCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5586 { 3686 /* vsc */, VE::VSCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5587 { 3686 /* vsc */, VE::VSCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5588 { 3686 /* vsc */, VE::VSCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5589 { 3686 /* vsc */, VE::VSCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5590 { 3690 /* vsc.nc */, VE::VSCNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5591 { 3690 /* vsc.nc */, VE::VSCNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5592 { 3690 /* vsc.nc */, VE::VSCNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5593 { 3690 /* vsc.nc */, VE::VSCNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5594 { 3690 /* vsc.nc */, VE::VSCNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5595 { 3690 /* vsc.nc */, VE::VSCNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5596 { 3690 /* vsc.nc */, VE::VSCNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5597 { 3690 /* vsc.nc */, VE::VSCNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5598 { 3690 /* vsc.nc */, VE::VSCNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5599 { 3690 /* vsc.nc */, VE::VSCNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5600 { 3690 /* vsc.nc */, VE::VSCNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5601 { 3690 /* vsc.nc */, VE::VSCNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5602 { 3690 /* vsc.nc */, VE::VSCNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5603 { 3690 /* vsc.nc */, VE::VSCNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5604 { 3690 /* vsc.nc */, VE::VSCNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5605 { 3690 /* vsc.nc */, VE::VSCNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5606 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5607 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5608 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5609 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5610 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5611 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5612 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5613 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5614 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5615 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5616 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5617 { 3697 /* vsc.nc.ot */, VE::VSCNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5618 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5619 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5620 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5621 { 3697 /* vsc.nc.ot */, VE::VSCNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5622 { 3707 /* vsc.ot */, VE::VSCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5623 { 3707 /* vsc.ot */, VE::VSCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5624 { 3707 /* vsc.ot */, VE::VSCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5625 { 3707 /* vsc.ot */, VE::VSCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5626 { 3707 /* vsc.ot */, VE::VSCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5627 { 3707 /* vsc.ot */, VE::VSCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5628 { 3707 /* vsc.ot */, VE::VSCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5629 { 3707 /* vsc.ot */, VE::VSCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5630 { 3707 /* vsc.ot */, VE::VSCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5631 { 3707 /* vsc.ot */, VE::VSCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5632 { 3707 /* vsc.ot */, VE::VSCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5633 { 3707 /* vsc.ot */, VE::VSCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5634 { 3707 /* vsc.ot */, VE::VSCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5635 { 3707 /* vsc.ot */, VE::VSCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5636 { 3707 /* vsc.ot */, VE::VSCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5637 { 3707 /* vsc.ot */, VE::VSCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5638 { 3714 /* vscl */, VE::VSCLsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5639 { 3714 /* vscl */, VE::VSCLsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5640 { 3714 /* vscl */, VE::VSCLsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5641 { 3714 /* vscl */, VE::VSCLsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5642 { 3714 /* vscl */, VE::VSCLvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5643 { 3714 /* vscl */, VE::VSCLvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5644 { 3714 /* vscl */, VE::VSCLvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5645 { 3714 /* vscl */, VE::VSCLvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5646 { 3714 /* vscl */, VE::VSCLsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5647 { 3714 /* vscl */, VE::VSCLsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5648 { 3714 /* vscl */, VE::VSCLsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5649 { 3714 /* vscl */, VE::VSCLsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5650 { 3714 /* vscl */, VE::VSCLvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5651 { 3714 /* vscl */, VE::VSCLvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5652 { 3714 /* vscl */, VE::VSCLvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5653 { 3714 /* vscl */, VE::VSCLvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5654 { 3719 /* vscl.nc */, VE::VSCLNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5655 { 3719 /* vscl.nc */, VE::VSCLNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5656 { 3719 /* vscl.nc */, VE::VSCLNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5657 { 3719 /* vscl.nc */, VE::VSCLNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5658 { 3719 /* vscl.nc */, VE::VSCLNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5659 { 3719 /* vscl.nc */, VE::VSCLNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5660 { 3719 /* vscl.nc */, VE::VSCLNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5661 { 3719 /* vscl.nc */, VE::VSCLNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5662 { 3719 /* vscl.nc */, VE::VSCLNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5663 { 3719 /* vscl.nc */, VE::VSCLNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5664 { 3719 /* vscl.nc */, VE::VSCLNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5665 { 3719 /* vscl.nc */, VE::VSCLNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5666 { 3719 /* vscl.nc */, VE::VSCLNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5667 { 3719 /* vscl.nc */, VE::VSCLNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5668 { 3719 /* vscl.nc */, VE::VSCLNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5669 { 3719 /* vscl.nc */, VE::VSCLNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5670 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5671 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5672 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5673 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5674 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5675 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5676 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5677 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5678 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5679 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5680 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5681 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5682 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5683 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5684 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5685 { 3727 /* vscl.nc.ot */, VE::VSCLNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5686 { 3738 /* vscl.ot */, VE::VSCLOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5687 { 3738 /* vscl.ot */, VE::VSCLOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5688 { 3738 /* vscl.ot */, VE::VSCLOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5689 { 3738 /* vscl.ot */, VE::VSCLOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5690 { 3738 /* vscl.ot */, VE::VSCLOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5691 { 3738 /* vscl.ot */, VE::VSCLOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5692 { 3738 /* vscl.ot */, VE::VSCLOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5693 { 3738 /* vscl.ot */, VE::VSCLOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5694 { 3738 /* vscl.ot */, VE::VSCLOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5695 { 3738 /* vscl.ot */, VE::VSCLOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5696 { 3738 /* vscl.ot */, VE::VSCLOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5697 { 3738 /* vscl.ot */, VE::VSCLOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5698 { 3738 /* vscl.ot */, VE::VSCLOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5699 { 3738 /* vscl.ot */, VE::VSCLOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5700 { 3738 /* vscl.ot */, VE::VSCLOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5701 { 3738 /* vscl.ot */, VE::VSCLOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5702 { 3746 /* vscu */, VE::VSCUsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5703 { 3746 /* vscu */, VE::VSCUsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5704 { 3746 /* vscu */, VE::VSCUsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5705 { 3746 /* vscu */, VE::VSCUsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5706 { 3746 /* vscu */, VE::VSCUvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5707 { 3746 /* vscu */, VE::VSCUvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5708 { 3746 /* vscu */, VE::VSCUvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5709 { 3746 /* vscu */, VE::VSCUvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5710 { 3746 /* vscu */, VE::VSCUsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5711 { 3746 /* vscu */, VE::VSCUsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5712 { 3746 /* vscu */, VE::VSCUsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5713 { 3746 /* vscu */, VE::VSCUsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5714 { 3746 /* vscu */, VE::VSCUvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5715 { 3746 /* vscu */, VE::VSCUvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5716 { 3746 /* vscu */, VE::VSCUvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5717 { 3746 /* vscu */, VE::VSCUvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5718 { 3751 /* vscu.nc */, VE::VSCUNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5719 { 3751 /* vscu.nc */, VE::VSCUNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5720 { 3751 /* vscu.nc */, VE::VSCUNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5721 { 3751 /* vscu.nc */, VE::VSCUNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5722 { 3751 /* vscu.nc */, VE::VSCUNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5723 { 3751 /* vscu.nc */, VE::VSCUNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5724 { 3751 /* vscu.nc */, VE::VSCUNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5725 { 3751 /* vscu.nc */, VE::VSCUNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5726 { 3751 /* vscu.nc */, VE::VSCUNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5727 { 3751 /* vscu.nc */, VE::VSCUNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5728 { 3751 /* vscu.nc */, VE::VSCUNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5729 { 3751 /* vscu.nc */, VE::VSCUNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5730 { 3751 /* vscu.nc */, VE::VSCUNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5731 { 3751 /* vscu.nc */, VE::VSCUNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5732 { 3751 /* vscu.nc */, VE::VSCUNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5733 { 3751 /* vscu.nc */, VE::VSCUNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5734 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5735 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5736 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5737 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5738 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5739 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5740 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5741 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5742 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5743 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5744 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5745 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5746 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5747 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5748 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5749 { 3759 /* vscu.nc.ot */, VE::VSCUNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5750 { 3770 /* vscu.ot */, VE::VSCUOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5751 { 3770 /* vscu.ot */, VE::VSCUOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5752 { 3770 /* vscu.ot */, VE::VSCUOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5753 { 3770 /* vscu.ot */, VE::VSCUOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5754 { 3770 /* vscu.ot */, VE::VSCUOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5755 { 3770 /* vscu.ot */, VE::VSCUOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5756 { 3770 /* vscu.ot */, VE::VSCUOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5757 { 3770 /* vscu.ot */, VE::VSCUOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5758 { 3770 /* vscu.ot */, VE::VSCUOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5759 { 3770 /* vscu.ot */, VE::VSCUOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5760 { 3770 /* vscu.ot */, VE::VSCUOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5761 { 3770 /* vscu.ot */, VE::VSCUOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5762 { 3770 /* vscu.ot */, VE::VSCUOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5763 { 3770 /* vscu.ot */, VE::VSCUOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5764 { 3770 /* vscu.ot */, VE::VSCUOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5765 { 3770 /* vscu.ot */, VE::VSCUOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5766 { 3778 /* vseq */, VE::VSEQ, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
5767 { 3778 /* vseq */, VE::VSEQm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
5768 { 3783 /* vsfa */, VE::VSFAvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5769 { 3783 /* vsfa */, VE::VSFAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_MImm }, },
5770 { 3783 /* vsfa */, VE::VSFAvir, Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_I64 }, },
5771 { 3783 /* vsfa */, VE::VSFAvim, Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_MImm }, },
5772 { 3783 /* vsfa */, VE::VSFAvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5773 { 3783 /* vsfa */, VE::VSFAvrmm, Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_MImm, MCK_VM }, },
5774 { 3783 /* vsfa */, VE::VSFAvirm, Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_I64, MCK_VM }, },
5775 { 3783 /* vsfa */, VE::VSFAvimm, Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_MImm, MCK_VM }, },
5776 { 3788 /* vshf */, VE::VSHFvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5777 { 3788 /* vshf */, VE::VSHFvvi, Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_UImm4 }, },
5778 { 3793 /* vsla.l */, VE::VSLALvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5779 { 3793 /* vsla.l */, VE::VSLALvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5780 { 3793 /* vsla.l */, VE::VSLALvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5781 { 3793 /* vsla.l */, VE::VSLALvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5782 { 3793 /* vsla.l */, VE::VSLALvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5783 { 3793 /* vsla.l */, VE::VSLALvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5784 { 3800 /* vsla.w.sx */, VE::VSLAWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5785 { 3800 /* vsla.w.sx */, VE::VSLAWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5786 { 3800 /* vsla.w.sx */, VE::VSLAWSXvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5787 { 3800 /* vsla.w.sx */, VE::VSLAWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5788 { 3800 /* vsla.w.sx */, VE::VSLAWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5789 { 3800 /* vsla.w.sx */, VE::VSLAWSXvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5790 { 3810 /* vsld */, VE::VSLDvvr, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64 }, },
5791 { 3810 /* vsld */, VE::VSLDvvi, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7 }, },
5792 { 3810 /* vsld */, VE::VSLDvvrm, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64, MCK_VM }, },
5793 { 3810 /* vsld */, VE::VSLDvvim, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7, MCK_VM }, },
5794 { 3815 /* vsll */, VE::VSLLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5795 { 3815 /* vsll */, VE::VSLLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5796 { 3815 /* vsll */, VE::VSLLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5797 { 3815 /* vsll */, VE::VSLLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5798 { 3815 /* vsll */, VE::VSLLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5799 { 3815 /* vsll */, VE::VSLLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5800 { 3820 /* vsra.l */, VE::VSRALvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5801 { 3820 /* vsra.l */, VE::VSRALvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5802 { 3820 /* vsra.l */, VE::VSRALvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5803 { 3820 /* vsra.l */, VE::VSRALvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5804 { 3820 /* vsra.l */, VE::VSRALvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5805 { 3820 /* vsra.l */, VE::VSRALvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5806 { 3827 /* vsra.w.sx */, VE::VSRAWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5807 { 3827 /* vsra.w.sx */, VE::VSRAWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5808 { 3827 /* vsra.w.sx */, VE::VSRAWSXvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5809 { 3827 /* vsra.w.sx */, VE::VSRAWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5810 { 3827 /* vsra.w.sx */, VE::VSRAWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5811 { 3827 /* vsra.w.sx */, VE::VSRAWSXvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5812 { 3837 /* vsrd */, VE::VSRDvvr, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64 }, },
5813 { 3837 /* vsrd */, VE::VSRDvvi, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7 }, },
5814 { 3837 /* vsrd */, VE::VSRDvvrm, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64, MCK_VM }, },
5815 { 3837 /* vsrd */, VE::VSRDvvim, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7, MCK_VM }, },
5816 { 3842 /* vsrl */, VE::VSRLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5817 { 3842 /* vsrl */, VE::VSRLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5818 { 3842 /* vsrl */, VE::VSRLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5819 { 3842 /* vsrl */, VE::VSRLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5820 { 3842 /* vsrl */, VE::VSRLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5821 { 3842 /* vsrl */, VE::VSRLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5822 { 3847 /* vst */, VE::VSTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5823 { 3847 /* vst */, VE::VSTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5824 { 3847 /* vst */, VE::VSTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5825 { 3847 /* vst */, VE::VSTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5826 { 3847 /* vst */, VE::VSTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5827 { 3847 /* vst */, VE::VSTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5828 { 3847 /* vst */, VE::VSTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5829 { 3847 /* vst */, VE::VSTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5830 { 3851 /* vst.nc */, VE::VSTNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5831 { 3851 /* vst.nc */, VE::VSTNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5832 { 3851 /* vst.nc */, VE::VSTNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5833 { 3851 /* vst.nc */, VE::VSTNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5834 { 3851 /* vst.nc */, VE::VSTNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5835 { 3851 /* vst.nc */, VE::VSTNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5836 { 3851 /* vst.nc */, VE::VSTNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5837 { 3851 /* vst.nc */, VE::VSTNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5838 { 3858 /* vst.nc.ot */, VE::VSTNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5839 { 3858 /* vst.nc.ot */, VE::VSTNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5840 { 3858 /* vst.nc.ot */, VE::VSTNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5841 { 3858 /* vst.nc.ot */, VE::VSTNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5842 { 3858 /* vst.nc.ot */, VE::VSTNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5843 { 3858 /* vst.nc.ot */, VE::VSTNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5844 { 3858 /* vst.nc.ot */, VE::VSTNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5845 { 3858 /* vst.nc.ot */, VE::VSTNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5846 { 3868 /* vst.ot */, VE::VSTOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5847 { 3868 /* vst.ot */, VE::VSTOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5848 { 3868 /* vst.ot */, VE::VSTOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5849 { 3868 /* vst.ot */, VE::VSTOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5850 { 3868 /* vst.ot */, VE::VSTOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5851 { 3868 /* vst.ot */, VE::VSTOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5852 { 3868 /* vst.ot */, VE::VSTOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5853 { 3868 /* vst.ot */, VE::VSTOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5854 { 3875 /* vst2d */, VE::VST2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5855 { 3875 /* vst2d */, VE::VST2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5856 { 3875 /* vst2d */, VE::VST2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5857 { 3875 /* vst2d */, VE::VST2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5858 { 3875 /* vst2d */, VE::VST2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5859 { 3875 /* vst2d */, VE::VST2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5860 { 3875 /* vst2d */, VE::VST2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5861 { 3875 /* vst2d */, VE::VST2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5862 { 3881 /* vst2d.nc */, VE::VST2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5863 { 3881 /* vst2d.nc */, VE::VST2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5864 { 3881 /* vst2d.nc */, VE::VST2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5865 { 3881 /* vst2d.nc */, VE::VST2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5866 { 3881 /* vst2d.nc */, VE::VST2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5867 { 3881 /* vst2d.nc */, VE::VST2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5868 { 3881 /* vst2d.nc */, VE::VST2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5869 { 3881 /* vst2d.nc */, VE::VST2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5870 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5871 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5872 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5873 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5874 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5875 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5876 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5877 { 3890 /* vst2d.nc.ot */, VE::VST2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5878 { 3902 /* vst2d.ot */, VE::VST2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5879 { 3902 /* vst2d.ot */, VE::VST2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5880 { 3902 /* vst2d.ot */, VE::VST2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5881 { 3902 /* vst2d.ot */, VE::VST2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5882 { 3902 /* vst2d.ot */, VE::VST2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5883 { 3902 /* vst2d.ot */, VE::VST2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5884 { 3902 /* vst2d.ot */, VE::VST2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5885 { 3902 /* vst2d.ot */, VE::VST2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5886 { 3911 /* vstl */, VE::VSTLrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5887 { 3911 /* vstl */, VE::VSTLrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5888 { 3911 /* vstl */, VE::VSTLirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5889 { 3911 /* vstl */, VE::VSTLizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5890 { 3911 /* vstl */, VE::VSTLrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5891 { 3911 /* vstl */, VE::VSTLrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5892 { 3911 /* vstl */, VE::VSTLirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5893 { 3911 /* vstl */, VE::VSTLizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5894 { 3916 /* vstl.nc */, VE::VSTLNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5895 { 3916 /* vstl.nc */, VE::VSTLNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5896 { 3916 /* vstl.nc */, VE::VSTLNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5897 { 3916 /* vstl.nc */, VE::VSTLNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5898 { 3916 /* vstl.nc */, VE::VSTLNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5899 { 3916 /* vstl.nc */, VE::VSTLNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5900 { 3916 /* vstl.nc */, VE::VSTLNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5901 { 3916 /* vstl.nc */, VE::VSTLNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5902 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5903 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5904 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5905 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5906 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5907 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5908 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5909 { 3924 /* vstl.nc.ot */, VE::VSTLNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5910 { 3935 /* vstl.ot */, VE::VSTLOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5911 { 3935 /* vstl.ot */, VE::VSTLOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5912 { 3935 /* vstl.ot */, VE::VSTLOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5913 { 3935 /* vstl.ot */, VE::VSTLOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5914 { 3935 /* vstl.ot */, VE::VSTLOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5915 { 3935 /* vstl.ot */, VE::VSTLOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5916 { 3935 /* vstl.ot */, VE::VSTLOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5917 { 3935 /* vstl.ot */, VE::VSTLOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5918 { 3943 /* vstl2d */, VE::VSTL2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5919 { 3943 /* vstl2d */, VE::VSTL2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5920 { 3943 /* vstl2d */, VE::VSTL2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5921 { 3943 /* vstl2d */, VE::VSTL2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5922 { 3943 /* vstl2d */, VE::VSTL2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5923 { 3943 /* vstl2d */, VE::VSTL2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5924 { 3943 /* vstl2d */, VE::VSTL2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5925 { 3943 /* vstl2d */, VE::VSTL2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5926 { 3950 /* vstl2d.nc */, VE::VSTL2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5927 { 3950 /* vstl2d.nc */, VE::VSTL2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5928 { 3950 /* vstl2d.nc */, VE::VSTL2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5929 { 3950 /* vstl2d.nc */, VE::VSTL2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5930 { 3950 /* vstl2d.nc */, VE::VSTL2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5931 { 3950 /* vstl2d.nc */, VE::VSTL2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5932 { 3950 /* vstl2d.nc */, VE::VSTL2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5933 { 3950 /* vstl2d.nc */, VE::VSTL2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5934 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5935 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5936 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5937 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5938 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5939 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5940 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5941 { 3960 /* vstl2d.nc.ot */, VE::VSTL2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5942 { 3973 /* vstl2d.ot */, VE::VSTL2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5943 { 3973 /* vstl2d.ot */, VE::VSTL2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5944 { 3973 /* vstl2d.ot */, VE::VSTL2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5945 { 3973 /* vstl2d.ot */, VE::VSTL2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5946 { 3973 /* vstl2d.ot */, VE::VSTL2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5947 { 3973 /* vstl2d.ot */, VE::VSTL2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5948 { 3973 /* vstl2d.ot */, VE::VSTL2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5949 { 3973 /* vstl2d.ot */, VE::VSTL2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5950 { 3983 /* vstu */, VE::VSTUrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5951 { 3983 /* vstu */, VE::VSTUrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5952 { 3983 /* vstu */, VE::VSTUirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5953 { 3983 /* vstu */, VE::VSTUizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5954 { 3983 /* vstu */, VE::VSTUrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5955 { 3983 /* vstu */, VE::VSTUrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5956 { 3983 /* vstu */, VE::VSTUirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5957 { 3983 /* vstu */, VE::VSTUizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5958 { 3988 /* vstu.nc */, VE::VSTUNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5959 { 3988 /* vstu.nc */, VE::VSTUNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5960 { 3988 /* vstu.nc */, VE::VSTUNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5961 { 3988 /* vstu.nc */, VE::VSTUNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5962 { 3988 /* vstu.nc */, VE::VSTUNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5963 { 3988 /* vstu.nc */, VE::VSTUNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5964 { 3988 /* vstu.nc */, VE::VSTUNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5965 { 3988 /* vstu.nc */, VE::VSTUNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5966 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5967 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5968 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5969 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5970 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5971 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5972 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5973 { 3996 /* vstu.nc.ot */, VE::VSTUNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5974 { 4007 /* vstu.ot */, VE::VSTUOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5975 { 4007 /* vstu.ot */, VE::VSTUOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5976 { 4007 /* vstu.ot */, VE::VSTUOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5977 { 4007 /* vstu.ot */, VE::VSTUOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5978 { 4007 /* vstu.ot */, VE::VSTUOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5979 { 4007 /* vstu.ot */, VE::VSTUOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5980 { 4007 /* vstu.ot */, VE::VSTUOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5981 { 4007 /* vstu.ot */, VE::VSTUOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5982 { 4015 /* vstu2d */, VE::VSTU2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5983 { 4015 /* vstu2d */, VE::VSTU2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5984 { 4015 /* vstu2d */, VE::VSTU2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5985 { 4015 /* vstu2d */, VE::VSTU2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5986 { 4015 /* vstu2d */, VE::VSTU2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5987 { 4015 /* vstu2d */, VE::VSTU2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5988 { 4015 /* vstu2d */, VE::VSTU2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5989 { 4015 /* vstu2d */, VE::VSTU2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5990 { 4022 /* vstu2d.nc */, VE::VSTU2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5991 { 4022 /* vstu2d.nc */, VE::VSTU2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
5992 { 4022 /* vstu2d.nc */, VE::VSTU2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
5993 { 4022 /* vstu2d.nc */, VE::VSTU2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
5994 { 4022 /* vstu2d.nc */, VE::VSTU2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5995 { 4022 /* vstu2d.nc */, VE::VSTU2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5996 { 4022 /* vstu2d.nc */, VE::VSTU2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5997 { 4022 /* vstu2d.nc */, VE::VSTU2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5998 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
5999 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6000 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6001 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6002 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6003 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6004 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6005 { 4032 /* vstu2d.nc.ot */, VE::VSTU2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6006 { 4045 /* vstu2d.ot */, VE::VSTU2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6007 { 4045 /* vstu2d.ot */, VE::VSTU2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6008 { 4045 /* vstu2d.ot */, VE::VSTU2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6009 { 4045 /* vstu2d.ot */, VE::VSTU2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6010 { 4045 /* vstu2d.ot */, VE::VSTU2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6011 { 4045 /* vstu2d.ot */, VE::VSTU2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6012 { 4045 /* vstu2d.ot */, VE::VSTU2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6013 { 4045 /* vstu2d.ot */, VE::VSTU2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6014 { 4055 /* vsubs.l */, VE::VSUBSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6015 { 4055 /* vsubs.l */, VE::VSUBSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6016 { 4055 /* vsubs.l */, VE::VSUBSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6017 { 4055 /* vsubs.l */, VE::VSUBSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6018 { 4055 /* vsubs.l */, VE::VSUBSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6019 { 4055 /* vsubs.l */, VE::VSUBSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6020 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6021 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6022 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6023 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6024 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6025 { 4063 /* vsubs.w.sx */, VE::VSUBSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6026 { 4074 /* vsubu.l */, VE::VSUBULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6027 { 4074 /* vsubu.l */, VE::VSUBULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6028 { 4074 /* vsubu.l */, VE::VSUBULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6029 { 4074 /* vsubu.l */, VE::VSUBULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6030 { 4074 /* vsubu.l */, VE::VSUBULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6031 { 4074 /* vsubu.l */, VE::VSUBULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6032 { 4082 /* vsum.l */, VE::VSUMLv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6033 { 4082 /* vsum.l */, VE::VSUMLvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6034 { 4089 /* vsum.w.sx */, VE::VSUMWSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6035 { 4089 /* vsum.w.sx */, VE::VSUMWSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6036 { 4099 /* vsum.w.zx */, VE::VSUMWZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6037 { 4099 /* vsum.w.zx */, VE::VSUMWZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6038 { 4109 /* vxor */, VE::VXORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6039 { 4109 /* vxor */, VE::VXORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6040 { 4109 /* vxor */, VE::VXORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
6041 { 4109 /* vxor */, VE::VXORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6042 { 4109 /* vxor */, VE::VXORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6043 { 4109 /* vxor */, VE::VXORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
6044 { 4114 /* xor */, VE::XORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
6045 { 4114 /* xor */, VE::XORrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
6046 { 4114 /* xor */, VE::XORri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
6047 { 4114 /* xor */, VE::XORim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
6048 { 4118 /* xorm */, VE::XORMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
6049};
6050
6051#include "llvm/Support/Debug.h"
6052#include "llvm/Support/Format.h"
6053
6054unsigned VEAsmParser::
6055MatchInstructionImpl(const OperandVector &Operands,
6056 MCInst &Inst,
6057 uint64_t &ErrorInfo,
6058 FeatureBitset &MissingFeatures,
6059 bool matchingInlineAsm, unsigned VariantID) {
6060 // Eliminate obvious mismatches.
6061 if (Operands.size() > 8) {
6062 ErrorInfo = 8;
6063 return Match_InvalidOperand;
6064 }
6065
6066 // Get the current feature set.
6067 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
6068
6069 // Get the instruction mnemonic, which is the first token.
6070 StringRef Mnemonic = ((VEOperand &)*Operands[0]).getToken();
6071
6072 // Process all MnemonicAliases to remap the mnemonic.
6073 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
6074
6075 // Some state to try to produce better error messages.
6076 bool HadMatchOtherThanFeatures = false;
6077 bool HadMatchOtherThanPredicate = false;
6078 unsigned RetCode = Match_InvalidOperand;
6079 MissingFeatures.set();
6080 // Set ErrorInfo to the operand that mismatches if it is
6081 // wrong for all instances of the instruction.
6082 ErrorInfo = ~0ULL;
6083 // Find the appropriate table for this asm variant.
6084 const MatchEntry *Start, *End;
6085 switch (VariantID) {
6086 default: llvm_unreachable("invalid variant!");
6087 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
6088 }
6089 // Search the table.
6090 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
6091
6092 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
6093 std::distance(MnemonicRange.first, MnemonicRange.second) <<
6094 " encodings with mnemonic '" << Mnemonic << "'\n");
6095
6096 // Return a more specific error code if no mnemonics match.
6097 if (MnemonicRange.first == MnemonicRange.second)
6098 return Match_MnemonicFail;
6099
6100 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
6101 it != ie; ++it) {
6102 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
6103 bool HasRequiredFeatures =
6104 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
6105 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
6106 << MII.getName(it->Opcode) << "\n");
6107 // equal_range guarantees that instruction mnemonic matches.
6108 assert(Mnemonic == it->getMnemonic());
6109 bool OperandsValid = true;
6110 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 7; ++FormalIdx) {
6111 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
6112 DEBUG_WITH_TYPE("asm-matcher",
6113 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
6114 << " against actual operand at index " << ActualIdx);
6115 if (ActualIdx < Operands.size())
6116 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
6117 Operands[ActualIdx]->print(dbgs(), *getContext().getAsmInfo()); dbgs() << "): ");
6118 else
6119 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
6120 if (ActualIdx >= Operands.size()) {
6121 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n");
6122 if (Formal == InvalidMatchClass) {
6123 break;
6124 }
6125 if (isSubclass(Formal, OptionalMatchClass)) {
6126 continue;
6127 }
6128 OperandsValid = false;
6129 ErrorInfo = ActualIdx;
6130 break;
6131 }
6132 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
6133 unsigned Diag = validateOperandClass(Actual, Formal);
6134 if (Diag == Match_Success) {
6135 DEBUG_WITH_TYPE("asm-matcher",
6136 dbgs() << "match success using generic matcher\n");
6137 ++ActualIdx;
6138 continue;
6139 }
6140 // If the generic handler indicates an invalid operand
6141 // failure, check for a special case.
6142 if (Diag != Match_Success) {
6143 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
6144 if (TargetDiag == Match_Success) {
6145 DEBUG_WITH_TYPE("asm-matcher",
6146 dbgs() << "match success using target matcher\n");
6147 ++ActualIdx;
6148 continue;
6149 }
6150 // If the target matcher returned a specific error code use
6151 // that, else use the one from the generic matcher.
6152 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
6153 Diag = TargetDiag;
6154 }
6155 // If current formal operand wasn't matched and it is optional
6156 // then try to match next formal operand
6157 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
6158 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
6159 continue;
6160 }
6161 // If this operand is broken for all of the instances of this
6162 // mnemonic, keep track of it so we can report loc info.
6163 // If we already had a match that only failed due to a
6164 // target predicate, that diagnostic is preferred.
6165 if (!HadMatchOtherThanPredicate &&
6166 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
6167 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
6168 RetCode = Diag;
6169 ErrorInfo = ActualIdx;
6170 }
6171 // Otherwise, just reject this instance of the mnemonic.
6172 OperandsValid = false;
6173 break;
6174 }
6175
6176 if (!OperandsValid) {
6177 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
6178 "operand mismatches, ignoring "
6179 "this opcode\n");
6180 continue;
6181 }
6182 if (!HasRequiredFeatures) {
6183 HadMatchOtherThanFeatures = true;
6184 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
6185 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
6186 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
6187 if (NewMissingFeatures[I])
6188 dbgs() << ' ' << I;
6189 dbgs() << "\n");
6190 if (NewMissingFeatures.count() <=
6191 MissingFeatures.count())
6192 MissingFeatures = NewMissingFeatures;
6193 continue;
6194 }
6195
6196 Inst.clear();
6197
6198 Inst.setOpcode(it->Opcode);
6199 // We have a potential match but have not rendered the operands.
6200 // Check the target predicate to handle any context sensitive
6201 // constraints.
6202 // For example, Ties that are referenced multiple times must be
6203 // checked here to ensure the input is the same for each match
6204 // constraints. If we leave it any later the ties will have been
6205 // canonicalized
6206 unsigned MatchResult;
6207 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
6208 Inst.clear();
6209 DEBUG_WITH_TYPE(
6210 "asm-matcher",
6211 dbgs() << "Early target match predicate failed with diag code "
6212 << MatchResult << "\n");
6213 RetCode = MatchResult;
6214 HadMatchOtherThanPredicate = true;
6215 continue;
6216 }
6217
6218 if (matchingInlineAsm) {
6219 convertToMapAndConstraints(it->ConvertFn, Operands);
6220 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
6221 ErrorInfo))
6222 return Match_InvalidTiedOperand;
6223
6224 return Match_Success;
6225 }
6226
6227 // We have selected a definite instruction, convert the parsed
6228 // operands into the appropriate MCInst.
6229 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
6230
6231 // We have a potential match. Check the target predicate to
6232 // handle any context sensitive constraints.
6233 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
6234 DEBUG_WITH_TYPE("asm-matcher",
6235 dbgs() << "Target match predicate failed with diag code "
6236 << MatchResult << "\n");
6237 Inst.clear();
6238 RetCode = MatchResult;
6239 HadMatchOtherThanPredicate = true;
6240 continue;
6241 }
6242
6243 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
6244 ErrorInfo))
6245 return Match_InvalidTiedOperand;
6246
6247 DEBUG_WITH_TYPE(
6248 "asm-matcher",
6249 dbgs() << "Opcode result: complete match, selecting this opcode\n");
6250 return Match_Success;
6251 }
6252
6253 // Okay, we had no match. Try to return a useful error code.
6254 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
6255 return RetCode;
6256
6257 ErrorInfo = 0;
6258 return Match_MissingFeature;
6259}
6260
6261namespace {
6262 struct OperandMatchEntry {
6263 uint16_t Mnemonic;
6264 uint8_t OperandMask;
6265 uint8_t Class;
6266 uint8_t RequiredFeaturesIdx;
6267
6268 StringRef getMnemonic() const {
6269 return StringRef(MnemonicTable + Mnemonic + 1,
6270 MnemonicTable[Mnemonic]);
6271 }
6272 };
6273
6274 // Predicate for searching for an opcode.
6275 struct LessOpcodeOperand {
6276 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
6277 return LHS.getMnemonic() < RHS;
6278 }
6279 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
6280 return LHS < RHS.getMnemonic();
6281 }
6282 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
6283 return LHS.getMnemonic() < RHS.getMnemonic();
6284 }
6285 };
6286} // end anonymous namespace
6287
6288static const OperandMatchEntry OperandMatchTable[408] = {
6289 /* Operand List Mnemonic, Mask, Operand Class, Features */
6290 { 1 /* adds.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6291 { 1 /* adds.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6292 { 8 /* adds.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6293 { 8 /* adds.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6294 { 18 /* adds.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6295 { 18 /* adds.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6296 { 28 /* addu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6297 { 28 /* addu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6298 { 35 /* addu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6299 { 35 /* addu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6300 { 42 /* and */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6301 { 42 /* and */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6302 { 51 /* atmam */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6303 { 51 /* atmam */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6304 { 51 /* atmam */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6305 { 51 /* atmam */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6306 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6307 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6308 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6309 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6310 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6311 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6312 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6313 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6314 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6315 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6316 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6317 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6318 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6319 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6320 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6321 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6322 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6323 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6324 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6325 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6326 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6327 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6328 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6329 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6330 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6331 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6332 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6333 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6334 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6335 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6336 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6337 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6338 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6339 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6340 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6341 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6342 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6343 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6344 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6345 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6346 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6347 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6348 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6349 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6350 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6351 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6352 { 57 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6353 { 57 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6354 { 59 /* b.d */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6355 { 59 /* b.d */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6356 { 63 /* b.d.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6357 { 63 /* b.d.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6358 { 70 /* b.d.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6359 { 70 /* b.d.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6360 { 76 /* b.l */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6361 { 76 /* b.l */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6362 { 80 /* b.l.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6363 { 80 /* b.l.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6364 { 87 /* b.l.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6365 { 87 /* b.l.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6366 { 93 /* b.s */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6367 { 93 /* b.s */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6368 { 97 /* b.s.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6369 { 97 /* b.s.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6370 { 104 /* b.s.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6371 { 104 /* b.s.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6372 { 110 /* b.w */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6373 { 110 /* b.w */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6374 { 114 /* b.w.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6375 { 114 /* b.w.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6376 { 121 /* b.w.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6377 { 121 /* b.w.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6378 { 127 /* baf.d */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6379 { 127 /* baf.d */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6380 { 133 /* baf.d.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6381 { 133 /* baf.d.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6382 { 142 /* baf.d.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6383 { 142 /* baf.d.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6384 { 150 /* baf.l */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6385 { 150 /* baf.l */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6386 { 156 /* baf.l.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6387 { 156 /* baf.l.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6388 { 165 /* baf.l.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6389 { 165 /* baf.l.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6390 { 173 /* baf.s */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6391 { 173 /* baf.s */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6392 { 179 /* baf.s.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6393 { 179 /* baf.s.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6394 { 188 /* baf.s.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6395 { 188 /* baf.s.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6396 { 196 /* baf.w */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6397 { 196 /* baf.w */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6398 { 202 /* baf.w.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6399 { 202 /* baf.w.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6400 { 211 /* baf.w.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6401 { 211 /* baf.w.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6402 { 406 /* brv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6403 { 410 /* bsic */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6404 { 410 /* bsic */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6405 { 410 /* bsic */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6406 { 410 /* bsic */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6407 { 415 /* bswp */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6408 { 420 /* cas.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6409 { 420 /* cas.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6410 { 420 /* cas.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6411 { 420 /* cas.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6412 { 426 /* cas.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6413 { 426 /* cas.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6414 { 426 /* cas.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6415 { 426 /* cas.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6416 { 432 /* cmov.d. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6417 { 432 /* cmov.d. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6418 { 440 /* cmov.l. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6419 { 440 /* cmov.l. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6420 { 448 /* cmov.s. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6421 { 448 /* cmov.s. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6422 { 456 /* cmov.w. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6423 { 456 /* cmov.w. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6424 { 464 /* cmps.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6425 { 464 /* cmps.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6426 { 471 /* cmps.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6427 { 471 /* cmps.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6428 { 481 /* cmps.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6429 { 481 /* cmps.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6430 { 491 /* cmpu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6431 { 491 /* cmpu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6432 { 498 /* cmpu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6433 { 498 /* cmpu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6434 { 629 /* divs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6435 { 629 /* divs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6436 { 636 /* divs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6437 { 636 /* divs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6438 { 646 /* divs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6439 { 646 /* divs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6440 { 656 /* divu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6441 { 656 /* divu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6442 { 663 /* divu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6443 { 663 /* divu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6444 { 670 /* dld */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6445 { 670 /* dld */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6446 { 670 /* dld */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6447 { 670 /* dld */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6448 { 674 /* dldl.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6449 { 674 /* dldl.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6450 { 674 /* dldl.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6451 { 674 /* dldl.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6452 { 682 /* dldl.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6453 { 682 /* dldl.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6454 { 682 /* dldl.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6455 { 682 /* dldl.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6456 { 690 /* dldu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6457 { 690 /* dldu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6458 { 690 /* dldu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6459 { 690 /* dldu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6460 { 695 /* eqv */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6461 { 695 /* eqv */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6462 { 704 /* fadd.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6463 { 704 /* fadd.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6464 { 711 /* fadd.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6465 { 711 /* fadd.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6466 { 718 /* fadd.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6467 { 718 /* fadd.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6468 { 725 /* fcmp.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6469 { 725 /* fcmp.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6470 { 732 /* fcmp.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6471 { 732 /* fcmp.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6472 { 739 /* fcmp.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6473 { 739 /* fcmp.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6474 { 746 /* fdiv.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6475 { 746 /* fdiv.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6476 { 753 /* fdiv.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6477 { 753 /* fdiv.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6478 { 787 /* fmax.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6479 { 787 /* fmax.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6480 { 794 /* fmax.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6481 { 794 /* fmax.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6482 { 801 /* fmin.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6483 { 801 /* fmin.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6484 { 808 /* fmin.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6485 { 808 /* fmin.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6486 { 815 /* fmul.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6487 { 815 /* fmul.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6488 { 822 /* fmul.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6489 { 822 /* fmul.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6490 { 829 /* fmul.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6491 { 829 /* fmul.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6492 { 836 /* fsub.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6493 { 836 /* fsub.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6494 { 843 /* fsub.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6495 { 843 /* fsub.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6496 { 850 /* fsub.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6497 { 850 /* fsub.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6498 { 861 /* ld */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6499 { 861 /* ld */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6500 { 861 /* ld */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6501 { 861 /* ld */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6502 { 864 /* ld1b.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6503 { 864 /* ld1b.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6504 { 864 /* ld1b.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6505 { 864 /* ld1b.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6506 { 872 /* ld1b.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6507 { 872 /* ld1b.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6508 { 872 /* ld1b.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6509 { 872 /* ld1b.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6510 { 880 /* ld2b.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6511 { 880 /* ld2b.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6512 { 880 /* ld2b.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6513 { 880 /* ld2b.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6514 { 888 /* ld2b.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6515 { 888 /* ld2b.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6516 { 888 /* ld2b.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6517 { 888 /* ld2b.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6518 { 896 /* ldl.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6519 { 896 /* ldl.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6520 { 896 /* ldl.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6521 { 896 /* ldl.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6522 { 903 /* ldl.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6523 { 903 /* ldl.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6524 { 903 /* ldl.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6525 { 903 /* ldl.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6526 { 910 /* ldu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6527 { 910 /* ldu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6528 { 910 /* ldu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6529 { 910 /* ldu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6530 { 914 /* ldz */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6531 { 918 /* lea */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6532 { 918 /* lea */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6533 { 918 /* lea */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6534 { 918 /* lea */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6535 { 922 /* lea.sl */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6536 { 922 /* lea.sl */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6537 { 922 /* lea.sl */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6538 { 922 /* lea.sl */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6539 { 933 /* lhm.b */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6540 { 933 /* lhm.b */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6541 { 939 /* lhm.h */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6542 { 939 /* lhm.h */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6543 { 945 /* lhm.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6544 { 945 /* lhm.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6545 { 951 /* lhm.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6546 { 951 /* lhm.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6547 { 961 /* lsv */, 16 /* 4 */, MCK_MImm, AMFBS_None },
6548 { 961 /* lsv */, 16 /* 4 */, MCK_MImm, AMFBS_None },
6549 { 974 /* lvm */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6550 { 974 /* lvm */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6551 { 987 /* maxs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6552 { 987 /* maxs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6553 { 994 /* maxs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6554 { 994 /* maxs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6555 { 1004 /* maxs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6556 { 1004 /* maxs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6557 { 1014 /* mins.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6558 { 1014 /* mins.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6559 { 1021 /* mins.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6560 { 1021 /* mins.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6561 { 1031 /* mins.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6562 { 1031 /* mins.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6563 { 1055 /* mrg */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6564 { 1055 /* mrg */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6565 { 1059 /* muls.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6566 { 1059 /* muls.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6567 { 1066 /* muls.l.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6568 { 1066 /* muls.l.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6569 { 1075 /* muls.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6570 { 1075 /* muls.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6571 { 1085 /* muls.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6572 { 1085 /* muls.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6573 { 1095 /* mulu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6574 { 1095 /* mulu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6575 { 1102 /* mulu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6576 { 1102 /* mulu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6577 { 1114 /* nnd */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6578 { 1114 /* nnd */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6579 { 1127 /* or */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6580 { 1127 /* or */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6581 { 1134 /* pcnt */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6582 { 1144 /* pfch */, 1 /* 0 */, MCK_MEMrii, AMFBS_None },
6583 { 1144 /* pfch */, 1 /* 0 */, MCK_MEMrri, AMFBS_None },
6584 { 1144 /* pfch */, 1 /* 0 */, MCK_MEMzii, AMFBS_None },
6585 { 1144 /* pfch */, 1 /* 0 */, MCK_MEMzri, AMFBS_None },
6586 { 1218 /* pvand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6587 { 1218 /* pvand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6588 { 1224 /* pvand.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6589 { 1224 /* pvand.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6590 { 1233 /* pvand.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6591 { 1233 /* pvand.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6592 { 1398 /* pveqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6593 { 1398 /* pveqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6594 { 1404 /* pveqv.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6595 { 1404 /* pveqv.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6596 { 1413 /* pveqv.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6597 { 1413 /* pveqv.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6598 { 1896 /* pvor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6599 { 1896 /* pvor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6600 { 1901 /* pvor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6601 { 1901 /* pvor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6602 { 1909 /* pvor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6603 { 1909 /* pvor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6604 { 2214 /* pvxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6605 { 2214 /* pvxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6606 { 2220 /* pvxor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6607 { 2220 /* pvxor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6608 { 2229 /* pvxor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6609 { 2229 /* pvxor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6610 { 2246 /* shm.b */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6611 { 2246 /* shm.b */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6612 { 2252 /* shm.h */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6613 { 2252 /* shm.h */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6614 { 2258 /* shm.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6615 { 2258 /* shm.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6616 { 2264 /* shm.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6617 { 2264 /* shm.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6618 { 2274 /* sla.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6619 { 2274 /* sla.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6620 { 2280 /* sla.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6621 { 2280 /* sla.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6622 { 2289 /* sla.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6623 { 2289 /* sla.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6624 { 2298 /* sld */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6625 { 2298 /* sld */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6626 { 2302 /* sll */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6627 { 2302 /* sll */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6628 { 2320 /* sra.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6629 { 2320 /* sra.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6630 { 2326 /* sra.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6631 { 2326 /* sra.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6632 { 2335 /* sra.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6633 { 2335 /* sra.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6634 { 2344 /* srd */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6635 { 2344 /* srd */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6636 { 2348 /* srl */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6637 { 2348 /* srl */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6638 { 2352 /* st */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6639 { 2352 /* st */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6640 { 2352 /* st */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6641 { 2352 /* st */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6642 { 2355 /* st1b */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6643 { 2355 /* st1b */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6644 { 2355 /* st1b */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6645 { 2355 /* st1b */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6646 { 2360 /* st2b */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6647 { 2360 /* st2b */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6648 { 2360 /* st2b */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6649 { 2360 /* st2b */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6650 { 2365 /* stl */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6651 { 2365 /* stl */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6652 { 2365 /* stl */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6653 { 2365 /* stl */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6654 { 2369 /* stu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
6655 { 2369 /* stu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
6656 { 2369 /* stu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
6657 { 2369 /* stu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
6658 { 2373 /* subs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6659 { 2373 /* subs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6660 { 2380 /* subs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6661 { 2380 /* subs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6662 { 2390 /* subs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6663 { 2390 /* subs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6664 { 2400 /* subu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6665 { 2400 /* subu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6666 { 2407 /* subu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6667 { 2407 /* subu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6668 { 2432 /* ts1am.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6669 { 2432 /* ts1am.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6670 { 2432 /* ts1am.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6671 { 2432 /* ts1am.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6672 { 2440 /* ts1am.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6673 { 2440 /* ts1am.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6674 { 2440 /* ts1am.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6675 { 2440 /* ts1am.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6676 { 2448 /* ts2am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6677 { 2448 /* ts2am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6678 { 2448 /* ts2am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6679 { 2448 /* ts2am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6680 { 2454 /* ts3am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6681 { 2454 /* ts3am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6682 { 2454 /* ts3am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6683 { 2454 /* ts3am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6684 { 2492 /* vand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6685 { 2492 /* vand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6686 { 2698 /* veqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6687 { 2698 /* veqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6688 { 3450 /* vor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6689 { 3450 /* vor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6690 { 3783 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
6691 { 3783 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
6692 { 3783 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
6693 { 3783 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
6694 { 4109 /* vxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6695 { 4109 /* vxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
6696 { 4114 /* xor */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6697 { 4114 /* xor */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6698};
6699
6700ParseStatus VEAsmParser::
6701tryCustomParseOperand(OperandVector &Operands,
6702 unsigned MCK) {
6703
6704 switch(MCK) {
6705 case MCK_MImm:
6706 return parseMImmOperand(Operands);
6707 case MCK_MEMri:
6708 return parseMEMAsOperand(Operands);
6709 case MCK_MEMrii:
6710 return parseMEMOperand(Operands);
6711 case MCK_MEMrri:
6712 return parseMEMOperand(Operands);
6713 case MCK_MEMzi:
6714 return parseMEMAsOperand(Operands);
6715 case MCK_MEMzii:
6716 return parseMEMOperand(Operands);
6717 case MCK_MEMzri:
6718 return parseMEMOperand(Operands);
6719 default:
6720 return ParseStatus::NoMatch;
6721 }
6722 return ParseStatus::NoMatch;
6723}
6724
6725ParseStatus VEAsmParser::
6726MatchOperandParserImpl(OperandVector &Operands,
6727 StringRef Mnemonic,
6728 bool ParseForAllFeatures) {
6729 // Get the current feature set.
6730 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
6731
6732 // Get the next operand index.
6733 unsigned NextOpNum = Operands.size() - 1;
6734 // Search the table.
6735 auto MnemonicRange =
6736 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
6737 Mnemonic, LessOpcodeOperand());
6738
6739 if (MnemonicRange.first == MnemonicRange.second)
6740 return ParseStatus::NoMatch;
6741
6742 for (const OperandMatchEntry *it = MnemonicRange.first,
6743 *ie = MnemonicRange.second; it != ie; ++it) {
6744 // equal_range guarantees that instruction mnemonic matches.
6745 assert(Mnemonic == it->getMnemonic());
6746
6747 // check if the available features match
6748 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
6749 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures)
6750 continue;
6751
6752 // check if the operand in question has a custom parser.
6753 if (!(it->OperandMask & (1 << NextOpNum)))
6754 continue;
6755
6756 // call custom parse method to handle the operand
6757 ParseStatus Result = tryCustomParseOperand(Operands, it->Class);
6758 if (!Result.isNoMatch())
6759 return Result;
6760 }
6761
6762 // Okay, we had no match.
6763 return ParseStatus::NoMatch;
6764}
6765
6766#endif // GET_MATCHER_IMPLEMENTATION
6767
6768
6769#ifdef GET_MNEMONIC_SPELL_CHECKER
6770#undef GET_MNEMONIC_SPELL_CHECKER
6771
6772static std::string VEMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
6773 const unsigned MaxEditDist = 2;
6774 std::vector<StringRef> Candidates;
6775 StringRef Prev = "";
6776
6777 // Find the appropriate table for this asm variant.
6778 const MatchEntry *Start, *End;
6779 switch (VariantID) {
6780 default: llvm_unreachable("invalid variant!");
6781 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
6782 }
6783
6784 for (auto I = Start; I < End; I++) {
6785 // Ignore unsupported instructions.
6786 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
6787 if ((FBS & RequiredFeatures) != RequiredFeatures)
6788 continue;
6789
6790 StringRef T = I->getMnemonic();
6791 // Avoid recomputing the edit distance for the same string.
6792 if (T == Prev)
6793 continue;
6794
6795 Prev = T;
6796 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
6797 if (Dist <= MaxEditDist)
6798 Candidates.push_back(T);
6799 }
6800
6801 if (Candidates.empty())
6802 return "";
6803
6804 std::string Res = ", did you mean: ";
6805 unsigned i = 0;
6806 for (; i < Candidates.size() - 1; i++)
6807 Res += Candidates[i].str() + ", ";
6808 return Res + Candidates[i].str() + "?";
6809}
6810
6811#endif // GET_MNEMONIC_SPELL_CHECKER
6812
6813
6814#ifdef GET_MNEMONIC_CHECKER
6815#undef GET_MNEMONIC_CHECKER
6816
6817static bool VECheckMnemonic(StringRef Mnemonic,
6818 const FeatureBitset &AvailableFeatures,
6819 unsigned VariantID) {
6820 // Process all MnemonicAliases to remap the mnemonic.
6821 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
6822
6823 // Find the appropriate table for this asm variant.
6824 const MatchEntry *Start, *End;
6825 switch (VariantID) {
6826 default: llvm_unreachable("invalid variant!");
6827 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
6828 }
6829
6830 // Search the table.
6831 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
6832
6833 if (MnemonicRange.first == MnemonicRange.second)
6834 return false;
6835
6836 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
6837 it != ie; ++it) {
6838 const FeatureBitset &RequiredFeatures =
6839 FeatureBitsets[it->RequiredFeaturesIdx];
6840 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
6841 return true;
6842 }
6843 return false;
6844}
6845
6846#endif // GET_MNEMONIC_CHECKER
6847
6848