1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Exegesis Tables *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | |
10 | static const char *X86PfmCounterNames[] = { |
11 | "BRANCH-MISSES" , // 0 |
12 | "DTLB-LOAD-MISSES" , // 1 |
13 | "DTLB_LOAD_MISSES:MISS_CAUSES_A_WALK" , // 2 |
14 | "DTLB_STORE_MISSES:MISS_CAUSES_A_WALK" , // 3 |
15 | "INSTRUCTIONS_RETIRED" , // 4 |
16 | "ITLB-LOAD-MISSES" , // 5 |
17 | "ITLB_MISSES:MISS_CAUSES_A_WALK" , // 6 |
18 | "L1-DCACHE-LOAD-MISSES" , // 7 |
19 | "L1-DCACHE-STORE-MISSES" , // 8 |
20 | "L1-ICACHE-LOAD-MISSES" , // 9 |
21 | "MEM_LOAD_UOPS_RETIRED:L1_MISS" , // 10 |
22 | "RETIRED_INSTRUCTIONS" , // 11 |
23 | "cpu_clk_unhalted" , // 12 |
24 | "cycles_not_in_halt" , // 13 |
25 | "dispatched_fpu:pipe0" , // 14 |
26 | "dispatched_fpu:pipe1" , // 15 |
27 | "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0" , // 16 |
28 | "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1" , // 17 |
29 | "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2" , // 18 |
30 | "dispatched_fpu_ops:ops_pipe3 + dispatched_fpu_ops:ops_dual_pipe3" , // 19 |
31 | "div_op_count" , // 20 |
32 | "fpu_pipe_assignment:total0" , // 21 |
33 | "fpu_pipe_assignment:total1" , // 22 |
34 | "fpu_pipe_assignment:total2" , // 23 |
35 | "fpu_pipe_assignment:total3" , // 24 |
36 | "ls_dispatch:ld_dispatch" , // 25 |
37 | "ls_dispatch:ld_st_dispatch + ls_dispatch:ld_dispatch + ls_dispatch:store_dispatch" , // 26 |
38 | "ls_dispatch:store_dispatch" , // 27 |
39 | "mem_uop_retired:any_ld + mem_uop_retired:any_st" , // 28 |
40 | "ops_type_dispatched_from_decoder:fp_disp_retire_mode" , // 29 |
41 | "ops_type_dispatched_from_decoder:int_disp_retire_mode" , // 30 |
42 | "retired_ops" , // 31 |
43 | "retired_uops" , // 32 |
44 | "rs_uops_dispatched_cycles:port_0" , // 33 |
45 | "rs_uops_dispatched_cycles:port_1" , // 34 |
46 | "rs_uops_dispatched_cycles:port_2 + rs_uops_dispatched_cycles:port_3" , // 35 |
47 | "rs_uops_dispatched_cycles:port_4" , // 36 |
48 | "rs_uops_dispatched_cycles:port_5" , // 37 |
49 | "unhalted_core_cycles" , // 38 |
50 | "uops_dispatched:alu" , // 39 |
51 | "uops_dispatched:int_eu_all" , // 40 |
52 | "uops_dispatched:jmp" , // 41 |
53 | "uops_dispatched:load" , // 42 |
54 | "uops_dispatched:port_0" , // 43 |
55 | "uops_dispatched:port_1" , // 44 |
56 | "uops_dispatched:port_2_3" , // 45 |
57 | "uops_dispatched:port_2_3_10" , // 46 |
58 | "uops_dispatched:port_4_9" , // 47 |
59 | "uops_dispatched:port_5" , // 48 |
60 | "uops_dispatched:port_5_11" , // 49 |
61 | "uops_dispatched:port_6" , // 50 |
62 | "uops_dispatched:port_7_8" , // 51 |
63 | "uops_dispatched:shift" , // 52 |
64 | "uops_dispatched:sta" , // 53 |
65 | "uops_dispatched:std" , // 54 |
66 | "uops_dispatched_port:port_0" , // 55 |
67 | "uops_dispatched_port:port_1" , // 56 |
68 | "uops_dispatched_port:port_2" , // 57 |
69 | "uops_dispatched_port:port_2 + uops_dispatched_port:port_3" , // 58 |
70 | "uops_dispatched_port:port_3" , // 59 |
71 | "uops_dispatched_port:port_4" , // 60 |
72 | "uops_dispatched_port:port_5" , // 61 |
73 | "uops_dispatched_port:port_6" , // 62 |
74 | "uops_dispatched_port:port_7" , // 63 |
75 | "uops_executed:port0" , // 64 |
76 | "uops_executed:port1" , // 65 |
77 | "uops_executed:port2_core + uops_executed:port3_core" , // 66 |
78 | "uops_executed:port4_core" , // 67 |
79 | "uops_executed:port5" , // 68 |
80 | "uops_executed_port:port_0" , // 69 |
81 | "uops_executed_port:port_1" , // 70 |
82 | "uops_executed_port:port_2" , // 71 |
83 | "uops_executed_port:port_3" , // 72 |
84 | "uops_executed_port:port_4" , // 73 |
85 | "uops_executed_port:port_5" , // 74 |
86 | "uops_executed_port:port_6" , // 75 |
87 | "uops_executed_port:port_7" , // 76 |
88 | "uops_issued:any" , // 77 |
89 | "uops_retired" , // 78 |
90 | "uops_retired:all" , // 79 |
91 | "uops_retired:any" , // 80 |
92 | }; |
93 | |
94 | static const PfmCountersInfo::IssueCounter X86PfmIssueCounters[] = { |
95 | { .Counter: X86PfmCounterNames[43], .ProcResName: "ADLPPort00" }, |
96 | { .Counter: X86PfmCounterNames[44], .ProcResName: "ADLPPort01" }, |
97 | { .Counter: X86PfmCounterNames[46], .ProcResName: "ADLPPort02_03_10" }, |
98 | { .Counter: X86PfmCounterNames[47], .ProcResName: "ADLPPort04_09" }, |
99 | { .Counter: X86PfmCounterNames[49], .ProcResName: "ADLPPort05_11" }, |
100 | { .Counter: X86PfmCounterNames[50], .ProcResName: "ADLPPort06" }, |
101 | { .Counter: X86PfmCounterNames[51], .ProcResName: "ADLPPort07_08" }, |
102 | { .Counter: X86PfmCounterNames[16], .ProcResName: "PdFPU0" }, |
103 | { .Counter: X86PfmCounterNames[17], .ProcResName: "PdFPU1" }, |
104 | { .Counter: X86PfmCounterNames[18], .ProcResName: "PdFPU2" }, |
105 | { .Counter: X86PfmCounterNames[19], .ProcResName: "PdFPU3" }, |
106 | { .Counter: X86PfmCounterNames[16], .ProcResName: "SrFPU0" }, |
107 | { .Counter: X86PfmCounterNames[17], .ProcResName: "SrFPU1" }, |
108 | { .Counter: X86PfmCounterNames[18], .ProcResName: "SrFPU2" }, |
109 | { .Counter: X86PfmCounterNames[69], .ProcResName: "BWPort0" }, |
110 | { .Counter: X86PfmCounterNames[70], .ProcResName: "BWPort1" }, |
111 | { .Counter: X86PfmCounterNames[71], .ProcResName: "BWPort2" }, |
112 | { .Counter: X86PfmCounterNames[72], .ProcResName: "BWPort3" }, |
113 | { .Counter: X86PfmCounterNames[73], .ProcResName: "BWPort4" }, |
114 | { .Counter: X86PfmCounterNames[74], .ProcResName: "BWPort5" }, |
115 | { .Counter: X86PfmCounterNames[75], .ProcResName: "BWPort6" }, |
116 | { .Counter: X86PfmCounterNames[76], .ProcResName: "BWPort7" }, |
117 | { .Counter: X86PfmCounterNames[14], .ProcResName: "BtFPU0" }, |
118 | { .Counter: X86PfmCounterNames[15], .ProcResName: "BtFPU1" }, |
119 | { .Counter: X86PfmCounterNames[14], .ProcResName: "JFPU0" }, |
120 | { .Counter: X86PfmCounterNames[15], .ProcResName: "JFPU1" }, |
121 | { .Counter: X86PfmCounterNames[33], .ProcResName: "SBPort0" }, |
122 | { .Counter: X86PfmCounterNames[34], .ProcResName: "SBPort1" }, |
123 | { .Counter: X86PfmCounterNames[35], .ProcResName: "SBPort23" }, |
124 | { .Counter: X86PfmCounterNames[36], .ProcResName: "SBPort4" }, |
125 | { .Counter: X86PfmCounterNames[37], .ProcResName: "SBPort5" }, |
126 | { .Counter: X86PfmCounterNames[69], .ProcResName: "HWPort0" }, |
127 | { .Counter: X86PfmCounterNames[70], .ProcResName: "HWPort1" }, |
128 | { .Counter: X86PfmCounterNames[71], .ProcResName: "HWPort2" }, |
129 | { .Counter: X86PfmCounterNames[72], .ProcResName: "HWPort3" }, |
130 | { .Counter: X86PfmCounterNames[73], .ProcResName: "HWPort4" }, |
131 | { .Counter: X86PfmCounterNames[74], .ProcResName: "HWPort5" }, |
132 | { .Counter: X86PfmCounterNames[75], .ProcResName: "HWPort6" }, |
133 | { .Counter: X86PfmCounterNames[76], .ProcResName: "HWPort7" }, |
134 | { .Counter: X86PfmCounterNames[43], .ProcResName: "ICXPort0" }, |
135 | { .Counter: X86PfmCounterNames[44], .ProcResName: "ICXPort1" }, |
136 | { .Counter: X86PfmCounterNames[45], .ProcResName: "ICXPort23" }, |
137 | { .Counter: X86PfmCounterNames[47], .ProcResName: "ICXPort49" }, |
138 | { .Counter: X86PfmCounterNames[48], .ProcResName: "ICXPort5" }, |
139 | { .Counter: X86PfmCounterNames[50], .ProcResName: "ICXPort6" }, |
140 | { .Counter: X86PfmCounterNames[51], .ProcResName: "ICXPort78" }, |
141 | { .Counter: X86PfmCounterNames[39], .ProcResName: "LNLPVPort02_03" }, |
142 | { .Counter: X86PfmCounterNames[40], .ProcResName: "LNLPPort00_01_02_03_04_05" }, |
143 | { .Counter: X86PfmCounterNames[41], .ProcResName: "LNLPPort00_02_04" }, |
144 | { .Counter: X86PfmCounterNames[42], .ProcResName: "LNLPPort20_21_22" }, |
145 | { .Counter: X86PfmCounterNames[52], .ProcResName: "LNLPPort01_03_05" }, |
146 | { .Counter: X86PfmCounterNames[53], .ProcResName: "LNLPPort25_26_27" }, |
147 | { .Counter: X86PfmCounterNames[54], .ProcResName: "LNLPPort10_11" }, |
148 | { .Counter: X86PfmCounterNames[64], .ProcResName: "SBPort0" }, |
149 | { .Counter: X86PfmCounterNames[65], .ProcResName: "SBPort1" }, |
150 | { .Counter: X86PfmCounterNames[66], .ProcResName: "SBPort23" }, |
151 | { .Counter: X86PfmCounterNames[67], .ProcResName: "SBPort4" }, |
152 | { .Counter: X86PfmCounterNames[68], .ProcResName: "SBPort5" }, |
153 | { .Counter: X86PfmCounterNames[28], .ProcResName: "SLM_MEC_RSV" }, |
154 | { .Counter: X86PfmCounterNames[55], .ProcResName: "SBPort0" }, |
155 | { .Counter: X86PfmCounterNames[56], .ProcResName: "SBPort1" }, |
156 | { .Counter: X86PfmCounterNames[58], .ProcResName: "SBPort23" }, |
157 | { .Counter: X86PfmCounterNames[60], .ProcResName: "SBPort4" }, |
158 | { .Counter: X86PfmCounterNames[61], .ProcResName: "SBPort5" }, |
159 | { .Counter: X86PfmCounterNames[43], .ProcResName: "SPRPort00" }, |
160 | { .Counter: X86PfmCounterNames[44], .ProcResName: "SPRPort01" }, |
161 | { .Counter: X86PfmCounterNames[46], .ProcResName: "SPRPort02_03_10" }, |
162 | { .Counter: X86PfmCounterNames[47], .ProcResName: "SPRPort04_09" }, |
163 | { .Counter: X86PfmCounterNames[49], .ProcResName: "SPRPort05_11" }, |
164 | { .Counter: X86PfmCounterNames[50], .ProcResName: "SPRPort06" }, |
165 | { .Counter: X86PfmCounterNames[51], .ProcResName: "SPRPort07_08" }, |
166 | { .Counter: X86PfmCounterNames[55], .ProcResName: "SKLPort0" }, |
167 | { .Counter: X86PfmCounterNames[56], .ProcResName: "SKLPort1" }, |
168 | { .Counter: X86PfmCounterNames[57], .ProcResName: "SKLPort2" }, |
169 | { .Counter: X86PfmCounterNames[59], .ProcResName: "SKLPort3" }, |
170 | { .Counter: X86PfmCounterNames[60], .ProcResName: "SKLPort4" }, |
171 | { .Counter: X86PfmCounterNames[61], .ProcResName: "SKLPort5" }, |
172 | { .Counter: X86PfmCounterNames[62], .ProcResName: "SKLPort6" }, |
173 | { .Counter: X86PfmCounterNames[63], .ProcResName: "SKLPort7" }, |
174 | { .Counter: X86PfmCounterNames[55], .ProcResName: "SKXPort0" }, |
175 | { .Counter: X86PfmCounterNames[56], .ProcResName: "SKXPort1" }, |
176 | { .Counter: X86PfmCounterNames[57], .ProcResName: "SKXPort2" }, |
177 | { .Counter: X86PfmCounterNames[59], .ProcResName: "SKXPort3" }, |
178 | { .Counter: X86PfmCounterNames[60], .ProcResName: "SKXPort4" }, |
179 | { .Counter: X86PfmCounterNames[61], .ProcResName: "SKXPort5" }, |
180 | { .Counter: X86PfmCounterNames[62], .ProcResName: "SKXPort6" }, |
181 | { .Counter: X86PfmCounterNames[63], .ProcResName: "SKXPort7" }, |
182 | { .Counter: X86PfmCounterNames[21], .ProcResName: "ZnFPU0" }, |
183 | { .Counter: X86PfmCounterNames[22], .ProcResName: "ZnFPU1" }, |
184 | { .Counter: X86PfmCounterNames[23], .ProcResName: "ZnFPU2" }, |
185 | { .Counter: X86PfmCounterNames[24], .ProcResName: "ZnFPU3" }, |
186 | { .Counter: X86PfmCounterNames[26], .ProcResName: "ZnAGU" }, |
187 | { .Counter: X86PfmCounterNames[20], .ProcResName: "ZnDivider" }, |
188 | { .Counter: X86PfmCounterNames[26], .ProcResName: "Zn2AGU" }, |
189 | { .Counter: X86PfmCounterNames[20], .ProcResName: "Zn2Divider" }, |
190 | { .Counter: X86PfmCounterNames[30], .ProcResName: "Zn3Int" }, |
191 | { .Counter: X86PfmCounterNames[29], .ProcResName: "Zn3FPU" }, |
192 | { .Counter: X86PfmCounterNames[25], .ProcResName: "Zn3Load" }, |
193 | { .Counter: X86PfmCounterNames[27], .ProcResName: "Zn3Store" }, |
194 | { .Counter: X86PfmCounterNames[20], .ProcResName: "Zn3Divider" }, |
195 | { .Counter: X86PfmCounterNames[30], .ProcResName: "Zn4Int" }, |
196 | { .Counter: X86PfmCounterNames[29], .ProcResName: "Zn4FPU" }, |
197 | { .Counter: X86PfmCounterNames[25], .ProcResName: "Zn4Load" }, |
198 | { .Counter: X86PfmCounterNames[27], .ProcResName: "Zn4Store" }, |
199 | { .Counter: X86PfmCounterNames[20], .ProcResName: "Zn4Divider" }, |
200 | { .Counter: X86PfmCounterNames[26], .ProcResName: "Zn4AGU" }, |
201 | }; |
202 | |
203 | static const std::pair<ValidationEvent, const char*> X86AlderLakePfmCountersValidationCounters[] = { |
204 | { InstructionRetired, X86PfmCounterNames[4]}, |
205 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
206 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
207 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
208 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
209 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
210 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
211 | }; |
212 | |
213 | static const PfmCountersInfo X86AlderLakePfmCounters = { |
214 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
215 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
216 | .IssueCounters: X86PfmIssueCounters + 0, .NumIssueCounters: 7, // Issue counters. |
217 | .ValidationEvents: X86AlderLakePfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
218 | }; |
219 | |
220 | static const PfmCountersInfo X86AtomPfmCounters = { |
221 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
222 | .UopsCounter: X86PfmCounterNames[80], // Uops counter |
223 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
224 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
225 | }; |
226 | |
227 | static const PfmCountersInfo X86BdVer2PfmCounters = { |
228 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
229 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
230 | .IssueCounters: X86PfmIssueCounters + 7, .NumIssueCounters: 4, // Issue counters. |
231 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
232 | }; |
233 | |
234 | static const PfmCountersInfo X86BdVer3PfmCounters = { |
235 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
236 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
237 | .IssueCounters: X86PfmIssueCounters + 11, .NumIssueCounters: 3, // Issue counters. |
238 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
239 | }; |
240 | |
241 | static const std::pair<ValidationEvent, const char*> X86BroadwellPfmCountersValidationCounters[] = { |
242 | { InstructionRetired, X86PfmCounterNames[4]}, |
243 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
244 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
245 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
246 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
247 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
248 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
249 | }; |
250 | |
251 | static const PfmCountersInfo X86BroadwellPfmCounters = { |
252 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
253 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
254 | .IssueCounters: X86PfmIssueCounters + 14, .NumIssueCounters: 8, // Issue counters. |
255 | .ValidationEvents: X86BroadwellPfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
256 | }; |
257 | |
258 | static const PfmCountersInfo X86BtVer1PfmCounters = { |
259 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
260 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
261 | .IssueCounters: X86PfmIssueCounters + 22, .NumIssueCounters: 2, // Issue counters. |
262 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
263 | }; |
264 | |
265 | static const PfmCountersInfo X86BtVer2PfmCounters = { |
266 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
267 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
268 | .IssueCounters: X86PfmIssueCounters + 24, .NumIssueCounters: 2, // Issue counters. |
269 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
270 | }; |
271 | |
272 | static const PfmCountersInfo X86Core2PfmCounters = { |
273 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
274 | .UopsCounter: X86PfmCounterNames[80], // Uops counter |
275 | .IssueCounters: X86PfmIssueCounters + 26, .NumIssueCounters: 5, // Issue counters. |
276 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
277 | }; |
278 | |
279 | static const PfmCountersInfo X86CorePfmCounters = { |
280 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
281 | .UopsCounter: X86PfmCounterNames[80], // Uops counter |
282 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
283 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
284 | }; |
285 | |
286 | static const PfmCountersInfo X86DefaultAMDPfmCounters = { |
287 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
288 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
289 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
290 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
291 | }; |
292 | |
293 | static const PfmCountersInfo X86DefaultPfmCounters = { |
294 | .CycleCounter: nullptr, // No cycle counter. |
295 | .UopsCounter: nullptr, // No uops counter. |
296 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
297 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
298 | }; |
299 | |
300 | static const std::pair<ValidationEvent, const char*> X86HaswellPfmCountersValidationCounters[] = { |
301 | { InstructionRetired, X86PfmCounterNames[4]}, |
302 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
303 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
304 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
305 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
306 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
307 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
308 | }; |
309 | |
310 | static const PfmCountersInfo X86HaswellPfmCounters = { |
311 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
312 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
313 | .IssueCounters: X86PfmIssueCounters + 31, .NumIssueCounters: 8, // Issue counters. |
314 | .ValidationEvents: X86HaswellPfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
315 | }; |
316 | |
317 | static const std::pair<ValidationEvent, const char*> X86IceLakePfmCountersValidationCounters[] = { |
318 | { InstructionRetired, X86PfmCounterNames[4]}, |
319 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
320 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
321 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
322 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
323 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
324 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
325 | }; |
326 | |
327 | static const PfmCountersInfo X86IceLakePfmCounters = { |
328 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
329 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
330 | .IssueCounters: X86PfmIssueCounters + 39, .NumIssueCounters: 7, // Issue counters. |
331 | .ValidationEvents: X86IceLakePfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
332 | }; |
333 | |
334 | static const PfmCountersInfo X86KnightPfmCounters = { |
335 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
336 | .UopsCounter: X86PfmCounterNames[79], // Uops counter |
337 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
338 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
339 | }; |
340 | |
341 | static const std::pair<ValidationEvent, const char*> X86LunarLakePfmCountersValidationCounters[] = { |
342 | { InstructionRetired, X86PfmCounterNames[4]}, |
343 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
344 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
345 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
346 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
347 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
348 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
349 | }; |
350 | |
351 | static const PfmCountersInfo X86LunarLakePfmCounters = { |
352 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
353 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
354 | .IssueCounters: X86PfmIssueCounters + 46, .NumIssueCounters: 7, // Issue counters. |
355 | .ValidationEvents: X86LunarLakePfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
356 | }; |
357 | |
358 | static const PfmCountersInfo X86NehalemPfmCounters = { |
359 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
360 | .UopsCounter: X86PfmCounterNames[80], // Uops counter |
361 | .IssueCounters: X86PfmIssueCounters + 53, .NumIssueCounters: 5, // Issue counters. |
362 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
363 | }; |
364 | |
365 | static const PfmCountersInfo X86PentiumPfmCounters = { |
366 | .CycleCounter: X86PfmCounterNames[12], // Cycle counter |
367 | .UopsCounter: X86PfmCounterNames[78], // Uops counter |
368 | .IssueCounters: nullptr, .NumIssueCounters: 0, // No issue counters |
369 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
370 | }; |
371 | |
372 | static const PfmCountersInfo X86SLMPfmCounters = { |
373 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
374 | .UopsCounter: X86PfmCounterNames[80], // Uops counter |
375 | .IssueCounters: X86PfmIssueCounters + 58, .NumIssueCounters: 1, // Issue counters. |
376 | .ValidationEvents: nullptr, .NumValidationEvents: 0 // No validation counters. |
377 | }; |
378 | |
379 | static const std::pair<ValidationEvent, const char*> X86SandyBridgePfmCountersValidationCounters[] = { |
380 | { InstructionRetired, X86PfmCounterNames[4]}, |
381 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
382 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
383 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
384 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
385 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
386 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
387 | }; |
388 | |
389 | static const PfmCountersInfo X86SandyBridgePfmCounters = { |
390 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
391 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
392 | .IssueCounters: X86PfmIssueCounters + 59, .NumIssueCounters: 5, // Issue counters. |
393 | .ValidationEvents: X86SandyBridgePfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
394 | }; |
395 | |
396 | static const std::pair<ValidationEvent, const char*> X86SapphireRapidsPfmCountersValidationCounters[] = { |
397 | { InstructionRetired, X86PfmCounterNames[4]}, |
398 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
399 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
400 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
401 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
402 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
403 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
404 | }; |
405 | |
406 | static const PfmCountersInfo X86SapphireRapidsPfmCounters = { |
407 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
408 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
409 | .IssueCounters: X86PfmIssueCounters + 64, .NumIssueCounters: 7, // Issue counters. |
410 | .ValidationEvents: X86SapphireRapidsPfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
411 | }; |
412 | |
413 | static const std::pair<ValidationEvent, const char*> X86SkylakeClientPfmCountersValidationCounters[] = { |
414 | { InstructionRetired, X86PfmCounterNames[4]}, |
415 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
416 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
417 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
418 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
419 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
420 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
421 | }; |
422 | |
423 | static const PfmCountersInfo X86SkylakeClientPfmCounters = { |
424 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
425 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
426 | .IssueCounters: X86PfmIssueCounters + 71, .NumIssueCounters: 8, // Issue counters. |
427 | .ValidationEvents: X86SkylakeClientPfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
428 | }; |
429 | |
430 | static const std::pair<ValidationEvent, const char*> X86SkylakeServerPfmCountersValidationCounters[] = { |
431 | { InstructionRetired, X86PfmCounterNames[4]}, |
432 | { L1DCacheLoadMiss, X86PfmCounterNames[10]}, |
433 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
434 | { DataTLBLoadMiss, X86PfmCounterNames[2]}, |
435 | { DataTLBStoreMiss, X86PfmCounterNames[3]}, |
436 | { InstructionTLBLoadMiss, X86PfmCounterNames[6]}, |
437 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
438 | }; |
439 | |
440 | static const PfmCountersInfo X86SkylakeServerPfmCounters = { |
441 | .CycleCounter: X86PfmCounterNames[38], // Cycle counter |
442 | .UopsCounter: X86PfmCounterNames[77], // Uops counter |
443 | .IssueCounters: X86PfmIssueCounters + 79, .NumIssueCounters: 8, // Issue counters. |
444 | .ValidationEvents: X86SkylakeServerPfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
445 | }; |
446 | |
447 | static const std::pair<ValidationEvent, const char*> X86ZnVer1PfmCountersValidationCounters[] = { |
448 | { InstructionRetired, X86PfmCounterNames[11]}, |
449 | { L1DCacheLoadMiss, X86PfmCounterNames[7]}, |
450 | { L1DCacheStoreMiss, X86PfmCounterNames[8]}, |
451 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
452 | { DataTLBLoadMiss, X86PfmCounterNames[1]}, |
453 | { InstructionTLBLoadMiss, X86PfmCounterNames[5]}, |
454 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
455 | }; |
456 | |
457 | static const PfmCountersInfo X86ZnVer1PfmCounters = { |
458 | .CycleCounter: X86PfmCounterNames[13], // Cycle counter |
459 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
460 | .IssueCounters: X86PfmIssueCounters + 87, .NumIssueCounters: 6, // Issue counters. |
461 | .ValidationEvents: X86ZnVer1PfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
462 | }; |
463 | |
464 | static const std::pair<ValidationEvent, const char*> X86ZnVer2PfmCountersValidationCounters[] = { |
465 | { InstructionRetired, X86PfmCounterNames[11]}, |
466 | { L1DCacheLoadMiss, X86PfmCounterNames[7]}, |
467 | { L1DCacheStoreMiss, X86PfmCounterNames[8]}, |
468 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
469 | { DataTLBLoadMiss, X86PfmCounterNames[1]}, |
470 | { InstructionTLBLoadMiss, X86PfmCounterNames[5]}, |
471 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
472 | }; |
473 | |
474 | static const PfmCountersInfo X86ZnVer2PfmCounters = { |
475 | .CycleCounter: X86PfmCounterNames[13], // Cycle counter |
476 | .UopsCounter: X86PfmCounterNames[32], // Uops counter |
477 | .IssueCounters: X86PfmIssueCounters + 93, .NumIssueCounters: 2, // Issue counters. |
478 | .ValidationEvents: X86ZnVer2PfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
479 | }; |
480 | |
481 | static const std::pair<ValidationEvent, const char*> X86ZnVer3PfmCountersValidationCounters[] = { |
482 | { InstructionRetired, X86PfmCounterNames[11]}, |
483 | { L1DCacheLoadMiss, X86PfmCounterNames[7]}, |
484 | { L1DCacheStoreMiss, X86PfmCounterNames[8]}, |
485 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
486 | { DataTLBLoadMiss, X86PfmCounterNames[1]}, |
487 | { InstructionTLBLoadMiss, X86PfmCounterNames[5]}, |
488 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
489 | }; |
490 | |
491 | static const PfmCountersInfo X86ZnVer3PfmCounters = { |
492 | .CycleCounter: X86PfmCounterNames[13], // Cycle counter |
493 | .UopsCounter: X86PfmCounterNames[31], // Uops counter |
494 | .IssueCounters: X86PfmIssueCounters + 95, .NumIssueCounters: 5, // Issue counters. |
495 | .ValidationEvents: X86ZnVer3PfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
496 | }; |
497 | |
498 | static const std::pair<ValidationEvent, const char*> X86ZnVer4PfmCountersValidationCounters[] = { |
499 | { InstructionRetired, X86PfmCounterNames[11]}, |
500 | { L1DCacheLoadMiss, X86PfmCounterNames[7]}, |
501 | { L1DCacheStoreMiss, X86PfmCounterNames[8]}, |
502 | { L1ICacheLoadMiss, X86PfmCounterNames[9]}, |
503 | { DataTLBLoadMiss, X86PfmCounterNames[1]}, |
504 | { InstructionTLBLoadMiss, X86PfmCounterNames[5]}, |
505 | { BranchPredictionMiss, X86PfmCounterNames[0]}, |
506 | }; |
507 | |
508 | static const PfmCountersInfo X86ZnVer4PfmCounters = { |
509 | .CycleCounter: X86PfmCounterNames[13], // Cycle counter |
510 | .UopsCounter: X86PfmCounterNames[31], // Uops counter |
511 | .IssueCounters: X86PfmIssueCounters + 100, .NumIssueCounters: 6, // Issue counters. |
512 | .ValidationEvents: X86ZnVer4PfmCountersValidationCounters, .NumValidationEvents: 7 // Validation counters. |
513 | }; |
514 | |
515 | // Sorted (by CpuName) array of pfm counters. |
516 | static const CpuAndPfmCounters X86CpuPfmCounters[] = { |
517 | { .CpuName: "" , .PCI: &X86DefaultPfmCounters }, |
518 | { .CpuName: "alderlake" , .PCI: &X86AlderLakePfmCounters }, |
519 | { .CpuName: "amdfam10" , .PCI: &X86DefaultAMDPfmCounters }, |
520 | { .CpuName: "athlon" , .PCI: &X86DefaultAMDPfmCounters }, |
521 | { .CpuName: "athlon-4" , .PCI: &X86DefaultAMDPfmCounters }, |
522 | { .CpuName: "athlon-fx" , .PCI: &X86DefaultAMDPfmCounters }, |
523 | { .CpuName: "athlon-mp" , .PCI: &X86DefaultAMDPfmCounters }, |
524 | { .CpuName: "athlon-tbird" , .PCI: &X86DefaultAMDPfmCounters }, |
525 | { .CpuName: "athlon-xp" , .PCI: &X86DefaultAMDPfmCounters }, |
526 | { .CpuName: "athlon64" , .PCI: &X86DefaultAMDPfmCounters }, |
527 | { .CpuName: "athlon64-sse3" , .PCI: &X86DefaultAMDPfmCounters }, |
528 | { .CpuName: "atom" , .PCI: &X86AtomPfmCounters }, |
529 | { .CpuName: "barcelona" , .PCI: &X86DefaultAMDPfmCounters }, |
530 | { .CpuName: "bdver1" , .PCI: &X86BdVer2PfmCounters }, |
531 | { .CpuName: "bdver2" , .PCI: &X86BdVer2PfmCounters }, |
532 | { .CpuName: "bdver3" , .PCI: &X86BdVer3PfmCounters }, |
533 | { .CpuName: "bdver4" , .PCI: &X86BdVer3PfmCounters }, |
534 | { .CpuName: "bonnell" , .PCI: &X86AtomPfmCounters }, |
535 | { .CpuName: "broadwell" , .PCI: &X86BroadwellPfmCounters }, |
536 | { .CpuName: "btver1" , .PCI: &X86BtVer1PfmCounters }, |
537 | { .CpuName: "btver2" , .PCI: &X86BtVer2PfmCounters }, |
538 | { .CpuName: "cannonlake" , .PCI: &X86SkylakeServerPfmCounters }, |
539 | { .CpuName: "cascadelake" , .PCI: &X86SkylakeServerPfmCounters }, |
540 | { .CpuName: "core2" , .PCI: &X86Core2PfmCounters }, |
541 | { .CpuName: "corei7" , .PCI: &X86NehalemPfmCounters }, |
542 | { .CpuName: "goldmont" , .PCI: &X86SLMPfmCounters }, |
543 | { .CpuName: "goldmont-plus" , .PCI: &X86SLMPfmCounters }, |
544 | { .CpuName: "haswell" , .PCI: &X86HaswellPfmCounters }, |
545 | { .CpuName: "icelake-client" , .PCI: &X86IceLakePfmCounters }, |
546 | { .CpuName: "icelake-server" , .PCI: &X86IceLakePfmCounters }, |
547 | { .CpuName: "ivybridge" , .PCI: &X86SandyBridgePfmCounters }, |
548 | { .CpuName: "k8" , .PCI: &X86DefaultAMDPfmCounters }, |
549 | { .CpuName: "k8-sse3" , .PCI: &X86DefaultAMDPfmCounters }, |
550 | { .CpuName: "knl" , .PCI: &X86KnightPfmCounters }, |
551 | { .CpuName: "knm" , .PCI: &X86KnightPfmCounters }, |
552 | { .CpuName: "lunarlake" , .PCI: &X86LunarLakePfmCounters }, |
553 | { .CpuName: "nehalem" , .PCI: &X86NehalemPfmCounters }, |
554 | { .CpuName: "opteron" , .PCI: &X86DefaultAMDPfmCounters }, |
555 | { .CpuName: "opteron-sse3" , .PCI: &X86DefaultAMDPfmCounters }, |
556 | { .CpuName: "penryn" , .PCI: &X86Core2PfmCounters }, |
557 | { .CpuName: "pentium-m" , .PCI: &X86PentiumPfmCounters }, |
558 | { .CpuName: "pentium2" , .PCI: &X86PentiumPfmCounters }, |
559 | { .CpuName: "pentium3" , .PCI: &X86PentiumPfmCounters }, |
560 | { .CpuName: "pentium3m" , .PCI: &X86PentiumPfmCounters }, |
561 | { .CpuName: "pentiumpro" , .PCI: &X86PentiumPfmCounters }, |
562 | { .CpuName: "prescott" , .PCI: &X86CorePfmCounters }, |
563 | { .CpuName: "rocketlake" , .PCI: &X86IceLakePfmCounters }, |
564 | { .CpuName: "sandybridge" , .PCI: &X86SandyBridgePfmCounters }, |
565 | { .CpuName: "sapphirerapids" , .PCI: &X86SapphireRapidsPfmCounters }, |
566 | { .CpuName: "silvermont" , .PCI: &X86SLMPfmCounters }, |
567 | { .CpuName: "skylake" , .PCI: &X86SkylakeClientPfmCounters }, |
568 | { .CpuName: "skylake-avx512" , .PCI: &X86SkylakeServerPfmCounters }, |
569 | { .CpuName: "tigerlake" , .PCI: &X86IceLakePfmCounters }, |
570 | { .CpuName: "tremont" , .PCI: &X86SLMPfmCounters }, |
571 | { .CpuName: "westmere" , .PCI: &X86NehalemPfmCounters }, |
572 | { .CpuName: "yonah" , .PCI: &X86CorePfmCounters }, |
573 | { .CpuName: "znver1" , .PCI: &X86ZnVer1PfmCounters }, |
574 | { .CpuName: "znver2" , .PCI: &X86ZnVer2PfmCounters }, |
575 | { .CpuName: "znver3" , .PCI: &X86ZnVer3PfmCounters }, |
576 | { .CpuName: "znver4" , .PCI: &X86ZnVer4PfmCounters }, |
577 | { .CpuName: "znver5" , .PCI: &X86ZnVer4PfmCounters }, |
578 | }; |
579 | |
580 | |