1//===- DLL.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines various types of chunks for the DLL import or export
10// descriptor tables. They are inherently Windows-specific.
11// You need to read Microsoft PE/COFF spec to understand details
12// about the data structures.
13//
14// If you are not particularly interested in linking against Windows
15// DLL, you can skip this file, and you should still be able to
16// understand the rest of the linker.
17//
18//===----------------------------------------------------------------------===//
19
20#include "DLL.h"
21#include "COFFLinkerContext.h"
22#include "Chunks.h"
23#include "SymbolTable.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/Object/COFF.h"
26#include "llvm/Support/Endian.h"
27#include "llvm/Support/Path.h"
28
29using namespace llvm;
30using namespace llvm::object;
31using namespace llvm::support::endian;
32using namespace llvm::COFF;
33
34namespace lld::coff {
35namespace {
36
37// Import table
38
39// A chunk for the import descriptor table.
40class HintNameChunk : public NonSectionChunk {
41public:
42 HintNameChunk(StringRef n, uint16_t h) : name(n), hint(h) {}
43
44 size_t getSize() const override {
45 // Starts with 2 byte Hint field, followed by a null-terminated string,
46 // ends with 0 or 1 byte padding.
47 return alignTo(Value: name.size() + 3, Align: 2);
48 }
49
50 void writeTo(uint8_t *buf) const override {
51 memset(s: buf, c: 0, n: getSize());
52 write16le(P: buf, V: hint);
53 memcpy(dest: buf + 2, src: name.data(), n: name.size());
54 }
55
56private:
57 StringRef name;
58 uint16_t hint;
59};
60
61// A chunk for the import descriptor table.
62class LookupChunk : public NonSectionChunk {
63public:
64 explicit LookupChunk(COFFLinkerContext &ctx, Chunk *c)
65 : hintName(c), ctx(ctx) {
66 setAlignment(ctx.config.wordsize);
67 }
68 size_t getSize() const override { return ctx.config.wordsize; }
69
70 void writeTo(uint8_t *buf) const override {
71 if (ctx.config.is64())
72 write64le(P: buf, V: hintName->getRVA());
73 else
74 write32le(P: buf, V: hintName->getRVA());
75 }
76
77 Chunk *hintName;
78
79private:
80 COFFLinkerContext &ctx;
81};
82
83// A chunk for the import descriptor table.
84// This chunk represent import-by-ordinal symbols.
85// See Microsoft PE/COFF spec 7.1. Import Header for details.
86class OrdinalOnlyChunk : public NonSectionChunk {
87public:
88 explicit OrdinalOnlyChunk(COFFLinkerContext &c, uint16_t v)
89 : ordinal(v), ctx(c) {
90 setAlignment(ctx.config.wordsize);
91 }
92 size_t getSize() const override { return ctx.config.wordsize; }
93
94 void writeTo(uint8_t *buf) const override {
95 // An import-by-ordinal slot has MSB 1 to indicate that
96 // this is import-by-ordinal (and not import-by-name).
97 if (ctx.config.is64()) {
98 write64le(P: buf, V: (1ULL << 63) | ordinal);
99 } else {
100 write32le(P: buf, V: (1ULL << 31) | ordinal);
101 }
102 }
103
104 uint16_t ordinal;
105
106private:
107 COFFLinkerContext &ctx;
108};
109
110// A chunk for the import descriptor table.
111class ImportDirectoryChunk : public NonSectionChunk {
112public:
113 explicit ImportDirectoryChunk(Chunk *n) : dllName(n) { setAlignment(4); }
114 size_t getSize() const override { return sizeof(ImportDirectoryTableEntry); }
115
116 void writeTo(uint8_t *buf) const override {
117 memset(s: buf, c: 0, n: getSize());
118
119 auto *e = (coff_import_directory_table_entry *)(buf);
120 e->ImportLookupTableRVA = lookupTab->getRVA();
121 e->NameRVA = dllName->getRVA();
122 e->ImportAddressTableRVA = addressTab->getRVA();
123 }
124
125 Chunk *dllName;
126 Chunk *lookupTab;
127 Chunk *addressTab;
128};
129
130// A chunk representing null terminator in the import table.
131// Contents of this chunk is always null bytes.
132class NullChunk : public NonSectionChunk {
133public:
134 explicit NullChunk(size_t n, uint32_t align) : size(n) {
135 setAlignment(align);
136 }
137 explicit NullChunk(COFFLinkerContext &ctx)
138 : NullChunk(ctx.config.wordsize, ctx.config.wordsize) {}
139 explicit NullChunk(COFFLinkerContext &ctx, size_t n)
140 : NullChunk(n, ctx.config.wordsize) {}
141 size_t getSize() const override { return size; }
142
143 void writeTo(uint8_t *buf) const override {
144 memset(s: buf, c: 0, n: size);
145 }
146
147private:
148 size_t size;
149};
150
151// A chunk for ARM64EC auxiliary IAT.
152class AuxImportChunk : public NonSectionChunk {
153public:
154 explicit AuxImportChunk(ImportFile *file) : file(file) {
155 setAlignment(sizeof(uint64_t));
156 }
157 size_t getSize() const override { return sizeof(uint64_t); }
158
159 void writeTo(uint8_t *buf) const override {
160 uint64_t impchkVA = 0;
161 if (file->impchkThunk)
162 impchkVA =
163 file->impchkThunk->getRVA() + file->symtab.ctx.config.imageBase;
164 write64le(P: buf, V: impchkVA);
165 }
166
167 void getBaserels(std::vector<Baserel> *res) override {
168 if (file->impchkThunk)
169 res->emplace_back(args&: rva, args&: file->symtab.machine);
170 }
171
172private:
173 ImportFile *file;
174};
175
176static std::vector<std::vector<DefinedImportData *>>
177binImports(COFFLinkerContext &ctx,
178 const std::vector<DefinedImportData *> &imports) {
179 // Group DLL-imported symbols by DLL name because that's how
180 // symbols are laid out in the import descriptor table.
181 auto less = [&ctx](const std::string &a, const std::string &b) {
182 return ctx.config.dllOrder[a] < ctx.config.dllOrder[b];
183 };
184 std::map<std::string, std::vector<DefinedImportData *>, decltype(less)> m(
185 less);
186 for (DefinedImportData *sym : imports)
187 m[sym->getDLLName().lower()].push_back(x: sym);
188
189 std::vector<std::vector<DefinedImportData *>> v;
190 for (auto &kv : m) {
191 // Sort symbols by name for each group.
192 std::vector<DefinedImportData *> &syms = kv.second;
193 llvm::sort(C&: syms, Comp: [](DefinedImportData *a, DefinedImportData *b) {
194 auto getBaseName = [](DefinedImportData *sym) {
195 StringRef name = sym->getName();
196 name.consume_front(Prefix: "__imp_");
197 // Skip aux_ part of ARM64EC function symbol name.
198 if (sym->file->impchkThunk)
199 name.consume_front(Prefix: "aux_");
200 return name;
201 };
202 return getBaseName(a) < getBaseName(b);
203 });
204 v.push_back(x: std::move(syms));
205 }
206 return v;
207}
208
209// See Microsoft PE/COFF spec 4.3 for details.
210
211// A chunk for the delay import descriptor table etnry.
212class DelayDirectoryChunk : public NonSectionChunk {
213public:
214 explicit DelayDirectoryChunk(Chunk *n) : dllName(n) { setAlignment(4); }
215
216 size_t getSize() const override {
217 return sizeof(delay_import_directory_table_entry);
218 }
219
220 void writeTo(uint8_t *buf) const override {
221 memset(s: buf, c: 0, n: getSize());
222
223 auto *e = (delay_import_directory_table_entry *)(buf);
224 e->Attributes = 1;
225 e->Name = dllName->getRVA();
226 e->ModuleHandle = moduleHandle->getRVA();
227 e->DelayImportAddressTable = addressTab->getRVA();
228 e->DelayImportNameTable = nameTab->getRVA();
229 }
230
231 Chunk *dllName;
232 Chunk *moduleHandle;
233 Chunk *addressTab;
234 Chunk *nameTab;
235};
236
237// Initial contents for delay-loaded functions.
238// This code calls __delayLoadHelper2 function to resolve a symbol
239// which then overwrites its jump table slot with the result
240// for subsequent function calls.
241static const uint8_t thunkX64[] = {
242 0x48, 0x8D, 0x05, 0, 0, 0, 0, // lea rax, [__imp_<FUNCNAME>]
243 0xE9, 0, 0, 0, 0, // jmp __tailMerge_<lib>
244};
245
246static const uint8_t tailMergeX64[] = {
247 0x51, // push rcx
248 0x52, // push rdx
249 0x41, 0x50, // push r8
250 0x41, 0x51, // push r9
251 0x48, 0x83, 0xEC, 0x48, // sub rsp, 48h
252 0x66, 0x0F, 0x7F, 0x04, 0x24, // movdqa xmmword ptr [rsp], xmm0
253 0x66, 0x0F, 0x7F, 0x4C, 0x24, 0x10, // movdqa xmmword ptr [rsp+10h], xmm1
254 0x66, 0x0F, 0x7F, 0x54, 0x24, 0x20, // movdqa xmmword ptr [rsp+20h], xmm2
255 0x66, 0x0F, 0x7F, 0x5C, 0x24, 0x30, // movdqa xmmword ptr [rsp+30h], xmm3
256 0x48, 0x8B, 0xD0, // mov rdx, rax
257 0x48, 0x8D, 0x0D, 0, 0, 0, 0, // lea rcx, [___DELAY_IMPORT_...]
258 0xE8, 0, 0, 0, 0, // call __delayLoadHelper2
259 0x66, 0x0F, 0x6F, 0x04, 0x24, // movdqa xmm0, xmmword ptr [rsp]
260 0x66, 0x0F, 0x6F, 0x4C, 0x24, 0x10, // movdqa xmm1, xmmword ptr [rsp+10h]
261 0x66, 0x0F, 0x6F, 0x54, 0x24, 0x20, // movdqa xmm2, xmmword ptr [rsp+20h]
262 0x66, 0x0F, 0x6F, 0x5C, 0x24, 0x30, // movdqa xmm3, xmmword ptr [rsp+30h]
263 0x48, 0x83, 0xC4, 0x48, // add rsp, 48h
264 0x41, 0x59, // pop r9
265 0x41, 0x58, // pop r8
266 0x5A, // pop rdx
267 0x59, // pop rcx
268 0xFF, 0xE0, // jmp rax
269};
270
271static const uint8_t tailMergeUnwindInfoX64[] = {
272 0x01, // Version=1, Flags=UNW_FLAG_NHANDLER
273 0x0a, // Size of prolog
274 0x05, // Count of unwind codes
275 0x00, // No frame register
276 0x0a, 0x82, // Offset 0xa: UWOP_ALLOC_SMALL(0x48)
277 0x06, 0x02, // Offset 6: UWOP_ALLOC_SMALL(8)
278 0x04, 0x02, // Offset 4: UWOP_ALLOC_SMALL(8)
279 0x02, 0x02, // Offset 2: UWOP_ALLOC_SMALL(8)
280 0x01, 0x02, // Offset 1: UWOP_ALLOC_SMALL(8)
281 0x00, 0x00 // Padding to align on 32-bits
282};
283
284static const uint8_t thunkX86[] = {
285 0xB8, 0, 0, 0, 0, // mov eax, offset ___imp__<FUNCNAME>
286 0xE9, 0, 0, 0, 0, // jmp __tailMerge_<lib>
287};
288
289static const uint8_t tailMergeX86[] = {
290 0x51, // push ecx
291 0x52, // push edx
292 0x50, // push eax
293 0x68, 0, 0, 0, 0, // push offset ___DELAY_IMPORT_DESCRIPTOR_<DLLNAME>_dll
294 0xE8, 0, 0, 0, 0, // call ___delayLoadHelper2@8
295 0x5A, // pop edx
296 0x59, // pop ecx
297 0xFF, 0xE0, // jmp eax
298};
299
300static const uint8_t thunkARM[] = {
301 0x40, 0xf2, 0x00, 0x0c, // mov.w ip, #0 __imp_<FUNCNAME>
302 0xc0, 0xf2, 0x00, 0x0c, // mov.t ip, #0 __imp_<FUNCNAME>
303 0x00, 0xf0, 0x00, 0xb8, // b.w __tailMerge_<lib>
304};
305
306static const uint8_t tailMergeARM[] = {
307 0x2d, 0xe9, 0x0f, 0x48, // push.w {r0, r1, r2, r3, r11, lr}
308 0x0d, 0xf2, 0x10, 0x0b, // addw r11, sp, #16
309 0x2d, 0xed, 0x10, 0x0b, // vpush {d0, d1, d2, d3, d4, d5, d6, d7}
310 0x61, 0x46, // mov r1, ip
311 0x40, 0xf2, 0x00, 0x00, // mov.w r0, #0 DELAY_IMPORT_DESCRIPTOR
312 0xc0, 0xf2, 0x00, 0x00, // mov.t r0, #0 DELAY_IMPORT_DESCRIPTOR
313 0x00, 0xf0, 0x00, 0xd0, // bl #0 __delayLoadHelper2
314 0x84, 0x46, // mov ip, r0
315 0xbd, 0xec, 0x10, 0x0b, // vpop {d0, d1, d2, d3, d4, d5, d6, d7}
316 0xbd, 0xe8, 0x0f, 0x48, // pop.w {r0, r1, r2, r3, r11, lr}
317 0x60, 0x47, // bx ip
318};
319
320static const uint8_t thunkARM64[] = {
321 0x11, 0x00, 0x00, 0x90, // adrp x17, #0 __imp_<FUNCNAME>
322 0x31, 0x02, 0x00, 0x91, // add x17, x17, #0 :lo12:__imp_<FUNCNAME>
323 0x00, 0x00, 0x00, 0x14, // b __tailMerge_<lib>
324};
325
326static const uint8_t tailMergeARM64[] = {
327 0xfd, 0x7b, 0xb3, 0xa9, // stp x29, x30, [sp, #-208]!
328 0xfd, 0x03, 0x00, 0x91, // mov x29, sp
329 0xe0, 0x07, 0x01, 0xa9, // stp x0, x1, [sp, #16]
330 0xe2, 0x0f, 0x02, 0xa9, // stp x2, x3, [sp, #32]
331 0xe4, 0x17, 0x03, 0xa9, // stp x4, x5, [sp, #48]
332 0xe6, 0x1f, 0x04, 0xa9, // stp x6, x7, [sp, #64]
333 0xe0, 0x87, 0x02, 0xad, // stp q0, q1, [sp, #80]
334 0xe2, 0x8f, 0x03, 0xad, // stp q2, q3, [sp, #112]
335 0xe4, 0x97, 0x04, 0xad, // stp q4, q5, [sp, #144]
336 0xe6, 0x9f, 0x05, 0xad, // stp q6, q7, [sp, #176]
337 0xe1, 0x03, 0x11, 0xaa, // mov x1, x17
338 0x00, 0x00, 0x00, 0x90, // adrp x0, #0 DELAY_IMPORT_DESCRIPTOR
339 0x00, 0x00, 0x00, 0x91, // add x0, x0, #0 :lo12:DELAY_IMPORT_DESCRIPTOR
340 0x00, 0x00, 0x00, 0x94, // bl #0 __delayLoadHelper2
341 0xf0, 0x03, 0x00, 0xaa, // mov x16, x0
342 0xe6, 0x9f, 0x45, 0xad, // ldp q6, q7, [sp, #176]
343 0xe4, 0x97, 0x44, 0xad, // ldp q4, q5, [sp, #144]
344 0xe2, 0x8f, 0x43, 0xad, // ldp q2, q3, [sp, #112]
345 0xe0, 0x87, 0x42, 0xad, // ldp q0, q1, [sp, #80]
346 0xe6, 0x1f, 0x44, 0xa9, // ldp x6, x7, [sp, #64]
347 0xe4, 0x17, 0x43, 0xa9, // ldp x4, x5, [sp, #48]
348 0xe2, 0x0f, 0x42, 0xa9, // ldp x2, x3, [sp, #32]
349 0xe0, 0x07, 0x41, 0xa9, // ldp x0, x1, [sp, #16]
350 0xfd, 0x7b, 0xcd, 0xa8, // ldp x29, x30, [sp], #208
351 0x00, 0x02, 0x1f, 0xd6, // br x16
352};
353
354// A chunk for the delay import thunk.
355class ThunkChunkX64 : public NonSectionCodeChunk {
356public:
357 ThunkChunkX64(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {}
358
359 size_t getSize() const override { return sizeof(thunkX64); }
360 MachineTypes getMachine() const override { return AMD64; }
361
362 void writeTo(uint8_t *buf) const override {
363 memcpy(dest: buf, src: thunkX64, n: sizeof(thunkX64));
364 write32le(P: buf + 3, V: imp->getRVA() - rva - 7);
365 write32le(P: buf + 8, V: tailMerge->getRVA() - rva - 12);
366 }
367
368 Defined *imp = nullptr;
369 Chunk *tailMerge = nullptr;
370};
371
372class TailMergeChunkX64 : public NonSectionCodeChunk {
373public:
374 TailMergeChunkX64(Chunk *d, Defined *h) : desc(d), helper(h) {}
375
376 size_t getSize() const override { return sizeof(tailMergeX64); }
377 MachineTypes getMachine() const override { return AMD64; }
378
379 void writeTo(uint8_t *buf) const override {
380 memcpy(dest: buf, src: tailMergeX64, n: sizeof(tailMergeX64));
381 write32le(P: buf + 39, V: desc->getRVA() - rva - 43);
382 write32le(P: buf + 44, V: helper->getRVA() - rva - 48);
383 }
384
385 Chunk *desc = nullptr;
386 Defined *helper = nullptr;
387};
388
389class TailMergePDataChunkX64 : public NonSectionChunk {
390public:
391 TailMergePDataChunkX64(Chunk *tm, Chunk *unwind) : tm(tm), unwind(unwind) {
392 // See
393 // https://learn.microsoft.com/en-us/cpp/build/exception-handling-x64#struct-runtime_function
394 setAlignment(4);
395 }
396
397 size_t getSize() const override { return 3 * sizeof(uint32_t); }
398 MachineTypes getMachine() const override { return AMD64; }
399
400 void writeTo(uint8_t *buf) const override {
401 write32le(P: buf + 0, V: tm->getRVA()); // TailMergeChunk start RVA
402 write32le(P: buf + 4, V: tm->getRVA() + tm->getSize()); // TailMergeChunk stop RVA
403 write32le(P: buf + 8, V: unwind->getRVA()); // UnwindInfo RVA
404 }
405
406 Chunk *tm = nullptr;
407 Chunk *unwind = nullptr;
408};
409
410class TailMergeUnwindInfoX64 : public NonSectionChunk {
411public:
412 TailMergeUnwindInfoX64() {
413 // See
414 // https://learn.microsoft.com/en-us/cpp/build/exception-handling-x64#struct-unwind_info
415 setAlignment(4);
416 }
417
418 size_t getSize() const override { return sizeof(tailMergeUnwindInfoX64); }
419 MachineTypes getMachine() const override { return AMD64; }
420
421 void writeTo(uint8_t *buf) const override {
422 memcpy(dest: buf, src: tailMergeUnwindInfoX64, n: sizeof(tailMergeUnwindInfoX64));
423 }
424};
425
426class ThunkChunkX86 : public NonSectionCodeChunk {
427public:
428 ThunkChunkX86(COFFLinkerContext &ctx, Defined *i, Chunk *tm)
429 : imp(i), tailMerge(tm), ctx(ctx) {}
430
431 size_t getSize() const override { return sizeof(thunkX86); }
432 MachineTypes getMachine() const override { return I386; }
433
434 void writeTo(uint8_t *buf) const override {
435 memcpy(dest: buf, src: thunkX86, n: sizeof(thunkX86));
436 write32le(P: buf + 1, V: imp->getRVA() + ctx.config.imageBase);
437 write32le(P: buf + 6, V: tailMerge->getRVA() - rva - 10);
438 }
439
440 void getBaserels(std::vector<Baserel> *res) override {
441 res->emplace_back(args: rva + 1, args: ctx.config.machine);
442 }
443
444 Defined *imp = nullptr;
445 Chunk *tailMerge = nullptr;
446
447private:
448 const COFFLinkerContext &ctx;
449};
450
451class TailMergeChunkX86 : public NonSectionCodeChunk {
452public:
453 TailMergeChunkX86(COFFLinkerContext &ctx, Chunk *d, Defined *h)
454 : desc(d), helper(h), ctx(ctx) {}
455
456 size_t getSize() const override { return sizeof(tailMergeX86); }
457 MachineTypes getMachine() const override { return I386; }
458
459 void writeTo(uint8_t *buf) const override {
460 memcpy(dest: buf, src: tailMergeX86, n: sizeof(tailMergeX86));
461 write32le(P: buf + 4, V: desc->getRVA() + ctx.config.imageBase);
462 write32le(P: buf + 9, V: helper->getRVA() - rva - 13);
463 }
464
465 void getBaserels(std::vector<Baserel> *res) override {
466 res->emplace_back(args: rva + 4, args: ctx.config.machine);
467 }
468
469 Chunk *desc = nullptr;
470 Defined *helper = nullptr;
471
472private:
473 const COFFLinkerContext &ctx;
474};
475
476class ThunkChunkARM : public NonSectionCodeChunk {
477public:
478 ThunkChunkARM(COFFLinkerContext &ctx, Defined *i, Chunk *tm)
479 : imp(i), tailMerge(tm), ctx(ctx) {
480 setAlignment(2);
481 }
482
483 size_t getSize() const override { return sizeof(thunkARM); }
484 MachineTypes getMachine() const override { return ARMNT; }
485
486 void writeTo(uint8_t *buf) const override {
487 memcpy(dest: buf, src: thunkARM, n: sizeof(thunkARM));
488 applyMOV32T(off: buf + 0, v: imp->getRVA() + ctx.config.imageBase);
489 applyBranch24T(off: buf + 8, v: tailMerge->getRVA() - rva - 12);
490 }
491
492 void getBaserels(std::vector<Baserel> *res) override {
493 res->emplace_back(args: rva + 0, args: IMAGE_REL_BASED_ARM_MOV32T);
494 }
495
496 Defined *imp = nullptr;
497 Chunk *tailMerge = nullptr;
498
499private:
500 const COFFLinkerContext &ctx;
501};
502
503class TailMergeChunkARM : public NonSectionCodeChunk {
504public:
505 TailMergeChunkARM(COFFLinkerContext &ctx, Chunk *d, Defined *h)
506 : desc(d), helper(h), ctx(ctx) {
507 setAlignment(2);
508 }
509
510 size_t getSize() const override { return sizeof(tailMergeARM); }
511 MachineTypes getMachine() const override { return ARMNT; }
512
513 void writeTo(uint8_t *buf) const override {
514 memcpy(dest: buf, src: tailMergeARM, n: sizeof(tailMergeARM));
515 applyMOV32T(off: buf + 14, v: desc->getRVA() + ctx.config.imageBase);
516 applyBranch24T(off: buf + 22, v: helper->getRVA() - rva - 26);
517 }
518
519 void getBaserels(std::vector<Baserel> *res) override {
520 res->emplace_back(args: rva + 14, args: IMAGE_REL_BASED_ARM_MOV32T);
521 }
522
523 Chunk *desc = nullptr;
524 Defined *helper = nullptr;
525
526private:
527 const COFFLinkerContext &ctx;
528};
529
530class ThunkChunkARM64 : public NonSectionCodeChunk {
531public:
532 ThunkChunkARM64(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {
533 setAlignment(4);
534 }
535
536 size_t getSize() const override { return sizeof(thunkARM64); }
537 MachineTypes getMachine() const override { return ARM64; }
538
539 void writeTo(uint8_t *buf) const override {
540 memcpy(dest: buf, src: thunkARM64, n: sizeof(thunkARM64));
541 applyArm64Addr(off: buf + 0, s: imp->getRVA(), p: rva + 0, shift: 12);
542 applyArm64Imm(off: buf + 4, imm: imp->getRVA() & 0xfff, rangeLimit: 0);
543 applyArm64Branch26(off: buf + 8, v: tailMerge->getRVA() - rva - 8);
544 }
545
546 Defined *imp = nullptr;
547 Chunk *tailMerge = nullptr;
548};
549
550class TailMergeChunkARM64 : public NonSectionCodeChunk {
551public:
552 TailMergeChunkARM64(Chunk *d, Defined *h) : desc(d), helper(h) {
553 setAlignment(4);
554 }
555
556 size_t getSize() const override { return sizeof(tailMergeARM64); }
557 MachineTypes getMachine() const override { return ARM64; }
558
559 void writeTo(uint8_t *buf) const override {
560 memcpy(dest: buf, src: tailMergeARM64, n: sizeof(tailMergeARM64));
561 applyArm64Addr(off: buf + 44, s: desc->getRVA(), p: rva + 44, shift: 12);
562 applyArm64Imm(off: buf + 48, imm: desc->getRVA() & 0xfff, rangeLimit: 0);
563 if (helper)
564 applyArm64Branch26(off: buf + 52, v: helper->getRVA() - rva - 52);
565 }
566
567 Chunk *desc = nullptr;
568 Defined *helper = nullptr;
569};
570
571// A chunk for the import descriptor table.
572class DelayAddressChunk : public NonSectionChunk {
573public:
574 explicit DelayAddressChunk(COFFLinkerContext &ctx, Chunk *c)
575 : thunk(c), ctx(ctx) {
576 setAlignment(ctx.config.wordsize);
577 }
578 size_t getSize() const override { return ctx.config.wordsize; }
579
580 void writeTo(uint8_t *buf) const override {
581 if (ctx.config.is64()) {
582 write64le(P: buf, V: thunk->getRVA() + ctx.config.imageBase);
583 } else {
584 uint32_t bit = 0;
585 // Pointer to thumb code must have the LSB set, so adjust it.
586 if (ctx.config.machine == ARMNT)
587 bit = 1;
588 write32le(P: buf, V: (thunk->getRVA() + ctx.config.imageBase) | bit);
589 }
590 }
591
592 void getBaserels(std::vector<Baserel> *res) override {
593 res->emplace_back(args&: rva, args: ctx.config.machine);
594 }
595
596 Chunk *thunk;
597
598private:
599 const COFFLinkerContext &ctx;
600};
601
602// Export table
603// Read Microsoft PE/COFF spec 5.3 for details.
604
605// A chunk for the export descriptor table.
606class ExportDirectoryChunk : public NonSectionChunk {
607public:
608 ExportDirectoryChunk(int baseOrdinal, int maxOrdinal, int nameTabSize,
609 Chunk *d, Chunk *a, Chunk *n, Chunk *o)
610 : baseOrdinal(baseOrdinal), maxOrdinal(maxOrdinal),
611 nameTabSize(nameTabSize), dllName(d), addressTab(a), nameTab(n),
612 ordinalTab(o) {}
613
614 size_t getSize() const override {
615 return sizeof(export_directory_table_entry);
616 }
617
618 void writeTo(uint8_t *buf) const override {
619 memset(s: buf, c: 0, n: getSize());
620
621 auto *e = (export_directory_table_entry *)(buf);
622 e->NameRVA = dllName->getRVA();
623 e->OrdinalBase = baseOrdinal;
624 e->AddressTableEntries = (maxOrdinal - baseOrdinal) + 1;
625 e->NumberOfNamePointers = nameTabSize;
626 e->ExportAddressTableRVA = addressTab->getRVA();
627 e->NamePointerRVA = nameTab->getRVA();
628 e->OrdinalTableRVA = ordinalTab->getRVA();
629 }
630
631 uint16_t baseOrdinal;
632 uint16_t maxOrdinal;
633 uint16_t nameTabSize;
634 Chunk *dllName;
635 Chunk *addressTab;
636 Chunk *nameTab;
637 Chunk *ordinalTab;
638};
639
640class AddressTableChunk : public NonSectionChunk {
641public:
642 explicit AddressTableChunk(SymbolTable &symtab, size_t baseOrdinal,
643 size_t maxOrdinal)
644 : baseOrdinal(baseOrdinal), size((maxOrdinal - baseOrdinal) + 1),
645 symtab(symtab) {}
646 size_t getSize() const override { return size * 4; }
647
648 void writeTo(uint8_t *buf) const override {
649 memset(s: buf, c: 0, n: getSize());
650
651 for (const Export &e : symtab.exports) {
652 assert(e.ordinal >= baseOrdinal && "Export symbol has invalid ordinal");
653 // Subtract the OrdinalBase to get the index.
654 uint8_t *p = buf + (e.ordinal - baseOrdinal) * 4;
655 uint32_t bit = 0;
656 // Pointer to thumb code must have the LSB set, so adjust it.
657 if (symtab.machine == ARMNT && !e.data)
658 bit = 1;
659 if (e.forwardChunk) {
660 write32le(P: p, V: e.forwardChunk->getRVA() | bit);
661 } else {
662 assert(cast<Defined>(e.sym)->getRVA() != 0 &&
663 "Exported symbol unmapped");
664 write32le(P: p, V: cast<Defined>(Val: e.sym)->getRVA() | bit);
665 }
666 }
667 }
668
669private:
670 size_t baseOrdinal;
671 size_t size;
672 const SymbolTable &symtab;
673};
674
675class NamePointersChunk : public NonSectionChunk {
676public:
677 explicit NamePointersChunk(std::vector<Chunk *> &v) : chunks(v) {}
678 size_t getSize() const override { return chunks.size() * 4; }
679
680 void writeTo(uint8_t *buf) const override {
681 for (Chunk *c : chunks) {
682 write32le(P: buf, V: c->getRVA());
683 buf += 4;
684 }
685 }
686
687private:
688 std::vector<Chunk *> chunks;
689};
690
691class ExportOrdinalChunk : public NonSectionChunk {
692public:
693 explicit ExportOrdinalChunk(const SymbolTable &symtab, size_t baseOrdinal,
694 size_t tableSize)
695 : baseOrdinal(baseOrdinal), size(tableSize), symtab(symtab) {}
696 size_t getSize() const override { return size * 2; }
697
698 void writeTo(uint8_t *buf) const override {
699 for (const Export &e : symtab.exports) {
700 if (e.noname)
701 continue;
702 assert(e.ordinal >= baseOrdinal && "Export symbol has invalid ordinal");
703 // This table stores unbiased indices, so subtract OrdinalBase.
704 write16le(P: buf, V: e.ordinal - baseOrdinal);
705 buf += 2;
706 }
707 }
708
709private:
710 size_t baseOrdinal;
711 size_t size;
712 const SymbolTable &symtab;
713};
714
715} // anonymous namespace
716
717void IdataContents::create(COFFLinkerContext &ctx) {
718 std::vector<std::vector<DefinedImportData *>> v = binImports(ctx, imports);
719
720 // In hybrid images, EC and native code are usually very similar,
721 // resulting in a highly similar set of imported symbols. Consequently,
722 // their import tables can be shared, with ARM64X relocations handling any
723 // differences. Identify matching import files used by EC and native code, and
724 // merge them into a single hybrid import entry.
725 if (ctx.hybridSymtab) {
726 for (std::vector<DefinedImportData *> &syms : v) {
727 std::vector<DefinedImportData *> hybridSyms;
728 ImportFile *prev = nullptr;
729 for (DefinedImportData *sym : syms) {
730 ImportFile *file = sym->file;
731 // At this stage, symbols are sorted by base name, ensuring that
732 // compatible import files, if present, are adjacent. Check if the
733 // current symbol's file imports the same symbol as the previously added
734 // one (if any and if it was not already merged). Additionally, verify
735 // that one of them is native while the other is EC. In rare cases,
736 // separate matching import entries may exist within the same namespace,
737 // which cannot be merged.
738 if (!prev || file->isEC() == prev->isEC() ||
739 !file->isSameImport(other: prev)) {
740 // We can't merge the import file, just add it to hybridSyms
741 // and set prev to its file so that we can try to match the next
742 // symbol.
743 hybridSyms.push_back(x: sym);
744 prev = file;
745 continue;
746 }
747
748 // A matching symbol may appear in syms in any order. The native variant
749 // exposes a subset of EC symbols and chunks, so always use the EC
750 // variant as the hybrid import file. If the native file was already
751 // added, replace it with the EC symbol in hybridSyms. Otherwise, the EC
752 // variant is already pushed, so we can simply merge it.
753 if (file->isEC()) {
754 hybridSyms.pop_back();
755 hybridSyms.push_back(x: sym);
756 }
757
758 // Merge import files by storing their hybrid form in the corresponding
759 // file class.
760 prev->hybridFile = file;
761 file->hybridFile = prev;
762 prev = nullptr; // A hybrid import file cannot be merged again.
763 }
764
765 // Sort symbols by type: native-only files first, followed by merged
766 // hybrid files, and then EC-only files.
767 llvm::stable_sort(Range&: hybridSyms,
768 C: [](DefinedImportData *a, DefinedImportData *b) {
769 if (a->file->hybridFile)
770 return !b->file->hybridFile && b->file->isEC();
771 return !a->file->isEC() && b->file->isEC();
772 });
773 syms = std::move(hybridSyms);
774 }
775 }
776
777 // Create .idata contents for each DLL.
778 for (std::vector<DefinedImportData *> &syms : v) {
779 // Create lookup and address tables. If they have external names,
780 // we need to create hintName chunks to store the names.
781 // If they don't (if they are import-by-ordinals), we store only
782 // ordinal values to the table.
783 size_t base = lookups.size();
784 Chunk *lookupsTerminator = nullptr, *addressesTerminator = nullptr;
785 uint32_t nativeOnly = 0;
786 for (DefinedImportData *s : syms) {
787 uint16_t ord = s->getOrdinal();
788 HintNameChunk *hintChunk = nullptr;
789 Chunk *lookupsChunk, *addressesChunk;
790
791 if (s->getExternalName().empty()) {
792 lookupsChunk = make<OrdinalOnlyChunk>(args&: ctx, args&: ord);
793 addressesChunk = make<OrdinalOnlyChunk>(args&: ctx, args&: ord);
794 } else {
795 hintChunk = make<HintNameChunk>(args: s->getExternalName(), args&: ord);
796 lookupsChunk = make<LookupChunk>(args&: ctx, args&: hintChunk);
797 addressesChunk = make<LookupChunk>(args&: ctx, args&: hintChunk);
798 hints.push_back(x: hintChunk);
799 }
800
801 // Detect the first EC-only import in the hybrid IAT. Emit null chunk
802 // as a terminator for the native view, and add an ARM64X relocation to
803 // replace it with the correct import for the EC view.
804 //
805 // Additionally, for MSVC compatibility, store the lookup and address
806 // chunks and append them at the end of EC-only imports, where a null
807 // terminator chunk would typically be placed. Since they appear after
808 // the native terminator, they will be ignored in the native view.
809 // In the EC view, they should act as terminators, so emit ZEROFILL
810 // relocations overriding them.
811 if (ctx.config.machine == ARM64X && !lookupsTerminator &&
812 s->file->isEC() && !s->file->hybridFile) {
813 lookupsTerminator = lookupsChunk;
814 addressesTerminator = addressesChunk;
815 lookupsChunk = make<NullChunk>(args&: ctx);
816 addressesChunk = make<NullChunk>(args&: ctx);
817
818 Arm64XRelocVal relocVal = hintChunk;
819 if (!hintChunk)
820 relocVal = (1ULL << 63) | ord;
821 ctx.dynamicRelocs->add(type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_VALUE,
822 size: sizeof(uint64_t), offset: lookupsChunk, value: relocVal);
823 ctx.dynamicRelocs->add(type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_VALUE,
824 size: sizeof(uint64_t), offset: addressesChunk, value: relocVal);
825 ctx.dynamicRelocs->add(type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_ZEROFILL,
826 size: sizeof(uint64_t), offset: lookupsTerminator);
827 ctx.dynamicRelocs->add(type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_ZEROFILL,
828 size: sizeof(uint64_t), offset: addressesTerminator);
829 }
830
831 lookups.push_back(x: lookupsChunk);
832 addresses.push_back(x: addressesChunk);
833
834 if (s->file->isEC()) {
835 auto chunk = make<AuxImportChunk>(args&: s->file);
836 auxIat.push_back(x: chunk);
837 s->file->impECSym->setLocation(chunk);
838
839 chunk = make<AuxImportChunk>(args&: s->file);
840 auxIatCopy.push_back(x: chunk);
841 s->file->auxImpCopySym->setLocation(chunk);
842 } else if (ctx.hybridSymtab) {
843 // Fill the auxiliary IAT with null chunks for native-only imports.
844 auxIat.push_back(x: make<NullChunk>(args&: ctx));
845 auxIatCopy.push_back(x: make<NullChunk>(args&: ctx));
846 ++nativeOnly;
847 }
848 }
849 // Terminate with null values.
850 lookups.push_back(x: lookupsTerminator ? lookupsTerminator
851 : make<NullChunk>(args&: ctx));
852 addresses.push_back(x: addressesTerminator ? addressesTerminator
853 : make<NullChunk>(args&: ctx));
854 if (ctx.symtab.isEC()) {
855 auxIat.push_back(x: make<NullChunk>(args&: ctx));
856 auxIatCopy.push_back(x: make<NullChunk>(args&: ctx));
857 }
858
859 for (int i = 0, e = syms.size(); i < e; ++i) {
860 syms[i]->setLocation(addresses[base + i]);
861 if (syms[i]->file->hybridFile)
862 syms[i]->file->hybridFile->impSym->setLocation(addresses[base + i]);
863 }
864
865 // Create the import table header.
866 dllNames.push_back(x: make<StringChunk>(args: syms[0]->getDLLName()));
867 auto *dir = make<ImportDirectoryChunk>(args&: dllNames.back());
868
869 if (ctx.hybridSymtab && nativeOnly) {
870 if (ctx.config.machine != ARM64X)
871 // On pure ARM64EC targets, skip native-only imports in the import
872 // directory.
873 base += nativeOnly;
874 else if (nativeOnly) {
875 // If native-only imports exist, they will appear as a prefix to all
876 // imports. Emit ARM64X relocations to skip them in the EC view.
877 ctx.dynamicRelocs->add(
878 type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_DELTA, size: 0,
879 offset: Arm64XRelocVal(
880 dir, offsetof(ImportDirectoryTableEntry, ImportLookupTableRVA)),
881 value: nativeOnly * sizeof(uint64_t));
882 ctx.dynamicRelocs->add(
883 type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_DELTA, size: 0,
884 offset: Arm64XRelocVal(dir, offsetof(ImportDirectoryTableEntry,
885 ImportAddressTableRVA)),
886 value: nativeOnly * sizeof(uint64_t));
887 }
888 }
889
890 dir->lookupTab = lookups[base];
891 dir->addressTab = addresses[base];
892 dirs.push_back(x: dir);
893 }
894 // Add null terminator.
895 dirs.push_back(x: make<NullChunk>(args: sizeof(ImportDirectoryTableEntry), args: 4));
896}
897
898std::vector<Chunk *> DelayLoadContents::getChunks() {
899 std::vector<Chunk *> v;
900 v.insert(position: v.end(), first: dirs.begin(), last: dirs.end());
901 v.insert(position: v.end(), first: names.begin(), last: names.end());
902 v.insert(position: v.end(), first: hintNames.begin(), last: hintNames.end());
903 v.insert(position: v.end(), first: dllNames.begin(), last: dllNames.end());
904 return v;
905}
906
907std::vector<Chunk *> DelayLoadContents::getDataChunks() {
908 std::vector<Chunk *> v;
909 v.insert(position: v.end(), first: moduleHandles.begin(), last: moduleHandles.end());
910 v.insert(position: v.end(), first: addresses.begin(), last: addresses.end());
911 return v;
912}
913
914uint64_t DelayLoadContents::getDirSize() {
915 return dirs.size() * sizeof(delay_import_directory_table_entry);
916}
917
918void DelayLoadContents::create() {
919 std::vector<std::vector<DefinedImportData *>> v = binImports(ctx, imports);
920
921 // Create .didat contents for each DLL.
922 for (std::vector<DefinedImportData *> &syms : v) {
923 // Create the delay import table header.
924 dllNames.push_back(x: make<StringChunk>(args: syms[0]->getDLLName()));
925 auto *dir = make<DelayDirectoryChunk>(args&: dllNames.back());
926
927 size_t base = addresses.size();
928 ctx.forEachSymtab(f: [&](SymbolTable &symtab) {
929 if (symtab.isEC()) {
930 if (ctx.config.machine == ARM64X) {
931 // For hybrid images, emit null-terminated native import entries
932 // followed by null-terminated EC entries. If a view is missing
933 // imports for a given module, only terminators are emitted. Emit
934 // ARM64X relocations to skip native entries in the EC view.
935 ctx.dynamicRelocs->add(
936 type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_DELTA, size: 0,
937 offset: Arm64XRelocVal(dir, offsetof(delay_import_directory_table_entry,
938 DelayImportAddressTable)),
939 value: (addresses.size() - base) * sizeof(uint64_t));
940 ctx.dynamicRelocs->add(
941 type: IMAGE_DVRT_ARM64X_FIXUP_TYPE_DELTA, size: 0,
942 offset: Arm64XRelocVal(dir, offsetof(delay_import_directory_table_entry,
943 DelayImportNameTable)),
944 value: (addresses.size() - base) * sizeof(uint64_t));
945 } else {
946 base = addresses.size();
947 }
948 }
949
950 Chunk *tm = nullptr;
951
952 for (DefinedImportData *s : syms) {
953 // Process only the symbols belonging to the current symtab.
954 if (symtab.isEC() != s->file->isEC())
955 continue;
956
957 if (!tm) {
958 tm = newTailMergeChunk(symtab, dir);
959 Chunk *pdataChunk = newTailMergePDataChunk(symtab, tm);
960 if (pdataChunk)
961 pdata.push_back(x: pdataChunk);
962 }
963
964 Chunk *t = newThunkChunk(s, tailMerge: tm);
965 auto *a = make<DelayAddressChunk>(args&: ctx, args&: t);
966 addresses.push_back(x: a);
967 s->setLocation(a);
968 thunks.push_back(x: t);
969 StringRef extName = s->getExternalName();
970 if (extName.empty()) {
971 names.push_back(x: make<OrdinalOnlyChunk>(args&: ctx, args: s->getOrdinal()));
972 } else {
973 auto *c = make<HintNameChunk>(args&: extName, args: 0);
974 names.push_back(x: make<LookupChunk>(args&: ctx, args&: c));
975 hintNames.push_back(x: c);
976 // Add a synthetic symbol for this load thunk, using the
977 // "__imp___load" prefix, in case this thunk needs to be added to the
978 // list of valid call targets for Control Flow Guard.
979 StringRef symName = saver().save(S: "__imp___load_" + extName);
980 s->loadThunkSym =
981 cast<DefinedSynthetic>(Val: symtab.addSynthetic(n: symName, c: t));
982 }
983
984 if (symtab.isEC()) {
985 auto chunk = make<AuxImportChunk>(args&: s->file);
986 auxIat.push_back(x: chunk);
987 s->file->impECSym->setLocation(chunk);
988
989 chunk = make<AuxImportChunk>(args&: s->file);
990 auxIatCopy.push_back(x: chunk);
991 s->file->auxImpCopySym->setLocation(chunk);
992 } else if (ctx.config.machine == ARM64X) {
993 // Fill the auxiliary IAT with null chunks for native imports.
994 auxIat.push_back(x: make<NullChunk>(args&: ctx));
995 auxIatCopy.push_back(x: make<NullChunk>(args&: ctx));
996 }
997 }
998
999 if (tm) {
1000 thunks.push_back(x: tm);
1001 StringRef tmName =
1002 saver().save(S: "__tailMerge_" + syms[0]->getDLLName().lower());
1003 symtab.addSynthetic(n: tmName, c: tm);
1004 }
1005
1006 // Skip terminators on pure ARM64EC target if there are no native imports.
1007 if (!tm && !symtab.isEC() && ctx.config.machine != ARM64X)
1008 return;
1009
1010 // Terminate with null values.
1011 addresses.push_back(x: make<NullChunk>(args&: ctx, args: 8));
1012 names.push_back(x: make<NullChunk>(args&: ctx, args: 8));
1013 if (ctx.symtab.isEC()) {
1014 auxIat.push_back(x: make<NullChunk>(args&: ctx, args: 8));
1015 auxIatCopy.push_back(x: make<NullChunk>(args&: ctx, args: 8));
1016 }
1017 });
1018
1019 auto *mh = make<NullChunk>(args: 8, args: 8);
1020 moduleHandles.push_back(x: mh);
1021
1022 // Fill the delay import table header fields.
1023 dir->moduleHandle = mh;
1024 dir->addressTab = addresses[base];
1025 dir->nameTab = names[base];
1026 dirs.push_back(x: dir);
1027 }
1028
1029 ctx.forEachSymtab(f: [&](SymbolTable &symtab) {
1030 if (symtab.tailMergeUnwindInfoChunk)
1031 unwindinfo.push_back(x: symtab.tailMergeUnwindInfoChunk);
1032 });
1033 // Add null terminator.
1034 dirs.push_back(
1035 x: make<NullChunk>(args: sizeof(delay_import_directory_table_entry), args: 4));
1036}
1037
1038Chunk *DelayLoadContents::newTailMergeChunk(SymbolTable &symtab, Chunk *dir) {
1039 auto helper = cast_or_null<Defined>(Val: symtab.delayLoadHelper);
1040 switch (symtab.machine) {
1041 case AMD64:
1042 case ARM64EC:
1043 return make<TailMergeChunkX64>(args&: dir, args&: helper);
1044 case I386:
1045 return make<TailMergeChunkX86>(args&: ctx, args&: dir, args&: helper);
1046 case ARMNT:
1047 return make<TailMergeChunkARM>(args&: ctx, args&: dir, args&: helper);
1048 case ARM64:
1049 return make<TailMergeChunkARM64>(args&: dir, args&: helper);
1050 default:
1051 llvm_unreachable("unsupported machine type");
1052 }
1053}
1054
1055Chunk *DelayLoadContents::newTailMergePDataChunk(SymbolTable &symtab,
1056 Chunk *tm) {
1057 switch (symtab.machine) {
1058 case AMD64:
1059 case ARM64EC:
1060 if (!symtab.tailMergeUnwindInfoChunk)
1061 symtab.tailMergeUnwindInfoChunk = make<TailMergeUnwindInfoX64>();
1062 return make<TailMergePDataChunkX64>(args&: tm, args&: symtab.tailMergeUnwindInfoChunk);
1063 // FIXME: Add support for other architectures.
1064 default:
1065 return nullptr; // Just don't generate unwind info.
1066 }
1067}
1068
1069Chunk *DelayLoadContents::newThunkChunk(DefinedImportData *s,
1070 Chunk *tailMerge) {
1071 switch (s->file->getMachineType()) {
1072 case AMD64:
1073 case ARM64EC:
1074 return make<ThunkChunkX64>(args&: s, args&: tailMerge);
1075 case I386:
1076 return make<ThunkChunkX86>(args&: ctx, args&: s, args&: tailMerge);
1077 case ARMNT:
1078 return make<ThunkChunkARM>(args&: ctx, args&: s, args&: tailMerge);
1079 case ARM64:
1080 return make<ThunkChunkARM64>(args&: s, args&: tailMerge);
1081 default:
1082 llvm_unreachable("unsupported machine type");
1083 }
1084}
1085
1086void createEdataChunks(SymbolTable &symtab, std::vector<Chunk *> &chunks) {
1087 unsigned baseOrdinal = 1 << 16, maxOrdinal = 0;
1088 for (Export &e : symtab.exports) {
1089 baseOrdinal = std::min(a: baseOrdinal, b: (unsigned)e.ordinal);
1090 maxOrdinal = std::max(a: maxOrdinal, b: (unsigned)e.ordinal);
1091 }
1092 // Ordinals must start at 1 as suggested in:
1093 // https://learn.microsoft.com/en-us/cpp/build/reference/export-exports-a-function?view=msvc-170
1094 assert(baseOrdinal >= 1);
1095
1096 auto *dllName =
1097 make<StringChunk>(args: sys::path::filename(path: symtab.ctx.config.outputFile));
1098 auto *addressTab = make<AddressTableChunk>(args&: symtab, args&: baseOrdinal, args&: maxOrdinal);
1099 std::vector<Chunk *> names;
1100 for (Export &e : symtab.exports)
1101 if (!e.noname)
1102 names.push_back(x: make<StringChunk>(args&: e.exportName));
1103
1104 std::vector<Chunk *> forwards;
1105 for (Export &e : symtab.exports) {
1106 if (e.forwardTo.empty())
1107 continue;
1108 e.forwardChunk = make<StringChunk>(args&: e.forwardTo);
1109 forwards.push_back(x: e.forwardChunk);
1110 }
1111
1112 auto *nameTab = make<NamePointersChunk>(args&: names);
1113 auto *ordinalTab =
1114 make<ExportOrdinalChunk>(args&: symtab, args&: baseOrdinal, args: names.size());
1115 auto *dir =
1116 make<ExportDirectoryChunk>(args&: baseOrdinal, args&: maxOrdinal, args: names.size(), args&: dllName,
1117 args&: addressTab, args&: nameTab, args&: ordinalTab);
1118 chunks.push_back(x: dir);
1119 chunks.push_back(x: dllName);
1120 chunks.push_back(x: addressTab);
1121 chunks.push_back(x: nameTab);
1122 chunks.push_back(x: ordinalTab);
1123 chunks.insert(position: chunks.end(), first: names.begin(), last: names.end());
1124 chunks.insert(position: chunks.end(), first: forwards.begin(), last: forwards.end());
1125}
1126
1127} // namespace lld::coff
1128