1 | //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file declares the AArch64 specific subclass of TargetMachine. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
14 | #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
15 | |
16 | #include "AArch64InstrInfo.h" |
17 | #include "AArch64Subtarget.h" |
18 | #include "llvm/CodeGen/CodeGenTargetMachineImpl.h" |
19 | #include "llvm/IR/DataLayout.h" |
20 | #include <optional> |
21 | |
22 | namespace llvm { |
23 | |
24 | class AArch64TargetMachine : public CodeGenTargetMachineImpl { |
25 | protected: |
26 | std::unique_ptr<TargetLoweringObjectFile> TLOF; |
27 | mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap; |
28 | |
29 | /// Reset internal state. |
30 | void reset() override; |
31 | |
32 | public: |
33 | AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
34 | StringRef FS, const TargetOptions &Options, |
35 | std::optional<Reloc::Model> RM, |
36 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
37 | bool JIT, bool IsLittleEndian); |
38 | |
39 | ~AArch64TargetMachine() override; |
40 | const AArch64Subtarget *getSubtargetImpl(const Function &F) const override; |
41 | // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget, |
42 | // subtargets are per-function entities based on the target-specific |
43 | // attributes of each function. |
44 | const AArch64Subtarget *getSubtargetImpl() const = delete; |
45 | |
46 | // Pass Pipeline Configuration |
47 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
48 | |
49 | void registerPassBuilderCallbacks(PassBuilder &PB) override; |
50 | |
51 | TargetTransformInfo getTargetTransformInfo(const Function &F) const override; |
52 | |
53 | TargetLoweringObjectFile* getObjFileLowering() const override { |
54 | return TLOF.get(); |
55 | } |
56 | |
57 | MachineFunctionInfo * |
58 | createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, |
59 | const TargetSubtargetInfo *STI) const override; |
60 | |
61 | yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; |
62 | yaml::MachineFunctionInfo * |
63 | convertFuncInfoToYAML(const MachineFunction &MF) const override; |
64 | bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, |
65 | PerFunctionMIParsingState &PFS, |
66 | SMDiagnostic &Error, |
67 | SMRange &SourceRange) const override; |
68 | |
69 | /// Returns true if a cast between SrcAS and DestAS is a noop. |
70 | bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { |
71 | return getPointerSize(AS: SrcAS) == getPointerSize(AS: DestAS); |
72 | } |
73 | ScheduleDAGInstrs * |
74 | createMachineScheduler(MachineSchedContext *C) const override; |
75 | |
76 | ScheduleDAGInstrs * |
77 | createPostMachineScheduler(MachineSchedContext *C) const override; |
78 | |
79 | size_t clearLinkerOptimizationHints( |
80 | const SmallPtrSetImpl<MachineInstr *> &MIs) const override; |
81 | |
82 | private: |
83 | bool isLittle; |
84 | }; |
85 | |
86 | // AArch64 little endian target machine. |
87 | // |
88 | class AArch64leTargetMachine : public AArch64TargetMachine { |
89 | virtual void anchor(); |
90 | |
91 | public: |
92 | AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
93 | StringRef FS, const TargetOptions &Options, |
94 | std::optional<Reloc::Model> RM, |
95 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
96 | bool JIT); |
97 | }; |
98 | |
99 | // AArch64 big endian target machine. |
100 | // |
101 | class AArch64beTargetMachine : public AArch64TargetMachine { |
102 | virtual void anchor(); |
103 | |
104 | public: |
105 | AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
106 | StringRef FS, const TargetOptions &Options, |
107 | std::optional<Reloc::Model> RM, |
108 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
109 | bool JIT); |
110 | }; |
111 | |
112 | } // end namespace llvm |
113 | |
114 | #endif |
115 | |