1//===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Top-level implementation for the MSP430 target.
10//
11//===----------------------------------------------------------------------===//
12
13#include "MSP430TargetMachine.h"
14#include "MSP430.h"
15#include "MSP430MachineFunctionInfo.h"
16#include "TargetInfo/MSP430TargetInfo.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
19#include "llvm/CodeGen/TargetPassConfig.h"
20#include "llvm/MC/TargetRegistry.h"
21#include "llvm/Support/Compiler.h"
22#include <optional>
23using namespace llvm;
24
25extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
26 // Register the target.
27 RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
28 PassRegistry &PR = *PassRegistry::getPassRegistry();
29 initializeMSP430AsmPrinterPass(PR);
30 initializeMSP430DAGToDAGISelLegacyPass(PR);
31}
32
33static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
34 return RM.value_or(u: Reloc::Static);
35}
36
37static std::string computeDataLayout(const Triple &TT, StringRef CPU,
38 const TargetOptions &Options) {
39 return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16";
40}
41
42MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
43 StringRef CPU, StringRef FS,
44 const TargetOptions &Options,
45 std::optional<Reloc::Model> RM,
46 std::optional<CodeModel::Model> CM,
47 CodeGenOptLevel OL, bool JIT)
48 : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
49 FS, Options, getEffectiveRelocModel(RM),
50 getEffectiveCodeModel(CM, Default: CodeModel::Small), OL),
51 TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
52 Subtarget(TT, std::string(CPU), std::string(FS), *this) {
53 initAsmInfo();
54}
55
56MSP430TargetMachine::~MSP430TargetMachine() = default;
57
58namespace {
59/// MSP430 Code Generator Pass Configuration Options.
60class MSP430PassConfig : public TargetPassConfig {
61public:
62 MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM)
63 : TargetPassConfig(TM, PM) {}
64
65 MSP430TargetMachine &getMSP430TargetMachine() const {
66 return getTM<MSP430TargetMachine>();
67 }
68
69 void addIRPasses() override;
70 bool addInstSelector() override;
71 void addPreEmitPass() override;
72};
73} // namespace
74
75TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) {
76 return new MSP430PassConfig(*this, PM);
77}
78
79MachineFunctionInfo *MSP430TargetMachine::createMachineFunctionInfo(
80 BumpPtrAllocator &Allocator, const Function &F,
81 const TargetSubtargetInfo *STI) const {
82 return MSP430MachineFunctionInfo::create<MSP430MachineFunctionInfo>(Allocator,
83 F, STI);
84}
85
86void MSP430PassConfig::addIRPasses() {
87 addPass(P: createAtomicExpandLegacyPass());
88
89 TargetPassConfig::addIRPasses();
90}
91
92bool MSP430PassConfig::addInstSelector() {
93 // Install an instruction selector.
94 addPass(P: createMSP430ISelDag(TM&: getMSP430TargetMachine(), OptLevel: getOptLevel()));
95 return false;
96}
97
98void MSP430PassConfig::addPreEmitPass() {
99 // Must run branch selection immediately preceding the asm printer.
100 addPass(P: createMSP430BranchSelectionPass());
101}
102