1 | //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the MipsAsmBackend class. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | // |
13 | |
14 | #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H |
15 | #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H |
16 | |
17 | #include "MCTargetDesc/MipsFixupKinds.h" |
18 | #include "llvm/MC/MCAsmBackend.h" |
19 | #include "llvm/TargetParser/Triple.h" |
20 | |
21 | namespace llvm { |
22 | |
23 | class MCAssembler; |
24 | struct MCFixupKindInfo; |
25 | class MCRegisterInfo; |
26 | class Target; |
27 | |
28 | class MipsAsmBackend : public MCAsmBackend { |
29 | Triple TheTriple; |
30 | bool IsN32; |
31 | |
32 | public: |
33 | MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, |
34 | StringRef CPU, bool N32) |
35 | : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little |
36 | : llvm::endianness::big), |
37 | TheTriple(TT), IsN32(N32) {} |
38 | |
39 | std::unique_ptr<MCObjectTargetWriter> |
40 | createObjectTargetWriter() const override; |
41 | |
42 | void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target, |
43 | MutableArrayRef<char> Data, uint64_t Value, |
44 | bool IsResolved) override; |
45 | |
46 | std::optional<MCFixupKind> getFixupKind(StringRef Name) const override; |
47 | MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override; |
48 | |
49 | bool writeNopData(raw_ostream &OS, uint64_t Count, |
50 | const MCSubtargetInfo *STI) const override; |
51 | }; // class MipsAsmBackend |
52 | |
53 | } // namespace |
54 | |
55 | #endif |
56 | |