1//===-- MipsTargetTransformInfo.cpp - Mips specific TTI ----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "MipsTargetTransformInfo.h"
10
11using namespace llvm;
12
13bool MipsTTIImpl::hasDivRemOp(Type *DataType, bool IsSigned) const {
14 EVT VT = TLI->getValueType(DL, Ty: DataType);
15 return TLI->isOperationLegalOrCustom(Op: IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
16 VT);
17}
18
19bool MipsTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
20 const TargetTransformInfo::LSRCost &C2) const {
21 // MIPS specific here are "instruction number 1st priority".
22 // If we need to emit adds inside the loop to add up base registers, then
23 // we need at least one extra temporary register.
24 unsigned C1NumRegs = C1.NumRegs + (C1.NumBaseAdds != 0);
25 unsigned C2NumRegs = C2.NumRegs + (C2.NumBaseAdds != 0);
26 return std::tie(args: C1.Insns, args&: C1NumRegs, args: C1.AddRecCost, args: C1.NumIVMuls,
27 args: C1.NumBaseAdds, args: C1.ScaleCost, args: C1.ImmCost, args: C1.SetupCost) <
28 std::tie(args: C2.Insns, args&: C2NumRegs, args: C2.AddRecCost, args: C2.NumIVMuls,
29 args: C2.NumBaseAdds, args: C2.ScaleCost, args: C2.ImmCost, args: C2.SetupCost);
30}
31