1//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "MCTargetDesc/PPCFixupKinds.h"
10#include "MCTargetDesc/PPCMCAsmInfo.h"
11#include "MCTargetDesc/PPCMCTargetDesc.h"
12#include "llvm/BinaryFormat/ELF.h"
13#include "llvm/BinaryFormat/MachO.h"
14#include "llvm/MC/MCAsmBackend.h"
15#include "llvm/MC/MCAssembler.h"
16#include "llvm/MC/MCELFObjectWriter.h"
17#include "llvm/MC/MCFixupKindInfo.h"
18#include "llvm/MC/MCMachObjectWriter.h"
19#include "llvm/MC/MCObjectWriter.h"
20#include "llvm/MC/MCSubtargetInfo.h"
21#include "llvm/MC/MCSymbolELF.h"
22#include "llvm/MC/MCSymbolXCOFF.h"
23#include "llvm/MC/MCValue.h"
24#include "llvm/MC/TargetRegistry.h"
25#include "llvm/Support/ErrorHandling.h"
26using namespace llvm;
27
28static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
29 switch (Kind) {
30 default:
31 llvm_unreachable("Unknown fixup kind!");
32 case FK_Data_1:
33 case FK_Data_2:
34 case FK_Data_4:
35 case FK_Data_8:
36 case PPC::fixup_ppc_nofixup:
37 return Value;
38 case PPC::fixup_ppc_brcond14:
39 case PPC::fixup_ppc_brcond14abs:
40 return Value & 0xfffc;
41 case PPC::fixup_ppc_br24:
42 case PPC::fixup_ppc_br24abs:
43 case PPC::fixup_ppc_br24_notoc:
44 return Value & 0x3fffffc;
45 case PPC::fixup_ppc_half16:
46 return Value & 0xffff;
47 case PPC::fixup_ppc_half16ds:
48 case PPC::fixup_ppc_half16dq:
49 return Value & 0xfffc;
50 case PPC::fixup_ppc_pcrel34:
51 case PPC::fixup_ppc_imm34:
52 return Value & 0x3ffffffff;
53 }
54}
55
56static unsigned getFixupKindNumBytes(unsigned Kind) {
57 switch (Kind) {
58 default:
59 llvm_unreachable("Unknown fixup kind!");
60 case FK_Data_1:
61 return 1;
62 case FK_Data_2:
63 case PPC::fixup_ppc_half16:
64 case PPC::fixup_ppc_half16ds:
65 case PPC::fixup_ppc_half16dq:
66 return 2;
67 case FK_Data_4:
68 case PPC::fixup_ppc_brcond14:
69 case PPC::fixup_ppc_brcond14abs:
70 case PPC::fixup_ppc_br24:
71 case PPC::fixup_ppc_br24abs:
72 case PPC::fixup_ppc_br24_notoc:
73 return 4;
74 case PPC::fixup_ppc_pcrel34:
75 case PPC::fixup_ppc_imm34:
76 case FK_Data_8:
77 return 8;
78 case PPC::fixup_ppc_nofixup:
79 return 0;
80 }
81}
82
83namespace {
84
85class PPCAsmBackend : public MCAsmBackend {
86protected:
87 Triple TT;
88public:
89 PPCAsmBackend(const Target &T, const Triple &TT)
90 : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little
91 : llvm::endianness::big),
92 TT(TT) {}
93
94 MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
95
96 void applyFixup(const MCFragment &, const MCFixup &Fixup,
97 const MCValue &Target, MutableArrayRef<char> Data,
98 uint64_t Value, bool IsResolved) override;
99
100 bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target) {
101 // If there is a @ specifier, unless it is optimized out (e.g. constant @l),
102 // force a relocation.
103 if (Target.getSpecifier())
104 return true;
105 MCFixupKind Kind = Fixup.getKind();
106 switch ((unsigned)Kind) {
107 default:
108 return false;
109 case PPC::fixup_ppc_br24:
110 case PPC::fixup_ppc_br24abs:
111 case PPC::fixup_ppc_br24_notoc:
112 // If the target symbol has a local entry point we must not attempt
113 // to resolve the fixup directly. Emit a relocation and leave
114 // resolution of the final target address to the linker.
115 if (const auto *A = Target.getAddSym()) {
116 if (const auto *S = dyn_cast<MCSymbolELF>(Val: A)) {
117 // The "other" values are stored in the last 6 bits of the second
118 // byte. The traditional defines for STO values assume the full byte
119 // and thus the shift to pack it.
120 unsigned Other = S->getOther() << 2;
121 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
122 return true;
123 } else if (const auto *S = dyn_cast<MCSymbolXCOFF>(Val: A)) {
124 return !Target.isAbsolute() && S->isExternal() &&
125 S->getStorageClass() == XCOFF::C_WEAKEXT;
126 }
127 }
128 return false;
129 }
130 }
131
132 void relaxInstruction(MCInst &Inst,
133 const MCSubtargetInfo &STI) const override {
134 // FIXME.
135 llvm_unreachable("relaxInstruction() unimplemented");
136 }
137
138 bool writeNopData(raw_ostream &OS, uint64_t Count,
139 const MCSubtargetInfo *STI) const override {
140 uint64_t NumNops = Count / 4;
141 for (uint64_t i = 0; i != NumNops; ++i)
142 support::endian::write<uint32_t>(os&: OS, value: 0x60000000, endian: Endian);
143
144 OS.write_zeros(NumZeros: Count % 4);
145
146 return true;
147 }
148};
149} // end anonymous namespace
150
151MCFixupKindInfo PPCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
152 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
153 // name offset bits flags
154 {.Name: "fixup_ppc_br24", .TargetOffset: 6, .TargetSize: 24, .Flags: MCFixupKindInfo::FKF_IsPCRel},
155 {.Name: "fixup_ppc_br24_notoc", .TargetOffset: 6, .TargetSize: 24, .Flags: MCFixupKindInfo::FKF_IsPCRel},
156 {.Name: "fixup_ppc_brcond14", .TargetOffset: 16, .TargetSize: 14, .Flags: MCFixupKindInfo::FKF_IsPCRel},
157 {.Name: "fixup_ppc_br24abs", .TargetOffset: 6, .TargetSize: 24, .Flags: 0},
158 {.Name: "fixup_ppc_brcond14abs", .TargetOffset: 16, .TargetSize: 14, .Flags: 0},
159 {.Name: "fixup_ppc_half16", .TargetOffset: 0, .TargetSize: 16, .Flags: 0},
160 {.Name: "fixup_ppc_half16ds", .TargetOffset: 0, .TargetSize: 14, .Flags: 0},
161 {.Name: "fixup_ppc_pcrel34", .TargetOffset: 0, .TargetSize: 34, .Flags: MCFixupKindInfo::FKF_IsPCRel},
162 {.Name: "fixup_ppc_imm34", .TargetOffset: 0, .TargetSize: 34, .Flags: 0},
163 {.Name: "fixup_ppc_nofixup", .TargetOffset: 0, .TargetSize: 0, .Flags: 0}};
164 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
165 // name offset bits flags
166 {.Name: "fixup_ppc_br24", .TargetOffset: 2, .TargetSize: 24, .Flags: MCFixupKindInfo::FKF_IsPCRel},
167 {.Name: "fixup_ppc_br24_notoc", .TargetOffset: 2, .TargetSize: 24, .Flags: MCFixupKindInfo::FKF_IsPCRel},
168 {.Name: "fixup_ppc_brcond14", .TargetOffset: 2, .TargetSize: 14, .Flags: MCFixupKindInfo::FKF_IsPCRel},
169 {.Name: "fixup_ppc_br24abs", .TargetOffset: 2, .TargetSize: 24, .Flags: 0},
170 {.Name: "fixup_ppc_brcond14abs", .TargetOffset: 2, .TargetSize: 14, .Flags: 0},
171 {.Name: "fixup_ppc_half16", .TargetOffset: 0, .TargetSize: 16, .Flags: 0},
172 {.Name: "fixup_ppc_half16ds", .TargetOffset: 2, .TargetSize: 14, .Flags: 0},
173 {.Name: "fixup_ppc_pcrel34", .TargetOffset: 0, .TargetSize: 34, .Flags: MCFixupKindInfo::FKF_IsPCRel},
174 {.Name: "fixup_ppc_imm34", .TargetOffset: 0, .TargetSize: 34, .Flags: 0},
175 {.Name: "fixup_ppc_nofixup", .TargetOffset: 0, .TargetSize: 0, .Flags: 0}};
176
177 // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
178 // do not require any extra processing.
179 if (mc::isRelocation(FixupKind: Kind))
180 return MCAsmBackend::getFixupKindInfo(Kind: FK_NONE);
181
182 if (Kind < FirstTargetFixupKind)
183 return MCAsmBackend::getFixupKindInfo(Kind);
184
185 assert(Kind - FirstTargetFixupKind < PPC::NumTargetFixupKinds &&
186 "Invalid kind!");
187 return (Endian == llvm::endianness::little
188 ? InfosLE
189 : InfosBE)[Kind - FirstTargetFixupKind];
190}
191
192void PPCAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
193 const MCValue &TargetVal,
194 MutableArrayRef<char> Data, uint64_t Value,
195 bool IsResolved) {
196 // In PPC64 ELFv1, .quad .TOC.@tocbase in the .opd section is expected to
197 // reference the null symbol.
198 auto Target = TargetVal;
199 if (Target.getSpecifier() == PPC::S_TOCBASE)
200 Target.setAddSym(nullptr);
201 if (IsResolved && shouldForceRelocation(Fixup, Target))
202 IsResolved = false;
203 if (!IsResolved)
204 Asm->getWriter().recordRelocation(F, Fixup, Target, FixedValue&: Value);
205
206 MCFixupKind Kind = Fixup.getKind();
207 if (mc::isRelocation(FixupKind: Kind))
208 return;
209 Value = adjustFixupValue(Kind, Value);
210 if (!Value)
211 return; // Doesn't change encoding.
212
213 unsigned Offset = Fixup.getOffset();
214 unsigned NumBytes = getFixupKindNumBytes(Kind);
215
216 // For each byte of the fragment that the fixup touches, mask in the bits
217 // from the fixup value. The Value has been "split up" into the appropriate
218 // bitfields above.
219 for (unsigned i = 0; i != NumBytes; ++i) {
220 unsigned Idx = Endian == llvm::endianness::little ? i : (NumBytes - 1 - i);
221 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
222 }
223}
224
225// FIXME: This should be in a separate file.
226namespace {
227
228class ELFPPCAsmBackend : public PPCAsmBackend {
229public:
230 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
231
232 std::unique_ptr<MCObjectTargetWriter>
233 createObjectTargetWriter() const override {
234 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType: TT.getOS());
235 bool Is64 = TT.isPPC64();
236 return createPPCELFObjectWriter(Is64Bit: Is64, OSABI);
237 }
238
239 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
240};
241
242class XCOFFPPCAsmBackend : public PPCAsmBackend {
243public:
244 XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
245 : PPCAsmBackend(T, TT) {}
246
247 std::unique_ptr<MCObjectTargetWriter>
248 createObjectTargetWriter() const override {
249 return createPPCXCOFFObjectWriter(Is64Bit: TT.isArch64Bit());
250 }
251
252 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
253};
254
255} // end anonymous namespace
256
257std::optional<MCFixupKind>
258ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
259 if (TT.isOSBinFormatELF()) {
260 unsigned Type;
261 if (TT.isPPC64()) {
262 Type = llvm::StringSwitch<unsigned>(Name)
263#define ELF_RELOC(X, Y) .Case(#X, Y)
264#include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
265#undef ELF_RELOC
266 .Case(S: "BFD_RELOC_NONE", Value: ELF::R_PPC64_NONE)
267 .Case(S: "BFD_RELOC_16", Value: ELF::R_PPC64_ADDR16)
268 .Case(S: "BFD_RELOC_32", Value: ELF::R_PPC64_ADDR32)
269 .Case(S: "BFD_RELOC_64", Value: ELF::R_PPC64_ADDR64)
270 .Default(Value: -1u);
271 } else {
272 Type = llvm::StringSwitch<unsigned>(Name)
273#define ELF_RELOC(X, Y) .Case(#X, Y)
274#include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
275#undef ELF_RELOC
276 .Case(S: "BFD_RELOC_NONE", Value: ELF::R_PPC_NONE)
277 .Case(S: "BFD_RELOC_16", Value: ELF::R_PPC_ADDR16)
278 .Case(S: "BFD_RELOC_32", Value: ELF::R_PPC_ADDR32)
279 .Default(Value: -1u);
280 }
281 if (Type != -1u)
282 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
283 }
284 return std::nullopt;
285}
286
287std::optional<MCFixupKind>
288XCOFFPPCAsmBackend::getFixupKind(StringRef Name) const {
289 return StringSwitch<std::optional<MCFixupKind>>(Name)
290 .Case(S: "R_REF", Value: (MCFixupKind)PPC::fixup_ppc_nofixup)
291 .Default(Value: std::nullopt);
292}
293
294MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
295 const MCSubtargetInfo &STI,
296 const MCRegisterInfo &MRI,
297 const MCTargetOptions &Options) {
298 const Triple &TT = STI.getTargetTriple();
299 if (TT.isOSBinFormatXCOFF())
300 return new XCOFFPPCAsmBackend(T, TT);
301
302 return new ELFPPCAsmBackend(T, TT);
303}
304