| 1 | //===-- RISCVInstPrinter.h - Convert RISC-V MCInst to asm syntax --*- C++ -*--// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This class prints a RISC-V MCInst to a .s file. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVINSTPRINTER_H |
| 14 | #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVINSTPRINTER_H |
| 15 | |
| 16 | #include "MCTargetDesc/RISCVMCTargetDesc.h" |
| 17 | #include "llvm/MC/MCInstPrinter.h" |
| 18 | |
| 19 | namespace llvm { |
| 20 | |
| 21 | class RISCVInstPrinter : public MCInstPrinter { |
| 22 | public: |
| 23 | RISCVInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, |
| 24 | const MCRegisterInfo &MRI) |
| 25 | : MCInstPrinter(MAI, MII, MRI) {} |
| 26 | |
| 27 | bool applyTargetSpecificCLOption(StringRef Opt) override; |
| 28 | |
| 29 | void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, |
| 30 | const MCSubtargetInfo &STI, raw_ostream &O) override; |
| 31 | void printRegName(raw_ostream &O, MCRegister Reg) override; |
| 32 | |
| 33 | void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 34 | raw_ostream &O); |
| 35 | void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo, |
| 36 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 37 | void printCSRSystemRegister(const MCInst *MI, unsigned OpNo, |
| 38 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 39 | void printFenceArg(const MCInst *MI, unsigned OpNo, |
| 40 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 41 | void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 42 | raw_ostream &O); |
| 43 | void printFRMArgLegacy(const MCInst *MI, unsigned OpNo, |
| 44 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 45 | void printFPImmOperand(const MCInst *MI, unsigned OpNo, |
| 46 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 47 | void printZeroOffsetMemOp(const MCInst *MI, unsigned OpNo, |
| 48 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 49 | void printVTypeI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 50 | raw_ostream &O); |
| 51 | void printXSfmmVType(const MCInst *MI, unsigned OpNo, |
| 52 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 53 | void printVMaskReg(const MCInst *MI, unsigned OpNo, |
| 54 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 55 | void printRegList(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 56 | raw_ostream &O); |
| 57 | void printStackAdj(const MCInst *MI, unsigned OpNo, |
| 58 | const MCSubtargetInfo &STI, raw_ostream &O, |
| 59 | bool Negate = false); |
| 60 | void printNegStackAdj(const MCInst *MI, unsigned OpNo, |
| 61 | const MCSubtargetInfo &STI, raw_ostream &O) { |
| 62 | return printStackAdj(MI, OpNo, STI, O, /*Negate*/ Negate: true); |
| 63 | } |
| 64 | void printRegReg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 65 | raw_ostream &O); |
| 66 | // Autogenerated by tblgen. |
| 67 | std::pair<const char *, uint64_t> |
| 68 | getMnemonic(const MCInst &MI) const override; |
| 69 | void printInstruction(const MCInst *MI, uint64_t Address, |
| 70 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 71 | bool printAliasInstr(const MCInst *MI, uint64_t Address, |
| 72 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 73 | void printCustomAliasOperand(const MCInst *MI, uint64_t Address, |
| 74 | unsigned OpIdx, unsigned PrintMethodIdx, |
| 75 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 76 | static const char *getRegisterName(MCRegister Reg); |
| 77 | static const char *getRegisterName(MCRegister Reg, unsigned AltIdx); |
| 78 | }; |
| 79 | } // namespace llvm |
| 80 | |
| 81 | #endif |
| 82 | |