1 | #ifdef GET_AT_DECL |
2 | enum ATValues { |
3 | S1E1R = 960, |
4 | S1E2R = 9152, |
5 | S1E3R = 13248, |
6 | S1E1W = 961, |
7 | S1E2W = 9153, |
8 | S1E3W = 13249, |
9 | S1E0R = 962, |
10 | S1E0W = 963, |
11 | S12E1R = 9156, |
12 | S12E1W = 9157, |
13 | S12E0R = 9158, |
14 | S12E0W = 9159, |
15 | S1E1RP = 968, |
16 | S1E1WP = 969, |
17 | S1E1A = 970, |
18 | S1E2A = 9162, |
19 | S1E3A = 13258, |
20 | }; |
21 | #endif |
22 | |
23 | #ifdef GET_BTI_DECL |
24 | enum BTIValues { |
25 | c = 2, |
26 | j = 4, |
27 | jc = 6, |
28 | }; |
29 | #endif |
30 | |
31 | #ifdef GET_DB_DECL |
32 | enum DBValues { |
33 | oshld = 1, |
34 | oshst = 2, |
35 | osh = 3, |
36 | nshld = 5, |
37 | nshst = 6, |
38 | nsh = 7, |
39 | ishld = 9, |
40 | ishst = 10, |
41 | ish = 11, |
42 | ld = 13, |
43 | st = 14, |
44 | sy = 15, |
45 | }; |
46 | #endif |
47 | |
48 | #ifdef GET_DBNXS_DECL |
49 | enum DBnXSValues { |
50 | oshnxs = 3, |
51 | nshnxs = 7, |
52 | ishnxs = 11, |
53 | synxs = 15, |
54 | }; |
55 | #endif |
56 | |
57 | #ifdef GET_DC_DECL |
58 | enum DCValues { |
59 | ZVA = 7073, |
60 | IVAC = 945, |
61 | ISW = 946, |
62 | CVAC = 7121, |
63 | CSW = 978, |
64 | CVAU = 7129, |
65 | CIVAC = 7153, |
66 | CISW = 1010, |
67 | CVAP = 7137, |
68 | CVADP = 7145, |
69 | IGVAC = 947, |
70 | IGSW = 948, |
71 | CGSW = 980, |
72 | CIGSW = 1012, |
73 | CGVAC = 7123, |
74 | CGVAP = 7139, |
75 | CGVADP = 7147, |
76 | CIGVAC = 7155, |
77 | GVA = 7075, |
78 | IGDVAC = 949, |
79 | IGDSW = 950, |
80 | CGDSW = 982, |
81 | CIGDSW = 1014, |
82 | CGDVAC = 7125, |
83 | CGDVAP = 7141, |
84 | CGDVADP = 7149, |
85 | CIGDVAC = 7157, |
86 | GZVA = 7076, |
87 | CIPAE = 9200, |
88 | CIGDPAE = 9207, |
89 | }; |
90 | #endif |
91 | |
92 | #ifdef GET_EXACTFPIMM_DECL |
93 | enum ExactFPImmValues { |
94 | zero = 0, |
95 | half = 1, |
96 | one = 2, |
97 | two = 3, |
98 | }; |
99 | #endif |
100 | |
101 | #ifdef GET_IC_DECL |
102 | enum ICValues { |
103 | IALLUIS = 904, |
104 | IALLU = 936, |
105 | IVAU = 7081, |
106 | }; |
107 | #endif |
108 | |
109 | #ifdef GET_ISB_DECL |
110 | enum ISBValues { |
111 | sy = 15, |
112 | }; |
113 | #endif |
114 | |
115 | #ifdef GET_PRFM_DECL |
116 | enum PRFMValues { |
117 | pldl1keep = 0, |
118 | pldl1strm = 1, |
119 | pldl2keep = 2, |
120 | pldl2strm = 3, |
121 | pldl3keep = 4, |
122 | pldl3strm = 5, |
123 | pldslckeep = 6, |
124 | pldslcstrm = 7, |
125 | plil1keep = 8, |
126 | plil1strm = 9, |
127 | plil2keep = 10, |
128 | plil2strm = 11, |
129 | plil3keep = 12, |
130 | plil3strm = 13, |
131 | plislckeep = 14, |
132 | plislcstrm = 15, |
133 | pstl1keep = 16, |
134 | pstl1strm = 17, |
135 | pstl2keep = 18, |
136 | pstl2strm = 19, |
137 | pstl3keep = 20, |
138 | pstl3strm = 21, |
139 | pstslckeep = 22, |
140 | pstslcstrm = 23, |
141 | }; |
142 | #endif |
143 | |
144 | #ifdef GET_PSB_DECL |
145 | enum PSBValues { |
146 | csync = 17, |
147 | }; |
148 | #endif |
149 | |
150 | #ifdef GET_PSTATEIMM0_1_DECL |
151 | enum PStateImm0_1Values { |
152 | ALLINT = 8, |
153 | PM = 72, |
154 | }; |
155 | #endif |
156 | |
157 | #ifdef GET_PSTATEIMM0_15_DECL |
158 | enum PStateImm0_15Values { |
159 | SPSel = 5, |
160 | DAIFSet = 30, |
161 | DAIFClr = 31, |
162 | PAN = 4, |
163 | UAO = 3, |
164 | DIT = 26, |
165 | SSBS = 25, |
166 | TCO = 28, |
167 | }; |
168 | #endif |
169 | |
170 | #ifdef GET_RPRFM_DECL |
171 | enum RPRFMValues { |
172 | pldkeep = 0, |
173 | pstkeep = 1, |
174 | pldstrm = 4, |
175 | pststrm = 5, |
176 | }; |
177 | #endif |
178 | |
179 | #ifdef GET_SVCR_DECL |
180 | enum SVCRValues { |
181 | SVCRSM = 1, |
182 | SVCRZA = 2, |
183 | SVCRSMZA = 3, |
184 | }; |
185 | #endif |
186 | |
187 | #ifdef GET_SVEPREDPAT_DECL |
188 | enum SVEPREDPATValues { |
189 | pow2 = 0, |
190 | vl1 = 1, |
191 | vl2 = 2, |
192 | vl3 = 3, |
193 | vl4 = 4, |
194 | vl5 = 5, |
195 | vl6 = 6, |
196 | vl7 = 7, |
197 | vl8 = 8, |
198 | vl16 = 9, |
199 | vl32 = 10, |
200 | vl64 = 11, |
201 | vl128 = 12, |
202 | vl256 = 13, |
203 | mul4 = 29, |
204 | mul3 = 30, |
205 | all = 31, |
206 | }; |
207 | #endif |
208 | |
209 | #ifdef GET_SVEPRFM_DECL |
210 | enum SVEPRFMValues { |
211 | pldl1keep = 0, |
212 | pldl1strm = 1, |
213 | pldl2keep = 2, |
214 | pldl2strm = 3, |
215 | pldl3keep = 4, |
216 | pldl3strm = 5, |
217 | pstl1keep = 8, |
218 | pstl1strm = 9, |
219 | pstl2keep = 10, |
220 | pstl2strm = 11, |
221 | pstl3keep = 12, |
222 | pstl3strm = 13, |
223 | }; |
224 | #endif |
225 | |
226 | #ifdef GET_SVEVECLENSPECIFIER_DECL |
227 | enum SVEVECLENSPECIFIERValues { |
228 | vlx2 = 0, |
229 | vlx4 = 1, |
230 | }; |
231 | #endif |
232 | |
233 | #ifdef GET_SYSREG_DECL |
234 | enum SysRegValues { |
235 | MDCCSR_EL0 = 38920, |
236 | DBGDTRRX_EL0 = 38952, |
237 | MDRAR_EL1 = 32896, |
238 | OSLSR_EL1 = 32908, |
239 | DBGAUTHSTATUS_EL1 = 33782, |
240 | PMCEID0_EL0 = 56550, |
241 | PMCEID1_EL0 = 56551, |
242 | PMMIR_EL1 = 50422, |
243 | MIDR_EL1 = 49152, |
244 | CCSIDR_EL1 = 51200, |
245 | CCSIDR2_EL1 = 51202, |
246 | CLIDR_EL1 = 51201, |
247 | CTR_EL0 = 55297, |
248 | MPIDR_EL1 = 49157, |
249 | REVIDR_EL1 = 49158, |
250 | AIDR_EL1 = 51207, |
251 | DCZID_EL0 = 55303, |
252 | ID_PFR0_EL1 = 49160, |
253 | ID_PFR1_EL1 = 49161, |
254 | ID_PFR2_EL1 = 49180, |
255 | ID_DFR0_EL1 = 49162, |
256 | ID_DFR1_EL1 = 49181, |
257 | ID_AFR0_EL1 = 49163, |
258 | ID_MMFR0_EL1 = 49164, |
259 | ID_MMFR1_EL1 = 49165, |
260 | ID_MMFR2_EL1 = 49166, |
261 | ID_MMFR3_EL1 = 49167, |
262 | ID_ISAR0_EL1 = 49168, |
263 | ID_ISAR1_EL1 = 49169, |
264 | ID_ISAR2_EL1 = 49170, |
265 | ID_ISAR3_EL1 = 49171, |
266 | ID_ISAR4_EL1 = 49172, |
267 | ID_ISAR5_EL1 = 49173, |
268 | ID_ISAR6_EL1 = 49175, |
269 | ID_AA64PFR0_EL1 = 49184, |
270 | ID_AA64PFR1_EL1 = 49185, |
271 | ID_AA64PFR2_EL1 = 49186, |
272 | ID_AA64DFR0_EL1 = 49192, |
273 | ID_AA64DFR1_EL1 = 49193, |
274 | ID_AA64DFR2_EL1 = 49194, |
275 | ID_AA64AFR0_EL1 = 49196, |
276 | ID_AA64AFR1_EL1 = 49197, |
277 | ID_AA64ISAR0_EL1 = 49200, |
278 | ID_AA64ISAR1_EL1 = 49201, |
279 | ID_AA64ISAR2_EL1 = 49202, |
280 | ID_AA64ISAR3_EL1 = 49203, |
281 | ID_AA64MMFR0_EL1 = 49208, |
282 | ID_AA64MMFR1_EL1 = 49209, |
283 | ID_AA64MMFR2_EL1 = 49210, |
284 | ID_AA64MMFR3_EL1 = 49211, |
285 | ID_AA64MMFR4_EL1 = 49212, |
286 | MVFR0_EL1 = 49176, |
287 | MVFR1_EL1 = 49177, |
288 | MVFR2_EL1 = 49178, |
289 | RVBAR_EL1 = 50689, |
290 | RVBAR_EL2 = 58881, |
291 | RVBAR_EL3 = 62977, |
292 | ISR_EL1 = 50696, |
293 | CNTPCT_EL0 = 57089, |
294 | CNTVCT_EL0 = 57090, |
295 | ID_MMFR4_EL1 = 49174, |
296 | ID_MMFR5_EL1 = 49182, |
297 | TRCSTATR = 34840, |
298 | TRCIDR8 = 34822, |
299 | TRCIDR9 = 34830, |
300 | TRCIDR10 = 34838, |
301 | TRCIDR11 = 34846, |
302 | TRCIDR12 = 34854, |
303 | TRCIDR13 = 34862, |
304 | TRCIDR0 = 34887, |
305 | TRCIDR1 = 34895, |
306 | TRCIDR2 = 34903, |
307 | TRCIDR3 = 34911, |
308 | TRCIDR4 = 34919, |
309 | TRCIDR5 = 34927, |
310 | TRCIDR6 = 34935, |
311 | TRCIDR7 = 34943, |
312 | TRCOSLSR = 34956, |
313 | TRCPDSR = 34988, |
314 | TRCDEVAFF0 = 35798, |
315 | TRCDEVAFF1 = 35806, |
316 | TRCLSR = 35822, |
317 | TRCAUTHSTATUS = 35830, |
318 | TRCDEVARCH = 35838, |
319 | TRCDEVID = 35735, |
320 | TRCDEVTYPE = 35743, |
321 | TRCPIDR4 = 35751, |
322 | TRCPIDR5 = 35759, |
323 | TRCPIDR6 = 35767, |
324 | TRCPIDR7 = 35775, |
325 | TRCPIDR0 = 35783, |
326 | TRCPIDR1 = 35791, |
327 | TRCPIDR2 = 35799, |
328 | TRCPIDR3 = 35807, |
329 | TRCCIDR0 = 35815, |
330 | TRCCIDR1 = 35823, |
331 | TRCCIDR2 = 35831, |
332 | TRCCIDR3 = 35839, |
333 | ICC_IAR1_EL1 = 50784, |
334 | ICC_IAR0_EL1 = 50752, |
335 | ICC_HPPIR1_EL1 = 50786, |
336 | ICC_HPPIR0_EL1 = 50754, |
337 | ICC_RPR_EL1 = 50779, |
338 | ICH_VTR_EL2 = 58969, |
339 | ICH_EISR_EL2 = 58971, |
340 | ICH_ELRSR_EL2 = 58973, |
341 | ID_AA64ZFR0_EL1 = 49188, |
342 | LORID_EL1 = 50471, |
343 | ERRIDR_EL1 = 49816, |
344 | ERXFR_EL1 = 49824, |
345 | RNDR = 55584, |
346 | RNDRRS = 55585, |
347 | SCXTNUM_EL0 = 56967, |
348 | SCXTNUM_EL1 = 50823, |
349 | SCXTNUM_EL2 = 59015, |
350 | SCXTNUM_EL3 = 63111, |
351 | SCXTNUM_EL12 = 61063, |
352 | GPCCR_EL3 = 61710, |
353 | GPTBR_EL3 = 61708, |
354 | MFAR_EL3 = 62213, |
355 | MECIDR_EL2 = 58695, |
356 | MECID_P0_EL2 = 58688, |
357 | MECID_A0_EL2 = 58689, |
358 | MECID_P1_EL2 = 58690, |
359 | MECID_A1_EL2 = 58691, |
360 | VMECID_P_EL2 = 58696, |
361 | VMECID_A_EL2 = 58697, |
362 | MECID_RL_A_EL3 = 62801, |
363 | ID_AA64SMFR0_EL1 = 49189, |
364 | DBGDTRTX_EL0 = 38952, |
365 | OSLAR_EL1 = 32900, |
366 | PMSWINC_EL0 = 56548, |
367 | TRCOSLAR = 34948, |
368 | TRCLAR = 35814, |
369 | ICC_EOIR1_EL1 = 50785, |
370 | ICC_EOIR0_EL1 = 50753, |
371 | ICC_DIR_EL1 = 50777, |
372 | ICC_SGI1R_EL1 = 50781, |
373 | ICC_ASGI1R_EL1 = 50782, |
374 | ICC_SGI0R_EL1 = 50783, |
375 | OSDTRRX_EL1 = 32770, |
376 | OSDTRTX_EL1 = 32794, |
377 | TEECR32_EL1 = 36864, |
378 | MDCCINT_EL1 = 32784, |
379 | MDSCR_EL1 = 32786, |
380 | DBGDTR_EL0 = 38944, |
381 | OSECCR_EL1 = 32818, |
382 | DBGVCR32_EL2 = 41016, |
383 | DBGBVR0_EL1 = 32772, |
384 | DBGBCR0_EL1 = 32773, |
385 | DBGWVR0_EL1 = 32774, |
386 | DBGWCR0_EL1 = 32775, |
387 | DBGBVR1_EL1 = 32780, |
388 | DBGBCR1_EL1 = 32781, |
389 | DBGWVR1_EL1 = 32782, |
390 | DBGWCR1_EL1 = 32783, |
391 | DBGBVR2_EL1 = 32788, |
392 | DBGBCR2_EL1 = 32789, |
393 | DBGWVR2_EL1 = 32790, |
394 | DBGWCR2_EL1 = 32791, |
395 | DBGBVR3_EL1 = 32796, |
396 | DBGBCR3_EL1 = 32797, |
397 | DBGWVR3_EL1 = 32798, |
398 | DBGWCR3_EL1 = 32799, |
399 | DBGBVR4_EL1 = 32804, |
400 | DBGBCR4_EL1 = 32805, |
401 | DBGWVR4_EL1 = 32806, |
402 | DBGWCR4_EL1 = 32807, |
403 | DBGBVR5_EL1 = 32812, |
404 | DBGBCR5_EL1 = 32813, |
405 | DBGWVR5_EL1 = 32814, |
406 | DBGWCR5_EL1 = 32815, |
407 | DBGBVR6_EL1 = 32820, |
408 | DBGBCR6_EL1 = 32821, |
409 | DBGWVR6_EL1 = 32822, |
410 | DBGWCR6_EL1 = 32823, |
411 | DBGBVR7_EL1 = 32828, |
412 | DBGBCR7_EL1 = 32829, |
413 | DBGWVR7_EL1 = 32830, |
414 | DBGWCR7_EL1 = 32831, |
415 | DBGBVR8_EL1 = 32836, |
416 | DBGBCR8_EL1 = 32837, |
417 | DBGWVR8_EL1 = 32838, |
418 | DBGWCR8_EL1 = 32839, |
419 | DBGBVR9_EL1 = 32844, |
420 | DBGBCR9_EL1 = 32845, |
421 | DBGWVR9_EL1 = 32846, |
422 | DBGWCR9_EL1 = 32847, |
423 | DBGBVR10_EL1 = 32852, |
424 | DBGBCR10_EL1 = 32853, |
425 | DBGWVR10_EL1 = 32854, |
426 | DBGWCR10_EL1 = 32855, |
427 | DBGBVR11_EL1 = 32860, |
428 | DBGBCR11_EL1 = 32861, |
429 | DBGWVR11_EL1 = 32862, |
430 | DBGWCR11_EL1 = 32863, |
431 | DBGBVR12_EL1 = 32868, |
432 | DBGBCR12_EL1 = 32869, |
433 | DBGWVR12_EL1 = 32870, |
434 | DBGWCR12_EL1 = 32871, |
435 | DBGBVR13_EL1 = 32876, |
436 | DBGBCR13_EL1 = 32877, |
437 | DBGWVR13_EL1 = 32878, |
438 | DBGWCR13_EL1 = 32879, |
439 | DBGBVR14_EL1 = 32884, |
440 | DBGBCR14_EL1 = 32885, |
441 | DBGWVR14_EL1 = 32886, |
442 | DBGWCR14_EL1 = 32887, |
443 | DBGBVR15_EL1 = 32892, |
444 | DBGBCR15_EL1 = 32893, |
445 | DBGWVR15_EL1 = 32894, |
446 | DBGWCR15_EL1 = 32895, |
447 | TEEHBR32_EL1 = 36992, |
448 | OSDLR_EL1 = 32924, |
449 | DBGPRCR_EL1 = 32932, |
450 | DBGCLAIMSET_EL1 = 33734, |
451 | DBGCLAIMCLR_EL1 = 33742, |
452 | CSSELR_EL1 = 53248, |
453 | VPIDR_EL2 = 57344, |
454 | VMPIDR_EL2 = 57349, |
455 | CPACR_EL1 = 49282, |
456 | SCTLR_EL1 = 49280, |
457 | SCTLR_EL2 = 57472, |
458 | SCTLR_EL3 = 61568, |
459 | ACTLR_EL1 = 49281, |
460 | ACTLR_EL2 = 57473, |
461 | ACTLR_EL3 = 61569, |
462 | HCR_EL2 = 57480, |
463 | HCRX_EL2 = 57490, |
464 | SCR_EL3 = 61576, |
465 | MDCR_EL2 = 57481, |
466 | SDER32_EL3 = 61577, |
467 | CPTR_EL2 = 57482, |
468 | CPTR_EL3 = 61578, |
469 | HSTR_EL2 = 57483, |
470 | HACR_EL2 = 57487, |
471 | MDCR_EL3 = 61593, |
472 | TTBR0_EL1 = 49408, |
473 | TTBR0_EL3 = 61696, |
474 | TTBR0_EL2 = 57600, |
475 | VTTBR_EL2 = 57608, |
476 | TTBR1_EL1 = 49409, |
477 | TCR_EL1 = 49410, |
478 | TCR_EL2 = 57602, |
479 | TCR_EL3 = 61698, |
480 | VTCR_EL2 = 57610, |
481 | DACR32_EL2 = 57728, |
482 | SPSR_EL1 = 49664, |
483 | SPSR_EL2 = 57856, |
484 | SPSR_EL3 = 61952, |
485 | ELR_EL1 = 49665, |
486 | ELR_EL2 = 57857, |
487 | ELR_EL3 = 61953, |
488 | SP_EL0 = 49672, |
489 | SP_EL1 = 57864, |
490 | SP_EL2 = 61960, |
491 | SPSel = 49680, |
492 | NZCV = 55824, |
493 | DAIF = 55825, |
494 | CurrentEL = 49682, |
495 | SPSR_irq = 57880, |
496 | SPSR_abt = 57881, |
497 | SPSR_und = 57882, |
498 | SPSR_fiq = 57883, |
499 | FPCR = 55840, |
500 | FPSR = 55841, |
501 | DSPSR_EL0 = 55848, |
502 | DLR_EL0 = 55849, |
503 | IFSR32_EL2 = 57985, |
504 | AFSR0_EL1 = 49800, |
505 | AFSR0_EL2 = 57992, |
506 | AFSR0_EL3 = 62088, |
507 | AFSR1_EL1 = 49801, |
508 | AFSR1_EL2 = 57993, |
509 | AFSR1_EL3 = 62089, |
510 | ESR_EL1 = 49808, |
511 | ESR_EL2 = 58000, |
512 | ESR_EL3 = 62096, |
513 | FPEXC32_EL2 = 58008, |
514 | FAR_EL1 = 49920, |
515 | FAR_EL2 = 58112, |
516 | FAR_EL3 = 62208, |
517 | HPFAR_EL2 = 58116, |
518 | PAR_EL1 = 50080, |
519 | PMCR_EL0 = 56544, |
520 | PMCNTENSET_EL0 = 56545, |
521 | PMCNTENCLR_EL0 = 56546, |
522 | PMOVSCLR_EL0 = 56547, |
523 | PMSELR_EL0 = 56549, |
524 | PMCCNTR_EL0 = 56552, |
525 | PMXEVTYPER_EL0 = 56553, |
526 | PMXEVCNTR_EL0 = 56554, |
527 | PMUSERENR_EL0 = 56560, |
528 | PMINTENSET_EL1 = 50417, |
529 | PMINTENCLR_EL1 = 50418, |
530 | PMOVSSET_EL0 = 56563, |
531 | MAIR_EL1 = 50448, |
532 | MAIR_EL2 = 58640, |
533 | MAIR_EL3 = 62736, |
534 | AMAIR_EL1 = 50456, |
535 | AMAIR_EL2 = 58648, |
536 | AMAIR_EL3 = 62744, |
537 | VBAR_EL1 = 50688, |
538 | VBAR_EL2 = 58880, |
539 | VBAR_EL3 = 62976, |
540 | RMR_EL1 = 50690, |
541 | RMR_EL2 = 58882, |
542 | RMR_EL3 = 62978, |
543 | CONTEXTIDR_EL1 = 50817, |
544 | TPIDR_EL0 = 56962, |
545 | TPIDR_EL2 = 59010, |
546 | TPIDR_EL3 = 63106, |
547 | TPIDRRO_EL0 = 56963, |
548 | TPIDR_EL1 = 50820, |
549 | CNTFRQ_EL0 = 57088, |
550 | CNTVOFF_EL2 = 59139, |
551 | CNTKCTL_EL1 = 50952, |
552 | CNTHCTL_EL2 = 59144, |
553 | CNTP_TVAL_EL0 = 57104, |
554 | CNTHP_TVAL_EL2 = 59152, |
555 | CNTPS_TVAL_EL1 = 65296, |
556 | CNTP_CTL_EL0 = 57105, |
557 | CNTHP_CTL_EL2 = 59153, |
558 | CNTPS_CTL_EL1 = 65297, |
559 | CNTP_CVAL_EL0 = 57106, |
560 | CNTHP_CVAL_EL2 = 59154, |
561 | CNTPS_CVAL_EL1 = 65298, |
562 | CNTV_TVAL_EL0 = 57112, |
563 | CNTV_CTL_EL0 = 57113, |
564 | CNTV_CVAL_EL0 = 57114, |
565 | PMEVCNTR0_EL0 = 57152, |
566 | PMEVCNTR1_EL0 = 57153, |
567 | PMEVCNTR2_EL0 = 57154, |
568 | PMEVCNTR3_EL0 = 57155, |
569 | PMEVCNTR4_EL0 = 57156, |
570 | PMEVCNTR5_EL0 = 57157, |
571 | PMEVCNTR6_EL0 = 57158, |
572 | PMEVCNTR7_EL0 = 57159, |
573 | PMEVCNTR8_EL0 = 57160, |
574 | PMEVCNTR9_EL0 = 57161, |
575 | PMEVCNTR10_EL0 = 57162, |
576 | PMEVCNTR11_EL0 = 57163, |
577 | PMEVCNTR12_EL0 = 57164, |
578 | PMEVCNTR13_EL0 = 57165, |
579 | PMEVCNTR14_EL0 = 57166, |
580 | PMEVCNTR15_EL0 = 57167, |
581 | PMEVCNTR16_EL0 = 57168, |
582 | PMEVCNTR17_EL0 = 57169, |
583 | PMEVCNTR18_EL0 = 57170, |
584 | PMEVCNTR19_EL0 = 57171, |
585 | PMEVCNTR20_EL0 = 57172, |
586 | PMEVCNTR21_EL0 = 57173, |
587 | PMEVCNTR22_EL0 = 57174, |
588 | PMEVCNTR23_EL0 = 57175, |
589 | PMEVCNTR24_EL0 = 57176, |
590 | PMEVCNTR25_EL0 = 57177, |
591 | PMEVCNTR26_EL0 = 57178, |
592 | PMEVCNTR27_EL0 = 57179, |
593 | PMEVCNTR28_EL0 = 57180, |
594 | PMEVCNTR29_EL0 = 57181, |
595 | PMEVCNTR30_EL0 = 57182, |
596 | PMCCFILTR_EL0 = 57215, |
597 | PMEVTYPER0_EL0 = 57184, |
598 | PMEVTYPER1_EL0 = 57185, |
599 | PMEVTYPER2_EL0 = 57186, |
600 | PMEVTYPER3_EL0 = 57187, |
601 | PMEVTYPER4_EL0 = 57188, |
602 | PMEVTYPER5_EL0 = 57189, |
603 | PMEVTYPER6_EL0 = 57190, |
604 | PMEVTYPER7_EL0 = 57191, |
605 | PMEVTYPER8_EL0 = 57192, |
606 | PMEVTYPER9_EL0 = 57193, |
607 | PMEVTYPER10_EL0 = 57194, |
608 | PMEVTYPER11_EL0 = 57195, |
609 | PMEVTYPER12_EL0 = 57196, |
610 | PMEVTYPER13_EL0 = 57197, |
611 | PMEVTYPER14_EL0 = 57198, |
612 | PMEVTYPER15_EL0 = 57199, |
613 | PMEVTYPER16_EL0 = 57200, |
614 | PMEVTYPER17_EL0 = 57201, |
615 | PMEVTYPER18_EL0 = 57202, |
616 | PMEVTYPER19_EL0 = 57203, |
617 | PMEVTYPER20_EL0 = 57204, |
618 | PMEVTYPER21_EL0 = 57205, |
619 | PMEVTYPER22_EL0 = 57206, |
620 | PMEVTYPER23_EL0 = 57207, |
621 | PMEVTYPER24_EL0 = 57208, |
622 | PMEVTYPER25_EL0 = 57209, |
623 | PMEVTYPER26_EL0 = 57210, |
624 | PMEVTYPER27_EL0 = 57211, |
625 | PMEVTYPER28_EL0 = 57212, |
626 | PMEVTYPER29_EL0 = 57213, |
627 | PMEVTYPER30_EL0 = 57214, |
628 | TRCPRGCTLR = 34824, |
629 | TRCPROCSELR = 34832, |
630 | TRCCONFIGR = 34848, |
631 | TRCAUXCTLR = 34864, |
632 | TRCEVENTCTL0R = 34880, |
633 | TRCEVENTCTL1R = 34888, |
634 | TRCSTALLCTLR = 34904, |
635 | TRCTSCTLR = 34912, |
636 | TRCSYNCPR = 34920, |
637 | TRCCCCTLR = 34928, |
638 | TRCBBCTLR = 34936, |
639 | TRCTRACEIDR = 34817, |
640 | TRCQCTLR = 34825, |
641 | TRCVICTLR = 34818, |
642 | TRCVIIECTLR = 34826, |
643 | TRCVISSCTLR = 34834, |
644 | TRCVIPCSSCTLR = 34842, |
645 | TRCVDCTLR = 34882, |
646 | TRCVDSACCTLR = 34890, |
647 | TRCVDARCCTLR = 34898, |
648 | TRCSEQEVR0 = 34820, |
649 | TRCSEQEVR1 = 34828, |
650 | TRCSEQEVR2 = 34836, |
651 | TRCSEQRSTEVR = 34868, |
652 | TRCSEQSTR = 34876, |
653 | TRCEXTINSELR = 34884, |
654 | TRCCNTRLDVR0 = 34821, |
655 | TRCCNTRLDVR1 = 34829, |
656 | TRCCNTRLDVR2 = 34837, |
657 | TRCCNTRLDVR3 = 34845, |
658 | TRCCNTCTLR0 = 34853, |
659 | TRCCNTCTLR1 = 34861, |
660 | TRCCNTCTLR2 = 34869, |
661 | TRCCNTCTLR3 = 34877, |
662 | TRCCNTVR0 = 34885, |
663 | TRCCNTVR1 = 34893, |
664 | TRCCNTVR2 = 34901, |
665 | TRCCNTVR3 = 34909, |
666 | TRCIMSPEC0 = 34823, |
667 | TRCIMSPEC1 = 34831, |
668 | TRCIMSPEC2 = 34839, |
669 | TRCIMSPEC3 = 34847, |
670 | TRCIMSPEC4 = 34855, |
671 | TRCIMSPEC5 = 34863, |
672 | TRCIMSPEC6 = 34871, |
673 | TRCIMSPEC7 = 34879, |
674 | TRCRSCTLR2 = 34960, |
675 | TRCRSCTLR3 = 34968, |
676 | TRCRSCTLR4 = 34976, |
677 | TRCRSCTLR5 = 34984, |
678 | TRCRSCTLR6 = 34992, |
679 | TRCRSCTLR7 = 35000, |
680 | TRCRSCTLR8 = 35008, |
681 | TRCRSCTLR9 = 35016, |
682 | TRCRSCTLR10 = 35024, |
683 | TRCRSCTLR11 = 35032, |
684 | TRCRSCTLR12 = 35040, |
685 | TRCRSCTLR13 = 35048, |
686 | TRCRSCTLR14 = 35056, |
687 | TRCRSCTLR15 = 35064, |
688 | TRCRSCTLR16 = 34945, |
689 | TRCRSCTLR17 = 34953, |
690 | TRCRSCTLR18 = 34961, |
691 | TRCRSCTLR19 = 34969, |
692 | TRCRSCTLR20 = 34977, |
693 | TRCRSCTLR21 = 34985, |
694 | TRCRSCTLR22 = 34993, |
695 | TRCRSCTLR23 = 35001, |
696 | TRCRSCTLR24 = 35009, |
697 | TRCRSCTLR25 = 35017, |
698 | TRCRSCTLR26 = 35025, |
699 | TRCRSCTLR27 = 35033, |
700 | TRCRSCTLR28 = 35041, |
701 | TRCRSCTLR29 = 35049, |
702 | TRCRSCTLR30 = 35057, |
703 | TRCRSCTLR31 = 35065, |
704 | TRCSSCCR0 = 34946, |
705 | TRCSSCCR1 = 34954, |
706 | TRCSSCCR2 = 34962, |
707 | TRCSSCCR3 = 34970, |
708 | TRCSSCCR4 = 34978, |
709 | TRCSSCCR5 = 34986, |
710 | TRCSSCCR6 = 34994, |
711 | TRCSSCCR7 = 35002, |
712 | TRCSSCSR0 = 35010, |
713 | TRCSSCSR1 = 35018, |
714 | TRCSSCSR2 = 35026, |
715 | TRCSSCSR3 = 35034, |
716 | TRCSSCSR4 = 35042, |
717 | TRCSSCSR5 = 35050, |
718 | TRCSSCSR6 = 35058, |
719 | TRCSSCSR7 = 35066, |
720 | TRCSSPCICR0 = 34947, |
721 | TRCSSPCICR1 = 34955, |
722 | TRCSSPCICR2 = 34963, |
723 | TRCSSPCICR3 = 34971, |
724 | TRCSSPCICR4 = 34979, |
725 | TRCSSPCICR5 = 34987, |
726 | TRCSSPCICR6 = 34995, |
727 | TRCSSPCICR7 = 35003, |
728 | TRCPDCR = 34980, |
729 | TRCACVR0 = 35072, |
730 | TRCACVR1 = 35088, |
731 | TRCACVR2 = 35104, |
732 | TRCACVR3 = 35120, |
733 | TRCACVR4 = 35136, |
734 | TRCACVR5 = 35152, |
735 | TRCACVR6 = 35168, |
736 | TRCACVR7 = 35184, |
737 | TRCACVR8 = 35073, |
738 | TRCACVR9 = 35089, |
739 | TRCACVR10 = 35105, |
740 | TRCACVR11 = 35121, |
741 | TRCACVR12 = 35137, |
742 | TRCACVR13 = 35153, |
743 | TRCACVR14 = 35169, |
744 | TRCACVR15 = 35185, |
745 | TRCACATR0 = 35074, |
746 | TRCACATR1 = 35090, |
747 | TRCACATR2 = 35106, |
748 | TRCACATR3 = 35122, |
749 | TRCACATR4 = 35138, |
750 | TRCACATR5 = 35154, |
751 | TRCACATR6 = 35170, |
752 | TRCACATR7 = 35186, |
753 | TRCACATR8 = 35075, |
754 | TRCACATR9 = 35091, |
755 | TRCACATR10 = 35107, |
756 | TRCACATR11 = 35123, |
757 | TRCACATR12 = 35139, |
758 | TRCACATR13 = 35155, |
759 | TRCACATR14 = 35171, |
760 | TRCACATR15 = 35187, |
761 | TRCDVCVR0 = 35076, |
762 | TRCDVCVR1 = 35108, |
763 | TRCDVCVR2 = 35140, |
764 | TRCDVCVR3 = 35172, |
765 | TRCDVCVR4 = 35077, |
766 | TRCDVCVR5 = 35109, |
767 | TRCDVCVR6 = 35141, |
768 | TRCDVCVR7 = 35173, |
769 | TRCDVCMR0 = 35078, |
770 | TRCDVCMR1 = 35110, |
771 | TRCDVCMR2 = 35142, |
772 | TRCDVCMR3 = 35174, |
773 | TRCDVCMR4 = 35079, |
774 | TRCDVCMR5 = 35111, |
775 | TRCDVCMR6 = 35143, |
776 | TRCDVCMR7 = 35175, |
777 | TRCCIDCVR0 = 35200, |
778 | TRCCIDCVR1 = 35216, |
779 | TRCCIDCVR2 = 35232, |
780 | TRCCIDCVR3 = 35248, |
781 | TRCCIDCVR4 = 35264, |
782 | TRCCIDCVR5 = 35280, |
783 | TRCCIDCVR6 = 35296, |
784 | TRCCIDCVR7 = 35312, |
785 | TRCVMIDCVR0 = 35201, |
786 | TRCVMIDCVR1 = 35217, |
787 | TRCVMIDCVR2 = 35233, |
788 | TRCVMIDCVR3 = 35249, |
789 | TRCVMIDCVR4 = 35265, |
790 | TRCVMIDCVR5 = 35281, |
791 | TRCVMIDCVR6 = 35297, |
792 | TRCVMIDCVR7 = 35313, |
793 | TRCCIDCCTLR0 = 35202, |
794 | TRCCIDCCTLR1 = 35210, |
795 | TRCVMIDCCTLR0 = 35218, |
796 | TRCVMIDCCTLR1 = 35226, |
797 | TRCITCTRL = 35716, |
798 | TRCCLAIMSET = 35782, |
799 | TRCCLAIMCLR = 35790, |
800 | ICC_BPR1_EL1 = 50787, |
801 | ICC_BPR0_EL1 = 50755, |
802 | ICC_PMR_EL1 = 49712, |
803 | ICC_CTLR_EL1 = 50788, |
804 | ICC_CTLR_EL3 = 63076, |
805 | ICC_SRE_EL1 = 50789, |
806 | ICC_SRE_EL2 = 58957, |
807 | ICC_SRE_EL3 = 63077, |
808 | ICC_IGRPEN0_EL1 = 50790, |
809 | ICC_IGRPEN1_EL1 = 50791, |
810 | ICC_IGRPEN1_EL3 = 63079, |
811 | ICC_AP0R0_EL1 = 50756, |
812 | ICC_AP0R1_EL1 = 50757, |
813 | ICC_AP0R2_EL1 = 50758, |
814 | ICC_AP0R3_EL1 = 50759, |
815 | ICC_AP1R0_EL1 = 50760, |
816 | ICC_AP1R1_EL1 = 50761, |
817 | ICC_AP1R2_EL1 = 50762, |
818 | ICC_AP1R3_EL1 = 50763, |
819 | ICH_AP0R0_EL2 = 58944, |
820 | ICH_AP0R1_EL2 = 58945, |
821 | ICH_AP0R2_EL2 = 58946, |
822 | ICH_AP0R3_EL2 = 58947, |
823 | ICH_AP1R0_EL2 = 58952, |
824 | ICH_AP1R1_EL2 = 58953, |
825 | ICH_AP1R2_EL2 = 58954, |
826 | ICH_AP1R3_EL2 = 58955, |
827 | ICH_HCR_EL2 = 58968, |
828 | ICH_MISR_EL2 = 58970, |
829 | ICH_VMCR_EL2 = 58975, |
830 | ICH_LR0_EL2 = 58976, |
831 | ICH_LR1_EL2 = 58977, |
832 | ICH_LR2_EL2 = 58978, |
833 | ICH_LR3_EL2 = 58979, |
834 | ICH_LR4_EL2 = 58980, |
835 | ICH_LR5_EL2 = 58981, |
836 | ICH_LR6_EL2 = 58982, |
837 | ICH_LR7_EL2 = 58983, |
838 | ICH_LR8_EL2 = 58984, |
839 | ICH_LR9_EL2 = 58985, |
840 | ICH_LR10_EL2 = 58986, |
841 | ICH_LR11_EL2 = 58987, |
842 | ICH_LR12_EL2 = 58988, |
843 | ICH_LR13_EL2 = 58989, |
844 | ICH_LR14_EL2 = 58990, |
845 | ICH_LR15_EL2 = 58991, |
846 | VSCTLR_EL2 = 57600, |
847 | MPUIR_EL1 = 49156, |
848 | MPUIR_EL2 = 57348, |
849 | PRENR_EL1 = 49929, |
850 | PRENR_EL2 = 58121, |
851 | PRSELR_EL1 = 49937, |
852 | PRSELR_EL2 = 58129, |
853 | PRBAR_EL1 = 49984, |
854 | PRBAR_EL2 = 58176, |
855 | PRLAR_EL1 = 49985, |
856 | PRLAR_EL2 = 58177, |
857 | PRBAR1_EL1 = 49988, |
858 | PRLAR1_EL1 = 49989, |
859 | PRBAR1_EL2 = 58180, |
860 | PRLAR1_EL2 = 58181, |
861 | PRBAR2_EL1 = 49992, |
862 | PRLAR2_EL1 = 49993, |
863 | PRBAR2_EL2 = 58184, |
864 | PRLAR2_EL2 = 58185, |
865 | PRBAR3_EL1 = 49996, |
866 | PRLAR3_EL1 = 49997, |
867 | PRBAR3_EL2 = 58188, |
868 | PRLAR3_EL2 = 58189, |
869 | PRBAR4_EL1 = 50000, |
870 | PRLAR4_EL1 = 50001, |
871 | PRBAR4_EL2 = 58192, |
872 | PRLAR4_EL2 = 58193, |
873 | PRBAR5_EL1 = 50004, |
874 | PRLAR5_EL1 = 50005, |
875 | PRBAR5_EL2 = 58196, |
876 | PRLAR5_EL2 = 58197, |
877 | PRBAR6_EL1 = 50008, |
878 | PRLAR6_EL1 = 50009, |
879 | PRBAR6_EL2 = 58200, |
880 | PRLAR6_EL2 = 58201, |
881 | PRBAR7_EL1 = 50012, |
882 | PRLAR7_EL1 = 50013, |
883 | PRBAR7_EL2 = 58204, |
884 | PRLAR7_EL2 = 58205, |
885 | PRBAR8_EL1 = 50016, |
886 | PRLAR8_EL1 = 50017, |
887 | PRBAR8_EL2 = 58208, |
888 | PRLAR8_EL2 = 58209, |
889 | PRBAR9_EL1 = 50020, |
890 | PRLAR9_EL1 = 50021, |
891 | PRBAR9_EL2 = 58212, |
892 | PRLAR9_EL2 = 58213, |
893 | PRBAR10_EL1 = 50024, |
894 | PRLAR10_EL1 = 50025, |
895 | PRBAR10_EL2 = 58216, |
896 | PRLAR10_EL2 = 58217, |
897 | PRBAR11_EL1 = 50028, |
898 | PRLAR11_EL1 = 50029, |
899 | PRBAR11_EL2 = 58220, |
900 | PRLAR11_EL2 = 58221, |
901 | PRBAR12_EL1 = 50032, |
902 | PRLAR12_EL1 = 50033, |
903 | PRBAR12_EL2 = 58224, |
904 | PRLAR12_EL2 = 58225, |
905 | PRBAR13_EL1 = 50036, |
906 | PRLAR13_EL1 = 50037, |
907 | PRBAR13_EL2 = 58228, |
908 | PRLAR13_EL2 = 58229, |
909 | PRBAR14_EL1 = 50040, |
910 | PRLAR14_EL1 = 50041, |
911 | PRBAR14_EL2 = 58232, |
912 | PRLAR14_EL2 = 58233, |
913 | PRBAR15_EL1 = 50044, |
914 | PRLAR15_EL1 = 50045, |
915 | PRBAR15_EL2 = 58236, |
916 | PRLAR15_EL2 = 58237, |
917 | PAN = 49683, |
918 | LORSA_EL1 = 50464, |
919 | LOREA_EL1 = 50465, |
920 | LORN_EL1 = 50466, |
921 | LORC_EL1 = 50467, |
922 | TTBR1_EL2 = 57601, |
923 | CNTHV_TVAL_EL2 = 59160, |
924 | CNTHV_CVAL_EL2 = 59162, |
925 | CNTHV_CTL_EL2 = 59161, |
926 | SCTLR_EL12 = 59520, |
927 | CPACR_EL12 = 59522, |
928 | TTBR0_EL12 = 59648, |
929 | TTBR1_EL12 = 59649, |
930 | TCR_EL12 = 59650, |
931 | AFSR0_EL12 = 60040, |
932 | AFSR1_EL12 = 60041, |
933 | ESR_EL12 = 60048, |
934 | FAR_EL12 = 60160, |
935 | MAIR_EL12 = 60688, |
936 | AMAIR_EL12 = 60696, |
937 | VBAR_EL12 = 60928, |
938 | CONTEXTIDR_EL12 = 61057, |
939 | CNTKCTL_EL12 = 61192, |
940 | CNTP_TVAL_EL02 = 61200, |
941 | CNTP_CTL_EL02 = 61201, |
942 | CNTP_CVAL_EL02 = 61202, |
943 | CNTV_TVAL_EL02 = 61208, |
944 | CNTV_CTL_EL02 = 61209, |
945 | CNTV_CVAL_EL02 = 61210, |
946 | SPSR_EL12 = 59904, |
947 | ELR_EL12 = 59905, |
948 | CONTEXTIDR_EL2 = 59009, |
949 | UAO = 49684, |
950 | PMBLIMITR_EL1 = 50384, |
951 | PMBPTR_EL1 = 50385, |
952 | PMBSR_EL1 = 50387, |
953 | PMBIDR_EL1 = 50391, |
954 | PMSCR_EL2 = 58568, |
955 | PMSCR_EL12 = 60616, |
956 | PMSCR_EL1 = 50376, |
957 | PMSICR_EL1 = 50378, |
958 | PMSIRR_EL1 = 50379, |
959 | PMSFCR_EL1 = 50380, |
960 | PMSEVFR_EL1 = 50381, |
961 | PMSLATFR_EL1 = 50382, |
962 | PMSIDR_EL1 = 50383, |
963 | ERRSELR_EL1 = 49817, |
964 | ERXCTLR_EL1 = 49825, |
965 | ERXSTATUS_EL1 = 49826, |
966 | ERXADDR_EL1 = 49827, |
967 | ERXMISC0_EL1 = 49832, |
968 | ERXMISC1_EL1 = 49833, |
969 | DISR_EL1 = 50697, |
970 | VDISR_EL2 = 58889, |
971 | VSESR_EL2 = 58003, |
972 | APIAKeyLo_EL1 = 49416, |
973 | APIAKeyHi_EL1 = 49417, |
974 | APIBKeyLo_EL1 = 49418, |
975 | APIBKeyHi_EL1 = 49419, |
976 | APDAKeyLo_EL1 = 49424, |
977 | APDAKeyHi_EL1 = 49425, |
978 | APDBKeyLo_EL1 = 49426, |
979 | APDBKeyHi_EL1 = 49427, |
980 | APGAKeyLo_EL1 = 49432, |
981 | APGAKeyHi_EL1 = 49433, |
982 | VSTCR_EL2 = 57650, |
983 | VSTTBR_EL2 = 57648, |
984 | CNTHVS_TVAL_EL2 = 59168, |
985 | CNTHVS_CVAL_EL2 = 59170, |
986 | CNTHVS_CTL_EL2 = 59169, |
987 | CNTHPS_TVAL_EL2 = 59176, |
988 | CNTHPS_CVAL_EL2 = 59178, |
989 | CNTHPS_CTL_EL2 = 59177, |
990 | SDER32_EL2 = 57497, |
991 | ERXPFGCTL_EL1 = 49829, |
992 | ERXPFGCDN_EL1 = 49830, |
993 | ERXMISC2_EL1 = 49834, |
994 | ERXMISC3_EL1 = 49835, |
995 | ERXPFGF_EL1 = 49828, |
996 | MPAM0_EL1 = 50473, |
997 | MPAM1_EL1 = 50472, |
998 | MPAM2_EL2 = 58664, |
999 | MPAM3_EL3 = 62760, |
1000 | MPAM1_EL12 = 60712, |
1001 | MPAMHCR_EL2 = 58656, |
1002 | MPAMVPMV_EL2 = 58657, |
1003 | MPAMVPM0_EL2 = 58672, |
1004 | MPAMVPM1_EL2 = 58673, |
1005 | MPAMVPM2_EL2 = 58674, |
1006 | MPAMVPM3_EL2 = 58675, |
1007 | MPAMVPM4_EL2 = 58676, |
1008 | MPAMVPM5_EL2 = 58677, |
1009 | MPAMVPM6_EL2 = 58678, |
1010 | MPAMVPM7_EL2 = 58679, |
1011 | MPAMIDR_EL1 = 50468, |
1012 | AMCR_EL0 = 56976, |
1013 | AMCFGR_EL0 = 56977, |
1014 | AMCGCR_EL0 = 56978, |
1015 | AMUSERENR_EL0 = 56979, |
1016 | AMCNTENCLR0_EL0 = 56980, |
1017 | AMCNTENSET0_EL0 = 56981, |
1018 | AMEVCNTR00_EL0 = 56992, |
1019 | AMEVCNTR01_EL0 = 56993, |
1020 | AMEVCNTR02_EL0 = 56994, |
1021 | AMEVCNTR03_EL0 = 56995, |
1022 | AMEVTYPER00_EL0 = 57008, |
1023 | AMEVTYPER01_EL0 = 57009, |
1024 | AMEVTYPER02_EL0 = 57010, |
1025 | AMEVTYPER03_EL0 = 57011, |
1026 | AMCNTENCLR1_EL0 = 56984, |
1027 | AMCNTENSET1_EL0 = 56985, |
1028 | AMEVCNTR10_EL0 = 57056, |
1029 | AMEVCNTR11_EL0 = 57057, |
1030 | AMEVCNTR12_EL0 = 57058, |
1031 | AMEVCNTR13_EL0 = 57059, |
1032 | AMEVCNTR14_EL0 = 57060, |
1033 | AMEVCNTR15_EL0 = 57061, |
1034 | AMEVCNTR16_EL0 = 57062, |
1035 | AMEVCNTR17_EL0 = 57063, |
1036 | AMEVCNTR18_EL0 = 57064, |
1037 | AMEVCNTR19_EL0 = 57065, |
1038 | AMEVCNTR110_EL0 = 57066, |
1039 | AMEVCNTR111_EL0 = 57067, |
1040 | AMEVCNTR112_EL0 = 57068, |
1041 | AMEVCNTR113_EL0 = 57069, |
1042 | AMEVCNTR114_EL0 = 57070, |
1043 | AMEVCNTR115_EL0 = 57071, |
1044 | AMEVTYPER10_EL0 = 57072, |
1045 | AMEVTYPER11_EL0 = 57073, |
1046 | AMEVTYPER12_EL0 = 57074, |
1047 | AMEVTYPER13_EL0 = 57075, |
1048 | AMEVTYPER14_EL0 = 57076, |
1049 | AMEVTYPER15_EL0 = 57077, |
1050 | AMEVTYPER16_EL0 = 57078, |
1051 | AMEVTYPER17_EL0 = 57079, |
1052 | AMEVTYPER18_EL0 = 57080, |
1053 | AMEVTYPER19_EL0 = 57081, |
1054 | AMEVTYPER110_EL0 = 57082, |
1055 | AMEVTYPER111_EL0 = 57083, |
1056 | AMEVTYPER112_EL0 = 57084, |
1057 | AMEVTYPER113_EL0 = 57085, |
1058 | AMEVTYPER114_EL0 = 57086, |
1059 | AMEVTYPER115_EL0 = 57087, |
1060 | TRFCR_EL1 = 49297, |
1061 | TRFCR_EL2 = 57489, |
1062 | TRFCR_EL12 = 59537, |
1063 | DIT = 55829, |
1064 | VNCR_EL2 = 57616, |
1065 | ZCR_EL1 = 49296, |
1066 | ZCR_EL2 = 57488, |
1067 | ZCR_EL3 = 61584, |
1068 | ZCR_EL12 = 59536, |
1069 | SSBS = 55830, |
1070 | TCO = 55831, |
1071 | GCR_EL1 = 49286, |
1072 | RGSR_EL1 = 49285, |
1073 | TFSR_EL1 = 49840, |
1074 | TFSR_EL2 = 58032, |
1075 | TFSR_EL3 = 62128, |
1076 | TFSR_EL12 = 60080, |
1077 | TFSRE0_EL1 = 49841, |
1078 | GMID_EL1 = 51204, |
1079 | TRCRSR = 34896, |
1080 | TRCEXTINSELR0 = 34884, |
1081 | TRCEXTINSELR1 = 34892, |
1082 | TRCEXTINSELR2 = 34900, |
1083 | TRCEXTINSELR3 = 34908, |
1084 | TRBLIMITR_EL1 = 50392, |
1085 | TRBPTR_EL1 = 50393, |
1086 | TRBBASER_EL1 = 50394, |
1087 | TRBSR_EL1 = 50395, |
1088 | TRBMAR_EL1 = 50396, |
1089 | TRBTRG_EL1 = 50398, |
1090 | TRBIDR_EL1 = 50399, |
1091 | AMCG1IDR_EL0 = 56982, |
1092 | AMEVCNTVOFF00_EL2 = 59072, |
1093 | AMEVCNTVOFF10_EL2 = 59088, |
1094 | AMEVCNTVOFF01_EL2 = 59073, |
1095 | AMEVCNTVOFF11_EL2 = 59089, |
1096 | AMEVCNTVOFF02_EL2 = 59074, |
1097 | AMEVCNTVOFF12_EL2 = 59090, |
1098 | AMEVCNTVOFF03_EL2 = 59075, |
1099 | AMEVCNTVOFF13_EL2 = 59091, |
1100 | AMEVCNTVOFF04_EL2 = 59076, |
1101 | AMEVCNTVOFF14_EL2 = 59092, |
1102 | AMEVCNTVOFF05_EL2 = 59077, |
1103 | AMEVCNTVOFF15_EL2 = 59093, |
1104 | AMEVCNTVOFF06_EL2 = 59078, |
1105 | AMEVCNTVOFF16_EL2 = 59094, |
1106 | AMEVCNTVOFF07_EL2 = 59079, |
1107 | AMEVCNTVOFF17_EL2 = 59095, |
1108 | AMEVCNTVOFF08_EL2 = 59080, |
1109 | AMEVCNTVOFF18_EL2 = 59096, |
1110 | AMEVCNTVOFF09_EL2 = 59081, |
1111 | AMEVCNTVOFF19_EL2 = 59097, |
1112 | AMEVCNTVOFF010_EL2 = 59082, |
1113 | AMEVCNTVOFF110_EL2 = 59098, |
1114 | AMEVCNTVOFF011_EL2 = 59083, |
1115 | AMEVCNTVOFF111_EL2 = 59099, |
1116 | AMEVCNTVOFF012_EL2 = 59084, |
1117 | AMEVCNTVOFF112_EL2 = 59100, |
1118 | AMEVCNTVOFF013_EL2 = 59085, |
1119 | AMEVCNTVOFF113_EL2 = 59101, |
1120 | AMEVCNTVOFF014_EL2 = 59086, |
1121 | AMEVCNTVOFF114_EL2 = 59102, |
1122 | AMEVCNTVOFF015_EL2 = 59087, |
1123 | AMEVCNTVOFF115_EL2 = 59103, |
1124 | HFGRTR_EL2 = 57484, |
1125 | HFGWTR_EL2 = 57485, |
1126 | HFGITR_EL2 = 57486, |
1127 | HDFGRTR_EL2 = 57740, |
1128 | HDFGWTR_EL2 = 57741, |
1129 | HAFGRTR_EL2 = 57742, |
1130 | HDFGRTR2_EL2 = 57736, |
1131 | HDFGWTR2_EL2 = 57737, |
1132 | HFGRTR2_EL2 = 57738, |
1133 | HFGWTR2_EL2 = 57739, |
1134 | HFGITR2_EL2 = 57743, |
1135 | CNTSCALE_EL2 = 59140, |
1136 | CNTISCALE_EL2 = 59141, |
1137 | CNTPOFF_EL2 = 59142, |
1138 | CNTVFRQ_EL2 = 59143, |
1139 | CNTPCTSS_EL0 = 57093, |
1140 | CNTVCTSS_EL0 = 57094, |
1141 | ACCDATA_EL1 = 50821, |
1142 | BRBCR_EL1 = 35968, |
1143 | BRBCR_EL12 = 44160, |
1144 | BRBCR_EL2 = 42112, |
1145 | BRBFCR_EL1 = 35969, |
1146 | BRBIDR0_EL1 = 35984, |
1147 | BRBINFINJ_EL1 = 35976, |
1148 | BRBSRCINJ_EL1 = 35977, |
1149 | BRBTGTINJ_EL1 = 35978, |
1150 | BRBTS_EL1 = 35970, |
1151 | BRBINF0_EL1 = 35840, |
1152 | BRBSRC0_EL1 = 35841, |
1153 | BRBTGT0_EL1 = 35842, |
1154 | BRBINF1_EL1 = 35848, |
1155 | BRBSRC1_EL1 = 35849, |
1156 | BRBTGT1_EL1 = 35850, |
1157 | BRBINF2_EL1 = 35856, |
1158 | BRBSRC2_EL1 = 35857, |
1159 | BRBTGT2_EL1 = 35858, |
1160 | BRBINF3_EL1 = 35864, |
1161 | BRBSRC3_EL1 = 35865, |
1162 | BRBTGT3_EL1 = 35866, |
1163 | BRBINF4_EL1 = 35872, |
1164 | BRBSRC4_EL1 = 35873, |
1165 | BRBTGT4_EL1 = 35874, |
1166 | BRBINF5_EL1 = 35880, |
1167 | BRBSRC5_EL1 = 35881, |
1168 | BRBTGT5_EL1 = 35882, |
1169 | BRBINF6_EL1 = 35888, |
1170 | BRBSRC6_EL1 = 35889, |
1171 | BRBTGT6_EL1 = 35890, |
1172 | BRBINF7_EL1 = 35896, |
1173 | BRBSRC7_EL1 = 35897, |
1174 | BRBTGT7_EL1 = 35898, |
1175 | BRBINF8_EL1 = 35904, |
1176 | BRBSRC8_EL1 = 35905, |
1177 | BRBTGT8_EL1 = 35906, |
1178 | BRBINF9_EL1 = 35912, |
1179 | BRBSRC9_EL1 = 35913, |
1180 | BRBTGT9_EL1 = 35914, |
1181 | BRBINF10_EL1 = 35920, |
1182 | BRBSRC10_EL1 = 35921, |
1183 | BRBTGT10_EL1 = 35922, |
1184 | BRBINF11_EL1 = 35928, |
1185 | BRBSRC11_EL1 = 35929, |
1186 | BRBTGT11_EL1 = 35930, |
1187 | BRBINF12_EL1 = 35936, |
1188 | BRBSRC12_EL1 = 35937, |
1189 | BRBTGT12_EL1 = 35938, |
1190 | BRBINF13_EL1 = 35944, |
1191 | BRBSRC13_EL1 = 35945, |
1192 | BRBTGT13_EL1 = 35946, |
1193 | BRBINF14_EL1 = 35952, |
1194 | BRBSRC14_EL1 = 35953, |
1195 | BRBTGT14_EL1 = 35954, |
1196 | BRBINF15_EL1 = 35960, |
1197 | BRBSRC15_EL1 = 35961, |
1198 | BRBTGT15_EL1 = 35962, |
1199 | BRBINF16_EL1 = 35844, |
1200 | BRBSRC16_EL1 = 35845, |
1201 | BRBTGT16_EL1 = 35846, |
1202 | BRBINF17_EL1 = 35852, |
1203 | BRBSRC17_EL1 = 35853, |
1204 | BRBTGT17_EL1 = 35854, |
1205 | BRBINF18_EL1 = 35860, |
1206 | BRBSRC18_EL1 = 35861, |
1207 | BRBTGT18_EL1 = 35862, |
1208 | BRBINF19_EL1 = 35868, |
1209 | BRBSRC19_EL1 = 35869, |
1210 | BRBTGT19_EL1 = 35870, |
1211 | BRBINF20_EL1 = 35876, |
1212 | BRBSRC20_EL1 = 35877, |
1213 | BRBTGT20_EL1 = 35878, |
1214 | BRBINF21_EL1 = 35884, |
1215 | BRBSRC21_EL1 = 35885, |
1216 | BRBTGT21_EL1 = 35886, |
1217 | BRBINF22_EL1 = 35892, |
1218 | BRBSRC22_EL1 = 35893, |
1219 | BRBTGT22_EL1 = 35894, |
1220 | BRBINF23_EL1 = 35900, |
1221 | BRBSRC23_EL1 = 35901, |
1222 | BRBTGT23_EL1 = 35902, |
1223 | BRBINF24_EL1 = 35908, |
1224 | BRBSRC24_EL1 = 35909, |
1225 | BRBTGT24_EL1 = 35910, |
1226 | BRBINF25_EL1 = 35916, |
1227 | BRBSRC25_EL1 = 35917, |
1228 | BRBTGT25_EL1 = 35918, |
1229 | BRBINF26_EL1 = 35924, |
1230 | BRBSRC26_EL1 = 35925, |
1231 | BRBTGT26_EL1 = 35926, |
1232 | BRBINF27_EL1 = 35932, |
1233 | BRBSRC27_EL1 = 35933, |
1234 | BRBTGT27_EL1 = 35934, |
1235 | BRBINF28_EL1 = 35940, |
1236 | BRBSRC28_EL1 = 35941, |
1237 | BRBTGT28_EL1 = 35942, |
1238 | BRBINF29_EL1 = 35948, |
1239 | BRBSRC29_EL1 = 35949, |
1240 | BRBTGT29_EL1 = 35950, |
1241 | BRBINF30_EL1 = 35956, |
1242 | BRBSRC30_EL1 = 35957, |
1243 | BRBTGT30_EL1 = 35958, |
1244 | BRBINF31_EL1 = 35964, |
1245 | BRBSRC31_EL1 = 35965, |
1246 | BRBTGT31_EL1 = 35966, |
1247 | PMSNEVFR_EL1 = 50377, |
1248 | CPM_IOACC_CTL_EL3 = 65424, |
1249 | SMCR_EL1 = 49302, |
1250 | SMCR_EL2 = 57494, |
1251 | SMCR_EL3 = 61590, |
1252 | SMCR_EL12 = 59542, |
1253 | SVCR = 55826, |
1254 | SMPRI_EL1 = 49300, |
1255 | SMPRIMAP_EL2 = 57493, |
1256 | SMIDR_EL1 = 51206, |
1257 | TPIDR2_EL0 = 56965, |
1258 | MPAMSM_EL1 = 50475, |
1259 | ALLINT = 49688, |
1260 | ICC_NMIAR1_EL1 = 50765, |
1261 | GCSCR_EL1 = 49448, |
1262 | GCSPR_EL1 = 49449, |
1263 | GCSCRE0_EL1 = 49450, |
1264 | GCSPR_EL0 = 55593, |
1265 | GCSCR_EL2 = 57640, |
1266 | GCSPR_EL2 = 57641, |
1267 | GCSCR_EL12 = 59688, |
1268 | GCSPR_EL12 = 59689, |
1269 | GCSCR_EL3 = 61736, |
1270 | GCSPR_EL3 = 61737, |
1271 | AMAIR2_EL1 = 50457, |
1272 | AMAIR2_EL12 = 60697, |
1273 | AMAIR2_EL2 = 58649, |
1274 | AMAIR2_EL3 = 62745, |
1275 | MAIR2_EL1 = 50449, |
1276 | MAIR2_EL12 = 60689, |
1277 | MAIR2_EL2 = 58633, |
1278 | MAIR2_EL3 = 62729, |
1279 | PIRE0_EL1 = 50450, |
1280 | PIRE0_EL12 = 60690, |
1281 | PIRE0_EL2 = 58642, |
1282 | PIR_EL1 = 50451, |
1283 | PIR_EL12 = 60691, |
1284 | PIR_EL2 = 58643, |
1285 | PIR_EL3 = 62739, |
1286 | S2PIR_EL2 = 58645, |
1287 | POR_EL0 = 56596, |
1288 | POR_EL1 = 50452, |
1289 | POR_EL12 = 60692, |
1290 | POR_EL2 = 58644, |
1291 | POR_EL3 = 62740, |
1292 | S2POR_EL1 = 50453, |
1293 | SCTLR2_EL1 = 49283, |
1294 | SCTLR2_EL12 = 59523, |
1295 | SCTLR2_EL2 = 57475, |
1296 | SCTLR2_EL3 = 61571, |
1297 | TCR2_EL1 = 49411, |
1298 | TCR2_EL12 = 59651, |
1299 | TCR2_EL2 = 57603, |
1300 | RCWMASK_EL1 = 50822, |
1301 | RCWSMASK_EL1 = 50819, |
1302 | MDSELR_EL1 = 32802, |
1303 | PMUACR_EL1 = 50420, |
1304 | PMCCNTSVR_EL1 = 34655, |
1305 | PMICNTSVR_EL1 = 34656, |
1306 | PMSSCR_EL1 = 50411, |
1307 | PMEVCNTSVR0_EL1 = 34624, |
1308 | PMEVCNTSVR1_EL1 = 34625, |
1309 | PMEVCNTSVR2_EL1 = 34626, |
1310 | PMEVCNTSVR3_EL1 = 34627, |
1311 | PMEVCNTSVR4_EL1 = 34628, |
1312 | PMEVCNTSVR5_EL1 = 34629, |
1313 | PMEVCNTSVR6_EL1 = 34630, |
1314 | PMEVCNTSVR7_EL1 = 34631, |
1315 | PMEVCNTSVR8_EL1 = 34632, |
1316 | PMEVCNTSVR9_EL1 = 34633, |
1317 | PMEVCNTSVR10_EL1 = 34634, |
1318 | PMEVCNTSVR11_EL1 = 34635, |
1319 | PMEVCNTSVR12_EL1 = 34636, |
1320 | PMEVCNTSVR13_EL1 = 34637, |
1321 | PMEVCNTSVR14_EL1 = 34638, |
1322 | PMEVCNTSVR15_EL1 = 34639, |
1323 | PMEVCNTSVR16_EL1 = 34640, |
1324 | PMEVCNTSVR17_EL1 = 34641, |
1325 | PMEVCNTSVR18_EL1 = 34642, |
1326 | PMEVCNTSVR19_EL1 = 34643, |
1327 | PMEVCNTSVR20_EL1 = 34644, |
1328 | PMEVCNTSVR21_EL1 = 34645, |
1329 | PMEVCNTSVR22_EL1 = 34646, |
1330 | PMEVCNTSVR23_EL1 = 34647, |
1331 | PMEVCNTSVR24_EL1 = 34648, |
1332 | PMEVCNTSVR25_EL1 = 34649, |
1333 | PMEVCNTSVR26_EL1 = 34650, |
1334 | PMEVCNTSVR27_EL1 = 34651, |
1335 | PMEVCNTSVR28_EL1 = 34652, |
1336 | PMEVCNTSVR29_EL1 = 34653, |
1337 | PMEVCNTSVR30_EL1 = 34654, |
1338 | PMICNTR_EL0 = 56480, |
1339 | PMICFILTR_EL0 = 56496, |
1340 | PMZR_EL0 = 56556, |
1341 | PMECR_EL1 = 50421, |
1342 | PMIAR_EL1 = 50423, |
1343 | SPMACCESSR_EL1 = 34027, |
1344 | SPMACCESSR_EL12 = 44267, |
1345 | SPMACCESSR_EL2 = 42219, |
1346 | SPMACCESSR_EL3 = 46315, |
1347 | SPMCNTENCLR_EL0 = 40162, |
1348 | SPMCNTENSET_EL0 = 40161, |
1349 | SPMCR_EL0 = 40160, |
1350 | SPMDEVAFF_EL1 = 34030, |
1351 | SPMDEVARCH_EL1 = 34029, |
1352 | SPMEVCNTR0_EL0 = 40704, |
1353 | SPMEVFILT2R0_EL0 = 40752, |
1354 | SPMEVFILTR0_EL0 = 40736, |
1355 | SPMEVTYPER0_EL0 = 40720, |
1356 | SPMEVCNTR1_EL0 = 40705, |
1357 | SPMEVFILT2R1_EL0 = 40753, |
1358 | SPMEVFILTR1_EL0 = 40737, |
1359 | SPMEVTYPER1_EL0 = 40721, |
1360 | SPMEVCNTR2_EL0 = 40706, |
1361 | SPMEVFILT2R2_EL0 = 40754, |
1362 | SPMEVFILTR2_EL0 = 40738, |
1363 | SPMEVTYPER2_EL0 = 40722, |
1364 | SPMEVCNTR3_EL0 = 40707, |
1365 | SPMEVFILT2R3_EL0 = 40755, |
1366 | SPMEVFILTR3_EL0 = 40739, |
1367 | SPMEVTYPER3_EL0 = 40723, |
1368 | SPMEVCNTR4_EL0 = 40708, |
1369 | SPMEVFILT2R4_EL0 = 40756, |
1370 | SPMEVFILTR4_EL0 = 40740, |
1371 | SPMEVTYPER4_EL0 = 40724, |
1372 | SPMEVCNTR5_EL0 = 40709, |
1373 | SPMEVFILT2R5_EL0 = 40757, |
1374 | SPMEVFILTR5_EL0 = 40741, |
1375 | SPMEVTYPER5_EL0 = 40725, |
1376 | SPMEVCNTR6_EL0 = 40710, |
1377 | SPMEVFILT2R6_EL0 = 40758, |
1378 | SPMEVFILTR6_EL0 = 40742, |
1379 | SPMEVTYPER6_EL0 = 40726, |
1380 | SPMEVCNTR7_EL0 = 40711, |
1381 | SPMEVFILT2R7_EL0 = 40759, |
1382 | SPMEVFILTR7_EL0 = 40743, |
1383 | SPMEVTYPER7_EL0 = 40727, |
1384 | SPMEVCNTR8_EL0 = 40712, |
1385 | SPMEVFILT2R8_EL0 = 40760, |
1386 | SPMEVFILTR8_EL0 = 40744, |
1387 | SPMEVTYPER8_EL0 = 40728, |
1388 | SPMEVCNTR9_EL0 = 40713, |
1389 | SPMEVFILT2R9_EL0 = 40761, |
1390 | SPMEVFILTR9_EL0 = 40745, |
1391 | SPMEVTYPER9_EL0 = 40729, |
1392 | SPMEVCNTR10_EL0 = 40714, |
1393 | SPMEVFILT2R10_EL0 = 40762, |
1394 | SPMEVFILTR10_EL0 = 40746, |
1395 | SPMEVTYPER10_EL0 = 40730, |
1396 | SPMEVCNTR11_EL0 = 40715, |
1397 | SPMEVFILT2R11_EL0 = 40763, |
1398 | SPMEVFILTR11_EL0 = 40747, |
1399 | SPMEVTYPER11_EL0 = 40731, |
1400 | SPMEVCNTR12_EL0 = 40716, |
1401 | SPMEVFILT2R12_EL0 = 40764, |
1402 | SPMEVFILTR12_EL0 = 40748, |
1403 | SPMEVTYPER12_EL0 = 40732, |
1404 | SPMEVCNTR13_EL0 = 40717, |
1405 | SPMEVFILT2R13_EL0 = 40765, |
1406 | SPMEVFILTR13_EL0 = 40749, |
1407 | SPMEVTYPER13_EL0 = 40733, |
1408 | SPMEVCNTR14_EL0 = 40718, |
1409 | SPMEVFILT2R14_EL0 = 40766, |
1410 | SPMEVFILTR14_EL0 = 40750, |
1411 | SPMEVTYPER14_EL0 = 40734, |
1412 | SPMEVCNTR15_EL0 = 40719, |
1413 | SPMEVFILT2R15_EL0 = 40767, |
1414 | SPMEVFILTR15_EL0 = 40751, |
1415 | SPMEVTYPER15_EL0 = 40735, |
1416 | SPMIIDR_EL1 = 34028, |
1417 | SPMINTENCLR_EL1 = 34034, |
1418 | SPMINTENSET_EL1 = 34033, |
1419 | SPMOVSCLR_EL0 = 40163, |
1420 | SPMOVSSET_EL0 = 40179, |
1421 | SPMSELR_EL0 = 40165, |
1422 | SPMCGCR0_EL1 = 34024, |
1423 | SPMCGCR1_EL1 = 34025, |
1424 | SPMCFGR_EL1 = 34031, |
1425 | SPMROOTCR_EL3 = 46327, |
1426 | SPMSCR_EL1 = 48375, |
1427 | TRCITEEDCR = 34833, |
1428 | TRCITECR_EL1 = 49299, |
1429 | TRCITECR_EL12 = 59539, |
1430 | TRCITECR_EL2 = 57491, |
1431 | PMSDSFR_EL1 = 50388, |
1432 | ERXGSR_EL1 = 49818, |
1433 | PFAR_EL1 = 49925, |
1434 | PFAR_EL12 = 60165, |
1435 | PFAR_EL2 = 58117, |
1436 | PM = 49689, |
1437 | ID_AA64FPFR0_EL1 = 49191, |
1438 | FPMR = 55842, |
1439 | MDSTEPOP_EL1 = 32810, |
1440 | SPMZR_EL0 = 40164, |
1441 | VDISR_EL3 = 62985, |
1442 | VSESR_EL3 = 62099, |
1443 | HDBSSBR_EL2 = 57626, |
1444 | HDBSSPROD_EL2 = 57627, |
1445 | HACDBSBR_EL2 = 57628, |
1446 | HACDBSCONS_EL2 = 57629, |
1447 | FGWTE3_EL3 = 61581, |
1448 | }; |
1449 | #endif |
1450 | |
1451 | #ifdef GET_TSB_DECL |
1452 | enum TSBValues { |
1453 | csync = 0, |
1454 | }; |
1455 | #endif |
1456 | |
1457 | #ifdef GET_TLBITable_DECL |
1458 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding); |
1459 | const TLBI *lookupTLBIByName(StringRef Name); |
1460 | #endif |
1461 | |
1462 | #ifdef GET_TLBITable_IMPL |
1463 | constexpr TLBI TLBITable[] = { |
1464 | { "ALLE1" , 0x243C, false, { } }, // 0 |
1465 | { "ALLE1IS" , 0x241C, false, { } }, // 1 |
1466 | { "ALLE1ISnXS" , 0x249C, false, { AArch64::FeatureXS } }, // 2 |
1467 | { "ALLE1nXS" , 0x24BC, false, { AArch64::FeatureXS } }, // 3 |
1468 | { "ALLE1OS" , 0x240C, false, { AArch64::FeatureTLB_RMI } }, // 4 |
1469 | { "ALLE1OSnXS" , 0x248C, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 5 |
1470 | { "ALLE2" , 0x2438, false, { } }, // 6 |
1471 | { "ALLE2IS" , 0x2418, false, { } }, // 7 |
1472 | { "ALLE2ISnXS" , 0x2498, false, { AArch64::FeatureXS } }, // 8 |
1473 | { "ALLE2nXS" , 0x24B8, false, { AArch64::FeatureXS } }, // 9 |
1474 | { "ALLE2OS" , 0x2408, false, { AArch64::FeatureTLB_RMI } }, // 10 |
1475 | { "ALLE2OSnXS" , 0x2488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 11 |
1476 | { "ALLE3" , 0x3438, false, { } }, // 12 |
1477 | { "ALLE3IS" , 0x3418, false, { } }, // 13 |
1478 | { "ALLE3ISnXS" , 0x3498, false, { AArch64::FeatureXS } }, // 14 |
1479 | { "ALLE3nXS" , 0x34B8, false, { AArch64::FeatureXS } }, // 15 |
1480 | { "ALLE3OS" , 0x3408, false, { AArch64::FeatureTLB_RMI } }, // 16 |
1481 | { "ALLE3OSnXS" , 0x3488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 17 |
1482 | { "ASIDE1" , 0x43A, true, { } }, // 18 |
1483 | { "ASIDE1IS" , 0x41A, true, { } }, // 19 |
1484 | { "ASIDE1ISnXS" , 0x49A, true, { AArch64::FeatureXS } }, // 20 |
1485 | { "ASIDE1nXS" , 0x4BA, true, { AArch64::FeatureXS } }, // 21 |
1486 | { "ASIDE1OS" , 0x40A, true, { AArch64::FeatureTLB_RMI } }, // 22 |
1487 | { "ASIDE1OSnXS" , 0x48A, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 23 |
1488 | { "IPAS2E1" , 0x2421, true, { } }, // 24 |
1489 | { "IPAS2E1IS" , 0x2401, true, { } }, // 25 |
1490 | { "IPAS2E1ISnXS" , 0x2481, true, { AArch64::FeatureXS } }, // 26 |
1491 | { "IPAS2E1nXS" , 0x24A1, true, { AArch64::FeatureXS } }, // 27 |
1492 | { "IPAS2E1OS" , 0x2420, true, { AArch64::FeatureTLB_RMI } }, // 28 |
1493 | { "IPAS2E1OSnXS" , 0x24A0, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 29 |
1494 | { "IPAS2LE1" , 0x2425, true, { } }, // 30 |
1495 | { "IPAS2LE1IS" , 0x2405, true, { } }, // 31 |
1496 | { "IPAS2LE1ISnXS" , 0x2485, true, { AArch64::FeatureXS } }, // 32 |
1497 | { "IPAS2LE1nXS" , 0x24A5, true, { AArch64::FeatureXS } }, // 33 |
1498 | { "IPAS2LE1OS" , 0x2424, true, { AArch64::FeatureTLB_RMI } }, // 34 |
1499 | { "IPAS2LE1OSnXS" , 0x24A4, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 35 |
1500 | { "PAALL" , 0x343C, false, { AArch64::FeatureRME } }, // 36 |
1501 | { "PAALLnXS" , 0x34BC, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 37 |
1502 | { "PAALLOS" , 0x340C, false, { AArch64::FeatureRME } }, // 38 |
1503 | { "PAALLOSnXS" , 0x348C, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 39 |
1504 | { "RIPAS2E1" , 0x2422, true, { AArch64::FeatureTLB_RMI } }, // 40 |
1505 | { "RIPAS2E1IS" , 0x2402, true, { AArch64::FeatureTLB_RMI } }, // 41 |
1506 | { "RIPAS2E1ISnXS" , 0x2482, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 42 |
1507 | { "RIPAS2E1nXS" , 0x24A2, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 43 |
1508 | { "RIPAS2E1OS" , 0x2423, true, { AArch64::FeatureTLB_RMI } }, // 44 |
1509 | { "RIPAS2E1OSnXS" , 0x24A3, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 45 |
1510 | { "RIPAS2LE1" , 0x2426, true, { AArch64::FeatureTLB_RMI } }, // 46 |
1511 | { "RIPAS2LE1IS" , 0x2406, true, { AArch64::FeatureTLB_RMI } }, // 47 |
1512 | { "RIPAS2LE1ISnXS" , 0x2486, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 48 |
1513 | { "RIPAS2LE1nXS" , 0x24A6, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 49 |
1514 | { "RIPAS2LE1OS" , 0x2427, true, { AArch64::FeatureTLB_RMI } }, // 50 |
1515 | { "RIPAS2LE1OSnXS" , 0x24A7, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 51 |
1516 | { "RPALOS" , 0x3427, true, { AArch64::FeatureRME } }, // 52 |
1517 | { "RPALOSnXS" , 0x34A7, true, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 53 |
1518 | { "RPAOS" , 0x3423, true, { AArch64::FeatureRME } }, // 54 |
1519 | { "RPAOSnXS" , 0x34A3, true, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 55 |
1520 | { "RVAAE1" , 0x433, true, { AArch64::FeatureTLB_RMI } }, // 56 |
1521 | { "RVAAE1IS" , 0x413, true, { AArch64::FeatureTLB_RMI } }, // 57 |
1522 | { "RVAAE1ISnXS" , 0x493, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 58 |
1523 | { "RVAAE1nXS" , 0x4B3, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 59 |
1524 | { "RVAAE1OS" , 0x42B, true, { AArch64::FeatureTLB_RMI } }, // 60 |
1525 | { "RVAAE1OSnXS" , 0x4AB, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 61 |
1526 | { "RVAALE1" , 0x437, true, { AArch64::FeatureTLB_RMI } }, // 62 |
1527 | { "RVAALE1IS" , 0x417, true, { AArch64::FeatureTLB_RMI } }, // 63 |
1528 | { "RVAALE1ISnXS" , 0x497, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 64 |
1529 | { "RVAALE1nXS" , 0x4B7, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 65 |
1530 | { "RVAALE1OS" , 0x42F, true, { AArch64::FeatureTLB_RMI } }, // 66 |
1531 | { "RVAALE1OSnXS" , 0x4AF, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 67 |
1532 | { "RVAE1" , 0x431, true, { AArch64::FeatureTLB_RMI } }, // 68 |
1533 | { "RVAE1IS" , 0x411, true, { AArch64::FeatureTLB_RMI } }, // 69 |
1534 | { "RVAE1ISnXS" , 0x491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 70 |
1535 | { "RVAE1nXS" , 0x4B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 71 |
1536 | { "RVAE1OS" , 0x429, true, { AArch64::FeatureTLB_RMI } }, // 72 |
1537 | { "RVAE1OSnXS" , 0x4A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 73 |
1538 | { "RVAE2" , 0x2431, true, { AArch64::FeatureTLB_RMI } }, // 74 |
1539 | { "RVAE2IS" , 0x2411, true, { AArch64::FeatureTLB_RMI } }, // 75 |
1540 | { "RVAE2ISnXS" , 0x2491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 76 |
1541 | { "RVAE2nXS" , 0x24B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 77 |
1542 | { "RVAE2OS" , 0x2429, true, { AArch64::FeatureTLB_RMI } }, // 78 |
1543 | { "RVAE2OSnXS" , 0x24A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 79 |
1544 | { "RVAE3" , 0x3431, true, { AArch64::FeatureTLB_RMI } }, // 80 |
1545 | { "RVAE3IS" , 0x3411, true, { AArch64::FeatureTLB_RMI } }, // 81 |
1546 | { "RVAE3ISnXS" , 0x3491, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 82 |
1547 | { "RVAE3nXS" , 0x34B1, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 83 |
1548 | { "RVAE3OS" , 0x3429, true, { AArch64::FeatureTLB_RMI } }, // 84 |
1549 | { "RVAE3OSnXS" , 0x34A9, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 85 |
1550 | { "RVALE1" , 0x435, true, { AArch64::FeatureTLB_RMI } }, // 86 |
1551 | { "RVALE1IS" , 0x415, true, { AArch64::FeatureTLB_RMI } }, // 87 |
1552 | { "RVALE1ISnXS" , 0x495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 88 |
1553 | { "RVALE1nXS" , 0x4B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 89 |
1554 | { "RVALE1OS" , 0x42D, true, { AArch64::FeatureTLB_RMI } }, // 90 |
1555 | { "RVALE1OSnXS" , 0x4AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 91 |
1556 | { "RVALE2" , 0x2435, true, { AArch64::FeatureTLB_RMI } }, // 92 |
1557 | { "RVALE2IS" , 0x2415, true, { AArch64::FeatureTLB_RMI } }, // 93 |
1558 | { "RVALE2ISnXS" , 0x2495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 94 |
1559 | { "RVALE2nXS" , 0x24B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 95 |
1560 | { "RVALE2OS" , 0x242D, true, { AArch64::FeatureTLB_RMI } }, // 96 |
1561 | { "RVALE2OSnXS" , 0x24AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 97 |
1562 | { "RVALE3" , 0x3435, true, { AArch64::FeatureTLB_RMI } }, // 98 |
1563 | { "RVALE3IS" , 0x3415, true, { AArch64::FeatureTLB_RMI } }, // 99 |
1564 | { "RVALE3ISnXS" , 0x3495, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 100 |
1565 | { "RVALE3nXS" , 0x34B5, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 101 |
1566 | { "RVALE3OS" , 0x342D, true, { AArch64::FeatureTLB_RMI } }, // 102 |
1567 | { "RVALE3OSnXS" , 0x34AD, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 103 |
1568 | { "VAAE1" , 0x43B, true, { } }, // 104 |
1569 | { "VAAE1IS" , 0x41B, true, { } }, // 105 |
1570 | { "VAAE1ISnXS" , 0x49B, true, { AArch64::FeatureXS } }, // 106 |
1571 | { "VAAE1nXS" , 0x4BB, true, { AArch64::FeatureXS } }, // 107 |
1572 | { "VAAE1OS" , 0x40B, true, { AArch64::FeatureTLB_RMI } }, // 108 |
1573 | { "VAAE1OSnXS" , 0x48B, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 109 |
1574 | { "VAALE1" , 0x43F, true, { } }, // 110 |
1575 | { "VAALE1IS" , 0x41F, true, { } }, // 111 |
1576 | { "VAALE1ISnXS" , 0x49F, true, { AArch64::FeatureXS } }, // 112 |
1577 | { "VAALE1nXS" , 0x4BF, true, { AArch64::FeatureXS } }, // 113 |
1578 | { "VAALE1OS" , 0x40F, true, { AArch64::FeatureTLB_RMI } }, // 114 |
1579 | { "VAALE1OSnXS" , 0x48F, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 115 |
1580 | { "VAE1" , 0x439, true, { } }, // 116 |
1581 | { "VAE1IS" , 0x419, true, { } }, // 117 |
1582 | { "VAE1ISnXS" , 0x499, true, { AArch64::FeatureXS } }, // 118 |
1583 | { "VAE1nXS" , 0x4B9, true, { AArch64::FeatureXS } }, // 119 |
1584 | { "VAE1OS" , 0x409, true, { AArch64::FeatureTLB_RMI } }, // 120 |
1585 | { "VAE1OSnXS" , 0x489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 121 |
1586 | { "VAE2" , 0x2439, true, { } }, // 122 |
1587 | { "VAE2IS" , 0x2419, true, { } }, // 123 |
1588 | { "VAE2ISnXS" , 0x2499, true, { AArch64::FeatureXS } }, // 124 |
1589 | { "VAE2nXS" , 0x24B9, true, { AArch64::FeatureXS } }, // 125 |
1590 | { "VAE2OS" , 0x2409, true, { AArch64::FeatureTLB_RMI } }, // 126 |
1591 | { "VAE2OSnXS" , 0x2489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 127 |
1592 | { "VAE3" , 0x3439, true, { } }, // 128 |
1593 | { "VAE3IS" , 0x3419, true, { } }, // 129 |
1594 | { "VAE3ISnXS" , 0x3499, true, { AArch64::FeatureXS } }, // 130 |
1595 | { "VAE3nXS" , 0x34B9, true, { AArch64::FeatureXS } }, // 131 |
1596 | { "VAE3OS" , 0x3409, true, { AArch64::FeatureTLB_RMI } }, // 132 |
1597 | { "VAE3OSnXS" , 0x3489, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 133 |
1598 | { "VALE1" , 0x43D, true, { } }, // 134 |
1599 | { "VALE1IS" , 0x41D, true, { } }, // 135 |
1600 | { "VALE1ISnXS" , 0x49D, true, { AArch64::FeatureXS } }, // 136 |
1601 | { "VALE1nXS" , 0x4BD, true, { AArch64::FeatureXS } }, // 137 |
1602 | { "VALE1OS" , 0x40D, true, { AArch64::FeatureTLB_RMI } }, // 138 |
1603 | { "VALE1OSnXS" , 0x48D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 139 |
1604 | { "VALE2" , 0x243D, true, { } }, // 140 |
1605 | { "VALE2IS" , 0x241D, true, { } }, // 141 |
1606 | { "VALE2ISnXS" , 0x249D, true, { AArch64::FeatureXS } }, // 142 |
1607 | { "VALE2nXS" , 0x24BD, true, { AArch64::FeatureXS } }, // 143 |
1608 | { "VALE2OS" , 0x240D, true, { AArch64::FeatureTLB_RMI } }, // 144 |
1609 | { "VALE2OSnXS" , 0x248D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 145 |
1610 | { "VALE3" , 0x343D, true, { } }, // 146 |
1611 | { "VALE3IS" , 0x341D, true, { } }, // 147 |
1612 | { "VALE3ISnXS" , 0x349D, true, { AArch64::FeatureXS } }, // 148 |
1613 | { "VALE3nXS" , 0x34BD, true, { AArch64::FeatureXS } }, // 149 |
1614 | { "VALE3OS" , 0x340D, true, { AArch64::FeatureTLB_RMI } }, // 150 |
1615 | { "VALE3OSnXS" , 0x348D, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 151 |
1616 | { "VMALLE1" , 0x438, false, { } }, // 152 |
1617 | { "VMALLE1IS" , 0x418, false, { } }, // 153 |
1618 | { "VMALLE1ISnXS" , 0x498, false, { AArch64::FeatureXS } }, // 154 |
1619 | { "VMALLE1nXS" , 0x4B8, false, { AArch64::FeatureXS } }, // 155 |
1620 | { "VMALLE1OS" , 0x408, false, { AArch64::FeatureTLB_RMI } }, // 156 |
1621 | { "VMALLE1OSnXS" , 0x488, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 157 |
1622 | { "VMALLS12E1" , 0x243E, false, { } }, // 158 |
1623 | { "VMALLS12E1IS" , 0x241E, false, { } }, // 159 |
1624 | { "VMALLS12E1ISnXS" , 0x249E, false, { AArch64::FeatureXS } }, // 160 |
1625 | { "VMALLS12E1nXS" , 0x24BE, false, { AArch64::FeatureXS } }, // 161 |
1626 | { "VMALLS12E1OS" , 0x240E, false, { AArch64::FeatureTLB_RMI } }, // 162 |
1627 | { "VMALLS12E1OSnXS" , 0x248E, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 163 |
1628 | { "VMALLWS2E1" , 0x2432, false, { AArch64::FeatureTLBIW } }, // 164 |
1629 | { "VMALLWS2E1IS" , 0x2412, false, { AArch64::FeatureTLBIW } }, // 165 |
1630 | { "VMALLWS2E1ISnXS" , 0x2492, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 166 |
1631 | { "VMALLWS2E1nXS" , 0x24B2, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 167 |
1632 | { "VMALLWS2E1OS" , 0x242A, false, { AArch64::FeatureTLBIW } }, // 168 |
1633 | { "VMALLWS2E1OSnXS" , 0x24AA, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 169 |
1634 | }; |
1635 | |
1636 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding) { |
1637 | struct IndexType { |
1638 | uint16_t Encoding; |
1639 | unsigned _index; |
1640 | }; |
1641 | static const struct IndexType Index[] = { |
1642 | { 0x408, 156 }, |
1643 | { 0x409, 120 }, |
1644 | { 0x40A, 22 }, |
1645 | { 0x40B, 108 }, |
1646 | { 0x40D, 138 }, |
1647 | { 0x40F, 114 }, |
1648 | { 0x411, 69 }, |
1649 | { 0x413, 57 }, |
1650 | { 0x415, 87 }, |
1651 | { 0x417, 63 }, |
1652 | { 0x418, 153 }, |
1653 | { 0x419, 117 }, |
1654 | { 0x41A, 19 }, |
1655 | { 0x41B, 105 }, |
1656 | { 0x41D, 135 }, |
1657 | { 0x41F, 111 }, |
1658 | { 0x429, 72 }, |
1659 | { 0x42B, 60 }, |
1660 | { 0x42D, 90 }, |
1661 | { 0x42F, 66 }, |
1662 | { 0x431, 68 }, |
1663 | { 0x433, 56 }, |
1664 | { 0x435, 86 }, |
1665 | { 0x437, 62 }, |
1666 | { 0x438, 152 }, |
1667 | { 0x439, 116 }, |
1668 | { 0x43A, 18 }, |
1669 | { 0x43B, 104 }, |
1670 | { 0x43D, 134 }, |
1671 | { 0x43F, 110 }, |
1672 | { 0x488, 157 }, |
1673 | { 0x489, 121 }, |
1674 | { 0x48A, 23 }, |
1675 | { 0x48B, 109 }, |
1676 | { 0x48D, 139 }, |
1677 | { 0x48F, 115 }, |
1678 | { 0x491, 70 }, |
1679 | { 0x493, 58 }, |
1680 | { 0x495, 88 }, |
1681 | { 0x497, 64 }, |
1682 | { 0x498, 154 }, |
1683 | { 0x499, 118 }, |
1684 | { 0x49A, 20 }, |
1685 | { 0x49B, 106 }, |
1686 | { 0x49D, 136 }, |
1687 | { 0x49F, 112 }, |
1688 | { 0x4A9, 73 }, |
1689 | { 0x4AB, 61 }, |
1690 | { 0x4AD, 91 }, |
1691 | { 0x4AF, 67 }, |
1692 | { 0x4B1, 71 }, |
1693 | { 0x4B3, 59 }, |
1694 | { 0x4B5, 89 }, |
1695 | { 0x4B7, 65 }, |
1696 | { 0x4B8, 155 }, |
1697 | { 0x4B9, 119 }, |
1698 | { 0x4BA, 21 }, |
1699 | { 0x4BB, 107 }, |
1700 | { 0x4BD, 137 }, |
1701 | { 0x4BF, 113 }, |
1702 | { 0x2401, 25 }, |
1703 | { 0x2402, 41 }, |
1704 | { 0x2405, 31 }, |
1705 | { 0x2406, 47 }, |
1706 | { 0x2408, 10 }, |
1707 | { 0x2409, 126 }, |
1708 | { 0x240C, 4 }, |
1709 | { 0x240D, 144 }, |
1710 | { 0x240E, 162 }, |
1711 | { 0x2411, 75 }, |
1712 | { 0x2412, 165 }, |
1713 | { 0x2415, 93 }, |
1714 | { 0x2418, 7 }, |
1715 | { 0x2419, 123 }, |
1716 | { 0x241C, 1 }, |
1717 | { 0x241D, 141 }, |
1718 | { 0x241E, 159 }, |
1719 | { 0x2420, 28 }, |
1720 | { 0x2421, 24 }, |
1721 | { 0x2422, 40 }, |
1722 | { 0x2423, 44 }, |
1723 | { 0x2424, 34 }, |
1724 | { 0x2425, 30 }, |
1725 | { 0x2426, 46 }, |
1726 | { 0x2427, 50 }, |
1727 | { 0x2429, 78 }, |
1728 | { 0x242A, 168 }, |
1729 | { 0x242D, 96 }, |
1730 | { 0x2431, 74 }, |
1731 | { 0x2432, 164 }, |
1732 | { 0x2435, 92 }, |
1733 | { 0x2438, 6 }, |
1734 | { 0x2439, 122 }, |
1735 | { 0x243C, 0 }, |
1736 | { 0x243D, 140 }, |
1737 | { 0x243E, 158 }, |
1738 | { 0x2481, 26 }, |
1739 | { 0x2482, 42 }, |
1740 | { 0x2485, 32 }, |
1741 | { 0x2486, 48 }, |
1742 | { 0x2488, 11 }, |
1743 | { 0x2489, 127 }, |
1744 | { 0x248C, 5 }, |
1745 | { 0x248D, 145 }, |
1746 | { 0x248E, 163 }, |
1747 | { 0x2491, 76 }, |
1748 | { 0x2492, 166 }, |
1749 | { 0x2495, 94 }, |
1750 | { 0x2498, 8 }, |
1751 | { 0x2499, 124 }, |
1752 | { 0x249C, 2 }, |
1753 | { 0x249D, 142 }, |
1754 | { 0x249E, 160 }, |
1755 | { 0x24A0, 29 }, |
1756 | { 0x24A1, 27 }, |
1757 | { 0x24A2, 43 }, |
1758 | { 0x24A3, 45 }, |
1759 | { 0x24A4, 35 }, |
1760 | { 0x24A5, 33 }, |
1761 | { 0x24A6, 49 }, |
1762 | { 0x24A7, 51 }, |
1763 | { 0x24A9, 79 }, |
1764 | { 0x24AA, 169 }, |
1765 | { 0x24AD, 97 }, |
1766 | { 0x24B1, 77 }, |
1767 | { 0x24B2, 167 }, |
1768 | { 0x24B5, 95 }, |
1769 | { 0x24B8, 9 }, |
1770 | { 0x24B9, 125 }, |
1771 | { 0x24BC, 3 }, |
1772 | { 0x24BD, 143 }, |
1773 | { 0x24BE, 161 }, |
1774 | { 0x3408, 16 }, |
1775 | { 0x3409, 132 }, |
1776 | { 0x340C, 38 }, |
1777 | { 0x340D, 150 }, |
1778 | { 0x3411, 81 }, |
1779 | { 0x3415, 99 }, |
1780 | { 0x3418, 13 }, |
1781 | { 0x3419, 129 }, |
1782 | { 0x341D, 147 }, |
1783 | { 0x3423, 54 }, |
1784 | { 0x3427, 52 }, |
1785 | { 0x3429, 84 }, |
1786 | { 0x342D, 102 }, |
1787 | { 0x3431, 80 }, |
1788 | { 0x3435, 98 }, |
1789 | { 0x3438, 12 }, |
1790 | { 0x3439, 128 }, |
1791 | { 0x343C, 36 }, |
1792 | { 0x343D, 146 }, |
1793 | { 0x3488, 17 }, |
1794 | { 0x3489, 133 }, |
1795 | { 0x348C, 39 }, |
1796 | { 0x348D, 151 }, |
1797 | { 0x3491, 82 }, |
1798 | { 0x3495, 100 }, |
1799 | { 0x3498, 14 }, |
1800 | { 0x3499, 130 }, |
1801 | { 0x349D, 148 }, |
1802 | { 0x34A3, 55 }, |
1803 | { 0x34A7, 53 }, |
1804 | { 0x34A9, 85 }, |
1805 | { 0x34AD, 103 }, |
1806 | { 0x34B1, 83 }, |
1807 | { 0x34B5, 101 }, |
1808 | { 0x34B8, 15 }, |
1809 | { 0x34B9, 131 }, |
1810 | { 0x34BC, 37 }, |
1811 | { 0x34BD, 149 }, |
1812 | }; |
1813 | |
1814 | struct KeyType { |
1815 | uint16_t Encoding; |
1816 | }; |
1817 | KeyType Key = {Encoding}; |
1818 | struct Comp { |
1819 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
1820 | if (LHS.Encoding < RHS.Encoding) |
1821 | return true; |
1822 | if (LHS.Encoding > RHS.Encoding) |
1823 | return false; |
1824 | return false; |
1825 | } |
1826 | }; |
1827 | auto Table = ArrayRef(Index); |
1828 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
1829 | if (Idx == Table.end() || |
1830 | Key.Encoding != Idx->Encoding) |
1831 | return nullptr; |
1832 | |
1833 | return &TLBITable[Idx->_index]; |
1834 | } |
1835 | |
1836 | const TLBI *lookupTLBIByName(StringRef Name) { |
1837 | struct IndexType { |
1838 | const char * Name; |
1839 | unsigned _index; |
1840 | }; |
1841 | static const struct IndexType Index[] = { |
1842 | { "ALLE1" , 0 }, |
1843 | { "ALLE1IS" , 1 }, |
1844 | { "ALLE1ISNXS" , 2 }, |
1845 | { "ALLE1NXS" , 3 }, |
1846 | { "ALLE1OS" , 4 }, |
1847 | { "ALLE1OSNXS" , 5 }, |
1848 | { "ALLE2" , 6 }, |
1849 | { "ALLE2IS" , 7 }, |
1850 | { "ALLE2ISNXS" , 8 }, |
1851 | { "ALLE2NXS" , 9 }, |
1852 | { "ALLE2OS" , 10 }, |
1853 | { "ALLE2OSNXS" , 11 }, |
1854 | { "ALLE3" , 12 }, |
1855 | { "ALLE3IS" , 13 }, |
1856 | { "ALLE3ISNXS" , 14 }, |
1857 | { "ALLE3NXS" , 15 }, |
1858 | { "ALLE3OS" , 16 }, |
1859 | { "ALLE3OSNXS" , 17 }, |
1860 | { "ASIDE1" , 18 }, |
1861 | { "ASIDE1IS" , 19 }, |
1862 | { "ASIDE1ISNXS" , 20 }, |
1863 | { "ASIDE1NXS" , 21 }, |
1864 | { "ASIDE1OS" , 22 }, |
1865 | { "ASIDE1OSNXS" , 23 }, |
1866 | { "IPAS2E1" , 24 }, |
1867 | { "IPAS2E1IS" , 25 }, |
1868 | { "IPAS2E1ISNXS" , 26 }, |
1869 | { "IPAS2E1NXS" , 27 }, |
1870 | { "IPAS2E1OS" , 28 }, |
1871 | { "IPAS2E1OSNXS" , 29 }, |
1872 | { "IPAS2LE1" , 30 }, |
1873 | { "IPAS2LE1IS" , 31 }, |
1874 | { "IPAS2LE1ISNXS" , 32 }, |
1875 | { "IPAS2LE1NXS" , 33 }, |
1876 | { "IPAS2LE1OS" , 34 }, |
1877 | { "IPAS2LE1OSNXS" , 35 }, |
1878 | { "PAALL" , 36 }, |
1879 | { "PAALLNXS" , 37 }, |
1880 | { "PAALLOS" , 38 }, |
1881 | { "PAALLOSNXS" , 39 }, |
1882 | { "RIPAS2E1" , 40 }, |
1883 | { "RIPAS2E1IS" , 41 }, |
1884 | { "RIPAS2E1ISNXS" , 42 }, |
1885 | { "RIPAS2E1NXS" , 43 }, |
1886 | { "RIPAS2E1OS" , 44 }, |
1887 | { "RIPAS2E1OSNXS" , 45 }, |
1888 | { "RIPAS2LE1" , 46 }, |
1889 | { "RIPAS2LE1IS" , 47 }, |
1890 | { "RIPAS2LE1ISNXS" , 48 }, |
1891 | { "RIPAS2LE1NXS" , 49 }, |
1892 | { "RIPAS2LE1OS" , 50 }, |
1893 | { "RIPAS2LE1OSNXS" , 51 }, |
1894 | { "RPALOS" , 52 }, |
1895 | { "RPALOSNXS" , 53 }, |
1896 | { "RPAOS" , 54 }, |
1897 | { "RPAOSNXS" , 55 }, |
1898 | { "RVAAE1" , 56 }, |
1899 | { "RVAAE1IS" , 57 }, |
1900 | { "RVAAE1ISNXS" , 58 }, |
1901 | { "RVAAE1NXS" , 59 }, |
1902 | { "RVAAE1OS" , 60 }, |
1903 | { "RVAAE1OSNXS" , 61 }, |
1904 | { "RVAALE1" , 62 }, |
1905 | { "RVAALE1IS" , 63 }, |
1906 | { "RVAALE1ISNXS" , 64 }, |
1907 | { "RVAALE1NXS" , 65 }, |
1908 | { "RVAALE1OS" , 66 }, |
1909 | { "RVAALE1OSNXS" , 67 }, |
1910 | { "RVAE1" , 68 }, |
1911 | { "RVAE1IS" , 69 }, |
1912 | { "RVAE1ISNXS" , 70 }, |
1913 | { "RVAE1NXS" , 71 }, |
1914 | { "RVAE1OS" , 72 }, |
1915 | { "RVAE1OSNXS" , 73 }, |
1916 | { "RVAE2" , 74 }, |
1917 | { "RVAE2IS" , 75 }, |
1918 | { "RVAE2ISNXS" , 76 }, |
1919 | { "RVAE2NXS" , 77 }, |
1920 | { "RVAE2OS" , 78 }, |
1921 | { "RVAE2OSNXS" , 79 }, |
1922 | { "RVAE3" , 80 }, |
1923 | { "RVAE3IS" , 81 }, |
1924 | { "RVAE3ISNXS" , 82 }, |
1925 | { "RVAE3NXS" , 83 }, |
1926 | { "RVAE3OS" , 84 }, |
1927 | { "RVAE3OSNXS" , 85 }, |
1928 | { "RVALE1" , 86 }, |
1929 | { "RVALE1IS" , 87 }, |
1930 | { "RVALE1ISNXS" , 88 }, |
1931 | { "RVALE1NXS" , 89 }, |
1932 | { "RVALE1OS" , 90 }, |
1933 | { "RVALE1OSNXS" , 91 }, |
1934 | { "RVALE2" , 92 }, |
1935 | { "RVALE2IS" , 93 }, |
1936 | { "RVALE2ISNXS" , 94 }, |
1937 | { "RVALE2NXS" , 95 }, |
1938 | { "RVALE2OS" , 96 }, |
1939 | { "RVALE2OSNXS" , 97 }, |
1940 | { "RVALE3" , 98 }, |
1941 | { "RVALE3IS" , 99 }, |
1942 | { "RVALE3ISNXS" , 100 }, |
1943 | { "RVALE3NXS" , 101 }, |
1944 | { "RVALE3OS" , 102 }, |
1945 | { "RVALE3OSNXS" , 103 }, |
1946 | { "VAAE1" , 104 }, |
1947 | { "VAAE1IS" , 105 }, |
1948 | { "VAAE1ISNXS" , 106 }, |
1949 | { "VAAE1NXS" , 107 }, |
1950 | { "VAAE1OS" , 108 }, |
1951 | { "VAAE1OSNXS" , 109 }, |
1952 | { "VAALE1" , 110 }, |
1953 | { "VAALE1IS" , 111 }, |
1954 | { "VAALE1ISNXS" , 112 }, |
1955 | { "VAALE1NXS" , 113 }, |
1956 | { "VAALE1OS" , 114 }, |
1957 | { "VAALE1OSNXS" , 115 }, |
1958 | { "VAE1" , 116 }, |
1959 | { "VAE1IS" , 117 }, |
1960 | { "VAE1ISNXS" , 118 }, |
1961 | { "VAE1NXS" , 119 }, |
1962 | { "VAE1OS" , 120 }, |
1963 | { "VAE1OSNXS" , 121 }, |
1964 | { "VAE2" , 122 }, |
1965 | { "VAE2IS" , 123 }, |
1966 | { "VAE2ISNXS" , 124 }, |
1967 | { "VAE2NXS" , 125 }, |
1968 | { "VAE2OS" , 126 }, |
1969 | { "VAE2OSNXS" , 127 }, |
1970 | { "VAE3" , 128 }, |
1971 | { "VAE3IS" , 129 }, |
1972 | { "VAE3ISNXS" , 130 }, |
1973 | { "VAE3NXS" , 131 }, |
1974 | { "VAE3OS" , 132 }, |
1975 | { "VAE3OSNXS" , 133 }, |
1976 | { "VALE1" , 134 }, |
1977 | { "VALE1IS" , 135 }, |
1978 | { "VALE1ISNXS" , 136 }, |
1979 | { "VALE1NXS" , 137 }, |
1980 | { "VALE1OS" , 138 }, |
1981 | { "VALE1OSNXS" , 139 }, |
1982 | { "VALE2" , 140 }, |
1983 | { "VALE2IS" , 141 }, |
1984 | { "VALE2ISNXS" , 142 }, |
1985 | { "VALE2NXS" , 143 }, |
1986 | { "VALE2OS" , 144 }, |
1987 | { "VALE2OSNXS" , 145 }, |
1988 | { "VALE3" , 146 }, |
1989 | { "VALE3IS" , 147 }, |
1990 | { "VALE3ISNXS" , 148 }, |
1991 | { "VALE3NXS" , 149 }, |
1992 | { "VALE3OS" , 150 }, |
1993 | { "VALE3OSNXS" , 151 }, |
1994 | { "VMALLE1" , 152 }, |
1995 | { "VMALLE1IS" , 153 }, |
1996 | { "VMALLE1ISNXS" , 154 }, |
1997 | { "VMALLE1NXS" , 155 }, |
1998 | { "VMALLE1OS" , 156 }, |
1999 | { "VMALLE1OSNXS" , 157 }, |
2000 | { "VMALLS12E1" , 158 }, |
2001 | { "VMALLS12E1IS" , 159 }, |
2002 | { "VMALLS12E1ISNXS" , 160 }, |
2003 | { "VMALLS12E1NXS" , 161 }, |
2004 | { "VMALLS12E1OS" , 162 }, |
2005 | { "VMALLS12E1OSNXS" , 163 }, |
2006 | { "VMALLWS2E1" , 164 }, |
2007 | { "VMALLWS2E1IS" , 165 }, |
2008 | { "VMALLWS2E1ISNXS" , 166 }, |
2009 | { "VMALLWS2E1NXS" , 167 }, |
2010 | { "VMALLWS2E1OS" , 168 }, |
2011 | { "VMALLWS2E1OSNXS" , 169 }, |
2012 | }; |
2013 | |
2014 | struct KeyType { |
2015 | std::string Name; |
2016 | }; |
2017 | KeyType Key = {Name.upper()}; |
2018 | struct Comp { |
2019 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2020 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2021 | if (CmpName < 0) return true; |
2022 | if (CmpName > 0) return false; |
2023 | return false; |
2024 | } |
2025 | }; |
2026 | auto Table = ArrayRef(Index); |
2027 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2028 | if (Idx == Table.end() || |
2029 | Key.Name != Idx->Name) |
2030 | return nullptr; |
2031 | |
2032 | return &TLBITable[Idx->_index]; |
2033 | } |
2034 | #endif |
2035 | |
2036 | #ifdef GET_AT_DECL |
2037 | const AT *lookupATByName(StringRef Name); |
2038 | const AT *lookupATByEncoding(uint16_t Encoding); |
2039 | #endif |
2040 | |
2041 | #ifdef GET_AT_IMPL |
2042 | constexpr AT ATsList[] = { |
2043 | { "S12E0R" , 0x23C6, {} }, // 0 |
2044 | { "S12E0W" , 0x23C7, {} }, // 1 |
2045 | { "S12E1R" , 0x23C4, {} }, // 2 |
2046 | { "S12E1W" , 0x23C5, {} }, // 3 |
2047 | { "S1E0R" , 0x3C2, {} }, // 4 |
2048 | { "S1E0W" , 0x3C3, {} }, // 5 |
2049 | { "S1E1A" , 0x3CA, {} }, // 6 |
2050 | { "S1E1R" , 0x3C0, {} }, // 7 |
2051 | { "S1E1RP" , 0x3C8, {AArch64::FeaturePAN_RWV} }, // 8 |
2052 | { "S1E1W" , 0x3C1, {} }, // 9 |
2053 | { "S1E1WP" , 0x3C9, {AArch64::FeaturePAN_RWV} }, // 10 |
2054 | { "S1E2A" , 0x23CA, {} }, // 11 |
2055 | { "S1E2R" , 0x23C0, {} }, // 12 |
2056 | { "S1E2W" , 0x23C1, {} }, // 13 |
2057 | { "S1E3A" , 0x33CA, {} }, // 14 |
2058 | { "S1E3R" , 0x33C0, {} }, // 15 |
2059 | { "S1E3W" , 0x33C1, {} }, // 16 |
2060 | }; |
2061 | |
2062 | const AT *lookupATByName(StringRef Name) { |
2063 | struct IndexType { |
2064 | const char * Name; |
2065 | unsigned _index; |
2066 | }; |
2067 | static const struct IndexType Index[] = { |
2068 | { "S12E0R" , 0 }, |
2069 | { "S12E0W" , 1 }, |
2070 | { "S12E1R" , 2 }, |
2071 | { "S12E1W" , 3 }, |
2072 | { "S1E0R" , 4 }, |
2073 | { "S1E0W" , 5 }, |
2074 | { "S1E1A" , 6 }, |
2075 | { "S1E1R" , 7 }, |
2076 | { "S1E1RP" , 8 }, |
2077 | { "S1E1W" , 9 }, |
2078 | { "S1E1WP" , 10 }, |
2079 | { "S1E2A" , 11 }, |
2080 | { "S1E2R" , 12 }, |
2081 | { "S1E2W" , 13 }, |
2082 | { "S1E3A" , 14 }, |
2083 | { "S1E3R" , 15 }, |
2084 | { "S1E3W" , 16 }, |
2085 | }; |
2086 | |
2087 | struct KeyType { |
2088 | std::string Name; |
2089 | }; |
2090 | KeyType Key = {Name.upper()}; |
2091 | struct Comp { |
2092 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2093 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2094 | if (CmpName < 0) return true; |
2095 | if (CmpName > 0) return false; |
2096 | return false; |
2097 | } |
2098 | }; |
2099 | auto Table = ArrayRef(Index); |
2100 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2101 | if (Idx == Table.end() || |
2102 | Key.Name != Idx->Name) |
2103 | return nullptr; |
2104 | |
2105 | return &ATsList[Idx->_index]; |
2106 | } |
2107 | |
2108 | const AT *lookupATByEncoding(uint16_t Encoding) { |
2109 | struct IndexType { |
2110 | uint16_t Encoding; |
2111 | unsigned _index; |
2112 | }; |
2113 | static const struct IndexType Index[] = { |
2114 | { 0x3C0, 7 }, |
2115 | { 0x3C1, 9 }, |
2116 | { 0x3C2, 4 }, |
2117 | { 0x3C3, 5 }, |
2118 | { 0x3C8, 8 }, |
2119 | { 0x3C9, 10 }, |
2120 | { 0x3CA, 6 }, |
2121 | { 0x23C0, 12 }, |
2122 | { 0x23C1, 13 }, |
2123 | { 0x23C4, 2 }, |
2124 | { 0x23C5, 3 }, |
2125 | { 0x23C6, 0 }, |
2126 | { 0x23C7, 1 }, |
2127 | { 0x23CA, 11 }, |
2128 | { 0x33C0, 15 }, |
2129 | { 0x33C1, 16 }, |
2130 | { 0x33CA, 14 }, |
2131 | }; |
2132 | |
2133 | struct KeyType { |
2134 | uint16_t Encoding; |
2135 | }; |
2136 | KeyType Key = {Encoding}; |
2137 | struct Comp { |
2138 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2139 | if (LHS.Encoding < RHS.Encoding) |
2140 | return true; |
2141 | if (LHS.Encoding > RHS.Encoding) |
2142 | return false; |
2143 | return false; |
2144 | } |
2145 | }; |
2146 | auto Table = ArrayRef(Index); |
2147 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2148 | if (Idx == Table.end() || |
2149 | Key.Encoding != Idx->Encoding) |
2150 | return nullptr; |
2151 | |
2152 | return &ATsList[Idx->_index]; |
2153 | } |
2154 | #endif |
2155 | |
2156 | #ifdef GET_BTI_DECL |
2157 | const BTI *lookupBTIByName(StringRef Name); |
2158 | const BTI *lookupBTIByEncoding(uint8_t Encoding); |
2159 | #endif |
2160 | |
2161 | #ifdef GET_BTI_IMPL |
2162 | constexpr BTI BTIsList[] = { |
2163 | { "c" , 0x2 }, // 0 |
2164 | { "j" , 0x4 }, // 1 |
2165 | { "jc" , 0x6 }, // 2 |
2166 | }; |
2167 | |
2168 | const BTI *lookupBTIByName(StringRef Name) { |
2169 | struct IndexType { |
2170 | const char * Name; |
2171 | unsigned _index; |
2172 | }; |
2173 | static const struct IndexType Index[] = { |
2174 | { "C" , 0 }, |
2175 | { "J" , 1 }, |
2176 | { "JC" , 2 }, |
2177 | }; |
2178 | |
2179 | struct KeyType { |
2180 | std::string Name; |
2181 | }; |
2182 | KeyType Key = {Name.upper()}; |
2183 | struct Comp { |
2184 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2185 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2186 | if (CmpName < 0) return true; |
2187 | if (CmpName > 0) return false; |
2188 | return false; |
2189 | } |
2190 | }; |
2191 | auto Table = ArrayRef(Index); |
2192 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2193 | if (Idx == Table.end() || |
2194 | Key.Name != Idx->Name) |
2195 | return nullptr; |
2196 | |
2197 | return &BTIsList[Idx->_index]; |
2198 | } |
2199 | |
2200 | const BTI *lookupBTIByEncoding(uint8_t Encoding) { |
2201 | struct IndexType { |
2202 | uint8_t Encoding; |
2203 | unsigned _index; |
2204 | }; |
2205 | static const struct IndexType Index[] = { |
2206 | { 0x2, 0 }, |
2207 | { 0x4, 1 }, |
2208 | { 0x6, 2 }, |
2209 | }; |
2210 | |
2211 | struct KeyType { |
2212 | uint8_t Encoding; |
2213 | }; |
2214 | KeyType Key = {Encoding}; |
2215 | struct Comp { |
2216 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2217 | if (LHS.Encoding < RHS.Encoding) |
2218 | return true; |
2219 | if (LHS.Encoding > RHS.Encoding) |
2220 | return false; |
2221 | return false; |
2222 | } |
2223 | }; |
2224 | auto Table = ArrayRef(Index); |
2225 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2226 | if (Idx == Table.end() || |
2227 | Key.Encoding != Idx->Encoding) |
2228 | return nullptr; |
2229 | |
2230 | return &BTIsList[Idx->_index]; |
2231 | } |
2232 | #endif |
2233 | |
2234 | #ifdef GET_DB_DECL |
2235 | const DB *lookupDBByName(StringRef Name); |
2236 | const DB *lookupDBByEncoding(uint8_t Encoding); |
2237 | #endif |
2238 | |
2239 | #ifdef GET_DB_IMPL |
2240 | constexpr DB DBsList[] = { |
2241 | { "ish" , 0xB }, // 0 |
2242 | { "ishld" , 0x9 }, // 1 |
2243 | { "ishst" , 0xA }, // 2 |
2244 | { "ld" , 0xD }, // 3 |
2245 | { "nsh" , 0x7 }, // 4 |
2246 | { "nshld" , 0x5 }, // 5 |
2247 | { "nshst" , 0x6 }, // 6 |
2248 | { "osh" , 0x3 }, // 7 |
2249 | { "oshld" , 0x1 }, // 8 |
2250 | { "oshst" , 0x2 }, // 9 |
2251 | { "st" , 0xE }, // 10 |
2252 | { "sy" , 0xF }, // 11 |
2253 | }; |
2254 | |
2255 | const DB *lookupDBByName(StringRef Name) { |
2256 | struct IndexType { |
2257 | const char * Name; |
2258 | unsigned _index; |
2259 | }; |
2260 | static const struct IndexType Index[] = { |
2261 | { "ISH" , 0 }, |
2262 | { "ISHLD" , 1 }, |
2263 | { "ISHST" , 2 }, |
2264 | { "LD" , 3 }, |
2265 | { "NSH" , 4 }, |
2266 | { "NSHLD" , 5 }, |
2267 | { "NSHST" , 6 }, |
2268 | { "OSH" , 7 }, |
2269 | { "OSHLD" , 8 }, |
2270 | { "OSHST" , 9 }, |
2271 | { "ST" , 10 }, |
2272 | { "SY" , 11 }, |
2273 | }; |
2274 | |
2275 | struct KeyType { |
2276 | std::string Name; |
2277 | }; |
2278 | KeyType Key = {Name.upper()}; |
2279 | struct Comp { |
2280 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2281 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2282 | if (CmpName < 0) return true; |
2283 | if (CmpName > 0) return false; |
2284 | return false; |
2285 | } |
2286 | }; |
2287 | auto Table = ArrayRef(Index); |
2288 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2289 | if (Idx == Table.end() || |
2290 | Key.Name != Idx->Name) |
2291 | return nullptr; |
2292 | |
2293 | return &DBsList[Idx->_index]; |
2294 | } |
2295 | |
2296 | const DB *lookupDBByEncoding(uint8_t Encoding) { |
2297 | struct IndexType { |
2298 | uint8_t Encoding; |
2299 | unsigned _index; |
2300 | }; |
2301 | static const struct IndexType Index[] = { |
2302 | { 0x1, 8 }, |
2303 | { 0x2, 9 }, |
2304 | { 0x3, 7 }, |
2305 | { 0x5, 5 }, |
2306 | { 0x6, 6 }, |
2307 | { 0x7, 4 }, |
2308 | { 0x9, 1 }, |
2309 | { 0xA, 2 }, |
2310 | { 0xB, 0 }, |
2311 | { 0xD, 3 }, |
2312 | { 0xE, 10 }, |
2313 | { 0xF, 11 }, |
2314 | }; |
2315 | |
2316 | struct KeyType { |
2317 | uint8_t Encoding; |
2318 | }; |
2319 | KeyType Key = {Encoding}; |
2320 | struct Comp { |
2321 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2322 | if (LHS.Encoding < RHS.Encoding) |
2323 | return true; |
2324 | if (LHS.Encoding > RHS.Encoding) |
2325 | return false; |
2326 | return false; |
2327 | } |
2328 | }; |
2329 | auto Table = ArrayRef(Index); |
2330 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2331 | if (Idx == Table.end() || |
2332 | Key.Encoding != Idx->Encoding) |
2333 | return nullptr; |
2334 | |
2335 | return &DBsList[Idx->_index]; |
2336 | } |
2337 | #endif |
2338 | |
2339 | #ifdef GET_DBNXS_DECL |
2340 | const DBnXS *lookupDBnXSByName(StringRef Name); |
2341 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding); |
2342 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue); |
2343 | #endif |
2344 | |
2345 | #ifdef GET_DBNXS_IMPL |
2346 | constexpr DBnXS DBnXSsList[] = { |
2347 | { "ishnxs" , 0xB, 0x18, {AArch64::FeatureXS} }, // 0 |
2348 | { "nshnxs" , 0x7, 0x14, {AArch64::FeatureXS} }, // 1 |
2349 | { "oshnxs" , 0x3, 0x10, {AArch64::FeatureXS} }, // 2 |
2350 | { "synxs" , 0xF, 0x1C, {AArch64::FeatureXS} }, // 3 |
2351 | }; |
2352 | |
2353 | const DBnXS *lookupDBnXSByName(StringRef Name) { |
2354 | struct IndexType { |
2355 | const char * Name; |
2356 | unsigned _index; |
2357 | }; |
2358 | static const struct IndexType Index[] = { |
2359 | { "ISHNXS" , 0 }, |
2360 | { "NSHNXS" , 1 }, |
2361 | { "OSHNXS" , 2 }, |
2362 | { "SYNXS" , 3 }, |
2363 | }; |
2364 | |
2365 | struct KeyType { |
2366 | std::string Name; |
2367 | }; |
2368 | KeyType Key = {Name.upper()}; |
2369 | struct Comp { |
2370 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2371 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2372 | if (CmpName < 0) return true; |
2373 | if (CmpName > 0) return false; |
2374 | return false; |
2375 | } |
2376 | }; |
2377 | auto Table = ArrayRef(Index); |
2378 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2379 | if (Idx == Table.end() || |
2380 | Key.Name != Idx->Name) |
2381 | return nullptr; |
2382 | |
2383 | return &DBnXSsList[Idx->_index]; |
2384 | } |
2385 | |
2386 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding) { |
2387 | struct IndexType { |
2388 | uint8_t Encoding; |
2389 | unsigned _index; |
2390 | }; |
2391 | static const struct IndexType Index[] = { |
2392 | { 0x3, 2 }, |
2393 | { 0x7, 1 }, |
2394 | { 0xB, 0 }, |
2395 | { 0xF, 3 }, |
2396 | }; |
2397 | |
2398 | struct KeyType { |
2399 | uint8_t Encoding; |
2400 | }; |
2401 | KeyType Key = {Encoding}; |
2402 | struct Comp { |
2403 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2404 | if (LHS.Encoding < RHS.Encoding) |
2405 | return true; |
2406 | if (LHS.Encoding > RHS.Encoding) |
2407 | return false; |
2408 | return false; |
2409 | } |
2410 | }; |
2411 | auto Table = ArrayRef(Index); |
2412 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2413 | if (Idx == Table.end() || |
2414 | Key.Encoding != Idx->Encoding) |
2415 | return nullptr; |
2416 | |
2417 | return &DBnXSsList[Idx->_index]; |
2418 | } |
2419 | |
2420 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue) { |
2421 | struct IndexType { |
2422 | uint8_t ImmValue; |
2423 | unsigned _index; |
2424 | }; |
2425 | static const struct IndexType Index[] = { |
2426 | { 0x10, 2 }, |
2427 | { 0x14, 1 }, |
2428 | { 0x18, 0 }, |
2429 | { 0x1C, 3 }, |
2430 | }; |
2431 | |
2432 | struct KeyType { |
2433 | uint8_t ImmValue; |
2434 | }; |
2435 | KeyType Key = {ImmValue}; |
2436 | struct Comp { |
2437 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2438 | if (LHS.ImmValue < RHS.ImmValue) |
2439 | return true; |
2440 | if (LHS.ImmValue > RHS.ImmValue) |
2441 | return false; |
2442 | return false; |
2443 | } |
2444 | }; |
2445 | auto Table = ArrayRef(Index); |
2446 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2447 | if (Idx == Table.end() || |
2448 | Key.ImmValue != Idx->ImmValue) |
2449 | return nullptr; |
2450 | |
2451 | return &DBnXSsList[Idx->_index]; |
2452 | } |
2453 | #endif |
2454 | |
2455 | #ifdef GET_DC_DECL |
2456 | const DC *lookupDCByName(StringRef Name); |
2457 | const DC *lookupDCByEncoding(uint16_t Encoding); |
2458 | #endif |
2459 | |
2460 | #ifdef GET_DC_IMPL |
2461 | constexpr DC DCsList[] = { |
2462 | { "CGDSW" , 0x3D6, {AArch64::FeatureMTE} }, // 0 |
2463 | { "CGDVAC" , 0x1BD5, {AArch64::FeatureMTE} }, // 1 |
2464 | { "CGDVADP" , 0x1BED, {AArch64::FeatureMTE} }, // 2 |
2465 | { "CGDVAP" , 0x1BE5, {AArch64::FeatureMTE} }, // 3 |
2466 | { "CGSW" , 0x3D4, {AArch64::FeatureMTE} }, // 4 |
2467 | { "CGVAC" , 0x1BD3, {AArch64::FeatureMTE} }, // 5 |
2468 | { "CGVADP" , 0x1BEB, {AArch64::FeatureMTE} }, // 6 |
2469 | { "CGVAP" , 0x1BE3, {AArch64::FeatureMTE} }, // 7 |
2470 | { "CIGDPAE" , 0x23F7, {AArch64::FeatureMEC} }, // 8 |
2471 | { "CIGDSW" , 0x3F6, {AArch64::FeatureMTE} }, // 9 |
2472 | { "CIGDVAC" , 0x1BF5, {AArch64::FeatureMTE} }, // 10 |
2473 | { "CIGSW" , 0x3F4, {AArch64::FeatureMTE} }, // 11 |
2474 | { "CIGVAC" , 0x1BF3, {AArch64::FeatureMTE} }, // 12 |
2475 | { "CIPAE" , 0x23F0, {AArch64::FeatureMEC} }, // 13 |
2476 | { "CISW" , 0x3F2, {} }, // 14 |
2477 | { "CIVAC" , 0x1BF1, {} }, // 15 |
2478 | { "CSW" , 0x3D2, {} }, // 16 |
2479 | { "CVAC" , 0x1BD1, {} }, // 17 |
2480 | { "CVADP" , 0x1BE9, {AArch64::FeatureCacheDeepPersist} }, // 18 |
2481 | { "CVAP" , 0x1BE1, {AArch64::FeatureCCPP} }, // 19 |
2482 | { "CVAU" , 0x1BD9, {} }, // 20 |
2483 | { "GVA" , 0x1BA3, {AArch64::FeatureMTE} }, // 21 |
2484 | { "GZVA" , 0x1BA4, {AArch64::FeatureMTE} }, // 22 |
2485 | { "IGDSW" , 0x3B6, {AArch64::FeatureMTE} }, // 23 |
2486 | { "IGDVAC" , 0x3B5, {AArch64::FeatureMTE} }, // 24 |
2487 | { "IGSW" , 0x3B4, {AArch64::FeatureMTE} }, // 25 |
2488 | { "IGVAC" , 0x3B3, {AArch64::FeatureMTE} }, // 26 |
2489 | { "ISW" , 0x3B2, {} }, // 27 |
2490 | { "IVAC" , 0x3B1, {} }, // 28 |
2491 | { "ZVA" , 0x1BA1, {} }, // 29 |
2492 | }; |
2493 | |
2494 | const DC *lookupDCByName(StringRef Name) { |
2495 | struct IndexType { |
2496 | const char * Name; |
2497 | unsigned _index; |
2498 | }; |
2499 | static const struct IndexType Index[] = { |
2500 | { "CGDSW" , 0 }, |
2501 | { "CGDVAC" , 1 }, |
2502 | { "CGDVADP" , 2 }, |
2503 | { "CGDVAP" , 3 }, |
2504 | { "CGSW" , 4 }, |
2505 | { "CGVAC" , 5 }, |
2506 | { "CGVADP" , 6 }, |
2507 | { "CGVAP" , 7 }, |
2508 | { "CIGDPAE" , 8 }, |
2509 | { "CIGDSW" , 9 }, |
2510 | { "CIGDVAC" , 10 }, |
2511 | { "CIGSW" , 11 }, |
2512 | { "CIGVAC" , 12 }, |
2513 | { "CIPAE" , 13 }, |
2514 | { "CISW" , 14 }, |
2515 | { "CIVAC" , 15 }, |
2516 | { "CSW" , 16 }, |
2517 | { "CVAC" , 17 }, |
2518 | { "CVADP" , 18 }, |
2519 | { "CVAP" , 19 }, |
2520 | { "CVAU" , 20 }, |
2521 | { "GVA" , 21 }, |
2522 | { "GZVA" , 22 }, |
2523 | { "IGDSW" , 23 }, |
2524 | { "IGDVAC" , 24 }, |
2525 | { "IGSW" , 25 }, |
2526 | { "IGVAC" , 26 }, |
2527 | { "ISW" , 27 }, |
2528 | { "IVAC" , 28 }, |
2529 | { "ZVA" , 29 }, |
2530 | }; |
2531 | |
2532 | struct KeyType { |
2533 | std::string Name; |
2534 | }; |
2535 | KeyType Key = {Name.upper()}; |
2536 | struct Comp { |
2537 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2538 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2539 | if (CmpName < 0) return true; |
2540 | if (CmpName > 0) return false; |
2541 | return false; |
2542 | } |
2543 | }; |
2544 | auto Table = ArrayRef(Index); |
2545 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2546 | if (Idx == Table.end() || |
2547 | Key.Name != Idx->Name) |
2548 | return nullptr; |
2549 | |
2550 | return &DCsList[Idx->_index]; |
2551 | } |
2552 | |
2553 | const DC *lookupDCByEncoding(uint16_t Encoding) { |
2554 | struct IndexType { |
2555 | uint16_t Encoding; |
2556 | unsigned _index; |
2557 | }; |
2558 | static const struct IndexType Index[] = { |
2559 | { 0x3B1, 28 }, |
2560 | { 0x3B2, 27 }, |
2561 | { 0x3B3, 26 }, |
2562 | { 0x3B4, 25 }, |
2563 | { 0x3B5, 24 }, |
2564 | { 0x3B6, 23 }, |
2565 | { 0x3D2, 16 }, |
2566 | { 0x3D4, 4 }, |
2567 | { 0x3D6, 0 }, |
2568 | { 0x3F2, 14 }, |
2569 | { 0x3F4, 11 }, |
2570 | { 0x3F6, 9 }, |
2571 | { 0x1BA1, 29 }, |
2572 | { 0x1BA3, 21 }, |
2573 | { 0x1BA4, 22 }, |
2574 | { 0x1BD1, 17 }, |
2575 | { 0x1BD3, 5 }, |
2576 | { 0x1BD5, 1 }, |
2577 | { 0x1BD9, 20 }, |
2578 | { 0x1BE1, 19 }, |
2579 | { 0x1BE3, 7 }, |
2580 | { 0x1BE5, 3 }, |
2581 | { 0x1BE9, 18 }, |
2582 | { 0x1BEB, 6 }, |
2583 | { 0x1BED, 2 }, |
2584 | { 0x1BF1, 15 }, |
2585 | { 0x1BF3, 12 }, |
2586 | { 0x1BF5, 10 }, |
2587 | { 0x23F0, 13 }, |
2588 | { 0x23F7, 8 }, |
2589 | }; |
2590 | |
2591 | struct KeyType { |
2592 | uint16_t Encoding; |
2593 | }; |
2594 | KeyType Key = {Encoding}; |
2595 | struct Comp { |
2596 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2597 | if (LHS.Encoding < RHS.Encoding) |
2598 | return true; |
2599 | if (LHS.Encoding > RHS.Encoding) |
2600 | return false; |
2601 | return false; |
2602 | } |
2603 | }; |
2604 | auto Table = ArrayRef(Index); |
2605 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2606 | if (Idx == Table.end() || |
2607 | Key.Encoding != Idx->Encoding) |
2608 | return nullptr; |
2609 | |
2610 | return &DCsList[Idx->_index]; |
2611 | } |
2612 | #endif |
2613 | |
2614 | #ifdef GET_EXACTFPIMM_DECL |
2615 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum); |
2616 | const ExactFPImm *lookupExactFPImmByRepr(StringRef Repr); |
2617 | #endif |
2618 | |
2619 | #ifdef GET_EXACTFPIMM_IMPL |
2620 | constexpr ExactFPImm ExactFPImmsList[] = { |
2621 | { "half" , 0x1, "0.5" }, // 0 |
2622 | { "one" , 0x2, "1.0" }, // 1 |
2623 | { "two" , 0x3, "2.0" }, // 2 |
2624 | { "zero" , 0x0, "0.0" }, // 3 |
2625 | }; |
2626 | |
2627 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum) { |
2628 | struct IndexType { |
2629 | uint8_t Enum; |
2630 | unsigned _index; |
2631 | }; |
2632 | static const struct IndexType Index[] = { |
2633 | { 0x0, 3 }, |
2634 | { 0x1, 0 }, |
2635 | { 0x2, 1 }, |
2636 | { 0x3, 2 }, |
2637 | }; |
2638 | |
2639 | if ((Enum < 0x0) || |
2640 | (Enum > 0x3)) |
2641 | return nullptr; |
2642 | auto Table = ArrayRef(Index); |
2643 | size_t Idx = Enum - 0x0; |
2644 | return &ExactFPImmsList[Table[Idx]._index]; |
2645 | } |
2646 | |
2647 | const ExactFPImm *lookupExactFPImmByRepr(StringRef Repr) { |
2648 | struct IndexType { |
2649 | const char * Repr; |
2650 | unsigned _index; |
2651 | }; |
2652 | static const struct IndexType Index[] = { |
2653 | { "0.0" , 3 }, |
2654 | { "0.5" , 0 }, |
2655 | { "1.0" , 1 }, |
2656 | { "2.0" , 2 }, |
2657 | }; |
2658 | |
2659 | struct KeyType { |
2660 | std::string Repr; |
2661 | }; |
2662 | KeyType Key = {Repr.upper()}; |
2663 | struct Comp { |
2664 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2665 | int CmpRepr = StringRef(LHS.Repr).compare(RHS.Repr); |
2666 | if (CmpRepr < 0) return true; |
2667 | if (CmpRepr > 0) return false; |
2668 | return false; |
2669 | } |
2670 | }; |
2671 | auto Table = ArrayRef(Index); |
2672 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2673 | if (Idx == Table.end() || |
2674 | Key.Repr != Idx->Repr) |
2675 | return nullptr; |
2676 | |
2677 | return &ExactFPImmsList[Idx->_index]; |
2678 | } |
2679 | #endif |
2680 | |
2681 | #ifdef GET_IC_DECL |
2682 | const IC *lookupICByName(StringRef Name); |
2683 | const IC *lookupICByEncoding(uint16_t Encoding); |
2684 | #endif |
2685 | |
2686 | #ifdef GET_IC_IMPL |
2687 | constexpr IC ICsList[] = { |
2688 | { "IALLU" , 0x3A8, false }, // 0 |
2689 | { "IALLUIS" , 0x388, false }, // 1 |
2690 | { "IVAU" , 0x1BA9, true }, // 2 |
2691 | }; |
2692 | |
2693 | const IC *lookupICByName(StringRef Name) { |
2694 | struct IndexType { |
2695 | const char * Name; |
2696 | unsigned _index; |
2697 | }; |
2698 | static const struct IndexType Index[] = { |
2699 | { "IALLU" , 0 }, |
2700 | { "IALLUIS" , 1 }, |
2701 | { "IVAU" , 2 }, |
2702 | }; |
2703 | |
2704 | struct KeyType { |
2705 | std::string Name; |
2706 | }; |
2707 | KeyType Key = {Name.upper()}; |
2708 | struct Comp { |
2709 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2710 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2711 | if (CmpName < 0) return true; |
2712 | if (CmpName > 0) return false; |
2713 | return false; |
2714 | } |
2715 | }; |
2716 | auto Table = ArrayRef(Index); |
2717 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2718 | if (Idx == Table.end() || |
2719 | Key.Name != Idx->Name) |
2720 | return nullptr; |
2721 | |
2722 | return &ICsList[Idx->_index]; |
2723 | } |
2724 | |
2725 | const IC *lookupICByEncoding(uint16_t Encoding) { |
2726 | struct IndexType { |
2727 | uint16_t Encoding; |
2728 | unsigned _index; |
2729 | }; |
2730 | static const struct IndexType Index[] = { |
2731 | { 0x388, 1 }, |
2732 | { 0x3A8, 0 }, |
2733 | { 0x1BA9, 2 }, |
2734 | }; |
2735 | |
2736 | struct KeyType { |
2737 | uint16_t Encoding; |
2738 | }; |
2739 | KeyType Key = {Encoding}; |
2740 | struct Comp { |
2741 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2742 | if (LHS.Encoding < RHS.Encoding) |
2743 | return true; |
2744 | if (LHS.Encoding > RHS.Encoding) |
2745 | return false; |
2746 | return false; |
2747 | } |
2748 | }; |
2749 | auto Table = ArrayRef(Index); |
2750 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2751 | if (Idx == Table.end() || |
2752 | Key.Encoding != Idx->Encoding) |
2753 | return nullptr; |
2754 | |
2755 | return &ICsList[Idx->_index]; |
2756 | } |
2757 | #endif |
2758 | |
2759 | #ifdef GET_ISB_DECL |
2760 | const ISB *lookupISBByName(StringRef Name); |
2761 | const ISB *lookupISBByEncoding(uint8_t Encoding); |
2762 | #endif |
2763 | |
2764 | #ifdef GET_ISB_IMPL |
2765 | constexpr ISB ISBsList[] = { |
2766 | { "sy" , 0xF }, // 0 |
2767 | }; |
2768 | |
2769 | const ISB *lookupISBByName(StringRef Name) { |
2770 | struct IndexType { |
2771 | const char * Name; |
2772 | unsigned _index; |
2773 | }; |
2774 | static const struct IndexType Index[] = { |
2775 | { "SY" , 0 }, |
2776 | }; |
2777 | |
2778 | struct KeyType { |
2779 | std::string Name; |
2780 | }; |
2781 | KeyType Key = {Name.upper()}; |
2782 | struct Comp { |
2783 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2784 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2785 | if (CmpName < 0) return true; |
2786 | if (CmpName > 0) return false; |
2787 | return false; |
2788 | } |
2789 | }; |
2790 | auto Table = ArrayRef(Index); |
2791 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2792 | if (Idx == Table.end() || |
2793 | Key.Name != Idx->Name) |
2794 | return nullptr; |
2795 | |
2796 | return &ISBsList[Idx->_index]; |
2797 | } |
2798 | |
2799 | const ISB *lookupISBByEncoding(uint8_t Encoding) { |
2800 | struct IndexType { |
2801 | uint8_t Encoding; |
2802 | unsigned _index; |
2803 | }; |
2804 | static const struct IndexType Index[] = { |
2805 | { 0xF, 0 }, |
2806 | }; |
2807 | |
2808 | if ((Encoding < 0xF) || |
2809 | (Encoding > 0xF)) |
2810 | return nullptr; |
2811 | auto Table = ArrayRef(Index); |
2812 | size_t Idx = Encoding - 0xF; |
2813 | return &ISBsList[Table[Idx]._index]; |
2814 | } |
2815 | #endif |
2816 | |
2817 | #ifdef GET_PRFM_DECL |
2818 | const PRFM *lookupPRFMByName(StringRef Name); |
2819 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding); |
2820 | #endif |
2821 | |
2822 | #ifdef GET_PRFM_IMPL |
2823 | constexpr PRFM PRFMsList[] = { |
2824 | { "pldl1keep" , 0x0, {} }, // 0 |
2825 | { "pldl1strm" , 0x1, {} }, // 1 |
2826 | { "pldl2keep" , 0x2, {} }, // 2 |
2827 | { "pldl2strm" , 0x3, {} }, // 3 |
2828 | { "pldl3keep" , 0x4, {} }, // 4 |
2829 | { "pldl3strm" , 0x5, {} }, // 5 |
2830 | { "pldslckeep" , 0x6, {AArch64::FeaturePRFM_SLC} }, // 6 |
2831 | { "pldslcstrm" , 0x7, {AArch64::FeaturePRFM_SLC} }, // 7 |
2832 | { "plil1keep" , 0x8, {} }, // 8 |
2833 | { "plil1strm" , 0x9, {} }, // 9 |
2834 | { "plil2keep" , 0xA, {} }, // 10 |
2835 | { "plil2strm" , 0xB, {} }, // 11 |
2836 | { "plil3keep" , 0xC, {} }, // 12 |
2837 | { "plil3strm" , 0xD, {} }, // 13 |
2838 | { "plislckeep" , 0xE, {AArch64::FeaturePRFM_SLC} }, // 14 |
2839 | { "plislcstrm" , 0xF, {AArch64::FeaturePRFM_SLC} }, // 15 |
2840 | { "pstl1keep" , 0x10, {} }, // 16 |
2841 | { "pstl1strm" , 0x11, {} }, // 17 |
2842 | { "pstl2keep" , 0x12, {} }, // 18 |
2843 | { "pstl2strm" , 0x13, {} }, // 19 |
2844 | { "pstl3keep" , 0x14, {} }, // 20 |
2845 | { "pstl3strm" , 0x15, {} }, // 21 |
2846 | { "pstslckeep" , 0x16, {AArch64::FeaturePRFM_SLC} }, // 22 |
2847 | { "pstslcstrm" , 0x17, {AArch64::FeaturePRFM_SLC} }, // 23 |
2848 | }; |
2849 | |
2850 | const PRFM *lookupPRFMByName(StringRef Name) { |
2851 | struct IndexType { |
2852 | const char * Name; |
2853 | unsigned _index; |
2854 | }; |
2855 | static const struct IndexType Index[] = { |
2856 | { "PLDL1KEEP" , 0 }, |
2857 | { "PLDL1STRM" , 1 }, |
2858 | { "PLDL2KEEP" , 2 }, |
2859 | { "PLDL2STRM" , 3 }, |
2860 | { "PLDL3KEEP" , 4 }, |
2861 | { "PLDL3STRM" , 5 }, |
2862 | { "PLDSLCKEEP" , 6 }, |
2863 | { "PLDSLCSTRM" , 7 }, |
2864 | { "PLIL1KEEP" , 8 }, |
2865 | { "PLIL1STRM" , 9 }, |
2866 | { "PLIL2KEEP" , 10 }, |
2867 | { "PLIL2STRM" , 11 }, |
2868 | { "PLIL3KEEP" , 12 }, |
2869 | { "PLIL3STRM" , 13 }, |
2870 | { "PLISLCKEEP" , 14 }, |
2871 | { "PLISLCSTRM" , 15 }, |
2872 | { "PSTL1KEEP" , 16 }, |
2873 | { "PSTL1STRM" , 17 }, |
2874 | { "PSTL2KEEP" , 18 }, |
2875 | { "PSTL2STRM" , 19 }, |
2876 | { "PSTL3KEEP" , 20 }, |
2877 | { "PSTL3STRM" , 21 }, |
2878 | { "PSTSLCKEEP" , 22 }, |
2879 | { "PSTSLCSTRM" , 23 }, |
2880 | }; |
2881 | |
2882 | struct KeyType { |
2883 | std::string Name; |
2884 | }; |
2885 | KeyType Key = {Name.upper()}; |
2886 | struct Comp { |
2887 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2888 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2889 | if (CmpName < 0) return true; |
2890 | if (CmpName > 0) return false; |
2891 | return false; |
2892 | } |
2893 | }; |
2894 | auto Table = ArrayRef(Index); |
2895 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2896 | if (Idx == Table.end() || |
2897 | Key.Name != Idx->Name) |
2898 | return nullptr; |
2899 | |
2900 | return &PRFMsList[Idx->_index]; |
2901 | } |
2902 | |
2903 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding) { |
2904 | struct IndexType { |
2905 | uint8_t Encoding; |
2906 | unsigned _index; |
2907 | }; |
2908 | static const struct IndexType Index[] = { |
2909 | { 0x0, 0 }, |
2910 | { 0x1, 1 }, |
2911 | { 0x2, 2 }, |
2912 | { 0x3, 3 }, |
2913 | { 0x4, 4 }, |
2914 | { 0x5, 5 }, |
2915 | { 0x6, 6 }, |
2916 | { 0x7, 7 }, |
2917 | { 0x8, 8 }, |
2918 | { 0x9, 9 }, |
2919 | { 0xA, 10 }, |
2920 | { 0xB, 11 }, |
2921 | { 0xC, 12 }, |
2922 | { 0xD, 13 }, |
2923 | { 0xE, 14 }, |
2924 | { 0xF, 15 }, |
2925 | { 0x10, 16 }, |
2926 | { 0x11, 17 }, |
2927 | { 0x12, 18 }, |
2928 | { 0x13, 19 }, |
2929 | { 0x14, 20 }, |
2930 | { 0x15, 21 }, |
2931 | { 0x16, 22 }, |
2932 | { 0x17, 23 }, |
2933 | }; |
2934 | |
2935 | if ((Encoding < 0x0) || |
2936 | (Encoding > 0x17)) |
2937 | return nullptr; |
2938 | auto Table = ArrayRef(Index); |
2939 | size_t Idx = Encoding - 0x0; |
2940 | return &PRFMsList[Table[Idx]._index]; |
2941 | } |
2942 | #endif |
2943 | |
2944 | #ifdef GET_PSB_DECL |
2945 | const PSB *lookupPSBByName(StringRef Name); |
2946 | const PSB *lookupPSBByEncoding(uint8_t Encoding); |
2947 | #endif |
2948 | |
2949 | #ifdef GET_PSB_IMPL |
2950 | constexpr PSB PSBsList[] = { |
2951 | { "csync" , 0x11 }, // 0 |
2952 | }; |
2953 | |
2954 | const PSB *lookupPSBByName(StringRef Name) { |
2955 | struct IndexType { |
2956 | const char * Name; |
2957 | unsigned _index; |
2958 | }; |
2959 | static const struct IndexType Index[] = { |
2960 | { "CSYNC" , 0 }, |
2961 | }; |
2962 | |
2963 | struct KeyType { |
2964 | std::string Name; |
2965 | }; |
2966 | KeyType Key = {Name.upper()}; |
2967 | struct Comp { |
2968 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
2969 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
2970 | if (CmpName < 0) return true; |
2971 | if (CmpName > 0) return false; |
2972 | return false; |
2973 | } |
2974 | }; |
2975 | auto Table = ArrayRef(Index); |
2976 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
2977 | if (Idx == Table.end() || |
2978 | Key.Name != Idx->Name) |
2979 | return nullptr; |
2980 | |
2981 | return &PSBsList[Idx->_index]; |
2982 | } |
2983 | |
2984 | const PSB *lookupPSBByEncoding(uint8_t Encoding) { |
2985 | struct IndexType { |
2986 | uint8_t Encoding; |
2987 | unsigned _index; |
2988 | }; |
2989 | static const struct IndexType Index[] = { |
2990 | { 0x11, 0 }, |
2991 | }; |
2992 | |
2993 | if ((Encoding < 0x11) || |
2994 | (Encoding > 0x11)) |
2995 | return nullptr; |
2996 | auto Table = ArrayRef(Index); |
2997 | size_t Idx = Encoding - 0x11; |
2998 | return &PSBsList[Table[Idx]._index]; |
2999 | } |
3000 | #endif |
3001 | |
3002 | #ifdef GET_PSTATEIMM0_1_DECL |
3003 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name); |
3004 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding); |
3005 | #endif |
3006 | |
3007 | #ifdef GET_PSTATEIMM0_1_IMPL |
3008 | constexpr PStateImm0_1 PStateImm0_1sList[] = { |
3009 | { "ALLINT" , 0x8, {AArch64::FeatureNMI} }, // 0 |
3010 | { "PM" , 0x48, {} }, // 1 |
3011 | }; |
3012 | |
3013 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name) { |
3014 | struct IndexType { |
3015 | const char * Name; |
3016 | unsigned _index; |
3017 | }; |
3018 | static const struct IndexType Index[] = { |
3019 | { "ALLINT" , 0 }, |
3020 | { "PM" , 1 }, |
3021 | }; |
3022 | |
3023 | struct KeyType { |
3024 | std::string Name; |
3025 | }; |
3026 | KeyType Key = {Name.upper()}; |
3027 | struct Comp { |
3028 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3029 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3030 | if (CmpName < 0) return true; |
3031 | if (CmpName > 0) return false; |
3032 | return false; |
3033 | } |
3034 | }; |
3035 | auto Table = ArrayRef(Index); |
3036 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3037 | if (Idx == Table.end() || |
3038 | Key.Name != Idx->Name) |
3039 | return nullptr; |
3040 | |
3041 | return &PStateImm0_1sList[Idx->_index]; |
3042 | } |
3043 | |
3044 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding) { |
3045 | struct IndexType { |
3046 | uint16_t Encoding; |
3047 | unsigned _index; |
3048 | }; |
3049 | static const struct IndexType Index[] = { |
3050 | { 0x8, 0 }, |
3051 | { 0x48, 1 }, |
3052 | }; |
3053 | |
3054 | struct KeyType { |
3055 | uint16_t Encoding; |
3056 | }; |
3057 | KeyType Key = {Encoding}; |
3058 | struct Comp { |
3059 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3060 | if (LHS.Encoding < RHS.Encoding) |
3061 | return true; |
3062 | if (LHS.Encoding > RHS.Encoding) |
3063 | return false; |
3064 | return false; |
3065 | } |
3066 | }; |
3067 | auto Table = ArrayRef(Index); |
3068 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3069 | if (Idx == Table.end() || |
3070 | Key.Encoding != Idx->Encoding) |
3071 | return nullptr; |
3072 | |
3073 | return &PStateImm0_1sList[Idx->_index]; |
3074 | } |
3075 | #endif |
3076 | |
3077 | #ifdef GET_PSTATEIMM0_15_DECL |
3078 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name); |
3079 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding); |
3080 | #endif |
3081 | |
3082 | #ifdef GET_PSTATEIMM0_15_IMPL |
3083 | constexpr PStateImm0_15 PStateImm0_15sList[] = { |
3084 | { "DAIFClr" , 0x1F, {} }, // 0 |
3085 | { "DAIFSet" , 0x1E, {} }, // 1 |
3086 | { "DIT" , 0x1A, {AArch64::FeatureDIT} }, // 2 |
3087 | { "PAN" , 0x4, {AArch64::FeaturePAN} }, // 3 |
3088 | { "SPSel" , 0x5, {} }, // 4 |
3089 | { "SSBS" , 0x19, {AArch64::FeatureSSBS} }, // 5 |
3090 | { "TCO" , 0x1C, {AArch64::FeatureMTE} }, // 6 |
3091 | { "UAO" , 0x3, {AArch64::FeaturePsUAO} }, // 7 |
3092 | }; |
3093 | |
3094 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name) { |
3095 | struct IndexType { |
3096 | const char * Name; |
3097 | unsigned _index; |
3098 | }; |
3099 | static const struct IndexType Index[] = { |
3100 | { "DAIFCLR" , 0 }, |
3101 | { "DAIFSET" , 1 }, |
3102 | { "DIT" , 2 }, |
3103 | { "PAN" , 3 }, |
3104 | { "SPSEL" , 4 }, |
3105 | { "SSBS" , 5 }, |
3106 | { "TCO" , 6 }, |
3107 | { "UAO" , 7 }, |
3108 | }; |
3109 | |
3110 | struct KeyType { |
3111 | std::string Name; |
3112 | }; |
3113 | KeyType Key = {Name.upper()}; |
3114 | struct Comp { |
3115 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3116 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3117 | if (CmpName < 0) return true; |
3118 | if (CmpName > 0) return false; |
3119 | return false; |
3120 | } |
3121 | }; |
3122 | auto Table = ArrayRef(Index); |
3123 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3124 | if (Idx == Table.end() || |
3125 | Key.Name != Idx->Name) |
3126 | return nullptr; |
3127 | |
3128 | return &PStateImm0_15sList[Idx->_index]; |
3129 | } |
3130 | |
3131 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding) { |
3132 | struct IndexType { |
3133 | uint8_t Encoding; |
3134 | unsigned _index; |
3135 | }; |
3136 | static const struct IndexType Index[] = { |
3137 | { 0x3, 7 }, |
3138 | { 0x4, 3 }, |
3139 | { 0x5, 4 }, |
3140 | { 0x19, 5 }, |
3141 | { 0x1A, 2 }, |
3142 | { 0x1C, 6 }, |
3143 | { 0x1E, 1 }, |
3144 | { 0x1F, 0 }, |
3145 | }; |
3146 | |
3147 | struct KeyType { |
3148 | uint8_t Encoding; |
3149 | }; |
3150 | KeyType Key = {Encoding}; |
3151 | struct Comp { |
3152 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3153 | if (LHS.Encoding < RHS.Encoding) |
3154 | return true; |
3155 | if (LHS.Encoding > RHS.Encoding) |
3156 | return false; |
3157 | return false; |
3158 | } |
3159 | }; |
3160 | auto Table = ArrayRef(Index); |
3161 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3162 | if (Idx == Table.end() || |
3163 | Key.Encoding != Idx->Encoding) |
3164 | return nullptr; |
3165 | |
3166 | return &PStateImm0_15sList[Idx->_index]; |
3167 | } |
3168 | #endif |
3169 | |
3170 | #ifdef GET_RPRFM_DECL |
3171 | const RPRFM *lookupRPRFMByName(StringRef Name); |
3172 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding); |
3173 | #endif |
3174 | |
3175 | #ifdef GET_RPRFM_IMPL |
3176 | constexpr RPRFM RPRFMsList[] = { |
3177 | { "pldkeep" , 0x0, {} }, // 0 |
3178 | { "pldstrm" , 0x4, {} }, // 1 |
3179 | { "pstkeep" , 0x1, {} }, // 2 |
3180 | { "pststrm" , 0x5, {} }, // 3 |
3181 | }; |
3182 | |
3183 | const RPRFM *lookupRPRFMByName(StringRef Name) { |
3184 | struct IndexType { |
3185 | const char * Name; |
3186 | unsigned _index; |
3187 | }; |
3188 | static const struct IndexType Index[] = { |
3189 | { "PLDKEEP" , 0 }, |
3190 | { "PLDSTRM" , 1 }, |
3191 | { "PSTKEEP" , 2 }, |
3192 | { "PSTSTRM" , 3 }, |
3193 | }; |
3194 | |
3195 | struct KeyType { |
3196 | std::string Name; |
3197 | }; |
3198 | KeyType Key = {Name.upper()}; |
3199 | struct Comp { |
3200 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3201 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3202 | if (CmpName < 0) return true; |
3203 | if (CmpName > 0) return false; |
3204 | return false; |
3205 | } |
3206 | }; |
3207 | auto Table = ArrayRef(Index); |
3208 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3209 | if (Idx == Table.end() || |
3210 | Key.Name != Idx->Name) |
3211 | return nullptr; |
3212 | |
3213 | return &RPRFMsList[Idx->_index]; |
3214 | } |
3215 | |
3216 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding) { |
3217 | struct IndexType { |
3218 | uint8_t Encoding; |
3219 | unsigned _index; |
3220 | }; |
3221 | static const struct IndexType Index[] = { |
3222 | { 0x0, 0 }, |
3223 | { 0x1, 2 }, |
3224 | { 0x4, 1 }, |
3225 | { 0x5, 3 }, |
3226 | }; |
3227 | |
3228 | struct KeyType { |
3229 | uint8_t Encoding; |
3230 | }; |
3231 | KeyType Key = {Encoding}; |
3232 | struct Comp { |
3233 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3234 | if (LHS.Encoding < RHS.Encoding) |
3235 | return true; |
3236 | if (LHS.Encoding > RHS.Encoding) |
3237 | return false; |
3238 | return false; |
3239 | } |
3240 | }; |
3241 | auto Table = ArrayRef(Index); |
3242 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3243 | if (Idx == Table.end() || |
3244 | Key.Encoding != Idx->Encoding) |
3245 | return nullptr; |
3246 | |
3247 | return &RPRFMsList[Idx->_index]; |
3248 | } |
3249 | #endif |
3250 | |
3251 | #ifdef GET_SVCR_DECL |
3252 | const SVCR *lookupSVCRByName(StringRef Name); |
3253 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding); |
3254 | #endif |
3255 | |
3256 | #ifdef GET_SVCR_IMPL |
3257 | constexpr SVCR SVCRsList[] = { |
3258 | { "SVCRSM" , 0x1, {AArch64::FeatureSME} }, // 0 |
3259 | { "SVCRSMZA" , 0x3, {AArch64::FeatureSME} }, // 1 |
3260 | { "SVCRZA" , 0x2, {AArch64::FeatureSME} }, // 2 |
3261 | }; |
3262 | |
3263 | const SVCR *lookupSVCRByName(StringRef Name) { |
3264 | struct IndexType { |
3265 | const char * Name; |
3266 | unsigned _index; |
3267 | }; |
3268 | static const struct IndexType Index[] = { |
3269 | { "SVCRSM" , 0 }, |
3270 | { "SVCRSMZA" , 1 }, |
3271 | { "SVCRZA" , 2 }, |
3272 | }; |
3273 | |
3274 | struct KeyType { |
3275 | std::string Name; |
3276 | }; |
3277 | KeyType Key = {Name.upper()}; |
3278 | struct Comp { |
3279 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3280 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3281 | if (CmpName < 0) return true; |
3282 | if (CmpName > 0) return false; |
3283 | return false; |
3284 | } |
3285 | }; |
3286 | auto Table = ArrayRef(Index); |
3287 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3288 | if (Idx == Table.end() || |
3289 | Key.Name != Idx->Name) |
3290 | return nullptr; |
3291 | |
3292 | return &SVCRsList[Idx->_index]; |
3293 | } |
3294 | |
3295 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding) { |
3296 | struct IndexType { |
3297 | uint8_t Encoding; |
3298 | unsigned _index; |
3299 | }; |
3300 | static const struct IndexType Index[] = { |
3301 | { 0x1, 0 }, |
3302 | { 0x2, 2 }, |
3303 | { 0x3, 1 }, |
3304 | }; |
3305 | |
3306 | if ((Encoding < 0x1) || |
3307 | (Encoding > 0x3)) |
3308 | return nullptr; |
3309 | auto Table = ArrayRef(Index); |
3310 | size_t Idx = Encoding - 0x1; |
3311 | return &SVCRsList[Table[Idx]._index]; |
3312 | } |
3313 | #endif |
3314 | |
3315 | #ifdef GET_SVEPREDPAT_DECL |
3316 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name); |
3317 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding); |
3318 | #endif |
3319 | |
3320 | #ifdef GET_SVEPREDPAT_IMPL |
3321 | constexpr SVEPREDPAT SVEPREDPATsList[] = { |
3322 | { "all" , 0x1F }, // 0 |
3323 | { "mul3" , 0x1E }, // 1 |
3324 | { "mul4" , 0x1D }, // 2 |
3325 | { "pow2" , 0x0 }, // 3 |
3326 | { "vl1" , 0x1 }, // 4 |
3327 | { "vl128" , 0xC }, // 5 |
3328 | { "vl16" , 0x9 }, // 6 |
3329 | { "vl2" , 0x2 }, // 7 |
3330 | { "vl256" , 0xD }, // 8 |
3331 | { "vl3" , 0x3 }, // 9 |
3332 | { "vl32" , 0xA }, // 10 |
3333 | { "vl4" , 0x4 }, // 11 |
3334 | { "vl5" , 0x5 }, // 12 |
3335 | { "vl6" , 0x6 }, // 13 |
3336 | { "vl64" , 0xB }, // 14 |
3337 | { "vl7" , 0x7 }, // 15 |
3338 | { "vl8" , 0x8 }, // 16 |
3339 | }; |
3340 | |
3341 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name) { |
3342 | struct IndexType { |
3343 | const char * Name; |
3344 | unsigned _index; |
3345 | }; |
3346 | static const struct IndexType Index[] = { |
3347 | { "ALL" , 0 }, |
3348 | { "MUL3" , 1 }, |
3349 | { "MUL4" , 2 }, |
3350 | { "POW2" , 3 }, |
3351 | { "VL1" , 4 }, |
3352 | { "VL128" , 5 }, |
3353 | { "VL16" , 6 }, |
3354 | { "VL2" , 7 }, |
3355 | { "VL256" , 8 }, |
3356 | { "VL3" , 9 }, |
3357 | { "VL32" , 10 }, |
3358 | { "VL4" , 11 }, |
3359 | { "VL5" , 12 }, |
3360 | { "VL6" , 13 }, |
3361 | { "VL64" , 14 }, |
3362 | { "VL7" , 15 }, |
3363 | { "VL8" , 16 }, |
3364 | }; |
3365 | |
3366 | struct KeyType { |
3367 | std::string Name; |
3368 | }; |
3369 | KeyType Key = {Name.upper()}; |
3370 | struct Comp { |
3371 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3372 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3373 | if (CmpName < 0) return true; |
3374 | if (CmpName > 0) return false; |
3375 | return false; |
3376 | } |
3377 | }; |
3378 | auto Table = ArrayRef(Index); |
3379 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3380 | if (Idx == Table.end() || |
3381 | Key.Name != Idx->Name) |
3382 | return nullptr; |
3383 | |
3384 | return &SVEPREDPATsList[Idx->_index]; |
3385 | } |
3386 | |
3387 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding) { |
3388 | struct IndexType { |
3389 | uint8_t Encoding; |
3390 | unsigned _index; |
3391 | }; |
3392 | static const struct IndexType Index[] = { |
3393 | { 0x0, 3 }, |
3394 | { 0x1, 4 }, |
3395 | { 0x2, 7 }, |
3396 | { 0x3, 9 }, |
3397 | { 0x4, 11 }, |
3398 | { 0x5, 12 }, |
3399 | { 0x6, 13 }, |
3400 | { 0x7, 15 }, |
3401 | { 0x8, 16 }, |
3402 | { 0x9, 6 }, |
3403 | { 0xA, 10 }, |
3404 | { 0xB, 14 }, |
3405 | { 0xC, 5 }, |
3406 | { 0xD, 8 }, |
3407 | { 0x1D, 2 }, |
3408 | { 0x1E, 1 }, |
3409 | { 0x1F, 0 }, |
3410 | }; |
3411 | |
3412 | struct KeyType { |
3413 | uint8_t Encoding; |
3414 | }; |
3415 | KeyType Key = {Encoding}; |
3416 | struct Comp { |
3417 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3418 | if (LHS.Encoding < RHS.Encoding) |
3419 | return true; |
3420 | if (LHS.Encoding > RHS.Encoding) |
3421 | return false; |
3422 | return false; |
3423 | } |
3424 | }; |
3425 | auto Table = ArrayRef(Index); |
3426 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3427 | if (Idx == Table.end() || |
3428 | Key.Encoding != Idx->Encoding) |
3429 | return nullptr; |
3430 | |
3431 | return &SVEPREDPATsList[Idx->_index]; |
3432 | } |
3433 | #endif |
3434 | |
3435 | #ifdef GET_SVEPRFM_DECL |
3436 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name); |
3437 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding); |
3438 | #endif |
3439 | |
3440 | #ifdef GET_SVEPRFM_IMPL |
3441 | constexpr SVEPRFM SVEPRFMsList[] = { |
3442 | { "pldl1keep" , 0x0, {AArch64::FeatureSVE} }, // 0 |
3443 | { "pldl1strm" , 0x1, {AArch64::FeatureSVE} }, // 1 |
3444 | { "pldl2keep" , 0x2, {AArch64::FeatureSVE} }, // 2 |
3445 | { "pldl2strm" , 0x3, {AArch64::FeatureSVE} }, // 3 |
3446 | { "pldl3keep" , 0x4, {AArch64::FeatureSVE} }, // 4 |
3447 | { "pldl3strm" , 0x5, {AArch64::FeatureSVE} }, // 5 |
3448 | { "pstl1keep" , 0x8, {AArch64::FeatureSVE} }, // 6 |
3449 | { "pstl1strm" , 0x9, {AArch64::FeatureSVE} }, // 7 |
3450 | { "pstl2keep" , 0xA, {AArch64::FeatureSVE} }, // 8 |
3451 | { "pstl2strm" , 0xB, {AArch64::FeatureSVE} }, // 9 |
3452 | { "pstl3keep" , 0xC, {AArch64::FeatureSVE} }, // 10 |
3453 | { "pstl3strm" , 0xD, {AArch64::FeatureSVE} }, // 11 |
3454 | }; |
3455 | |
3456 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name) { |
3457 | struct IndexType { |
3458 | const char * Name; |
3459 | unsigned _index; |
3460 | }; |
3461 | static const struct IndexType Index[] = { |
3462 | { "PLDL1KEEP" , 0 }, |
3463 | { "PLDL1STRM" , 1 }, |
3464 | { "PLDL2KEEP" , 2 }, |
3465 | { "PLDL2STRM" , 3 }, |
3466 | { "PLDL3KEEP" , 4 }, |
3467 | { "PLDL3STRM" , 5 }, |
3468 | { "PSTL1KEEP" , 6 }, |
3469 | { "PSTL1STRM" , 7 }, |
3470 | { "PSTL2KEEP" , 8 }, |
3471 | { "PSTL2STRM" , 9 }, |
3472 | { "PSTL3KEEP" , 10 }, |
3473 | { "PSTL3STRM" , 11 }, |
3474 | }; |
3475 | |
3476 | struct KeyType { |
3477 | std::string Name; |
3478 | }; |
3479 | KeyType Key = {Name.upper()}; |
3480 | struct Comp { |
3481 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3482 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3483 | if (CmpName < 0) return true; |
3484 | if (CmpName > 0) return false; |
3485 | return false; |
3486 | } |
3487 | }; |
3488 | auto Table = ArrayRef(Index); |
3489 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3490 | if (Idx == Table.end() || |
3491 | Key.Name != Idx->Name) |
3492 | return nullptr; |
3493 | |
3494 | return &SVEPRFMsList[Idx->_index]; |
3495 | } |
3496 | |
3497 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding) { |
3498 | struct IndexType { |
3499 | uint8_t Encoding; |
3500 | unsigned _index; |
3501 | }; |
3502 | static const struct IndexType Index[] = { |
3503 | { 0x0, 0 }, |
3504 | { 0x1, 1 }, |
3505 | { 0x2, 2 }, |
3506 | { 0x3, 3 }, |
3507 | { 0x4, 4 }, |
3508 | { 0x5, 5 }, |
3509 | { 0x8, 6 }, |
3510 | { 0x9, 7 }, |
3511 | { 0xA, 8 }, |
3512 | { 0xB, 9 }, |
3513 | { 0xC, 10 }, |
3514 | { 0xD, 11 }, |
3515 | }; |
3516 | |
3517 | struct KeyType { |
3518 | uint8_t Encoding; |
3519 | }; |
3520 | KeyType Key = {Encoding}; |
3521 | struct Comp { |
3522 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3523 | if (LHS.Encoding < RHS.Encoding) |
3524 | return true; |
3525 | if (LHS.Encoding > RHS.Encoding) |
3526 | return false; |
3527 | return false; |
3528 | } |
3529 | }; |
3530 | auto Table = ArrayRef(Index); |
3531 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3532 | if (Idx == Table.end() || |
3533 | Key.Encoding != Idx->Encoding) |
3534 | return nullptr; |
3535 | |
3536 | return &SVEPRFMsList[Idx->_index]; |
3537 | } |
3538 | #endif |
3539 | |
3540 | #ifdef GET_SVEVECLENSPECIFIER_DECL |
3541 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name); |
3542 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding); |
3543 | #endif |
3544 | |
3545 | #ifdef GET_SVEVECLENSPECIFIER_IMPL |
3546 | constexpr SVEVECLENSPECIFIER SVEVECLENSPECIFIERsList[] = { |
3547 | { "vlx2" , 0x0 }, // 0 |
3548 | { "vlx4" , 0x1 }, // 1 |
3549 | }; |
3550 | |
3551 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name) { |
3552 | struct IndexType { |
3553 | const char * Name; |
3554 | unsigned _index; |
3555 | }; |
3556 | static const struct IndexType Index[] = { |
3557 | { "VLX2" , 0 }, |
3558 | { "VLX4" , 1 }, |
3559 | }; |
3560 | |
3561 | struct KeyType { |
3562 | std::string Name; |
3563 | }; |
3564 | KeyType Key = {Name.upper()}; |
3565 | struct Comp { |
3566 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
3567 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
3568 | if (CmpName < 0) return true; |
3569 | if (CmpName > 0) return false; |
3570 | return false; |
3571 | } |
3572 | }; |
3573 | auto Table = ArrayRef(Index); |
3574 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
3575 | if (Idx == Table.end() || |
3576 | Key.Name != Idx->Name) |
3577 | return nullptr; |
3578 | |
3579 | return &SVEVECLENSPECIFIERsList[Idx->_index]; |
3580 | } |
3581 | |
3582 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding) { |
3583 | struct IndexType { |
3584 | uint8_t Encoding; |
3585 | unsigned _index; |
3586 | }; |
3587 | static const struct IndexType Index[] = { |
3588 | { 0x0, 0 }, |
3589 | { 0x1, 1 }, |
3590 | }; |
3591 | |
3592 | if ((Encoding < 0x0) || |
3593 | (Encoding > 0x1)) |
3594 | return nullptr; |
3595 | auto Table = ArrayRef(Index); |
3596 | size_t Idx = Encoding - 0x0; |
3597 | return &SVEVECLENSPECIFIERsList[Table[Idx]._index]; |
3598 | } |
3599 | #endif |
3600 | |
3601 | #ifdef GET_SYSREG_DECL |
3602 | const SysReg *lookupSysRegByName(StringRef Name); |
3603 | const SysReg *lookupSysRegByEncoding(uint16_t Encoding); |
3604 | #endif |
3605 | |
3606 | #ifdef GET_SYSREG_IMPL |
3607 | constexpr SysReg SysRegsList[] = { |
3608 | { "ACCDATA_EL1" , "ACCDATA_EL1" , 0xC685, true, true, {AArch64::FeatureLS64} }, // 0 |
3609 | { "ACTLR_EL1" , "ACTLR_EL1" , 0xC081, true, true, {} }, // 1 |
3610 | { "ACTLR_EL2" , "ACTLR_EL2" , 0xE081, true, true, {} }, // 2 |
3611 | { "ACTLR_EL3" , "ACTLR_EL3" , 0xF081, true, true, {} }, // 3 |
3612 | { "AFSR0_EL1" , "AFSR0_EL1" , 0xC288, true, true, {} }, // 4 |
3613 | { "AFSR0_EL12" , "AFSR0_EL12" , 0xEA88, true, true, {AArch64::FeatureVH} }, // 5 |
3614 | { "AFSR0_EL2" , "AFSR0_EL2" , 0xE288, true, true, {} }, // 6 |
3615 | { "AFSR0_EL3" , "AFSR0_EL3" , 0xF288, true, true, {} }, // 7 |
3616 | { "AFSR1_EL1" , "AFSR1_EL1" , 0xC289, true, true, {} }, // 8 |
3617 | { "AFSR1_EL12" , "AFSR1_EL12" , 0xEA89, true, true, {AArch64::FeatureVH} }, // 9 |
3618 | { "AFSR1_EL2" , "AFSR1_EL2" , 0xE289, true, true, {} }, // 10 |
3619 | { "AFSR1_EL3" , "AFSR1_EL3" , 0xF289, true, true, {} }, // 11 |
3620 | { "AIDR_EL1" , "AIDR_EL1" , 0xC807, true, false, {} }, // 12 |
3621 | { "ALLINT" , "ALLINT" , 0xC218, true, true, {AArch64::FeatureNMI} }, // 13 |
3622 | { "AMAIR2_EL1" , "AMAIR2_EL1" , 0xC519, true, true, {} }, // 14 |
3623 | { "AMAIR2_EL12" , "AMAIR2_EL12" , 0xED19, true, true, {} }, // 15 |
3624 | { "AMAIR2_EL2" , "AMAIR2_EL2" , 0xE519, true, true, {} }, // 16 |
3625 | { "AMAIR2_EL3" , "AMAIR2_EL3" , 0xF519, true, true, {} }, // 17 |
3626 | { "AMAIR_EL1" , "AMAIR_EL1" , 0xC518, true, true, {} }, // 18 |
3627 | { "AMAIR_EL12" , "AMAIR_EL12" , 0xED18, true, true, {AArch64::FeatureVH} }, // 19 |
3628 | { "AMAIR_EL2" , "AMAIR_EL2" , 0xE518, true, true, {} }, // 20 |
3629 | { "AMAIR_EL3" , "AMAIR_EL3" , 0xF518, true, true, {} }, // 21 |
3630 | { "AMCFGR_EL0" , "AMCFGR_EL0" , 0xDE91, true, false, {AArch64::FeatureAM} }, // 22 |
3631 | { "AMCG1IDR_EL0" , "AMCG1IDR_EL0" , 0xDE96, true, false, {AArch64::FeatureAMVS} }, // 23 |
3632 | { "AMCGCR_EL0" , "AMCGCR_EL0" , 0xDE92, true, false, {AArch64::FeatureAM} }, // 24 |
3633 | { "AMCNTENCLR0_EL0" , "AMCNTENCLR0_EL0" , 0xDE94, true, true, {AArch64::FeatureAM} }, // 25 |
3634 | { "AMCNTENCLR1_EL0" , "AMCNTENCLR1_EL0" , 0xDE98, true, true, {AArch64::FeatureAM} }, // 26 |
3635 | { "AMCNTENSET0_EL0" , "AMCNTENSET0_EL0" , 0xDE95, true, true, {AArch64::FeatureAM} }, // 27 |
3636 | { "AMCNTENSET1_EL0" , "AMCNTENSET1_EL0" , 0xDE99, true, true, {AArch64::FeatureAM} }, // 28 |
3637 | { "AMCR_EL0" , "AMCR_EL0" , 0xDE90, true, true, {AArch64::FeatureAM} }, // 29 |
3638 | { "AMEVCNTR00_EL0" , "AMEVCNTR00_EL0" , 0xDEA0, true, true, {AArch64::FeatureAM} }, // 30 |
3639 | { "AMEVCNTR01_EL0" , "AMEVCNTR01_EL0" , 0xDEA1, true, true, {AArch64::FeatureAM} }, // 31 |
3640 | { "AMEVCNTR02_EL0" , "AMEVCNTR02_EL0" , 0xDEA2, true, true, {AArch64::FeatureAM} }, // 32 |
3641 | { "AMEVCNTR03_EL0" , "AMEVCNTR03_EL0" , 0xDEA3, true, true, {AArch64::FeatureAM} }, // 33 |
3642 | { "AMEVCNTR10_EL0" , "AMEVCNTR10_EL0" , 0xDEE0, true, true, {AArch64::FeatureAM} }, // 34 |
3643 | { "AMEVCNTR110_EL0" , "AMEVCNTR110_EL0" , 0xDEEA, true, true, {AArch64::FeatureAM} }, // 35 |
3644 | { "AMEVCNTR111_EL0" , "AMEVCNTR111_EL0" , 0xDEEB, true, true, {AArch64::FeatureAM} }, // 36 |
3645 | { "AMEVCNTR112_EL0" , "AMEVCNTR112_EL0" , 0xDEEC, true, true, {AArch64::FeatureAM} }, // 37 |
3646 | { "AMEVCNTR113_EL0" , "AMEVCNTR113_EL0" , 0xDEED, true, true, {AArch64::FeatureAM} }, // 38 |
3647 | { "AMEVCNTR114_EL0" , "AMEVCNTR114_EL0" , 0xDEEE, true, true, {AArch64::FeatureAM} }, // 39 |
3648 | { "AMEVCNTR115_EL0" , "AMEVCNTR115_EL0" , 0xDEEF, true, true, {AArch64::FeatureAM} }, // 40 |
3649 | { "AMEVCNTR11_EL0" , "AMEVCNTR11_EL0" , 0xDEE1, true, true, {AArch64::FeatureAM} }, // 41 |
3650 | { "AMEVCNTR12_EL0" , "AMEVCNTR12_EL0" , 0xDEE2, true, true, {AArch64::FeatureAM} }, // 42 |
3651 | { "AMEVCNTR13_EL0" , "AMEVCNTR13_EL0" , 0xDEE3, true, true, {AArch64::FeatureAM} }, // 43 |
3652 | { "AMEVCNTR14_EL0" , "AMEVCNTR14_EL0" , 0xDEE4, true, true, {AArch64::FeatureAM} }, // 44 |
3653 | { "AMEVCNTR15_EL0" , "AMEVCNTR15_EL0" , 0xDEE5, true, true, {AArch64::FeatureAM} }, // 45 |
3654 | { "AMEVCNTR16_EL0" , "AMEVCNTR16_EL0" , 0xDEE6, true, true, {AArch64::FeatureAM} }, // 46 |
3655 | { "AMEVCNTR17_EL0" , "AMEVCNTR17_EL0" , 0xDEE7, true, true, {AArch64::FeatureAM} }, // 47 |
3656 | { "AMEVCNTR18_EL0" , "AMEVCNTR18_EL0" , 0xDEE8, true, true, {AArch64::FeatureAM} }, // 48 |
3657 | { "AMEVCNTR19_EL0" , "AMEVCNTR19_EL0" , 0xDEE9, true, true, {AArch64::FeatureAM} }, // 49 |
3658 | { "AMEVCNTVOFF00_EL2" , "AMEVCNTVOFF00_EL2" , 0xE6C0, true, true, {AArch64::FeatureAMVS} }, // 50 |
3659 | { "AMEVCNTVOFF010_EL2" , "AMEVCNTVOFF010_EL2" , 0xE6CA, true, true, {AArch64::FeatureAMVS} }, // 51 |
3660 | { "AMEVCNTVOFF011_EL2" , "AMEVCNTVOFF011_EL2" , 0xE6CB, true, true, {AArch64::FeatureAMVS} }, // 52 |
3661 | { "AMEVCNTVOFF012_EL2" , "AMEVCNTVOFF012_EL2" , 0xE6CC, true, true, {AArch64::FeatureAMVS} }, // 53 |
3662 | { "AMEVCNTVOFF013_EL2" , "AMEVCNTVOFF013_EL2" , 0xE6CD, true, true, {AArch64::FeatureAMVS} }, // 54 |
3663 | { "AMEVCNTVOFF014_EL2" , "AMEVCNTVOFF014_EL2" , 0xE6CE, true, true, {AArch64::FeatureAMVS} }, // 55 |
3664 | { "AMEVCNTVOFF015_EL2" , "AMEVCNTVOFF015_EL2" , 0xE6CF, true, true, {AArch64::FeatureAMVS} }, // 56 |
3665 | { "AMEVCNTVOFF01_EL2" , "AMEVCNTVOFF01_EL2" , 0xE6C1, true, true, {AArch64::FeatureAMVS} }, // 57 |
3666 | { "AMEVCNTVOFF02_EL2" , "AMEVCNTVOFF02_EL2" , 0xE6C2, true, true, {AArch64::FeatureAMVS} }, // 58 |
3667 | { "AMEVCNTVOFF03_EL2" , "AMEVCNTVOFF03_EL2" , 0xE6C3, true, true, {AArch64::FeatureAMVS} }, // 59 |
3668 | { "AMEVCNTVOFF04_EL2" , "AMEVCNTVOFF04_EL2" , 0xE6C4, true, true, {AArch64::FeatureAMVS} }, // 60 |
3669 | { "AMEVCNTVOFF05_EL2" , "AMEVCNTVOFF05_EL2" , 0xE6C5, true, true, {AArch64::FeatureAMVS} }, // 61 |
3670 | { "AMEVCNTVOFF06_EL2" , "AMEVCNTVOFF06_EL2" , 0xE6C6, true, true, {AArch64::FeatureAMVS} }, // 62 |
3671 | { "AMEVCNTVOFF07_EL2" , "AMEVCNTVOFF07_EL2" , 0xE6C7, true, true, {AArch64::FeatureAMVS} }, // 63 |
3672 | { "AMEVCNTVOFF08_EL2" , "AMEVCNTVOFF08_EL2" , 0xE6C8, true, true, {AArch64::FeatureAMVS} }, // 64 |
3673 | { "AMEVCNTVOFF09_EL2" , "AMEVCNTVOFF09_EL2" , 0xE6C9, true, true, {AArch64::FeatureAMVS} }, // 65 |
3674 | { "AMEVCNTVOFF10_EL2" , "AMEVCNTVOFF10_EL2" , 0xE6D0, true, true, {AArch64::FeatureAMVS} }, // 66 |
3675 | { "AMEVCNTVOFF110_EL2" , "AMEVCNTVOFF110_EL2" , 0xE6DA, true, true, {AArch64::FeatureAMVS} }, // 67 |
3676 | { "AMEVCNTVOFF111_EL2" , "AMEVCNTVOFF111_EL2" , 0xE6DB, true, true, {AArch64::FeatureAMVS} }, // 68 |
3677 | { "AMEVCNTVOFF112_EL2" , "AMEVCNTVOFF112_EL2" , 0xE6DC, true, true, {AArch64::FeatureAMVS} }, // 69 |
3678 | { "AMEVCNTVOFF113_EL2" , "AMEVCNTVOFF113_EL2" , 0xE6DD, true, true, {AArch64::FeatureAMVS} }, // 70 |
3679 | { "AMEVCNTVOFF114_EL2" , "AMEVCNTVOFF114_EL2" , 0xE6DE, true, true, {AArch64::FeatureAMVS} }, // 71 |
3680 | { "AMEVCNTVOFF115_EL2" , "AMEVCNTVOFF115_EL2" , 0xE6DF, true, true, {AArch64::FeatureAMVS} }, // 72 |
3681 | { "AMEVCNTVOFF11_EL2" , "AMEVCNTVOFF11_EL2" , 0xE6D1, true, true, {AArch64::FeatureAMVS} }, // 73 |
3682 | { "AMEVCNTVOFF12_EL2" , "AMEVCNTVOFF12_EL2" , 0xE6D2, true, true, {AArch64::FeatureAMVS} }, // 74 |
3683 | { "AMEVCNTVOFF13_EL2" , "AMEVCNTVOFF13_EL2" , 0xE6D3, true, true, {AArch64::FeatureAMVS} }, // 75 |
3684 | { "AMEVCNTVOFF14_EL2" , "AMEVCNTVOFF14_EL2" , 0xE6D4, true, true, {AArch64::FeatureAMVS} }, // 76 |
3685 | { "AMEVCNTVOFF15_EL2" , "AMEVCNTVOFF15_EL2" , 0xE6D5, true, true, {AArch64::FeatureAMVS} }, // 77 |
3686 | { "AMEVCNTVOFF16_EL2" , "AMEVCNTVOFF16_EL2" , 0xE6D6, true, true, {AArch64::FeatureAMVS} }, // 78 |
3687 | { "AMEVCNTVOFF17_EL2" , "AMEVCNTVOFF17_EL2" , 0xE6D7, true, true, {AArch64::FeatureAMVS} }, // 79 |
3688 | { "AMEVCNTVOFF18_EL2" , "AMEVCNTVOFF18_EL2" , 0xE6D8, true, true, {AArch64::FeatureAMVS} }, // 80 |
3689 | { "AMEVCNTVOFF19_EL2" , "AMEVCNTVOFF19_EL2" , 0xE6D9, true, true, {AArch64::FeatureAMVS} }, // 81 |
3690 | { "AMEVTYPER00_EL0" , "AMEVTYPER00_EL0" , 0xDEB0, true, false, {AArch64::FeatureAM} }, // 82 |
3691 | { "AMEVTYPER01_EL0" , "AMEVTYPER01_EL0" , 0xDEB1, true, false, {AArch64::FeatureAM} }, // 83 |
3692 | { "AMEVTYPER02_EL0" , "AMEVTYPER02_EL0" , 0xDEB2, true, false, {AArch64::FeatureAM} }, // 84 |
3693 | { "AMEVTYPER03_EL0" , "AMEVTYPER03_EL0" , 0xDEB3, true, false, {AArch64::FeatureAM} }, // 85 |
3694 | { "AMEVTYPER10_EL0" , "AMEVTYPER10_EL0" , 0xDEF0, true, true, {AArch64::FeatureAM} }, // 86 |
3695 | { "AMEVTYPER110_EL0" , "AMEVTYPER110_EL0" , 0xDEFA, true, true, {AArch64::FeatureAM} }, // 87 |
3696 | { "AMEVTYPER111_EL0" , "AMEVTYPER111_EL0" , 0xDEFB, true, true, {AArch64::FeatureAM} }, // 88 |
3697 | { "AMEVTYPER112_EL0" , "AMEVTYPER112_EL0" , 0xDEFC, true, true, {AArch64::FeatureAM} }, // 89 |
3698 | { "AMEVTYPER113_EL0" , "AMEVTYPER113_EL0" , 0xDEFD, true, true, {AArch64::FeatureAM} }, // 90 |
3699 | { "AMEVTYPER114_EL0" , "AMEVTYPER114_EL0" , 0xDEFE, true, true, {AArch64::FeatureAM} }, // 91 |
3700 | { "AMEVTYPER115_EL0" , "AMEVTYPER115_EL0" , 0xDEFF, true, true, {AArch64::FeatureAM} }, // 92 |
3701 | { "AMEVTYPER11_EL0" , "AMEVTYPER11_EL0" , 0xDEF1, true, true, {AArch64::FeatureAM} }, // 93 |
3702 | { "AMEVTYPER12_EL0" , "AMEVTYPER12_EL0" , 0xDEF2, true, true, {AArch64::FeatureAM} }, // 94 |
3703 | { "AMEVTYPER13_EL0" , "AMEVTYPER13_EL0" , 0xDEF3, true, true, {AArch64::FeatureAM} }, // 95 |
3704 | { "AMEVTYPER14_EL0" , "AMEVTYPER14_EL0" , 0xDEF4, true, true, {AArch64::FeatureAM} }, // 96 |
3705 | { "AMEVTYPER15_EL0" , "AMEVTYPER15_EL0" , 0xDEF5, true, true, {AArch64::FeatureAM} }, // 97 |
3706 | { "AMEVTYPER16_EL0" , "AMEVTYPER16_EL0" , 0xDEF6, true, true, {AArch64::FeatureAM} }, // 98 |
3707 | { "AMEVTYPER17_EL0" , "AMEVTYPER17_EL0" , 0xDEF7, true, true, {AArch64::FeatureAM} }, // 99 |
3708 | { "AMEVTYPER18_EL0" , "AMEVTYPER18_EL0" , 0xDEF8, true, true, {AArch64::FeatureAM} }, // 100 |
3709 | { "AMEVTYPER19_EL0" , "AMEVTYPER19_EL0" , 0xDEF9, true, true, {AArch64::FeatureAM} }, // 101 |
3710 | { "AMUSERENR_EL0" , "AMUSERENR_EL0" , 0xDE93, true, true, {AArch64::FeatureAM} }, // 102 |
3711 | { "APDAKeyHi_EL1" , "APDAKeyHi_EL1" , 0xC111, true, true, {AArch64::FeaturePAuth} }, // 103 |
3712 | { "APDAKeyLo_EL1" , "APDAKeyLo_EL1" , 0xC110, true, true, {AArch64::FeaturePAuth} }, // 104 |
3713 | { "APDBKeyHi_EL1" , "APDBKeyHi_EL1" , 0xC113, true, true, {AArch64::FeaturePAuth} }, // 105 |
3714 | { "APDBKeyLo_EL1" , "APDBKeyLo_EL1" , 0xC112, true, true, {AArch64::FeaturePAuth} }, // 106 |
3715 | { "APGAKeyHi_EL1" , "APGAKeyHi_EL1" , 0xC119, true, true, {AArch64::FeaturePAuth} }, // 107 |
3716 | { "APGAKeyLo_EL1" , "APGAKeyLo_EL1" , 0xC118, true, true, {AArch64::FeaturePAuth} }, // 108 |
3717 | { "APIAKeyHi_EL1" , "APIAKeyHi_EL1" , 0xC109, true, true, {AArch64::FeaturePAuth} }, // 109 |
3718 | { "APIAKeyLo_EL1" , "APIAKeyLo_EL1" , 0xC108, true, true, {AArch64::FeaturePAuth} }, // 110 |
3719 | { "APIBKeyHi_EL1" , "APIBKeyHi_EL1" , 0xC10B, true, true, {AArch64::FeaturePAuth} }, // 111 |
3720 | { "APIBKeyLo_EL1" , "APIBKeyLo_EL1" , 0xC10A, true, true, {AArch64::FeaturePAuth} }, // 112 |
3721 | { "BRBCR_EL1" , "BRBCR_EL1" , 0x8C80, true, true, {AArch64::FeatureBRBE} }, // 113 |
3722 | { "BRBCR_EL12" , "BRBCR_EL12" , 0xAC80, true, true, {AArch64::FeatureBRBE} }, // 114 |
3723 | { "BRBCR_EL2" , "BRBCR_EL2" , 0xA480, true, true, {AArch64::FeatureBRBE} }, // 115 |
3724 | { "BRBFCR_EL1" , "BRBFCR_EL1" , 0x8C81, true, true, {AArch64::FeatureBRBE} }, // 116 |
3725 | { "BRBIDR0_EL1" , "BRBIDR0_EL1" , 0x8C90, true, false, {AArch64::FeatureBRBE} }, // 117 |
3726 | { "BRBINF0_EL1" , "BRBINF0_EL1" , 0x8C00, true, false, {AArch64::FeatureBRBE} }, // 118 |
3727 | { "BRBINF10_EL1" , "BRBINF10_EL1" , 0x8C50, true, false, {AArch64::FeatureBRBE} }, // 119 |
3728 | { "BRBINF11_EL1" , "BRBINF11_EL1" , 0x8C58, true, false, {AArch64::FeatureBRBE} }, // 120 |
3729 | { "BRBINF12_EL1" , "BRBINF12_EL1" , 0x8C60, true, false, {AArch64::FeatureBRBE} }, // 121 |
3730 | { "BRBINF13_EL1" , "BRBINF13_EL1" , 0x8C68, true, false, {AArch64::FeatureBRBE} }, // 122 |
3731 | { "BRBINF14_EL1" , "BRBINF14_EL1" , 0x8C70, true, false, {AArch64::FeatureBRBE} }, // 123 |
3732 | { "BRBINF15_EL1" , "BRBINF15_EL1" , 0x8C78, true, false, {AArch64::FeatureBRBE} }, // 124 |
3733 | { "BRBINF16_EL1" , "BRBINF16_EL1" , 0x8C04, true, false, {AArch64::FeatureBRBE} }, // 125 |
3734 | { "BRBINF17_EL1" , "BRBINF17_EL1" , 0x8C0C, true, false, {AArch64::FeatureBRBE} }, // 126 |
3735 | { "BRBINF18_EL1" , "BRBINF18_EL1" , 0x8C14, true, false, {AArch64::FeatureBRBE} }, // 127 |
3736 | { "BRBINF19_EL1" , "BRBINF19_EL1" , 0x8C1C, true, false, {AArch64::FeatureBRBE} }, // 128 |
3737 | { "BRBINF1_EL1" , "BRBINF1_EL1" , 0x8C08, true, false, {AArch64::FeatureBRBE} }, // 129 |
3738 | { "BRBINF20_EL1" , "BRBINF20_EL1" , 0x8C24, true, false, {AArch64::FeatureBRBE} }, // 130 |
3739 | { "BRBINF21_EL1" , "BRBINF21_EL1" , 0x8C2C, true, false, {AArch64::FeatureBRBE} }, // 131 |
3740 | { "BRBINF22_EL1" , "BRBINF22_EL1" , 0x8C34, true, false, {AArch64::FeatureBRBE} }, // 132 |
3741 | { "BRBINF23_EL1" , "BRBINF23_EL1" , 0x8C3C, true, false, {AArch64::FeatureBRBE} }, // 133 |
3742 | { "BRBINF24_EL1" , "BRBINF24_EL1" , 0x8C44, true, false, {AArch64::FeatureBRBE} }, // 134 |
3743 | { "BRBINF25_EL1" , "BRBINF25_EL1" , 0x8C4C, true, false, {AArch64::FeatureBRBE} }, // 135 |
3744 | { "BRBINF26_EL1" , "BRBINF26_EL1" , 0x8C54, true, false, {AArch64::FeatureBRBE} }, // 136 |
3745 | { "BRBINF27_EL1" , "BRBINF27_EL1" , 0x8C5C, true, false, {AArch64::FeatureBRBE} }, // 137 |
3746 | { "BRBINF28_EL1" , "BRBINF28_EL1" , 0x8C64, true, false, {AArch64::FeatureBRBE} }, // 138 |
3747 | { "BRBINF29_EL1" , "BRBINF29_EL1" , 0x8C6C, true, false, {AArch64::FeatureBRBE} }, // 139 |
3748 | { "BRBINF2_EL1" , "BRBINF2_EL1" , 0x8C10, true, false, {AArch64::FeatureBRBE} }, // 140 |
3749 | { "BRBINF30_EL1" , "BRBINF30_EL1" , 0x8C74, true, false, {AArch64::FeatureBRBE} }, // 141 |
3750 | { "BRBINF31_EL1" , "BRBINF31_EL1" , 0x8C7C, true, false, {AArch64::FeatureBRBE} }, // 142 |
3751 | { "BRBINF3_EL1" , "BRBINF3_EL1" , 0x8C18, true, false, {AArch64::FeatureBRBE} }, // 143 |
3752 | { "BRBINF4_EL1" , "BRBINF4_EL1" , 0x8C20, true, false, {AArch64::FeatureBRBE} }, // 144 |
3753 | { "BRBINF5_EL1" , "BRBINF5_EL1" , 0x8C28, true, false, {AArch64::FeatureBRBE} }, // 145 |
3754 | { "BRBINF6_EL1" , "BRBINF6_EL1" , 0x8C30, true, false, {AArch64::FeatureBRBE} }, // 146 |
3755 | { "BRBINF7_EL1" , "BRBINF7_EL1" , 0x8C38, true, false, {AArch64::FeatureBRBE} }, // 147 |
3756 | { "BRBINF8_EL1" , "BRBINF8_EL1" , 0x8C40, true, false, {AArch64::FeatureBRBE} }, // 148 |
3757 | { "BRBINF9_EL1" , "BRBINF9_EL1" , 0x8C48, true, false, {AArch64::FeatureBRBE} }, // 149 |
3758 | { "BRBINFINJ_EL1" , "BRBINFINJ_EL1" , 0x8C88, true, true, {AArch64::FeatureBRBE} }, // 150 |
3759 | { "BRBSRC0_EL1" , "BRBSRC0_EL1" , 0x8C01, true, false, {AArch64::FeatureBRBE} }, // 151 |
3760 | { "BRBSRC10_EL1" , "BRBSRC10_EL1" , 0x8C51, true, false, {AArch64::FeatureBRBE} }, // 152 |
3761 | { "BRBSRC11_EL1" , "BRBSRC11_EL1" , 0x8C59, true, false, {AArch64::FeatureBRBE} }, // 153 |
3762 | { "BRBSRC12_EL1" , "BRBSRC12_EL1" , 0x8C61, true, false, {AArch64::FeatureBRBE} }, // 154 |
3763 | { "BRBSRC13_EL1" , "BRBSRC13_EL1" , 0x8C69, true, false, {AArch64::FeatureBRBE} }, // 155 |
3764 | { "BRBSRC14_EL1" , "BRBSRC14_EL1" , 0x8C71, true, false, {AArch64::FeatureBRBE} }, // 156 |
3765 | { "BRBSRC15_EL1" , "BRBSRC15_EL1" , 0x8C79, true, false, {AArch64::FeatureBRBE} }, // 157 |
3766 | { "BRBSRC16_EL1" , "BRBSRC16_EL1" , 0x8C05, true, false, {AArch64::FeatureBRBE} }, // 158 |
3767 | { "BRBSRC17_EL1" , "BRBSRC17_EL1" , 0x8C0D, true, false, {AArch64::FeatureBRBE} }, // 159 |
3768 | { "BRBSRC18_EL1" , "BRBSRC18_EL1" , 0x8C15, true, false, {AArch64::FeatureBRBE} }, // 160 |
3769 | { "BRBSRC19_EL1" , "BRBSRC19_EL1" , 0x8C1D, true, false, {AArch64::FeatureBRBE} }, // 161 |
3770 | { "BRBSRC1_EL1" , "BRBSRC1_EL1" , 0x8C09, true, false, {AArch64::FeatureBRBE} }, // 162 |
3771 | { "BRBSRC20_EL1" , "BRBSRC20_EL1" , 0x8C25, true, false, {AArch64::FeatureBRBE} }, // 163 |
3772 | { "BRBSRC21_EL1" , "BRBSRC21_EL1" , 0x8C2D, true, false, {AArch64::FeatureBRBE} }, // 164 |
3773 | { "BRBSRC22_EL1" , "BRBSRC22_EL1" , 0x8C35, true, false, {AArch64::FeatureBRBE} }, // 165 |
3774 | { "BRBSRC23_EL1" , "BRBSRC23_EL1" , 0x8C3D, true, false, {AArch64::FeatureBRBE} }, // 166 |
3775 | { "BRBSRC24_EL1" , "BRBSRC24_EL1" , 0x8C45, true, false, {AArch64::FeatureBRBE} }, // 167 |
3776 | { "BRBSRC25_EL1" , "BRBSRC25_EL1" , 0x8C4D, true, false, {AArch64::FeatureBRBE} }, // 168 |
3777 | { "BRBSRC26_EL1" , "BRBSRC26_EL1" , 0x8C55, true, false, {AArch64::FeatureBRBE} }, // 169 |
3778 | { "BRBSRC27_EL1" , "BRBSRC27_EL1" , 0x8C5D, true, false, {AArch64::FeatureBRBE} }, // 170 |
3779 | { "BRBSRC28_EL1" , "BRBSRC28_EL1" , 0x8C65, true, false, {AArch64::FeatureBRBE} }, // 171 |
3780 | { "BRBSRC29_EL1" , "BRBSRC29_EL1" , 0x8C6D, true, false, {AArch64::FeatureBRBE} }, // 172 |
3781 | { "BRBSRC2_EL1" , "BRBSRC2_EL1" , 0x8C11, true, false, {AArch64::FeatureBRBE} }, // 173 |
3782 | { "BRBSRC30_EL1" , "BRBSRC30_EL1" , 0x8C75, true, false, {AArch64::FeatureBRBE} }, // 174 |
3783 | { "BRBSRC31_EL1" , "BRBSRC31_EL1" , 0x8C7D, true, false, {AArch64::FeatureBRBE} }, // 175 |
3784 | { "BRBSRC3_EL1" , "BRBSRC3_EL1" , 0x8C19, true, false, {AArch64::FeatureBRBE} }, // 176 |
3785 | { "BRBSRC4_EL1" , "BRBSRC4_EL1" , 0x8C21, true, false, {AArch64::FeatureBRBE} }, // 177 |
3786 | { "BRBSRC5_EL1" , "BRBSRC5_EL1" , 0x8C29, true, false, {AArch64::FeatureBRBE} }, // 178 |
3787 | { "BRBSRC6_EL1" , "BRBSRC6_EL1" , 0x8C31, true, false, {AArch64::FeatureBRBE} }, // 179 |
3788 | { "BRBSRC7_EL1" , "BRBSRC7_EL1" , 0x8C39, true, false, {AArch64::FeatureBRBE} }, // 180 |
3789 | { "BRBSRC8_EL1" , "BRBSRC8_EL1" , 0x8C41, true, false, {AArch64::FeatureBRBE} }, // 181 |
3790 | { "BRBSRC9_EL1" , "BRBSRC9_EL1" , 0x8C49, true, false, {AArch64::FeatureBRBE} }, // 182 |
3791 | { "BRBSRCINJ_EL1" , "BRBSRCINJ_EL1" , 0x8C89, true, true, {AArch64::FeatureBRBE} }, // 183 |
3792 | { "BRBTGT0_EL1" , "BRBTGT0_EL1" , 0x8C02, true, false, {AArch64::FeatureBRBE} }, // 184 |
3793 | { "BRBTGT10_EL1" , "BRBTGT10_EL1" , 0x8C52, true, false, {AArch64::FeatureBRBE} }, // 185 |
3794 | { "BRBTGT11_EL1" , "BRBTGT11_EL1" , 0x8C5A, true, false, {AArch64::FeatureBRBE} }, // 186 |
3795 | { "BRBTGT12_EL1" , "BRBTGT12_EL1" , 0x8C62, true, false, {AArch64::FeatureBRBE} }, // 187 |
3796 | { "BRBTGT13_EL1" , "BRBTGT13_EL1" , 0x8C6A, true, false, {AArch64::FeatureBRBE} }, // 188 |
3797 | { "BRBTGT14_EL1" , "BRBTGT14_EL1" , 0x8C72, true, false, {AArch64::FeatureBRBE} }, // 189 |
3798 | { "BRBTGT15_EL1" , "BRBTGT15_EL1" , 0x8C7A, true, false, {AArch64::FeatureBRBE} }, // 190 |
3799 | { "BRBTGT16_EL1" , "BRBTGT16_EL1" , 0x8C06, true, false, {AArch64::FeatureBRBE} }, // 191 |
3800 | { "BRBTGT17_EL1" , "BRBTGT17_EL1" , 0x8C0E, true, false, {AArch64::FeatureBRBE} }, // 192 |
3801 | { "BRBTGT18_EL1" , "BRBTGT18_EL1" , 0x8C16, true, false, {AArch64::FeatureBRBE} }, // 193 |
3802 | { "BRBTGT19_EL1" , "BRBTGT19_EL1" , 0x8C1E, true, false, {AArch64::FeatureBRBE} }, // 194 |
3803 | { "BRBTGT1_EL1" , "BRBTGT1_EL1" , 0x8C0A, true, false, {AArch64::FeatureBRBE} }, // 195 |
3804 | { "BRBTGT20_EL1" , "BRBTGT20_EL1" , 0x8C26, true, false, {AArch64::FeatureBRBE} }, // 196 |
3805 | { "BRBTGT21_EL1" , "BRBTGT21_EL1" , 0x8C2E, true, false, {AArch64::FeatureBRBE} }, // 197 |
3806 | { "BRBTGT22_EL1" , "BRBTGT22_EL1" , 0x8C36, true, false, {AArch64::FeatureBRBE} }, // 198 |
3807 | { "BRBTGT23_EL1" , "BRBTGT23_EL1" , 0x8C3E, true, false, {AArch64::FeatureBRBE} }, // 199 |
3808 | { "BRBTGT24_EL1" , "BRBTGT24_EL1" , 0x8C46, true, false, {AArch64::FeatureBRBE} }, // 200 |
3809 | { "BRBTGT25_EL1" , "BRBTGT25_EL1" , 0x8C4E, true, false, {AArch64::FeatureBRBE} }, // 201 |
3810 | { "BRBTGT26_EL1" , "BRBTGT26_EL1" , 0x8C56, true, false, {AArch64::FeatureBRBE} }, // 202 |
3811 | { "BRBTGT27_EL1" , "BRBTGT27_EL1" , 0x8C5E, true, false, {AArch64::FeatureBRBE} }, // 203 |
3812 | { "BRBTGT28_EL1" , "BRBTGT28_EL1" , 0x8C66, true, false, {AArch64::FeatureBRBE} }, // 204 |
3813 | { "BRBTGT29_EL1" , "BRBTGT29_EL1" , 0x8C6E, true, false, {AArch64::FeatureBRBE} }, // 205 |
3814 | { "BRBTGT2_EL1" , "BRBTGT2_EL1" , 0x8C12, true, false, {AArch64::FeatureBRBE} }, // 206 |
3815 | { "BRBTGT30_EL1" , "BRBTGT30_EL1" , 0x8C76, true, false, {AArch64::FeatureBRBE} }, // 207 |
3816 | { "BRBTGT31_EL1" , "BRBTGT31_EL1" , 0x8C7E, true, false, {AArch64::FeatureBRBE} }, // 208 |
3817 | { "BRBTGT3_EL1" , "BRBTGT3_EL1" , 0x8C1A, true, false, {AArch64::FeatureBRBE} }, // 209 |
3818 | { "BRBTGT4_EL1" , "BRBTGT4_EL1" , 0x8C22, true, false, {AArch64::FeatureBRBE} }, // 210 |
3819 | { "BRBTGT5_EL1" , "BRBTGT5_EL1" , 0x8C2A, true, false, {AArch64::FeatureBRBE} }, // 211 |
3820 | { "BRBTGT6_EL1" , "BRBTGT6_EL1" , 0x8C32, true, false, {AArch64::FeatureBRBE} }, // 212 |
3821 | { "BRBTGT7_EL1" , "BRBTGT7_EL1" , 0x8C3A, true, false, {AArch64::FeatureBRBE} }, // 213 |
3822 | { "BRBTGT8_EL1" , "BRBTGT8_EL1" , 0x8C42, true, false, {AArch64::FeatureBRBE} }, // 214 |
3823 | { "BRBTGT9_EL1" , "BRBTGT9_EL1" , 0x8C4A, true, false, {AArch64::FeatureBRBE} }, // 215 |
3824 | { "BRBTGTINJ_EL1" , "BRBTGTINJ_EL1" , 0x8C8A, true, true, {AArch64::FeatureBRBE} }, // 216 |
3825 | { "BRBTS_EL1" , "BRBTS_EL1" , 0x8C82, true, true, {AArch64::FeatureBRBE} }, // 217 |
3826 | { "CCSIDR2_EL1" , "CCSIDR2_EL1" , 0xC802, true, false, {AArch64::FeatureCCIDX} }, // 218 |
3827 | { "CCSIDR_EL1" , "CCSIDR_EL1" , 0xC800, true, false, {} }, // 219 |
3828 | { "CLIDR_EL1" , "CLIDR_EL1" , 0xC801, true, false, {} }, // 220 |
3829 | { "CNTFRQ_EL0" , "CNTFRQ_EL0" , 0xDF00, true, true, {} }, // 221 |
3830 | { "CNTHCTL_EL2" , "CNTHCTL_EL2" , 0xE708, true, true, {} }, // 222 |
3831 | { "CNTHPS_CTL_EL2" , "CNTHPS_CTL_EL2" , 0xE729, true, true, {AArch64::FeatureSEL2} }, // 223 |
3832 | { "CNTHPS_CVAL_EL2" , "CNTHPS_CVAL_EL2" , 0xE72A, true, true, {AArch64::FeatureSEL2} }, // 224 |
3833 | { "CNTHPS_TVAL_EL2" , "CNTHPS_TVAL_EL2" , 0xE728, true, true, {AArch64::FeatureSEL2} }, // 225 |
3834 | { "CNTHP_CTL_EL2" , "CNTHP_CTL_EL2" , 0xE711, true, true, {} }, // 226 |
3835 | { "CNTHP_CVAL_EL2" , "CNTHP_CVAL_EL2" , 0xE712, true, true, {} }, // 227 |
3836 | { "CNTHP_TVAL_EL2" , "CNTHP_TVAL_EL2" , 0xE710, true, true, {} }, // 228 |
3837 | { "CNTHVS_CTL_EL2" , "CNTHVS_CTL_EL2" , 0xE721, true, true, {AArch64::FeatureSEL2} }, // 229 |
3838 | { "CNTHVS_CVAL_EL2" , "CNTHVS_CVAL_EL2" , 0xE722, true, true, {AArch64::FeatureSEL2} }, // 230 |
3839 | { "CNTHVS_TVAL_EL2" , "CNTHVS_TVAL_EL2" , 0xE720, true, true, {AArch64::FeatureSEL2} }, // 231 |
3840 | { "CNTHV_CTL_EL2" , "CNTHV_CTL_EL2" , 0xE719, true, true, {AArch64::FeatureVH} }, // 232 |
3841 | { "CNTHV_CVAL_EL2" , "CNTHV_CVAL_EL2" , 0xE71A, true, true, {AArch64::FeatureVH} }, // 233 |
3842 | { "CNTHV_TVAL_EL2" , "CNTHV_TVAL_EL2" , 0xE718, true, true, {AArch64::FeatureVH} }, // 234 |
3843 | { "CNTISCALE_EL2" , "CNTISCALE_EL2" , 0xE705, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 235 |
3844 | { "CNTKCTL_EL1" , "CNTKCTL_EL1" , 0xC708, true, true, {} }, // 236 |
3845 | { "CNTKCTL_EL12" , "CNTKCTL_EL12" , 0xEF08, true, true, {AArch64::FeatureVH} }, // 237 |
3846 | { "CNTPCTSS_EL0" , "CNTPCTSS_EL0" , 0xDF05, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 238 |
3847 | { "CNTPCT_EL0" , "CNTPCT_EL0" , 0xDF01, true, false, {} }, // 239 |
3848 | { "CNTPOFF_EL2" , "CNTPOFF_EL2" , 0xE706, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 240 |
3849 | { "CNTPS_CTL_EL1" , "CNTPS_CTL_EL1" , 0xFF11, true, true, {} }, // 241 |
3850 | { "CNTPS_CVAL_EL1" , "CNTPS_CVAL_EL1" , 0xFF12, true, true, {} }, // 242 |
3851 | { "CNTPS_TVAL_EL1" , "CNTPS_TVAL_EL1" , 0xFF10, true, true, {} }, // 243 |
3852 | { "CNTP_CTL_EL0" , "CNTP_CTL_EL0" , 0xDF11, true, true, {} }, // 244 |
3853 | { "CNTP_CTL_EL02" , "CNTP_CTL_EL02" , 0xEF11, true, true, {AArch64::FeatureVH} }, // 245 |
3854 | { "CNTP_CVAL_EL0" , "CNTP_CVAL_EL0" , 0xDF12, true, true, {} }, // 246 |
3855 | { "CNTP_CVAL_EL02" , "CNTP_CVAL_EL02" , 0xEF12, true, true, {AArch64::FeatureVH} }, // 247 |
3856 | { "CNTP_TVAL_EL0" , "CNTP_TVAL_EL0" , 0xDF10, true, true, {} }, // 248 |
3857 | { "CNTP_TVAL_EL02" , "CNTP_TVAL_EL02" , 0xEF10, true, true, {AArch64::FeatureVH} }, // 249 |
3858 | { "CNTSCALE_EL2" , "CNTSCALE_EL2" , 0xE704, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 250 |
3859 | { "CNTVCTSS_EL0" , "CNTVCTSS_EL0" , 0xDF06, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 251 |
3860 | { "CNTVCT_EL0" , "CNTVCT_EL0" , 0xDF02, true, false, {} }, // 252 |
3861 | { "CNTVFRQ_EL2" , "CNTVFRQ_EL2" , 0xE707, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 253 |
3862 | { "CNTVOFF_EL2" , "CNTVOFF_EL2" , 0xE703, true, true, {} }, // 254 |
3863 | { "CNTV_CTL_EL0" , "CNTV_CTL_EL0" , 0xDF19, true, true, {} }, // 255 |
3864 | { "CNTV_CTL_EL02" , "CNTV_CTL_EL02" , 0xEF19, true, true, {AArch64::FeatureVH} }, // 256 |
3865 | { "CNTV_CVAL_EL0" , "CNTV_CVAL_EL0" , 0xDF1A, true, true, {} }, // 257 |
3866 | { "CNTV_CVAL_EL02" , "CNTV_CVAL_EL02" , 0xEF1A, true, true, {AArch64::FeatureVH} }, // 258 |
3867 | { "CNTV_TVAL_EL0" , "CNTV_TVAL_EL0" , 0xDF18, true, true, {} }, // 259 |
3868 | { "CNTV_TVAL_EL02" , "CNTV_TVAL_EL02" , 0xEF18, true, true, {AArch64::FeatureVH} }, // 260 |
3869 | { "CONTEXTIDR_EL1" , "CONTEXTIDR_EL1" , 0xC681, true, true, {} }, // 261 |
3870 | { "CONTEXTIDR_EL12" , "CONTEXTIDR_EL12" , 0xEE81, true, true, {AArch64::FeatureVH} }, // 262 |
3871 | { "CONTEXTIDR_EL2" , "CONTEXTIDR_EL2" , 0xE681, true, true, {AArch64::FeatureCONTEXTIDREL2} }, // 263 |
3872 | { "CPACR_EL1" , "CPACR_EL1" , 0xC082, true, true, {} }, // 264 |
3873 | { "CPACR_EL12" , "CPACR_EL12" , 0xE882, true, true, {AArch64::FeatureVH} }, // 265 |
3874 | { "CPM_IOACC_CTL_EL3" , "CPM_IOACC_CTL_EL3" , 0xFF90, true, true, {AArch64::FeatureAppleA7SysReg} }, // 266 |
3875 | { "CPTR_EL2" , "CPTR_EL2" , 0xE08A, true, true, {} }, // 267 |
3876 | { "CPTR_EL3" , "CPTR_EL3" , 0xF08A, true, true, {} }, // 268 |
3877 | { "CSSELR_EL1" , "CSSELR_EL1" , 0xD000, true, true, {} }, // 269 |
3878 | { "CTR_EL0" , "CTR_EL0" , 0xD801, true, false, {} }, // 270 |
3879 | { "CurrentEL" , "CurrentEL" , 0xC212, true, false, {} }, // 271 |
3880 | { "DACR32_EL2" , "DACR32_EL2" , 0xE180, true, true, {} }, // 272 |
3881 | { "DAIF" , "DAIF" , 0xDA11, true, true, {} }, // 273 |
3882 | { "DBGAUTHSTATUS_EL1" , "DBGAUTHSTATUS_EL1" , 0x83F6, true, false, {} }, // 274 |
3883 | { "DBGBCR0_EL1" , "DBGBCR0_EL1" , 0x8005, true, true, {} }, // 275 |
3884 | { "DBGBCR10_EL1" , "DBGBCR10_EL1" , 0x8055, true, true, {} }, // 276 |
3885 | { "DBGBCR11_EL1" , "DBGBCR11_EL1" , 0x805D, true, true, {} }, // 277 |
3886 | { "DBGBCR12_EL1" , "DBGBCR12_EL1" , 0x8065, true, true, {} }, // 278 |
3887 | { "DBGBCR13_EL1" , "DBGBCR13_EL1" , 0x806D, true, true, {} }, // 279 |
3888 | { "DBGBCR14_EL1" , "DBGBCR14_EL1" , 0x8075, true, true, {} }, // 280 |
3889 | { "DBGBCR15_EL1" , "DBGBCR15_EL1" , 0x807D, true, true, {} }, // 281 |
3890 | { "DBGBCR1_EL1" , "DBGBCR1_EL1" , 0x800D, true, true, {} }, // 282 |
3891 | { "DBGBCR2_EL1" , "DBGBCR2_EL1" , 0x8015, true, true, {} }, // 283 |
3892 | { "DBGBCR3_EL1" , "DBGBCR3_EL1" , 0x801D, true, true, {} }, // 284 |
3893 | { "DBGBCR4_EL1" , "DBGBCR4_EL1" , 0x8025, true, true, {} }, // 285 |
3894 | { "DBGBCR5_EL1" , "DBGBCR5_EL1" , 0x802D, true, true, {} }, // 286 |
3895 | { "DBGBCR6_EL1" , "DBGBCR6_EL1" , 0x8035, true, true, {} }, // 287 |
3896 | { "DBGBCR7_EL1" , "DBGBCR7_EL1" , 0x803D, true, true, {} }, // 288 |
3897 | { "DBGBCR8_EL1" , "DBGBCR8_EL1" , 0x8045, true, true, {} }, // 289 |
3898 | { "DBGBCR9_EL1" , "DBGBCR9_EL1" , 0x804D, true, true, {} }, // 290 |
3899 | { "DBGBVR0_EL1" , "DBGBVR0_EL1" , 0x8004, true, true, {} }, // 291 |
3900 | { "DBGBVR10_EL1" , "DBGBVR10_EL1" , 0x8054, true, true, {} }, // 292 |
3901 | { "DBGBVR11_EL1" , "DBGBVR11_EL1" , 0x805C, true, true, {} }, // 293 |
3902 | { "DBGBVR12_EL1" , "DBGBVR12_EL1" , 0x8064, true, true, {} }, // 294 |
3903 | { "DBGBVR13_EL1" , "DBGBVR13_EL1" , 0x806C, true, true, {} }, // 295 |
3904 | { "DBGBVR14_EL1" , "DBGBVR14_EL1" , 0x8074, true, true, {} }, // 296 |
3905 | { "DBGBVR15_EL1" , "DBGBVR15_EL1" , 0x807C, true, true, {} }, // 297 |
3906 | { "DBGBVR1_EL1" , "DBGBVR1_EL1" , 0x800C, true, true, {} }, // 298 |
3907 | { "DBGBVR2_EL1" , "DBGBVR2_EL1" , 0x8014, true, true, {} }, // 299 |
3908 | { "DBGBVR3_EL1" , "DBGBVR3_EL1" , 0x801C, true, true, {} }, // 300 |
3909 | { "DBGBVR4_EL1" , "DBGBVR4_EL1" , 0x8024, true, true, {} }, // 301 |
3910 | { "DBGBVR5_EL1" , "DBGBVR5_EL1" , 0x802C, true, true, {} }, // 302 |
3911 | { "DBGBVR6_EL1" , "DBGBVR6_EL1" , 0x8034, true, true, {} }, // 303 |
3912 | { "DBGBVR7_EL1" , "DBGBVR7_EL1" , 0x803C, true, true, {} }, // 304 |
3913 | { "DBGBVR8_EL1" , "DBGBVR8_EL1" , 0x8044, true, true, {} }, // 305 |
3914 | { "DBGBVR9_EL1" , "DBGBVR9_EL1" , 0x804C, true, true, {} }, // 306 |
3915 | { "DBGCLAIMCLR_EL1" , "DBGCLAIMCLR_EL1" , 0x83CE, true, true, {} }, // 307 |
3916 | { "DBGCLAIMSET_EL1" , "DBGCLAIMSET_EL1" , 0x83C6, true, true, {} }, // 308 |
3917 | { "DBGDTRRX_EL0" , "DBGDTRRX_EL0" , 0x9828, true, false, {} }, // 309 |
3918 | { "DBGDTRTX_EL0" , "DBGDTRTX_EL0" , 0x9828, false, true, {} }, // 310 |
3919 | { "DBGDTR_EL0" , "DBGDTR_EL0" , 0x9820, true, true, {} }, // 311 |
3920 | { "DBGPRCR_EL1" , "DBGPRCR_EL1" , 0x80A4, true, true, {} }, // 312 |
3921 | { "DBGVCR32_EL2" , "DBGVCR32_EL2" , 0xA038, true, true, {} }, // 313 |
3922 | { "DBGWCR0_EL1" , "DBGWCR0_EL1" , 0x8007, true, true, {} }, // 314 |
3923 | { "DBGWCR10_EL1" , "DBGWCR10_EL1" , 0x8057, true, true, {} }, // 315 |
3924 | { "DBGWCR11_EL1" , "DBGWCR11_EL1" , 0x805F, true, true, {} }, // 316 |
3925 | { "DBGWCR12_EL1" , "DBGWCR12_EL1" , 0x8067, true, true, {} }, // 317 |
3926 | { "DBGWCR13_EL1" , "DBGWCR13_EL1" , 0x806F, true, true, {} }, // 318 |
3927 | { "DBGWCR14_EL1" , "DBGWCR14_EL1" , 0x8077, true, true, {} }, // 319 |
3928 | { "DBGWCR15_EL1" , "DBGWCR15_EL1" , 0x807F, true, true, {} }, // 320 |
3929 | { "DBGWCR1_EL1" , "DBGWCR1_EL1" , 0x800F, true, true, {} }, // 321 |
3930 | { "DBGWCR2_EL1" , "DBGWCR2_EL1" , 0x8017, true, true, {} }, // 322 |
3931 | { "DBGWCR3_EL1" , "DBGWCR3_EL1" , 0x801F, true, true, {} }, // 323 |
3932 | { "DBGWCR4_EL1" , "DBGWCR4_EL1" , 0x8027, true, true, {} }, // 324 |
3933 | { "DBGWCR5_EL1" , "DBGWCR5_EL1" , 0x802F, true, true, {} }, // 325 |
3934 | { "DBGWCR6_EL1" , "DBGWCR6_EL1" , 0x8037, true, true, {} }, // 326 |
3935 | { "DBGWCR7_EL1" , "DBGWCR7_EL1" , 0x803F, true, true, {} }, // 327 |
3936 | { "DBGWCR8_EL1" , "DBGWCR8_EL1" , 0x8047, true, true, {} }, // 328 |
3937 | { "DBGWCR9_EL1" , "DBGWCR9_EL1" , 0x804F, true, true, {} }, // 329 |
3938 | { "DBGWVR0_EL1" , "DBGWVR0_EL1" , 0x8006, true, true, {} }, // 330 |
3939 | { "DBGWVR10_EL1" , "DBGWVR10_EL1" , 0x8056, true, true, {} }, // 331 |
3940 | { "DBGWVR11_EL1" , "DBGWVR11_EL1" , 0x805E, true, true, {} }, // 332 |
3941 | { "DBGWVR12_EL1" , "DBGWVR12_EL1" , 0x8066, true, true, {} }, // 333 |
3942 | { "DBGWVR13_EL1" , "DBGWVR13_EL1" , 0x806E, true, true, {} }, // 334 |
3943 | { "DBGWVR14_EL1" , "DBGWVR14_EL1" , 0x8076, true, true, {} }, // 335 |
3944 | { "DBGWVR15_EL1" , "DBGWVR15_EL1" , 0x807E, true, true, {} }, // 336 |
3945 | { "DBGWVR1_EL1" , "DBGWVR1_EL1" , 0x800E, true, true, {} }, // 337 |
3946 | { "DBGWVR2_EL1" , "DBGWVR2_EL1" , 0x8016, true, true, {} }, // 338 |
3947 | { "DBGWVR3_EL1" , "DBGWVR3_EL1" , 0x801E, true, true, {} }, // 339 |
3948 | { "DBGWVR4_EL1" , "DBGWVR4_EL1" , 0x8026, true, true, {} }, // 340 |
3949 | { "DBGWVR5_EL1" , "DBGWVR5_EL1" , 0x802E, true, true, {} }, // 341 |
3950 | { "DBGWVR6_EL1" , "DBGWVR6_EL1" , 0x8036, true, true, {} }, // 342 |
3951 | { "DBGWVR7_EL1" , "DBGWVR7_EL1" , 0x803E, true, true, {} }, // 343 |
3952 | { "DBGWVR8_EL1" , "DBGWVR8_EL1" , 0x8046, true, true, {} }, // 344 |
3953 | { "DBGWVR9_EL1" , "DBGWVR9_EL1" , 0x804E, true, true, {} }, // 345 |
3954 | { "DCZID_EL0" , "DCZID_EL0" , 0xD807, true, false, {} }, // 346 |
3955 | { "DISR_EL1" , "DISR_EL1" , 0xC609, true, true, {AArch64::FeatureRAS} }, // 347 |
3956 | { "DIT" , "DIT" , 0xDA15, true, true, {AArch64::FeatureDIT} }, // 348 |
3957 | { "DLR_EL0" , "DLR_EL0" , 0xDA29, true, true, {} }, // 349 |
3958 | { "DSPSR_EL0" , "DSPSR_EL0" , 0xDA28, true, true, {} }, // 350 |
3959 | { "ELR_EL1" , "ELR_EL1" , 0xC201, true, true, {} }, // 351 |
3960 | { "ELR_EL12" , "ELR_EL12" , 0xEA01, true, true, {AArch64::FeatureVH} }, // 352 |
3961 | { "ELR_EL2" , "ELR_EL2" , 0xE201, true, true, {} }, // 353 |
3962 | { "ELR_EL3" , "ELR_EL3" , 0xF201, true, true, {} }, // 354 |
3963 | { "ERRIDR_EL1" , "ERRIDR_EL1" , 0xC298, true, false, {AArch64::FeatureRAS} }, // 355 |
3964 | { "ERRSELR_EL1" , "ERRSELR_EL1" , 0xC299, true, true, {AArch64::FeatureRAS} }, // 356 |
3965 | { "ERXADDR_EL1" , "ERXADDR_EL1" , 0xC2A3, true, true, {AArch64::FeatureRAS} }, // 357 |
3966 | { "ERXCTLR_EL1" , "ERXCTLR_EL1" , 0xC2A1, true, true, {AArch64::FeatureRAS} }, // 358 |
3967 | { "ERXFR_EL1" , "ERXFR_EL1" , 0xC2A0, true, false, {AArch64::FeatureRAS} }, // 359 |
3968 | { "ERXGSR_EL1" , "ERXGSR_EL1" , 0xC29A, true, false, {AArch64::FeatureRASv2} }, // 360 |
3969 | { "ERXMISC0_EL1" , "ERXMISC0_EL1" , 0xC2A8, true, true, {AArch64::FeatureRAS} }, // 361 |
3970 | { "ERXMISC1_EL1" , "ERXMISC1_EL1" , 0xC2A9, true, true, {AArch64::FeatureRAS} }, // 362 |
3971 | { "ERXMISC2_EL1" , "ERXMISC2_EL1" , 0xC2AA, true, true, {} }, // 363 |
3972 | { "ERXMISC3_EL1" , "ERXMISC3_EL1" , 0xC2AB, true, true, {} }, // 364 |
3973 | { "ERXPFGCDN_EL1" , "ERXPFGCDN_EL1" , 0xC2A6, true, true, {} }, // 365 |
3974 | { "ERXPFGCTL_EL1" , "ERXPFGCTL_EL1" , 0xC2A5, true, true, {} }, // 366 |
3975 | { "ERXPFGF_EL1" , "ERXPFGF_EL1" , 0xC2A4, true, false, {} }, // 367 |
3976 | { "ERXSTATUS_EL1" , "ERXSTATUS_EL1" , 0xC2A2, true, true, {AArch64::FeatureRAS} }, // 368 |
3977 | { "ESR_EL1" , "ESR_EL1" , 0xC290, true, true, {} }, // 369 |
3978 | { "ESR_EL12" , "ESR_EL12" , 0xEA90, true, true, {AArch64::FeatureVH} }, // 370 |
3979 | { "ESR_EL2" , "ESR_EL2" , 0xE290, true, true, {} }, // 371 |
3980 | { "ESR_EL3" , "ESR_EL3" , 0xF290, true, true, {} }, // 372 |
3981 | { "FAR_EL1" , "FAR_EL1" , 0xC300, true, true, {} }, // 373 |
3982 | { "FAR_EL12" , "FAR_EL12" , 0xEB00, true, true, {AArch64::FeatureVH} }, // 374 |
3983 | { "FAR_EL2" , "FAR_EL2" , 0xE300, true, true, {} }, // 375 |
3984 | { "FAR_EL3" , "FAR_EL3" , 0xF300, true, true, {} }, // 376 |
3985 | { "FGWTE3_EL3" , "FGWTE3_EL3" , 0xF08D, true, true, {} }, // 377 |
3986 | { "FPCR" , "FPCR" , 0xDA20, true, true, {AArch64::FeatureFPARMv8} }, // 378 |
3987 | { "FPEXC32_EL2" , "FPEXC32_EL2" , 0xE298, true, true, {} }, // 379 |
3988 | { "FPMR" , "FPMR" , 0xDA22, true, true, {} }, // 380 |
3989 | { "FPSR" , "FPSR" , 0xDA21, true, true, {AArch64::FeatureFPARMv8} }, // 381 |
3990 | { "GCR_EL1" , "GCR_EL1" , 0xC086, true, true, {AArch64::FeatureMTE} }, // 382 |
3991 | { "GCSCRE0_EL1" , "GCSCRE0_EL1" , 0xC12A, true, true, {} }, // 383 |
3992 | { "GCSCR_EL1" , "GCSCR_EL1" , 0xC128, true, true, {} }, // 384 |
3993 | { "GCSCR_EL12" , "GCSCR_EL12" , 0xE928, true, true, {} }, // 385 |
3994 | { "GCSCR_EL2" , "GCSCR_EL2" , 0xE128, true, true, {} }, // 386 |
3995 | { "GCSCR_EL3" , "GCSCR_EL3" , 0xF128, true, true, {} }, // 387 |
3996 | { "GCSPR_EL0" , "GCSPR_EL0" , 0xD929, true, true, {} }, // 388 |
3997 | { "GCSPR_EL1" , "GCSPR_EL1" , 0xC129, true, true, {} }, // 389 |
3998 | { "GCSPR_EL12" , "GCSPR_EL12" , 0xE929, true, true, {} }, // 390 |
3999 | { "GCSPR_EL2" , "GCSPR_EL2" , 0xE129, true, true, {} }, // 391 |
4000 | { "GCSPR_EL3" , "GCSPR_EL3" , 0xF129, true, true, {} }, // 392 |
4001 | { "GMID_EL1" , "GMID_EL1" , 0xC804, true, false, {AArch64::FeatureMTE} }, // 393 |
4002 | { "GPCCR_EL3" , "GPCCR_EL3" , 0xF10E, true, true, {AArch64::FeatureRME} }, // 394 |
4003 | { "GPTBR_EL3" , "GPTBR_EL3" , 0xF10C, true, true, {AArch64::FeatureRME} }, // 395 |
4004 | { "HACDBSBR_EL2" , "HACDBSBR_EL2" , 0xE11C, true, true, {} }, // 396 |
4005 | { "HACDBSCONS_EL2" , "HACDBSCONS_EL2" , 0xE11D, true, true, {} }, // 397 |
4006 | { "HACR_EL2" , "HACR_EL2" , 0xE08F, true, true, {} }, // 398 |
4007 | { "HAFGRTR_EL2" , "HAFGRTR_EL2" , 0xE18E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 399 |
4008 | { "HCRX_EL2" , "HCRX_EL2" , 0xE092, true, true, {AArch64::FeatureHCX} }, // 400 |
4009 | { "HCR_EL2" , "HCR_EL2" , 0xE088, true, true, {} }, // 401 |
4010 | { "HDBSSBR_EL2" , "HDBSSBR_EL2" , 0xE11A, true, true, {} }, // 402 |
4011 | { "HDBSSPROD_EL2" , "HDBSSPROD_EL2" , 0xE11B, true, true, {} }, // 403 |
4012 | { "HDFGRTR2_EL2" , "HDFGRTR2_EL2" , 0xE188, true, true, {AArch64::FeatureFineGrainedTraps} }, // 404 |
4013 | { "HDFGRTR_EL2" , "HDFGRTR_EL2" , 0xE18C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 405 |
4014 | { "HDFGWTR2_EL2" , "HDFGWTR2_EL2" , 0xE189, true, true, {AArch64::FeatureFineGrainedTraps} }, // 406 |
4015 | { "HDFGWTR_EL2" , "HDFGWTR_EL2" , 0xE18D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 407 |
4016 | { "HFGITR2_EL2" , "HFGITR2_EL2" , 0xE18F, true, true, {AArch64::FeatureFineGrainedTraps} }, // 408 |
4017 | { "HFGITR_EL2" , "HFGITR_EL2" , 0xE08E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 409 |
4018 | { "HFGRTR2_EL2" , "HFGRTR2_EL2" , 0xE18A, true, true, {AArch64::FeatureFineGrainedTraps} }, // 410 |
4019 | { "HFGRTR_EL2" , "HFGRTR_EL2" , 0xE08C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 411 |
4020 | { "HFGWTR2_EL2" , "HFGWTR2_EL2" , 0xE18B, true, true, {AArch64::FeatureFineGrainedTraps} }, // 412 |
4021 | { "HFGWTR_EL2" , "HFGWTR_EL2" , 0xE08D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 413 |
4022 | { "HPFAR_EL2" , "HPFAR_EL2" , 0xE304, true, true, {} }, // 414 |
4023 | { "HSTR_EL2" , "HSTR_EL2" , 0xE08B, true, true, {} }, // 415 |
4024 | { "ICC_AP0R0_EL1" , "ICC_AP0R0_EL1" , 0xC644, true, true, {} }, // 416 |
4025 | { "ICC_AP0R1_EL1" , "ICC_AP0R1_EL1" , 0xC645, true, true, {} }, // 417 |
4026 | { "ICC_AP0R2_EL1" , "ICC_AP0R2_EL1" , 0xC646, true, true, {} }, // 418 |
4027 | { "ICC_AP0R3_EL1" , "ICC_AP0R3_EL1" , 0xC647, true, true, {} }, // 419 |
4028 | { "ICC_AP1R0_EL1" , "ICC_AP1R0_EL1" , 0xC648, true, true, {} }, // 420 |
4029 | { "ICC_AP1R1_EL1" , "ICC_AP1R1_EL1" , 0xC649, true, true, {} }, // 421 |
4030 | { "ICC_AP1R2_EL1" , "ICC_AP1R2_EL1" , 0xC64A, true, true, {} }, // 422 |
4031 | { "ICC_AP1R3_EL1" , "ICC_AP1R3_EL1" , 0xC64B, true, true, {} }, // 423 |
4032 | { "ICC_ASGI1R_EL1" , "ICC_ASGI1R_EL1" , 0xC65E, false, true, {} }, // 424 |
4033 | { "ICC_BPR0_EL1" , "ICC_BPR0_EL1" , 0xC643, true, true, {} }, // 425 |
4034 | { "ICC_BPR1_EL1" , "ICC_BPR1_EL1" , 0xC663, true, true, {} }, // 426 |
4035 | { "ICC_CTLR_EL1" , "ICC_CTLR_EL1" , 0xC664, true, true, {} }, // 427 |
4036 | { "ICC_CTLR_EL3" , "ICC_CTLR_EL3" , 0xF664, true, true, {} }, // 428 |
4037 | { "ICC_DIR_EL1" , "ICC_DIR_EL1" , 0xC659, false, true, {} }, // 429 |
4038 | { "ICC_EOIR0_EL1" , "ICC_EOIR0_EL1" , 0xC641, false, true, {} }, // 430 |
4039 | { "ICC_EOIR1_EL1" , "ICC_EOIR1_EL1" , 0xC661, false, true, {} }, // 431 |
4040 | { "ICC_HPPIR0_EL1" , "ICC_HPPIR0_EL1" , 0xC642, true, false, {} }, // 432 |
4041 | { "ICC_HPPIR1_EL1" , "ICC_HPPIR1_EL1" , 0xC662, true, false, {} }, // 433 |
4042 | { "ICC_IAR0_EL1" , "ICC_IAR0_EL1" , 0xC640, true, false, {} }, // 434 |
4043 | { "ICC_IAR1_EL1" , "ICC_IAR1_EL1" , 0xC660, true, false, {} }, // 435 |
4044 | { "ICC_IGRPEN0_EL1" , "ICC_IGRPEN0_EL1" , 0xC666, true, true, {} }, // 436 |
4045 | { "ICC_IGRPEN1_EL1" , "ICC_IGRPEN1_EL1" , 0xC667, true, true, {} }, // 437 |
4046 | { "ICC_IGRPEN1_EL3" , "ICC_IGRPEN1_EL3" , 0xF667, true, true, {} }, // 438 |
4047 | { "ICC_NMIAR1_EL1" , "ICC_NMIAR1_EL1" , 0xC64D, true, false, {AArch64::FeatureNMI} }, // 439 |
4048 | { "ICC_PMR_EL1" , "ICC_PMR_EL1" , 0xC230, true, true, {} }, // 440 |
4049 | { "ICC_RPR_EL1" , "ICC_RPR_EL1" , 0xC65B, true, false, {} }, // 441 |
4050 | { "ICC_SGI0R_EL1" , "ICC_SGI0R_EL1" , 0xC65F, false, true, {} }, // 442 |
4051 | { "ICC_SGI1R_EL1" , "ICC_SGI1R_EL1" , 0xC65D, false, true, {} }, // 443 |
4052 | { "ICC_SRE_EL1" , "ICC_SRE_EL1" , 0xC665, true, true, {} }, // 444 |
4053 | { "ICC_SRE_EL2" , "ICC_SRE_EL2" , 0xE64D, true, true, {} }, // 445 |
4054 | { "ICC_SRE_EL3" , "ICC_SRE_EL3" , 0xF665, true, true, {} }, // 446 |
4055 | { "ICH_AP0R0_EL2" , "ICH_AP0R0_EL2" , 0xE640, true, true, {} }, // 447 |
4056 | { "ICH_AP0R1_EL2" , "ICH_AP0R1_EL2" , 0xE641, true, true, {} }, // 448 |
4057 | { "ICH_AP0R2_EL2" , "ICH_AP0R2_EL2" , 0xE642, true, true, {} }, // 449 |
4058 | { "ICH_AP0R3_EL2" , "ICH_AP0R3_EL2" , 0xE643, true, true, {} }, // 450 |
4059 | { "ICH_AP1R0_EL2" , "ICH_AP1R0_EL2" , 0xE648, true, true, {} }, // 451 |
4060 | { "ICH_AP1R1_EL2" , "ICH_AP1R1_EL2" , 0xE649, true, true, {} }, // 452 |
4061 | { "ICH_AP1R2_EL2" , "ICH_AP1R2_EL2" , 0xE64A, true, true, {} }, // 453 |
4062 | { "ICH_AP1R3_EL2" , "ICH_AP1R3_EL2" , 0xE64B, true, true, {} }, // 454 |
4063 | { "ICH_EISR_EL2" , "ICH_EISR_EL2" , 0xE65B, true, false, {} }, // 455 |
4064 | { "ICH_ELRSR_EL2" , "ICH_ELRSR_EL2" , 0xE65D, true, false, {} }, // 456 |
4065 | { "ICH_HCR_EL2" , "ICH_HCR_EL2" , 0xE658, true, true, {} }, // 457 |
4066 | { "ICH_LR0_EL2" , "ICH_LR0_EL2" , 0xE660, true, true, {} }, // 458 |
4067 | { "ICH_LR10_EL2" , "ICH_LR10_EL2" , 0xE66A, true, true, {} }, // 459 |
4068 | { "ICH_LR11_EL2" , "ICH_LR11_EL2" , 0xE66B, true, true, {} }, // 460 |
4069 | { "ICH_LR12_EL2" , "ICH_LR12_EL2" , 0xE66C, true, true, {} }, // 461 |
4070 | { "ICH_LR13_EL2" , "ICH_LR13_EL2" , 0xE66D, true, true, {} }, // 462 |
4071 | { "ICH_LR14_EL2" , "ICH_LR14_EL2" , 0xE66E, true, true, {} }, // 463 |
4072 | { "ICH_LR15_EL2" , "ICH_LR15_EL2" , 0xE66F, true, true, {} }, // 464 |
4073 | { "ICH_LR1_EL2" , "ICH_LR1_EL2" , 0xE661, true, true, {} }, // 465 |
4074 | { "ICH_LR2_EL2" , "ICH_LR2_EL2" , 0xE662, true, true, {} }, // 466 |
4075 | { "ICH_LR3_EL2" , "ICH_LR3_EL2" , 0xE663, true, true, {} }, // 467 |
4076 | { "ICH_LR4_EL2" , "ICH_LR4_EL2" , 0xE664, true, true, {} }, // 468 |
4077 | { "ICH_LR5_EL2" , "ICH_LR5_EL2" , 0xE665, true, true, {} }, // 469 |
4078 | { "ICH_LR6_EL2" , "ICH_LR6_EL2" , 0xE666, true, true, {} }, // 470 |
4079 | { "ICH_LR7_EL2" , "ICH_LR7_EL2" , 0xE667, true, true, {} }, // 471 |
4080 | { "ICH_LR8_EL2" , "ICH_LR8_EL2" , 0xE668, true, true, {} }, // 472 |
4081 | { "ICH_LR9_EL2" , "ICH_LR9_EL2" , 0xE669, true, true, {} }, // 473 |
4082 | { "ICH_MISR_EL2" , "ICH_MISR_EL2" , 0xE65A, true, false, {} }, // 474 |
4083 | { "ICH_VMCR_EL2" , "ICH_VMCR_EL2" , 0xE65F, true, true, {} }, // 475 |
4084 | { "ICH_VTR_EL2" , "ICH_VTR_EL2" , 0xE659, true, false, {} }, // 476 |
4085 | { "ID_AA64AFR0_EL1" , "ID_AA64AFR0_EL1" , 0xC02C, true, false, {} }, // 477 |
4086 | { "ID_AA64AFR1_EL1" , "ID_AA64AFR1_EL1" , 0xC02D, true, false, {} }, // 478 |
4087 | { "ID_AA64DFR0_EL1" , "ID_AA64DFR0_EL1" , 0xC028, true, false, {} }, // 479 |
4088 | { "ID_AA64DFR1_EL1" , "ID_AA64DFR1_EL1" , 0xC029, true, false, {} }, // 480 |
4089 | { "ID_AA64DFR2_EL1" , "ID_AA64DFR2_EL1" , 0xC02A, true, false, {} }, // 481 |
4090 | { "ID_AA64FPFR0_EL1" , "ID_AA64FPFR0_EL1" , 0xC027, true, false, {} }, // 482 |
4091 | { "ID_AA64ISAR0_EL1" , "ID_AA64ISAR0_EL1" , 0xC030, true, false, {} }, // 483 |
4092 | { "ID_AA64ISAR1_EL1" , "ID_AA64ISAR1_EL1" , 0xC031, true, false, {} }, // 484 |
4093 | { "ID_AA64ISAR2_EL1" , "ID_AA64ISAR2_EL1" , 0xC032, true, false, {} }, // 485 |
4094 | { "ID_AA64ISAR3_EL1" , "ID_AA64ISAR3_EL1" , 0xC033, true, false, {} }, // 486 |
4095 | { "ID_AA64MMFR0_EL1" , "ID_AA64MMFR0_EL1" , 0xC038, true, false, {} }, // 487 |
4096 | { "ID_AA64MMFR1_EL1" , "ID_AA64MMFR1_EL1" , 0xC039, true, false, {} }, // 488 |
4097 | { "ID_AA64MMFR2_EL1" , "ID_AA64MMFR2_EL1" , 0xC03A, true, false, {} }, // 489 |
4098 | { "ID_AA64MMFR3_EL1" , "ID_AA64MMFR3_EL1" , 0xC03B, true, false, {} }, // 490 |
4099 | { "ID_AA64MMFR4_EL1" , "ID_AA64MMFR4_EL1" , 0xC03C, true, false, {} }, // 491 |
4100 | { "ID_AA64PFR0_EL1" , "ID_AA64PFR0_EL1" , 0xC020, true, false, {} }, // 492 |
4101 | { "ID_AA64PFR1_EL1" , "ID_AA64PFR1_EL1" , 0xC021, true, false, {} }, // 493 |
4102 | { "ID_AA64PFR2_EL1" , "ID_AA64PFR2_EL1" , 0xC022, true, false, {} }, // 494 |
4103 | { "ID_AA64SMFR0_EL1" , "ID_AA64SMFR0_EL1" , 0xC025, true, false, {AArch64::FeatureSME} }, // 495 |
4104 | { "ID_AA64ZFR0_EL1" , "ID_AA64ZFR0_EL1" , 0xC024, true, false, {AArch64::FeatureSVE} }, // 496 |
4105 | { "ID_AFR0_EL1" , "ID_AFR0_EL1" , 0xC00B, true, false, {} }, // 497 |
4106 | { "ID_DFR0_EL1" , "ID_DFR0_EL1" , 0xC00A, true, false, {} }, // 498 |
4107 | { "ID_DFR1_EL1" , "ID_DFR1_EL1" , 0xC01D, true, false, {} }, // 499 |
4108 | { "ID_ISAR0_EL1" , "ID_ISAR0_EL1" , 0xC010, true, false, {} }, // 500 |
4109 | { "ID_ISAR1_EL1" , "ID_ISAR1_EL1" , 0xC011, true, false, {} }, // 501 |
4110 | { "ID_ISAR2_EL1" , "ID_ISAR2_EL1" , 0xC012, true, false, {} }, // 502 |
4111 | { "ID_ISAR3_EL1" , "ID_ISAR3_EL1" , 0xC013, true, false, {} }, // 503 |
4112 | { "ID_ISAR4_EL1" , "ID_ISAR4_EL1" , 0xC014, true, false, {} }, // 504 |
4113 | { "ID_ISAR5_EL1" , "ID_ISAR5_EL1" , 0xC015, true, false, {} }, // 505 |
4114 | { "ID_ISAR6_EL1" , "ID_ISAR6_EL1" , 0xC017, true, false, {AArch64::HasV8_2aOps} }, // 506 |
4115 | { "ID_MMFR0_EL1" , "ID_MMFR0_EL1" , 0xC00C, true, false, {} }, // 507 |
4116 | { "ID_MMFR1_EL1" , "ID_MMFR1_EL1" , 0xC00D, true, false, {} }, // 508 |
4117 | { "ID_MMFR2_EL1" , "ID_MMFR2_EL1" , 0xC00E, true, false, {} }, // 509 |
4118 | { "ID_MMFR3_EL1" , "ID_MMFR3_EL1" , 0xC00F, true, false, {} }, // 510 |
4119 | { "ID_MMFR4_EL1" , "ID_MMFR4_EL1" , 0xC016, true, false, {} }, // 511 |
4120 | { "ID_MMFR5_EL1" , "ID_MMFR5_EL1" , 0xC01E, true, false, {} }, // 512 |
4121 | { "ID_PFR0_EL1" , "ID_PFR0_EL1" , 0xC008, true, false, {} }, // 513 |
4122 | { "ID_PFR1_EL1" , "ID_PFR1_EL1" , 0xC009, true, false, {} }, // 514 |
4123 | { "ID_PFR2_EL1" , "ID_PFR2_EL1" , 0xC01C, true, false, {AArch64::FeatureSpecRestrict} }, // 515 |
4124 | { "IFSR32_EL2" , "IFSR32_EL2" , 0xE281, true, true, {} }, // 516 |
4125 | { "ISR_EL1" , "ISR_EL1" , 0xC608, true, false, {} }, // 517 |
4126 | { "LORC_EL1" , "LORC_EL1" , 0xC523, true, true, {AArch64::FeatureLOR} }, // 518 |
4127 | { "LOREA_EL1" , "LOREA_EL1" , 0xC521, true, true, {AArch64::FeatureLOR} }, // 519 |
4128 | { "LORID_EL1" , "LORID_EL1" , 0xC527, true, false, {AArch64::FeatureLOR} }, // 520 |
4129 | { "LORN_EL1" , "LORN_EL1" , 0xC522, true, true, {AArch64::FeatureLOR} }, // 521 |
4130 | { "LORSA_EL1" , "LORSA_EL1" , 0xC520, true, true, {AArch64::FeatureLOR} }, // 522 |
4131 | { "MAIR2_EL1" , "MAIR2_EL1" , 0xC511, true, true, {} }, // 523 |
4132 | { "MAIR2_EL12" , "MAIR2_EL12" , 0xED11, true, true, {} }, // 524 |
4133 | { "MAIR2_EL2" , "MAIR2_EL2" , 0xE509, true, true, {} }, // 525 |
4134 | { "MAIR2_EL3" , "MAIR2_EL3" , 0xF509, true, true, {} }, // 526 |
4135 | { "MAIR_EL1" , "MAIR_EL1" , 0xC510, true, true, {} }, // 527 |
4136 | { "MAIR_EL12" , "MAIR_EL12" , 0xED10, true, true, {AArch64::FeatureVH} }, // 528 |
4137 | { "MAIR_EL2" , "MAIR_EL2" , 0xE510, true, true, {} }, // 529 |
4138 | { "MAIR_EL3" , "MAIR_EL3" , 0xF510, true, true, {} }, // 530 |
4139 | { "MDCCINT_EL1" , "MDCCINT_EL1" , 0x8010, true, true, {} }, // 531 |
4140 | { "MDCCSR_EL0" , "MDCCSR_EL0" , 0x9808, true, false, {} }, // 532 |
4141 | { "MDCR_EL2" , "MDCR_EL2" , 0xE089, true, true, {} }, // 533 |
4142 | { "MDCR_EL3" , "MDCR_EL3" , 0xF099, true, true, {} }, // 534 |
4143 | { "MDRAR_EL1" , "MDRAR_EL1" , 0x8080, true, false, {} }, // 535 |
4144 | { "MDSCR_EL1" , "MDSCR_EL1" , 0x8012, true, true, {} }, // 536 |
4145 | { "MDSELR_EL1" , "MDSELR_EL1" , 0x8022, true, true, {} }, // 537 |
4146 | { "MDSTEPOP_EL1" , "MDSTEPOP_EL1" , 0x802A, true, true, {} }, // 538 |
4147 | { "MECIDR_EL2" , "MECIDR_EL2" , 0xE547, true, false, {AArch64::FeatureMEC} }, // 539 |
4148 | { "MECID_A0_EL2" , "MECID_A0_EL2" , 0xE541, true, true, {AArch64::FeatureMEC} }, // 540 |
4149 | { "MECID_A1_EL2" , "MECID_A1_EL2" , 0xE543, true, true, {AArch64::FeatureMEC} }, // 541 |
4150 | { "MECID_P0_EL2" , "MECID_P0_EL2" , 0xE540, true, true, {AArch64::FeatureMEC} }, // 542 |
4151 | { "MECID_P1_EL2" , "MECID_P1_EL2" , 0xE542, true, true, {AArch64::FeatureMEC} }, // 543 |
4152 | { "MECID_RL_A_EL3" , "MECID_RL_A_EL3" , 0xF551, true, true, {AArch64::FeatureMEC} }, // 544 |
4153 | { "MFAR_EL3" , "MFAR_EL3" , 0xF305, true, true, {} }, // 545 |
4154 | { "MIDR_EL1" , "MIDR_EL1" , 0xC000, true, false, {} }, // 546 |
4155 | { "MPAM0_EL1" , "MPAM0_EL1" , 0xC529, true, true, {AArch64::FeatureMPAM} }, // 547 |
4156 | { "MPAM1_EL1" , "MPAM1_EL1" , 0xC528, true, true, {AArch64::FeatureMPAM} }, // 548 |
4157 | { "MPAM1_EL12" , "MPAM1_EL12" , 0xED28, true, true, {AArch64::FeatureMPAM} }, // 549 |
4158 | { "MPAM2_EL2" , "MPAM2_EL2" , 0xE528, true, true, {AArch64::FeatureMPAM} }, // 550 |
4159 | { "MPAM3_EL3" , "MPAM3_EL3" , 0xF528, true, true, {AArch64::FeatureMPAM} }, // 551 |
4160 | { "MPAMHCR_EL2" , "MPAMHCR_EL2" , 0xE520, true, true, {AArch64::FeatureMPAM} }, // 552 |
4161 | { "MPAMIDR_EL1" , "MPAMIDR_EL1" , 0xC524, true, false, {AArch64::FeatureMPAM} }, // 553 |
4162 | { "MPAMSM_EL1" , "MPAMSM_EL1" , 0xC52B, true, true, {AArch64::FeatureMPAM, AArch64::FeatureSME} }, // 554 |
4163 | { "MPAMVPM0_EL2" , "MPAMVPM0_EL2" , 0xE530, true, true, {AArch64::FeatureMPAM} }, // 555 |
4164 | { "MPAMVPM1_EL2" , "MPAMVPM1_EL2" , 0xE531, true, true, {AArch64::FeatureMPAM} }, // 556 |
4165 | { "MPAMVPM2_EL2" , "MPAMVPM2_EL2" , 0xE532, true, true, {AArch64::FeatureMPAM} }, // 557 |
4166 | { "MPAMVPM3_EL2" , "MPAMVPM3_EL2" , 0xE533, true, true, {AArch64::FeatureMPAM} }, // 558 |
4167 | { "MPAMVPM4_EL2" , "MPAMVPM4_EL2" , 0xE534, true, true, {AArch64::FeatureMPAM} }, // 559 |
4168 | { "MPAMVPM5_EL2" , "MPAMVPM5_EL2" , 0xE535, true, true, {AArch64::FeatureMPAM} }, // 560 |
4169 | { "MPAMVPM6_EL2" , "MPAMVPM6_EL2" , 0xE536, true, true, {AArch64::FeatureMPAM} }, // 561 |
4170 | { "MPAMVPM7_EL2" , "MPAMVPM7_EL2" , 0xE537, true, true, {AArch64::FeatureMPAM} }, // 562 |
4171 | { "MPAMVPMV_EL2" , "MPAMVPMV_EL2" , 0xE521, true, true, {AArch64::FeatureMPAM} }, // 563 |
4172 | { "MPIDR_EL1" , "MPIDR_EL1" , 0xC005, true, false, {} }, // 564 |
4173 | { "MPUIR_EL1" , "MPUIR_EL1" , 0xC004, true, true, {AArch64::HasV8_0rOps} }, // 565 |
4174 | { "MPUIR_EL2" , "MPUIR_EL2" , 0xE004, true, true, {AArch64::HasV8_0rOps} }, // 566 |
4175 | { "MVFR0_EL1" , "MVFR0_EL1" , 0xC018, true, false, {} }, // 567 |
4176 | { "MVFR1_EL1" , "MVFR1_EL1" , 0xC019, true, false, {} }, // 568 |
4177 | { "MVFR2_EL1" , "MVFR2_EL1" , 0xC01A, true, false, {} }, // 569 |
4178 | { "NZCV" , "NZCV" , 0xDA10, true, true, {} }, // 570 |
4179 | { "OSDLR_EL1" , "OSDLR_EL1" , 0x809C, true, true, {} }, // 571 |
4180 | { "OSDTRRX_EL1" , "OSDTRRX_EL1" , 0x8002, true, true, {} }, // 572 |
4181 | { "OSDTRTX_EL1" , "OSDTRTX_EL1" , 0x801A, true, true, {} }, // 573 |
4182 | { "OSECCR_EL1" , "OSECCR_EL1" , 0x8032, true, true, {} }, // 574 |
4183 | { "OSLAR_EL1" , "OSLAR_EL1" , 0x8084, false, true, {} }, // 575 |
4184 | { "OSLSR_EL1" , "OSLSR_EL1" , 0x808C, true, false, {} }, // 576 |
4185 | { "PAN" , "PAN" , 0xC213, true, true, {AArch64::FeaturePAN} }, // 577 |
4186 | { "PAR_EL1" , "PAR_EL1" , 0xC3A0, true, true, {} }, // 578 |
4187 | { "PFAR_EL1" , "PFAR_EL1" , 0xC305, true, true, {} }, // 579 |
4188 | { "PFAR_EL12" , "PFAR_EL12" , 0xEB05, true, true, {} }, // 580 |
4189 | { "PFAR_EL2" , "PFAR_EL2" , 0xE305, true, true, {} }, // 581 |
4190 | { "PIRE0_EL1" , "PIRE0_EL1" , 0xC512, true, true, {} }, // 582 |
4191 | { "PIRE0_EL12" , "PIRE0_EL12" , 0xED12, true, true, {} }, // 583 |
4192 | { "PIRE0_EL2" , "PIRE0_EL2" , 0xE512, true, true, {} }, // 584 |
4193 | { "PIR_EL1" , "PIR_EL1" , 0xC513, true, true, {} }, // 585 |
4194 | { "PIR_EL12" , "PIR_EL12" , 0xED13, true, true, {} }, // 586 |
4195 | { "PIR_EL2" , "PIR_EL2" , 0xE513, true, true, {} }, // 587 |
4196 | { "PIR_EL3" , "PIR_EL3" , 0xF513, true, true, {} }, // 588 |
4197 | { "PM" , "PM" , 0xC219, true, true, {} }, // 589 |
4198 | { "PMBIDR_EL1" , "PMBIDR_EL1" , 0xC4D7, true, false, {AArch64::FeatureSPE} }, // 590 |
4199 | { "PMBLIMITR_EL1" , "PMBLIMITR_EL1" , 0xC4D0, true, true, {AArch64::FeatureSPE} }, // 591 |
4200 | { "PMBPTR_EL1" , "PMBPTR_EL1" , 0xC4D1, true, true, {AArch64::FeatureSPE} }, // 592 |
4201 | { "PMBSR_EL1" , "PMBSR_EL1" , 0xC4D3, true, true, {AArch64::FeatureSPE} }, // 593 |
4202 | { "PMCCFILTR_EL0" , "PMCCFILTR_EL0" , 0xDF7F, true, true, {} }, // 594 |
4203 | { "PMCCNTR_EL0" , "PMCCNTR_EL0" , 0xDCE8, true, true, {} }, // 595 |
4204 | { "PMCCNTSVR_EL1" , "PMCCNTSVR_EL1" , 0x875F, true, false, {} }, // 596 |
4205 | { "PMCEID0_EL0" , "PMCEID0_EL0" , 0xDCE6, true, false, {} }, // 597 |
4206 | { "PMCEID1_EL0" , "PMCEID1_EL0" , 0xDCE7, true, false, {} }, // 598 |
4207 | { "PMCNTENCLR_EL0" , "PMCNTENCLR_EL0" , 0xDCE2, true, true, {} }, // 599 |
4208 | { "PMCNTENSET_EL0" , "PMCNTENSET_EL0" , 0xDCE1, true, true, {} }, // 600 |
4209 | { "PMCR_EL0" , "PMCR_EL0" , 0xDCE0, true, true, {} }, // 601 |
4210 | { "PMECR_EL1" , "PMECR_EL1" , 0xC4F5, true, true, {} }, // 602 |
4211 | { "PMEVCNTR0_EL0" , "PMEVCNTR0_EL0" , 0xDF40, true, true, {} }, // 603 |
4212 | { "PMEVCNTR10_EL0" , "PMEVCNTR10_EL0" , 0xDF4A, true, true, {} }, // 604 |
4213 | { "PMEVCNTR11_EL0" , "PMEVCNTR11_EL0" , 0xDF4B, true, true, {} }, // 605 |
4214 | { "PMEVCNTR12_EL0" , "PMEVCNTR12_EL0" , 0xDF4C, true, true, {} }, // 606 |
4215 | { "PMEVCNTR13_EL0" , "PMEVCNTR13_EL0" , 0xDF4D, true, true, {} }, // 607 |
4216 | { "PMEVCNTR14_EL0" , "PMEVCNTR14_EL0" , 0xDF4E, true, true, {} }, // 608 |
4217 | { "PMEVCNTR15_EL0" , "PMEVCNTR15_EL0" , 0xDF4F, true, true, {} }, // 609 |
4218 | { "PMEVCNTR16_EL0" , "PMEVCNTR16_EL0" , 0xDF50, true, true, {} }, // 610 |
4219 | { "PMEVCNTR17_EL0" , "PMEVCNTR17_EL0" , 0xDF51, true, true, {} }, // 611 |
4220 | { "PMEVCNTR18_EL0" , "PMEVCNTR18_EL0" , 0xDF52, true, true, {} }, // 612 |
4221 | { "PMEVCNTR19_EL0" , "PMEVCNTR19_EL0" , 0xDF53, true, true, {} }, // 613 |
4222 | { "PMEVCNTR1_EL0" , "PMEVCNTR1_EL0" , 0xDF41, true, true, {} }, // 614 |
4223 | { "PMEVCNTR20_EL0" , "PMEVCNTR20_EL0" , 0xDF54, true, true, {} }, // 615 |
4224 | { "PMEVCNTR21_EL0" , "PMEVCNTR21_EL0" , 0xDF55, true, true, {} }, // 616 |
4225 | { "PMEVCNTR22_EL0" , "PMEVCNTR22_EL0" , 0xDF56, true, true, {} }, // 617 |
4226 | { "PMEVCNTR23_EL0" , "PMEVCNTR23_EL0" , 0xDF57, true, true, {} }, // 618 |
4227 | { "PMEVCNTR24_EL0" , "PMEVCNTR24_EL0" , 0xDF58, true, true, {} }, // 619 |
4228 | { "PMEVCNTR25_EL0" , "PMEVCNTR25_EL0" , 0xDF59, true, true, {} }, // 620 |
4229 | { "PMEVCNTR26_EL0" , "PMEVCNTR26_EL0" , 0xDF5A, true, true, {} }, // 621 |
4230 | { "PMEVCNTR27_EL0" , "PMEVCNTR27_EL0" , 0xDF5B, true, true, {} }, // 622 |
4231 | { "PMEVCNTR28_EL0" , "PMEVCNTR28_EL0" , 0xDF5C, true, true, {} }, // 623 |
4232 | { "PMEVCNTR29_EL0" , "PMEVCNTR29_EL0" , 0xDF5D, true, true, {} }, // 624 |
4233 | { "PMEVCNTR2_EL0" , "PMEVCNTR2_EL0" , 0xDF42, true, true, {} }, // 625 |
4234 | { "PMEVCNTR30_EL0" , "PMEVCNTR30_EL0" , 0xDF5E, true, true, {} }, // 626 |
4235 | { "PMEVCNTR3_EL0" , "PMEVCNTR3_EL0" , 0xDF43, true, true, {} }, // 627 |
4236 | { "PMEVCNTR4_EL0" , "PMEVCNTR4_EL0" , 0xDF44, true, true, {} }, // 628 |
4237 | { "PMEVCNTR5_EL0" , "PMEVCNTR5_EL0" , 0xDF45, true, true, {} }, // 629 |
4238 | { "PMEVCNTR6_EL0" , "PMEVCNTR6_EL0" , 0xDF46, true, true, {} }, // 630 |
4239 | { "PMEVCNTR7_EL0" , "PMEVCNTR7_EL0" , 0xDF47, true, true, {} }, // 631 |
4240 | { "PMEVCNTR8_EL0" , "PMEVCNTR8_EL0" , 0xDF48, true, true, {} }, // 632 |
4241 | { "PMEVCNTR9_EL0" , "PMEVCNTR9_EL0" , 0xDF49, true, true, {} }, // 633 |
4242 | { "PMEVCNTSVR0_EL1" , "PMEVCNTSVR0_EL1" , 0x8740, true, false, {} }, // 634 |
4243 | { "PMEVCNTSVR10_EL1" , "PMEVCNTSVR10_EL1" , 0x874A, true, false, {} }, // 635 |
4244 | { "PMEVCNTSVR11_EL1" , "PMEVCNTSVR11_EL1" , 0x874B, true, false, {} }, // 636 |
4245 | { "PMEVCNTSVR12_EL1" , "PMEVCNTSVR12_EL1" , 0x874C, true, false, {} }, // 637 |
4246 | { "PMEVCNTSVR13_EL1" , "PMEVCNTSVR13_EL1" , 0x874D, true, false, {} }, // 638 |
4247 | { "PMEVCNTSVR14_EL1" , "PMEVCNTSVR14_EL1" , 0x874E, true, false, {} }, // 639 |
4248 | { "PMEVCNTSVR15_EL1" , "PMEVCNTSVR15_EL1" , 0x874F, true, false, {} }, // 640 |
4249 | { "PMEVCNTSVR16_EL1" , "PMEVCNTSVR16_EL1" , 0x8750, true, false, {} }, // 641 |
4250 | { "PMEVCNTSVR17_EL1" , "PMEVCNTSVR17_EL1" , 0x8751, true, false, {} }, // 642 |
4251 | { "PMEVCNTSVR18_EL1" , "PMEVCNTSVR18_EL1" , 0x8752, true, false, {} }, // 643 |
4252 | { "PMEVCNTSVR19_EL1" , "PMEVCNTSVR19_EL1" , 0x8753, true, false, {} }, // 644 |
4253 | { "PMEVCNTSVR1_EL1" , "PMEVCNTSVR1_EL1" , 0x8741, true, false, {} }, // 645 |
4254 | { "PMEVCNTSVR20_EL1" , "PMEVCNTSVR20_EL1" , 0x8754, true, false, {} }, // 646 |
4255 | { "PMEVCNTSVR21_EL1" , "PMEVCNTSVR21_EL1" , 0x8755, true, false, {} }, // 647 |
4256 | { "PMEVCNTSVR22_EL1" , "PMEVCNTSVR22_EL1" , 0x8756, true, false, {} }, // 648 |
4257 | { "PMEVCNTSVR23_EL1" , "PMEVCNTSVR23_EL1" , 0x8757, true, false, {} }, // 649 |
4258 | { "PMEVCNTSVR24_EL1" , "PMEVCNTSVR24_EL1" , 0x8758, true, false, {} }, // 650 |
4259 | { "PMEVCNTSVR25_EL1" , "PMEVCNTSVR25_EL1" , 0x8759, true, false, {} }, // 651 |
4260 | { "PMEVCNTSVR26_EL1" , "PMEVCNTSVR26_EL1" , 0x875A, true, false, {} }, // 652 |
4261 | { "PMEVCNTSVR27_EL1" , "PMEVCNTSVR27_EL1" , 0x875B, true, false, {} }, // 653 |
4262 | { "PMEVCNTSVR28_EL1" , "PMEVCNTSVR28_EL1" , 0x875C, true, false, {} }, // 654 |
4263 | { "PMEVCNTSVR29_EL1" , "PMEVCNTSVR29_EL1" , 0x875D, true, false, {} }, // 655 |
4264 | { "PMEVCNTSVR2_EL1" , "PMEVCNTSVR2_EL1" , 0x8742, true, false, {} }, // 656 |
4265 | { "PMEVCNTSVR30_EL1" , "PMEVCNTSVR30_EL1" , 0x875E, true, false, {} }, // 657 |
4266 | { "PMEVCNTSVR3_EL1" , "PMEVCNTSVR3_EL1" , 0x8743, true, false, {} }, // 658 |
4267 | { "PMEVCNTSVR4_EL1" , "PMEVCNTSVR4_EL1" , 0x8744, true, false, {} }, // 659 |
4268 | { "PMEVCNTSVR5_EL1" , "PMEVCNTSVR5_EL1" , 0x8745, true, false, {} }, // 660 |
4269 | { "PMEVCNTSVR6_EL1" , "PMEVCNTSVR6_EL1" , 0x8746, true, false, {} }, // 661 |
4270 | { "PMEVCNTSVR7_EL1" , "PMEVCNTSVR7_EL1" , 0x8747, true, false, {} }, // 662 |
4271 | { "PMEVCNTSVR8_EL1" , "PMEVCNTSVR8_EL1" , 0x8748, true, false, {} }, // 663 |
4272 | { "PMEVCNTSVR9_EL1" , "PMEVCNTSVR9_EL1" , 0x8749, true, false, {} }, // 664 |
4273 | { "PMEVTYPER0_EL0" , "PMEVTYPER0_EL0" , 0xDF60, true, true, {} }, // 665 |
4274 | { "PMEVTYPER10_EL0" , "PMEVTYPER10_EL0" , 0xDF6A, true, true, {} }, // 666 |
4275 | { "PMEVTYPER11_EL0" , "PMEVTYPER11_EL0" , 0xDF6B, true, true, {} }, // 667 |
4276 | { "PMEVTYPER12_EL0" , "PMEVTYPER12_EL0" , 0xDF6C, true, true, {} }, // 668 |
4277 | { "PMEVTYPER13_EL0" , "PMEVTYPER13_EL0" , 0xDF6D, true, true, {} }, // 669 |
4278 | { "PMEVTYPER14_EL0" , "PMEVTYPER14_EL0" , 0xDF6E, true, true, {} }, // 670 |
4279 | { "PMEVTYPER15_EL0" , "PMEVTYPER15_EL0" , 0xDF6F, true, true, {} }, // 671 |
4280 | { "PMEVTYPER16_EL0" , "PMEVTYPER16_EL0" , 0xDF70, true, true, {} }, // 672 |
4281 | { "PMEVTYPER17_EL0" , "PMEVTYPER17_EL0" , 0xDF71, true, true, {} }, // 673 |
4282 | { "PMEVTYPER18_EL0" , "PMEVTYPER18_EL0" , 0xDF72, true, true, {} }, // 674 |
4283 | { "PMEVTYPER19_EL0" , "PMEVTYPER19_EL0" , 0xDF73, true, true, {} }, // 675 |
4284 | { "PMEVTYPER1_EL0" , "PMEVTYPER1_EL0" , 0xDF61, true, true, {} }, // 676 |
4285 | { "PMEVTYPER20_EL0" , "PMEVTYPER20_EL0" , 0xDF74, true, true, {} }, // 677 |
4286 | { "PMEVTYPER21_EL0" , "PMEVTYPER21_EL0" , 0xDF75, true, true, {} }, // 678 |
4287 | { "PMEVTYPER22_EL0" , "PMEVTYPER22_EL0" , 0xDF76, true, true, {} }, // 679 |
4288 | { "PMEVTYPER23_EL0" , "PMEVTYPER23_EL0" , 0xDF77, true, true, {} }, // 680 |
4289 | { "PMEVTYPER24_EL0" , "PMEVTYPER24_EL0" , 0xDF78, true, true, {} }, // 681 |
4290 | { "PMEVTYPER25_EL0" , "PMEVTYPER25_EL0" , 0xDF79, true, true, {} }, // 682 |
4291 | { "PMEVTYPER26_EL0" , "PMEVTYPER26_EL0" , 0xDF7A, true, true, {} }, // 683 |
4292 | { "PMEVTYPER27_EL0" , "PMEVTYPER27_EL0" , 0xDF7B, true, true, {} }, // 684 |
4293 | { "PMEVTYPER28_EL0" , "PMEVTYPER28_EL0" , 0xDF7C, true, true, {} }, // 685 |
4294 | { "PMEVTYPER29_EL0" , "PMEVTYPER29_EL0" , 0xDF7D, true, true, {} }, // 686 |
4295 | { "PMEVTYPER2_EL0" , "PMEVTYPER2_EL0" , 0xDF62, true, true, {} }, // 687 |
4296 | { "PMEVTYPER30_EL0" , "PMEVTYPER30_EL0" , 0xDF7E, true, true, {} }, // 688 |
4297 | { "PMEVTYPER3_EL0" , "PMEVTYPER3_EL0" , 0xDF63, true, true, {} }, // 689 |
4298 | { "PMEVTYPER4_EL0" , "PMEVTYPER4_EL0" , 0xDF64, true, true, {} }, // 690 |
4299 | { "PMEVTYPER5_EL0" , "PMEVTYPER5_EL0" , 0xDF65, true, true, {} }, // 691 |
4300 | { "PMEVTYPER6_EL0" , "PMEVTYPER6_EL0" , 0xDF66, true, true, {} }, // 692 |
4301 | { "PMEVTYPER7_EL0" , "PMEVTYPER7_EL0" , 0xDF67, true, true, {} }, // 693 |
4302 | { "PMEVTYPER8_EL0" , "PMEVTYPER8_EL0" , 0xDF68, true, true, {} }, // 694 |
4303 | { "PMEVTYPER9_EL0" , "PMEVTYPER9_EL0" , 0xDF69, true, true, {} }, // 695 |
4304 | { "PMIAR_EL1" , "PMIAR_EL1" , 0xC4F7, true, true, {} }, // 696 |
4305 | { "PMICFILTR_EL0" , "PMICFILTR_EL0" , 0xDCB0, true, true, {} }, // 697 |
4306 | { "PMICNTR_EL0" , "PMICNTR_EL0" , 0xDCA0, true, true, {} }, // 698 |
4307 | { "PMICNTSVR_EL1" , "PMICNTSVR_EL1" , 0x8760, true, false, {} }, // 699 |
4308 | { "PMINTENCLR_EL1" , "PMINTENCLR_EL1" , 0xC4F2, true, true, {} }, // 700 |
4309 | { "PMINTENSET_EL1" , "PMINTENSET_EL1" , 0xC4F1, true, true, {} }, // 701 |
4310 | { "PMMIR_EL1" , "PMMIR_EL1" , 0xC4F6, true, false, {} }, // 702 |
4311 | { "PMOVSCLR_EL0" , "PMOVSCLR_EL0" , 0xDCE3, true, true, {} }, // 703 |
4312 | { "PMOVSSET_EL0" , "PMOVSSET_EL0" , 0xDCF3, true, true, {} }, // 704 |
4313 | { "PMSCR_EL1" , "PMSCR_EL1" , 0xC4C8, true, true, {AArch64::FeatureSPE} }, // 705 |
4314 | { "PMSCR_EL12" , "PMSCR_EL12" , 0xECC8, true, true, {AArch64::FeatureSPE} }, // 706 |
4315 | { "PMSCR_EL2" , "PMSCR_EL2" , 0xE4C8, true, true, {AArch64::FeatureSPE} }, // 707 |
4316 | { "PMSDSFR_EL1" , "PMSDSFR_EL1" , 0xC4D4, true, true, {} }, // 708 |
4317 | { "PMSELR_EL0" , "PMSELR_EL0" , 0xDCE5, true, true, {} }, // 709 |
4318 | { "PMSEVFR_EL1" , "PMSEVFR_EL1" , 0xC4CD, true, true, {AArch64::FeatureSPE} }, // 710 |
4319 | { "PMSFCR_EL1" , "PMSFCR_EL1" , 0xC4CC, true, true, {AArch64::FeatureSPE} }, // 711 |
4320 | { "PMSICR_EL1" , "PMSICR_EL1" , 0xC4CA, true, true, {AArch64::FeatureSPE} }, // 712 |
4321 | { "PMSIDR_EL1" , "PMSIDR_EL1" , 0xC4CF, true, false, {AArch64::FeatureSPE} }, // 713 |
4322 | { "PMSIRR_EL1" , "PMSIRR_EL1" , 0xC4CB, true, true, {AArch64::FeatureSPE} }, // 714 |
4323 | { "PMSLATFR_EL1" , "PMSLATFR_EL1" , 0xC4CE, true, true, {AArch64::FeatureSPE} }, // 715 |
4324 | { "PMSNEVFR_EL1" , "PMSNEVFR_EL1" , 0xC4C9, true, true, {AArch64::FeatureSPE_EEF} }, // 716 |
4325 | { "PMSSCR_EL1" , "PMSSCR_EL1" , 0xC4EB, true, true, {} }, // 717 |
4326 | { "PMSWINC_EL0" , "PMSWINC_EL0" , 0xDCE4, false, true, {} }, // 718 |
4327 | { "PMUACR_EL1" , "PMUACR_EL1" , 0xC4F4, true, true, {} }, // 719 |
4328 | { "PMUSERENR_EL0" , "PMUSERENR_EL0" , 0xDCF0, true, true, {} }, // 720 |
4329 | { "PMXEVCNTR_EL0" , "PMXEVCNTR_EL0" , 0xDCEA, true, true, {} }, // 721 |
4330 | { "PMXEVTYPER_EL0" , "PMXEVTYPER_EL0" , 0xDCE9, true, true, {} }, // 722 |
4331 | { "PMZR_EL0" , "PMZR_EL0" , 0xDCEC, false, true, {} }, // 723 |
4332 | { "POR_EL0" , "POR_EL0" , 0xDD14, true, true, {} }, // 724 |
4333 | { "POR_EL1" , "POR_EL1" , 0xC514, true, true, {} }, // 725 |
4334 | { "POR_EL12" , "POR_EL12" , 0xED14, true, true, {} }, // 726 |
4335 | { "POR_EL2" , "POR_EL2" , 0xE514, true, true, {} }, // 727 |
4336 | { "POR_EL3" , "POR_EL3" , 0xF514, true, true, {} }, // 728 |
4337 | { "PRBAR10_EL1" , "PRBAR10_EL1" , 0xC368, true, true, {AArch64::HasV8_0rOps} }, // 729 |
4338 | { "PRBAR10_EL2" , "PRBAR10_EL2" , 0xE368, true, true, {AArch64::HasV8_0rOps} }, // 730 |
4339 | { "PRBAR11_EL1" , "PRBAR11_EL1" , 0xC36C, true, true, {AArch64::HasV8_0rOps} }, // 731 |
4340 | { "PRBAR11_EL2" , "PRBAR11_EL2" , 0xE36C, true, true, {AArch64::HasV8_0rOps} }, // 732 |
4341 | { "PRBAR12_EL1" , "PRBAR12_EL1" , 0xC370, true, true, {AArch64::HasV8_0rOps} }, // 733 |
4342 | { "PRBAR12_EL2" , "PRBAR12_EL2" , 0xE370, true, true, {AArch64::HasV8_0rOps} }, // 734 |
4343 | { "PRBAR13_EL1" , "PRBAR13_EL1" , 0xC374, true, true, {AArch64::HasV8_0rOps} }, // 735 |
4344 | { "PRBAR13_EL2" , "PRBAR13_EL2" , 0xE374, true, true, {AArch64::HasV8_0rOps} }, // 736 |
4345 | { "PRBAR14_EL1" , "PRBAR14_EL1" , 0xC378, true, true, {AArch64::HasV8_0rOps} }, // 737 |
4346 | { "PRBAR14_EL2" , "PRBAR14_EL2" , 0xE378, true, true, {AArch64::HasV8_0rOps} }, // 738 |
4347 | { "PRBAR15_EL1" , "PRBAR15_EL1" , 0xC37C, true, true, {AArch64::HasV8_0rOps} }, // 739 |
4348 | { "PRBAR15_EL2" , "PRBAR15_EL2" , 0xE37C, true, true, {AArch64::HasV8_0rOps} }, // 740 |
4349 | { "PRBAR1_EL1" , "PRBAR1_EL1" , 0xC344, true, true, {AArch64::HasV8_0rOps} }, // 741 |
4350 | { "PRBAR1_EL2" , "PRBAR1_EL2" , 0xE344, true, true, {AArch64::HasV8_0rOps} }, // 742 |
4351 | { "PRBAR2_EL1" , "PRBAR2_EL1" , 0xC348, true, true, {AArch64::HasV8_0rOps} }, // 743 |
4352 | { "PRBAR2_EL2" , "PRBAR2_EL2" , 0xE348, true, true, {AArch64::HasV8_0rOps} }, // 744 |
4353 | { "PRBAR3_EL1" , "PRBAR3_EL1" , 0xC34C, true, true, {AArch64::HasV8_0rOps} }, // 745 |
4354 | { "PRBAR3_EL2" , "PRBAR3_EL2" , 0xE34C, true, true, {AArch64::HasV8_0rOps} }, // 746 |
4355 | { "PRBAR4_EL1" , "PRBAR4_EL1" , 0xC350, true, true, {AArch64::HasV8_0rOps} }, // 747 |
4356 | { "PRBAR4_EL2" , "PRBAR4_EL2" , 0xE350, true, true, {AArch64::HasV8_0rOps} }, // 748 |
4357 | { "PRBAR5_EL1" , "PRBAR5_EL1" , 0xC354, true, true, {AArch64::HasV8_0rOps} }, // 749 |
4358 | { "PRBAR5_EL2" , "PRBAR5_EL2" , 0xE354, true, true, {AArch64::HasV8_0rOps} }, // 750 |
4359 | { "PRBAR6_EL1" , "PRBAR6_EL1" , 0xC358, true, true, {AArch64::HasV8_0rOps} }, // 751 |
4360 | { "PRBAR6_EL2" , "PRBAR6_EL2" , 0xE358, true, true, {AArch64::HasV8_0rOps} }, // 752 |
4361 | { "PRBAR7_EL1" , "PRBAR7_EL1" , 0xC35C, true, true, {AArch64::HasV8_0rOps} }, // 753 |
4362 | { "PRBAR7_EL2" , "PRBAR7_EL2" , 0xE35C, true, true, {AArch64::HasV8_0rOps} }, // 754 |
4363 | { "PRBAR8_EL1" , "PRBAR8_EL1" , 0xC360, true, true, {AArch64::HasV8_0rOps} }, // 755 |
4364 | { "PRBAR8_EL2" , "PRBAR8_EL2" , 0xE360, true, true, {AArch64::HasV8_0rOps} }, // 756 |
4365 | { "PRBAR9_EL1" , "PRBAR9_EL1" , 0xC364, true, true, {AArch64::HasV8_0rOps} }, // 757 |
4366 | { "PRBAR9_EL2" , "PRBAR9_EL2" , 0xE364, true, true, {AArch64::HasV8_0rOps} }, // 758 |
4367 | { "PRBAR_EL1" , "PRBAR_EL1" , 0xC340, true, true, {AArch64::HasV8_0rOps} }, // 759 |
4368 | { "PRBAR_EL2" , "PRBAR_EL2" , 0xE340, true, true, {AArch64::HasV8_0rOps} }, // 760 |
4369 | { "PRENR_EL1" , "PRENR_EL1" , 0xC309, true, true, {AArch64::HasV8_0rOps} }, // 761 |
4370 | { "PRENR_EL2" , "PRENR_EL2" , 0xE309, true, true, {AArch64::HasV8_0rOps} }, // 762 |
4371 | { "PRLAR10_EL1" , "PRLAR10_EL1" , 0xC369, true, true, {AArch64::HasV8_0rOps} }, // 763 |
4372 | { "PRLAR10_EL2" , "PRLAR10_EL2" , 0xE369, true, true, {AArch64::HasV8_0rOps} }, // 764 |
4373 | { "PRLAR11_EL1" , "PRLAR11_EL1" , 0xC36D, true, true, {AArch64::HasV8_0rOps} }, // 765 |
4374 | { "PRLAR11_EL2" , "PRLAR11_EL2" , 0xE36D, true, true, {AArch64::HasV8_0rOps} }, // 766 |
4375 | { "PRLAR12_EL1" , "PRLAR12_EL1" , 0xC371, true, true, {AArch64::HasV8_0rOps} }, // 767 |
4376 | { "PRLAR12_EL2" , "PRLAR12_EL2" , 0xE371, true, true, {AArch64::HasV8_0rOps} }, // 768 |
4377 | { "PRLAR13_EL1" , "PRLAR13_EL1" , 0xC375, true, true, {AArch64::HasV8_0rOps} }, // 769 |
4378 | { "PRLAR13_EL2" , "PRLAR13_EL2" , 0xE375, true, true, {AArch64::HasV8_0rOps} }, // 770 |
4379 | { "PRLAR14_EL1" , "PRLAR14_EL1" , 0xC379, true, true, {AArch64::HasV8_0rOps} }, // 771 |
4380 | { "PRLAR14_EL2" , "PRLAR14_EL2" , 0xE379, true, true, {AArch64::HasV8_0rOps} }, // 772 |
4381 | { "PRLAR15_EL1" , "PRLAR15_EL1" , 0xC37D, true, true, {AArch64::HasV8_0rOps} }, // 773 |
4382 | { "PRLAR15_EL2" , "PRLAR15_EL2" , 0xE37D, true, true, {AArch64::HasV8_0rOps} }, // 774 |
4383 | { "PRLAR1_EL1" , "PRLAR1_EL1" , 0xC345, true, true, {AArch64::HasV8_0rOps} }, // 775 |
4384 | { "PRLAR1_EL2" , "PRLAR1_EL2" , 0xE345, true, true, {AArch64::HasV8_0rOps} }, // 776 |
4385 | { "PRLAR2_EL1" , "PRLAR2_EL1" , 0xC349, true, true, {AArch64::HasV8_0rOps} }, // 777 |
4386 | { "PRLAR2_EL2" , "PRLAR2_EL2" , 0xE349, true, true, {AArch64::HasV8_0rOps} }, // 778 |
4387 | { "PRLAR3_EL1" , "PRLAR3_EL1" , 0xC34D, true, true, {AArch64::HasV8_0rOps} }, // 779 |
4388 | { "PRLAR3_EL2" , "PRLAR3_EL2" , 0xE34D, true, true, {AArch64::HasV8_0rOps} }, // 780 |
4389 | { "PRLAR4_EL1" , "PRLAR4_EL1" , 0xC351, true, true, {AArch64::HasV8_0rOps} }, // 781 |
4390 | { "PRLAR4_EL2" , "PRLAR4_EL2" , 0xE351, true, true, {AArch64::HasV8_0rOps} }, // 782 |
4391 | { "PRLAR5_EL1" , "PRLAR5_EL1" , 0xC355, true, true, {AArch64::HasV8_0rOps} }, // 783 |
4392 | { "PRLAR5_EL2" , "PRLAR5_EL2" , 0xE355, true, true, {AArch64::HasV8_0rOps} }, // 784 |
4393 | { "PRLAR6_EL1" , "PRLAR6_EL1" , 0xC359, true, true, {AArch64::HasV8_0rOps} }, // 785 |
4394 | { "PRLAR6_EL2" , "PRLAR6_EL2" , 0xE359, true, true, {AArch64::HasV8_0rOps} }, // 786 |
4395 | { "PRLAR7_EL1" , "PRLAR7_EL1" , 0xC35D, true, true, {AArch64::HasV8_0rOps} }, // 787 |
4396 | { "PRLAR7_EL2" , "PRLAR7_EL2" , 0xE35D, true, true, {AArch64::HasV8_0rOps} }, // 788 |
4397 | { "PRLAR8_EL1" , "PRLAR8_EL1" , 0xC361, true, true, {AArch64::HasV8_0rOps} }, // 789 |
4398 | { "PRLAR8_EL2" , "PRLAR8_EL2" , 0xE361, true, true, {AArch64::HasV8_0rOps} }, // 790 |
4399 | { "PRLAR9_EL1" , "PRLAR9_EL1" , 0xC365, true, true, {AArch64::HasV8_0rOps} }, // 791 |
4400 | { "PRLAR9_EL2" , "PRLAR9_EL2" , 0xE365, true, true, {AArch64::HasV8_0rOps} }, // 792 |
4401 | { "PRLAR_EL1" , "PRLAR_EL1" , 0xC341, true, true, {AArch64::HasV8_0rOps} }, // 793 |
4402 | { "PRLAR_EL2" , "PRLAR_EL2" , 0xE341, true, true, {AArch64::HasV8_0rOps} }, // 794 |
4403 | { "PRSELR_EL1" , "PRSELR_EL1" , 0xC311, true, true, {AArch64::HasV8_0rOps} }, // 795 |
4404 | { "PRSELR_EL2" , "PRSELR_EL2" , 0xE311, true, true, {AArch64::HasV8_0rOps} }, // 796 |
4405 | { "RCWMASK_EL1" , "RCWMASK_EL1" , 0xC686, true, true, {AArch64::FeatureTHE} }, // 797 |
4406 | { "RCWSMASK_EL1" , "RCWSMASK_EL1" , 0xC683, true, true, {AArch64::FeatureTHE} }, // 798 |
4407 | { "REVIDR_EL1" , "REVIDR_EL1" , 0xC006, true, false, {} }, // 799 |
4408 | { "RGSR_EL1" , "RGSR_EL1" , 0xC085, true, true, {AArch64::FeatureMTE} }, // 800 |
4409 | { "RMR_EL1" , "RMR_EL1" , 0xC602, true, true, {} }, // 801 |
4410 | { "RMR_EL2" , "RMR_EL2" , 0xE602, true, true, {} }, // 802 |
4411 | { "RMR_EL3" , "RMR_EL3" , 0xF602, true, true, {} }, // 803 |
4412 | { "RNDR" , "RNDR" , 0xD920, true, false, {AArch64::FeatureRandGen} }, // 804 |
4413 | { "RNDRRS" , "RNDRRS" , 0xD921, true, false, {AArch64::FeatureRandGen} }, // 805 |
4414 | { "RVBAR_EL1" , "RVBAR_EL1" , 0xC601, true, false, {} }, // 806 |
4415 | { "RVBAR_EL2" , "RVBAR_EL2" , 0xE601, true, false, {} }, // 807 |
4416 | { "RVBAR_EL3" , "RVBAR_EL3" , 0xF601, true, false, {} }, // 808 |
4417 | { "S2PIR_EL2" , "S2PIR_EL2" , 0xE515, true, true, {} }, // 809 |
4418 | { "S2POR_EL1" , "S2POR_EL1" , 0xC515, true, true, {} }, // 810 |
4419 | { "SCR_EL3" , "SCR_EL3" , 0xF088, true, true, {} }, // 811 |
4420 | { "SCTLR2_EL1" , "SCTLR2_EL1" , 0xC083, true, true, {} }, // 812 |
4421 | { "SCTLR2_EL12" , "SCTLR2_EL12" , 0xE883, true, true, {} }, // 813 |
4422 | { "SCTLR2_EL2" , "SCTLR2_EL2" , 0xE083, true, true, {} }, // 814 |
4423 | { "SCTLR2_EL3" , "SCTLR2_EL3" , 0xF083, true, true, {} }, // 815 |
4424 | { "SCTLR_EL1" , "SCTLR_EL1" , 0xC080, true, true, {} }, // 816 |
4425 | { "SCTLR_EL12" , "SCTLR_EL12" , 0xE880, true, true, {AArch64::FeatureVH} }, // 817 |
4426 | { "SCTLR_EL2" , "SCTLR_EL2" , 0xE080, true, true, {} }, // 818 |
4427 | { "SCTLR_EL3" , "SCTLR_EL3" , 0xF080, true, true, {} }, // 819 |
4428 | { "SCXTNUM_EL0" , "SCXTNUM_EL0" , 0xDE87, true, true, {AArch64::FeatureSpecRestrict} }, // 820 |
4429 | { "SCXTNUM_EL1" , "SCXTNUM_EL1" , 0xC687, true, true, {AArch64::FeatureSpecRestrict} }, // 821 |
4430 | { "SCXTNUM_EL12" , "SCXTNUM_EL12" , 0xEE87, true, true, {AArch64::FeatureSpecRestrict} }, // 822 |
4431 | { "SCXTNUM_EL2" , "SCXTNUM_EL2" , 0xE687, true, true, {AArch64::FeatureSpecRestrict} }, // 823 |
4432 | { "SCXTNUM_EL3" , "SCXTNUM_EL3" , 0xF687, true, true, {AArch64::FeatureSpecRestrict} }, // 824 |
4433 | { "SDER32_EL2" , "SDER32_EL2" , 0xE099, true, true, {AArch64::FeatureSEL2} }, // 825 |
4434 | { "SDER32_EL3" , "SDER32_EL3" , 0xF089, true, true, {} }, // 826 |
4435 | { "SMCR_EL1" , "SMCR_EL1" , 0xC096, true, true, {AArch64::FeatureSME} }, // 827 |
4436 | { "SMCR_EL12" , "SMCR_EL12" , 0xE896, true, true, {AArch64::FeatureSME} }, // 828 |
4437 | { "SMCR_EL2" , "SMCR_EL2" , 0xE096, true, true, {AArch64::FeatureSME} }, // 829 |
4438 | { "SMCR_EL3" , "SMCR_EL3" , 0xF096, true, true, {AArch64::FeatureSME} }, // 830 |
4439 | { "SMIDR_EL1" , "SMIDR_EL1" , 0xC806, true, false, {AArch64::FeatureSME} }, // 831 |
4440 | { "SMPRIMAP_EL2" , "SMPRIMAP_EL2" , 0xE095, true, true, {AArch64::FeatureSME} }, // 832 |
4441 | { "SMPRI_EL1" , "SMPRI_EL1" , 0xC094, true, true, {AArch64::FeatureSME} }, // 833 |
4442 | { "SPMACCESSR_EL1" , "SPMACCESSR_EL1" , 0x84EB, true, true, {} }, // 834 |
4443 | { "SPMACCESSR_EL12" , "SPMACCESSR_EL12" , 0xACEB, true, true, {} }, // 835 |
4444 | { "SPMACCESSR_EL2" , "SPMACCESSR_EL2" , 0xA4EB, true, true, {} }, // 836 |
4445 | { "SPMACCESSR_EL3" , "SPMACCESSR_EL3" , 0xB4EB, true, true, {} }, // 837 |
4446 | { "SPMCFGR_EL1" , "SPMCFGR_EL1" , 0x84EF, true, false, {} }, // 838 |
4447 | { "SPMCGCR0_EL1" , "SPMCGCR0_EL1" , 0x84E8, true, false, {} }, // 839 |
4448 | { "SPMCGCR1_EL1" , "SPMCGCR1_EL1" , 0x84E9, true, false, {} }, // 840 |
4449 | { "SPMCNTENCLR_EL0" , "SPMCNTENCLR_EL0" , 0x9CE2, true, true, {} }, // 841 |
4450 | { "SPMCNTENSET_EL0" , "SPMCNTENSET_EL0" , 0x9CE1, true, true, {} }, // 842 |
4451 | { "SPMCR_EL0" , "SPMCR_EL0" , 0x9CE0, true, true, {} }, // 843 |
4452 | { "SPMDEVAFF_EL1" , "SPMDEVAFF_EL1" , 0x84EE, true, false, {} }, // 844 |
4453 | { "SPMDEVARCH_EL1" , "SPMDEVARCH_EL1" , 0x84ED, true, false, {} }, // 845 |
4454 | { "SPMEVCNTR0_EL0" , "SPMEVCNTR0_EL0" , 0x9F00, true, true, {} }, // 846 |
4455 | { "SPMEVCNTR10_EL0" , "SPMEVCNTR10_EL0" , 0x9F0A, true, true, {} }, // 847 |
4456 | { "SPMEVCNTR11_EL0" , "SPMEVCNTR11_EL0" , 0x9F0B, true, true, {} }, // 848 |
4457 | { "SPMEVCNTR12_EL0" , "SPMEVCNTR12_EL0" , 0x9F0C, true, true, {} }, // 849 |
4458 | { "SPMEVCNTR13_EL0" , "SPMEVCNTR13_EL0" , 0x9F0D, true, true, {} }, // 850 |
4459 | { "SPMEVCNTR14_EL0" , "SPMEVCNTR14_EL0" , 0x9F0E, true, true, {} }, // 851 |
4460 | { "SPMEVCNTR15_EL0" , "SPMEVCNTR15_EL0" , 0x9F0F, true, true, {} }, // 852 |
4461 | { "SPMEVCNTR1_EL0" , "SPMEVCNTR1_EL0" , 0x9F01, true, true, {} }, // 853 |
4462 | { "SPMEVCNTR2_EL0" , "SPMEVCNTR2_EL0" , 0x9F02, true, true, {} }, // 854 |
4463 | { "SPMEVCNTR3_EL0" , "SPMEVCNTR3_EL0" , 0x9F03, true, true, {} }, // 855 |
4464 | { "SPMEVCNTR4_EL0" , "SPMEVCNTR4_EL0" , 0x9F04, true, true, {} }, // 856 |
4465 | { "SPMEVCNTR5_EL0" , "SPMEVCNTR5_EL0" , 0x9F05, true, true, {} }, // 857 |
4466 | { "SPMEVCNTR6_EL0" , "SPMEVCNTR6_EL0" , 0x9F06, true, true, {} }, // 858 |
4467 | { "SPMEVCNTR7_EL0" , "SPMEVCNTR7_EL0" , 0x9F07, true, true, {} }, // 859 |
4468 | { "SPMEVCNTR8_EL0" , "SPMEVCNTR8_EL0" , 0x9F08, true, true, {} }, // 860 |
4469 | { "SPMEVCNTR9_EL0" , "SPMEVCNTR9_EL0" , 0x9F09, true, true, {} }, // 861 |
4470 | { "SPMEVFILT2R0_EL0" , "SPMEVFILT2R0_EL0" , 0x9F30, true, true, {} }, // 862 |
4471 | { "SPMEVFILT2R10_EL0" , "SPMEVFILT2R10_EL0" , 0x9F3A, true, true, {} }, // 863 |
4472 | { "SPMEVFILT2R11_EL0" , "SPMEVFILT2R11_EL0" , 0x9F3B, true, true, {} }, // 864 |
4473 | { "SPMEVFILT2R12_EL0" , "SPMEVFILT2R12_EL0" , 0x9F3C, true, true, {} }, // 865 |
4474 | { "SPMEVFILT2R13_EL0" , "SPMEVFILT2R13_EL0" , 0x9F3D, true, true, {} }, // 866 |
4475 | { "SPMEVFILT2R14_EL0" , "SPMEVFILT2R14_EL0" , 0x9F3E, true, true, {} }, // 867 |
4476 | { "SPMEVFILT2R15_EL0" , "SPMEVFILT2R15_EL0" , 0x9F3F, true, true, {} }, // 868 |
4477 | { "SPMEVFILT2R1_EL0" , "SPMEVFILT2R1_EL0" , 0x9F31, true, true, {} }, // 869 |
4478 | { "SPMEVFILT2R2_EL0" , "SPMEVFILT2R2_EL0" , 0x9F32, true, true, {} }, // 870 |
4479 | { "SPMEVFILT2R3_EL0" , "SPMEVFILT2R3_EL0" , 0x9F33, true, true, {} }, // 871 |
4480 | { "SPMEVFILT2R4_EL0" , "SPMEVFILT2R4_EL0" , 0x9F34, true, true, {} }, // 872 |
4481 | { "SPMEVFILT2R5_EL0" , "SPMEVFILT2R5_EL0" , 0x9F35, true, true, {} }, // 873 |
4482 | { "SPMEVFILT2R6_EL0" , "SPMEVFILT2R6_EL0" , 0x9F36, true, true, {} }, // 874 |
4483 | { "SPMEVFILT2R7_EL0" , "SPMEVFILT2R7_EL0" , 0x9F37, true, true, {} }, // 875 |
4484 | { "SPMEVFILT2R8_EL0" , "SPMEVFILT2R8_EL0" , 0x9F38, true, true, {} }, // 876 |
4485 | { "SPMEVFILT2R9_EL0" , "SPMEVFILT2R9_EL0" , 0x9F39, true, true, {} }, // 877 |
4486 | { "SPMEVFILTR0_EL0" , "SPMEVFILTR0_EL0" , 0x9F20, true, true, {} }, // 878 |
4487 | { "SPMEVFILTR10_EL0" , "SPMEVFILTR10_EL0" , 0x9F2A, true, true, {} }, // 879 |
4488 | { "SPMEVFILTR11_EL0" , "SPMEVFILTR11_EL0" , 0x9F2B, true, true, {} }, // 880 |
4489 | { "SPMEVFILTR12_EL0" , "SPMEVFILTR12_EL0" , 0x9F2C, true, true, {} }, // 881 |
4490 | { "SPMEVFILTR13_EL0" , "SPMEVFILTR13_EL0" , 0x9F2D, true, true, {} }, // 882 |
4491 | { "SPMEVFILTR14_EL0" , "SPMEVFILTR14_EL0" , 0x9F2E, true, true, {} }, // 883 |
4492 | { "SPMEVFILTR15_EL0" , "SPMEVFILTR15_EL0" , 0x9F2F, true, true, {} }, // 884 |
4493 | { "SPMEVFILTR1_EL0" , "SPMEVFILTR1_EL0" , 0x9F21, true, true, {} }, // 885 |
4494 | { "SPMEVFILTR2_EL0" , "SPMEVFILTR2_EL0" , 0x9F22, true, true, {} }, // 886 |
4495 | { "SPMEVFILTR3_EL0" , "SPMEVFILTR3_EL0" , 0x9F23, true, true, {} }, // 887 |
4496 | { "SPMEVFILTR4_EL0" , "SPMEVFILTR4_EL0" , 0x9F24, true, true, {} }, // 888 |
4497 | { "SPMEVFILTR5_EL0" , "SPMEVFILTR5_EL0" , 0x9F25, true, true, {} }, // 889 |
4498 | { "SPMEVFILTR6_EL0" , "SPMEVFILTR6_EL0" , 0x9F26, true, true, {} }, // 890 |
4499 | { "SPMEVFILTR7_EL0" , "SPMEVFILTR7_EL0" , 0x9F27, true, true, {} }, // 891 |
4500 | { "SPMEVFILTR8_EL0" , "SPMEVFILTR8_EL0" , 0x9F28, true, true, {} }, // 892 |
4501 | { "SPMEVFILTR9_EL0" , "SPMEVFILTR9_EL0" , 0x9F29, true, true, {} }, // 893 |
4502 | { "SPMEVTYPER0_EL0" , "SPMEVTYPER0_EL0" , 0x9F10, true, true, {} }, // 894 |
4503 | { "SPMEVTYPER10_EL0" , "SPMEVTYPER10_EL0" , 0x9F1A, true, true, {} }, // 895 |
4504 | { "SPMEVTYPER11_EL0" , "SPMEVTYPER11_EL0" , 0x9F1B, true, true, {} }, // 896 |
4505 | { "SPMEVTYPER12_EL0" , "SPMEVTYPER12_EL0" , 0x9F1C, true, true, {} }, // 897 |
4506 | { "SPMEVTYPER13_EL0" , "SPMEVTYPER13_EL0" , 0x9F1D, true, true, {} }, // 898 |
4507 | { "SPMEVTYPER14_EL0" , "SPMEVTYPER14_EL0" , 0x9F1E, true, true, {} }, // 899 |
4508 | { "SPMEVTYPER15_EL0" , "SPMEVTYPER15_EL0" , 0x9F1F, true, true, {} }, // 900 |
4509 | { "SPMEVTYPER1_EL0" , "SPMEVTYPER1_EL0" , 0x9F11, true, true, {} }, // 901 |
4510 | { "SPMEVTYPER2_EL0" , "SPMEVTYPER2_EL0" , 0x9F12, true, true, {} }, // 902 |
4511 | { "SPMEVTYPER3_EL0" , "SPMEVTYPER3_EL0" , 0x9F13, true, true, {} }, // 903 |
4512 | { "SPMEVTYPER4_EL0" , "SPMEVTYPER4_EL0" , 0x9F14, true, true, {} }, // 904 |
4513 | { "SPMEVTYPER5_EL0" , "SPMEVTYPER5_EL0" , 0x9F15, true, true, {} }, // 905 |
4514 | { "SPMEVTYPER6_EL0" , "SPMEVTYPER6_EL0" , 0x9F16, true, true, {} }, // 906 |
4515 | { "SPMEVTYPER7_EL0" , "SPMEVTYPER7_EL0" , 0x9F17, true, true, {} }, // 907 |
4516 | { "SPMEVTYPER8_EL0" , "SPMEVTYPER8_EL0" , 0x9F18, true, true, {} }, // 908 |
4517 | { "SPMEVTYPER9_EL0" , "SPMEVTYPER9_EL0" , 0x9F19, true, true, {} }, // 909 |
4518 | { "SPMIIDR_EL1" , "SPMIIDR_EL1" , 0x84EC, true, false, {} }, // 910 |
4519 | { "SPMINTENCLR_EL1" , "SPMINTENCLR_EL1" , 0x84F2, true, true, {} }, // 911 |
4520 | { "SPMINTENSET_EL1" , "SPMINTENSET_EL1" , 0x84F1, true, true, {} }, // 912 |
4521 | { "SPMOVSCLR_EL0" , "SPMOVSCLR_EL0" , 0x9CE3, true, true, {} }, // 913 |
4522 | { "SPMOVSSET_EL0" , "SPMOVSSET_EL0" , 0x9CF3, true, true, {} }, // 914 |
4523 | { "SPMROOTCR_EL3" , "SPMROOTCR_EL3" , 0xB4F7, true, true, {} }, // 915 |
4524 | { "SPMSCR_EL1" , "SPMSCR_EL1" , 0xBCF7, true, true, {} }, // 916 |
4525 | { "SPMSELR_EL0" , "SPMSELR_EL0" , 0x9CE5, true, true, {} }, // 917 |
4526 | { "SPMZR_EL0" , "SPMZR_EL0" , 0x9CE4, false, true, {} }, // 918 |
4527 | { "SPSel" , "SPSel" , 0xC210, true, true, {} }, // 919 |
4528 | { "SPSR_abt" , "SPSR_abt" , 0xE219, true, true, {} }, // 920 |
4529 | { "SPSR_EL1" , "SPSR_EL1" , 0xC200, true, true, {} }, // 921 |
4530 | { "SPSR_EL12" , "SPSR_EL12" , 0xEA00, true, true, {AArch64::FeatureVH} }, // 922 |
4531 | { "SPSR_EL2" , "SPSR_EL2" , 0xE200, true, true, {} }, // 923 |
4532 | { "SPSR_EL3" , "SPSR_EL3" , 0xF200, true, true, {} }, // 924 |
4533 | { "SPSR_fiq" , "SPSR_fiq" , 0xE21B, true, true, {} }, // 925 |
4534 | { "SPSR_irq" , "SPSR_irq" , 0xE218, true, true, {} }, // 926 |
4535 | { "SPSR_und" , "SPSR_und" , 0xE21A, true, true, {} }, // 927 |
4536 | { "SP_EL0" , "SP_EL0" , 0xC208, true, true, {} }, // 928 |
4537 | { "SP_EL1" , "SP_EL1" , 0xE208, true, true, {} }, // 929 |
4538 | { "SP_EL2" , "SP_EL2" , 0xF208, true, true, {} }, // 930 |
4539 | { "SSBS" , "SSBS" , 0xDA16, true, true, {AArch64::FeatureSSBS} }, // 931 |
4540 | { "SVCR" , "SVCR" , 0xDA12, true, true, {AArch64::FeatureSME} }, // 932 |
4541 | { "TCO" , "TCO" , 0xDA17, true, true, {AArch64::FeatureMTE} }, // 933 |
4542 | { "TCR2_EL1" , "TCR2_EL1" , 0xC103, true, true, {} }, // 934 |
4543 | { "TCR2_EL12" , "TCR2_EL12" , 0xE903, true, true, {} }, // 935 |
4544 | { "TCR2_EL2" , "TCR2_EL2" , 0xE103, true, true, {} }, // 936 |
4545 | { "TCR_EL1" , "TCR_EL1" , 0xC102, true, true, {} }, // 937 |
4546 | { "TCR_EL12" , "TCR_EL12" , 0xE902, true, true, {AArch64::FeatureVH} }, // 938 |
4547 | { "TCR_EL2" , "TCR_EL2" , 0xE102, true, true, {} }, // 939 |
4548 | { "TCR_EL3" , "TCR_EL3" , 0xF102, true, true, {} }, // 940 |
4549 | { "TEECR32_EL1" , "TEECR32_EL1" , 0x9000, true, true, {} }, // 941 |
4550 | { "TEEHBR32_EL1" , "TEEHBR32_EL1" , 0x9080, true, true, {} }, // 942 |
4551 | { "TFSRE0_EL1" , "TFSRE0_EL1" , 0xC2B1, true, true, {AArch64::FeatureMTE} }, // 943 |
4552 | { "TFSR_EL1" , "TFSR_EL1" , 0xC2B0, true, true, {AArch64::FeatureMTE} }, // 944 |
4553 | { "TFSR_EL12" , "TFSR_EL12" , 0xEAB0, true, true, {AArch64::FeatureMTE} }, // 945 |
4554 | { "TFSR_EL2" , "TFSR_EL2" , 0xE2B0, true, true, {AArch64::FeatureMTE} }, // 946 |
4555 | { "TFSR_EL3" , "TFSR_EL3" , 0xF2B0, true, true, {AArch64::FeatureMTE} }, // 947 |
4556 | { "TPIDR2_EL0" , "TPIDR2_EL0" , 0xDE85, true, true, {AArch64::FeatureSME} }, // 948 |
4557 | { "TPIDRRO_EL0" , "TPIDRRO_EL0" , 0xDE83, true, true, {} }, // 949 |
4558 | { "TPIDR_EL0" , "TPIDR_EL0" , 0xDE82, true, true, {} }, // 950 |
4559 | { "TPIDR_EL1" , "TPIDR_EL1" , 0xC684, true, true, {} }, // 951 |
4560 | { "TPIDR_EL2" , "TPIDR_EL2" , 0xE682, true, true, {} }, // 952 |
4561 | { "TPIDR_EL3" , "TPIDR_EL3" , 0xF682, true, true, {} }, // 953 |
4562 | { "TRBBASER_EL1" , "TRBBASER_EL1" , 0xC4DA, true, true, {AArch64::FeatureTRBE} }, // 954 |
4563 | { "TRBIDR_EL1" , "TRBIDR_EL1" , 0xC4DF, true, false, {AArch64::FeatureTRBE} }, // 955 |
4564 | { "TRBLIMITR_EL1" , "TRBLIMITR_EL1" , 0xC4D8, true, true, {AArch64::FeatureTRBE} }, // 956 |
4565 | { "TRBMAR_EL1" , "TRBMAR_EL1" , 0xC4DC, true, true, {AArch64::FeatureTRBE} }, // 957 |
4566 | { "TRBPTR_EL1" , "TRBPTR_EL1" , 0xC4D9, true, true, {AArch64::FeatureTRBE} }, // 958 |
4567 | { "TRBSR_EL1" , "TRBSR_EL1" , 0xC4DB, true, true, {AArch64::FeatureTRBE} }, // 959 |
4568 | { "TRBTRG_EL1" , "TRBTRG_EL1" , 0xC4DE, true, true, {AArch64::FeatureTRBE} }, // 960 |
4569 | { "TRCACATR0" , "TRCACATR0" , 0x8902, true, true, {} }, // 961 |
4570 | { "TRCACATR1" , "TRCACATR1" , 0x8912, true, true, {} }, // 962 |
4571 | { "TRCACATR10" , "TRCACATR10" , 0x8923, true, true, {} }, // 963 |
4572 | { "TRCACATR11" , "TRCACATR11" , 0x8933, true, true, {} }, // 964 |
4573 | { "TRCACATR12" , "TRCACATR12" , 0x8943, true, true, {} }, // 965 |
4574 | { "TRCACATR13" , "TRCACATR13" , 0x8953, true, true, {} }, // 966 |
4575 | { "TRCACATR14" , "TRCACATR14" , 0x8963, true, true, {} }, // 967 |
4576 | { "TRCACATR15" , "TRCACATR15" , 0x8973, true, true, {} }, // 968 |
4577 | { "TRCACATR2" , "TRCACATR2" , 0x8922, true, true, {} }, // 969 |
4578 | { "TRCACATR3" , "TRCACATR3" , 0x8932, true, true, {} }, // 970 |
4579 | { "TRCACATR4" , "TRCACATR4" , 0x8942, true, true, {} }, // 971 |
4580 | { "TRCACATR5" , "TRCACATR5" , 0x8952, true, true, {} }, // 972 |
4581 | { "TRCACATR6" , "TRCACATR6" , 0x8962, true, true, {} }, // 973 |
4582 | { "TRCACATR7" , "TRCACATR7" , 0x8972, true, true, {} }, // 974 |
4583 | { "TRCACATR8" , "TRCACATR8" , 0x8903, true, true, {} }, // 975 |
4584 | { "TRCACATR9" , "TRCACATR9" , 0x8913, true, true, {} }, // 976 |
4585 | { "TRCACVR0" , "TRCACVR0" , 0x8900, true, true, {} }, // 977 |
4586 | { "TRCACVR1" , "TRCACVR1" , 0x8910, true, true, {} }, // 978 |
4587 | { "TRCACVR10" , "TRCACVR10" , 0x8921, true, true, {} }, // 979 |
4588 | { "TRCACVR11" , "TRCACVR11" , 0x8931, true, true, {} }, // 980 |
4589 | { "TRCACVR12" , "TRCACVR12" , 0x8941, true, true, {} }, // 981 |
4590 | { "TRCACVR13" , "TRCACVR13" , 0x8951, true, true, {} }, // 982 |
4591 | { "TRCACVR14" , "TRCACVR14" , 0x8961, true, true, {} }, // 983 |
4592 | { "TRCACVR15" , "TRCACVR15" , 0x8971, true, true, {} }, // 984 |
4593 | { "TRCACVR2" , "TRCACVR2" , 0x8920, true, true, {} }, // 985 |
4594 | { "TRCACVR3" , "TRCACVR3" , 0x8930, true, true, {} }, // 986 |
4595 | { "TRCACVR4" , "TRCACVR4" , 0x8940, true, true, {} }, // 987 |
4596 | { "TRCACVR5" , "TRCACVR5" , 0x8950, true, true, {} }, // 988 |
4597 | { "TRCACVR6" , "TRCACVR6" , 0x8960, true, true, {} }, // 989 |
4598 | { "TRCACVR7" , "TRCACVR7" , 0x8970, true, true, {} }, // 990 |
4599 | { "TRCACVR8" , "TRCACVR8" , 0x8901, true, true, {} }, // 991 |
4600 | { "TRCACVR9" , "TRCACVR9" , 0x8911, true, true, {} }, // 992 |
4601 | { "TRCAUTHSTATUS" , "TRCAUTHSTATUS" , 0x8BF6, true, false, {} }, // 993 |
4602 | { "TRCAUXCTLR" , "TRCAUXCTLR" , 0x8830, true, true, {} }, // 994 |
4603 | { "TRCBBCTLR" , "TRCBBCTLR" , 0x8878, true, true, {} }, // 995 |
4604 | { "TRCCCCTLR" , "TRCCCCTLR" , 0x8870, true, true, {} }, // 996 |
4605 | { "TRCCIDCCTLR0" , "TRCCIDCCTLR0" , 0x8982, true, true, {} }, // 997 |
4606 | { "TRCCIDCCTLR1" , "TRCCIDCCTLR1" , 0x898A, true, true, {} }, // 998 |
4607 | { "TRCCIDCVR0" , "TRCCIDCVR0" , 0x8980, true, true, {} }, // 999 |
4608 | { "TRCCIDCVR1" , "TRCCIDCVR1" , 0x8990, true, true, {} }, // 1000 |
4609 | { "TRCCIDCVR2" , "TRCCIDCVR2" , 0x89A0, true, true, {} }, // 1001 |
4610 | { "TRCCIDCVR3" , "TRCCIDCVR3" , 0x89B0, true, true, {} }, // 1002 |
4611 | { "TRCCIDCVR4" , "TRCCIDCVR4" , 0x89C0, true, true, {} }, // 1003 |
4612 | { "TRCCIDCVR5" , "TRCCIDCVR5" , 0x89D0, true, true, {} }, // 1004 |
4613 | { "TRCCIDCVR6" , "TRCCIDCVR6" , 0x89E0, true, true, {} }, // 1005 |
4614 | { "TRCCIDCVR7" , "TRCCIDCVR7" , 0x89F0, true, true, {} }, // 1006 |
4615 | { "TRCCIDR0" , "TRCCIDR0" , 0x8BE7, true, false, {} }, // 1007 |
4616 | { "TRCCIDR1" , "TRCCIDR1" , 0x8BEF, true, false, {} }, // 1008 |
4617 | { "TRCCIDR2" , "TRCCIDR2" , 0x8BF7, true, false, {} }, // 1009 |
4618 | { "TRCCIDR3" , "TRCCIDR3" , 0x8BFF, true, false, {} }, // 1010 |
4619 | { "TRCCLAIMCLR" , "TRCCLAIMCLR" , 0x8BCE, true, true, {} }, // 1011 |
4620 | { "TRCCLAIMSET" , "TRCCLAIMSET" , 0x8BC6, true, true, {} }, // 1012 |
4621 | { "TRCCNTCTLR0" , "TRCCNTCTLR0" , 0x8825, true, true, {} }, // 1013 |
4622 | { "TRCCNTCTLR1" , "TRCCNTCTLR1" , 0x882D, true, true, {} }, // 1014 |
4623 | { "TRCCNTCTLR2" , "TRCCNTCTLR2" , 0x8835, true, true, {} }, // 1015 |
4624 | { "TRCCNTCTLR3" , "TRCCNTCTLR3" , 0x883D, true, true, {} }, // 1016 |
4625 | { "TRCCNTRLDVR0" , "TRCCNTRLDVR0" , 0x8805, true, true, {} }, // 1017 |
4626 | { "TRCCNTRLDVR1" , "TRCCNTRLDVR1" , 0x880D, true, true, {} }, // 1018 |
4627 | { "TRCCNTRLDVR2" , "TRCCNTRLDVR2" , 0x8815, true, true, {} }, // 1019 |
4628 | { "TRCCNTRLDVR3" , "TRCCNTRLDVR3" , 0x881D, true, true, {} }, // 1020 |
4629 | { "TRCCNTVR0" , "TRCCNTVR0" , 0x8845, true, true, {} }, // 1021 |
4630 | { "TRCCNTVR1" , "TRCCNTVR1" , 0x884D, true, true, {} }, // 1022 |
4631 | { "TRCCNTVR2" , "TRCCNTVR2" , 0x8855, true, true, {} }, // 1023 |
4632 | { "TRCCNTVR3" , "TRCCNTVR3" , 0x885D, true, true, {} }, // 1024 |
4633 | { "TRCCONFIGR" , "TRCCONFIGR" , 0x8820, true, true, {} }, // 1025 |
4634 | { "TRCDEVAFF0" , "TRCDEVAFF0" , 0x8BD6, true, false, {} }, // 1026 |
4635 | { "TRCDEVAFF1" , "TRCDEVAFF1" , 0x8BDE, true, false, {} }, // 1027 |
4636 | { "TRCDEVARCH" , "TRCDEVARCH" , 0x8BFE, true, false, {} }, // 1028 |
4637 | { "TRCDEVID" , "TRCDEVID" , 0x8B97, true, false, {} }, // 1029 |
4638 | { "TRCDEVTYPE" , "TRCDEVTYPE" , 0x8B9F, true, false, {} }, // 1030 |
4639 | { "TRCDVCMR0" , "TRCDVCMR0" , 0x8906, true, true, {} }, // 1031 |
4640 | { "TRCDVCMR1" , "TRCDVCMR1" , 0x8926, true, true, {} }, // 1032 |
4641 | { "TRCDVCMR2" , "TRCDVCMR2" , 0x8946, true, true, {} }, // 1033 |
4642 | { "TRCDVCMR3" , "TRCDVCMR3" , 0x8966, true, true, {} }, // 1034 |
4643 | { "TRCDVCMR4" , "TRCDVCMR4" , 0x8907, true, true, {} }, // 1035 |
4644 | { "TRCDVCMR5" , "TRCDVCMR5" , 0x8927, true, true, {} }, // 1036 |
4645 | { "TRCDVCMR6" , "TRCDVCMR6" , 0x8947, true, true, {} }, // 1037 |
4646 | { "TRCDVCMR7" , "TRCDVCMR7" , 0x8967, true, true, {} }, // 1038 |
4647 | { "TRCDVCVR0" , "TRCDVCVR0" , 0x8904, true, true, {} }, // 1039 |
4648 | { "TRCDVCVR1" , "TRCDVCVR1" , 0x8924, true, true, {} }, // 1040 |
4649 | { "TRCDVCVR2" , "TRCDVCVR2" , 0x8944, true, true, {} }, // 1041 |
4650 | { "TRCDVCVR3" , "TRCDVCVR3" , 0x8964, true, true, {} }, // 1042 |
4651 | { "TRCDVCVR4" , "TRCDVCVR4" , 0x8905, true, true, {} }, // 1043 |
4652 | { "TRCDVCVR5" , "TRCDVCVR5" , 0x8925, true, true, {} }, // 1044 |
4653 | { "TRCDVCVR6" , "TRCDVCVR6" , 0x8945, true, true, {} }, // 1045 |
4654 | { "TRCDVCVR7" , "TRCDVCVR7" , 0x8965, true, true, {} }, // 1046 |
4655 | { "TRCEVENTCTL0R" , "TRCEVENTCTL0R" , 0x8840, true, true, {} }, // 1047 |
4656 | { "TRCEVENTCTL1R" , "TRCEVENTCTL1R" , 0x8848, true, true, {} }, // 1048 |
4657 | { "TRCEXTINSELR" , "TRCEXTINSELR" , 0x8844, true, true, {} }, // 1049 |
4658 | { "TRCEXTINSELR0" , "TRCEXTINSELR0" , 0x8844, true, true, {AArch64::FeatureETE} }, // 1050 |
4659 | { "TRCEXTINSELR1" , "TRCEXTINSELR1" , 0x884C, true, true, {AArch64::FeatureETE} }, // 1051 |
4660 | { "TRCEXTINSELR2" , "TRCEXTINSELR2" , 0x8854, true, true, {AArch64::FeatureETE} }, // 1052 |
4661 | { "TRCEXTINSELR3" , "TRCEXTINSELR3" , 0x885C, true, true, {AArch64::FeatureETE} }, // 1053 |
4662 | { "TRCIDR0" , "TRCIDR0" , 0x8847, true, false, {} }, // 1054 |
4663 | { "TRCIDR1" , "TRCIDR1" , 0x884F, true, false, {} }, // 1055 |
4664 | { "TRCIDR10" , "TRCIDR10" , 0x8816, true, false, {} }, // 1056 |
4665 | { "TRCIDR11" , "TRCIDR11" , 0x881E, true, false, {} }, // 1057 |
4666 | { "TRCIDR12" , "TRCIDR12" , 0x8826, true, false, {} }, // 1058 |
4667 | { "TRCIDR13" , "TRCIDR13" , 0x882E, true, false, {} }, // 1059 |
4668 | { "TRCIDR2" , "TRCIDR2" , 0x8857, true, false, {} }, // 1060 |
4669 | { "TRCIDR3" , "TRCIDR3" , 0x885F, true, false, {} }, // 1061 |
4670 | { "TRCIDR4" , "TRCIDR4" , 0x8867, true, false, {} }, // 1062 |
4671 | { "TRCIDR5" , "TRCIDR5" , 0x886F, true, false, {} }, // 1063 |
4672 | { "TRCIDR6" , "TRCIDR6" , 0x8877, true, false, {} }, // 1064 |
4673 | { "TRCIDR7" , "TRCIDR7" , 0x887F, true, false, {} }, // 1065 |
4674 | { "TRCIDR8" , "TRCIDR8" , 0x8806, true, false, {} }, // 1066 |
4675 | { "TRCIDR9" , "TRCIDR9" , 0x880E, true, false, {} }, // 1067 |
4676 | { "TRCIMSPEC0" , "TRCIMSPEC0" , 0x8807, true, true, {} }, // 1068 |
4677 | { "TRCIMSPEC1" , "TRCIMSPEC1" , 0x880F, true, true, {} }, // 1069 |
4678 | { "TRCIMSPEC2" , "TRCIMSPEC2" , 0x8817, true, true, {} }, // 1070 |
4679 | { "TRCIMSPEC3" , "TRCIMSPEC3" , 0x881F, true, true, {} }, // 1071 |
4680 | { "TRCIMSPEC4" , "TRCIMSPEC4" , 0x8827, true, true, {} }, // 1072 |
4681 | { "TRCIMSPEC5" , "TRCIMSPEC5" , 0x882F, true, true, {} }, // 1073 |
4682 | { "TRCIMSPEC6" , "TRCIMSPEC6" , 0x8837, true, true, {} }, // 1074 |
4683 | { "TRCIMSPEC7" , "TRCIMSPEC7" , 0x883F, true, true, {} }, // 1075 |
4684 | { "TRCITCTRL" , "TRCITCTRL" , 0x8B84, true, true, {} }, // 1076 |
4685 | { "TRCITECR_EL1" , "TRCITECR_EL1" , 0xC093, true, true, {AArch64::FeatureITE} }, // 1077 |
4686 | { "TRCITECR_EL12" , "TRCITECR_EL12" , 0xE893, true, true, {AArch64::FeatureITE} }, // 1078 |
4687 | { "TRCITECR_EL2" , "TRCITECR_EL2" , 0xE093, true, true, {AArch64::FeatureITE} }, // 1079 |
4688 | { "TRCITEEDCR" , "TRCITEEDCR" , 0x8811, true, true, {AArch64::FeatureITE} }, // 1080 |
4689 | { "TRCLAR" , "TRCLAR" , 0x8BE6, false, true, {} }, // 1081 |
4690 | { "TRCLSR" , "TRCLSR" , 0x8BEE, true, false, {} }, // 1082 |
4691 | { "TRCOSLAR" , "TRCOSLAR" , 0x8884, false, true, {} }, // 1083 |
4692 | { "TRCOSLSR" , "TRCOSLSR" , 0x888C, true, false, {} }, // 1084 |
4693 | { "TRCPDCR" , "TRCPDCR" , 0x88A4, true, true, {} }, // 1085 |
4694 | { "TRCPDSR" , "TRCPDSR" , 0x88AC, true, false, {} }, // 1086 |
4695 | { "TRCPIDR0" , "TRCPIDR0" , 0x8BC7, true, false, {} }, // 1087 |
4696 | { "TRCPIDR1" , "TRCPIDR1" , 0x8BCF, true, false, {} }, // 1088 |
4697 | { "TRCPIDR2" , "TRCPIDR2" , 0x8BD7, true, false, {} }, // 1089 |
4698 | { "TRCPIDR3" , "TRCPIDR3" , 0x8BDF, true, false, {} }, // 1090 |
4699 | { "TRCPIDR4" , "TRCPIDR4" , 0x8BA7, true, false, {} }, // 1091 |
4700 | { "TRCPIDR5" , "TRCPIDR5" , 0x8BAF, true, false, {} }, // 1092 |
4701 | { "TRCPIDR6" , "TRCPIDR6" , 0x8BB7, true, false, {} }, // 1093 |
4702 | { "TRCPIDR7" , "TRCPIDR7" , 0x8BBF, true, false, {} }, // 1094 |
4703 | { "TRCPRGCTLR" , "TRCPRGCTLR" , 0x8808, true, true, {} }, // 1095 |
4704 | { "TRCPROCSELR" , "TRCPROCSELR" , 0x8810, true, true, {} }, // 1096 |
4705 | { "TRCQCTLR" , "TRCQCTLR" , 0x8809, true, true, {} }, // 1097 |
4706 | { "TRCRSCTLR10" , "TRCRSCTLR10" , 0x88D0, true, true, {} }, // 1098 |
4707 | { "TRCRSCTLR11" , "TRCRSCTLR11" , 0x88D8, true, true, {} }, // 1099 |
4708 | { "TRCRSCTLR12" , "TRCRSCTLR12" , 0x88E0, true, true, {} }, // 1100 |
4709 | { "TRCRSCTLR13" , "TRCRSCTLR13" , 0x88E8, true, true, {} }, // 1101 |
4710 | { "TRCRSCTLR14" , "TRCRSCTLR14" , 0x88F0, true, true, {} }, // 1102 |
4711 | { "TRCRSCTLR15" , "TRCRSCTLR15" , 0x88F8, true, true, {} }, // 1103 |
4712 | { "TRCRSCTLR16" , "TRCRSCTLR16" , 0x8881, true, true, {} }, // 1104 |
4713 | { "TRCRSCTLR17" , "TRCRSCTLR17" , 0x8889, true, true, {} }, // 1105 |
4714 | { "TRCRSCTLR18" , "TRCRSCTLR18" , 0x8891, true, true, {} }, // 1106 |
4715 | { "TRCRSCTLR19" , "TRCRSCTLR19" , 0x8899, true, true, {} }, // 1107 |
4716 | { "TRCRSCTLR2" , "TRCRSCTLR2" , 0x8890, true, true, {} }, // 1108 |
4717 | { "TRCRSCTLR20" , "TRCRSCTLR20" , 0x88A1, true, true, {} }, // 1109 |
4718 | { "TRCRSCTLR21" , "TRCRSCTLR21" , 0x88A9, true, true, {} }, // 1110 |
4719 | { "TRCRSCTLR22" , "TRCRSCTLR22" , 0x88B1, true, true, {} }, // 1111 |
4720 | { "TRCRSCTLR23" , "TRCRSCTLR23" , 0x88B9, true, true, {} }, // 1112 |
4721 | { "TRCRSCTLR24" , "TRCRSCTLR24" , 0x88C1, true, true, {} }, // 1113 |
4722 | { "TRCRSCTLR25" , "TRCRSCTLR25" , 0x88C9, true, true, {} }, // 1114 |
4723 | { "TRCRSCTLR26" , "TRCRSCTLR26" , 0x88D1, true, true, {} }, // 1115 |
4724 | { "TRCRSCTLR27" , "TRCRSCTLR27" , 0x88D9, true, true, {} }, // 1116 |
4725 | { "TRCRSCTLR28" , "TRCRSCTLR28" , 0x88E1, true, true, {} }, // 1117 |
4726 | { "TRCRSCTLR29" , "TRCRSCTLR29" , 0x88E9, true, true, {} }, // 1118 |
4727 | { "TRCRSCTLR3" , "TRCRSCTLR3" , 0x8898, true, true, {} }, // 1119 |
4728 | { "TRCRSCTLR30" , "TRCRSCTLR30" , 0x88F1, true, true, {} }, // 1120 |
4729 | { "TRCRSCTLR31" , "TRCRSCTLR31" , 0x88F9, true, true, {} }, // 1121 |
4730 | { "TRCRSCTLR4" , "TRCRSCTLR4" , 0x88A0, true, true, {} }, // 1122 |
4731 | { "TRCRSCTLR5" , "TRCRSCTLR5" , 0x88A8, true, true, {} }, // 1123 |
4732 | { "TRCRSCTLR6" , "TRCRSCTLR6" , 0x88B0, true, true, {} }, // 1124 |
4733 | { "TRCRSCTLR7" , "TRCRSCTLR7" , 0x88B8, true, true, {} }, // 1125 |
4734 | { "TRCRSCTLR8" , "TRCRSCTLR8" , 0x88C0, true, true, {} }, // 1126 |
4735 | { "TRCRSCTLR9" , "TRCRSCTLR9" , 0x88C8, true, true, {} }, // 1127 |
4736 | { "TRCRSR" , "TRCRSR" , 0x8850, true, true, {AArch64::FeatureETE} }, // 1128 |
4737 | { "TRCSEQEVR0" , "TRCSEQEVR0" , 0x8804, true, true, {} }, // 1129 |
4738 | { "TRCSEQEVR1" , "TRCSEQEVR1" , 0x880C, true, true, {} }, // 1130 |
4739 | { "TRCSEQEVR2" , "TRCSEQEVR2" , 0x8814, true, true, {} }, // 1131 |
4740 | { "TRCSEQRSTEVR" , "TRCSEQRSTEVR" , 0x8834, true, true, {} }, // 1132 |
4741 | { "TRCSEQSTR" , "TRCSEQSTR" , 0x883C, true, true, {} }, // 1133 |
4742 | { "TRCSSCCR0" , "TRCSSCCR0" , 0x8882, true, true, {} }, // 1134 |
4743 | { "TRCSSCCR1" , "TRCSSCCR1" , 0x888A, true, true, {} }, // 1135 |
4744 | { "TRCSSCCR2" , "TRCSSCCR2" , 0x8892, true, true, {} }, // 1136 |
4745 | { "TRCSSCCR3" , "TRCSSCCR3" , 0x889A, true, true, {} }, // 1137 |
4746 | { "TRCSSCCR4" , "TRCSSCCR4" , 0x88A2, true, true, {} }, // 1138 |
4747 | { "TRCSSCCR5" , "TRCSSCCR5" , 0x88AA, true, true, {} }, // 1139 |
4748 | { "TRCSSCCR6" , "TRCSSCCR6" , 0x88B2, true, true, {} }, // 1140 |
4749 | { "TRCSSCCR7" , "TRCSSCCR7" , 0x88BA, true, true, {} }, // 1141 |
4750 | { "TRCSSCSR0" , "TRCSSCSR0" , 0x88C2, true, true, {} }, // 1142 |
4751 | { "TRCSSCSR1" , "TRCSSCSR1" , 0x88CA, true, true, {} }, // 1143 |
4752 | { "TRCSSCSR2" , "TRCSSCSR2" , 0x88D2, true, true, {} }, // 1144 |
4753 | { "TRCSSCSR3" , "TRCSSCSR3" , 0x88DA, true, true, {} }, // 1145 |
4754 | { "TRCSSCSR4" , "TRCSSCSR4" , 0x88E2, true, true, {} }, // 1146 |
4755 | { "TRCSSCSR5" , "TRCSSCSR5" , 0x88EA, true, true, {} }, // 1147 |
4756 | { "TRCSSCSR6" , "TRCSSCSR6" , 0x88F2, true, true, {} }, // 1148 |
4757 | { "TRCSSCSR7" , "TRCSSCSR7" , 0x88FA, true, true, {} }, // 1149 |
4758 | { "TRCSSPCICR0" , "TRCSSPCICR0" , 0x8883, true, true, {} }, // 1150 |
4759 | { "TRCSSPCICR1" , "TRCSSPCICR1" , 0x888B, true, true, {} }, // 1151 |
4760 | { "TRCSSPCICR2" , "TRCSSPCICR2" , 0x8893, true, true, {} }, // 1152 |
4761 | { "TRCSSPCICR3" , "TRCSSPCICR3" , 0x889B, true, true, {} }, // 1153 |
4762 | { "TRCSSPCICR4" , "TRCSSPCICR4" , 0x88A3, true, true, {} }, // 1154 |
4763 | { "TRCSSPCICR5" , "TRCSSPCICR5" , 0x88AB, true, true, {} }, // 1155 |
4764 | { "TRCSSPCICR6" , "TRCSSPCICR6" , 0x88B3, true, true, {} }, // 1156 |
4765 | { "TRCSSPCICR7" , "TRCSSPCICR7" , 0x88BB, true, true, {} }, // 1157 |
4766 | { "TRCSTALLCTLR" , "TRCSTALLCTLR" , 0x8858, true, true, {} }, // 1158 |
4767 | { "TRCSTATR" , "TRCSTATR" , 0x8818, true, false, {} }, // 1159 |
4768 | { "TRCSYNCPR" , "TRCSYNCPR" , 0x8868, true, true, {} }, // 1160 |
4769 | { "TRCTRACEIDR" , "TRCTRACEIDR" , 0x8801, true, true, {} }, // 1161 |
4770 | { "TRCTSCTLR" , "TRCTSCTLR" , 0x8860, true, true, {} }, // 1162 |
4771 | { "TRCVDARCCTLR" , "TRCVDARCCTLR" , 0x8852, true, true, {} }, // 1163 |
4772 | { "TRCVDCTLR" , "TRCVDCTLR" , 0x8842, true, true, {} }, // 1164 |
4773 | { "TRCVDSACCTLR" , "TRCVDSACCTLR" , 0x884A, true, true, {} }, // 1165 |
4774 | { "TRCVICTLR" , "TRCVICTLR" , 0x8802, true, true, {} }, // 1166 |
4775 | { "TRCVIIECTLR" , "TRCVIIECTLR" , 0x880A, true, true, {} }, // 1167 |
4776 | { "TRCVIPCSSCTLR" , "TRCVIPCSSCTLR" , 0x881A, true, true, {} }, // 1168 |
4777 | { "TRCVISSCTLR" , "TRCVISSCTLR" , 0x8812, true, true, {} }, // 1169 |
4778 | { "TRCVMIDCCTLR0" , "TRCVMIDCCTLR0" , 0x8992, true, true, {} }, // 1170 |
4779 | { "TRCVMIDCCTLR1" , "TRCVMIDCCTLR1" , 0x899A, true, true, {} }, // 1171 |
4780 | { "TRCVMIDCVR0" , "TRCVMIDCVR0" , 0x8981, true, true, {} }, // 1172 |
4781 | { "TRCVMIDCVR1" , "TRCVMIDCVR1" , 0x8991, true, true, {} }, // 1173 |
4782 | { "TRCVMIDCVR2" , "TRCVMIDCVR2" , 0x89A1, true, true, {} }, // 1174 |
4783 | { "TRCVMIDCVR3" , "TRCVMIDCVR3" , 0x89B1, true, true, {} }, // 1175 |
4784 | { "TRCVMIDCVR4" , "TRCVMIDCVR4" , 0x89C1, true, true, {} }, // 1176 |
4785 | { "TRCVMIDCVR5" , "TRCVMIDCVR5" , 0x89D1, true, true, {} }, // 1177 |
4786 | { "TRCVMIDCVR6" , "TRCVMIDCVR6" , 0x89E1, true, true, {} }, // 1178 |
4787 | { "TRCVMIDCVR7" , "TRCVMIDCVR7" , 0x89F1, true, true, {} }, // 1179 |
4788 | { "TRFCR_EL1" , "TRFCR_EL1" , 0xC091, true, true, {AArch64::FeatureTRACEV8_4} }, // 1180 |
4789 | { "TRFCR_EL12" , "TRFCR_EL12" , 0xE891, true, true, {AArch64::FeatureTRACEV8_4} }, // 1181 |
4790 | { "TRFCR_EL2" , "TRFCR_EL2" , 0xE091, true, true, {AArch64::FeatureTRACEV8_4} }, // 1182 |
4791 | { "TTBR0_EL1" , "TTBR0_EL1" , 0xC100, true, true, {} }, // 1183 |
4792 | { "TTBR0_EL12" , "TTBR0_EL12" , 0xE900, true, true, {AArch64::FeatureVH} }, // 1184 |
4793 | { "TTBR0_EL2" , "VSCTLR_EL2" , 0xE100, true, true, {AArch64::FeatureEL2VMSA} }, // 1185 |
4794 | { "TTBR0_EL3" , "TTBR0_EL3" , 0xF100, true, true, {} }, // 1186 |
4795 | { "TTBR1_EL1" , "TTBR1_EL1" , 0xC101, true, true, {} }, // 1187 |
4796 | { "TTBR1_EL12" , "TTBR1_EL12" , 0xE901, true, true, {AArch64::FeatureVH} }, // 1188 |
4797 | { "TTBR1_EL2" , "TTBR1_EL2" , 0xE101, true, true, {AArch64::FeatureVH} }, // 1189 |
4798 | { "UAO" , "UAO" , 0xC214, true, true, {AArch64::FeaturePsUAO} }, // 1190 |
4799 | { "VBAR_EL1" , "VBAR_EL1" , 0xC600, true, true, {} }, // 1191 |
4800 | { "VBAR_EL12" , "VBAR_EL12" , 0xEE00, true, true, {AArch64::FeatureVH} }, // 1192 |
4801 | { "VBAR_EL2" , "VBAR_EL2" , 0xE600, true, true, {} }, // 1193 |
4802 | { "VBAR_EL3" , "VBAR_EL3" , 0xF600, true, true, {} }, // 1194 |
4803 | { "VDISR_EL2" , "VDISR_EL2" , 0xE609, true, true, {AArch64::FeatureRAS} }, // 1195 |
4804 | { "VDISR_EL3" , "VDISR_EL3" , 0xF609, true, true, {} }, // 1196 |
4805 | { "VMECID_A_EL2" , "VMECID_A_EL2" , 0xE549, true, true, {AArch64::FeatureMEC} }, // 1197 |
4806 | { "VMECID_P_EL2" , "VMECID_P_EL2" , 0xE548, true, true, {AArch64::FeatureMEC} }, // 1198 |
4807 | { "VMPIDR_EL2" , "VMPIDR_EL2" , 0xE005, true, true, {} }, // 1199 |
4808 | { "VNCR_EL2" , "VNCR_EL2" , 0xE110, true, true, {AArch64::FeatureNV} }, // 1200 |
4809 | { "VPIDR_EL2" , "VPIDR_EL2" , 0xE000, true, true, {} }, // 1201 |
4810 | { "VSCTLR_EL2" , "TTBR0_EL2" , 0xE100, true, true, {AArch64::HasV8_0rOps} }, // 1202 |
4811 | { "VSESR_EL2" , "VSESR_EL2" , 0xE293, true, true, {AArch64::FeatureRAS} }, // 1203 |
4812 | { "VSESR_EL3" , "VSESR_EL3" , 0xF293, true, true, {} }, // 1204 |
4813 | { "VSTCR_EL2" , "VSTCR_EL2" , 0xE132, true, true, {AArch64::FeatureSEL2} }, // 1205 |
4814 | { "VSTTBR_EL2" , "VSTTBR_EL2" , 0xE130, true, true, {AArch64::HasV8_0aOps} }, // 1206 |
4815 | { "VTCR_EL2" , "VTCR_EL2" , 0xE10A, true, true, {} }, // 1207 |
4816 | { "VTTBR_EL2" , "VTTBR_EL2" , 0xE108, true, true, {AArch64::FeatureEL2VMSA} }, // 1208 |
4817 | { "ZCR_EL1" , "ZCR_EL1" , 0xC090, true, true, {AArch64::FeatureSVE} }, // 1209 |
4818 | { "ZCR_EL12" , "ZCR_EL12" , 0xE890, true, true, {AArch64::FeatureSVE} }, // 1210 |
4819 | { "ZCR_EL2" , "ZCR_EL2" , 0xE090, true, true, {AArch64::FeatureSVE} }, // 1211 |
4820 | { "ZCR_EL3" , "ZCR_EL3" , 0xF090, true, true, {AArch64::FeatureSVE} }, // 1212 |
4821 | }; |
4822 | |
4823 | const SysReg *lookupSysRegByName(StringRef Name) { |
4824 | struct IndexType { |
4825 | const char * Name; |
4826 | unsigned _index; |
4827 | }; |
4828 | static const struct IndexType Index[] = { |
4829 | { "ACCDATA_EL1" , 0 }, |
4830 | { "ACTLR_EL1" , 1 }, |
4831 | { "ACTLR_EL2" , 2 }, |
4832 | { "ACTLR_EL3" , 3 }, |
4833 | { "AFSR0_EL1" , 4 }, |
4834 | { "AFSR0_EL12" , 5 }, |
4835 | { "AFSR0_EL2" , 6 }, |
4836 | { "AFSR0_EL3" , 7 }, |
4837 | { "AFSR1_EL1" , 8 }, |
4838 | { "AFSR1_EL12" , 9 }, |
4839 | { "AFSR1_EL2" , 10 }, |
4840 | { "AFSR1_EL3" , 11 }, |
4841 | { "AIDR_EL1" , 12 }, |
4842 | { "ALLINT" , 13 }, |
4843 | { "AMAIR2_EL1" , 14 }, |
4844 | { "AMAIR2_EL12" , 15 }, |
4845 | { "AMAIR2_EL2" , 16 }, |
4846 | { "AMAIR2_EL3" , 17 }, |
4847 | { "AMAIR_EL1" , 18 }, |
4848 | { "AMAIR_EL12" , 19 }, |
4849 | { "AMAIR_EL2" , 20 }, |
4850 | { "AMAIR_EL3" , 21 }, |
4851 | { "AMCFGR_EL0" , 22 }, |
4852 | { "AMCG1IDR_EL0" , 23 }, |
4853 | { "AMCGCR_EL0" , 24 }, |
4854 | { "AMCNTENCLR0_EL0" , 25 }, |
4855 | { "AMCNTENCLR1_EL0" , 26 }, |
4856 | { "AMCNTENSET0_EL0" , 27 }, |
4857 | { "AMCNTENSET1_EL0" , 28 }, |
4858 | { "AMCR_EL0" , 29 }, |
4859 | { "AMEVCNTR00_EL0" , 30 }, |
4860 | { "AMEVCNTR01_EL0" , 31 }, |
4861 | { "AMEVCNTR02_EL0" , 32 }, |
4862 | { "AMEVCNTR03_EL0" , 33 }, |
4863 | { "AMEVCNTR10_EL0" , 34 }, |
4864 | { "AMEVCNTR110_EL0" , 35 }, |
4865 | { "AMEVCNTR111_EL0" , 36 }, |
4866 | { "AMEVCNTR112_EL0" , 37 }, |
4867 | { "AMEVCNTR113_EL0" , 38 }, |
4868 | { "AMEVCNTR114_EL0" , 39 }, |
4869 | { "AMEVCNTR115_EL0" , 40 }, |
4870 | { "AMEVCNTR11_EL0" , 41 }, |
4871 | { "AMEVCNTR12_EL0" , 42 }, |
4872 | { "AMEVCNTR13_EL0" , 43 }, |
4873 | { "AMEVCNTR14_EL0" , 44 }, |
4874 | { "AMEVCNTR15_EL0" , 45 }, |
4875 | { "AMEVCNTR16_EL0" , 46 }, |
4876 | { "AMEVCNTR17_EL0" , 47 }, |
4877 | { "AMEVCNTR18_EL0" , 48 }, |
4878 | { "AMEVCNTR19_EL0" , 49 }, |
4879 | { "AMEVCNTVOFF00_EL2" , 50 }, |
4880 | { "AMEVCNTVOFF010_EL2" , 51 }, |
4881 | { "AMEVCNTVOFF011_EL2" , 52 }, |
4882 | { "AMEVCNTVOFF012_EL2" , 53 }, |
4883 | { "AMEVCNTVOFF013_EL2" , 54 }, |
4884 | { "AMEVCNTVOFF014_EL2" , 55 }, |
4885 | { "AMEVCNTVOFF015_EL2" , 56 }, |
4886 | { "AMEVCNTVOFF01_EL2" , 57 }, |
4887 | { "AMEVCNTVOFF02_EL2" , 58 }, |
4888 | { "AMEVCNTVOFF03_EL2" , 59 }, |
4889 | { "AMEVCNTVOFF04_EL2" , 60 }, |
4890 | { "AMEVCNTVOFF05_EL2" , 61 }, |
4891 | { "AMEVCNTVOFF06_EL2" , 62 }, |
4892 | { "AMEVCNTVOFF07_EL2" , 63 }, |
4893 | { "AMEVCNTVOFF08_EL2" , 64 }, |
4894 | { "AMEVCNTVOFF09_EL2" , 65 }, |
4895 | { "AMEVCNTVOFF10_EL2" , 66 }, |
4896 | { "AMEVCNTVOFF110_EL2" , 67 }, |
4897 | { "AMEVCNTVOFF111_EL2" , 68 }, |
4898 | { "AMEVCNTVOFF112_EL2" , 69 }, |
4899 | { "AMEVCNTVOFF113_EL2" , 70 }, |
4900 | { "AMEVCNTVOFF114_EL2" , 71 }, |
4901 | { "AMEVCNTVOFF115_EL2" , 72 }, |
4902 | { "AMEVCNTVOFF11_EL2" , 73 }, |
4903 | { "AMEVCNTVOFF12_EL2" , 74 }, |
4904 | { "AMEVCNTVOFF13_EL2" , 75 }, |
4905 | { "AMEVCNTVOFF14_EL2" , 76 }, |
4906 | { "AMEVCNTVOFF15_EL2" , 77 }, |
4907 | { "AMEVCNTVOFF16_EL2" , 78 }, |
4908 | { "AMEVCNTVOFF17_EL2" , 79 }, |
4909 | { "AMEVCNTVOFF18_EL2" , 80 }, |
4910 | { "AMEVCNTVOFF19_EL2" , 81 }, |
4911 | { "AMEVTYPER00_EL0" , 82 }, |
4912 | { "AMEVTYPER01_EL0" , 83 }, |
4913 | { "AMEVTYPER02_EL0" , 84 }, |
4914 | { "AMEVTYPER03_EL0" , 85 }, |
4915 | { "AMEVTYPER10_EL0" , 86 }, |
4916 | { "AMEVTYPER110_EL0" , 87 }, |
4917 | { "AMEVTYPER111_EL0" , 88 }, |
4918 | { "AMEVTYPER112_EL0" , 89 }, |
4919 | { "AMEVTYPER113_EL0" , 90 }, |
4920 | { "AMEVTYPER114_EL0" , 91 }, |
4921 | { "AMEVTYPER115_EL0" , 92 }, |
4922 | { "AMEVTYPER11_EL0" , 93 }, |
4923 | { "AMEVTYPER12_EL0" , 94 }, |
4924 | { "AMEVTYPER13_EL0" , 95 }, |
4925 | { "AMEVTYPER14_EL0" , 96 }, |
4926 | { "AMEVTYPER15_EL0" , 97 }, |
4927 | { "AMEVTYPER16_EL0" , 98 }, |
4928 | { "AMEVTYPER17_EL0" , 99 }, |
4929 | { "AMEVTYPER18_EL0" , 100 }, |
4930 | { "AMEVTYPER19_EL0" , 101 }, |
4931 | { "AMUSERENR_EL0" , 102 }, |
4932 | { "APDAKEYHI_EL1" , 103 }, |
4933 | { "APDAKEYLO_EL1" , 104 }, |
4934 | { "APDBKEYHI_EL1" , 105 }, |
4935 | { "APDBKEYLO_EL1" , 106 }, |
4936 | { "APGAKEYHI_EL1" , 107 }, |
4937 | { "APGAKEYLO_EL1" , 108 }, |
4938 | { "APIAKEYHI_EL1" , 109 }, |
4939 | { "APIAKEYLO_EL1" , 110 }, |
4940 | { "APIBKEYHI_EL1" , 111 }, |
4941 | { "APIBKEYLO_EL1" , 112 }, |
4942 | { "BRBCR_EL1" , 113 }, |
4943 | { "BRBCR_EL12" , 114 }, |
4944 | { "BRBCR_EL2" , 115 }, |
4945 | { "BRBFCR_EL1" , 116 }, |
4946 | { "BRBIDR0_EL1" , 117 }, |
4947 | { "BRBINF0_EL1" , 118 }, |
4948 | { "BRBINF10_EL1" , 119 }, |
4949 | { "BRBINF11_EL1" , 120 }, |
4950 | { "BRBINF12_EL1" , 121 }, |
4951 | { "BRBINF13_EL1" , 122 }, |
4952 | { "BRBINF14_EL1" , 123 }, |
4953 | { "BRBINF15_EL1" , 124 }, |
4954 | { "BRBINF16_EL1" , 125 }, |
4955 | { "BRBINF17_EL1" , 126 }, |
4956 | { "BRBINF18_EL1" , 127 }, |
4957 | { "BRBINF19_EL1" , 128 }, |
4958 | { "BRBINF1_EL1" , 129 }, |
4959 | { "BRBINF20_EL1" , 130 }, |
4960 | { "BRBINF21_EL1" , 131 }, |
4961 | { "BRBINF22_EL1" , 132 }, |
4962 | { "BRBINF23_EL1" , 133 }, |
4963 | { "BRBINF24_EL1" , 134 }, |
4964 | { "BRBINF25_EL1" , 135 }, |
4965 | { "BRBINF26_EL1" , 136 }, |
4966 | { "BRBINF27_EL1" , 137 }, |
4967 | { "BRBINF28_EL1" , 138 }, |
4968 | { "BRBINF29_EL1" , 139 }, |
4969 | { "BRBINF2_EL1" , 140 }, |
4970 | { "BRBINF30_EL1" , 141 }, |
4971 | { "BRBINF31_EL1" , 142 }, |
4972 | { "BRBINF3_EL1" , 143 }, |
4973 | { "BRBINF4_EL1" , 144 }, |
4974 | { "BRBINF5_EL1" , 145 }, |
4975 | { "BRBINF6_EL1" , 146 }, |
4976 | { "BRBINF7_EL1" , 147 }, |
4977 | { "BRBINF8_EL1" , 148 }, |
4978 | { "BRBINF9_EL1" , 149 }, |
4979 | { "BRBINFINJ_EL1" , 150 }, |
4980 | { "BRBSRC0_EL1" , 151 }, |
4981 | { "BRBSRC10_EL1" , 152 }, |
4982 | { "BRBSRC11_EL1" , 153 }, |
4983 | { "BRBSRC12_EL1" , 154 }, |
4984 | { "BRBSRC13_EL1" , 155 }, |
4985 | { "BRBSRC14_EL1" , 156 }, |
4986 | { "BRBSRC15_EL1" , 157 }, |
4987 | { "BRBSRC16_EL1" , 158 }, |
4988 | { "BRBSRC17_EL1" , 159 }, |
4989 | { "BRBSRC18_EL1" , 160 }, |
4990 | { "BRBSRC19_EL1" , 161 }, |
4991 | { "BRBSRC1_EL1" , 162 }, |
4992 | { "BRBSRC20_EL1" , 163 }, |
4993 | { "BRBSRC21_EL1" , 164 }, |
4994 | { "BRBSRC22_EL1" , 165 }, |
4995 | { "BRBSRC23_EL1" , 166 }, |
4996 | { "BRBSRC24_EL1" , 167 }, |
4997 | { "BRBSRC25_EL1" , 168 }, |
4998 | { "BRBSRC26_EL1" , 169 }, |
4999 | { "BRBSRC27_EL1" , 170 }, |
5000 | { "BRBSRC28_EL1" , 171 }, |
5001 | { "BRBSRC29_EL1" , 172 }, |
5002 | { "BRBSRC2_EL1" , 173 }, |
5003 | { "BRBSRC30_EL1" , 174 }, |
5004 | { "BRBSRC31_EL1" , 175 }, |
5005 | { "BRBSRC3_EL1" , 176 }, |
5006 | { "BRBSRC4_EL1" , 177 }, |
5007 | { "BRBSRC5_EL1" , 178 }, |
5008 | { "BRBSRC6_EL1" , 179 }, |
5009 | { "BRBSRC7_EL1" , 180 }, |
5010 | { "BRBSRC8_EL1" , 181 }, |
5011 | { "BRBSRC9_EL1" , 182 }, |
5012 | { "BRBSRCINJ_EL1" , 183 }, |
5013 | { "BRBTGT0_EL1" , 184 }, |
5014 | { "BRBTGT10_EL1" , 185 }, |
5015 | { "BRBTGT11_EL1" , 186 }, |
5016 | { "BRBTGT12_EL1" , 187 }, |
5017 | { "BRBTGT13_EL1" , 188 }, |
5018 | { "BRBTGT14_EL1" , 189 }, |
5019 | { "BRBTGT15_EL1" , 190 }, |
5020 | { "BRBTGT16_EL1" , 191 }, |
5021 | { "BRBTGT17_EL1" , 192 }, |
5022 | { "BRBTGT18_EL1" , 193 }, |
5023 | { "BRBTGT19_EL1" , 194 }, |
5024 | { "BRBTGT1_EL1" , 195 }, |
5025 | { "BRBTGT20_EL1" , 196 }, |
5026 | { "BRBTGT21_EL1" , 197 }, |
5027 | { "BRBTGT22_EL1" , 198 }, |
5028 | { "BRBTGT23_EL1" , 199 }, |
5029 | { "BRBTGT24_EL1" , 200 }, |
5030 | { "BRBTGT25_EL1" , 201 }, |
5031 | { "BRBTGT26_EL1" , 202 }, |
5032 | { "BRBTGT27_EL1" , 203 }, |
5033 | { "BRBTGT28_EL1" , 204 }, |
5034 | { "BRBTGT29_EL1" , 205 }, |
5035 | { "BRBTGT2_EL1" , 206 }, |
5036 | { "BRBTGT30_EL1" , 207 }, |
5037 | { "BRBTGT31_EL1" , 208 }, |
5038 | { "BRBTGT3_EL1" , 209 }, |
5039 | { "BRBTGT4_EL1" , 210 }, |
5040 | { "BRBTGT5_EL1" , 211 }, |
5041 | { "BRBTGT6_EL1" , 212 }, |
5042 | { "BRBTGT7_EL1" , 213 }, |
5043 | { "BRBTGT8_EL1" , 214 }, |
5044 | { "BRBTGT9_EL1" , 215 }, |
5045 | { "BRBTGTINJ_EL1" , 216 }, |
5046 | { "BRBTS_EL1" , 217 }, |
5047 | { "CCSIDR2_EL1" , 218 }, |
5048 | { "CCSIDR_EL1" , 219 }, |
5049 | { "CLIDR_EL1" , 220 }, |
5050 | { "CNTFRQ_EL0" , 221 }, |
5051 | { "CNTHCTL_EL2" , 222 }, |
5052 | { "CNTHPS_CTL_EL2" , 223 }, |
5053 | { "CNTHPS_CVAL_EL2" , 224 }, |
5054 | { "CNTHPS_TVAL_EL2" , 225 }, |
5055 | { "CNTHP_CTL_EL2" , 226 }, |
5056 | { "CNTHP_CVAL_EL2" , 227 }, |
5057 | { "CNTHP_TVAL_EL2" , 228 }, |
5058 | { "CNTHVS_CTL_EL2" , 229 }, |
5059 | { "CNTHVS_CVAL_EL2" , 230 }, |
5060 | { "CNTHVS_TVAL_EL2" , 231 }, |
5061 | { "CNTHV_CTL_EL2" , 232 }, |
5062 | { "CNTHV_CVAL_EL2" , 233 }, |
5063 | { "CNTHV_TVAL_EL2" , 234 }, |
5064 | { "CNTISCALE_EL2" , 235 }, |
5065 | { "CNTKCTL_EL1" , 236 }, |
5066 | { "CNTKCTL_EL12" , 237 }, |
5067 | { "CNTPCTSS_EL0" , 238 }, |
5068 | { "CNTPCT_EL0" , 239 }, |
5069 | { "CNTPOFF_EL2" , 240 }, |
5070 | { "CNTPS_CTL_EL1" , 241 }, |
5071 | { "CNTPS_CVAL_EL1" , 242 }, |
5072 | { "CNTPS_TVAL_EL1" , 243 }, |
5073 | { "CNTP_CTL_EL0" , 244 }, |
5074 | { "CNTP_CTL_EL02" , 245 }, |
5075 | { "CNTP_CVAL_EL0" , 246 }, |
5076 | { "CNTP_CVAL_EL02" , 247 }, |
5077 | { "CNTP_TVAL_EL0" , 248 }, |
5078 | { "CNTP_TVAL_EL02" , 249 }, |
5079 | { "CNTSCALE_EL2" , 250 }, |
5080 | { "CNTVCTSS_EL0" , 251 }, |
5081 | { "CNTVCT_EL0" , 252 }, |
5082 | { "CNTVFRQ_EL2" , 253 }, |
5083 | { "CNTVOFF_EL2" , 254 }, |
5084 | { "CNTV_CTL_EL0" , 255 }, |
5085 | { "CNTV_CTL_EL02" , 256 }, |
5086 | { "CNTV_CVAL_EL0" , 257 }, |
5087 | { "CNTV_CVAL_EL02" , 258 }, |
5088 | { "CNTV_TVAL_EL0" , 259 }, |
5089 | { "CNTV_TVAL_EL02" , 260 }, |
5090 | { "CONTEXTIDR_EL1" , 261 }, |
5091 | { "CONTEXTIDR_EL12" , 262 }, |
5092 | { "CONTEXTIDR_EL2" , 263 }, |
5093 | { "CPACR_EL1" , 264 }, |
5094 | { "CPACR_EL12" , 265 }, |
5095 | { "CPM_IOACC_CTL_EL3" , 266 }, |
5096 | { "CPTR_EL2" , 267 }, |
5097 | { "CPTR_EL3" , 268 }, |
5098 | { "CSSELR_EL1" , 269 }, |
5099 | { "CTR_EL0" , 270 }, |
5100 | { "CURRENTEL" , 271 }, |
5101 | { "DACR32_EL2" , 272 }, |
5102 | { "DAIF" , 273 }, |
5103 | { "DBGAUTHSTATUS_EL1" , 274 }, |
5104 | { "DBGBCR0_EL1" , 275 }, |
5105 | { "DBGBCR10_EL1" , 276 }, |
5106 | { "DBGBCR11_EL1" , 277 }, |
5107 | { "DBGBCR12_EL1" , 278 }, |
5108 | { "DBGBCR13_EL1" , 279 }, |
5109 | { "DBGBCR14_EL1" , 280 }, |
5110 | { "DBGBCR15_EL1" , 281 }, |
5111 | { "DBGBCR1_EL1" , 282 }, |
5112 | { "DBGBCR2_EL1" , 283 }, |
5113 | { "DBGBCR3_EL1" , 284 }, |
5114 | { "DBGBCR4_EL1" , 285 }, |
5115 | { "DBGBCR5_EL1" , 286 }, |
5116 | { "DBGBCR6_EL1" , 287 }, |
5117 | { "DBGBCR7_EL1" , 288 }, |
5118 | { "DBGBCR8_EL1" , 289 }, |
5119 | { "DBGBCR9_EL1" , 290 }, |
5120 | { "DBGBVR0_EL1" , 291 }, |
5121 | { "DBGBVR10_EL1" , 292 }, |
5122 | { "DBGBVR11_EL1" , 293 }, |
5123 | { "DBGBVR12_EL1" , 294 }, |
5124 | { "DBGBVR13_EL1" , 295 }, |
5125 | { "DBGBVR14_EL1" , 296 }, |
5126 | { "DBGBVR15_EL1" , 297 }, |
5127 | { "DBGBVR1_EL1" , 298 }, |
5128 | { "DBGBVR2_EL1" , 299 }, |
5129 | { "DBGBVR3_EL1" , 300 }, |
5130 | { "DBGBVR4_EL1" , 301 }, |
5131 | { "DBGBVR5_EL1" , 302 }, |
5132 | { "DBGBVR6_EL1" , 303 }, |
5133 | { "DBGBVR7_EL1" , 304 }, |
5134 | { "DBGBVR8_EL1" , 305 }, |
5135 | { "DBGBVR9_EL1" , 306 }, |
5136 | { "DBGCLAIMCLR_EL1" , 307 }, |
5137 | { "DBGCLAIMSET_EL1" , 308 }, |
5138 | { "DBGDTRRX_EL0" , 309 }, |
5139 | { "DBGDTRTX_EL0" , 310 }, |
5140 | { "DBGDTR_EL0" , 311 }, |
5141 | { "DBGPRCR_EL1" , 312 }, |
5142 | { "DBGVCR32_EL2" , 313 }, |
5143 | { "DBGWCR0_EL1" , 314 }, |
5144 | { "DBGWCR10_EL1" , 315 }, |
5145 | { "DBGWCR11_EL1" , 316 }, |
5146 | { "DBGWCR12_EL1" , 317 }, |
5147 | { "DBGWCR13_EL1" , 318 }, |
5148 | { "DBGWCR14_EL1" , 319 }, |
5149 | { "DBGWCR15_EL1" , 320 }, |
5150 | { "DBGWCR1_EL1" , 321 }, |
5151 | { "DBGWCR2_EL1" , 322 }, |
5152 | { "DBGWCR3_EL1" , 323 }, |
5153 | { "DBGWCR4_EL1" , 324 }, |
5154 | { "DBGWCR5_EL1" , 325 }, |
5155 | { "DBGWCR6_EL1" , 326 }, |
5156 | { "DBGWCR7_EL1" , 327 }, |
5157 | { "DBGWCR8_EL1" , 328 }, |
5158 | { "DBGWCR9_EL1" , 329 }, |
5159 | { "DBGWVR0_EL1" , 330 }, |
5160 | { "DBGWVR10_EL1" , 331 }, |
5161 | { "DBGWVR11_EL1" , 332 }, |
5162 | { "DBGWVR12_EL1" , 333 }, |
5163 | { "DBGWVR13_EL1" , 334 }, |
5164 | { "DBGWVR14_EL1" , 335 }, |
5165 | { "DBGWVR15_EL1" , 336 }, |
5166 | { "DBGWVR1_EL1" , 337 }, |
5167 | { "DBGWVR2_EL1" , 338 }, |
5168 | { "DBGWVR3_EL1" , 339 }, |
5169 | { "DBGWVR4_EL1" , 340 }, |
5170 | { "DBGWVR5_EL1" , 341 }, |
5171 | { "DBGWVR6_EL1" , 342 }, |
5172 | { "DBGWVR7_EL1" , 343 }, |
5173 | { "DBGWVR8_EL1" , 344 }, |
5174 | { "DBGWVR9_EL1" , 345 }, |
5175 | { "DCZID_EL0" , 346 }, |
5176 | { "DISR_EL1" , 347 }, |
5177 | { "DIT" , 348 }, |
5178 | { "DLR_EL0" , 349 }, |
5179 | { "DSPSR_EL0" , 350 }, |
5180 | { "ELR_EL1" , 351 }, |
5181 | { "ELR_EL12" , 352 }, |
5182 | { "ELR_EL2" , 353 }, |
5183 | { "ELR_EL3" , 354 }, |
5184 | { "ERRIDR_EL1" , 355 }, |
5185 | { "ERRSELR_EL1" , 356 }, |
5186 | { "ERXADDR_EL1" , 357 }, |
5187 | { "ERXCTLR_EL1" , 358 }, |
5188 | { "ERXFR_EL1" , 359 }, |
5189 | { "ERXGSR_EL1" , 360 }, |
5190 | { "ERXMISC0_EL1" , 361 }, |
5191 | { "ERXMISC1_EL1" , 362 }, |
5192 | { "ERXMISC2_EL1" , 363 }, |
5193 | { "ERXMISC3_EL1" , 364 }, |
5194 | { "ERXPFGCDN_EL1" , 365 }, |
5195 | { "ERXPFGCTL_EL1" , 366 }, |
5196 | { "ERXPFGF_EL1" , 367 }, |
5197 | { "ERXSTATUS_EL1" , 368 }, |
5198 | { "ESR_EL1" , 369 }, |
5199 | { "ESR_EL12" , 370 }, |
5200 | { "ESR_EL2" , 371 }, |
5201 | { "ESR_EL3" , 372 }, |
5202 | { "FAR_EL1" , 373 }, |
5203 | { "FAR_EL12" , 374 }, |
5204 | { "FAR_EL2" , 375 }, |
5205 | { "FAR_EL3" , 376 }, |
5206 | { "FGWTE3_EL3" , 377 }, |
5207 | { "FPCR" , 378 }, |
5208 | { "FPEXC32_EL2" , 379 }, |
5209 | { "FPMR" , 380 }, |
5210 | { "FPSR" , 381 }, |
5211 | { "GCR_EL1" , 382 }, |
5212 | { "GCSCRE0_EL1" , 383 }, |
5213 | { "GCSCR_EL1" , 384 }, |
5214 | { "GCSCR_EL12" , 385 }, |
5215 | { "GCSCR_EL2" , 386 }, |
5216 | { "GCSCR_EL3" , 387 }, |
5217 | { "GCSPR_EL0" , 388 }, |
5218 | { "GCSPR_EL1" , 389 }, |
5219 | { "GCSPR_EL12" , 390 }, |
5220 | { "GCSPR_EL2" , 391 }, |
5221 | { "GCSPR_EL3" , 392 }, |
5222 | { "GMID_EL1" , 393 }, |
5223 | { "GPCCR_EL3" , 394 }, |
5224 | { "GPTBR_EL3" , 395 }, |
5225 | { "HACDBSBR_EL2" , 396 }, |
5226 | { "HACDBSCONS_EL2" , 397 }, |
5227 | { "HACR_EL2" , 398 }, |
5228 | { "HAFGRTR_EL2" , 399 }, |
5229 | { "HCRX_EL2" , 400 }, |
5230 | { "HCR_EL2" , 401 }, |
5231 | { "HDBSSBR_EL2" , 402 }, |
5232 | { "HDBSSPROD_EL2" , 403 }, |
5233 | { "HDFGRTR2_EL2" , 404 }, |
5234 | { "HDFGRTR_EL2" , 405 }, |
5235 | { "HDFGWTR2_EL2" , 406 }, |
5236 | { "HDFGWTR_EL2" , 407 }, |
5237 | { "HFGITR2_EL2" , 408 }, |
5238 | { "HFGITR_EL2" , 409 }, |
5239 | { "HFGRTR2_EL2" , 410 }, |
5240 | { "HFGRTR_EL2" , 411 }, |
5241 | { "HFGWTR2_EL2" , 412 }, |
5242 | { "HFGWTR_EL2" , 413 }, |
5243 | { "HPFAR_EL2" , 414 }, |
5244 | { "HSTR_EL2" , 415 }, |
5245 | { "ICC_AP0R0_EL1" , 416 }, |
5246 | { "ICC_AP0R1_EL1" , 417 }, |
5247 | { "ICC_AP0R2_EL1" , 418 }, |
5248 | { "ICC_AP0R3_EL1" , 419 }, |
5249 | { "ICC_AP1R0_EL1" , 420 }, |
5250 | { "ICC_AP1R1_EL1" , 421 }, |
5251 | { "ICC_AP1R2_EL1" , 422 }, |
5252 | { "ICC_AP1R3_EL1" , 423 }, |
5253 | { "ICC_ASGI1R_EL1" , 424 }, |
5254 | { "ICC_BPR0_EL1" , 425 }, |
5255 | { "ICC_BPR1_EL1" , 426 }, |
5256 | { "ICC_CTLR_EL1" , 427 }, |
5257 | { "ICC_CTLR_EL3" , 428 }, |
5258 | { "ICC_DIR_EL1" , 429 }, |
5259 | { "ICC_EOIR0_EL1" , 430 }, |
5260 | { "ICC_EOIR1_EL1" , 431 }, |
5261 | { "ICC_HPPIR0_EL1" , 432 }, |
5262 | { "ICC_HPPIR1_EL1" , 433 }, |
5263 | { "ICC_IAR0_EL1" , 434 }, |
5264 | { "ICC_IAR1_EL1" , 435 }, |
5265 | { "ICC_IGRPEN0_EL1" , 436 }, |
5266 | { "ICC_IGRPEN1_EL1" , 437 }, |
5267 | { "ICC_IGRPEN1_EL3" , 438 }, |
5268 | { "ICC_NMIAR1_EL1" , 439 }, |
5269 | { "ICC_PMR_EL1" , 440 }, |
5270 | { "ICC_RPR_EL1" , 441 }, |
5271 | { "ICC_SGI0R_EL1" , 442 }, |
5272 | { "ICC_SGI1R_EL1" , 443 }, |
5273 | { "ICC_SRE_EL1" , 444 }, |
5274 | { "ICC_SRE_EL2" , 445 }, |
5275 | { "ICC_SRE_EL3" , 446 }, |
5276 | { "ICH_AP0R0_EL2" , 447 }, |
5277 | { "ICH_AP0R1_EL2" , 448 }, |
5278 | { "ICH_AP0R2_EL2" , 449 }, |
5279 | { "ICH_AP0R3_EL2" , 450 }, |
5280 | { "ICH_AP1R0_EL2" , 451 }, |
5281 | { "ICH_AP1R1_EL2" , 452 }, |
5282 | { "ICH_AP1R2_EL2" , 453 }, |
5283 | { "ICH_AP1R3_EL2" , 454 }, |
5284 | { "ICH_EISR_EL2" , 455 }, |
5285 | { "ICH_ELRSR_EL2" , 456 }, |
5286 | { "ICH_HCR_EL2" , 457 }, |
5287 | { "ICH_LR0_EL2" , 458 }, |
5288 | { "ICH_LR10_EL2" , 459 }, |
5289 | { "ICH_LR11_EL2" , 460 }, |
5290 | { "ICH_LR12_EL2" , 461 }, |
5291 | { "ICH_LR13_EL2" , 462 }, |
5292 | { "ICH_LR14_EL2" , 463 }, |
5293 | { "ICH_LR15_EL2" , 464 }, |
5294 | { "ICH_LR1_EL2" , 465 }, |
5295 | { "ICH_LR2_EL2" , 466 }, |
5296 | { "ICH_LR3_EL2" , 467 }, |
5297 | { "ICH_LR4_EL2" , 468 }, |
5298 | { "ICH_LR5_EL2" , 469 }, |
5299 | { "ICH_LR6_EL2" , 470 }, |
5300 | { "ICH_LR7_EL2" , 471 }, |
5301 | { "ICH_LR8_EL2" , 472 }, |
5302 | { "ICH_LR9_EL2" , 473 }, |
5303 | { "ICH_MISR_EL2" , 474 }, |
5304 | { "ICH_VMCR_EL2" , 475 }, |
5305 | { "ICH_VTR_EL2" , 476 }, |
5306 | { "ID_AA64AFR0_EL1" , 477 }, |
5307 | { "ID_AA64AFR1_EL1" , 478 }, |
5308 | { "ID_AA64DFR0_EL1" , 479 }, |
5309 | { "ID_AA64DFR1_EL1" , 480 }, |
5310 | { "ID_AA64DFR2_EL1" , 481 }, |
5311 | { "ID_AA64FPFR0_EL1" , 482 }, |
5312 | { "ID_AA64ISAR0_EL1" , 483 }, |
5313 | { "ID_AA64ISAR1_EL1" , 484 }, |
5314 | { "ID_AA64ISAR2_EL1" , 485 }, |
5315 | { "ID_AA64ISAR3_EL1" , 486 }, |
5316 | { "ID_AA64MMFR0_EL1" , 487 }, |
5317 | { "ID_AA64MMFR1_EL1" , 488 }, |
5318 | { "ID_AA64MMFR2_EL1" , 489 }, |
5319 | { "ID_AA64MMFR3_EL1" , 490 }, |
5320 | { "ID_AA64MMFR4_EL1" , 491 }, |
5321 | { "ID_AA64PFR0_EL1" , 492 }, |
5322 | { "ID_AA64PFR1_EL1" , 493 }, |
5323 | { "ID_AA64PFR2_EL1" , 494 }, |
5324 | { "ID_AA64SMFR0_EL1" , 495 }, |
5325 | { "ID_AA64ZFR0_EL1" , 496 }, |
5326 | { "ID_AFR0_EL1" , 497 }, |
5327 | { "ID_DFR0_EL1" , 498 }, |
5328 | { "ID_DFR1_EL1" , 499 }, |
5329 | { "ID_ISAR0_EL1" , 500 }, |
5330 | { "ID_ISAR1_EL1" , 501 }, |
5331 | { "ID_ISAR2_EL1" , 502 }, |
5332 | { "ID_ISAR3_EL1" , 503 }, |
5333 | { "ID_ISAR4_EL1" , 504 }, |
5334 | { "ID_ISAR5_EL1" , 505 }, |
5335 | { "ID_ISAR6_EL1" , 506 }, |
5336 | { "ID_MMFR0_EL1" , 507 }, |
5337 | { "ID_MMFR1_EL1" , 508 }, |
5338 | { "ID_MMFR2_EL1" , 509 }, |
5339 | { "ID_MMFR3_EL1" , 510 }, |
5340 | { "ID_MMFR4_EL1" , 511 }, |
5341 | { "ID_MMFR5_EL1" , 512 }, |
5342 | { "ID_PFR0_EL1" , 513 }, |
5343 | { "ID_PFR1_EL1" , 514 }, |
5344 | { "ID_PFR2_EL1" , 515 }, |
5345 | { "IFSR32_EL2" , 516 }, |
5346 | { "ISR_EL1" , 517 }, |
5347 | { "LORC_EL1" , 518 }, |
5348 | { "LOREA_EL1" , 519 }, |
5349 | { "LORID_EL1" , 520 }, |
5350 | { "LORN_EL1" , 521 }, |
5351 | { "LORSA_EL1" , 522 }, |
5352 | { "MAIR2_EL1" , 523 }, |
5353 | { "MAIR2_EL12" , 524 }, |
5354 | { "MAIR2_EL2" , 525 }, |
5355 | { "MAIR2_EL3" , 526 }, |
5356 | { "MAIR_EL1" , 527 }, |
5357 | { "MAIR_EL12" , 528 }, |
5358 | { "MAIR_EL2" , 529 }, |
5359 | { "MAIR_EL3" , 530 }, |
5360 | { "MDCCINT_EL1" , 531 }, |
5361 | { "MDCCSR_EL0" , 532 }, |
5362 | { "MDCR_EL2" , 533 }, |
5363 | { "MDCR_EL3" , 534 }, |
5364 | { "MDRAR_EL1" , 535 }, |
5365 | { "MDSCR_EL1" , 536 }, |
5366 | { "MDSELR_EL1" , 537 }, |
5367 | { "MDSTEPOP_EL1" , 538 }, |
5368 | { "MECIDR_EL2" , 539 }, |
5369 | { "MECID_A0_EL2" , 540 }, |
5370 | { "MECID_A1_EL2" , 541 }, |
5371 | { "MECID_P0_EL2" , 542 }, |
5372 | { "MECID_P1_EL2" , 543 }, |
5373 | { "MECID_RL_A_EL3" , 544 }, |
5374 | { "MFAR_EL3" , 545 }, |
5375 | { "MIDR_EL1" , 546 }, |
5376 | { "MPAM0_EL1" , 547 }, |
5377 | { "MPAM1_EL1" , 548 }, |
5378 | { "MPAM1_EL12" , 549 }, |
5379 | { "MPAM2_EL2" , 550 }, |
5380 | { "MPAM3_EL3" , 551 }, |
5381 | { "MPAMHCR_EL2" , 552 }, |
5382 | { "MPAMIDR_EL1" , 553 }, |
5383 | { "MPAMSM_EL1" , 554 }, |
5384 | { "MPAMVPM0_EL2" , 555 }, |
5385 | { "MPAMVPM1_EL2" , 556 }, |
5386 | { "MPAMVPM2_EL2" , 557 }, |
5387 | { "MPAMVPM3_EL2" , 558 }, |
5388 | { "MPAMVPM4_EL2" , 559 }, |
5389 | { "MPAMVPM5_EL2" , 560 }, |
5390 | { "MPAMVPM6_EL2" , 561 }, |
5391 | { "MPAMVPM7_EL2" , 562 }, |
5392 | { "MPAMVPMV_EL2" , 563 }, |
5393 | { "MPIDR_EL1" , 564 }, |
5394 | { "MPUIR_EL1" , 565 }, |
5395 | { "MPUIR_EL2" , 566 }, |
5396 | { "MVFR0_EL1" , 567 }, |
5397 | { "MVFR1_EL1" , 568 }, |
5398 | { "MVFR2_EL1" , 569 }, |
5399 | { "NZCV" , 570 }, |
5400 | { "OSDLR_EL1" , 571 }, |
5401 | { "OSDTRRX_EL1" , 572 }, |
5402 | { "OSDTRTX_EL1" , 573 }, |
5403 | { "OSECCR_EL1" , 574 }, |
5404 | { "OSLAR_EL1" , 575 }, |
5405 | { "OSLSR_EL1" , 576 }, |
5406 | { "PAN" , 577 }, |
5407 | { "PAR_EL1" , 578 }, |
5408 | { "PFAR_EL1" , 579 }, |
5409 | { "PFAR_EL12" , 580 }, |
5410 | { "PFAR_EL2" , 581 }, |
5411 | { "PIRE0_EL1" , 582 }, |
5412 | { "PIRE0_EL12" , 583 }, |
5413 | { "PIRE0_EL2" , 584 }, |
5414 | { "PIR_EL1" , 585 }, |
5415 | { "PIR_EL12" , 586 }, |
5416 | { "PIR_EL2" , 587 }, |
5417 | { "PIR_EL3" , 588 }, |
5418 | { "PM" , 589 }, |
5419 | { "PMBIDR_EL1" , 590 }, |
5420 | { "PMBLIMITR_EL1" , 591 }, |
5421 | { "PMBPTR_EL1" , 592 }, |
5422 | { "PMBSR_EL1" , 593 }, |
5423 | { "PMCCFILTR_EL0" , 594 }, |
5424 | { "PMCCNTR_EL0" , 595 }, |
5425 | { "PMCCNTSVR_EL1" , 596 }, |
5426 | { "PMCEID0_EL0" , 597 }, |
5427 | { "PMCEID1_EL0" , 598 }, |
5428 | { "PMCNTENCLR_EL0" , 599 }, |
5429 | { "PMCNTENSET_EL0" , 600 }, |
5430 | { "PMCR_EL0" , 601 }, |
5431 | { "PMECR_EL1" , 602 }, |
5432 | { "PMEVCNTR0_EL0" , 603 }, |
5433 | { "PMEVCNTR10_EL0" , 604 }, |
5434 | { "PMEVCNTR11_EL0" , 605 }, |
5435 | { "PMEVCNTR12_EL0" , 606 }, |
5436 | { "PMEVCNTR13_EL0" , 607 }, |
5437 | { "PMEVCNTR14_EL0" , 608 }, |
5438 | { "PMEVCNTR15_EL0" , 609 }, |
5439 | { "PMEVCNTR16_EL0" , 610 }, |
5440 | { "PMEVCNTR17_EL0" , 611 }, |
5441 | { "PMEVCNTR18_EL0" , 612 }, |
5442 | { "PMEVCNTR19_EL0" , 613 }, |
5443 | { "PMEVCNTR1_EL0" , 614 }, |
5444 | { "PMEVCNTR20_EL0" , 615 }, |
5445 | { "PMEVCNTR21_EL0" , 616 }, |
5446 | { "PMEVCNTR22_EL0" , 617 }, |
5447 | { "PMEVCNTR23_EL0" , 618 }, |
5448 | { "PMEVCNTR24_EL0" , 619 }, |
5449 | { "PMEVCNTR25_EL0" , 620 }, |
5450 | { "PMEVCNTR26_EL0" , 621 }, |
5451 | { "PMEVCNTR27_EL0" , 622 }, |
5452 | { "PMEVCNTR28_EL0" , 623 }, |
5453 | { "PMEVCNTR29_EL0" , 624 }, |
5454 | { "PMEVCNTR2_EL0" , 625 }, |
5455 | { "PMEVCNTR30_EL0" , 626 }, |
5456 | { "PMEVCNTR3_EL0" , 627 }, |
5457 | { "PMEVCNTR4_EL0" , 628 }, |
5458 | { "PMEVCNTR5_EL0" , 629 }, |
5459 | { "PMEVCNTR6_EL0" , 630 }, |
5460 | { "PMEVCNTR7_EL0" , 631 }, |
5461 | { "PMEVCNTR8_EL0" , 632 }, |
5462 | { "PMEVCNTR9_EL0" , 633 }, |
5463 | { "PMEVCNTSVR0_EL1" , 634 }, |
5464 | { "PMEVCNTSVR10_EL1" , 635 }, |
5465 | { "PMEVCNTSVR11_EL1" , 636 }, |
5466 | { "PMEVCNTSVR12_EL1" , 637 }, |
5467 | { "PMEVCNTSVR13_EL1" , 638 }, |
5468 | { "PMEVCNTSVR14_EL1" , 639 }, |
5469 | { "PMEVCNTSVR15_EL1" , 640 }, |
5470 | { "PMEVCNTSVR16_EL1" , 641 }, |
5471 | { "PMEVCNTSVR17_EL1" , 642 }, |
5472 | { "PMEVCNTSVR18_EL1" , 643 }, |
5473 | { "PMEVCNTSVR19_EL1" , 644 }, |
5474 | { "PMEVCNTSVR1_EL1" , 645 }, |
5475 | { "PMEVCNTSVR20_EL1" , 646 }, |
5476 | { "PMEVCNTSVR21_EL1" , 647 }, |
5477 | { "PMEVCNTSVR22_EL1" , 648 }, |
5478 | { "PMEVCNTSVR23_EL1" , 649 }, |
5479 | { "PMEVCNTSVR24_EL1" , 650 }, |
5480 | { "PMEVCNTSVR25_EL1" , 651 }, |
5481 | { "PMEVCNTSVR26_EL1" , 652 }, |
5482 | { "PMEVCNTSVR27_EL1" , 653 }, |
5483 | { "PMEVCNTSVR28_EL1" , 654 }, |
5484 | { "PMEVCNTSVR29_EL1" , 655 }, |
5485 | { "PMEVCNTSVR2_EL1" , 656 }, |
5486 | { "PMEVCNTSVR30_EL1" , 657 }, |
5487 | { "PMEVCNTSVR3_EL1" , 658 }, |
5488 | { "PMEVCNTSVR4_EL1" , 659 }, |
5489 | { "PMEVCNTSVR5_EL1" , 660 }, |
5490 | { "PMEVCNTSVR6_EL1" , 661 }, |
5491 | { "PMEVCNTSVR7_EL1" , 662 }, |
5492 | { "PMEVCNTSVR8_EL1" , 663 }, |
5493 | { "PMEVCNTSVR9_EL1" , 664 }, |
5494 | { "PMEVTYPER0_EL0" , 665 }, |
5495 | { "PMEVTYPER10_EL0" , 666 }, |
5496 | { "PMEVTYPER11_EL0" , 667 }, |
5497 | { "PMEVTYPER12_EL0" , 668 }, |
5498 | { "PMEVTYPER13_EL0" , 669 }, |
5499 | { "PMEVTYPER14_EL0" , 670 }, |
5500 | { "PMEVTYPER15_EL0" , 671 }, |
5501 | { "PMEVTYPER16_EL0" , 672 }, |
5502 | { "PMEVTYPER17_EL0" , 673 }, |
5503 | { "PMEVTYPER18_EL0" , 674 }, |
5504 | { "PMEVTYPER19_EL0" , 675 }, |
5505 | { "PMEVTYPER1_EL0" , 676 }, |
5506 | { "PMEVTYPER20_EL0" , 677 }, |
5507 | { "PMEVTYPER21_EL0" , 678 }, |
5508 | { "PMEVTYPER22_EL0" , 679 }, |
5509 | { "PMEVTYPER23_EL0" , 680 }, |
5510 | { "PMEVTYPER24_EL0" , 681 }, |
5511 | { "PMEVTYPER25_EL0" , 682 }, |
5512 | { "PMEVTYPER26_EL0" , 683 }, |
5513 | { "PMEVTYPER27_EL0" , 684 }, |
5514 | { "PMEVTYPER28_EL0" , 685 }, |
5515 | { "PMEVTYPER29_EL0" , 686 }, |
5516 | { "PMEVTYPER2_EL0" , 687 }, |
5517 | { "PMEVTYPER30_EL0" , 688 }, |
5518 | { "PMEVTYPER3_EL0" , 689 }, |
5519 | { "PMEVTYPER4_EL0" , 690 }, |
5520 | { "PMEVTYPER5_EL0" , 691 }, |
5521 | { "PMEVTYPER6_EL0" , 692 }, |
5522 | { "PMEVTYPER7_EL0" , 693 }, |
5523 | { "PMEVTYPER8_EL0" , 694 }, |
5524 | { "PMEVTYPER9_EL0" , 695 }, |
5525 | { "PMIAR_EL1" , 696 }, |
5526 | { "PMICFILTR_EL0" , 697 }, |
5527 | { "PMICNTR_EL0" , 698 }, |
5528 | { "PMICNTSVR_EL1" , 699 }, |
5529 | { "PMINTENCLR_EL1" , 700 }, |
5530 | { "PMINTENSET_EL1" , 701 }, |
5531 | { "PMMIR_EL1" , 702 }, |
5532 | { "PMOVSCLR_EL0" , 703 }, |
5533 | { "PMOVSSET_EL0" , 704 }, |
5534 | { "PMSCR_EL1" , 705 }, |
5535 | { "PMSCR_EL12" , 706 }, |
5536 | { "PMSCR_EL2" , 707 }, |
5537 | { "PMSDSFR_EL1" , 708 }, |
5538 | { "PMSELR_EL0" , 709 }, |
5539 | { "PMSEVFR_EL1" , 710 }, |
5540 | { "PMSFCR_EL1" , 711 }, |
5541 | { "PMSICR_EL1" , 712 }, |
5542 | { "PMSIDR_EL1" , 713 }, |
5543 | { "PMSIRR_EL1" , 714 }, |
5544 | { "PMSLATFR_EL1" , 715 }, |
5545 | { "PMSNEVFR_EL1" , 716 }, |
5546 | { "PMSSCR_EL1" , 717 }, |
5547 | { "PMSWINC_EL0" , 718 }, |
5548 | { "PMUACR_EL1" , 719 }, |
5549 | { "PMUSERENR_EL0" , 720 }, |
5550 | { "PMXEVCNTR_EL0" , 721 }, |
5551 | { "PMXEVTYPER_EL0" , 722 }, |
5552 | { "PMZR_EL0" , 723 }, |
5553 | { "POR_EL0" , 724 }, |
5554 | { "POR_EL1" , 725 }, |
5555 | { "POR_EL12" , 726 }, |
5556 | { "POR_EL2" , 727 }, |
5557 | { "POR_EL3" , 728 }, |
5558 | { "PRBAR10_EL1" , 729 }, |
5559 | { "PRBAR10_EL2" , 730 }, |
5560 | { "PRBAR11_EL1" , 731 }, |
5561 | { "PRBAR11_EL2" , 732 }, |
5562 | { "PRBAR12_EL1" , 733 }, |
5563 | { "PRBAR12_EL2" , 734 }, |
5564 | { "PRBAR13_EL1" , 735 }, |
5565 | { "PRBAR13_EL2" , 736 }, |
5566 | { "PRBAR14_EL1" , 737 }, |
5567 | { "PRBAR14_EL2" , 738 }, |
5568 | { "PRBAR15_EL1" , 739 }, |
5569 | { "PRBAR15_EL2" , 740 }, |
5570 | { "PRBAR1_EL1" , 741 }, |
5571 | { "PRBAR1_EL2" , 742 }, |
5572 | { "PRBAR2_EL1" , 743 }, |
5573 | { "PRBAR2_EL2" , 744 }, |
5574 | { "PRBAR3_EL1" , 745 }, |
5575 | { "PRBAR3_EL2" , 746 }, |
5576 | { "PRBAR4_EL1" , 747 }, |
5577 | { "PRBAR4_EL2" , 748 }, |
5578 | { "PRBAR5_EL1" , 749 }, |
5579 | { "PRBAR5_EL2" , 750 }, |
5580 | { "PRBAR6_EL1" , 751 }, |
5581 | { "PRBAR6_EL2" , 752 }, |
5582 | { "PRBAR7_EL1" , 753 }, |
5583 | { "PRBAR7_EL2" , 754 }, |
5584 | { "PRBAR8_EL1" , 755 }, |
5585 | { "PRBAR8_EL2" , 756 }, |
5586 | { "PRBAR9_EL1" , 757 }, |
5587 | { "PRBAR9_EL2" , 758 }, |
5588 | { "PRBAR_EL1" , 759 }, |
5589 | { "PRBAR_EL2" , 760 }, |
5590 | { "PRENR_EL1" , 761 }, |
5591 | { "PRENR_EL2" , 762 }, |
5592 | { "PRLAR10_EL1" , 763 }, |
5593 | { "PRLAR10_EL2" , 764 }, |
5594 | { "PRLAR11_EL1" , 765 }, |
5595 | { "PRLAR11_EL2" , 766 }, |
5596 | { "PRLAR12_EL1" , 767 }, |
5597 | { "PRLAR12_EL2" , 768 }, |
5598 | { "PRLAR13_EL1" , 769 }, |
5599 | { "PRLAR13_EL2" , 770 }, |
5600 | { "PRLAR14_EL1" , 771 }, |
5601 | { "PRLAR14_EL2" , 772 }, |
5602 | { "PRLAR15_EL1" , 773 }, |
5603 | { "PRLAR15_EL2" , 774 }, |
5604 | { "PRLAR1_EL1" , 775 }, |
5605 | { "PRLAR1_EL2" , 776 }, |
5606 | { "PRLAR2_EL1" , 777 }, |
5607 | { "PRLAR2_EL2" , 778 }, |
5608 | { "PRLAR3_EL1" , 779 }, |
5609 | { "PRLAR3_EL2" , 780 }, |
5610 | { "PRLAR4_EL1" , 781 }, |
5611 | { "PRLAR4_EL2" , 782 }, |
5612 | { "PRLAR5_EL1" , 783 }, |
5613 | { "PRLAR5_EL2" , 784 }, |
5614 | { "PRLAR6_EL1" , 785 }, |
5615 | { "PRLAR6_EL2" , 786 }, |
5616 | { "PRLAR7_EL1" , 787 }, |
5617 | { "PRLAR7_EL2" , 788 }, |
5618 | { "PRLAR8_EL1" , 789 }, |
5619 | { "PRLAR8_EL2" , 790 }, |
5620 | { "PRLAR9_EL1" , 791 }, |
5621 | { "PRLAR9_EL2" , 792 }, |
5622 | { "PRLAR_EL1" , 793 }, |
5623 | { "PRLAR_EL2" , 794 }, |
5624 | { "PRSELR_EL1" , 795 }, |
5625 | { "PRSELR_EL2" , 796 }, |
5626 | { "RCWMASK_EL1" , 797 }, |
5627 | { "RCWSMASK_EL1" , 798 }, |
5628 | { "REVIDR_EL1" , 799 }, |
5629 | { "RGSR_EL1" , 800 }, |
5630 | { "RMR_EL1" , 801 }, |
5631 | { "RMR_EL2" , 802 }, |
5632 | { "RMR_EL3" , 803 }, |
5633 | { "RNDR" , 804 }, |
5634 | { "RNDRRS" , 805 }, |
5635 | { "RVBAR_EL1" , 806 }, |
5636 | { "RVBAR_EL2" , 807 }, |
5637 | { "RVBAR_EL3" , 808 }, |
5638 | { "S2PIR_EL2" , 809 }, |
5639 | { "S2POR_EL1" , 810 }, |
5640 | { "SCR_EL3" , 811 }, |
5641 | { "SCTLR2_EL1" , 812 }, |
5642 | { "SCTLR2_EL12" , 813 }, |
5643 | { "SCTLR2_EL2" , 814 }, |
5644 | { "SCTLR2_EL3" , 815 }, |
5645 | { "SCTLR_EL1" , 816 }, |
5646 | { "SCTLR_EL12" , 817 }, |
5647 | { "SCTLR_EL2" , 818 }, |
5648 | { "SCTLR_EL3" , 819 }, |
5649 | { "SCXTNUM_EL0" , 820 }, |
5650 | { "SCXTNUM_EL1" , 821 }, |
5651 | { "SCXTNUM_EL12" , 822 }, |
5652 | { "SCXTNUM_EL2" , 823 }, |
5653 | { "SCXTNUM_EL3" , 824 }, |
5654 | { "SDER32_EL2" , 825 }, |
5655 | { "SDER32_EL3" , 826 }, |
5656 | { "SMCR_EL1" , 827 }, |
5657 | { "SMCR_EL12" , 828 }, |
5658 | { "SMCR_EL2" , 829 }, |
5659 | { "SMCR_EL3" , 830 }, |
5660 | { "SMIDR_EL1" , 831 }, |
5661 | { "SMPRIMAP_EL2" , 832 }, |
5662 | { "SMPRI_EL1" , 833 }, |
5663 | { "SPMACCESSR_EL1" , 834 }, |
5664 | { "SPMACCESSR_EL12" , 835 }, |
5665 | { "SPMACCESSR_EL2" , 836 }, |
5666 | { "SPMACCESSR_EL3" , 837 }, |
5667 | { "SPMCFGR_EL1" , 838 }, |
5668 | { "SPMCGCR0_EL1" , 839 }, |
5669 | { "SPMCGCR1_EL1" , 840 }, |
5670 | { "SPMCNTENCLR_EL0" , 841 }, |
5671 | { "SPMCNTENSET_EL0" , 842 }, |
5672 | { "SPMCR_EL0" , 843 }, |
5673 | { "SPMDEVAFF_EL1" , 844 }, |
5674 | { "SPMDEVARCH_EL1" , 845 }, |
5675 | { "SPMEVCNTR0_EL0" , 846 }, |
5676 | { "SPMEVCNTR10_EL0" , 847 }, |
5677 | { "SPMEVCNTR11_EL0" , 848 }, |
5678 | { "SPMEVCNTR12_EL0" , 849 }, |
5679 | { "SPMEVCNTR13_EL0" , 850 }, |
5680 | { "SPMEVCNTR14_EL0" , 851 }, |
5681 | { "SPMEVCNTR15_EL0" , 852 }, |
5682 | { "SPMEVCNTR1_EL0" , 853 }, |
5683 | { "SPMEVCNTR2_EL0" , 854 }, |
5684 | { "SPMEVCNTR3_EL0" , 855 }, |
5685 | { "SPMEVCNTR4_EL0" , 856 }, |
5686 | { "SPMEVCNTR5_EL0" , 857 }, |
5687 | { "SPMEVCNTR6_EL0" , 858 }, |
5688 | { "SPMEVCNTR7_EL0" , 859 }, |
5689 | { "SPMEVCNTR8_EL0" , 860 }, |
5690 | { "SPMEVCNTR9_EL0" , 861 }, |
5691 | { "SPMEVFILT2R0_EL0" , 862 }, |
5692 | { "SPMEVFILT2R10_EL0" , 863 }, |
5693 | { "SPMEVFILT2R11_EL0" , 864 }, |
5694 | { "SPMEVFILT2R12_EL0" , 865 }, |
5695 | { "SPMEVFILT2R13_EL0" , 866 }, |
5696 | { "SPMEVFILT2R14_EL0" , 867 }, |
5697 | { "SPMEVFILT2R15_EL0" , 868 }, |
5698 | { "SPMEVFILT2R1_EL0" , 869 }, |
5699 | { "SPMEVFILT2R2_EL0" , 870 }, |
5700 | { "SPMEVFILT2R3_EL0" , 871 }, |
5701 | { "SPMEVFILT2R4_EL0" , 872 }, |
5702 | { "SPMEVFILT2R5_EL0" , 873 }, |
5703 | { "SPMEVFILT2R6_EL0" , 874 }, |
5704 | { "SPMEVFILT2R7_EL0" , 875 }, |
5705 | { "SPMEVFILT2R8_EL0" , 876 }, |
5706 | { "SPMEVFILT2R9_EL0" , 877 }, |
5707 | { "SPMEVFILTR0_EL0" , 878 }, |
5708 | { "SPMEVFILTR10_EL0" , 879 }, |
5709 | { "SPMEVFILTR11_EL0" , 880 }, |
5710 | { "SPMEVFILTR12_EL0" , 881 }, |
5711 | { "SPMEVFILTR13_EL0" , 882 }, |
5712 | { "SPMEVFILTR14_EL0" , 883 }, |
5713 | { "SPMEVFILTR15_EL0" , 884 }, |
5714 | { "SPMEVFILTR1_EL0" , 885 }, |
5715 | { "SPMEVFILTR2_EL0" , 886 }, |
5716 | { "SPMEVFILTR3_EL0" , 887 }, |
5717 | { "SPMEVFILTR4_EL0" , 888 }, |
5718 | { "SPMEVFILTR5_EL0" , 889 }, |
5719 | { "SPMEVFILTR6_EL0" , 890 }, |
5720 | { "SPMEVFILTR7_EL0" , 891 }, |
5721 | { "SPMEVFILTR8_EL0" , 892 }, |
5722 | { "SPMEVFILTR9_EL0" , 893 }, |
5723 | { "SPMEVTYPER0_EL0" , 894 }, |
5724 | { "SPMEVTYPER10_EL0" , 895 }, |
5725 | { "SPMEVTYPER11_EL0" , 896 }, |
5726 | { "SPMEVTYPER12_EL0" , 897 }, |
5727 | { "SPMEVTYPER13_EL0" , 898 }, |
5728 | { "SPMEVTYPER14_EL0" , 899 }, |
5729 | { "SPMEVTYPER15_EL0" , 900 }, |
5730 | { "SPMEVTYPER1_EL0" , 901 }, |
5731 | { "SPMEVTYPER2_EL0" , 902 }, |
5732 | { "SPMEVTYPER3_EL0" , 903 }, |
5733 | { "SPMEVTYPER4_EL0" , 904 }, |
5734 | { "SPMEVTYPER5_EL0" , 905 }, |
5735 | { "SPMEVTYPER6_EL0" , 906 }, |
5736 | { "SPMEVTYPER7_EL0" , 907 }, |
5737 | { "SPMEVTYPER8_EL0" , 908 }, |
5738 | { "SPMEVTYPER9_EL0" , 909 }, |
5739 | { "SPMIIDR_EL1" , 910 }, |
5740 | { "SPMINTENCLR_EL1" , 911 }, |
5741 | { "SPMINTENSET_EL1" , 912 }, |
5742 | { "SPMOVSCLR_EL0" , 913 }, |
5743 | { "SPMOVSSET_EL0" , 914 }, |
5744 | { "SPMROOTCR_EL3" , 915 }, |
5745 | { "SPMSCR_EL1" , 916 }, |
5746 | { "SPMSELR_EL0" , 917 }, |
5747 | { "SPMZR_EL0" , 918 }, |
5748 | { "SPSEL" , 919 }, |
5749 | { "SPSR_ABT" , 920 }, |
5750 | { "SPSR_EL1" , 921 }, |
5751 | { "SPSR_EL12" , 922 }, |
5752 | { "SPSR_EL2" , 923 }, |
5753 | { "SPSR_EL3" , 924 }, |
5754 | { "SPSR_FIQ" , 925 }, |
5755 | { "SPSR_IRQ" , 926 }, |
5756 | { "SPSR_UND" , 927 }, |
5757 | { "SP_EL0" , 928 }, |
5758 | { "SP_EL1" , 929 }, |
5759 | { "SP_EL2" , 930 }, |
5760 | { "SSBS" , 931 }, |
5761 | { "SVCR" , 932 }, |
5762 | { "TCO" , 933 }, |
5763 | { "TCR2_EL1" , 934 }, |
5764 | { "TCR2_EL12" , 935 }, |
5765 | { "TCR2_EL2" , 936 }, |
5766 | { "TCR_EL1" , 937 }, |
5767 | { "TCR_EL12" , 938 }, |
5768 | { "TCR_EL2" , 939 }, |
5769 | { "TCR_EL3" , 940 }, |
5770 | { "TEECR32_EL1" , 941 }, |
5771 | { "TEEHBR32_EL1" , 942 }, |
5772 | { "TFSRE0_EL1" , 943 }, |
5773 | { "TFSR_EL1" , 944 }, |
5774 | { "TFSR_EL12" , 945 }, |
5775 | { "TFSR_EL2" , 946 }, |
5776 | { "TFSR_EL3" , 947 }, |
5777 | { "TPIDR2_EL0" , 948 }, |
5778 | { "TPIDRRO_EL0" , 949 }, |
5779 | { "TPIDR_EL0" , 950 }, |
5780 | { "TPIDR_EL1" , 951 }, |
5781 | { "TPIDR_EL2" , 952 }, |
5782 | { "TPIDR_EL3" , 953 }, |
5783 | { "TRBBASER_EL1" , 954 }, |
5784 | { "TRBIDR_EL1" , 955 }, |
5785 | { "TRBLIMITR_EL1" , 956 }, |
5786 | { "TRBMAR_EL1" , 957 }, |
5787 | { "TRBPTR_EL1" , 958 }, |
5788 | { "TRBSR_EL1" , 959 }, |
5789 | { "TRBTRG_EL1" , 960 }, |
5790 | { "TRCACATR0" , 961 }, |
5791 | { "TRCACATR1" , 962 }, |
5792 | { "TRCACATR10" , 963 }, |
5793 | { "TRCACATR11" , 964 }, |
5794 | { "TRCACATR12" , 965 }, |
5795 | { "TRCACATR13" , 966 }, |
5796 | { "TRCACATR14" , 967 }, |
5797 | { "TRCACATR15" , 968 }, |
5798 | { "TRCACATR2" , 969 }, |
5799 | { "TRCACATR3" , 970 }, |
5800 | { "TRCACATR4" , 971 }, |
5801 | { "TRCACATR5" , 972 }, |
5802 | { "TRCACATR6" , 973 }, |
5803 | { "TRCACATR7" , 974 }, |
5804 | { "TRCACATR8" , 975 }, |
5805 | { "TRCACATR9" , 976 }, |
5806 | { "TRCACVR0" , 977 }, |
5807 | { "TRCACVR1" , 978 }, |
5808 | { "TRCACVR10" , 979 }, |
5809 | { "TRCACVR11" , 980 }, |
5810 | { "TRCACVR12" , 981 }, |
5811 | { "TRCACVR13" , 982 }, |
5812 | { "TRCACVR14" , 983 }, |
5813 | { "TRCACVR15" , 984 }, |
5814 | { "TRCACVR2" , 985 }, |
5815 | { "TRCACVR3" , 986 }, |
5816 | { "TRCACVR4" , 987 }, |
5817 | { "TRCACVR5" , 988 }, |
5818 | { "TRCACVR6" , 989 }, |
5819 | { "TRCACVR7" , 990 }, |
5820 | { "TRCACVR8" , 991 }, |
5821 | { "TRCACVR9" , 992 }, |
5822 | { "TRCAUTHSTATUS" , 993 }, |
5823 | { "TRCAUXCTLR" , 994 }, |
5824 | { "TRCBBCTLR" , 995 }, |
5825 | { "TRCCCCTLR" , 996 }, |
5826 | { "TRCCIDCCTLR0" , 997 }, |
5827 | { "TRCCIDCCTLR1" , 998 }, |
5828 | { "TRCCIDCVR0" , 999 }, |
5829 | { "TRCCIDCVR1" , 1000 }, |
5830 | { "TRCCIDCVR2" , 1001 }, |
5831 | { "TRCCIDCVR3" , 1002 }, |
5832 | { "TRCCIDCVR4" , 1003 }, |
5833 | { "TRCCIDCVR5" , 1004 }, |
5834 | { "TRCCIDCVR6" , 1005 }, |
5835 | { "TRCCIDCVR7" , 1006 }, |
5836 | { "TRCCIDR0" , 1007 }, |
5837 | { "TRCCIDR1" , 1008 }, |
5838 | { "TRCCIDR2" , 1009 }, |
5839 | { "TRCCIDR3" , 1010 }, |
5840 | { "TRCCLAIMCLR" , 1011 }, |
5841 | { "TRCCLAIMSET" , 1012 }, |
5842 | { "TRCCNTCTLR0" , 1013 }, |
5843 | { "TRCCNTCTLR1" , 1014 }, |
5844 | { "TRCCNTCTLR2" , 1015 }, |
5845 | { "TRCCNTCTLR3" , 1016 }, |
5846 | { "TRCCNTRLDVR0" , 1017 }, |
5847 | { "TRCCNTRLDVR1" , 1018 }, |
5848 | { "TRCCNTRLDVR2" , 1019 }, |
5849 | { "TRCCNTRLDVR3" , 1020 }, |
5850 | { "TRCCNTVR0" , 1021 }, |
5851 | { "TRCCNTVR1" , 1022 }, |
5852 | { "TRCCNTVR2" , 1023 }, |
5853 | { "TRCCNTVR3" , 1024 }, |
5854 | { "TRCCONFIGR" , 1025 }, |
5855 | { "TRCDEVAFF0" , 1026 }, |
5856 | { "TRCDEVAFF1" , 1027 }, |
5857 | { "TRCDEVARCH" , 1028 }, |
5858 | { "TRCDEVID" , 1029 }, |
5859 | { "TRCDEVTYPE" , 1030 }, |
5860 | { "TRCDVCMR0" , 1031 }, |
5861 | { "TRCDVCMR1" , 1032 }, |
5862 | { "TRCDVCMR2" , 1033 }, |
5863 | { "TRCDVCMR3" , 1034 }, |
5864 | { "TRCDVCMR4" , 1035 }, |
5865 | { "TRCDVCMR5" , 1036 }, |
5866 | { "TRCDVCMR6" , 1037 }, |
5867 | { "TRCDVCMR7" , 1038 }, |
5868 | { "TRCDVCVR0" , 1039 }, |
5869 | { "TRCDVCVR1" , 1040 }, |
5870 | { "TRCDVCVR2" , 1041 }, |
5871 | { "TRCDVCVR3" , 1042 }, |
5872 | { "TRCDVCVR4" , 1043 }, |
5873 | { "TRCDVCVR5" , 1044 }, |
5874 | { "TRCDVCVR6" , 1045 }, |
5875 | { "TRCDVCVR7" , 1046 }, |
5876 | { "TRCEVENTCTL0R" , 1047 }, |
5877 | { "TRCEVENTCTL1R" , 1048 }, |
5878 | { "TRCEXTINSELR" , 1049 }, |
5879 | { "TRCEXTINSELR0" , 1050 }, |
5880 | { "TRCEXTINSELR1" , 1051 }, |
5881 | { "TRCEXTINSELR2" , 1052 }, |
5882 | { "TRCEXTINSELR3" , 1053 }, |
5883 | { "TRCIDR0" , 1054 }, |
5884 | { "TRCIDR1" , 1055 }, |
5885 | { "TRCIDR10" , 1056 }, |
5886 | { "TRCIDR11" , 1057 }, |
5887 | { "TRCIDR12" , 1058 }, |
5888 | { "TRCIDR13" , 1059 }, |
5889 | { "TRCIDR2" , 1060 }, |
5890 | { "TRCIDR3" , 1061 }, |
5891 | { "TRCIDR4" , 1062 }, |
5892 | { "TRCIDR5" , 1063 }, |
5893 | { "TRCIDR6" , 1064 }, |
5894 | { "TRCIDR7" , 1065 }, |
5895 | { "TRCIDR8" , 1066 }, |
5896 | { "TRCIDR9" , 1067 }, |
5897 | { "TRCIMSPEC0" , 1068 }, |
5898 | { "TRCIMSPEC1" , 1069 }, |
5899 | { "TRCIMSPEC2" , 1070 }, |
5900 | { "TRCIMSPEC3" , 1071 }, |
5901 | { "TRCIMSPEC4" , 1072 }, |
5902 | { "TRCIMSPEC5" , 1073 }, |
5903 | { "TRCIMSPEC6" , 1074 }, |
5904 | { "TRCIMSPEC7" , 1075 }, |
5905 | { "TRCITCTRL" , 1076 }, |
5906 | { "TRCITECR_EL1" , 1077 }, |
5907 | { "TRCITECR_EL12" , 1078 }, |
5908 | { "TRCITECR_EL2" , 1079 }, |
5909 | { "TRCITEEDCR" , 1080 }, |
5910 | { "TRCLAR" , 1081 }, |
5911 | { "TRCLSR" , 1082 }, |
5912 | { "TRCOSLAR" , 1083 }, |
5913 | { "TRCOSLSR" , 1084 }, |
5914 | { "TRCPDCR" , 1085 }, |
5915 | { "TRCPDSR" , 1086 }, |
5916 | { "TRCPIDR0" , 1087 }, |
5917 | { "TRCPIDR1" , 1088 }, |
5918 | { "TRCPIDR2" , 1089 }, |
5919 | { "TRCPIDR3" , 1090 }, |
5920 | { "TRCPIDR4" , 1091 }, |
5921 | { "TRCPIDR5" , 1092 }, |
5922 | { "TRCPIDR6" , 1093 }, |
5923 | { "TRCPIDR7" , 1094 }, |
5924 | { "TRCPRGCTLR" , 1095 }, |
5925 | { "TRCPROCSELR" , 1096 }, |
5926 | { "TRCQCTLR" , 1097 }, |
5927 | { "TRCRSCTLR10" , 1098 }, |
5928 | { "TRCRSCTLR11" , 1099 }, |
5929 | { "TRCRSCTLR12" , 1100 }, |
5930 | { "TRCRSCTLR13" , 1101 }, |
5931 | { "TRCRSCTLR14" , 1102 }, |
5932 | { "TRCRSCTLR15" , 1103 }, |
5933 | { "TRCRSCTLR16" , 1104 }, |
5934 | { "TRCRSCTLR17" , 1105 }, |
5935 | { "TRCRSCTLR18" , 1106 }, |
5936 | { "TRCRSCTLR19" , 1107 }, |
5937 | { "TRCRSCTLR2" , 1108 }, |
5938 | { "TRCRSCTLR20" , 1109 }, |
5939 | { "TRCRSCTLR21" , 1110 }, |
5940 | { "TRCRSCTLR22" , 1111 }, |
5941 | { "TRCRSCTLR23" , 1112 }, |
5942 | { "TRCRSCTLR24" , 1113 }, |
5943 | { "TRCRSCTLR25" , 1114 }, |
5944 | { "TRCRSCTLR26" , 1115 }, |
5945 | { "TRCRSCTLR27" , 1116 }, |
5946 | { "TRCRSCTLR28" , 1117 }, |
5947 | { "TRCRSCTLR29" , 1118 }, |
5948 | { "TRCRSCTLR3" , 1119 }, |
5949 | { "TRCRSCTLR30" , 1120 }, |
5950 | { "TRCRSCTLR31" , 1121 }, |
5951 | { "TRCRSCTLR4" , 1122 }, |
5952 | { "TRCRSCTLR5" , 1123 }, |
5953 | { "TRCRSCTLR6" , 1124 }, |
5954 | { "TRCRSCTLR7" , 1125 }, |
5955 | { "TRCRSCTLR8" , 1126 }, |
5956 | { "TRCRSCTLR9" , 1127 }, |
5957 | { "TRCRSR" , 1128 }, |
5958 | { "TRCSEQEVR0" , 1129 }, |
5959 | { "TRCSEQEVR1" , 1130 }, |
5960 | { "TRCSEQEVR2" , 1131 }, |
5961 | { "TRCSEQRSTEVR" , 1132 }, |
5962 | { "TRCSEQSTR" , 1133 }, |
5963 | { "TRCSSCCR0" , 1134 }, |
5964 | { "TRCSSCCR1" , 1135 }, |
5965 | { "TRCSSCCR2" , 1136 }, |
5966 | { "TRCSSCCR3" , 1137 }, |
5967 | { "TRCSSCCR4" , 1138 }, |
5968 | { "TRCSSCCR5" , 1139 }, |
5969 | { "TRCSSCCR6" , 1140 }, |
5970 | { "TRCSSCCR7" , 1141 }, |
5971 | { "TRCSSCSR0" , 1142 }, |
5972 | { "TRCSSCSR1" , 1143 }, |
5973 | { "TRCSSCSR2" , 1144 }, |
5974 | { "TRCSSCSR3" , 1145 }, |
5975 | { "TRCSSCSR4" , 1146 }, |
5976 | { "TRCSSCSR5" , 1147 }, |
5977 | { "TRCSSCSR6" , 1148 }, |
5978 | { "TRCSSCSR7" , 1149 }, |
5979 | { "TRCSSPCICR0" , 1150 }, |
5980 | { "TRCSSPCICR1" , 1151 }, |
5981 | { "TRCSSPCICR2" , 1152 }, |
5982 | { "TRCSSPCICR3" , 1153 }, |
5983 | { "TRCSSPCICR4" , 1154 }, |
5984 | { "TRCSSPCICR5" , 1155 }, |
5985 | { "TRCSSPCICR6" , 1156 }, |
5986 | { "TRCSSPCICR7" , 1157 }, |
5987 | { "TRCSTALLCTLR" , 1158 }, |
5988 | { "TRCSTATR" , 1159 }, |
5989 | { "TRCSYNCPR" , 1160 }, |
5990 | { "TRCTRACEIDR" , 1161 }, |
5991 | { "TRCTSCTLR" , 1162 }, |
5992 | { "TRCVDARCCTLR" , 1163 }, |
5993 | { "TRCVDCTLR" , 1164 }, |
5994 | { "TRCVDSACCTLR" , 1165 }, |
5995 | { "TRCVICTLR" , 1166 }, |
5996 | { "TRCVIIECTLR" , 1167 }, |
5997 | { "TRCVIPCSSCTLR" , 1168 }, |
5998 | { "TRCVISSCTLR" , 1169 }, |
5999 | { "TRCVMIDCCTLR0" , 1170 }, |
6000 | { "TRCVMIDCCTLR1" , 1171 }, |
6001 | { "TRCVMIDCVR0" , 1172 }, |
6002 | { "TRCVMIDCVR1" , 1173 }, |
6003 | { "TRCVMIDCVR2" , 1174 }, |
6004 | { "TRCVMIDCVR3" , 1175 }, |
6005 | { "TRCVMIDCVR4" , 1176 }, |
6006 | { "TRCVMIDCVR5" , 1177 }, |
6007 | { "TRCVMIDCVR6" , 1178 }, |
6008 | { "TRCVMIDCVR7" , 1179 }, |
6009 | { "TRFCR_EL1" , 1180 }, |
6010 | { "TRFCR_EL12" , 1181 }, |
6011 | { "TRFCR_EL2" , 1182 }, |
6012 | { "TTBR0_EL1" , 1183 }, |
6013 | { "TTBR0_EL12" , 1184 }, |
6014 | { "TTBR0_EL2" , 1185 }, |
6015 | { "TTBR0_EL3" , 1186 }, |
6016 | { "TTBR1_EL1" , 1187 }, |
6017 | { "TTBR1_EL12" , 1188 }, |
6018 | { "TTBR1_EL2" , 1189 }, |
6019 | { "UAO" , 1190 }, |
6020 | { "VBAR_EL1" , 1191 }, |
6021 | { "VBAR_EL12" , 1192 }, |
6022 | { "VBAR_EL2" , 1193 }, |
6023 | { "VBAR_EL3" , 1194 }, |
6024 | { "VDISR_EL2" , 1195 }, |
6025 | { "VDISR_EL3" , 1196 }, |
6026 | { "VMECID_A_EL2" , 1197 }, |
6027 | { "VMECID_P_EL2" , 1198 }, |
6028 | { "VMPIDR_EL2" , 1199 }, |
6029 | { "VNCR_EL2" , 1200 }, |
6030 | { "VPIDR_EL2" , 1201 }, |
6031 | { "VSCTLR_EL2" , 1202 }, |
6032 | { "VSESR_EL2" , 1203 }, |
6033 | { "VSESR_EL3" , 1204 }, |
6034 | { "VSTCR_EL2" , 1205 }, |
6035 | { "VSTTBR_EL2" , 1206 }, |
6036 | { "VTCR_EL2" , 1207 }, |
6037 | { "VTTBR_EL2" , 1208 }, |
6038 | { "ZCR_EL1" , 1209 }, |
6039 | { "ZCR_EL12" , 1210 }, |
6040 | { "ZCR_EL2" , 1211 }, |
6041 | { "ZCR_EL3" , 1212 }, |
6042 | }; |
6043 | |
6044 | struct KeyType { |
6045 | std::string Name; |
6046 | }; |
6047 | KeyType Key = {Name.upper()}; |
6048 | struct Comp { |
6049 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
6050 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
6051 | if (CmpName < 0) return true; |
6052 | if (CmpName > 0) return false; |
6053 | return false; |
6054 | } |
6055 | }; |
6056 | auto Table = ArrayRef(Index); |
6057 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
6058 | if (Idx == Table.end() || |
6059 | Key.Name != Idx->Name) |
6060 | return nullptr; |
6061 | |
6062 | return &SysRegsList[Idx->_index]; |
6063 | } |
6064 | |
6065 | const SysReg *lookupSysRegByEncoding(uint16_t Encoding) { |
6066 | struct IndexType { |
6067 | uint16_t Encoding; |
6068 | unsigned _index; |
6069 | }; |
6070 | static const struct IndexType Index[] = { |
6071 | { 0x8002, 572 }, |
6072 | { 0x8004, 291 }, |
6073 | { 0x8005, 275 }, |
6074 | { 0x8006, 330 }, |
6075 | { 0x8007, 314 }, |
6076 | { 0x800C, 298 }, |
6077 | { 0x800D, 282 }, |
6078 | { 0x800E, 337 }, |
6079 | { 0x800F, 321 }, |
6080 | { 0x8010, 531 }, |
6081 | { 0x8012, 536 }, |
6082 | { 0x8014, 299 }, |
6083 | { 0x8015, 283 }, |
6084 | { 0x8016, 338 }, |
6085 | { 0x8017, 322 }, |
6086 | { 0x801A, 573 }, |
6087 | { 0x801C, 300 }, |
6088 | { 0x801D, 284 }, |
6089 | { 0x801E, 339 }, |
6090 | { 0x801F, 323 }, |
6091 | { 0x8022, 537 }, |
6092 | { 0x8024, 301 }, |
6093 | { 0x8025, 285 }, |
6094 | { 0x8026, 340 }, |
6095 | { 0x8027, 324 }, |
6096 | { 0x802A, 538 }, |
6097 | { 0x802C, 302 }, |
6098 | { 0x802D, 286 }, |
6099 | { 0x802E, 341 }, |
6100 | { 0x802F, 325 }, |
6101 | { 0x8032, 574 }, |
6102 | { 0x8034, 303 }, |
6103 | { 0x8035, 287 }, |
6104 | { 0x8036, 342 }, |
6105 | { 0x8037, 326 }, |
6106 | { 0x803C, 304 }, |
6107 | { 0x803D, 288 }, |
6108 | { 0x803E, 343 }, |
6109 | { 0x803F, 327 }, |
6110 | { 0x8044, 305 }, |
6111 | { 0x8045, 289 }, |
6112 | { 0x8046, 344 }, |
6113 | { 0x8047, 328 }, |
6114 | { 0x804C, 306 }, |
6115 | { 0x804D, 290 }, |
6116 | { 0x804E, 345 }, |
6117 | { 0x804F, 329 }, |
6118 | { 0x8054, 292 }, |
6119 | { 0x8055, 276 }, |
6120 | { 0x8056, 331 }, |
6121 | { 0x8057, 315 }, |
6122 | { 0x805C, 293 }, |
6123 | { 0x805D, 277 }, |
6124 | { 0x805E, 332 }, |
6125 | { 0x805F, 316 }, |
6126 | { 0x8064, 294 }, |
6127 | { 0x8065, 278 }, |
6128 | { 0x8066, 333 }, |
6129 | { 0x8067, 317 }, |
6130 | { 0x806C, 295 }, |
6131 | { 0x806D, 279 }, |
6132 | { 0x806E, 334 }, |
6133 | { 0x806F, 318 }, |
6134 | { 0x8074, 296 }, |
6135 | { 0x8075, 280 }, |
6136 | { 0x8076, 335 }, |
6137 | { 0x8077, 319 }, |
6138 | { 0x807C, 297 }, |
6139 | { 0x807D, 281 }, |
6140 | { 0x807E, 336 }, |
6141 | { 0x807F, 320 }, |
6142 | { 0x8080, 535 }, |
6143 | { 0x8084, 575 }, |
6144 | { 0x808C, 576 }, |
6145 | { 0x809C, 571 }, |
6146 | { 0x80A4, 312 }, |
6147 | { 0x83C6, 308 }, |
6148 | { 0x83CE, 307 }, |
6149 | { 0x83F6, 274 }, |
6150 | { 0x84E8, 839 }, |
6151 | { 0x84E9, 840 }, |
6152 | { 0x84EB, 834 }, |
6153 | { 0x84EC, 910 }, |
6154 | { 0x84ED, 845 }, |
6155 | { 0x84EE, 844 }, |
6156 | { 0x84EF, 838 }, |
6157 | { 0x84F1, 912 }, |
6158 | { 0x84F2, 911 }, |
6159 | { 0x8740, 634 }, |
6160 | { 0x8741, 645 }, |
6161 | { 0x8742, 656 }, |
6162 | { 0x8743, 658 }, |
6163 | { 0x8744, 659 }, |
6164 | { 0x8745, 660 }, |
6165 | { 0x8746, 661 }, |
6166 | { 0x8747, 662 }, |
6167 | { 0x8748, 663 }, |
6168 | { 0x8749, 664 }, |
6169 | { 0x874A, 635 }, |
6170 | { 0x874B, 636 }, |
6171 | { 0x874C, 637 }, |
6172 | { 0x874D, 638 }, |
6173 | { 0x874E, 639 }, |
6174 | { 0x874F, 640 }, |
6175 | { 0x8750, 641 }, |
6176 | { 0x8751, 642 }, |
6177 | { 0x8752, 643 }, |
6178 | { 0x8753, 644 }, |
6179 | { 0x8754, 646 }, |
6180 | { 0x8755, 647 }, |
6181 | { 0x8756, 648 }, |
6182 | { 0x8757, 649 }, |
6183 | { 0x8758, 650 }, |
6184 | { 0x8759, 651 }, |
6185 | { 0x875A, 652 }, |
6186 | { 0x875B, 653 }, |
6187 | { 0x875C, 654 }, |
6188 | { 0x875D, 655 }, |
6189 | { 0x875E, 657 }, |
6190 | { 0x875F, 596 }, |
6191 | { 0x8760, 699 }, |
6192 | { 0x8801, 1161 }, |
6193 | { 0x8802, 1166 }, |
6194 | { 0x8804, 1129 }, |
6195 | { 0x8805, 1017 }, |
6196 | { 0x8806, 1066 }, |
6197 | { 0x8807, 1068 }, |
6198 | { 0x8808, 1095 }, |
6199 | { 0x8809, 1097 }, |
6200 | { 0x880A, 1167 }, |
6201 | { 0x880C, 1130 }, |
6202 | { 0x880D, 1018 }, |
6203 | { 0x880E, 1067 }, |
6204 | { 0x880F, 1069 }, |
6205 | { 0x8810, 1096 }, |
6206 | { 0x8811, 1080 }, |
6207 | { 0x8812, 1169 }, |
6208 | { 0x8814, 1131 }, |
6209 | { 0x8815, 1019 }, |
6210 | { 0x8816, 1056 }, |
6211 | { 0x8817, 1070 }, |
6212 | { 0x8818, 1159 }, |
6213 | { 0x881A, 1168 }, |
6214 | { 0x881D, 1020 }, |
6215 | { 0x881E, 1057 }, |
6216 | { 0x881F, 1071 }, |
6217 | { 0x8820, 1025 }, |
6218 | { 0x8825, 1013 }, |
6219 | { 0x8826, 1058 }, |
6220 | { 0x8827, 1072 }, |
6221 | { 0x882D, 1014 }, |
6222 | { 0x882E, 1059 }, |
6223 | { 0x882F, 1073 }, |
6224 | { 0x8830, 994 }, |
6225 | { 0x8834, 1132 }, |
6226 | { 0x8835, 1015 }, |
6227 | { 0x8837, 1074 }, |
6228 | { 0x883C, 1133 }, |
6229 | { 0x883D, 1016 }, |
6230 | { 0x883F, 1075 }, |
6231 | { 0x8840, 1047 }, |
6232 | { 0x8842, 1164 }, |
6233 | { 0x8844, 1049 }, |
6234 | { 0x8844, 1050 }, |
6235 | { 0x8845, 1021 }, |
6236 | { 0x8847, 1054 }, |
6237 | { 0x8848, 1048 }, |
6238 | { 0x884A, 1165 }, |
6239 | { 0x884C, 1051 }, |
6240 | { 0x884D, 1022 }, |
6241 | { 0x884F, 1055 }, |
6242 | { 0x8850, 1128 }, |
6243 | { 0x8852, 1163 }, |
6244 | { 0x8854, 1052 }, |
6245 | { 0x8855, 1023 }, |
6246 | { 0x8857, 1060 }, |
6247 | { 0x8858, 1158 }, |
6248 | { 0x885C, 1053 }, |
6249 | { 0x885D, 1024 }, |
6250 | { 0x885F, 1061 }, |
6251 | { 0x8860, 1162 }, |
6252 | { 0x8867, 1062 }, |
6253 | { 0x8868, 1160 }, |
6254 | { 0x886F, 1063 }, |
6255 | { 0x8870, 996 }, |
6256 | { 0x8877, 1064 }, |
6257 | { 0x8878, 995 }, |
6258 | { 0x887F, 1065 }, |
6259 | { 0x8881, 1104 }, |
6260 | { 0x8882, 1134 }, |
6261 | { 0x8883, 1150 }, |
6262 | { 0x8884, 1083 }, |
6263 | { 0x8889, 1105 }, |
6264 | { 0x888A, 1135 }, |
6265 | { 0x888B, 1151 }, |
6266 | { 0x888C, 1084 }, |
6267 | { 0x8890, 1108 }, |
6268 | { 0x8891, 1106 }, |
6269 | { 0x8892, 1136 }, |
6270 | { 0x8893, 1152 }, |
6271 | { 0x8898, 1119 }, |
6272 | { 0x8899, 1107 }, |
6273 | { 0x889A, 1137 }, |
6274 | { 0x889B, 1153 }, |
6275 | { 0x88A0, 1122 }, |
6276 | { 0x88A1, 1109 }, |
6277 | { 0x88A2, 1138 }, |
6278 | { 0x88A3, 1154 }, |
6279 | { 0x88A4, 1085 }, |
6280 | { 0x88A8, 1123 }, |
6281 | { 0x88A9, 1110 }, |
6282 | { 0x88AA, 1139 }, |
6283 | { 0x88AB, 1155 }, |
6284 | { 0x88AC, 1086 }, |
6285 | { 0x88B0, 1124 }, |
6286 | { 0x88B1, 1111 }, |
6287 | { 0x88B2, 1140 }, |
6288 | { 0x88B3, 1156 }, |
6289 | { 0x88B8, 1125 }, |
6290 | { 0x88B9, 1112 }, |
6291 | { 0x88BA, 1141 }, |
6292 | { 0x88BB, 1157 }, |
6293 | { 0x88C0, 1126 }, |
6294 | { 0x88C1, 1113 }, |
6295 | { 0x88C2, 1142 }, |
6296 | { 0x88C8, 1127 }, |
6297 | { 0x88C9, 1114 }, |
6298 | { 0x88CA, 1143 }, |
6299 | { 0x88D0, 1098 }, |
6300 | { 0x88D1, 1115 }, |
6301 | { 0x88D2, 1144 }, |
6302 | { 0x88D8, 1099 }, |
6303 | { 0x88D9, 1116 }, |
6304 | { 0x88DA, 1145 }, |
6305 | { 0x88E0, 1100 }, |
6306 | { 0x88E1, 1117 }, |
6307 | { 0x88E2, 1146 }, |
6308 | { 0x88E8, 1101 }, |
6309 | { 0x88E9, 1118 }, |
6310 | { 0x88EA, 1147 }, |
6311 | { 0x88F0, 1102 }, |
6312 | { 0x88F1, 1120 }, |
6313 | { 0x88F2, 1148 }, |
6314 | { 0x88F8, 1103 }, |
6315 | { 0x88F9, 1121 }, |
6316 | { 0x88FA, 1149 }, |
6317 | { 0x8900, 977 }, |
6318 | { 0x8901, 991 }, |
6319 | { 0x8902, 961 }, |
6320 | { 0x8903, 975 }, |
6321 | { 0x8904, 1039 }, |
6322 | { 0x8905, 1043 }, |
6323 | { 0x8906, 1031 }, |
6324 | { 0x8907, 1035 }, |
6325 | { 0x8910, 978 }, |
6326 | { 0x8911, 992 }, |
6327 | { 0x8912, 962 }, |
6328 | { 0x8913, 976 }, |
6329 | { 0x8920, 985 }, |
6330 | { 0x8921, 979 }, |
6331 | { 0x8922, 969 }, |
6332 | { 0x8923, 963 }, |
6333 | { 0x8924, 1040 }, |
6334 | { 0x8925, 1044 }, |
6335 | { 0x8926, 1032 }, |
6336 | { 0x8927, 1036 }, |
6337 | { 0x8930, 986 }, |
6338 | { 0x8931, 980 }, |
6339 | { 0x8932, 970 }, |
6340 | { 0x8933, 964 }, |
6341 | { 0x8940, 987 }, |
6342 | { 0x8941, 981 }, |
6343 | { 0x8942, 971 }, |
6344 | { 0x8943, 965 }, |
6345 | { 0x8944, 1041 }, |
6346 | { 0x8945, 1045 }, |
6347 | { 0x8946, 1033 }, |
6348 | { 0x8947, 1037 }, |
6349 | { 0x8950, 988 }, |
6350 | { 0x8951, 982 }, |
6351 | { 0x8952, 972 }, |
6352 | { 0x8953, 966 }, |
6353 | { 0x8960, 989 }, |
6354 | { 0x8961, 983 }, |
6355 | { 0x8962, 973 }, |
6356 | { 0x8963, 967 }, |
6357 | { 0x8964, 1042 }, |
6358 | { 0x8965, 1046 }, |
6359 | { 0x8966, 1034 }, |
6360 | { 0x8967, 1038 }, |
6361 | { 0x8970, 990 }, |
6362 | { 0x8971, 984 }, |
6363 | { 0x8972, 974 }, |
6364 | { 0x8973, 968 }, |
6365 | { 0x8980, 999 }, |
6366 | { 0x8981, 1172 }, |
6367 | { 0x8982, 997 }, |
6368 | { 0x898A, 998 }, |
6369 | { 0x8990, 1000 }, |
6370 | { 0x8991, 1173 }, |
6371 | { 0x8992, 1170 }, |
6372 | { 0x899A, 1171 }, |
6373 | { 0x89A0, 1001 }, |
6374 | { 0x89A1, 1174 }, |
6375 | { 0x89B0, 1002 }, |
6376 | { 0x89B1, 1175 }, |
6377 | { 0x89C0, 1003 }, |
6378 | { 0x89C1, 1176 }, |
6379 | { 0x89D0, 1004 }, |
6380 | { 0x89D1, 1177 }, |
6381 | { 0x89E0, 1005 }, |
6382 | { 0x89E1, 1178 }, |
6383 | { 0x89F0, 1006 }, |
6384 | { 0x89F1, 1179 }, |
6385 | { 0x8B84, 1076 }, |
6386 | { 0x8B97, 1029 }, |
6387 | { 0x8B9F, 1030 }, |
6388 | { 0x8BA7, 1091 }, |
6389 | { 0x8BAF, 1092 }, |
6390 | { 0x8BB7, 1093 }, |
6391 | { 0x8BBF, 1094 }, |
6392 | { 0x8BC6, 1012 }, |
6393 | { 0x8BC7, 1087 }, |
6394 | { 0x8BCE, 1011 }, |
6395 | { 0x8BCF, 1088 }, |
6396 | { 0x8BD6, 1026 }, |
6397 | { 0x8BD7, 1089 }, |
6398 | { 0x8BDE, 1027 }, |
6399 | { 0x8BDF, 1090 }, |
6400 | { 0x8BE6, 1081 }, |
6401 | { 0x8BE7, 1007 }, |
6402 | { 0x8BEE, 1082 }, |
6403 | { 0x8BEF, 1008 }, |
6404 | { 0x8BF6, 993 }, |
6405 | { 0x8BF7, 1009 }, |
6406 | { 0x8BFE, 1028 }, |
6407 | { 0x8BFF, 1010 }, |
6408 | { 0x8C00, 118 }, |
6409 | { 0x8C01, 151 }, |
6410 | { 0x8C02, 184 }, |
6411 | { 0x8C04, 125 }, |
6412 | { 0x8C05, 158 }, |
6413 | { 0x8C06, 191 }, |
6414 | { 0x8C08, 129 }, |
6415 | { 0x8C09, 162 }, |
6416 | { 0x8C0A, 195 }, |
6417 | { 0x8C0C, 126 }, |
6418 | { 0x8C0D, 159 }, |
6419 | { 0x8C0E, 192 }, |
6420 | { 0x8C10, 140 }, |
6421 | { 0x8C11, 173 }, |
6422 | { 0x8C12, 206 }, |
6423 | { 0x8C14, 127 }, |
6424 | { 0x8C15, 160 }, |
6425 | { 0x8C16, 193 }, |
6426 | { 0x8C18, 143 }, |
6427 | { 0x8C19, 176 }, |
6428 | { 0x8C1A, 209 }, |
6429 | { 0x8C1C, 128 }, |
6430 | { 0x8C1D, 161 }, |
6431 | { 0x8C1E, 194 }, |
6432 | { 0x8C20, 144 }, |
6433 | { 0x8C21, 177 }, |
6434 | { 0x8C22, 210 }, |
6435 | { 0x8C24, 130 }, |
6436 | { 0x8C25, 163 }, |
6437 | { 0x8C26, 196 }, |
6438 | { 0x8C28, 145 }, |
6439 | { 0x8C29, 178 }, |
6440 | { 0x8C2A, 211 }, |
6441 | { 0x8C2C, 131 }, |
6442 | { 0x8C2D, 164 }, |
6443 | { 0x8C2E, 197 }, |
6444 | { 0x8C30, 146 }, |
6445 | { 0x8C31, 179 }, |
6446 | { 0x8C32, 212 }, |
6447 | { 0x8C34, 132 }, |
6448 | { 0x8C35, 165 }, |
6449 | { 0x8C36, 198 }, |
6450 | { 0x8C38, 147 }, |
6451 | { 0x8C39, 180 }, |
6452 | { 0x8C3A, 213 }, |
6453 | { 0x8C3C, 133 }, |
6454 | { 0x8C3D, 166 }, |
6455 | { 0x8C3E, 199 }, |
6456 | { 0x8C40, 148 }, |
6457 | { 0x8C41, 181 }, |
6458 | { 0x8C42, 214 }, |
6459 | { 0x8C44, 134 }, |
6460 | { 0x8C45, 167 }, |
6461 | { 0x8C46, 200 }, |
6462 | { 0x8C48, 149 }, |
6463 | { 0x8C49, 182 }, |
6464 | { 0x8C4A, 215 }, |
6465 | { 0x8C4C, 135 }, |
6466 | { 0x8C4D, 168 }, |
6467 | { 0x8C4E, 201 }, |
6468 | { 0x8C50, 119 }, |
6469 | { 0x8C51, 152 }, |
6470 | { 0x8C52, 185 }, |
6471 | { 0x8C54, 136 }, |
6472 | { 0x8C55, 169 }, |
6473 | { 0x8C56, 202 }, |
6474 | { 0x8C58, 120 }, |
6475 | { 0x8C59, 153 }, |
6476 | { 0x8C5A, 186 }, |
6477 | { 0x8C5C, 137 }, |
6478 | { 0x8C5D, 170 }, |
6479 | { 0x8C5E, 203 }, |
6480 | { 0x8C60, 121 }, |
6481 | { 0x8C61, 154 }, |
6482 | { 0x8C62, 187 }, |
6483 | { 0x8C64, 138 }, |
6484 | { 0x8C65, 171 }, |
6485 | { 0x8C66, 204 }, |
6486 | { 0x8C68, 122 }, |
6487 | { 0x8C69, 155 }, |
6488 | { 0x8C6A, 188 }, |
6489 | { 0x8C6C, 139 }, |
6490 | { 0x8C6D, 172 }, |
6491 | { 0x8C6E, 205 }, |
6492 | { 0x8C70, 123 }, |
6493 | { 0x8C71, 156 }, |
6494 | { 0x8C72, 189 }, |
6495 | { 0x8C74, 141 }, |
6496 | { 0x8C75, 174 }, |
6497 | { 0x8C76, 207 }, |
6498 | { 0x8C78, 124 }, |
6499 | { 0x8C79, 157 }, |
6500 | { 0x8C7A, 190 }, |
6501 | { 0x8C7C, 142 }, |
6502 | { 0x8C7D, 175 }, |
6503 | { 0x8C7E, 208 }, |
6504 | { 0x8C80, 113 }, |
6505 | { 0x8C81, 116 }, |
6506 | { 0x8C82, 217 }, |
6507 | { 0x8C88, 150 }, |
6508 | { 0x8C89, 183 }, |
6509 | { 0x8C8A, 216 }, |
6510 | { 0x8C90, 117 }, |
6511 | { 0x9000, 941 }, |
6512 | { 0x9080, 942 }, |
6513 | { 0x9808, 532 }, |
6514 | { 0x9820, 311 }, |
6515 | { 0x9828, 309 }, |
6516 | { 0x9828, 310 }, |
6517 | { 0x9CE0, 843 }, |
6518 | { 0x9CE1, 842 }, |
6519 | { 0x9CE2, 841 }, |
6520 | { 0x9CE3, 913 }, |
6521 | { 0x9CE4, 918 }, |
6522 | { 0x9CE5, 917 }, |
6523 | { 0x9CF3, 914 }, |
6524 | { 0x9F00, 846 }, |
6525 | { 0x9F01, 853 }, |
6526 | { 0x9F02, 854 }, |
6527 | { 0x9F03, 855 }, |
6528 | { 0x9F04, 856 }, |
6529 | { 0x9F05, 857 }, |
6530 | { 0x9F06, 858 }, |
6531 | { 0x9F07, 859 }, |
6532 | { 0x9F08, 860 }, |
6533 | { 0x9F09, 861 }, |
6534 | { 0x9F0A, 847 }, |
6535 | { 0x9F0B, 848 }, |
6536 | { 0x9F0C, 849 }, |
6537 | { 0x9F0D, 850 }, |
6538 | { 0x9F0E, 851 }, |
6539 | { 0x9F0F, 852 }, |
6540 | { 0x9F10, 894 }, |
6541 | { 0x9F11, 901 }, |
6542 | { 0x9F12, 902 }, |
6543 | { 0x9F13, 903 }, |
6544 | { 0x9F14, 904 }, |
6545 | { 0x9F15, 905 }, |
6546 | { 0x9F16, 906 }, |
6547 | { 0x9F17, 907 }, |
6548 | { 0x9F18, 908 }, |
6549 | { 0x9F19, 909 }, |
6550 | { 0x9F1A, 895 }, |
6551 | { 0x9F1B, 896 }, |
6552 | { 0x9F1C, 897 }, |
6553 | { 0x9F1D, 898 }, |
6554 | { 0x9F1E, 899 }, |
6555 | { 0x9F1F, 900 }, |
6556 | { 0x9F20, 878 }, |
6557 | { 0x9F21, 885 }, |
6558 | { 0x9F22, 886 }, |
6559 | { 0x9F23, 887 }, |
6560 | { 0x9F24, 888 }, |
6561 | { 0x9F25, 889 }, |
6562 | { 0x9F26, 890 }, |
6563 | { 0x9F27, 891 }, |
6564 | { 0x9F28, 892 }, |
6565 | { 0x9F29, 893 }, |
6566 | { 0x9F2A, 879 }, |
6567 | { 0x9F2B, 880 }, |
6568 | { 0x9F2C, 881 }, |
6569 | { 0x9F2D, 882 }, |
6570 | { 0x9F2E, 883 }, |
6571 | { 0x9F2F, 884 }, |
6572 | { 0x9F30, 862 }, |
6573 | { 0x9F31, 869 }, |
6574 | { 0x9F32, 870 }, |
6575 | { 0x9F33, 871 }, |
6576 | { 0x9F34, 872 }, |
6577 | { 0x9F35, 873 }, |
6578 | { 0x9F36, 874 }, |
6579 | { 0x9F37, 875 }, |
6580 | { 0x9F38, 876 }, |
6581 | { 0x9F39, 877 }, |
6582 | { 0x9F3A, 863 }, |
6583 | { 0x9F3B, 864 }, |
6584 | { 0x9F3C, 865 }, |
6585 | { 0x9F3D, 866 }, |
6586 | { 0x9F3E, 867 }, |
6587 | { 0x9F3F, 868 }, |
6588 | { 0xA038, 313 }, |
6589 | { 0xA480, 115 }, |
6590 | { 0xA4EB, 836 }, |
6591 | { 0xAC80, 114 }, |
6592 | { 0xACEB, 835 }, |
6593 | { 0xB4EB, 837 }, |
6594 | { 0xB4F7, 915 }, |
6595 | { 0xBCF7, 916 }, |
6596 | { 0xC000, 546 }, |
6597 | { 0xC004, 565 }, |
6598 | { 0xC005, 564 }, |
6599 | { 0xC006, 799 }, |
6600 | { 0xC008, 513 }, |
6601 | { 0xC009, 514 }, |
6602 | { 0xC00A, 498 }, |
6603 | { 0xC00B, 497 }, |
6604 | { 0xC00C, 507 }, |
6605 | { 0xC00D, 508 }, |
6606 | { 0xC00E, 509 }, |
6607 | { 0xC00F, 510 }, |
6608 | { 0xC010, 500 }, |
6609 | { 0xC011, 501 }, |
6610 | { 0xC012, 502 }, |
6611 | { 0xC013, 503 }, |
6612 | { 0xC014, 504 }, |
6613 | { 0xC015, 505 }, |
6614 | { 0xC016, 511 }, |
6615 | { 0xC017, 506 }, |
6616 | { 0xC018, 567 }, |
6617 | { 0xC019, 568 }, |
6618 | { 0xC01A, 569 }, |
6619 | { 0xC01C, 515 }, |
6620 | { 0xC01D, 499 }, |
6621 | { 0xC01E, 512 }, |
6622 | { 0xC020, 492 }, |
6623 | { 0xC021, 493 }, |
6624 | { 0xC022, 494 }, |
6625 | { 0xC024, 496 }, |
6626 | { 0xC025, 495 }, |
6627 | { 0xC027, 482 }, |
6628 | { 0xC028, 479 }, |
6629 | { 0xC029, 480 }, |
6630 | { 0xC02A, 481 }, |
6631 | { 0xC02C, 477 }, |
6632 | { 0xC02D, 478 }, |
6633 | { 0xC030, 483 }, |
6634 | { 0xC031, 484 }, |
6635 | { 0xC032, 485 }, |
6636 | { 0xC033, 486 }, |
6637 | { 0xC038, 487 }, |
6638 | { 0xC039, 488 }, |
6639 | { 0xC03A, 489 }, |
6640 | { 0xC03B, 490 }, |
6641 | { 0xC03C, 491 }, |
6642 | { 0xC080, 816 }, |
6643 | { 0xC081, 1 }, |
6644 | { 0xC082, 264 }, |
6645 | { 0xC083, 812 }, |
6646 | { 0xC085, 800 }, |
6647 | { 0xC086, 382 }, |
6648 | { 0xC090, 1209 }, |
6649 | { 0xC091, 1180 }, |
6650 | { 0xC093, 1077 }, |
6651 | { 0xC094, 833 }, |
6652 | { 0xC096, 827 }, |
6653 | { 0xC100, 1183 }, |
6654 | { 0xC101, 1187 }, |
6655 | { 0xC102, 937 }, |
6656 | { 0xC103, 934 }, |
6657 | { 0xC108, 110 }, |
6658 | { 0xC109, 109 }, |
6659 | { 0xC10A, 112 }, |
6660 | { 0xC10B, 111 }, |
6661 | { 0xC110, 104 }, |
6662 | { 0xC111, 103 }, |
6663 | { 0xC112, 106 }, |
6664 | { 0xC113, 105 }, |
6665 | { 0xC118, 108 }, |
6666 | { 0xC119, 107 }, |
6667 | { 0xC128, 384 }, |
6668 | { 0xC129, 389 }, |
6669 | { 0xC12A, 383 }, |
6670 | { 0xC200, 921 }, |
6671 | { 0xC201, 351 }, |
6672 | { 0xC208, 928 }, |
6673 | { 0xC210, 919 }, |
6674 | { 0xC212, 271 }, |
6675 | { 0xC213, 577 }, |
6676 | { 0xC214, 1190 }, |
6677 | { 0xC218, 13 }, |
6678 | { 0xC219, 589 }, |
6679 | { 0xC230, 440 }, |
6680 | { 0xC288, 4 }, |
6681 | { 0xC289, 8 }, |
6682 | { 0xC290, 369 }, |
6683 | { 0xC298, 355 }, |
6684 | { 0xC299, 356 }, |
6685 | { 0xC29A, 360 }, |
6686 | { 0xC2A0, 359 }, |
6687 | { 0xC2A1, 358 }, |
6688 | { 0xC2A2, 368 }, |
6689 | { 0xC2A3, 357 }, |
6690 | { 0xC2A4, 367 }, |
6691 | { 0xC2A5, 366 }, |
6692 | { 0xC2A6, 365 }, |
6693 | { 0xC2A8, 361 }, |
6694 | { 0xC2A9, 362 }, |
6695 | { 0xC2AA, 363 }, |
6696 | { 0xC2AB, 364 }, |
6697 | { 0xC2B0, 944 }, |
6698 | { 0xC2B1, 943 }, |
6699 | { 0xC300, 373 }, |
6700 | { 0xC305, 579 }, |
6701 | { 0xC309, 761 }, |
6702 | { 0xC311, 795 }, |
6703 | { 0xC340, 759 }, |
6704 | { 0xC341, 793 }, |
6705 | { 0xC344, 741 }, |
6706 | { 0xC345, 775 }, |
6707 | { 0xC348, 743 }, |
6708 | { 0xC349, 777 }, |
6709 | { 0xC34C, 745 }, |
6710 | { 0xC34D, 779 }, |
6711 | { 0xC350, 747 }, |
6712 | { 0xC351, 781 }, |
6713 | { 0xC354, 749 }, |
6714 | { 0xC355, 783 }, |
6715 | { 0xC358, 751 }, |
6716 | { 0xC359, 785 }, |
6717 | { 0xC35C, 753 }, |
6718 | { 0xC35D, 787 }, |
6719 | { 0xC360, 755 }, |
6720 | { 0xC361, 789 }, |
6721 | { 0xC364, 757 }, |
6722 | { 0xC365, 791 }, |
6723 | { 0xC368, 729 }, |
6724 | { 0xC369, 763 }, |
6725 | { 0xC36C, 731 }, |
6726 | { 0xC36D, 765 }, |
6727 | { 0xC370, 733 }, |
6728 | { 0xC371, 767 }, |
6729 | { 0xC374, 735 }, |
6730 | { 0xC375, 769 }, |
6731 | { 0xC378, 737 }, |
6732 | { 0xC379, 771 }, |
6733 | { 0xC37C, 739 }, |
6734 | { 0xC37D, 773 }, |
6735 | { 0xC3A0, 578 }, |
6736 | { 0xC4C8, 705 }, |
6737 | { 0xC4C9, 716 }, |
6738 | { 0xC4CA, 712 }, |
6739 | { 0xC4CB, 714 }, |
6740 | { 0xC4CC, 711 }, |
6741 | { 0xC4CD, 710 }, |
6742 | { 0xC4CE, 715 }, |
6743 | { 0xC4CF, 713 }, |
6744 | { 0xC4D0, 591 }, |
6745 | { 0xC4D1, 592 }, |
6746 | { 0xC4D3, 593 }, |
6747 | { 0xC4D4, 708 }, |
6748 | { 0xC4D7, 590 }, |
6749 | { 0xC4D8, 956 }, |
6750 | { 0xC4D9, 958 }, |
6751 | { 0xC4DA, 954 }, |
6752 | { 0xC4DB, 959 }, |
6753 | { 0xC4DC, 957 }, |
6754 | { 0xC4DE, 960 }, |
6755 | { 0xC4DF, 955 }, |
6756 | { 0xC4EB, 717 }, |
6757 | { 0xC4F1, 701 }, |
6758 | { 0xC4F2, 700 }, |
6759 | { 0xC4F4, 719 }, |
6760 | { 0xC4F5, 602 }, |
6761 | { 0xC4F6, 702 }, |
6762 | { 0xC4F7, 696 }, |
6763 | { 0xC510, 527 }, |
6764 | { 0xC511, 523 }, |
6765 | { 0xC512, 582 }, |
6766 | { 0xC513, 585 }, |
6767 | { 0xC514, 725 }, |
6768 | { 0xC515, 810 }, |
6769 | { 0xC518, 18 }, |
6770 | { 0xC519, 14 }, |
6771 | { 0xC520, 522 }, |
6772 | { 0xC521, 519 }, |
6773 | { 0xC522, 521 }, |
6774 | { 0xC523, 518 }, |
6775 | { 0xC524, 553 }, |
6776 | { 0xC527, 520 }, |
6777 | { 0xC528, 548 }, |
6778 | { 0xC529, 547 }, |
6779 | { 0xC52B, 554 }, |
6780 | { 0xC600, 1191 }, |
6781 | { 0xC601, 806 }, |
6782 | { 0xC602, 801 }, |
6783 | { 0xC608, 517 }, |
6784 | { 0xC609, 347 }, |
6785 | { 0xC640, 434 }, |
6786 | { 0xC641, 430 }, |
6787 | { 0xC642, 432 }, |
6788 | { 0xC643, 425 }, |
6789 | { 0xC644, 416 }, |
6790 | { 0xC645, 417 }, |
6791 | { 0xC646, 418 }, |
6792 | { 0xC647, 419 }, |
6793 | { 0xC648, 420 }, |
6794 | { 0xC649, 421 }, |
6795 | { 0xC64A, 422 }, |
6796 | { 0xC64B, 423 }, |
6797 | { 0xC64D, 439 }, |
6798 | { 0xC659, 429 }, |
6799 | { 0xC65B, 441 }, |
6800 | { 0xC65D, 443 }, |
6801 | { 0xC65E, 424 }, |
6802 | { 0xC65F, 442 }, |
6803 | { 0xC660, 435 }, |
6804 | { 0xC661, 431 }, |
6805 | { 0xC662, 433 }, |
6806 | { 0xC663, 426 }, |
6807 | { 0xC664, 427 }, |
6808 | { 0xC665, 444 }, |
6809 | { 0xC666, 436 }, |
6810 | { 0xC667, 437 }, |
6811 | { 0xC681, 261 }, |
6812 | { 0xC683, 798 }, |
6813 | { 0xC684, 951 }, |
6814 | { 0xC685, 0 }, |
6815 | { 0xC686, 797 }, |
6816 | { 0xC687, 821 }, |
6817 | { 0xC708, 236 }, |
6818 | { 0xC800, 219 }, |
6819 | { 0xC801, 220 }, |
6820 | { 0xC802, 218 }, |
6821 | { 0xC804, 393 }, |
6822 | { 0xC806, 831 }, |
6823 | { 0xC807, 12 }, |
6824 | { 0xD000, 269 }, |
6825 | { 0xD801, 270 }, |
6826 | { 0xD807, 346 }, |
6827 | { 0xD920, 804 }, |
6828 | { 0xD921, 805 }, |
6829 | { 0xD929, 388 }, |
6830 | { 0xDA10, 570 }, |
6831 | { 0xDA11, 273 }, |
6832 | { 0xDA12, 932 }, |
6833 | { 0xDA15, 348 }, |
6834 | { 0xDA16, 931 }, |
6835 | { 0xDA17, 933 }, |
6836 | { 0xDA20, 378 }, |
6837 | { 0xDA21, 381 }, |
6838 | { 0xDA22, 380 }, |
6839 | { 0xDA28, 350 }, |
6840 | { 0xDA29, 349 }, |
6841 | { 0xDCA0, 698 }, |
6842 | { 0xDCB0, 697 }, |
6843 | { 0xDCE0, 601 }, |
6844 | { 0xDCE1, 600 }, |
6845 | { 0xDCE2, 599 }, |
6846 | { 0xDCE3, 703 }, |
6847 | { 0xDCE4, 718 }, |
6848 | { 0xDCE5, 709 }, |
6849 | { 0xDCE6, 597 }, |
6850 | { 0xDCE7, 598 }, |
6851 | { 0xDCE8, 595 }, |
6852 | { 0xDCE9, 722 }, |
6853 | { 0xDCEA, 721 }, |
6854 | { 0xDCEC, 723 }, |
6855 | { 0xDCF0, 720 }, |
6856 | { 0xDCF3, 704 }, |
6857 | { 0xDD14, 724 }, |
6858 | { 0xDE82, 950 }, |
6859 | { 0xDE83, 949 }, |
6860 | { 0xDE85, 948 }, |
6861 | { 0xDE87, 820 }, |
6862 | { 0xDE90, 29 }, |
6863 | { 0xDE91, 22 }, |
6864 | { 0xDE92, 24 }, |
6865 | { 0xDE93, 102 }, |
6866 | { 0xDE94, 25 }, |
6867 | { 0xDE95, 27 }, |
6868 | { 0xDE96, 23 }, |
6869 | { 0xDE98, 26 }, |
6870 | { 0xDE99, 28 }, |
6871 | { 0xDEA0, 30 }, |
6872 | { 0xDEA1, 31 }, |
6873 | { 0xDEA2, 32 }, |
6874 | { 0xDEA3, 33 }, |
6875 | { 0xDEB0, 82 }, |
6876 | { 0xDEB1, 83 }, |
6877 | { 0xDEB2, 84 }, |
6878 | { 0xDEB3, 85 }, |
6879 | { 0xDEE0, 34 }, |
6880 | { 0xDEE1, 41 }, |
6881 | { 0xDEE2, 42 }, |
6882 | { 0xDEE3, 43 }, |
6883 | { 0xDEE4, 44 }, |
6884 | { 0xDEE5, 45 }, |
6885 | { 0xDEE6, 46 }, |
6886 | { 0xDEE7, 47 }, |
6887 | { 0xDEE8, 48 }, |
6888 | { 0xDEE9, 49 }, |
6889 | { 0xDEEA, 35 }, |
6890 | { 0xDEEB, 36 }, |
6891 | { 0xDEEC, 37 }, |
6892 | { 0xDEED, 38 }, |
6893 | { 0xDEEE, 39 }, |
6894 | { 0xDEEF, 40 }, |
6895 | { 0xDEF0, 86 }, |
6896 | { 0xDEF1, 93 }, |
6897 | { 0xDEF2, 94 }, |
6898 | { 0xDEF3, 95 }, |
6899 | { 0xDEF4, 96 }, |
6900 | { 0xDEF5, 97 }, |
6901 | { 0xDEF6, 98 }, |
6902 | { 0xDEF7, 99 }, |
6903 | { 0xDEF8, 100 }, |
6904 | { 0xDEF9, 101 }, |
6905 | { 0xDEFA, 87 }, |
6906 | { 0xDEFB, 88 }, |
6907 | { 0xDEFC, 89 }, |
6908 | { 0xDEFD, 90 }, |
6909 | { 0xDEFE, 91 }, |
6910 | { 0xDEFF, 92 }, |
6911 | { 0xDF00, 221 }, |
6912 | { 0xDF01, 239 }, |
6913 | { 0xDF02, 252 }, |
6914 | { 0xDF05, 238 }, |
6915 | { 0xDF06, 251 }, |
6916 | { 0xDF10, 248 }, |
6917 | { 0xDF11, 244 }, |
6918 | { 0xDF12, 246 }, |
6919 | { 0xDF18, 259 }, |
6920 | { 0xDF19, 255 }, |
6921 | { 0xDF1A, 257 }, |
6922 | { 0xDF40, 603 }, |
6923 | { 0xDF41, 614 }, |
6924 | { 0xDF42, 625 }, |
6925 | { 0xDF43, 627 }, |
6926 | { 0xDF44, 628 }, |
6927 | { 0xDF45, 629 }, |
6928 | { 0xDF46, 630 }, |
6929 | { 0xDF47, 631 }, |
6930 | { 0xDF48, 632 }, |
6931 | { 0xDF49, 633 }, |
6932 | { 0xDF4A, 604 }, |
6933 | { 0xDF4B, 605 }, |
6934 | { 0xDF4C, 606 }, |
6935 | { 0xDF4D, 607 }, |
6936 | { 0xDF4E, 608 }, |
6937 | { 0xDF4F, 609 }, |
6938 | { 0xDF50, 610 }, |
6939 | { 0xDF51, 611 }, |
6940 | { 0xDF52, 612 }, |
6941 | { 0xDF53, 613 }, |
6942 | { 0xDF54, 615 }, |
6943 | { 0xDF55, 616 }, |
6944 | { 0xDF56, 617 }, |
6945 | { 0xDF57, 618 }, |
6946 | { 0xDF58, 619 }, |
6947 | { 0xDF59, 620 }, |
6948 | { 0xDF5A, 621 }, |
6949 | { 0xDF5B, 622 }, |
6950 | { 0xDF5C, 623 }, |
6951 | { 0xDF5D, 624 }, |
6952 | { 0xDF5E, 626 }, |
6953 | { 0xDF60, 665 }, |
6954 | { 0xDF61, 676 }, |
6955 | { 0xDF62, 687 }, |
6956 | { 0xDF63, 689 }, |
6957 | { 0xDF64, 690 }, |
6958 | { 0xDF65, 691 }, |
6959 | { 0xDF66, 692 }, |
6960 | { 0xDF67, 693 }, |
6961 | { 0xDF68, 694 }, |
6962 | { 0xDF69, 695 }, |
6963 | { 0xDF6A, 666 }, |
6964 | { 0xDF6B, 667 }, |
6965 | { 0xDF6C, 668 }, |
6966 | { 0xDF6D, 669 }, |
6967 | { 0xDF6E, 670 }, |
6968 | { 0xDF6F, 671 }, |
6969 | { 0xDF70, 672 }, |
6970 | { 0xDF71, 673 }, |
6971 | { 0xDF72, 674 }, |
6972 | { 0xDF73, 675 }, |
6973 | { 0xDF74, 677 }, |
6974 | { 0xDF75, 678 }, |
6975 | { 0xDF76, 679 }, |
6976 | { 0xDF77, 680 }, |
6977 | { 0xDF78, 681 }, |
6978 | { 0xDF79, 682 }, |
6979 | { 0xDF7A, 683 }, |
6980 | { 0xDF7B, 684 }, |
6981 | { 0xDF7C, 685 }, |
6982 | { 0xDF7D, 686 }, |
6983 | { 0xDF7E, 688 }, |
6984 | { 0xDF7F, 594 }, |
6985 | { 0xE000, 1201 }, |
6986 | { 0xE004, 566 }, |
6987 | { 0xE005, 1199 }, |
6988 | { 0xE080, 818 }, |
6989 | { 0xE081, 2 }, |
6990 | { 0xE083, 814 }, |
6991 | { 0xE088, 401 }, |
6992 | { 0xE089, 533 }, |
6993 | { 0xE08A, 267 }, |
6994 | { 0xE08B, 415 }, |
6995 | { 0xE08C, 411 }, |
6996 | { 0xE08D, 413 }, |
6997 | { 0xE08E, 409 }, |
6998 | { 0xE08F, 398 }, |
6999 | { 0xE090, 1211 }, |
7000 | { 0xE091, 1182 }, |
7001 | { 0xE092, 400 }, |
7002 | { 0xE093, 1079 }, |
7003 | { 0xE095, 832 }, |
7004 | { 0xE096, 829 }, |
7005 | { 0xE099, 825 }, |
7006 | { 0xE100, 1185 }, |
7007 | { 0xE100, 1202 }, |
7008 | { 0xE101, 1189 }, |
7009 | { 0xE102, 939 }, |
7010 | { 0xE103, 936 }, |
7011 | { 0xE108, 1208 }, |
7012 | { 0xE10A, 1207 }, |
7013 | { 0xE110, 1200 }, |
7014 | { 0xE11A, 402 }, |
7015 | { 0xE11B, 403 }, |
7016 | { 0xE11C, 396 }, |
7017 | { 0xE11D, 397 }, |
7018 | { 0xE128, 386 }, |
7019 | { 0xE129, 391 }, |
7020 | { 0xE130, 1206 }, |
7021 | { 0xE132, 1205 }, |
7022 | { 0xE180, 272 }, |
7023 | { 0xE188, 404 }, |
7024 | { 0xE189, 406 }, |
7025 | { 0xE18A, 410 }, |
7026 | { 0xE18B, 412 }, |
7027 | { 0xE18C, 405 }, |
7028 | { 0xE18D, 407 }, |
7029 | { 0xE18E, 399 }, |
7030 | { 0xE18F, 408 }, |
7031 | { 0xE200, 923 }, |
7032 | { 0xE201, 353 }, |
7033 | { 0xE208, 929 }, |
7034 | { 0xE218, 926 }, |
7035 | { 0xE219, 920 }, |
7036 | { 0xE21A, 927 }, |
7037 | { 0xE21B, 925 }, |
7038 | { 0xE281, 516 }, |
7039 | { 0xE288, 6 }, |
7040 | { 0xE289, 10 }, |
7041 | { 0xE290, 371 }, |
7042 | { 0xE293, 1203 }, |
7043 | { 0xE298, 379 }, |
7044 | { 0xE2B0, 946 }, |
7045 | { 0xE300, 375 }, |
7046 | { 0xE304, 414 }, |
7047 | { 0xE305, 581 }, |
7048 | { 0xE309, 762 }, |
7049 | { 0xE311, 796 }, |
7050 | { 0xE340, 760 }, |
7051 | { 0xE341, 794 }, |
7052 | { 0xE344, 742 }, |
7053 | { 0xE345, 776 }, |
7054 | { 0xE348, 744 }, |
7055 | { 0xE349, 778 }, |
7056 | { 0xE34C, 746 }, |
7057 | { 0xE34D, 780 }, |
7058 | { 0xE350, 748 }, |
7059 | { 0xE351, 782 }, |
7060 | { 0xE354, 750 }, |
7061 | { 0xE355, 784 }, |
7062 | { 0xE358, 752 }, |
7063 | { 0xE359, 786 }, |
7064 | { 0xE35C, 754 }, |
7065 | { 0xE35D, 788 }, |
7066 | { 0xE360, 756 }, |
7067 | { 0xE361, 790 }, |
7068 | { 0xE364, 758 }, |
7069 | { 0xE365, 792 }, |
7070 | { 0xE368, 730 }, |
7071 | { 0xE369, 764 }, |
7072 | { 0xE36C, 732 }, |
7073 | { 0xE36D, 766 }, |
7074 | { 0xE370, 734 }, |
7075 | { 0xE371, 768 }, |
7076 | { 0xE374, 736 }, |
7077 | { 0xE375, 770 }, |
7078 | { 0xE378, 738 }, |
7079 | { 0xE379, 772 }, |
7080 | { 0xE37C, 740 }, |
7081 | { 0xE37D, 774 }, |
7082 | { 0xE4C8, 707 }, |
7083 | { 0xE509, 525 }, |
7084 | { 0xE510, 529 }, |
7085 | { 0xE512, 584 }, |
7086 | { 0xE513, 587 }, |
7087 | { 0xE514, 727 }, |
7088 | { 0xE515, 809 }, |
7089 | { 0xE518, 20 }, |
7090 | { 0xE519, 16 }, |
7091 | { 0xE520, 552 }, |
7092 | { 0xE521, 563 }, |
7093 | { 0xE528, 550 }, |
7094 | { 0xE530, 555 }, |
7095 | { 0xE531, 556 }, |
7096 | { 0xE532, 557 }, |
7097 | { 0xE533, 558 }, |
7098 | { 0xE534, 559 }, |
7099 | { 0xE535, 560 }, |
7100 | { 0xE536, 561 }, |
7101 | { 0xE537, 562 }, |
7102 | { 0xE540, 542 }, |
7103 | { 0xE541, 540 }, |
7104 | { 0xE542, 543 }, |
7105 | { 0xE543, 541 }, |
7106 | { 0xE547, 539 }, |
7107 | { 0xE548, 1198 }, |
7108 | { 0xE549, 1197 }, |
7109 | { 0xE600, 1193 }, |
7110 | { 0xE601, 807 }, |
7111 | { 0xE602, 802 }, |
7112 | { 0xE609, 1195 }, |
7113 | { 0xE640, 447 }, |
7114 | { 0xE641, 448 }, |
7115 | { 0xE642, 449 }, |
7116 | { 0xE643, 450 }, |
7117 | { 0xE648, 451 }, |
7118 | { 0xE649, 452 }, |
7119 | { 0xE64A, 453 }, |
7120 | { 0xE64B, 454 }, |
7121 | { 0xE64D, 445 }, |
7122 | { 0xE658, 457 }, |
7123 | { 0xE659, 476 }, |
7124 | { 0xE65A, 474 }, |
7125 | { 0xE65B, 455 }, |
7126 | { 0xE65D, 456 }, |
7127 | { 0xE65F, 475 }, |
7128 | { 0xE660, 458 }, |
7129 | { 0xE661, 465 }, |
7130 | { 0xE662, 466 }, |
7131 | { 0xE663, 467 }, |
7132 | { 0xE664, 468 }, |
7133 | { 0xE665, 469 }, |
7134 | { 0xE666, 470 }, |
7135 | { 0xE667, 471 }, |
7136 | { 0xE668, 472 }, |
7137 | { 0xE669, 473 }, |
7138 | { 0xE66A, 459 }, |
7139 | { 0xE66B, 460 }, |
7140 | { 0xE66C, 461 }, |
7141 | { 0xE66D, 462 }, |
7142 | { 0xE66E, 463 }, |
7143 | { 0xE66F, 464 }, |
7144 | { 0xE681, 263 }, |
7145 | { 0xE682, 952 }, |
7146 | { 0xE687, 823 }, |
7147 | { 0xE6C0, 50 }, |
7148 | { 0xE6C1, 57 }, |
7149 | { 0xE6C2, 58 }, |
7150 | { 0xE6C3, 59 }, |
7151 | { 0xE6C4, 60 }, |
7152 | { 0xE6C5, 61 }, |
7153 | { 0xE6C6, 62 }, |
7154 | { 0xE6C7, 63 }, |
7155 | { 0xE6C8, 64 }, |
7156 | { 0xE6C9, 65 }, |
7157 | { 0xE6CA, 51 }, |
7158 | { 0xE6CB, 52 }, |
7159 | { 0xE6CC, 53 }, |
7160 | { 0xE6CD, 54 }, |
7161 | { 0xE6CE, 55 }, |
7162 | { 0xE6CF, 56 }, |
7163 | { 0xE6D0, 66 }, |
7164 | { 0xE6D1, 73 }, |
7165 | { 0xE6D2, 74 }, |
7166 | { 0xE6D3, 75 }, |
7167 | { 0xE6D4, 76 }, |
7168 | { 0xE6D5, 77 }, |
7169 | { 0xE6D6, 78 }, |
7170 | { 0xE6D7, 79 }, |
7171 | { 0xE6D8, 80 }, |
7172 | { 0xE6D9, 81 }, |
7173 | { 0xE6DA, 67 }, |
7174 | { 0xE6DB, 68 }, |
7175 | { 0xE6DC, 69 }, |
7176 | { 0xE6DD, 70 }, |
7177 | { 0xE6DE, 71 }, |
7178 | { 0xE6DF, 72 }, |
7179 | { 0xE703, 254 }, |
7180 | { 0xE704, 250 }, |
7181 | { 0xE705, 235 }, |
7182 | { 0xE706, 240 }, |
7183 | { 0xE707, 253 }, |
7184 | { 0xE708, 222 }, |
7185 | { 0xE710, 228 }, |
7186 | { 0xE711, 226 }, |
7187 | { 0xE712, 227 }, |
7188 | { 0xE718, 234 }, |
7189 | { 0xE719, 232 }, |
7190 | { 0xE71A, 233 }, |
7191 | { 0xE720, 231 }, |
7192 | { 0xE721, 229 }, |
7193 | { 0xE722, 230 }, |
7194 | { 0xE728, 225 }, |
7195 | { 0xE729, 223 }, |
7196 | { 0xE72A, 224 }, |
7197 | { 0xE880, 817 }, |
7198 | { 0xE882, 265 }, |
7199 | { 0xE883, 813 }, |
7200 | { 0xE890, 1210 }, |
7201 | { 0xE891, 1181 }, |
7202 | { 0xE893, 1078 }, |
7203 | { 0xE896, 828 }, |
7204 | { 0xE900, 1184 }, |
7205 | { 0xE901, 1188 }, |
7206 | { 0xE902, 938 }, |
7207 | { 0xE903, 935 }, |
7208 | { 0xE928, 385 }, |
7209 | { 0xE929, 390 }, |
7210 | { 0xEA00, 922 }, |
7211 | { 0xEA01, 352 }, |
7212 | { 0xEA88, 5 }, |
7213 | { 0xEA89, 9 }, |
7214 | { 0xEA90, 370 }, |
7215 | { 0xEAB0, 945 }, |
7216 | { 0xEB00, 374 }, |
7217 | { 0xEB05, 580 }, |
7218 | { 0xECC8, 706 }, |
7219 | { 0xED10, 528 }, |
7220 | { 0xED11, 524 }, |
7221 | { 0xED12, 583 }, |
7222 | { 0xED13, 586 }, |
7223 | { 0xED14, 726 }, |
7224 | { 0xED18, 19 }, |
7225 | { 0xED19, 15 }, |
7226 | { 0xED28, 549 }, |
7227 | { 0xEE00, 1192 }, |
7228 | { 0xEE81, 262 }, |
7229 | { 0xEE87, 822 }, |
7230 | { 0xEF08, 237 }, |
7231 | { 0xEF10, 249 }, |
7232 | { 0xEF11, 245 }, |
7233 | { 0xEF12, 247 }, |
7234 | { 0xEF18, 260 }, |
7235 | { 0xEF19, 256 }, |
7236 | { 0xEF1A, 258 }, |
7237 | { 0xF080, 819 }, |
7238 | { 0xF081, 3 }, |
7239 | { 0xF083, 815 }, |
7240 | { 0xF088, 811 }, |
7241 | { 0xF089, 826 }, |
7242 | { 0xF08A, 268 }, |
7243 | { 0xF08D, 377 }, |
7244 | { 0xF090, 1212 }, |
7245 | { 0xF096, 830 }, |
7246 | { 0xF099, 534 }, |
7247 | { 0xF100, 1186 }, |
7248 | { 0xF102, 940 }, |
7249 | { 0xF10C, 395 }, |
7250 | { 0xF10E, 394 }, |
7251 | { 0xF128, 387 }, |
7252 | { 0xF129, 392 }, |
7253 | { 0xF200, 924 }, |
7254 | { 0xF201, 354 }, |
7255 | { 0xF208, 930 }, |
7256 | { 0xF288, 7 }, |
7257 | { 0xF289, 11 }, |
7258 | { 0xF290, 372 }, |
7259 | { 0xF293, 1204 }, |
7260 | { 0xF2B0, 947 }, |
7261 | { 0xF300, 376 }, |
7262 | { 0xF305, 545 }, |
7263 | { 0xF509, 526 }, |
7264 | { 0xF510, 530 }, |
7265 | { 0xF513, 588 }, |
7266 | { 0xF514, 728 }, |
7267 | { 0xF518, 21 }, |
7268 | { 0xF519, 17 }, |
7269 | { 0xF528, 551 }, |
7270 | { 0xF551, 544 }, |
7271 | { 0xF600, 1194 }, |
7272 | { 0xF601, 808 }, |
7273 | { 0xF602, 803 }, |
7274 | { 0xF609, 1196 }, |
7275 | { 0xF664, 428 }, |
7276 | { 0xF665, 446 }, |
7277 | { 0xF667, 438 }, |
7278 | { 0xF682, 953 }, |
7279 | { 0xF687, 824 }, |
7280 | { 0xFF10, 243 }, |
7281 | { 0xFF11, 241 }, |
7282 | { 0xFF12, 242 }, |
7283 | { 0xFF90, 266 }, |
7284 | }; |
7285 | |
7286 | struct KeyType { |
7287 | uint16_t Encoding; |
7288 | }; |
7289 | KeyType Key = {Encoding}; |
7290 | struct Comp { |
7291 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
7292 | if (LHS.Encoding < RHS.Encoding) |
7293 | return true; |
7294 | if (LHS.Encoding > RHS.Encoding) |
7295 | return false; |
7296 | return false; |
7297 | } |
7298 | }; |
7299 | auto Table = ArrayRef(Index); |
7300 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
7301 | if (Idx == Table.end() || |
7302 | Key.Encoding != Idx->Encoding) |
7303 | return nullptr; |
7304 | |
7305 | return &SysRegsList[Idx->_index]; |
7306 | } |
7307 | #endif |
7308 | |
7309 | #ifdef GET_TSB_DECL |
7310 | const TSB *lookupTSBByName(StringRef Name); |
7311 | const TSB *lookupTSBByEncoding(uint8_t Encoding); |
7312 | #endif |
7313 | |
7314 | #ifdef GET_TSB_IMPL |
7315 | constexpr TSB TSBsList[] = { |
7316 | { "csync" , 0x0, {AArch64::FeatureTRACEV8_4} }, // 0 |
7317 | }; |
7318 | |
7319 | const TSB *lookupTSBByName(StringRef Name) { |
7320 | struct IndexType { |
7321 | const char * Name; |
7322 | unsigned _index; |
7323 | }; |
7324 | static const struct IndexType Index[] = { |
7325 | { "CSYNC" , 0 }, |
7326 | }; |
7327 | |
7328 | struct KeyType { |
7329 | std::string Name; |
7330 | }; |
7331 | KeyType Key = {Name.upper()}; |
7332 | struct Comp { |
7333 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
7334 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
7335 | if (CmpName < 0) return true; |
7336 | if (CmpName > 0) return false; |
7337 | return false; |
7338 | } |
7339 | }; |
7340 | auto Table = ArrayRef(Index); |
7341 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
7342 | if (Idx == Table.end() || |
7343 | Key.Name != Idx->Name) |
7344 | return nullptr; |
7345 | |
7346 | return &TSBsList[Idx->_index]; |
7347 | } |
7348 | |
7349 | const TSB *lookupTSBByEncoding(uint8_t Encoding) { |
7350 | struct IndexType { |
7351 | uint8_t Encoding; |
7352 | unsigned _index; |
7353 | }; |
7354 | static const struct IndexType Index[] = { |
7355 | { 0x0, 0 }, |
7356 | }; |
7357 | |
7358 | if ((Encoding < 0x0) || |
7359 | (Encoding > 0x0)) |
7360 | return nullptr; |
7361 | auto Table = ArrayRef(Index); |
7362 | size_t Idx = Encoding - 0x0; |
7363 | return &TSBsList[Table[Idx]._index]; |
7364 | } |
7365 | #endif |
7366 | |
7367 | #undef GET_AT_DECL |
7368 | #undef GET_AT_IMPL |
7369 | #undef GET_BTI_DECL |
7370 | #undef GET_BTI_IMPL |
7371 | #undef GET_DBNXS_DECL |
7372 | #undef GET_DBNXS_IMPL |
7373 | #undef GET_DB_DECL |
7374 | #undef GET_DB_IMPL |
7375 | #undef GET_DC_DECL |
7376 | #undef GET_DC_IMPL |
7377 | #undef GET_EXACTFPIMM_DECL |
7378 | #undef GET_EXACTFPIMM_IMPL |
7379 | #undef GET_IC_DECL |
7380 | #undef GET_IC_IMPL |
7381 | #undef GET_ISB_DECL |
7382 | #undef GET_ISB_IMPL |
7383 | #undef GET_PRFM_DECL |
7384 | #undef GET_PRFM_IMPL |
7385 | #undef GET_PSB_DECL |
7386 | #undef GET_PSB_IMPL |
7387 | #undef GET_PSTATEIMM0_15_DECL |
7388 | #undef GET_PSTATEIMM0_15_IMPL |
7389 | #undef GET_PSTATEIMM0_1_DECL |
7390 | #undef GET_PSTATEIMM0_1_IMPL |
7391 | #undef GET_RPRFM_DECL |
7392 | #undef GET_RPRFM_IMPL |
7393 | #undef GET_SVCR_DECL |
7394 | #undef GET_SVCR_IMPL |
7395 | #undef GET_SVEPREDPAT_DECL |
7396 | #undef GET_SVEPREDPAT_IMPL |
7397 | #undef GET_SVEPRFM_DECL |
7398 | #undef GET_SVEPRFM_IMPL |
7399 | #undef GET_SVEVECLENSPECIFIER_DECL |
7400 | #undef GET_SVEVECLENSPECIFIER_IMPL |
7401 | #undef GET_SYSREG_DECL |
7402 | #undef GET_SYSREG_IMPL |
7403 | #undef GET_TLBITable_DECL |
7404 | #undef GET_TLBITable_IMPL |
7405 | #undef GET_TSB_DECL |
7406 | #undef GET_TSB_IMPL |
7407 | |