1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_REGINFO_ENUM
11#undef GET_REGINFO_ENUM
12
13namespace llvm {
14
15class MCRegisterClass;
16extern const MCRegisterClass ARMMCRegisterClasses[];
17
18namespace ARM {
19enum {
20 NoRegister,
21 APSR = 1,
22 APSR_NZCV = 2,
23 CPSR = 3,
24 FPCXTNS = 4,
25 FPCXTS = 5,
26 FPEXC = 6,
27 FPINST = 7,
28 FPSCR = 8,
29 FPSCR_NZCV = 9,
30 FPSCR_NZCVQC = 10,
31 FPSID = 11,
32 ITSTATE = 12,
33 LR = 13,
34 PC = 14,
35 RA_AUTH_CODE = 15,
36 SP = 16,
37 SPSR = 17,
38 VPR = 18,
39 ZR = 19,
40 D0 = 20,
41 D1 = 21,
42 D2 = 22,
43 D3 = 23,
44 D4 = 24,
45 D5 = 25,
46 D6 = 26,
47 D7 = 27,
48 D8 = 28,
49 D9 = 29,
50 D10 = 30,
51 D11 = 31,
52 D12 = 32,
53 D13 = 33,
54 D14 = 34,
55 D15 = 35,
56 D16 = 36,
57 D17 = 37,
58 D18 = 38,
59 D19 = 39,
60 D20 = 40,
61 D21 = 41,
62 D22 = 42,
63 D23 = 43,
64 D24 = 44,
65 D25 = 45,
66 D26 = 46,
67 D27 = 47,
68 D28 = 48,
69 D29 = 49,
70 D30 = 50,
71 D31 = 51,
72 FPINST2 = 52,
73 MVFR0 = 53,
74 MVFR1 = 54,
75 MVFR2 = 55,
76 P0 = 56,
77 Q0 = 57,
78 Q1 = 58,
79 Q2 = 59,
80 Q3 = 60,
81 Q4 = 61,
82 Q5 = 62,
83 Q6 = 63,
84 Q7 = 64,
85 Q8 = 65,
86 Q9 = 66,
87 Q10 = 67,
88 Q11 = 68,
89 Q12 = 69,
90 Q13 = 70,
91 Q14 = 71,
92 Q15 = 72,
93 R0 = 73,
94 R1 = 74,
95 R2 = 75,
96 R3 = 76,
97 R4 = 77,
98 R5 = 78,
99 R6 = 79,
100 R7 = 80,
101 R8 = 81,
102 R9 = 82,
103 R10 = 83,
104 R11 = 84,
105 R12 = 85,
106 S0 = 86,
107 S1 = 87,
108 S2 = 88,
109 S3 = 89,
110 S4 = 90,
111 S5 = 91,
112 S6 = 92,
113 S7 = 93,
114 S8 = 94,
115 S9 = 95,
116 S10 = 96,
117 S11 = 97,
118 S12 = 98,
119 S13 = 99,
120 S14 = 100,
121 S15 = 101,
122 S16 = 102,
123 S17 = 103,
124 S18 = 104,
125 S19 = 105,
126 S20 = 106,
127 S21 = 107,
128 S22 = 108,
129 S23 = 109,
130 S24 = 110,
131 S25 = 111,
132 S26 = 112,
133 S27 = 113,
134 S28 = 114,
135 S29 = 115,
136 S30 = 116,
137 S31 = 117,
138 D0_D2 = 118,
139 D1_D3 = 119,
140 D2_D4 = 120,
141 D3_D5 = 121,
142 D4_D6 = 122,
143 D5_D7 = 123,
144 D6_D8 = 124,
145 D7_D9 = 125,
146 D8_D10 = 126,
147 D9_D11 = 127,
148 D10_D12 = 128,
149 D11_D13 = 129,
150 D12_D14 = 130,
151 D13_D15 = 131,
152 D14_D16 = 132,
153 D15_D17 = 133,
154 D16_D18 = 134,
155 D17_D19 = 135,
156 D18_D20 = 136,
157 D19_D21 = 137,
158 D20_D22 = 138,
159 D21_D23 = 139,
160 D22_D24 = 140,
161 D23_D25 = 141,
162 D24_D26 = 142,
163 D25_D27 = 143,
164 D26_D28 = 144,
165 D27_D29 = 145,
166 D28_D30 = 146,
167 D29_D31 = 147,
168 Q0_Q1 = 148,
169 Q1_Q2 = 149,
170 Q2_Q3 = 150,
171 Q3_Q4 = 151,
172 Q4_Q5 = 152,
173 Q5_Q6 = 153,
174 Q6_Q7 = 154,
175 Q7_Q8 = 155,
176 Q8_Q9 = 156,
177 Q9_Q10 = 157,
178 Q10_Q11 = 158,
179 Q11_Q12 = 159,
180 Q12_Q13 = 160,
181 Q13_Q14 = 161,
182 Q14_Q15 = 162,
183 Q0_Q1_Q2_Q3 = 163,
184 Q1_Q2_Q3_Q4 = 164,
185 Q2_Q3_Q4_Q5 = 165,
186 Q3_Q4_Q5_Q6 = 166,
187 Q4_Q5_Q6_Q7 = 167,
188 Q5_Q6_Q7_Q8 = 168,
189 Q6_Q7_Q8_Q9 = 169,
190 Q7_Q8_Q9_Q10 = 170,
191 Q8_Q9_Q10_Q11 = 171,
192 Q9_Q10_Q11_Q12 = 172,
193 Q10_Q11_Q12_Q13 = 173,
194 Q11_Q12_Q13_Q14 = 174,
195 Q12_Q13_Q14_Q15 = 175,
196 R0_R1 = 176,
197 R2_R3 = 177,
198 R4_R5 = 178,
199 R6_R7 = 179,
200 R8_R9 = 180,
201 R10_R11 = 181,
202 R12_SP = 182,
203 D0_D1_D2 = 183,
204 D1_D2_D3 = 184,
205 D2_D3_D4 = 185,
206 D3_D4_D5 = 186,
207 D4_D5_D6 = 187,
208 D5_D6_D7 = 188,
209 D6_D7_D8 = 189,
210 D7_D8_D9 = 190,
211 D8_D9_D10 = 191,
212 D9_D10_D11 = 192,
213 D10_D11_D12 = 193,
214 D11_D12_D13 = 194,
215 D12_D13_D14 = 195,
216 D13_D14_D15 = 196,
217 D14_D15_D16 = 197,
218 D15_D16_D17 = 198,
219 D16_D17_D18 = 199,
220 D17_D18_D19 = 200,
221 D18_D19_D20 = 201,
222 D19_D20_D21 = 202,
223 D20_D21_D22 = 203,
224 D21_D22_D23 = 204,
225 D22_D23_D24 = 205,
226 D23_D24_D25 = 206,
227 D24_D25_D26 = 207,
228 D25_D26_D27 = 208,
229 D26_D27_D28 = 209,
230 D27_D28_D29 = 210,
231 D28_D29_D30 = 211,
232 D29_D30_D31 = 212,
233 D0_D2_D4 = 213,
234 D1_D3_D5 = 214,
235 D2_D4_D6 = 215,
236 D3_D5_D7 = 216,
237 D4_D6_D8 = 217,
238 D5_D7_D9 = 218,
239 D6_D8_D10 = 219,
240 D7_D9_D11 = 220,
241 D8_D10_D12 = 221,
242 D9_D11_D13 = 222,
243 D10_D12_D14 = 223,
244 D11_D13_D15 = 224,
245 D12_D14_D16 = 225,
246 D13_D15_D17 = 226,
247 D14_D16_D18 = 227,
248 D15_D17_D19 = 228,
249 D16_D18_D20 = 229,
250 D17_D19_D21 = 230,
251 D18_D20_D22 = 231,
252 D19_D21_D23 = 232,
253 D20_D22_D24 = 233,
254 D21_D23_D25 = 234,
255 D22_D24_D26 = 235,
256 D23_D25_D27 = 236,
257 D24_D26_D28 = 237,
258 D25_D27_D29 = 238,
259 D26_D28_D30 = 239,
260 D27_D29_D31 = 240,
261 D0_D2_D4_D6 = 241,
262 D1_D3_D5_D7 = 242,
263 D2_D4_D6_D8 = 243,
264 D3_D5_D7_D9 = 244,
265 D4_D6_D8_D10 = 245,
266 D5_D7_D9_D11 = 246,
267 D6_D8_D10_D12 = 247,
268 D7_D9_D11_D13 = 248,
269 D8_D10_D12_D14 = 249,
270 D9_D11_D13_D15 = 250,
271 D10_D12_D14_D16 = 251,
272 D11_D13_D15_D17 = 252,
273 D12_D14_D16_D18 = 253,
274 D13_D15_D17_D19 = 254,
275 D14_D16_D18_D20 = 255,
276 D15_D17_D19_D21 = 256,
277 D16_D18_D20_D22 = 257,
278 D17_D19_D21_D23 = 258,
279 D18_D20_D22_D24 = 259,
280 D19_D21_D23_D25 = 260,
281 D20_D22_D24_D26 = 261,
282 D21_D23_D25_D27 = 262,
283 D22_D24_D26_D28 = 263,
284 D23_D25_D27_D29 = 264,
285 D24_D26_D28_D30 = 265,
286 D25_D27_D29_D31 = 266,
287 D1_D2 = 267,
288 D3_D4 = 268,
289 D5_D6 = 269,
290 D7_D8 = 270,
291 D9_D10 = 271,
292 D11_D12 = 272,
293 D13_D14 = 273,
294 D15_D16 = 274,
295 D17_D18 = 275,
296 D19_D20 = 276,
297 D21_D22 = 277,
298 D23_D24 = 278,
299 D25_D26 = 279,
300 D27_D28 = 280,
301 D29_D30 = 281,
302 D1_D2_D3_D4 = 282,
303 D3_D4_D5_D6 = 283,
304 D5_D6_D7_D8 = 284,
305 D7_D8_D9_D10 = 285,
306 D9_D10_D11_D12 = 286,
307 D11_D12_D13_D14 = 287,
308 D13_D14_D15_D16 = 288,
309 D15_D16_D17_D18 = 289,
310 D17_D18_D19_D20 = 290,
311 D19_D20_D21_D22 = 291,
312 D21_D22_D23_D24 = 292,
313 D23_D24_D25_D26 = 293,
314 D25_D26_D27_D28 = 294,
315 D27_D28_D29_D30 = 295,
316 NUM_TARGET_REGS // 296
317};
318} // end namespace ARM
319
320// Register classes
321
322namespace ARM {
323enum {
324 HPRRegClassID = 0,
325 FPWithVPRRegClassID = 1,
326 SPRRegClassID = 2,
327 FPWithVPR_with_ssub_0RegClassID = 3,
328 GPRRegClassID = 4,
329 GPRwithAPSRRegClassID = 5,
330 GPRwithZRRegClassID = 6,
331 SPR_8RegClassID = 7,
332 GPRnopcRegClassID = 8,
333 GPRnospRegClassID = 9,
334 GPRwithAPSR_NZCVnospRegClassID = 10,
335 GPRwithAPSRnospRegClassID = 11,
336 GPRwithZRnospRegClassID = 12,
337 GPRnoipRegClassID = 13,
338 rGPRRegClassID = 14,
339 GPRnoip_and_GPRnopcRegClassID = 15,
340 GPRnoip_and_GPRnospRegClassID = 16,
341 GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID = 17,
342 tGPRwithpcRegClassID = 18,
343 FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID = 19,
344 hGPRRegClassID = 20,
345 tGPRRegClassID = 21,
346 tGPREvenRegClassID = 22,
347 GPRnopc_and_hGPRRegClassID = 23,
348 GPRnosp_and_hGPRRegClassID = 24,
349 GPRnoip_and_hGPRRegClassID = 25,
350 GPRnoip_and_tGPREvenRegClassID = 26,
351 GPRnosp_and_GPRnopc_and_hGPRRegClassID = 27,
352 tGPROddRegClassID = 28,
353 GPRnopc_and_GPRnoip_and_hGPRRegClassID = 29,
354 GPRnosp_and_GPRnoip_and_hGPRRegClassID = 30,
355 tcGPRRegClassID = 31,
356 GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID = 32,
357 hGPR_and_tGPREvenRegClassID = 33,
358 tGPR_and_tGPREvenRegClassID = 34,
359 tGPR_and_tGPROddRegClassID = 35,
360 tcGPRnotr12RegClassID = 36,
361 tGPREven_and_tcGPRRegClassID = 37,
362 hGPR_and_GPRnoip_and_tGPREvenRegClassID = 38,
363 hGPR_and_tGPROddRegClassID = 39,
364 tGPREven_and_tcGPRnotr12RegClassID = 40,
365 tGPROdd_and_tcGPRRegClassID = 41,
366 CCRRegClassID = 42,
367 FPCXTRegsRegClassID = 43,
368 GPRlrRegClassID = 44,
369 GPRspRegClassID = 45,
370 VCCRRegClassID = 46,
371 cl_FPSCR_NZCVRegClassID = 47,
372 hGPR_and_tGPRwithpcRegClassID = 48,
373 hGPR_and_tcGPRRegClassID = 49,
374 DPRRegClassID = 50,
375 DPR_VFP2RegClassID = 51,
376 DPR_8RegClassID = 52,
377 GPRPairRegClassID = 53,
378 GPRPairnospRegClassID = 54,
379 GPRPair_with_gsub_0_in_tGPRRegClassID = 55,
380 GPRPair_with_gsub_0_in_hGPRRegClassID = 56,
381 GPRPair_with_gsub_0_in_tcGPRRegClassID = 57,
382 GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID = 58,
383 GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID = 59,
384 GPRPair_with_gsub_1_in_GPRspRegClassID = 60,
385 DPairSpcRegClassID = 61,
386 DPairSpc_with_ssub_0RegClassID = 62,
387 DPairSpc_with_ssub_4RegClassID = 63,
388 DPairSpc_with_dsub_0_in_DPR_8RegClassID = 64,
389 DPairSpc_with_dsub_2_in_DPR_8RegClassID = 65,
390 DPairRegClassID = 66,
391 DPair_with_ssub_0RegClassID = 67,
392 QPRRegClassID = 68,
393 DPair_with_ssub_2RegClassID = 69,
394 DPair_with_dsub_0_in_DPR_8RegClassID = 70,
395 MQPRRegClassID = 71,
396 QPR_VFP2RegClassID = 72,
397 DPair_with_dsub_1_in_DPR_8RegClassID = 73,
398 QPR_8RegClassID = 74,
399 DTripleRegClassID = 75,
400 DTripleSpcRegClassID = 76,
401 DTripleSpc_with_ssub_0RegClassID = 77,
402 DTriple_with_ssub_0RegClassID = 78,
403 DTriple_with_qsub_0_in_QPRRegClassID = 79,
404 DTriple_with_ssub_2RegClassID = 80,
405 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 81,
406 DTripleSpc_with_ssub_4RegClassID = 82,
407 DTriple_with_ssub_4RegClassID = 83,
408 DTripleSpc_with_ssub_8RegClassID = 84,
409 DTripleSpc_with_dsub_0_in_DPR_8RegClassID = 85,
410 DTriple_with_dsub_0_in_DPR_8RegClassID = 86,
411 DTriple_with_qsub_0_in_MQPRRegClassID = 87,
412 DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 88,
413 DTriple_with_dsub_1_in_DPR_8RegClassID = 89,
414 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 90,
415 DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID = 91,
416 DTripleSpc_with_dsub_2_in_DPR_8RegClassID = 92,
417 DTriple_with_dsub_2_in_DPR_8RegClassID = 93,
418 DTripleSpc_with_dsub_4_in_DPR_8RegClassID = 94,
419 DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 95,
420 DTriple_with_qsub_0_in_QPR_8RegClassID = 96,
421 DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID = 97,
422 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 98,
423 DQuadSpcRegClassID = 99,
424 DQuadSpc_with_ssub_0RegClassID = 100,
425 DQuadSpc_with_ssub_4RegClassID = 101,
426 DQuadSpc_with_ssub_8RegClassID = 102,
427 DQuadSpc_with_dsub_0_in_DPR_8RegClassID = 103,
428 DQuadSpc_with_dsub_2_in_DPR_8RegClassID = 104,
429 DQuadSpc_with_dsub_4_in_DPR_8RegClassID = 105,
430 DQuadRegClassID = 106,
431 DQuad_with_ssub_0RegClassID = 107,
432 DQuad_with_ssub_2RegClassID = 108,
433 QQPRRegClassID = 109,
434 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 110,
435 DQuad_with_ssub_4RegClassID = 111,
436 DQuad_with_ssub_6RegClassID = 112,
437 DQuad_with_dsub_0_in_DPR_8RegClassID = 113,
438 DQuad_with_qsub_0_in_MQPRRegClassID = 114,
439 DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 115,
440 DQuad_with_dsub_1_in_DPR_8RegClassID = 116,
441 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 117,
442 MQQPRRegClassID = 118,
443 DQuad_with_dsub_2_in_DPR_8RegClassID = 119,
444 DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 120,
445 DQuad_with_dsub_3_in_DPR_8RegClassID = 121,
446 DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 122,
447 DQuad_with_qsub_0_in_QPR_8RegClassID = 123,
448 DQuad_with_qsub_1_in_QPR_8RegClassID = 124,
449 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 125,
450 DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 126,
451 QQQQPRRegClassID = 127,
452 QQQQPR_with_ssub_0RegClassID = 128,
453 QQQQPR_with_ssub_4RegClassID = 129,
454 QQQQPR_with_ssub_8RegClassID = 130,
455 MQQQQPRRegClassID = 131,
456 MQQQQPR_with_dsub_0_in_DPR_8RegClassID = 132,
457 MQQQQPR_with_dsub_2_in_DPR_8RegClassID = 133,
458 MQQQQPR_with_dsub_4_in_DPR_8RegClassID = 134,
459 MQQQQPR_with_dsub_6_in_DPR_8RegClassID = 135,
460
461};
462} // end namespace ARM
463
464
465// Register alternate name indices
466
467namespace ARM {
468enum {
469 NoRegAltName, // 0
470 RegNamesRaw, // 1
471 NUM_TARGET_REG_ALT_NAMES = 2
472};
473} // end namespace ARM
474
475
476// Subregister indices
477
478namespace ARM {
479enum : uint16_t {
480 NoSubRegister,
481 dsub_0, // 1
482 dsub_1, // 2
483 dsub_2, // 3
484 dsub_3, // 4
485 dsub_4, // 5
486 dsub_5, // 6
487 dsub_6, // 7
488 dsub_7, // 8
489 gsub_0, // 9
490 gsub_1, // 10
491 qqsub_0, // 11
492 qqsub_1, // 12
493 qsub_0, // 13
494 qsub_1, // 14
495 qsub_2, // 15
496 qsub_3, // 16
497 ssub_0, // 17
498 ssub_1, // 18
499 ssub_2, // 19
500 ssub_3, // 20
501 ssub_4, // 21
502 ssub_5, // 22
503 ssub_6, // 23
504 ssub_7, // 24
505 ssub_8, // 25
506 ssub_9, // 26
507 ssub_10, // 27
508 ssub_11, // 28
509 ssub_12, // 29
510 ssub_13, // 30
511 ssub_14, // 31
512 ssub_15, // 32
513 ssub_0_ssub_1_ssub_4_ssub_5, // 33
514 ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, // 34
515 ssub_2_ssub_3_ssub_6_ssub_7, // 35
516 ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, // 36
517 ssub_2_ssub_3_ssub_4_ssub_5, // 37
518 ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, // 38
519 ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 39
520 ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, // 40
521 ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7, // 41
522 ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 42
523 ssub_4_ssub_5_ssub_8_ssub_9, // 43
524 ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 44
525 ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 45
526 ssub_6_ssub_7_dsub_5, // 46
527 ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, // 47
528 ssub_6_ssub_7_dsub_5_dsub_7, // 48
529 ssub_6_ssub_7_ssub_8_ssub_9, // 49
530 ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 50
531 ssub_8_ssub_9_ssub_12_ssub_13, // 51
532 ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 52
533 dsub_5_dsub_7, // 53
534 dsub_5_ssub_12_ssub_13_dsub_7, // 54
535 dsub_5_ssub_12_ssub_13, // 55
536 ssub_4_ssub_5_ssub_6_ssub_7_qsub_2, // 56
537 NUM_TARGET_SUBREGS
538};
539} // end namespace ARM
540
541// Register pressure sets enum.
542namespace ARM {
543enum RegisterPressureSets {
544 FPCXTRegs = 0,
545 GPRlr = 1,
546 VCCR = 2,
547 cl_FPSCR_NZCV = 3,
548 hGPR_and_tGPRwithpc = 4,
549 GPRsp = 5,
550 tGPROdd = 6,
551 tcGPR = 7,
552 hGPR = 8,
553 tGPROdd_with_tcGPR = 9,
554 tGPR = 10,
555 tGPR_with_tcGPR = 11,
556 tGPREven = 12,
557 hGPR_with_tGPREven = 13,
558 hGPR_with_tGPROdd = 14,
559 hGPR_with_tcGPR = 15,
560 tGPR_with_tGPREven = 16,
561 GPR = 17,
562 GPRwithZR = 18,
563 GPRwithAPSR_with_GPRwithZR = 19,
564 DQuad_with_dsub_0_in_DPR_8 = 20,
565 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR = 21,
566 HPR = 22,
567 DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 23,
568 DPair_with_ssub_0 = 24,
569 DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 25,
570 DPairSpc_with_ssub_0 = 26,
571 DQuad_with_ssub_0 = 27,
572 DTripleSpc_with_ssub_0 = 28,
573 QQQQPR_with_ssub_0 = 29,
574 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 30,
575 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 31,
576 DTriple_with_qsub_0_in_QPR = 32,
577 DPR = 33,
578};
579} // end namespace ARM
580
581} // end namespace llvm
582
583#endif // GET_REGINFO_ENUM
584
585/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
586|* *|
587|* MC Register Information *|
588|* *|
589|* Automatically generated file, do not edit! *|
590|* *|
591\*===----------------------------------------------------------------------===*/
592
593
594#ifdef GET_REGINFO_MC_DESC
595#undef GET_REGINFO_MC_DESC
596
597namespace llvm {
598
599extern const int16_t ARMRegDiffLists[] = {
600 /* 0 */ -248, 1, 1, 1, 230, 1, -136, 65, -64, 65, -140, 0,
601 /* 12 */ -249, 1, 1, 1, 231, 1, -137, 65, -64, 65, -139, 0,
602 /* 24 */ -250, 1, 1, 1, 232, 1, -138, 65, -64, 65, -138, 0,
603 /* 36 */ -251, 1, 1, 1, 233, 1, -139, 65, -64, 65, -137, 0,
604 /* 48 */ -252, 1, 1, 1, 234, 1, -140, 65, -64, 65, -136, 0,
605 /* 60 */ -253, 1, 1, 1, 235, 1, -141, 65, -64, 65, -135, 0,
606 /* 72 */ -15, -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, -117, -91, -23, 1, 23, -22, 1, 95, 65, -64, 65, 69, -44, 28, -27, 28, 28, -150, 65, 30, -94, 65, 30, 40, 15, -134, 0,
607 /* 111 */ -15, -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, -117, -91, -24, 1, 24, -23, 1, 95, 65, -64, 65, 70, -45, 28, -27, 28, 29, -151, 65, 30, -94, 65, 30, 41, 15, -134, 0,
608 /* 150 */ -15, -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, -117, -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, -46, 28, -27, 28, 30, -152, 65, 30, -94, 65, 30, 42, 15, -134, 0,
609 /* 189 */ -15, -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, -117, -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, -47, 28, -27, 28, 31, -153, 65, 30, -94, 65, 30, 43, 15, -134, 0,
610 /* 228 */ -15, -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, -117, -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, -48, 28, -27, 28, 32, -154, 65, 30, -94, 65, 30, 44, 15, -134, 0,
611 /* 267 */ -15, -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, -117, -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, -49, 28, -27, 28, 33, -155, 65, 30, -94, 65, 30, 45, 15, -134, 0,
612 /* 310 */ -15, -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, -117, -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, -50, 28, -27, 28, 34, -156, 65, 30, -94, 65, 30, 46, 15, -134, 0,
613 /* 357 */ -15, -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, -117, -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, -51, 28, -27, 28, 35, -157, 65, 30, -94, 65, 30, 47, 15, -134, 0,
614 /* 408 */ -15, -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, -117, -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, -52, 28, -27, 28, 36, -158, 65, 30, -94, 65, 30, 48, 15, -134, 0,
615 /* 463 */ -15, -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, -117, -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, -53, 28, -27, 28, 37, -159, 65, 30, -94, 65, 30, 49, 15, -134, 0,
616 /* 518 */ -15, -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, -117, -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, -54, 28, -27, 28, 38, -160, 65, 30, -94, 65, 30, 50, 15, -134, 0,
617 /* 573 */ -15, -91, -36, 68, 1, -68, 69, 1, -34, -35, 70, 1, -70, 71, 1, 23, 65, -64, 65, 82, -117, -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, -55, 28, -27, 28, 39, -161, 65, 30, -94, 65, 30, 51, 15, -134, 0,
618 /* 628 */ -15, -91, -37, 66, 1, -66, 67, 1, -31, -36, 68, 1, -68, 69, 1, 25, 65, -64, 65, 83, -117, -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, -56, 28, -27, 28, 40, -162, 65, 30, -94, 65, 30, 52, 15, -134, 0,
619 /* 683 */ -254, 81, 1, -81, 1, 1, 236, 1, -142, 65, -64, 65, -134, 0,
620 /* 697 */ -255, 79, 1, -79, 80, 1, -80, 81, 1, -81, 237, 1, -143, 65, -64, 65, -133, 0,
621 /* 715 */ -256, 77, 1, -77, 78, 1, -78, 79, 1, -79, 80, 1, 157, 1, -144, 65, -64, 65, -132, 0,
622 /* 735 */ -257, 75, 1, -75, 76, 1, -76, 77, 1, -77, 78, 1, 160, 1, -145, 65, -64, 65, -131, 0,
623 /* 755 */ -258, 73, 1, -73, 74, 1, -74, 75, 1, -75, 76, 1, 163, 1, -146, 65, -64, 65, -130, 0,
624 /* 775 */ -259, 71, 1, -71, 72, 1, -72, 73, 1, -73, 74, 1, 166, 1, -147, 65, -64, 65, -129, 0,
625 /* 795 */ -260, 69, 1, -69, 70, 1, -70, 71, 1, -71, 72, 1, 169, 1, -148, 65, -64, 65, -128, 0,
626 /* 815 */ -261, 67, 1, -67, 68, 1, -68, 69, 1, -69, 70, 1, 172, 1, -149, 65, -64, 65, -127, 0,
627 /* 835 */ 23, 73, 2, 63, -48, 120, -71, 1, -49, 75, 26, -89, 65, 26, 30, -120, 66, 26, 29, -120, 0,
628 /* 856 */ 22, 74, 2, 63, -49, 120, -70, 1, -50, 76, 26, -90, 66, 26, 29, -120, 0,
629 /* 873 */ 65, -49, 77, 26, -90, 66, 26, 29, -120, 0,
630 /* 883 */ 23, 73, 2, 134, -71, 1, -49, 50, -49, 75, 26, 31, -120, 65, 26, 30, -120, 0,
631 /* 901 */ 22, 74, 135, -70, 1, -50, 77, 26, 30, -120, 0,
632 /* 912 */ 65, -49, 77, 26, 30, -120, 0,
633 /* 919 */ -71, 1, -49, 133, -120, 121, -120, 0,
634 /* 927 */ 139, -49, 50, -49, 12, 121, -120, 0,
635 /* 935 */ -49, 13, 121, -120, 0,
636 /* 940 */ -70, 1, -50, 133, -120, 0,
637 /* 946 */ -49, 133, -120, 0,
638 /* 950 */ -68, 36, 62, 148, -84, 1, -36, 66, 28, 40, -119, 0,
639 /* 962 */ -67, 36, 62, 148, -84, 1, -36, 66, 28, 40, -119, 0,
640 /* 974 */ 65, -36, 66, 28, 40, -119, 0,
641 /* 981 */ -84, 1, -36, 134, -119, 0,
642 /* 987 */ -221, 75, 1, -74, 77, 1, -76, 79, 1, -78, 81, 1, 10, 95, -93, 95, -93, 0,
643 /* 1005 */ -221, 74, 1, -73, 76, 1, -75, 78, 1, -77, 80, 1, 11, 95, -93, 95, -93, 0,
644 /* 1023 */ -221, 73, 1, -72, 75, 1, -74, 77, 1, -76, 79, 1, 12, 95, -93, 95, -93, 0,
645 /* 1041 */ -221, 72, 1, -71, 74, 1, -73, 76, 1, -75, 78, 1, 13, 95, -93, 95, -93, 0,
646 /* 1059 */ -221, 71, 1, -70, 73, 1, -72, 75, 1, -74, 77, 1, 14, 95, -93, 95, -93, 0,
647 /* 1077 */ -221, 70, 1, -69, 72, 1, -71, 74, 1, -73, 76, 1, 15, 95, -93, 95, -93, 0,
648 /* 1095 */ -221, 69, 1, -68, 71, 1, -70, 73, 1, -72, 75, 1, 16, 95, -93, 95, -93, 0,
649 /* 1113 */ -221, 68, 1, -67, 70, 1, -69, 72, 1, -71, 74, 1, 17, 95, -93, 95, -93, 0,
650 /* 1131 */ -221, 67, 1, -66, 69, 1, -68, 71, 1, -70, 73, 1, 18, 95, -93, 95, -93, 0,
651 /* 1149 */ -221, 66, 1, -65, 68, 1, -67, 70, 1, -69, 72, 1, 19, 95, -93, 95, -93, 0,
652 /* 1167 */ -221, 77, 1, -76, 79, 1, -78, 81, 1, -80, 92, 95, -93, 95, -93, 0,
653 /* 1183 */ -221, 76, 1, -75, 78, 1, -77, 80, 1, -79, 92, 95, -93, 95, -93, 0,
654 /* 1199 */ -221, 79, 1, -78, 81, 1, -80, 2, 92, 95, -93, 95, -93, 0,
655 /* 1213 */ -221, 78, 1, -77, 80, 1, -79, 2, 92, 95, -93, 95, -93, 0,
656 /* 1227 */ -221, 81, 1, -80, 2, 2, 92, 95, -93, 95, -93, 0,
657 /* 1239 */ -221, 80, 1, -79, 2, 2, 92, 95, -93, 95, -93, 0,
658 /* 1251 */ -221, 2, 2, 2, 92, 95, -93, 95, -93, 0,
659 /* 1261 */ 21, 75, 65, -50, 78, 26, -91, 0,
660 /* 1269 */ 24, 72, 2, 63, -47, 120, -72, 1, -48, 74, 26, -88, 64, 26, 31, -120, 65, 26, 30, -120, 92, -91, 0,
661 /* 1292 */ 65, -48, 76, 26, -89, 65, 26, 30, -120, 92, -91, 0,
662 /* 1304 */ 26, -90, 92, -91, 0,
663 /* 1309 */ 24, 72, 2, 135, -72, 1, -48, 49, -48, 74, 26, 32, -120, 64, 26, 31, -120, 65, 26, -90, 0,
664 /* 1330 */ 65, -48, 76, 26, 31, -120, 65, 26, -90, 0,
665 /* 1340 */ 25, 71, 2, 63, -46, 120, -73, 1, -47, 73, 26, -87, 63, 26, 32, -120, 64, 26, 31, -120, 91, -90, 0,
666 /* 1363 */ 65, -47, 75, 26, -88, 64, 26, 31, -120, 91, -90, 0,
667 /* 1375 */ 25, 71, 2, 136, -73, 1, -47, 48, -47, 73, 26, 33, -120, 63, 26, 32, -120, 64, 26, -89, 91, -90, 0,
668 /* 1398 */ 65, -47, 75, 26, 32, -120, 64, 26, -89, 91, -90, 0,
669 /* 1410 */ 26, 70, 2, 63, -45, 120, -74, 1, -46, 72, 26, -86, 62, 26, 33, -120, 63, 26, 32, -120, 90, -89, 0,
670 /* 1433 */ 65, -46, 74, 26, -87, 63, 26, 32, -120, 90, -89, 0,
671 /* 1445 */ 26, 70, 2, 137, -74, 1, -46, 47, -46, 72, 26, 34, -120, 62, 26, 33, -120, 63, 26, -88, 90, -89, 0,
672 /* 1468 */ 65, -46, 74, 26, 33, -120, 63, 26, -88, 90, -89, 0,
673 /* 1480 */ 27, 69, 2, 63, -44, 120, -75, 1, -45, 71, 26, -85, 61, 26, 34, -120, 62, 26, 33, -120, 89, -88, 0,
674 /* 1503 */ 65, -45, 73, 26, -86, 62, 26, 33, -120, 89, -88, 0,
675 /* 1515 */ 27, 69, 2, 138, -75, 1, -45, 46, -45, 71, 26, 35, -120, 61, 26, 34, -120, 62, 26, -87, 89, -88, 0,
676 /* 1538 */ 65, -45, 73, 26, 34, -120, 62, 26, -87, 89, -88, 0,
677 /* 1550 */ 28, 68, 2, 63, -43, 120, -76, 1, -44, 70, 26, -84, 60, 26, 35, -120, 61, 26, 34, -120, 88, -87, 0,
678 /* 1573 */ 65, -44, 72, 26, -85, 61, 26, 34, -120, 88, -87, 0,
679 /* 1585 */ 28, 68, 2, 139, -76, 1, -44, 45, -44, 70, 26, 36, -120, 60, 26, 35, -120, 61, 26, -86, 88, -87, 0,
680 /* 1608 */ 65, -44, 72, 26, 35, -120, 61, 26, -86, 88, -87, 0,
681 /* 1620 */ -82, 29, 67, 2, 63, -42, 120, -77, 1, -43, 69, 26, -83, 59, 26, 36, -120, 60, 26, 35, -120, 87, -86, 0,
682 /* 1644 */ -81, 29, 67, 2, 63, -42, 120, -77, 1, -43, 69, 26, -83, 59, 26, 36, -120, 60, 26, 35, -120, 87, -86, 0,
683 /* 1668 */ 65, -43, 71, 26, -84, 60, 26, 35, -120, 87, -86, 0,
684 /* 1680 */ 29, 67, 2, 140, -77, 1, -43, 44, -43, 69, 26, 37, -120, 59, 26, 36, -120, 60, 26, -85, 87, -86, 0,
685 /* 1703 */ 65, -43, 71, 26, 36, -120, 60, 26, -85, 87, -86, 0,
686 /* 1715 */ -80, 30, 66, 2, 63, -41, 120, -78, 1, -42, 68, 26, -82, 58, 26, 37, -120, 59, 26, 36, -120, 86, -85, 0,
687 /* 1739 */ -79, 30, 66, 2, 63, -41, 120, -78, 1, -42, 68, 26, -82, 58, 26, 37, -120, 59, 26, 36, -120, 86, -85, 0,
688 /* 1763 */ 65, -42, 70, 26, -83, 59, 26, 36, -120, 86, -85, 0,
689 /* 1775 */ -81, 30, 66, 2, 141, -78, 1, -42, 43, -42, 68, 26, 38, -120, 58, 26, 37, -120, 59, 26, -84, 86, -85, 0,
690 /* 1799 */ -80, 30, 66, 2, 141, -78, 1, -42, 43, -42, 68, 26, 38, -120, 58, 26, 37, -120, 59, 26, -84, 86, -85, 0,
691 /* 1823 */ 65, -42, 70, 26, 37, -120, 59, 26, -84, 86, -85, 0,
692 /* 1835 */ -78, 31, 65, 2, 63, -40, 120, -79, 1, -41, 67, 26, -81, 57, 26, 38, -120, 58, 26, 37, -120, 85, -84, 0,
693 /* 1859 */ -77, 31, 65, 2, 63, -40, 120, -79, 1, -41, 67, 26, -81, 57, 26, 38, -120, 58, 26, 37, -120, 85, -84, 0,
694 /* 1883 */ 65, -41, 69, 26, -82, 58, 26, 37, -120, 85, -84, 0,
695 /* 1895 */ -79, 31, 65, 2, 142, -79, 1, -41, 42, -41, 67, 26, 39, -120, 57, 26, 38, -120, 58, 26, -83, 85, -84, 0,
696 /* 1919 */ -78, 31, 65, 2, 142, -79, 1, -41, 42, -41, 67, 26, 39, -120, 57, 26, 38, -120, 58, 26, -83, 85, -84, 0,
697 /* 1943 */ 65, -41, 69, 26, 38, -120, 58, 26, -83, 85, -84, 0,
698 /* 1955 */ -76, 32, 64, 2, 63, -39, 120, -80, 1, -40, 66, 26, -80, 56, 26, 39, -120, 57, 26, 38, -120, 84, -83, 0,
699 /* 1979 */ -75, 32, 64, 2, 63, -39, 120, -80, 1, -40, 66, 26, -80, 56, 26, 39, -120, 57, 26, 38, -120, 84, -83, 0,
700 /* 2003 */ 65, -40, 68, 26, -81, 57, 26, 38, -120, 84, -83, 0,
701 /* 2015 */ -77, 32, 64, 2, 143, -80, 1, -40, 41, -40, 66, 26, 40, -120, 56, 26, 39, -120, 57, 26, -82, 84, -83, 0,
702 /* 2039 */ -76, 32, 64, 2, 143, -80, 1, -40, 41, -40, 66, 26, 40, -120, 56, 26, 39, -120, 57, 26, -82, 84, -83, 0,
703 /* 2063 */ 65, -40, 68, 26, 39, -120, 57, 26, -82, 84, -83, 0,
704 /* 2075 */ -74, 33, 63, 2, 63, -38, 120, -81, 1, -39, 65, 26, -79, 55, 26, 40, -120, 56, 26, 39, -120, 83, -82, 0,
705 /* 2099 */ -73, 33, 63, 2, 63, -38, 120, -81, 1, -39, 65, 26, -79, 55, 26, 40, -120, 56, 26, 39, -120, 83, -82, 0,
706 /* 2123 */ 65, -39, 67, 26, -80, 56, 26, 39, -120, 83, -82, 0,
707 /* 2135 */ -75, 33, 63, 2, 144, -81, 1, -39, 40, -39, 65, 26, 41, -120, 55, 26, 40, -120, 56, 26, -81, 83, -82, 0,
708 /* 2159 */ -74, 33, 63, 2, 144, -81, 1, -39, 40, -39, 65, 26, 41, -120, 55, 26, 40, -120, 56, 26, -81, 83, -82, 0,
709 /* 2183 */ 65, -39, 67, 26, 40, -120, 56, 26, -81, 83, -82, 0,
710 /* 2195 */ -239, 81, 1, -81, 0,
711 /* 2200 */ -72, 34, 62, 2, 63, -37, 120, -82, 1, -38, 64, 2, 26, 41, -120, 55, 26, 40, -120, 82, -81, 0,
712 /* 2222 */ -71, 34, 62, 2, 63, -37, 120, -82, 1, -38, 64, 2, 26, 41, -120, 55, 26, 40, -120, 82, -81, 0,
713 /* 2244 */ 65, -38, 66, 26, -79, 55, 26, 40, -120, 82, -81, 0,
714 /* 2256 */ -73, 34, 62, 2, 145, -82, 1, -38, 39, -38, 64, 26, 42, -120, 54, 26, 41, -120, 55, 26, -80, 82, -81, 0,
715 /* 2280 */ -72, 34, 62, 2, 145, -82, 1, -38, 39, -38, 64, 26, 42, -120, 54, 26, 41, -120, 55, 26, -80, 82, -81, 0,
716 /* 2304 */ 65, -38, 66, 26, 41, -120, 55, 26, -80, 82, -81, 0,
717 /* 2316 */ -98, 81, 1, -80, 0,
718 /* 2321 */ -70, 35, 61, 2, 63, -36, 120, -83, 1, -37, 65, 2, 26, 40, 1, -120, 81, -80, 0,
719 /* 2340 */ -69, 35, 61, 2, 63, -36, 120, -83, 1, -37, 65, 2, 26, 40, 1, -120, 81, -80, 0,
720 /* 2359 */ 65, -37, 65, 2, 26, 41, -120, 81, -80, 0,
721 /* 2369 */ -71, 35, 61, 2, 146, -83, 1, -37, 38, -37, 63, 2, 26, 41, 1, -120, 54, 26, -79, 81, -80, 0,
722 /* 2391 */ -70, 35, 61, 2, 146, -83, 1, -37, 38, -37, 63, 2, 26, 41, 1, -120, 54, 26, -79, 81, -80, 0,
723 /* 2413 */ 65, -37, 65, 26, 42, -120, 54, 26, -79, 81, -80, 0,
724 /* 2425 */ -98, 80, 1, -79, 0,
725 /* 2430 */ 28, -79, 0,
726 /* 2433 */ -69, 36, 60, 2, 147, -84, 1, -36, 37, -36, 64, 2, 26, 41, -119, 80, -79, 0,
727 /* 2451 */ -68, 36, 60, 2, 147, -84, 1, -36, 37, -36, 64, 2, 26, 41, -119, 80, -79, 0,
728 /* 2469 */ 65, -36, 64, 2, 26, 41, -119, 80, -79, 0,
729 /* 2479 */ 26, -78, 80, -79, 0,
730 /* 2484 */ -67, 37, 61, 65, -35, 65, 28, -78, 0,
731 /* 2493 */ -66, 37, 61, 65, -35, 65, 28, -78, 0,
732 /* 2502 */ -163, 1, 1, 230, -134, -75, 0,
733 /* 2509 */ -163, 1, 1, 231, -135, -74, 0,
734 /* 2516 */ -163, 1, 1, 232, -136, -73, 0,
735 /* 2523 */ -163, 1, 1, 233, -137, -72, 0,
736 /* 2530 */ -163, 1, 1, 234, -138, -71, 0,
737 /* 2537 */ -163, 1, 1, 235, -139, -70, 0,
738 /* 2544 */ -163, 1, 1, 236, -140, -69, 0,
739 /* 2551 */ -97, -69, 0,
740 /* 2554 */ -163, 81, 1, -81, 1, 237, -141, -68, 0,
741 /* 2563 */ -163, 79, 1, -79, 80, 1, -80, 81, 1, 156, -142, -67, 0,
742 /* 2576 */ -163, 77, 1, -77, 78, 1, -78, 79, 1, 159, -143, -66, 0,
743 /* 2589 */ -163, 75, 1, -75, 76, 1, -76, 77, 1, 162, -144, -65, 0,
744 /* 2602 */ -163, 73, 1, -73, 74, 1, -74, 75, 1, 165, -145, -64, 0,
745 /* 2615 */ -163, 71, 1, -71, 72, 1, -72, 73, 1, 168, -146, -63, 0,
746 /* 2628 */ -163, 69, 1, -69, 70, 1, -70, 71, 1, 171, -147, -62, 0,
747 /* 2641 */ -163, 67, 1, -67, 68, 1, -68, 69, 1, 174, -148, -61, 0,
748 /* 2654 */ -238, 1, 0,
749 /* 2657 */ -237, 1, 0,
750 /* 2660 */ -236, 1, 0,
751 /* 2663 */ -235, 1, 0,
752 /* 2666 */ -234, 1, 0,
753 /* 2669 */ -233, 1, 0,
754 /* 2672 */ -232, 1, 0,
755 /* 2675 */ -83, 1, -37, 133, 1, -120, 1, 0,
756 /* 2683 */ -72, 1, -48, 133, -120, 121, -120, 1, 0,
757 /* 2692 */ -73, 1, -47, 133, -120, 121, -120, 1, 0,
758 /* 2701 */ -74, 1, -46, 133, -120, 121, -120, 1, 0,
759 /* 2710 */ -75, 1, -45, 133, -120, 121, -120, 1, 0,
760 /* 2719 */ -76, 1, -44, 133, -120, 121, -120, 1, 0,
761 /* 2728 */ -77, 1, -43, 133, -120, 121, -120, 1, 0,
762 /* 2737 */ -78, 1, -42, 133, -120, 121, -120, 1, 0,
763 /* 2746 */ -79, 1, -41, 133, -120, 121, -120, 1, 0,
764 /* 2755 */ -80, 1, -40, 133, -120, 121, -120, 1, 0,
765 /* 2764 */ -81, 1, -39, 133, -120, 121, -120, 1, 0,
766 /* 2773 */ -82, 1, -38, 133, -120, 121, -120, 1, 0,
767 /* 2782 */ 138, -48, 49, -48, 12, 121, -120, 1, 0,
768 /* 2791 */ -48, 13, 121, -120, 1, 0,
769 /* 2797 */ -47, 13, 121, -120, 1, 0,
770 /* 2803 */ -46, 13, 121, -120, 1, 0,
771 /* 2809 */ -45, 13, 121, -120, 1, 0,
772 /* 2815 */ -44, 13, 121, -120, 1, 0,
773 /* 2821 */ -43, 13, 121, -120, 1, 0,
774 /* 2827 */ -42, 13, 121, -120, 1, 0,
775 /* 2833 */ -41, 13, 121, -120, 1, 0,
776 /* 2839 */ -40, 13, 121, -120, 1, 0,
777 /* 2845 */ -39, 13, 121, -120, 1, 0,
778 /* 2851 */ -38, 13, 121, -120, 1, 0,
779 /* 2857 */ -48, 133, -120, 1, 0,
780 /* 2862 */ -37, 134, -120, 1, 0,
781 /* 2867 */ 126, -36, 37, -36, 133, -119, 1, 0,
782 /* 2875 */ -103, 1, 0,
783 /* 2878 */ -102, 1, 0,
784 /* 2881 */ -101, 1, 0,
785 /* 2884 */ -100, 1, 0,
786 /* 2887 */ -99, 1, 0,
787 /* 2890 */ -98, 1, 0,
788 /* 2893 */ -29, 1, 0,
789 /* 2896 */ -28, 1, 0,
790 /* 2899 */ -27, 1, 0,
791 /* 2902 */ -26, 1, 0,
792 /* 2905 */ -25, 1, 0,
793 /* 2908 */ -24, 1, 0,
794 /* 2911 */ -23, 1, 0,
795 /* 2914 */ -22, 1, 0,
796 /* 2917 */ 137, -47, 48, -47, 12, 121, -120, 1, 1, 0,
797 /* 2927 */ 136, -46, 47, -46, 12, 121, -120, 1, 1, 0,
798 /* 2937 */ 135, -45, 46, -45, 12, 121, -120, 1, 1, 0,
799 /* 2947 */ 134, -44, 45, -44, 12, 121, -120, 1, 1, 0,
800 /* 2957 */ 133, -43, 44, -43, 12, 121, -120, 1, 1, 0,
801 /* 2967 */ 132, -42, 43, -42, 12, 121, -120, 1, 1, 0,
802 /* 2977 */ 131, -41, 42, -41, 12, 121, -120, 1, 1, 0,
803 /* 2987 */ 130, -40, 41, -40, 12, 121, -120, 1, 1, 0,
804 /* 2997 */ 129, -39, 40, -39, 12, 121, -120, 1, 1, 0,
805 /* 3007 */ 128, -38, 39, -38, 12, 121, -120, 1, 1, 0,
806 /* 3017 */ -47, 133, -120, 1, 1, 0,
807 /* 3023 */ -46, 133, -120, 1, 1, 0,
808 /* 3029 */ -45, 133, -120, 1, 1, 0,
809 /* 3035 */ -44, 133, -120, 1, 1, 0,
810 /* 3041 */ -43, 133, -120, 1, 1, 0,
811 /* 3047 */ -42, 133, -120, 1, 1, 0,
812 /* 3053 */ -41, 133, -120, 1, 1, 0,
813 /* 3059 */ -40, 133, -120, 1, 1, 0,
814 /* 3065 */ -39, 133, -120, 1, 1, 0,
815 /* 3071 */ -38, 133, -120, 1, 1, 0,
816 /* 3077 */ 127, -37, 38, -37, 133, -120, 1, 1, 0,
817 /* 3086 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
818 /* 3102 */ 13, 1, 1, 0,
819 /* 3106 */ 1, 3, 1, 3, 1, 3, 1, 0,
820 /* 3114 */ 13, 1, 0,
821 /* 3117 */ 14, 1, 0,
822 /* 3120 */ 66, 1, 0,
823 /* 3123 */ -37, 66, 1, -66, 67, 1, 0,
824 /* 3130 */ -246, 67, 1, -67, 68, 1, 0,
825 /* 3137 */ -98, 66, 1, -65, 68, 1, 0,
826 /* 3144 */ -36, 68, 1, -68, 69, 1, 0,
827 /* 3151 */ -98, 67, 1, -66, 69, 1, 0,
828 /* 3158 */ -245, 69, 1, -69, 70, 1, 0,
829 /* 3165 */ -98, 68, 1, -67, 70, 1, 0,
830 /* 3172 */ -35, 70, 1, -70, 71, 1, 0,
831 /* 3179 */ -98, 69, 1, -68, 71, 1, 0,
832 /* 3186 */ -244, 71, 1, -71, 72, 1, 0,
833 /* 3193 */ -98, 70, 1, -69, 72, 1, 0,
834 /* 3200 */ -34, 72, 1, -72, 73, 1, 0,
835 /* 3207 */ -98, 71, 1, -70, 73, 1, 0,
836 /* 3214 */ -243, 73, 1, -73, 74, 1, 0,
837 /* 3221 */ -98, 72, 1, -71, 74, 1, 0,
838 /* 3228 */ -33, 74, 1, -74, 75, 1, 0,
839 /* 3235 */ -98, 73, 1, -72, 75, 1, 0,
840 /* 3242 */ -242, 75, 1, -75, 76, 1, 0,
841 /* 3249 */ -98, 74, 1, -73, 76, 1, 0,
842 /* 3256 */ -32, 76, 1, -76, 77, 1, 0,
843 /* 3263 */ -98, 75, 1, -74, 77, 1, 0,
844 /* 3270 */ -241, 77, 1, -77, 78, 1, 0,
845 /* 3277 */ -98, 76, 1, -75, 78, 1, 0,
846 /* 3284 */ -31, 78, 1, -78, 79, 1, 0,
847 /* 3291 */ -98, 77, 1, -76, 79, 1, 0,
848 /* 3298 */ -240, 79, 1, -79, 80, 1, 0,
849 /* 3305 */ -98, 78, 1, -77, 80, 1, 0,
850 /* 3312 */ -30, 80, 1, -80, 81, 1, 0,
851 /* 3319 */ -98, 79, 1, -78, 81, 1, 0,
852 /* 3326 */ -98, 2, 0,
853 /* 3329 */ 1, 3, 1, 3, 1, 2, 0,
854 /* 3336 */ 1, 3, 1, 2, 2, 0,
855 /* 3342 */ 1, 2, 2, 2, 0,
856 /* 3347 */ 1, 3, 2, 2, 0,
857 /* 3352 */ 1, 3, 1, 3, 2, 0,
858 /* 3358 */ -193, 77, 1, -76, 79, 1, -78, 81, 1, 12, 2, 0,
859 /* 3370 */ -193, 76, 1, -75, 78, 1, -77, 80, 1, 13, 2, 0,
860 /* 3382 */ -193, 75, 1, -74, 77, 1, -76, 79, 1, 14, 2, 0,
861 /* 3394 */ -193, 74, 1, -73, 76, 1, -75, 78, 1, 15, 2, 0,
862 /* 3406 */ -193, 73, 1, -72, 75, 1, -74, 77, 1, 16, 2, 0,
863 /* 3418 */ -193, 72, 1, -71, 74, 1, -73, 76, 1, 17, 2, 0,
864 /* 3430 */ -193, 71, 1, -70, 73, 1, -72, 75, 1, 18, 2, 0,
865 /* 3442 */ -193, 70, 1, -69, 72, 1, -71, 74, 1, 19, 2, 0,
866 /* 3454 */ -193, 69, 1, -68, 71, 1, -70, 73, 1, 20, 2, 0,
867 /* 3466 */ -193, 68, 1, -67, 70, 1, -69, 72, 1, 21, 2, 0,
868 /* 3478 */ -193, 67, 1, -66, 69, 1, -68, 71, 1, 22, 2, 0,
869 /* 3490 */ -193, 66, 1, -65, 68, 1, -67, 70, 1, 23, 2, 0,
870 /* 3502 */ -193, 79, 1, -78, 81, 1, -80, 94, 2, 0,
871 /* 3512 */ -193, 78, 1, -77, 80, 1, -79, 94, 2, 0,
872 /* 3522 */ -193, 81, 1, -80, 2, 94, 2, 0,
873 /* 3530 */ -193, 80, 1, -79, 2, 94, 2, 0,
874 /* 3538 */ -193, 2, 2, 94, 2, 0,
875 /* 3544 */ 1, 3, 1, 3, 1, 3, 0,
876 /* 3551 */ 140, -50, 13, 0,
877 /* 3555 */ 126, -35, 15, 0,
878 /* 3559 */ -91, -23, 1, 23, -22, 1, 95, 65, -64, 65, 69, 0,
879 /* 3571 */ -91, -24, 1, 24, -23, 1, 95, 65, -64, 65, 70, 0,
880 /* 3583 */ -91, -25, 1, 25, -24, 1, 95, 65, -64, 65, 71, 0,
881 /* 3595 */ -91, -26, 1, 26, -25, 1, 95, 65, -64, 65, 72, 0,
882 /* 3607 */ -91, -27, 1, 27, -26, 1, 95, 65, -64, 65, 73, 0,
883 /* 3619 */ -91, -28, 1, 28, -27, 1, 95, 65, -64, 65, 74, 0,
884 /* 3631 */ -91, -29, 1, 29, -28, 1, 95, 65, -64, 65, 75, 0,
885 /* 3643 */ -91, -30, 80, 1, -80, 81, 1, -52, -29, 1, 95, 65, -64, 65, 76, 0,
886 /* 3659 */ -91, -31, 78, 1, -78, 79, 1, -49, -30, 80, 1, -80, 81, 1, 13, 65, -64, 65, 77, 0,
887 /* 3679 */ -91, -32, 76, 1, -76, 77, 1, -46, -31, 78, 1, -78, 79, 1, 15, 65, -64, 65, 78, 0,
888 /* 3699 */ -91, -33, 74, 1, -74, 75, 1, -43, -32, 76, 1, -76, 77, 1, 17, 65, -64, 65, 79, 0,
889 /* 3719 */ -91, -34, 72, 1, -72, 73, 1, -40, -33, 74, 1, -74, 75, 1, 19, 65, -64, 65, 80, 0,
890 /* 3739 */ -91, -35, 70, 1, -70, 71, 1, -37, -34, 72, 1, -72, 73, 1, 21, 65, -64, 65, 81, 0,
891 /* 3759 */ -91, -36, 68, 1, -68, 69, 1, -34, -35, 70, 1, -70, 71, 1, 23, 65, -64, 65, 82, 0,
892 /* 3779 */ -91, -37, 66, 1, -66, 67, 1, -31, -36, 68, 1, -68, 69, 1, 25, 65, -64, 65, 83, 0,
893 /* 3799 */ 97, 0,
894 /* 3801 */ 98, 0,
895 /* 3803 */ 99, 0,
896 /* 3805 */ 100, 0,
897 /* 3807 */ 101, 0,
898 /* 3809 */ 102, 0,
899 /* 3811 */ 103, 0,
900 /* 3813 */ -163, 1, 1, 21, 75, 135, 0,
901 /* 3820 */ -163, 1, 1, 22, 74, 136, 0,
902 /* 3827 */ -163, 1, 1, 23, 73, 137, 0,
903 /* 3834 */ -163, 1, 1, 24, 72, 138, 0,
904 /* 3841 */ -163, 1, 1, 25, 71, 139, 0,
905 /* 3848 */ -163, 1, 1, 26, 70, 140, 0,
906 /* 3855 */ -163, 1, 1, 27, 69, 141, 0,
907 /* 3862 */ -163, 80, 1, -80, 81, 1, -81, 28, 68, 142, 0,
908 /* 3873 */ -163, 78, 1, -78, 79, 1, -79, 80, 1, -52, 67, 143, 0,
909 /* 3886 */ -163, 76, 1, -76, 77, 1, -77, 78, 1, -49, 66, 144, 0,
910 /* 3899 */ -163, 74, 1, -74, 75, 1, -75, 76, 1, -46, 65, 145, 0,
911 /* 3912 */ -163, 72, 1, -72, 73, 1, -73, 74, 1, -43, 64, 146, 0,
912 /* 3925 */ -163, 70, 1, -70, 71, 1, -71, 72, 1, -40, 63, 147, 0,
913 /* 3938 */ -163, 68, 1, -68, 69, 1, -69, 70, 1, -37, 62, 148, 0,
914 /* 3951 */ -163, 66, 1, -66, 67, 1, -67, 68, 1, -34, 61, 149, 0,
915 /* 3964 */ 166, 0,
916};
917
918extern const LaneBitmask ARMLaneMaskLists[] = {
919 /* 0 */ LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(),
920 /* 3 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask::getAll(),
921 /* 6 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask::getAll(),
922 /* 9 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask::getAll(),
923 /* 14 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask::getAll(),
924 /* 18 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask::getAll(),
925 /* 21 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(),
926 /* 26 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(),
927 /* 33 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(),
928 /* 37 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(),
929 /* 40 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(),
930 /* 46 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(),
931 /* 51 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(),
932 /* 55 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask::getAll(),
933 /* 64 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(),
934 /* 72 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(),
935 /* 79 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(),
936 /* 85 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(),
937 /* 90 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask::getAll(),
938 /* 97 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(),
939 /* 103 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(),
940 /* 108 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(),
941 /* 112 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask::getAll(),
942 /* 121 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(),
943 /* 129 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(),
944 /* 136 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(),
945 /* 142 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(),
946 /* 147 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), LaneBitmask::getAll(),
947 /* 164 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(),
948 /* 179 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(),
949 /* 192 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(),
950 /* 203 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(),
951 /* 212 */ LaneBitmask(0xFFFFFFFFFFFFFFFF), LaneBitmask::getAll(),
952};
953
954extern const uint16_t ARMSubRegIdxLists[] = {
955 /* 0 */ 1, 2, 0,
956 /* 3 */ 1, 17, 18, 2, 0,
957 /* 8 */ 1, 3, 0,
958 /* 11 */ 1, 17, 18, 3, 0,
959 /* 16 */ 9, 10, 0,
960 /* 19 */ 17, 18, 0,
961 /* 22 */ 1, 17, 18, 2, 19, 20, 0,
962 /* 29 */ 1, 17, 18, 3, 21, 22, 0,
963 /* 36 */ 1, 2, 3, 13, 33, 37, 0,
964 /* 43 */ 1, 17, 18, 2, 3, 13, 33, 37, 0,
965 /* 52 */ 1, 17, 18, 2, 19, 20, 3, 13, 33, 37, 0,
966 /* 63 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 13, 33, 37, 0,
967 /* 76 */ 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 0,
968 /* 88 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 0,
969 /* 104 */ 1, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0,
970 /* 116 */ 1, 17, 18, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0,
971 /* 130 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 13, 14, 33, 34, 35, 36, 37, 0,
972 /* 148 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 23, 24, 13, 14, 33, 34, 35, 36, 37, 0,
973 /* 168 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 0,
974 /* 188 */ 1, 3, 5, 33, 43, 0,
975 /* 194 */ 1, 17, 18, 3, 5, 33, 43, 0,
976 /* 202 */ 1, 17, 18, 3, 21, 22, 5, 33, 43, 0,
977 /* 212 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 33, 43, 0,
978 /* 224 */ 1, 3, 5, 7, 33, 38, 43, 45, 51, 0,
979 /* 234 */ 1, 17, 18, 3, 5, 7, 33, 38, 43, 45, 51, 0,
980 /* 246 */ 1, 17, 18, 3, 21, 22, 5, 7, 33, 38, 43, 45, 51, 0,
981 /* 260 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 33, 38, 43, 45, 51, 0,
982 /* 276 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 29, 30, 33, 38, 43, 45, 51, 0,
983 /* 294 */ 11, 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0,
984 /* 333 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0,
985 /* 376 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0,
986 /* 423 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0,
987 /* 474 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 29, 30, 8, 31, 32, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0,
988};
989
990
991#ifdef __GNUC__
992#pragma GCC diagnostic push
993#pragma GCC diagnostic ignored "-Woverlength-strings"
994#endif
995extern const char ARMRegStrings[] = {
996 /* 0 */ "D4_D6_D8_D10\0"
997 /* 13 */ "D7_D8_D9_D10\0"
998 /* 26 */ "Q7_Q8_Q9_Q10\0"
999 /* 39 */ "R10\0"
1000 /* 43 */ "S10\0"
1001 /* 47 */ "D14_D16_D18_D20\0"
1002 /* 63 */ "D17_D18_D19_D20\0"
1003 /* 79 */ "S20\0"
1004 /* 83 */ "D24_D26_D28_D30\0"
1005 /* 99 */ "D27_D28_D29_D30\0"
1006 /* 115 */ "S30\0"
1007 /* 119 */ "D0\0"
1008 /* 122 */ "P0\0"
1009 /* 125 */ "Q0\0"
1010 /* 128 */ "MVFR0\0"
1011 /* 134 */ "S0\0"
1012 /* 137 */ "D9_D10_D11\0"
1013 /* 148 */ "D5_D7_D9_D11\0"
1014 /* 161 */ "Q8_Q9_Q10_Q11\0"
1015 /* 175 */ "R10_R11\0"
1016 /* 183 */ "S11\0"
1017 /* 187 */ "D19_D20_D21\0"
1018 /* 199 */ "D15_D17_D19_D21\0"
1019 /* 215 */ "S21\0"
1020 /* 219 */ "D29_D30_D31\0"
1021 /* 231 */ "D25_D27_D29_D31\0"
1022 /* 247 */ "S31\0"
1023 /* 251 */ "D1\0"
1024 /* 254 */ "Q0_Q1\0"
1025 /* 260 */ "MVFR1\0"
1026 /* 266 */ "R0_R1\0"
1027 /* 272 */ "S1\0"
1028 /* 275 */ "D6_D8_D10_D12\0"
1029 /* 289 */ "D9_D10_D11_D12\0"
1030 /* 304 */ "Q9_Q10_Q11_Q12\0"
1031 /* 319 */ "R12\0"
1032 /* 323 */ "S12\0"
1033 /* 327 */ "D16_D18_D20_D22\0"
1034 /* 343 */ "D19_D20_D21_D22\0"
1035 /* 359 */ "S22\0"
1036 /* 363 */ "D0_D2\0"
1037 /* 369 */ "D0_D1_D2\0"
1038 /* 378 */ "Q1_Q2\0"
1039 /* 384 */ "MVFR2\0"
1040 /* 390 */ "S2\0"
1041 /* 393 */ "FPINST2\0"
1042 /* 401 */ "D7_D9_D11_D13\0"
1043 /* 415 */ "D11_D12_D13\0"
1044 /* 427 */ "Q10_Q11_Q12_Q13\0"
1045 /* 443 */ "S13\0"
1046 /* 447 */ "D17_D19_D21_D23\0"
1047 /* 463 */ "D21_D22_D23\0"
1048 /* 475 */ "S23\0"
1049 /* 479 */ "D1_D3\0"
1050 /* 485 */ "D1_D2_D3\0"
1051 /* 494 */ "Q0_Q1_Q2_Q3\0"
1052 /* 506 */ "R2_R3\0"
1053 /* 512 */ "S3\0"
1054 /* 515 */ "D8_D10_D12_D14\0"
1055 /* 530 */ "D11_D12_D13_D14\0"
1056 /* 546 */ "Q11_Q12_Q13_Q14\0"
1057 /* 562 */ "S14\0"
1058 /* 566 */ "D18_D20_D22_D24\0"
1059 /* 582 */ "D21_D22_D23_D24\0"
1060 /* 598 */ "S24\0"
1061 /* 602 */ "D0_D2_D4\0"
1062 /* 611 */ "D1_D2_D3_D4\0"
1063 /* 623 */ "Q1_Q2_Q3_Q4\0"
1064 /* 635 */ "R4\0"
1065 /* 638 */ "S4\0"
1066 /* 641 */ "D9_D11_D13_D15\0"
1067 /* 656 */ "D13_D14_D15\0"
1068 /* 668 */ "Q12_Q13_Q14_Q15\0"
1069 /* 684 */ "S15\0"
1070 /* 688 */ "D19_D21_D23_D25\0"
1071 /* 704 */ "D23_D24_D25\0"
1072 /* 716 */ "S25\0"
1073 /* 720 */ "D1_D3_D5\0"
1074 /* 729 */ "D3_D4_D5\0"
1075 /* 738 */ "Q2_Q3_Q4_Q5\0"
1076 /* 750 */ "R4_R5\0"
1077 /* 756 */ "S5\0"
1078 /* 759 */ "D10_D12_D14_D16\0"
1079 /* 775 */ "D13_D14_D15_D16\0"
1080 /* 791 */ "S16\0"
1081 /* 795 */ "D20_D22_D24_D26\0"
1082 /* 811 */ "D23_D24_D25_D26\0"
1083 /* 827 */ "S26\0"
1084 /* 831 */ "D0_D2_D4_D6\0"
1085 /* 843 */ "D3_D4_D5_D6\0"
1086 /* 855 */ "Q3_Q4_Q5_Q6\0"
1087 /* 867 */ "R6\0"
1088 /* 870 */ "S6\0"
1089 /* 873 */ "D11_D13_D15_D17\0"
1090 /* 889 */ "D15_D16_D17\0"
1091 /* 901 */ "S17\0"
1092 /* 905 */ "D21_D23_D25_D27\0"
1093 /* 921 */ "D25_D26_D27\0"
1094 /* 933 */ "S27\0"
1095 /* 937 */ "D1_D3_D5_D7\0"
1096 /* 949 */ "D5_D6_D7\0"
1097 /* 958 */ "Q4_Q5_Q6_Q7\0"
1098 /* 970 */ "R6_R7\0"
1099 /* 976 */ "S7\0"
1100 /* 979 */ "D12_D14_D16_D18\0"
1101 /* 995 */ "D15_D16_D17_D18\0"
1102 /* 1011 */ "S18\0"
1103 /* 1015 */ "D22_D24_D26_D28\0"
1104 /* 1031 */ "D25_D26_D27_D28\0"
1105 /* 1047 */ "S28\0"
1106 /* 1051 */ "D2_D4_D6_D8\0"
1107 /* 1063 */ "D5_D6_D7_D8\0"
1108 /* 1075 */ "Q5_Q6_Q7_Q8\0"
1109 /* 1087 */ "R8\0"
1110 /* 1090 */ "S8\0"
1111 /* 1093 */ "D13_D15_D17_D19\0"
1112 /* 1109 */ "D17_D18_D19\0"
1113 /* 1121 */ "S19\0"
1114 /* 1125 */ "D23_D25_D27_D29\0"
1115 /* 1141 */ "D27_D28_D29\0"
1116 /* 1153 */ "S29\0"
1117 /* 1157 */ "D3_D5_D7_D9\0"
1118 /* 1169 */ "D7_D8_D9\0"
1119 /* 1178 */ "Q6_Q7_Q8_Q9\0"
1120 /* 1190 */ "R8_R9\0"
1121 /* 1196 */ "S9\0"
1122 /* 1199 */ "PC\0"
1123 /* 1202 */ "FPSCR_NZCVQC\0"
1124 /* 1215 */ "FPEXC\0"
1125 /* 1221 */ "FPSID\0"
1126 /* 1227 */ "RA_AUTH_CODE\0"
1127 /* 1240 */ "ITSTATE\0"
1128 /* 1248 */ "R12_SP\0"
1129 /* 1255 */ "FPSCR\0"
1130 /* 1261 */ "LR\0"
1131 /* 1264 */ "VPR\0"
1132 /* 1268 */ "APSR\0"
1133 /* 1273 */ "CPSR\0"
1134 /* 1278 */ "SPSR\0"
1135 /* 1283 */ "ZR\0"
1136 /* 1286 */ "FPCXTNS\0"
1137 /* 1294 */ "FPCXTS\0"
1138 /* 1301 */ "FPINST\0"
1139 /* 1308 */ "FPSCR_NZCV\0"
1140 /* 1319 */ "APSR_NZCV\0"
1141};
1142#ifdef __GNUC__
1143#pragma GCC diagnostic pop
1144#endif
1145
1146extern const MCRegisterDesc ARMRegDesc[] = { // Descriptors
1147 { 12, 0, 0, 0, 0, 0, 0 },
1148 { 1268, 11, 11, 2, 45056, 212, 0 },
1149 { 1319, 11, 11, 2, 45057, 212, 0 },
1150 { 1273, 11, 11, 2, 45058, 212, 0 },
1151 { 1286, 11, 11, 2, 45059, 212, 0 },
1152 { 1294, 11, 11, 2, 45060, 212, 0 },
1153 { 1215, 11, 11, 2, 45061, 212, 0 },
1154 { 1301, 11, 11, 2, 45062, 212, 0 },
1155 { 1255, 11, 11, 2, 45063, 212, 0 },
1156 { 1308, 11, 11, 2, 45063, 212, 0 },
1157 { 1202, 11, 11, 2, 45064, 212, 0 },
1158 { 1221, 11, 11, 2, 45065, 212, 0 },
1159 { 1240, 11, 11, 2, 45066, 212, 0 },
1160 { 1261, 11, 11, 2, 45067, 212, 0 },
1161 { 1199, 11, 11, 2, 45068, 212, 0 },
1162 { 1227, 11, 11, 2, 45069, 212, 0 },
1163 { 1252, 11, 3964, 2, 45070, 212, 0 },
1164 { 1278, 11, 11, 2, 45071, 212, 0 },
1165 { 1264, 11, 11, 2, 45072, 212, 0 },
1166 { 1283, 11, 11, 2, 45073, 212, 0 },
1167 { 119, 3120, 2485, 19, 10874898, 6, 0 },
1168 { 251, 3127, 951, 19, 10874900, 6, 0 },
1169 { 366, 3134, 2434, 19, 10874902, 6, 0 },
1170 { 482, 3148, 2322, 19, 10874904, 6, 0 },
1171 { 608, 3162, 2370, 19, 10874906, 6, 0 },
1172 { 726, 3176, 2201, 19, 10874908, 6, 0 },
1173 { 840, 3190, 2257, 19, 10874910, 6, 0 },
1174 { 946, 3204, 2076, 19, 10874912, 6, 0 },
1175 { 1060, 3218, 2136, 19, 10874914, 6, 0 },
1176 { 1166, 3232, 1956, 19, 10874916, 6, 0 },
1177 { 9, 3246, 2016, 19, 10874918, 6, 0 },
1178 { 144, 3260, 1836, 19, 10874920, 6, 0 },
1179 { 285, 3274, 1896, 19, 10874922, 6, 0 },
1180 { 411, 3288, 1716, 19, 10874924, 6, 0 },
1181 { 526, 3302, 1776, 19, 10874926, 6, 0 },
1182 { 652, 3316, 1621, 19, 10874928, 6, 0 },
1183 { 771, 11, 1680, 2, 45106, 212, 0 },
1184 { 885, 11, 1550, 2, 45107, 212, 0 },
1185 { 991, 11, 1585, 2, 45108, 212, 0 },
1186 { 1105, 11, 1480, 2, 45109, 212, 0 },
1187 { 59, 11, 1515, 2, 45110, 212, 0 },
1188 { 195, 11, 1410, 2, 45111, 212, 0 },
1189 { 339, 11, 1445, 2, 45112, 212, 0 },
1190 { 459, 11, 1340, 2, 45113, 212, 0 },
1191 { 578, 11, 1375, 2, 45114, 212, 0 },
1192 { 700, 11, 1269, 2, 45115, 212, 0 },
1193 { 807, 11, 1309, 2, 45116, 212, 0 },
1194 { 917, 11, 835, 2, 45117, 212, 0 },
1195 { 1027, 11, 883, 2, 45118, 212, 0 },
1196 { 1137, 11, 856, 2, 45119, 212, 0 },
1197 { 95, 11, 901, 2, 45120, 212, 0 },
1198 { 227, 11, 1261, 2, 45121, 212, 0 },
1199 { 393, 11, 11, 2, 45122, 212, 0 },
1200 { 128, 11, 11, 2, 45123, 212, 0 },
1201 { 260, 11, 11, 2, 45124, 212, 0 },
1202 { 384, 11, 11, 2, 45125, 212, 0 },
1203 { 122, 11, 11, 2, 45126, 212, 0 },
1204 { 125, 3123, 3555, 22, 12689426, 9, 0 },
1205 { 257, 3144, 2867, 22, 12689430, 9, 0 },
1206 { 381, 3172, 3077, 22, 12689434, 9, 0 },
1207 { 503, 3200, 3007, 22, 12689438, 9, 0 },
1208 { 632, 3228, 2997, 22, 12689442, 9, 0 },
1209 { 747, 3256, 2987, 22, 12689446, 9, 0 },
1210 { 864, 3284, 2977, 22, 12689450, 9, 0 },
1211 { 967, 3312, 2967, 22, 12689454, 9, 0 },
1212 { 1084, 2893, 2957, 0, 10874930, 18, 0 },
1213 { 1187, 2896, 2947, 0, 10874932, 18, 0 },
1214 { 35, 2899, 2937, 0, 10874934, 18, 0 },
1215 { 171, 2902, 2927, 0, 10874936, 18, 0 },
1216 { 315, 2905, 2917, 0, 10874938, 18, 0 },
1217 { 439, 2908, 2782, 0, 10874940, 18, 0 },
1218 { 558, 2911, 927, 0, 10874942, 18, 0 },
1219 { 680, 2914, 3551, 0, 10874944, 18, 0 },
1220 { 131, 11, 3811, 2, 45127, 212, 0 },
1221 { 263, 11, 3809, 2, 45128, 212, 0 },
1222 { 387, 11, 3809, 2, 45129, 212, 0 },
1223 { 509, 11, 3807, 2, 45130, 212, 0 },
1224 { 635, 11, 3807, 2, 45131, 212, 0 },
1225 { 753, 11, 3805, 2, 45132, 212, 0 },
1226 { 867, 11, 3805, 2, 45133, 212, 0 },
1227 { 973, 11, 3803, 2, 45134, 212, 0 },
1228 { 1087, 11, 3803, 2, 45135, 212, 0 },
1229 { 1193, 11, 3801, 2, 45136, 212, 0 },
1230 { 39, 11, 3801, 2, 45137, 212, 0 },
1231 { 179, 11, 3799, 2, 45138, 212, 0 },
1232 { 319, 11, 3799, 2, 45139, 212, 0 },
1233 { 134, 11, 2493, 2, 45074, 212, 0 },
1234 { 272, 11, 2484, 2, 45075, 212, 0 },
1235 { 390, 11, 962, 2, 45076, 212, 0 },
1236 { 512, 11, 950, 2, 45077, 212, 0 },
1237 { 638, 11, 2451, 2, 45078, 212, 0 },
1238 { 756, 11, 2433, 2, 45079, 212, 0 },
1239 { 870, 11, 2340, 2, 45080, 212, 0 },
1240 { 976, 11, 2321, 2, 45081, 212, 0 },
1241 { 1090, 11, 2391, 2, 45082, 212, 0 },
1242 { 1196, 11, 2369, 2, 45083, 212, 0 },
1243 { 43, 11, 2222, 2, 45084, 212, 0 },
1244 { 183, 11, 2200, 2, 45085, 212, 0 },
1245 { 323, 11, 2280, 2, 45086, 212, 0 },
1246 { 443, 11, 2256, 2, 45087, 212, 0 },
1247 { 562, 11, 2099, 2, 45088, 212, 0 },
1248 { 684, 11, 2075, 2, 45089, 212, 0 },
1249 { 791, 11, 2159, 2, 45090, 212, 0 },
1250 { 901, 11, 2135, 2, 45091, 212, 0 },
1251 { 1011, 11, 1979, 2, 45092, 212, 0 },
1252 { 1121, 11, 1955, 2, 45093, 212, 0 },
1253 { 79, 11, 2039, 2, 45094, 212, 0 },
1254 { 215, 11, 2015, 2, 45095, 212, 0 },
1255 { 359, 11, 1859, 2, 45096, 212, 0 },
1256 { 475, 11, 1835, 2, 45097, 212, 0 },
1257 { 598, 11, 1919, 2, 45098, 212, 0 },
1258 { 716, 11, 1895, 2, 45099, 212, 0 },
1259 { 827, 11, 1739, 2, 45100, 212, 0 },
1260 { 933, 11, 1715, 2, 45101, 212, 0 },
1261 { 1047, 11, 1799, 2, 45102, 212, 0 },
1262 { 1153, 11, 1775, 2, 45103, 212, 0 },
1263 { 115, 11, 1644, 2, 45104, 212, 0 },
1264 { 247, 11, 1620, 2, 45105, 212, 0 },
1265 { 363, 3137, 2487, 29, 12738578, 21, 0 },
1266 { 479, 3151, 974, 29, 12738580, 21, 0 },
1267 { 605, 3165, 2469, 29, 12738582, 21, 0 },
1268 { 723, 3179, 2359, 29, 12738584, 21, 0 },
1269 { 837, 3193, 2413, 29, 12738586, 21, 0 },
1270 { 943, 3207, 2244, 29, 12738588, 21, 0 },
1271 { 1057, 3221, 2304, 29, 12738590, 21, 0 },
1272 { 1163, 3235, 2123, 29, 12738592, 21, 0 },
1273 { 6, 3249, 2183, 29, 12738594, 21, 0 },
1274 { 154, 3263, 2003, 29, 12738596, 21, 0 },
1275 { 281, 3277, 2063, 29, 12738598, 21, 0 },
1276 { 407, 3291, 1883, 29, 12738600, 21, 0 },
1277 { 522, 3305, 1943, 29, 12738602, 21, 0 },
1278 { 648, 3319, 1763, 29, 12738604, 21, 0 },
1279 { 767, 2425, 1823, 11, 14532654, 33, 0 },
1280 { 881, 2316, 1668, 11, 13652016, 33, 0 },
1281 { 987, 3326, 1703, 8, 13627442, 37, 0 },
1282 { 1101, 3326, 1573, 8, 13627443, 37, 0 },
1283 { 55, 3326, 1608, 8, 13627444, 37, 0 },
1284 { 207, 3326, 1503, 8, 13627445, 37, 0 },
1285 { 335, 3326, 1538, 8, 13627446, 37, 0 },
1286 { 455, 3326, 1433, 8, 13627447, 37, 0 },
1287 { 574, 3326, 1468, 8, 13627448, 37, 0 },
1288 { 696, 3326, 1363, 8, 13627449, 37, 0 },
1289 { 803, 3326, 1398, 8, 13627450, 37, 0 },
1290 { 913, 3326, 1292, 8, 13627451, 37, 0 },
1291 { 1023, 3326, 1330, 8, 13627452, 37, 0 },
1292 { 1133, 3326, 873, 8, 13627453, 37, 0 },
1293 { 91, 3326, 912, 8, 13627454, 37, 0 },
1294 { 239, 3326, 1263, 8, 13627455, 37, 0 },
1295 { 254, 3779, 3557, 168, 12673042, 55, 0 },
1296 { 378, 3759, 3117, 168, 12673046, 55, 0 },
1297 { 500, 3739, 3102, 168, 12673050, 55, 0 },
1298 { 629, 3719, 3102, 168, 12673054, 55, 0 },
1299 { 744, 3699, 3102, 168, 12673058, 55, 0 },
1300 { 861, 3679, 3102, 168, 12673062, 55, 0 },
1301 { 964, 3659, 3102, 168, 12673066, 55, 0 },
1302 { 1081, 3643, 3102, 88, 12681262, 72, 0 },
1303 { 1184, 3631, 3102, 76, 12689458, 85, 0 },
1304 { 32, 3619, 3102, 76, 12689460, 85, 0 },
1305 { 167, 3607, 3102, 76, 12689462, 85, 0 },
1306 { 311, 3595, 3102, 76, 12689464, 85, 0 },
1307 { 435, 3583, 3102, 76, 12689466, 85, 0 },
1308 { 554, 3571, 3114, 76, 12689468, 85, 0 },
1309 { 676, 3559, 3553, 76, 12689470, 85, 0 },
1310 { 494, 628, 11, 474, 12640274, 147, 0 },
1311 { 623, 573, 11, 474, 12640278, 147, 0 },
1312 { 738, 518, 11, 474, 12640282, 147, 0 },
1313 { 855, 463, 11, 474, 12640286, 147, 0 },
1314 { 958, 408, 11, 474, 12640290, 147, 0 },
1315 { 1075, 357, 11, 423, 12648486, 164, 0 },
1316 { 1178, 310, 11, 376, 12656682, 179, 0 },
1317 { 26, 267, 11, 333, 12664878, 192, 0 },
1318 { 161, 228, 11, 294, 12673074, 203, 0 },
1319 { 304, 189, 11, 294, 12673076, 203, 0 },
1320 { 427, 150, 11, 294, 12673078, 203, 0 },
1321 { 546, 111, 11, 294, 12673080, 203, 0 },
1322 { 668, 72, 11, 294, 12673082, 203, 0 },
1323 { 266, 2875, 11, 16, 10874951, 3, 0 },
1324 { 506, 2878, 11, 16, 10874953, 3, 0 },
1325 { 750, 2881, 11, 16, 10874955, 3, 0 },
1326 { 970, 2884, 11, 16, 10874957, 3, 0 },
1327 { 1190, 2887, 11, 16, 10874959, 3, 0 },
1328 { 175, 2890, 11, 16, 10874961, 3, 0 },
1329 { 1248, 2551, 11, 16, 14618638, 0, 0 },
1330 { 369, 3951, 3556, 63, 12681234, 26, 0 },
1331 { 485, 2641, 983, 63, 12681236, 26, 0 },
1332 { 614, 3938, 2870, 63, 12681238, 26, 0 },
1333 { 729, 2628, 2862, 63, 12681240, 26, 0 },
1334 { 846, 3925, 3080, 63, 12681242, 26, 0 },
1335 { 949, 2615, 2851, 63, 12681244, 26, 0 },
1336 { 1066, 3912, 3071, 63, 12681246, 26, 0 },
1337 { 1169, 2602, 2845, 63, 12681248, 26, 0 },
1338 { 16, 3899, 3065, 63, 12681250, 26, 0 },
1339 { 137, 2589, 2839, 63, 12681252, 26, 0 },
1340 { 292, 3886, 3059, 63, 12681254, 26, 0 },
1341 { 415, 2576, 2833, 63, 12681256, 26, 0 },
1342 { 534, 3873, 3053, 63, 12681258, 26, 0 },
1343 { 656, 2563, 2827, 63, 12681260, 26, 0 },
1344 { 779, 3862, 3047, 52, 12685358, 40, 0 },
1345 { 889, 2554, 2821, 43, 12689456, 46, 0 },
1346 { 999, 3855, 3041, 36, 11976754, 51, 0 },
1347 { 1109, 2544, 2815, 36, 11976755, 51, 0 },
1348 { 67, 3848, 3035, 36, 11976756, 51, 0 },
1349 { 187, 2537, 2809, 36, 11976757, 51, 0 },
1350 { 347, 3841, 3029, 36, 11976758, 51, 0 },
1351 { 463, 2530, 2803, 36, 11976759, 51, 0 },
1352 { 586, 3834, 3023, 36, 11976760, 51, 0 },
1353 { 704, 2523, 2797, 36, 11976761, 51, 0 },
1354 { 815, 3827, 3017, 36, 11976762, 51, 0 },
1355 { 921, 2516, 2791, 36, 11976763, 51, 0 },
1356 { 1035, 3820, 2857, 36, 11976764, 51, 0 },
1357 { 1141, 2509, 935, 36, 11976765, 51, 0 },
1358 { 103, 3813, 946, 36, 11976766, 51, 0 },
1359 { 219, 2502, 3552, 36, 11976767, 51, 0 },
1360 { 602, 3490, 2490, 212, 12730386, 90, 0 },
1361 { 720, 3478, 2430, 212, 12730388, 90, 0 },
1362 { 834, 3466, 2479, 212, 12730390, 90, 0 },
1363 { 940, 3454, 2386, 212, 12730392, 90, 0 },
1364 { 1054, 3442, 2386, 212, 12730394, 90, 0 },
1365 { 1160, 3430, 2275, 212, 12730396, 90, 0 },
1366 { 3, 3418, 2275, 212, 12730398, 90, 0 },
1367 { 151, 3406, 2154, 212, 12730400, 90, 0 },
1368 { 278, 3394, 2154, 212, 12730402, 90, 0 },
1369 { 404, 3382, 2034, 212, 12730404, 90, 0 },
1370 { 518, 3370, 2034, 212, 12730406, 90, 0 },
1371 { 644, 3358, 1914, 212, 12730408, 90, 0 },
1372 { 763, 3512, 1914, 202, 14524458, 97, 0 },
1373 { 877, 3502, 1794, 202, 13643820, 97, 0 },
1374 { 983, 3530, 1794, 194, 13738030, 103, 0 },
1375 { 1097, 3522, 1698, 194, 13672496, 103, 0 },
1376 { 51, 3538, 1698, 188, 13676594, 108, 0 },
1377 { 203, 3538, 1603, 188, 13676595, 108, 0 },
1378 { 331, 3538, 1603, 188, 13676596, 108, 0 },
1379 { 451, 3538, 1533, 188, 13676597, 108, 0 },
1380 { 570, 3538, 1533, 188, 13676598, 108, 0 },
1381 { 692, 3538, 1463, 188, 13676599, 108, 0 },
1382 { 799, 3538, 1463, 188, 13676600, 108, 0 },
1383 { 909, 3538, 1393, 188, 13676601, 108, 0 },
1384 { 1019, 3538, 1393, 188, 13676602, 108, 0 },
1385 { 1129, 3538, 1304, 188, 13676603, 108, 0 },
1386 { 87, 3538, 1327, 188, 13676604, 108, 0 },
1387 { 235, 3538, 1266, 188, 13676605, 108, 0 },
1388 { 831, 1149, 2491, 276, 12722194, 112, 0 },
1389 { 937, 1131, 2428, 276, 12722196, 112, 0 },
1390 { 1051, 1113, 2428, 276, 12722198, 112, 0 },
1391 { 1157, 1095, 2319, 276, 12722200, 112, 0 },
1392 { 0, 1077, 2319, 276, 12722202, 112, 0 },
1393 { 148, 1059, 2198, 276, 12722204, 112, 0 },
1394 { 275, 1041, 2198, 276, 12722206, 112, 0 },
1395 { 401, 1023, 2097, 276, 12722208, 112, 0 },
1396 { 515, 1005, 2097, 276, 12722210, 112, 0 },
1397 { 641, 987, 1977, 276, 12722212, 112, 0 },
1398 { 759, 1183, 1977, 260, 14516262, 121, 0 },
1399 { 873, 1167, 1857, 260, 13635624, 121, 0 },
1400 { 979, 1213, 1857, 246, 13729834, 129, 0 },
1401 { 1093, 1199, 1737, 246, 13664300, 129, 0 },
1402 { 47, 1239, 1737, 234, 13709358, 136, 0 },
1403 { 199, 1227, 1642, 234, 13688880, 136, 0 },
1404 { 327, 1251, 1642, 224, 13692978, 142, 0 },
1405 { 447, 1251, 1571, 224, 13692979, 142, 0 },
1406 { 566, 1251, 1571, 224, 13692980, 142, 0 },
1407 { 688, 1251, 1501, 224, 13692981, 142, 0 },
1408 { 795, 1251, 1501, 224, 13692982, 142, 0 },
1409 { 905, 1251, 1431, 224, 13692983, 142, 0 },
1410 { 1015, 1251, 1431, 224, 13692984, 142, 0 },
1411 { 1125, 1251, 1328, 224, 13692985, 142, 0 },
1412 { 83, 1251, 1328, 224, 13692986, 142, 0 },
1413 { 231, 1251, 1267, 224, 13692987, 142, 0 },
1414 { 372, 3130, 981, 22, 12689428, 9, 0 },
1415 { 617, 3158, 2675, 22, 12689432, 9, 0 },
1416 { 849, 3186, 2773, 22, 12689436, 9, 0 },
1417 { 1069, 3214, 2764, 22, 12689440, 9, 0 },
1418 { 19, 3242, 2755, 22, 12689444, 9, 0 },
1419 { 296, 3270, 2746, 22, 12689448, 9, 0 },
1420 { 538, 3298, 2737, 22, 12689452, 9, 0 },
1421 { 783, 2195, 2728, 3, 11976752, 14, 0 },
1422 { 1003, 2654, 2719, 0, 10874931, 18, 0 },
1423 { 71, 2657, 2710, 0, 10874933, 18, 0 },
1424 { 351, 2660, 2701, 0, 10874935, 18, 0 },
1425 { 590, 2663, 2692, 0, 10874937, 18, 0 },
1426 { 819, 2666, 2683, 0, 10874939, 18, 0 },
1427 { 1039, 2669, 919, 0, 10874941, 18, 0 },
1428 { 107, 2672, 940, 0, 10874943, 18, 0 },
1429 { 611, 815, 960, 148, 12673044, 55, 0 },
1430 { 843, 795, 2680, 148, 12673048, 55, 0 },
1431 { 1063, 775, 2680, 148, 12673052, 55, 0 },
1432 { 13, 755, 2680, 148, 12673056, 55, 0 },
1433 { 289, 735, 2680, 148, 12673060, 55, 0 },
1434 { 530, 715, 2680, 148, 12673064, 55, 0 },
1435 { 775, 697, 2680, 130, 12677164, 64, 0 },
1436 { 995, 683, 2680, 116, 12685360, 79, 0 },
1437 { 63, 60, 2680, 104, 12689459, 85, 0 },
1438 { 343, 48, 2680, 104, 12689461, 85, 0 },
1439 { 582, 36, 2680, 104, 12689463, 85, 0 },
1440 { 811, 24, 2680, 104, 12689465, 85, 0 },
1441 { 1031, 12, 2680, 104, 12689467, 85, 0 },
1442 { 99, 0, 854, 104, 12689469, 85, 0 },
1443};
1444
1445extern const MCPhysReg ARMRegUnitRoots[][2] = {
1446 { ARM::APSR },
1447 { ARM::APSR_NZCV },
1448 { ARM::CPSR },
1449 { ARM::FPCXTNS },
1450 { ARM::FPCXTS },
1451 { ARM::FPEXC },
1452 { ARM::FPINST },
1453 { ARM::FPSCR, ARM::FPSCR_NZCV },
1454 { ARM::FPSCR_NZCVQC },
1455 { ARM::FPSID },
1456 { ARM::ITSTATE },
1457 { ARM::LR },
1458 { ARM::PC },
1459 { ARM::RA_AUTH_CODE },
1460 { ARM::SP },
1461 { ARM::SPSR },
1462 { ARM::VPR },
1463 { ARM::ZR },
1464 { ARM::S0 },
1465 { ARM::S1 },
1466 { ARM::S2 },
1467 { ARM::S3 },
1468 { ARM::S4 },
1469 { ARM::S5 },
1470 { ARM::S6 },
1471 { ARM::S7 },
1472 { ARM::S8 },
1473 { ARM::S9 },
1474 { ARM::S10 },
1475 { ARM::S11 },
1476 { ARM::S12 },
1477 { ARM::S13 },
1478 { ARM::S14 },
1479 { ARM::S15 },
1480 { ARM::S16 },
1481 { ARM::S17 },
1482 { ARM::S18 },
1483 { ARM::S19 },
1484 { ARM::S20 },
1485 { ARM::S21 },
1486 { ARM::S22 },
1487 { ARM::S23 },
1488 { ARM::S24 },
1489 { ARM::S25 },
1490 { ARM::S26 },
1491 { ARM::S27 },
1492 { ARM::S28 },
1493 { ARM::S29 },
1494 { ARM::S30 },
1495 { ARM::S31 },
1496 { ARM::D16 },
1497 { ARM::D17 },
1498 { ARM::D18 },
1499 { ARM::D19 },
1500 { ARM::D20 },
1501 { ARM::D21 },
1502 { ARM::D22 },
1503 { ARM::D23 },
1504 { ARM::D24 },
1505 { ARM::D25 },
1506 { ARM::D26 },
1507 { ARM::D27 },
1508 { ARM::D28 },
1509 { ARM::D29 },
1510 { ARM::D30 },
1511 { ARM::D31 },
1512 { ARM::FPINST2 },
1513 { ARM::MVFR0 },
1514 { ARM::MVFR1 },
1515 { ARM::MVFR2 },
1516 { ARM::P0 },
1517 { ARM::R0 },
1518 { ARM::R1 },
1519 { ARM::R2 },
1520 { ARM::R3 },
1521 { ARM::R4 },
1522 { ARM::R5 },
1523 { ARM::R6 },
1524 { ARM::R7 },
1525 { ARM::R8 },
1526 { ARM::R9 },
1527 { ARM::R10 },
1528 { ARM::R11 },
1529 { ARM::R12 },
1530};
1531
1532namespace { // Register classes...
1533 // HPR Register Class...
1534 const MCPhysReg HPR[] = {
1535 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
1536 };
1537
1538 // HPR Bit set.
1539 const uint8_t HPRBits[] = {
1540 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
1541 };
1542
1543 // FPWithVPR Register Class...
1544 const MCPhysReg FPWithVPR[] = {
1545 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::VPR,
1546 };
1547
1548 // FPWithVPR Bit set.
1549 const uint8_t FPWithVPRBits[] = {
1550 0x00, 0x00, 0xf4, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
1551 };
1552
1553 // SPR Register Class...
1554 const MCPhysReg SPR[] = {
1555 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
1556 };
1557
1558 // SPR Bit set.
1559 const uint8_t SPRBits[] = {
1560 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
1561 };
1562
1563 // FPWithVPR_with_ssub_0 Register Class...
1564 const MCPhysReg FPWithVPR_with_ssub_0[] = {
1565 ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15,
1566 };
1567
1568 // FPWithVPR_with_ssub_0 Bit set.
1569 const uint8_t FPWithVPR_with_ssub_0Bits[] = {
1570 0x00, 0x00, 0xf0, 0xff, 0x0f,
1571 };
1572
1573 // GPR Register Class...
1574 const MCPhysReg GPR[] = {
1575 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC,
1576 };
1577
1578 // GPR Bit set.
1579 const uint8_t GPRBits[] = {
1580 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1581 };
1582
1583 // GPRwithAPSR Register Class...
1584 const MCPhysReg GPRwithAPSR[] = {
1585 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::APSR_NZCV,
1586 };
1587
1588 // GPRwithAPSR Bit set.
1589 const uint8_t GPRwithAPSRBits[] = {
1590 0x04, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1591 };
1592
1593 // GPRwithZR Register Class...
1594 const MCPhysReg GPRwithZR[] = {
1595 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::ZR,
1596 };
1597
1598 // GPRwithZR Bit set.
1599 const uint8_t GPRwithZRBits[] = {
1600 0x00, 0x20, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1601 };
1602
1603 // SPR_8 Register Class...
1604 const MCPhysReg SPR_8[] = {
1605 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15,
1606 };
1607
1608 // SPR_8 Bit set.
1609 const uint8_t SPR_8Bits[] = {
1610 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f,
1611 };
1612
1613 // GPRnopc Register Class...
1614 const MCPhysReg GPRnopc[] = {
1615 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR,
1616 };
1617
1618 // GPRnopc Bit set.
1619 const uint8_t GPRnopcBits[] = {
1620 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1621 };
1622
1623 // GPRnosp Register Class...
1624 const MCPhysReg GPRnosp[] = {
1625 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC,
1626 };
1627
1628 // GPRnosp Bit set.
1629 const uint8_t GPRnospBits[] = {
1630 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1631 };
1632
1633 // GPRwithAPSR_NZCVnosp Register Class...
1634 const MCPhysReg GPRwithAPSR_NZCVnosp[] = {
1635 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR_NZCV,
1636 };
1637
1638 // GPRwithAPSR_NZCVnosp Bit set.
1639 const uint8_t GPRwithAPSR_NZCVnospBits[] = {
1640 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1641 };
1642
1643 // GPRwithAPSRnosp Register Class...
1644 const MCPhysReg GPRwithAPSRnosp[] = {
1645 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR,
1646 };
1647
1648 // GPRwithAPSRnosp Bit set.
1649 const uint8_t GPRwithAPSRnospBits[] = {
1650 0x02, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1651 };
1652
1653 // GPRwithZRnosp Register Class...
1654 const MCPhysReg GPRwithZRnosp[] = {
1655 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::ZR,
1656 };
1657
1658 // GPRwithZRnosp Bit set.
1659 const uint8_t GPRwithZRnospBits[] = {
1660 0x00, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1661 };
1662
1663 // GPRnoip Register Class...
1664 const MCPhysReg GPRnoip[] = {
1665 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC,
1666 };
1667
1668 // GPRnoip Bit set.
1669 const uint8_t GPRnoipBits[] = {
1670 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f,
1671 };
1672
1673 // rGPR Register Class...
1674 const MCPhysReg rGPR[] = {
1675 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR,
1676 };
1677
1678 // rGPR Bit set.
1679 const uint8_t rGPRBits[] = {
1680 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f,
1681 };
1682
1683 // GPRnoip_and_GPRnopc Register Class...
1684 const MCPhysReg GPRnoip_and_GPRnopc[] = {
1685 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP,
1686 };
1687
1688 // GPRnoip_and_GPRnopc Bit set.
1689 const uint8_t GPRnoip_and_GPRnopcBits[] = {
1690 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f,
1691 };
1692
1693 // GPRnoip_and_GPRnosp Register Class...
1694 const MCPhysReg GPRnoip_and_GPRnosp[] = {
1695 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC,
1696 };
1697
1698 // GPRnoip_and_GPRnosp Bit set.
1699 const uint8_t GPRnoip_and_GPRnospBits[] = {
1700 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f,
1701 };
1702
1703 // GPRnoip_and_GPRwithAPSR_NZCVnosp Register Class...
1704 const MCPhysReg GPRnoip_and_GPRwithAPSR_NZCVnosp[] = {
1705 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11,
1706 };
1707
1708 // GPRnoip_and_GPRwithAPSR_NZCVnosp Bit set.
1709 const uint8_t GPRnoip_and_GPRwithAPSR_NZCVnospBits[] = {
1710 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f,
1711 };
1712
1713 // tGPRwithpc Register Class...
1714 const MCPhysReg tGPRwithpc[] = {
1715 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::PC,
1716 };
1717
1718 // tGPRwithpc Bit set.
1719 const uint8_t tGPRwithpcBits[] = {
1720 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01,
1721 };
1722
1723 // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Register Class...
1724 const MCPhysReg FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8[] = {
1725 ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7,
1726 };
1727
1728 // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Bit set.
1729 const uint8_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits[] = {
1730 0x00, 0x00, 0xf0, 0x0f,
1731 };
1732
1733 // hGPR Register Class...
1734 const MCPhysReg hGPR[] = {
1735 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC,
1736 };
1737
1738 // hGPR Bit set.
1739 const uint8_t hGPRBits[] = {
1740 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1741 };
1742
1743 // tGPR Register Class...
1744 const MCPhysReg tGPR[] = {
1745 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7,
1746 };
1747
1748 // tGPR Bit set.
1749 const uint8_t tGPRBits[] = {
1750 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01,
1751 };
1752
1753 // tGPREven Register Class...
1754 const MCPhysReg tGPREven[] = {
1755 ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10, ARM::R12, ARM::LR,
1756 };
1757
1758 // tGPREven Bit set.
1759 const uint8_t tGPREvenBits[] = {
1760 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x2a,
1761 };
1762
1763 // GPRnopc_and_hGPR Register Class...
1764 const MCPhysReg GPRnopc_and_hGPR[] = {
1765 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR,
1766 };
1767
1768 // GPRnopc_and_hGPR Bit set.
1769 const uint8_t GPRnopc_and_hGPRBits[] = {
1770 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1771 };
1772
1773 // GPRnosp_and_hGPR Register Class...
1774 const MCPhysReg GPRnosp_and_hGPR[] = {
1775 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC,
1776 };
1777
1778 // GPRnosp_and_hGPR Bit set.
1779 const uint8_t GPRnosp_and_hGPRBits[] = {
1780 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1781 };
1782
1783 // GPRnoip_and_hGPR Register Class...
1784 const MCPhysReg GPRnoip_and_hGPR[] = {
1785 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC,
1786 };
1787
1788 // GPRnoip_and_hGPR Bit set.
1789 const uint8_t GPRnoip_and_hGPRBits[] = {
1790 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
1791 };
1792
1793 // GPRnoip_and_tGPREven Register Class...
1794 const MCPhysReg GPRnoip_and_tGPREven[] = {
1795 ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10,
1796 };
1797
1798 // GPRnoip_and_tGPREven Bit set.
1799 const uint8_t GPRnoip_and_tGPREvenBits[] = {
1800 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x0a,
1801 };
1802
1803 // GPRnosp_and_GPRnopc_and_hGPR Register Class...
1804 const MCPhysReg GPRnosp_and_GPRnopc_and_hGPR[] = {
1805 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR,
1806 };
1807
1808 // GPRnosp_and_GPRnopc_and_hGPR Bit set.
1809 const uint8_t GPRnosp_and_GPRnopc_and_hGPRBits[] = {
1810 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1811 };
1812
1813 // tGPROdd Register Class...
1814 const MCPhysReg tGPROdd[] = {
1815 ARM::R1, ARM::R3, ARM::R5, ARM::R7, ARM::R9, ARM::R11,
1816 };
1817
1818 // tGPROdd Bit set.
1819 const uint8_t tGPROddBits[] = {
1820 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x15,
1821 };
1822
1823 // GPRnopc_and_GPRnoip_and_hGPR Register Class...
1824 const MCPhysReg GPRnopc_and_GPRnoip_and_hGPR[] = {
1825 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP,
1826 };
1827
1828 // GPRnopc_and_GPRnoip_and_hGPR Bit set.
1829 const uint8_t GPRnopc_and_GPRnoip_and_hGPRBits[] = {
1830 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
1831 };
1832
1833 // GPRnosp_and_GPRnoip_and_hGPR Register Class...
1834 const MCPhysReg GPRnosp_and_GPRnoip_and_hGPR[] = {
1835 ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC,
1836 };
1837
1838 // GPRnosp_and_GPRnoip_and_hGPR Bit set.
1839 const uint8_t GPRnosp_and_GPRnoip_and_hGPRBits[] = {
1840 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
1841 };
1842
1843 // tcGPR Register Class...
1844 const MCPhysReg tcGPR[] = {
1845 ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R12,
1846 };
1847
1848 // tcGPR Bit set.
1849 const uint8_t tcGPRBits[] = {
1850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x20,
1851 };
1852
1853 // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Register Class...
1854 const MCPhysReg GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR[] = {
1855 ARM::R8, ARM::R9, ARM::R10, ARM::R11,
1856 };
1857
1858 // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Bit set.
1859 const uint8_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits[] = {
1860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
1861 };
1862
1863 // hGPR_and_tGPREven Register Class...
1864 const MCPhysReg hGPR_and_tGPREven[] = {
1865 ARM::R8, ARM::R10, ARM::R12, ARM::LR,
1866 };
1867
1868 // hGPR_and_tGPREven Bit set.
1869 const uint8_t hGPR_and_tGPREvenBits[] = {
1870 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a,
1871 };
1872
1873 // tGPR_and_tGPREven Register Class...
1874 const MCPhysReg tGPR_and_tGPREven[] = {
1875 ARM::R0, ARM::R2, ARM::R4, ARM::R6,
1876 };
1877
1878 // tGPR_and_tGPREven Bit set.
1879 const uint8_t tGPR_and_tGPREvenBits[] = {
1880 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa,
1881 };
1882
1883 // tGPR_and_tGPROdd Register Class...
1884 const MCPhysReg tGPR_and_tGPROdd[] = {
1885 ARM::R1, ARM::R3, ARM::R5, ARM::R7,
1886 };
1887
1888 // tGPR_and_tGPROdd Bit set.
1889 const uint8_t tGPR_and_tGPROddBits[] = {
1890 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x01,
1891 };
1892
1893 // tcGPRnotr12 Register Class...
1894 const MCPhysReg tcGPRnotr12[] = {
1895 ARM::R0, ARM::R1, ARM::R2, ARM::R3,
1896 };
1897
1898 // tcGPRnotr12 Bit set.
1899 const uint8_t tcGPRnotr12Bits[] = {
1900 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
1901 };
1902
1903 // tGPREven_and_tcGPR Register Class...
1904 const MCPhysReg tGPREven_and_tcGPR[] = {
1905 ARM::R0, ARM::R2, ARM::R12,
1906 };
1907
1908 // tGPREven_and_tcGPR Bit set.
1909 const uint8_t tGPREven_and_tcGPRBits[] = {
1910 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x20,
1911 };
1912
1913 // hGPR_and_GPRnoip_and_tGPREven Register Class...
1914 const MCPhysReg hGPR_and_GPRnoip_and_tGPREven[] = {
1915 ARM::R8, ARM::R10,
1916 };
1917
1918 // hGPR_and_GPRnoip_and_tGPREven Bit set.
1919 const uint8_t hGPR_and_GPRnoip_and_tGPREvenBits[] = {
1920 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
1921 };
1922
1923 // hGPR_and_tGPROdd Register Class...
1924 const MCPhysReg hGPR_and_tGPROdd[] = {
1925 ARM::R9, ARM::R11,
1926 };
1927
1928 // hGPR_and_tGPROdd Bit set.
1929 const uint8_t hGPR_and_tGPROddBits[] = {
1930 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14,
1931 };
1932
1933 // tGPREven_and_tcGPRnotr12 Register Class...
1934 const MCPhysReg tGPREven_and_tcGPRnotr12[] = {
1935 ARM::R0, ARM::R2,
1936 };
1937
1938 // tGPREven_and_tcGPRnotr12 Bit set.
1939 const uint8_t tGPREven_and_tcGPRnotr12Bits[] = {
1940 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
1941 };
1942
1943 // tGPROdd_and_tcGPR Register Class...
1944 const MCPhysReg tGPROdd_and_tcGPR[] = {
1945 ARM::R1, ARM::R3,
1946 };
1947
1948 // tGPROdd_and_tcGPR Bit set.
1949 const uint8_t tGPROdd_and_tcGPRBits[] = {
1950 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14,
1951 };
1952
1953 // CCR Register Class...
1954 const MCPhysReg CCR[] = {
1955 ARM::CPSR,
1956 };
1957
1958 // CCR Bit set.
1959 const uint8_t CCRBits[] = {
1960 0x08,
1961 };
1962
1963 // FPCXTRegs Register Class...
1964 const MCPhysReg FPCXTRegs[] = {
1965 ARM::FPCXTNS,
1966 };
1967
1968 // FPCXTRegs Bit set.
1969 const uint8_t FPCXTRegsBits[] = {
1970 0x10,
1971 };
1972
1973 // GPRlr Register Class...
1974 const MCPhysReg GPRlr[] = {
1975 ARM::LR,
1976 };
1977
1978 // GPRlr Bit set.
1979 const uint8_t GPRlrBits[] = {
1980 0x00, 0x20,
1981 };
1982
1983 // GPRsp Register Class...
1984 const MCPhysReg GPRsp[] = {
1985 ARM::SP,
1986 };
1987
1988 // GPRsp Bit set.
1989 const uint8_t GPRspBits[] = {
1990 0x00, 0x00, 0x01,
1991 };
1992
1993 // VCCR Register Class...
1994 const MCPhysReg VCCR[] = {
1995 ARM::VPR,
1996 };
1997
1998 // VCCR Bit set.
1999 const uint8_t VCCRBits[] = {
2000 0x00, 0x00, 0x04,
2001 };
2002
2003 // cl_FPSCR_NZCV Register Class...
2004 const MCPhysReg cl_FPSCR_NZCV[] = {
2005 ARM::FPSCR_NZCV,
2006 };
2007
2008 // cl_FPSCR_NZCV Bit set.
2009 const uint8_t cl_FPSCR_NZCVBits[] = {
2010 0x00, 0x02,
2011 };
2012
2013 // hGPR_and_tGPRwithpc Register Class...
2014 const MCPhysReg hGPR_and_tGPRwithpc[] = {
2015 ARM::PC,
2016 };
2017
2018 // hGPR_and_tGPRwithpc Bit set.
2019 const uint8_t hGPR_and_tGPRwithpcBits[] = {
2020 0x00, 0x40,
2021 };
2022
2023 // hGPR_and_tcGPR Register Class...
2024 const MCPhysReg hGPR_and_tcGPR[] = {
2025 ARM::R12,
2026 };
2027
2028 // hGPR_and_tcGPR Bit set.
2029 const uint8_t hGPR_and_tcGPRBits[] = {
2030 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
2031 };
2032
2033 // DPR Register Class...
2034 const MCPhysReg DPR[] = {
2035 ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31,
2036 };
2037
2038 // DPR Bit set.
2039 const uint8_t DPRBits[] = {
2040 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
2041 };
2042
2043 // DPR_VFP2 Register Class...
2044 const MCPhysReg DPR_VFP2[] = {
2045 ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15,
2046 };
2047
2048 // DPR_VFP2 Bit set.
2049 const uint8_t DPR_VFP2Bits[] = {
2050 0x00, 0x00, 0xf0, 0xff, 0x0f,
2051 };
2052
2053 // DPR_8 Register Class...
2054 const MCPhysReg DPR_8[] = {
2055 ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7,
2056 };
2057
2058 // DPR_8 Bit set.
2059 const uint8_t DPR_8Bits[] = {
2060 0x00, 0x00, 0xf0, 0x0f,
2061 };
2062
2063 // GPRPair Register Class...
2064 const MCPhysReg GPRPair[] = {
2065 ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, ARM::R12_SP,
2066 };
2067
2068 // GPRPair Bit set.
2069 const uint8_t GPRPairBits[] = {
2070 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f,
2071 };
2072
2073 // GPRPairnosp Register Class...
2074 const MCPhysReg GPRPairnosp[] = {
2075 ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11,
2076 };
2077
2078 // GPRPairnosp Bit set.
2079 const uint8_t GPRPairnospBits[] = {
2080 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
2081 };
2082
2083 // GPRPair_with_gsub_0_in_tGPR Register Class...
2084 const MCPhysReg GPRPair_with_gsub_0_in_tGPR[] = {
2085 ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7,
2086 };
2087
2088 // GPRPair_with_gsub_0_in_tGPR Bit set.
2089 const uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = {
2090 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f,
2091 };
2092
2093 // GPRPair_with_gsub_0_in_hGPR Register Class...
2094 const MCPhysReg GPRPair_with_gsub_0_in_hGPR[] = {
2095 ARM::R8_R9, ARM::R10_R11, ARM::R12_SP,
2096 };
2097
2098 // GPRPair_with_gsub_0_in_hGPR Bit set.
2099 const uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = {
2100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
2101 };
2102
2103 // GPRPair_with_gsub_0_in_tcGPR Register Class...
2104 const MCPhysReg GPRPair_with_gsub_0_in_tcGPR[] = {
2105 ARM::R0_R1, ARM::R2_R3, ARM::R12_SP,
2106 };
2107
2108 // GPRPair_with_gsub_0_in_tcGPR Bit set.
2109 const uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = {
2110 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43,
2111 };
2112
2113 // GPRPair_with_gsub_0_in_tcGPRnotr12 Register Class...
2114 const MCPhysReg GPRPair_with_gsub_0_in_tcGPRnotr12[] = {
2115 ARM::R0_R1, ARM::R2_R3,
2116 };
2117
2118 // GPRPair_with_gsub_0_in_tcGPRnotr12 Bit set.
2119 const uint8_t GPRPair_with_gsub_0_in_tcGPRnotr12Bits[] = {
2120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
2121 };
2122
2123 // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Register Class...
2124 const MCPhysReg GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR[] = {
2125 ARM::R8_R9, ARM::R10_R11,
2126 };
2127
2128 // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Bit set.
2129 const uint8_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits[] = {
2130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
2131 };
2132
2133 // GPRPair_with_gsub_1_in_GPRsp Register Class...
2134 const MCPhysReg GPRPair_with_gsub_1_in_GPRsp[] = {
2135 ARM::R12_SP,
2136 };
2137
2138 // GPRPair_with_gsub_1_in_GPRsp Bit set.
2139 const uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = {
2140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
2141 };
2142
2143 // DPairSpc Register Class...
2144 const MCPhysReg DPairSpc[] = {
2145 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, ARM::D16_D18, ARM::D17_D19, ARM::D18_D20, ARM::D19_D21, ARM::D20_D22, ARM::D21_D23, ARM::D22_D24, ARM::D23_D25, ARM::D24_D26, ARM::D25_D27, ARM::D26_D28, ARM::D27_D29, ARM::D28_D30, ARM::D29_D31,
2146 };
2147
2148 // DPairSpc Bit set.
2149 const uint8_t DPairSpcBits[] = {
2150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x0f,
2151 };
2152
2153 // DPairSpc_with_ssub_0 Register Class...
2154 const MCPhysReg DPairSpc_with_ssub_0[] = {
2155 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17,
2156 };
2157
2158 // DPairSpc_with_ssub_0 Bit set.
2159 const uint8_t DPairSpc_with_ssub_0Bits[] = {
2160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f,
2161 };
2162
2163 // DPairSpc_with_ssub_4 Register Class...
2164 const MCPhysReg DPairSpc_with_ssub_4[] = {
2165 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15,
2166 };
2167
2168 // DPairSpc_with_ssub_4 Bit set.
2169 const uint8_t DPairSpc_with_ssub_4Bits[] = {
2170 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f,
2171 };
2172
2173 // DPairSpc_with_dsub_0_in_DPR_8 Register Class...
2174 const MCPhysReg DPairSpc_with_dsub_0_in_DPR_8[] = {
2175 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9,
2176 };
2177
2178 // DPairSpc_with_dsub_0_in_DPR_8 Bit set.
2179 const uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = {
2180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f,
2181 };
2182
2183 // DPairSpc_with_dsub_2_in_DPR_8 Register Class...
2184 const MCPhysReg DPairSpc_with_dsub_2_in_DPR_8[] = {
2185 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7,
2186 };
2187
2188 // DPairSpc_with_dsub_2_in_DPR_8 Bit set.
2189 const uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = {
2190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f,
2191 };
2192
2193 // DPair Register Class...
2194 const MCPhysReg DPair[] = {
2195 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18, ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24, ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30, ARM::Q15,
2196 };
2197
2198 // DPair Bit set.
2199 const uint8_t DPairBits[] = {
2200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03,
2201 };
2202
2203 // DPair_with_ssub_0 Register Class...
2204 const MCPhysReg DPair_with_ssub_0[] = {
2205 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16,
2206 };
2207
2208 // DPair_with_ssub_0 Bit set.
2209 const uint8_t DPair_with_ssub_0Bits[] = {
2210 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07,
2211 };
2212
2213 // QPR Register Class...
2214 const MCPhysReg QPR[] = {
2215 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15,
2216 };
2217
2218 // QPR Bit set.
2219 const uint8_t QPRBits[] = {
2220 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01,
2221 };
2222
2223 // DPair_with_ssub_2 Register Class...
2224 const MCPhysReg DPair_with_ssub_2[] = {
2225 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7,
2226 };
2227
2228 // DPair_with_ssub_2 Bit set.
2229 const uint8_t DPair_with_ssub_2Bits[] = {
2230 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03,
2231 };
2232
2233 // DPair_with_dsub_0_in_DPR_8 Register Class...
2234 const MCPhysReg DPair_with_dsub_0_in_DPR_8[] = {
2235 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8,
2236 };
2237
2238 // DPair_with_dsub_0_in_DPR_8 Bit set.
2239 const uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = {
2240 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
2241 };
2242
2243 // MQPR Register Class...
2244 const MCPhysReg MQPR[] = {
2245 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7,
2246 };
2247
2248 // MQPR Bit set.
2249 const uint8_t MQPRBits[] = {
2250 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01,
2251 };
2252
2253 // QPR_VFP2 Register Class...
2254 const MCPhysReg QPR_VFP2[] = {
2255 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7,
2256 };
2257
2258 // QPR_VFP2 Bit set.
2259 const uint8_t QPR_VFP2Bits[] = {
2260 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01,
2261 };
2262
2263 // DPair_with_dsub_1_in_DPR_8 Register Class...
2264 const MCPhysReg DPair_with_dsub_1_in_DPR_8[] = {
2265 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3,
2266 };
2267
2268 // DPair_with_dsub_1_in_DPR_8 Bit set.
2269 const uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = {
2270 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
2271 };
2272
2273 // QPR_8 Register Class...
2274 const MCPhysReg QPR_8[] = {
2275 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3,
2276 };
2277
2278 // QPR_8 Bit set.
2279 const uint8_t QPR_8Bits[] = {
2280 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e,
2281 };
2282
2283 // DTriple Register Class...
2284 const MCPhysReg DTriple[] = {
2285 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, ARM::D16_D17_D18, ARM::D17_D18_D19, ARM::D18_D19_D20, ARM::D19_D20_D21, ARM::D20_D21_D22, ARM::D21_D22_D23, ARM::D22_D23_D24, ARM::D23_D24_D25, ARM::D24_D25_D26, ARM::D25_D26_D27, ARM::D26_D27_D28, ARM::D27_D28_D29, ARM::D28_D29_D30, ARM::D29_D30_D31,
2286 };
2287
2288 // DTriple Bit set.
2289 const uint8_t DTripleBits[] = {
2290 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x1f,
2291 };
2292
2293 // DTripleSpc Register Class...
2294 const MCPhysReg DTripleSpc[] = {
2295 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31,
2296 };
2297
2298 // DTripleSpc Bit set.
2299 const uint8_t DTripleSpcBits[] = {
2300 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01,
2301 };
2302
2303 // DTripleSpc_with_ssub_0 Register Class...
2304 const MCPhysReg DTripleSpc_with_ssub_0[] = {
2305 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19,
2306 };
2307
2308 // DTripleSpc_with_ssub_0 Bit set.
2309 const uint8_t DTripleSpc_with_ssub_0Bits[] = {
2310 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f,
2311 };
2312
2313 // DTriple_with_ssub_0 Register Class...
2314 const MCPhysReg DTriple_with_ssub_0[] = {
2315 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17,
2316 };
2317
2318 // DTriple_with_ssub_0 Bit set.
2319 const uint8_t DTriple_with_ssub_0Bits[] = {
2320 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f,
2321 };
2322
2323 // DTriple_with_qsub_0_in_QPR Register Class...
2324 const MCPhysReg DTriple_with_qsub_0_in_QPR[] = {
2325 ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, ARM::D16_D17_D18, ARM::D18_D19_D20, ARM::D20_D21_D22, ARM::D22_D23_D24, ARM::D24_D25_D26, ARM::D26_D27_D28, ARM::D28_D29_D30,
2326 };
2327
2328 // DTriple_with_qsub_0_in_QPR Bit set.
2329 const uint8_t DTriple_with_qsub_0_in_QPRBits[] = {
2330 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x0a,
2331 };
2332
2333 // DTriple_with_ssub_2 Register Class...
2334 const MCPhysReg DTriple_with_ssub_2[] = {
2335 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16,
2336 };
2337
2338 // DTriple_with_ssub_2 Bit set.
2339 const uint8_t DTriple_with_ssub_2Bits[] = {
2340 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f,
2341 };
2342
2343 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class...
2344 const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = {
2345 ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, ARM::D17_D18_D19, ARM::D19_D20_D21, ARM::D21_D22_D23, ARM::D23_D24_D25, ARM::D25_D26_D27, ARM::D27_D28_D29, ARM::D29_D30_D31,
2346 };
2347
2348 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set.
2349 const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = {
2350 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x15,
2351 };
2352
2353 // DTripleSpc_with_ssub_4 Register Class...
2354 const MCPhysReg DTripleSpc_with_ssub_4[] = {
2355 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17,
2356 };
2357
2358 // DTripleSpc_with_ssub_4 Bit set.
2359 const uint8_t DTripleSpc_with_ssub_4Bits[] = {
2360 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07,
2361 };
2362
2363 // DTriple_with_ssub_4 Register Class...
2364 const MCPhysReg DTriple_with_ssub_4[] = {
2365 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15,
2366 };
2367
2368 // DTriple_with_ssub_4 Bit set.
2369 const uint8_t DTriple_with_ssub_4Bits[] = {
2370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f,
2371 };
2372
2373 // DTripleSpc_with_ssub_8 Register Class...
2374 const MCPhysReg DTripleSpc_with_ssub_8[] = {
2375 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15,
2376 };
2377
2378 // DTripleSpc_with_ssub_8 Bit set.
2379 const uint8_t DTripleSpc_with_ssub_8Bits[] = {
2380 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01,
2381 };
2382
2383 // DTripleSpc_with_dsub_0_in_DPR_8 Register Class...
2384 const MCPhysReg DTripleSpc_with_dsub_0_in_DPR_8[] = {
2385 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11,
2386 };
2387
2388 // DTripleSpc_with_dsub_0_in_DPR_8 Bit set.
2389 const uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = {
2390 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f,
2391 };
2392
2393 // DTriple_with_dsub_0_in_DPR_8 Register Class...
2394 const MCPhysReg DTriple_with_dsub_0_in_DPR_8[] = {
2395 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9,
2396 };
2397
2398 // DTriple_with_dsub_0_in_DPR_8 Bit set.
2399 const uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = {
2400 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f,
2401 };
2402
2403 // DTriple_with_qsub_0_in_MQPR Register Class...
2404 const MCPhysReg DTriple_with_qsub_0_in_MQPR[] = {
2405 ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16,
2406 };
2407
2408 // DTriple_with_qsub_0_in_MQPR Bit set.
2409 const uint8_t DTriple_with_qsub_0_in_MQPRBits[] = {
2410 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a,
2411 };
2412
2413 // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class...
2414 const MCPhysReg DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = {
2415 ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17,
2416 };
2417
2418 // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set.
2419 const uint8_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = {
2420 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55,
2421 };
2422
2423 // DTriple_with_dsub_1_in_DPR_8 Register Class...
2424 const MCPhysReg DTriple_with_dsub_1_in_DPR_8[] = {
2425 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8,
2426 };
2427
2428 // DTriple_with_dsub_1_in_DPR_8 Bit set.
2429 const uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = {
2430 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f,
2431 };
2432
2433 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2434 const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2435 ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15,
2436 };
2437
2438 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2439 const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2440 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15,
2441 };
2442
2443 // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Register Class...
2444 const MCPhysReg DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR[] = {
2445 ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14,
2446 };
2447
2448 // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Bit set.
2449 const uint8_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits[] = {
2450 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a,
2451 };
2452
2453 // DTripleSpc_with_dsub_2_in_DPR_8 Register Class...
2454 const MCPhysReg DTripleSpc_with_dsub_2_in_DPR_8[] = {
2455 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9,
2456 };
2457
2458 // DTripleSpc_with_dsub_2_in_DPR_8 Bit set.
2459 const uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = {
2460 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07,
2461 };
2462
2463 // DTriple_with_dsub_2_in_DPR_8 Register Class...
2464 const MCPhysReg DTriple_with_dsub_2_in_DPR_8[] = {
2465 ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7,
2466 };
2467
2468 // DTriple_with_dsub_2_in_DPR_8 Bit set.
2469 const uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = {
2470 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f,
2471 };
2472
2473 // DTripleSpc_with_dsub_4_in_DPR_8 Register Class...
2474 const MCPhysReg DTripleSpc_with_dsub_4_in_DPR_8[] = {
2475 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7,
2476 };
2477
2478 // DTripleSpc_with_dsub_4_in_DPR_8 Bit set.
2479 const uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = {
2480 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01,
2481 };
2482
2483 // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2484 const MCPhysReg DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2485 ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9,
2486 };
2487
2488 // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2489 const uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2490 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55,
2491 };
2492
2493 // DTriple_with_qsub_0_in_QPR_8 Register Class...
2494 const MCPhysReg DTriple_with_qsub_0_in_QPR_8[] = {
2495 ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8,
2496 };
2497
2498 // DTriple_with_qsub_0_in_QPR_8 Bit set.
2499 const uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = {
2500 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a,
2501 };
2502
2503 // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR Register Class...
2504 const MCPhysReg DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR[] = {
2505 ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6,
2506 };
2507
2508 // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR Bit set.
2509 const uint8_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits[] = {
2510 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a,
2511 };
2512
2513 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class...
2514 const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = {
2515 ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7,
2516 };
2517
2518 // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set.
2519 const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = {
2520 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15,
2521 };
2522
2523 // DQuadSpc Register Class...
2524 const MCPhysReg DQuadSpc[] = {
2525 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31,
2526 };
2527
2528 // DQuadSpc Bit set.
2529 const uint8_t DQuadSpcBits[] = {
2530 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01,
2531 };
2532
2533 // DQuadSpc_with_ssub_0 Register Class...
2534 const MCPhysReg DQuadSpc_with_ssub_0[] = {
2535 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19,
2536 };
2537
2538 // DQuadSpc_with_ssub_0 Bit set.
2539 const uint8_t DQuadSpc_with_ssub_0Bits[] = {
2540 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f,
2541 };
2542
2543 // DQuadSpc_with_ssub_4 Register Class...
2544 const MCPhysReg DQuadSpc_with_ssub_4[] = {
2545 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17,
2546 };
2547
2548 // DQuadSpc_with_ssub_4 Bit set.
2549 const uint8_t DQuadSpc_with_ssub_4Bits[] = {
2550 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07,
2551 };
2552
2553 // DQuadSpc_with_ssub_8 Register Class...
2554 const MCPhysReg DQuadSpc_with_ssub_8[] = {
2555 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15,
2556 };
2557
2558 // DQuadSpc_with_ssub_8 Bit set.
2559 const uint8_t DQuadSpc_with_ssub_8Bits[] = {
2560 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01,
2561 };
2562
2563 // DQuadSpc_with_dsub_0_in_DPR_8 Register Class...
2564 const MCPhysReg DQuadSpc_with_dsub_0_in_DPR_8[] = {
2565 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11,
2566 };
2567
2568 // DQuadSpc_with_dsub_0_in_DPR_8 Bit set.
2569 const uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = {
2570 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f,
2571 };
2572
2573 // DQuadSpc_with_dsub_2_in_DPR_8 Register Class...
2574 const MCPhysReg DQuadSpc_with_dsub_2_in_DPR_8[] = {
2575 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9,
2576 };
2577
2578 // DQuadSpc_with_dsub_2_in_DPR_8 Bit set.
2579 const uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = {
2580 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07,
2581 };
2582
2583 // DQuadSpc_with_dsub_4_in_DPR_8 Register Class...
2584 const MCPhysReg DQuadSpc_with_dsub_4_in_DPR_8[] = {
2585 ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7,
2586 };
2587
2588 // DQuadSpc_with_dsub_4_in_DPR_8 Bit set.
2589 const uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = {
2590 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01,
2591 };
2592
2593 // DQuad Register Class...
2594 const MCPhysReg DQuad[] = {
2595 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, ARM::Q8_Q9, ARM::D17_D18_D19_D20, ARM::Q9_Q10, ARM::D19_D20_D21_D22, ARM::Q10_Q11, ARM::D21_D22_D23_D24, ARM::Q11_Q12, ARM::D23_D24_D25_D26, ARM::Q12_Q13, ARM::D25_D26_D27_D28, ARM::Q13_Q14, ARM::D27_D28_D29_D30, ARM::Q14_Q15,
2596 };
2597
2598 // DQuad Bit set.
2599 const uint8_t DQuadBits[] = {
2600 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
2601 };
2602
2603 // DQuad_with_ssub_0 Register Class...
2604 const MCPhysReg DQuad_with_ssub_0[] = {
2605 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18,
2606 };
2607
2608 // DQuad_with_ssub_0 Bit set.
2609 const uint8_t DQuad_with_ssub_0Bits[] = {
2610 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03,
2611 };
2612
2613 // DQuad_with_ssub_2 Register Class...
2614 const MCPhysReg DQuad_with_ssub_2[] = {
2615 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8,
2616 };
2617
2618 // DQuad_with_ssub_2 Bit set.
2619 const uint8_t DQuad_with_ssub_2Bits[] = {
2620 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01,
2621 };
2622
2623 // QQPR Register Class...
2624 const MCPhysReg QQPR[] = {
2625 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15,
2626 };
2627
2628 // QQPR Bit set.
2629 const uint8_t QQPRBits[] = {
2630 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
2631 };
2632
2633 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class...
2634 const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = {
2635 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, ARM::D17_D18_D19_D20, ARM::D19_D20_D21_D22, ARM::D21_D22_D23_D24, ARM::D23_D24_D25_D26, ARM::D25_D26_D27_D28, ARM::D27_D28_D29_D30,
2636 };
2637
2638 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set.
2639 const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = {
2640 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
2641 };
2642
2643 // DQuad_with_ssub_4 Register Class...
2644 const MCPhysReg DQuad_with_ssub_4[] = {
2645 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16,
2646 };
2647
2648 // DQuad_with_ssub_4 Bit set.
2649 const uint8_t DQuad_with_ssub_4Bits[] = {
2650 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01,
2651 };
2652
2653 // DQuad_with_ssub_6 Register Class...
2654 const MCPhysReg DQuad_with_ssub_6[] = {
2655 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7,
2656 };
2657
2658 // DQuad_with_ssub_6 Bit set.
2659 const uint8_t DQuad_with_ssub_6Bits[] = {
2660 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
2661 };
2662
2663 // DQuad_with_dsub_0_in_DPR_8 Register Class...
2664 const MCPhysReg DQuad_with_dsub_0_in_DPR_8[] = {
2665 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10,
2666 };
2667
2668 // DQuad_with_dsub_0_in_DPR_8 Bit set.
2669 const uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = {
2670 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
2671 };
2672
2673 // DQuad_with_qsub_0_in_MQPR Register Class...
2674 const MCPhysReg DQuad_with_qsub_0_in_MQPR[] = {
2675 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8,
2676 };
2677
2678 // DQuad_with_qsub_0_in_MQPR Bit set.
2679 const uint8_t DQuad_with_qsub_0_in_MQPRBits[] = {
2680 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f,
2681 };
2682
2683 // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class...
2684 const MCPhysReg DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = {
2685 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18,
2686 };
2687
2688 // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set.
2689 const uint8_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = {
2690 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03,
2691 };
2692
2693 // DQuad_with_dsub_1_in_DPR_8 Register Class...
2694 const MCPhysReg DQuad_with_dsub_1_in_DPR_8[] = {
2695 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4,
2696 };
2697
2698 // DQuad_with_dsub_1_in_DPR_8 Bit set.
2699 const uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = {
2700 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c,
2701 };
2702
2703 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2704 const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2705 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16,
2706 };
2707
2708 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2709 const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2710 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01,
2711 };
2712
2713 // MQQPR Register Class...
2714 const MCPhysReg MQQPR[] = {
2715 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7,
2716 };
2717
2718 // MQQPR Bit set.
2719 const uint8_t MQQPRBits[] = {
2720 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07,
2721 };
2722
2723 // DQuad_with_dsub_2_in_DPR_8 Register Class...
2724 const MCPhysReg DQuad_with_dsub_2_in_DPR_8[] = {
2725 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8,
2726 };
2727
2728 // DQuad_with_dsub_2_in_DPR_8 Bit set.
2729 const uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = {
2730 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c,
2731 };
2732
2733 // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2734 const MCPhysReg DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2735 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14,
2736 };
2737
2738 // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2739 const uint8_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2740 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
2741 };
2742
2743 // DQuad_with_dsub_3_in_DPR_8 Register Class...
2744 const MCPhysReg DQuad_with_dsub_3_in_DPR_8[] = {
2745 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3,
2746 };
2747
2748 // DQuad_with_dsub_3_in_DPR_8 Bit set.
2749 const uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = {
2750 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c,
2751 };
2752
2753 // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2754 const MCPhysReg DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2755 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10,
2756 };
2757
2758 // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2759 const uint8_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2760 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
2761 };
2762
2763 // DQuad_with_qsub_0_in_QPR_8 Register Class...
2764 const MCPhysReg DQuad_with_qsub_0_in_QPR_8[] = {
2765 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4,
2766 };
2767
2768 // DQuad_with_qsub_0_in_QPR_8 Bit set.
2769 const uint8_t DQuad_with_qsub_0_in_QPR_8Bits[] = {
2770 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2771 };
2772
2773 // DQuad_with_qsub_1_in_QPR_8 Register Class...
2774 const MCPhysReg DQuad_with_qsub_1_in_QPR_8[] = {
2775 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3,
2776 };
2777
2778 // DQuad_with_qsub_1_in_QPR_8 Bit set.
2779 const uint8_t DQuad_with_qsub_1_in_QPR_8Bits[] = {
2780 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
2781 };
2782
2783 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class...
2784 const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = {
2785 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8,
2786 };
2787
2788 // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set.
2789 const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = {
2790 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c,
2791 };
2792
2793 // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class...
2794 const MCPhysReg DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = {
2795 ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6,
2796 };
2797
2798 // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set.
2799 const uint8_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = {
2800 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c,
2801 };
2802
2803 // QQQQPR Register Class...
2804 const MCPhysReg QQQQPR[] = {
2805 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15,
2806 };
2807
2808 // QQQQPR Bit set.
2809 const uint8_t QQQQPRBits[] = {
2810 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff,
2811 };
2812
2813 // QQQQPR_with_ssub_0 Register Class...
2814 const MCPhysReg QQQQPR_with_ssub_0[] = {
2815 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10,
2816 };
2817
2818 // QQQQPR_with_ssub_0 Bit set.
2819 const uint8_t QQQQPR_with_ssub_0Bits[] = {
2820 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07,
2821 };
2822
2823 // QQQQPR_with_ssub_4 Register Class...
2824 const MCPhysReg QQQQPR_with_ssub_4[] = {
2825 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9,
2826 };
2827
2828 // QQQQPR_with_ssub_4 Bit set.
2829 const uint8_t QQQQPR_with_ssub_4Bits[] = {
2830 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03,
2831 };
2832
2833 // QQQQPR_with_ssub_8 Register Class...
2834 const MCPhysReg QQQQPR_with_ssub_8[] = {
2835 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8,
2836 };
2837
2838 // QQQQPR_with_ssub_8 Bit set.
2839 const uint8_t QQQQPR_with_ssub_8Bits[] = {
2840 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01,
2841 };
2842
2843 // MQQQQPR Register Class...
2844 const MCPhysReg MQQQQPR[] = {
2845 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7,
2846 };
2847
2848 // MQQQQPR Bit set.
2849 const uint8_t MQQQQPRBits[] = {
2850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
2851 };
2852
2853 // MQQQQPR_with_dsub_0_in_DPR_8 Register Class...
2854 const MCPhysReg MQQQQPR_with_dsub_0_in_DPR_8[] = {
2855 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6,
2856 };
2857
2858 // MQQQQPR_with_dsub_0_in_DPR_8 Bit set.
2859 const uint8_t MQQQQPR_with_dsub_0_in_DPR_8Bits[] = {
2860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
2861 };
2862
2863 // MQQQQPR_with_dsub_2_in_DPR_8 Register Class...
2864 const MCPhysReg MQQQQPR_with_dsub_2_in_DPR_8[] = {
2865 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5,
2866 };
2867
2868 // MQQQQPR_with_dsub_2_in_DPR_8 Bit set.
2869 const uint8_t MQQQQPR_with_dsub_2_in_DPR_8Bits[] = {
2870 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
2871 };
2872
2873 // MQQQQPR_with_dsub_4_in_DPR_8 Register Class...
2874 const MCPhysReg MQQQQPR_with_dsub_4_in_DPR_8[] = {
2875 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4,
2876 };
2877
2878 // MQQQQPR_with_dsub_4_in_DPR_8 Bit set.
2879 const uint8_t MQQQQPR_with_dsub_4_in_DPR_8Bits[] = {
2880 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
2881 };
2882
2883 // MQQQQPR_with_dsub_6_in_DPR_8 Register Class...
2884 const MCPhysReg MQQQQPR_with_dsub_6_in_DPR_8[] = {
2885 ARM::Q0_Q1_Q2_Q3,
2886 };
2887
2888 // MQQQQPR_with_dsub_6_in_DPR_8 Bit set.
2889 const uint8_t MQQQQPR_with_dsub_6_in_DPR_8Bits[] = {
2890 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
2891 };
2892
2893} // end anonymous namespace
2894
2895
2896#ifdef __GNUC__
2897#pragma GCC diagnostic push
2898#pragma GCC diagnostic ignored "-Woverlength-strings"
2899#endif
2900extern const char ARMRegClassStrings[] = {
2901 /* 0 */ "QQQQPR_with_ssub_0\0"
2902 /* 19 */ "FPWithVPR_with_ssub_0\0"
2903 /* 41 */ "DQuadSpc_with_ssub_0\0"
2904 /* 62 */ "DTripleSpc_with_ssub_0\0"
2905 /* 85 */ "DPairSpc_with_ssub_0\0"
2906 /* 106 */ "DQuad_with_ssub_0\0"
2907 /* 124 */ "DTriple_with_ssub_0\0"
2908 /* 144 */ "DPair_with_ssub_0\0"
2909 /* 162 */ "tGPREven_and_tcGPRnotr12\0"
2910 /* 187 */ "GPRPair_with_gsub_0_in_tcGPRnotr12\0"
2911 /* 222 */ "DPR_VFP2\0"
2912 /* 231 */ "QPR_VFP2\0"
2913 /* 240 */ "DQuad_with_ssub_2\0"
2914 /* 258 */ "DTriple_with_ssub_2\0"
2915 /* 278 */ "DPair_with_ssub_2\0"
2916 /* 296 */ "QQQQPR_with_ssub_4\0"
2917 /* 315 */ "DQuadSpc_with_ssub_4\0"
2918 /* 336 */ "DTripleSpc_with_ssub_4\0"
2919 /* 359 */ "DPairSpc_with_ssub_4\0"
2920 /* 380 */ "DQuad_with_ssub_4\0"
2921 /* 398 */ "DTriple_with_ssub_4\0"
2922 /* 418 */ "DQuad_with_ssub_6\0"
2923 /* 436 */ "MQQQQPR_with_dsub_0_in_DPR_8\0"
2924 /* 465 */ "DQuadSpc_with_dsub_0_in_DPR_8\0"
2925 /* 495 */ "DTripleSpc_with_dsub_0_in_DPR_8\0"
2926 /* 527 */ "DPairSpc_with_dsub_0_in_DPR_8\0"
2927 /* 557 */ "DQuad_with_dsub_0_in_DPR_8\0"
2928 /* 584 */ "DTriple_with_dsub_0_in_DPR_8\0"
2929 /* 613 */ "DPair_with_dsub_0_in_DPR_8\0"
2930 /* 640 */ "DQuad_with_dsub_1_in_DPR_8\0"
2931 /* 667 */ "DTriple_with_dsub_1_in_DPR_8\0"
2932 /* 696 */ "DPair_with_dsub_1_in_DPR_8\0"
2933 /* 723 */ "MQQQQPR_with_dsub_2_in_DPR_8\0"
2934 /* 752 */ "DQuadSpc_with_dsub_2_in_DPR_8\0"
2935 /* 782 */ "DTripleSpc_with_dsub_2_in_DPR_8\0"
2936 /* 814 */ "DPairSpc_with_dsub_2_in_DPR_8\0"
2937 /* 844 */ "DQuad_with_dsub_2_in_DPR_8\0"
2938 /* 871 */ "DTriple_with_dsub_2_in_DPR_8\0"
2939 /* 900 */ "DQuad_with_dsub_3_in_DPR_8\0"
2940 /* 927 */ "MQQQQPR_with_dsub_4_in_DPR_8\0"
2941 /* 956 */ "DQuadSpc_with_dsub_4_in_DPR_8\0"
2942 /* 986 */ "DTripleSpc_with_dsub_4_in_DPR_8\0"
2943 /* 1018 */ "MQQQQPR_with_dsub_6_in_DPR_8\0"
2944 /* 1047 */ "DQuad_with_qsub_0_in_QPR_8\0"
2945 /* 1074 */ "DTriple_with_qsub_0_in_QPR_8\0"
2946 /* 1103 */ "DQuad_with_qsub_1_in_QPR_8\0"
2947 /* 1130 */ "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8\0"
2948 /* 1178 */ "DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8\0"
2949 /* 1228 */ "FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8\0"
2950 /* 1271 */ "QQQQPR_with_ssub_8\0"
2951 /* 1290 */ "DQuadSpc_with_ssub_8\0"
2952 /* 1311 */ "DTripleSpc_with_ssub_8\0"
2953 /* 1334 */ "VCCR\0"
2954 /* 1339 */ "DPR\0"
2955 /* 1343 */ "hGPR_and_tcGPR\0"
2956 /* 1358 */ "tGPROdd_and_tcGPR\0"
2957 /* 1376 */ "tGPREven_and_tcGPR\0"
2958 /* 1395 */ "GPRPair_with_gsub_0_in_tcGPR\0"
2959 /* 1424 */ "GPRnosp_and_GPRnopc_and_hGPR\0"
2960 /* 1453 */ "GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR\0"
2961 /* 1494 */ "GPRnosp_and_GPRnoip_and_hGPR\0"
2962 /* 1523 */ "GPRnosp_and_hGPR\0"
2963 /* 1540 */ "GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR\0"
2964 /* 1584 */ "rGPR\0"
2965 /* 1589 */ "GPRPair_with_gsub_0_in_tGPR\0"
2966 /* 1617 */ "HPR\0"
2967 /* 1621 */ "DQuad_with_qsub_0_in_MQPR\0"
2968 /* 1647 */ "DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR\0"
2969 /* 1699 */ "DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR\0"
2970 /* 1760 */ "DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\0"
2971 /* 1829 */ "DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\0"
2972 /* 1907 */ "DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\0"
2973 /* 1985 */ "DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR\0"
2974 /* 2067 */ "MQQPR\0"
2975 /* 2073 */ "MQQQQPR\0"
2976 /* 2081 */ "DTriple_with_qsub_0_in_QPR\0"
2977 /* 2108 */ "DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR\0"
2978 /* 2176 */ "DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR\0"
2979 /* 2248 */ "SPR\0"
2980 /* 2252 */ "FPWithVPR\0"
2981 /* 2262 */ "GPRwithAPSR\0"
2982 /* 2274 */ "GPRwithZR\0"
2983 /* 2284 */ "cl_FPSCR_NZCV\0"
2984 /* 2298 */ "DQuadSpc\0"
2985 /* 2307 */ "DTripleSpc\0"
2986 /* 2318 */ "DPairSpc\0"
2987 /* 2327 */ "hGPR_and_tGPRwithpc\0"
2988 /* 2347 */ "GPRnoip_and_GPRnopc\0"
2989 /* 2367 */ "DQuad\0"
2990 /* 2373 */ "hGPR_and_tGPROdd\0"
2991 /* 2390 */ "tGPR_and_tGPROdd\0"
2992 /* 2407 */ "DTriple\0"
2993 /* 2415 */ "hGPR_and_tGPREven\0"
2994 /* 2433 */ "tGPR_and_tGPREven\0"
2995 /* 2451 */ "hGPR_and_GPRnoip_and_tGPREven\0"
2996 /* 2481 */ "GPRnoip\0"
2997 /* 2489 */ "GPRPair_with_gsub_1_in_GPRsp\0"
2998 /* 2518 */ "GPRnoip_and_GPRnosp\0"
2999 /* 2538 */ "GPRwithAPSRnosp\0"
3000 /* 2554 */ "GPRwithZRnosp\0"
3001 /* 2568 */ "GPRnoip_and_GPRwithAPSR_NZCVnosp\0"
3002 /* 2601 */ "GPRPairnosp\0"
3003 /* 2613 */ "DPair\0"
3004 /* 2619 */ "GPRPair\0"
3005 /* 2627 */ "GPRlr\0"
3006 /* 2633 */ "FPCXTRegs\0"
3007};
3008#ifdef __GNUC__
3009#pragma GCC diagnostic pop
3010#endif
3011
3012extern const MCRegisterClass ARMMCRegisterClasses[] = {
3013 { HPR, HPRBits, 1617, 32, sizeof(HPRBits), ARM::HPRRegClassID, 16, 1, true, false },
3014 { FPWithVPR, FPWithVPRBits, 2252, 65, sizeof(FPWithVPRBits), ARM::FPWithVPRRegClassID, 32, 1, false, false },
3015 { SPR, SPRBits, 2248, 32, sizeof(SPRBits), ARM::SPRRegClassID, 32, 1, true, false },
3016 { FPWithVPR_with_ssub_0, FPWithVPR_with_ssub_0Bits, 19, 16, sizeof(FPWithVPR_with_ssub_0Bits), ARM::FPWithVPR_with_ssub_0RegClassID, 32, 1, false, false },
3017 { GPR, GPRBits, 1354, 16, sizeof(GPRBits), ARM::GPRRegClassID, 32, 1, true, false },
3018 { GPRwithAPSR, GPRwithAPSRBits, 2262, 16, sizeof(GPRwithAPSRBits), ARM::GPRwithAPSRRegClassID, 32, 1, true, false },
3019 { GPRwithZR, GPRwithZRBits, 2274, 16, sizeof(GPRwithZRBits), ARM::GPRwithZRRegClassID, 32, 1, true, false },
3020 { SPR_8, SPR_8Bits, 1265, 16, sizeof(SPR_8Bits), ARM::SPR_8RegClassID, 32, 1, true, false },
3021 { GPRnopc, GPRnopcBits, 2359, 15, sizeof(GPRnopcBits), ARM::GPRnopcRegClassID, 32, 1, true, false },
3022 { GPRnosp, GPRnospBits, 2530, 15, sizeof(GPRnospBits), ARM::GPRnospRegClassID, 32, 1, true, false },
3023 { GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnospBits, 2580, 15, sizeof(GPRwithAPSR_NZCVnospBits), ARM::GPRwithAPSR_NZCVnospRegClassID, 32, 1, false, false },
3024 { GPRwithAPSRnosp, GPRwithAPSRnospBits, 2538, 15, sizeof(GPRwithAPSRnospBits), ARM::GPRwithAPSRnospRegClassID, 32, 1, false, false },
3025 { GPRwithZRnosp, GPRwithZRnospBits, 2554, 15, sizeof(GPRwithZRnospBits), ARM::GPRwithZRnospRegClassID, 32, 1, true, false },
3026 { GPRnoip, GPRnoipBits, 2481, 14, sizeof(GPRnoipBits), ARM::GPRnoipRegClassID, 32, 1, true, false },
3027 { rGPR, rGPRBits, 1584, 14, sizeof(rGPRBits), ARM::rGPRRegClassID, 32, 1, true, false },
3028 { GPRnoip_and_GPRnopc, GPRnoip_and_GPRnopcBits, 2347, 13, sizeof(GPRnoip_and_GPRnopcBits), ARM::GPRnoip_and_GPRnopcRegClassID, 32, 1, true, false },
3029 { GPRnoip_and_GPRnosp, GPRnoip_and_GPRnospBits, 2518, 13, sizeof(GPRnoip_and_GPRnospBits), ARM::GPRnoip_and_GPRnospRegClassID, 32, 1, true, false },
3030 { GPRnoip_and_GPRwithAPSR_NZCVnosp, GPRnoip_and_GPRwithAPSR_NZCVnospBits, 2568, 12, sizeof(GPRnoip_and_GPRwithAPSR_NZCVnospBits), ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, 32, 1, true, false },
3031 { tGPRwithpc, tGPRwithpcBits, 2336, 9, sizeof(tGPRwithpcBits), ARM::tGPRwithpcRegClassID, 32, 1, true, false },
3032 { FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8, FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits, 1228, 8, sizeof(FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits), ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID, 32, 1, false, false },
3033 { hGPR, hGPRBits, 1448, 8, sizeof(hGPRBits), ARM::hGPRRegClassID, 32, 1, true, false },
3034 { tGPR, tGPRBits, 1612, 8, sizeof(tGPRBits), ARM::tGPRRegClassID, 32, 1, true, false },
3035 { tGPREven, tGPREvenBits, 2424, 8, sizeof(tGPREvenBits), ARM::tGPREvenRegClassID, 32, 1, true, false },
3036 { GPRnopc_and_hGPR, GPRnopc_and_hGPRBits, 1436, 7, sizeof(GPRnopc_and_hGPRBits), ARM::GPRnopc_and_hGPRRegClassID, 32, 1, true, false },
3037 { GPRnosp_and_hGPR, GPRnosp_and_hGPRBits, 1523, 7, sizeof(GPRnosp_and_hGPRBits), ARM::GPRnosp_and_hGPRRegClassID, 32, 1, true, false },
3038 { GPRnoip_and_hGPR, GPRnoip_and_hGPRBits, 1477, 6, sizeof(GPRnoip_and_hGPRBits), ARM::GPRnoip_and_hGPRRegClassID, 32, 1, true, false },
3039 { GPRnoip_and_tGPREven, GPRnoip_and_tGPREvenBits, 2460, 6, sizeof(GPRnoip_and_tGPREvenBits), ARM::GPRnoip_and_tGPREvenRegClassID, 32, 1, true, false },
3040 { GPRnosp_and_GPRnopc_and_hGPR, GPRnosp_and_GPRnopc_and_hGPRBits, 1424, 6, sizeof(GPRnosp_and_GPRnopc_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, 32, 1, true, false },
3041 { tGPROdd, tGPROddBits, 2382, 6, sizeof(tGPROddBits), ARM::tGPROddRegClassID, 32, 1, true, false },
3042 { GPRnopc_and_GPRnoip_and_hGPR, GPRnopc_and_GPRnoip_and_hGPRBits, 1465, 5, sizeof(GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false },
3043 { GPRnosp_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnoip_and_hGPRBits, 1494, 5, sizeof(GPRnosp_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false },
3044 { tcGPR, tcGPRBits, 1352, 5, sizeof(tcGPRBits), ARM::tcGPRRegClassID, 32, 1, true, false },
3045 { GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits, 1453, 4, sizeof(GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true, false },
3046 { hGPR_and_tGPREven, hGPR_and_tGPREvenBits, 2415, 4, sizeof(hGPR_and_tGPREvenBits), ARM::hGPR_and_tGPREvenRegClassID, 32, 1, true, false },
3047 { tGPR_and_tGPREven, tGPR_and_tGPREvenBits, 2433, 4, sizeof(tGPR_and_tGPREvenBits), ARM::tGPR_and_tGPREvenRegClassID, 32, 1, true, false },
3048 { tGPR_and_tGPROdd, tGPR_and_tGPROddBits, 2390, 4, sizeof(tGPR_and_tGPROddBits), ARM::tGPR_and_tGPROddRegClassID, 32, 1, true, false },
3049 { tcGPRnotr12, tcGPRnotr12Bits, 175, 4, sizeof(tcGPRnotr12Bits), ARM::tcGPRnotr12RegClassID, 32, 1, true, false },
3050 { tGPREven_and_tcGPR, tGPREven_and_tcGPRBits, 1376, 3, sizeof(tGPREven_and_tcGPRBits), ARM::tGPREven_and_tcGPRRegClassID, 32, 1, true, false },
3051 { hGPR_and_GPRnoip_and_tGPREven, hGPR_and_GPRnoip_and_tGPREvenBits, 2451, 2, sizeof(hGPR_and_GPRnoip_and_tGPREvenBits), ARM::hGPR_and_GPRnoip_and_tGPREvenRegClassID, 32, 1, true, false },
3052 { hGPR_and_tGPROdd, hGPR_and_tGPROddBits, 2373, 2, sizeof(hGPR_and_tGPROddBits), ARM::hGPR_and_tGPROddRegClassID, 32, 1, true, false },
3053 { tGPREven_and_tcGPRnotr12, tGPREven_and_tcGPRnotr12Bits, 162, 2, sizeof(tGPREven_and_tcGPRnotr12Bits), ARM::tGPREven_and_tcGPRnotr12RegClassID, 32, 1, true, false },
3054 { tGPROdd_and_tcGPR, tGPROdd_and_tcGPRBits, 1358, 2, sizeof(tGPROdd_and_tcGPRBits), ARM::tGPROdd_and_tcGPRRegClassID, 32, 1, true, false },
3055 { CCR, CCRBits, 1335, 1, sizeof(CCRBits), ARM::CCRRegClassID, 32, -1, false, false },
3056 { FPCXTRegs, FPCXTRegsBits, 2633, 1, sizeof(FPCXTRegsBits), ARM::FPCXTRegsRegClassID, 32, 1, true, false },
3057 { GPRlr, GPRlrBits, 2627, 1, sizeof(GPRlrBits), ARM::GPRlrRegClassID, 32, 1, true, false },
3058 { GPRsp, GPRspBits, 2512, 1, sizeof(GPRspBits), ARM::GPRspRegClassID, 32, 1, true, false },
3059 { VCCR, VCCRBits, 1334, 1, sizeof(VCCRBits), ARM::VCCRRegClassID, 32, 1, true, false },
3060 { cl_FPSCR_NZCV, cl_FPSCR_NZCVBits, 2284, 1, sizeof(cl_FPSCR_NZCVBits), ARM::cl_FPSCR_NZCVRegClassID, 32, 1, true, false },
3061 { hGPR_and_tGPRwithpc, hGPR_and_tGPRwithpcBits, 2327, 1, sizeof(hGPR_and_tGPRwithpcBits), ARM::hGPR_and_tGPRwithpcRegClassID, 32, 1, true, false },
3062 { hGPR_and_tcGPR, hGPR_and_tcGPRBits, 1343, 1, sizeof(hGPR_and_tcGPRBits), ARM::hGPR_and_tcGPRRegClassID, 32, 1, true, false },
3063 { DPR, DPRBits, 1339, 32, sizeof(DPRBits), ARM::DPRRegClassID, 64, 1, true, false },
3064 { DPR_VFP2, DPR_VFP2Bits, 222, 16, sizeof(DPR_VFP2Bits), ARM::DPR_VFP2RegClassID, 64, 1, true, false },
3065 { DPR_8, DPR_8Bits, 459, 8, sizeof(DPR_8Bits), ARM::DPR_8RegClassID, 64, 1, true, false },
3066 { GPRPair, GPRPairBits, 2619, 7, sizeof(GPRPairBits), ARM::GPRPairRegClassID, 64, 1, true, false },
3067 { GPRPairnosp, GPRPairnospBits, 2601, 6, sizeof(GPRPairnospBits), ARM::GPRPairnospRegClassID, 64, 1, true, false },
3068 { GPRPair_with_gsub_0_in_tGPR, GPRPair_with_gsub_0_in_tGPRBits, 1589, 4, sizeof(GPRPair_with_gsub_0_in_tGPRBits), ARM::GPRPair_with_gsub_0_in_tGPRRegClassID, 64, 1, true, false },
3069 { GPRPair_with_gsub_0_in_hGPR, GPRPair_with_gsub_0_in_hGPRBits, 1556, 3, sizeof(GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true, false },
3070 { GPRPair_with_gsub_0_in_tcGPR, GPRPair_with_gsub_0_in_tcGPRBits, 1395, 3, sizeof(GPRPair_with_gsub_0_in_tcGPRBits), ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, 64, 1, true, false },
3071 { GPRPair_with_gsub_0_in_tcGPRnotr12, GPRPair_with_gsub_0_in_tcGPRnotr12Bits, 187, 2, sizeof(GPRPair_with_gsub_0_in_tcGPRnotr12Bits), ARM::GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID, 64, 1, true, false },
3072 { GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR, GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits, 1540, 2, sizeof(GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true, false },
3073 { GPRPair_with_gsub_1_in_GPRsp, GPRPair_with_gsub_1_in_GPRspBits, 2489, 1, sizeof(GPRPair_with_gsub_1_in_GPRspBits), ARM::GPRPair_with_gsub_1_in_GPRspRegClassID, 64, 1, true, false },
3074 { DPairSpc, DPairSpcBits, 2318, 30, sizeof(DPairSpcBits), ARM::DPairSpcRegClassID, 128, 1, true, false },
3075 { DPairSpc_with_ssub_0, DPairSpc_with_ssub_0Bits, 85, 16, sizeof(DPairSpc_with_ssub_0Bits), ARM::DPairSpc_with_ssub_0RegClassID, 128, 1, true, false },
3076 { DPairSpc_with_ssub_4, DPairSpc_with_ssub_4Bits, 359, 14, sizeof(DPairSpc_with_ssub_4Bits), ARM::DPairSpc_with_ssub_4RegClassID, 128, 1, true, false },
3077 { DPairSpc_with_dsub_0_in_DPR_8, DPairSpc_with_dsub_0_in_DPR_8Bits, 527, 8, sizeof(DPairSpc_with_dsub_0_in_DPR_8Bits), ARM::DPairSpc_with_dsub_0_in_DPR_8RegClassID, 128, 1, true, false },
3078 { DPairSpc_with_dsub_2_in_DPR_8, DPairSpc_with_dsub_2_in_DPR_8Bits, 814, 6, sizeof(DPairSpc_with_dsub_2_in_DPR_8Bits), ARM::DPairSpc_with_dsub_2_in_DPR_8RegClassID, 128, 1, true, false },
3079 { DPair, DPairBits, 2613, 31, sizeof(DPairBits), ARM::DPairRegClassID, 128, 1, true, false },
3080 { DPair_with_ssub_0, DPair_with_ssub_0Bits, 144, 16, sizeof(DPair_with_ssub_0Bits), ARM::DPair_with_ssub_0RegClassID, 128, 1, true, false },
3081 { QPR, QPRBits, 1643, 16, sizeof(QPRBits), ARM::QPRRegClassID, 128, 1, true, false },
3082 { DPair_with_ssub_2, DPair_with_ssub_2Bits, 278, 15, sizeof(DPair_with_ssub_2Bits), ARM::DPair_with_ssub_2RegClassID, 128, 1, true, false },
3083 { DPair_with_dsub_0_in_DPR_8, DPair_with_dsub_0_in_DPR_8Bits, 613, 8, sizeof(DPair_with_dsub_0_in_DPR_8Bits), ARM::DPair_with_dsub_0_in_DPR_8RegClassID, 128, 1, true, false },
3084 { MQPR, MQPRBits, 1642, 8, sizeof(MQPRBits), ARM::MQPRRegClassID, 128, 1, true, false },
3085 { QPR_VFP2, QPR_VFP2Bits, 231, 8, sizeof(QPR_VFP2Bits), ARM::QPR_VFP2RegClassID, 128, 1, true, false },
3086 { DPair_with_dsub_1_in_DPR_8, DPair_with_dsub_1_in_DPR_8Bits, 696, 7, sizeof(DPair_with_dsub_1_in_DPR_8Bits), ARM::DPair_with_dsub_1_in_DPR_8RegClassID, 128, 1, true, false },
3087 { QPR_8, QPR_8Bits, 1068, 4, sizeof(QPR_8Bits), ARM::QPR_8RegClassID, 128, 1, true, false },
3088 { DTriple, DTripleBits, 2407, 30, sizeof(DTripleBits), ARM::DTripleRegClassID, 192, 1, true, false },
3089 { DTripleSpc, DTripleSpcBits, 2307, 28, sizeof(DTripleSpcBits), ARM::DTripleSpcRegClassID, 192, 1, true, false },
3090 { DTripleSpc_with_ssub_0, DTripleSpc_with_ssub_0Bits, 62, 16, sizeof(DTripleSpc_with_ssub_0Bits), ARM::DTripleSpc_with_ssub_0RegClassID, 192, 1, true, false },
3091 { DTriple_with_ssub_0, DTriple_with_ssub_0Bits, 124, 16, sizeof(DTriple_with_ssub_0Bits), ARM::DTriple_with_ssub_0RegClassID, 192, 1, true, false },
3092 { DTriple_with_qsub_0_in_QPR, DTriple_with_qsub_0_in_QPRBits, 2081, 15, sizeof(DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_qsub_0_in_QPRRegClassID, 192, 1, true, false },
3093 { DTriple_with_ssub_2, DTriple_with_ssub_2Bits, 258, 15, sizeof(DTriple_with_ssub_2Bits), ARM::DTriple_with_ssub_2RegClassID, 192, 1, true, false },
3094 { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2200, 15, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true, false },
3095 { DTripleSpc_with_ssub_4, DTripleSpc_with_ssub_4Bits, 336, 14, sizeof(DTripleSpc_with_ssub_4Bits), ARM::DTripleSpc_with_ssub_4RegClassID, 192, 1, true, false },
3096 { DTriple_with_ssub_4, DTriple_with_ssub_4Bits, 398, 14, sizeof(DTriple_with_ssub_4Bits), ARM::DTriple_with_ssub_4RegClassID, 192, 1, true, false },
3097 { DTripleSpc_with_ssub_8, DTripleSpc_with_ssub_8Bits, 1311, 12, sizeof(DTripleSpc_with_ssub_8Bits), ARM::DTripleSpc_with_ssub_8RegClassID, 192, 1, true, false },
3098 { DTripleSpc_with_dsub_0_in_DPR_8, DTripleSpc_with_dsub_0_in_DPR_8Bits, 495, 8, sizeof(DTripleSpc_with_dsub_0_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, 192, 1, true, false },
3099 { DTriple_with_dsub_0_in_DPR_8, DTriple_with_dsub_0_in_DPR_8Bits, 584, 8, sizeof(DTriple_with_dsub_0_in_DPR_8Bits), ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, 192, 1, true, false },
3100 { DTriple_with_qsub_0_in_MQPR, DTriple_with_qsub_0_in_MQPRBits, 1671, 8, sizeof(DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true, false },
3101 { DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2176, 8, sizeof(DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true, false },
3102 { DTriple_with_dsub_1_in_DPR_8, DTriple_with_dsub_1_in_DPR_8Bits, 667, 7, sizeof(DTriple_with_dsub_1_in_DPR_8Bits), ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, 192, 1, true, false },
3103 { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 2018, 7, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true, false },
3104 { DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR, DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits, 1647, 7, sizeof(DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true, false },
3105 { DTripleSpc_with_dsub_2_in_DPR_8, DTripleSpc_with_dsub_2_in_DPR_8Bits, 782, 6, sizeof(DTripleSpc_with_dsub_2_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, 192, 1, true, false },
3106 { DTriple_with_dsub_2_in_DPR_8, DTriple_with_dsub_2_in_DPR_8Bits, 871, 6, sizeof(DTriple_with_dsub_2_in_DPR_8Bits), ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, 192, 1, true, false },
3107 { DTripleSpc_with_dsub_4_in_DPR_8, DTripleSpc_with_dsub_4_in_DPR_8Bits, 986, 4, sizeof(DTripleSpc_with_dsub_4_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClassID, 192, 1, true, false },
3108 { DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1985, 4, sizeof(DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true, false },
3109 { DTriple_with_qsub_0_in_QPR_8, DTriple_with_qsub_0_in_QPR_8Bits, 1074, 4, sizeof(DTriple_with_qsub_0_in_QPR_8Bits), ARM::DTriple_with_qsub_0_in_QPR_8RegClassID, 192, 1, true, false },
3110 { DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR, DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits, 1699, 3, sizeof(DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true, false },
3111 { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1178, 3, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 192, 1, true, false },
3112 { DQuadSpc, DQuadSpcBits, 2298, 28, sizeof(DQuadSpcBits), ARM::DQuadSpcRegClassID, 256, 1, true, false },
3113 { DQuadSpc_with_ssub_0, DQuadSpc_with_ssub_0Bits, 41, 16, sizeof(DQuadSpc_with_ssub_0Bits), ARM::DQuadSpc_with_ssub_0RegClassID, 256, 1, true, false },
3114 { DQuadSpc_with_ssub_4, DQuadSpc_with_ssub_4Bits, 315, 14, sizeof(DQuadSpc_with_ssub_4Bits), ARM::DQuadSpc_with_ssub_4RegClassID, 256, 1, true, false },
3115 { DQuadSpc_with_ssub_8, DQuadSpc_with_ssub_8Bits, 1290, 12, sizeof(DQuadSpc_with_ssub_8Bits), ARM::DQuadSpc_with_ssub_8RegClassID, 256, 1, true, false },
3116 { DQuadSpc_with_dsub_0_in_DPR_8, DQuadSpc_with_dsub_0_in_DPR_8Bits, 465, 8, sizeof(DQuadSpc_with_dsub_0_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, 256, 1, true, false },
3117 { DQuadSpc_with_dsub_2_in_DPR_8, DQuadSpc_with_dsub_2_in_DPR_8Bits, 752, 6, sizeof(DQuadSpc_with_dsub_2_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false },
3118 { DQuadSpc_with_dsub_4_in_DPR_8, DQuadSpc_with_dsub_4_in_DPR_8Bits, 956, 4, sizeof(DQuadSpc_with_dsub_4_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClassID, 256, 1, true, false },
3119 { DQuad, DQuadBits, 2367, 29, sizeof(DQuadBits), ARM::DQuadRegClassID, 256, 1, true, false },
3120 { DQuad_with_ssub_0, DQuad_with_ssub_0Bits, 106, 16, sizeof(DQuad_with_ssub_0Bits), ARM::DQuad_with_ssub_0RegClassID, 256, 1, true, false },
3121 { DQuad_with_ssub_2, DQuad_with_ssub_2Bits, 240, 15, sizeof(DQuad_with_ssub_2Bits), ARM::DQuad_with_ssub_2RegClassID, 256, 1, true, false },
3122 { QQPR, QQPRBits, 2068, 15, sizeof(QQPRBits), ARM::QQPRRegClassID, 256, 1, true, false },
3123 { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2130, 14, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true, false },
3124 { DQuad_with_ssub_4, DQuad_with_ssub_4Bits, 380, 14, sizeof(DQuad_with_ssub_4Bits), ARM::DQuad_with_ssub_4RegClassID, 256, 1, true, false },
3125 { DQuad_with_ssub_6, DQuad_with_ssub_6Bits, 418, 13, sizeof(DQuad_with_ssub_6Bits), ARM::DQuad_with_ssub_6RegClassID, 256, 1, true, false },
3126 { DQuad_with_dsub_0_in_DPR_8, DQuad_with_dsub_0_in_DPR_8Bits, 557, 8, sizeof(DQuad_with_dsub_0_in_DPR_8Bits), ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, 256, 1, true, false },
3127 { DQuad_with_qsub_0_in_MQPR, DQuad_with_qsub_0_in_MQPRBits, 1621, 8, sizeof(DQuad_with_qsub_0_in_MQPRBits), ARM::DQuad_with_qsub_0_in_MQPRRegClassID, 256, 1, true, false },
3128 { DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2108, 8, sizeof(DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true, false },
3129 { DQuad_with_dsub_1_in_DPR_8, DQuad_with_dsub_1_in_DPR_8Bits, 640, 7, sizeof(DQuad_with_dsub_1_in_DPR_8Bits), ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, 256, 1, true, false },
3130 { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1782, 7, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false },
3131 { MQQPR, MQQPRBits, 2067, 7, sizeof(MQQPRBits), ARM::MQQPRRegClassID, 256, 1, true, false },
3132 { DQuad_with_dsub_2_in_DPR_8, DQuad_with_dsub_2_in_DPR_8Bits, 844, 6, sizeof(DQuad_with_dsub_2_in_DPR_8Bits), ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, 256, 1, true, false },
3133 { DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1760, 6, sizeof(DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false },
3134 { DQuad_with_dsub_3_in_DPR_8, DQuad_with_dsub_3_in_DPR_8Bits, 900, 5, sizeof(DQuad_with_dsub_3_in_DPR_8Bits), ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, 256, 1, true, false },
3135 { DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1829, 4, sizeof(DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false },
3136 { DQuad_with_qsub_0_in_QPR_8, DQuad_with_qsub_0_in_QPR_8Bits, 1047, 4, sizeof(DQuad_with_qsub_0_in_QPR_8Bits), ARM::DQuad_with_qsub_0_in_QPR_8RegClassID, 256, 1, true, false },
3137 { DQuad_with_qsub_1_in_QPR_8, DQuad_with_qsub_1_in_QPR_8Bits, 1103, 3, sizeof(DQuad_with_qsub_1_in_QPR_8Bits), ARM::DQuad_with_qsub_1_in_QPR_8RegClassID, 256, 1, true, false },
3138 { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1130, 3, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 256, 1, true, false },
3139 { DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1907, 2, sizeof(DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true, false },
3140 { QQQQPR, QQQQPRBits, 2074, 13, sizeof(QQQQPRBits), ARM::QQQQPRRegClassID, 512, 1, true, false },
3141 { QQQQPR_with_ssub_0, QQQQPR_with_ssub_0Bits, 0, 8, sizeof(QQQQPR_with_ssub_0Bits), ARM::QQQQPR_with_ssub_0RegClassID, 512, 1, true, false },
3142 { QQQQPR_with_ssub_4, QQQQPR_with_ssub_4Bits, 296, 7, sizeof(QQQQPR_with_ssub_4Bits), ARM::QQQQPR_with_ssub_4RegClassID, 512, 1, true, false },
3143 { QQQQPR_with_ssub_8, QQQQPR_with_ssub_8Bits, 1271, 6, sizeof(QQQQPR_with_ssub_8Bits), ARM::QQQQPR_with_ssub_8RegClassID, 512, 1, true, false },
3144 { MQQQQPR, MQQQQPRBits, 2073, 5, sizeof(MQQQQPRBits), ARM::MQQQQPRRegClassID, 512, 1, true, false },
3145 { MQQQQPR_with_dsub_0_in_DPR_8, MQQQQPR_with_dsub_0_in_DPR_8Bits, 436, 4, sizeof(MQQQQPR_with_dsub_0_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClassID, 512, 1, true, false },
3146 { MQQQQPR_with_dsub_2_in_DPR_8, MQQQQPR_with_dsub_2_in_DPR_8Bits, 723, 3, sizeof(MQQQQPR_with_dsub_2_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClassID, 512, 1, true, false },
3147 { MQQQQPR_with_dsub_4_in_DPR_8, MQQQQPR_with_dsub_4_in_DPR_8Bits, 927, 2, sizeof(MQQQQPR_with_dsub_4_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClassID, 512, 1, true, false },
3148 { MQQQQPR_with_dsub_6_in_DPR_8, MQQQQPR_with_dsub_6_in_DPR_8Bits, 1018, 1, sizeof(MQQQQPR_with_dsub_6_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_6_in_DPR_8RegClassID, 512, 1, true, false },
3149};
3150
3151// ARM Dwarf<->LLVM register mappings.
3152extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[] = {
3153 { 0U, ARM::R0 },
3154 { 1U, ARM::R1 },
3155 { 2U, ARM::R2 },
3156 { 3U, ARM::R3 },
3157 { 4U, ARM::R4 },
3158 { 5U, ARM::R5 },
3159 { 6U, ARM::R6 },
3160 { 7U, ARM::R7 },
3161 { 8U, ARM::R8 },
3162 { 9U, ARM::R9 },
3163 { 10U, ARM::R10 },
3164 { 11U, ARM::R11 },
3165 { 12U, ARM::R12 },
3166 { 13U, ARM::SP },
3167 { 14U, ARM::LR },
3168 { 15U, ARM::ZR },
3169 { 143U, ARM::RA_AUTH_CODE },
3170 { 256U, ARM::D0 },
3171 { 257U, ARM::D1 },
3172 { 258U, ARM::D2 },
3173 { 259U, ARM::D3 },
3174 { 260U, ARM::D4 },
3175 { 261U, ARM::D5 },
3176 { 262U, ARM::D6 },
3177 { 263U, ARM::D7 },
3178 { 264U, ARM::D8 },
3179 { 265U, ARM::D9 },
3180 { 266U, ARM::D10 },
3181 { 267U, ARM::D11 },
3182 { 268U, ARM::D12 },
3183 { 269U, ARM::D13 },
3184 { 270U, ARM::D14 },
3185 { 271U, ARM::D15 },
3186 { 272U, ARM::D16 },
3187 { 273U, ARM::D17 },
3188 { 274U, ARM::D18 },
3189 { 275U, ARM::D19 },
3190 { 276U, ARM::D20 },
3191 { 277U, ARM::D21 },
3192 { 278U, ARM::D22 },
3193 { 279U, ARM::D23 },
3194 { 280U, ARM::D24 },
3195 { 281U, ARM::D25 },
3196 { 282U, ARM::D26 },
3197 { 283U, ARM::D27 },
3198 { 284U, ARM::D28 },
3199 { 285U, ARM::D29 },
3200 { 286U, ARM::D30 },
3201 { 287U, ARM::D31 },
3202};
3203extern const unsigned ARMDwarfFlavour0Dwarf2LSize = std::size(ARMDwarfFlavour0Dwarf2L);
3204
3205extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[] = {
3206 { 0U, ARM::R0 },
3207 { 1U, ARM::R1 },
3208 { 2U, ARM::R2 },
3209 { 3U, ARM::R3 },
3210 { 4U, ARM::R4 },
3211 { 5U, ARM::R5 },
3212 { 6U, ARM::R6 },
3213 { 7U, ARM::R7 },
3214 { 8U, ARM::R8 },
3215 { 9U, ARM::R9 },
3216 { 10U, ARM::R10 },
3217 { 11U, ARM::R11 },
3218 { 12U, ARM::R12 },
3219 { 13U, ARM::SP },
3220 { 14U, ARM::LR },
3221 { 15U, ARM::ZR },
3222 { 143U, ARM::RA_AUTH_CODE },
3223 { 256U, ARM::D0 },
3224 { 257U, ARM::D1 },
3225 { 258U, ARM::D2 },
3226 { 259U, ARM::D3 },
3227 { 260U, ARM::D4 },
3228 { 261U, ARM::D5 },
3229 { 262U, ARM::D6 },
3230 { 263U, ARM::D7 },
3231 { 264U, ARM::D8 },
3232 { 265U, ARM::D9 },
3233 { 266U, ARM::D10 },
3234 { 267U, ARM::D11 },
3235 { 268U, ARM::D12 },
3236 { 269U, ARM::D13 },
3237 { 270U, ARM::D14 },
3238 { 271U, ARM::D15 },
3239 { 272U, ARM::D16 },
3240 { 273U, ARM::D17 },
3241 { 274U, ARM::D18 },
3242 { 275U, ARM::D19 },
3243 { 276U, ARM::D20 },
3244 { 277U, ARM::D21 },
3245 { 278U, ARM::D22 },
3246 { 279U, ARM::D23 },
3247 { 280U, ARM::D24 },
3248 { 281U, ARM::D25 },
3249 { 282U, ARM::D26 },
3250 { 283U, ARM::D27 },
3251 { 284U, ARM::D28 },
3252 { 285U, ARM::D29 },
3253 { 286U, ARM::D30 },
3254 { 287U, ARM::D31 },
3255};
3256extern const unsigned ARMEHFlavour0Dwarf2LSize = std::size(ARMEHFlavour0Dwarf2L);
3257
3258extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[] = {
3259 { ARM::LR, 14U },
3260 { ARM::PC, 15U },
3261 { ARM::RA_AUTH_CODE, 143U },
3262 { ARM::SP, 13U },
3263 { ARM::ZR, 15U },
3264 { ARM::D0, 256U },
3265 { ARM::D1, 257U },
3266 { ARM::D2, 258U },
3267 { ARM::D3, 259U },
3268 { ARM::D4, 260U },
3269 { ARM::D5, 261U },
3270 { ARM::D6, 262U },
3271 { ARM::D7, 263U },
3272 { ARM::D8, 264U },
3273 { ARM::D9, 265U },
3274 { ARM::D10, 266U },
3275 { ARM::D11, 267U },
3276 { ARM::D12, 268U },
3277 { ARM::D13, 269U },
3278 { ARM::D14, 270U },
3279 { ARM::D15, 271U },
3280 { ARM::D16, 272U },
3281 { ARM::D17, 273U },
3282 { ARM::D18, 274U },
3283 { ARM::D19, 275U },
3284 { ARM::D20, 276U },
3285 { ARM::D21, 277U },
3286 { ARM::D22, 278U },
3287 { ARM::D23, 279U },
3288 { ARM::D24, 280U },
3289 { ARM::D25, 281U },
3290 { ARM::D26, 282U },
3291 { ARM::D27, 283U },
3292 { ARM::D28, 284U },
3293 { ARM::D29, 285U },
3294 { ARM::D30, 286U },
3295 { ARM::D31, 287U },
3296 { ARM::R0, 0U },
3297 { ARM::R1, 1U },
3298 { ARM::R2, 2U },
3299 { ARM::R3, 3U },
3300 { ARM::R4, 4U },
3301 { ARM::R5, 5U },
3302 { ARM::R6, 6U },
3303 { ARM::R7, 7U },
3304 { ARM::R8, 8U },
3305 { ARM::R9, 9U },
3306 { ARM::R10, 10U },
3307 { ARM::R11, 11U },
3308 { ARM::R12, 12U },
3309};
3310extern const unsigned ARMDwarfFlavour0L2DwarfSize = std::size(ARMDwarfFlavour0L2Dwarf);
3311
3312extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[] = {
3313 { ARM::LR, 14U },
3314 { ARM::PC, 15U },
3315 { ARM::RA_AUTH_CODE, 143U },
3316 { ARM::SP, 13U },
3317 { ARM::ZR, 15U },
3318 { ARM::D0, 256U },
3319 { ARM::D1, 257U },
3320 { ARM::D2, 258U },
3321 { ARM::D3, 259U },
3322 { ARM::D4, 260U },
3323 { ARM::D5, 261U },
3324 { ARM::D6, 262U },
3325 { ARM::D7, 263U },
3326 { ARM::D8, 264U },
3327 { ARM::D9, 265U },
3328 { ARM::D10, 266U },
3329 { ARM::D11, 267U },
3330 { ARM::D12, 268U },
3331 { ARM::D13, 269U },
3332 { ARM::D14, 270U },
3333 { ARM::D15, 271U },
3334 { ARM::D16, 272U },
3335 { ARM::D17, 273U },
3336 { ARM::D18, 274U },
3337 { ARM::D19, 275U },
3338 { ARM::D20, 276U },
3339 { ARM::D21, 277U },
3340 { ARM::D22, 278U },
3341 { ARM::D23, 279U },
3342 { ARM::D24, 280U },
3343 { ARM::D25, 281U },
3344 { ARM::D26, 282U },
3345 { ARM::D27, 283U },
3346 { ARM::D28, 284U },
3347 { ARM::D29, 285U },
3348 { ARM::D30, 286U },
3349 { ARM::D31, 287U },
3350 { ARM::R0, 0U },
3351 { ARM::R1, 1U },
3352 { ARM::R2, 2U },
3353 { ARM::R3, 3U },
3354 { ARM::R4, 4U },
3355 { ARM::R5, 5U },
3356 { ARM::R6, 6U },
3357 { ARM::R7, 7U },
3358 { ARM::R8, 8U },
3359 { ARM::R9, 9U },
3360 { ARM::R10, 10U },
3361 { ARM::R11, 11U },
3362 { ARM::R12, 12U },
3363};
3364extern const unsigned ARMEHFlavour0L2DwarfSize = std::size(ARMEHFlavour0L2Dwarf);
3365
3366extern const uint16_t ARMRegEncodingTable[] = {
3367 0,
3368 15,
3369 15,
3370 0,
3371 14,
3372 15,
3373 8,
3374 9,
3375 3,
3376 3,
3377 2,
3378 0,
3379 4,
3380 14,
3381 15,
3382 12,
3383 13,
3384 2,
3385 32,
3386 15,
3387 0,
3388 1,
3389 2,
3390 3,
3391 4,
3392 5,
3393 6,
3394 7,
3395 8,
3396 9,
3397 10,
3398 11,
3399 12,
3400 13,
3401 14,
3402 15,
3403 16,
3404 17,
3405 18,
3406 19,
3407 20,
3408 21,
3409 22,
3410 23,
3411 24,
3412 25,
3413 26,
3414 27,
3415 28,
3416 29,
3417 30,
3418 31,
3419 10,
3420 7,
3421 6,
3422 5,
3423 13,
3424 0,
3425 1,
3426 2,
3427 3,
3428 4,
3429 5,
3430 6,
3431 7,
3432 8,
3433 9,
3434 10,
3435 11,
3436 12,
3437 13,
3438 14,
3439 15,
3440 0,
3441 1,
3442 2,
3443 3,
3444 4,
3445 5,
3446 6,
3447 7,
3448 8,
3449 9,
3450 10,
3451 11,
3452 12,
3453 0,
3454 1,
3455 2,
3456 3,
3457 4,
3458 5,
3459 6,
3460 7,
3461 8,
3462 9,
3463 10,
3464 11,
3465 12,
3466 13,
3467 14,
3468 15,
3469 16,
3470 17,
3471 18,
3472 19,
3473 20,
3474 21,
3475 22,
3476 23,
3477 24,
3478 25,
3479 26,
3480 27,
3481 28,
3482 29,
3483 30,
3484 31,
3485 0,
3486 1,
3487 2,
3488 3,
3489 4,
3490 5,
3491 6,
3492 7,
3493 8,
3494 9,
3495 10,
3496 11,
3497 12,
3498 13,
3499 14,
3500 15,
3501 16,
3502 17,
3503 18,
3504 19,
3505 20,
3506 21,
3507 22,
3508 23,
3509 24,
3510 25,
3511 26,
3512 27,
3513 28,
3514 29,
3515 0,
3516 1,
3517 2,
3518 3,
3519 4,
3520 5,
3521 6,
3522 7,
3523 8,
3524 9,
3525 10,
3526 11,
3527 12,
3528 13,
3529 14,
3530 0,
3531 1,
3532 2,
3533 3,
3534 4,
3535 5,
3536 6,
3537 7,
3538 8,
3539 9,
3540 10,
3541 11,
3542 12,
3543 0,
3544 2,
3545 4,
3546 6,
3547 8,
3548 10,
3549 12,
3550 0,
3551 1,
3552 2,
3553 3,
3554 4,
3555 5,
3556 6,
3557 7,
3558 8,
3559 9,
3560 10,
3561 11,
3562 12,
3563 13,
3564 14,
3565 15,
3566 16,
3567 17,
3568 18,
3569 19,
3570 20,
3571 21,
3572 22,
3573 23,
3574 24,
3575 25,
3576 26,
3577 27,
3578 28,
3579 29,
3580 0,
3581 1,
3582 2,
3583 3,
3584 4,
3585 5,
3586 6,
3587 7,
3588 8,
3589 9,
3590 10,
3591 11,
3592 12,
3593 13,
3594 14,
3595 15,
3596 16,
3597 17,
3598 18,
3599 19,
3600 20,
3601 21,
3602 22,
3603 23,
3604 24,
3605 25,
3606 26,
3607 27,
3608 0,
3609 1,
3610 2,
3611 3,
3612 4,
3613 5,
3614 6,
3615 7,
3616 8,
3617 9,
3618 10,
3619 11,
3620 12,
3621 13,
3622 14,
3623 15,
3624 16,
3625 17,
3626 18,
3627 19,
3628 20,
3629 21,
3630 22,
3631 23,
3632 24,
3633 25,
3634 1,
3635 3,
3636 5,
3637 7,
3638 9,
3639 11,
3640 13,
3641 15,
3642 17,
3643 19,
3644 21,
3645 23,
3646 25,
3647 27,
3648 29,
3649 1,
3650 3,
3651 5,
3652 7,
3653 9,
3654 11,
3655 13,
3656 15,
3657 17,
3658 19,
3659 21,
3660 23,
3661 25,
3662 27,
3663};
3664static inline void InitARMMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
3665 RI->InitMCRegisterInfo(ARMRegDesc, 296, RA, PC, ARMMCRegisterClasses, 136, ARMRegUnitRoots, 84, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57,
3666ARMRegEncodingTable);
3667
3668 switch (DwarfFlavour) {
3669 default:
3670 llvm_unreachable("Unknown DWARF flavour");
3671 case 0:
3672 RI->mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false);
3673 break;
3674 }
3675 switch (EHFlavour) {
3676 default:
3677 llvm_unreachable("Unknown DWARF flavour");
3678 case 0:
3679 RI->mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true);
3680 break;
3681 }
3682 switch (DwarfFlavour) {
3683 default:
3684 llvm_unreachable("Unknown DWARF flavour");
3685 case 0:
3686 RI->mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false);
3687 break;
3688 }
3689 switch (EHFlavour) {
3690 default:
3691 llvm_unreachable("Unknown DWARF flavour");
3692 case 0:
3693 RI->mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true);
3694 break;
3695 }
3696}
3697
3698} // end namespace llvm
3699
3700#endif // GET_REGINFO_MC_DESC
3701
3702/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
3703|* *|
3704|* Register Information Header Fragment *|
3705|* *|
3706|* Automatically generated file, do not edit! *|
3707|* *|
3708\*===----------------------------------------------------------------------===*/
3709
3710
3711#ifdef GET_REGINFO_HEADER
3712#undef GET_REGINFO_HEADER
3713
3714#include "llvm/CodeGen/TargetRegisterInfo.h"
3715
3716namespace llvm {
3717
3718class ARMFrameLowering;
3719
3720struct ARMGenRegisterInfo : public TargetRegisterInfo {
3721 explicit ARMGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
3722 unsigned PC = 0, unsigned HwMode = 0);
3723 unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
3724 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3725 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3726 const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
3727 const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
3728 const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
3729 unsigned getRegUnitWeight(unsigned RegUnit) const override;
3730 unsigned getNumRegPressureSets() const override;
3731 const char *getRegPressureSetName(unsigned Idx) const override;
3732 unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
3733 const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
3734 const int *getRegUnitPressureSets(unsigned RegUnit) const override;
3735 ArrayRef<const char *> getRegMaskNames() const override;
3736 ArrayRef<const uint32_t *> getRegMasks() const override;
3737 bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
3738 bool isFixedRegister(const MachineFunction &, MCRegister) const override;
3739 bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
3740 bool isConstantPhysReg(MCRegister PhysReg) const override final;
3741 /// Devirtualized TargetFrameLowering.
3742 static const ARMFrameLowering *getFrameLowering(
3743 const MachineFunction &MF);
3744};
3745
3746namespace ARM { // Register classes
3747 extern const TargetRegisterClass HPRRegClass;
3748 extern const TargetRegisterClass FPWithVPRRegClass;
3749 extern const TargetRegisterClass SPRRegClass;
3750 extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass;
3751 extern const TargetRegisterClass GPRRegClass;
3752 extern const TargetRegisterClass GPRwithAPSRRegClass;
3753 extern const TargetRegisterClass GPRwithZRRegClass;
3754 extern const TargetRegisterClass SPR_8RegClass;
3755 extern const TargetRegisterClass GPRnopcRegClass;
3756 extern const TargetRegisterClass GPRnospRegClass;
3757 extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass;
3758 extern const TargetRegisterClass GPRwithAPSRnospRegClass;
3759 extern const TargetRegisterClass GPRwithZRnospRegClass;
3760 extern const TargetRegisterClass GPRnoipRegClass;
3761 extern const TargetRegisterClass rGPRRegClass;
3762 extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass;
3763 extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass;
3764 extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass;
3765 extern const TargetRegisterClass tGPRwithpcRegClass;
3766 extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass;
3767 extern const TargetRegisterClass hGPRRegClass;
3768 extern const TargetRegisterClass tGPRRegClass;
3769 extern const TargetRegisterClass tGPREvenRegClass;
3770 extern const TargetRegisterClass GPRnopc_and_hGPRRegClass;
3771 extern const TargetRegisterClass GPRnosp_and_hGPRRegClass;
3772 extern const TargetRegisterClass GPRnoip_and_hGPRRegClass;
3773 extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass;
3774 extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass;
3775 extern const TargetRegisterClass tGPROddRegClass;
3776 extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass;
3777 extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass;
3778 extern const TargetRegisterClass tcGPRRegClass;
3779 extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass;
3780 extern const TargetRegisterClass hGPR_and_tGPREvenRegClass;
3781 extern const TargetRegisterClass tGPR_and_tGPREvenRegClass;
3782 extern const TargetRegisterClass tGPR_and_tGPROddRegClass;
3783 extern const TargetRegisterClass tcGPRnotr12RegClass;
3784 extern const TargetRegisterClass tGPREven_and_tcGPRRegClass;
3785 extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass;
3786 extern const TargetRegisterClass hGPR_and_tGPROddRegClass;
3787 extern const TargetRegisterClass tGPREven_and_tcGPRnotr12RegClass;
3788 extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass;
3789 extern const TargetRegisterClass CCRRegClass;
3790 extern const TargetRegisterClass FPCXTRegsRegClass;
3791 extern const TargetRegisterClass GPRlrRegClass;
3792 extern const TargetRegisterClass GPRspRegClass;
3793 extern const TargetRegisterClass VCCRRegClass;
3794 extern const TargetRegisterClass cl_FPSCR_NZCVRegClass;
3795 extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass;
3796 extern const TargetRegisterClass hGPR_and_tcGPRRegClass;
3797 extern const TargetRegisterClass DPRRegClass;
3798 extern const TargetRegisterClass DPR_VFP2RegClass;
3799 extern const TargetRegisterClass DPR_8RegClass;
3800 extern const TargetRegisterClass GPRPairRegClass;
3801 extern const TargetRegisterClass GPRPairnospRegClass;
3802 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass;
3803 extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass;
3804 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass;
3805 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRnotr12RegClass;
3806 extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass;
3807 extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass;
3808 extern const TargetRegisterClass DPairSpcRegClass;
3809 extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass;
3810 extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass;
3811 extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass;
3812 extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass;
3813 extern const TargetRegisterClass DPairRegClass;
3814 extern const TargetRegisterClass DPair_with_ssub_0RegClass;
3815 extern const TargetRegisterClass QPRRegClass;
3816 extern const TargetRegisterClass DPair_with_ssub_2RegClass;
3817 extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass;
3818 extern const TargetRegisterClass MQPRRegClass;
3819 extern const TargetRegisterClass QPR_VFP2RegClass;
3820 extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass;
3821 extern const TargetRegisterClass QPR_8RegClass;
3822 extern const TargetRegisterClass DTripleRegClass;
3823 extern const TargetRegisterClass DTripleSpcRegClass;
3824 extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass;
3825 extern const TargetRegisterClass DTriple_with_ssub_0RegClass;
3826 extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass;
3827 extern const TargetRegisterClass DTriple_with_ssub_2RegClass;
3828 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
3829 extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass;
3830 extern const TargetRegisterClass DTriple_with_ssub_4RegClass;
3831 extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass;
3832 extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass;
3833 extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass;
3834 extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass;
3835 extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
3836 extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass;
3837 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3838 extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass;
3839 extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass;
3840 extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass;
3841 extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass;
3842 extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3843 extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass;
3844 extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass;
3845 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass;
3846 extern const TargetRegisterClass DQuadSpcRegClass;
3847 extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass;
3848 extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass;
3849 extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass;
3850 extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass;
3851 extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass;
3852 extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass;
3853 extern const TargetRegisterClass DQuadRegClass;
3854 extern const TargetRegisterClass DQuad_with_ssub_0RegClass;
3855 extern const TargetRegisterClass DQuad_with_ssub_2RegClass;
3856 extern const TargetRegisterClass QQPRRegClass;
3857 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
3858 extern const TargetRegisterClass DQuad_with_ssub_4RegClass;
3859 extern const TargetRegisterClass DQuad_with_ssub_6RegClass;
3860 extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass;
3861 extern const TargetRegisterClass DQuad_with_qsub_0_in_MQPRRegClass;
3862 extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass;
3863 extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass;
3864 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3865 extern const TargetRegisterClass MQQPRRegClass;
3866 extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass;
3867 extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3868 extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass;
3869 extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3870 extern const TargetRegisterClass DQuad_with_qsub_0_in_QPR_8RegClass;
3871 extern const TargetRegisterClass DQuad_with_qsub_1_in_QPR_8RegClass;
3872 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass;
3873 extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass;
3874 extern const TargetRegisterClass QQQQPRRegClass;
3875 extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass;
3876 extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass;
3877 extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass;
3878 extern const TargetRegisterClass MQQQQPRRegClass;
3879 extern const TargetRegisterClass MQQQQPR_with_dsub_0_in_DPR_8RegClass;
3880 extern const TargetRegisterClass MQQQQPR_with_dsub_2_in_DPR_8RegClass;
3881 extern const TargetRegisterClass MQQQQPR_with_dsub_4_in_DPR_8RegClass;
3882 extern const TargetRegisterClass MQQQQPR_with_dsub_6_in_DPR_8RegClass;
3883} // end namespace ARM
3884
3885} // end namespace llvm
3886
3887#endif // GET_REGINFO_HEADER
3888
3889/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
3890|* *|
3891|* Target Register and Register Classes Information *|
3892|* *|
3893|* Automatically generated file, do not edit! *|
3894|* *|
3895\*===----------------------------------------------------------------------===*/
3896
3897
3898#ifdef GET_REGINFO_TARGET_DESC
3899#undef GET_REGINFO_TARGET_DESC
3900
3901namespace llvm {
3902
3903extern const MCRegisterClass ARMMCRegisterClasses[];
3904
3905static const MVT::SimpleValueType VTLists[] = {
3906 /* 0 */ MVT::i32, MVT::Other,
3907 /* 2 */ MVT::f16, MVT::bf16, MVT::Other,
3908 /* 5 */ MVT::f32, MVT::Other,
3909 /* 7 */ MVT::i32, MVT::v16i1, MVT::v8i1, MVT::v4i1, MVT::v2i1, MVT::Other,
3910 /* 13 */ MVT::v2i64, MVT::Other,
3911 /* 15 */ MVT::v4i64, MVT::Other,
3912 /* 17 */ MVT::v8i64, MVT::Other,
3913 /* 19 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::Other,
3914 /* 27 */ MVT::f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v2f32, MVT::v4f16, MVT::v4bf16, MVT::Other,
3915 /* 36 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::v8bf16, MVT::Other,
3916 /* 45 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::Other,
3917 /* 52 */ MVT::Untyped, MVT::Other,
3918};
3919
3920static const char *SubRegIndexNameTable[] = { "dsub_0", "dsub_1", "dsub_2", "dsub_3", "dsub_4", "dsub_5", "dsub_6", "dsub_7", "gsub_0", "gsub_1", "qqsub_0", "qqsub_1", "qsub_0", "qsub_1", "qsub_2", "qsub_3", "ssub_0", "ssub_1", "ssub_2", "ssub_3", "ssub_4", "ssub_5", "ssub_6", "ssub_7", "ssub_8", "ssub_9", "ssub_10", "ssub_11", "ssub_12", "ssub_13", "ssub_14", "ssub_15", "ssub_0_ssub_1_ssub_4_ssub_5", "ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5", "ssub_2_ssub_3_ssub_6_ssub_7", "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7", "ssub_2_ssub_3_ssub_4_ssub_5", "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9", "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13", "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5", "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7", "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13", "ssub_6_ssub_7_dsub_5", "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5", "ssub_6_ssub_7_dsub_5_dsub_7", "ssub_6_ssub_7_ssub_8_ssub_9", "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13", "ssub_8_ssub_9_ssub_12_ssub_13", "ssub_8_ssub_9_dsub_5_ssub_12_ssub_13", "dsub_5_dsub_7", "dsub_5_ssub_12_ssub_13_dsub_7", "dsub_5_ssub_12_ssub_13", "ssub_4_ssub_5_ssub_6_ssub_7_qsub_2", "" };
3921
3922static const TargetRegisterInfo::SubRegCoveredBits SubRegIdxRangeTable[] = {
3923 { 65535, 65535 },
3924 { 0, 64 }, // dsub_0
3925 { 64, 64 }, // dsub_1
3926 { 128, 64 }, // dsub_2
3927 { 192, 64 }, // dsub_3
3928 { 256, 64 }, // dsub_4
3929 { 320, 64 }, // dsub_5
3930 { 384, 64 }, // dsub_6
3931 { 448, 64 }, // dsub_7
3932 { 0, 32 }, // gsub_0
3933 { 32, 32 }, // gsub_1
3934 { 0, 256 }, // qqsub_0
3935 { 256, 256 }, // qqsub_1
3936 { 0, 128 }, // qsub_0
3937 { 128, 128 }, // qsub_1
3938 { 256, 128 }, // qsub_2
3939 { 384, 128 }, // qsub_3
3940 { 0, 32 }, // ssub_0
3941 { 32, 32 }, // ssub_1
3942 { 64, 32 }, // ssub_2
3943 { 96, 32 }, // ssub_3
3944 { 128, 32 }, // ssub_4
3945 { 160, 32 }, // ssub_5
3946 { 192, 32 }, // ssub_6
3947 { 224, 32 }, // ssub_7
3948 { 256, 32 }, // ssub_8
3949 { 288, 32 }, // ssub_9
3950 { 320, 32 }, // ssub_10
3951 { 352, 32 }, // ssub_11
3952 { 384, 32 }, // ssub_12
3953 { 416, 32 }, // ssub_13
3954 { 448, 32 }, // ssub_14
3955 { 480, 32 }, // ssub_15
3956 { 65535, 128 }, // ssub_0_ssub_1_ssub_4_ssub_5
3957 { 0, 192 }, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
3958 { 65535, 128 }, // ssub_2_ssub_3_ssub_6_ssub_7
3959 { 64, 192 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
3960 { 64, 128 }, // ssub_2_ssub_3_ssub_4_ssub_5
3961 { 65535, 192 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
3962 { 65535, 256 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
3963 { 65535, 192 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
3964 { 65535, 256 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
3965 { 64, 256 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
3966 { 65535, 128 }, // ssub_4_ssub_5_ssub_8_ssub_9
3967 { 128, 192 }, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
3968 { 65535, 192 }, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
3969 { 65535, 128 }, // ssub_6_ssub_7_dsub_5
3970 { 192, 192 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
3971 { 65535, 192 }, // ssub_6_ssub_7_dsub_5_dsub_7
3972 { 192, 128 }, // ssub_6_ssub_7_ssub_8_ssub_9
3973 { 192, 256 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
3974 { 65535, 128 }, // ssub_8_ssub_9_ssub_12_ssub_13
3975 { 256, 192 }, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
3976 { 65535, 128 }, // dsub_5_dsub_7
3977 { 320, 192 }, // dsub_5_ssub_12_ssub_13_dsub_7
3978 { 320, 128 }, // dsub_5_ssub_12_ssub_13
3979 { 128, 256 }, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
3980};
3981
3982
3983static const LaneBitmask SubRegIndexLaneMaskTable[] = {
3984 LaneBitmask::getAll(),
3985 LaneBitmask(0x000000000000000C), // dsub_0
3986 LaneBitmask(0x0000000000000030), // dsub_1
3987 LaneBitmask(0x00000000000000C0), // dsub_2
3988 LaneBitmask(0x0000000000000300), // dsub_3
3989 LaneBitmask(0x0000000000000C00), // dsub_4
3990 LaneBitmask(0x0000000000003000), // dsub_5
3991 LaneBitmask(0x000000000000C000), // dsub_6
3992 LaneBitmask(0x0000000000030000), // dsub_7
3993 LaneBitmask(0x0000000000000001), // gsub_0
3994 LaneBitmask(0x0000000000000002), // gsub_1
3995 LaneBitmask(0x00000000000003FC), // qqsub_0
3996 LaneBitmask(0x000000000003FC00), // qqsub_1
3997 LaneBitmask(0x000000000000003C), // qsub_0
3998 LaneBitmask(0x00000000000003C0), // qsub_1
3999 LaneBitmask(0x0000000000003C00), // qsub_2
4000 LaneBitmask(0x000000000003C000), // qsub_3
4001 LaneBitmask(0x0000000000000004), // ssub_0
4002 LaneBitmask(0x0000000000000008), // ssub_1
4003 LaneBitmask(0x0000000000000010), // ssub_2
4004 LaneBitmask(0x0000000000000020), // ssub_3
4005 LaneBitmask(0x0000000000000040), // ssub_4
4006 LaneBitmask(0x0000000000000080), // ssub_5
4007 LaneBitmask(0x0000000000000100), // ssub_6
4008 LaneBitmask(0x0000000000000200), // ssub_7
4009 LaneBitmask(0x0000000000000400), // ssub_8
4010 LaneBitmask(0x0000000000000800), // ssub_9
4011 LaneBitmask(0x0000000000001000), // ssub_10
4012 LaneBitmask(0x0000000000002000), // ssub_11
4013 LaneBitmask(0x0000000000004000), // ssub_12
4014 LaneBitmask(0x0000000000008000), // ssub_13
4015 LaneBitmask(0x0000000000010000), // ssub_14
4016 LaneBitmask(0x0000000000020000), // ssub_15
4017 LaneBitmask(0x00000000000000CC), // ssub_0_ssub_1_ssub_4_ssub_5
4018 LaneBitmask(0x00000000000000FC), // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4019 LaneBitmask(0x0000000000000330), // ssub_2_ssub_3_ssub_6_ssub_7
4020 LaneBitmask(0x00000000000003F0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4021 LaneBitmask(0x00000000000000F0), // ssub_2_ssub_3_ssub_4_ssub_5
4022 LaneBitmask(0x0000000000000CCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4023 LaneBitmask(0x000000000000CCCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4024 LaneBitmask(0x0000000000003330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4025 LaneBitmask(0x0000000000033330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
4026 LaneBitmask(0x0000000000000FF0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4027 LaneBitmask(0x0000000000000CC0), // ssub_4_ssub_5_ssub_8_ssub_9
4028 LaneBitmask(0x0000000000000FC0), // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4029 LaneBitmask(0x000000000000CCC0), // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4030 LaneBitmask(0x0000000000003300), // ssub_6_ssub_7_dsub_5
4031 LaneBitmask(0x0000000000003F00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4032 LaneBitmask(0x0000000000033300), // ssub_6_ssub_7_dsub_5_dsub_7
4033 LaneBitmask(0x0000000000000F00), // ssub_6_ssub_7_ssub_8_ssub_9
4034 LaneBitmask(0x000000000000FF00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4035 LaneBitmask(0x000000000000CC00), // ssub_8_ssub_9_ssub_12_ssub_13
4036 LaneBitmask(0x000000000000FC00), // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4037 LaneBitmask(0x0000000000033000), // dsub_5_dsub_7
4038 LaneBitmask(0x000000000003F000), // dsub_5_ssub_12_ssub_13_dsub_7
4039 LaneBitmask(0x000000000000F000), // dsub_5_ssub_12_ssub_13
4040 LaneBitmask(0x0000000000003FC0), // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
4041 };
4042
4043
4044
4045static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = {
4046 // Mode = 0 (Default)
4047 { 16, 16, 32, /*VTLists+*/2 }, // HPR
4048 { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR
4049 { 32, 32, 32, /*VTLists+*/5 }, // SPR
4050 { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR_with_ssub_0
4051 { 32, 32, 32, /*VTLists+*/0 }, // GPR
4052 { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSR
4053 { 32, 32, 32, /*VTLists+*/0 }, // GPRwithZR
4054 { 32, 32, 32, /*VTLists+*/5 }, // SPR_8
4055 { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc
4056 { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp
4057 { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSR_NZCVnosp
4058 { 32, 32, 32, /*VTLists+*/0 }, // GPRwithAPSRnosp
4059 { 32, 32, 32, /*VTLists+*/0 }, // GPRwithZRnosp
4060 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip
4061 { 32, 32, 32, /*VTLists+*/0 }, // rGPR
4062 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRnopc
4063 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRnosp
4064 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_GPRwithAPSR_NZCVnosp
4065 { 32, 32, 32, /*VTLists+*/0 }, // tGPRwithpc
4066 { 32, 32, 32, /*VTLists+*/5 }, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
4067 { 32, 32, 32, /*VTLists+*/0 }, // hGPR
4068 { 32, 32, 32, /*VTLists+*/0 }, // tGPR
4069 { 32, 32, 32, /*VTLists+*/0 }, // tGPREven
4070 { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc_and_hGPR
4071 { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_hGPR
4072 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_hGPR
4073 { 32, 32, 32, /*VTLists+*/0 }, // GPRnoip_and_tGPREven
4074 { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnopc_and_hGPR
4075 { 32, 32, 32, /*VTLists+*/0 }, // tGPROdd
4076 { 32, 32, 32, /*VTLists+*/0 }, // GPRnopc_and_GPRnoip_and_hGPR
4077 { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnoip_and_hGPR
4078 { 32, 32, 32, /*VTLists+*/0 }, // tcGPR
4079 { 32, 32, 32, /*VTLists+*/0 }, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR
4080 { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPREven
4081 { 32, 32, 32, /*VTLists+*/0 }, // tGPR_and_tGPREven
4082 { 32, 32, 32, /*VTLists+*/0 }, // tGPR_and_tGPROdd
4083 { 32, 32, 32, /*VTLists+*/0 }, // tcGPRnotr12
4084 { 32, 32, 32, /*VTLists+*/0 }, // tGPREven_and_tcGPR
4085 { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_GPRnoip_and_tGPREven
4086 { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPROdd
4087 { 32, 32, 32, /*VTLists+*/0 }, // tGPREven_and_tcGPRnotr12
4088 { 32, 32, 32, /*VTLists+*/0 }, // tGPROdd_and_tcGPR
4089 { 32, 32, 32, /*VTLists+*/0 }, // CCR
4090 { 32, 32, 32, /*VTLists+*/0 }, // FPCXTRegs
4091 { 32, 32, 32, /*VTLists+*/0 }, // GPRlr
4092 { 32, 32, 32, /*VTLists+*/0 }, // GPRsp
4093 { 32, 32, 32, /*VTLists+*/7 }, // VCCR
4094 { 32, 32, 32, /*VTLists+*/0 }, // cl_FPSCR_NZCV
4095 { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tGPRwithpc
4096 { 32, 32, 32, /*VTLists+*/0 }, // hGPR_and_tcGPR
4097 { 64, 64, 64, /*VTLists+*/27 }, // DPR
4098 { 64, 64, 64, /*VTLists+*/27 }, // DPR_VFP2
4099 { 64, 64, 64, /*VTLists+*/27 }, // DPR_8
4100 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair
4101 { 64, 64, 64, /*VTLists+*/52 }, // GPRPairnosp
4102 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tGPR
4103 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_hGPR
4104 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tcGPR
4105 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_0_in_tcGPRnotr12
4106 { 64, 64, 64, /*VTLists+*/52 }, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
4107 { 64, 64, 64, /*VTLists+*/52 }, // GPRPair_with_gsub_1_in_GPRsp
4108 { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc
4109 { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_ssub_0
4110 { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_ssub_4
4111 { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_dsub_0_in_DPR_8
4112 { 128, 128, 64, /*VTLists+*/13 }, // DPairSpc_with_dsub_2_in_DPR_8
4113 { 128, 128, 128, /*VTLists+*/45 }, // DPair
4114 { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_ssub_0
4115 { 128, 128, 128, /*VTLists+*/36 }, // QPR
4116 { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_ssub_2
4117 { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_dsub_0_in_DPR_8
4118 { 128, 128, 128, /*VTLists+*/19 }, // MQPR
4119 { 128, 128, 128, /*VTLists+*/45 }, // QPR_VFP2
4120 { 128, 128, 128, /*VTLists+*/45 }, // DPair_with_dsub_1_in_DPR_8
4121 { 128, 128, 128, /*VTLists+*/45 }, // QPR_8
4122 { 192, 192, 64, /*VTLists+*/52 }, // DTriple
4123 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc
4124 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_0
4125 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_0
4126 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_QPR
4127 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2
4128 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
4129 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_4
4130 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_4
4131 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_ssub_8
4132 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_0_in_DPR_8
4133 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_0_in_DPR_8
4134 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_MQPR
4135 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
4136 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_1_in_DPR_8
4137 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4138 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
4139 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_2_in_DPR_8
4140 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_2_in_DPR_8
4141 { 192, 192, 64, /*VTLists+*/52 }, // DTripleSpc_with_dsub_4_in_DPR_8
4142 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4143 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_qsub_0_in_QPR_8
4144 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
4145 { 192, 192, 64, /*VTLists+*/52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
4146 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc
4147 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_0
4148 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_4
4149 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_ssub_8
4150 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_0_in_DPR_8
4151 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_2_in_DPR_8
4152 { 256, 256, 64, /*VTLists+*/15 }, // DQuadSpc_with_dsub_4_in_DPR_8
4153 { 256, 256, 256, /*VTLists+*/15 }, // DQuad
4154 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_0
4155 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2
4156 { 256, 256, 256, /*VTLists+*/15 }, // QQPR
4157 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
4158 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_4
4159 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_6
4160 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_0_in_DPR_8
4161 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_qsub_0_in_MQPR
4162 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
4163 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_1_in_DPR_8
4164 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4165 { 256, 256, 256, /*VTLists+*/15 }, // MQQPR
4166 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_2_in_DPR_8
4167 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4168 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_3_in_DPR_8
4169 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4170 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_qsub_0_in_QPR_8
4171 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_qsub_1_in_QPR_8
4172 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
4173 { 256, 256, 256, /*VTLists+*/15 }, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
4174 { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR
4175 { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_0
4176 { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_4
4177 { 512, 512, 256, /*VTLists+*/17 }, // QQQQPR_with_ssub_8
4178 { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR
4179 { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_dsub_0_in_DPR_8
4180 { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_dsub_2_in_DPR_8
4181 { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_dsub_4_in_DPR_8
4182 { 512, 512, 256, /*VTLists+*/17 }, // MQQQQPR_with_dsub_6_in_DPR_8
4183};
4184
4185static const TargetRegisterClass *const NullRegClasses[] = { nullptr };
4186
4187static const uint32_t HPRSubClassMask[] = {
4188 0x00000085, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4189 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0
4190 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1
4191 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2
4192 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3
4193 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4
4194 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5
4195 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6
4196 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7
4197 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8
4198 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9
4199 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10
4200 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11
4201 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12
4202 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13
4203 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14
4204 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15
4205};
4206
4207static const uint32_t FPWithVPRSubClassMask[] = {
4208 0x0008008e, 0x001c4000, 0x00000000, 0x00000000, 0x00000000,
4209 0x00000000, 0xe0000000, 0xffffffff, 0xffffffff, 0x000000ff, // dsub_0
4210 0x00000000, 0x00000000, 0xafcbcffc, 0xfffffc07, 0x000000ff, // dsub_1
4211 0x00000000, 0xe0000000, 0xfffff803, 0xffffffff, 0x000000ff, // dsub_2
4212 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // dsub_3
4213 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // dsub_4
4214 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5
4215 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_6
4216 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_7
4217 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0
4218 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1
4219 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2
4220 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3
4221 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4
4222 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5
4223 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6
4224 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7
4225 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8
4226 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9
4227 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10
4228 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11
4229 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12
4230 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13
4231 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14
4232 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15
4233};
4234
4235static const uint32_t SPRSubClassMask[] = {
4236 0x00000084, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4237 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0
4238 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1
4239 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2
4240 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3
4241 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4
4242 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5
4243 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6
4244 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7
4245 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8
4246 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9
4247 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10
4248 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11
4249 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12
4250 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13
4251 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14
4252 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15
4253};
4254
4255static const uint32_t FPWithVPR_with_ssub_0SubClassMask[] = {
4256 0x00080008, 0x00180000, 0x00000000, 0x00000000, 0x00000000,
4257 0x00000000, 0xc0000000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // dsub_0
4258 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // dsub_1
4259 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // dsub_2
4260 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // dsub_3
4261 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // dsub_4
4262 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5
4263 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_6
4264 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_7
4265};
4266
4267static const uint32_t GPRSubClassMask[] = {
4268 0xfff7e310, 0x000333ff, 0x00000000, 0x00000000, 0x00000000,
4269 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4270 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4271};
4272
4273static const uint32_t GPRwithAPSRSubClassMask[] = {
4274 0xbce2c520, 0x000233ff, 0x00000000, 0x00000000, 0x00000000,
4275 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4276 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4277};
4278
4279static const uint32_t GPRwithZRSubClassMask[] = {
4280 0xbce2d140, 0x000233ff, 0x00000000, 0x00000000, 0x00000000,
4281 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4282 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4283};
4284
4285static const uint32_t SPR_8SubClassMask[] = {
4286 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4287 0x00080000, 0x00100000, 0xf2600643, 0x7e920387, 0x000000f0, // ssub_0
4288 0x00080000, 0x00100000, 0xf2600643, 0x7e920387, 0x000000f0, // ssub_1
4289 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // ssub_2
4290 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // ssub_3
4291 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // ssub_4
4292 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // ssub_5
4293 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_6
4294 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_7
4295 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_8
4296 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_9
4297 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_10
4298 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_11
4299 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_12
4300 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_13
4301 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_14
4302 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_15
4303};
4304
4305static const uint32_t GPRnopcSubClassMask[] = {
4306 0xbce2c100, 0x000233ff, 0x00000000, 0x00000000, 0x00000000,
4307 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4308 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4309};
4310
4311static const uint32_t GPRnospSubClassMask[] = {
4312 0xdd674200, 0x000313ff, 0x00000000, 0x00000000, 0x00000000,
4313 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4314 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4315};
4316
4317static const uint32_t GPRwithAPSR_NZCVnospSubClassMask[] = {
4318 0x9c624400, 0x000213ff, 0x00000000, 0x00000000, 0x00000000,
4319 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4320 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4321};
4322
4323static const uint32_t GPRwithAPSRnospSubClassMask[] = {
4324 0x9c624800, 0x000213ff, 0x00000000, 0x00000000, 0x00000000,
4325 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4326 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4327};
4328
4329static const uint32_t GPRwithZRnospSubClassMask[] = {
4330 0x9c625000, 0x000213ff, 0x00000000, 0x00000000, 0x00000000,
4331 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4332 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4333};
4334
4335static const uint32_t GPRnoipSubClassMask[] = {
4336 0x7627a000, 0x000123dd, 0x00000000, 0x00000000, 0x00000000,
4337 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4338 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4339};
4340
4341static const uint32_t rGPRSubClassMask[] = {
4342 0x9c624000, 0x000213ff, 0x00000000, 0x00000000, 0x00000000,
4343 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4344 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4345};
4346
4347static const uint32_t GPRnoip_and_GPRnopcSubClassMask[] = {
4348 0x34228000, 0x000023dd, 0x00000000, 0x00000000, 0x00000000,
4349 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4350 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4351};
4352
4353static const uint32_t GPRnoip_and_GPRnospSubClassMask[] = {
4354 0x54270000, 0x000103dd, 0x00000000, 0x00000000, 0x00000000,
4355 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4356 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4357};
4358
4359static const uint32_t GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask[] = {
4360 0x14220000, 0x000003dd, 0x00000000, 0x00000000, 0x00000000,
4361 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4362 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4363};
4364
4365static const uint32_t tGPRwithpcSubClassMask[] = {
4366 0x00240000, 0x0001031c, 0x00000000, 0x00000000, 0x00000000,
4367 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4368 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4369};
4370
4371static const uint32_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask[] = {
4372 0x00080000, 0x00100000, 0x00000000, 0x00000000, 0x00000000,
4373 0x00000000, 0x00000000, 0xf2600643, 0x7e920387, 0x000000f0, // dsub_0
4374 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // dsub_1
4375 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // dsub_2
4376 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // dsub_3
4377 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // dsub_4
4378 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5
4379 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_6
4380 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_7
4381};
4382
4383static const uint32_t hGPRSubClassMask[] = {
4384 0x6b900000, 0x000330c3, 0x00000000, 0x00000000, 0x00000000,
4385 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4386 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4387};
4388
4389static const uint32_t tGPRSubClassMask[] = {
4390 0x00200000, 0x0000031c, 0x00000000, 0x00000000, 0x00000000,
4391 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4392 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4393};
4394
4395static const uint32_t tGPREvenSubClassMask[] = {
4396 0x04400000, 0x00021166, 0x00000000, 0x00000000, 0x00000000,
4397 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4398};
4399
4400static const uint32_t GPRnopc_and_hGPRSubClassMask[] = {
4401 0x28800000, 0x000230c3, 0x00000000, 0x00000000, 0x00000000,
4402 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4403 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4404};
4405
4406static const uint32_t GPRnosp_and_hGPRSubClassMask[] = {
4407 0x49000000, 0x000310c3, 0x00000000, 0x00000000, 0x00000000,
4408 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4409 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4410};
4411
4412static const uint32_t GPRnoip_and_hGPRSubClassMask[] = {
4413 0x62000000, 0x000120c1, 0x00000000, 0x00000000, 0x00000000,
4414 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4415 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4416};
4417
4418static const uint32_t GPRnoip_and_tGPREvenSubClassMask[] = {
4419 0x04000000, 0x00000144, 0x00000000, 0x00000000, 0x00000000,
4420 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4421};
4422
4423static const uint32_t GPRnosp_and_GPRnopc_and_hGPRSubClassMask[] = {
4424 0x08000000, 0x000210c3, 0x00000000, 0x00000000, 0x00000000,
4425 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4426 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4427};
4428
4429static const uint32_t tGPROddSubClassMask[] = {
4430 0x10000000, 0x00000288, 0x00000000, 0x00000000, 0x00000000,
4431 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4432};
4433
4434static const uint32_t GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = {
4435 0x20000000, 0x000020c1, 0x00000000, 0x00000000, 0x00000000,
4436 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4437 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4438};
4439
4440static const uint32_t GPRnosp_and_GPRnoip_and_hGPRSubClassMask[] = {
4441 0x40000000, 0x000100c1, 0x00000000, 0x00000000, 0x00000000,
4442 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4443 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4444};
4445
4446static const uint32_t tcGPRSubClassMask[] = {
4447 0x80000000, 0x00020330, 0x00000000, 0x00000000, 0x00000000,
4448 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4449 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4450};
4451
4452static const uint32_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = {
4453 0x00000000, 0x000000c1, 0x00000000, 0x00000000, 0x00000000,
4454 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4455 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4456};
4457
4458static const uint32_t hGPR_and_tGPREvenSubClassMask[] = {
4459 0x00000000, 0x00021042, 0x00000000, 0x00000000, 0x00000000,
4460 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4461};
4462
4463static const uint32_t tGPR_and_tGPREvenSubClassMask[] = {
4464 0x00000000, 0x00000104, 0x00000000, 0x00000000, 0x00000000,
4465 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4466};
4467
4468static const uint32_t tGPR_and_tGPROddSubClassMask[] = {
4469 0x00000000, 0x00000208, 0x00000000, 0x00000000, 0x00000000,
4470 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4471};
4472
4473static const uint32_t tcGPRnotr12SubClassMask[] = {
4474 0x00000000, 0x00000310, 0x00000000, 0x00000000, 0x00000000,
4475 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4476 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4477};
4478
4479static const uint32_t tGPREven_and_tcGPRSubClassMask[] = {
4480 0x00000000, 0x00020120, 0x00000000, 0x00000000, 0x00000000,
4481 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4482};
4483
4484static const uint32_t hGPR_and_GPRnoip_and_tGPREvenSubClassMask[] = {
4485 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000,
4486 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4487};
4488
4489static const uint32_t hGPR_and_tGPROddSubClassMask[] = {
4490 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000,
4491 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4492};
4493
4494static const uint32_t tGPREven_and_tcGPRnotr12SubClassMask[] = {
4495 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000,
4496 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4497};
4498
4499static const uint32_t tGPROdd_and_tcGPRSubClassMask[] = {
4500 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000,
4501 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4502};
4503
4504static const uint32_t CCRSubClassMask[] = {
4505 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000,
4506};
4507
4508static const uint32_t FPCXTRegsSubClassMask[] = {
4509 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000,
4510};
4511
4512static const uint32_t GPRlrSubClassMask[] = {
4513 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000,
4514};
4515
4516static const uint32_t GPRspSubClassMask[] = {
4517 0x00000000, 0x00002000, 0x00000000, 0x00000000, 0x00000000,
4518 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1
4519};
4520
4521static const uint32_t VCCRSubClassMask[] = {
4522 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000,
4523};
4524
4525static const uint32_t cl_FPSCR_NZCVSubClassMask[] = {
4526 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000,
4527};
4528
4529static const uint32_t hGPR_and_tGPRwithpcSubClassMask[] = {
4530 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000,
4531};
4532
4533static const uint32_t hGPR_and_tcGPRSubClassMask[] = {
4534 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000,
4535 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0
4536};
4537
4538static const uint32_t DPRSubClassMask[] = {
4539 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000,
4540 0x00000000, 0xe0000000, 0xffffffff, 0xffffffff, 0x000000ff, // dsub_0
4541 0x00000000, 0x00000000, 0xafcbcffc, 0xfffffc07, 0x000000ff, // dsub_1
4542 0x00000000, 0xe0000000, 0xfffff803, 0xffffffff, 0x000000ff, // dsub_2
4543 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // dsub_3
4544 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // dsub_4
4545 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5
4546 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_6
4547 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_7
4548};
4549
4550static const uint32_t DPR_VFP2SubClassMask[] = {
4551 0x00000000, 0x00180000, 0x00000000, 0x00000000, 0x00000000,
4552 0x00000000, 0xc0000000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // dsub_0
4553 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // dsub_1
4554 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // dsub_2
4555 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // dsub_3
4556 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // dsub_4
4557 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5
4558 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_6
4559 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_7
4560};
4561
4562static const uint32_t DPR_8SubClassMask[] = {
4563 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000,
4564 0x00000000, 0x00000000, 0xf2600643, 0x7e920387, 0x000000f0, // dsub_0
4565 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // dsub_1
4566 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // dsub_2
4567 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // dsub_3
4568 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // dsub_4
4569 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5
4570 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_6
4571 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_7
4572};
4573
4574static const uint32_t GPRPairSubClassMask[] = {
4575 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000,
4576};
4577
4578static const uint32_t GPRPairnospSubClassMask[] = {
4579 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000,
4580};
4581
4582static const uint32_t GPRPair_with_gsub_0_in_tGPRSubClassMask[] = {
4583 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000,
4584};
4585
4586static const uint32_t GPRPair_with_gsub_0_in_hGPRSubClassMask[] = {
4587 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000,
4588};
4589
4590static const uint32_t GPRPair_with_gsub_0_in_tcGPRSubClassMask[] = {
4591 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000,
4592};
4593
4594static const uint32_t GPRPair_with_gsub_0_in_tcGPRnotr12SubClassMask[] = {
4595 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000,
4596};
4597
4598static const uint32_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask[] = {
4599 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000,
4600};
4601
4602static const uint32_t GPRPair_with_gsub_1_in_GPRspSubClassMask[] = {
4603 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000,
4604};
4605
4606static const uint32_t DPairSpcSubClassMask[] = {
4607 0x00000000, 0xe0000000, 0x00000003, 0x00000000, 0x00000000,
4608 0x00000000, 0x00000000, 0xfffff800, 0xffffffff, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5
4609 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7
4610 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9
4611 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5
4612 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_ssub_12_ssub_13
4613 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_dsub_7
4614};
4615
4616static const uint32_t DPairSpc_with_ssub_0SubClassMask[] = {
4617 0x00000000, 0xc0000000, 0x00000003, 0x00000000, 0x00000000,
4618 0x00000000, 0x00000000, 0xfffd6000, 0x7fff9bf7, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5
4619 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7
4620 0x00000000, 0x00000000, 0x50340000, 0x000003e0, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9
4621 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5
4622 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_ssub_12_ssub_13
4623 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_dsub_7
4624};
4625
4626static const uint32_t DPairSpc_with_ssub_4SubClassMask[] = {
4627 0x00000000, 0x80000000, 0x00000003, 0x00000000, 0x00000000,
4628 0x00000000, 0x00000000, 0xfe7c0000, 0x7ff383e7, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5
4629 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7
4630 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9
4631 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5
4632 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_ssub_12_ssub_13
4633 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_dsub_7
4634};
4635
4636static const uint32_t DPairSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
4637 0x00000000, 0x00000000, 0x00000003, 0x00000000, 0x00000000,
4638 0x00000000, 0x00000000, 0xf2600000, 0x7e920387, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5
4639 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7
4640 0x00000000, 0x00000000, 0x50000000, 0x00000300, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9
4641 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5
4642 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_ssub_12_ssub_13
4643 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_dsub_7
4644};
4645
4646static const uint32_t DPairSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
4647 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000,
4648 0x00000000, 0x00000000, 0x70000000, 0x72800306, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5
4649 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7
4650 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9
4651 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5
4652 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_ssub_12_ssub_13
4653 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_dsub_7
4654};
4655
4656static const uint32_t DPairSubClassMask[] = {
4657 0x00000000, 0x00000000, 0x000007fc, 0x00000000, 0x00000000,
4658 0x00000000, 0x00000000, 0xafcbc800, 0xfffffc07, 0x000000ff, // qsub_0
4659 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // qsub_1
4660 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_2
4661 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_3
4662 0x00000000, 0x00000000, 0xafcbc800, 0xfffffc07, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5
4663 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9
4664 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13
4665};
4666
4667static const uint32_t DPair_with_ssub_0SubClassMask[] = {
4668 0x00000000, 0x00000000, 0x000007e8, 0x00000000, 0x00000000,
4669 0x00000000, 0x00000000, 0xafc94000, 0x7fff9807, 0x000000ff, // qsub_0
4670 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // qsub_1
4671 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2
4672 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3
4673 0x00000000, 0x00000000, 0xaec90000, 0x7ff79007, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5
4674 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9
4675 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13
4676};
4677
4678static const uint32_t QPRSubClassMask[] = {
4679 0x00000000, 0x00000000, 0x00000590, 0x00000000, 0x00000000,
4680 0x00000000, 0x00000000, 0x08808000, 0x98442003, 0x000000ff, // qsub_0
4681 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // qsub_1
4682 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_2
4683 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_3
4684 0x00000000, 0x00000000, 0x85020000, 0x65284004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5
4685};
4686
4687static const uint32_t DPair_with_ssub_2SubClassMask[] = {
4688 0x00000000, 0x00000000, 0x000007e0, 0x00000000, 0x00000000,
4689 0x00000000, 0x00000000, 0xaec90000, 0x7ff79007, 0x000000ff, // qsub_0
4690 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // qsub_1
4691 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2
4692 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3
4693 0x00000000, 0x00000000, 0xae480000, 0x7ff38007, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5
4694 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9
4695 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13
4696};
4697
4698static const uint32_t DPair_with_dsub_0_in_DPR_8SubClassMask[] = {
4699 0x00000000, 0x00000000, 0x00000640, 0x00000000, 0x00000000,
4700 0x00000000, 0x00000000, 0xa2400000, 0x7e920007, 0x000000f0, // qsub_0
4701 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // qsub_1
4702 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2
4703 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3
4704 0x00000000, 0x00000000, 0x22000000, 0x7a900007, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5
4705 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9
4706 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13
4707};
4708
4709static const uint32_t MQPRSubClassMask[] = {
4710 0x00000000, 0x00000000, 0x00000580, 0x00000000, 0x00000000,
4711 0x00000000, 0x00000000, 0x08800000, 0x18440003, 0x000000ff, // qsub_0
4712 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // qsub_1
4713 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2
4714 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3
4715 0x00000000, 0x00000000, 0x84000000, 0x65200004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5
4716};
4717
4718static const uint32_t QPR_VFP2SubClassMask[] = {
4719 0x00000000, 0x00000000, 0x00000580, 0x00000000, 0x00000000,
4720 0x00000000, 0x00000000, 0x08800000, 0x18440003, 0x000000ff, // qsub_0
4721 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // qsub_1
4722 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2
4723 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3
4724 0x00000000, 0x00000000, 0x84000000, 0x65200004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5
4725};
4726
4727static const uint32_t DPair_with_dsub_1_in_DPR_8SubClassMask[] = {
4728 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000,
4729 0x00000000, 0x00000000, 0x22000000, 0x7a900007, 0x000000f0, // qsub_0
4730 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // qsub_1
4731 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2
4732 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3
4733 0x00000000, 0x00000000, 0x20000000, 0x72800006, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5
4734 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9
4735 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13
4736};
4737
4738static const uint32_t QPR_8SubClassMask[] = {
4739 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000,
4740 0x00000000, 0x00000000, 0x00000000, 0x18000003, 0x000000f0, // qsub_0
4741 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // qsub_1
4742 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2
4743 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3
4744 0x00000000, 0x00000000, 0x00000000, 0x60000004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5
4745};
4746
4747static const uint32_t DTripleSubClassMask[] = {
4748 0x00000000, 0x00000000, 0xafcbc800, 0x00000007, 0x00000000,
4749 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4750 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4751 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4752 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4753 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4754 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13_dsub_7
4755};
4756
4757static const uint32_t DTripleSpcSubClassMask[] = {
4758 0x00000000, 0x00000000, 0x50343000, 0x000003f8, 0x00000000,
4759 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4760 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4761 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4762 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5_dsub_7
4763};
4764
4765static const uint32_t DTripleSpc_with_ssub_0SubClassMask[] = {
4766 0x00000000, 0x00000000, 0x50342000, 0x000003f0, 0x00000000,
4767 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4768 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4769 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4770 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5_dsub_7
4771};
4772
4773static const uint32_t DTriple_with_ssub_0SubClassMask[] = {
4774 0x00000000, 0x00000000, 0xafc94000, 0x00000007, 0x00000000,
4775 0x00000000, 0x00000000, 0x00000000, 0x7fff9800, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4776 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4777 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4778 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4779 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4780 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13_dsub_7
4781};
4782
4783static const uint32_t DTriple_with_qsub_0_in_QPRSubClassMask[] = {
4784 0x00000000, 0x00000000, 0x08808000, 0x00000003, 0x00000000,
4785 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4786 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4787 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4788 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4789};
4790
4791static const uint32_t DTriple_with_ssub_2SubClassMask[] = {
4792 0x00000000, 0x00000000, 0xaec90000, 0x00000007, 0x00000000,
4793 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4794 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4795 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4796 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4797 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4798 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7
4799};
4800
4801static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
4802 0x00000000, 0x00000000, 0x85020000, 0x00000004, 0x00000000,
4803 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4804 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4805 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4806 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13_dsub_7
4807};
4808
4809static const uint32_t DTripleSpc_with_ssub_4SubClassMask[] = {
4810 0x00000000, 0x00000000, 0x50340000, 0x000003e0, 0x00000000,
4811 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4812 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4813 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4814 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5_dsub_7
4815};
4816
4817static const uint32_t DTriple_with_ssub_4SubClassMask[] = {
4818 0x00000000, 0x00000000, 0xae480000, 0x00000007, 0x00000000,
4819 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4820 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4821 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4822 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4823 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4824 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7
4825};
4826
4827static const uint32_t DTripleSpc_with_ssub_8SubClassMask[] = {
4828 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x00000000,
4829 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4830 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4831 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4832 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_dsub_5_dsub_7
4833};
4834
4835static const uint32_t DTripleSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
4836 0x00000000, 0x00000000, 0x50200000, 0x00000380, 0x00000000,
4837 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4838 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4839 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4840 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5_dsub_7
4841};
4842
4843static const uint32_t DTriple_with_dsub_0_in_DPR_8SubClassMask[] = {
4844 0x00000000, 0x00000000, 0xa2400000, 0x00000007, 0x00000000,
4845 0x00000000, 0x00000000, 0x00000000, 0x7e920000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4846 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4847 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4848 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4849 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4850 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13_dsub_7
4851};
4852
4853static const uint32_t DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
4854 0x00000000, 0x00000000, 0x08800000, 0x00000003, 0x00000000,
4855 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4856 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4857 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4858 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4859};
4860
4861static const uint32_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
4862 0x00000000, 0x00000000, 0x85000000, 0x00000004, 0x00000000,
4863 0x00000000, 0x00000000, 0x00000000, 0x65280000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4864 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4865 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4866 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13_dsub_7
4867};
4868
4869static const uint32_t DTriple_with_dsub_1_in_DPR_8SubClassMask[] = {
4870 0x00000000, 0x00000000, 0x22000000, 0x00000007, 0x00000000,
4871 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4872 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4873 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4874 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4875 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4876 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7
4877};
4878
4879static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
4880 0x00000000, 0x00000000, 0x84000000, 0x00000004, 0x00000000,
4881 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4882 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4883 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4884 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7
4885};
4886
4887static const uint32_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
4888 0x00000000, 0x00000000, 0x08000000, 0x00000003, 0x00000000,
4889 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4890 0x00000000, 0x00000000, 0x00000000, 0x65000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4891 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4892 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4893};
4894
4895static const uint32_t DTripleSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
4896 0x00000000, 0x00000000, 0x50000000, 0x00000300, 0x00000000,
4897 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4898 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4899 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4900 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5_dsub_7
4901};
4902
4903static const uint32_t DTriple_with_dsub_2_in_DPR_8SubClassMask[] = {
4904 0x00000000, 0x00000000, 0x20000000, 0x00000006, 0x00000000,
4905 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4906 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4907 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4908 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4909 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4910 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7
4911};
4912
4913static const uint32_t DTripleSpc_with_dsub_4_in_DPR_8SubClassMask[] = {
4914 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x00000000,
4915 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4916 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4917 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4918 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_dsub_5_dsub_7
4919};
4920
4921static const uint32_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
4922 0x00000000, 0x00000000, 0x80000000, 0x00000004, 0x00000000,
4923 0x00000000, 0x00000000, 0x00000000, 0x64000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4924 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4925 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4926 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13_dsub_7
4927};
4928
4929static const uint32_t DTriple_with_qsub_0_in_QPR_8SubClassMask[] = {
4930 0x00000000, 0x00000000, 0x00000000, 0x00000003, 0x00000000,
4931 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4932 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4933 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4934 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4935};
4936
4937static const uint32_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
4938 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000,
4939 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4940 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4941 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
4942 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
4943};
4944
4945static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = {
4946 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000,
4947 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
4948 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
4949 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
4950 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7
4951};
4952
4953static const uint32_t DQuadSpcSubClassMask[] = {
4954 0x00000000, 0x00000000, 0x00000000, 0x000003f8, 0x00000000,
4955 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4956 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4957 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4958 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5_dsub_7
4959};
4960
4961static const uint32_t DQuadSpc_with_ssub_0SubClassMask[] = {
4962 0x00000000, 0x00000000, 0x00000000, 0x000003f0, 0x00000000,
4963 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4964 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4965 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4966 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5_dsub_7
4967};
4968
4969static const uint32_t DQuadSpc_with_ssub_4SubClassMask[] = {
4970 0x00000000, 0x00000000, 0x00000000, 0x000003e0, 0x00000000,
4971 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4972 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4973 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4974 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5_dsub_7
4975};
4976
4977static const uint32_t DQuadSpc_with_ssub_8SubClassMask[] = {
4978 0x00000000, 0x00000000, 0x00000000, 0x000003c0, 0x00000000,
4979 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4980 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4981 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4982 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_dsub_5_dsub_7
4983};
4984
4985static const uint32_t DQuadSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
4986 0x00000000, 0x00000000, 0x00000000, 0x00000380, 0x00000000,
4987 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4988 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4989 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4990 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5_dsub_7
4991};
4992
4993static const uint32_t DQuadSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
4994 0x00000000, 0x00000000, 0x00000000, 0x00000300, 0x00000000,
4995 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
4996 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
4997 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
4998 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5_dsub_7
4999};
5000
5001static const uint32_t DQuadSpc_with_dsub_4_in_DPR_8SubClassMask[] = {
5002 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000,
5003 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
5004 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
5005 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
5006 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_dsub_5_dsub_7
5007};
5008
5009static const uint32_t DQuadSubClassMask[] = {
5010 0x00000000, 0x00000000, 0x00000000, 0x7ffffc00, 0x00000000,
5011 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_0
5012 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_1
5013 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5014 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5015 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5016};
5017
5018static const uint32_t DQuad_with_ssub_0SubClassMask[] = {
5019 0x00000000, 0x00000000, 0x00000000, 0x7fff9800, 0x00000000,
5020 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0
5021 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1
5022 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5023 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5024 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5025};
5026
5027static const uint32_t DQuad_with_ssub_2SubClassMask[] = {
5028 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x00000000,
5029 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0
5030 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1
5031 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5032 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5033 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5034};
5035
5036static const uint32_t QQPRSubClassMask[] = {
5037 0x00000000, 0x00000000, 0x00000000, 0x18442000, 0x00000000,
5038 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_0
5039 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_1
5040 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5041};
5042
5043static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
5044 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000,
5045 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5046 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5047};
5048
5049static const uint32_t DQuad_with_ssub_4SubClassMask[] = {
5050 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x00000000,
5051 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0
5052 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1
5053 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5054 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5055 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5056};
5057
5058static const uint32_t DQuad_with_ssub_6SubClassMask[] = {
5059 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x00000000,
5060 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0
5061 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1
5062 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5063 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5064 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5065};
5066
5067static const uint32_t DQuad_with_dsub_0_in_DPR_8SubClassMask[] = {
5068 0x00000000, 0x00000000, 0x00000000, 0x7e920000, 0x00000000,
5069 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0
5070 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1
5071 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5072 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5073 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5074};
5075
5076static const uint32_t DQuad_with_qsub_0_in_MQPRSubClassMask[] = {
5077 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x00000000,
5078 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0
5079 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1
5080 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5081};
5082
5083static const uint32_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
5084 0x00000000, 0x00000000, 0x00000000, 0x65280000, 0x00000000,
5085 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5086 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5087};
5088
5089static const uint32_t DQuad_with_dsub_1_in_DPR_8SubClassMask[] = {
5090 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x00000000,
5091 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0
5092 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1
5093 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5094 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5095 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5096};
5097
5098static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
5099 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000,
5100 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5101 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5102};
5103
5104static const uint32_t MQQPRSubClassMask[] = {
5105 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x00000000,
5106 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0
5107 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1
5108 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5109};
5110
5111static const uint32_t DQuad_with_dsub_2_in_DPR_8SubClassMask[] = {
5112 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x00000000,
5113 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0
5114 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1
5115 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5116 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5117 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5118};
5119
5120static const uint32_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
5121 0x00000000, 0x00000000, 0x00000000, 0x65000000, 0x00000000,
5122 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5123 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5124};
5125
5126static const uint32_t DQuad_with_dsub_3_in_DPR_8SubClassMask[] = {
5127 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x00000000,
5128 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0
5129 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1
5130 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5131 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5132 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5133};
5134
5135static const uint32_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
5136 0x00000000, 0x00000000, 0x00000000, 0x64000000, 0x00000000,
5137 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5138 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5139};
5140
5141static const uint32_t DQuad_with_qsub_0_in_QPR_8SubClassMask[] = {
5142 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x00000000,
5143 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0
5144 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1
5145 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5146};
5147
5148static const uint32_t DQuad_with_qsub_1_in_QPR_8SubClassMask[] = {
5149 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000,
5150 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0
5151 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1
5152 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
5153};
5154
5155static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = {
5156 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000,
5157 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5158 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5159};
5160
5161static const uint32_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
5162 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000,
5163 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
5164 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
5165};
5166
5167static const uint32_t QQQQPRSubClassMask[] = {
5168 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff,
5169};
5170
5171static const uint32_t QQQQPR_with_ssub_0SubClassMask[] = {
5172 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff,
5173};
5174
5175static const uint32_t QQQQPR_with_ssub_4SubClassMask[] = {
5176 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe,
5177};
5178
5179static const uint32_t QQQQPR_with_ssub_8SubClassMask[] = {
5180 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc,
5181};
5182
5183static const uint32_t MQQQQPRSubClassMask[] = {
5184 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8,
5185};
5186
5187static const uint32_t MQQQQPR_with_dsub_0_in_DPR_8SubClassMask[] = {
5188 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0,
5189};
5190
5191static const uint32_t MQQQQPR_with_dsub_2_in_DPR_8SubClassMask[] = {
5192 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0,
5193};
5194
5195static const uint32_t MQQQQPR_with_dsub_4_in_DPR_8SubClassMask[] = {
5196 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0,
5197};
5198
5199static const uint32_t MQQQQPR_with_dsub_6_in_DPR_8SubClassMask[] = {
5200 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080,
5201};
5202
5203static const uint16_t SuperRegIdxSeqs[] = {
5204 /* 0 */ 1, 2, 3, 4, 5, 6, 7, 8, 0,
5205 /* 9 */ 9, 0,
5206 /* 11 */ 9, 10, 0,
5207 /* 14 */ 1, 2, 3, 4, 5, 6, 7, 8, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 0,
5208 /* 39 */ 13, 14, 15, 16, 37, 0,
5209 /* 45 */ 38, 40, 45, 48, 0,
5210 /* 50 */ 42, 50, 0,
5211 /* 53 */ 34, 36, 44, 52, 0,
5212 /* 58 */ 33, 35, 43, 46, 51, 53, 0,
5213 /* 65 */ 34, 36, 47, 54, 0,
5214 /* 70 */ 34, 36, 44, 47, 52, 54, 0,
5215 /* 77 */ 13, 14, 15, 16, 37, 49, 55, 0,
5216 /* 85 */ 11, 12, 56, 0,
5217 /* 89 */ 11, 12, 42, 50, 56, 0,
5218};
5219
5220static const TargetRegisterClass *const SPRSuperclasses[] = {
5221 &ARM::HPRRegClass,
5222 &ARM::FPWithVPRRegClass,
5223 nullptr
5224};
5225
5226static const TargetRegisterClass *const FPWithVPR_with_ssub_0Superclasses[] = {
5227 &ARM::FPWithVPRRegClass,
5228 nullptr
5229};
5230
5231static const TargetRegisterClass *const SPR_8Superclasses[] = {
5232 &ARM::HPRRegClass,
5233 &ARM::FPWithVPRRegClass,
5234 &ARM::SPRRegClass,
5235 nullptr
5236};
5237
5238static const TargetRegisterClass *const GPRnopcSuperclasses[] = {
5239 &ARM::GPRRegClass,
5240 &ARM::GPRwithAPSRRegClass,
5241 &ARM::GPRwithZRRegClass,
5242 nullptr
5243};
5244
5245static const TargetRegisterClass *const GPRnospSuperclasses[] = {
5246 &ARM::GPRRegClass,
5247 nullptr
5248};
5249
5250static const TargetRegisterClass *const GPRwithAPSR_NZCVnospSuperclasses[] = {
5251 &ARM::GPRwithAPSRRegClass,
5252 nullptr
5253};
5254
5255static const TargetRegisterClass *const GPRwithZRnospSuperclasses[] = {
5256 &ARM::GPRwithZRRegClass,
5257 nullptr
5258};
5259
5260static const TargetRegisterClass *const GPRnoipSuperclasses[] = {
5261 &ARM::GPRRegClass,
5262 nullptr
5263};
5264
5265static const TargetRegisterClass *const rGPRSuperclasses[] = {
5266 &ARM::GPRRegClass,
5267 &ARM::GPRwithAPSRRegClass,
5268 &ARM::GPRwithZRRegClass,
5269 &ARM::GPRnopcRegClass,
5270 &ARM::GPRnospRegClass,
5271 &ARM::GPRwithAPSR_NZCVnospRegClass,
5272 &ARM::GPRwithAPSRnospRegClass,
5273 &ARM::GPRwithZRnospRegClass,
5274 nullptr
5275};
5276
5277static const TargetRegisterClass *const GPRnoip_and_GPRnopcSuperclasses[] = {
5278 &ARM::GPRRegClass,
5279 &ARM::GPRwithAPSRRegClass,
5280 &ARM::GPRwithZRRegClass,
5281 &ARM::GPRnopcRegClass,
5282 &ARM::GPRnoipRegClass,
5283 nullptr
5284};
5285
5286static const TargetRegisterClass *const GPRnoip_and_GPRnospSuperclasses[] = {
5287 &ARM::GPRRegClass,
5288 &ARM::GPRnospRegClass,
5289 &ARM::GPRnoipRegClass,
5290 nullptr
5291};
5292
5293static const TargetRegisterClass *const GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses[] = {
5294 &ARM::GPRRegClass,
5295 &ARM::GPRwithAPSRRegClass,
5296 &ARM::GPRwithZRRegClass,
5297 &ARM::GPRnopcRegClass,
5298 &ARM::GPRnospRegClass,
5299 &ARM::GPRwithAPSR_NZCVnospRegClass,
5300 &ARM::GPRwithAPSRnospRegClass,
5301 &ARM::GPRwithZRnospRegClass,
5302 &ARM::GPRnoipRegClass,
5303 &ARM::rGPRRegClass,
5304 &ARM::GPRnoip_and_GPRnopcRegClass,
5305 &ARM::GPRnoip_and_GPRnospRegClass,
5306 nullptr
5307};
5308
5309static const TargetRegisterClass *const tGPRwithpcSuperclasses[] = {
5310 &ARM::GPRRegClass,
5311 &ARM::GPRnospRegClass,
5312 &ARM::GPRnoipRegClass,
5313 &ARM::GPRnoip_and_GPRnospRegClass,
5314 nullptr
5315};
5316
5317static const TargetRegisterClass *const FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses[] = {
5318 &ARM::FPWithVPRRegClass,
5319 &ARM::FPWithVPR_with_ssub_0RegClass,
5320 nullptr
5321};
5322
5323static const TargetRegisterClass *const hGPRSuperclasses[] = {
5324 &ARM::GPRRegClass,
5325 nullptr
5326};
5327
5328static const TargetRegisterClass *const tGPRSuperclasses[] = {
5329 &ARM::GPRRegClass,
5330 &ARM::GPRwithAPSRRegClass,
5331 &ARM::GPRwithZRRegClass,
5332 &ARM::GPRnopcRegClass,
5333 &ARM::GPRnospRegClass,
5334 &ARM::GPRwithAPSR_NZCVnospRegClass,
5335 &ARM::GPRwithAPSRnospRegClass,
5336 &ARM::GPRwithZRnospRegClass,
5337 &ARM::GPRnoipRegClass,
5338 &ARM::rGPRRegClass,
5339 &ARM::GPRnoip_and_GPRnopcRegClass,
5340 &ARM::GPRnoip_and_GPRnospRegClass,
5341 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5342 &ARM::tGPRwithpcRegClass,
5343 nullptr
5344};
5345
5346static const TargetRegisterClass *const tGPREvenSuperclasses[] = {
5347 &ARM::GPRRegClass,
5348 &ARM::GPRwithAPSRRegClass,
5349 &ARM::GPRwithZRRegClass,
5350 &ARM::GPRnopcRegClass,
5351 &ARM::GPRnospRegClass,
5352 &ARM::GPRwithAPSR_NZCVnospRegClass,
5353 &ARM::GPRwithAPSRnospRegClass,
5354 &ARM::GPRwithZRnospRegClass,
5355 &ARM::rGPRRegClass,
5356 nullptr
5357};
5358
5359static const TargetRegisterClass *const GPRnopc_and_hGPRSuperclasses[] = {
5360 &ARM::GPRRegClass,
5361 &ARM::GPRwithAPSRRegClass,
5362 &ARM::GPRwithZRRegClass,
5363 &ARM::GPRnopcRegClass,
5364 &ARM::hGPRRegClass,
5365 nullptr
5366};
5367
5368static const TargetRegisterClass *const GPRnosp_and_hGPRSuperclasses[] = {
5369 &ARM::GPRRegClass,
5370 &ARM::GPRnospRegClass,
5371 &ARM::hGPRRegClass,
5372 nullptr
5373};
5374
5375static const TargetRegisterClass *const GPRnoip_and_hGPRSuperclasses[] = {
5376 &ARM::GPRRegClass,
5377 &ARM::GPRnoipRegClass,
5378 &ARM::hGPRRegClass,
5379 nullptr
5380};
5381
5382static const TargetRegisterClass *const GPRnoip_and_tGPREvenSuperclasses[] = {
5383 &ARM::GPRRegClass,
5384 &ARM::GPRwithAPSRRegClass,
5385 &ARM::GPRwithZRRegClass,
5386 &ARM::GPRnopcRegClass,
5387 &ARM::GPRnospRegClass,
5388 &ARM::GPRwithAPSR_NZCVnospRegClass,
5389 &ARM::GPRwithAPSRnospRegClass,
5390 &ARM::GPRwithZRnospRegClass,
5391 &ARM::GPRnoipRegClass,
5392 &ARM::rGPRRegClass,
5393 &ARM::GPRnoip_and_GPRnopcRegClass,
5394 &ARM::GPRnoip_and_GPRnospRegClass,
5395 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5396 &ARM::tGPREvenRegClass,
5397 nullptr
5398};
5399
5400static const TargetRegisterClass *const GPRnosp_and_GPRnopc_and_hGPRSuperclasses[] = {
5401 &ARM::GPRRegClass,
5402 &ARM::GPRwithAPSRRegClass,
5403 &ARM::GPRwithZRRegClass,
5404 &ARM::GPRnopcRegClass,
5405 &ARM::GPRnospRegClass,
5406 &ARM::GPRwithAPSR_NZCVnospRegClass,
5407 &ARM::GPRwithAPSRnospRegClass,
5408 &ARM::GPRwithZRnospRegClass,
5409 &ARM::rGPRRegClass,
5410 &ARM::hGPRRegClass,
5411 &ARM::GPRnopc_and_hGPRRegClass,
5412 &ARM::GPRnosp_and_hGPRRegClass,
5413 nullptr
5414};
5415
5416static const TargetRegisterClass *const tGPROddSuperclasses[] = {
5417 &ARM::GPRRegClass,
5418 &ARM::GPRwithAPSRRegClass,
5419 &ARM::GPRwithZRRegClass,
5420 &ARM::GPRnopcRegClass,
5421 &ARM::GPRnospRegClass,
5422 &ARM::GPRwithAPSR_NZCVnospRegClass,
5423 &ARM::GPRwithAPSRnospRegClass,
5424 &ARM::GPRwithZRnospRegClass,
5425 &ARM::GPRnoipRegClass,
5426 &ARM::rGPRRegClass,
5427 &ARM::GPRnoip_and_GPRnopcRegClass,
5428 &ARM::GPRnoip_and_GPRnospRegClass,
5429 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5430 nullptr
5431};
5432
5433static const TargetRegisterClass *const GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = {
5434 &ARM::GPRRegClass,
5435 &ARM::GPRwithAPSRRegClass,
5436 &ARM::GPRwithZRRegClass,
5437 &ARM::GPRnopcRegClass,
5438 &ARM::GPRnoipRegClass,
5439 &ARM::GPRnoip_and_GPRnopcRegClass,
5440 &ARM::hGPRRegClass,
5441 &ARM::GPRnopc_and_hGPRRegClass,
5442 &ARM::GPRnoip_and_hGPRRegClass,
5443 nullptr
5444};
5445
5446static const TargetRegisterClass *const GPRnosp_and_GPRnoip_and_hGPRSuperclasses[] = {
5447 &ARM::GPRRegClass,
5448 &ARM::GPRnospRegClass,
5449 &ARM::GPRnoipRegClass,
5450 &ARM::GPRnoip_and_GPRnospRegClass,
5451 &ARM::hGPRRegClass,
5452 &ARM::GPRnosp_and_hGPRRegClass,
5453 &ARM::GPRnoip_and_hGPRRegClass,
5454 nullptr
5455};
5456
5457static const TargetRegisterClass *const tcGPRSuperclasses[] = {
5458 &ARM::GPRRegClass,
5459 &ARM::GPRwithAPSRRegClass,
5460 &ARM::GPRwithZRRegClass,
5461 &ARM::GPRnopcRegClass,
5462 &ARM::GPRnospRegClass,
5463 &ARM::GPRwithAPSR_NZCVnospRegClass,
5464 &ARM::GPRwithAPSRnospRegClass,
5465 &ARM::GPRwithZRnospRegClass,
5466 &ARM::rGPRRegClass,
5467 nullptr
5468};
5469
5470static const TargetRegisterClass *const GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = {
5471 &ARM::GPRRegClass,
5472 &ARM::GPRwithAPSRRegClass,
5473 &ARM::GPRwithZRRegClass,
5474 &ARM::GPRnopcRegClass,
5475 &ARM::GPRnospRegClass,
5476 &ARM::GPRwithAPSR_NZCVnospRegClass,
5477 &ARM::GPRwithAPSRnospRegClass,
5478 &ARM::GPRwithZRnospRegClass,
5479 &ARM::GPRnoipRegClass,
5480 &ARM::rGPRRegClass,
5481 &ARM::GPRnoip_and_GPRnopcRegClass,
5482 &ARM::GPRnoip_and_GPRnospRegClass,
5483 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5484 &ARM::hGPRRegClass,
5485 &ARM::GPRnopc_and_hGPRRegClass,
5486 &ARM::GPRnosp_and_hGPRRegClass,
5487 &ARM::GPRnoip_and_hGPRRegClass,
5488 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5489 &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass,
5490 &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass,
5491 nullptr
5492};
5493
5494static const TargetRegisterClass *const hGPR_and_tGPREvenSuperclasses[] = {
5495 &ARM::GPRRegClass,
5496 &ARM::GPRwithAPSRRegClass,
5497 &ARM::GPRwithZRRegClass,
5498 &ARM::GPRnopcRegClass,
5499 &ARM::GPRnospRegClass,
5500 &ARM::GPRwithAPSR_NZCVnospRegClass,
5501 &ARM::GPRwithAPSRnospRegClass,
5502 &ARM::GPRwithZRnospRegClass,
5503 &ARM::rGPRRegClass,
5504 &ARM::hGPRRegClass,
5505 &ARM::tGPREvenRegClass,
5506 &ARM::GPRnopc_and_hGPRRegClass,
5507 &ARM::GPRnosp_and_hGPRRegClass,
5508 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5509 nullptr
5510};
5511
5512static const TargetRegisterClass *const tGPR_and_tGPREvenSuperclasses[] = {
5513 &ARM::GPRRegClass,
5514 &ARM::GPRwithAPSRRegClass,
5515 &ARM::GPRwithZRRegClass,
5516 &ARM::GPRnopcRegClass,
5517 &ARM::GPRnospRegClass,
5518 &ARM::GPRwithAPSR_NZCVnospRegClass,
5519 &ARM::GPRwithAPSRnospRegClass,
5520 &ARM::GPRwithZRnospRegClass,
5521 &ARM::GPRnoipRegClass,
5522 &ARM::rGPRRegClass,
5523 &ARM::GPRnoip_and_GPRnopcRegClass,
5524 &ARM::GPRnoip_and_GPRnospRegClass,
5525 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5526 &ARM::tGPRwithpcRegClass,
5527 &ARM::tGPRRegClass,
5528 &ARM::tGPREvenRegClass,
5529 &ARM::GPRnoip_and_tGPREvenRegClass,
5530 nullptr
5531};
5532
5533static const TargetRegisterClass *const tGPR_and_tGPROddSuperclasses[] = {
5534 &ARM::GPRRegClass,
5535 &ARM::GPRwithAPSRRegClass,
5536 &ARM::GPRwithZRRegClass,
5537 &ARM::GPRnopcRegClass,
5538 &ARM::GPRnospRegClass,
5539 &ARM::GPRwithAPSR_NZCVnospRegClass,
5540 &ARM::GPRwithAPSRnospRegClass,
5541 &ARM::GPRwithZRnospRegClass,
5542 &ARM::GPRnoipRegClass,
5543 &ARM::rGPRRegClass,
5544 &ARM::GPRnoip_and_GPRnopcRegClass,
5545 &ARM::GPRnoip_and_GPRnospRegClass,
5546 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5547 &ARM::tGPRwithpcRegClass,
5548 &ARM::tGPRRegClass,
5549 &ARM::tGPROddRegClass,
5550 nullptr
5551};
5552
5553static const TargetRegisterClass *const tcGPRnotr12Superclasses[] = {
5554 &ARM::GPRRegClass,
5555 &ARM::GPRwithAPSRRegClass,
5556 &ARM::GPRwithZRRegClass,
5557 &ARM::GPRnopcRegClass,
5558 &ARM::GPRnospRegClass,
5559 &ARM::GPRwithAPSR_NZCVnospRegClass,
5560 &ARM::GPRwithAPSRnospRegClass,
5561 &ARM::GPRwithZRnospRegClass,
5562 &ARM::GPRnoipRegClass,
5563 &ARM::rGPRRegClass,
5564 &ARM::GPRnoip_and_GPRnopcRegClass,
5565 &ARM::GPRnoip_and_GPRnospRegClass,
5566 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5567 &ARM::tGPRwithpcRegClass,
5568 &ARM::tGPRRegClass,
5569 &ARM::tcGPRRegClass,
5570 nullptr
5571};
5572
5573static const TargetRegisterClass *const tGPREven_and_tcGPRSuperclasses[] = {
5574 &ARM::GPRRegClass,
5575 &ARM::GPRwithAPSRRegClass,
5576 &ARM::GPRwithZRRegClass,
5577 &ARM::GPRnopcRegClass,
5578 &ARM::GPRnospRegClass,
5579 &ARM::GPRwithAPSR_NZCVnospRegClass,
5580 &ARM::GPRwithAPSRnospRegClass,
5581 &ARM::GPRwithZRnospRegClass,
5582 &ARM::rGPRRegClass,
5583 &ARM::tGPREvenRegClass,
5584 &ARM::tcGPRRegClass,
5585 nullptr
5586};
5587
5588static const TargetRegisterClass *const hGPR_and_GPRnoip_and_tGPREvenSuperclasses[] = {
5589 &ARM::GPRRegClass,
5590 &ARM::GPRwithAPSRRegClass,
5591 &ARM::GPRwithZRRegClass,
5592 &ARM::GPRnopcRegClass,
5593 &ARM::GPRnospRegClass,
5594 &ARM::GPRwithAPSR_NZCVnospRegClass,
5595 &ARM::GPRwithAPSRnospRegClass,
5596 &ARM::GPRwithZRnospRegClass,
5597 &ARM::GPRnoipRegClass,
5598 &ARM::rGPRRegClass,
5599 &ARM::GPRnoip_and_GPRnopcRegClass,
5600 &ARM::GPRnoip_and_GPRnospRegClass,
5601 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5602 &ARM::hGPRRegClass,
5603 &ARM::tGPREvenRegClass,
5604 &ARM::GPRnopc_and_hGPRRegClass,
5605 &ARM::GPRnosp_and_hGPRRegClass,
5606 &ARM::GPRnoip_and_hGPRRegClass,
5607 &ARM::GPRnoip_and_tGPREvenRegClass,
5608 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5609 &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass,
5610 &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass,
5611 &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass,
5612 &ARM::hGPR_and_tGPREvenRegClass,
5613 nullptr
5614};
5615
5616static const TargetRegisterClass *const hGPR_and_tGPROddSuperclasses[] = {
5617 &ARM::GPRRegClass,
5618 &ARM::GPRwithAPSRRegClass,
5619 &ARM::GPRwithZRRegClass,
5620 &ARM::GPRnopcRegClass,
5621 &ARM::GPRnospRegClass,
5622 &ARM::GPRwithAPSR_NZCVnospRegClass,
5623 &ARM::GPRwithAPSRnospRegClass,
5624 &ARM::GPRwithZRnospRegClass,
5625 &ARM::GPRnoipRegClass,
5626 &ARM::rGPRRegClass,
5627 &ARM::GPRnoip_and_GPRnopcRegClass,
5628 &ARM::GPRnoip_and_GPRnospRegClass,
5629 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5630 &ARM::hGPRRegClass,
5631 &ARM::GPRnopc_and_hGPRRegClass,
5632 &ARM::GPRnosp_and_hGPRRegClass,
5633 &ARM::GPRnoip_and_hGPRRegClass,
5634 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5635 &ARM::tGPROddRegClass,
5636 &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass,
5637 &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass,
5638 &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass,
5639 nullptr
5640};
5641
5642static const TargetRegisterClass *const tGPREven_and_tcGPRnotr12Superclasses[] = {
5643 &ARM::GPRRegClass,
5644 &ARM::GPRwithAPSRRegClass,
5645 &ARM::GPRwithZRRegClass,
5646 &ARM::GPRnopcRegClass,
5647 &ARM::GPRnospRegClass,
5648 &ARM::GPRwithAPSR_NZCVnospRegClass,
5649 &ARM::GPRwithAPSRnospRegClass,
5650 &ARM::GPRwithZRnospRegClass,
5651 &ARM::GPRnoipRegClass,
5652 &ARM::rGPRRegClass,
5653 &ARM::GPRnoip_and_GPRnopcRegClass,
5654 &ARM::GPRnoip_and_GPRnospRegClass,
5655 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5656 &ARM::tGPRwithpcRegClass,
5657 &ARM::tGPRRegClass,
5658 &ARM::tGPREvenRegClass,
5659 &ARM::GPRnoip_and_tGPREvenRegClass,
5660 &ARM::tcGPRRegClass,
5661 &ARM::tGPR_and_tGPREvenRegClass,
5662 &ARM::tcGPRnotr12RegClass,
5663 &ARM::tGPREven_and_tcGPRRegClass,
5664 nullptr
5665};
5666
5667static const TargetRegisterClass *const tGPROdd_and_tcGPRSuperclasses[] = {
5668 &ARM::GPRRegClass,
5669 &ARM::GPRwithAPSRRegClass,
5670 &ARM::GPRwithZRRegClass,
5671 &ARM::GPRnopcRegClass,
5672 &ARM::GPRnospRegClass,
5673 &ARM::GPRwithAPSR_NZCVnospRegClass,
5674 &ARM::GPRwithAPSRnospRegClass,
5675 &ARM::GPRwithZRnospRegClass,
5676 &ARM::GPRnoipRegClass,
5677 &ARM::rGPRRegClass,
5678 &ARM::GPRnoip_and_GPRnopcRegClass,
5679 &ARM::GPRnoip_and_GPRnospRegClass,
5680 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
5681 &ARM::tGPRwithpcRegClass,
5682 &ARM::tGPRRegClass,
5683 &ARM::tGPROddRegClass,
5684 &ARM::tcGPRRegClass,
5685 &ARM::tGPR_and_tGPROddRegClass,
5686 &ARM::tcGPRnotr12RegClass,
5687 nullptr
5688};
5689
5690static const TargetRegisterClass *const GPRlrSuperclasses[] = {
5691 &ARM::GPRRegClass,
5692 &ARM::GPRwithAPSRRegClass,
5693 &ARM::GPRwithZRRegClass,
5694 &ARM::GPRnopcRegClass,
5695 &ARM::GPRnospRegClass,
5696 &ARM::GPRwithAPSR_NZCVnospRegClass,
5697 &ARM::GPRwithAPSRnospRegClass,
5698 &ARM::GPRwithZRnospRegClass,
5699 &ARM::rGPRRegClass,
5700 &ARM::hGPRRegClass,
5701 &ARM::tGPREvenRegClass,
5702 &ARM::GPRnopc_and_hGPRRegClass,
5703 &ARM::GPRnosp_and_hGPRRegClass,
5704 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5705 &ARM::hGPR_and_tGPREvenRegClass,
5706 nullptr
5707};
5708
5709static const TargetRegisterClass *const GPRspSuperclasses[] = {
5710 &ARM::GPRRegClass,
5711 &ARM::GPRwithAPSRRegClass,
5712 &ARM::GPRwithZRRegClass,
5713 &ARM::GPRnopcRegClass,
5714 &ARM::GPRnoipRegClass,
5715 &ARM::GPRnoip_and_GPRnopcRegClass,
5716 &ARM::hGPRRegClass,
5717 &ARM::GPRnopc_and_hGPRRegClass,
5718 &ARM::GPRnoip_and_hGPRRegClass,
5719 &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass,
5720 nullptr
5721};
5722
5723static const TargetRegisterClass *const VCCRSuperclasses[] = {
5724 &ARM::FPWithVPRRegClass,
5725 nullptr
5726};
5727
5728static const TargetRegisterClass *const hGPR_and_tGPRwithpcSuperclasses[] = {
5729 &ARM::GPRRegClass,
5730 &ARM::GPRnospRegClass,
5731 &ARM::GPRnoipRegClass,
5732 &ARM::GPRnoip_and_GPRnospRegClass,
5733 &ARM::tGPRwithpcRegClass,
5734 &ARM::hGPRRegClass,
5735 &ARM::GPRnosp_and_hGPRRegClass,
5736 &ARM::GPRnoip_and_hGPRRegClass,
5737 &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass,
5738 nullptr
5739};
5740
5741static const TargetRegisterClass *const hGPR_and_tcGPRSuperclasses[] = {
5742 &ARM::GPRRegClass,
5743 &ARM::GPRwithAPSRRegClass,
5744 &ARM::GPRwithZRRegClass,
5745 &ARM::GPRnopcRegClass,
5746 &ARM::GPRnospRegClass,
5747 &ARM::GPRwithAPSR_NZCVnospRegClass,
5748 &ARM::GPRwithAPSRnospRegClass,
5749 &ARM::GPRwithZRnospRegClass,
5750 &ARM::rGPRRegClass,
5751 &ARM::hGPRRegClass,
5752 &ARM::tGPREvenRegClass,
5753 &ARM::GPRnopc_and_hGPRRegClass,
5754 &ARM::GPRnosp_and_hGPRRegClass,
5755 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
5756 &ARM::tcGPRRegClass,
5757 &ARM::hGPR_and_tGPREvenRegClass,
5758 &ARM::tGPREven_and_tcGPRRegClass,
5759 nullptr
5760};
5761
5762static const TargetRegisterClass *const DPRSuperclasses[] = {
5763 &ARM::FPWithVPRRegClass,
5764 nullptr
5765};
5766
5767static const TargetRegisterClass *const DPR_VFP2Superclasses[] = {
5768 &ARM::FPWithVPRRegClass,
5769 &ARM::FPWithVPR_with_ssub_0RegClass,
5770 &ARM::DPRRegClass,
5771 nullptr
5772};
5773
5774static const TargetRegisterClass *const DPR_8Superclasses[] = {
5775 &ARM::FPWithVPRRegClass,
5776 &ARM::FPWithVPR_with_ssub_0RegClass,
5777 &ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass,
5778 &ARM::DPRRegClass,
5779 &ARM::DPR_VFP2RegClass,
5780 nullptr
5781};
5782
5783static const TargetRegisterClass *const GPRPairnospSuperclasses[] = {
5784 &ARM::GPRPairRegClass,
5785 nullptr
5786};
5787
5788static const TargetRegisterClass *const GPRPair_with_gsub_0_in_tGPRSuperclasses[] = {
5789 &ARM::GPRPairRegClass,
5790 &ARM::GPRPairnospRegClass,
5791 nullptr
5792};
5793
5794static const TargetRegisterClass *const GPRPair_with_gsub_0_in_hGPRSuperclasses[] = {
5795 &ARM::GPRPairRegClass,
5796 nullptr
5797};
5798
5799static const TargetRegisterClass *const GPRPair_with_gsub_0_in_tcGPRSuperclasses[] = {
5800 &ARM::GPRPairRegClass,
5801 nullptr
5802};
5803
5804static const TargetRegisterClass *const GPRPair_with_gsub_0_in_tcGPRnotr12Superclasses[] = {
5805 &ARM::GPRPairRegClass,
5806 &ARM::GPRPairnospRegClass,
5807 &ARM::GPRPair_with_gsub_0_in_tGPRRegClass,
5808 &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass,
5809 nullptr
5810};
5811
5812static const TargetRegisterClass *const GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses[] = {
5813 &ARM::GPRPairRegClass,
5814 &ARM::GPRPairnospRegClass,
5815 &ARM::GPRPair_with_gsub_0_in_hGPRRegClass,
5816 nullptr
5817};
5818
5819static const TargetRegisterClass *const GPRPair_with_gsub_1_in_GPRspSuperclasses[] = {
5820 &ARM::GPRPairRegClass,
5821 &ARM::GPRPair_with_gsub_0_in_hGPRRegClass,
5822 &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass,
5823 nullptr
5824};
5825
5826static const TargetRegisterClass *const DPairSpc_with_ssub_0Superclasses[] = {
5827 &ARM::DPairSpcRegClass,
5828 nullptr
5829};
5830
5831static const TargetRegisterClass *const DPairSpc_with_ssub_4Superclasses[] = {
5832 &ARM::DPairSpcRegClass,
5833 &ARM::DPairSpc_with_ssub_0RegClass,
5834 nullptr
5835};
5836
5837static const TargetRegisterClass *const DPairSpc_with_dsub_0_in_DPR_8Superclasses[] = {
5838 &ARM::DPairSpcRegClass,
5839 &ARM::DPairSpc_with_ssub_0RegClass,
5840 &ARM::DPairSpc_with_ssub_4RegClass,
5841 nullptr
5842};
5843
5844static const TargetRegisterClass *const DPairSpc_with_dsub_2_in_DPR_8Superclasses[] = {
5845 &ARM::DPairSpcRegClass,
5846 &ARM::DPairSpc_with_ssub_0RegClass,
5847 &ARM::DPairSpc_with_ssub_4RegClass,
5848 &ARM::DPairSpc_with_dsub_0_in_DPR_8RegClass,
5849 nullptr
5850};
5851
5852static const TargetRegisterClass *const DPair_with_ssub_0Superclasses[] = {
5853 &ARM::DPairRegClass,
5854 nullptr
5855};
5856
5857static const TargetRegisterClass *const QPRSuperclasses[] = {
5858 &ARM::DPairRegClass,
5859 nullptr
5860};
5861
5862static const TargetRegisterClass *const DPair_with_ssub_2Superclasses[] = {
5863 &ARM::DPairRegClass,
5864 &ARM::DPair_with_ssub_0RegClass,
5865 nullptr
5866};
5867
5868static const TargetRegisterClass *const DPair_with_dsub_0_in_DPR_8Superclasses[] = {
5869 &ARM::DPairRegClass,
5870 &ARM::DPair_with_ssub_0RegClass,
5871 &ARM::DPair_with_ssub_2RegClass,
5872 nullptr
5873};
5874
5875static const TargetRegisterClass *const MQPRSuperclasses[] = {
5876 &ARM::DPairRegClass,
5877 &ARM::DPair_with_ssub_0RegClass,
5878 &ARM::QPRRegClass,
5879 &ARM::DPair_with_ssub_2RegClass,
5880 &ARM::QPR_VFP2RegClass,
5881 nullptr
5882};
5883
5884static const TargetRegisterClass *const QPR_VFP2Superclasses[] = {
5885 &ARM::DPairRegClass,
5886 &ARM::DPair_with_ssub_0RegClass,
5887 &ARM::QPRRegClass,
5888 &ARM::DPair_with_ssub_2RegClass,
5889 &ARM::MQPRRegClass,
5890 nullptr
5891};
5892
5893static const TargetRegisterClass *const DPair_with_dsub_1_in_DPR_8Superclasses[] = {
5894 &ARM::DPairRegClass,
5895 &ARM::DPair_with_ssub_0RegClass,
5896 &ARM::DPair_with_ssub_2RegClass,
5897 &ARM::DPair_with_dsub_0_in_DPR_8RegClass,
5898 nullptr
5899};
5900
5901static const TargetRegisterClass *const QPR_8Superclasses[] = {
5902 &ARM::DPairRegClass,
5903 &ARM::DPair_with_ssub_0RegClass,
5904 &ARM::QPRRegClass,
5905 &ARM::DPair_with_ssub_2RegClass,
5906 &ARM::DPair_with_dsub_0_in_DPR_8RegClass,
5907 &ARM::MQPRRegClass,
5908 &ARM::QPR_VFP2RegClass,
5909 &ARM::DPair_with_dsub_1_in_DPR_8RegClass,
5910 nullptr
5911};
5912
5913static const TargetRegisterClass *const DTripleSpc_with_ssub_0Superclasses[] = {
5914 &ARM::DTripleSpcRegClass,
5915 nullptr
5916};
5917
5918static const TargetRegisterClass *const DTriple_with_ssub_0Superclasses[] = {
5919 &ARM::DTripleRegClass,
5920 nullptr
5921};
5922
5923static const TargetRegisterClass *const DTriple_with_qsub_0_in_QPRSuperclasses[] = {
5924 &ARM::DTripleRegClass,
5925 nullptr
5926};
5927
5928static const TargetRegisterClass *const DTriple_with_ssub_2Superclasses[] = {
5929 &ARM::DTripleRegClass,
5930 &ARM::DTriple_with_ssub_0RegClass,
5931 nullptr
5932};
5933
5934static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = {
5935 &ARM::DTripleRegClass,
5936 nullptr
5937};
5938
5939static const TargetRegisterClass *const DTripleSpc_with_ssub_4Superclasses[] = {
5940 &ARM::DTripleSpcRegClass,
5941 &ARM::DTripleSpc_with_ssub_0RegClass,
5942 nullptr
5943};
5944
5945static const TargetRegisterClass *const DTriple_with_ssub_4Superclasses[] = {
5946 &ARM::DTripleRegClass,
5947 &ARM::DTriple_with_ssub_0RegClass,
5948 &ARM::DTriple_with_ssub_2RegClass,
5949 nullptr
5950};
5951
5952static const TargetRegisterClass *const DTripleSpc_with_ssub_8Superclasses[] = {
5953 &ARM::DTripleSpcRegClass,
5954 &ARM::DTripleSpc_with_ssub_0RegClass,
5955 &ARM::DTripleSpc_with_ssub_4RegClass,
5956 nullptr
5957};
5958
5959static const TargetRegisterClass *const DTripleSpc_with_dsub_0_in_DPR_8Superclasses[] = {
5960 &ARM::DTripleSpcRegClass,
5961 &ARM::DTripleSpc_with_ssub_0RegClass,
5962 &ARM::DTripleSpc_with_ssub_4RegClass,
5963 &ARM::DTripleSpc_with_ssub_8RegClass,
5964 nullptr
5965};
5966
5967static const TargetRegisterClass *const DTriple_with_dsub_0_in_DPR_8Superclasses[] = {
5968 &ARM::DTripleRegClass,
5969 &ARM::DTriple_with_ssub_0RegClass,
5970 &ARM::DTriple_with_ssub_2RegClass,
5971 &ARM::DTriple_with_ssub_4RegClass,
5972 nullptr
5973};
5974
5975static const TargetRegisterClass *const DTriple_with_qsub_0_in_MQPRSuperclasses[] = {
5976 &ARM::DTripleRegClass,
5977 &ARM::DTriple_with_ssub_0RegClass,
5978 &ARM::DTriple_with_qsub_0_in_QPRRegClass,
5979 &ARM::DTriple_with_ssub_2RegClass,
5980 nullptr
5981};
5982
5983static const TargetRegisterClass *const DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = {
5984 &ARM::DTripleRegClass,
5985 &ARM::DTriple_with_ssub_0RegClass,
5986 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
5987 nullptr
5988};
5989
5990static const TargetRegisterClass *const DTriple_with_dsub_1_in_DPR_8Superclasses[] = {
5991 &ARM::DTripleRegClass,
5992 &ARM::DTriple_with_ssub_0RegClass,
5993 &ARM::DTriple_with_ssub_2RegClass,
5994 &ARM::DTriple_with_ssub_4RegClass,
5995 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
5996 nullptr
5997};
5998
5999static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6000 &ARM::DTripleRegClass,
6001 &ARM::DTriple_with_ssub_0RegClass,
6002 &ARM::DTriple_with_ssub_2RegClass,
6003 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6004 &ARM::DTriple_with_ssub_4RegClass,
6005 &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6006 nullptr
6007};
6008
6009static const TargetRegisterClass *const DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses[] = {
6010 &ARM::DTripleRegClass,
6011 &ARM::DTriple_with_ssub_0RegClass,
6012 &ARM::DTriple_with_qsub_0_in_QPRRegClass,
6013 &ARM::DTriple_with_ssub_2RegClass,
6014 &ARM::DTriple_with_ssub_4RegClass,
6015 &ARM::DTriple_with_qsub_0_in_MQPRRegClass,
6016 nullptr
6017};
6018
6019static const TargetRegisterClass *const DTripleSpc_with_dsub_2_in_DPR_8Superclasses[] = {
6020 &ARM::DTripleSpcRegClass,
6021 &ARM::DTripleSpc_with_ssub_0RegClass,
6022 &ARM::DTripleSpc_with_ssub_4RegClass,
6023 &ARM::DTripleSpc_with_ssub_8RegClass,
6024 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
6025 nullptr
6026};
6027
6028static const TargetRegisterClass *const DTriple_with_dsub_2_in_DPR_8Superclasses[] = {
6029 &ARM::DTripleRegClass,
6030 &ARM::DTriple_with_ssub_0RegClass,
6031 &ARM::DTriple_with_ssub_2RegClass,
6032 &ARM::DTriple_with_ssub_4RegClass,
6033 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
6034 &ARM::DTriple_with_dsub_1_in_DPR_8RegClass,
6035 nullptr
6036};
6037
6038static const TargetRegisterClass *const DTripleSpc_with_dsub_4_in_DPR_8Superclasses[] = {
6039 &ARM::DTripleSpcRegClass,
6040 &ARM::DTripleSpc_with_ssub_0RegClass,
6041 &ARM::DTripleSpc_with_ssub_4RegClass,
6042 &ARM::DTripleSpc_with_ssub_8RegClass,
6043 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
6044 &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass,
6045 nullptr
6046};
6047
6048static const TargetRegisterClass *const DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6049 &ARM::DTripleRegClass,
6050 &ARM::DTriple_with_ssub_0RegClass,
6051 &ARM::DTriple_with_ssub_2RegClass,
6052 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6053 &ARM::DTriple_with_ssub_4RegClass,
6054 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
6055 &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6056 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6057 nullptr
6058};
6059
6060static const TargetRegisterClass *const DTriple_with_qsub_0_in_QPR_8Superclasses[] = {
6061 &ARM::DTripleRegClass,
6062 &ARM::DTriple_with_ssub_0RegClass,
6063 &ARM::DTriple_with_qsub_0_in_QPRRegClass,
6064 &ARM::DTriple_with_ssub_2RegClass,
6065 &ARM::DTriple_with_ssub_4RegClass,
6066 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
6067 &ARM::DTriple_with_qsub_0_in_MQPRRegClass,
6068 &ARM::DTriple_with_dsub_1_in_DPR_8RegClass,
6069 &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass,
6070 nullptr
6071};
6072
6073static const TargetRegisterClass *const DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSuperclasses[] = {
6074 &ARM::DTripleRegClass,
6075 &ARM::DTriple_with_ssub_0RegClass,
6076 &ARM::DTriple_with_qsub_0_in_QPRRegClass,
6077 &ARM::DTriple_with_ssub_2RegClass,
6078 &ARM::DTriple_with_ssub_4RegClass,
6079 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
6080 &ARM::DTriple_with_qsub_0_in_MQPRRegClass,
6081 &ARM::DTriple_with_dsub_1_in_DPR_8RegClass,
6082 &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass,
6083 &ARM::DTriple_with_dsub_2_in_DPR_8RegClass,
6084 &ARM::DTriple_with_qsub_0_in_QPR_8RegClass,
6085 nullptr
6086};
6087
6088static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = {
6089 &ARM::DTripleRegClass,
6090 &ARM::DTriple_with_ssub_0RegClass,
6091 &ARM::DTriple_with_ssub_2RegClass,
6092 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6093 &ARM::DTriple_with_ssub_4RegClass,
6094 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
6095 &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6096 &ARM::DTriple_with_dsub_1_in_DPR_8RegClass,
6097 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6098 &ARM::DTriple_with_dsub_2_in_DPR_8RegClass,
6099 &ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6100 nullptr
6101};
6102
6103static const TargetRegisterClass *const DQuadSpcSuperclasses[] = {
6104 &ARM::DTripleSpcRegClass,
6105 nullptr
6106};
6107
6108static const TargetRegisterClass *const DQuadSpc_with_ssub_0Superclasses[] = {
6109 &ARM::DTripleSpcRegClass,
6110 &ARM::DTripleSpc_with_ssub_0RegClass,
6111 &ARM::DQuadSpcRegClass,
6112 nullptr
6113};
6114
6115static const TargetRegisterClass *const DQuadSpc_with_ssub_4Superclasses[] = {
6116 &ARM::DTripleSpcRegClass,
6117 &ARM::DTripleSpc_with_ssub_0RegClass,
6118 &ARM::DTripleSpc_with_ssub_4RegClass,
6119 &ARM::DQuadSpcRegClass,
6120 &ARM::DQuadSpc_with_ssub_0RegClass,
6121 nullptr
6122};
6123
6124static const TargetRegisterClass *const DQuadSpc_with_ssub_8Superclasses[] = {
6125 &ARM::DTripleSpcRegClass,
6126 &ARM::DTripleSpc_with_ssub_0RegClass,
6127 &ARM::DTripleSpc_with_ssub_4RegClass,
6128 &ARM::DTripleSpc_with_ssub_8RegClass,
6129 &ARM::DQuadSpcRegClass,
6130 &ARM::DQuadSpc_with_ssub_0RegClass,
6131 &ARM::DQuadSpc_with_ssub_4RegClass,
6132 nullptr
6133};
6134
6135static const TargetRegisterClass *const DQuadSpc_with_dsub_0_in_DPR_8Superclasses[] = {
6136 &ARM::DTripleSpcRegClass,
6137 &ARM::DTripleSpc_with_ssub_0RegClass,
6138 &ARM::DTripleSpc_with_ssub_4RegClass,
6139 &ARM::DTripleSpc_with_ssub_8RegClass,
6140 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
6141 &ARM::DQuadSpcRegClass,
6142 &ARM::DQuadSpc_with_ssub_0RegClass,
6143 &ARM::DQuadSpc_with_ssub_4RegClass,
6144 &ARM::DQuadSpc_with_ssub_8RegClass,
6145 nullptr
6146};
6147
6148static const TargetRegisterClass *const DQuadSpc_with_dsub_2_in_DPR_8Superclasses[] = {
6149 &ARM::DTripleSpcRegClass,
6150 &ARM::DTripleSpc_with_ssub_0RegClass,
6151 &ARM::DTripleSpc_with_ssub_4RegClass,
6152 &ARM::DTripleSpc_with_ssub_8RegClass,
6153 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
6154 &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass,
6155 &ARM::DQuadSpcRegClass,
6156 &ARM::DQuadSpc_with_ssub_0RegClass,
6157 &ARM::DQuadSpc_with_ssub_4RegClass,
6158 &ARM::DQuadSpc_with_ssub_8RegClass,
6159 &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass,
6160 nullptr
6161};
6162
6163static const TargetRegisterClass *const DQuadSpc_with_dsub_4_in_DPR_8Superclasses[] = {
6164 &ARM::DTripleSpcRegClass,
6165 &ARM::DTripleSpc_with_ssub_0RegClass,
6166 &ARM::DTripleSpc_with_ssub_4RegClass,
6167 &ARM::DTripleSpc_with_ssub_8RegClass,
6168 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
6169 &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass,
6170 &ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClass,
6171 &ARM::DQuadSpcRegClass,
6172 &ARM::DQuadSpc_with_ssub_0RegClass,
6173 &ARM::DQuadSpc_with_ssub_4RegClass,
6174 &ARM::DQuadSpc_with_ssub_8RegClass,
6175 &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass,
6176 &ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClass,
6177 nullptr
6178};
6179
6180static const TargetRegisterClass *const DQuad_with_ssub_0Superclasses[] = {
6181 &ARM::DQuadRegClass,
6182 nullptr
6183};
6184
6185static const TargetRegisterClass *const DQuad_with_ssub_2Superclasses[] = {
6186 &ARM::DQuadRegClass,
6187 &ARM::DQuad_with_ssub_0RegClass,
6188 nullptr
6189};
6190
6191static const TargetRegisterClass *const QQPRSuperclasses[] = {
6192 &ARM::DQuadRegClass,
6193 nullptr
6194};
6195
6196static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = {
6197 &ARM::DQuadRegClass,
6198 nullptr
6199};
6200
6201static const TargetRegisterClass *const DQuad_with_ssub_4Superclasses[] = {
6202 &ARM::DQuadRegClass,
6203 &ARM::DQuad_with_ssub_0RegClass,
6204 &ARM::DQuad_with_ssub_2RegClass,
6205 nullptr
6206};
6207
6208static const TargetRegisterClass *const DQuad_with_ssub_6Superclasses[] = {
6209 &ARM::DQuadRegClass,
6210 &ARM::DQuad_with_ssub_0RegClass,
6211 &ARM::DQuad_with_ssub_2RegClass,
6212 &ARM::DQuad_with_ssub_4RegClass,
6213 nullptr
6214};
6215
6216static const TargetRegisterClass *const DQuad_with_dsub_0_in_DPR_8Superclasses[] = {
6217 &ARM::DQuadRegClass,
6218 &ARM::DQuad_with_ssub_0RegClass,
6219 &ARM::DQuad_with_ssub_2RegClass,
6220 &ARM::DQuad_with_ssub_4RegClass,
6221 &ARM::DQuad_with_ssub_6RegClass,
6222 nullptr
6223};
6224
6225static const TargetRegisterClass *const DQuad_with_qsub_0_in_MQPRSuperclasses[] = {
6226 &ARM::DQuadRegClass,
6227 &ARM::DQuad_with_ssub_0RegClass,
6228 &ARM::DQuad_with_ssub_2RegClass,
6229 &ARM::QQPRRegClass,
6230 nullptr
6231};
6232
6233static const TargetRegisterClass *const DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = {
6234 &ARM::DQuadRegClass,
6235 &ARM::DQuad_with_ssub_0RegClass,
6236 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6237 nullptr
6238};
6239
6240static const TargetRegisterClass *const DQuad_with_dsub_1_in_DPR_8Superclasses[] = {
6241 &ARM::DQuadRegClass,
6242 &ARM::DQuad_with_ssub_0RegClass,
6243 &ARM::DQuad_with_ssub_2RegClass,
6244 &ARM::DQuad_with_ssub_4RegClass,
6245 &ARM::DQuad_with_ssub_6RegClass,
6246 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6247 nullptr
6248};
6249
6250static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6251 &ARM::DQuadRegClass,
6252 &ARM::DQuad_with_ssub_0RegClass,
6253 &ARM::DQuad_with_ssub_2RegClass,
6254 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6255 &ARM::DQuad_with_ssub_4RegClass,
6256 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6257 nullptr
6258};
6259
6260static const TargetRegisterClass *const MQQPRSuperclasses[] = {
6261 &ARM::DQuadRegClass,
6262 &ARM::DQuad_with_ssub_0RegClass,
6263 &ARM::DQuad_with_ssub_2RegClass,
6264 &ARM::QQPRRegClass,
6265 &ARM::DQuad_with_ssub_4RegClass,
6266 &ARM::DQuad_with_ssub_6RegClass,
6267 &ARM::DQuad_with_qsub_0_in_MQPRRegClass,
6268 nullptr
6269};
6270
6271static const TargetRegisterClass *const DQuad_with_dsub_2_in_DPR_8Superclasses[] = {
6272 &ARM::DQuadRegClass,
6273 &ARM::DQuad_with_ssub_0RegClass,
6274 &ARM::DQuad_with_ssub_2RegClass,
6275 &ARM::DQuad_with_ssub_4RegClass,
6276 &ARM::DQuad_with_ssub_6RegClass,
6277 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6278 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6279 nullptr
6280};
6281
6282static const TargetRegisterClass *const DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6283 &ARM::DQuadRegClass,
6284 &ARM::DQuad_with_ssub_0RegClass,
6285 &ARM::DQuad_with_ssub_2RegClass,
6286 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6287 &ARM::DQuad_with_ssub_4RegClass,
6288 &ARM::DQuad_with_ssub_6RegClass,
6289 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6290 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6291 nullptr
6292};
6293
6294static const TargetRegisterClass *const DQuad_with_dsub_3_in_DPR_8Superclasses[] = {
6295 &ARM::DQuadRegClass,
6296 &ARM::DQuad_with_ssub_0RegClass,
6297 &ARM::DQuad_with_ssub_2RegClass,
6298 &ARM::DQuad_with_ssub_4RegClass,
6299 &ARM::DQuad_with_ssub_6RegClass,
6300 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6301 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6302 &ARM::DQuad_with_dsub_2_in_DPR_8RegClass,
6303 nullptr
6304};
6305
6306static const TargetRegisterClass *const DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6307 &ARM::DQuadRegClass,
6308 &ARM::DQuad_with_ssub_0RegClass,
6309 &ARM::DQuad_with_ssub_2RegClass,
6310 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6311 &ARM::DQuad_with_ssub_4RegClass,
6312 &ARM::DQuad_with_ssub_6RegClass,
6313 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6314 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6315 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6316 &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6317 nullptr
6318};
6319
6320static const TargetRegisterClass *const DQuad_with_qsub_0_in_QPR_8Superclasses[] = {
6321 &ARM::DQuadRegClass,
6322 &ARM::DQuad_with_ssub_0RegClass,
6323 &ARM::DQuad_with_ssub_2RegClass,
6324 &ARM::QQPRRegClass,
6325 &ARM::DQuad_with_ssub_4RegClass,
6326 &ARM::DQuad_with_ssub_6RegClass,
6327 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6328 &ARM::DQuad_with_qsub_0_in_MQPRRegClass,
6329 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6330 &ARM::MQQPRRegClass,
6331 nullptr
6332};
6333
6334static const TargetRegisterClass *const DQuad_with_qsub_1_in_QPR_8Superclasses[] = {
6335 &ARM::DQuadRegClass,
6336 &ARM::DQuad_with_ssub_0RegClass,
6337 &ARM::DQuad_with_ssub_2RegClass,
6338 &ARM::QQPRRegClass,
6339 &ARM::DQuad_with_ssub_4RegClass,
6340 &ARM::DQuad_with_ssub_6RegClass,
6341 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6342 &ARM::DQuad_with_qsub_0_in_MQPRRegClass,
6343 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6344 &ARM::MQQPRRegClass,
6345 &ARM::DQuad_with_dsub_2_in_DPR_8RegClass,
6346 &ARM::DQuad_with_dsub_3_in_DPR_8RegClass,
6347 &ARM::DQuad_with_qsub_0_in_QPR_8RegClass,
6348 nullptr
6349};
6350
6351static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = {
6352 &ARM::DQuadRegClass,
6353 &ARM::DQuad_with_ssub_0RegClass,
6354 &ARM::DQuad_with_ssub_2RegClass,
6355 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6356 &ARM::DQuad_with_ssub_4RegClass,
6357 &ARM::DQuad_with_ssub_6RegClass,
6358 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6359 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6360 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6361 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6362 &ARM::DQuad_with_dsub_2_in_DPR_8RegClass,
6363 &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6364 &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6365 nullptr
6366};
6367
6368static const TargetRegisterClass *const DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = {
6369 &ARM::DQuadRegClass,
6370 &ARM::DQuad_with_ssub_0RegClass,
6371 &ARM::DQuad_with_ssub_2RegClass,
6372 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6373 &ARM::DQuad_with_ssub_4RegClass,
6374 &ARM::DQuad_with_ssub_6RegClass,
6375 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
6376 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
6377 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
6378 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6379 &ARM::DQuad_with_dsub_2_in_DPR_8RegClass,
6380 &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6381 &ARM::DQuad_with_dsub_3_in_DPR_8RegClass,
6382 &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
6383 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass,
6384 nullptr
6385};
6386
6387static const TargetRegisterClass *const QQQQPR_with_ssub_0Superclasses[] = {
6388 &ARM::QQQQPRRegClass,
6389 nullptr
6390};
6391
6392static const TargetRegisterClass *const QQQQPR_with_ssub_4Superclasses[] = {
6393 &ARM::QQQQPRRegClass,
6394 &ARM::QQQQPR_with_ssub_0RegClass,
6395 nullptr
6396};
6397
6398static const TargetRegisterClass *const QQQQPR_with_ssub_8Superclasses[] = {
6399 &ARM::QQQQPRRegClass,
6400 &ARM::QQQQPR_with_ssub_0RegClass,
6401 &ARM::QQQQPR_with_ssub_4RegClass,
6402 nullptr
6403};
6404
6405static const TargetRegisterClass *const MQQQQPRSuperclasses[] = {
6406 &ARM::QQQQPRRegClass,
6407 &ARM::QQQQPR_with_ssub_0RegClass,
6408 &ARM::QQQQPR_with_ssub_4RegClass,
6409 &ARM::QQQQPR_with_ssub_8RegClass,
6410 nullptr
6411};
6412
6413static const TargetRegisterClass *const MQQQQPR_with_dsub_0_in_DPR_8Superclasses[] = {
6414 &ARM::QQQQPRRegClass,
6415 &ARM::QQQQPR_with_ssub_0RegClass,
6416 &ARM::QQQQPR_with_ssub_4RegClass,
6417 &ARM::QQQQPR_with_ssub_8RegClass,
6418 &ARM::MQQQQPRRegClass,
6419 nullptr
6420};
6421
6422static const TargetRegisterClass *const MQQQQPR_with_dsub_2_in_DPR_8Superclasses[] = {
6423 &ARM::QQQQPRRegClass,
6424 &ARM::QQQQPR_with_ssub_0RegClass,
6425 &ARM::QQQQPR_with_ssub_4RegClass,
6426 &ARM::QQQQPR_with_ssub_8RegClass,
6427 &ARM::MQQQQPRRegClass,
6428 &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass,
6429 nullptr
6430};
6431
6432static const TargetRegisterClass *const MQQQQPR_with_dsub_4_in_DPR_8Superclasses[] = {
6433 &ARM::QQQQPRRegClass,
6434 &ARM::QQQQPR_with_ssub_0RegClass,
6435 &ARM::QQQQPR_with_ssub_4RegClass,
6436 &ARM::QQQQPR_with_ssub_8RegClass,
6437 &ARM::MQQQQPRRegClass,
6438 &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass,
6439 &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass,
6440 nullptr
6441};
6442
6443static const TargetRegisterClass *const MQQQQPR_with_dsub_6_in_DPR_8Superclasses[] = {
6444 &ARM::QQQQPRRegClass,
6445 &ARM::QQQQPR_with_ssub_0RegClass,
6446 &ARM::QQQQPR_with_ssub_4RegClass,
6447 &ARM::QQQQPR_with_ssub_8RegClass,
6448 &ARM::MQQQQPRRegClass,
6449 &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass,
6450 &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass,
6451 &ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClass,
6452 nullptr
6453};
6454
6455
6456static inline unsigned HPRAltOrderSelect(const MachineFunction &MF) {
6457 return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs();
6458 }
6459
6460static ArrayRef<MCPhysReg> HPRGetRawAllocationOrder(const MachineFunction &MF) {
6461 static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
6462 static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
6463 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::HPRRegClassID];
6464 const ArrayRef<MCPhysReg> Order[] = {
6465 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6466 ArrayRef(AltOrder1),
6467 ArrayRef(AltOrder2)
6468 };
6469 const unsigned Select = HPRAltOrderSelect(MF);
6470 assert(Select < 3);
6471 return Order[Select];
6472}
6473
6474static inline unsigned SPRAltOrderSelect(const MachineFunction &MF) {
6475 return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs();
6476 }
6477
6478static ArrayRef<MCPhysReg> SPRGetRawAllocationOrder(const MachineFunction &MF) {
6479 static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
6480 static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
6481 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::SPRRegClassID];
6482 const ArrayRef<MCPhysReg> Order[] = {
6483 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6484 ArrayRef(AltOrder1),
6485 ArrayRef(AltOrder2)
6486 };
6487 const unsigned Select = SPRAltOrderSelect(MF);
6488 assert(Select < 3);
6489 return Order[Select];
6490}
6491
6492static inline unsigned GPRAltOrderSelect(const MachineFunction &MF) {
6493 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6494 }
6495
6496static ArrayRef<MCPhysReg> GPRGetRawAllocationOrder(const MachineFunction &MF) {
6497 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::PC };
6498 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6499 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC };
6500 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRRegClassID];
6501 const ArrayRef<MCPhysReg> Order[] = {
6502 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6503 ArrayRef(AltOrder1),
6504 ArrayRef(AltOrder2),
6505 ArrayRef(AltOrder3)
6506 };
6507 const unsigned Select = GPRAltOrderSelect(MF);
6508 assert(Select < 4);
6509 return Order[Select];
6510}
6511
6512static inline unsigned GPRwithAPSRAltOrderSelect(const MachineFunction &MF) {
6513 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6514 }
6515
6516static ArrayRef<MCPhysReg> GPRwithAPSRGetRawAllocationOrder(const MachineFunction &MF) {
6517 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP };
6518 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6519 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithAPSRRegClassID];
6520 const ArrayRef<MCPhysReg> Order[] = {
6521 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6522 ArrayRef(AltOrder1),
6523 ArrayRef(AltOrder2)
6524 };
6525 const unsigned Select = GPRwithAPSRAltOrderSelect(MF);
6526 assert(Select < 3);
6527 return Order[Select];
6528}
6529
6530static inline unsigned GPRwithZRAltOrderSelect(const MachineFunction &MF) {
6531 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6532 }
6533
6534static ArrayRef<MCPhysReg> GPRwithZRGetRawAllocationOrder(const MachineFunction &MF) {
6535 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::ZR };
6536 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6537 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRRegClassID];
6538 const ArrayRef<MCPhysReg> Order[] = {
6539 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6540 ArrayRef(AltOrder1),
6541 ArrayRef(AltOrder2)
6542 };
6543 const unsigned Select = GPRwithZRAltOrderSelect(MF);
6544 assert(Select < 3);
6545 return Order[Select];
6546}
6547
6548static inline unsigned GPRnopcAltOrderSelect(const MachineFunction &MF) {
6549 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6550 }
6551
6552static ArrayRef<MCPhysReg> GPRnopcGetRawAllocationOrder(const MachineFunction &MF) {
6553 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP };
6554 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6555 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP };
6556 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnopcRegClassID];
6557 const ArrayRef<MCPhysReg> Order[] = {
6558 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6559 ArrayRef(AltOrder1),
6560 ArrayRef(AltOrder2),
6561 ArrayRef(AltOrder3)
6562 };
6563 const unsigned Select = GPRnopcAltOrderSelect(MF);
6564 assert(Select < 4);
6565 return Order[Select];
6566}
6567
6568static inline unsigned GPRnospAltOrderSelect(const MachineFunction &MF) {
6569 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6570 }
6571
6572static ArrayRef<MCPhysReg> GPRnospGetRawAllocationOrder(const MachineFunction &MF) {
6573 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::PC };
6574 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6575 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC };
6576 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnospRegClassID];
6577 const ArrayRef<MCPhysReg> Order[] = {
6578 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6579 ArrayRef(AltOrder1),
6580 ArrayRef(AltOrder2),
6581 ArrayRef(AltOrder3)
6582 };
6583 const unsigned Select = GPRnospAltOrderSelect(MF);
6584 assert(Select < 4);
6585 return Order[Select];
6586}
6587
6588static inline unsigned GPRwithZRnospAltOrderSelect(const MachineFunction &MF) {
6589 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6590 }
6591
6592static ArrayRef<MCPhysReg> GPRwithZRnospGetRawAllocationOrder(const MachineFunction &MF) {
6593 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::ZR };
6594 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6595 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRnospRegClassID];
6596 const ArrayRef<MCPhysReg> Order[] = {
6597 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6598 ArrayRef(AltOrder1),
6599 ArrayRef(AltOrder2)
6600 };
6601 const unsigned Select = GPRwithZRnospAltOrderSelect(MF);
6602 assert(Select < 3);
6603 return Order[Select];
6604}
6605
6606static inline unsigned GPRnoipAltOrderSelect(const MachineFunction &MF) {
6607 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6608 }
6609
6610static ArrayRef<MCPhysReg> GPRnoipGetRawAllocationOrder(const MachineFunction &MF) {
6611 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC };
6612 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6613 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC };
6614 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoipRegClassID];
6615 const ArrayRef<MCPhysReg> Order[] = {
6616 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6617 ArrayRef(AltOrder1),
6618 ArrayRef(AltOrder2),
6619 ArrayRef(AltOrder3)
6620 };
6621 const unsigned Select = GPRnoipAltOrderSelect(MF);
6622 assert(Select < 4);
6623 return Order[Select];
6624}
6625
6626static inline unsigned rGPRAltOrderSelect(const MachineFunction &MF) {
6627 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6628 }
6629
6630static ArrayRef<MCPhysReg> rGPRGetRawAllocationOrder(const MachineFunction &MF) {
6631 static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12 };
6632 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6633 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11 };
6634 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::rGPRRegClassID];
6635 const ArrayRef<MCPhysReg> Order[] = {
6636 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6637 ArrayRef(AltOrder1),
6638 ArrayRef(AltOrder2),
6639 ArrayRef(AltOrder3)
6640 };
6641 const unsigned Select = rGPRAltOrderSelect(MF);
6642 assert(Select < 4);
6643 return Order[Select];
6644}
6645
6646static inline unsigned GPRnoip_and_GPRnopcAltOrderSelect(const MachineFunction &MF) {
6647 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6648 }
6649
6650static ArrayRef<MCPhysReg> GPRnoip_and_GPRnopcGetRawAllocationOrder(const MachineFunction &MF) {
6651 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP };
6652 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6653 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP };
6654 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnopcRegClassID];
6655 const ArrayRef<MCPhysReg> Order[] = {
6656 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6657 ArrayRef(AltOrder1),
6658 ArrayRef(AltOrder2),
6659 ArrayRef(AltOrder3)
6660 };
6661 const unsigned Select = GPRnoip_and_GPRnopcAltOrderSelect(MF);
6662 assert(Select < 4);
6663 return Order[Select];
6664}
6665
6666static inline unsigned GPRnoip_and_GPRnospAltOrderSelect(const MachineFunction &MF) {
6667 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6668 }
6669
6670static ArrayRef<MCPhysReg> GPRnoip_and_GPRnospGetRawAllocationOrder(const MachineFunction &MF) {
6671 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC };
6672 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6673 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC };
6674 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnospRegClassID];
6675 const ArrayRef<MCPhysReg> Order[] = {
6676 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6677 ArrayRef(AltOrder1),
6678 ArrayRef(AltOrder2),
6679 ArrayRef(AltOrder3)
6680 };
6681 const unsigned Select = GPRnoip_and_GPRnospAltOrderSelect(MF);
6682 assert(Select < 4);
6683 return Order[Select];
6684}
6685
6686static inline unsigned GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(const MachineFunction &MF) {
6687 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
6688 }
6689
6690static ArrayRef<MCPhysReg> GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder(const MachineFunction &MF) {
6691 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 };
6692 static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 };
6693 static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 };
6694 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID];
6695 const ArrayRef<MCPhysReg> Order[] = {
6696 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6697 ArrayRef(AltOrder1),
6698 ArrayRef(AltOrder2),
6699 ArrayRef(AltOrder3)
6700 };
6701 const unsigned Select = GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(MF);
6702 assert(Select < 4);
6703 return Order[Select];
6704}
6705
6706static inline unsigned tGPREvenAltOrderSelect(const MachineFunction &MF) {
6707 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6708 }
6709
6710static ArrayRef<MCPhysReg> tGPREvenGetRawAllocationOrder(const MachineFunction &MF) {
6711 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 };
6712 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREvenRegClassID];
6713 const ArrayRef<MCPhysReg> Order[] = {
6714 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6715 ArrayRef(AltOrder1)
6716 };
6717 const unsigned Select = tGPREvenAltOrderSelect(MF);
6718 assert(Select < 2);
6719 return Order[Select];
6720}
6721
6722static inline unsigned GPRnoip_and_tGPREvenAltOrderSelect(const MachineFunction &MF) {
6723 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6724 }
6725
6726static ArrayRef<MCPhysReg> GPRnoip_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF) {
6727 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 };
6728 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_tGPREvenRegClassID];
6729 const ArrayRef<MCPhysReg> Order[] = {
6730 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6731 ArrayRef(AltOrder1)
6732 };
6733 const unsigned Select = GPRnoip_and_tGPREvenAltOrderSelect(MF);
6734 assert(Select < 2);
6735 return Order[Select];
6736}
6737
6738static inline unsigned tGPROddAltOrderSelect(const MachineFunction &MF) {
6739 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6740 }
6741
6742static ArrayRef<MCPhysReg> tGPROddGetRawAllocationOrder(const MachineFunction &MF) {
6743 static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 };
6744 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROddRegClassID];
6745 const ArrayRef<MCPhysReg> Order[] = {
6746 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6747 ArrayRef(AltOrder1)
6748 };
6749 const unsigned Select = tGPROddAltOrderSelect(MF);
6750 assert(Select < 2);
6751 return Order[Select];
6752}
6753
6754static inline unsigned tcGPRAltOrderSelect(const MachineFunction &MF) {
6755 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6756 }
6757
6758static ArrayRef<MCPhysReg> tcGPRGetRawAllocationOrder(const MachineFunction &MF) {
6759 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };
6760 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tcGPRRegClassID];
6761 const ArrayRef<MCPhysReg> Order[] = {
6762 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6763 ArrayRef(AltOrder1)
6764 };
6765 const unsigned Select = tcGPRAltOrderSelect(MF);
6766 assert(Select < 2);
6767 return Order[Select];
6768}
6769
6770static inline unsigned tGPR_and_tGPREvenAltOrderSelect(const MachineFunction &MF) {
6771 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6772 }
6773
6774static ArrayRef<MCPhysReg> tGPR_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF) {
6775 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 };
6776 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPREvenRegClassID];
6777 const ArrayRef<MCPhysReg> Order[] = {
6778 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6779 ArrayRef(AltOrder1)
6780 };
6781 const unsigned Select = tGPR_and_tGPREvenAltOrderSelect(MF);
6782 assert(Select < 2);
6783 return Order[Select];
6784}
6785
6786static inline unsigned tGPR_and_tGPROddAltOrderSelect(const MachineFunction &MF) {
6787 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6788 }
6789
6790static ArrayRef<MCPhysReg> tGPR_and_tGPROddGetRawAllocationOrder(const MachineFunction &MF) {
6791 static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 };
6792 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPROddRegClassID];
6793 const ArrayRef<MCPhysReg> Order[] = {
6794 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6795 ArrayRef(AltOrder1)
6796 };
6797 const unsigned Select = tGPR_and_tGPROddAltOrderSelect(MF);
6798 assert(Select < 2);
6799 return Order[Select];
6800}
6801
6802static inline unsigned tGPREven_and_tcGPRAltOrderSelect(const MachineFunction &MF) {
6803 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6804 }
6805
6806static ArrayRef<MCPhysReg> tGPREven_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) {
6807 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 };
6808 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRRegClassID];
6809 const ArrayRef<MCPhysReg> Order[] = {
6810 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6811 ArrayRef(AltOrder1)
6812 };
6813 const unsigned Select = tGPREven_and_tcGPRAltOrderSelect(MF);
6814 assert(Select < 2);
6815 return Order[Select];
6816}
6817
6818static inline unsigned tGPREven_and_tcGPRnotr12AltOrderSelect(const MachineFunction &MF) {
6819 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6820 }
6821
6822static ArrayRef<MCPhysReg> tGPREven_and_tcGPRnotr12GetRawAllocationOrder(const MachineFunction &MF) {
6823 static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 };
6824 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRnotr12RegClassID];
6825 const ArrayRef<MCPhysReg> Order[] = {
6826 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6827 ArrayRef(AltOrder1)
6828 };
6829 const unsigned Select = tGPREven_and_tcGPRnotr12AltOrderSelect(MF);
6830 assert(Select < 2);
6831 return Order[Select];
6832}
6833
6834static inline unsigned hGPR_and_tcGPRAltOrderSelect(const MachineFunction &MF) {
6835 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
6836 }
6837
6838static ArrayRef<MCPhysReg> hGPR_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) {
6839 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::hGPR_and_tcGPRRegClassID];
6840 const ArrayRef<MCPhysReg> Order[] = {
6841 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6842 ArrayRef<MCPhysReg>()
6843 };
6844 const unsigned Select = hGPR_and_tcGPRAltOrderSelect(MF);
6845 assert(Select < 2);
6846 return Order[Select];
6847}
6848
6849static inline unsigned DPRAltOrderSelect(const MachineFunction &MF) {
6850 return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs();
6851 }
6852
6853static ArrayRef<MCPhysReg> DPRGetRawAllocationOrder(const MachineFunction &MF) {
6854 static const MCPhysReg AltOrder1[] = { ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15 };
6855 static const MCPhysReg AltOrder2[] = { ARM::D16, ARM::D18, ARM::D20, ARM::D22, ARM::D24, ARM::D26, ARM::D28, ARM::D30, ARM::D0, ARM::D2, ARM::D4, ARM::D6, ARM::D8, ARM::D10, ARM::D12, ARM::D14, ARM::D17, ARM::D19, ARM::D21, ARM::D23, ARM::D25, ARM::D27, ARM::D29, ARM::D31, ARM::D1, ARM::D3, ARM::D5, ARM::D7, ARM::D9, ARM::D11, ARM::D13, ARM::D15 };
6856 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPRRegClassID];
6857 const ArrayRef<MCPhysReg> Order[] = {
6858 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6859 ArrayRef(AltOrder1),
6860 ArrayRef(AltOrder2)
6861 };
6862 const unsigned Select = DPRAltOrderSelect(MF);
6863 assert(Select < 3);
6864 return Order[Select];
6865}
6866
6867static inline unsigned DPairAltOrderSelect(const MachineFunction &MF) {
6868 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6869 }
6870
6871static ArrayRef<MCPhysReg> DPairGetRawAllocationOrder(const MachineFunction &MF) {
6872 static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D17_D18, ARM::D19_D20, ARM::D21_D22, ARM::D23_D24, ARM::D25_D26, ARM::D27_D28, ARM::D29_D30, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 };
6873 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 };
6874 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPairRegClassID];
6875 const ArrayRef<MCPhysReg> Order[] = {
6876 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6877 ArrayRef(AltOrder1),
6878 ArrayRef(AltOrder2)
6879 };
6880 const unsigned Select = DPairAltOrderSelect(MF);
6881 assert(Select < 3);
6882 return Order[Select];
6883}
6884
6885static inline unsigned DPair_with_ssub_0AltOrderSelect(const MachineFunction &MF) {
6886 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6887 }
6888
6889static ArrayRef<MCPhysReg> DPair_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF) {
6890 static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 };
6891 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 };
6892 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_0RegClassID];
6893 const ArrayRef<MCPhysReg> Order[] = {
6894 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6895 ArrayRef(AltOrder1),
6896 ArrayRef(AltOrder2)
6897 };
6898 const unsigned Select = DPair_with_ssub_0AltOrderSelect(MF);
6899 assert(Select < 3);
6900 return Order[Select];
6901}
6902
6903static inline unsigned QPRAltOrderSelect(const MachineFunction &MF) {
6904 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6905 }
6906
6907static ArrayRef<MCPhysReg> QPRGetRawAllocationOrder(const MachineFunction &MF) {
6908 static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 };
6909 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 };
6910 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QPRRegClassID];
6911 const ArrayRef<MCPhysReg> Order[] = {
6912 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6913 ArrayRef(AltOrder1),
6914 ArrayRef(AltOrder2)
6915 };
6916 const unsigned Select = QPRAltOrderSelect(MF);
6917 assert(Select < 3);
6918 return Order[Select];
6919}
6920
6921static inline unsigned DPair_with_ssub_2AltOrderSelect(const MachineFunction &MF) {
6922 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6923 }
6924
6925static ArrayRef<MCPhysReg> DPair_with_ssub_2GetRawAllocationOrder(const MachineFunction &MF) {
6926 static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 };
6927 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 };
6928 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_2RegClassID];
6929 const ArrayRef<MCPhysReg> Order[] = {
6930 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6931 ArrayRef(AltOrder1),
6932 ArrayRef(AltOrder2)
6933 };
6934 const unsigned Select = DPair_with_ssub_2AltOrderSelect(MF);
6935 assert(Select < 3);
6936 return Order[Select];
6937}
6938
6939static inline unsigned DPair_with_dsub_0_in_DPR_8AltOrderSelect(const MachineFunction &MF) {
6940 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6941 }
6942
6943static ArrayRef<MCPhysReg> DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF) {
6944 static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 };
6945 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 };
6946 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_0_in_DPR_8RegClassID];
6947 const ArrayRef<MCPhysReg> Order[] = {
6948 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6949 ArrayRef(AltOrder1),
6950 ArrayRef(AltOrder2)
6951 };
6952 const unsigned Select = DPair_with_dsub_0_in_DPR_8AltOrderSelect(MF);
6953 assert(Select < 3);
6954 return Order[Select];
6955}
6956
6957static inline unsigned DPair_with_dsub_1_in_DPR_8AltOrderSelect(const MachineFunction &MF) {
6958 return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps();
6959 }
6960
6961static ArrayRef<MCPhysReg> DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF) {
6962 static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 };
6963 static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 };
6964 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_1_in_DPR_8RegClassID];
6965 const ArrayRef<MCPhysReg> Order[] = {
6966 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6967 ArrayRef(AltOrder1),
6968 ArrayRef(AltOrder2)
6969 };
6970 const unsigned Select = DPair_with_dsub_1_in_DPR_8AltOrderSelect(MF);
6971 assert(Select < 3);
6972 return Order[Select];
6973}
6974
6975static inline unsigned QQPRAltOrderSelect(const MachineFunction &MF) { return 1; }
6976
6977static ArrayRef<MCPhysReg> QQPRGetRawAllocationOrder(const MachineFunction &MF) {
6978 static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 };
6979 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQPRRegClassID];
6980 const ArrayRef<MCPhysReg> Order[] = {
6981 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6982 ArrayRef(AltOrder1)
6983 };
6984 const unsigned Select = QQPRAltOrderSelect(MF);
6985 assert(Select < 2);
6986 return Order[Select];
6987}
6988
6989static inline unsigned DQuad_with_qsub_0_in_MQPRAltOrderSelect(const MachineFunction &MF) { return 1; }
6990
6991static ArrayRef<MCPhysReg> DQuad_with_qsub_0_in_MQPRGetRawAllocationOrder(const MachineFunction &MF) {
6992 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 };
6993 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_0_in_MQPRRegClassID];
6994 const ArrayRef<MCPhysReg> Order[] = {
6995 ArrayRef(MCR.begin(), MCR.getNumRegs()),
6996 ArrayRef(AltOrder1)
6997 };
6998 const unsigned Select = DQuad_with_qsub_0_in_MQPRAltOrderSelect(MF);
6999 assert(Select < 2);
7000 return Order[Select];
7001}
7002
7003static inline unsigned QQQQPRAltOrderSelect(const MachineFunction &MF) { return 1; }
7004
7005static ArrayRef<MCPhysReg> QQQQPRGetRawAllocationOrder(const MachineFunction &MF) {
7006 static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 };
7007 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPRRegClassID];
7008 const ArrayRef<MCPhysReg> Order[] = {
7009 ArrayRef(MCR.begin(), MCR.getNumRegs()),
7010 ArrayRef(AltOrder1)
7011 };
7012 const unsigned Select = QQQQPRAltOrderSelect(MF);
7013 assert(Select < 2);
7014 return Order[Select];
7015}
7016
7017static inline unsigned QQQQPR_with_ssub_0AltOrderSelect(const MachineFunction &MF) { return 1; }
7018
7019static ArrayRef<MCPhysReg> QQQQPR_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF) {
7020 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 };
7021 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_0RegClassID];
7022 const ArrayRef<MCPhysReg> Order[] = {
7023 ArrayRef(MCR.begin(), MCR.getNumRegs()),
7024 ArrayRef(AltOrder1)
7025 };
7026 const unsigned Select = QQQQPR_with_ssub_0AltOrderSelect(MF);
7027 assert(Select < 2);
7028 return Order[Select];
7029}
7030
7031static inline unsigned QQQQPR_with_ssub_4AltOrderSelect(const MachineFunction &MF) { return 1; }
7032
7033static ArrayRef<MCPhysReg> QQQQPR_with_ssub_4GetRawAllocationOrder(const MachineFunction &MF) {
7034 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9 };
7035 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_4RegClassID];
7036 const ArrayRef<MCPhysReg> Order[] = {
7037 ArrayRef(MCR.begin(), MCR.getNumRegs()),
7038 ArrayRef(AltOrder1)
7039 };
7040 const unsigned Select = QQQQPR_with_ssub_4AltOrderSelect(MF);
7041 assert(Select < 2);
7042 return Order[Select];
7043}
7044
7045static inline unsigned QQQQPR_with_ssub_8AltOrderSelect(const MachineFunction &MF) { return 1; }
7046
7047static ArrayRef<MCPhysReg> QQQQPR_with_ssub_8GetRawAllocationOrder(const MachineFunction &MF) {
7048 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8 };
7049 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_8RegClassID];
7050 const ArrayRef<MCPhysReg> Order[] = {
7051 ArrayRef(MCR.begin(), MCR.getNumRegs()),
7052 ArrayRef(AltOrder1)
7053 };
7054 const unsigned Select = QQQQPR_with_ssub_8AltOrderSelect(MF);
7055 assert(Select < 2);
7056 return Order[Select];
7057}
7058
7059namespace ARM { // Register class instances
7060 extern const TargetRegisterClass HPRRegClass = {
7061 &ARMMCRegisterClasses[HPRRegClassID],
7062 HPRSubClassMask,
7063 SuperRegIdxSeqs + 22,
7064 LaneBitmask(0x0000000000000001),
7065 0,
7066 false,
7067 0x00, /* TSFlags */
7068 false, /* HasDisjunctSubRegs */
7069 false, /* CoveredBySubRegs */
7070 NullRegClasses,
7071 HPRGetRawAllocationOrder
7072 };
7073
7074 extern const TargetRegisterClass FPWithVPRRegClass = {
7075 &ARMMCRegisterClasses[FPWithVPRRegClassID],
7076 FPWithVPRSubClassMask,
7077 SuperRegIdxSeqs + 14,
7078 LaneBitmask(0x000000000000000C),
7079 0,
7080 false,
7081 0x00, /* TSFlags */
7082 true, /* HasDisjunctSubRegs */
7083 false, /* CoveredBySubRegs */
7084 NullRegClasses,
7085 nullptr
7086 };
7087
7088 extern const TargetRegisterClass SPRRegClass = {
7089 &ARMMCRegisterClasses[SPRRegClassID],
7090 SPRSubClassMask,
7091 SuperRegIdxSeqs + 22,
7092 LaneBitmask(0x0000000000000001),
7093 0,
7094 false,
7095 0x00, /* TSFlags */
7096 false, /* HasDisjunctSubRegs */
7097 false, /* CoveredBySubRegs */
7098 SPRSuperclasses,
7099 SPRGetRawAllocationOrder
7100 };
7101
7102 extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass = {
7103 &ARMMCRegisterClasses[FPWithVPR_with_ssub_0RegClassID],
7104 FPWithVPR_with_ssub_0SubClassMask,
7105 SuperRegIdxSeqs + 0,
7106 LaneBitmask(0x000000000000000C),
7107 0,
7108 false,
7109 0x00, /* TSFlags */
7110 true, /* HasDisjunctSubRegs */
7111 true, /* CoveredBySubRegs */
7112 FPWithVPR_with_ssub_0Superclasses,
7113 nullptr
7114 };
7115
7116 extern const TargetRegisterClass GPRRegClass = {
7117 &ARMMCRegisterClasses[GPRRegClassID],
7118 GPRSubClassMask,
7119 SuperRegIdxSeqs + 11,
7120 LaneBitmask(0x0000000000000001),
7121 0,
7122 false,
7123 0x00, /* TSFlags */
7124 false, /* HasDisjunctSubRegs */
7125 true, /* CoveredBySubRegs */
7126 NullRegClasses,
7127 GPRGetRawAllocationOrder
7128 };
7129
7130 extern const TargetRegisterClass GPRwithAPSRRegClass = {
7131 &ARMMCRegisterClasses[GPRwithAPSRRegClassID],
7132 GPRwithAPSRSubClassMask,
7133 SuperRegIdxSeqs + 11,
7134 LaneBitmask(0x0000000000000001),
7135 0,
7136 false,
7137 0x00, /* TSFlags */
7138 false, /* HasDisjunctSubRegs */
7139 true, /* CoveredBySubRegs */
7140 NullRegClasses,
7141 GPRwithAPSRGetRawAllocationOrder
7142 };
7143
7144 extern const TargetRegisterClass GPRwithZRRegClass = {
7145 &ARMMCRegisterClasses[GPRwithZRRegClassID],
7146 GPRwithZRSubClassMask,
7147 SuperRegIdxSeqs + 11,
7148 LaneBitmask(0x0000000000000001),
7149 0,
7150 false,
7151 0x00, /* TSFlags */
7152 false, /* HasDisjunctSubRegs */
7153 true, /* CoveredBySubRegs */
7154 NullRegClasses,
7155 GPRwithZRGetRawAllocationOrder
7156 };
7157
7158 extern const TargetRegisterClass SPR_8RegClass = {
7159 &ARMMCRegisterClasses[SPR_8RegClassID],
7160 SPR_8SubClassMask,
7161 SuperRegIdxSeqs + 22,
7162 LaneBitmask(0x0000000000000001),
7163 0,
7164 false,
7165 0x00, /* TSFlags */
7166 false, /* HasDisjunctSubRegs */
7167 false, /* CoveredBySubRegs */
7168 SPR_8Superclasses,
7169 nullptr
7170 };
7171
7172 extern const TargetRegisterClass GPRnopcRegClass = {
7173 &ARMMCRegisterClasses[GPRnopcRegClassID],
7174 GPRnopcSubClassMask,
7175 SuperRegIdxSeqs + 11,
7176 LaneBitmask(0x0000000000000001),
7177 0,
7178 false,
7179 0x00, /* TSFlags */
7180 false, /* HasDisjunctSubRegs */
7181 true, /* CoveredBySubRegs */
7182 GPRnopcSuperclasses,
7183 GPRnopcGetRawAllocationOrder
7184 };
7185
7186 extern const TargetRegisterClass GPRnospRegClass = {
7187 &ARMMCRegisterClasses[GPRnospRegClassID],
7188 GPRnospSubClassMask,
7189 SuperRegIdxSeqs + 11,
7190 LaneBitmask(0x0000000000000001),
7191 0,
7192 false,
7193 0x00, /* TSFlags */
7194 false, /* HasDisjunctSubRegs */
7195 true, /* CoveredBySubRegs */
7196 GPRnospSuperclasses,
7197 GPRnospGetRawAllocationOrder
7198 };
7199
7200 extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass = {
7201 &ARMMCRegisterClasses[GPRwithAPSR_NZCVnospRegClassID],
7202 GPRwithAPSR_NZCVnospSubClassMask,
7203 SuperRegIdxSeqs + 11,
7204 LaneBitmask(0x0000000000000001),
7205 0,
7206 false,
7207 0x00, /* TSFlags */
7208 false, /* HasDisjunctSubRegs */
7209 true, /* CoveredBySubRegs */
7210 GPRwithAPSR_NZCVnospSuperclasses,
7211 nullptr
7212 };
7213
7214 extern const TargetRegisterClass GPRwithAPSRnospRegClass = {
7215 &ARMMCRegisterClasses[GPRwithAPSRnospRegClassID],
7216 GPRwithAPSRnospSubClassMask,
7217 SuperRegIdxSeqs + 11,
7218 LaneBitmask(0x0000000000000001),
7219 0,
7220 false,
7221 0x00, /* TSFlags */
7222 false, /* HasDisjunctSubRegs */
7223 true, /* CoveredBySubRegs */
7224 NullRegClasses,
7225 nullptr
7226 };
7227
7228 extern const TargetRegisterClass GPRwithZRnospRegClass = {
7229 &ARMMCRegisterClasses[GPRwithZRnospRegClassID],
7230 GPRwithZRnospSubClassMask,
7231 SuperRegIdxSeqs + 11,
7232 LaneBitmask(0x0000000000000001),
7233 0,
7234 false,
7235 0x00, /* TSFlags */
7236 false, /* HasDisjunctSubRegs */
7237 true, /* CoveredBySubRegs */
7238 GPRwithZRnospSuperclasses,
7239 GPRwithZRnospGetRawAllocationOrder
7240 };
7241
7242 extern const TargetRegisterClass GPRnoipRegClass = {
7243 &ARMMCRegisterClasses[GPRnoipRegClassID],
7244 GPRnoipSubClassMask,
7245 SuperRegIdxSeqs + 11,
7246 LaneBitmask(0x0000000000000001),
7247 0,
7248 false,
7249 0x00, /* TSFlags */
7250 false, /* HasDisjunctSubRegs */
7251 true, /* CoveredBySubRegs */
7252 GPRnoipSuperclasses,
7253 GPRnoipGetRawAllocationOrder
7254 };
7255
7256 extern const TargetRegisterClass rGPRRegClass = {
7257 &ARMMCRegisterClasses[rGPRRegClassID],
7258 rGPRSubClassMask,
7259 SuperRegIdxSeqs + 11,
7260 LaneBitmask(0x0000000000000001),
7261 0,
7262 false,
7263 0x00, /* TSFlags */
7264 false, /* HasDisjunctSubRegs */
7265 true, /* CoveredBySubRegs */
7266 rGPRSuperclasses,
7267 rGPRGetRawAllocationOrder
7268 };
7269
7270 extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass = {
7271 &ARMMCRegisterClasses[GPRnoip_and_GPRnopcRegClassID],
7272 GPRnoip_and_GPRnopcSubClassMask,
7273 SuperRegIdxSeqs + 11,
7274 LaneBitmask(0x0000000000000001),
7275 0,
7276 false,
7277 0x00, /* TSFlags */
7278 false, /* HasDisjunctSubRegs */
7279 true, /* CoveredBySubRegs */
7280 GPRnoip_and_GPRnopcSuperclasses,
7281 GPRnoip_and_GPRnopcGetRawAllocationOrder
7282 };
7283
7284 extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass = {
7285 &ARMMCRegisterClasses[GPRnoip_and_GPRnospRegClassID],
7286 GPRnoip_and_GPRnospSubClassMask,
7287 SuperRegIdxSeqs + 11,
7288 LaneBitmask(0x0000000000000001),
7289 0,
7290 false,
7291 0x00, /* TSFlags */
7292 false, /* HasDisjunctSubRegs */
7293 true, /* CoveredBySubRegs */
7294 GPRnoip_and_GPRnospSuperclasses,
7295 GPRnoip_and_GPRnospGetRawAllocationOrder
7296 };
7297
7298 extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass = {
7299 &ARMMCRegisterClasses[GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID],
7300 GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask,
7301 SuperRegIdxSeqs + 11,
7302 LaneBitmask(0x0000000000000001),
7303 0,
7304 false,
7305 0x00, /* TSFlags */
7306 false, /* HasDisjunctSubRegs */
7307 true, /* CoveredBySubRegs */
7308 GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses,
7309 GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder
7310 };
7311
7312 extern const TargetRegisterClass tGPRwithpcRegClass = {
7313 &ARMMCRegisterClasses[tGPRwithpcRegClassID],
7314 tGPRwithpcSubClassMask,
7315 SuperRegIdxSeqs + 11,
7316 LaneBitmask(0x0000000000000001),
7317 0,
7318 false,
7319 0x00, /* TSFlags */
7320 false, /* HasDisjunctSubRegs */
7321 true, /* CoveredBySubRegs */
7322 tGPRwithpcSuperclasses,
7323 nullptr
7324 };
7325
7326 extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass = {
7327 &ARMMCRegisterClasses[FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID],
7328 FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask,
7329 SuperRegIdxSeqs + 0,
7330 LaneBitmask(0x000000000000000C),
7331 0,
7332 false,
7333 0x00, /* TSFlags */
7334 true, /* HasDisjunctSubRegs */
7335 true, /* CoveredBySubRegs */
7336 FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses,
7337 nullptr
7338 };
7339
7340 extern const TargetRegisterClass hGPRRegClass = {
7341 &ARMMCRegisterClasses[hGPRRegClassID],
7342 hGPRSubClassMask,
7343 SuperRegIdxSeqs + 11,
7344 LaneBitmask(0x0000000000000001),
7345 0,
7346 false,
7347 0x00, /* TSFlags */
7348 false, /* HasDisjunctSubRegs */
7349 true, /* CoveredBySubRegs */
7350 hGPRSuperclasses,
7351 nullptr
7352 };
7353
7354 extern const TargetRegisterClass tGPRRegClass = {
7355 &ARMMCRegisterClasses[tGPRRegClassID],
7356 tGPRSubClassMask,
7357 SuperRegIdxSeqs + 11,
7358 LaneBitmask(0x0000000000000001),
7359 0,
7360 false,
7361 0x00, /* TSFlags */
7362 false, /* HasDisjunctSubRegs */
7363 true, /* CoveredBySubRegs */
7364 tGPRSuperclasses,
7365 nullptr
7366 };
7367
7368 extern const TargetRegisterClass tGPREvenRegClass = {
7369 &ARMMCRegisterClasses[tGPREvenRegClassID],
7370 tGPREvenSubClassMask,
7371 SuperRegIdxSeqs + 9,
7372 LaneBitmask(0x0000000000000001),
7373 0,
7374 false,
7375 0x00, /* TSFlags */
7376 false, /* HasDisjunctSubRegs */
7377 true, /* CoveredBySubRegs */
7378 tGPREvenSuperclasses,
7379 tGPREvenGetRawAllocationOrder
7380 };
7381
7382 extern const TargetRegisterClass GPRnopc_and_hGPRRegClass = {
7383 &ARMMCRegisterClasses[GPRnopc_and_hGPRRegClassID],
7384 GPRnopc_and_hGPRSubClassMask,
7385 SuperRegIdxSeqs + 11,
7386 LaneBitmask(0x0000000000000001),
7387 0,
7388 false,
7389 0x00, /* TSFlags */
7390 false, /* HasDisjunctSubRegs */
7391 true, /* CoveredBySubRegs */
7392 GPRnopc_and_hGPRSuperclasses,
7393 nullptr
7394 };
7395
7396 extern const TargetRegisterClass GPRnosp_and_hGPRRegClass = {
7397 &ARMMCRegisterClasses[GPRnosp_and_hGPRRegClassID],
7398 GPRnosp_and_hGPRSubClassMask,
7399 SuperRegIdxSeqs + 11,
7400 LaneBitmask(0x0000000000000001),
7401 0,
7402 false,
7403 0x00, /* TSFlags */
7404 false, /* HasDisjunctSubRegs */
7405 true, /* CoveredBySubRegs */
7406 GPRnosp_and_hGPRSuperclasses,
7407 nullptr
7408 };
7409
7410 extern const TargetRegisterClass GPRnoip_and_hGPRRegClass = {
7411 &ARMMCRegisterClasses[GPRnoip_and_hGPRRegClassID],
7412 GPRnoip_and_hGPRSubClassMask,
7413 SuperRegIdxSeqs + 11,
7414 LaneBitmask(0x0000000000000001),
7415 0,
7416 false,
7417 0x00, /* TSFlags */
7418 false, /* HasDisjunctSubRegs */
7419 true, /* CoveredBySubRegs */
7420 GPRnoip_and_hGPRSuperclasses,
7421 nullptr
7422 };
7423
7424 extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass = {
7425 &ARMMCRegisterClasses[GPRnoip_and_tGPREvenRegClassID],
7426 GPRnoip_and_tGPREvenSubClassMask,
7427 SuperRegIdxSeqs + 9,
7428 LaneBitmask(0x0000000000000001),
7429 0,
7430 false,
7431 0x00, /* TSFlags */
7432 false, /* HasDisjunctSubRegs */
7433 true, /* CoveredBySubRegs */
7434 GPRnoip_and_tGPREvenSuperclasses,
7435 GPRnoip_and_tGPREvenGetRawAllocationOrder
7436 };
7437
7438 extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass = {
7439 &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_hGPRRegClassID],
7440 GPRnosp_and_GPRnopc_and_hGPRSubClassMask,
7441 SuperRegIdxSeqs + 11,
7442 LaneBitmask(0x0000000000000001),
7443 0,
7444 false,
7445 0x00, /* TSFlags */
7446 false, /* HasDisjunctSubRegs */
7447 true, /* CoveredBySubRegs */
7448 GPRnosp_and_GPRnopc_and_hGPRSuperclasses,
7449 nullptr
7450 };
7451
7452 extern const TargetRegisterClass tGPROddRegClass = {
7453 &ARMMCRegisterClasses[tGPROddRegClassID],
7454 tGPROddSubClassMask,
7455 SuperRegIdxSeqs + 12,
7456 LaneBitmask(0x0000000000000001),
7457 0,
7458 false,
7459 0x00, /* TSFlags */
7460 false, /* HasDisjunctSubRegs */
7461 true, /* CoveredBySubRegs */
7462 tGPROddSuperclasses,
7463 tGPROddGetRawAllocationOrder
7464 };
7465
7466 extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass = {
7467 &ARMMCRegisterClasses[GPRnopc_and_GPRnoip_and_hGPRRegClassID],
7468 GPRnopc_and_GPRnoip_and_hGPRSubClassMask,
7469 SuperRegIdxSeqs + 11,
7470 LaneBitmask(0x0000000000000001),
7471 0,
7472 false,
7473 0x00, /* TSFlags */
7474 false, /* HasDisjunctSubRegs */
7475 true, /* CoveredBySubRegs */
7476 GPRnopc_and_GPRnoip_and_hGPRSuperclasses,
7477 nullptr
7478 };
7479
7480 extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass = {
7481 &ARMMCRegisterClasses[GPRnosp_and_GPRnoip_and_hGPRRegClassID],
7482 GPRnosp_and_GPRnoip_and_hGPRSubClassMask,
7483 SuperRegIdxSeqs + 11,
7484 LaneBitmask(0x0000000000000001),
7485 0,
7486 false,
7487 0x00, /* TSFlags */
7488 false, /* HasDisjunctSubRegs */
7489 true, /* CoveredBySubRegs */
7490 GPRnosp_and_GPRnoip_and_hGPRSuperclasses,
7491 nullptr
7492 };
7493
7494 extern const TargetRegisterClass tcGPRRegClass = {
7495 &ARMMCRegisterClasses[tcGPRRegClassID],
7496 tcGPRSubClassMask,
7497 SuperRegIdxSeqs + 11,
7498 LaneBitmask(0x0000000000000001),
7499 0,
7500 false,
7501 0x00, /* TSFlags */
7502 false, /* HasDisjunctSubRegs */
7503 true, /* CoveredBySubRegs */
7504 tcGPRSuperclasses,
7505 tcGPRGetRawAllocationOrder
7506 };
7507
7508 extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass = {
7509 &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID],
7510 GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask,
7511 SuperRegIdxSeqs + 11,
7512 LaneBitmask(0x0000000000000001),
7513 0,
7514 false,
7515 0x00, /* TSFlags */
7516 false, /* HasDisjunctSubRegs */
7517 true, /* CoveredBySubRegs */
7518 GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses,
7519 nullptr
7520 };
7521
7522 extern const TargetRegisterClass hGPR_and_tGPREvenRegClass = {
7523 &ARMMCRegisterClasses[hGPR_and_tGPREvenRegClassID],
7524 hGPR_and_tGPREvenSubClassMask,
7525 SuperRegIdxSeqs + 9,
7526 LaneBitmask(0x0000000000000001),
7527 0,
7528 false,
7529 0x00, /* TSFlags */
7530 false, /* HasDisjunctSubRegs */
7531 true, /* CoveredBySubRegs */
7532 hGPR_and_tGPREvenSuperclasses,
7533 nullptr
7534 };
7535
7536 extern const TargetRegisterClass tGPR_and_tGPREvenRegClass = {
7537 &ARMMCRegisterClasses[tGPR_and_tGPREvenRegClassID],
7538 tGPR_and_tGPREvenSubClassMask,
7539 SuperRegIdxSeqs + 9,
7540 LaneBitmask(0x0000000000000001),
7541 0,
7542 false,
7543 0x00, /* TSFlags */
7544 false, /* HasDisjunctSubRegs */
7545 true, /* CoveredBySubRegs */
7546 tGPR_and_tGPREvenSuperclasses,
7547 tGPR_and_tGPREvenGetRawAllocationOrder
7548 };
7549
7550 extern const TargetRegisterClass tGPR_and_tGPROddRegClass = {
7551 &ARMMCRegisterClasses[tGPR_and_tGPROddRegClassID],
7552 tGPR_and_tGPROddSubClassMask,
7553 SuperRegIdxSeqs + 12,
7554 LaneBitmask(0x0000000000000001),
7555 0,
7556 false,
7557 0x00, /* TSFlags */
7558 false, /* HasDisjunctSubRegs */
7559 true, /* CoveredBySubRegs */
7560 tGPR_and_tGPROddSuperclasses,
7561 tGPR_and_tGPROddGetRawAllocationOrder
7562 };
7563
7564 extern const TargetRegisterClass tcGPRnotr12RegClass = {
7565 &ARMMCRegisterClasses[tcGPRnotr12RegClassID],
7566 tcGPRnotr12SubClassMask,
7567 SuperRegIdxSeqs + 11,
7568 LaneBitmask(0x0000000000000001),
7569 0,
7570 false,
7571 0x00, /* TSFlags */
7572 false, /* HasDisjunctSubRegs */
7573 true, /* CoveredBySubRegs */
7574 tcGPRnotr12Superclasses,
7575 nullptr
7576 };
7577
7578 extern const TargetRegisterClass tGPREven_and_tcGPRRegClass = {
7579 &ARMMCRegisterClasses[tGPREven_and_tcGPRRegClassID],
7580 tGPREven_and_tcGPRSubClassMask,
7581 SuperRegIdxSeqs + 9,
7582 LaneBitmask(0x0000000000000001),
7583 0,
7584 false,
7585 0x00, /* TSFlags */
7586 false, /* HasDisjunctSubRegs */
7587 true, /* CoveredBySubRegs */
7588 tGPREven_and_tcGPRSuperclasses,
7589 tGPREven_and_tcGPRGetRawAllocationOrder
7590 };
7591
7592 extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass = {
7593 &ARMMCRegisterClasses[hGPR_and_GPRnoip_and_tGPREvenRegClassID],
7594 hGPR_and_GPRnoip_and_tGPREvenSubClassMask,
7595 SuperRegIdxSeqs + 9,
7596 LaneBitmask(0x0000000000000001),
7597 0,
7598 false,
7599 0x00, /* TSFlags */
7600 false, /* HasDisjunctSubRegs */
7601 true, /* CoveredBySubRegs */
7602 hGPR_and_GPRnoip_and_tGPREvenSuperclasses,
7603 nullptr
7604 };
7605
7606 extern const TargetRegisterClass hGPR_and_tGPROddRegClass = {
7607 &ARMMCRegisterClasses[hGPR_and_tGPROddRegClassID],
7608 hGPR_and_tGPROddSubClassMask,
7609 SuperRegIdxSeqs + 12,
7610 LaneBitmask(0x0000000000000001),
7611 0,
7612 false,
7613 0x00, /* TSFlags */
7614 false, /* HasDisjunctSubRegs */
7615 true, /* CoveredBySubRegs */
7616 hGPR_and_tGPROddSuperclasses,
7617 nullptr
7618 };
7619
7620 extern const TargetRegisterClass tGPREven_and_tcGPRnotr12RegClass = {
7621 &ARMMCRegisterClasses[tGPREven_and_tcGPRnotr12RegClassID],
7622 tGPREven_and_tcGPRnotr12SubClassMask,
7623 SuperRegIdxSeqs + 9,
7624 LaneBitmask(0x0000000000000001),
7625 0,
7626 false,
7627 0x00, /* TSFlags */
7628 false, /* HasDisjunctSubRegs */
7629 true, /* CoveredBySubRegs */
7630 tGPREven_and_tcGPRnotr12Superclasses,
7631 tGPREven_and_tcGPRnotr12GetRawAllocationOrder
7632 };
7633
7634 extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass = {
7635 &ARMMCRegisterClasses[tGPROdd_and_tcGPRRegClassID],
7636 tGPROdd_and_tcGPRSubClassMask,
7637 SuperRegIdxSeqs + 12,
7638 LaneBitmask(0x0000000000000001),
7639 0,
7640 false,
7641 0x00, /* TSFlags */
7642 false, /* HasDisjunctSubRegs */
7643 true, /* CoveredBySubRegs */
7644 tGPROdd_and_tcGPRSuperclasses,
7645 nullptr
7646 };
7647
7648 extern const TargetRegisterClass CCRRegClass = {
7649 &ARMMCRegisterClasses[CCRRegClassID],
7650 CCRSubClassMask,
7651 SuperRegIdxSeqs + 8,
7652 LaneBitmask(0x0000000000000001),
7653 0,
7654 false,
7655 0x00, /* TSFlags */
7656 false, /* HasDisjunctSubRegs */
7657 true, /* CoveredBySubRegs */
7658 NullRegClasses,
7659 nullptr
7660 };
7661
7662 extern const TargetRegisterClass FPCXTRegsRegClass = {
7663 &ARMMCRegisterClasses[FPCXTRegsRegClassID],
7664 FPCXTRegsSubClassMask,
7665 SuperRegIdxSeqs + 8,
7666 LaneBitmask(0x0000000000000001),
7667 0,
7668 false,
7669 0x00, /* TSFlags */
7670 false, /* HasDisjunctSubRegs */
7671 true, /* CoveredBySubRegs */
7672 NullRegClasses,
7673 nullptr
7674 };
7675
7676 extern const TargetRegisterClass GPRlrRegClass = {
7677 &ARMMCRegisterClasses[GPRlrRegClassID],
7678 GPRlrSubClassMask,
7679 SuperRegIdxSeqs + 8,
7680 LaneBitmask(0x0000000000000001),
7681 0,
7682 false,
7683 0x00, /* TSFlags */
7684 false, /* HasDisjunctSubRegs */
7685 true, /* CoveredBySubRegs */
7686 GPRlrSuperclasses,
7687 nullptr
7688 };
7689
7690 extern const TargetRegisterClass GPRspRegClass = {
7691 &ARMMCRegisterClasses[GPRspRegClassID],
7692 GPRspSubClassMask,
7693 SuperRegIdxSeqs + 12,
7694 LaneBitmask(0x0000000000000001),
7695 0,
7696 false,
7697 0x00, /* TSFlags */
7698 false, /* HasDisjunctSubRegs */
7699 true, /* CoveredBySubRegs */
7700 GPRspSuperclasses,
7701 nullptr
7702 };
7703
7704 extern const TargetRegisterClass VCCRRegClass = {
7705 &ARMMCRegisterClasses[VCCRRegClassID],
7706 VCCRSubClassMask,
7707 SuperRegIdxSeqs + 8,
7708 LaneBitmask(0x0000000000000001),
7709 0,
7710 false,
7711 0x00, /* TSFlags */
7712 false, /* HasDisjunctSubRegs */
7713 true, /* CoveredBySubRegs */
7714 VCCRSuperclasses,
7715 nullptr
7716 };
7717
7718 extern const TargetRegisterClass cl_FPSCR_NZCVRegClass = {
7719 &ARMMCRegisterClasses[cl_FPSCR_NZCVRegClassID],
7720 cl_FPSCR_NZCVSubClassMask,
7721 SuperRegIdxSeqs + 8,
7722 LaneBitmask(0x0000000000000001),
7723 0,
7724 false,
7725 0x00, /* TSFlags */
7726 false, /* HasDisjunctSubRegs */
7727 true, /* CoveredBySubRegs */
7728 NullRegClasses,
7729 nullptr
7730 };
7731
7732 extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass = {
7733 &ARMMCRegisterClasses[hGPR_and_tGPRwithpcRegClassID],
7734 hGPR_and_tGPRwithpcSubClassMask,
7735 SuperRegIdxSeqs + 8,
7736 LaneBitmask(0x0000000000000001),
7737 0,
7738 false,
7739 0x00, /* TSFlags */
7740 false, /* HasDisjunctSubRegs */
7741 true, /* CoveredBySubRegs */
7742 hGPR_and_tGPRwithpcSuperclasses,
7743 nullptr
7744 };
7745
7746 extern const TargetRegisterClass hGPR_and_tcGPRRegClass = {
7747 &ARMMCRegisterClasses[hGPR_and_tcGPRRegClassID],
7748 hGPR_and_tcGPRSubClassMask,
7749 SuperRegIdxSeqs + 9,
7750 LaneBitmask(0x0000000000000001),
7751 0,
7752 false,
7753 0x00, /* TSFlags */
7754 false, /* HasDisjunctSubRegs */
7755 true, /* CoveredBySubRegs */
7756 hGPR_and_tcGPRSuperclasses,
7757 hGPR_and_tcGPRGetRawAllocationOrder
7758 };
7759
7760 extern const TargetRegisterClass DPRRegClass = {
7761 &ARMMCRegisterClasses[DPRRegClassID],
7762 DPRSubClassMask,
7763 SuperRegIdxSeqs + 0,
7764 LaneBitmask(0x000000000000000C),
7765 0,
7766 false,
7767 0x00, /* TSFlags */
7768 true, /* HasDisjunctSubRegs */
7769 false, /* CoveredBySubRegs */
7770 DPRSuperclasses,
7771 DPRGetRawAllocationOrder
7772 };
7773
7774 extern const TargetRegisterClass DPR_VFP2RegClass = {
7775 &ARMMCRegisterClasses[DPR_VFP2RegClassID],
7776 DPR_VFP2SubClassMask,
7777 SuperRegIdxSeqs + 0,
7778 LaneBitmask(0x000000000000000C),
7779 0,
7780 false,
7781 0x00, /* TSFlags */
7782 true, /* HasDisjunctSubRegs */
7783 true, /* CoveredBySubRegs */
7784 DPR_VFP2Superclasses,
7785 nullptr
7786 };
7787
7788 extern const TargetRegisterClass DPR_8RegClass = {
7789 &ARMMCRegisterClasses[DPR_8RegClassID],
7790 DPR_8SubClassMask,
7791 SuperRegIdxSeqs + 0,
7792 LaneBitmask(0x000000000000000C),
7793 0,
7794 false,
7795 0x00, /* TSFlags */
7796 true, /* HasDisjunctSubRegs */
7797 true, /* CoveredBySubRegs */
7798 DPR_8Superclasses,
7799 nullptr
7800 };
7801
7802 extern const TargetRegisterClass GPRPairRegClass = {
7803 &ARMMCRegisterClasses[GPRPairRegClassID],
7804 GPRPairSubClassMask,
7805 SuperRegIdxSeqs + 8,
7806 LaneBitmask(0x0000000000000003),
7807 0,
7808 false,
7809 0x00, /* TSFlags */
7810 true, /* HasDisjunctSubRegs */
7811 true, /* CoveredBySubRegs */
7812 NullRegClasses,
7813 nullptr
7814 };
7815
7816 extern const TargetRegisterClass GPRPairnospRegClass = {
7817 &ARMMCRegisterClasses[GPRPairnospRegClassID],
7818 GPRPairnospSubClassMask,
7819 SuperRegIdxSeqs + 8,
7820 LaneBitmask(0x0000000000000003),
7821 0,
7822 false,
7823 0x00, /* TSFlags */
7824 true, /* HasDisjunctSubRegs */
7825 true, /* CoveredBySubRegs */
7826 GPRPairnospSuperclasses,
7827 nullptr
7828 };
7829
7830 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass = {
7831 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tGPRRegClassID],
7832 GPRPair_with_gsub_0_in_tGPRSubClassMask,
7833 SuperRegIdxSeqs + 8,
7834 LaneBitmask(0x0000000000000003),
7835 0,
7836 false,
7837 0x00, /* TSFlags */
7838 true, /* HasDisjunctSubRegs */
7839 true, /* CoveredBySubRegs */
7840 GPRPair_with_gsub_0_in_tGPRSuperclasses,
7841 nullptr
7842 };
7843
7844 extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass = {
7845 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_hGPRRegClassID],
7846 GPRPair_with_gsub_0_in_hGPRSubClassMask,
7847 SuperRegIdxSeqs + 8,
7848 LaneBitmask(0x0000000000000003),
7849 0,
7850 false,
7851 0x00, /* TSFlags */
7852 true, /* HasDisjunctSubRegs */
7853 true, /* CoveredBySubRegs */
7854 GPRPair_with_gsub_0_in_hGPRSuperclasses,
7855 nullptr
7856 };
7857
7858 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass = {
7859 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRRegClassID],
7860 GPRPair_with_gsub_0_in_tcGPRSubClassMask,
7861 SuperRegIdxSeqs + 8,
7862 LaneBitmask(0x0000000000000003),
7863 0,
7864 false,
7865 0x00, /* TSFlags */
7866 true, /* HasDisjunctSubRegs */
7867 true, /* CoveredBySubRegs */
7868 GPRPair_with_gsub_0_in_tcGPRSuperclasses,
7869 nullptr
7870 };
7871
7872 extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRnotr12RegClass = {
7873 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRnotr12RegClassID],
7874 GPRPair_with_gsub_0_in_tcGPRnotr12SubClassMask,
7875 SuperRegIdxSeqs + 8,
7876 LaneBitmask(0x0000000000000003),
7877 0,
7878 false,
7879 0x00, /* TSFlags */
7880 true, /* HasDisjunctSubRegs */
7881 true, /* CoveredBySubRegs */
7882 GPRPair_with_gsub_0_in_tcGPRnotr12Superclasses,
7883 nullptr
7884 };
7885
7886 extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass = {
7887 &ARMMCRegisterClasses[GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID],
7888 GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask,
7889 SuperRegIdxSeqs + 8,
7890 LaneBitmask(0x0000000000000003),
7891 0,
7892 false,
7893 0x00, /* TSFlags */
7894 true, /* HasDisjunctSubRegs */
7895 true, /* CoveredBySubRegs */
7896 GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses,
7897 nullptr
7898 };
7899
7900 extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass = {
7901 &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_GPRspRegClassID],
7902 GPRPair_with_gsub_1_in_GPRspSubClassMask,
7903 SuperRegIdxSeqs + 8,
7904 LaneBitmask(0x0000000000000003),
7905 0,
7906 false,
7907 0x00, /* TSFlags */
7908 true, /* HasDisjunctSubRegs */
7909 true, /* CoveredBySubRegs */
7910 GPRPair_with_gsub_1_in_GPRspSuperclasses,
7911 nullptr
7912 };
7913
7914 extern const TargetRegisterClass DPairSpcRegClass = {
7915 &ARMMCRegisterClasses[DPairSpcRegClassID],
7916 DPairSpcSubClassMask,
7917 SuperRegIdxSeqs + 58,
7918 LaneBitmask(0x00000000000000CC),
7919 0,
7920 false,
7921 0x00, /* TSFlags */
7922 true, /* HasDisjunctSubRegs */
7923 true, /* CoveredBySubRegs */
7924 NullRegClasses,
7925 nullptr
7926 };
7927
7928 extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass = {
7929 &ARMMCRegisterClasses[DPairSpc_with_ssub_0RegClassID],
7930 DPairSpc_with_ssub_0SubClassMask,
7931 SuperRegIdxSeqs + 58,
7932 LaneBitmask(0x00000000000000CC),
7933 0,
7934 false,
7935 0x00, /* TSFlags */
7936 true, /* HasDisjunctSubRegs */
7937 true, /* CoveredBySubRegs */
7938 DPairSpc_with_ssub_0Superclasses,
7939 nullptr
7940 };
7941
7942 extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass = {
7943 &ARMMCRegisterClasses[DPairSpc_with_ssub_4RegClassID],
7944 DPairSpc_with_ssub_4SubClassMask,
7945 SuperRegIdxSeqs + 58,
7946 LaneBitmask(0x00000000000000CC),
7947 0,
7948 false,
7949 0x00, /* TSFlags */
7950 true, /* HasDisjunctSubRegs */
7951 true, /* CoveredBySubRegs */
7952 DPairSpc_with_ssub_4Superclasses,
7953 nullptr
7954 };
7955
7956 extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass = {
7957 &ARMMCRegisterClasses[DPairSpc_with_dsub_0_in_DPR_8RegClassID],
7958 DPairSpc_with_dsub_0_in_DPR_8SubClassMask,
7959 SuperRegIdxSeqs + 58,
7960 LaneBitmask(0x00000000000000CC),
7961 0,
7962 false,
7963 0x00, /* TSFlags */
7964 true, /* HasDisjunctSubRegs */
7965 true, /* CoveredBySubRegs */
7966 DPairSpc_with_dsub_0_in_DPR_8Superclasses,
7967 nullptr
7968 };
7969
7970 extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass = {
7971 &ARMMCRegisterClasses[DPairSpc_with_dsub_2_in_DPR_8RegClassID],
7972 DPairSpc_with_dsub_2_in_DPR_8SubClassMask,
7973 SuperRegIdxSeqs + 58,
7974 LaneBitmask(0x00000000000000CC),
7975 0,
7976 false,
7977 0x00, /* TSFlags */
7978 true, /* HasDisjunctSubRegs */
7979 true, /* CoveredBySubRegs */
7980 DPairSpc_with_dsub_2_in_DPR_8Superclasses,
7981 nullptr
7982 };
7983
7984 extern const TargetRegisterClass DPairRegClass = {
7985 &ARMMCRegisterClasses[DPairRegClassID],
7986 DPairSubClassMask,
7987 SuperRegIdxSeqs + 77,
7988 LaneBitmask(0x000000000000003C),
7989 0,
7990 false,
7991 0x00, /* TSFlags */
7992 true, /* HasDisjunctSubRegs */
7993 true, /* CoveredBySubRegs */
7994 NullRegClasses,
7995 DPairGetRawAllocationOrder
7996 };
7997
7998 extern const TargetRegisterClass DPair_with_ssub_0RegClass = {
7999 &ARMMCRegisterClasses[DPair_with_ssub_0RegClassID],
8000 DPair_with_ssub_0SubClassMask,
8001 SuperRegIdxSeqs + 77,
8002 LaneBitmask(0x000000000000003C),
8003 0,
8004 false,
8005 0x00, /* TSFlags */
8006 true, /* HasDisjunctSubRegs */
8007 true, /* CoveredBySubRegs */
8008 DPair_with_ssub_0Superclasses,
8009 DPair_with_ssub_0GetRawAllocationOrder
8010 };
8011
8012 extern const TargetRegisterClass QPRRegClass = {
8013 &ARMMCRegisterClasses[QPRRegClassID],
8014 QPRSubClassMask,
8015 SuperRegIdxSeqs + 39,
8016 LaneBitmask(0x000000000000003C),
8017 0,
8018 false,
8019 0x00, /* TSFlags */
8020 true, /* HasDisjunctSubRegs */
8021 true, /* CoveredBySubRegs */
8022 QPRSuperclasses,
8023 QPRGetRawAllocationOrder
8024 };
8025
8026 extern const TargetRegisterClass DPair_with_ssub_2RegClass = {
8027 &ARMMCRegisterClasses[DPair_with_ssub_2RegClassID],
8028 DPair_with_ssub_2SubClassMask,
8029 SuperRegIdxSeqs + 77,
8030 LaneBitmask(0x000000000000003C),
8031 0,
8032 false,
8033 0x00, /* TSFlags */
8034 true, /* HasDisjunctSubRegs */
8035 true, /* CoveredBySubRegs */
8036 DPair_with_ssub_2Superclasses,
8037 DPair_with_ssub_2GetRawAllocationOrder
8038 };
8039
8040 extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass = {
8041 &ARMMCRegisterClasses[DPair_with_dsub_0_in_DPR_8RegClassID],
8042 DPair_with_dsub_0_in_DPR_8SubClassMask,
8043 SuperRegIdxSeqs + 77,
8044 LaneBitmask(0x000000000000003C),
8045 0,
8046 false,
8047 0x00, /* TSFlags */
8048 true, /* HasDisjunctSubRegs */
8049 true, /* CoveredBySubRegs */
8050 DPair_with_dsub_0_in_DPR_8Superclasses,
8051 DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder
8052 };
8053
8054 extern const TargetRegisterClass MQPRRegClass = {
8055 &ARMMCRegisterClasses[MQPRRegClassID],
8056 MQPRSubClassMask,
8057 SuperRegIdxSeqs + 39,
8058 LaneBitmask(0x000000000000003C),
8059 0,
8060 false,
8061 0x00, /* TSFlags */
8062 true, /* HasDisjunctSubRegs */
8063 true, /* CoveredBySubRegs */
8064 MQPRSuperclasses,
8065 nullptr
8066 };
8067
8068 extern const TargetRegisterClass QPR_VFP2RegClass = {
8069 &ARMMCRegisterClasses[QPR_VFP2RegClassID],
8070 QPR_VFP2SubClassMask,
8071 SuperRegIdxSeqs + 39,
8072 LaneBitmask(0x000000000000003C),
8073 0,
8074 false,
8075 0x00, /* TSFlags */
8076 true, /* HasDisjunctSubRegs */
8077 true, /* CoveredBySubRegs */
8078 QPR_VFP2Superclasses,
8079 nullptr
8080 };
8081
8082 extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass = {
8083 &ARMMCRegisterClasses[DPair_with_dsub_1_in_DPR_8RegClassID],
8084 DPair_with_dsub_1_in_DPR_8SubClassMask,
8085 SuperRegIdxSeqs + 77,
8086 LaneBitmask(0x000000000000003C),
8087 0,
8088 false,
8089 0x00, /* TSFlags */
8090 true, /* HasDisjunctSubRegs */
8091 true, /* CoveredBySubRegs */
8092 DPair_with_dsub_1_in_DPR_8Superclasses,
8093 DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder
8094 };
8095
8096 extern const TargetRegisterClass QPR_8RegClass = {
8097 &ARMMCRegisterClasses[QPR_8RegClassID],
8098 QPR_8SubClassMask,
8099 SuperRegIdxSeqs + 39,
8100 LaneBitmask(0x000000000000003C),
8101 0,
8102 false,
8103 0x00, /* TSFlags */
8104 true, /* HasDisjunctSubRegs */
8105 true, /* CoveredBySubRegs */
8106 QPR_8Superclasses,
8107 nullptr
8108 };
8109
8110 extern const TargetRegisterClass DTripleRegClass = {
8111 &ARMMCRegisterClasses[DTripleRegClassID],
8112 DTripleSubClassMask,
8113 SuperRegIdxSeqs + 70,
8114 LaneBitmask(0x00000000000000FC),
8115 0,
8116 false,
8117 0x00, /* TSFlags */
8118 true, /* HasDisjunctSubRegs */
8119 true, /* CoveredBySubRegs */
8120 NullRegClasses,
8121 nullptr
8122 };
8123
8124 extern const TargetRegisterClass DTripleSpcRegClass = {
8125 &ARMMCRegisterClasses[DTripleSpcRegClassID],
8126 DTripleSpcSubClassMask,
8127 SuperRegIdxSeqs + 45,
8128 LaneBitmask(0x0000000000000CCC),
8129 0,
8130 false,
8131 0x00, /* TSFlags */
8132 true, /* HasDisjunctSubRegs */
8133 true, /* CoveredBySubRegs */
8134 NullRegClasses,
8135 nullptr
8136 };
8137
8138 extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass = {
8139 &ARMMCRegisterClasses[DTripleSpc_with_ssub_0RegClassID],
8140 DTripleSpc_with_ssub_0SubClassMask,
8141 SuperRegIdxSeqs + 45,
8142 LaneBitmask(0x0000000000000CCC),
8143 0,
8144 false,
8145 0x00, /* TSFlags */
8146 true, /* HasDisjunctSubRegs */
8147 true, /* CoveredBySubRegs */
8148 DTripleSpc_with_ssub_0Superclasses,
8149 nullptr
8150 };
8151
8152 extern const TargetRegisterClass DTriple_with_ssub_0RegClass = {
8153 &ARMMCRegisterClasses[DTriple_with_ssub_0RegClassID],
8154 DTriple_with_ssub_0SubClassMask,
8155 SuperRegIdxSeqs + 70,
8156 LaneBitmask(0x00000000000000FC),
8157 0,
8158 false,
8159 0x00, /* TSFlags */
8160 true, /* HasDisjunctSubRegs */
8161 true, /* CoveredBySubRegs */
8162 DTriple_with_ssub_0Superclasses,
8163 nullptr
8164 };
8165
8166 extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass = {
8167 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPRRegClassID],
8168 DTriple_with_qsub_0_in_QPRSubClassMask,
8169 SuperRegIdxSeqs + 53,
8170 LaneBitmask(0x00000000000000FC),
8171 0,
8172 false,
8173 0x00, /* TSFlags */
8174 true, /* HasDisjunctSubRegs */
8175 true, /* CoveredBySubRegs */
8176 DTriple_with_qsub_0_in_QPRSuperclasses,
8177 nullptr
8178 };
8179
8180 extern const TargetRegisterClass DTriple_with_ssub_2RegClass = {
8181 &ARMMCRegisterClasses[DTriple_with_ssub_2RegClassID],
8182 DTriple_with_ssub_2SubClassMask,
8183 SuperRegIdxSeqs + 70,
8184 LaneBitmask(0x00000000000000FC),
8185 0,
8186 false,
8187 0x00, /* TSFlags */
8188 true, /* HasDisjunctSubRegs */
8189 true, /* CoveredBySubRegs */
8190 DTriple_with_ssub_2Superclasses,
8191 nullptr
8192 };
8193
8194 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = {
8195 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID],
8196 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask,
8197 SuperRegIdxSeqs + 65,
8198 LaneBitmask(0x00000000000000FC),
8199 0,
8200 false,
8201 0x00, /* TSFlags */
8202 true, /* HasDisjunctSubRegs */
8203 true, /* CoveredBySubRegs */
8204 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses,
8205 nullptr
8206 };
8207
8208 extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass = {
8209 &ARMMCRegisterClasses[DTripleSpc_with_ssub_4RegClassID],
8210 DTripleSpc_with_ssub_4SubClassMask,
8211 SuperRegIdxSeqs + 45,
8212 LaneBitmask(0x0000000000000CCC),
8213 0,
8214 false,
8215 0x00, /* TSFlags */
8216 true, /* HasDisjunctSubRegs */
8217 true, /* CoveredBySubRegs */
8218 DTripleSpc_with_ssub_4Superclasses,
8219 nullptr
8220 };
8221
8222 extern const TargetRegisterClass DTriple_with_ssub_4RegClass = {
8223 &ARMMCRegisterClasses[DTriple_with_ssub_4RegClassID],
8224 DTriple_with_ssub_4SubClassMask,
8225 SuperRegIdxSeqs + 70,
8226 LaneBitmask(0x00000000000000FC),
8227 0,
8228 false,
8229 0x00, /* TSFlags */
8230 true, /* HasDisjunctSubRegs */
8231 true, /* CoveredBySubRegs */
8232 DTriple_with_ssub_4Superclasses,
8233 nullptr
8234 };
8235
8236 extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass = {
8237 &ARMMCRegisterClasses[DTripleSpc_with_ssub_8RegClassID],
8238 DTripleSpc_with_ssub_8SubClassMask,
8239 SuperRegIdxSeqs + 45,
8240 LaneBitmask(0x0000000000000CCC),
8241 0,
8242 false,
8243 0x00, /* TSFlags */
8244 true, /* HasDisjunctSubRegs */
8245 true, /* CoveredBySubRegs */
8246 DTripleSpc_with_ssub_8Superclasses,
8247 nullptr
8248 };
8249
8250 extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass = {
8251 &ARMMCRegisterClasses[DTripleSpc_with_dsub_0_in_DPR_8RegClassID],
8252 DTripleSpc_with_dsub_0_in_DPR_8SubClassMask,
8253 SuperRegIdxSeqs + 45,
8254 LaneBitmask(0x0000000000000CCC),
8255 0,
8256 false,
8257 0x00, /* TSFlags */
8258 true, /* HasDisjunctSubRegs */
8259 true, /* CoveredBySubRegs */
8260 DTripleSpc_with_dsub_0_in_DPR_8Superclasses,
8261 nullptr
8262 };
8263
8264 extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass = {
8265 &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8RegClassID],
8266 DTriple_with_dsub_0_in_DPR_8SubClassMask,
8267 SuperRegIdxSeqs + 70,
8268 LaneBitmask(0x00000000000000FC),
8269 0,
8270 false,
8271 0x00, /* TSFlags */
8272 true, /* HasDisjunctSubRegs */
8273 true, /* CoveredBySubRegs */
8274 DTriple_with_dsub_0_in_DPR_8Superclasses,
8275 nullptr
8276 };
8277
8278 extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass = {
8279 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_MQPRRegClassID],
8280 DTriple_with_qsub_0_in_MQPRSubClassMask,
8281 SuperRegIdxSeqs + 53,
8282 LaneBitmask(0x00000000000000FC),
8283 0,
8284 false,
8285 0x00, /* TSFlags */
8286 true, /* HasDisjunctSubRegs */
8287 true, /* CoveredBySubRegs */
8288 DTriple_with_qsub_0_in_MQPRSuperclasses,
8289 nullptr
8290 };
8291
8292 extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = {
8293 &ARMMCRegisterClasses[DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID],
8294 DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask,
8295 SuperRegIdxSeqs + 65,
8296 LaneBitmask(0x00000000000000FC),
8297 0,
8298 false,
8299 0x00, /* TSFlags */
8300 true, /* HasDisjunctSubRegs */
8301 true, /* CoveredBySubRegs */
8302 DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses,
8303 nullptr
8304 };
8305
8306 extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass = {
8307 &ARMMCRegisterClasses[DTriple_with_dsub_1_in_DPR_8RegClassID],
8308 DTriple_with_dsub_1_in_DPR_8SubClassMask,
8309 SuperRegIdxSeqs + 70,
8310 LaneBitmask(0x00000000000000FC),
8311 0,
8312 false,
8313 0x00, /* TSFlags */
8314 true, /* HasDisjunctSubRegs */
8315 true, /* CoveredBySubRegs */
8316 DTriple_with_dsub_1_in_DPR_8Superclasses,
8317 nullptr
8318 };
8319
8320 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8321 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8322 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8323 SuperRegIdxSeqs + 65,
8324 LaneBitmask(0x00000000000000FC),
8325 0,
8326 false,
8327 0x00, /* TSFlags */
8328 true, /* HasDisjunctSubRegs */
8329 true, /* CoveredBySubRegs */
8330 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8331 nullptr
8332 };
8333
8334 extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass = {
8335 &ARMMCRegisterClasses[DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID],
8336 DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask,
8337 SuperRegIdxSeqs + 53,
8338 LaneBitmask(0x00000000000000FC),
8339 0,
8340 false,
8341 0x00, /* TSFlags */
8342 true, /* HasDisjunctSubRegs */
8343 true, /* CoveredBySubRegs */
8344 DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses,
8345 nullptr
8346 };
8347
8348 extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass = {
8349 &ARMMCRegisterClasses[DTripleSpc_with_dsub_2_in_DPR_8RegClassID],
8350 DTripleSpc_with_dsub_2_in_DPR_8SubClassMask,
8351 SuperRegIdxSeqs + 45,
8352 LaneBitmask(0x0000000000000CCC),
8353 0,
8354 false,
8355 0x00, /* TSFlags */
8356 true, /* HasDisjunctSubRegs */
8357 true, /* CoveredBySubRegs */
8358 DTripleSpc_with_dsub_2_in_DPR_8Superclasses,
8359 nullptr
8360 };
8361
8362 extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass = {
8363 &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8RegClassID],
8364 DTriple_with_dsub_2_in_DPR_8SubClassMask,
8365 SuperRegIdxSeqs + 70,
8366 LaneBitmask(0x00000000000000FC),
8367 0,
8368 false,
8369 0x00, /* TSFlags */
8370 true, /* HasDisjunctSubRegs */
8371 true, /* CoveredBySubRegs */
8372 DTriple_with_dsub_2_in_DPR_8Superclasses,
8373 nullptr
8374 };
8375
8376 extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass = {
8377 &ARMMCRegisterClasses[DTripleSpc_with_dsub_4_in_DPR_8RegClassID],
8378 DTripleSpc_with_dsub_4_in_DPR_8SubClassMask,
8379 SuperRegIdxSeqs + 45,
8380 LaneBitmask(0x0000000000000CCC),
8381 0,
8382 false,
8383 0x00, /* TSFlags */
8384 true, /* HasDisjunctSubRegs */
8385 true, /* CoveredBySubRegs */
8386 DTripleSpc_with_dsub_4_in_DPR_8Superclasses,
8387 nullptr
8388 };
8389
8390 extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8391 &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8392 DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8393 SuperRegIdxSeqs + 65,
8394 LaneBitmask(0x00000000000000FC),
8395 0,
8396 false,
8397 0x00, /* TSFlags */
8398 true, /* HasDisjunctSubRegs */
8399 true, /* CoveredBySubRegs */
8400 DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8401 nullptr
8402 };
8403
8404 extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass = {
8405 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPR_8RegClassID],
8406 DTriple_with_qsub_0_in_QPR_8SubClassMask,
8407 SuperRegIdxSeqs + 53,
8408 LaneBitmask(0x00000000000000FC),
8409 0,
8410 false,
8411 0x00, /* TSFlags */
8412 true, /* HasDisjunctSubRegs */
8413 true, /* CoveredBySubRegs */
8414 DTriple_with_qsub_0_in_QPR_8Superclasses,
8415 nullptr
8416 };
8417
8418 extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass = {
8419 &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID],
8420 DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSubClassMask,
8421 SuperRegIdxSeqs + 53,
8422 LaneBitmask(0x00000000000000FC),
8423 0,
8424 false,
8425 0x00, /* TSFlags */
8426 true, /* HasDisjunctSubRegs */
8427 true, /* CoveredBySubRegs */
8428 DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSuperclasses,
8429 nullptr
8430 };
8431
8432 extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = {
8433 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID],
8434 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask,
8435 SuperRegIdxSeqs + 65,
8436 LaneBitmask(0x00000000000000FC),
8437 0,
8438 false,
8439 0x00, /* TSFlags */
8440 true, /* HasDisjunctSubRegs */
8441 true, /* CoveredBySubRegs */
8442 DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses,
8443 nullptr
8444 };
8445
8446 extern const TargetRegisterClass DQuadSpcRegClass = {
8447 &ARMMCRegisterClasses[DQuadSpcRegClassID],
8448 DQuadSpcSubClassMask,
8449 SuperRegIdxSeqs + 45,
8450 LaneBitmask(0x0000000000000CCC),
8451 0,
8452 false,
8453 0x00, /* TSFlags */
8454 true, /* HasDisjunctSubRegs */
8455 true, /* CoveredBySubRegs */
8456 DQuadSpcSuperclasses,
8457 nullptr
8458 };
8459
8460 extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass = {
8461 &ARMMCRegisterClasses[DQuadSpc_with_ssub_0RegClassID],
8462 DQuadSpc_with_ssub_0SubClassMask,
8463 SuperRegIdxSeqs + 45,
8464 LaneBitmask(0x0000000000000CCC),
8465 0,
8466 false,
8467 0x00, /* TSFlags */
8468 true, /* HasDisjunctSubRegs */
8469 true, /* CoveredBySubRegs */
8470 DQuadSpc_with_ssub_0Superclasses,
8471 nullptr
8472 };
8473
8474 extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass = {
8475 &ARMMCRegisterClasses[DQuadSpc_with_ssub_4RegClassID],
8476 DQuadSpc_with_ssub_4SubClassMask,
8477 SuperRegIdxSeqs + 45,
8478 LaneBitmask(0x0000000000000CCC),
8479 0,
8480 false,
8481 0x00, /* TSFlags */
8482 true, /* HasDisjunctSubRegs */
8483 true, /* CoveredBySubRegs */
8484 DQuadSpc_with_ssub_4Superclasses,
8485 nullptr
8486 };
8487
8488 extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass = {
8489 &ARMMCRegisterClasses[DQuadSpc_with_ssub_8RegClassID],
8490 DQuadSpc_with_ssub_8SubClassMask,
8491 SuperRegIdxSeqs + 45,
8492 LaneBitmask(0x0000000000000CCC),
8493 0,
8494 false,
8495 0x00, /* TSFlags */
8496 true, /* HasDisjunctSubRegs */
8497 true, /* CoveredBySubRegs */
8498 DQuadSpc_with_ssub_8Superclasses,
8499 nullptr
8500 };
8501
8502 extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass = {
8503 &ARMMCRegisterClasses[DQuadSpc_with_dsub_0_in_DPR_8RegClassID],
8504 DQuadSpc_with_dsub_0_in_DPR_8SubClassMask,
8505 SuperRegIdxSeqs + 45,
8506 LaneBitmask(0x0000000000000CCC),
8507 0,
8508 false,
8509 0x00, /* TSFlags */
8510 true, /* HasDisjunctSubRegs */
8511 true, /* CoveredBySubRegs */
8512 DQuadSpc_with_dsub_0_in_DPR_8Superclasses,
8513 nullptr
8514 };
8515
8516 extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass = {
8517 &ARMMCRegisterClasses[DQuadSpc_with_dsub_2_in_DPR_8RegClassID],
8518 DQuadSpc_with_dsub_2_in_DPR_8SubClassMask,
8519 SuperRegIdxSeqs + 45,
8520 LaneBitmask(0x0000000000000CCC),
8521 0,
8522 false,
8523 0x00, /* TSFlags */
8524 true, /* HasDisjunctSubRegs */
8525 true, /* CoveredBySubRegs */
8526 DQuadSpc_with_dsub_2_in_DPR_8Superclasses,
8527 nullptr
8528 };
8529
8530 extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass = {
8531 &ARMMCRegisterClasses[DQuadSpc_with_dsub_4_in_DPR_8RegClassID],
8532 DQuadSpc_with_dsub_4_in_DPR_8SubClassMask,
8533 SuperRegIdxSeqs + 45,
8534 LaneBitmask(0x0000000000000CCC),
8535 0,
8536 false,
8537 0x00, /* TSFlags */
8538 true, /* HasDisjunctSubRegs */
8539 true, /* CoveredBySubRegs */
8540 DQuadSpc_with_dsub_4_in_DPR_8Superclasses,
8541 nullptr
8542 };
8543
8544 extern const TargetRegisterClass DQuadRegClass = {
8545 &ARMMCRegisterClasses[DQuadRegClassID],
8546 DQuadSubClassMask,
8547 SuperRegIdxSeqs + 89,
8548 LaneBitmask(0x00000000000003FC),
8549 0,
8550 false,
8551 0x00, /* TSFlags */
8552 true, /* HasDisjunctSubRegs */
8553 true, /* CoveredBySubRegs */
8554 NullRegClasses,
8555 nullptr
8556 };
8557
8558 extern const TargetRegisterClass DQuad_with_ssub_0RegClass = {
8559 &ARMMCRegisterClasses[DQuad_with_ssub_0RegClassID],
8560 DQuad_with_ssub_0SubClassMask,
8561 SuperRegIdxSeqs + 89,
8562 LaneBitmask(0x00000000000003FC),
8563 0,
8564 false,
8565 0x00, /* TSFlags */
8566 true, /* HasDisjunctSubRegs */
8567 true, /* CoveredBySubRegs */
8568 DQuad_with_ssub_0Superclasses,
8569 nullptr
8570 };
8571
8572 extern const TargetRegisterClass DQuad_with_ssub_2RegClass = {
8573 &ARMMCRegisterClasses[DQuad_with_ssub_2RegClassID],
8574 DQuad_with_ssub_2SubClassMask,
8575 SuperRegIdxSeqs + 89,
8576 LaneBitmask(0x00000000000003FC),
8577 0,
8578 false,
8579 0x00, /* TSFlags */
8580 true, /* HasDisjunctSubRegs */
8581 true, /* CoveredBySubRegs */
8582 DQuad_with_ssub_2Superclasses,
8583 nullptr
8584 };
8585
8586 extern const TargetRegisterClass QQPRRegClass = {
8587 &ARMMCRegisterClasses[QQPRRegClassID],
8588 QQPRSubClassMask,
8589 SuperRegIdxSeqs + 85,
8590 LaneBitmask(0x00000000000003FC),
8591 0,
8592 false,
8593 0x00, /* TSFlags */
8594 true, /* HasDisjunctSubRegs */
8595 true, /* CoveredBySubRegs */
8596 QQPRSuperclasses,
8597 QQPRGetRawAllocationOrder
8598 };
8599
8600 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = {
8601 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID],
8602 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask,
8603 SuperRegIdxSeqs + 50,
8604 LaneBitmask(0x00000000000003FC),
8605 0,
8606 false,
8607 0x00, /* TSFlags */
8608 true, /* HasDisjunctSubRegs */
8609 true, /* CoveredBySubRegs */
8610 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses,
8611 nullptr
8612 };
8613
8614 extern const TargetRegisterClass DQuad_with_ssub_4RegClass = {
8615 &ARMMCRegisterClasses[DQuad_with_ssub_4RegClassID],
8616 DQuad_with_ssub_4SubClassMask,
8617 SuperRegIdxSeqs + 89,
8618 LaneBitmask(0x00000000000003FC),
8619 0,
8620 false,
8621 0x00, /* TSFlags */
8622 true, /* HasDisjunctSubRegs */
8623 true, /* CoveredBySubRegs */
8624 DQuad_with_ssub_4Superclasses,
8625 nullptr
8626 };
8627
8628 extern const TargetRegisterClass DQuad_with_ssub_6RegClass = {
8629 &ARMMCRegisterClasses[DQuad_with_ssub_6RegClassID],
8630 DQuad_with_ssub_6SubClassMask,
8631 SuperRegIdxSeqs + 89,
8632 LaneBitmask(0x00000000000003FC),
8633 0,
8634 false,
8635 0x00, /* TSFlags */
8636 true, /* HasDisjunctSubRegs */
8637 true, /* CoveredBySubRegs */
8638 DQuad_with_ssub_6Superclasses,
8639 nullptr
8640 };
8641
8642 extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass = {
8643 &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8RegClassID],
8644 DQuad_with_dsub_0_in_DPR_8SubClassMask,
8645 SuperRegIdxSeqs + 89,
8646 LaneBitmask(0x00000000000003FC),
8647 0,
8648 false,
8649 0x00, /* TSFlags */
8650 true, /* HasDisjunctSubRegs */
8651 true, /* CoveredBySubRegs */
8652 DQuad_with_dsub_0_in_DPR_8Superclasses,
8653 nullptr
8654 };
8655
8656 extern const TargetRegisterClass DQuad_with_qsub_0_in_MQPRRegClass = {
8657 &ARMMCRegisterClasses[DQuad_with_qsub_0_in_MQPRRegClassID],
8658 DQuad_with_qsub_0_in_MQPRSubClassMask,
8659 SuperRegIdxSeqs + 85,
8660 LaneBitmask(0x00000000000003FC),
8661 0,
8662 false,
8663 0x00, /* TSFlags */
8664 true, /* HasDisjunctSubRegs */
8665 true, /* CoveredBySubRegs */
8666 DQuad_with_qsub_0_in_MQPRSuperclasses,
8667 DQuad_with_qsub_0_in_MQPRGetRawAllocationOrder
8668 };
8669
8670 extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = {
8671 &ARMMCRegisterClasses[DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID],
8672 DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask,
8673 SuperRegIdxSeqs + 50,
8674 LaneBitmask(0x00000000000003FC),
8675 0,
8676 false,
8677 0x00, /* TSFlags */
8678 true, /* HasDisjunctSubRegs */
8679 true, /* CoveredBySubRegs */
8680 DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses,
8681 nullptr
8682 };
8683
8684 extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass = {
8685 &ARMMCRegisterClasses[DQuad_with_dsub_1_in_DPR_8RegClassID],
8686 DQuad_with_dsub_1_in_DPR_8SubClassMask,
8687 SuperRegIdxSeqs + 89,
8688 LaneBitmask(0x00000000000003FC),
8689 0,
8690 false,
8691 0x00, /* TSFlags */
8692 true, /* HasDisjunctSubRegs */
8693 true, /* CoveredBySubRegs */
8694 DQuad_with_dsub_1_in_DPR_8Superclasses,
8695 nullptr
8696 };
8697
8698 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8699 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8700 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8701 SuperRegIdxSeqs + 50,
8702 LaneBitmask(0x00000000000003FC),
8703 0,
8704 false,
8705 0x00, /* TSFlags */
8706 true, /* HasDisjunctSubRegs */
8707 true, /* CoveredBySubRegs */
8708 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8709 nullptr
8710 };
8711
8712 extern const TargetRegisterClass MQQPRRegClass = {
8713 &ARMMCRegisterClasses[MQQPRRegClassID],
8714 MQQPRSubClassMask,
8715 SuperRegIdxSeqs + 85,
8716 LaneBitmask(0x00000000000003FC),
8717 0,
8718 false,
8719 0x00, /* TSFlags */
8720 true, /* HasDisjunctSubRegs */
8721 true, /* CoveredBySubRegs */
8722 MQQPRSuperclasses,
8723 nullptr
8724 };
8725
8726 extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass = {
8727 &ARMMCRegisterClasses[DQuad_with_dsub_2_in_DPR_8RegClassID],
8728 DQuad_with_dsub_2_in_DPR_8SubClassMask,
8729 SuperRegIdxSeqs + 89,
8730 LaneBitmask(0x00000000000003FC),
8731 0,
8732 false,
8733 0x00, /* TSFlags */
8734 true, /* HasDisjunctSubRegs */
8735 true, /* CoveredBySubRegs */
8736 DQuad_with_dsub_2_in_DPR_8Superclasses,
8737 nullptr
8738 };
8739
8740 extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8741 &ARMMCRegisterClasses[DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8742 DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8743 SuperRegIdxSeqs + 50,
8744 LaneBitmask(0x00000000000003FC),
8745 0,
8746 false,
8747 0x00, /* TSFlags */
8748 true, /* HasDisjunctSubRegs */
8749 true, /* CoveredBySubRegs */
8750 DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8751 nullptr
8752 };
8753
8754 extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass = {
8755 &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8RegClassID],
8756 DQuad_with_dsub_3_in_DPR_8SubClassMask,
8757 SuperRegIdxSeqs + 89,
8758 LaneBitmask(0x00000000000003FC),
8759 0,
8760 false,
8761 0x00, /* TSFlags */
8762 true, /* HasDisjunctSubRegs */
8763 true, /* CoveredBySubRegs */
8764 DQuad_with_dsub_3_in_DPR_8Superclasses,
8765 nullptr
8766 };
8767
8768 extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8769 &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8770 DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8771 SuperRegIdxSeqs + 50,
8772 LaneBitmask(0x00000000000003FC),
8773 0,
8774 false,
8775 0x00, /* TSFlags */
8776 true, /* HasDisjunctSubRegs */
8777 true, /* CoveredBySubRegs */
8778 DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8779 nullptr
8780 };
8781
8782 extern const TargetRegisterClass DQuad_with_qsub_0_in_QPR_8RegClass = {
8783 &ARMMCRegisterClasses[DQuad_with_qsub_0_in_QPR_8RegClassID],
8784 DQuad_with_qsub_0_in_QPR_8SubClassMask,
8785 SuperRegIdxSeqs + 85,
8786 LaneBitmask(0x00000000000003FC),
8787 0,
8788 false,
8789 0x00, /* TSFlags */
8790 true, /* HasDisjunctSubRegs */
8791 true, /* CoveredBySubRegs */
8792 DQuad_with_qsub_0_in_QPR_8Superclasses,
8793 nullptr
8794 };
8795
8796 extern const TargetRegisterClass DQuad_with_qsub_1_in_QPR_8RegClass = {
8797 &ARMMCRegisterClasses[DQuad_with_qsub_1_in_QPR_8RegClassID],
8798 DQuad_with_qsub_1_in_QPR_8SubClassMask,
8799 SuperRegIdxSeqs + 85,
8800 LaneBitmask(0x00000000000003FC),
8801 0,
8802 false,
8803 0x00, /* TSFlags */
8804 true, /* HasDisjunctSubRegs */
8805 true, /* CoveredBySubRegs */
8806 DQuad_with_qsub_1_in_QPR_8Superclasses,
8807 nullptr
8808 };
8809
8810 extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = {
8811 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID],
8812 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask,
8813 SuperRegIdxSeqs + 50,
8814 LaneBitmask(0x00000000000003FC),
8815 0,
8816 false,
8817 0x00, /* TSFlags */
8818 true, /* HasDisjunctSubRegs */
8819 true, /* CoveredBySubRegs */
8820 DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses,
8821 nullptr
8822 };
8823
8824 extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = {
8825 &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID],
8826 DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask,
8827 SuperRegIdxSeqs + 50,
8828 LaneBitmask(0x00000000000003FC),
8829 0,
8830 false,
8831 0x00, /* TSFlags */
8832 true, /* HasDisjunctSubRegs */
8833 true, /* CoveredBySubRegs */
8834 DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses,
8835 nullptr
8836 };
8837
8838 extern const TargetRegisterClass QQQQPRRegClass = {
8839 &ARMMCRegisterClasses[QQQQPRRegClassID],
8840 QQQQPRSubClassMask,
8841 SuperRegIdxSeqs + 8,
8842 LaneBitmask(0x000000000003FFFC),
8843 0,
8844 false,
8845 0x00, /* TSFlags */
8846 true, /* HasDisjunctSubRegs */
8847 true, /* CoveredBySubRegs */
8848 NullRegClasses,
8849 QQQQPRGetRawAllocationOrder
8850 };
8851
8852 extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass = {
8853 &ARMMCRegisterClasses[QQQQPR_with_ssub_0RegClassID],
8854 QQQQPR_with_ssub_0SubClassMask,
8855 SuperRegIdxSeqs + 8,
8856 LaneBitmask(0x000000000003FFFC),
8857 0,
8858 false,
8859 0x00, /* TSFlags */
8860 true, /* HasDisjunctSubRegs */
8861 true, /* CoveredBySubRegs */
8862 QQQQPR_with_ssub_0Superclasses,
8863 QQQQPR_with_ssub_0GetRawAllocationOrder
8864 };
8865
8866 extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass = {
8867 &ARMMCRegisterClasses[QQQQPR_with_ssub_4RegClassID],
8868 QQQQPR_with_ssub_4SubClassMask,
8869 SuperRegIdxSeqs + 8,
8870 LaneBitmask(0x000000000003FFFC),
8871 0,
8872 false,
8873 0x00, /* TSFlags */
8874 true, /* HasDisjunctSubRegs */
8875 true, /* CoveredBySubRegs */
8876 QQQQPR_with_ssub_4Superclasses,
8877 QQQQPR_with_ssub_4GetRawAllocationOrder
8878 };
8879
8880 extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass = {
8881 &ARMMCRegisterClasses[QQQQPR_with_ssub_8RegClassID],
8882 QQQQPR_with_ssub_8SubClassMask,
8883 SuperRegIdxSeqs + 8,
8884 LaneBitmask(0x000000000003FFFC),
8885 0,
8886 false,
8887 0x00, /* TSFlags */
8888 true, /* HasDisjunctSubRegs */
8889 true, /* CoveredBySubRegs */
8890 QQQQPR_with_ssub_8Superclasses,
8891 QQQQPR_with_ssub_8GetRawAllocationOrder
8892 };
8893
8894 extern const TargetRegisterClass MQQQQPRRegClass = {
8895 &ARMMCRegisterClasses[MQQQQPRRegClassID],
8896 MQQQQPRSubClassMask,
8897 SuperRegIdxSeqs + 8,
8898 LaneBitmask(0x000000000003FFFC),
8899 0,
8900 false,
8901 0x00, /* TSFlags */
8902 true, /* HasDisjunctSubRegs */
8903 true, /* CoveredBySubRegs */
8904 MQQQQPRSuperclasses,
8905 nullptr
8906 };
8907
8908 extern const TargetRegisterClass MQQQQPR_with_dsub_0_in_DPR_8RegClass = {
8909 &ARMMCRegisterClasses[MQQQQPR_with_dsub_0_in_DPR_8RegClassID],
8910 MQQQQPR_with_dsub_0_in_DPR_8SubClassMask,
8911 SuperRegIdxSeqs + 8,
8912 LaneBitmask(0x000000000003FFFC),
8913 0,
8914 false,
8915 0x00, /* TSFlags */
8916 true, /* HasDisjunctSubRegs */
8917 true, /* CoveredBySubRegs */
8918 MQQQQPR_with_dsub_0_in_DPR_8Superclasses,
8919 nullptr
8920 };
8921
8922 extern const TargetRegisterClass MQQQQPR_with_dsub_2_in_DPR_8RegClass = {
8923 &ARMMCRegisterClasses[MQQQQPR_with_dsub_2_in_DPR_8RegClassID],
8924 MQQQQPR_with_dsub_2_in_DPR_8SubClassMask,
8925 SuperRegIdxSeqs + 8,
8926 LaneBitmask(0x000000000003FFFC),
8927 0,
8928 false,
8929 0x00, /* TSFlags */
8930 true, /* HasDisjunctSubRegs */
8931 true, /* CoveredBySubRegs */
8932 MQQQQPR_with_dsub_2_in_DPR_8Superclasses,
8933 nullptr
8934 };
8935
8936 extern const TargetRegisterClass MQQQQPR_with_dsub_4_in_DPR_8RegClass = {
8937 &ARMMCRegisterClasses[MQQQQPR_with_dsub_4_in_DPR_8RegClassID],
8938 MQQQQPR_with_dsub_4_in_DPR_8SubClassMask,
8939 SuperRegIdxSeqs + 8,
8940 LaneBitmask(0x000000000003FFFC),
8941 0,
8942 false,
8943 0x00, /* TSFlags */
8944 true, /* HasDisjunctSubRegs */
8945 true, /* CoveredBySubRegs */
8946 MQQQQPR_with_dsub_4_in_DPR_8Superclasses,
8947 nullptr
8948 };
8949
8950 extern const TargetRegisterClass MQQQQPR_with_dsub_6_in_DPR_8RegClass = {
8951 &ARMMCRegisterClasses[MQQQQPR_with_dsub_6_in_DPR_8RegClassID],
8952 MQQQQPR_with_dsub_6_in_DPR_8SubClassMask,
8953 SuperRegIdxSeqs + 8,
8954 LaneBitmask(0x000000000003FFFC),
8955 0,
8956 false,
8957 0x00, /* TSFlags */
8958 true, /* HasDisjunctSubRegs */
8959 true, /* CoveredBySubRegs */
8960 MQQQQPR_with_dsub_6_in_DPR_8Superclasses,
8961 nullptr
8962 };
8963
8964} // end namespace ARM
8965
8966namespace {
8967 const TargetRegisterClass *const RegisterClasses[] = {
8968 &ARM::HPRRegClass,
8969 &ARM::FPWithVPRRegClass,
8970 &ARM::SPRRegClass,
8971 &ARM::FPWithVPR_with_ssub_0RegClass,
8972 &ARM::GPRRegClass,
8973 &ARM::GPRwithAPSRRegClass,
8974 &ARM::GPRwithZRRegClass,
8975 &ARM::SPR_8RegClass,
8976 &ARM::GPRnopcRegClass,
8977 &ARM::GPRnospRegClass,
8978 &ARM::GPRwithAPSR_NZCVnospRegClass,
8979 &ARM::GPRwithAPSRnospRegClass,
8980 &ARM::GPRwithZRnospRegClass,
8981 &ARM::GPRnoipRegClass,
8982 &ARM::rGPRRegClass,
8983 &ARM::GPRnoip_and_GPRnopcRegClass,
8984 &ARM::GPRnoip_and_GPRnospRegClass,
8985 &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass,
8986 &ARM::tGPRwithpcRegClass,
8987 &ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass,
8988 &ARM::hGPRRegClass,
8989 &ARM::tGPRRegClass,
8990 &ARM::tGPREvenRegClass,
8991 &ARM::GPRnopc_and_hGPRRegClass,
8992 &ARM::GPRnosp_and_hGPRRegClass,
8993 &ARM::GPRnoip_and_hGPRRegClass,
8994 &ARM::GPRnoip_and_tGPREvenRegClass,
8995 &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass,
8996 &ARM::tGPROddRegClass,
8997 &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass,
8998 &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass,
8999 &ARM::tcGPRRegClass,
9000 &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass,
9001 &ARM::hGPR_and_tGPREvenRegClass,
9002 &ARM::tGPR_and_tGPREvenRegClass,
9003 &ARM::tGPR_and_tGPROddRegClass,
9004 &ARM::tcGPRnotr12RegClass,
9005 &ARM::tGPREven_and_tcGPRRegClass,
9006 &ARM::hGPR_and_GPRnoip_and_tGPREvenRegClass,
9007 &ARM::hGPR_and_tGPROddRegClass,
9008 &ARM::tGPREven_and_tcGPRnotr12RegClass,
9009 &ARM::tGPROdd_and_tcGPRRegClass,
9010 &ARM::CCRRegClass,
9011 &ARM::FPCXTRegsRegClass,
9012 &ARM::GPRlrRegClass,
9013 &ARM::GPRspRegClass,
9014 &ARM::VCCRRegClass,
9015 &ARM::cl_FPSCR_NZCVRegClass,
9016 &ARM::hGPR_and_tGPRwithpcRegClass,
9017 &ARM::hGPR_and_tcGPRRegClass,
9018 &ARM::DPRRegClass,
9019 &ARM::DPR_VFP2RegClass,
9020 &ARM::DPR_8RegClass,
9021 &ARM::GPRPairRegClass,
9022 &ARM::GPRPairnospRegClass,
9023 &ARM::GPRPair_with_gsub_0_in_tGPRRegClass,
9024 &ARM::GPRPair_with_gsub_0_in_hGPRRegClass,
9025 &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass,
9026 &ARM::GPRPair_with_gsub_0_in_tcGPRnotr12RegClass,
9027 &ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass,
9028 &ARM::GPRPair_with_gsub_1_in_GPRspRegClass,
9029 &ARM::DPairSpcRegClass,
9030 &ARM::DPairSpc_with_ssub_0RegClass,
9031 &ARM::DPairSpc_with_ssub_4RegClass,
9032 &ARM::DPairSpc_with_dsub_0_in_DPR_8RegClass,
9033 &ARM::DPairSpc_with_dsub_2_in_DPR_8RegClass,
9034 &ARM::DPairRegClass,
9035 &ARM::DPair_with_ssub_0RegClass,
9036 &ARM::QPRRegClass,
9037 &ARM::DPair_with_ssub_2RegClass,
9038 &ARM::DPair_with_dsub_0_in_DPR_8RegClass,
9039 &ARM::MQPRRegClass,
9040 &ARM::QPR_VFP2RegClass,
9041 &ARM::DPair_with_dsub_1_in_DPR_8RegClass,
9042 &ARM::QPR_8RegClass,
9043 &ARM::DTripleRegClass,
9044 &ARM::DTripleSpcRegClass,
9045 &ARM::DTripleSpc_with_ssub_0RegClass,
9046 &ARM::DTriple_with_ssub_0RegClass,
9047 &ARM::DTriple_with_qsub_0_in_QPRRegClass,
9048 &ARM::DTriple_with_ssub_2RegClass,
9049 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
9050 &ARM::DTripleSpc_with_ssub_4RegClass,
9051 &ARM::DTriple_with_ssub_4RegClass,
9052 &ARM::DTripleSpc_with_ssub_8RegClass,
9053 &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass,
9054 &ARM::DTriple_with_dsub_0_in_DPR_8RegClass,
9055 &ARM::DTriple_with_qsub_0_in_MQPRRegClass,
9056 &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
9057 &ARM::DTriple_with_dsub_1_in_DPR_8RegClass,
9058 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9059 &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass,
9060 &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass,
9061 &ARM::DTriple_with_dsub_2_in_DPR_8RegClass,
9062 &ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClass,
9063 &ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9064 &ARM::DTriple_with_qsub_0_in_QPR_8RegClass,
9065 &ARM::DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass,
9066 &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass,
9067 &ARM::DQuadSpcRegClass,
9068 &ARM::DQuadSpc_with_ssub_0RegClass,
9069 &ARM::DQuadSpc_with_ssub_4RegClass,
9070 &ARM::DQuadSpc_with_ssub_8RegClass,
9071 &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass,
9072 &ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClass,
9073 &ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClass,
9074 &ARM::DQuadRegClass,
9075 &ARM::DQuad_with_ssub_0RegClass,
9076 &ARM::DQuad_with_ssub_2RegClass,
9077 &ARM::QQPRRegClass,
9078 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
9079 &ARM::DQuad_with_ssub_4RegClass,
9080 &ARM::DQuad_with_ssub_6RegClass,
9081 &ARM::DQuad_with_dsub_0_in_DPR_8RegClass,
9082 &ARM::DQuad_with_qsub_0_in_MQPRRegClass,
9083 &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass,
9084 &ARM::DQuad_with_dsub_1_in_DPR_8RegClass,
9085 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9086 &ARM::MQQPRRegClass,
9087 &ARM::DQuad_with_dsub_2_in_DPR_8RegClass,
9088 &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9089 &ARM::DQuad_with_dsub_3_in_DPR_8RegClass,
9090 &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9091 &ARM::DQuad_with_qsub_0_in_QPR_8RegClass,
9092 &ARM::DQuad_with_qsub_1_in_QPR_8RegClass,
9093 &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass,
9094 &ARM::DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass,
9095 &ARM::QQQQPRRegClass,
9096 &ARM::QQQQPR_with_ssub_0RegClass,
9097 &ARM::QQQQPR_with_ssub_4RegClass,
9098 &ARM::QQQQPR_with_ssub_8RegClass,
9099 &ARM::MQQQQPRRegClass,
9100 &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass,
9101 &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass,
9102 &ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClass,
9103 &ARM::MQQQQPR_with_dsub_6_in_DPR_8RegClass,
9104 };
9105} // end anonymous namespace
9106
9107static const uint8_t CostPerUseTable[] = {
91080, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
9109
9110
9111static const bool InAllocatableClassTable[] = {
9112false, false, true, false, true, false, false, false, false, true, false, false, false, true, true, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };
9113
9114
9115static const TargetRegisterInfoDesc ARMRegInfoDesc = { // Extra Descriptors
9116CostPerUseTable, 1, InAllocatableClassTable};
9117
9118unsigned ARMGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
9119 static const uint8_t RowMap[56] = {
9120 0, 1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 4, 0, 2, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 5, 5, 5, 2,
9121 };
9122 static const uint8_t Rows[8][56] = {
9123 { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, },
9124 { ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, 0, ARM::dsub_7, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::qsub_1, ARM::ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, 0, ARM::ssub_6_ssub_7_dsub_5_dsub_7, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, },
9125 { ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_1, ARM::qsub_2, 0, 0, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, 0, 0, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9126 { ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_ssub_8_ssub_9, ARM::dsub_5_ssub_12_ssub_13, 0, 0, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::qsub_2, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9127 { ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_2, ARM::qsub_3, 0, 0, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::dsub_5_dsub_7, ARM::dsub_5_ssub_12_ssub_13_dsub_7, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9128 { ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, ARM::qsub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9129 { ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9130 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
9131 };
9132
9133 --IdxA; assert(IdxA < 56); (void) IdxA;
9134 --IdxB; assert(IdxB < 56);
9135 return Rows[RowMap[IdxA]][IdxB];
9136}
9137
9138 struct MaskRolOp {
9139 LaneBitmask Mask;
9140 uint8_t RotateLeft;
9141 };
9142 static const MaskRolOp LaneMaskComposeSequences[] = {
9143 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
9144 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
9145 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
9146 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
9147 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
9148 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
9149 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 12
9150 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 14
9151 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 16
9152 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18
9153 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 20
9154 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 22
9155 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 24
9156 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 26
9157 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 28
9158 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 30
9159 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 32
9160 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 } // Sequence 34
9161 };
9162 static const uint8_t CompositeSequences[] = {
9163 0, // to dsub_0
9164 2, // to dsub_1
9165 4, // to dsub_2
9166 6, // to dsub_3
9167 8, // to dsub_4
9168 10, // to dsub_5
9169 12, // to dsub_6
9170 14, // to dsub_7
9171 0, // to gsub_0
9172 16, // to gsub_1
9173 0, // to qqsub_0
9174 8, // to qqsub_1
9175 0, // to qsub_0
9176 4, // to qsub_1
9177 8, // to qsub_2
9178 12, // to qsub_3
9179 2, // to ssub_0
9180 18, // to ssub_1
9181 4, // to ssub_2
9182 20, // to ssub_3
9183 6, // to ssub_4
9184 22, // to ssub_5
9185 8, // to ssub_6
9186 24, // to ssub_7
9187 10, // to ssub_8
9188 26, // to ssub_9
9189 12, // to ssub_10
9190 28, // to ssub_11
9191 14, // to ssub_12
9192 30, // to ssub_13
9193 32, // to ssub_14
9194 34, // to ssub_15
9195 0, // to ssub_0_ssub_1_ssub_4_ssub_5
9196 0, // to ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9197 2, // to ssub_2_ssub_3_ssub_6_ssub_7
9198 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9199 2, // to ssub_2_ssub_3_ssub_4_ssub_5
9200 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9201 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9202 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9203 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9204 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9205 4, // to ssub_4_ssub_5_ssub_8_ssub_9
9206 4, // to ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9207 4, // to ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9208 6, // to ssub_6_ssub_7_dsub_5
9209 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9210 6, // to ssub_6_ssub_7_dsub_5_dsub_7
9211 6, // to ssub_6_ssub_7_ssub_8_ssub_9
9212 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9213 8, // to ssub_8_ssub_9_ssub_12_ssub_13
9214 8, // to ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9215 10, // to dsub_5_dsub_7
9216 10, // to dsub_5_ssub_12_ssub_13_dsub_7
9217 10, // to dsub_5_ssub_12_ssub_13
9218 4 // to ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9219 };
9220
9221LaneBitmask ARMGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9222 --IdxA; assert(IdxA < 56 && "Subregister index out of bounds");
9223 LaneBitmask Result;
9224 for (const MaskRolOp *Ops =
9225 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
9226 Ops->Mask.any(); ++Ops) {
9227 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
9228 if (unsigned S = Ops->RotateLeft)
9229 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
9230 else
9231 Result |= LaneBitmask(M);
9232 }
9233 return Result;
9234}
9235
9236LaneBitmask ARMGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9237 LaneMask &= getSubRegIndexLaneMask(IdxA);
9238 --IdxA; assert(IdxA < 56 && "Subregister index out of bounds");
9239 LaneBitmask Result;
9240 for (const MaskRolOp *Ops =
9241 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
9242 Ops->Mask.any(); ++Ops) {
9243 LaneBitmask::Type M = LaneMask.getAsInteger();
9244 if (unsigned S = Ops->RotateLeft)
9245 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
9246 else
9247 Result |= LaneBitmask(M);
9248 }
9249 return Result;
9250}
9251
9252const TargetRegisterClass *ARMGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
9253 static const uint8_t Table[136][56] = {
9254 { // HPR
9255 0, // dsub_0
9256 0, // dsub_1
9257 0, // dsub_2
9258 0, // dsub_3
9259 0, // dsub_4
9260 0, // dsub_5
9261 0, // dsub_6
9262 0, // dsub_7
9263 0, // gsub_0
9264 0, // gsub_1
9265 0, // qqsub_0
9266 0, // qqsub_1
9267 0, // qsub_0
9268 0, // qsub_1
9269 0, // qsub_2
9270 0, // qsub_3
9271 0, // ssub_0
9272 0, // ssub_1
9273 0, // ssub_2
9274 0, // ssub_3
9275 0, // ssub_4
9276 0, // ssub_5
9277 0, // ssub_6
9278 0, // ssub_7
9279 0, // ssub_8
9280 0, // ssub_9
9281 0, // ssub_10
9282 0, // ssub_11
9283 0, // ssub_12
9284 0, // ssub_13
9285 0, // ssub_14
9286 0, // ssub_15
9287 0, // ssub_0_ssub_1_ssub_4_ssub_5
9288 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9289 0, // ssub_2_ssub_3_ssub_6_ssub_7
9290 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9291 0, // ssub_2_ssub_3_ssub_4_ssub_5
9292 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9293 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9294 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9295 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9296 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9297 0, // ssub_4_ssub_5_ssub_8_ssub_9
9298 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9299 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9300 0, // ssub_6_ssub_7_dsub_5
9301 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9302 0, // ssub_6_ssub_7_dsub_5_dsub_7
9303 0, // ssub_6_ssub_7_ssub_8_ssub_9
9304 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9305 0, // ssub_8_ssub_9_ssub_12_ssub_13
9306 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9307 0, // dsub_5_dsub_7
9308 0, // dsub_5_ssub_12_ssub_13_dsub_7
9309 0, // dsub_5_ssub_12_ssub_13
9310 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9311 },
9312 { // FPWithVPR
9313 0, // dsub_0
9314 0, // dsub_1
9315 0, // dsub_2
9316 0, // dsub_3
9317 0, // dsub_4
9318 0, // dsub_5
9319 0, // dsub_6
9320 0, // dsub_7
9321 0, // gsub_0
9322 0, // gsub_1
9323 0, // qqsub_0
9324 0, // qqsub_1
9325 0, // qsub_0
9326 0, // qsub_1
9327 0, // qsub_2
9328 0, // qsub_3
9329 4, // ssub_0 -> FPWithVPR_with_ssub_0
9330 4, // ssub_1 -> FPWithVPR_with_ssub_0
9331 0, // ssub_2
9332 0, // ssub_3
9333 0, // ssub_4
9334 0, // ssub_5
9335 0, // ssub_6
9336 0, // ssub_7
9337 0, // ssub_8
9338 0, // ssub_9
9339 0, // ssub_10
9340 0, // ssub_11
9341 0, // ssub_12
9342 0, // ssub_13
9343 0, // ssub_14
9344 0, // ssub_15
9345 0, // ssub_0_ssub_1_ssub_4_ssub_5
9346 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9347 0, // ssub_2_ssub_3_ssub_6_ssub_7
9348 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9349 0, // ssub_2_ssub_3_ssub_4_ssub_5
9350 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9351 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9352 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9353 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9354 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9355 0, // ssub_4_ssub_5_ssub_8_ssub_9
9356 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9357 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9358 0, // ssub_6_ssub_7_dsub_5
9359 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9360 0, // ssub_6_ssub_7_dsub_5_dsub_7
9361 0, // ssub_6_ssub_7_ssub_8_ssub_9
9362 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9363 0, // ssub_8_ssub_9_ssub_12_ssub_13
9364 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9365 0, // dsub_5_dsub_7
9366 0, // dsub_5_ssub_12_ssub_13_dsub_7
9367 0, // dsub_5_ssub_12_ssub_13
9368 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9369 },
9370 { // SPR
9371 0, // dsub_0
9372 0, // dsub_1
9373 0, // dsub_2
9374 0, // dsub_3
9375 0, // dsub_4
9376 0, // dsub_5
9377 0, // dsub_6
9378 0, // dsub_7
9379 0, // gsub_0
9380 0, // gsub_1
9381 0, // qqsub_0
9382 0, // qqsub_1
9383 0, // qsub_0
9384 0, // qsub_1
9385 0, // qsub_2
9386 0, // qsub_3
9387 0, // ssub_0
9388 0, // ssub_1
9389 0, // ssub_2
9390 0, // ssub_3
9391 0, // ssub_4
9392 0, // ssub_5
9393 0, // ssub_6
9394 0, // ssub_7
9395 0, // ssub_8
9396 0, // ssub_9
9397 0, // ssub_10
9398 0, // ssub_11
9399 0, // ssub_12
9400 0, // ssub_13
9401 0, // ssub_14
9402 0, // ssub_15
9403 0, // ssub_0_ssub_1_ssub_4_ssub_5
9404 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9405 0, // ssub_2_ssub_3_ssub_6_ssub_7
9406 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9407 0, // ssub_2_ssub_3_ssub_4_ssub_5
9408 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9409 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9410 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9411 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9412 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9413 0, // ssub_4_ssub_5_ssub_8_ssub_9
9414 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9415 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9416 0, // ssub_6_ssub_7_dsub_5
9417 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9418 0, // ssub_6_ssub_7_dsub_5_dsub_7
9419 0, // ssub_6_ssub_7_ssub_8_ssub_9
9420 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9421 0, // ssub_8_ssub_9_ssub_12_ssub_13
9422 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9423 0, // dsub_5_dsub_7
9424 0, // dsub_5_ssub_12_ssub_13_dsub_7
9425 0, // dsub_5_ssub_12_ssub_13
9426 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9427 },
9428 { // FPWithVPR_with_ssub_0
9429 0, // dsub_0
9430 0, // dsub_1
9431 0, // dsub_2
9432 0, // dsub_3
9433 0, // dsub_4
9434 0, // dsub_5
9435 0, // dsub_6
9436 0, // dsub_7
9437 0, // gsub_0
9438 0, // gsub_1
9439 0, // qqsub_0
9440 0, // qqsub_1
9441 0, // qsub_0
9442 0, // qsub_1
9443 0, // qsub_2
9444 0, // qsub_3
9445 4, // ssub_0 -> FPWithVPR_with_ssub_0
9446 4, // ssub_1 -> FPWithVPR_with_ssub_0
9447 0, // ssub_2
9448 0, // ssub_3
9449 0, // ssub_4
9450 0, // ssub_5
9451 0, // ssub_6
9452 0, // ssub_7
9453 0, // ssub_8
9454 0, // ssub_9
9455 0, // ssub_10
9456 0, // ssub_11
9457 0, // ssub_12
9458 0, // ssub_13
9459 0, // ssub_14
9460 0, // ssub_15
9461 0, // ssub_0_ssub_1_ssub_4_ssub_5
9462 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9463 0, // ssub_2_ssub_3_ssub_6_ssub_7
9464 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9465 0, // ssub_2_ssub_3_ssub_4_ssub_5
9466 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9467 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9468 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9469 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9470 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9471 0, // ssub_4_ssub_5_ssub_8_ssub_9
9472 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9473 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9474 0, // ssub_6_ssub_7_dsub_5
9475 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9476 0, // ssub_6_ssub_7_dsub_5_dsub_7
9477 0, // ssub_6_ssub_7_ssub_8_ssub_9
9478 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9479 0, // ssub_8_ssub_9_ssub_12_ssub_13
9480 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9481 0, // dsub_5_dsub_7
9482 0, // dsub_5_ssub_12_ssub_13_dsub_7
9483 0, // dsub_5_ssub_12_ssub_13
9484 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9485 },
9486 { // GPR
9487 0, // dsub_0
9488 0, // dsub_1
9489 0, // dsub_2
9490 0, // dsub_3
9491 0, // dsub_4
9492 0, // dsub_5
9493 0, // dsub_6
9494 0, // dsub_7
9495 0, // gsub_0
9496 0, // gsub_1
9497 0, // qqsub_0
9498 0, // qqsub_1
9499 0, // qsub_0
9500 0, // qsub_1
9501 0, // qsub_2
9502 0, // qsub_3
9503 0, // ssub_0
9504 0, // ssub_1
9505 0, // ssub_2
9506 0, // ssub_3
9507 0, // ssub_4
9508 0, // ssub_5
9509 0, // ssub_6
9510 0, // ssub_7
9511 0, // ssub_8
9512 0, // ssub_9
9513 0, // ssub_10
9514 0, // ssub_11
9515 0, // ssub_12
9516 0, // ssub_13
9517 0, // ssub_14
9518 0, // ssub_15
9519 0, // ssub_0_ssub_1_ssub_4_ssub_5
9520 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9521 0, // ssub_2_ssub_3_ssub_6_ssub_7
9522 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9523 0, // ssub_2_ssub_3_ssub_4_ssub_5
9524 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9525 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9526 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9527 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9528 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9529 0, // ssub_4_ssub_5_ssub_8_ssub_9
9530 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9531 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9532 0, // ssub_6_ssub_7_dsub_5
9533 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9534 0, // ssub_6_ssub_7_dsub_5_dsub_7
9535 0, // ssub_6_ssub_7_ssub_8_ssub_9
9536 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9537 0, // ssub_8_ssub_9_ssub_12_ssub_13
9538 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9539 0, // dsub_5_dsub_7
9540 0, // dsub_5_ssub_12_ssub_13_dsub_7
9541 0, // dsub_5_ssub_12_ssub_13
9542 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9543 },
9544 { // GPRwithAPSR
9545 0, // dsub_0
9546 0, // dsub_1
9547 0, // dsub_2
9548 0, // dsub_3
9549 0, // dsub_4
9550 0, // dsub_5
9551 0, // dsub_6
9552 0, // dsub_7
9553 0, // gsub_0
9554 0, // gsub_1
9555 0, // qqsub_0
9556 0, // qqsub_1
9557 0, // qsub_0
9558 0, // qsub_1
9559 0, // qsub_2
9560 0, // qsub_3
9561 0, // ssub_0
9562 0, // ssub_1
9563 0, // ssub_2
9564 0, // ssub_3
9565 0, // ssub_4
9566 0, // ssub_5
9567 0, // ssub_6
9568 0, // ssub_7
9569 0, // ssub_8
9570 0, // ssub_9
9571 0, // ssub_10
9572 0, // ssub_11
9573 0, // ssub_12
9574 0, // ssub_13
9575 0, // ssub_14
9576 0, // ssub_15
9577 0, // ssub_0_ssub_1_ssub_4_ssub_5
9578 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9579 0, // ssub_2_ssub_3_ssub_6_ssub_7
9580 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9581 0, // ssub_2_ssub_3_ssub_4_ssub_5
9582 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9583 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9584 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9585 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9586 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9587 0, // ssub_4_ssub_5_ssub_8_ssub_9
9588 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9589 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9590 0, // ssub_6_ssub_7_dsub_5
9591 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9592 0, // ssub_6_ssub_7_dsub_5_dsub_7
9593 0, // ssub_6_ssub_7_ssub_8_ssub_9
9594 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9595 0, // ssub_8_ssub_9_ssub_12_ssub_13
9596 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9597 0, // dsub_5_dsub_7
9598 0, // dsub_5_ssub_12_ssub_13_dsub_7
9599 0, // dsub_5_ssub_12_ssub_13
9600 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9601 },
9602 { // GPRwithZR
9603 0, // dsub_0
9604 0, // dsub_1
9605 0, // dsub_2
9606 0, // dsub_3
9607 0, // dsub_4
9608 0, // dsub_5
9609 0, // dsub_6
9610 0, // dsub_7
9611 0, // gsub_0
9612 0, // gsub_1
9613 0, // qqsub_0
9614 0, // qqsub_1
9615 0, // qsub_0
9616 0, // qsub_1
9617 0, // qsub_2
9618 0, // qsub_3
9619 0, // ssub_0
9620 0, // ssub_1
9621 0, // ssub_2
9622 0, // ssub_3
9623 0, // ssub_4
9624 0, // ssub_5
9625 0, // ssub_6
9626 0, // ssub_7
9627 0, // ssub_8
9628 0, // ssub_9
9629 0, // ssub_10
9630 0, // ssub_11
9631 0, // ssub_12
9632 0, // ssub_13
9633 0, // ssub_14
9634 0, // ssub_15
9635 0, // ssub_0_ssub_1_ssub_4_ssub_5
9636 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9637 0, // ssub_2_ssub_3_ssub_6_ssub_7
9638 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9639 0, // ssub_2_ssub_3_ssub_4_ssub_5
9640 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9641 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9642 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9643 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9644 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9645 0, // ssub_4_ssub_5_ssub_8_ssub_9
9646 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9647 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9648 0, // ssub_6_ssub_7_dsub_5
9649 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9650 0, // ssub_6_ssub_7_dsub_5_dsub_7
9651 0, // ssub_6_ssub_7_ssub_8_ssub_9
9652 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9653 0, // ssub_8_ssub_9_ssub_12_ssub_13
9654 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9655 0, // dsub_5_dsub_7
9656 0, // dsub_5_ssub_12_ssub_13_dsub_7
9657 0, // dsub_5_ssub_12_ssub_13
9658 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9659 },
9660 { // SPR_8
9661 0, // dsub_0
9662 0, // dsub_1
9663 0, // dsub_2
9664 0, // dsub_3
9665 0, // dsub_4
9666 0, // dsub_5
9667 0, // dsub_6
9668 0, // dsub_7
9669 0, // gsub_0
9670 0, // gsub_1
9671 0, // qqsub_0
9672 0, // qqsub_1
9673 0, // qsub_0
9674 0, // qsub_1
9675 0, // qsub_2
9676 0, // qsub_3
9677 0, // ssub_0
9678 0, // ssub_1
9679 0, // ssub_2
9680 0, // ssub_3
9681 0, // ssub_4
9682 0, // ssub_5
9683 0, // ssub_6
9684 0, // ssub_7
9685 0, // ssub_8
9686 0, // ssub_9
9687 0, // ssub_10
9688 0, // ssub_11
9689 0, // ssub_12
9690 0, // ssub_13
9691 0, // ssub_14
9692 0, // ssub_15
9693 0, // ssub_0_ssub_1_ssub_4_ssub_5
9694 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9695 0, // ssub_2_ssub_3_ssub_6_ssub_7
9696 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9697 0, // ssub_2_ssub_3_ssub_4_ssub_5
9698 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9699 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9700 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9701 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9702 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9703 0, // ssub_4_ssub_5_ssub_8_ssub_9
9704 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9705 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9706 0, // ssub_6_ssub_7_dsub_5
9707 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9708 0, // ssub_6_ssub_7_dsub_5_dsub_7
9709 0, // ssub_6_ssub_7_ssub_8_ssub_9
9710 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9711 0, // ssub_8_ssub_9_ssub_12_ssub_13
9712 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9713 0, // dsub_5_dsub_7
9714 0, // dsub_5_ssub_12_ssub_13_dsub_7
9715 0, // dsub_5_ssub_12_ssub_13
9716 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9717 },
9718 { // GPRnopc
9719 0, // dsub_0
9720 0, // dsub_1
9721 0, // dsub_2
9722 0, // dsub_3
9723 0, // dsub_4
9724 0, // dsub_5
9725 0, // dsub_6
9726 0, // dsub_7
9727 0, // gsub_0
9728 0, // gsub_1
9729 0, // qqsub_0
9730 0, // qqsub_1
9731 0, // qsub_0
9732 0, // qsub_1
9733 0, // qsub_2
9734 0, // qsub_3
9735 0, // ssub_0
9736 0, // ssub_1
9737 0, // ssub_2
9738 0, // ssub_3
9739 0, // ssub_4
9740 0, // ssub_5
9741 0, // ssub_6
9742 0, // ssub_7
9743 0, // ssub_8
9744 0, // ssub_9
9745 0, // ssub_10
9746 0, // ssub_11
9747 0, // ssub_12
9748 0, // ssub_13
9749 0, // ssub_14
9750 0, // ssub_15
9751 0, // ssub_0_ssub_1_ssub_4_ssub_5
9752 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9753 0, // ssub_2_ssub_3_ssub_6_ssub_7
9754 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9755 0, // ssub_2_ssub_3_ssub_4_ssub_5
9756 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9757 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9758 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9759 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9760 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9761 0, // ssub_4_ssub_5_ssub_8_ssub_9
9762 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9763 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9764 0, // ssub_6_ssub_7_dsub_5
9765 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9766 0, // ssub_6_ssub_7_dsub_5_dsub_7
9767 0, // ssub_6_ssub_7_ssub_8_ssub_9
9768 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9769 0, // ssub_8_ssub_9_ssub_12_ssub_13
9770 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9771 0, // dsub_5_dsub_7
9772 0, // dsub_5_ssub_12_ssub_13_dsub_7
9773 0, // dsub_5_ssub_12_ssub_13
9774 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9775 },
9776 { // GPRnosp
9777 0, // dsub_0
9778 0, // dsub_1
9779 0, // dsub_2
9780 0, // dsub_3
9781 0, // dsub_4
9782 0, // dsub_5
9783 0, // dsub_6
9784 0, // dsub_7
9785 0, // gsub_0
9786 0, // gsub_1
9787 0, // qqsub_0
9788 0, // qqsub_1
9789 0, // qsub_0
9790 0, // qsub_1
9791 0, // qsub_2
9792 0, // qsub_3
9793 0, // ssub_0
9794 0, // ssub_1
9795 0, // ssub_2
9796 0, // ssub_3
9797 0, // ssub_4
9798 0, // ssub_5
9799 0, // ssub_6
9800 0, // ssub_7
9801 0, // ssub_8
9802 0, // ssub_9
9803 0, // ssub_10
9804 0, // ssub_11
9805 0, // ssub_12
9806 0, // ssub_13
9807 0, // ssub_14
9808 0, // ssub_15
9809 0, // ssub_0_ssub_1_ssub_4_ssub_5
9810 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9811 0, // ssub_2_ssub_3_ssub_6_ssub_7
9812 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9813 0, // ssub_2_ssub_3_ssub_4_ssub_5
9814 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9815 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9816 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9817 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9818 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9819 0, // ssub_4_ssub_5_ssub_8_ssub_9
9820 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9821 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9822 0, // ssub_6_ssub_7_dsub_5
9823 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9824 0, // ssub_6_ssub_7_dsub_5_dsub_7
9825 0, // ssub_6_ssub_7_ssub_8_ssub_9
9826 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9827 0, // ssub_8_ssub_9_ssub_12_ssub_13
9828 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9829 0, // dsub_5_dsub_7
9830 0, // dsub_5_ssub_12_ssub_13_dsub_7
9831 0, // dsub_5_ssub_12_ssub_13
9832 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9833 },
9834 { // GPRwithAPSR_NZCVnosp
9835 0, // dsub_0
9836 0, // dsub_1
9837 0, // dsub_2
9838 0, // dsub_3
9839 0, // dsub_4
9840 0, // dsub_5
9841 0, // dsub_6
9842 0, // dsub_7
9843 0, // gsub_0
9844 0, // gsub_1
9845 0, // qqsub_0
9846 0, // qqsub_1
9847 0, // qsub_0
9848 0, // qsub_1
9849 0, // qsub_2
9850 0, // qsub_3
9851 0, // ssub_0
9852 0, // ssub_1
9853 0, // ssub_2
9854 0, // ssub_3
9855 0, // ssub_4
9856 0, // ssub_5
9857 0, // ssub_6
9858 0, // ssub_7
9859 0, // ssub_8
9860 0, // ssub_9
9861 0, // ssub_10
9862 0, // ssub_11
9863 0, // ssub_12
9864 0, // ssub_13
9865 0, // ssub_14
9866 0, // ssub_15
9867 0, // ssub_0_ssub_1_ssub_4_ssub_5
9868 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9869 0, // ssub_2_ssub_3_ssub_6_ssub_7
9870 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9871 0, // ssub_2_ssub_3_ssub_4_ssub_5
9872 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9873 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9874 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9875 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9876 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9877 0, // ssub_4_ssub_5_ssub_8_ssub_9
9878 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9879 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9880 0, // ssub_6_ssub_7_dsub_5
9881 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9882 0, // ssub_6_ssub_7_dsub_5_dsub_7
9883 0, // ssub_6_ssub_7_ssub_8_ssub_9
9884 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9885 0, // ssub_8_ssub_9_ssub_12_ssub_13
9886 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9887 0, // dsub_5_dsub_7
9888 0, // dsub_5_ssub_12_ssub_13_dsub_7
9889 0, // dsub_5_ssub_12_ssub_13
9890 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9891 },
9892 { // GPRwithAPSRnosp
9893 0, // dsub_0
9894 0, // dsub_1
9895 0, // dsub_2
9896 0, // dsub_3
9897 0, // dsub_4
9898 0, // dsub_5
9899 0, // dsub_6
9900 0, // dsub_7
9901 0, // gsub_0
9902 0, // gsub_1
9903 0, // qqsub_0
9904 0, // qqsub_1
9905 0, // qsub_0
9906 0, // qsub_1
9907 0, // qsub_2
9908 0, // qsub_3
9909 0, // ssub_0
9910 0, // ssub_1
9911 0, // ssub_2
9912 0, // ssub_3
9913 0, // ssub_4
9914 0, // ssub_5
9915 0, // ssub_6
9916 0, // ssub_7
9917 0, // ssub_8
9918 0, // ssub_9
9919 0, // ssub_10
9920 0, // ssub_11
9921 0, // ssub_12
9922 0, // ssub_13
9923 0, // ssub_14
9924 0, // ssub_15
9925 0, // ssub_0_ssub_1_ssub_4_ssub_5
9926 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9927 0, // ssub_2_ssub_3_ssub_6_ssub_7
9928 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9929 0, // ssub_2_ssub_3_ssub_4_ssub_5
9930 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9931 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9932 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9933 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9934 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9935 0, // ssub_4_ssub_5_ssub_8_ssub_9
9936 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9937 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9938 0, // ssub_6_ssub_7_dsub_5
9939 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9940 0, // ssub_6_ssub_7_dsub_5_dsub_7
9941 0, // ssub_6_ssub_7_ssub_8_ssub_9
9942 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9943 0, // ssub_8_ssub_9_ssub_12_ssub_13
9944 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
9945 0, // dsub_5_dsub_7
9946 0, // dsub_5_ssub_12_ssub_13_dsub_7
9947 0, // dsub_5_ssub_12_ssub_13
9948 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
9949 },
9950 { // GPRwithZRnosp
9951 0, // dsub_0
9952 0, // dsub_1
9953 0, // dsub_2
9954 0, // dsub_3
9955 0, // dsub_4
9956 0, // dsub_5
9957 0, // dsub_6
9958 0, // dsub_7
9959 0, // gsub_0
9960 0, // gsub_1
9961 0, // qqsub_0
9962 0, // qqsub_1
9963 0, // qsub_0
9964 0, // qsub_1
9965 0, // qsub_2
9966 0, // qsub_3
9967 0, // ssub_0
9968 0, // ssub_1
9969 0, // ssub_2
9970 0, // ssub_3
9971 0, // ssub_4
9972 0, // ssub_5
9973 0, // ssub_6
9974 0, // ssub_7
9975 0, // ssub_8
9976 0, // ssub_9
9977 0, // ssub_10
9978 0, // ssub_11
9979 0, // ssub_12
9980 0, // ssub_13
9981 0, // ssub_14
9982 0, // ssub_15
9983 0, // ssub_0_ssub_1_ssub_4_ssub_5
9984 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
9985 0, // ssub_2_ssub_3_ssub_6_ssub_7
9986 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
9987 0, // ssub_2_ssub_3_ssub_4_ssub_5
9988 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
9989 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9990 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
9991 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
9992 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9993 0, // ssub_4_ssub_5_ssub_8_ssub_9
9994 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
9995 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
9996 0, // ssub_6_ssub_7_dsub_5
9997 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
9998 0, // ssub_6_ssub_7_dsub_5_dsub_7
9999 0, // ssub_6_ssub_7_ssub_8_ssub_9
10000 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10001 0, // ssub_8_ssub_9_ssub_12_ssub_13
10002 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10003 0, // dsub_5_dsub_7
10004 0, // dsub_5_ssub_12_ssub_13_dsub_7
10005 0, // dsub_5_ssub_12_ssub_13
10006 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10007 },
10008 { // GPRnoip
10009 0, // dsub_0
10010 0, // dsub_1
10011 0, // dsub_2
10012 0, // dsub_3
10013 0, // dsub_4
10014 0, // dsub_5
10015 0, // dsub_6
10016 0, // dsub_7
10017 0, // gsub_0
10018 0, // gsub_1
10019 0, // qqsub_0
10020 0, // qqsub_1
10021 0, // qsub_0
10022 0, // qsub_1
10023 0, // qsub_2
10024 0, // qsub_3
10025 0, // ssub_0
10026 0, // ssub_1
10027 0, // ssub_2
10028 0, // ssub_3
10029 0, // ssub_4
10030 0, // ssub_5
10031 0, // ssub_6
10032 0, // ssub_7
10033 0, // ssub_8
10034 0, // ssub_9
10035 0, // ssub_10
10036 0, // ssub_11
10037 0, // ssub_12
10038 0, // ssub_13
10039 0, // ssub_14
10040 0, // ssub_15
10041 0, // ssub_0_ssub_1_ssub_4_ssub_5
10042 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10043 0, // ssub_2_ssub_3_ssub_6_ssub_7
10044 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10045 0, // ssub_2_ssub_3_ssub_4_ssub_5
10046 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10047 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10048 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10049 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10050 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10051 0, // ssub_4_ssub_5_ssub_8_ssub_9
10052 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10053 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10054 0, // ssub_6_ssub_7_dsub_5
10055 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10056 0, // ssub_6_ssub_7_dsub_5_dsub_7
10057 0, // ssub_6_ssub_7_ssub_8_ssub_9
10058 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10059 0, // ssub_8_ssub_9_ssub_12_ssub_13
10060 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10061 0, // dsub_5_dsub_7
10062 0, // dsub_5_ssub_12_ssub_13_dsub_7
10063 0, // dsub_5_ssub_12_ssub_13
10064 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10065 },
10066 { // rGPR
10067 0, // dsub_0
10068 0, // dsub_1
10069 0, // dsub_2
10070 0, // dsub_3
10071 0, // dsub_4
10072 0, // dsub_5
10073 0, // dsub_6
10074 0, // dsub_7
10075 0, // gsub_0
10076 0, // gsub_1
10077 0, // qqsub_0
10078 0, // qqsub_1
10079 0, // qsub_0
10080 0, // qsub_1
10081 0, // qsub_2
10082 0, // qsub_3
10083 0, // ssub_0
10084 0, // ssub_1
10085 0, // ssub_2
10086 0, // ssub_3
10087 0, // ssub_4
10088 0, // ssub_5
10089 0, // ssub_6
10090 0, // ssub_7
10091 0, // ssub_8
10092 0, // ssub_9
10093 0, // ssub_10
10094 0, // ssub_11
10095 0, // ssub_12
10096 0, // ssub_13
10097 0, // ssub_14
10098 0, // ssub_15
10099 0, // ssub_0_ssub_1_ssub_4_ssub_5
10100 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10101 0, // ssub_2_ssub_3_ssub_6_ssub_7
10102 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10103 0, // ssub_2_ssub_3_ssub_4_ssub_5
10104 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10105 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10106 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10107 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10108 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10109 0, // ssub_4_ssub_5_ssub_8_ssub_9
10110 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10111 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10112 0, // ssub_6_ssub_7_dsub_5
10113 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10114 0, // ssub_6_ssub_7_dsub_5_dsub_7
10115 0, // ssub_6_ssub_7_ssub_8_ssub_9
10116 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10117 0, // ssub_8_ssub_9_ssub_12_ssub_13
10118 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10119 0, // dsub_5_dsub_7
10120 0, // dsub_5_ssub_12_ssub_13_dsub_7
10121 0, // dsub_5_ssub_12_ssub_13
10122 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10123 },
10124 { // GPRnoip_and_GPRnopc
10125 0, // dsub_0
10126 0, // dsub_1
10127 0, // dsub_2
10128 0, // dsub_3
10129 0, // dsub_4
10130 0, // dsub_5
10131 0, // dsub_6
10132 0, // dsub_7
10133 0, // gsub_0
10134 0, // gsub_1
10135 0, // qqsub_0
10136 0, // qqsub_1
10137 0, // qsub_0
10138 0, // qsub_1
10139 0, // qsub_2
10140 0, // qsub_3
10141 0, // ssub_0
10142 0, // ssub_1
10143 0, // ssub_2
10144 0, // ssub_3
10145 0, // ssub_4
10146 0, // ssub_5
10147 0, // ssub_6
10148 0, // ssub_7
10149 0, // ssub_8
10150 0, // ssub_9
10151 0, // ssub_10
10152 0, // ssub_11
10153 0, // ssub_12
10154 0, // ssub_13
10155 0, // ssub_14
10156 0, // ssub_15
10157 0, // ssub_0_ssub_1_ssub_4_ssub_5
10158 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10159 0, // ssub_2_ssub_3_ssub_6_ssub_7
10160 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10161 0, // ssub_2_ssub_3_ssub_4_ssub_5
10162 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10163 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10164 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10165 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10166 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10167 0, // ssub_4_ssub_5_ssub_8_ssub_9
10168 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10169 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10170 0, // ssub_6_ssub_7_dsub_5
10171 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10172 0, // ssub_6_ssub_7_dsub_5_dsub_7
10173 0, // ssub_6_ssub_7_ssub_8_ssub_9
10174 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10175 0, // ssub_8_ssub_9_ssub_12_ssub_13
10176 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10177 0, // dsub_5_dsub_7
10178 0, // dsub_5_ssub_12_ssub_13_dsub_7
10179 0, // dsub_5_ssub_12_ssub_13
10180 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10181 },
10182 { // GPRnoip_and_GPRnosp
10183 0, // dsub_0
10184 0, // dsub_1
10185 0, // dsub_2
10186 0, // dsub_3
10187 0, // dsub_4
10188 0, // dsub_5
10189 0, // dsub_6
10190 0, // dsub_7
10191 0, // gsub_0
10192 0, // gsub_1
10193 0, // qqsub_0
10194 0, // qqsub_1
10195 0, // qsub_0
10196 0, // qsub_1
10197 0, // qsub_2
10198 0, // qsub_3
10199 0, // ssub_0
10200 0, // ssub_1
10201 0, // ssub_2
10202 0, // ssub_3
10203 0, // ssub_4
10204 0, // ssub_5
10205 0, // ssub_6
10206 0, // ssub_7
10207 0, // ssub_8
10208 0, // ssub_9
10209 0, // ssub_10
10210 0, // ssub_11
10211 0, // ssub_12
10212 0, // ssub_13
10213 0, // ssub_14
10214 0, // ssub_15
10215 0, // ssub_0_ssub_1_ssub_4_ssub_5
10216 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10217 0, // ssub_2_ssub_3_ssub_6_ssub_7
10218 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10219 0, // ssub_2_ssub_3_ssub_4_ssub_5
10220 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10221 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10222 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10223 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10224 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10225 0, // ssub_4_ssub_5_ssub_8_ssub_9
10226 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10227 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10228 0, // ssub_6_ssub_7_dsub_5
10229 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10230 0, // ssub_6_ssub_7_dsub_5_dsub_7
10231 0, // ssub_6_ssub_7_ssub_8_ssub_9
10232 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10233 0, // ssub_8_ssub_9_ssub_12_ssub_13
10234 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10235 0, // dsub_5_dsub_7
10236 0, // dsub_5_ssub_12_ssub_13_dsub_7
10237 0, // dsub_5_ssub_12_ssub_13
10238 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10239 },
10240 { // GPRnoip_and_GPRwithAPSR_NZCVnosp
10241 0, // dsub_0
10242 0, // dsub_1
10243 0, // dsub_2
10244 0, // dsub_3
10245 0, // dsub_4
10246 0, // dsub_5
10247 0, // dsub_6
10248 0, // dsub_7
10249 0, // gsub_0
10250 0, // gsub_1
10251 0, // qqsub_0
10252 0, // qqsub_1
10253 0, // qsub_0
10254 0, // qsub_1
10255 0, // qsub_2
10256 0, // qsub_3
10257 0, // ssub_0
10258 0, // ssub_1
10259 0, // ssub_2
10260 0, // ssub_3
10261 0, // ssub_4
10262 0, // ssub_5
10263 0, // ssub_6
10264 0, // ssub_7
10265 0, // ssub_8
10266 0, // ssub_9
10267 0, // ssub_10
10268 0, // ssub_11
10269 0, // ssub_12
10270 0, // ssub_13
10271 0, // ssub_14
10272 0, // ssub_15
10273 0, // ssub_0_ssub_1_ssub_4_ssub_5
10274 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10275 0, // ssub_2_ssub_3_ssub_6_ssub_7
10276 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10277 0, // ssub_2_ssub_3_ssub_4_ssub_5
10278 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10279 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10280 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10281 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10282 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10283 0, // ssub_4_ssub_5_ssub_8_ssub_9
10284 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10285 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10286 0, // ssub_6_ssub_7_dsub_5
10287 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10288 0, // ssub_6_ssub_7_dsub_5_dsub_7
10289 0, // ssub_6_ssub_7_ssub_8_ssub_9
10290 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10291 0, // ssub_8_ssub_9_ssub_12_ssub_13
10292 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10293 0, // dsub_5_dsub_7
10294 0, // dsub_5_ssub_12_ssub_13_dsub_7
10295 0, // dsub_5_ssub_12_ssub_13
10296 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10297 },
10298 { // tGPRwithpc
10299 0, // dsub_0
10300 0, // dsub_1
10301 0, // dsub_2
10302 0, // dsub_3
10303 0, // dsub_4
10304 0, // dsub_5
10305 0, // dsub_6
10306 0, // dsub_7
10307 0, // gsub_0
10308 0, // gsub_1
10309 0, // qqsub_0
10310 0, // qqsub_1
10311 0, // qsub_0
10312 0, // qsub_1
10313 0, // qsub_2
10314 0, // qsub_3
10315 0, // ssub_0
10316 0, // ssub_1
10317 0, // ssub_2
10318 0, // ssub_3
10319 0, // ssub_4
10320 0, // ssub_5
10321 0, // ssub_6
10322 0, // ssub_7
10323 0, // ssub_8
10324 0, // ssub_9
10325 0, // ssub_10
10326 0, // ssub_11
10327 0, // ssub_12
10328 0, // ssub_13
10329 0, // ssub_14
10330 0, // ssub_15
10331 0, // ssub_0_ssub_1_ssub_4_ssub_5
10332 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10333 0, // ssub_2_ssub_3_ssub_6_ssub_7
10334 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10335 0, // ssub_2_ssub_3_ssub_4_ssub_5
10336 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10337 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10338 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10339 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10340 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10341 0, // ssub_4_ssub_5_ssub_8_ssub_9
10342 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10343 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10344 0, // ssub_6_ssub_7_dsub_5
10345 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10346 0, // ssub_6_ssub_7_dsub_5_dsub_7
10347 0, // ssub_6_ssub_7_ssub_8_ssub_9
10348 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10349 0, // ssub_8_ssub_9_ssub_12_ssub_13
10350 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10351 0, // dsub_5_dsub_7
10352 0, // dsub_5_ssub_12_ssub_13_dsub_7
10353 0, // dsub_5_ssub_12_ssub_13
10354 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10355 },
10356 { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
10357 0, // dsub_0
10358 0, // dsub_1
10359 0, // dsub_2
10360 0, // dsub_3
10361 0, // dsub_4
10362 0, // dsub_5
10363 0, // dsub_6
10364 0, // dsub_7
10365 0, // gsub_0
10366 0, // gsub_1
10367 0, // qqsub_0
10368 0, // qqsub_1
10369 0, // qsub_0
10370 0, // qsub_1
10371 0, // qsub_2
10372 0, // qsub_3
10373 20, // ssub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
10374 20, // ssub_1 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
10375 0, // ssub_2
10376 0, // ssub_3
10377 0, // ssub_4
10378 0, // ssub_5
10379 0, // ssub_6
10380 0, // ssub_7
10381 0, // ssub_8
10382 0, // ssub_9
10383 0, // ssub_10
10384 0, // ssub_11
10385 0, // ssub_12
10386 0, // ssub_13
10387 0, // ssub_14
10388 0, // ssub_15
10389 0, // ssub_0_ssub_1_ssub_4_ssub_5
10390 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10391 0, // ssub_2_ssub_3_ssub_6_ssub_7
10392 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10393 0, // ssub_2_ssub_3_ssub_4_ssub_5
10394 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10395 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10396 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10397 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10398 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10399 0, // ssub_4_ssub_5_ssub_8_ssub_9
10400 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10401 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10402 0, // ssub_6_ssub_7_dsub_5
10403 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10404 0, // ssub_6_ssub_7_dsub_5_dsub_7
10405 0, // ssub_6_ssub_7_ssub_8_ssub_9
10406 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10407 0, // ssub_8_ssub_9_ssub_12_ssub_13
10408 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10409 0, // dsub_5_dsub_7
10410 0, // dsub_5_ssub_12_ssub_13_dsub_7
10411 0, // dsub_5_ssub_12_ssub_13
10412 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10413 },
10414 { // hGPR
10415 0, // dsub_0
10416 0, // dsub_1
10417 0, // dsub_2
10418 0, // dsub_3
10419 0, // dsub_4
10420 0, // dsub_5
10421 0, // dsub_6
10422 0, // dsub_7
10423 0, // gsub_0
10424 0, // gsub_1
10425 0, // qqsub_0
10426 0, // qqsub_1
10427 0, // qsub_0
10428 0, // qsub_1
10429 0, // qsub_2
10430 0, // qsub_3
10431 0, // ssub_0
10432 0, // ssub_1
10433 0, // ssub_2
10434 0, // ssub_3
10435 0, // ssub_4
10436 0, // ssub_5
10437 0, // ssub_6
10438 0, // ssub_7
10439 0, // ssub_8
10440 0, // ssub_9
10441 0, // ssub_10
10442 0, // ssub_11
10443 0, // ssub_12
10444 0, // ssub_13
10445 0, // ssub_14
10446 0, // ssub_15
10447 0, // ssub_0_ssub_1_ssub_4_ssub_5
10448 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10449 0, // ssub_2_ssub_3_ssub_6_ssub_7
10450 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10451 0, // ssub_2_ssub_3_ssub_4_ssub_5
10452 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10453 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10454 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10455 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10456 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10457 0, // ssub_4_ssub_5_ssub_8_ssub_9
10458 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10459 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10460 0, // ssub_6_ssub_7_dsub_5
10461 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10462 0, // ssub_6_ssub_7_dsub_5_dsub_7
10463 0, // ssub_6_ssub_7_ssub_8_ssub_9
10464 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10465 0, // ssub_8_ssub_9_ssub_12_ssub_13
10466 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10467 0, // dsub_5_dsub_7
10468 0, // dsub_5_ssub_12_ssub_13_dsub_7
10469 0, // dsub_5_ssub_12_ssub_13
10470 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10471 },
10472 { // tGPR
10473 0, // dsub_0
10474 0, // dsub_1
10475 0, // dsub_2
10476 0, // dsub_3
10477 0, // dsub_4
10478 0, // dsub_5
10479 0, // dsub_6
10480 0, // dsub_7
10481 0, // gsub_0
10482 0, // gsub_1
10483 0, // qqsub_0
10484 0, // qqsub_1
10485 0, // qsub_0
10486 0, // qsub_1
10487 0, // qsub_2
10488 0, // qsub_3
10489 0, // ssub_0
10490 0, // ssub_1
10491 0, // ssub_2
10492 0, // ssub_3
10493 0, // ssub_4
10494 0, // ssub_5
10495 0, // ssub_6
10496 0, // ssub_7
10497 0, // ssub_8
10498 0, // ssub_9
10499 0, // ssub_10
10500 0, // ssub_11
10501 0, // ssub_12
10502 0, // ssub_13
10503 0, // ssub_14
10504 0, // ssub_15
10505 0, // ssub_0_ssub_1_ssub_4_ssub_5
10506 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10507 0, // ssub_2_ssub_3_ssub_6_ssub_7
10508 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10509 0, // ssub_2_ssub_3_ssub_4_ssub_5
10510 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10511 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10512 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10513 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10514 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10515 0, // ssub_4_ssub_5_ssub_8_ssub_9
10516 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10517 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10518 0, // ssub_6_ssub_7_dsub_5
10519 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10520 0, // ssub_6_ssub_7_dsub_5_dsub_7
10521 0, // ssub_6_ssub_7_ssub_8_ssub_9
10522 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10523 0, // ssub_8_ssub_9_ssub_12_ssub_13
10524 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10525 0, // dsub_5_dsub_7
10526 0, // dsub_5_ssub_12_ssub_13_dsub_7
10527 0, // dsub_5_ssub_12_ssub_13
10528 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10529 },
10530 { // tGPREven
10531 0, // dsub_0
10532 0, // dsub_1
10533 0, // dsub_2
10534 0, // dsub_3
10535 0, // dsub_4
10536 0, // dsub_5
10537 0, // dsub_6
10538 0, // dsub_7
10539 0, // gsub_0
10540 0, // gsub_1
10541 0, // qqsub_0
10542 0, // qqsub_1
10543 0, // qsub_0
10544 0, // qsub_1
10545 0, // qsub_2
10546 0, // qsub_3
10547 0, // ssub_0
10548 0, // ssub_1
10549 0, // ssub_2
10550 0, // ssub_3
10551 0, // ssub_4
10552 0, // ssub_5
10553 0, // ssub_6
10554 0, // ssub_7
10555 0, // ssub_8
10556 0, // ssub_9
10557 0, // ssub_10
10558 0, // ssub_11
10559 0, // ssub_12
10560 0, // ssub_13
10561 0, // ssub_14
10562 0, // ssub_15
10563 0, // ssub_0_ssub_1_ssub_4_ssub_5
10564 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10565 0, // ssub_2_ssub_3_ssub_6_ssub_7
10566 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10567 0, // ssub_2_ssub_3_ssub_4_ssub_5
10568 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10569 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10570 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10571 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10572 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10573 0, // ssub_4_ssub_5_ssub_8_ssub_9
10574 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10575 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10576 0, // ssub_6_ssub_7_dsub_5
10577 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10578 0, // ssub_6_ssub_7_dsub_5_dsub_7
10579 0, // ssub_6_ssub_7_ssub_8_ssub_9
10580 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10581 0, // ssub_8_ssub_9_ssub_12_ssub_13
10582 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10583 0, // dsub_5_dsub_7
10584 0, // dsub_5_ssub_12_ssub_13_dsub_7
10585 0, // dsub_5_ssub_12_ssub_13
10586 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10587 },
10588 { // GPRnopc_and_hGPR
10589 0, // dsub_0
10590 0, // dsub_1
10591 0, // dsub_2
10592 0, // dsub_3
10593 0, // dsub_4
10594 0, // dsub_5
10595 0, // dsub_6
10596 0, // dsub_7
10597 0, // gsub_0
10598 0, // gsub_1
10599 0, // qqsub_0
10600 0, // qqsub_1
10601 0, // qsub_0
10602 0, // qsub_1
10603 0, // qsub_2
10604 0, // qsub_3
10605 0, // ssub_0
10606 0, // ssub_1
10607 0, // ssub_2
10608 0, // ssub_3
10609 0, // ssub_4
10610 0, // ssub_5
10611 0, // ssub_6
10612 0, // ssub_7
10613 0, // ssub_8
10614 0, // ssub_9
10615 0, // ssub_10
10616 0, // ssub_11
10617 0, // ssub_12
10618 0, // ssub_13
10619 0, // ssub_14
10620 0, // ssub_15
10621 0, // ssub_0_ssub_1_ssub_4_ssub_5
10622 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10623 0, // ssub_2_ssub_3_ssub_6_ssub_7
10624 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10625 0, // ssub_2_ssub_3_ssub_4_ssub_5
10626 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10627 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10628 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10629 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10630 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10631 0, // ssub_4_ssub_5_ssub_8_ssub_9
10632 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10633 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10634 0, // ssub_6_ssub_7_dsub_5
10635 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10636 0, // ssub_6_ssub_7_dsub_5_dsub_7
10637 0, // ssub_6_ssub_7_ssub_8_ssub_9
10638 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10639 0, // ssub_8_ssub_9_ssub_12_ssub_13
10640 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10641 0, // dsub_5_dsub_7
10642 0, // dsub_5_ssub_12_ssub_13_dsub_7
10643 0, // dsub_5_ssub_12_ssub_13
10644 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10645 },
10646 { // GPRnosp_and_hGPR
10647 0, // dsub_0
10648 0, // dsub_1
10649 0, // dsub_2
10650 0, // dsub_3
10651 0, // dsub_4
10652 0, // dsub_5
10653 0, // dsub_6
10654 0, // dsub_7
10655 0, // gsub_0
10656 0, // gsub_1
10657 0, // qqsub_0
10658 0, // qqsub_1
10659 0, // qsub_0
10660 0, // qsub_1
10661 0, // qsub_2
10662 0, // qsub_3
10663 0, // ssub_0
10664 0, // ssub_1
10665 0, // ssub_2
10666 0, // ssub_3
10667 0, // ssub_4
10668 0, // ssub_5
10669 0, // ssub_6
10670 0, // ssub_7
10671 0, // ssub_8
10672 0, // ssub_9
10673 0, // ssub_10
10674 0, // ssub_11
10675 0, // ssub_12
10676 0, // ssub_13
10677 0, // ssub_14
10678 0, // ssub_15
10679 0, // ssub_0_ssub_1_ssub_4_ssub_5
10680 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10681 0, // ssub_2_ssub_3_ssub_6_ssub_7
10682 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10683 0, // ssub_2_ssub_3_ssub_4_ssub_5
10684 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10685 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10686 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10687 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10688 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10689 0, // ssub_4_ssub_5_ssub_8_ssub_9
10690 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10691 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10692 0, // ssub_6_ssub_7_dsub_5
10693 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10694 0, // ssub_6_ssub_7_dsub_5_dsub_7
10695 0, // ssub_6_ssub_7_ssub_8_ssub_9
10696 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10697 0, // ssub_8_ssub_9_ssub_12_ssub_13
10698 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10699 0, // dsub_5_dsub_7
10700 0, // dsub_5_ssub_12_ssub_13_dsub_7
10701 0, // dsub_5_ssub_12_ssub_13
10702 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10703 },
10704 { // GPRnoip_and_hGPR
10705 0, // dsub_0
10706 0, // dsub_1
10707 0, // dsub_2
10708 0, // dsub_3
10709 0, // dsub_4
10710 0, // dsub_5
10711 0, // dsub_6
10712 0, // dsub_7
10713 0, // gsub_0
10714 0, // gsub_1
10715 0, // qqsub_0
10716 0, // qqsub_1
10717 0, // qsub_0
10718 0, // qsub_1
10719 0, // qsub_2
10720 0, // qsub_3
10721 0, // ssub_0
10722 0, // ssub_1
10723 0, // ssub_2
10724 0, // ssub_3
10725 0, // ssub_4
10726 0, // ssub_5
10727 0, // ssub_6
10728 0, // ssub_7
10729 0, // ssub_8
10730 0, // ssub_9
10731 0, // ssub_10
10732 0, // ssub_11
10733 0, // ssub_12
10734 0, // ssub_13
10735 0, // ssub_14
10736 0, // ssub_15
10737 0, // ssub_0_ssub_1_ssub_4_ssub_5
10738 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10739 0, // ssub_2_ssub_3_ssub_6_ssub_7
10740 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10741 0, // ssub_2_ssub_3_ssub_4_ssub_5
10742 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10743 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10744 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10745 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10746 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10747 0, // ssub_4_ssub_5_ssub_8_ssub_9
10748 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10749 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10750 0, // ssub_6_ssub_7_dsub_5
10751 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10752 0, // ssub_6_ssub_7_dsub_5_dsub_7
10753 0, // ssub_6_ssub_7_ssub_8_ssub_9
10754 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10755 0, // ssub_8_ssub_9_ssub_12_ssub_13
10756 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10757 0, // dsub_5_dsub_7
10758 0, // dsub_5_ssub_12_ssub_13_dsub_7
10759 0, // dsub_5_ssub_12_ssub_13
10760 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10761 },
10762 { // GPRnoip_and_tGPREven
10763 0, // dsub_0
10764 0, // dsub_1
10765 0, // dsub_2
10766 0, // dsub_3
10767 0, // dsub_4
10768 0, // dsub_5
10769 0, // dsub_6
10770 0, // dsub_7
10771 0, // gsub_0
10772 0, // gsub_1
10773 0, // qqsub_0
10774 0, // qqsub_1
10775 0, // qsub_0
10776 0, // qsub_1
10777 0, // qsub_2
10778 0, // qsub_3
10779 0, // ssub_0
10780 0, // ssub_1
10781 0, // ssub_2
10782 0, // ssub_3
10783 0, // ssub_4
10784 0, // ssub_5
10785 0, // ssub_6
10786 0, // ssub_7
10787 0, // ssub_8
10788 0, // ssub_9
10789 0, // ssub_10
10790 0, // ssub_11
10791 0, // ssub_12
10792 0, // ssub_13
10793 0, // ssub_14
10794 0, // ssub_15
10795 0, // ssub_0_ssub_1_ssub_4_ssub_5
10796 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10797 0, // ssub_2_ssub_3_ssub_6_ssub_7
10798 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10799 0, // ssub_2_ssub_3_ssub_4_ssub_5
10800 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10801 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10802 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10803 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10804 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10805 0, // ssub_4_ssub_5_ssub_8_ssub_9
10806 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10807 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10808 0, // ssub_6_ssub_7_dsub_5
10809 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10810 0, // ssub_6_ssub_7_dsub_5_dsub_7
10811 0, // ssub_6_ssub_7_ssub_8_ssub_9
10812 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10813 0, // ssub_8_ssub_9_ssub_12_ssub_13
10814 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10815 0, // dsub_5_dsub_7
10816 0, // dsub_5_ssub_12_ssub_13_dsub_7
10817 0, // dsub_5_ssub_12_ssub_13
10818 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10819 },
10820 { // GPRnosp_and_GPRnopc_and_hGPR
10821 0, // dsub_0
10822 0, // dsub_1
10823 0, // dsub_2
10824 0, // dsub_3
10825 0, // dsub_4
10826 0, // dsub_5
10827 0, // dsub_6
10828 0, // dsub_7
10829 0, // gsub_0
10830 0, // gsub_1
10831 0, // qqsub_0
10832 0, // qqsub_1
10833 0, // qsub_0
10834 0, // qsub_1
10835 0, // qsub_2
10836 0, // qsub_3
10837 0, // ssub_0
10838 0, // ssub_1
10839 0, // ssub_2
10840 0, // ssub_3
10841 0, // ssub_4
10842 0, // ssub_5
10843 0, // ssub_6
10844 0, // ssub_7
10845 0, // ssub_8
10846 0, // ssub_9
10847 0, // ssub_10
10848 0, // ssub_11
10849 0, // ssub_12
10850 0, // ssub_13
10851 0, // ssub_14
10852 0, // ssub_15
10853 0, // ssub_0_ssub_1_ssub_4_ssub_5
10854 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10855 0, // ssub_2_ssub_3_ssub_6_ssub_7
10856 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10857 0, // ssub_2_ssub_3_ssub_4_ssub_5
10858 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10859 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10860 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10861 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10862 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10863 0, // ssub_4_ssub_5_ssub_8_ssub_9
10864 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10865 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10866 0, // ssub_6_ssub_7_dsub_5
10867 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10868 0, // ssub_6_ssub_7_dsub_5_dsub_7
10869 0, // ssub_6_ssub_7_ssub_8_ssub_9
10870 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10871 0, // ssub_8_ssub_9_ssub_12_ssub_13
10872 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10873 0, // dsub_5_dsub_7
10874 0, // dsub_5_ssub_12_ssub_13_dsub_7
10875 0, // dsub_5_ssub_12_ssub_13
10876 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10877 },
10878 { // tGPROdd
10879 0, // dsub_0
10880 0, // dsub_1
10881 0, // dsub_2
10882 0, // dsub_3
10883 0, // dsub_4
10884 0, // dsub_5
10885 0, // dsub_6
10886 0, // dsub_7
10887 0, // gsub_0
10888 0, // gsub_1
10889 0, // qqsub_0
10890 0, // qqsub_1
10891 0, // qsub_0
10892 0, // qsub_1
10893 0, // qsub_2
10894 0, // qsub_3
10895 0, // ssub_0
10896 0, // ssub_1
10897 0, // ssub_2
10898 0, // ssub_3
10899 0, // ssub_4
10900 0, // ssub_5
10901 0, // ssub_6
10902 0, // ssub_7
10903 0, // ssub_8
10904 0, // ssub_9
10905 0, // ssub_10
10906 0, // ssub_11
10907 0, // ssub_12
10908 0, // ssub_13
10909 0, // ssub_14
10910 0, // ssub_15
10911 0, // ssub_0_ssub_1_ssub_4_ssub_5
10912 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10913 0, // ssub_2_ssub_3_ssub_6_ssub_7
10914 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10915 0, // ssub_2_ssub_3_ssub_4_ssub_5
10916 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10917 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10918 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10919 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10920 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10921 0, // ssub_4_ssub_5_ssub_8_ssub_9
10922 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10923 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10924 0, // ssub_6_ssub_7_dsub_5
10925 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10926 0, // ssub_6_ssub_7_dsub_5_dsub_7
10927 0, // ssub_6_ssub_7_ssub_8_ssub_9
10928 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10929 0, // ssub_8_ssub_9_ssub_12_ssub_13
10930 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10931 0, // dsub_5_dsub_7
10932 0, // dsub_5_ssub_12_ssub_13_dsub_7
10933 0, // dsub_5_ssub_12_ssub_13
10934 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10935 },
10936 { // GPRnopc_and_GPRnoip_and_hGPR
10937 0, // dsub_0
10938 0, // dsub_1
10939 0, // dsub_2
10940 0, // dsub_3
10941 0, // dsub_4
10942 0, // dsub_5
10943 0, // dsub_6
10944 0, // dsub_7
10945 0, // gsub_0
10946 0, // gsub_1
10947 0, // qqsub_0
10948 0, // qqsub_1
10949 0, // qsub_0
10950 0, // qsub_1
10951 0, // qsub_2
10952 0, // qsub_3
10953 0, // ssub_0
10954 0, // ssub_1
10955 0, // ssub_2
10956 0, // ssub_3
10957 0, // ssub_4
10958 0, // ssub_5
10959 0, // ssub_6
10960 0, // ssub_7
10961 0, // ssub_8
10962 0, // ssub_9
10963 0, // ssub_10
10964 0, // ssub_11
10965 0, // ssub_12
10966 0, // ssub_13
10967 0, // ssub_14
10968 0, // ssub_15
10969 0, // ssub_0_ssub_1_ssub_4_ssub_5
10970 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
10971 0, // ssub_2_ssub_3_ssub_6_ssub_7
10972 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
10973 0, // ssub_2_ssub_3_ssub_4_ssub_5
10974 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
10975 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10976 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
10977 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
10978 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10979 0, // ssub_4_ssub_5_ssub_8_ssub_9
10980 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
10981 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
10982 0, // ssub_6_ssub_7_dsub_5
10983 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
10984 0, // ssub_6_ssub_7_dsub_5_dsub_7
10985 0, // ssub_6_ssub_7_ssub_8_ssub_9
10986 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10987 0, // ssub_8_ssub_9_ssub_12_ssub_13
10988 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
10989 0, // dsub_5_dsub_7
10990 0, // dsub_5_ssub_12_ssub_13_dsub_7
10991 0, // dsub_5_ssub_12_ssub_13
10992 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
10993 },
10994 { // GPRnosp_and_GPRnoip_and_hGPR
10995 0, // dsub_0
10996 0, // dsub_1
10997 0, // dsub_2
10998 0, // dsub_3
10999 0, // dsub_4
11000 0, // dsub_5
11001 0, // dsub_6
11002 0, // dsub_7
11003 0, // gsub_0
11004 0, // gsub_1
11005 0, // qqsub_0
11006 0, // qqsub_1
11007 0, // qsub_0
11008 0, // qsub_1
11009 0, // qsub_2
11010 0, // qsub_3
11011 0, // ssub_0
11012 0, // ssub_1
11013 0, // ssub_2
11014 0, // ssub_3
11015 0, // ssub_4
11016 0, // ssub_5
11017 0, // ssub_6
11018 0, // ssub_7
11019 0, // ssub_8
11020 0, // ssub_9
11021 0, // ssub_10
11022 0, // ssub_11
11023 0, // ssub_12
11024 0, // ssub_13
11025 0, // ssub_14
11026 0, // ssub_15
11027 0, // ssub_0_ssub_1_ssub_4_ssub_5
11028 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11029 0, // ssub_2_ssub_3_ssub_6_ssub_7
11030 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11031 0, // ssub_2_ssub_3_ssub_4_ssub_5
11032 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11033 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11034 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11035 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11036 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11037 0, // ssub_4_ssub_5_ssub_8_ssub_9
11038 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11039 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11040 0, // ssub_6_ssub_7_dsub_5
11041 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11042 0, // ssub_6_ssub_7_dsub_5_dsub_7
11043 0, // ssub_6_ssub_7_ssub_8_ssub_9
11044 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11045 0, // ssub_8_ssub_9_ssub_12_ssub_13
11046 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11047 0, // dsub_5_dsub_7
11048 0, // dsub_5_ssub_12_ssub_13_dsub_7
11049 0, // dsub_5_ssub_12_ssub_13
11050 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11051 },
11052 { // tcGPR
11053 0, // dsub_0
11054 0, // dsub_1
11055 0, // dsub_2
11056 0, // dsub_3
11057 0, // dsub_4
11058 0, // dsub_5
11059 0, // dsub_6
11060 0, // dsub_7
11061 0, // gsub_0
11062 0, // gsub_1
11063 0, // qqsub_0
11064 0, // qqsub_1
11065 0, // qsub_0
11066 0, // qsub_1
11067 0, // qsub_2
11068 0, // qsub_3
11069 0, // ssub_0
11070 0, // ssub_1
11071 0, // ssub_2
11072 0, // ssub_3
11073 0, // ssub_4
11074 0, // ssub_5
11075 0, // ssub_6
11076 0, // ssub_7
11077 0, // ssub_8
11078 0, // ssub_9
11079 0, // ssub_10
11080 0, // ssub_11
11081 0, // ssub_12
11082 0, // ssub_13
11083 0, // ssub_14
11084 0, // ssub_15
11085 0, // ssub_0_ssub_1_ssub_4_ssub_5
11086 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11087 0, // ssub_2_ssub_3_ssub_6_ssub_7
11088 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11089 0, // ssub_2_ssub_3_ssub_4_ssub_5
11090 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11091 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11092 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11093 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11094 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11095 0, // ssub_4_ssub_5_ssub_8_ssub_9
11096 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11097 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11098 0, // ssub_6_ssub_7_dsub_5
11099 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11100 0, // ssub_6_ssub_7_dsub_5_dsub_7
11101 0, // ssub_6_ssub_7_ssub_8_ssub_9
11102 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11103 0, // ssub_8_ssub_9_ssub_12_ssub_13
11104 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11105 0, // dsub_5_dsub_7
11106 0, // dsub_5_ssub_12_ssub_13_dsub_7
11107 0, // dsub_5_ssub_12_ssub_13
11108 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11109 },
11110 { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR
11111 0, // dsub_0
11112 0, // dsub_1
11113 0, // dsub_2
11114 0, // dsub_3
11115 0, // dsub_4
11116 0, // dsub_5
11117 0, // dsub_6
11118 0, // dsub_7
11119 0, // gsub_0
11120 0, // gsub_1
11121 0, // qqsub_0
11122 0, // qqsub_1
11123 0, // qsub_0
11124 0, // qsub_1
11125 0, // qsub_2
11126 0, // qsub_3
11127 0, // ssub_0
11128 0, // ssub_1
11129 0, // ssub_2
11130 0, // ssub_3
11131 0, // ssub_4
11132 0, // ssub_5
11133 0, // ssub_6
11134 0, // ssub_7
11135 0, // ssub_8
11136 0, // ssub_9
11137 0, // ssub_10
11138 0, // ssub_11
11139 0, // ssub_12
11140 0, // ssub_13
11141 0, // ssub_14
11142 0, // ssub_15
11143 0, // ssub_0_ssub_1_ssub_4_ssub_5
11144 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11145 0, // ssub_2_ssub_3_ssub_6_ssub_7
11146 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11147 0, // ssub_2_ssub_3_ssub_4_ssub_5
11148 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11149 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11150 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11151 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11152 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11153 0, // ssub_4_ssub_5_ssub_8_ssub_9
11154 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11155 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11156 0, // ssub_6_ssub_7_dsub_5
11157 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11158 0, // ssub_6_ssub_7_dsub_5_dsub_7
11159 0, // ssub_6_ssub_7_ssub_8_ssub_9
11160 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11161 0, // ssub_8_ssub_9_ssub_12_ssub_13
11162 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11163 0, // dsub_5_dsub_7
11164 0, // dsub_5_ssub_12_ssub_13_dsub_7
11165 0, // dsub_5_ssub_12_ssub_13
11166 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11167 },
11168 { // hGPR_and_tGPREven
11169 0, // dsub_0
11170 0, // dsub_1
11171 0, // dsub_2
11172 0, // dsub_3
11173 0, // dsub_4
11174 0, // dsub_5
11175 0, // dsub_6
11176 0, // dsub_7
11177 0, // gsub_0
11178 0, // gsub_1
11179 0, // qqsub_0
11180 0, // qqsub_1
11181 0, // qsub_0
11182 0, // qsub_1
11183 0, // qsub_2
11184 0, // qsub_3
11185 0, // ssub_0
11186 0, // ssub_1
11187 0, // ssub_2
11188 0, // ssub_3
11189 0, // ssub_4
11190 0, // ssub_5
11191 0, // ssub_6
11192 0, // ssub_7
11193 0, // ssub_8
11194 0, // ssub_9
11195 0, // ssub_10
11196 0, // ssub_11
11197 0, // ssub_12
11198 0, // ssub_13
11199 0, // ssub_14
11200 0, // ssub_15
11201 0, // ssub_0_ssub_1_ssub_4_ssub_5
11202 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11203 0, // ssub_2_ssub_3_ssub_6_ssub_7
11204 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11205 0, // ssub_2_ssub_3_ssub_4_ssub_5
11206 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11207 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11208 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11209 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11210 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11211 0, // ssub_4_ssub_5_ssub_8_ssub_9
11212 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11213 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11214 0, // ssub_6_ssub_7_dsub_5
11215 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11216 0, // ssub_6_ssub_7_dsub_5_dsub_7
11217 0, // ssub_6_ssub_7_ssub_8_ssub_9
11218 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11219 0, // ssub_8_ssub_9_ssub_12_ssub_13
11220 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11221 0, // dsub_5_dsub_7
11222 0, // dsub_5_ssub_12_ssub_13_dsub_7
11223 0, // dsub_5_ssub_12_ssub_13
11224 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11225 },
11226 { // tGPR_and_tGPREven
11227 0, // dsub_0
11228 0, // dsub_1
11229 0, // dsub_2
11230 0, // dsub_3
11231 0, // dsub_4
11232 0, // dsub_5
11233 0, // dsub_6
11234 0, // dsub_7
11235 0, // gsub_0
11236 0, // gsub_1
11237 0, // qqsub_0
11238 0, // qqsub_1
11239 0, // qsub_0
11240 0, // qsub_1
11241 0, // qsub_2
11242 0, // qsub_3
11243 0, // ssub_0
11244 0, // ssub_1
11245 0, // ssub_2
11246 0, // ssub_3
11247 0, // ssub_4
11248 0, // ssub_5
11249 0, // ssub_6
11250 0, // ssub_7
11251 0, // ssub_8
11252 0, // ssub_9
11253 0, // ssub_10
11254 0, // ssub_11
11255 0, // ssub_12
11256 0, // ssub_13
11257 0, // ssub_14
11258 0, // ssub_15
11259 0, // ssub_0_ssub_1_ssub_4_ssub_5
11260 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11261 0, // ssub_2_ssub_3_ssub_6_ssub_7
11262 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11263 0, // ssub_2_ssub_3_ssub_4_ssub_5
11264 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11265 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11266 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11267 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11268 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11269 0, // ssub_4_ssub_5_ssub_8_ssub_9
11270 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11271 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11272 0, // ssub_6_ssub_7_dsub_5
11273 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11274 0, // ssub_6_ssub_7_dsub_5_dsub_7
11275 0, // ssub_6_ssub_7_ssub_8_ssub_9
11276 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11277 0, // ssub_8_ssub_9_ssub_12_ssub_13
11278 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11279 0, // dsub_5_dsub_7
11280 0, // dsub_5_ssub_12_ssub_13_dsub_7
11281 0, // dsub_5_ssub_12_ssub_13
11282 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11283 },
11284 { // tGPR_and_tGPROdd
11285 0, // dsub_0
11286 0, // dsub_1
11287 0, // dsub_2
11288 0, // dsub_3
11289 0, // dsub_4
11290 0, // dsub_5
11291 0, // dsub_6
11292 0, // dsub_7
11293 0, // gsub_0
11294 0, // gsub_1
11295 0, // qqsub_0
11296 0, // qqsub_1
11297 0, // qsub_0
11298 0, // qsub_1
11299 0, // qsub_2
11300 0, // qsub_3
11301 0, // ssub_0
11302 0, // ssub_1
11303 0, // ssub_2
11304 0, // ssub_3
11305 0, // ssub_4
11306 0, // ssub_5
11307 0, // ssub_6
11308 0, // ssub_7
11309 0, // ssub_8
11310 0, // ssub_9
11311 0, // ssub_10
11312 0, // ssub_11
11313 0, // ssub_12
11314 0, // ssub_13
11315 0, // ssub_14
11316 0, // ssub_15
11317 0, // ssub_0_ssub_1_ssub_4_ssub_5
11318 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11319 0, // ssub_2_ssub_3_ssub_6_ssub_7
11320 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11321 0, // ssub_2_ssub_3_ssub_4_ssub_5
11322 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11323 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11324 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11325 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11326 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11327 0, // ssub_4_ssub_5_ssub_8_ssub_9
11328 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11329 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11330 0, // ssub_6_ssub_7_dsub_5
11331 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11332 0, // ssub_6_ssub_7_dsub_5_dsub_7
11333 0, // ssub_6_ssub_7_ssub_8_ssub_9
11334 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11335 0, // ssub_8_ssub_9_ssub_12_ssub_13
11336 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11337 0, // dsub_5_dsub_7
11338 0, // dsub_5_ssub_12_ssub_13_dsub_7
11339 0, // dsub_5_ssub_12_ssub_13
11340 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11341 },
11342 { // tcGPRnotr12
11343 0, // dsub_0
11344 0, // dsub_1
11345 0, // dsub_2
11346 0, // dsub_3
11347 0, // dsub_4
11348 0, // dsub_5
11349 0, // dsub_6
11350 0, // dsub_7
11351 0, // gsub_0
11352 0, // gsub_1
11353 0, // qqsub_0
11354 0, // qqsub_1
11355 0, // qsub_0
11356 0, // qsub_1
11357 0, // qsub_2
11358 0, // qsub_3
11359 0, // ssub_0
11360 0, // ssub_1
11361 0, // ssub_2
11362 0, // ssub_3
11363 0, // ssub_4
11364 0, // ssub_5
11365 0, // ssub_6
11366 0, // ssub_7
11367 0, // ssub_8
11368 0, // ssub_9
11369 0, // ssub_10
11370 0, // ssub_11
11371 0, // ssub_12
11372 0, // ssub_13
11373 0, // ssub_14
11374 0, // ssub_15
11375 0, // ssub_0_ssub_1_ssub_4_ssub_5
11376 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11377 0, // ssub_2_ssub_3_ssub_6_ssub_7
11378 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11379 0, // ssub_2_ssub_3_ssub_4_ssub_5
11380 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11381 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11382 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11383 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11384 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11385 0, // ssub_4_ssub_5_ssub_8_ssub_9
11386 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11387 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11388 0, // ssub_6_ssub_7_dsub_5
11389 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11390 0, // ssub_6_ssub_7_dsub_5_dsub_7
11391 0, // ssub_6_ssub_7_ssub_8_ssub_9
11392 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11393 0, // ssub_8_ssub_9_ssub_12_ssub_13
11394 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11395 0, // dsub_5_dsub_7
11396 0, // dsub_5_ssub_12_ssub_13_dsub_7
11397 0, // dsub_5_ssub_12_ssub_13
11398 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11399 },
11400 { // tGPREven_and_tcGPR
11401 0, // dsub_0
11402 0, // dsub_1
11403 0, // dsub_2
11404 0, // dsub_3
11405 0, // dsub_4
11406 0, // dsub_5
11407 0, // dsub_6
11408 0, // dsub_7
11409 0, // gsub_0
11410 0, // gsub_1
11411 0, // qqsub_0
11412 0, // qqsub_1
11413 0, // qsub_0
11414 0, // qsub_1
11415 0, // qsub_2
11416 0, // qsub_3
11417 0, // ssub_0
11418 0, // ssub_1
11419 0, // ssub_2
11420 0, // ssub_3
11421 0, // ssub_4
11422 0, // ssub_5
11423 0, // ssub_6
11424 0, // ssub_7
11425 0, // ssub_8
11426 0, // ssub_9
11427 0, // ssub_10
11428 0, // ssub_11
11429 0, // ssub_12
11430 0, // ssub_13
11431 0, // ssub_14
11432 0, // ssub_15
11433 0, // ssub_0_ssub_1_ssub_4_ssub_5
11434 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11435 0, // ssub_2_ssub_3_ssub_6_ssub_7
11436 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11437 0, // ssub_2_ssub_3_ssub_4_ssub_5
11438 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11439 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11440 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11441 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11442 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11443 0, // ssub_4_ssub_5_ssub_8_ssub_9
11444 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11445 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11446 0, // ssub_6_ssub_7_dsub_5
11447 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11448 0, // ssub_6_ssub_7_dsub_5_dsub_7
11449 0, // ssub_6_ssub_7_ssub_8_ssub_9
11450 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11451 0, // ssub_8_ssub_9_ssub_12_ssub_13
11452 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11453 0, // dsub_5_dsub_7
11454 0, // dsub_5_ssub_12_ssub_13_dsub_7
11455 0, // dsub_5_ssub_12_ssub_13
11456 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11457 },
11458 { // hGPR_and_GPRnoip_and_tGPREven
11459 0, // dsub_0
11460 0, // dsub_1
11461 0, // dsub_2
11462 0, // dsub_3
11463 0, // dsub_4
11464 0, // dsub_5
11465 0, // dsub_6
11466 0, // dsub_7
11467 0, // gsub_0
11468 0, // gsub_1
11469 0, // qqsub_0
11470 0, // qqsub_1
11471 0, // qsub_0
11472 0, // qsub_1
11473 0, // qsub_2
11474 0, // qsub_3
11475 0, // ssub_0
11476 0, // ssub_1
11477 0, // ssub_2
11478 0, // ssub_3
11479 0, // ssub_4
11480 0, // ssub_5
11481 0, // ssub_6
11482 0, // ssub_7
11483 0, // ssub_8
11484 0, // ssub_9
11485 0, // ssub_10
11486 0, // ssub_11
11487 0, // ssub_12
11488 0, // ssub_13
11489 0, // ssub_14
11490 0, // ssub_15
11491 0, // ssub_0_ssub_1_ssub_4_ssub_5
11492 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11493 0, // ssub_2_ssub_3_ssub_6_ssub_7
11494 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11495 0, // ssub_2_ssub_3_ssub_4_ssub_5
11496 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11497 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11498 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11499 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11500 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11501 0, // ssub_4_ssub_5_ssub_8_ssub_9
11502 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11503 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11504 0, // ssub_6_ssub_7_dsub_5
11505 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11506 0, // ssub_6_ssub_7_dsub_5_dsub_7
11507 0, // ssub_6_ssub_7_ssub_8_ssub_9
11508 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11509 0, // ssub_8_ssub_9_ssub_12_ssub_13
11510 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11511 0, // dsub_5_dsub_7
11512 0, // dsub_5_ssub_12_ssub_13_dsub_7
11513 0, // dsub_5_ssub_12_ssub_13
11514 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11515 },
11516 { // hGPR_and_tGPROdd
11517 0, // dsub_0
11518 0, // dsub_1
11519 0, // dsub_2
11520 0, // dsub_3
11521 0, // dsub_4
11522 0, // dsub_5
11523 0, // dsub_6
11524 0, // dsub_7
11525 0, // gsub_0
11526 0, // gsub_1
11527 0, // qqsub_0
11528 0, // qqsub_1
11529 0, // qsub_0
11530 0, // qsub_1
11531 0, // qsub_2
11532 0, // qsub_3
11533 0, // ssub_0
11534 0, // ssub_1
11535 0, // ssub_2
11536 0, // ssub_3
11537 0, // ssub_4
11538 0, // ssub_5
11539 0, // ssub_6
11540 0, // ssub_7
11541 0, // ssub_8
11542 0, // ssub_9
11543 0, // ssub_10
11544 0, // ssub_11
11545 0, // ssub_12
11546 0, // ssub_13
11547 0, // ssub_14
11548 0, // ssub_15
11549 0, // ssub_0_ssub_1_ssub_4_ssub_5
11550 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11551 0, // ssub_2_ssub_3_ssub_6_ssub_7
11552 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11553 0, // ssub_2_ssub_3_ssub_4_ssub_5
11554 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11555 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11556 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11557 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11558 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11559 0, // ssub_4_ssub_5_ssub_8_ssub_9
11560 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11561 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11562 0, // ssub_6_ssub_7_dsub_5
11563 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11564 0, // ssub_6_ssub_7_dsub_5_dsub_7
11565 0, // ssub_6_ssub_7_ssub_8_ssub_9
11566 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11567 0, // ssub_8_ssub_9_ssub_12_ssub_13
11568 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11569 0, // dsub_5_dsub_7
11570 0, // dsub_5_ssub_12_ssub_13_dsub_7
11571 0, // dsub_5_ssub_12_ssub_13
11572 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11573 },
11574 { // tGPREven_and_tcGPRnotr12
11575 0, // dsub_0
11576 0, // dsub_1
11577 0, // dsub_2
11578 0, // dsub_3
11579 0, // dsub_4
11580 0, // dsub_5
11581 0, // dsub_6
11582 0, // dsub_7
11583 0, // gsub_0
11584 0, // gsub_1
11585 0, // qqsub_0
11586 0, // qqsub_1
11587 0, // qsub_0
11588 0, // qsub_1
11589 0, // qsub_2
11590 0, // qsub_3
11591 0, // ssub_0
11592 0, // ssub_1
11593 0, // ssub_2
11594 0, // ssub_3
11595 0, // ssub_4
11596 0, // ssub_5
11597 0, // ssub_6
11598 0, // ssub_7
11599 0, // ssub_8
11600 0, // ssub_9
11601 0, // ssub_10
11602 0, // ssub_11
11603 0, // ssub_12
11604 0, // ssub_13
11605 0, // ssub_14
11606 0, // ssub_15
11607 0, // ssub_0_ssub_1_ssub_4_ssub_5
11608 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11609 0, // ssub_2_ssub_3_ssub_6_ssub_7
11610 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11611 0, // ssub_2_ssub_3_ssub_4_ssub_5
11612 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11613 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11614 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11615 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11616 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11617 0, // ssub_4_ssub_5_ssub_8_ssub_9
11618 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11619 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11620 0, // ssub_6_ssub_7_dsub_5
11621 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11622 0, // ssub_6_ssub_7_dsub_5_dsub_7
11623 0, // ssub_6_ssub_7_ssub_8_ssub_9
11624 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11625 0, // ssub_8_ssub_9_ssub_12_ssub_13
11626 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11627 0, // dsub_5_dsub_7
11628 0, // dsub_5_ssub_12_ssub_13_dsub_7
11629 0, // dsub_5_ssub_12_ssub_13
11630 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11631 },
11632 { // tGPROdd_and_tcGPR
11633 0, // dsub_0
11634 0, // dsub_1
11635 0, // dsub_2
11636 0, // dsub_3
11637 0, // dsub_4
11638 0, // dsub_5
11639 0, // dsub_6
11640 0, // dsub_7
11641 0, // gsub_0
11642 0, // gsub_1
11643 0, // qqsub_0
11644 0, // qqsub_1
11645 0, // qsub_0
11646 0, // qsub_1
11647 0, // qsub_2
11648 0, // qsub_3
11649 0, // ssub_0
11650 0, // ssub_1
11651 0, // ssub_2
11652 0, // ssub_3
11653 0, // ssub_4
11654 0, // ssub_5
11655 0, // ssub_6
11656 0, // ssub_7
11657 0, // ssub_8
11658 0, // ssub_9
11659 0, // ssub_10
11660 0, // ssub_11
11661 0, // ssub_12
11662 0, // ssub_13
11663 0, // ssub_14
11664 0, // ssub_15
11665 0, // ssub_0_ssub_1_ssub_4_ssub_5
11666 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11667 0, // ssub_2_ssub_3_ssub_6_ssub_7
11668 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11669 0, // ssub_2_ssub_3_ssub_4_ssub_5
11670 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11671 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11672 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11673 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11674 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11675 0, // ssub_4_ssub_5_ssub_8_ssub_9
11676 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11677 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11678 0, // ssub_6_ssub_7_dsub_5
11679 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11680 0, // ssub_6_ssub_7_dsub_5_dsub_7
11681 0, // ssub_6_ssub_7_ssub_8_ssub_9
11682 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11683 0, // ssub_8_ssub_9_ssub_12_ssub_13
11684 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11685 0, // dsub_5_dsub_7
11686 0, // dsub_5_ssub_12_ssub_13_dsub_7
11687 0, // dsub_5_ssub_12_ssub_13
11688 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11689 },
11690 { // CCR
11691 0, // dsub_0
11692 0, // dsub_1
11693 0, // dsub_2
11694 0, // dsub_3
11695 0, // dsub_4
11696 0, // dsub_5
11697 0, // dsub_6
11698 0, // dsub_7
11699 0, // gsub_0
11700 0, // gsub_1
11701 0, // qqsub_0
11702 0, // qqsub_1
11703 0, // qsub_0
11704 0, // qsub_1
11705 0, // qsub_2
11706 0, // qsub_3
11707 0, // ssub_0
11708 0, // ssub_1
11709 0, // ssub_2
11710 0, // ssub_3
11711 0, // ssub_4
11712 0, // ssub_5
11713 0, // ssub_6
11714 0, // ssub_7
11715 0, // ssub_8
11716 0, // ssub_9
11717 0, // ssub_10
11718 0, // ssub_11
11719 0, // ssub_12
11720 0, // ssub_13
11721 0, // ssub_14
11722 0, // ssub_15
11723 0, // ssub_0_ssub_1_ssub_4_ssub_5
11724 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11725 0, // ssub_2_ssub_3_ssub_6_ssub_7
11726 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11727 0, // ssub_2_ssub_3_ssub_4_ssub_5
11728 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11729 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11730 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11731 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11732 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11733 0, // ssub_4_ssub_5_ssub_8_ssub_9
11734 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11735 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11736 0, // ssub_6_ssub_7_dsub_5
11737 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11738 0, // ssub_6_ssub_7_dsub_5_dsub_7
11739 0, // ssub_6_ssub_7_ssub_8_ssub_9
11740 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11741 0, // ssub_8_ssub_9_ssub_12_ssub_13
11742 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11743 0, // dsub_5_dsub_7
11744 0, // dsub_5_ssub_12_ssub_13_dsub_7
11745 0, // dsub_5_ssub_12_ssub_13
11746 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11747 },
11748 { // FPCXTRegs
11749 0, // dsub_0
11750 0, // dsub_1
11751 0, // dsub_2
11752 0, // dsub_3
11753 0, // dsub_4
11754 0, // dsub_5
11755 0, // dsub_6
11756 0, // dsub_7
11757 0, // gsub_0
11758 0, // gsub_1
11759 0, // qqsub_0
11760 0, // qqsub_1
11761 0, // qsub_0
11762 0, // qsub_1
11763 0, // qsub_2
11764 0, // qsub_3
11765 0, // ssub_0
11766 0, // ssub_1
11767 0, // ssub_2
11768 0, // ssub_3
11769 0, // ssub_4
11770 0, // ssub_5
11771 0, // ssub_6
11772 0, // ssub_7
11773 0, // ssub_8
11774 0, // ssub_9
11775 0, // ssub_10
11776 0, // ssub_11
11777 0, // ssub_12
11778 0, // ssub_13
11779 0, // ssub_14
11780 0, // ssub_15
11781 0, // ssub_0_ssub_1_ssub_4_ssub_5
11782 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11783 0, // ssub_2_ssub_3_ssub_6_ssub_7
11784 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11785 0, // ssub_2_ssub_3_ssub_4_ssub_5
11786 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11787 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11788 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11789 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11790 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11791 0, // ssub_4_ssub_5_ssub_8_ssub_9
11792 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11793 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11794 0, // ssub_6_ssub_7_dsub_5
11795 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11796 0, // ssub_6_ssub_7_dsub_5_dsub_7
11797 0, // ssub_6_ssub_7_ssub_8_ssub_9
11798 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11799 0, // ssub_8_ssub_9_ssub_12_ssub_13
11800 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11801 0, // dsub_5_dsub_7
11802 0, // dsub_5_ssub_12_ssub_13_dsub_7
11803 0, // dsub_5_ssub_12_ssub_13
11804 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11805 },
11806 { // GPRlr
11807 0, // dsub_0
11808 0, // dsub_1
11809 0, // dsub_2
11810 0, // dsub_3
11811 0, // dsub_4
11812 0, // dsub_5
11813 0, // dsub_6
11814 0, // dsub_7
11815 0, // gsub_0
11816 0, // gsub_1
11817 0, // qqsub_0
11818 0, // qqsub_1
11819 0, // qsub_0
11820 0, // qsub_1
11821 0, // qsub_2
11822 0, // qsub_3
11823 0, // ssub_0
11824 0, // ssub_1
11825 0, // ssub_2
11826 0, // ssub_3
11827 0, // ssub_4
11828 0, // ssub_5
11829 0, // ssub_6
11830 0, // ssub_7
11831 0, // ssub_8
11832 0, // ssub_9
11833 0, // ssub_10
11834 0, // ssub_11
11835 0, // ssub_12
11836 0, // ssub_13
11837 0, // ssub_14
11838 0, // ssub_15
11839 0, // ssub_0_ssub_1_ssub_4_ssub_5
11840 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11841 0, // ssub_2_ssub_3_ssub_6_ssub_7
11842 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11843 0, // ssub_2_ssub_3_ssub_4_ssub_5
11844 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11845 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11846 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11847 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11848 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11849 0, // ssub_4_ssub_5_ssub_8_ssub_9
11850 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11851 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11852 0, // ssub_6_ssub_7_dsub_5
11853 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11854 0, // ssub_6_ssub_7_dsub_5_dsub_7
11855 0, // ssub_6_ssub_7_ssub_8_ssub_9
11856 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11857 0, // ssub_8_ssub_9_ssub_12_ssub_13
11858 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11859 0, // dsub_5_dsub_7
11860 0, // dsub_5_ssub_12_ssub_13_dsub_7
11861 0, // dsub_5_ssub_12_ssub_13
11862 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11863 },
11864 { // GPRsp
11865 0, // dsub_0
11866 0, // dsub_1
11867 0, // dsub_2
11868 0, // dsub_3
11869 0, // dsub_4
11870 0, // dsub_5
11871 0, // dsub_6
11872 0, // dsub_7
11873 0, // gsub_0
11874 0, // gsub_1
11875 0, // qqsub_0
11876 0, // qqsub_1
11877 0, // qsub_0
11878 0, // qsub_1
11879 0, // qsub_2
11880 0, // qsub_3
11881 0, // ssub_0
11882 0, // ssub_1
11883 0, // ssub_2
11884 0, // ssub_3
11885 0, // ssub_4
11886 0, // ssub_5
11887 0, // ssub_6
11888 0, // ssub_7
11889 0, // ssub_8
11890 0, // ssub_9
11891 0, // ssub_10
11892 0, // ssub_11
11893 0, // ssub_12
11894 0, // ssub_13
11895 0, // ssub_14
11896 0, // ssub_15
11897 0, // ssub_0_ssub_1_ssub_4_ssub_5
11898 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11899 0, // ssub_2_ssub_3_ssub_6_ssub_7
11900 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11901 0, // ssub_2_ssub_3_ssub_4_ssub_5
11902 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11903 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11904 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11905 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11906 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11907 0, // ssub_4_ssub_5_ssub_8_ssub_9
11908 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11909 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11910 0, // ssub_6_ssub_7_dsub_5
11911 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11912 0, // ssub_6_ssub_7_dsub_5_dsub_7
11913 0, // ssub_6_ssub_7_ssub_8_ssub_9
11914 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11915 0, // ssub_8_ssub_9_ssub_12_ssub_13
11916 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11917 0, // dsub_5_dsub_7
11918 0, // dsub_5_ssub_12_ssub_13_dsub_7
11919 0, // dsub_5_ssub_12_ssub_13
11920 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11921 },
11922 { // VCCR
11923 0, // dsub_0
11924 0, // dsub_1
11925 0, // dsub_2
11926 0, // dsub_3
11927 0, // dsub_4
11928 0, // dsub_5
11929 0, // dsub_6
11930 0, // dsub_7
11931 0, // gsub_0
11932 0, // gsub_1
11933 0, // qqsub_0
11934 0, // qqsub_1
11935 0, // qsub_0
11936 0, // qsub_1
11937 0, // qsub_2
11938 0, // qsub_3
11939 0, // ssub_0
11940 0, // ssub_1
11941 0, // ssub_2
11942 0, // ssub_3
11943 0, // ssub_4
11944 0, // ssub_5
11945 0, // ssub_6
11946 0, // ssub_7
11947 0, // ssub_8
11948 0, // ssub_9
11949 0, // ssub_10
11950 0, // ssub_11
11951 0, // ssub_12
11952 0, // ssub_13
11953 0, // ssub_14
11954 0, // ssub_15
11955 0, // ssub_0_ssub_1_ssub_4_ssub_5
11956 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
11957 0, // ssub_2_ssub_3_ssub_6_ssub_7
11958 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
11959 0, // ssub_2_ssub_3_ssub_4_ssub_5
11960 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
11961 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11962 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
11963 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
11964 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11965 0, // ssub_4_ssub_5_ssub_8_ssub_9
11966 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
11967 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
11968 0, // ssub_6_ssub_7_dsub_5
11969 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
11970 0, // ssub_6_ssub_7_dsub_5_dsub_7
11971 0, // ssub_6_ssub_7_ssub_8_ssub_9
11972 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11973 0, // ssub_8_ssub_9_ssub_12_ssub_13
11974 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
11975 0, // dsub_5_dsub_7
11976 0, // dsub_5_ssub_12_ssub_13_dsub_7
11977 0, // dsub_5_ssub_12_ssub_13
11978 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
11979 },
11980 { // cl_FPSCR_NZCV
11981 0, // dsub_0
11982 0, // dsub_1
11983 0, // dsub_2
11984 0, // dsub_3
11985 0, // dsub_4
11986 0, // dsub_5
11987 0, // dsub_6
11988 0, // dsub_7
11989 0, // gsub_0
11990 0, // gsub_1
11991 0, // qqsub_0
11992 0, // qqsub_1
11993 0, // qsub_0
11994 0, // qsub_1
11995 0, // qsub_2
11996 0, // qsub_3
11997 0, // ssub_0
11998 0, // ssub_1
11999 0, // ssub_2
12000 0, // ssub_3
12001 0, // ssub_4
12002 0, // ssub_5
12003 0, // ssub_6
12004 0, // ssub_7
12005 0, // ssub_8
12006 0, // ssub_9
12007 0, // ssub_10
12008 0, // ssub_11
12009 0, // ssub_12
12010 0, // ssub_13
12011 0, // ssub_14
12012 0, // ssub_15
12013 0, // ssub_0_ssub_1_ssub_4_ssub_5
12014 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12015 0, // ssub_2_ssub_3_ssub_6_ssub_7
12016 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12017 0, // ssub_2_ssub_3_ssub_4_ssub_5
12018 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12019 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12020 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12021 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12022 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12023 0, // ssub_4_ssub_5_ssub_8_ssub_9
12024 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12025 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12026 0, // ssub_6_ssub_7_dsub_5
12027 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12028 0, // ssub_6_ssub_7_dsub_5_dsub_7
12029 0, // ssub_6_ssub_7_ssub_8_ssub_9
12030 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12031 0, // ssub_8_ssub_9_ssub_12_ssub_13
12032 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12033 0, // dsub_5_dsub_7
12034 0, // dsub_5_ssub_12_ssub_13_dsub_7
12035 0, // dsub_5_ssub_12_ssub_13
12036 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12037 },
12038 { // hGPR_and_tGPRwithpc
12039 0, // dsub_0
12040 0, // dsub_1
12041 0, // dsub_2
12042 0, // dsub_3
12043 0, // dsub_4
12044 0, // dsub_5
12045 0, // dsub_6
12046 0, // dsub_7
12047 0, // gsub_0
12048 0, // gsub_1
12049 0, // qqsub_0
12050 0, // qqsub_1
12051 0, // qsub_0
12052 0, // qsub_1
12053 0, // qsub_2
12054 0, // qsub_3
12055 0, // ssub_0
12056 0, // ssub_1
12057 0, // ssub_2
12058 0, // ssub_3
12059 0, // ssub_4
12060 0, // ssub_5
12061 0, // ssub_6
12062 0, // ssub_7
12063 0, // ssub_8
12064 0, // ssub_9
12065 0, // ssub_10
12066 0, // ssub_11
12067 0, // ssub_12
12068 0, // ssub_13
12069 0, // ssub_14
12070 0, // ssub_15
12071 0, // ssub_0_ssub_1_ssub_4_ssub_5
12072 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12073 0, // ssub_2_ssub_3_ssub_6_ssub_7
12074 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12075 0, // ssub_2_ssub_3_ssub_4_ssub_5
12076 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12077 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12078 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12079 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12080 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12081 0, // ssub_4_ssub_5_ssub_8_ssub_9
12082 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12083 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12084 0, // ssub_6_ssub_7_dsub_5
12085 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12086 0, // ssub_6_ssub_7_dsub_5_dsub_7
12087 0, // ssub_6_ssub_7_ssub_8_ssub_9
12088 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12089 0, // ssub_8_ssub_9_ssub_12_ssub_13
12090 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12091 0, // dsub_5_dsub_7
12092 0, // dsub_5_ssub_12_ssub_13_dsub_7
12093 0, // dsub_5_ssub_12_ssub_13
12094 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12095 },
12096 { // hGPR_and_tcGPR
12097 0, // dsub_0
12098 0, // dsub_1
12099 0, // dsub_2
12100 0, // dsub_3
12101 0, // dsub_4
12102 0, // dsub_5
12103 0, // dsub_6
12104 0, // dsub_7
12105 0, // gsub_0
12106 0, // gsub_1
12107 0, // qqsub_0
12108 0, // qqsub_1
12109 0, // qsub_0
12110 0, // qsub_1
12111 0, // qsub_2
12112 0, // qsub_3
12113 0, // ssub_0
12114 0, // ssub_1
12115 0, // ssub_2
12116 0, // ssub_3
12117 0, // ssub_4
12118 0, // ssub_5
12119 0, // ssub_6
12120 0, // ssub_7
12121 0, // ssub_8
12122 0, // ssub_9
12123 0, // ssub_10
12124 0, // ssub_11
12125 0, // ssub_12
12126 0, // ssub_13
12127 0, // ssub_14
12128 0, // ssub_15
12129 0, // ssub_0_ssub_1_ssub_4_ssub_5
12130 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12131 0, // ssub_2_ssub_3_ssub_6_ssub_7
12132 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12133 0, // ssub_2_ssub_3_ssub_4_ssub_5
12134 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12135 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12136 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12137 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12138 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12139 0, // ssub_4_ssub_5_ssub_8_ssub_9
12140 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12141 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12142 0, // ssub_6_ssub_7_dsub_5
12143 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12144 0, // ssub_6_ssub_7_dsub_5_dsub_7
12145 0, // ssub_6_ssub_7_ssub_8_ssub_9
12146 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12147 0, // ssub_8_ssub_9_ssub_12_ssub_13
12148 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12149 0, // dsub_5_dsub_7
12150 0, // dsub_5_ssub_12_ssub_13_dsub_7
12151 0, // dsub_5_ssub_12_ssub_13
12152 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12153 },
12154 { // DPR
12155 0, // dsub_0
12156 0, // dsub_1
12157 0, // dsub_2
12158 0, // dsub_3
12159 0, // dsub_4
12160 0, // dsub_5
12161 0, // dsub_6
12162 0, // dsub_7
12163 0, // gsub_0
12164 0, // gsub_1
12165 0, // qqsub_0
12166 0, // qqsub_1
12167 0, // qsub_0
12168 0, // qsub_1
12169 0, // qsub_2
12170 0, // qsub_3
12171 52, // ssub_0 -> DPR_VFP2
12172 52, // ssub_1 -> DPR_VFP2
12173 0, // ssub_2
12174 0, // ssub_3
12175 0, // ssub_4
12176 0, // ssub_5
12177 0, // ssub_6
12178 0, // ssub_7
12179 0, // ssub_8
12180 0, // ssub_9
12181 0, // ssub_10
12182 0, // ssub_11
12183 0, // ssub_12
12184 0, // ssub_13
12185 0, // ssub_14
12186 0, // ssub_15
12187 0, // ssub_0_ssub_1_ssub_4_ssub_5
12188 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12189 0, // ssub_2_ssub_3_ssub_6_ssub_7
12190 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12191 0, // ssub_2_ssub_3_ssub_4_ssub_5
12192 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12193 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12194 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12195 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12196 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12197 0, // ssub_4_ssub_5_ssub_8_ssub_9
12198 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12199 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12200 0, // ssub_6_ssub_7_dsub_5
12201 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12202 0, // ssub_6_ssub_7_dsub_5_dsub_7
12203 0, // ssub_6_ssub_7_ssub_8_ssub_9
12204 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12205 0, // ssub_8_ssub_9_ssub_12_ssub_13
12206 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12207 0, // dsub_5_dsub_7
12208 0, // dsub_5_ssub_12_ssub_13_dsub_7
12209 0, // dsub_5_ssub_12_ssub_13
12210 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12211 },
12212 { // DPR_VFP2
12213 0, // dsub_0
12214 0, // dsub_1
12215 0, // dsub_2
12216 0, // dsub_3
12217 0, // dsub_4
12218 0, // dsub_5
12219 0, // dsub_6
12220 0, // dsub_7
12221 0, // gsub_0
12222 0, // gsub_1
12223 0, // qqsub_0
12224 0, // qqsub_1
12225 0, // qsub_0
12226 0, // qsub_1
12227 0, // qsub_2
12228 0, // qsub_3
12229 52, // ssub_0 -> DPR_VFP2
12230 52, // ssub_1 -> DPR_VFP2
12231 0, // ssub_2
12232 0, // ssub_3
12233 0, // ssub_4
12234 0, // ssub_5
12235 0, // ssub_6
12236 0, // ssub_7
12237 0, // ssub_8
12238 0, // ssub_9
12239 0, // ssub_10
12240 0, // ssub_11
12241 0, // ssub_12
12242 0, // ssub_13
12243 0, // ssub_14
12244 0, // ssub_15
12245 0, // ssub_0_ssub_1_ssub_4_ssub_5
12246 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12247 0, // ssub_2_ssub_3_ssub_6_ssub_7
12248 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12249 0, // ssub_2_ssub_3_ssub_4_ssub_5
12250 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12251 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12252 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12253 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12254 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12255 0, // ssub_4_ssub_5_ssub_8_ssub_9
12256 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12257 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12258 0, // ssub_6_ssub_7_dsub_5
12259 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12260 0, // ssub_6_ssub_7_dsub_5_dsub_7
12261 0, // ssub_6_ssub_7_ssub_8_ssub_9
12262 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12263 0, // ssub_8_ssub_9_ssub_12_ssub_13
12264 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12265 0, // dsub_5_dsub_7
12266 0, // dsub_5_ssub_12_ssub_13_dsub_7
12267 0, // dsub_5_ssub_12_ssub_13
12268 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12269 },
12270 { // DPR_8
12271 0, // dsub_0
12272 0, // dsub_1
12273 0, // dsub_2
12274 0, // dsub_3
12275 0, // dsub_4
12276 0, // dsub_5
12277 0, // dsub_6
12278 0, // dsub_7
12279 0, // gsub_0
12280 0, // gsub_1
12281 0, // qqsub_0
12282 0, // qqsub_1
12283 0, // qsub_0
12284 0, // qsub_1
12285 0, // qsub_2
12286 0, // qsub_3
12287 53, // ssub_0 -> DPR_8
12288 53, // ssub_1 -> DPR_8
12289 0, // ssub_2
12290 0, // ssub_3
12291 0, // ssub_4
12292 0, // ssub_5
12293 0, // ssub_6
12294 0, // ssub_7
12295 0, // ssub_8
12296 0, // ssub_9
12297 0, // ssub_10
12298 0, // ssub_11
12299 0, // ssub_12
12300 0, // ssub_13
12301 0, // ssub_14
12302 0, // ssub_15
12303 0, // ssub_0_ssub_1_ssub_4_ssub_5
12304 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12305 0, // ssub_2_ssub_3_ssub_6_ssub_7
12306 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12307 0, // ssub_2_ssub_3_ssub_4_ssub_5
12308 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12309 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12310 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12311 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12312 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12313 0, // ssub_4_ssub_5_ssub_8_ssub_9
12314 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12315 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12316 0, // ssub_6_ssub_7_dsub_5
12317 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12318 0, // ssub_6_ssub_7_dsub_5_dsub_7
12319 0, // ssub_6_ssub_7_ssub_8_ssub_9
12320 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12321 0, // ssub_8_ssub_9_ssub_12_ssub_13
12322 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12323 0, // dsub_5_dsub_7
12324 0, // dsub_5_ssub_12_ssub_13_dsub_7
12325 0, // dsub_5_ssub_12_ssub_13
12326 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12327 },
12328 { // GPRPair
12329 0, // dsub_0
12330 0, // dsub_1
12331 0, // dsub_2
12332 0, // dsub_3
12333 0, // dsub_4
12334 0, // dsub_5
12335 0, // dsub_6
12336 0, // dsub_7
12337 54, // gsub_0 -> GPRPair
12338 54, // gsub_1 -> GPRPair
12339 0, // qqsub_0
12340 0, // qqsub_1
12341 0, // qsub_0
12342 0, // qsub_1
12343 0, // qsub_2
12344 0, // qsub_3
12345 0, // ssub_0
12346 0, // ssub_1
12347 0, // ssub_2
12348 0, // ssub_3
12349 0, // ssub_4
12350 0, // ssub_5
12351 0, // ssub_6
12352 0, // ssub_7
12353 0, // ssub_8
12354 0, // ssub_9
12355 0, // ssub_10
12356 0, // ssub_11
12357 0, // ssub_12
12358 0, // ssub_13
12359 0, // ssub_14
12360 0, // ssub_15
12361 0, // ssub_0_ssub_1_ssub_4_ssub_5
12362 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12363 0, // ssub_2_ssub_3_ssub_6_ssub_7
12364 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12365 0, // ssub_2_ssub_3_ssub_4_ssub_5
12366 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12367 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12368 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12369 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12370 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12371 0, // ssub_4_ssub_5_ssub_8_ssub_9
12372 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12373 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12374 0, // ssub_6_ssub_7_dsub_5
12375 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12376 0, // ssub_6_ssub_7_dsub_5_dsub_7
12377 0, // ssub_6_ssub_7_ssub_8_ssub_9
12378 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12379 0, // ssub_8_ssub_9_ssub_12_ssub_13
12380 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12381 0, // dsub_5_dsub_7
12382 0, // dsub_5_ssub_12_ssub_13_dsub_7
12383 0, // dsub_5_ssub_12_ssub_13
12384 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12385 },
12386 { // GPRPairnosp
12387 0, // dsub_0
12388 0, // dsub_1
12389 0, // dsub_2
12390 0, // dsub_3
12391 0, // dsub_4
12392 0, // dsub_5
12393 0, // dsub_6
12394 0, // dsub_7
12395 55, // gsub_0 -> GPRPairnosp
12396 55, // gsub_1 -> GPRPairnosp
12397 0, // qqsub_0
12398 0, // qqsub_1
12399 0, // qsub_0
12400 0, // qsub_1
12401 0, // qsub_2
12402 0, // qsub_3
12403 0, // ssub_0
12404 0, // ssub_1
12405 0, // ssub_2
12406 0, // ssub_3
12407 0, // ssub_4
12408 0, // ssub_5
12409 0, // ssub_6
12410 0, // ssub_7
12411 0, // ssub_8
12412 0, // ssub_9
12413 0, // ssub_10
12414 0, // ssub_11
12415 0, // ssub_12
12416 0, // ssub_13
12417 0, // ssub_14
12418 0, // ssub_15
12419 0, // ssub_0_ssub_1_ssub_4_ssub_5
12420 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12421 0, // ssub_2_ssub_3_ssub_6_ssub_7
12422 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12423 0, // ssub_2_ssub_3_ssub_4_ssub_5
12424 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12425 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12426 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12427 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12428 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12429 0, // ssub_4_ssub_5_ssub_8_ssub_9
12430 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12431 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12432 0, // ssub_6_ssub_7_dsub_5
12433 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12434 0, // ssub_6_ssub_7_dsub_5_dsub_7
12435 0, // ssub_6_ssub_7_ssub_8_ssub_9
12436 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12437 0, // ssub_8_ssub_9_ssub_12_ssub_13
12438 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12439 0, // dsub_5_dsub_7
12440 0, // dsub_5_ssub_12_ssub_13_dsub_7
12441 0, // dsub_5_ssub_12_ssub_13
12442 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12443 },
12444 { // GPRPair_with_gsub_0_in_tGPR
12445 0, // dsub_0
12446 0, // dsub_1
12447 0, // dsub_2
12448 0, // dsub_3
12449 0, // dsub_4
12450 0, // dsub_5
12451 0, // dsub_6
12452 0, // dsub_7
12453 56, // gsub_0 -> GPRPair_with_gsub_0_in_tGPR
12454 56, // gsub_1 -> GPRPair_with_gsub_0_in_tGPR
12455 0, // qqsub_0
12456 0, // qqsub_1
12457 0, // qsub_0
12458 0, // qsub_1
12459 0, // qsub_2
12460 0, // qsub_3
12461 0, // ssub_0
12462 0, // ssub_1
12463 0, // ssub_2
12464 0, // ssub_3
12465 0, // ssub_4
12466 0, // ssub_5
12467 0, // ssub_6
12468 0, // ssub_7
12469 0, // ssub_8
12470 0, // ssub_9
12471 0, // ssub_10
12472 0, // ssub_11
12473 0, // ssub_12
12474 0, // ssub_13
12475 0, // ssub_14
12476 0, // ssub_15
12477 0, // ssub_0_ssub_1_ssub_4_ssub_5
12478 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12479 0, // ssub_2_ssub_3_ssub_6_ssub_7
12480 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12481 0, // ssub_2_ssub_3_ssub_4_ssub_5
12482 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12483 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12484 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12485 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12486 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12487 0, // ssub_4_ssub_5_ssub_8_ssub_9
12488 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12489 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12490 0, // ssub_6_ssub_7_dsub_5
12491 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12492 0, // ssub_6_ssub_7_dsub_5_dsub_7
12493 0, // ssub_6_ssub_7_ssub_8_ssub_9
12494 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12495 0, // ssub_8_ssub_9_ssub_12_ssub_13
12496 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12497 0, // dsub_5_dsub_7
12498 0, // dsub_5_ssub_12_ssub_13_dsub_7
12499 0, // dsub_5_ssub_12_ssub_13
12500 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12501 },
12502 { // GPRPair_with_gsub_0_in_hGPR
12503 0, // dsub_0
12504 0, // dsub_1
12505 0, // dsub_2
12506 0, // dsub_3
12507 0, // dsub_4
12508 0, // dsub_5
12509 0, // dsub_6
12510 0, // dsub_7
12511 57, // gsub_0 -> GPRPair_with_gsub_0_in_hGPR
12512 57, // gsub_1 -> GPRPair_with_gsub_0_in_hGPR
12513 0, // qqsub_0
12514 0, // qqsub_1
12515 0, // qsub_0
12516 0, // qsub_1
12517 0, // qsub_2
12518 0, // qsub_3
12519 0, // ssub_0
12520 0, // ssub_1
12521 0, // ssub_2
12522 0, // ssub_3
12523 0, // ssub_4
12524 0, // ssub_5
12525 0, // ssub_6
12526 0, // ssub_7
12527 0, // ssub_8
12528 0, // ssub_9
12529 0, // ssub_10
12530 0, // ssub_11
12531 0, // ssub_12
12532 0, // ssub_13
12533 0, // ssub_14
12534 0, // ssub_15
12535 0, // ssub_0_ssub_1_ssub_4_ssub_5
12536 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12537 0, // ssub_2_ssub_3_ssub_6_ssub_7
12538 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12539 0, // ssub_2_ssub_3_ssub_4_ssub_5
12540 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12541 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12542 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12543 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12544 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12545 0, // ssub_4_ssub_5_ssub_8_ssub_9
12546 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12547 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12548 0, // ssub_6_ssub_7_dsub_5
12549 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12550 0, // ssub_6_ssub_7_dsub_5_dsub_7
12551 0, // ssub_6_ssub_7_ssub_8_ssub_9
12552 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12553 0, // ssub_8_ssub_9_ssub_12_ssub_13
12554 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12555 0, // dsub_5_dsub_7
12556 0, // dsub_5_ssub_12_ssub_13_dsub_7
12557 0, // dsub_5_ssub_12_ssub_13
12558 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12559 },
12560 { // GPRPair_with_gsub_0_in_tcGPR
12561 0, // dsub_0
12562 0, // dsub_1
12563 0, // dsub_2
12564 0, // dsub_3
12565 0, // dsub_4
12566 0, // dsub_5
12567 0, // dsub_6
12568 0, // dsub_7
12569 58, // gsub_0 -> GPRPair_with_gsub_0_in_tcGPR
12570 58, // gsub_1 -> GPRPair_with_gsub_0_in_tcGPR
12571 0, // qqsub_0
12572 0, // qqsub_1
12573 0, // qsub_0
12574 0, // qsub_1
12575 0, // qsub_2
12576 0, // qsub_3
12577 0, // ssub_0
12578 0, // ssub_1
12579 0, // ssub_2
12580 0, // ssub_3
12581 0, // ssub_4
12582 0, // ssub_5
12583 0, // ssub_6
12584 0, // ssub_7
12585 0, // ssub_8
12586 0, // ssub_9
12587 0, // ssub_10
12588 0, // ssub_11
12589 0, // ssub_12
12590 0, // ssub_13
12591 0, // ssub_14
12592 0, // ssub_15
12593 0, // ssub_0_ssub_1_ssub_4_ssub_5
12594 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12595 0, // ssub_2_ssub_3_ssub_6_ssub_7
12596 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12597 0, // ssub_2_ssub_3_ssub_4_ssub_5
12598 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12599 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12600 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12601 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12602 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12603 0, // ssub_4_ssub_5_ssub_8_ssub_9
12604 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12605 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12606 0, // ssub_6_ssub_7_dsub_5
12607 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12608 0, // ssub_6_ssub_7_dsub_5_dsub_7
12609 0, // ssub_6_ssub_7_ssub_8_ssub_9
12610 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12611 0, // ssub_8_ssub_9_ssub_12_ssub_13
12612 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12613 0, // dsub_5_dsub_7
12614 0, // dsub_5_ssub_12_ssub_13_dsub_7
12615 0, // dsub_5_ssub_12_ssub_13
12616 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12617 },
12618 { // GPRPair_with_gsub_0_in_tcGPRnotr12
12619 0, // dsub_0
12620 0, // dsub_1
12621 0, // dsub_2
12622 0, // dsub_3
12623 0, // dsub_4
12624 0, // dsub_5
12625 0, // dsub_6
12626 0, // dsub_7
12627 59, // gsub_0 -> GPRPair_with_gsub_0_in_tcGPRnotr12
12628 59, // gsub_1 -> GPRPair_with_gsub_0_in_tcGPRnotr12
12629 0, // qqsub_0
12630 0, // qqsub_1
12631 0, // qsub_0
12632 0, // qsub_1
12633 0, // qsub_2
12634 0, // qsub_3
12635 0, // ssub_0
12636 0, // ssub_1
12637 0, // ssub_2
12638 0, // ssub_3
12639 0, // ssub_4
12640 0, // ssub_5
12641 0, // ssub_6
12642 0, // ssub_7
12643 0, // ssub_8
12644 0, // ssub_9
12645 0, // ssub_10
12646 0, // ssub_11
12647 0, // ssub_12
12648 0, // ssub_13
12649 0, // ssub_14
12650 0, // ssub_15
12651 0, // ssub_0_ssub_1_ssub_4_ssub_5
12652 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12653 0, // ssub_2_ssub_3_ssub_6_ssub_7
12654 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12655 0, // ssub_2_ssub_3_ssub_4_ssub_5
12656 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12657 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12658 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12659 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12660 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12661 0, // ssub_4_ssub_5_ssub_8_ssub_9
12662 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12663 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12664 0, // ssub_6_ssub_7_dsub_5
12665 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12666 0, // ssub_6_ssub_7_dsub_5_dsub_7
12667 0, // ssub_6_ssub_7_ssub_8_ssub_9
12668 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12669 0, // ssub_8_ssub_9_ssub_12_ssub_13
12670 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12671 0, // dsub_5_dsub_7
12672 0, // dsub_5_ssub_12_ssub_13_dsub_7
12673 0, // dsub_5_ssub_12_ssub_13
12674 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12675 },
12676 { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
12677 0, // dsub_0
12678 0, // dsub_1
12679 0, // dsub_2
12680 0, // dsub_3
12681 0, // dsub_4
12682 0, // dsub_5
12683 0, // dsub_6
12684 0, // dsub_7
12685 60, // gsub_0 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
12686 60, // gsub_1 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
12687 0, // qqsub_0
12688 0, // qqsub_1
12689 0, // qsub_0
12690 0, // qsub_1
12691 0, // qsub_2
12692 0, // qsub_3
12693 0, // ssub_0
12694 0, // ssub_1
12695 0, // ssub_2
12696 0, // ssub_3
12697 0, // ssub_4
12698 0, // ssub_5
12699 0, // ssub_6
12700 0, // ssub_7
12701 0, // ssub_8
12702 0, // ssub_9
12703 0, // ssub_10
12704 0, // ssub_11
12705 0, // ssub_12
12706 0, // ssub_13
12707 0, // ssub_14
12708 0, // ssub_15
12709 0, // ssub_0_ssub_1_ssub_4_ssub_5
12710 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12711 0, // ssub_2_ssub_3_ssub_6_ssub_7
12712 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12713 0, // ssub_2_ssub_3_ssub_4_ssub_5
12714 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12715 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12716 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12717 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12718 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12719 0, // ssub_4_ssub_5_ssub_8_ssub_9
12720 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12721 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12722 0, // ssub_6_ssub_7_dsub_5
12723 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12724 0, // ssub_6_ssub_7_dsub_5_dsub_7
12725 0, // ssub_6_ssub_7_ssub_8_ssub_9
12726 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12727 0, // ssub_8_ssub_9_ssub_12_ssub_13
12728 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12729 0, // dsub_5_dsub_7
12730 0, // dsub_5_ssub_12_ssub_13_dsub_7
12731 0, // dsub_5_ssub_12_ssub_13
12732 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12733 },
12734 { // GPRPair_with_gsub_1_in_GPRsp
12735 0, // dsub_0
12736 0, // dsub_1
12737 0, // dsub_2
12738 0, // dsub_3
12739 0, // dsub_4
12740 0, // dsub_5
12741 0, // dsub_6
12742 0, // dsub_7
12743 61, // gsub_0 -> GPRPair_with_gsub_1_in_GPRsp
12744 61, // gsub_1 -> GPRPair_with_gsub_1_in_GPRsp
12745 0, // qqsub_0
12746 0, // qqsub_1
12747 0, // qsub_0
12748 0, // qsub_1
12749 0, // qsub_2
12750 0, // qsub_3
12751 0, // ssub_0
12752 0, // ssub_1
12753 0, // ssub_2
12754 0, // ssub_3
12755 0, // ssub_4
12756 0, // ssub_5
12757 0, // ssub_6
12758 0, // ssub_7
12759 0, // ssub_8
12760 0, // ssub_9
12761 0, // ssub_10
12762 0, // ssub_11
12763 0, // ssub_12
12764 0, // ssub_13
12765 0, // ssub_14
12766 0, // ssub_15
12767 0, // ssub_0_ssub_1_ssub_4_ssub_5
12768 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12769 0, // ssub_2_ssub_3_ssub_6_ssub_7
12770 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12771 0, // ssub_2_ssub_3_ssub_4_ssub_5
12772 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12773 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12774 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12775 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12776 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12777 0, // ssub_4_ssub_5_ssub_8_ssub_9
12778 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12779 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12780 0, // ssub_6_ssub_7_dsub_5
12781 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12782 0, // ssub_6_ssub_7_dsub_5_dsub_7
12783 0, // ssub_6_ssub_7_ssub_8_ssub_9
12784 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12785 0, // ssub_8_ssub_9_ssub_12_ssub_13
12786 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12787 0, // dsub_5_dsub_7
12788 0, // dsub_5_ssub_12_ssub_13_dsub_7
12789 0, // dsub_5_ssub_12_ssub_13
12790 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12791 },
12792 { // DPairSpc
12793 62, // dsub_0 -> DPairSpc
12794 0, // dsub_1
12795 62, // dsub_2 -> DPairSpc
12796 0, // dsub_3
12797 0, // dsub_4
12798 0, // dsub_5
12799 0, // dsub_6
12800 0, // dsub_7
12801 0, // gsub_0
12802 0, // gsub_1
12803 0, // qqsub_0
12804 0, // qqsub_1
12805 0, // qsub_0
12806 0, // qsub_1
12807 0, // qsub_2
12808 0, // qsub_3
12809 63, // ssub_0 -> DPairSpc_with_ssub_0
12810 63, // ssub_1 -> DPairSpc_with_ssub_0
12811 0, // ssub_2
12812 0, // ssub_3
12813 64, // ssub_4 -> DPairSpc_with_ssub_4
12814 64, // ssub_5 -> DPairSpc_with_ssub_4
12815 0, // ssub_6
12816 0, // ssub_7
12817 0, // ssub_8
12818 0, // ssub_9
12819 0, // ssub_10
12820 0, // ssub_11
12821 0, // ssub_12
12822 0, // ssub_13
12823 0, // ssub_14
12824 0, // ssub_15
12825 0, // ssub_0_ssub_1_ssub_4_ssub_5
12826 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12827 0, // ssub_2_ssub_3_ssub_6_ssub_7
12828 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12829 0, // ssub_2_ssub_3_ssub_4_ssub_5
12830 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12831 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12832 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12833 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12834 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12835 0, // ssub_4_ssub_5_ssub_8_ssub_9
12836 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12837 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12838 0, // ssub_6_ssub_7_dsub_5
12839 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12840 0, // ssub_6_ssub_7_dsub_5_dsub_7
12841 0, // ssub_6_ssub_7_ssub_8_ssub_9
12842 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12843 0, // ssub_8_ssub_9_ssub_12_ssub_13
12844 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12845 0, // dsub_5_dsub_7
12846 0, // dsub_5_ssub_12_ssub_13_dsub_7
12847 0, // dsub_5_ssub_12_ssub_13
12848 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12849 },
12850 { // DPairSpc_with_ssub_0
12851 63, // dsub_0 -> DPairSpc_with_ssub_0
12852 0, // dsub_1
12853 63, // dsub_2 -> DPairSpc_with_ssub_0
12854 0, // dsub_3
12855 0, // dsub_4
12856 0, // dsub_5
12857 0, // dsub_6
12858 0, // dsub_7
12859 0, // gsub_0
12860 0, // gsub_1
12861 0, // qqsub_0
12862 0, // qqsub_1
12863 0, // qsub_0
12864 0, // qsub_1
12865 0, // qsub_2
12866 0, // qsub_3
12867 63, // ssub_0 -> DPairSpc_with_ssub_0
12868 63, // ssub_1 -> DPairSpc_with_ssub_0
12869 0, // ssub_2
12870 0, // ssub_3
12871 64, // ssub_4 -> DPairSpc_with_ssub_4
12872 64, // ssub_5 -> DPairSpc_with_ssub_4
12873 0, // ssub_6
12874 0, // ssub_7
12875 0, // ssub_8
12876 0, // ssub_9
12877 0, // ssub_10
12878 0, // ssub_11
12879 0, // ssub_12
12880 0, // ssub_13
12881 0, // ssub_14
12882 0, // ssub_15
12883 0, // ssub_0_ssub_1_ssub_4_ssub_5
12884 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12885 0, // ssub_2_ssub_3_ssub_6_ssub_7
12886 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12887 0, // ssub_2_ssub_3_ssub_4_ssub_5
12888 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12889 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12890 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12891 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12892 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12893 0, // ssub_4_ssub_5_ssub_8_ssub_9
12894 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12895 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12896 0, // ssub_6_ssub_7_dsub_5
12897 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12898 0, // ssub_6_ssub_7_dsub_5_dsub_7
12899 0, // ssub_6_ssub_7_ssub_8_ssub_9
12900 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12901 0, // ssub_8_ssub_9_ssub_12_ssub_13
12902 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12903 0, // dsub_5_dsub_7
12904 0, // dsub_5_ssub_12_ssub_13_dsub_7
12905 0, // dsub_5_ssub_12_ssub_13
12906 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12907 },
12908 { // DPairSpc_with_ssub_4
12909 64, // dsub_0 -> DPairSpc_with_ssub_4
12910 0, // dsub_1
12911 64, // dsub_2 -> DPairSpc_with_ssub_4
12912 0, // dsub_3
12913 0, // dsub_4
12914 0, // dsub_5
12915 0, // dsub_6
12916 0, // dsub_7
12917 0, // gsub_0
12918 0, // gsub_1
12919 0, // qqsub_0
12920 0, // qqsub_1
12921 0, // qsub_0
12922 0, // qsub_1
12923 0, // qsub_2
12924 0, // qsub_3
12925 64, // ssub_0 -> DPairSpc_with_ssub_4
12926 64, // ssub_1 -> DPairSpc_with_ssub_4
12927 0, // ssub_2
12928 0, // ssub_3
12929 64, // ssub_4 -> DPairSpc_with_ssub_4
12930 64, // ssub_5 -> DPairSpc_with_ssub_4
12931 0, // ssub_6
12932 0, // ssub_7
12933 0, // ssub_8
12934 0, // ssub_9
12935 0, // ssub_10
12936 0, // ssub_11
12937 0, // ssub_12
12938 0, // ssub_13
12939 0, // ssub_14
12940 0, // ssub_15
12941 0, // ssub_0_ssub_1_ssub_4_ssub_5
12942 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
12943 0, // ssub_2_ssub_3_ssub_6_ssub_7
12944 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
12945 0, // ssub_2_ssub_3_ssub_4_ssub_5
12946 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
12947 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12948 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
12949 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
12950 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12951 0, // ssub_4_ssub_5_ssub_8_ssub_9
12952 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
12953 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
12954 0, // ssub_6_ssub_7_dsub_5
12955 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
12956 0, // ssub_6_ssub_7_dsub_5_dsub_7
12957 0, // ssub_6_ssub_7_ssub_8_ssub_9
12958 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12959 0, // ssub_8_ssub_9_ssub_12_ssub_13
12960 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
12961 0, // dsub_5_dsub_7
12962 0, // dsub_5_ssub_12_ssub_13_dsub_7
12963 0, // dsub_5_ssub_12_ssub_13
12964 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
12965 },
12966 { // DPairSpc_with_dsub_0_in_DPR_8
12967 65, // dsub_0 -> DPairSpc_with_dsub_0_in_DPR_8
12968 0, // dsub_1
12969 65, // dsub_2 -> DPairSpc_with_dsub_0_in_DPR_8
12970 0, // dsub_3
12971 0, // dsub_4
12972 0, // dsub_5
12973 0, // dsub_6
12974 0, // dsub_7
12975 0, // gsub_0
12976 0, // gsub_1
12977 0, // qqsub_0
12978 0, // qqsub_1
12979 0, // qsub_0
12980 0, // qsub_1
12981 0, // qsub_2
12982 0, // qsub_3
12983 65, // ssub_0 -> DPairSpc_with_dsub_0_in_DPR_8
12984 65, // ssub_1 -> DPairSpc_with_dsub_0_in_DPR_8
12985 0, // ssub_2
12986 0, // ssub_3
12987 65, // ssub_4 -> DPairSpc_with_dsub_0_in_DPR_8
12988 65, // ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
12989 0, // ssub_6
12990 0, // ssub_7
12991 0, // ssub_8
12992 0, // ssub_9
12993 0, // ssub_10
12994 0, // ssub_11
12995 0, // ssub_12
12996 0, // ssub_13
12997 0, // ssub_14
12998 0, // ssub_15
12999 0, // ssub_0_ssub_1_ssub_4_ssub_5
13000 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13001 0, // ssub_2_ssub_3_ssub_6_ssub_7
13002 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13003 0, // ssub_2_ssub_3_ssub_4_ssub_5
13004 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13005 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13006 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13007 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13008 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13009 0, // ssub_4_ssub_5_ssub_8_ssub_9
13010 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13011 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13012 0, // ssub_6_ssub_7_dsub_5
13013 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13014 0, // ssub_6_ssub_7_dsub_5_dsub_7
13015 0, // ssub_6_ssub_7_ssub_8_ssub_9
13016 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13017 0, // ssub_8_ssub_9_ssub_12_ssub_13
13018 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13019 0, // dsub_5_dsub_7
13020 0, // dsub_5_ssub_12_ssub_13_dsub_7
13021 0, // dsub_5_ssub_12_ssub_13
13022 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13023 },
13024 { // DPairSpc_with_dsub_2_in_DPR_8
13025 66, // dsub_0 -> DPairSpc_with_dsub_2_in_DPR_8
13026 0, // dsub_1
13027 66, // dsub_2 -> DPairSpc_with_dsub_2_in_DPR_8
13028 0, // dsub_3
13029 0, // dsub_4
13030 0, // dsub_5
13031 0, // dsub_6
13032 0, // dsub_7
13033 0, // gsub_0
13034 0, // gsub_1
13035 0, // qqsub_0
13036 0, // qqsub_1
13037 0, // qsub_0
13038 0, // qsub_1
13039 0, // qsub_2
13040 0, // qsub_3
13041 66, // ssub_0 -> DPairSpc_with_dsub_2_in_DPR_8
13042 66, // ssub_1 -> DPairSpc_with_dsub_2_in_DPR_8
13043 0, // ssub_2
13044 0, // ssub_3
13045 66, // ssub_4 -> DPairSpc_with_dsub_2_in_DPR_8
13046 66, // ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
13047 0, // ssub_6
13048 0, // ssub_7
13049 0, // ssub_8
13050 0, // ssub_9
13051 0, // ssub_10
13052 0, // ssub_11
13053 0, // ssub_12
13054 0, // ssub_13
13055 0, // ssub_14
13056 0, // ssub_15
13057 0, // ssub_0_ssub_1_ssub_4_ssub_5
13058 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13059 0, // ssub_2_ssub_3_ssub_6_ssub_7
13060 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13061 0, // ssub_2_ssub_3_ssub_4_ssub_5
13062 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13063 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13064 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13065 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13066 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13067 0, // ssub_4_ssub_5_ssub_8_ssub_9
13068 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13069 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13070 0, // ssub_6_ssub_7_dsub_5
13071 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13072 0, // ssub_6_ssub_7_dsub_5_dsub_7
13073 0, // ssub_6_ssub_7_ssub_8_ssub_9
13074 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13075 0, // ssub_8_ssub_9_ssub_12_ssub_13
13076 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13077 0, // dsub_5_dsub_7
13078 0, // dsub_5_ssub_12_ssub_13_dsub_7
13079 0, // dsub_5_ssub_12_ssub_13
13080 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13081 },
13082 { // DPair
13083 67, // dsub_0 -> DPair
13084 67, // dsub_1 -> DPair
13085 0, // dsub_2
13086 0, // dsub_3
13087 0, // dsub_4
13088 0, // dsub_5
13089 0, // dsub_6
13090 0, // dsub_7
13091 0, // gsub_0
13092 0, // gsub_1
13093 0, // qqsub_0
13094 0, // qqsub_1
13095 0, // qsub_0
13096 0, // qsub_1
13097 0, // qsub_2
13098 0, // qsub_3
13099 68, // ssub_0 -> DPair_with_ssub_0
13100 68, // ssub_1 -> DPair_with_ssub_0
13101 70, // ssub_2 -> DPair_with_ssub_2
13102 70, // ssub_3 -> DPair_with_ssub_2
13103 0, // ssub_4
13104 0, // ssub_5
13105 0, // ssub_6
13106 0, // ssub_7
13107 0, // ssub_8
13108 0, // ssub_9
13109 0, // ssub_10
13110 0, // ssub_11
13111 0, // ssub_12
13112 0, // ssub_13
13113 0, // ssub_14
13114 0, // ssub_15
13115 0, // ssub_0_ssub_1_ssub_4_ssub_5
13116 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13117 0, // ssub_2_ssub_3_ssub_6_ssub_7
13118 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13119 0, // ssub_2_ssub_3_ssub_4_ssub_5
13120 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13121 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13122 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13123 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13124 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13125 0, // ssub_4_ssub_5_ssub_8_ssub_9
13126 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13127 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13128 0, // ssub_6_ssub_7_dsub_5
13129 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13130 0, // ssub_6_ssub_7_dsub_5_dsub_7
13131 0, // ssub_6_ssub_7_ssub_8_ssub_9
13132 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13133 0, // ssub_8_ssub_9_ssub_12_ssub_13
13134 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13135 0, // dsub_5_dsub_7
13136 0, // dsub_5_ssub_12_ssub_13_dsub_7
13137 0, // dsub_5_ssub_12_ssub_13
13138 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13139 },
13140 { // DPair_with_ssub_0
13141 68, // dsub_0 -> DPair_with_ssub_0
13142 68, // dsub_1 -> DPair_with_ssub_0
13143 0, // dsub_2
13144 0, // dsub_3
13145 0, // dsub_4
13146 0, // dsub_5
13147 0, // dsub_6
13148 0, // dsub_7
13149 0, // gsub_0
13150 0, // gsub_1
13151 0, // qqsub_0
13152 0, // qqsub_1
13153 0, // qsub_0
13154 0, // qsub_1
13155 0, // qsub_2
13156 0, // qsub_3
13157 68, // ssub_0 -> DPair_with_ssub_0
13158 68, // ssub_1 -> DPair_with_ssub_0
13159 70, // ssub_2 -> DPair_with_ssub_2
13160 70, // ssub_3 -> DPair_with_ssub_2
13161 0, // ssub_4
13162 0, // ssub_5
13163 0, // ssub_6
13164 0, // ssub_7
13165 0, // ssub_8
13166 0, // ssub_9
13167 0, // ssub_10
13168 0, // ssub_11
13169 0, // ssub_12
13170 0, // ssub_13
13171 0, // ssub_14
13172 0, // ssub_15
13173 0, // ssub_0_ssub_1_ssub_4_ssub_5
13174 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13175 0, // ssub_2_ssub_3_ssub_6_ssub_7
13176 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13177 0, // ssub_2_ssub_3_ssub_4_ssub_5
13178 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13179 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13180 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13181 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13182 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13183 0, // ssub_4_ssub_5_ssub_8_ssub_9
13184 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13185 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13186 0, // ssub_6_ssub_7_dsub_5
13187 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13188 0, // ssub_6_ssub_7_dsub_5_dsub_7
13189 0, // ssub_6_ssub_7_ssub_8_ssub_9
13190 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13191 0, // ssub_8_ssub_9_ssub_12_ssub_13
13192 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13193 0, // dsub_5_dsub_7
13194 0, // dsub_5_ssub_12_ssub_13_dsub_7
13195 0, // dsub_5_ssub_12_ssub_13
13196 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13197 },
13198 { // QPR
13199 69, // dsub_0 -> QPR
13200 69, // dsub_1 -> QPR
13201 0, // dsub_2
13202 0, // dsub_3
13203 0, // dsub_4
13204 0, // dsub_5
13205 0, // dsub_6
13206 0, // dsub_7
13207 0, // gsub_0
13208 0, // gsub_1
13209 0, // qqsub_0
13210 0, // qqsub_1
13211 0, // qsub_0
13212 0, // qsub_1
13213 0, // qsub_2
13214 0, // qsub_3
13215 72, // ssub_0 -> MQPR
13216 72, // ssub_1 -> MQPR
13217 72, // ssub_2 -> MQPR
13218 72, // ssub_3 -> MQPR
13219 0, // ssub_4
13220 0, // ssub_5
13221 0, // ssub_6
13222 0, // ssub_7
13223 0, // ssub_8
13224 0, // ssub_9
13225 0, // ssub_10
13226 0, // ssub_11
13227 0, // ssub_12
13228 0, // ssub_13
13229 0, // ssub_14
13230 0, // ssub_15
13231 0, // ssub_0_ssub_1_ssub_4_ssub_5
13232 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13233 0, // ssub_2_ssub_3_ssub_6_ssub_7
13234 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13235 0, // ssub_2_ssub_3_ssub_4_ssub_5
13236 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13237 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13238 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13239 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13240 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13241 0, // ssub_4_ssub_5_ssub_8_ssub_9
13242 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13243 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13244 0, // ssub_6_ssub_7_dsub_5
13245 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13246 0, // ssub_6_ssub_7_dsub_5_dsub_7
13247 0, // ssub_6_ssub_7_ssub_8_ssub_9
13248 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13249 0, // ssub_8_ssub_9_ssub_12_ssub_13
13250 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13251 0, // dsub_5_dsub_7
13252 0, // dsub_5_ssub_12_ssub_13_dsub_7
13253 0, // dsub_5_ssub_12_ssub_13
13254 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13255 },
13256 { // DPair_with_ssub_2
13257 70, // dsub_0 -> DPair_with_ssub_2
13258 70, // dsub_1 -> DPair_with_ssub_2
13259 0, // dsub_2
13260 0, // dsub_3
13261 0, // dsub_4
13262 0, // dsub_5
13263 0, // dsub_6
13264 0, // dsub_7
13265 0, // gsub_0
13266 0, // gsub_1
13267 0, // qqsub_0
13268 0, // qqsub_1
13269 0, // qsub_0
13270 0, // qsub_1
13271 0, // qsub_2
13272 0, // qsub_3
13273 70, // ssub_0 -> DPair_with_ssub_2
13274 70, // ssub_1 -> DPair_with_ssub_2
13275 70, // ssub_2 -> DPair_with_ssub_2
13276 70, // ssub_3 -> DPair_with_ssub_2
13277 0, // ssub_4
13278 0, // ssub_5
13279 0, // ssub_6
13280 0, // ssub_7
13281 0, // ssub_8
13282 0, // ssub_9
13283 0, // ssub_10
13284 0, // ssub_11
13285 0, // ssub_12
13286 0, // ssub_13
13287 0, // ssub_14
13288 0, // ssub_15
13289 0, // ssub_0_ssub_1_ssub_4_ssub_5
13290 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13291 0, // ssub_2_ssub_3_ssub_6_ssub_7
13292 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13293 0, // ssub_2_ssub_3_ssub_4_ssub_5
13294 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13295 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13296 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13297 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13298 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13299 0, // ssub_4_ssub_5_ssub_8_ssub_9
13300 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13301 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13302 0, // ssub_6_ssub_7_dsub_5
13303 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13304 0, // ssub_6_ssub_7_dsub_5_dsub_7
13305 0, // ssub_6_ssub_7_ssub_8_ssub_9
13306 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13307 0, // ssub_8_ssub_9_ssub_12_ssub_13
13308 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13309 0, // dsub_5_dsub_7
13310 0, // dsub_5_ssub_12_ssub_13_dsub_7
13311 0, // dsub_5_ssub_12_ssub_13
13312 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13313 },
13314 { // DPair_with_dsub_0_in_DPR_8
13315 71, // dsub_0 -> DPair_with_dsub_0_in_DPR_8
13316 71, // dsub_1 -> DPair_with_dsub_0_in_DPR_8
13317 0, // dsub_2
13318 0, // dsub_3
13319 0, // dsub_4
13320 0, // dsub_5
13321 0, // dsub_6
13322 0, // dsub_7
13323 0, // gsub_0
13324 0, // gsub_1
13325 0, // qqsub_0
13326 0, // qqsub_1
13327 0, // qsub_0
13328 0, // qsub_1
13329 0, // qsub_2
13330 0, // qsub_3
13331 71, // ssub_0 -> DPair_with_dsub_0_in_DPR_8
13332 71, // ssub_1 -> DPair_with_dsub_0_in_DPR_8
13333 71, // ssub_2 -> DPair_with_dsub_0_in_DPR_8
13334 71, // ssub_3 -> DPair_with_dsub_0_in_DPR_8
13335 0, // ssub_4
13336 0, // ssub_5
13337 0, // ssub_6
13338 0, // ssub_7
13339 0, // ssub_8
13340 0, // ssub_9
13341 0, // ssub_10
13342 0, // ssub_11
13343 0, // ssub_12
13344 0, // ssub_13
13345 0, // ssub_14
13346 0, // ssub_15
13347 0, // ssub_0_ssub_1_ssub_4_ssub_5
13348 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13349 0, // ssub_2_ssub_3_ssub_6_ssub_7
13350 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13351 0, // ssub_2_ssub_3_ssub_4_ssub_5
13352 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13353 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13354 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13355 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13356 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13357 0, // ssub_4_ssub_5_ssub_8_ssub_9
13358 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13359 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13360 0, // ssub_6_ssub_7_dsub_5
13361 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13362 0, // ssub_6_ssub_7_dsub_5_dsub_7
13363 0, // ssub_6_ssub_7_ssub_8_ssub_9
13364 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13365 0, // ssub_8_ssub_9_ssub_12_ssub_13
13366 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13367 0, // dsub_5_dsub_7
13368 0, // dsub_5_ssub_12_ssub_13_dsub_7
13369 0, // dsub_5_ssub_12_ssub_13
13370 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13371 },
13372 { // MQPR
13373 72, // dsub_0 -> MQPR
13374 72, // dsub_1 -> MQPR
13375 0, // dsub_2
13376 0, // dsub_3
13377 0, // dsub_4
13378 0, // dsub_5
13379 0, // dsub_6
13380 0, // dsub_7
13381 0, // gsub_0
13382 0, // gsub_1
13383 0, // qqsub_0
13384 0, // qqsub_1
13385 0, // qsub_0
13386 0, // qsub_1
13387 0, // qsub_2
13388 0, // qsub_3
13389 72, // ssub_0 -> MQPR
13390 72, // ssub_1 -> MQPR
13391 72, // ssub_2 -> MQPR
13392 72, // ssub_3 -> MQPR
13393 0, // ssub_4
13394 0, // ssub_5
13395 0, // ssub_6
13396 0, // ssub_7
13397 0, // ssub_8
13398 0, // ssub_9
13399 0, // ssub_10
13400 0, // ssub_11
13401 0, // ssub_12
13402 0, // ssub_13
13403 0, // ssub_14
13404 0, // ssub_15
13405 0, // ssub_0_ssub_1_ssub_4_ssub_5
13406 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13407 0, // ssub_2_ssub_3_ssub_6_ssub_7
13408 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13409 0, // ssub_2_ssub_3_ssub_4_ssub_5
13410 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13411 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13412 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13413 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13414 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13415 0, // ssub_4_ssub_5_ssub_8_ssub_9
13416 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13417 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13418 0, // ssub_6_ssub_7_dsub_5
13419 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13420 0, // ssub_6_ssub_7_dsub_5_dsub_7
13421 0, // ssub_6_ssub_7_ssub_8_ssub_9
13422 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13423 0, // ssub_8_ssub_9_ssub_12_ssub_13
13424 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13425 0, // dsub_5_dsub_7
13426 0, // dsub_5_ssub_12_ssub_13_dsub_7
13427 0, // dsub_5_ssub_12_ssub_13
13428 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13429 },
13430 { // QPR_VFP2
13431 73, // dsub_0 -> QPR_VFP2
13432 73, // dsub_1 -> QPR_VFP2
13433 0, // dsub_2
13434 0, // dsub_3
13435 0, // dsub_4
13436 0, // dsub_5
13437 0, // dsub_6
13438 0, // dsub_7
13439 0, // gsub_0
13440 0, // gsub_1
13441 0, // qqsub_0
13442 0, // qqsub_1
13443 0, // qsub_0
13444 0, // qsub_1
13445 0, // qsub_2
13446 0, // qsub_3
13447 73, // ssub_0 -> QPR_VFP2
13448 73, // ssub_1 -> QPR_VFP2
13449 73, // ssub_2 -> QPR_VFP2
13450 73, // ssub_3 -> QPR_VFP2
13451 0, // ssub_4
13452 0, // ssub_5
13453 0, // ssub_6
13454 0, // ssub_7
13455 0, // ssub_8
13456 0, // ssub_9
13457 0, // ssub_10
13458 0, // ssub_11
13459 0, // ssub_12
13460 0, // ssub_13
13461 0, // ssub_14
13462 0, // ssub_15
13463 0, // ssub_0_ssub_1_ssub_4_ssub_5
13464 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13465 0, // ssub_2_ssub_3_ssub_6_ssub_7
13466 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13467 0, // ssub_2_ssub_3_ssub_4_ssub_5
13468 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13469 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13470 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13471 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13472 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13473 0, // ssub_4_ssub_5_ssub_8_ssub_9
13474 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13475 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13476 0, // ssub_6_ssub_7_dsub_5
13477 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13478 0, // ssub_6_ssub_7_dsub_5_dsub_7
13479 0, // ssub_6_ssub_7_ssub_8_ssub_9
13480 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13481 0, // ssub_8_ssub_9_ssub_12_ssub_13
13482 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13483 0, // dsub_5_dsub_7
13484 0, // dsub_5_ssub_12_ssub_13_dsub_7
13485 0, // dsub_5_ssub_12_ssub_13
13486 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13487 },
13488 { // DPair_with_dsub_1_in_DPR_8
13489 74, // dsub_0 -> DPair_with_dsub_1_in_DPR_8
13490 74, // dsub_1 -> DPair_with_dsub_1_in_DPR_8
13491 0, // dsub_2
13492 0, // dsub_3
13493 0, // dsub_4
13494 0, // dsub_5
13495 0, // dsub_6
13496 0, // dsub_7
13497 0, // gsub_0
13498 0, // gsub_1
13499 0, // qqsub_0
13500 0, // qqsub_1
13501 0, // qsub_0
13502 0, // qsub_1
13503 0, // qsub_2
13504 0, // qsub_3
13505 74, // ssub_0 -> DPair_with_dsub_1_in_DPR_8
13506 74, // ssub_1 -> DPair_with_dsub_1_in_DPR_8
13507 74, // ssub_2 -> DPair_with_dsub_1_in_DPR_8
13508 74, // ssub_3 -> DPair_with_dsub_1_in_DPR_8
13509 0, // ssub_4
13510 0, // ssub_5
13511 0, // ssub_6
13512 0, // ssub_7
13513 0, // ssub_8
13514 0, // ssub_9
13515 0, // ssub_10
13516 0, // ssub_11
13517 0, // ssub_12
13518 0, // ssub_13
13519 0, // ssub_14
13520 0, // ssub_15
13521 0, // ssub_0_ssub_1_ssub_4_ssub_5
13522 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13523 0, // ssub_2_ssub_3_ssub_6_ssub_7
13524 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13525 0, // ssub_2_ssub_3_ssub_4_ssub_5
13526 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13527 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13528 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13529 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13530 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13531 0, // ssub_4_ssub_5_ssub_8_ssub_9
13532 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13533 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13534 0, // ssub_6_ssub_7_dsub_5
13535 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13536 0, // ssub_6_ssub_7_dsub_5_dsub_7
13537 0, // ssub_6_ssub_7_ssub_8_ssub_9
13538 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13539 0, // ssub_8_ssub_9_ssub_12_ssub_13
13540 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13541 0, // dsub_5_dsub_7
13542 0, // dsub_5_ssub_12_ssub_13_dsub_7
13543 0, // dsub_5_ssub_12_ssub_13
13544 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13545 },
13546 { // QPR_8
13547 75, // dsub_0 -> QPR_8
13548 75, // dsub_1 -> QPR_8
13549 0, // dsub_2
13550 0, // dsub_3
13551 0, // dsub_4
13552 0, // dsub_5
13553 0, // dsub_6
13554 0, // dsub_7
13555 0, // gsub_0
13556 0, // gsub_1
13557 0, // qqsub_0
13558 0, // qqsub_1
13559 0, // qsub_0
13560 0, // qsub_1
13561 0, // qsub_2
13562 0, // qsub_3
13563 75, // ssub_0 -> QPR_8
13564 75, // ssub_1 -> QPR_8
13565 75, // ssub_2 -> QPR_8
13566 75, // ssub_3 -> QPR_8
13567 0, // ssub_4
13568 0, // ssub_5
13569 0, // ssub_6
13570 0, // ssub_7
13571 0, // ssub_8
13572 0, // ssub_9
13573 0, // ssub_10
13574 0, // ssub_11
13575 0, // ssub_12
13576 0, // ssub_13
13577 0, // ssub_14
13578 0, // ssub_15
13579 0, // ssub_0_ssub_1_ssub_4_ssub_5
13580 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13581 0, // ssub_2_ssub_3_ssub_6_ssub_7
13582 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13583 0, // ssub_2_ssub_3_ssub_4_ssub_5
13584 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13585 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13586 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13587 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13588 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13589 0, // ssub_4_ssub_5_ssub_8_ssub_9
13590 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13591 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13592 0, // ssub_6_ssub_7_dsub_5
13593 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13594 0, // ssub_6_ssub_7_dsub_5_dsub_7
13595 0, // ssub_6_ssub_7_ssub_8_ssub_9
13596 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13597 0, // ssub_8_ssub_9_ssub_12_ssub_13
13598 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13599 0, // dsub_5_dsub_7
13600 0, // dsub_5_ssub_12_ssub_13_dsub_7
13601 0, // dsub_5_ssub_12_ssub_13
13602 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13603 },
13604 { // DTriple
13605 76, // dsub_0 -> DTriple
13606 76, // dsub_1 -> DTriple
13607 76, // dsub_2 -> DTriple
13608 0, // dsub_3
13609 0, // dsub_4
13610 0, // dsub_5
13611 0, // dsub_6
13612 0, // dsub_7
13613 0, // gsub_0
13614 0, // gsub_1
13615 0, // qqsub_0
13616 0, // qqsub_1
13617 76, // qsub_0 -> DTriple
13618 0, // qsub_1
13619 0, // qsub_2
13620 0, // qsub_3
13621 79, // ssub_0 -> DTriple_with_ssub_0
13622 79, // ssub_1 -> DTriple_with_ssub_0
13623 81, // ssub_2 -> DTriple_with_ssub_2
13624 81, // ssub_3 -> DTriple_with_ssub_2
13625 84, // ssub_4 -> DTriple_with_ssub_4
13626 84, // ssub_5 -> DTriple_with_ssub_4
13627 0, // ssub_6
13628 0, // ssub_7
13629 0, // ssub_8
13630 0, // ssub_9
13631 0, // ssub_10
13632 0, // ssub_11
13633 0, // ssub_12
13634 0, // ssub_13
13635 0, // ssub_14
13636 0, // ssub_15
13637 76, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple
13638 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13639 0, // ssub_2_ssub_3_ssub_6_ssub_7
13640 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13641 76, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple
13642 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13643 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13644 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13645 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13646 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13647 0, // ssub_4_ssub_5_ssub_8_ssub_9
13648 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13649 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13650 0, // ssub_6_ssub_7_dsub_5
13651 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13652 0, // ssub_6_ssub_7_dsub_5_dsub_7
13653 0, // ssub_6_ssub_7_ssub_8_ssub_9
13654 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13655 0, // ssub_8_ssub_9_ssub_12_ssub_13
13656 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13657 0, // dsub_5_dsub_7
13658 0, // dsub_5_ssub_12_ssub_13_dsub_7
13659 0, // dsub_5_ssub_12_ssub_13
13660 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13661 },
13662 { // DTripleSpc
13663 77, // dsub_0 -> DTripleSpc
13664 0, // dsub_1
13665 77, // dsub_2 -> DTripleSpc
13666 0, // dsub_3
13667 77, // dsub_4 -> DTripleSpc
13668 0, // dsub_5
13669 0, // dsub_6
13670 0, // dsub_7
13671 0, // gsub_0
13672 0, // gsub_1
13673 0, // qqsub_0
13674 0, // qqsub_1
13675 0, // qsub_0
13676 0, // qsub_1
13677 0, // qsub_2
13678 0, // qsub_3
13679 78, // ssub_0 -> DTripleSpc_with_ssub_0
13680 78, // ssub_1 -> DTripleSpc_with_ssub_0
13681 0, // ssub_2
13682 0, // ssub_3
13683 83, // ssub_4 -> DTripleSpc_with_ssub_4
13684 83, // ssub_5 -> DTripleSpc_with_ssub_4
13685 0, // ssub_6
13686 0, // ssub_7
13687 85, // ssub_8 -> DTripleSpc_with_ssub_8
13688 85, // ssub_9 -> DTripleSpc_with_ssub_8
13689 0, // ssub_10
13690 0, // ssub_11
13691 0, // ssub_12
13692 0, // ssub_13
13693 0, // ssub_14
13694 0, // ssub_15
13695 77, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc
13696 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13697 0, // ssub_2_ssub_3_ssub_6_ssub_7
13698 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13699 0, // ssub_2_ssub_3_ssub_4_ssub_5
13700 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13701 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13702 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13703 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13704 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13705 77, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc
13706 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13707 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13708 0, // ssub_6_ssub_7_dsub_5
13709 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13710 0, // ssub_6_ssub_7_dsub_5_dsub_7
13711 0, // ssub_6_ssub_7_ssub_8_ssub_9
13712 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13713 0, // ssub_8_ssub_9_ssub_12_ssub_13
13714 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13715 0, // dsub_5_dsub_7
13716 0, // dsub_5_ssub_12_ssub_13_dsub_7
13717 0, // dsub_5_ssub_12_ssub_13
13718 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13719 },
13720 { // DTripleSpc_with_ssub_0
13721 78, // dsub_0 -> DTripleSpc_with_ssub_0
13722 0, // dsub_1
13723 78, // dsub_2 -> DTripleSpc_with_ssub_0
13724 0, // dsub_3
13725 78, // dsub_4 -> DTripleSpc_with_ssub_0
13726 0, // dsub_5
13727 0, // dsub_6
13728 0, // dsub_7
13729 0, // gsub_0
13730 0, // gsub_1
13731 0, // qqsub_0
13732 0, // qqsub_1
13733 0, // qsub_0
13734 0, // qsub_1
13735 0, // qsub_2
13736 0, // qsub_3
13737 78, // ssub_0 -> DTripleSpc_with_ssub_0
13738 78, // ssub_1 -> DTripleSpc_with_ssub_0
13739 0, // ssub_2
13740 0, // ssub_3
13741 83, // ssub_4 -> DTripleSpc_with_ssub_4
13742 83, // ssub_5 -> DTripleSpc_with_ssub_4
13743 0, // ssub_6
13744 0, // ssub_7
13745 85, // ssub_8 -> DTripleSpc_with_ssub_8
13746 85, // ssub_9 -> DTripleSpc_with_ssub_8
13747 0, // ssub_10
13748 0, // ssub_11
13749 0, // ssub_12
13750 0, // ssub_13
13751 0, // ssub_14
13752 0, // ssub_15
13753 78, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_0
13754 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13755 0, // ssub_2_ssub_3_ssub_6_ssub_7
13756 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13757 0, // ssub_2_ssub_3_ssub_4_ssub_5
13758 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13759 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13760 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13761 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13762 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13763 78, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_0
13764 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13765 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13766 0, // ssub_6_ssub_7_dsub_5
13767 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13768 0, // ssub_6_ssub_7_dsub_5_dsub_7
13769 0, // ssub_6_ssub_7_ssub_8_ssub_9
13770 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13771 0, // ssub_8_ssub_9_ssub_12_ssub_13
13772 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13773 0, // dsub_5_dsub_7
13774 0, // dsub_5_ssub_12_ssub_13_dsub_7
13775 0, // dsub_5_ssub_12_ssub_13
13776 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13777 },
13778 { // DTriple_with_ssub_0
13779 79, // dsub_0 -> DTriple_with_ssub_0
13780 79, // dsub_1 -> DTriple_with_ssub_0
13781 79, // dsub_2 -> DTriple_with_ssub_0
13782 0, // dsub_3
13783 0, // dsub_4
13784 0, // dsub_5
13785 0, // dsub_6
13786 0, // dsub_7
13787 0, // gsub_0
13788 0, // gsub_1
13789 0, // qqsub_0
13790 0, // qqsub_1
13791 79, // qsub_0 -> DTriple_with_ssub_0
13792 0, // qsub_1
13793 0, // qsub_2
13794 0, // qsub_3
13795 79, // ssub_0 -> DTriple_with_ssub_0
13796 79, // ssub_1 -> DTriple_with_ssub_0
13797 81, // ssub_2 -> DTriple_with_ssub_2
13798 81, // ssub_3 -> DTriple_with_ssub_2
13799 84, // ssub_4 -> DTriple_with_ssub_4
13800 84, // ssub_5 -> DTriple_with_ssub_4
13801 0, // ssub_6
13802 0, // ssub_7
13803 0, // ssub_8
13804 0, // ssub_9
13805 0, // ssub_10
13806 0, // ssub_11
13807 0, // ssub_12
13808 0, // ssub_13
13809 0, // ssub_14
13810 0, // ssub_15
13811 79, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0
13812 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13813 0, // ssub_2_ssub_3_ssub_6_ssub_7
13814 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13815 79, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0
13816 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13817 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13818 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13819 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13820 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13821 0, // ssub_4_ssub_5_ssub_8_ssub_9
13822 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13823 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13824 0, // ssub_6_ssub_7_dsub_5
13825 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13826 0, // ssub_6_ssub_7_dsub_5_dsub_7
13827 0, // ssub_6_ssub_7_ssub_8_ssub_9
13828 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13829 0, // ssub_8_ssub_9_ssub_12_ssub_13
13830 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13831 0, // dsub_5_dsub_7
13832 0, // dsub_5_ssub_12_ssub_13_dsub_7
13833 0, // dsub_5_ssub_12_ssub_13
13834 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13835 },
13836 { // DTriple_with_qsub_0_in_QPR
13837 80, // dsub_0 -> DTriple_with_qsub_0_in_QPR
13838 80, // dsub_1 -> DTriple_with_qsub_0_in_QPR
13839 80, // dsub_2 -> DTriple_with_qsub_0_in_QPR
13840 0, // dsub_3
13841 0, // dsub_4
13842 0, // dsub_5
13843 0, // dsub_6
13844 0, // dsub_7
13845 0, // gsub_0
13846 0, // gsub_1
13847 0, // qqsub_0
13848 0, // qqsub_1
13849 80, // qsub_0 -> DTriple_with_qsub_0_in_QPR
13850 0, // qsub_1
13851 0, // qsub_2
13852 0, // qsub_3
13853 88, // ssub_0 -> DTriple_with_qsub_0_in_MQPR
13854 88, // ssub_1 -> DTriple_with_qsub_0_in_MQPR
13855 88, // ssub_2 -> DTriple_with_qsub_0_in_MQPR
13856 88, // ssub_3 -> DTriple_with_qsub_0_in_MQPR
13857 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
13858 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
13859 0, // ssub_6
13860 0, // ssub_7
13861 0, // ssub_8
13862 0, // ssub_9
13863 0, // ssub_10
13864 0, // ssub_11
13865 0, // ssub_12
13866 0, // ssub_13
13867 0, // ssub_14
13868 0, // ssub_15
13869 80, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR
13870 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13871 0, // ssub_2_ssub_3_ssub_6_ssub_7
13872 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13873 80, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR
13874 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13875 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13876 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13877 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13878 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13879 0, // ssub_4_ssub_5_ssub_8_ssub_9
13880 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13881 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13882 0, // ssub_6_ssub_7_dsub_5
13883 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13884 0, // ssub_6_ssub_7_dsub_5_dsub_7
13885 0, // ssub_6_ssub_7_ssub_8_ssub_9
13886 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13887 0, // ssub_8_ssub_9_ssub_12_ssub_13
13888 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13889 0, // dsub_5_dsub_7
13890 0, // dsub_5_ssub_12_ssub_13_dsub_7
13891 0, // dsub_5_ssub_12_ssub_13
13892 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13893 },
13894 { // DTriple_with_ssub_2
13895 81, // dsub_0 -> DTriple_with_ssub_2
13896 81, // dsub_1 -> DTriple_with_ssub_2
13897 81, // dsub_2 -> DTriple_with_ssub_2
13898 0, // dsub_3
13899 0, // dsub_4
13900 0, // dsub_5
13901 0, // dsub_6
13902 0, // dsub_7
13903 0, // gsub_0
13904 0, // gsub_1
13905 0, // qqsub_0
13906 0, // qqsub_1
13907 81, // qsub_0 -> DTriple_with_ssub_2
13908 0, // qsub_1
13909 0, // qsub_2
13910 0, // qsub_3
13911 81, // ssub_0 -> DTriple_with_ssub_2
13912 81, // ssub_1 -> DTriple_with_ssub_2
13913 81, // ssub_2 -> DTriple_with_ssub_2
13914 81, // ssub_3 -> DTriple_with_ssub_2
13915 84, // ssub_4 -> DTriple_with_ssub_4
13916 84, // ssub_5 -> DTriple_with_ssub_4
13917 0, // ssub_6
13918 0, // ssub_7
13919 0, // ssub_8
13920 0, // ssub_9
13921 0, // ssub_10
13922 0, // ssub_11
13923 0, // ssub_12
13924 0, // ssub_13
13925 0, // ssub_14
13926 0, // ssub_15
13927 81, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2
13928 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13929 0, // ssub_2_ssub_3_ssub_6_ssub_7
13930 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13931 81, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2
13932 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13933 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13934 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13935 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13936 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13937 0, // ssub_4_ssub_5_ssub_8_ssub_9
13938 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13939 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13940 0, // ssub_6_ssub_7_dsub_5
13941 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
13942 0, // ssub_6_ssub_7_dsub_5_dsub_7
13943 0, // ssub_6_ssub_7_ssub_8_ssub_9
13944 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13945 0, // ssub_8_ssub_9_ssub_12_ssub_13
13946 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
13947 0, // dsub_5_dsub_7
13948 0, // dsub_5_ssub_12_ssub_13_dsub_7
13949 0, // dsub_5_ssub_12_ssub_13
13950 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
13951 },
13952 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13953 82, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13954 82, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13955 82, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13956 0, // dsub_3
13957 0, // dsub_4
13958 0, // dsub_5
13959 0, // dsub_6
13960 0, // dsub_7
13961 0, // gsub_0
13962 0, // gsub_1
13963 0, // qqsub_0
13964 0, // qqsub_1
13965 82, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13966 0, // qsub_1
13967 0, // qsub_2
13968 0, // qsub_3
13969 89, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13970 89, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13971 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
13972 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
13973 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
13974 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
13975 0, // ssub_6
13976 0, // ssub_7
13977 0, // ssub_8
13978 0, // ssub_9
13979 0, // ssub_10
13980 0, // ssub_11
13981 0, // ssub_12
13982 0, // ssub_13
13983 0, // ssub_14
13984 0, // ssub_15
13985 82, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13986 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
13987 0, // ssub_2_ssub_3_ssub_6_ssub_7
13988 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
13989 82, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
13990 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
13991 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13992 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
13993 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
13994 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13995 0, // ssub_4_ssub_5_ssub_8_ssub_9
13996 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
13997 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
13998 0, // ssub_6_ssub_7_dsub_5
13999 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14000 0, // ssub_6_ssub_7_dsub_5_dsub_7
14001 0, // ssub_6_ssub_7_ssub_8_ssub_9
14002 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14003 0, // ssub_8_ssub_9_ssub_12_ssub_13
14004 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14005 0, // dsub_5_dsub_7
14006 0, // dsub_5_ssub_12_ssub_13_dsub_7
14007 0, // dsub_5_ssub_12_ssub_13
14008 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14009 },
14010 { // DTripleSpc_with_ssub_4
14011 83, // dsub_0 -> DTripleSpc_with_ssub_4
14012 0, // dsub_1
14013 83, // dsub_2 -> DTripleSpc_with_ssub_4
14014 0, // dsub_3
14015 83, // dsub_4 -> DTripleSpc_with_ssub_4
14016 0, // dsub_5
14017 0, // dsub_6
14018 0, // dsub_7
14019 0, // gsub_0
14020 0, // gsub_1
14021 0, // qqsub_0
14022 0, // qqsub_1
14023 0, // qsub_0
14024 0, // qsub_1
14025 0, // qsub_2
14026 0, // qsub_3
14027 83, // ssub_0 -> DTripleSpc_with_ssub_4
14028 83, // ssub_1 -> DTripleSpc_with_ssub_4
14029 0, // ssub_2
14030 0, // ssub_3
14031 83, // ssub_4 -> DTripleSpc_with_ssub_4
14032 83, // ssub_5 -> DTripleSpc_with_ssub_4
14033 0, // ssub_6
14034 0, // ssub_7
14035 85, // ssub_8 -> DTripleSpc_with_ssub_8
14036 85, // ssub_9 -> DTripleSpc_with_ssub_8
14037 0, // ssub_10
14038 0, // ssub_11
14039 0, // ssub_12
14040 0, // ssub_13
14041 0, // ssub_14
14042 0, // ssub_15
14043 83, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_4
14044 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14045 0, // ssub_2_ssub_3_ssub_6_ssub_7
14046 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14047 0, // ssub_2_ssub_3_ssub_4_ssub_5
14048 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14049 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14050 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14051 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14052 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14053 83, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_4
14054 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14055 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14056 0, // ssub_6_ssub_7_dsub_5
14057 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14058 0, // ssub_6_ssub_7_dsub_5_dsub_7
14059 0, // ssub_6_ssub_7_ssub_8_ssub_9
14060 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14061 0, // ssub_8_ssub_9_ssub_12_ssub_13
14062 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14063 0, // dsub_5_dsub_7
14064 0, // dsub_5_ssub_12_ssub_13_dsub_7
14065 0, // dsub_5_ssub_12_ssub_13
14066 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14067 },
14068 { // DTriple_with_ssub_4
14069 84, // dsub_0 -> DTriple_with_ssub_4
14070 84, // dsub_1 -> DTriple_with_ssub_4
14071 84, // dsub_2 -> DTriple_with_ssub_4
14072 0, // dsub_3
14073 0, // dsub_4
14074 0, // dsub_5
14075 0, // dsub_6
14076 0, // dsub_7
14077 0, // gsub_0
14078 0, // gsub_1
14079 0, // qqsub_0
14080 0, // qqsub_1
14081 84, // qsub_0 -> DTriple_with_ssub_4
14082 0, // qsub_1
14083 0, // qsub_2
14084 0, // qsub_3
14085 84, // ssub_0 -> DTriple_with_ssub_4
14086 84, // ssub_1 -> DTriple_with_ssub_4
14087 84, // ssub_2 -> DTriple_with_ssub_4
14088 84, // ssub_3 -> DTriple_with_ssub_4
14089 84, // ssub_4 -> DTriple_with_ssub_4
14090 84, // ssub_5 -> DTriple_with_ssub_4
14091 0, // ssub_6
14092 0, // ssub_7
14093 0, // ssub_8
14094 0, // ssub_9
14095 0, // ssub_10
14096 0, // ssub_11
14097 0, // ssub_12
14098 0, // ssub_13
14099 0, // ssub_14
14100 0, // ssub_15
14101 84, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4
14102 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14103 0, // ssub_2_ssub_3_ssub_6_ssub_7
14104 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14105 84, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4
14106 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14107 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14108 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14109 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14110 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14111 0, // ssub_4_ssub_5_ssub_8_ssub_9
14112 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14113 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14114 0, // ssub_6_ssub_7_dsub_5
14115 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14116 0, // ssub_6_ssub_7_dsub_5_dsub_7
14117 0, // ssub_6_ssub_7_ssub_8_ssub_9
14118 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14119 0, // ssub_8_ssub_9_ssub_12_ssub_13
14120 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14121 0, // dsub_5_dsub_7
14122 0, // dsub_5_ssub_12_ssub_13_dsub_7
14123 0, // dsub_5_ssub_12_ssub_13
14124 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14125 },
14126 { // DTripleSpc_with_ssub_8
14127 85, // dsub_0 -> DTripleSpc_with_ssub_8
14128 0, // dsub_1
14129 85, // dsub_2 -> DTripleSpc_with_ssub_8
14130 0, // dsub_3
14131 85, // dsub_4 -> DTripleSpc_with_ssub_8
14132 0, // dsub_5
14133 0, // dsub_6
14134 0, // dsub_7
14135 0, // gsub_0
14136 0, // gsub_1
14137 0, // qqsub_0
14138 0, // qqsub_1
14139 0, // qsub_0
14140 0, // qsub_1
14141 0, // qsub_2
14142 0, // qsub_3
14143 85, // ssub_0 -> DTripleSpc_with_ssub_8
14144 85, // ssub_1 -> DTripleSpc_with_ssub_8
14145 0, // ssub_2
14146 0, // ssub_3
14147 85, // ssub_4 -> DTripleSpc_with_ssub_8
14148 85, // ssub_5 -> DTripleSpc_with_ssub_8
14149 0, // ssub_6
14150 0, // ssub_7
14151 85, // ssub_8 -> DTripleSpc_with_ssub_8
14152 85, // ssub_9 -> DTripleSpc_with_ssub_8
14153 0, // ssub_10
14154 0, // ssub_11
14155 0, // ssub_12
14156 0, // ssub_13
14157 0, // ssub_14
14158 0, // ssub_15
14159 85, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_8
14160 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14161 0, // ssub_2_ssub_3_ssub_6_ssub_7
14162 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14163 0, // ssub_2_ssub_3_ssub_4_ssub_5
14164 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14165 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14166 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14167 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14168 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14169 85, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_8
14170 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14171 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14172 0, // ssub_6_ssub_7_dsub_5
14173 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14174 0, // ssub_6_ssub_7_dsub_5_dsub_7
14175 0, // ssub_6_ssub_7_ssub_8_ssub_9
14176 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14177 0, // ssub_8_ssub_9_ssub_12_ssub_13
14178 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14179 0, // dsub_5_dsub_7
14180 0, // dsub_5_ssub_12_ssub_13_dsub_7
14181 0, // dsub_5_ssub_12_ssub_13
14182 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14183 },
14184 { // DTripleSpc_with_dsub_0_in_DPR_8
14185 86, // dsub_0 -> DTripleSpc_with_dsub_0_in_DPR_8
14186 0, // dsub_1
14187 86, // dsub_2 -> DTripleSpc_with_dsub_0_in_DPR_8
14188 0, // dsub_3
14189 86, // dsub_4 -> DTripleSpc_with_dsub_0_in_DPR_8
14190 0, // dsub_5
14191 0, // dsub_6
14192 0, // dsub_7
14193 0, // gsub_0
14194 0, // gsub_1
14195 0, // qqsub_0
14196 0, // qqsub_1
14197 0, // qsub_0
14198 0, // qsub_1
14199 0, // qsub_2
14200 0, // qsub_3
14201 86, // ssub_0 -> DTripleSpc_with_dsub_0_in_DPR_8
14202 86, // ssub_1 -> DTripleSpc_with_dsub_0_in_DPR_8
14203 0, // ssub_2
14204 0, // ssub_3
14205 86, // ssub_4 -> DTripleSpc_with_dsub_0_in_DPR_8
14206 86, // ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8
14207 0, // ssub_6
14208 0, // ssub_7
14209 86, // ssub_8 -> DTripleSpc_with_dsub_0_in_DPR_8
14210 86, // ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8
14211 0, // ssub_10
14212 0, // ssub_11
14213 0, // ssub_12
14214 0, // ssub_13
14215 0, // ssub_14
14216 0, // ssub_15
14217 86, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8
14218 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14219 0, // ssub_2_ssub_3_ssub_6_ssub_7
14220 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14221 0, // ssub_2_ssub_3_ssub_4_ssub_5
14222 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14223 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14224 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14225 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14226 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14227 86, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8
14228 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14229 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14230 0, // ssub_6_ssub_7_dsub_5
14231 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14232 0, // ssub_6_ssub_7_dsub_5_dsub_7
14233 0, // ssub_6_ssub_7_ssub_8_ssub_9
14234 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14235 0, // ssub_8_ssub_9_ssub_12_ssub_13
14236 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14237 0, // dsub_5_dsub_7
14238 0, // dsub_5_ssub_12_ssub_13_dsub_7
14239 0, // dsub_5_ssub_12_ssub_13
14240 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14241 },
14242 { // DTriple_with_dsub_0_in_DPR_8
14243 87, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8
14244 87, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8
14245 87, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8
14246 0, // dsub_3
14247 0, // dsub_4
14248 0, // dsub_5
14249 0, // dsub_6
14250 0, // dsub_7
14251 0, // gsub_0
14252 0, // gsub_1
14253 0, // qqsub_0
14254 0, // qqsub_1
14255 87, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8
14256 0, // qsub_1
14257 0, // qsub_2
14258 0, // qsub_3
14259 87, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8
14260 87, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8
14261 87, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8
14262 87, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8
14263 87, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8
14264 87, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8
14265 0, // ssub_6
14266 0, // ssub_7
14267 0, // ssub_8
14268 0, // ssub_9
14269 0, // ssub_10
14270 0, // ssub_11
14271 0, // ssub_12
14272 0, // ssub_13
14273 0, // ssub_14
14274 0, // ssub_15
14275 87, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8
14276 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14277 0, // ssub_2_ssub_3_ssub_6_ssub_7
14278 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14279 87, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8
14280 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14281 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14282 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14283 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14284 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14285 0, // ssub_4_ssub_5_ssub_8_ssub_9
14286 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14287 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14288 0, // ssub_6_ssub_7_dsub_5
14289 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14290 0, // ssub_6_ssub_7_dsub_5_dsub_7
14291 0, // ssub_6_ssub_7_ssub_8_ssub_9
14292 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14293 0, // ssub_8_ssub_9_ssub_12_ssub_13
14294 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14295 0, // dsub_5_dsub_7
14296 0, // dsub_5_ssub_12_ssub_13_dsub_7
14297 0, // dsub_5_ssub_12_ssub_13
14298 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14299 },
14300 { // DTriple_with_qsub_0_in_MQPR
14301 88, // dsub_0 -> DTriple_with_qsub_0_in_MQPR
14302 88, // dsub_1 -> DTriple_with_qsub_0_in_MQPR
14303 88, // dsub_2 -> DTriple_with_qsub_0_in_MQPR
14304 0, // dsub_3
14305 0, // dsub_4
14306 0, // dsub_5
14307 0, // dsub_6
14308 0, // dsub_7
14309 0, // gsub_0
14310 0, // gsub_1
14311 0, // qqsub_0
14312 0, // qqsub_1
14313 88, // qsub_0 -> DTriple_with_qsub_0_in_MQPR
14314 0, // qsub_1
14315 0, // qsub_2
14316 0, // qsub_3
14317 88, // ssub_0 -> DTriple_with_qsub_0_in_MQPR
14318 88, // ssub_1 -> DTriple_with_qsub_0_in_MQPR
14319 88, // ssub_2 -> DTriple_with_qsub_0_in_MQPR
14320 88, // ssub_3 -> DTriple_with_qsub_0_in_MQPR
14321 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14322 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14323 0, // ssub_6
14324 0, // ssub_7
14325 0, // ssub_8
14326 0, // ssub_9
14327 0, // ssub_10
14328 0, // ssub_11
14329 0, // ssub_12
14330 0, // ssub_13
14331 0, // ssub_14
14332 0, // ssub_15
14333 88, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR
14334 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14335 0, // ssub_2_ssub_3_ssub_6_ssub_7
14336 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14337 88, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR
14338 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14339 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14340 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14341 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14342 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14343 0, // ssub_4_ssub_5_ssub_8_ssub_9
14344 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14345 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14346 0, // ssub_6_ssub_7_dsub_5
14347 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14348 0, // ssub_6_ssub_7_dsub_5_dsub_7
14349 0, // ssub_6_ssub_7_ssub_8_ssub_9
14350 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14351 0, // ssub_8_ssub_9_ssub_12_ssub_13
14352 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14353 0, // dsub_5_dsub_7
14354 0, // dsub_5_ssub_12_ssub_13_dsub_7
14355 0, // dsub_5_ssub_12_ssub_13
14356 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14357 },
14358 { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14359 89, // dsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14360 89, // dsub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14361 89, // dsub_2 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14362 0, // dsub_3
14363 0, // dsub_4
14364 0, // dsub_5
14365 0, // dsub_6
14366 0, // dsub_7
14367 0, // gsub_0
14368 0, // gsub_1
14369 0, // qqsub_0
14370 0, // qqsub_1
14371 89, // qsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14372 0, // qsub_1
14373 0, // qsub_2
14374 0, // qsub_3
14375 89, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14376 89, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14377 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14378 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14379 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14380 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14381 0, // ssub_6
14382 0, // ssub_7
14383 0, // ssub_8
14384 0, // ssub_9
14385 0, // ssub_10
14386 0, // ssub_11
14387 0, // ssub_12
14388 0, // ssub_13
14389 0, // ssub_14
14390 0, // ssub_15
14391 89, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14392 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14393 0, // ssub_2_ssub_3_ssub_6_ssub_7
14394 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14395 89, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
14396 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14397 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14398 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14399 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14400 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14401 0, // ssub_4_ssub_5_ssub_8_ssub_9
14402 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14403 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14404 0, // ssub_6_ssub_7_dsub_5
14405 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14406 0, // ssub_6_ssub_7_dsub_5_dsub_7
14407 0, // ssub_6_ssub_7_ssub_8_ssub_9
14408 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14409 0, // ssub_8_ssub_9_ssub_12_ssub_13
14410 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14411 0, // dsub_5_dsub_7
14412 0, // dsub_5_ssub_12_ssub_13_dsub_7
14413 0, // dsub_5_ssub_12_ssub_13
14414 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14415 },
14416 { // DTriple_with_dsub_1_in_DPR_8
14417 90, // dsub_0 -> DTriple_with_dsub_1_in_DPR_8
14418 90, // dsub_1 -> DTriple_with_dsub_1_in_DPR_8
14419 90, // dsub_2 -> DTriple_with_dsub_1_in_DPR_8
14420 0, // dsub_3
14421 0, // dsub_4
14422 0, // dsub_5
14423 0, // dsub_6
14424 0, // dsub_7
14425 0, // gsub_0
14426 0, // gsub_1
14427 0, // qqsub_0
14428 0, // qqsub_1
14429 90, // qsub_0 -> DTriple_with_dsub_1_in_DPR_8
14430 0, // qsub_1
14431 0, // qsub_2
14432 0, // qsub_3
14433 90, // ssub_0 -> DTriple_with_dsub_1_in_DPR_8
14434 90, // ssub_1 -> DTriple_with_dsub_1_in_DPR_8
14435 90, // ssub_2 -> DTriple_with_dsub_1_in_DPR_8
14436 90, // ssub_3 -> DTriple_with_dsub_1_in_DPR_8
14437 90, // ssub_4 -> DTriple_with_dsub_1_in_DPR_8
14438 90, // ssub_5 -> DTriple_with_dsub_1_in_DPR_8
14439 0, // ssub_6
14440 0, // ssub_7
14441 0, // ssub_8
14442 0, // ssub_9
14443 0, // ssub_10
14444 0, // ssub_11
14445 0, // ssub_12
14446 0, // ssub_13
14447 0, // ssub_14
14448 0, // ssub_15
14449 90, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8
14450 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14451 0, // ssub_2_ssub_3_ssub_6_ssub_7
14452 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14453 90, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8
14454 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14455 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14456 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14457 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14458 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14459 0, // ssub_4_ssub_5_ssub_8_ssub_9
14460 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14461 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14462 0, // ssub_6_ssub_7_dsub_5
14463 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14464 0, // ssub_6_ssub_7_dsub_5_dsub_7
14465 0, // ssub_6_ssub_7_ssub_8_ssub_9
14466 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14467 0, // ssub_8_ssub_9_ssub_12_ssub_13
14468 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14469 0, // dsub_5_dsub_7
14470 0, // dsub_5_ssub_12_ssub_13_dsub_7
14471 0, // dsub_5_ssub_12_ssub_13
14472 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14473 },
14474 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14475 91, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14476 91, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14477 91, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14478 0, // dsub_3
14479 0, // dsub_4
14480 0, // dsub_5
14481 0, // dsub_6
14482 0, // dsub_7
14483 0, // gsub_0
14484 0, // gsub_1
14485 0, // qqsub_0
14486 0, // qqsub_1
14487 91, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14488 0, // qsub_1
14489 0, // qsub_2
14490 0, // qsub_3
14491 91, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14492 91, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14493 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14494 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14495 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14496 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14497 0, // ssub_6
14498 0, // ssub_7
14499 0, // ssub_8
14500 0, // ssub_9
14501 0, // ssub_10
14502 0, // ssub_11
14503 0, // ssub_12
14504 0, // ssub_13
14505 0, // ssub_14
14506 0, // ssub_15
14507 91, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14508 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14509 0, // ssub_2_ssub_3_ssub_6_ssub_7
14510 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14511 91, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14512 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14513 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14514 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14515 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14516 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14517 0, // ssub_4_ssub_5_ssub_8_ssub_9
14518 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14519 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14520 0, // ssub_6_ssub_7_dsub_5
14521 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14522 0, // ssub_6_ssub_7_dsub_5_dsub_7
14523 0, // ssub_6_ssub_7_ssub_8_ssub_9
14524 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14525 0, // ssub_8_ssub_9_ssub_12_ssub_13
14526 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14527 0, // dsub_5_dsub_7
14528 0, // dsub_5_ssub_12_ssub_13_dsub_7
14529 0, // dsub_5_ssub_12_ssub_13
14530 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14531 },
14532 { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14533 92, // dsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14534 92, // dsub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14535 92, // dsub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14536 0, // dsub_3
14537 0, // dsub_4
14538 0, // dsub_5
14539 0, // dsub_6
14540 0, // dsub_7
14541 0, // gsub_0
14542 0, // gsub_1
14543 0, // qqsub_0
14544 0, // qqsub_1
14545 92, // qsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14546 0, // qsub_1
14547 0, // qsub_2
14548 0, // qsub_3
14549 92, // ssub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14550 92, // ssub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14551 92, // ssub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14552 92, // ssub_3 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14553 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14554 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14555 0, // ssub_6
14556 0, // ssub_7
14557 0, // ssub_8
14558 0, // ssub_9
14559 0, // ssub_10
14560 0, // ssub_11
14561 0, // ssub_12
14562 0, // ssub_13
14563 0, // ssub_14
14564 0, // ssub_15
14565 92, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14566 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14567 0, // ssub_2_ssub_3_ssub_6_ssub_7
14568 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14569 92, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
14570 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14571 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14572 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14573 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14574 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14575 0, // ssub_4_ssub_5_ssub_8_ssub_9
14576 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14577 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14578 0, // ssub_6_ssub_7_dsub_5
14579 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14580 0, // ssub_6_ssub_7_dsub_5_dsub_7
14581 0, // ssub_6_ssub_7_ssub_8_ssub_9
14582 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14583 0, // ssub_8_ssub_9_ssub_12_ssub_13
14584 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14585 0, // dsub_5_dsub_7
14586 0, // dsub_5_ssub_12_ssub_13_dsub_7
14587 0, // dsub_5_ssub_12_ssub_13
14588 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14589 },
14590 { // DTripleSpc_with_dsub_2_in_DPR_8
14591 93, // dsub_0 -> DTripleSpc_with_dsub_2_in_DPR_8
14592 0, // dsub_1
14593 93, // dsub_2 -> DTripleSpc_with_dsub_2_in_DPR_8
14594 0, // dsub_3
14595 93, // dsub_4 -> DTripleSpc_with_dsub_2_in_DPR_8
14596 0, // dsub_5
14597 0, // dsub_6
14598 0, // dsub_7
14599 0, // gsub_0
14600 0, // gsub_1
14601 0, // qqsub_0
14602 0, // qqsub_1
14603 0, // qsub_0
14604 0, // qsub_1
14605 0, // qsub_2
14606 0, // qsub_3
14607 93, // ssub_0 -> DTripleSpc_with_dsub_2_in_DPR_8
14608 93, // ssub_1 -> DTripleSpc_with_dsub_2_in_DPR_8
14609 0, // ssub_2
14610 0, // ssub_3
14611 93, // ssub_4 -> DTripleSpc_with_dsub_2_in_DPR_8
14612 93, // ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8
14613 0, // ssub_6
14614 0, // ssub_7
14615 93, // ssub_8 -> DTripleSpc_with_dsub_2_in_DPR_8
14616 93, // ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8
14617 0, // ssub_10
14618 0, // ssub_11
14619 0, // ssub_12
14620 0, // ssub_13
14621 0, // ssub_14
14622 0, // ssub_15
14623 93, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8
14624 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14625 0, // ssub_2_ssub_3_ssub_6_ssub_7
14626 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14627 0, // ssub_2_ssub_3_ssub_4_ssub_5
14628 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14629 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14630 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14631 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14632 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14633 93, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8
14634 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14635 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14636 0, // ssub_6_ssub_7_dsub_5
14637 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14638 0, // ssub_6_ssub_7_dsub_5_dsub_7
14639 0, // ssub_6_ssub_7_ssub_8_ssub_9
14640 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14641 0, // ssub_8_ssub_9_ssub_12_ssub_13
14642 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14643 0, // dsub_5_dsub_7
14644 0, // dsub_5_ssub_12_ssub_13_dsub_7
14645 0, // dsub_5_ssub_12_ssub_13
14646 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14647 },
14648 { // DTriple_with_dsub_2_in_DPR_8
14649 94, // dsub_0 -> DTriple_with_dsub_2_in_DPR_8
14650 94, // dsub_1 -> DTriple_with_dsub_2_in_DPR_8
14651 94, // dsub_2 -> DTriple_with_dsub_2_in_DPR_8
14652 0, // dsub_3
14653 0, // dsub_4
14654 0, // dsub_5
14655 0, // dsub_6
14656 0, // dsub_7
14657 0, // gsub_0
14658 0, // gsub_1
14659 0, // qqsub_0
14660 0, // qqsub_1
14661 94, // qsub_0 -> DTriple_with_dsub_2_in_DPR_8
14662 0, // qsub_1
14663 0, // qsub_2
14664 0, // qsub_3
14665 94, // ssub_0 -> DTriple_with_dsub_2_in_DPR_8
14666 94, // ssub_1 -> DTriple_with_dsub_2_in_DPR_8
14667 94, // ssub_2 -> DTriple_with_dsub_2_in_DPR_8
14668 94, // ssub_3 -> DTriple_with_dsub_2_in_DPR_8
14669 94, // ssub_4 -> DTriple_with_dsub_2_in_DPR_8
14670 94, // ssub_5 -> DTriple_with_dsub_2_in_DPR_8
14671 0, // ssub_6
14672 0, // ssub_7
14673 0, // ssub_8
14674 0, // ssub_9
14675 0, // ssub_10
14676 0, // ssub_11
14677 0, // ssub_12
14678 0, // ssub_13
14679 0, // ssub_14
14680 0, // ssub_15
14681 94, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8
14682 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14683 0, // ssub_2_ssub_3_ssub_6_ssub_7
14684 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14685 94, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8
14686 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14687 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14688 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14689 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14690 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14691 0, // ssub_4_ssub_5_ssub_8_ssub_9
14692 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14693 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14694 0, // ssub_6_ssub_7_dsub_5
14695 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14696 0, // ssub_6_ssub_7_dsub_5_dsub_7
14697 0, // ssub_6_ssub_7_ssub_8_ssub_9
14698 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14699 0, // ssub_8_ssub_9_ssub_12_ssub_13
14700 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14701 0, // dsub_5_dsub_7
14702 0, // dsub_5_ssub_12_ssub_13_dsub_7
14703 0, // dsub_5_ssub_12_ssub_13
14704 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14705 },
14706 { // DTripleSpc_with_dsub_4_in_DPR_8
14707 95, // dsub_0 -> DTripleSpc_with_dsub_4_in_DPR_8
14708 0, // dsub_1
14709 95, // dsub_2 -> DTripleSpc_with_dsub_4_in_DPR_8
14710 0, // dsub_3
14711 95, // dsub_4 -> DTripleSpc_with_dsub_4_in_DPR_8
14712 0, // dsub_5
14713 0, // dsub_6
14714 0, // dsub_7
14715 0, // gsub_0
14716 0, // gsub_1
14717 0, // qqsub_0
14718 0, // qqsub_1
14719 0, // qsub_0
14720 0, // qsub_1
14721 0, // qsub_2
14722 0, // qsub_3
14723 95, // ssub_0 -> DTripleSpc_with_dsub_4_in_DPR_8
14724 95, // ssub_1 -> DTripleSpc_with_dsub_4_in_DPR_8
14725 0, // ssub_2
14726 0, // ssub_3
14727 95, // ssub_4 -> DTripleSpc_with_dsub_4_in_DPR_8
14728 95, // ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8
14729 0, // ssub_6
14730 0, // ssub_7
14731 95, // ssub_8 -> DTripleSpc_with_dsub_4_in_DPR_8
14732 95, // ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8
14733 0, // ssub_10
14734 0, // ssub_11
14735 0, // ssub_12
14736 0, // ssub_13
14737 0, // ssub_14
14738 0, // ssub_15
14739 95, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8
14740 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14741 0, // ssub_2_ssub_3_ssub_6_ssub_7
14742 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14743 0, // ssub_2_ssub_3_ssub_4_ssub_5
14744 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14745 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14746 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14747 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14748 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14749 95, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8
14750 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14751 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14752 0, // ssub_6_ssub_7_dsub_5
14753 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14754 0, // ssub_6_ssub_7_dsub_5_dsub_7
14755 0, // ssub_6_ssub_7_ssub_8_ssub_9
14756 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14757 0, // ssub_8_ssub_9_ssub_12_ssub_13
14758 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14759 0, // dsub_5_dsub_7
14760 0, // dsub_5_ssub_12_ssub_13_dsub_7
14761 0, // dsub_5_ssub_12_ssub_13
14762 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14763 },
14764 { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14765 96, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14766 96, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14767 96, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14768 0, // dsub_3
14769 0, // dsub_4
14770 0, // dsub_5
14771 0, // dsub_6
14772 0, // dsub_7
14773 0, // gsub_0
14774 0, // gsub_1
14775 0, // qqsub_0
14776 0, // qqsub_1
14777 96, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14778 0, // qsub_1
14779 0, // qsub_2
14780 0, // qsub_3
14781 96, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14782 96, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14783 96, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14784 96, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14785 96, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14786 96, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14787 0, // ssub_6
14788 0, // ssub_7
14789 0, // ssub_8
14790 0, // ssub_9
14791 0, // ssub_10
14792 0, // ssub_11
14793 0, // ssub_12
14794 0, // ssub_13
14795 0, // ssub_14
14796 0, // ssub_15
14797 96, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14798 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14799 0, // ssub_2_ssub_3_ssub_6_ssub_7
14800 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14801 96, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
14802 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14803 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14804 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14805 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14806 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14807 0, // ssub_4_ssub_5_ssub_8_ssub_9
14808 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14809 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14810 0, // ssub_6_ssub_7_dsub_5
14811 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14812 0, // ssub_6_ssub_7_dsub_5_dsub_7
14813 0, // ssub_6_ssub_7_ssub_8_ssub_9
14814 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14815 0, // ssub_8_ssub_9_ssub_12_ssub_13
14816 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14817 0, // dsub_5_dsub_7
14818 0, // dsub_5_ssub_12_ssub_13_dsub_7
14819 0, // dsub_5_ssub_12_ssub_13
14820 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14821 },
14822 { // DTriple_with_qsub_0_in_QPR_8
14823 97, // dsub_0 -> DTriple_with_qsub_0_in_QPR_8
14824 97, // dsub_1 -> DTriple_with_qsub_0_in_QPR_8
14825 97, // dsub_2 -> DTriple_with_qsub_0_in_QPR_8
14826 0, // dsub_3
14827 0, // dsub_4
14828 0, // dsub_5
14829 0, // dsub_6
14830 0, // dsub_7
14831 0, // gsub_0
14832 0, // gsub_1
14833 0, // qqsub_0
14834 0, // qqsub_1
14835 97, // qsub_0 -> DTriple_with_qsub_0_in_QPR_8
14836 0, // qsub_1
14837 0, // qsub_2
14838 0, // qsub_3
14839 97, // ssub_0 -> DTriple_with_qsub_0_in_QPR_8
14840 97, // ssub_1 -> DTriple_with_qsub_0_in_QPR_8
14841 97, // ssub_2 -> DTriple_with_qsub_0_in_QPR_8
14842 97, // ssub_3 -> DTriple_with_qsub_0_in_QPR_8
14843 97, // ssub_4 -> DTriple_with_qsub_0_in_QPR_8
14844 97, // ssub_5 -> DTriple_with_qsub_0_in_QPR_8
14845 0, // ssub_6
14846 0, // ssub_7
14847 0, // ssub_8
14848 0, // ssub_9
14849 0, // ssub_10
14850 0, // ssub_11
14851 0, // ssub_12
14852 0, // ssub_13
14853 0, // ssub_14
14854 0, // ssub_15
14855 97, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8
14856 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14857 0, // ssub_2_ssub_3_ssub_6_ssub_7
14858 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14859 97, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8
14860 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14861 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14862 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14863 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14864 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14865 0, // ssub_4_ssub_5_ssub_8_ssub_9
14866 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14867 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14868 0, // ssub_6_ssub_7_dsub_5
14869 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14870 0, // ssub_6_ssub_7_dsub_5_dsub_7
14871 0, // ssub_6_ssub_7_ssub_8_ssub_9
14872 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14873 0, // ssub_8_ssub_9_ssub_12_ssub_13
14874 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14875 0, // dsub_5_dsub_7
14876 0, // dsub_5_ssub_12_ssub_13_dsub_7
14877 0, // dsub_5_ssub_12_ssub_13
14878 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14879 },
14880 { // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14881 98, // dsub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14882 98, // dsub_1 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14883 98, // dsub_2 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14884 0, // dsub_3
14885 0, // dsub_4
14886 0, // dsub_5
14887 0, // dsub_6
14888 0, // dsub_7
14889 0, // gsub_0
14890 0, // gsub_1
14891 0, // qqsub_0
14892 0, // qqsub_1
14893 98, // qsub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14894 0, // qsub_1
14895 0, // qsub_2
14896 0, // qsub_3
14897 98, // ssub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14898 98, // ssub_1 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14899 98, // ssub_2 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14900 98, // ssub_3 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14901 98, // ssub_4 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14902 98, // ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14903 0, // ssub_6
14904 0, // ssub_7
14905 0, // ssub_8
14906 0, // ssub_9
14907 0, // ssub_10
14908 0, // ssub_11
14909 0, // ssub_12
14910 0, // ssub_13
14911 0, // ssub_14
14912 0, // ssub_15
14913 98, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14914 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14915 0, // ssub_2_ssub_3_ssub_6_ssub_7
14916 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14917 98, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
14918 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14919 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14920 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14921 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14922 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14923 0, // ssub_4_ssub_5_ssub_8_ssub_9
14924 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14925 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14926 0, // ssub_6_ssub_7_dsub_5
14927 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14928 0, // ssub_6_ssub_7_dsub_5_dsub_7
14929 0, // ssub_6_ssub_7_ssub_8_ssub_9
14930 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14931 0, // ssub_8_ssub_9_ssub_12_ssub_13
14932 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14933 0, // dsub_5_dsub_7
14934 0, // dsub_5_ssub_12_ssub_13_dsub_7
14935 0, // dsub_5_ssub_12_ssub_13
14936 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14937 },
14938 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14939 99, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14940 99, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14941 99, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14942 0, // dsub_3
14943 0, // dsub_4
14944 0, // dsub_5
14945 0, // dsub_6
14946 0, // dsub_7
14947 0, // gsub_0
14948 0, // gsub_1
14949 0, // qqsub_0
14950 0, // qqsub_1
14951 99, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14952 0, // qsub_1
14953 0, // qsub_2
14954 0, // qsub_3
14955 99, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14956 99, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14957 99, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14958 99, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14959 99, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14960 99, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14961 0, // ssub_6
14962 0, // ssub_7
14963 0, // ssub_8
14964 0, // ssub_9
14965 0, // ssub_10
14966 0, // ssub_11
14967 0, // ssub_12
14968 0, // ssub_13
14969 0, // ssub_14
14970 0, // ssub_15
14971 99, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14972 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
14973 0, // ssub_2_ssub_3_ssub_6_ssub_7
14974 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
14975 99, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
14976 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
14977 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14978 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
14979 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
14980 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14981 0, // ssub_4_ssub_5_ssub_8_ssub_9
14982 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
14983 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
14984 0, // ssub_6_ssub_7_dsub_5
14985 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
14986 0, // ssub_6_ssub_7_dsub_5_dsub_7
14987 0, // ssub_6_ssub_7_ssub_8_ssub_9
14988 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14989 0, // ssub_8_ssub_9_ssub_12_ssub_13
14990 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
14991 0, // dsub_5_dsub_7
14992 0, // dsub_5_ssub_12_ssub_13_dsub_7
14993 0, // dsub_5_ssub_12_ssub_13
14994 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
14995 },
14996 { // DQuadSpc
14997 100, // dsub_0 -> DQuadSpc
14998 0, // dsub_1
14999 100, // dsub_2 -> DQuadSpc
15000 0, // dsub_3
15001 100, // dsub_4 -> DQuadSpc
15002 0, // dsub_5
15003 0, // dsub_6
15004 0, // dsub_7
15005 0, // gsub_0
15006 0, // gsub_1
15007 0, // qqsub_0
15008 0, // qqsub_1
15009 0, // qsub_0
15010 0, // qsub_1
15011 0, // qsub_2
15012 0, // qsub_3
15013 101, // ssub_0 -> DQuadSpc_with_ssub_0
15014 101, // ssub_1 -> DQuadSpc_with_ssub_0
15015 0, // ssub_2
15016 0, // ssub_3
15017 102, // ssub_4 -> DQuadSpc_with_ssub_4
15018 102, // ssub_5 -> DQuadSpc_with_ssub_4
15019 0, // ssub_6
15020 0, // ssub_7
15021 103, // ssub_8 -> DQuadSpc_with_ssub_8
15022 103, // ssub_9 -> DQuadSpc_with_ssub_8
15023 0, // ssub_10
15024 0, // ssub_11
15025 0, // ssub_12
15026 0, // ssub_13
15027 0, // ssub_14
15028 0, // ssub_15
15029 100, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc
15030 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15031 0, // ssub_2_ssub_3_ssub_6_ssub_7
15032 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15033 0, // ssub_2_ssub_3_ssub_4_ssub_5
15034 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15035 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15036 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15037 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15038 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15039 100, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc
15040 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15041 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15042 0, // ssub_6_ssub_7_dsub_5
15043 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15044 0, // ssub_6_ssub_7_dsub_5_dsub_7
15045 0, // ssub_6_ssub_7_ssub_8_ssub_9
15046 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15047 0, // ssub_8_ssub_9_ssub_12_ssub_13
15048 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15049 0, // dsub_5_dsub_7
15050 0, // dsub_5_ssub_12_ssub_13_dsub_7
15051 0, // dsub_5_ssub_12_ssub_13
15052 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15053 },
15054 { // DQuadSpc_with_ssub_0
15055 101, // dsub_0 -> DQuadSpc_with_ssub_0
15056 0, // dsub_1
15057 101, // dsub_2 -> DQuadSpc_with_ssub_0
15058 0, // dsub_3
15059 101, // dsub_4 -> DQuadSpc_with_ssub_0
15060 0, // dsub_5
15061 0, // dsub_6
15062 0, // dsub_7
15063 0, // gsub_0
15064 0, // gsub_1
15065 0, // qqsub_0
15066 0, // qqsub_1
15067 0, // qsub_0
15068 0, // qsub_1
15069 0, // qsub_2
15070 0, // qsub_3
15071 101, // ssub_0 -> DQuadSpc_with_ssub_0
15072 101, // ssub_1 -> DQuadSpc_with_ssub_0
15073 0, // ssub_2
15074 0, // ssub_3
15075 102, // ssub_4 -> DQuadSpc_with_ssub_4
15076 102, // ssub_5 -> DQuadSpc_with_ssub_4
15077 0, // ssub_6
15078 0, // ssub_7
15079 103, // ssub_8 -> DQuadSpc_with_ssub_8
15080 103, // ssub_9 -> DQuadSpc_with_ssub_8
15081 0, // ssub_10
15082 0, // ssub_11
15083 0, // ssub_12
15084 0, // ssub_13
15085 0, // ssub_14
15086 0, // ssub_15
15087 101, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_0
15088 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15089 0, // ssub_2_ssub_3_ssub_6_ssub_7
15090 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15091 0, // ssub_2_ssub_3_ssub_4_ssub_5
15092 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15093 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15094 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15095 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15096 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15097 101, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0
15098 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15099 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15100 0, // ssub_6_ssub_7_dsub_5
15101 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15102 0, // ssub_6_ssub_7_dsub_5_dsub_7
15103 0, // ssub_6_ssub_7_ssub_8_ssub_9
15104 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15105 0, // ssub_8_ssub_9_ssub_12_ssub_13
15106 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15107 0, // dsub_5_dsub_7
15108 0, // dsub_5_ssub_12_ssub_13_dsub_7
15109 0, // dsub_5_ssub_12_ssub_13
15110 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15111 },
15112 { // DQuadSpc_with_ssub_4
15113 102, // dsub_0 -> DQuadSpc_with_ssub_4
15114 0, // dsub_1
15115 102, // dsub_2 -> DQuadSpc_with_ssub_4
15116 0, // dsub_3
15117 102, // dsub_4 -> DQuadSpc_with_ssub_4
15118 0, // dsub_5
15119 0, // dsub_6
15120 0, // dsub_7
15121 0, // gsub_0
15122 0, // gsub_1
15123 0, // qqsub_0
15124 0, // qqsub_1
15125 0, // qsub_0
15126 0, // qsub_1
15127 0, // qsub_2
15128 0, // qsub_3
15129 102, // ssub_0 -> DQuadSpc_with_ssub_4
15130 102, // ssub_1 -> DQuadSpc_with_ssub_4
15131 0, // ssub_2
15132 0, // ssub_3
15133 102, // ssub_4 -> DQuadSpc_with_ssub_4
15134 102, // ssub_5 -> DQuadSpc_with_ssub_4
15135 0, // ssub_6
15136 0, // ssub_7
15137 103, // ssub_8 -> DQuadSpc_with_ssub_8
15138 103, // ssub_9 -> DQuadSpc_with_ssub_8
15139 0, // ssub_10
15140 0, // ssub_11
15141 0, // ssub_12
15142 0, // ssub_13
15143 0, // ssub_14
15144 0, // ssub_15
15145 102, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_4
15146 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15147 0, // ssub_2_ssub_3_ssub_6_ssub_7
15148 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15149 0, // ssub_2_ssub_3_ssub_4_ssub_5
15150 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15151 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15152 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15153 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15154 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15155 102, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4
15156 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15157 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15158 0, // ssub_6_ssub_7_dsub_5
15159 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15160 0, // ssub_6_ssub_7_dsub_5_dsub_7
15161 0, // ssub_6_ssub_7_ssub_8_ssub_9
15162 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15163 0, // ssub_8_ssub_9_ssub_12_ssub_13
15164 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15165 0, // dsub_5_dsub_7
15166 0, // dsub_5_ssub_12_ssub_13_dsub_7
15167 0, // dsub_5_ssub_12_ssub_13
15168 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15169 },
15170 { // DQuadSpc_with_ssub_8
15171 103, // dsub_0 -> DQuadSpc_with_ssub_8
15172 0, // dsub_1
15173 103, // dsub_2 -> DQuadSpc_with_ssub_8
15174 0, // dsub_3
15175 103, // dsub_4 -> DQuadSpc_with_ssub_8
15176 0, // dsub_5
15177 0, // dsub_6
15178 0, // dsub_7
15179 0, // gsub_0
15180 0, // gsub_1
15181 0, // qqsub_0
15182 0, // qqsub_1
15183 0, // qsub_0
15184 0, // qsub_1
15185 0, // qsub_2
15186 0, // qsub_3
15187 103, // ssub_0 -> DQuadSpc_with_ssub_8
15188 103, // ssub_1 -> DQuadSpc_with_ssub_8
15189 0, // ssub_2
15190 0, // ssub_3
15191 103, // ssub_4 -> DQuadSpc_with_ssub_8
15192 103, // ssub_5 -> DQuadSpc_with_ssub_8
15193 0, // ssub_6
15194 0, // ssub_7
15195 103, // ssub_8 -> DQuadSpc_with_ssub_8
15196 103, // ssub_9 -> DQuadSpc_with_ssub_8
15197 0, // ssub_10
15198 0, // ssub_11
15199 0, // ssub_12
15200 0, // ssub_13
15201 0, // ssub_14
15202 0, // ssub_15
15203 103, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_8
15204 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15205 0, // ssub_2_ssub_3_ssub_6_ssub_7
15206 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15207 0, // ssub_2_ssub_3_ssub_4_ssub_5
15208 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15209 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15210 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15211 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15212 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15213 103, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8
15214 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15215 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15216 0, // ssub_6_ssub_7_dsub_5
15217 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15218 0, // ssub_6_ssub_7_dsub_5_dsub_7
15219 0, // ssub_6_ssub_7_ssub_8_ssub_9
15220 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15221 0, // ssub_8_ssub_9_ssub_12_ssub_13
15222 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15223 0, // dsub_5_dsub_7
15224 0, // dsub_5_ssub_12_ssub_13_dsub_7
15225 0, // dsub_5_ssub_12_ssub_13
15226 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15227 },
15228 { // DQuadSpc_with_dsub_0_in_DPR_8
15229 104, // dsub_0 -> DQuadSpc_with_dsub_0_in_DPR_8
15230 0, // dsub_1
15231 104, // dsub_2 -> DQuadSpc_with_dsub_0_in_DPR_8
15232 0, // dsub_3
15233 104, // dsub_4 -> DQuadSpc_with_dsub_0_in_DPR_8
15234 0, // dsub_5
15235 0, // dsub_6
15236 0, // dsub_7
15237 0, // gsub_0
15238 0, // gsub_1
15239 0, // qqsub_0
15240 0, // qqsub_1
15241 0, // qsub_0
15242 0, // qsub_1
15243 0, // qsub_2
15244 0, // qsub_3
15245 104, // ssub_0 -> DQuadSpc_with_dsub_0_in_DPR_8
15246 104, // ssub_1 -> DQuadSpc_with_dsub_0_in_DPR_8
15247 0, // ssub_2
15248 0, // ssub_3
15249 104, // ssub_4 -> DQuadSpc_with_dsub_0_in_DPR_8
15250 104, // ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8
15251 0, // ssub_6
15252 0, // ssub_7
15253 104, // ssub_8 -> DQuadSpc_with_dsub_0_in_DPR_8
15254 104, // ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8
15255 0, // ssub_10
15256 0, // ssub_11
15257 0, // ssub_12
15258 0, // ssub_13
15259 0, // ssub_14
15260 0, // ssub_15
15261 104, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8
15262 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15263 0, // ssub_2_ssub_3_ssub_6_ssub_7
15264 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15265 0, // ssub_2_ssub_3_ssub_4_ssub_5
15266 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15267 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15268 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15269 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15270 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15271 104, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8
15272 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15273 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15274 0, // ssub_6_ssub_7_dsub_5
15275 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15276 0, // ssub_6_ssub_7_dsub_5_dsub_7
15277 0, // ssub_6_ssub_7_ssub_8_ssub_9
15278 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15279 0, // ssub_8_ssub_9_ssub_12_ssub_13
15280 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15281 0, // dsub_5_dsub_7
15282 0, // dsub_5_ssub_12_ssub_13_dsub_7
15283 0, // dsub_5_ssub_12_ssub_13
15284 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15285 },
15286 { // DQuadSpc_with_dsub_2_in_DPR_8
15287 105, // dsub_0 -> DQuadSpc_with_dsub_2_in_DPR_8
15288 0, // dsub_1
15289 105, // dsub_2 -> DQuadSpc_with_dsub_2_in_DPR_8
15290 0, // dsub_3
15291 105, // dsub_4 -> DQuadSpc_with_dsub_2_in_DPR_8
15292 0, // dsub_5
15293 0, // dsub_6
15294 0, // dsub_7
15295 0, // gsub_0
15296 0, // gsub_1
15297 0, // qqsub_0
15298 0, // qqsub_1
15299 0, // qsub_0
15300 0, // qsub_1
15301 0, // qsub_2
15302 0, // qsub_3
15303 105, // ssub_0 -> DQuadSpc_with_dsub_2_in_DPR_8
15304 105, // ssub_1 -> DQuadSpc_with_dsub_2_in_DPR_8
15305 0, // ssub_2
15306 0, // ssub_3
15307 105, // ssub_4 -> DQuadSpc_with_dsub_2_in_DPR_8
15308 105, // ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8
15309 0, // ssub_6
15310 0, // ssub_7
15311 105, // ssub_8 -> DQuadSpc_with_dsub_2_in_DPR_8
15312 105, // ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8
15313 0, // ssub_10
15314 0, // ssub_11
15315 0, // ssub_12
15316 0, // ssub_13
15317 0, // ssub_14
15318 0, // ssub_15
15319 105, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8
15320 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15321 0, // ssub_2_ssub_3_ssub_6_ssub_7
15322 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15323 0, // ssub_2_ssub_3_ssub_4_ssub_5
15324 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15325 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15326 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15327 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15328 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15329 105, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8
15330 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15331 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15332 0, // ssub_6_ssub_7_dsub_5
15333 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15334 0, // ssub_6_ssub_7_dsub_5_dsub_7
15335 0, // ssub_6_ssub_7_ssub_8_ssub_9
15336 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15337 0, // ssub_8_ssub_9_ssub_12_ssub_13
15338 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15339 0, // dsub_5_dsub_7
15340 0, // dsub_5_ssub_12_ssub_13_dsub_7
15341 0, // dsub_5_ssub_12_ssub_13
15342 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15343 },
15344 { // DQuadSpc_with_dsub_4_in_DPR_8
15345 106, // dsub_0 -> DQuadSpc_with_dsub_4_in_DPR_8
15346 0, // dsub_1
15347 106, // dsub_2 -> DQuadSpc_with_dsub_4_in_DPR_8
15348 0, // dsub_3
15349 106, // dsub_4 -> DQuadSpc_with_dsub_4_in_DPR_8
15350 0, // dsub_5
15351 0, // dsub_6
15352 0, // dsub_7
15353 0, // gsub_0
15354 0, // gsub_1
15355 0, // qqsub_0
15356 0, // qqsub_1
15357 0, // qsub_0
15358 0, // qsub_1
15359 0, // qsub_2
15360 0, // qsub_3
15361 106, // ssub_0 -> DQuadSpc_with_dsub_4_in_DPR_8
15362 106, // ssub_1 -> DQuadSpc_with_dsub_4_in_DPR_8
15363 0, // ssub_2
15364 0, // ssub_3
15365 106, // ssub_4 -> DQuadSpc_with_dsub_4_in_DPR_8
15366 106, // ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8
15367 0, // ssub_6
15368 0, // ssub_7
15369 106, // ssub_8 -> DQuadSpc_with_dsub_4_in_DPR_8
15370 106, // ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8
15371 0, // ssub_10
15372 0, // ssub_11
15373 0, // ssub_12
15374 0, // ssub_13
15375 0, // ssub_14
15376 0, // ssub_15
15377 106, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8
15378 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
15379 0, // ssub_2_ssub_3_ssub_6_ssub_7
15380 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
15381 0, // ssub_2_ssub_3_ssub_4_ssub_5
15382 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15383 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15384 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15385 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15386 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15387 106, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8
15388 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15389 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15390 0, // ssub_6_ssub_7_dsub_5
15391 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15392 0, // ssub_6_ssub_7_dsub_5_dsub_7
15393 0, // ssub_6_ssub_7_ssub_8_ssub_9
15394 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15395 0, // ssub_8_ssub_9_ssub_12_ssub_13
15396 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15397 0, // dsub_5_dsub_7
15398 0, // dsub_5_ssub_12_ssub_13_dsub_7
15399 0, // dsub_5_ssub_12_ssub_13
15400 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15401 },
15402 { // DQuad
15403 107, // dsub_0 -> DQuad
15404 107, // dsub_1 -> DQuad
15405 107, // dsub_2 -> DQuad
15406 107, // dsub_3 -> DQuad
15407 0, // dsub_4
15408 0, // dsub_5
15409 0, // dsub_6
15410 0, // dsub_7
15411 0, // gsub_0
15412 0, // gsub_1
15413 0, // qqsub_0
15414 0, // qqsub_1
15415 107, // qsub_0 -> DQuad
15416 107, // qsub_1 -> DQuad
15417 0, // qsub_2
15418 0, // qsub_3
15419 108, // ssub_0 -> DQuad_with_ssub_0
15420 108, // ssub_1 -> DQuad_with_ssub_0
15421 109, // ssub_2 -> DQuad_with_ssub_2
15422 109, // ssub_3 -> DQuad_with_ssub_2
15423 112, // ssub_4 -> DQuad_with_ssub_4
15424 112, // ssub_5 -> DQuad_with_ssub_4
15425 113, // ssub_6 -> DQuad_with_ssub_6
15426 113, // ssub_7 -> DQuad_with_ssub_6
15427 0, // ssub_8
15428 0, // ssub_9
15429 0, // ssub_10
15430 0, // ssub_11
15431 0, // ssub_12
15432 0, // ssub_13
15433 0, // ssub_14
15434 0, // ssub_15
15435 107, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad
15436 107, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad
15437 107, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad
15438 107, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad
15439 107, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad
15440 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15441 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15442 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15443 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15444 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15445 0, // ssub_4_ssub_5_ssub_8_ssub_9
15446 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15447 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15448 0, // ssub_6_ssub_7_dsub_5
15449 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15450 0, // ssub_6_ssub_7_dsub_5_dsub_7
15451 0, // ssub_6_ssub_7_ssub_8_ssub_9
15452 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15453 0, // ssub_8_ssub_9_ssub_12_ssub_13
15454 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15455 0, // dsub_5_dsub_7
15456 0, // dsub_5_ssub_12_ssub_13_dsub_7
15457 0, // dsub_5_ssub_12_ssub_13
15458 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15459 },
15460 { // DQuad_with_ssub_0
15461 108, // dsub_0 -> DQuad_with_ssub_0
15462 108, // dsub_1 -> DQuad_with_ssub_0
15463 108, // dsub_2 -> DQuad_with_ssub_0
15464 108, // dsub_3 -> DQuad_with_ssub_0
15465 0, // dsub_4
15466 0, // dsub_5
15467 0, // dsub_6
15468 0, // dsub_7
15469 0, // gsub_0
15470 0, // gsub_1
15471 0, // qqsub_0
15472 0, // qqsub_1
15473 108, // qsub_0 -> DQuad_with_ssub_0
15474 108, // qsub_1 -> DQuad_with_ssub_0
15475 0, // qsub_2
15476 0, // qsub_3
15477 108, // ssub_0 -> DQuad_with_ssub_0
15478 108, // ssub_1 -> DQuad_with_ssub_0
15479 109, // ssub_2 -> DQuad_with_ssub_2
15480 109, // ssub_3 -> DQuad_with_ssub_2
15481 112, // ssub_4 -> DQuad_with_ssub_4
15482 112, // ssub_5 -> DQuad_with_ssub_4
15483 113, // ssub_6 -> DQuad_with_ssub_6
15484 113, // ssub_7 -> DQuad_with_ssub_6
15485 0, // ssub_8
15486 0, // ssub_9
15487 0, // ssub_10
15488 0, // ssub_11
15489 0, // ssub_12
15490 0, // ssub_13
15491 0, // ssub_14
15492 0, // ssub_15
15493 108, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0
15494 108, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0
15495 108, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0
15496 108, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0
15497 108, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0
15498 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15499 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15500 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15501 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15502 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15503 0, // ssub_4_ssub_5_ssub_8_ssub_9
15504 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15505 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15506 0, // ssub_6_ssub_7_dsub_5
15507 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15508 0, // ssub_6_ssub_7_dsub_5_dsub_7
15509 0, // ssub_6_ssub_7_ssub_8_ssub_9
15510 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15511 0, // ssub_8_ssub_9_ssub_12_ssub_13
15512 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15513 0, // dsub_5_dsub_7
15514 0, // dsub_5_ssub_12_ssub_13_dsub_7
15515 0, // dsub_5_ssub_12_ssub_13
15516 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15517 },
15518 { // DQuad_with_ssub_2
15519 109, // dsub_0 -> DQuad_with_ssub_2
15520 109, // dsub_1 -> DQuad_with_ssub_2
15521 109, // dsub_2 -> DQuad_with_ssub_2
15522 109, // dsub_3 -> DQuad_with_ssub_2
15523 0, // dsub_4
15524 0, // dsub_5
15525 0, // dsub_6
15526 0, // dsub_7
15527 0, // gsub_0
15528 0, // gsub_1
15529 0, // qqsub_0
15530 0, // qqsub_1
15531 109, // qsub_0 -> DQuad_with_ssub_2
15532 109, // qsub_1 -> DQuad_with_ssub_2
15533 0, // qsub_2
15534 0, // qsub_3
15535 109, // ssub_0 -> DQuad_with_ssub_2
15536 109, // ssub_1 -> DQuad_with_ssub_2
15537 109, // ssub_2 -> DQuad_with_ssub_2
15538 109, // ssub_3 -> DQuad_with_ssub_2
15539 112, // ssub_4 -> DQuad_with_ssub_4
15540 112, // ssub_5 -> DQuad_with_ssub_4
15541 113, // ssub_6 -> DQuad_with_ssub_6
15542 113, // ssub_7 -> DQuad_with_ssub_6
15543 0, // ssub_8
15544 0, // ssub_9
15545 0, // ssub_10
15546 0, // ssub_11
15547 0, // ssub_12
15548 0, // ssub_13
15549 0, // ssub_14
15550 0, // ssub_15
15551 109, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2
15552 109, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2
15553 109, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2
15554 109, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2
15555 109, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2
15556 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15557 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15558 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15559 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15560 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15561 0, // ssub_4_ssub_5_ssub_8_ssub_9
15562 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15563 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15564 0, // ssub_6_ssub_7_dsub_5
15565 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15566 0, // ssub_6_ssub_7_dsub_5_dsub_7
15567 0, // ssub_6_ssub_7_ssub_8_ssub_9
15568 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15569 0, // ssub_8_ssub_9_ssub_12_ssub_13
15570 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15571 0, // dsub_5_dsub_7
15572 0, // dsub_5_ssub_12_ssub_13_dsub_7
15573 0, // dsub_5_ssub_12_ssub_13
15574 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15575 },
15576 { // QQPR
15577 110, // dsub_0 -> QQPR
15578 110, // dsub_1 -> QQPR
15579 110, // dsub_2 -> QQPR
15580 110, // dsub_3 -> QQPR
15581 0, // dsub_4
15582 0, // dsub_5
15583 0, // dsub_6
15584 0, // dsub_7
15585 0, // gsub_0
15586 0, // gsub_1
15587 0, // qqsub_0
15588 0, // qqsub_1
15589 110, // qsub_0 -> QQPR
15590 110, // qsub_1 -> QQPR
15591 0, // qsub_2
15592 0, // qsub_3
15593 115, // ssub_0 -> DQuad_with_qsub_0_in_MQPR
15594 115, // ssub_1 -> DQuad_with_qsub_0_in_MQPR
15595 115, // ssub_2 -> DQuad_with_qsub_0_in_MQPR
15596 115, // ssub_3 -> DQuad_with_qsub_0_in_MQPR
15597 119, // ssub_4 -> MQQPR
15598 119, // ssub_5 -> MQQPR
15599 119, // ssub_6 -> MQQPR
15600 119, // ssub_7 -> MQQPR
15601 0, // ssub_8
15602 0, // ssub_9
15603 0, // ssub_10
15604 0, // ssub_11
15605 0, // ssub_12
15606 0, // ssub_13
15607 0, // ssub_14
15608 0, // ssub_15
15609 110, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQPR
15610 110, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR
15611 110, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQPR
15612 110, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQPR
15613 110, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR
15614 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15615 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15616 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15617 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15618 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15619 0, // ssub_4_ssub_5_ssub_8_ssub_9
15620 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15621 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15622 0, // ssub_6_ssub_7_dsub_5
15623 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15624 0, // ssub_6_ssub_7_dsub_5_dsub_7
15625 0, // ssub_6_ssub_7_ssub_8_ssub_9
15626 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15627 0, // ssub_8_ssub_9_ssub_12_ssub_13
15628 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15629 0, // dsub_5_dsub_7
15630 0, // dsub_5_ssub_12_ssub_13_dsub_7
15631 0, // dsub_5_ssub_12_ssub_13
15632 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15633 },
15634 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15635 111, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15636 111, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15637 111, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15638 111, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15639 0, // dsub_4
15640 0, // dsub_5
15641 0, // dsub_6
15642 0, // dsub_7
15643 0, // gsub_0
15644 0, // gsub_1
15645 0, // qqsub_0
15646 0, // qqsub_1
15647 111, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15648 111, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15649 0, // qsub_2
15650 0, // qsub_3
15651 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15652 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15653 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15654 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15655 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15656 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15657 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15658 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15659 0, // ssub_8
15660 0, // ssub_9
15661 0, // ssub_10
15662 0, // ssub_11
15663 0, // ssub_12
15664 0, // ssub_13
15665 0, // ssub_14
15666 0, // ssub_15
15667 111, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15668 111, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15669 111, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15670 111, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15671 111, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15672 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15673 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15674 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15675 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15676 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15677 0, // ssub_4_ssub_5_ssub_8_ssub_9
15678 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15679 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15680 0, // ssub_6_ssub_7_dsub_5
15681 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15682 0, // ssub_6_ssub_7_dsub_5_dsub_7
15683 0, // ssub_6_ssub_7_ssub_8_ssub_9
15684 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15685 0, // ssub_8_ssub_9_ssub_12_ssub_13
15686 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15687 0, // dsub_5_dsub_7
15688 0, // dsub_5_ssub_12_ssub_13_dsub_7
15689 0, // dsub_5_ssub_12_ssub_13
15690 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15691 },
15692 { // DQuad_with_ssub_4
15693 112, // dsub_0 -> DQuad_with_ssub_4
15694 112, // dsub_1 -> DQuad_with_ssub_4
15695 112, // dsub_2 -> DQuad_with_ssub_4
15696 112, // dsub_3 -> DQuad_with_ssub_4
15697 0, // dsub_4
15698 0, // dsub_5
15699 0, // dsub_6
15700 0, // dsub_7
15701 0, // gsub_0
15702 0, // gsub_1
15703 0, // qqsub_0
15704 0, // qqsub_1
15705 112, // qsub_0 -> DQuad_with_ssub_4
15706 112, // qsub_1 -> DQuad_with_ssub_4
15707 0, // qsub_2
15708 0, // qsub_3
15709 112, // ssub_0 -> DQuad_with_ssub_4
15710 112, // ssub_1 -> DQuad_with_ssub_4
15711 112, // ssub_2 -> DQuad_with_ssub_4
15712 112, // ssub_3 -> DQuad_with_ssub_4
15713 112, // ssub_4 -> DQuad_with_ssub_4
15714 112, // ssub_5 -> DQuad_with_ssub_4
15715 113, // ssub_6 -> DQuad_with_ssub_6
15716 113, // ssub_7 -> DQuad_with_ssub_6
15717 0, // ssub_8
15718 0, // ssub_9
15719 0, // ssub_10
15720 0, // ssub_11
15721 0, // ssub_12
15722 0, // ssub_13
15723 0, // ssub_14
15724 0, // ssub_15
15725 112, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_4
15726 112, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4
15727 112, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_4
15728 112, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_4
15729 112, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4
15730 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15731 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15732 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15733 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15734 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15735 0, // ssub_4_ssub_5_ssub_8_ssub_9
15736 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15737 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15738 0, // ssub_6_ssub_7_dsub_5
15739 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15740 0, // ssub_6_ssub_7_dsub_5_dsub_7
15741 0, // ssub_6_ssub_7_ssub_8_ssub_9
15742 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15743 0, // ssub_8_ssub_9_ssub_12_ssub_13
15744 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15745 0, // dsub_5_dsub_7
15746 0, // dsub_5_ssub_12_ssub_13_dsub_7
15747 0, // dsub_5_ssub_12_ssub_13
15748 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15749 },
15750 { // DQuad_with_ssub_6
15751 113, // dsub_0 -> DQuad_with_ssub_6
15752 113, // dsub_1 -> DQuad_with_ssub_6
15753 113, // dsub_2 -> DQuad_with_ssub_6
15754 113, // dsub_3 -> DQuad_with_ssub_6
15755 0, // dsub_4
15756 0, // dsub_5
15757 0, // dsub_6
15758 0, // dsub_7
15759 0, // gsub_0
15760 0, // gsub_1
15761 0, // qqsub_0
15762 0, // qqsub_1
15763 113, // qsub_0 -> DQuad_with_ssub_6
15764 113, // qsub_1 -> DQuad_with_ssub_6
15765 0, // qsub_2
15766 0, // qsub_3
15767 113, // ssub_0 -> DQuad_with_ssub_6
15768 113, // ssub_1 -> DQuad_with_ssub_6
15769 113, // ssub_2 -> DQuad_with_ssub_6
15770 113, // ssub_3 -> DQuad_with_ssub_6
15771 113, // ssub_4 -> DQuad_with_ssub_6
15772 113, // ssub_5 -> DQuad_with_ssub_6
15773 113, // ssub_6 -> DQuad_with_ssub_6
15774 113, // ssub_7 -> DQuad_with_ssub_6
15775 0, // ssub_8
15776 0, // ssub_9
15777 0, // ssub_10
15778 0, // ssub_11
15779 0, // ssub_12
15780 0, // ssub_13
15781 0, // ssub_14
15782 0, // ssub_15
15783 113, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6
15784 113, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6
15785 113, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6
15786 113, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6
15787 113, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6
15788 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15789 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15790 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15791 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15792 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15793 0, // ssub_4_ssub_5_ssub_8_ssub_9
15794 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15795 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15796 0, // ssub_6_ssub_7_dsub_5
15797 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15798 0, // ssub_6_ssub_7_dsub_5_dsub_7
15799 0, // ssub_6_ssub_7_ssub_8_ssub_9
15800 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15801 0, // ssub_8_ssub_9_ssub_12_ssub_13
15802 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15803 0, // dsub_5_dsub_7
15804 0, // dsub_5_ssub_12_ssub_13_dsub_7
15805 0, // dsub_5_ssub_12_ssub_13
15806 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15807 },
15808 { // DQuad_with_dsub_0_in_DPR_8
15809 114, // dsub_0 -> DQuad_with_dsub_0_in_DPR_8
15810 114, // dsub_1 -> DQuad_with_dsub_0_in_DPR_8
15811 114, // dsub_2 -> DQuad_with_dsub_0_in_DPR_8
15812 114, // dsub_3 -> DQuad_with_dsub_0_in_DPR_8
15813 0, // dsub_4
15814 0, // dsub_5
15815 0, // dsub_6
15816 0, // dsub_7
15817 0, // gsub_0
15818 0, // gsub_1
15819 0, // qqsub_0
15820 0, // qqsub_1
15821 114, // qsub_0 -> DQuad_with_dsub_0_in_DPR_8
15822 114, // qsub_1 -> DQuad_with_dsub_0_in_DPR_8
15823 0, // qsub_2
15824 0, // qsub_3
15825 114, // ssub_0 -> DQuad_with_dsub_0_in_DPR_8
15826 114, // ssub_1 -> DQuad_with_dsub_0_in_DPR_8
15827 114, // ssub_2 -> DQuad_with_dsub_0_in_DPR_8
15828 114, // ssub_3 -> DQuad_with_dsub_0_in_DPR_8
15829 114, // ssub_4 -> DQuad_with_dsub_0_in_DPR_8
15830 114, // ssub_5 -> DQuad_with_dsub_0_in_DPR_8
15831 114, // ssub_6 -> DQuad_with_dsub_0_in_DPR_8
15832 114, // ssub_7 -> DQuad_with_dsub_0_in_DPR_8
15833 0, // ssub_8
15834 0, // ssub_9
15835 0, // ssub_10
15836 0, // ssub_11
15837 0, // ssub_12
15838 0, // ssub_13
15839 0, // ssub_14
15840 0, // ssub_15
15841 114, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8
15842 114, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8
15843 114, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8
15844 114, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8
15845 114, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8
15846 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15847 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15848 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15849 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15850 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15851 0, // ssub_4_ssub_5_ssub_8_ssub_9
15852 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15853 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15854 0, // ssub_6_ssub_7_dsub_5
15855 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15856 0, // ssub_6_ssub_7_dsub_5_dsub_7
15857 0, // ssub_6_ssub_7_ssub_8_ssub_9
15858 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15859 0, // ssub_8_ssub_9_ssub_12_ssub_13
15860 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15861 0, // dsub_5_dsub_7
15862 0, // dsub_5_ssub_12_ssub_13_dsub_7
15863 0, // dsub_5_ssub_12_ssub_13
15864 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15865 },
15866 { // DQuad_with_qsub_0_in_MQPR
15867 115, // dsub_0 -> DQuad_with_qsub_0_in_MQPR
15868 115, // dsub_1 -> DQuad_with_qsub_0_in_MQPR
15869 115, // dsub_2 -> DQuad_with_qsub_0_in_MQPR
15870 115, // dsub_3 -> DQuad_with_qsub_0_in_MQPR
15871 0, // dsub_4
15872 0, // dsub_5
15873 0, // dsub_6
15874 0, // dsub_7
15875 0, // gsub_0
15876 0, // gsub_1
15877 0, // qqsub_0
15878 0, // qqsub_1
15879 115, // qsub_0 -> DQuad_with_qsub_0_in_MQPR
15880 115, // qsub_1 -> DQuad_with_qsub_0_in_MQPR
15881 0, // qsub_2
15882 0, // qsub_3
15883 115, // ssub_0 -> DQuad_with_qsub_0_in_MQPR
15884 115, // ssub_1 -> DQuad_with_qsub_0_in_MQPR
15885 115, // ssub_2 -> DQuad_with_qsub_0_in_MQPR
15886 115, // ssub_3 -> DQuad_with_qsub_0_in_MQPR
15887 119, // ssub_4 -> MQQPR
15888 119, // ssub_5 -> MQQPR
15889 119, // ssub_6 -> MQQPR
15890 119, // ssub_7 -> MQQPR
15891 0, // ssub_8
15892 0, // ssub_9
15893 0, // ssub_10
15894 0, // ssub_11
15895 0, // ssub_12
15896 0, // ssub_13
15897 0, // ssub_14
15898 0, // ssub_15
15899 115, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR
15900 115, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR
15901 115, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_MQPR
15902 115, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_MQPR
15903 115, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR
15904 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15905 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15906 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15907 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15908 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15909 0, // ssub_4_ssub_5_ssub_8_ssub_9
15910 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15911 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15912 0, // ssub_6_ssub_7_dsub_5
15913 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15914 0, // ssub_6_ssub_7_dsub_5_dsub_7
15915 0, // ssub_6_ssub_7_ssub_8_ssub_9
15916 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15917 0, // ssub_8_ssub_9_ssub_12_ssub_13
15918 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15919 0, // dsub_5_dsub_7
15920 0, // dsub_5_ssub_12_ssub_13_dsub_7
15921 0, // dsub_5_ssub_12_ssub_13
15922 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15923 },
15924 { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15925 116, // dsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15926 116, // dsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15927 116, // dsub_2 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15928 116, // dsub_3 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15929 0, // dsub_4
15930 0, // dsub_5
15931 0, // dsub_6
15932 0, // dsub_7
15933 0, // gsub_0
15934 0, // gsub_1
15935 0, // qqsub_0
15936 0, // qqsub_1
15937 116, // qsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15938 116, // qsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15939 0, // qsub_2
15940 0, // qsub_3
15941 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15942 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15943 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15944 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15945 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15946 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15947 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15948 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
15949 0, // ssub_8
15950 0, // ssub_9
15951 0, // ssub_10
15952 0, // ssub_11
15953 0, // ssub_12
15954 0, // ssub_13
15955 0, // ssub_14
15956 0, // ssub_15
15957 116, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15958 116, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15959 116, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15960 116, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15961 116, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
15962 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
15963 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15964 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
15965 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
15966 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15967 0, // ssub_4_ssub_5_ssub_8_ssub_9
15968 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
15969 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
15970 0, // ssub_6_ssub_7_dsub_5
15971 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
15972 0, // ssub_6_ssub_7_dsub_5_dsub_7
15973 0, // ssub_6_ssub_7_ssub_8_ssub_9
15974 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15975 0, // ssub_8_ssub_9_ssub_12_ssub_13
15976 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
15977 0, // dsub_5_dsub_7
15978 0, // dsub_5_ssub_12_ssub_13_dsub_7
15979 0, // dsub_5_ssub_12_ssub_13
15980 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
15981 },
15982 { // DQuad_with_dsub_1_in_DPR_8
15983 117, // dsub_0 -> DQuad_with_dsub_1_in_DPR_8
15984 117, // dsub_1 -> DQuad_with_dsub_1_in_DPR_8
15985 117, // dsub_2 -> DQuad_with_dsub_1_in_DPR_8
15986 117, // dsub_3 -> DQuad_with_dsub_1_in_DPR_8
15987 0, // dsub_4
15988 0, // dsub_5
15989 0, // dsub_6
15990 0, // dsub_7
15991 0, // gsub_0
15992 0, // gsub_1
15993 0, // qqsub_0
15994 0, // qqsub_1
15995 117, // qsub_0 -> DQuad_with_dsub_1_in_DPR_8
15996 117, // qsub_1 -> DQuad_with_dsub_1_in_DPR_8
15997 0, // qsub_2
15998 0, // qsub_3
15999 117, // ssub_0 -> DQuad_with_dsub_1_in_DPR_8
16000 117, // ssub_1 -> DQuad_with_dsub_1_in_DPR_8
16001 117, // ssub_2 -> DQuad_with_dsub_1_in_DPR_8
16002 117, // ssub_3 -> DQuad_with_dsub_1_in_DPR_8
16003 117, // ssub_4 -> DQuad_with_dsub_1_in_DPR_8
16004 117, // ssub_5 -> DQuad_with_dsub_1_in_DPR_8
16005 117, // ssub_6 -> DQuad_with_dsub_1_in_DPR_8
16006 117, // ssub_7 -> DQuad_with_dsub_1_in_DPR_8
16007 0, // ssub_8
16008 0, // ssub_9
16009 0, // ssub_10
16010 0, // ssub_11
16011 0, // ssub_12
16012 0, // ssub_13
16013 0, // ssub_14
16014 0, // ssub_15
16015 117, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8
16016 117, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8
16017 117, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8
16018 117, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8
16019 117, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8
16020 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16021 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16022 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16023 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16024 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16025 0, // ssub_4_ssub_5_ssub_8_ssub_9
16026 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16027 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16028 0, // ssub_6_ssub_7_dsub_5
16029 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16030 0, // ssub_6_ssub_7_dsub_5_dsub_7
16031 0, // ssub_6_ssub_7_ssub_8_ssub_9
16032 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16033 0, // ssub_8_ssub_9_ssub_12_ssub_13
16034 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16035 0, // dsub_5_dsub_7
16036 0, // dsub_5_ssub_12_ssub_13_dsub_7
16037 0, // dsub_5_ssub_12_ssub_13
16038 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16039 },
16040 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16041 118, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16042 118, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16043 118, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16044 118, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16045 0, // dsub_4
16046 0, // dsub_5
16047 0, // dsub_6
16048 0, // dsub_7
16049 0, // gsub_0
16050 0, // gsub_1
16051 0, // qqsub_0
16052 0, // qqsub_1
16053 118, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16054 118, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16055 0, // qsub_2
16056 0, // qsub_3
16057 118, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16058 118, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16059 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16060 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16061 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16062 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16063 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16064 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16065 0, // ssub_8
16066 0, // ssub_9
16067 0, // ssub_10
16068 0, // ssub_11
16069 0, // ssub_12
16070 0, // ssub_13
16071 0, // ssub_14
16072 0, // ssub_15
16073 118, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16074 118, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16075 118, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16076 118, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16077 118, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16078 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16079 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16080 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16081 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16082 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16083 0, // ssub_4_ssub_5_ssub_8_ssub_9
16084 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16085 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16086 0, // ssub_6_ssub_7_dsub_5
16087 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16088 0, // ssub_6_ssub_7_dsub_5_dsub_7
16089 0, // ssub_6_ssub_7_ssub_8_ssub_9
16090 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16091 0, // ssub_8_ssub_9_ssub_12_ssub_13
16092 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16093 0, // dsub_5_dsub_7
16094 0, // dsub_5_ssub_12_ssub_13_dsub_7
16095 0, // dsub_5_ssub_12_ssub_13
16096 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16097 },
16098 { // MQQPR
16099 119, // dsub_0 -> MQQPR
16100 119, // dsub_1 -> MQQPR
16101 119, // dsub_2 -> MQQPR
16102 119, // dsub_3 -> MQQPR
16103 0, // dsub_4
16104 0, // dsub_5
16105 0, // dsub_6
16106 0, // dsub_7
16107 0, // gsub_0
16108 0, // gsub_1
16109 0, // qqsub_0
16110 0, // qqsub_1
16111 119, // qsub_0 -> MQQPR
16112 119, // qsub_1 -> MQQPR
16113 0, // qsub_2
16114 0, // qsub_3
16115 119, // ssub_0 -> MQQPR
16116 119, // ssub_1 -> MQQPR
16117 119, // ssub_2 -> MQQPR
16118 119, // ssub_3 -> MQQPR
16119 119, // ssub_4 -> MQQPR
16120 119, // ssub_5 -> MQQPR
16121 119, // ssub_6 -> MQQPR
16122 119, // ssub_7 -> MQQPR
16123 0, // ssub_8
16124 0, // ssub_9
16125 0, // ssub_10
16126 0, // ssub_11
16127 0, // ssub_12
16128 0, // ssub_13
16129 0, // ssub_14
16130 0, // ssub_15
16131 119, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQPR
16132 119, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR
16133 119, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQPR
16134 119, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQPR
16135 119, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR
16136 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16137 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16138 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16139 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16140 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16141 0, // ssub_4_ssub_5_ssub_8_ssub_9
16142 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16143 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16144 0, // ssub_6_ssub_7_dsub_5
16145 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16146 0, // ssub_6_ssub_7_dsub_5_dsub_7
16147 0, // ssub_6_ssub_7_ssub_8_ssub_9
16148 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16149 0, // ssub_8_ssub_9_ssub_12_ssub_13
16150 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16151 0, // dsub_5_dsub_7
16152 0, // dsub_5_ssub_12_ssub_13_dsub_7
16153 0, // dsub_5_ssub_12_ssub_13
16154 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16155 },
16156 { // DQuad_with_dsub_2_in_DPR_8
16157 120, // dsub_0 -> DQuad_with_dsub_2_in_DPR_8
16158 120, // dsub_1 -> DQuad_with_dsub_2_in_DPR_8
16159 120, // dsub_2 -> DQuad_with_dsub_2_in_DPR_8
16160 120, // dsub_3 -> DQuad_with_dsub_2_in_DPR_8
16161 0, // dsub_4
16162 0, // dsub_5
16163 0, // dsub_6
16164 0, // dsub_7
16165 0, // gsub_0
16166 0, // gsub_1
16167 0, // qqsub_0
16168 0, // qqsub_1
16169 120, // qsub_0 -> DQuad_with_dsub_2_in_DPR_8
16170 120, // qsub_1 -> DQuad_with_dsub_2_in_DPR_8
16171 0, // qsub_2
16172 0, // qsub_3
16173 120, // ssub_0 -> DQuad_with_dsub_2_in_DPR_8
16174 120, // ssub_1 -> DQuad_with_dsub_2_in_DPR_8
16175 120, // ssub_2 -> DQuad_with_dsub_2_in_DPR_8
16176 120, // ssub_3 -> DQuad_with_dsub_2_in_DPR_8
16177 120, // ssub_4 -> DQuad_with_dsub_2_in_DPR_8
16178 120, // ssub_5 -> DQuad_with_dsub_2_in_DPR_8
16179 120, // ssub_6 -> DQuad_with_dsub_2_in_DPR_8
16180 120, // ssub_7 -> DQuad_with_dsub_2_in_DPR_8
16181 0, // ssub_8
16182 0, // ssub_9
16183 0, // ssub_10
16184 0, // ssub_11
16185 0, // ssub_12
16186 0, // ssub_13
16187 0, // ssub_14
16188 0, // ssub_15
16189 120, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8
16190 120, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8
16191 120, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8
16192 120, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8
16193 120, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8
16194 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16195 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16196 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16197 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16198 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16199 0, // ssub_4_ssub_5_ssub_8_ssub_9
16200 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16201 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16202 0, // ssub_6_ssub_7_dsub_5
16203 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16204 0, // ssub_6_ssub_7_dsub_5_dsub_7
16205 0, // ssub_6_ssub_7_ssub_8_ssub_9
16206 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16207 0, // ssub_8_ssub_9_ssub_12_ssub_13
16208 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16209 0, // dsub_5_dsub_7
16210 0, // dsub_5_ssub_12_ssub_13_dsub_7
16211 0, // dsub_5_ssub_12_ssub_13
16212 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16213 },
16214 { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16215 121, // dsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16216 121, // dsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16217 121, // dsub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16218 121, // dsub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16219 0, // dsub_4
16220 0, // dsub_5
16221 0, // dsub_6
16222 0, // dsub_7
16223 0, // gsub_0
16224 0, // gsub_1
16225 0, // qqsub_0
16226 0, // qqsub_1
16227 121, // qsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16228 121, // qsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16229 0, // qsub_2
16230 0, // qsub_3
16231 121, // ssub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16232 121, // ssub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16233 121, // ssub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16234 121, // ssub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16235 121, // ssub_4 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16236 121, // ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16237 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16238 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16239 0, // ssub_8
16240 0, // ssub_9
16241 0, // ssub_10
16242 0, // ssub_11
16243 0, // ssub_12
16244 0, // ssub_13
16245 0, // ssub_14
16246 0, // ssub_15
16247 121, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16248 121, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16249 121, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16250 121, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16251 121, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16252 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16253 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16254 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16255 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16256 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16257 0, // ssub_4_ssub_5_ssub_8_ssub_9
16258 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16259 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16260 0, // ssub_6_ssub_7_dsub_5
16261 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16262 0, // ssub_6_ssub_7_dsub_5_dsub_7
16263 0, // ssub_6_ssub_7_ssub_8_ssub_9
16264 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16265 0, // ssub_8_ssub_9_ssub_12_ssub_13
16266 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16267 0, // dsub_5_dsub_7
16268 0, // dsub_5_ssub_12_ssub_13_dsub_7
16269 0, // dsub_5_ssub_12_ssub_13
16270 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16271 },
16272 { // DQuad_with_dsub_3_in_DPR_8
16273 122, // dsub_0 -> DQuad_with_dsub_3_in_DPR_8
16274 122, // dsub_1 -> DQuad_with_dsub_3_in_DPR_8
16275 122, // dsub_2 -> DQuad_with_dsub_3_in_DPR_8
16276 122, // dsub_3 -> DQuad_with_dsub_3_in_DPR_8
16277 0, // dsub_4
16278 0, // dsub_5
16279 0, // dsub_6
16280 0, // dsub_7
16281 0, // gsub_0
16282 0, // gsub_1
16283 0, // qqsub_0
16284 0, // qqsub_1
16285 122, // qsub_0 -> DQuad_with_dsub_3_in_DPR_8
16286 122, // qsub_1 -> DQuad_with_dsub_3_in_DPR_8
16287 0, // qsub_2
16288 0, // qsub_3
16289 122, // ssub_0 -> DQuad_with_dsub_3_in_DPR_8
16290 122, // ssub_1 -> DQuad_with_dsub_3_in_DPR_8
16291 122, // ssub_2 -> DQuad_with_dsub_3_in_DPR_8
16292 122, // ssub_3 -> DQuad_with_dsub_3_in_DPR_8
16293 122, // ssub_4 -> DQuad_with_dsub_3_in_DPR_8
16294 122, // ssub_5 -> DQuad_with_dsub_3_in_DPR_8
16295 122, // ssub_6 -> DQuad_with_dsub_3_in_DPR_8
16296 122, // ssub_7 -> DQuad_with_dsub_3_in_DPR_8
16297 0, // ssub_8
16298 0, // ssub_9
16299 0, // ssub_10
16300 0, // ssub_11
16301 0, // ssub_12
16302 0, // ssub_13
16303 0, // ssub_14
16304 0, // ssub_15
16305 122, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8
16306 122, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8
16307 122, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8
16308 122, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8
16309 122, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8
16310 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16311 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16312 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16313 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16314 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16315 0, // ssub_4_ssub_5_ssub_8_ssub_9
16316 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16317 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16318 0, // ssub_6_ssub_7_dsub_5
16319 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16320 0, // ssub_6_ssub_7_dsub_5_dsub_7
16321 0, // ssub_6_ssub_7_ssub_8_ssub_9
16322 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16323 0, // ssub_8_ssub_9_ssub_12_ssub_13
16324 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16325 0, // dsub_5_dsub_7
16326 0, // dsub_5_ssub_12_ssub_13_dsub_7
16327 0, // dsub_5_ssub_12_ssub_13
16328 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16329 },
16330 { // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16331 123, // dsub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16332 123, // dsub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16333 123, // dsub_2 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16334 123, // dsub_3 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16335 0, // dsub_4
16336 0, // dsub_5
16337 0, // dsub_6
16338 0, // dsub_7
16339 0, // gsub_0
16340 0, // gsub_1
16341 0, // qqsub_0
16342 0, // qqsub_1
16343 123, // qsub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16344 123, // qsub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16345 0, // qsub_2
16346 0, // qsub_3
16347 123, // ssub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16348 123, // ssub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16349 123, // ssub_2 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16350 123, // ssub_3 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16351 123, // ssub_4 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16352 123, // ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16353 123, // ssub_6 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16354 123, // ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16355 0, // ssub_8
16356 0, // ssub_9
16357 0, // ssub_10
16358 0, // ssub_11
16359 0, // ssub_12
16360 0, // ssub_13
16361 0, // ssub_14
16362 0, // ssub_15
16363 123, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16364 123, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16365 123, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16366 123, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16367 123, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16368 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16369 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16370 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16371 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16372 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16373 0, // ssub_4_ssub_5_ssub_8_ssub_9
16374 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16375 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16376 0, // ssub_6_ssub_7_dsub_5
16377 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16378 0, // ssub_6_ssub_7_dsub_5_dsub_7
16379 0, // ssub_6_ssub_7_ssub_8_ssub_9
16380 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16381 0, // ssub_8_ssub_9_ssub_12_ssub_13
16382 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16383 0, // dsub_5_dsub_7
16384 0, // dsub_5_ssub_12_ssub_13_dsub_7
16385 0, // dsub_5_ssub_12_ssub_13
16386 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16387 },
16388 { // DQuad_with_qsub_0_in_QPR_8
16389 124, // dsub_0 -> DQuad_with_qsub_0_in_QPR_8
16390 124, // dsub_1 -> DQuad_with_qsub_0_in_QPR_8
16391 124, // dsub_2 -> DQuad_with_qsub_0_in_QPR_8
16392 124, // dsub_3 -> DQuad_with_qsub_0_in_QPR_8
16393 0, // dsub_4
16394 0, // dsub_5
16395 0, // dsub_6
16396 0, // dsub_7
16397 0, // gsub_0
16398 0, // gsub_1
16399 0, // qqsub_0
16400 0, // qqsub_1
16401 124, // qsub_0 -> DQuad_with_qsub_0_in_QPR_8
16402 124, // qsub_1 -> DQuad_with_qsub_0_in_QPR_8
16403 0, // qsub_2
16404 0, // qsub_3
16405 124, // ssub_0 -> DQuad_with_qsub_0_in_QPR_8
16406 124, // ssub_1 -> DQuad_with_qsub_0_in_QPR_8
16407 124, // ssub_2 -> DQuad_with_qsub_0_in_QPR_8
16408 124, // ssub_3 -> DQuad_with_qsub_0_in_QPR_8
16409 124, // ssub_4 -> DQuad_with_qsub_0_in_QPR_8
16410 124, // ssub_5 -> DQuad_with_qsub_0_in_QPR_8
16411 124, // ssub_6 -> DQuad_with_qsub_0_in_QPR_8
16412 124, // ssub_7 -> DQuad_with_qsub_0_in_QPR_8
16413 0, // ssub_8
16414 0, // ssub_9
16415 0, // ssub_10
16416 0, // ssub_11
16417 0, // ssub_12
16418 0, // ssub_13
16419 0, // ssub_14
16420 0, // ssub_15
16421 124, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8
16422 124, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8
16423 124, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_QPR_8
16424 124, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_QPR_8
16425 124, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8
16426 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16427 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16428 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16429 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16430 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16431 0, // ssub_4_ssub_5_ssub_8_ssub_9
16432 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16433 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16434 0, // ssub_6_ssub_7_dsub_5
16435 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16436 0, // ssub_6_ssub_7_dsub_5_dsub_7
16437 0, // ssub_6_ssub_7_ssub_8_ssub_9
16438 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16439 0, // ssub_8_ssub_9_ssub_12_ssub_13
16440 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16441 0, // dsub_5_dsub_7
16442 0, // dsub_5_ssub_12_ssub_13_dsub_7
16443 0, // dsub_5_ssub_12_ssub_13
16444 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16445 },
16446 { // DQuad_with_qsub_1_in_QPR_8
16447 125, // dsub_0 -> DQuad_with_qsub_1_in_QPR_8
16448 125, // dsub_1 -> DQuad_with_qsub_1_in_QPR_8
16449 125, // dsub_2 -> DQuad_with_qsub_1_in_QPR_8
16450 125, // dsub_3 -> DQuad_with_qsub_1_in_QPR_8
16451 0, // dsub_4
16452 0, // dsub_5
16453 0, // dsub_6
16454 0, // dsub_7
16455 0, // gsub_0
16456 0, // gsub_1
16457 0, // qqsub_0
16458 0, // qqsub_1
16459 125, // qsub_0 -> DQuad_with_qsub_1_in_QPR_8
16460 125, // qsub_1 -> DQuad_with_qsub_1_in_QPR_8
16461 0, // qsub_2
16462 0, // qsub_3
16463 125, // ssub_0 -> DQuad_with_qsub_1_in_QPR_8
16464 125, // ssub_1 -> DQuad_with_qsub_1_in_QPR_8
16465 125, // ssub_2 -> DQuad_with_qsub_1_in_QPR_8
16466 125, // ssub_3 -> DQuad_with_qsub_1_in_QPR_8
16467 125, // ssub_4 -> DQuad_with_qsub_1_in_QPR_8
16468 125, // ssub_5 -> DQuad_with_qsub_1_in_QPR_8
16469 125, // ssub_6 -> DQuad_with_qsub_1_in_QPR_8
16470 125, // ssub_7 -> DQuad_with_qsub_1_in_QPR_8
16471 0, // ssub_8
16472 0, // ssub_9
16473 0, // ssub_10
16474 0, // ssub_11
16475 0, // ssub_12
16476 0, // ssub_13
16477 0, // ssub_14
16478 0, // ssub_15
16479 125, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8
16480 125, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8
16481 125, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_1_in_QPR_8
16482 125, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_1_in_QPR_8
16483 125, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8
16484 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16485 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16486 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16487 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16488 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16489 0, // ssub_4_ssub_5_ssub_8_ssub_9
16490 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16491 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16492 0, // ssub_6_ssub_7_dsub_5
16493 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16494 0, // ssub_6_ssub_7_dsub_5_dsub_7
16495 0, // ssub_6_ssub_7_ssub_8_ssub_9
16496 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16497 0, // ssub_8_ssub_9_ssub_12_ssub_13
16498 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16499 0, // dsub_5_dsub_7
16500 0, // dsub_5_ssub_12_ssub_13_dsub_7
16501 0, // dsub_5_ssub_12_ssub_13
16502 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16503 },
16504 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16505 126, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16506 126, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16507 126, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16508 126, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16509 0, // dsub_4
16510 0, // dsub_5
16511 0, // dsub_6
16512 0, // dsub_7
16513 0, // gsub_0
16514 0, // gsub_1
16515 0, // qqsub_0
16516 0, // qqsub_1
16517 126, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16518 126, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16519 0, // qsub_2
16520 0, // qsub_3
16521 126, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16522 126, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16523 126, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16524 126, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16525 126, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16526 126, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16527 126, // ssub_6 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16528 126, // ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16529 0, // ssub_8
16530 0, // ssub_9
16531 0, // ssub_10
16532 0, // ssub_11
16533 0, // ssub_12
16534 0, // ssub_13
16535 0, // ssub_14
16536 0, // ssub_15
16537 126, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16538 126, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16539 126, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16540 126, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16541 126, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
16542 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16543 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16544 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16545 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16546 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16547 0, // ssub_4_ssub_5_ssub_8_ssub_9
16548 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16549 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16550 0, // ssub_6_ssub_7_dsub_5
16551 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16552 0, // ssub_6_ssub_7_dsub_5_dsub_7
16553 0, // ssub_6_ssub_7_ssub_8_ssub_9
16554 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16555 0, // ssub_8_ssub_9_ssub_12_ssub_13
16556 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16557 0, // dsub_5_dsub_7
16558 0, // dsub_5_ssub_12_ssub_13_dsub_7
16559 0, // dsub_5_ssub_12_ssub_13
16560 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16561 },
16562 { // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16563 127, // dsub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16564 127, // dsub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16565 127, // dsub_2 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16566 127, // dsub_3 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16567 0, // dsub_4
16568 0, // dsub_5
16569 0, // dsub_6
16570 0, // dsub_7
16571 0, // gsub_0
16572 0, // gsub_1
16573 0, // qqsub_0
16574 0, // qqsub_1
16575 127, // qsub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16576 127, // qsub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16577 0, // qsub_2
16578 0, // qsub_3
16579 127, // ssub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16580 127, // ssub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16581 127, // ssub_2 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16582 127, // ssub_3 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16583 127, // ssub_4 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16584 127, // ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16585 127, // ssub_6 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16586 127, // ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16587 0, // ssub_8
16588 0, // ssub_9
16589 0, // ssub_10
16590 0, // ssub_11
16591 0, // ssub_12
16592 0, // ssub_13
16593 0, // ssub_14
16594 0, // ssub_15
16595 127, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16596 127, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16597 127, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16598 127, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16599 127, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
16600 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
16601 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16602 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
16603 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
16604 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16605 0, // ssub_4_ssub_5_ssub_8_ssub_9
16606 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
16607 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
16608 0, // ssub_6_ssub_7_dsub_5
16609 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
16610 0, // ssub_6_ssub_7_dsub_5_dsub_7
16611 0, // ssub_6_ssub_7_ssub_8_ssub_9
16612 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16613 0, // ssub_8_ssub_9_ssub_12_ssub_13
16614 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
16615 0, // dsub_5_dsub_7
16616 0, // dsub_5_ssub_12_ssub_13_dsub_7
16617 0, // dsub_5_ssub_12_ssub_13
16618 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
16619 },
16620 { // QQQQPR
16621 128, // dsub_0 -> QQQQPR
16622 128, // dsub_1 -> QQQQPR
16623 128, // dsub_2 -> QQQQPR
16624 128, // dsub_3 -> QQQQPR
16625 128, // dsub_4 -> QQQQPR
16626 128, // dsub_5 -> QQQQPR
16627 128, // dsub_6 -> QQQQPR
16628 128, // dsub_7 -> QQQQPR
16629 0, // gsub_0
16630 0, // gsub_1
16631 128, // qqsub_0 -> QQQQPR
16632 128, // qqsub_1 -> QQQQPR
16633 128, // qsub_0 -> QQQQPR
16634 128, // qsub_1 -> QQQQPR
16635 128, // qsub_2 -> QQQQPR
16636 128, // qsub_3 -> QQQQPR
16637 129, // ssub_0 -> QQQQPR_with_ssub_0
16638 129, // ssub_1 -> QQQQPR_with_ssub_0
16639 129, // ssub_2 -> QQQQPR_with_ssub_0
16640 129, // ssub_3 -> QQQQPR_with_ssub_0
16641 130, // ssub_4 -> QQQQPR_with_ssub_4
16642 130, // ssub_5 -> QQQQPR_with_ssub_4
16643 130, // ssub_6 -> QQQQPR_with_ssub_4
16644 130, // ssub_7 -> QQQQPR_with_ssub_4
16645 131, // ssub_8 -> QQQQPR_with_ssub_8
16646 131, // ssub_9 -> QQQQPR_with_ssub_8
16647 131, // ssub_10 -> QQQQPR_with_ssub_8
16648 131, // ssub_11 -> QQQQPR_with_ssub_8
16649 132, // ssub_12 -> MQQQQPR
16650 132, // ssub_13 -> MQQQQPR
16651 132, // ssub_14 -> MQQQQPR
16652 132, // ssub_15 -> MQQQQPR
16653 128, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR
16654 128, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR
16655 128, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR
16656 128, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR
16657 128, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR
16658 128, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR
16659 128, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR
16660 128, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR
16661 128, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR
16662 128, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR
16663 128, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR
16664 128, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR
16665 128, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR
16666 128, // ssub_6_ssub_7_dsub_5 -> QQQQPR
16667 128, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR
16668 128, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR
16669 128, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR
16670 128, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR
16671 128, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR
16672 128, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR
16673 128, // dsub_5_dsub_7 -> QQQQPR
16674 128, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR
16675 128, // dsub_5_ssub_12_ssub_13 -> QQQQPR
16676 128, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR
16677 },
16678 { // QQQQPR_with_ssub_0
16679 129, // dsub_0 -> QQQQPR_with_ssub_0
16680 129, // dsub_1 -> QQQQPR_with_ssub_0
16681 129, // dsub_2 -> QQQQPR_with_ssub_0
16682 129, // dsub_3 -> QQQQPR_with_ssub_0
16683 129, // dsub_4 -> QQQQPR_with_ssub_0
16684 129, // dsub_5 -> QQQQPR_with_ssub_0
16685 129, // dsub_6 -> QQQQPR_with_ssub_0
16686 129, // dsub_7 -> QQQQPR_with_ssub_0
16687 0, // gsub_0
16688 0, // gsub_1
16689 129, // qqsub_0 -> QQQQPR_with_ssub_0
16690 129, // qqsub_1 -> QQQQPR_with_ssub_0
16691 129, // qsub_0 -> QQQQPR_with_ssub_0
16692 129, // qsub_1 -> QQQQPR_with_ssub_0
16693 129, // qsub_2 -> QQQQPR_with_ssub_0
16694 129, // qsub_3 -> QQQQPR_with_ssub_0
16695 129, // ssub_0 -> QQQQPR_with_ssub_0
16696 129, // ssub_1 -> QQQQPR_with_ssub_0
16697 129, // ssub_2 -> QQQQPR_with_ssub_0
16698 129, // ssub_3 -> QQQQPR_with_ssub_0
16699 130, // ssub_4 -> QQQQPR_with_ssub_4
16700 130, // ssub_5 -> QQQQPR_with_ssub_4
16701 130, // ssub_6 -> QQQQPR_with_ssub_4
16702 130, // ssub_7 -> QQQQPR_with_ssub_4
16703 131, // ssub_8 -> QQQQPR_with_ssub_8
16704 131, // ssub_9 -> QQQQPR_with_ssub_8
16705 131, // ssub_10 -> QQQQPR_with_ssub_8
16706 131, // ssub_11 -> QQQQPR_with_ssub_8
16707 132, // ssub_12 -> MQQQQPR
16708 132, // ssub_13 -> MQQQQPR
16709 132, // ssub_14 -> MQQQQPR
16710 132, // ssub_15 -> MQQQQPR
16711 129, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_0
16712 129, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0
16713 129, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_0
16714 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_0
16715 129, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0
16716 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0
16717 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16718 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0
16719 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0
16720 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0
16721 129, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0
16722 129, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0
16723 129, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16724 129, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0
16725 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_0
16726 129, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0
16727 129, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0
16728 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16729 129, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16730 129, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16731 129, // dsub_5_dsub_7 -> QQQQPR_with_ssub_0
16732 129, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_0
16733 129, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0
16734 129, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_0
16735 },
16736 { // QQQQPR_with_ssub_4
16737 130, // dsub_0 -> QQQQPR_with_ssub_4
16738 130, // dsub_1 -> QQQQPR_with_ssub_4
16739 130, // dsub_2 -> QQQQPR_with_ssub_4
16740 130, // dsub_3 -> QQQQPR_with_ssub_4
16741 130, // dsub_4 -> QQQQPR_with_ssub_4
16742 130, // dsub_5 -> QQQQPR_with_ssub_4
16743 130, // dsub_6 -> QQQQPR_with_ssub_4
16744 130, // dsub_7 -> QQQQPR_with_ssub_4
16745 0, // gsub_0
16746 0, // gsub_1
16747 130, // qqsub_0 -> QQQQPR_with_ssub_4
16748 130, // qqsub_1 -> QQQQPR_with_ssub_4
16749 130, // qsub_0 -> QQQQPR_with_ssub_4
16750 130, // qsub_1 -> QQQQPR_with_ssub_4
16751 130, // qsub_2 -> QQQQPR_with_ssub_4
16752 130, // qsub_3 -> QQQQPR_with_ssub_4
16753 130, // ssub_0 -> QQQQPR_with_ssub_4
16754 130, // ssub_1 -> QQQQPR_with_ssub_4
16755 130, // ssub_2 -> QQQQPR_with_ssub_4
16756 130, // ssub_3 -> QQQQPR_with_ssub_4
16757 130, // ssub_4 -> QQQQPR_with_ssub_4
16758 130, // ssub_5 -> QQQQPR_with_ssub_4
16759 130, // ssub_6 -> QQQQPR_with_ssub_4
16760 130, // ssub_7 -> QQQQPR_with_ssub_4
16761 131, // ssub_8 -> QQQQPR_with_ssub_8
16762 131, // ssub_9 -> QQQQPR_with_ssub_8
16763 131, // ssub_10 -> QQQQPR_with_ssub_8
16764 131, // ssub_11 -> QQQQPR_with_ssub_8
16765 132, // ssub_12 -> MQQQQPR
16766 132, // ssub_13 -> MQQQQPR
16767 132, // ssub_14 -> MQQQQPR
16768 132, // ssub_15 -> MQQQQPR
16769 130, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_4
16770 130, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4
16771 130, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_4
16772 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_4
16773 130, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4
16774 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4
16775 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16776 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4
16777 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4
16778 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4
16779 130, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4
16780 130, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4
16781 130, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16782 130, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4
16783 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_4
16784 130, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4
16785 130, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4
16786 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16787 130, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16788 130, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16789 130, // dsub_5_dsub_7 -> QQQQPR_with_ssub_4
16790 130, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_4
16791 130, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4
16792 130, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_4
16793 },
16794 { // QQQQPR_with_ssub_8
16795 131, // dsub_0 -> QQQQPR_with_ssub_8
16796 131, // dsub_1 -> QQQQPR_with_ssub_8
16797 131, // dsub_2 -> QQQQPR_with_ssub_8
16798 131, // dsub_3 -> QQQQPR_with_ssub_8
16799 131, // dsub_4 -> QQQQPR_with_ssub_8
16800 131, // dsub_5 -> QQQQPR_with_ssub_8
16801 131, // dsub_6 -> QQQQPR_with_ssub_8
16802 131, // dsub_7 -> QQQQPR_with_ssub_8
16803 0, // gsub_0
16804 0, // gsub_1
16805 131, // qqsub_0 -> QQQQPR_with_ssub_8
16806 131, // qqsub_1 -> QQQQPR_with_ssub_8
16807 131, // qsub_0 -> QQQQPR_with_ssub_8
16808 131, // qsub_1 -> QQQQPR_with_ssub_8
16809 131, // qsub_2 -> QQQQPR_with_ssub_8
16810 131, // qsub_3 -> QQQQPR_with_ssub_8
16811 131, // ssub_0 -> QQQQPR_with_ssub_8
16812 131, // ssub_1 -> QQQQPR_with_ssub_8
16813 131, // ssub_2 -> QQQQPR_with_ssub_8
16814 131, // ssub_3 -> QQQQPR_with_ssub_8
16815 131, // ssub_4 -> QQQQPR_with_ssub_8
16816 131, // ssub_5 -> QQQQPR_with_ssub_8
16817 131, // ssub_6 -> QQQQPR_with_ssub_8
16818 131, // ssub_7 -> QQQQPR_with_ssub_8
16819 131, // ssub_8 -> QQQQPR_with_ssub_8
16820 131, // ssub_9 -> QQQQPR_with_ssub_8
16821 131, // ssub_10 -> QQQQPR_with_ssub_8
16822 131, // ssub_11 -> QQQQPR_with_ssub_8
16823 132, // ssub_12 -> MQQQQPR
16824 132, // ssub_13 -> MQQQQPR
16825 132, // ssub_14 -> MQQQQPR
16826 132, // ssub_15 -> MQQQQPR
16827 131, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_8
16828 131, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8
16829 131, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_8
16830 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_8
16831 131, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8
16832 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8
16833 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16834 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8
16835 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8
16836 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8
16837 131, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8
16838 131, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8
16839 131, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16840 131, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8
16841 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_8
16842 131, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8
16843 131, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8
16844 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16845 131, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16846 131, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16847 131, // dsub_5_dsub_7 -> QQQQPR_with_ssub_8
16848 131, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_8
16849 131, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8
16850 131, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_8
16851 },
16852 { // MQQQQPR
16853 132, // dsub_0 -> MQQQQPR
16854 132, // dsub_1 -> MQQQQPR
16855 132, // dsub_2 -> MQQQQPR
16856 132, // dsub_3 -> MQQQQPR
16857 132, // dsub_4 -> MQQQQPR
16858 132, // dsub_5 -> MQQQQPR
16859 132, // dsub_6 -> MQQQQPR
16860 132, // dsub_7 -> MQQQQPR
16861 0, // gsub_0
16862 0, // gsub_1
16863 132, // qqsub_0 -> MQQQQPR
16864 132, // qqsub_1 -> MQQQQPR
16865 132, // qsub_0 -> MQQQQPR
16866 132, // qsub_1 -> MQQQQPR
16867 132, // qsub_2 -> MQQQQPR
16868 132, // qsub_3 -> MQQQQPR
16869 132, // ssub_0 -> MQQQQPR
16870 132, // ssub_1 -> MQQQQPR
16871 132, // ssub_2 -> MQQQQPR
16872 132, // ssub_3 -> MQQQQPR
16873 132, // ssub_4 -> MQQQQPR
16874 132, // ssub_5 -> MQQQQPR
16875 132, // ssub_6 -> MQQQQPR
16876 132, // ssub_7 -> MQQQQPR
16877 132, // ssub_8 -> MQQQQPR
16878 132, // ssub_9 -> MQQQQPR
16879 132, // ssub_10 -> MQQQQPR
16880 132, // ssub_11 -> MQQQQPR
16881 132, // ssub_12 -> MQQQQPR
16882 132, // ssub_13 -> MQQQQPR
16883 132, // ssub_14 -> MQQQQPR
16884 132, // ssub_15 -> MQQQQPR
16885 132, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR
16886 132, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR
16887 132, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR
16888 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR
16889 132, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR
16890 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR
16891 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR
16892 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR
16893 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR
16894 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR
16895 132, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR
16896 132, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR
16897 132, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR
16898 132, // ssub_6_ssub_7_dsub_5 -> MQQQQPR
16899 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR
16900 132, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR
16901 132, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR
16902 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR
16903 132, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR
16904 132, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR
16905 132, // dsub_5_dsub_7 -> MQQQQPR
16906 132, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR
16907 132, // dsub_5_ssub_12_ssub_13 -> MQQQQPR
16908 132, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR
16909 },
16910 { // MQQQQPR_with_dsub_0_in_DPR_8
16911 133, // dsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8
16912 133, // dsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8
16913 133, // dsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8
16914 133, // dsub_3 -> MQQQQPR_with_dsub_0_in_DPR_8
16915 133, // dsub_4 -> MQQQQPR_with_dsub_0_in_DPR_8
16916 133, // dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16917 133, // dsub_6 -> MQQQQPR_with_dsub_0_in_DPR_8
16918 133, // dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16919 0, // gsub_0
16920 0, // gsub_1
16921 133, // qqsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8
16922 133, // qqsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8
16923 133, // qsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8
16924 133, // qsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8
16925 133, // qsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8
16926 133, // qsub_3 -> MQQQQPR_with_dsub_0_in_DPR_8
16927 133, // ssub_0 -> MQQQQPR_with_dsub_0_in_DPR_8
16928 133, // ssub_1 -> MQQQQPR_with_dsub_0_in_DPR_8
16929 133, // ssub_2 -> MQQQQPR_with_dsub_0_in_DPR_8
16930 133, // ssub_3 -> MQQQQPR_with_dsub_0_in_DPR_8
16931 133, // ssub_4 -> MQQQQPR_with_dsub_0_in_DPR_8
16932 133, // ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16933 133, // ssub_6 -> MQQQQPR_with_dsub_0_in_DPR_8
16934 133, // ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16935 133, // ssub_8 -> MQQQQPR_with_dsub_0_in_DPR_8
16936 133, // ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16937 133, // ssub_10 -> MQQQQPR_with_dsub_0_in_DPR_8
16938 133, // ssub_11 -> MQQQQPR_with_dsub_0_in_DPR_8
16939 133, // ssub_12 -> MQQQQPR_with_dsub_0_in_DPR_8
16940 133, // ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16941 133, // ssub_14 -> MQQQQPR_with_dsub_0_in_DPR_8
16942 133, // ssub_15 -> MQQQQPR_with_dsub_0_in_DPR_8
16943 133, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16944 133, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16945 133, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16946 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16947 133, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16948 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16949 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16950 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16951 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16952 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16953 133, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16954 133, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16955 133, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16956 133, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16957 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8
16958 133, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16959 133, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8
16960 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16961 133, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16962 133, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16963 133, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16964 133, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8
16965 133, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8
16966 133, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8
16967 },
16968 { // MQQQQPR_with_dsub_2_in_DPR_8
16969 134, // dsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8
16970 134, // dsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8
16971 134, // dsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8
16972 134, // dsub_3 -> MQQQQPR_with_dsub_2_in_DPR_8
16973 134, // dsub_4 -> MQQQQPR_with_dsub_2_in_DPR_8
16974 134, // dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
16975 134, // dsub_6 -> MQQQQPR_with_dsub_2_in_DPR_8
16976 134, // dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
16977 0, // gsub_0
16978 0, // gsub_1
16979 134, // qqsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8
16980 134, // qqsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8
16981 134, // qsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8
16982 134, // qsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8
16983 134, // qsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8
16984 134, // qsub_3 -> MQQQQPR_with_dsub_2_in_DPR_8
16985 134, // ssub_0 -> MQQQQPR_with_dsub_2_in_DPR_8
16986 134, // ssub_1 -> MQQQQPR_with_dsub_2_in_DPR_8
16987 134, // ssub_2 -> MQQQQPR_with_dsub_2_in_DPR_8
16988 134, // ssub_3 -> MQQQQPR_with_dsub_2_in_DPR_8
16989 134, // ssub_4 -> MQQQQPR_with_dsub_2_in_DPR_8
16990 134, // ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
16991 134, // ssub_6 -> MQQQQPR_with_dsub_2_in_DPR_8
16992 134, // ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
16993 134, // ssub_8 -> MQQQQPR_with_dsub_2_in_DPR_8
16994 134, // ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
16995 134, // ssub_10 -> MQQQQPR_with_dsub_2_in_DPR_8
16996 134, // ssub_11 -> MQQQQPR_with_dsub_2_in_DPR_8
16997 134, // ssub_12 -> MQQQQPR_with_dsub_2_in_DPR_8
16998 134, // ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
16999 134, // ssub_14 -> MQQQQPR_with_dsub_2_in_DPR_8
17000 134, // ssub_15 -> MQQQQPR_with_dsub_2_in_DPR_8
17001 134, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17002 134, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17003 134, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17004 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17005 134, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17006 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
17007 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17008 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17009 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17010 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
17011 134, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
17012 134, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
17013 134, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17014 134, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17015 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8
17016 134, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17017 134, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8
17018 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17019 134, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17020 134, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17021 134, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17022 134, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8
17023 134, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8
17024 134, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8
17025 },
17026 { // MQQQQPR_with_dsub_4_in_DPR_8
17027 135, // dsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8
17028 135, // dsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8
17029 135, // dsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8
17030 135, // dsub_3 -> MQQQQPR_with_dsub_4_in_DPR_8
17031 135, // dsub_4 -> MQQQQPR_with_dsub_4_in_DPR_8
17032 135, // dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17033 135, // dsub_6 -> MQQQQPR_with_dsub_4_in_DPR_8
17034 135, // dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17035 0, // gsub_0
17036 0, // gsub_1
17037 135, // qqsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8
17038 135, // qqsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8
17039 135, // qsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8
17040 135, // qsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8
17041 135, // qsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8
17042 135, // qsub_3 -> MQQQQPR_with_dsub_4_in_DPR_8
17043 135, // ssub_0 -> MQQQQPR_with_dsub_4_in_DPR_8
17044 135, // ssub_1 -> MQQQQPR_with_dsub_4_in_DPR_8
17045 135, // ssub_2 -> MQQQQPR_with_dsub_4_in_DPR_8
17046 135, // ssub_3 -> MQQQQPR_with_dsub_4_in_DPR_8
17047 135, // ssub_4 -> MQQQQPR_with_dsub_4_in_DPR_8
17048 135, // ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17049 135, // ssub_6 -> MQQQQPR_with_dsub_4_in_DPR_8
17050 135, // ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17051 135, // ssub_8 -> MQQQQPR_with_dsub_4_in_DPR_8
17052 135, // ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17053 135, // ssub_10 -> MQQQQPR_with_dsub_4_in_DPR_8
17054 135, // ssub_11 -> MQQQQPR_with_dsub_4_in_DPR_8
17055 135, // ssub_12 -> MQQQQPR_with_dsub_4_in_DPR_8
17056 135, // ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17057 135, // ssub_14 -> MQQQQPR_with_dsub_4_in_DPR_8
17058 135, // ssub_15 -> MQQQQPR_with_dsub_4_in_DPR_8
17059 135, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17060 135, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17061 135, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17062 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17063 135, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17064 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17065 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17066 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17067 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17068 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17069 135, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17070 135, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17071 135, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17072 135, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17073 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8
17074 135, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17075 135, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8
17076 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17077 135, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17078 135, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17079 135, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17080 135, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8
17081 135, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8
17082 135, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8
17083 },
17084 { // MQQQQPR_with_dsub_6_in_DPR_8
17085 136, // dsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8
17086 136, // dsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8
17087 136, // dsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8
17088 136, // dsub_3 -> MQQQQPR_with_dsub_6_in_DPR_8
17089 136, // dsub_4 -> MQQQQPR_with_dsub_6_in_DPR_8
17090 136, // dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17091 136, // dsub_6 -> MQQQQPR_with_dsub_6_in_DPR_8
17092 136, // dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17093 0, // gsub_0
17094 0, // gsub_1
17095 136, // qqsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8
17096 136, // qqsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8
17097 136, // qsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8
17098 136, // qsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8
17099 136, // qsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8
17100 136, // qsub_3 -> MQQQQPR_with_dsub_6_in_DPR_8
17101 136, // ssub_0 -> MQQQQPR_with_dsub_6_in_DPR_8
17102 136, // ssub_1 -> MQQQQPR_with_dsub_6_in_DPR_8
17103 136, // ssub_2 -> MQQQQPR_with_dsub_6_in_DPR_8
17104 136, // ssub_3 -> MQQQQPR_with_dsub_6_in_DPR_8
17105 136, // ssub_4 -> MQQQQPR_with_dsub_6_in_DPR_8
17106 136, // ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17107 136, // ssub_6 -> MQQQQPR_with_dsub_6_in_DPR_8
17108 136, // ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17109 136, // ssub_8 -> MQQQQPR_with_dsub_6_in_DPR_8
17110 136, // ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17111 136, // ssub_10 -> MQQQQPR_with_dsub_6_in_DPR_8
17112 136, // ssub_11 -> MQQQQPR_with_dsub_6_in_DPR_8
17113 136, // ssub_12 -> MQQQQPR_with_dsub_6_in_DPR_8
17114 136, // ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17115 136, // ssub_14 -> MQQQQPR_with_dsub_6_in_DPR_8
17116 136, // ssub_15 -> MQQQQPR_with_dsub_6_in_DPR_8
17117 136, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17118 136, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17119 136, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17120 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17121 136, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17122 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17123 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17124 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17125 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17126 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17127 136, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17128 136, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17129 136, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17130 136, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17131 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8
17132 136, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17133 136, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8
17134 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17135 136, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17136 136, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17137 136, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17138 136, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8
17139 136, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8
17140 136, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8
17141 },
17142 };
17143 assert(RC && "Missing regclass");
17144 if (!Idx) return RC;
17145 --Idx;
17146 assert(Idx < 56 && "Bad subreg");
17147 unsigned TV = Table[RC->getID()][Idx];
17148 return TV ? getRegClass(TV - 1) : nullptr;
17149}
17150
17151const TargetRegisterClass *ARMGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
17152 static const uint8_t Table[136][56] = {
17153 { // HPR
17154 0, // HPR:dsub_0
17155 0, // HPR:dsub_1
17156 0, // HPR:dsub_2
17157 0, // HPR:dsub_3
17158 0, // HPR:dsub_4
17159 0, // HPR:dsub_5
17160 0, // HPR:dsub_6
17161 0, // HPR:dsub_7
17162 0, // HPR:gsub_0
17163 0, // HPR:gsub_1
17164 0, // HPR:qqsub_0
17165 0, // HPR:qqsub_1
17166 0, // HPR:qsub_0
17167 0, // HPR:qsub_1
17168 0, // HPR:qsub_2
17169 0, // HPR:qsub_3
17170 0, // HPR:ssub_0
17171 0, // HPR:ssub_1
17172 0, // HPR:ssub_2
17173 0, // HPR:ssub_3
17174 0, // HPR:ssub_4
17175 0, // HPR:ssub_5
17176 0, // HPR:ssub_6
17177 0, // HPR:ssub_7
17178 0, // HPR:ssub_8
17179 0, // HPR:ssub_9
17180 0, // HPR:ssub_10
17181 0, // HPR:ssub_11
17182 0, // HPR:ssub_12
17183 0, // HPR:ssub_13
17184 0, // HPR:ssub_14
17185 0, // HPR:ssub_15
17186 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5
17187 0, // HPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17188 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7
17189 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17190 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5
17191 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17192 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17193 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17194 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17195 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17196 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9
17197 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17198 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17199 0, // HPR:ssub_6_ssub_7_dsub_5
17200 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17201 0, // HPR:ssub_6_ssub_7_dsub_5_dsub_7
17202 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9
17203 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17204 0, // HPR:ssub_8_ssub_9_ssub_12_ssub_13
17205 0, // HPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17206 0, // HPR:dsub_5_dsub_7
17207 0, // HPR:dsub_5_ssub_12_ssub_13_dsub_7
17208 0, // HPR:dsub_5_ssub_12_ssub_13
17209 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17210 },
17211 { // FPWithVPR
17212 0, // FPWithVPR:dsub_0
17213 0, // FPWithVPR:dsub_1
17214 0, // FPWithVPR:dsub_2
17215 0, // FPWithVPR:dsub_3
17216 0, // FPWithVPR:dsub_4
17217 0, // FPWithVPR:dsub_5
17218 0, // FPWithVPR:dsub_6
17219 0, // FPWithVPR:dsub_7
17220 0, // FPWithVPR:gsub_0
17221 0, // FPWithVPR:gsub_1
17222 0, // FPWithVPR:qqsub_0
17223 0, // FPWithVPR:qqsub_1
17224 0, // FPWithVPR:qsub_0
17225 0, // FPWithVPR:qsub_1
17226 0, // FPWithVPR:qsub_2
17227 0, // FPWithVPR:qsub_3
17228 3, // FPWithVPR:ssub_0 -> SPR
17229 3, // FPWithVPR:ssub_1 -> SPR
17230 0, // FPWithVPR:ssub_2
17231 0, // FPWithVPR:ssub_3
17232 0, // FPWithVPR:ssub_4
17233 0, // FPWithVPR:ssub_5
17234 0, // FPWithVPR:ssub_6
17235 0, // FPWithVPR:ssub_7
17236 0, // FPWithVPR:ssub_8
17237 0, // FPWithVPR:ssub_9
17238 0, // FPWithVPR:ssub_10
17239 0, // FPWithVPR:ssub_11
17240 0, // FPWithVPR:ssub_12
17241 0, // FPWithVPR:ssub_13
17242 0, // FPWithVPR:ssub_14
17243 0, // FPWithVPR:ssub_15
17244 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5
17245 0, // FPWithVPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17246 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7
17247 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17248 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5
17249 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17250 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17251 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17252 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17253 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17254 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9
17255 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17256 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17257 0, // FPWithVPR:ssub_6_ssub_7_dsub_5
17258 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17259 0, // FPWithVPR:ssub_6_ssub_7_dsub_5_dsub_7
17260 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9
17261 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17262 0, // FPWithVPR:ssub_8_ssub_9_ssub_12_ssub_13
17263 0, // FPWithVPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17264 0, // FPWithVPR:dsub_5_dsub_7
17265 0, // FPWithVPR:dsub_5_ssub_12_ssub_13_dsub_7
17266 0, // FPWithVPR:dsub_5_ssub_12_ssub_13
17267 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17268 },
17269 { // SPR
17270 0, // SPR:dsub_0
17271 0, // SPR:dsub_1
17272 0, // SPR:dsub_2
17273 0, // SPR:dsub_3
17274 0, // SPR:dsub_4
17275 0, // SPR:dsub_5
17276 0, // SPR:dsub_6
17277 0, // SPR:dsub_7
17278 0, // SPR:gsub_0
17279 0, // SPR:gsub_1
17280 0, // SPR:qqsub_0
17281 0, // SPR:qqsub_1
17282 0, // SPR:qsub_0
17283 0, // SPR:qsub_1
17284 0, // SPR:qsub_2
17285 0, // SPR:qsub_3
17286 0, // SPR:ssub_0
17287 0, // SPR:ssub_1
17288 0, // SPR:ssub_2
17289 0, // SPR:ssub_3
17290 0, // SPR:ssub_4
17291 0, // SPR:ssub_5
17292 0, // SPR:ssub_6
17293 0, // SPR:ssub_7
17294 0, // SPR:ssub_8
17295 0, // SPR:ssub_9
17296 0, // SPR:ssub_10
17297 0, // SPR:ssub_11
17298 0, // SPR:ssub_12
17299 0, // SPR:ssub_13
17300 0, // SPR:ssub_14
17301 0, // SPR:ssub_15
17302 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5
17303 0, // SPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17304 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7
17305 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17306 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5
17307 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17308 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17309 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17310 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17311 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17312 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9
17313 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17314 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17315 0, // SPR:ssub_6_ssub_7_dsub_5
17316 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17317 0, // SPR:ssub_6_ssub_7_dsub_5_dsub_7
17318 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9
17319 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17320 0, // SPR:ssub_8_ssub_9_ssub_12_ssub_13
17321 0, // SPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17322 0, // SPR:dsub_5_dsub_7
17323 0, // SPR:dsub_5_ssub_12_ssub_13_dsub_7
17324 0, // SPR:dsub_5_ssub_12_ssub_13
17325 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17326 },
17327 { // FPWithVPR_with_ssub_0
17328 0, // FPWithVPR_with_ssub_0:dsub_0
17329 0, // FPWithVPR_with_ssub_0:dsub_1
17330 0, // FPWithVPR_with_ssub_0:dsub_2
17331 0, // FPWithVPR_with_ssub_0:dsub_3
17332 0, // FPWithVPR_with_ssub_0:dsub_4
17333 0, // FPWithVPR_with_ssub_0:dsub_5
17334 0, // FPWithVPR_with_ssub_0:dsub_6
17335 0, // FPWithVPR_with_ssub_0:dsub_7
17336 0, // FPWithVPR_with_ssub_0:gsub_0
17337 0, // FPWithVPR_with_ssub_0:gsub_1
17338 0, // FPWithVPR_with_ssub_0:qqsub_0
17339 0, // FPWithVPR_with_ssub_0:qqsub_1
17340 0, // FPWithVPR_with_ssub_0:qsub_0
17341 0, // FPWithVPR_with_ssub_0:qsub_1
17342 0, // FPWithVPR_with_ssub_0:qsub_2
17343 0, // FPWithVPR_with_ssub_0:qsub_3
17344 3, // FPWithVPR_with_ssub_0:ssub_0 -> SPR
17345 3, // FPWithVPR_with_ssub_0:ssub_1 -> SPR
17346 0, // FPWithVPR_with_ssub_0:ssub_2
17347 0, // FPWithVPR_with_ssub_0:ssub_3
17348 0, // FPWithVPR_with_ssub_0:ssub_4
17349 0, // FPWithVPR_with_ssub_0:ssub_5
17350 0, // FPWithVPR_with_ssub_0:ssub_6
17351 0, // FPWithVPR_with_ssub_0:ssub_7
17352 0, // FPWithVPR_with_ssub_0:ssub_8
17353 0, // FPWithVPR_with_ssub_0:ssub_9
17354 0, // FPWithVPR_with_ssub_0:ssub_10
17355 0, // FPWithVPR_with_ssub_0:ssub_11
17356 0, // FPWithVPR_with_ssub_0:ssub_12
17357 0, // FPWithVPR_with_ssub_0:ssub_13
17358 0, // FPWithVPR_with_ssub_0:ssub_14
17359 0, // FPWithVPR_with_ssub_0:ssub_15
17360 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5
17361 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17362 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
17363 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17364 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5
17365 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17366 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17367 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17368 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17369 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17370 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9
17371 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17372 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17373 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5
17374 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17375 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
17376 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
17377 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17378 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
17379 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17380 0, // FPWithVPR_with_ssub_0:dsub_5_dsub_7
17381 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
17382 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13
17383 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17384 },
17385 { // GPR
17386 0, // GPR:dsub_0
17387 0, // GPR:dsub_1
17388 0, // GPR:dsub_2
17389 0, // GPR:dsub_3
17390 0, // GPR:dsub_4
17391 0, // GPR:dsub_5
17392 0, // GPR:dsub_6
17393 0, // GPR:dsub_7
17394 0, // GPR:gsub_0
17395 0, // GPR:gsub_1
17396 0, // GPR:qqsub_0
17397 0, // GPR:qqsub_1
17398 0, // GPR:qsub_0
17399 0, // GPR:qsub_1
17400 0, // GPR:qsub_2
17401 0, // GPR:qsub_3
17402 0, // GPR:ssub_0
17403 0, // GPR:ssub_1
17404 0, // GPR:ssub_2
17405 0, // GPR:ssub_3
17406 0, // GPR:ssub_4
17407 0, // GPR:ssub_5
17408 0, // GPR:ssub_6
17409 0, // GPR:ssub_7
17410 0, // GPR:ssub_8
17411 0, // GPR:ssub_9
17412 0, // GPR:ssub_10
17413 0, // GPR:ssub_11
17414 0, // GPR:ssub_12
17415 0, // GPR:ssub_13
17416 0, // GPR:ssub_14
17417 0, // GPR:ssub_15
17418 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5
17419 0, // GPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17420 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7
17421 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17422 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5
17423 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17424 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17425 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17426 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17427 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17428 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9
17429 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17430 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17431 0, // GPR:ssub_6_ssub_7_dsub_5
17432 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17433 0, // GPR:ssub_6_ssub_7_dsub_5_dsub_7
17434 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9
17435 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17436 0, // GPR:ssub_8_ssub_9_ssub_12_ssub_13
17437 0, // GPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17438 0, // GPR:dsub_5_dsub_7
17439 0, // GPR:dsub_5_ssub_12_ssub_13_dsub_7
17440 0, // GPR:dsub_5_ssub_12_ssub_13
17441 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17442 },
17443 { // GPRwithAPSR
17444 0, // GPRwithAPSR:dsub_0
17445 0, // GPRwithAPSR:dsub_1
17446 0, // GPRwithAPSR:dsub_2
17447 0, // GPRwithAPSR:dsub_3
17448 0, // GPRwithAPSR:dsub_4
17449 0, // GPRwithAPSR:dsub_5
17450 0, // GPRwithAPSR:dsub_6
17451 0, // GPRwithAPSR:dsub_7
17452 0, // GPRwithAPSR:gsub_0
17453 0, // GPRwithAPSR:gsub_1
17454 0, // GPRwithAPSR:qqsub_0
17455 0, // GPRwithAPSR:qqsub_1
17456 0, // GPRwithAPSR:qsub_0
17457 0, // GPRwithAPSR:qsub_1
17458 0, // GPRwithAPSR:qsub_2
17459 0, // GPRwithAPSR:qsub_3
17460 0, // GPRwithAPSR:ssub_0
17461 0, // GPRwithAPSR:ssub_1
17462 0, // GPRwithAPSR:ssub_2
17463 0, // GPRwithAPSR:ssub_3
17464 0, // GPRwithAPSR:ssub_4
17465 0, // GPRwithAPSR:ssub_5
17466 0, // GPRwithAPSR:ssub_6
17467 0, // GPRwithAPSR:ssub_7
17468 0, // GPRwithAPSR:ssub_8
17469 0, // GPRwithAPSR:ssub_9
17470 0, // GPRwithAPSR:ssub_10
17471 0, // GPRwithAPSR:ssub_11
17472 0, // GPRwithAPSR:ssub_12
17473 0, // GPRwithAPSR:ssub_13
17474 0, // GPRwithAPSR:ssub_14
17475 0, // GPRwithAPSR:ssub_15
17476 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5
17477 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17478 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7
17479 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17480 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5
17481 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17482 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17483 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17484 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17485 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17486 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9
17487 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17488 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17489 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5
17490 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17491 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5_dsub_7
17492 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9
17493 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17494 0, // GPRwithAPSR:ssub_8_ssub_9_ssub_12_ssub_13
17495 0, // GPRwithAPSR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17496 0, // GPRwithAPSR:dsub_5_dsub_7
17497 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13_dsub_7
17498 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13
17499 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17500 },
17501 { // GPRwithZR
17502 0, // GPRwithZR:dsub_0
17503 0, // GPRwithZR:dsub_1
17504 0, // GPRwithZR:dsub_2
17505 0, // GPRwithZR:dsub_3
17506 0, // GPRwithZR:dsub_4
17507 0, // GPRwithZR:dsub_5
17508 0, // GPRwithZR:dsub_6
17509 0, // GPRwithZR:dsub_7
17510 0, // GPRwithZR:gsub_0
17511 0, // GPRwithZR:gsub_1
17512 0, // GPRwithZR:qqsub_0
17513 0, // GPRwithZR:qqsub_1
17514 0, // GPRwithZR:qsub_0
17515 0, // GPRwithZR:qsub_1
17516 0, // GPRwithZR:qsub_2
17517 0, // GPRwithZR:qsub_3
17518 0, // GPRwithZR:ssub_0
17519 0, // GPRwithZR:ssub_1
17520 0, // GPRwithZR:ssub_2
17521 0, // GPRwithZR:ssub_3
17522 0, // GPRwithZR:ssub_4
17523 0, // GPRwithZR:ssub_5
17524 0, // GPRwithZR:ssub_6
17525 0, // GPRwithZR:ssub_7
17526 0, // GPRwithZR:ssub_8
17527 0, // GPRwithZR:ssub_9
17528 0, // GPRwithZR:ssub_10
17529 0, // GPRwithZR:ssub_11
17530 0, // GPRwithZR:ssub_12
17531 0, // GPRwithZR:ssub_13
17532 0, // GPRwithZR:ssub_14
17533 0, // GPRwithZR:ssub_15
17534 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5
17535 0, // GPRwithZR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17536 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7
17537 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17538 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5
17539 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17540 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17541 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17542 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17543 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17544 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9
17545 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17546 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17547 0, // GPRwithZR:ssub_6_ssub_7_dsub_5
17548 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17549 0, // GPRwithZR:ssub_6_ssub_7_dsub_5_dsub_7
17550 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9
17551 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17552 0, // GPRwithZR:ssub_8_ssub_9_ssub_12_ssub_13
17553 0, // GPRwithZR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17554 0, // GPRwithZR:dsub_5_dsub_7
17555 0, // GPRwithZR:dsub_5_ssub_12_ssub_13_dsub_7
17556 0, // GPRwithZR:dsub_5_ssub_12_ssub_13
17557 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17558 },
17559 { // SPR_8
17560 0, // SPR_8:dsub_0
17561 0, // SPR_8:dsub_1
17562 0, // SPR_8:dsub_2
17563 0, // SPR_8:dsub_3
17564 0, // SPR_8:dsub_4
17565 0, // SPR_8:dsub_5
17566 0, // SPR_8:dsub_6
17567 0, // SPR_8:dsub_7
17568 0, // SPR_8:gsub_0
17569 0, // SPR_8:gsub_1
17570 0, // SPR_8:qqsub_0
17571 0, // SPR_8:qqsub_1
17572 0, // SPR_8:qsub_0
17573 0, // SPR_8:qsub_1
17574 0, // SPR_8:qsub_2
17575 0, // SPR_8:qsub_3
17576 0, // SPR_8:ssub_0
17577 0, // SPR_8:ssub_1
17578 0, // SPR_8:ssub_2
17579 0, // SPR_8:ssub_3
17580 0, // SPR_8:ssub_4
17581 0, // SPR_8:ssub_5
17582 0, // SPR_8:ssub_6
17583 0, // SPR_8:ssub_7
17584 0, // SPR_8:ssub_8
17585 0, // SPR_8:ssub_9
17586 0, // SPR_8:ssub_10
17587 0, // SPR_8:ssub_11
17588 0, // SPR_8:ssub_12
17589 0, // SPR_8:ssub_13
17590 0, // SPR_8:ssub_14
17591 0, // SPR_8:ssub_15
17592 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5
17593 0, // SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17594 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7
17595 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17596 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5
17597 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17598 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17599 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17600 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17601 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17602 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9
17603 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17604 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17605 0, // SPR_8:ssub_6_ssub_7_dsub_5
17606 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17607 0, // SPR_8:ssub_6_ssub_7_dsub_5_dsub_7
17608 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9
17609 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17610 0, // SPR_8:ssub_8_ssub_9_ssub_12_ssub_13
17611 0, // SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17612 0, // SPR_8:dsub_5_dsub_7
17613 0, // SPR_8:dsub_5_ssub_12_ssub_13_dsub_7
17614 0, // SPR_8:dsub_5_ssub_12_ssub_13
17615 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17616 },
17617 { // GPRnopc
17618 0, // GPRnopc:dsub_0
17619 0, // GPRnopc:dsub_1
17620 0, // GPRnopc:dsub_2
17621 0, // GPRnopc:dsub_3
17622 0, // GPRnopc:dsub_4
17623 0, // GPRnopc:dsub_5
17624 0, // GPRnopc:dsub_6
17625 0, // GPRnopc:dsub_7
17626 0, // GPRnopc:gsub_0
17627 0, // GPRnopc:gsub_1
17628 0, // GPRnopc:qqsub_0
17629 0, // GPRnopc:qqsub_1
17630 0, // GPRnopc:qsub_0
17631 0, // GPRnopc:qsub_1
17632 0, // GPRnopc:qsub_2
17633 0, // GPRnopc:qsub_3
17634 0, // GPRnopc:ssub_0
17635 0, // GPRnopc:ssub_1
17636 0, // GPRnopc:ssub_2
17637 0, // GPRnopc:ssub_3
17638 0, // GPRnopc:ssub_4
17639 0, // GPRnopc:ssub_5
17640 0, // GPRnopc:ssub_6
17641 0, // GPRnopc:ssub_7
17642 0, // GPRnopc:ssub_8
17643 0, // GPRnopc:ssub_9
17644 0, // GPRnopc:ssub_10
17645 0, // GPRnopc:ssub_11
17646 0, // GPRnopc:ssub_12
17647 0, // GPRnopc:ssub_13
17648 0, // GPRnopc:ssub_14
17649 0, // GPRnopc:ssub_15
17650 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5
17651 0, // GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17652 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7
17653 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17654 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5
17655 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17656 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17657 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17658 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17659 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17660 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9
17661 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17662 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17663 0, // GPRnopc:ssub_6_ssub_7_dsub_5
17664 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17665 0, // GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7
17666 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9
17667 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17668 0, // GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13
17669 0, // GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17670 0, // GPRnopc:dsub_5_dsub_7
17671 0, // GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7
17672 0, // GPRnopc:dsub_5_ssub_12_ssub_13
17673 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17674 },
17675 { // GPRnosp
17676 0, // GPRnosp:dsub_0
17677 0, // GPRnosp:dsub_1
17678 0, // GPRnosp:dsub_2
17679 0, // GPRnosp:dsub_3
17680 0, // GPRnosp:dsub_4
17681 0, // GPRnosp:dsub_5
17682 0, // GPRnosp:dsub_6
17683 0, // GPRnosp:dsub_7
17684 0, // GPRnosp:gsub_0
17685 0, // GPRnosp:gsub_1
17686 0, // GPRnosp:qqsub_0
17687 0, // GPRnosp:qqsub_1
17688 0, // GPRnosp:qsub_0
17689 0, // GPRnosp:qsub_1
17690 0, // GPRnosp:qsub_2
17691 0, // GPRnosp:qsub_3
17692 0, // GPRnosp:ssub_0
17693 0, // GPRnosp:ssub_1
17694 0, // GPRnosp:ssub_2
17695 0, // GPRnosp:ssub_3
17696 0, // GPRnosp:ssub_4
17697 0, // GPRnosp:ssub_5
17698 0, // GPRnosp:ssub_6
17699 0, // GPRnosp:ssub_7
17700 0, // GPRnosp:ssub_8
17701 0, // GPRnosp:ssub_9
17702 0, // GPRnosp:ssub_10
17703 0, // GPRnosp:ssub_11
17704 0, // GPRnosp:ssub_12
17705 0, // GPRnosp:ssub_13
17706 0, // GPRnosp:ssub_14
17707 0, // GPRnosp:ssub_15
17708 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5
17709 0, // GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17710 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7
17711 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17712 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5
17713 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17714 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17715 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17716 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17717 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17718 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9
17719 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17720 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17721 0, // GPRnosp:ssub_6_ssub_7_dsub_5
17722 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17723 0, // GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7
17724 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9
17725 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17726 0, // GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13
17727 0, // GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17728 0, // GPRnosp:dsub_5_dsub_7
17729 0, // GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7
17730 0, // GPRnosp:dsub_5_ssub_12_ssub_13
17731 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17732 },
17733 { // GPRwithAPSR_NZCVnosp
17734 0, // GPRwithAPSR_NZCVnosp:dsub_0
17735 0, // GPRwithAPSR_NZCVnosp:dsub_1
17736 0, // GPRwithAPSR_NZCVnosp:dsub_2
17737 0, // GPRwithAPSR_NZCVnosp:dsub_3
17738 0, // GPRwithAPSR_NZCVnosp:dsub_4
17739 0, // GPRwithAPSR_NZCVnosp:dsub_5
17740 0, // GPRwithAPSR_NZCVnosp:dsub_6
17741 0, // GPRwithAPSR_NZCVnosp:dsub_7
17742 0, // GPRwithAPSR_NZCVnosp:gsub_0
17743 0, // GPRwithAPSR_NZCVnosp:gsub_1
17744 0, // GPRwithAPSR_NZCVnosp:qqsub_0
17745 0, // GPRwithAPSR_NZCVnosp:qqsub_1
17746 0, // GPRwithAPSR_NZCVnosp:qsub_0
17747 0, // GPRwithAPSR_NZCVnosp:qsub_1
17748 0, // GPRwithAPSR_NZCVnosp:qsub_2
17749 0, // GPRwithAPSR_NZCVnosp:qsub_3
17750 0, // GPRwithAPSR_NZCVnosp:ssub_0
17751 0, // GPRwithAPSR_NZCVnosp:ssub_1
17752 0, // GPRwithAPSR_NZCVnosp:ssub_2
17753 0, // GPRwithAPSR_NZCVnosp:ssub_3
17754 0, // GPRwithAPSR_NZCVnosp:ssub_4
17755 0, // GPRwithAPSR_NZCVnosp:ssub_5
17756 0, // GPRwithAPSR_NZCVnosp:ssub_6
17757 0, // GPRwithAPSR_NZCVnosp:ssub_7
17758 0, // GPRwithAPSR_NZCVnosp:ssub_8
17759 0, // GPRwithAPSR_NZCVnosp:ssub_9
17760 0, // GPRwithAPSR_NZCVnosp:ssub_10
17761 0, // GPRwithAPSR_NZCVnosp:ssub_11
17762 0, // GPRwithAPSR_NZCVnosp:ssub_12
17763 0, // GPRwithAPSR_NZCVnosp:ssub_13
17764 0, // GPRwithAPSR_NZCVnosp:ssub_14
17765 0, // GPRwithAPSR_NZCVnosp:ssub_15
17766 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5
17767 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17768 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7
17769 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17770 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5
17771 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17772 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17773 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17774 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17775 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17776 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9
17777 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17778 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17779 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5
17780 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17781 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7
17782 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9
17783 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17784 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13
17785 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17786 0, // GPRwithAPSR_NZCVnosp:dsub_5_dsub_7
17787 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7
17788 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13
17789 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17790 },
17791 { // GPRwithAPSRnosp
17792 0, // GPRwithAPSRnosp:dsub_0
17793 0, // GPRwithAPSRnosp:dsub_1
17794 0, // GPRwithAPSRnosp:dsub_2
17795 0, // GPRwithAPSRnosp:dsub_3
17796 0, // GPRwithAPSRnosp:dsub_4
17797 0, // GPRwithAPSRnosp:dsub_5
17798 0, // GPRwithAPSRnosp:dsub_6
17799 0, // GPRwithAPSRnosp:dsub_7
17800 0, // GPRwithAPSRnosp:gsub_0
17801 0, // GPRwithAPSRnosp:gsub_1
17802 0, // GPRwithAPSRnosp:qqsub_0
17803 0, // GPRwithAPSRnosp:qqsub_1
17804 0, // GPRwithAPSRnosp:qsub_0
17805 0, // GPRwithAPSRnosp:qsub_1
17806 0, // GPRwithAPSRnosp:qsub_2
17807 0, // GPRwithAPSRnosp:qsub_3
17808 0, // GPRwithAPSRnosp:ssub_0
17809 0, // GPRwithAPSRnosp:ssub_1
17810 0, // GPRwithAPSRnosp:ssub_2
17811 0, // GPRwithAPSRnosp:ssub_3
17812 0, // GPRwithAPSRnosp:ssub_4
17813 0, // GPRwithAPSRnosp:ssub_5
17814 0, // GPRwithAPSRnosp:ssub_6
17815 0, // GPRwithAPSRnosp:ssub_7
17816 0, // GPRwithAPSRnosp:ssub_8
17817 0, // GPRwithAPSRnosp:ssub_9
17818 0, // GPRwithAPSRnosp:ssub_10
17819 0, // GPRwithAPSRnosp:ssub_11
17820 0, // GPRwithAPSRnosp:ssub_12
17821 0, // GPRwithAPSRnosp:ssub_13
17822 0, // GPRwithAPSRnosp:ssub_14
17823 0, // GPRwithAPSRnosp:ssub_15
17824 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5
17825 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17826 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7
17827 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17828 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5
17829 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17830 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17831 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17832 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17833 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17834 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9
17835 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17836 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17837 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5
17838 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17839 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5_dsub_7
17840 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9
17841 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17842 0, // GPRwithAPSRnosp:ssub_8_ssub_9_ssub_12_ssub_13
17843 0, // GPRwithAPSRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17844 0, // GPRwithAPSRnosp:dsub_5_dsub_7
17845 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13_dsub_7
17846 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13
17847 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17848 },
17849 { // GPRwithZRnosp
17850 0, // GPRwithZRnosp:dsub_0
17851 0, // GPRwithZRnosp:dsub_1
17852 0, // GPRwithZRnosp:dsub_2
17853 0, // GPRwithZRnosp:dsub_3
17854 0, // GPRwithZRnosp:dsub_4
17855 0, // GPRwithZRnosp:dsub_5
17856 0, // GPRwithZRnosp:dsub_6
17857 0, // GPRwithZRnosp:dsub_7
17858 0, // GPRwithZRnosp:gsub_0
17859 0, // GPRwithZRnosp:gsub_1
17860 0, // GPRwithZRnosp:qqsub_0
17861 0, // GPRwithZRnosp:qqsub_1
17862 0, // GPRwithZRnosp:qsub_0
17863 0, // GPRwithZRnosp:qsub_1
17864 0, // GPRwithZRnosp:qsub_2
17865 0, // GPRwithZRnosp:qsub_3
17866 0, // GPRwithZRnosp:ssub_0
17867 0, // GPRwithZRnosp:ssub_1
17868 0, // GPRwithZRnosp:ssub_2
17869 0, // GPRwithZRnosp:ssub_3
17870 0, // GPRwithZRnosp:ssub_4
17871 0, // GPRwithZRnosp:ssub_5
17872 0, // GPRwithZRnosp:ssub_6
17873 0, // GPRwithZRnosp:ssub_7
17874 0, // GPRwithZRnosp:ssub_8
17875 0, // GPRwithZRnosp:ssub_9
17876 0, // GPRwithZRnosp:ssub_10
17877 0, // GPRwithZRnosp:ssub_11
17878 0, // GPRwithZRnosp:ssub_12
17879 0, // GPRwithZRnosp:ssub_13
17880 0, // GPRwithZRnosp:ssub_14
17881 0, // GPRwithZRnosp:ssub_15
17882 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5
17883 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17884 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7
17885 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17886 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5
17887 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17888 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17889 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17890 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17891 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17892 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9
17893 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17894 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17895 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5
17896 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17897 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5_dsub_7
17898 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9
17899 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17900 0, // GPRwithZRnosp:ssub_8_ssub_9_ssub_12_ssub_13
17901 0, // GPRwithZRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17902 0, // GPRwithZRnosp:dsub_5_dsub_7
17903 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13_dsub_7
17904 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13
17905 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17906 },
17907 { // GPRnoip
17908 0, // GPRnoip:dsub_0
17909 0, // GPRnoip:dsub_1
17910 0, // GPRnoip:dsub_2
17911 0, // GPRnoip:dsub_3
17912 0, // GPRnoip:dsub_4
17913 0, // GPRnoip:dsub_5
17914 0, // GPRnoip:dsub_6
17915 0, // GPRnoip:dsub_7
17916 0, // GPRnoip:gsub_0
17917 0, // GPRnoip:gsub_1
17918 0, // GPRnoip:qqsub_0
17919 0, // GPRnoip:qqsub_1
17920 0, // GPRnoip:qsub_0
17921 0, // GPRnoip:qsub_1
17922 0, // GPRnoip:qsub_2
17923 0, // GPRnoip:qsub_3
17924 0, // GPRnoip:ssub_0
17925 0, // GPRnoip:ssub_1
17926 0, // GPRnoip:ssub_2
17927 0, // GPRnoip:ssub_3
17928 0, // GPRnoip:ssub_4
17929 0, // GPRnoip:ssub_5
17930 0, // GPRnoip:ssub_6
17931 0, // GPRnoip:ssub_7
17932 0, // GPRnoip:ssub_8
17933 0, // GPRnoip:ssub_9
17934 0, // GPRnoip:ssub_10
17935 0, // GPRnoip:ssub_11
17936 0, // GPRnoip:ssub_12
17937 0, // GPRnoip:ssub_13
17938 0, // GPRnoip:ssub_14
17939 0, // GPRnoip:ssub_15
17940 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5
17941 0, // GPRnoip:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
17942 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7
17943 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
17944 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5
17945 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
17946 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17947 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
17948 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
17949 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17950 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9
17951 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
17952 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
17953 0, // GPRnoip:ssub_6_ssub_7_dsub_5
17954 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
17955 0, // GPRnoip:ssub_6_ssub_7_dsub_5_dsub_7
17956 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9
17957 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17958 0, // GPRnoip:ssub_8_ssub_9_ssub_12_ssub_13
17959 0, // GPRnoip:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
17960 0, // GPRnoip:dsub_5_dsub_7
17961 0, // GPRnoip:dsub_5_ssub_12_ssub_13_dsub_7
17962 0, // GPRnoip:dsub_5_ssub_12_ssub_13
17963 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
17964 },
17965 { // rGPR
17966 0, // rGPR:dsub_0
17967 0, // rGPR:dsub_1
17968 0, // rGPR:dsub_2
17969 0, // rGPR:dsub_3
17970 0, // rGPR:dsub_4
17971 0, // rGPR:dsub_5
17972 0, // rGPR:dsub_6
17973 0, // rGPR:dsub_7
17974 0, // rGPR:gsub_0
17975 0, // rGPR:gsub_1
17976 0, // rGPR:qqsub_0
17977 0, // rGPR:qqsub_1
17978 0, // rGPR:qsub_0
17979 0, // rGPR:qsub_1
17980 0, // rGPR:qsub_2
17981 0, // rGPR:qsub_3
17982 0, // rGPR:ssub_0
17983 0, // rGPR:ssub_1
17984 0, // rGPR:ssub_2
17985 0, // rGPR:ssub_3
17986 0, // rGPR:ssub_4
17987 0, // rGPR:ssub_5
17988 0, // rGPR:ssub_6
17989 0, // rGPR:ssub_7
17990 0, // rGPR:ssub_8
17991 0, // rGPR:ssub_9
17992 0, // rGPR:ssub_10
17993 0, // rGPR:ssub_11
17994 0, // rGPR:ssub_12
17995 0, // rGPR:ssub_13
17996 0, // rGPR:ssub_14
17997 0, // rGPR:ssub_15
17998 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5
17999 0, // rGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18000 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7
18001 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18002 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5
18003 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18004 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18005 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18006 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18007 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18008 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9
18009 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18010 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18011 0, // rGPR:ssub_6_ssub_7_dsub_5
18012 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18013 0, // rGPR:ssub_6_ssub_7_dsub_5_dsub_7
18014 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9
18015 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18016 0, // rGPR:ssub_8_ssub_9_ssub_12_ssub_13
18017 0, // rGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18018 0, // rGPR:dsub_5_dsub_7
18019 0, // rGPR:dsub_5_ssub_12_ssub_13_dsub_7
18020 0, // rGPR:dsub_5_ssub_12_ssub_13
18021 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18022 },
18023 { // GPRnoip_and_GPRnopc
18024 0, // GPRnoip_and_GPRnopc:dsub_0
18025 0, // GPRnoip_and_GPRnopc:dsub_1
18026 0, // GPRnoip_and_GPRnopc:dsub_2
18027 0, // GPRnoip_and_GPRnopc:dsub_3
18028 0, // GPRnoip_and_GPRnopc:dsub_4
18029 0, // GPRnoip_and_GPRnopc:dsub_5
18030 0, // GPRnoip_and_GPRnopc:dsub_6
18031 0, // GPRnoip_and_GPRnopc:dsub_7
18032 0, // GPRnoip_and_GPRnopc:gsub_0
18033 0, // GPRnoip_and_GPRnopc:gsub_1
18034 0, // GPRnoip_and_GPRnopc:qqsub_0
18035 0, // GPRnoip_and_GPRnopc:qqsub_1
18036 0, // GPRnoip_and_GPRnopc:qsub_0
18037 0, // GPRnoip_and_GPRnopc:qsub_1
18038 0, // GPRnoip_and_GPRnopc:qsub_2
18039 0, // GPRnoip_and_GPRnopc:qsub_3
18040 0, // GPRnoip_and_GPRnopc:ssub_0
18041 0, // GPRnoip_and_GPRnopc:ssub_1
18042 0, // GPRnoip_and_GPRnopc:ssub_2
18043 0, // GPRnoip_and_GPRnopc:ssub_3
18044 0, // GPRnoip_and_GPRnopc:ssub_4
18045 0, // GPRnoip_and_GPRnopc:ssub_5
18046 0, // GPRnoip_and_GPRnopc:ssub_6
18047 0, // GPRnoip_and_GPRnopc:ssub_7
18048 0, // GPRnoip_and_GPRnopc:ssub_8
18049 0, // GPRnoip_and_GPRnopc:ssub_9
18050 0, // GPRnoip_and_GPRnopc:ssub_10
18051 0, // GPRnoip_and_GPRnopc:ssub_11
18052 0, // GPRnoip_and_GPRnopc:ssub_12
18053 0, // GPRnoip_and_GPRnopc:ssub_13
18054 0, // GPRnoip_and_GPRnopc:ssub_14
18055 0, // GPRnoip_and_GPRnopc:ssub_15
18056 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5
18057 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18058 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7
18059 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18060 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5
18061 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18062 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18063 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18064 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18065 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18066 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9
18067 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18068 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18069 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5
18070 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18071 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7
18072 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9
18073 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18074 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13
18075 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18076 0, // GPRnoip_and_GPRnopc:dsub_5_dsub_7
18077 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7
18078 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13
18079 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18080 },
18081 { // GPRnoip_and_GPRnosp
18082 0, // GPRnoip_and_GPRnosp:dsub_0
18083 0, // GPRnoip_and_GPRnosp:dsub_1
18084 0, // GPRnoip_and_GPRnosp:dsub_2
18085 0, // GPRnoip_and_GPRnosp:dsub_3
18086 0, // GPRnoip_and_GPRnosp:dsub_4
18087 0, // GPRnoip_and_GPRnosp:dsub_5
18088 0, // GPRnoip_and_GPRnosp:dsub_6
18089 0, // GPRnoip_and_GPRnosp:dsub_7
18090 0, // GPRnoip_and_GPRnosp:gsub_0
18091 0, // GPRnoip_and_GPRnosp:gsub_1
18092 0, // GPRnoip_and_GPRnosp:qqsub_0
18093 0, // GPRnoip_and_GPRnosp:qqsub_1
18094 0, // GPRnoip_and_GPRnosp:qsub_0
18095 0, // GPRnoip_and_GPRnosp:qsub_1
18096 0, // GPRnoip_and_GPRnosp:qsub_2
18097 0, // GPRnoip_and_GPRnosp:qsub_3
18098 0, // GPRnoip_and_GPRnosp:ssub_0
18099 0, // GPRnoip_and_GPRnosp:ssub_1
18100 0, // GPRnoip_and_GPRnosp:ssub_2
18101 0, // GPRnoip_and_GPRnosp:ssub_3
18102 0, // GPRnoip_and_GPRnosp:ssub_4
18103 0, // GPRnoip_and_GPRnosp:ssub_5
18104 0, // GPRnoip_and_GPRnosp:ssub_6
18105 0, // GPRnoip_and_GPRnosp:ssub_7
18106 0, // GPRnoip_and_GPRnosp:ssub_8
18107 0, // GPRnoip_and_GPRnosp:ssub_9
18108 0, // GPRnoip_and_GPRnosp:ssub_10
18109 0, // GPRnoip_and_GPRnosp:ssub_11
18110 0, // GPRnoip_and_GPRnosp:ssub_12
18111 0, // GPRnoip_and_GPRnosp:ssub_13
18112 0, // GPRnoip_and_GPRnosp:ssub_14
18113 0, // GPRnoip_and_GPRnosp:ssub_15
18114 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5
18115 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18116 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7
18117 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18118 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5
18119 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18120 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18121 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18122 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18123 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18124 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9
18125 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18126 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18127 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5
18128 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18129 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7
18130 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9
18131 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18132 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13
18133 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18134 0, // GPRnoip_and_GPRnosp:dsub_5_dsub_7
18135 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7
18136 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13
18137 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18138 },
18139 { // GPRnoip_and_GPRwithAPSR_NZCVnosp
18140 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_0
18141 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_1
18142 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_2
18143 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_3
18144 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_4
18145 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5
18146 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_6
18147 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_7
18148 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_0
18149 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_1
18150 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_0
18151 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_1
18152 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_0
18153 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_1
18154 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_2
18155 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_3
18156 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0
18157 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_1
18158 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2
18159 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_3
18160 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4
18161 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_5
18162 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6
18163 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_7
18164 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8
18165 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_9
18166 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_10
18167 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_11
18168 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_12
18169 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_13
18170 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_14
18171 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_15
18172 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5
18173 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18174 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7
18175 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18176 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5
18177 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18178 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18179 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18180 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18181 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18182 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9
18183 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18184 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18185 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5
18186 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18187 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7
18188 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9
18189 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18190 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13
18191 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18192 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_dsub_7
18193 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7
18194 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13
18195 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18196 },
18197 { // tGPRwithpc
18198 0, // tGPRwithpc:dsub_0
18199 0, // tGPRwithpc:dsub_1
18200 0, // tGPRwithpc:dsub_2
18201 0, // tGPRwithpc:dsub_3
18202 0, // tGPRwithpc:dsub_4
18203 0, // tGPRwithpc:dsub_5
18204 0, // tGPRwithpc:dsub_6
18205 0, // tGPRwithpc:dsub_7
18206 0, // tGPRwithpc:gsub_0
18207 0, // tGPRwithpc:gsub_1
18208 0, // tGPRwithpc:qqsub_0
18209 0, // tGPRwithpc:qqsub_1
18210 0, // tGPRwithpc:qsub_0
18211 0, // tGPRwithpc:qsub_1
18212 0, // tGPRwithpc:qsub_2
18213 0, // tGPRwithpc:qsub_3
18214 0, // tGPRwithpc:ssub_0
18215 0, // tGPRwithpc:ssub_1
18216 0, // tGPRwithpc:ssub_2
18217 0, // tGPRwithpc:ssub_3
18218 0, // tGPRwithpc:ssub_4
18219 0, // tGPRwithpc:ssub_5
18220 0, // tGPRwithpc:ssub_6
18221 0, // tGPRwithpc:ssub_7
18222 0, // tGPRwithpc:ssub_8
18223 0, // tGPRwithpc:ssub_9
18224 0, // tGPRwithpc:ssub_10
18225 0, // tGPRwithpc:ssub_11
18226 0, // tGPRwithpc:ssub_12
18227 0, // tGPRwithpc:ssub_13
18228 0, // tGPRwithpc:ssub_14
18229 0, // tGPRwithpc:ssub_15
18230 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5
18231 0, // tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18232 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7
18233 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18234 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5
18235 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18236 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18237 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18238 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18239 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18240 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9
18241 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18242 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18243 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5
18244 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18245 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7
18246 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9
18247 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18248 0, // tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13
18249 0, // tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18250 0, // tGPRwithpc:dsub_5_dsub_7
18251 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7
18252 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13
18253 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18254 },
18255 { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
18256 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_0
18257 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_1
18258 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_2
18259 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_3
18260 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_4
18261 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5
18262 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_6
18263 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_7
18264 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_0
18265 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_1
18266 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_0
18267 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_1
18268 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_0
18269 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_1
18270 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_2
18271 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_3
18272 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0 -> SPR_8
18273 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_1 -> SPR_8
18274 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2
18275 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_3
18276 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4
18277 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_5
18278 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6
18279 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_7
18280 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8
18281 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_9
18282 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_10
18283 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_11
18284 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_12
18285 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_13
18286 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_14
18287 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_15
18288 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5
18289 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18290 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7
18291 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18292 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5
18293 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18294 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18295 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18296 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18297 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18298 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9
18299 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18300 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18301 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5
18302 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18303 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5_dsub_7
18304 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9
18305 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18306 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_ssub_12_ssub_13
18307 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18308 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_dsub_7
18309 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13_dsub_7
18310 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13
18311 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18312 },
18313 { // hGPR
18314 0, // hGPR:dsub_0
18315 0, // hGPR:dsub_1
18316 0, // hGPR:dsub_2
18317 0, // hGPR:dsub_3
18318 0, // hGPR:dsub_4
18319 0, // hGPR:dsub_5
18320 0, // hGPR:dsub_6
18321 0, // hGPR:dsub_7
18322 0, // hGPR:gsub_0
18323 0, // hGPR:gsub_1
18324 0, // hGPR:qqsub_0
18325 0, // hGPR:qqsub_1
18326 0, // hGPR:qsub_0
18327 0, // hGPR:qsub_1
18328 0, // hGPR:qsub_2
18329 0, // hGPR:qsub_3
18330 0, // hGPR:ssub_0
18331 0, // hGPR:ssub_1
18332 0, // hGPR:ssub_2
18333 0, // hGPR:ssub_3
18334 0, // hGPR:ssub_4
18335 0, // hGPR:ssub_5
18336 0, // hGPR:ssub_6
18337 0, // hGPR:ssub_7
18338 0, // hGPR:ssub_8
18339 0, // hGPR:ssub_9
18340 0, // hGPR:ssub_10
18341 0, // hGPR:ssub_11
18342 0, // hGPR:ssub_12
18343 0, // hGPR:ssub_13
18344 0, // hGPR:ssub_14
18345 0, // hGPR:ssub_15
18346 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18347 0, // hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18348 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18349 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18350 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18351 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18352 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18353 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18354 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18355 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18356 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18357 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18358 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18359 0, // hGPR:ssub_6_ssub_7_dsub_5
18360 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18361 0, // hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18362 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18363 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18364 0, // hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18365 0, // hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18366 0, // hGPR:dsub_5_dsub_7
18367 0, // hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18368 0, // hGPR:dsub_5_ssub_12_ssub_13
18369 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18370 },
18371 { // tGPR
18372 0, // tGPR:dsub_0
18373 0, // tGPR:dsub_1
18374 0, // tGPR:dsub_2
18375 0, // tGPR:dsub_3
18376 0, // tGPR:dsub_4
18377 0, // tGPR:dsub_5
18378 0, // tGPR:dsub_6
18379 0, // tGPR:dsub_7
18380 0, // tGPR:gsub_0
18381 0, // tGPR:gsub_1
18382 0, // tGPR:qqsub_0
18383 0, // tGPR:qqsub_1
18384 0, // tGPR:qsub_0
18385 0, // tGPR:qsub_1
18386 0, // tGPR:qsub_2
18387 0, // tGPR:qsub_3
18388 0, // tGPR:ssub_0
18389 0, // tGPR:ssub_1
18390 0, // tGPR:ssub_2
18391 0, // tGPR:ssub_3
18392 0, // tGPR:ssub_4
18393 0, // tGPR:ssub_5
18394 0, // tGPR:ssub_6
18395 0, // tGPR:ssub_7
18396 0, // tGPR:ssub_8
18397 0, // tGPR:ssub_9
18398 0, // tGPR:ssub_10
18399 0, // tGPR:ssub_11
18400 0, // tGPR:ssub_12
18401 0, // tGPR:ssub_13
18402 0, // tGPR:ssub_14
18403 0, // tGPR:ssub_15
18404 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5
18405 0, // tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18406 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7
18407 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18408 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5
18409 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18410 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18411 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18412 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18413 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18414 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9
18415 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18416 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18417 0, // tGPR:ssub_6_ssub_7_dsub_5
18418 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18419 0, // tGPR:ssub_6_ssub_7_dsub_5_dsub_7
18420 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9
18421 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18422 0, // tGPR:ssub_8_ssub_9_ssub_12_ssub_13
18423 0, // tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18424 0, // tGPR:dsub_5_dsub_7
18425 0, // tGPR:dsub_5_ssub_12_ssub_13_dsub_7
18426 0, // tGPR:dsub_5_ssub_12_ssub_13
18427 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18428 },
18429 { // tGPREven
18430 0, // tGPREven:dsub_0
18431 0, // tGPREven:dsub_1
18432 0, // tGPREven:dsub_2
18433 0, // tGPREven:dsub_3
18434 0, // tGPREven:dsub_4
18435 0, // tGPREven:dsub_5
18436 0, // tGPREven:dsub_6
18437 0, // tGPREven:dsub_7
18438 0, // tGPREven:gsub_0
18439 0, // tGPREven:gsub_1
18440 0, // tGPREven:qqsub_0
18441 0, // tGPREven:qqsub_1
18442 0, // tGPREven:qsub_0
18443 0, // tGPREven:qsub_1
18444 0, // tGPREven:qsub_2
18445 0, // tGPREven:qsub_3
18446 0, // tGPREven:ssub_0
18447 0, // tGPREven:ssub_1
18448 0, // tGPREven:ssub_2
18449 0, // tGPREven:ssub_3
18450 0, // tGPREven:ssub_4
18451 0, // tGPREven:ssub_5
18452 0, // tGPREven:ssub_6
18453 0, // tGPREven:ssub_7
18454 0, // tGPREven:ssub_8
18455 0, // tGPREven:ssub_9
18456 0, // tGPREven:ssub_10
18457 0, // tGPREven:ssub_11
18458 0, // tGPREven:ssub_12
18459 0, // tGPREven:ssub_13
18460 0, // tGPREven:ssub_14
18461 0, // tGPREven:ssub_15
18462 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5
18463 0, // tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18464 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7
18465 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18466 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5
18467 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18468 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18469 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18470 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18471 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18472 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9
18473 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18474 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18475 0, // tGPREven:ssub_6_ssub_7_dsub_5
18476 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18477 0, // tGPREven:ssub_6_ssub_7_dsub_5_dsub_7
18478 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9
18479 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18480 0, // tGPREven:ssub_8_ssub_9_ssub_12_ssub_13
18481 0, // tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18482 0, // tGPREven:dsub_5_dsub_7
18483 0, // tGPREven:dsub_5_ssub_12_ssub_13_dsub_7
18484 0, // tGPREven:dsub_5_ssub_12_ssub_13
18485 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18486 },
18487 { // GPRnopc_and_hGPR
18488 0, // GPRnopc_and_hGPR:dsub_0
18489 0, // GPRnopc_and_hGPR:dsub_1
18490 0, // GPRnopc_and_hGPR:dsub_2
18491 0, // GPRnopc_and_hGPR:dsub_3
18492 0, // GPRnopc_and_hGPR:dsub_4
18493 0, // GPRnopc_and_hGPR:dsub_5
18494 0, // GPRnopc_and_hGPR:dsub_6
18495 0, // GPRnopc_and_hGPR:dsub_7
18496 0, // GPRnopc_and_hGPR:gsub_0
18497 0, // GPRnopc_and_hGPR:gsub_1
18498 0, // GPRnopc_and_hGPR:qqsub_0
18499 0, // GPRnopc_and_hGPR:qqsub_1
18500 0, // GPRnopc_and_hGPR:qsub_0
18501 0, // GPRnopc_and_hGPR:qsub_1
18502 0, // GPRnopc_and_hGPR:qsub_2
18503 0, // GPRnopc_and_hGPR:qsub_3
18504 0, // GPRnopc_and_hGPR:ssub_0
18505 0, // GPRnopc_and_hGPR:ssub_1
18506 0, // GPRnopc_and_hGPR:ssub_2
18507 0, // GPRnopc_and_hGPR:ssub_3
18508 0, // GPRnopc_and_hGPR:ssub_4
18509 0, // GPRnopc_and_hGPR:ssub_5
18510 0, // GPRnopc_and_hGPR:ssub_6
18511 0, // GPRnopc_and_hGPR:ssub_7
18512 0, // GPRnopc_and_hGPR:ssub_8
18513 0, // GPRnopc_and_hGPR:ssub_9
18514 0, // GPRnopc_and_hGPR:ssub_10
18515 0, // GPRnopc_and_hGPR:ssub_11
18516 0, // GPRnopc_and_hGPR:ssub_12
18517 0, // GPRnopc_and_hGPR:ssub_13
18518 0, // GPRnopc_and_hGPR:ssub_14
18519 0, // GPRnopc_and_hGPR:ssub_15
18520 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18521 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18522 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18523 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18524 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18525 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18526 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18527 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18528 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18529 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18530 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18531 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18532 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18533 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5
18534 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18535 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18536 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18537 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18538 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18539 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18540 0, // GPRnopc_and_hGPR:dsub_5_dsub_7
18541 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18542 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13
18543 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18544 },
18545 { // GPRnosp_and_hGPR
18546 0, // GPRnosp_and_hGPR:dsub_0
18547 0, // GPRnosp_and_hGPR:dsub_1
18548 0, // GPRnosp_and_hGPR:dsub_2
18549 0, // GPRnosp_and_hGPR:dsub_3
18550 0, // GPRnosp_and_hGPR:dsub_4
18551 0, // GPRnosp_and_hGPR:dsub_5
18552 0, // GPRnosp_and_hGPR:dsub_6
18553 0, // GPRnosp_and_hGPR:dsub_7
18554 0, // GPRnosp_and_hGPR:gsub_0
18555 0, // GPRnosp_and_hGPR:gsub_1
18556 0, // GPRnosp_and_hGPR:qqsub_0
18557 0, // GPRnosp_and_hGPR:qqsub_1
18558 0, // GPRnosp_and_hGPR:qsub_0
18559 0, // GPRnosp_and_hGPR:qsub_1
18560 0, // GPRnosp_and_hGPR:qsub_2
18561 0, // GPRnosp_and_hGPR:qsub_3
18562 0, // GPRnosp_and_hGPR:ssub_0
18563 0, // GPRnosp_and_hGPR:ssub_1
18564 0, // GPRnosp_and_hGPR:ssub_2
18565 0, // GPRnosp_and_hGPR:ssub_3
18566 0, // GPRnosp_and_hGPR:ssub_4
18567 0, // GPRnosp_and_hGPR:ssub_5
18568 0, // GPRnosp_and_hGPR:ssub_6
18569 0, // GPRnosp_and_hGPR:ssub_7
18570 0, // GPRnosp_and_hGPR:ssub_8
18571 0, // GPRnosp_and_hGPR:ssub_9
18572 0, // GPRnosp_and_hGPR:ssub_10
18573 0, // GPRnosp_and_hGPR:ssub_11
18574 0, // GPRnosp_and_hGPR:ssub_12
18575 0, // GPRnosp_and_hGPR:ssub_13
18576 0, // GPRnosp_and_hGPR:ssub_14
18577 0, // GPRnosp_and_hGPR:ssub_15
18578 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18579 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18580 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18581 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18582 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18583 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18584 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18585 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18586 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18587 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18588 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18589 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18590 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18591 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5
18592 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18593 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18594 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18595 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18596 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18597 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18598 0, // GPRnosp_and_hGPR:dsub_5_dsub_7
18599 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18600 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13
18601 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18602 },
18603 { // GPRnoip_and_hGPR
18604 0, // GPRnoip_and_hGPR:dsub_0
18605 0, // GPRnoip_and_hGPR:dsub_1
18606 0, // GPRnoip_and_hGPR:dsub_2
18607 0, // GPRnoip_and_hGPR:dsub_3
18608 0, // GPRnoip_and_hGPR:dsub_4
18609 0, // GPRnoip_and_hGPR:dsub_5
18610 0, // GPRnoip_and_hGPR:dsub_6
18611 0, // GPRnoip_and_hGPR:dsub_7
18612 0, // GPRnoip_and_hGPR:gsub_0
18613 0, // GPRnoip_and_hGPR:gsub_1
18614 0, // GPRnoip_and_hGPR:qqsub_0
18615 0, // GPRnoip_and_hGPR:qqsub_1
18616 0, // GPRnoip_and_hGPR:qsub_0
18617 0, // GPRnoip_and_hGPR:qsub_1
18618 0, // GPRnoip_and_hGPR:qsub_2
18619 0, // GPRnoip_and_hGPR:qsub_3
18620 0, // GPRnoip_and_hGPR:ssub_0
18621 0, // GPRnoip_and_hGPR:ssub_1
18622 0, // GPRnoip_and_hGPR:ssub_2
18623 0, // GPRnoip_and_hGPR:ssub_3
18624 0, // GPRnoip_and_hGPR:ssub_4
18625 0, // GPRnoip_and_hGPR:ssub_5
18626 0, // GPRnoip_and_hGPR:ssub_6
18627 0, // GPRnoip_and_hGPR:ssub_7
18628 0, // GPRnoip_and_hGPR:ssub_8
18629 0, // GPRnoip_and_hGPR:ssub_9
18630 0, // GPRnoip_and_hGPR:ssub_10
18631 0, // GPRnoip_and_hGPR:ssub_11
18632 0, // GPRnoip_and_hGPR:ssub_12
18633 0, // GPRnoip_and_hGPR:ssub_13
18634 0, // GPRnoip_and_hGPR:ssub_14
18635 0, // GPRnoip_and_hGPR:ssub_15
18636 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18637 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18638 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18639 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18640 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18641 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18642 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18643 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18644 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18645 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18646 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18647 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18648 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18649 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5
18650 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18651 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18652 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18653 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18654 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18655 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18656 0, // GPRnoip_and_hGPR:dsub_5_dsub_7
18657 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18658 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13
18659 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18660 },
18661 { // GPRnoip_and_tGPREven
18662 0, // GPRnoip_and_tGPREven:dsub_0
18663 0, // GPRnoip_and_tGPREven:dsub_1
18664 0, // GPRnoip_and_tGPREven:dsub_2
18665 0, // GPRnoip_and_tGPREven:dsub_3
18666 0, // GPRnoip_and_tGPREven:dsub_4
18667 0, // GPRnoip_and_tGPREven:dsub_5
18668 0, // GPRnoip_and_tGPREven:dsub_6
18669 0, // GPRnoip_and_tGPREven:dsub_7
18670 0, // GPRnoip_and_tGPREven:gsub_0
18671 0, // GPRnoip_and_tGPREven:gsub_1
18672 0, // GPRnoip_and_tGPREven:qqsub_0
18673 0, // GPRnoip_and_tGPREven:qqsub_1
18674 0, // GPRnoip_and_tGPREven:qsub_0
18675 0, // GPRnoip_and_tGPREven:qsub_1
18676 0, // GPRnoip_and_tGPREven:qsub_2
18677 0, // GPRnoip_and_tGPREven:qsub_3
18678 0, // GPRnoip_and_tGPREven:ssub_0
18679 0, // GPRnoip_and_tGPREven:ssub_1
18680 0, // GPRnoip_and_tGPREven:ssub_2
18681 0, // GPRnoip_and_tGPREven:ssub_3
18682 0, // GPRnoip_and_tGPREven:ssub_4
18683 0, // GPRnoip_and_tGPREven:ssub_5
18684 0, // GPRnoip_and_tGPREven:ssub_6
18685 0, // GPRnoip_and_tGPREven:ssub_7
18686 0, // GPRnoip_and_tGPREven:ssub_8
18687 0, // GPRnoip_and_tGPREven:ssub_9
18688 0, // GPRnoip_and_tGPREven:ssub_10
18689 0, // GPRnoip_and_tGPREven:ssub_11
18690 0, // GPRnoip_and_tGPREven:ssub_12
18691 0, // GPRnoip_and_tGPREven:ssub_13
18692 0, // GPRnoip_and_tGPREven:ssub_14
18693 0, // GPRnoip_and_tGPREven:ssub_15
18694 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5
18695 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18696 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7
18697 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18698 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5
18699 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18700 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18701 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18702 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18703 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18704 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9
18705 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18706 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18707 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5
18708 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18709 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7
18710 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9
18711 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18712 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13
18713 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18714 0, // GPRnoip_and_tGPREven:dsub_5_dsub_7
18715 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7
18716 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13
18717 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18718 },
18719 { // GPRnosp_and_GPRnopc_and_hGPR
18720 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_0
18721 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_1
18722 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_2
18723 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_3
18724 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_4
18725 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5
18726 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_6
18727 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_7
18728 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_0
18729 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_1
18730 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_0
18731 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_1
18732 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_0
18733 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_1
18734 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_2
18735 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_3
18736 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0
18737 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_1
18738 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2
18739 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_3
18740 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4
18741 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_5
18742 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6
18743 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_7
18744 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8
18745 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_9
18746 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_10
18747 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_11
18748 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_12
18749 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_13
18750 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_14
18751 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_15
18752 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18753 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18754 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18755 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18756 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18757 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18758 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18759 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18760 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18761 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18762 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18763 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18764 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18765 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5
18766 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18767 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18768 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18769 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18770 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18771 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18772 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_dsub_7
18773 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18774 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13
18775 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18776 },
18777 { // tGPROdd
18778 0, // tGPROdd:dsub_0
18779 0, // tGPROdd:dsub_1
18780 0, // tGPROdd:dsub_2
18781 0, // tGPROdd:dsub_3
18782 0, // tGPROdd:dsub_4
18783 0, // tGPROdd:dsub_5
18784 0, // tGPROdd:dsub_6
18785 0, // tGPROdd:dsub_7
18786 0, // tGPROdd:gsub_0
18787 0, // tGPROdd:gsub_1
18788 0, // tGPROdd:qqsub_0
18789 0, // tGPROdd:qqsub_1
18790 0, // tGPROdd:qsub_0
18791 0, // tGPROdd:qsub_1
18792 0, // tGPROdd:qsub_2
18793 0, // tGPROdd:qsub_3
18794 0, // tGPROdd:ssub_0
18795 0, // tGPROdd:ssub_1
18796 0, // tGPROdd:ssub_2
18797 0, // tGPROdd:ssub_3
18798 0, // tGPROdd:ssub_4
18799 0, // tGPROdd:ssub_5
18800 0, // tGPROdd:ssub_6
18801 0, // tGPROdd:ssub_7
18802 0, // tGPROdd:ssub_8
18803 0, // tGPROdd:ssub_9
18804 0, // tGPROdd:ssub_10
18805 0, // tGPROdd:ssub_11
18806 0, // tGPROdd:ssub_12
18807 0, // tGPROdd:ssub_13
18808 0, // tGPROdd:ssub_14
18809 0, // tGPROdd:ssub_15
18810 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5
18811 0, // tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18812 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7
18813 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18814 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5
18815 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18816 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18817 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18818 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18819 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18820 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9
18821 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18822 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18823 0, // tGPROdd:ssub_6_ssub_7_dsub_5
18824 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18825 0, // tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7
18826 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9
18827 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18828 0, // tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13
18829 0, // tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18830 0, // tGPROdd:dsub_5_dsub_7
18831 0, // tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7
18832 0, // tGPROdd:dsub_5_ssub_12_ssub_13
18833 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18834 },
18835 { // GPRnopc_and_GPRnoip_and_hGPR
18836 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_0
18837 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_1
18838 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_2
18839 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_3
18840 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_4
18841 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5
18842 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_6
18843 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_7
18844 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_0
18845 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_1
18846 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_0
18847 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_1
18848 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_0
18849 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_1
18850 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_2
18851 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_3
18852 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0
18853 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_1
18854 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2
18855 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_3
18856 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4
18857 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_5
18858 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6
18859 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_7
18860 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8
18861 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_9
18862 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_10
18863 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_11
18864 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_12
18865 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_13
18866 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_14
18867 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_15
18868 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18869 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18870 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18871 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18872 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18873 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18874 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18875 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18876 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18877 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18878 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18879 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18880 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18881 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5
18882 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18883 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18884 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18885 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18886 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18887 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18888 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7
18889 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18890 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13
18891 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18892 },
18893 { // GPRnosp_and_GPRnoip_and_hGPR
18894 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_0
18895 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_1
18896 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_2
18897 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_3
18898 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_4
18899 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5
18900 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_6
18901 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_7
18902 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_0
18903 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_1
18904 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_0
18905 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_1
18906 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_0
18907 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_1
18908 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_2
18909 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_3
18910 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0
18911 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_1
18912 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2
18913 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_3
18914 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4
18915 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_5
18916 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6
18917 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_7
18918 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8
18919 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_9
18920 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_10
18921 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_11
18922 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_12
18923 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_13
18924 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_14
18925 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_15
18926 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
18927 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18928 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
18929 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18930 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
18931 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18932 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18933 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18934 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18935 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18936 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
18937 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18938 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18939 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5
18940 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18941 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
18942 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
18943 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18944 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
18945 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
18946 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_dsub_7
18947 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
18948 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13
18949 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
18950 },
18951 { // tcGPR
18952 0, // tcGPR:dsub_0
18953 0, // tcGPR:dsub_1
18954 0, // tcGPR:dsub_2
18955 0, // tcGPR:dsub_3
18956 0, // tcGPR:dsub_4
18957 0, // tcGPR:dsub_5
18958 0, // tcGPR:dsub_6
18959 0, // tcGPR:dsub_7
18960 0, // tcGPR:gsub_0
18961 0, // tcGPR:gsub_1
18962 0, // tcGPR:qqsub_0
18963 0, // tcGPR:qqsub_1
18964 0, // tcGPR:qsub_0
18965 0, // tcGPR:qsub_1
18966 0, // tcGPR:qsub_2
18967 0, // tcGPR:qsub_3
18968 0, // tcGPR:ssub_0
18969 0, // tcGPR:ssub_1
18970 0, // tcGPR:ssub_2
18971 0, // tcGPR:ssub_3
18972 0, // tcGPR:ssub_4
18973 0, // tcGPR:ssub_5
18974 0, // tcGPR:ssub_6
18975 0, // tcGPR:ssub_7
18976 0, // tcGPR:ssub_8
18977 0, // tcGPR:ssub_9
18978 0, // tcGPR:ssub_10
18979 0, // tcGPR:ssub_11
18980 0, // tcGPR:ssub_12
18981 0, // tcGPR:ssub_13
18982 0, // tcGPR:ssub_14
18983 0, // tcGPR:ssub_15
18984 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5
18985 0, // tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
18986 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7
18987 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
18988 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5
18989 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
18990 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18991 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
18992 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
18993 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18994 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9
18995 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
18996 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
18997 0, // tcGPR:ssub_6_ssub_7_dsub_5
18998 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
18999 0, // tcGPR:ssub_6_ssub_7_dsub_5_dsub_7
19000 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9
19001 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19002 0, // tcGPR:ssub_8_ssub_9_ssub_12_ssub_13
19003 0, // tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19004 0, // tcGPR:dsub_5_dsub_7
19005 0, // tcGPR:dsub_5_ssub_12_ssub_13_dsub_7
19006 0, // tcGPR:dsub_5_ssub_12_ssub_13
19007 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19008 },
19009 { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR
19010 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_0
19011 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_1
19012 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_2
19013 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_3
19014 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_4
19015 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5
19016 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_6
19017 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_7
19018 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_0
19019 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_1
19020 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_0
19021 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_1
19022 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_0
19023 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_1
19024 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_2
19025 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_3
19026 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0
19027 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_1
19028 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2
19029 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_3
19030 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4
19031 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_5
19032 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6
19033 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_7
19034 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8
19035 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_9
19036 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_10
19037 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_11
19038 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_12
19039 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_13
19040 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_14
19041 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_15
19042 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
19043 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19044 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
19045 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19046 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
19047 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19048 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19049 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19050 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19051 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19052 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
19053 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19054 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19055 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5
19056 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19057 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
19058 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
19059 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19060 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
19061 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19062 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7
19063 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
19064 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13
19065 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19066 },
19067 { // hGPR_and_tGPREven
19068 0, // hGPR_and_tGPREven:dsub_0
19069 0, // hGPR_and_tGPREven:dsub_1
19070 0, // hGPR_and_tGPREven:dsub_2
19071 0, // hGPR_and_tGPREven:dsub_3
19072 0, // hGPR_and_tGPREven:dsub_4
19073 0, // hGPR_and_tGPREven:dsub_5
19074 0, // hGPR_and_tGPREven:dsub_6
19075 0, // hGPR_and_tGPREven:dsub_7
19076 0, // hGPR_and_tGPREven:gsub_0
19077 0, // hGPR_and_tGPREven:gsub_1
19078 0, // hGPR_and_tGPREven:qqsub_0
19079 0, // hGPR_and_tGPREven:qqsub_1
19080 0, // hGPR_and_tGPREven:qsub_0
19081 0, // hGPR_and_tGPREven:qsub_1
19082 0, // hGPR_and_tGPREven:qsub_2
19083 0, // hGPR_and_tGPREven:qsub_3
19084 0, // hGPR_and_tGPREven:ssub_0
19085 0, // hGPR_and_tGPREven:ssub_1
19086 0, // hGPR_and_tGPREven:ssub_2
19087 0, // hGPR_and_tGPREven:ssub_3
19088 0, // hGPR_and_tGPREven:ssub_4
19089 0, // hGPR_and_tGPREven:ssub_5
19090 0, // hGPR_and_tGPREven:ssub_6
19091 0, // hGPR_and_tGPREven:ssub_7
19092 0, // hGPR_and_tGPREven:ssub_8
19093 0, // hGPR_and_tGPREven:ssub_9
19094 0, // hGPR_and_tGPREven:ssub_10
19095 0, // hGPR_and_tGPREven:ssub_11
19096 0, // hGPR_and_tGPREven:ssub_12
19097 0, // hGPR_and_tGPREven:ssub_13
19098 0, // hGPR_and_tGPREven:ssub_14
19099 0, // hGPR_and_tGPREven:ssub_15
19100 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5
19101 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19102 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7
19103 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19104 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5
19105 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19106 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19107 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19108 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19109 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19110 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9
19111 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19112 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19113 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5
19114 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19115 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7
19116 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9
19117 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19118 0, // hGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13
19119 0, // hGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19120 0, // hGPR_and_tGPREven:dsub_5_dsub_7
19121 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7
19122 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13
19123 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19124 },
19125 { // tGPR_and_tGPREven
19126 0, // tGPR_and_tGPREven:dsub_0
19127 0, // tGPR_and_tGPREven:dsub_1
19128 0, // tGPR_and_tGPREven:dsub_2
19129 0, // tGPR_and_tGPREven:dsub_3
19130 0, // tGPR_and_tGPREven:dsub_4
19131 0, // tGPR_and_tGPREven:dsub_5
19132 0, // tGPR_and_tGPREven:dsub_6
19133 0, // tGPR_and_tGPREven:dsub_7
19134 0, // tGPR_and_tGPREven:gsub_0
19135 0, // tGPR_and_tGPREven:gsub_1
19136 0, // tGPR_and_tGPREven:qqsub_0
19137 0, // tGPR_and_tGPREven:qqsub_1
19138 0, // tGPR_and_tGPREven:qsub_0
19139 0, // tGPR_and_tGPREven:qsub_1
19140 0, // tGPR_and_tGPREven:qsub_2
19141 0, // tGPR_and_tGPREven:qsub_3
19142 0, // tGPR_and_tGPREven:ssub_0
19143 0, // tGPR_and_tGPREven:ssub_1
19144 0, // tGPR_and_tGPREven:ssub_2
19145 0, // tGPR_and_tGPREven:ssub_3
19146 0, // tGPR_and_tGPREven:ssub_4
19147 0, // tGPR_and_tGPREven:ssub_5
19148 0, // tGPR_and_tGPREven:ssub_6
19149 0, // tGPR_and_tGPREven:ssub_7
19150 0, // tGPR_and_tGPREven:ssub_8
19151 0, // tGPR_and_tGPREven:ssub_9
19152 0, // tGPR_and_tGPREven:ssub_10
19153 0, // tGPR_and_tGPREven:ssub_11
19154 0, // tGPR_and_tGPREven:ssub_12
19155 0, // tGPR_and_tGPREven:ssub_13
19156 0, // tGPR_and_tGPREven:ssub_14
19157 0, // tGPR_and_tGPREven:ssub_15
19158 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5
19159 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19160 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7
19161 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19162 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5
19163 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19164 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19165 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19166 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19167 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19168 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9
19169 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19170 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19171 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5
19172 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19173 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7
19174 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9
19175 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19176 0, // tGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13
19177 0, // tGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19178 0, // tGPR_and_tGPREven:dsub_5_dsub_7
19179 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7
19180 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13
19181 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19182 },
19183 { // tGPR_and_tGPROdd
19184 0, // tGPR_and_tGPROdd:dsub_0
19185 0, // tGPR_and_tGPROdd:dsub_1
19186 0, // tGPR_and_tGPROdd:dsub_2
19187 0, // tGPR_and_tGPROdd:dsub_3
19188 0, // tGPR_and_tGPROdd:dsub_4
19189 0, // tGPR_and_tGPROdd:dsub_5
19190 0, // tGPR_and_tGPROdd:dsub_6
19191 0, // tGPR_and_tGPROdd:dsub_7
19192 0, // tGPR_and_tGPROdd:gsub_0
19193 0, // tGPR_and_tGPROdd:gsub_1
19194 0, // tGPR_and_tGPROdd:qqsub_0
19195 0, // tGPR_and_tGPROdd:qqsub_1
19196 0, // tGPR_and_tGPROdd:qsub_0
19197 0, // tGPR_and_tGPROdd:qsub_1
19198 0, // tGPR_and_tGPROdd:qsub_2
19199 0, // tGPR_and_tGPROdd:qsub_3
19200 0, // tGPR_and_tGPROdd:ssub_0
19201 0, // tGPR_and_tGPROdd:ssub_1
19202 0, // tGPR_and_tGPROdd:ssub_2
19203 0, // tGPR_and_tGPROdd:ssub_3
19204 0, // tGPR_and_tGPROdd:ssub_4
19205 0, // tGPR_and_tGPROdd:ssub_5
19206 0, // tGPR_and_tGPROdd:ssub_6
19207 0, // tGPR_and_tGPROdd:ssub_7
19208 0, // tGPR_and_tGPROdd:ssub_8
19209 0, // tGPR_and_tGPROdd:ssub_9
19210 0, // tGPR_and_tGPROdd:ssub_10
19211 0, // tGPR_and_tGPROdd:ssub_11
19212 0, // tGPR_and_tGPROdd:ssub_12
19213 0, // tGPR_and_tGPROdd:ssub_13
19214 0, // tGPR_and_tGPROdd:ssub_14
19215 0, // tGPR_and_tGPROdd:ssub_15
19216 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5
19217 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19218 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7
19219 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19220 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5
19221 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19222 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19223 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19224 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19225 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19226 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9
19227 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19228 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19229 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5
19230 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19231 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7
19232 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9
19233 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19234 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13
19235 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19236 0, // tGPR_and_tGPROdd:dsub_5_dsub_7
19237 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7
19238 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13
19239 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19240 },
19241 { // tcGPRnotr12
19242 0, // tcGPRnotr12:dsub_0
19243 0, // tcGPRnotr12:dsub_1
19244 0, // tcGPRnotr12:dsub_2
19245 0, // tcGPRnotr12:dsub_3
19246 0, // tcGPRnotr12:dsub_4
19247 0, // tcGPRnotr12:dsub_5
19248 0, // tcGPRnotr12:dsub_6
19249 0, // tcGPRnotr12:dsub_7
19250 0, // tcGPRnotr12:gsub_0
19251 0, // tcGPRnotr12:gsub_1
19252 0, // tcGPRnotr12:qqsub_0
19253 0, // tcGPRnotr12:qqsub_1
19254 0, // tcGPRnotr12:qsub_0
19255 0, // tcGPRnotr12:qsub_1
19256 0, // tcGPRnotr12:qsub_2
19257 0, // tcGPRnotr12:qsub_3
19258 0, // tcGPRnotr12:ssub_0
19259 0, // tcGPRnotr12:ssub_1
19260 0, // tcGPRnotr12:ssub_2
19261 0, // tcGPRnotr12:ssub_3
19262 0, // tcGPRnotr12:ssub_4
19263 0, // tcGPRnotr12:ssub_5
19264 0, // tcGPRnotr12:ssub_6
19265 0, // tcGPRnotr12:ssub_7
19266 0, // tcGPRnotr12:ssub_8
19267 0, // tcGPRnotr12:ssub_9
19268 0, // tcGPRnotr12:ssub_10
19269 0, // tcGPRnotr12:ssub_11
19270 0, // tcGPRnotr12:ssub_12
19271 0, // tcGPRnotr12:ssub_13
19272 0, // tcGPRnotr12:ssub_14
19273 0, // tcGPRnotr12:ssub_15
19274 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5
19275 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19276 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7
19277 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19278 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5
19279 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19280 0, // tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19281 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19282 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19283 0, // tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19284 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9
19285 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19286 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19287 0, // tcGPRnotr12:ssub_6_ssub_7_dsub_5
19288 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19289 0, // tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7
19290 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9
19291 0, // tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19292 0, // tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13
19293 0, // tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19294 0, // tcGPRnotr12:dsub_5_dsub_7
19295 0, // tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7
19296 0, // tcGPRnotr12:dsub_5_ssub_12_ssub_13
19297 0, // tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19298 },
19299 { // tGPREven_and_tcGPR
19300 0, // tGPREven_and_tcGPR:dsub_0
19301 0, // tGPREven_and_tcGPR:dsub_1
19302 0, // tGPREven_and_tcGPR:dsub_2
19303 0, // tGPREven_and_tcGPR:dsub_3
19304 0, // tGPREven_and_tcGPR:dsub_4
19305 0, // tGPREven_and_tcGPR:dsub_5
19306 0, // tGPREven_and_tcGPR:dsub_6
19307 0, // tGPREven_and_tcGPR:dsub_7
19308 0, // tGPREven_and_tcGPR:gsub_0
19309 0, // tGPREven_and_tcGPR:gsub_1
19310 0, // tGPREven_and_tcGPR:qqsub_0
19311 0, // tGPREven_and_tcGPR:qqsub_1
19312 0, // tGPREven_and_tcGPR:qsub_0
19313 0, // tGPREven_and_tcGPR:qsub_1
19314 0, // tGPREven_and_tcGPR:qsub_2
19315 0, // tGPREven_and_tcGPR:qsub_3
19316 0, // tGPREven_and_tcGPR:ssub_0
19317 0, // tGPREven_and_tcGPR:ssub_1
19318 0, // tGPREven_and_tcGPR:ssub_2
19319 0, // tGPREven_and_tcGPR:ssub_3
19320 0, // tGPREven_and_tcGPR:ssub_4
19321 0, // tGPREven_and_tcGPR:ssub_5
19322 0, // tGPREven_and_tcGPR:ssub_6
19323 0, // tGPREven_and_tcGPR:ssub_7
19324 0, // tGPREven_and_tcGPR:ssub_8
19325 0, // tGPREven_and_tcGPR:ssub_9
19326 0, // tGPREven_and_tcGPR:ssub_10
19327 0, // tGPREven_and_tcGPR:ssub_11
19328 0, // tGPREven_and_tcGPR:ssub_12
19329 0, // tGPREven_and_tcGPR:ssub_13
19330 0, // tGPREven_and_tcGPR:ssub_14
19331 0, // tGPREven_and_tcGPR:ssub_15
19332 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5
19333 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19334 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7
19335 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19336 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5
19337 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19338 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19339 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19340 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19341 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19342 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9
19343 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19344 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19345 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5
19346 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19347 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7
19348 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9
19349 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19350 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13
19351 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19352 0, // tGPREven_and_tcGPR:dsub_5_dsub_7
19353 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7
19354 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13
19355 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19356 },
19357 { // hGPR_and_GPRnoip_and_tGPREven
19358 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_0
19359 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_1
19360 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_2
19361 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_3
19362 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_4
19363 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5
19364 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_6
19365 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_7
19366 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_0
19367 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_1
19368 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_0
19369 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_1
19370 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_0
19371 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_1
19372 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_2
19373 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_3
19374 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0
19375 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_1
19376 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2
19377 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_3
19378 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4
19379 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_5
19380 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6
19381 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_7
19382 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8
19383 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_9
19384 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_10
19385 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_11
19386 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_12
19387 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_13
19388 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_14
19389 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_15
19390 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5
19391 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19392 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7
19393 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19394 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5
19395 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19396 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19397 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19398 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19399 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19400 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9
19401 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19402 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19403 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5
19404 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19405 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7
19406 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9
19407 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19408 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13
19409 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19410 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_dsub_7
19411 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7
19412 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13
19413 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19414 },
19415 { // hGPR_and_tGPROdd
19416 0, // hGPR_and_tGPROdd:dsub_0
19417 0, // hGPR_and_tGPROdd:dsub_1
19418 0, // hGPR_and_tGPROdd:dsub_2
19419 0, // hGPR_and_tGPROdd:dsub_3
19420 0, // hGPR_and_tGPROdd:dsub_4
19421 0, // hGPR_and_tGPROdd:dsub_5
19422 0, // hGPR_and_tGPROdd:dsub_6
19423 0, // hGPR_and_tGPROdd:dsub_7
19424 0, // hGPR_and_tGPROdd:gsub_0
19425 0, // hGPR_and_tGPROdd:gsub_1
19426 0, // hGPR_and_tGPROdd:qqsub_0
19427 0, // hGPR_and_tGPROdd:qqsub_1
19428 0, // hGPR_and_tGPROdd:qsub_0
19429 0, // hGPR_and_tGPROdd:qsub_1
19430 0, // hGPR_and_tGPROdd:qsub_2
19431 0, // hGPR_and_tGPROdd:qsub_3
19432 0, // hGPR_and_tGPROdd:ssub_0
19433 0, // hGPR_and_tGPROdd:ssub_1
19434 0, // hGPR_and_tGPROdd:ssub_2
19435 0, // hGPR_and_tGPROdd:ssub_3
19436 0, // hGPR_and_tGPROdd:ssub_4
19437 0, // hGPR_and_tGPROdd:ssub_5
19438 0, // hGPR_and_tGPROdd:ssub_6
19439 0, // hGPR_and_tGPROdd:ssub_7
19440 0, // hGPR_and_tGPROdd:ssub_8
19441 0, // hGPR_and_tGPROdd:ssub_9
19442 0, // hGPR_and_tGPROdd:ssub_10
19443 0, // hGPR_and_tGPROdd:ssub_11
19444 0, // hGPR_and_tGPROdd:ssub_12
19445 0, // hGPR_and_tGPROdd:ssub_13
19446 0, // hGPR_and_tGPROdd:ssub_14
19447 0, // hGPR_and_tGPROdd:ssub_15
19448 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5
19449 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19450 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7
19451 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19452 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5
19453 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19454 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19455 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19456 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19457 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19458 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9
19459 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19460 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19461 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5
19462 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19463 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7
19464 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9
19465 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19466 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13
19467 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19468 0, // hGPR_and_tGPROdd:dsub_5_dsub_7
19469 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7
19470 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13
19471 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19472 },
19473 { // tGPREven_and_tcGPRnotr12
19474 0, // tGPREven_and_tcGPRnotr12:dsub_0
19475 0, // tGPREven_and_tcGPRnotr12:dsub_1
19476 0, // tGPREven_and_tcGPRnotr12:dsub_2
19477 0, // tGPREven_and_tcGPRnotr12:dsub_3
19478 0, // tGPREven_and_tcGPRnotr12:dsub_4
19479 0, // tGPREven_and_tcGPRnotr12:dsub_5
19480 0, // tGPREven_and_tcGPRnotr12:dsub_6
19481 0, // tGPREven_and_tcGPRnotr12:dsub_7
19482 0, // tGPREven_and_tcGPRnotr12:gsub_0
19483 0, // tGPREven_and_tcGPRnotr12:gsub_1
19484 0, // tGPREven_and_tcGPRnotr12:qqsub_0
19485 0, // tGPREven_and_tcGPRnotr12:qqsub_1
19486 0, // tGPREven_and_tcGPRnotr12:qsub_0
19487 0, // tGPREven_and_tcGPRnotr12:qsub_1
19488 0, // tGPREven_and_tcGPRnotr12:qsub_2
19489 0, // tGPREven_and_tcGPRnotr12:qsub_3
19490 0, // tGPREven_and_tcGPRnotr12:ssub_0
19491 0, // tGPREven_and_tcGPRnotr12:ssub_1
19492 0, // tGPREven_and_tcGPRnotr12:ssub_2
19493 0, // tGPREven_and_tcGPRnotr12:ssub_3
19494 0, // tGPREven_and_tcGPRnotr12:ssub_4
19495 0, // tGPREven_and_tcGPRnotr12:ssub_5
19496 0, // tGPREven_and_tcGPRnotr12:ssub_6
19497 0, // tGPREven_and_tcGPRnotr12:ssub_7
19498 0, // tGPREven_and_tcGPRnotr12:ssub_8
19499 0, // tGPREven_and_tcGPRnotr12:ssub_9
19500 0, // tGPREven_and_tcGPRnotr12:ssub_10
19501 0, // tGPREven_and_tcGPRnotr12:ssub_11
19502 0, // tGPREven_and_tcGPRnotr12:ssub_12
19503 0, // tGPREven_and_tcGPRnotr12:ssub_13
19504 0, // tGPREven_and_tcGPRnotr12:ssub_14
19505 0, // tGPREven_and_tcGPRnotr12:ssub_15
19506 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5
19507 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19508 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7
19509 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19510 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5
19511 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19512 0, // tGPREven_and_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19513 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19514 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19515 0, // tGPREven_and_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19516 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9
19517 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19518 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19519 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_dsub_5
19520 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19521 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7
19522 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9
19523 0, // tGPREven_and_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19524 0, // tGPREven_and_tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13
19525 0, // tGPREven_and_tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19526 0, // tGPREven_and_tcGPRnotr12:dsub_5_dsub_7
19527 0, // tGPREven_and_tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7
19528 0, // tGPREven_and_tcGPRnotr12:dsub_5_ssub_12_ssub_13
19529 0, // tGPREven_and_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19530 },
19531 { // tGPROdd_and_tcGPR
19532 0, // tGPROdd_and_tcGPR:dsub_0
19533 0, // tGPROdd_and_tcGPR:dsub_1
19534 0, // tGPROdd_and_tcGPR:dsub_2
19535 0, // tGPROdd_and_tcGPR:dsub_3
19536 0, // tGPROdd_and_tcGPR:dsub_4
19537 0, // tGPROdd_and_tcGPR:dsub_5
19538 0, // tGPROdd_and_tcGPR:dsub_6
19539 0, // tGPROdd_and_tcGPR:dsub_7
19540 0, // tGPROdd_and_tcGPR:gsub_0
19541 0, // tGPROdd_and_tcGPR:gsub_1
19542 0, // tGPROdd_and_tcGPR:qqsub_0
19543 0, // tGPROdd_and_tcGPR:qqsub_1
19544 0, // tGPROdd_and_tcGPR:qsub_0
19545 0, // tGPROdd_and_tcGPR:qsub_1
19546 0, // tGPROdd_and_tcGPR:qsub_2
19547 0, // tGPROdd_and_tcGPR:qsub_3
19548 0, // tGPROdd_and_tcGPR:ssub_0
19549 0, // tGPROdd_and_tcGPR:ssub_1
19550 0, // tGPROdd_and_tcGPR:ssub_2
19551 0, // tGPROdd_and_tcGPR:ssub_3
19552 0, // tGPROdd_and_tcGPR:ssub_4
19553 0, // tGPROdd_and_tcGPR:ssub_5
19554 0, // tGPROdd_and_tcGPR:ssub_6
19555 0, // tGPROdd_and_tcGPR:ssub_7
19556 0, // tGPROdd_and_tcGPR:ssub_8
19557 0, // tGPROdd_and_tcGPR:ssub_9
19558 0, // tGPROdd_and_tcGPR:ssub_10
19559 0, // tGPROdd_and_tcGPR:ssub_11
19560 0, // tGPROdd_and_tcGPR:ssub_12
19561 0, // tGPROdd_and_tcGPR:ssub_13
19562 0, // tGPROdd_and_tcGPR:ssub_14
19563 0, // tGPROdd_and_tcGPR:ssub_15
19564 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5
19565 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19566 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7
19567 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19568 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5
19569 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19570 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19571 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19572 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19573 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19574 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9
19575 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19576 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19577 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5
19578 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19579 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7
19580 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9
19581 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19582 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13
19583 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19584 0, // tGPROdd_and_tcGPR:dsub_5_dsub_7
19585 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7
19586 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13
19587 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19588 },
19589 { // CCR
19590 0, // CCR:dsub_0
19591 0, // CCR:dsub_1
19592 0, // CCR:dsub_2
19593 0, // CCR:dsub_3
19594 0, // CCR:dsub_4
19595 0, // CCR:dsub_5
19596 0, // CCR:dsub_6
19597 0, // CCR:dsub_7
19598 0, // CCR:gsub_0
19599 0, // CCR:gsub_1
19600 0, // CCR:qqsub_0
19601 0, // CCR:qqsub_1
19602 0, // CCR:qsub_0
19603 0, // CCR:qsub_1
19604 0, // CCR:qsub_2
19605 0, // CCR:qsub_3
19606 0, // CCR:ssub_0
19607 0, // CCR:ssub_1
19608 0, // CCR:ssub_2
19609 0, // CCR:ssub_3
19610 0, // CCR:ssub_4
19611 0, // CCR:ssub_5
19612 0, // CCR:ssub_6
19613 0, // CCR:ssub_7
19614 0, // CCR:ssub_8
19615 0, // CCR:ssub_9
19616 0, // CCR:ssub_10
19617 0, // CCR:ssub_11
19618 0, // CCR:ssub_12
19619 0, // CCR:ssub_13
19620 0, // CCR:ssub_14
19621 0, // CCR:ssub_15
19622 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5
19623 0, // CCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19624 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7
19625 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19626 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5
19627 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19628 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19629 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19630 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19631 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19632 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9
19633 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19634 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19635 0, // CCR:ssub_6_ssub_7_dsub_5
19636 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19637 0, // CCR:ssub_6_ssub_7_dsub_5_dsub_7
19638 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9
19639 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19640 0, // CCR:ssub_8_ssub_9_ssub_12_ssub_13
19641 0, // CCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19642 0, // CCR:dsub_5_dsub_7
19643 0, // CCR:dsub_5_ssub_12_ssub_13_dsub_7
19644 0, // CCR:dsub_5_ssub_12_ssub_13
19645 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19646 },
19647 { // FPCXTRegs
19648 0, // FPCXTRegs:dsub_0
19649 0, // FPCXTRegs:dsub_1
19650 0, // FPCXTRegs:dsub_2
19651 0, // FPCXTRegs:dsub_3
19652 0, // FPCXTRegs:dsub_4
19653 0, // FPCXTRegs:dsub_5
19654 0, // FPCXTRegs:dsub_6
19655 0, // FPCXTRegs:dsub_7
19656 0, // FPCXTRegs:gsub_0
19657 0, // FPCXTRegs:gsub_1
19658 0, // FPCXTRegs:qqsub_0
19659 0, // FPCXTRegs:qqsub_1
19660 0, // FPCXTRegs:qsub_0
19661 0, // FPCXTRegs:qsub_1
19662 0, // FPCXTRegs:qsub_2
19663 0, // FPCXTRegs:qsub_3
19664 0, // FPCXTRegs:ssub_0
19665 0, // FPCXTRegs:ssub_1
19666 0, // FPCXTRegs:ssub_2
19667 0, // FPCXTRegs:ssub_3
19668 0, // FPCXTRegs:ssub_4
19669 0, // FPCXTRegs:ssub_5
19670 0, // FPCXTRegs:ssub_6
19671 0, // FPCXTRegs:ssub_7
19672 0, // FPCXTRegs:ssub_8
19673 0, // FPCXTRegs:ssub_9
19674 0, // FPCXTRegs:ssub_10
19675 0, // FPCXTRegs:ssub_11
19676 0, // FPCXTRegs:ssub_12
19677 0, // FPCXTRegs:ssub_13
19678 0, // FPCXTRegs:ssub_14
19679 0, // FPCXTRegs:ssub_15
19680 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5
19681 0, // FPCXTRegs:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19682 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7
19683 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19684 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5
19685 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19686 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19687 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19688 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19689 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19690 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9
19691 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19692 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19693 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5
19694 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19695 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5_dsub_7
19696 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9
19697 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19698 0, // FPCXTRegs:ssub_8_ssub_9_ssub_12_ssub_13
19699 0, // FPCXTRegs:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19700 0, // FPCXTRegs:dsub_5_dsub_7
19701 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13_dsub_7
19702 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13
19703 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19704 },
19705 { // GPRlr
19706 0, // GPRlr:dsub_0
19707 0, // GPRlr:dsub_1
19708 0, // GPRlr:dsub_2
19709 0, // GPRlr:dsub_3
19710 0, // GPRlr:dsub_4
19711 0, // GPRlr:dsub_5
19712 0, // GPRlr:dsub_6
19713 0, // GPRlr:dsub_7
19714 0, // GPRlr:gsub_0
19715 0, // GPRlr:gsub_1
19716 0, // GPRlr:qqsub_0
19717 0, // GPRlr:qqsub_1
19718 0, // GPRlr:qsub_0
19719 0, // GPRlr:qsub_1
19720 0, // GPRlr:qsub_2
19721 0, // GPRlr:qsub_3
19722 0, // GPRlr:ssub_0
19723 0, // GPRlr:ssub_1
19724 0, // GPRlr:ssub_2
19725 0, // GPRlr:ssub_3
19726 0, // GPRlr:ssub_4
19727 0, // GPRlr:ssub_5
19728 0, // GPRlr:ssub_6
19729 0, // GPRlr:ssub_7
19730 0, // GPRlr:ssub_8
19731 0, // GPRlr:ssub_9
19732 0, // GPRlr:ssub_10
19733 0, // GPRlr:ssub_11
19734 0, // GPRlr:ssub_12
19735 0, // GPRlr:ssub_13
19736 0, // GPRlr:ssub_14
19737 0, // GPRlr:ssub_15
19738 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5
19739 0, // GPRlr:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19740 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7
19741 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19742 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5
19743 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19744 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19745 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19746 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19747 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19748 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9
19749 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19750 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19751 0, // GPRlr:ssub_6_ssub_7_dsub_5
19752 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19753 0, // GPRlr:ssub_6_ssub_7_dsub_5_dsub_7
19754 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9
19755 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19756 0, // GPRlr:ssub_8_ssub_9_ssub_12_ssub_13
19757 0, // GPRlr:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19758 0, // GPRlr:dsub_5_dsub_7
19759 0, // GPRlr:dsub_5_ssub_12_ssub_13_dsub_7
19760 0, // GPRlr:dsub_5_ssub_12_ssub_13
19761 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19762 },
19763 { // GPRsp
19764 0, // GPRsp:dsub_0
19765 0, // GPRsp:dsub_1
19766 0, // GPRsp:dsub_2
19767 0, // GPRsp:dsub_3
19768 0, // GPRsp:dsub_4
19769 0, // GPRsp:dsub_5
19770 0, // GPRsp:dsub_6
19771 0, // GPRsp:dsub_7
19772 0, // GPRsp:gsub_0
19773 0, // GPRsp:gsub_1
19774 0, // GPRsp:qqsub_0
19775 0, // GPRsp:qqsub_1
19776 0, // GPRsp:qsub_0
19777 0, // GPRsp:qsub_1
19778 0, // GPRsp:qsub_2
19779 0, // GPRsp:qsub_3
19780 0, // GPRsp:ssub_0
19781 0, // GPRsp:ssub_1
19782 0, // GPRsp:ssub_2
19783 0, // GPRsp:ssub_3
19784 0, // GPRsp:ssub_4
19785 0, // GPRsp:ssub_5
19786 0, // GPRsp:ssub_6
19787 0, // GPRsp:ssub_7
19788 0, // GPRsp:ssub_8
19789 0, // GPRsp:ssub_9
19790 0, // GPRsp:ssub_10
19791 0, // GPRsp:ssub_11
19792 0, // GPRsp:ssub_12
19793 0, // GPRsp:ssub_13
19794 0, // GPRsp:ssub_14
19795 0, // GPRsp:ssub_15
19796 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5
19797 0, // GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19798 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7
19799 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19800 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5
19801 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19802 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19803 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19804 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19805 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19806 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9
19807 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19808 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19809 0, // GPRsp:ssub_6_ssub_7_dsub_5
19810 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19811 0, // GPRsp:ssub_6_ssub_7_dsub_5_dsub_7
19812 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9
19813 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19814 0, // GPRsp:ssub_8_ssub_9_ssub_12_ssub_13
19815 0, // GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19816 0, // GPRsp:dsub_5_dsub_7
19817 0, // GPRsp:dsub_5_ssub_12_ssub_13_dsub_7
19818 0, // GPRsp:dsub_5_ssub_12_ssub_13
19819 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19820 },
19821 { // VCCR
19822 0, // VCCR:dsub_0
19823 0, // VCCR:dsub_1
19824 0, // VCCR:dsub_2
19825 0, // VCCR:dsub_3
19826 0, // VCCR:dsub_4
19827 0, // VCCR:dsub_5
19828 0, // VCCR:dsub_6
19829 0, // VCCR:dsub_7
19830 0, // VCCR:gsub_0
19831 0, // VCCR:gsub_1
19832 0, // VCCR:qqsub_0
19833 0, // VCCR:qqsub_1
19834 0, // VCCR:qsub_0
19835 0, // VCCR:qsub_1
19836 0, // VCCR:qsub_2
19837 0, // VCCR:qsub_3
19838 0, // VCCR:ssub_0
19839 0, // VCCR:ssub_1
19840 0, // VCCR:ssub_2
19841 0, // VCCR:ssub_3
19842 0, // VCCR:ssub_4
19843 0, // VCCR:ssub_5
19844 0, // VCCR:ssub_6
19845 0, // VCCR:ssub_7
19846 0, // VCCR:ssub_8
19847 0, // VCCR:ssub_9
19848 0, // VCCR:ssub_10
19849 0, // VCCR:ssub_11
19850 0, // VCCR:ssub_12
19851 0, // VCCR:ssub_13
19852 0, // VCCR:ssub_14
19853 0, // VCCR:ssub_15
19854 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5
19855 0, // VCCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19856 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7
19857 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19858 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5
19859 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19860 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19861 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19862 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19863 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19864 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9
19865 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19866 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19867 0, // VCCR:ssub_6_ssub_7_dsub_5
19868 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19869 0, // VCCR:ssub_6_ssub_7_dsub_5_dsub_7
19870 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9
19871 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19872 0, // VCCR:ssub_8_ssub_9_ssub_12_ssub_13
19873 0, // VCCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19874 0, // VCCR:dsub_5_dsub_7
19875 0, // VCCR:dsub_5_ssub_12_ssub_13_dsub_7
19876 0, // VCCR:dsub_5_ssub_12_ssub_13
19877 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19878 },
19879 { // cl_FPSCR_NZCV
19880 0, // cl_FPSCR_NZCV:dsub_0
19881 0, // cl_FPSCR_NZCV:dsub_1
19882 0, // cl_FPSCR_NZCV:dsub_2
19883 0, // cl_FPSCR_NZCV:dsub_3
19884 0, // cl_FPSCR_NZCV:dsub_4
19885 0, // cl_FPSCR_NZCV:dsub_5
19886 0, // cl_FPSCR_NZCV:dsub_6
19887 0, // cl_FPSCR_NZCV:dsub_7
19888 0, // cl_FPSCR_NZCV:gsub_0
19889 0, // cl_FPSCR_NZCV:gsub_1
19890 0, // cl_FPSCR_NZCV:qqsub_0
19891 0, // cl_FPSCR_NZCV:qqsub_1
19892 0, // cl_FPSCR_NZCV:qsub_0
19893 0, // cl_FPSCR_NZCV:qsub_1
19894 0, // cl_FPSCR_NZCV:qsub_2
19895 0, // cl_FPSCR_NZCV:qsub_3
19896 0, // cl_FPSCR_NZCV:ssub_0
19897 0, // cl_FPSCR_NZCV:ssub_1
19898 0, // cl_FPSCR_NZCV:ssub_2
19899 0, // cl_FPSCR_NZCV:ssub_3
19900 0, // cl_FPSCR_NZCV:ssub_4
19901 0, // cl_FPSCR_NZCV:ssub_5
19902 0, // cl_FPSCR_NZCV:ssub_6
19903 0, // cl_FPSCR_NZCV:ssub_7
19904 0, // cl_FPSCR_NZCV:ssub_8
19905 0, // cl_FPSCR_NZCV:ssub_9
19906 0, // cl_FPSCR_NZCV:ssub_10
19907 0, // cl_FPSCR_NZCV:ssub_11
19908 0, // cl_FPSCR_NZCV:ssub_12
19909 0, // cl_FPSCR_NZCV:ssub_13
19910 0, // cl_FPSCR_NZCV:ssub_14
19911 0, // cl_FPSCR_NZCV:ssub_15
19912 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5
19913 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19914 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7
19915 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19916 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5
19917 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19918 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19919 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19920 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19921 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19922 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9
19923 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19924 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19925 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5
19926 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19927 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5_dsub_7
19928 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9
19929 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19930 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_ssub_12_ssub_13
19931 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19932 0, // cl_FPSCR_NZCV:dsub_5_dsub_7
19933 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13_dsub_7
19934 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13
19935 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19936 },
19937 { // hGPR_and_tGPRwithpc
19938 0, // hGPR_and_tGPRwithpc:dsub_0
19939 0, // hGPR_and_tGPRwithpc:dsub_1
19940 0, // hGPR_and_tGPRwithpc:dsub_2
19941 0, // hGPR_and_tGPRwithpc:dsub_3
19942 0, // hGPR_and_tGPRwithpc:dsub_4
19943 0, // hGPR_and_tGPRwithpc:dsub_5
19944 0, // hGPR_and_tGPRwithpc:dsub_6
19945 0, // hGPR_and_tGPRwithpc:dsub_7
19946 0, // hGPR_and_tGPRwithpc:gsub_0
19947 0, // hGPR_and_tGPRwithpc:gsub_1
19948 0, // hGPR_and_tGPRwithpc:qqsub_0
19949 0, // hGPR_and_tGPRwithpc:qqsub_1
19950 0, // hGPR_and_tGPRwithpc:qsub_0
19951 0, // hGPR_and_tGPRwithpc:qsub_1
19952 0, // hGPR_and_tGPRwithpc:qsub_2
19953 0, // hGPR_and_tGPRwithpc:qsub_3
19954 0, // hGPR_and_tGPRwithpc:ssub_0
19955 0, // hGPR_and_tGPRwithpc:ssub_1
19956 0, // hGPR_and_tGPRwithpc:ssub_2
19957 0, // hGPR_and_tGPRwithpc:ssub_3
19958 0, // hGPR_and_tGPRwithpc:ssub_4
19959 0, // hGPR_and_tGPRwithpc:ssub_5
19960 0, // hGPR_and_tGPRwithpc:ssub_6
19961 0, // hGPR_and_tGPRwithpc:ssub_7
19962 0, // hGPR_and_tGPRwithpc:ssub_8
19963 0, // hGPR_and_tGPRwithpc:ssub_9
19964 0, // hGPR_and_tGPRwithpc:ssub_10
19965 0, // hGPR_and_tGPRwithpc:ssub_11
19966 0, // hGPR_and_tGPRwithpc:ssub_12
19967 0, // hGPR_and_tGPRwithpc:ssub_13
19968 0, // hGPR_and_tGPRwithpc:ssub_14
19969 0, // hGPR_and_tGPRwithpc:ssub_15
19970 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5
19971 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
19972 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7
19973 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
19974 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5
19975 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
19976 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19977 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
19978 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
19979 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19980 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9
19981 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
19982 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
19983 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5
19984 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
19985 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7
19986 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9
19987 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19988 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13
19989 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
19990 0, // hGPR_and_tGPRwithpc:dsub_5_dsub_7
19991 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7
19992 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13
19993 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
19994 },
19995 { // hGPR_and_tcGPR
19996 0, // hGPR_and_tcGPR:dsub_0
19997 0, // hGPR_and_tcGPR:dsub_1
19998 0, // hGPR_and_tcGPR:dsub_2
19999 0, // hGPR_and_tcGPR:dsub_3
20000 0, // hGPR_and_tcGPR:dsub_4
20001 0, // hGPR_and_tcGPR:dsub_5
20002 0, // hGPR_and_tcGPR:dsub_6
20003 0, // hGPR_and_tcGPR:dsub_7
20004 0, // hGPR_and_tcGPR:gsub_0
20005 0, // hGPR_and_tcGPR:gsub_1
20006 0, // hGPR_and_tcGPR:qqsub_0
20007 0, // hGPR_and_tcGPR:qqsub_1
20008 0, // hGPR_and_tcGPR:qsub_0
20009 0, // hGPR_and_tcGPR:qsub_1
20010 0, // hGPR_and_tcGPR:qsub_2
20011 0, // hGPR_and_tcGPR:qsub_3
20012 0, // hGPR_and_tcGPR:ssub_0
20013 0, // hGPR_and_tcGPR:ssub_1
20014 0, // hGPR_and_tcGPR:ssub_2
20015 0, // hGPR_and_tcGPR:ssub_3
20016 0, // hGPR_and_tcGPR:ssub_4
20017 0, // hGPR_and_tcGPR:ssub_5
20018 0, // hGPR_and_tcGPR:ssub_6
20019 0, // hGPR_and_tcGPR:ssub_7
20020 0, // hGPR_and_tcGPR:ssub_8
20021 0, // hGPR_and_tcGPR:ssub_9
20022 0, // hGPR_and_tcGPR:ssub_10
20023 0, // hGPR_and_tcGPR:ssub_11
20024 0, // hGPR_and_tcGPR:ssub_12
20025 0, // hGPR_and_tcGPR:ssub_13
20026 0, // hGPR_and_tcGPR:ssub_14
20027 0, // hGPR_and_tcGPR:ssub_15
20028 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5
20029 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20030 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7
20031 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20032 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5
20033 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20034 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20035 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20036 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20037 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20038 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9
20039 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20040 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20041 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5
20042 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20043 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7
20044 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9
20045 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20046 0, // hGPR_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13
20047 0, // hGPR_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20048 0, // hGPR_and_tcGPR:dsub_5_dsub_7
20049 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7
20050 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13
20051 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20052 },
20053 { // DPR
20054 0, // DPR:dsub_0
20055 0, // DPR:dsub_1
20056 0, // DPR:dsub_2
20057 0, // DPR:dsub_3
20058 0, // DPR:dsub_4
20059 0, // DPR:dsub_5
20060 0, // DPR:dsub_6
20061 0, // DPR:dsub_7
20062 0, // DPR:gsub_0
20063 0, // DPR:gsub_1
20064 0, // DPR:qqsub_0
20065 0, // DPR:qqsub_1
20066 0, // DPR:qsub_0
20067 0, // DPR:qsub_1
20068 0, // DPR:qsub_2
20069 0, // DPR:qsub_3
20070 3, // DPR:ssub_0 -> SPR
20071 3, // DPR:ssub_1 -> SPR
20072 0, // DPR:ssub_2
20073 0, // DPR:ssub_3
20074 0, // DPR:ssub_4
20075 0, // DPR:ssub_5
20076 0, // DPR:ssub_6
20077 0, // DPR:ssub_7
20078 0, // DPR:ssub_8
20079 0, // DPR:ssub_9
20080 0, // DPR:ssub_10
20081 0, // DPR:ssub_11
20082 0, // DPR:ssub_12
20083 0, // DPR:ssub_13
20084 0, // DPR:ssub_14
20085 0, // DPR:ssub_15
20086 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5
20087 0, // DPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20088 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7
20089 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20090 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5
20091 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20092 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20093 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20094 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20095 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20096 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9
20097 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20098 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20099 0, // DPR:ssub_6_ssub_7_dsub_5
20100 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20101 0, // DPR:ssub_6_ssub_7_dsub_5_dsub_7
20102 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9
20103 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20104 0, // DPR:ssub_8_ssub_9_ssub_12_ssub_13
20105 0, // DPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20106 0, // DPR:dsub_5_dsub_7
20107 0, // DPR:dsub_5_ssub_12_ssub_13_dsub_7
20108 0, // DPR:dsub_5_ssub_12_ssub_13
20109 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20110 },
20111 { // DPR_VFP2
20112 0, // DPR_VFP2:dsub_0
20113 0, // DPR_VFP2:dsub_1
20114 0, // DPR_VFP2:dsub_2
20115 0, // DPR_VFP2:dsub_3
20116 0, // DPR_VFP2:dsub_4
20117 0, // DPR_VFP2:dsub_5
20118 0, // DPR_VFP2:dsub_6
20119 0, // DPR_VFP2:dsub_7
20120 0, // DPR_VFP2:gsub_0
20121 0, // DPR_VFP2:gsub_1
20122 0, // DPR_VFP2:qqsub_0
20123 0, // DPR_VFP2:qqsub_1
20124 0, // DPR_VFP2:qsub_0
20125 0, // DPR_VFP2:qsub_1
20126 0, // DPR_VFP2:qsub_2
20127 0, // DPR_VFP2:qsub_3
20128 3, // DPR_VFP2:ssub_0 -> SPR
20129 3, // DPR_VFP2:ssub_1 -> SPR
20130 0, // DPR_VFP2:ssub_2
20131 0, // DPR_VFP2:ssub_3
20132 0, // DPR_VFP2:ssub_4
20133 0, // DPR_VFP2:ssub_5
20134 0, // DPR_VFP2:ssub_6
20135 0, // DPR_VFP2:ssub_7
20136 0, // DPR_VFP2:ssub_8
20137 0, // DPR_VFP2:ssub_9
20138 0, // DPR_VFP2:ssub_10
20139 0, // DPR_VFP2:ssub_11
20140 0, // DPR_VFP2:ssub_12
20141 0, // DPR_VFP2:ssub_13
20142 0, // DPR_VFP2:ssub_14
20143 0, // DPR_VFP2:ssub_15
20144 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5
20145 0, // DPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20146 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7
20147 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20148 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5
20149 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20150 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20151 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20152 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20153 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20154 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9
20155 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20156 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20157 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5
20158 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20159 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7
20160 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9
20161 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20162 0, // DPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13
20163 0, // DPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20164 0, // DPR_VFP2:dsub_5_dsub_7
20165 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7
20166 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13
20167 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20168 },
20169 { // DPR_8
20170 0, // DPR_8:dsub_0
20171 0, // DPR_8:dsub_1
20172 0, // DPR_8:dsub_2
20173 0, // DPR_8:dsub_3
20174 0, // DPR_8:dsub_4
20175 0, // DPR_8:dsub_5
20176 0, // DPR_8:dsub_6
20177 0, // DPR_8:dsub_7
20178 0, // DPR_8:gsub_0
20179 0, // DPR_8:gsub_1
20180 0, // DPR_8:qqsub_0
20181 0, // DPR_8:qqsub_1
20182 0, // DPR_8:qsub_0
20183 0, // DPR_8:qsub_1
20184 0, // DPR_8:qsub_2
20185 0, // DPR_8:qsub_3
20186 8, // DPR_8:ssub_0 -> SPR_8
20187 8, // DPR_8:ssub_1 -> SPR_8
20188 0, // DPR_8:ssub_2
20189 0, // DPR_8:ssub_3
20190 0, // DPR_8:ssub_4
20191 0, // DPR_8:ssub_5
20192 0, // DPR_8:ssub_6
20193 0, // DPR_8:ssub_7
20194 0, // DPR_8:ssub_8
20195 0, // DPR_8:ssub_9
20196 0, // DPR_8:ssub_10
20197 0, // DPR_8:ssub_11
20198 0, // DPR_8:ssub_12
20199 0, // DPR_8:ssub_13
20200 0, // DPR_8:ssub_14
20201 0, // DPR_8:ssub_15
20202 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5
20203 0, // DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20204 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
20205 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20206 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
20207 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20208 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20209 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20210 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20211 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20212 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
20213 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20214 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20215 0, // DPR_8:ssub_6_ssub_7_dsub_5
20216 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20217 0, // DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
20218 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
20219 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20220 0, // DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
20221 0, // DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20222 0, // DPR_8:dsub_5_dsub_7
20223 0, // DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
20224 0, // DPR_8:dsub_5_ssub_12_ssub_13
20225 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20226 },
20227 { // GPRPair
20228 0, // GPRPair:dsub_0
20229 0, // GPRPair:dsub_1
20230 0, // GPRPair:dsub_2
20231 0, // GPRPair:dsub_3
20232 0, // GPRPair:dsub_4
20233 0, // GPRPair:dsub_5
20234 0, // GPRPair:dsub_6
20235 0, // GPRPair:dsub_7
20236 23, // GPRPair:gsub_0 -> tGPREven
20237 16, // GPRPair:gsub_1 -> GPRnoip_and_GPRnopc
20238 0, // GPRPair:qqsub_0
20239 0, // GPRPair:qqsub_1
20240 0, // GPRPair:qsub_0
20241 0, // GPRPair:qsub_1
20242 0, // GPRPair:qsub_2
20243 0, // GPRPair:qsub_3
20244 0, // GPRPair:ssub_0
20245 0, // GPRPair:ssub_1
20246 0, // GPRPair:ssub_2
20247 0, // GPRPair:ssub_3
20248 0, // GPRPair:ssub_4
20249 0, // GPRPair:ssub_5
20250 0, // GPRPair:ssub_6
20251 0, // GPRPair:ssub_7
20252 0, // GPRPair:ssub_8
20253 0, // GPRPair:ssub_9
20254 0, // GPRPair:ssub_10
20255 0, // GPRPair:ssub_11
20256 0, // GPRPair:ssub_12
20257 0, // GPRPair:ssub_13
20258 0, // GPRPair:ssub_14
20259 0, // GPRPair:ssub_15
20260 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5
20261 0, // GPRPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20262 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7
20263 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20264 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5
20265 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20266 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20267 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20268 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20269 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20270 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9
20271 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20272 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20273 0, // GPRPair:ssub_6_ssub_7_dsub_5
20274 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20275 0, // GPRPair:ssub_6_ssub_7_dsub_5_dsub_7
20276 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9
20277 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20278 0, // GPRPair:ssub_8_ssub_9_ssub_12_ssub_13
20279 0, // GPRPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20280 0, // GPRPair:dsub_5_dsub_7
20281 0, // GPRPair:dsub_5_ssub_12_ssub_13_dsub_7
20282 0, // GPRPair:dsub_5_ssub_12_ssub_13
20283 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20284 },
20285 { // GPRPairnosp
20286 0, // GPRPairnosp:dsub_0
20287 0, // GPRPairnosp:dsub_1
20288 0, // GPRPairnosp:dsub_2
20289 0, // GPRPairnosp:dsub_3
20290 0, // GPRPairnosp:dsub_4
20291 0, // GPRPairnosp:dsub_5
20292 0, // GPRPairnosp:dsub_6
20293 0, // GPRPairnosp:dsub_7
20294 27, // GPRPairnosp:gsub_0 -> GPRnoip_and_tGPREven
20295 29, // GPRPairnosp:gsub_1 -> tGPROdd
20296 0, // GPRPairnosp:qqsub_0
20297 0, // GPRPairnosp:qqsub_1
20298 0, // GPRPairnosp:qsub_0
20299 0, // GPRPairnosp:qsub_1
20300 0, // GPRPairnosp:qsub_2
20301 0, // GPRPairnosp:qsub_3
20302 0, // GPRPairnosp:ssub_0
20303 0, // GPRPairnosp:ssub_1
20304 0, // GPRPairnosp:ssub_2
20305 0, // GPRPairnosp:ssub_3
20306 0, // GPRPairnosp:ssub_4
20307 0, // GPRPairnosp:ssub_5
20308 0, // GPRPairnosp:ssub_6
20309 0, // GPRPairnosp:ssub_7
20310 0, // GPRPairnosp:ssub_8
20311 0, // GPRPairnosp:ssub_9
20312 0, // GPRPairnosp:ssub_10
20313 0, // GPRPairnosp:ssub_11
20314 0, // GPRPairnosp:ssub_12
20315 0, // GPRPairnosp:ssub_13
20316 0, // GPRPairnosp:ssub_14
20317 0, // GPRPairnosp:ssub_15
20318 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5
20319 0, // GPRPairnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20320 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7
20321 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20322 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5
20323 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20324 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20325 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20326 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20327 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20328 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9
20329 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20330 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20331 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5
20332 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20333 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5_dsub_7
20334 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9
20335 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20336 0, // GPRPairnosp:ssub_8_ssub_9_ssub_12_ssub_13
20337 0, // GPRPairnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20338 0, // GPRPairnosp:dsub_5_dsub_7
20339 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13_dsub_7
20340 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13
20341 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20342 },
20343 { // GPRPair_with_gsub_0_in_tGPR
20344 0, // GPRPair_with_gsub_0_in_tGPR:dsub_0
20345 0, // GPRPair_with_gsub_0_in_tGPR:dsub_1
20346 0, // GPRPair_with_gsub_0_in_tGPR:dsub_2
20347 0, // GPRPair_with_gsub_0_in_tGPR:dsub_3
20348 0, // GPRPair_with_gsub_0_in_tGPR:dsub_4
20349 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5
20350 0, // GPRPair_with_gsub_0_in_tGPR:dsub_6
20351 0, // GPRPair_with_gsub_0_in_tGPR:dsub_7
20352 35, // GPRPair_with_gsub_0_in_tGPR:gsub_0 -> tGPR_and_tGPREven
20353 36, // GPRPair_with_gsub_0_in_tGPR:gsub_1 -> tGPR_and_tGPROdd
20354 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_0
20355 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_1
20356 0, // GPRPair_with_gsub_0_in_tGPR:qsub_0
20357 0, // GPRPair_with_gsub_0_in_tGPR:qsub_1
20358 0, // GPRPair_with_gsub_0_in_tGPR:qsub_2
20359 0, // GPRPair_with_gsub_0_in_tGPR:qsub_3
20360 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0
20361 0, // GPRPair_with_gsub_0_in_tGPR:ssub_1
20362 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2
20363 0, // GPRPair_with_gsub_0_in_tGPR:ssub_3
20364 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4
20365 0, // GPRPair_with_gsub_0_in_tGPR:ssub_5
20366 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6
20367 0, // GPRPair_with_gsub_0_in_tGPR:ssub_7
20368 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8
20369 0, // GPRPair_with_gsub_0_in_tGPR:ssub_9
20370 0, // GPRPair_with_gsub_0_in_tGPR:ssub_10
20371 0, // GPRPair_with_gsub_0_in_tGPR:ssub_11
20372 0, // GPRPair_with_gsub_0_in_tGPR:ssub_12
20373 0, // GPRPair_with_gsub_0_in_tGPR:ssub_13
20374 0, // GPRPair_with_gsub_0_in_tGPR:ssub_14
20375 0, // GPRPair_with_gsub_0_in_tGPR:ssub_15
20376 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5
20377 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20378 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7
20379 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20380 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5
20381 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20382 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20383 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20384 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20385 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20386 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9
20387 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20388 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20389 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5
20390 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20391 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5_dsub_7
20392 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9
20393 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20394 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_ssub_12_ssub_13
20395 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20396 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_dsub_7
20397 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13_dsub_7
20398 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13
20399 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20400 },
20401 { // GPRPair_with_gsub_0_in_hGPR
20402 0, // GPRPair_with_gsub_0_in_hGPR:dsub_0
20403 0, // GPRPair_with_gsub_0_in_hGPR:dsub_1
20404 0, // GPRPair_with_gsub_0_in_hGPR:dsub_2
20405 0, // GPRPair_with_gsub_0_in_hGPR:dsub_3
20406 0, // GPRPair_with_gsub_0_in_hGPR:dsub_4
20407 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5
20408 0, // GPRPair_with_gsub_0_in_hGPR:dsub_6
20409 0, // GPRPair_with_gsub_0_in_hGPR:dsub_7
20410 34, // GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_tGPREven
20411 30, // GPRPair_with_gsub_0_in_hGPR:gsub_1 -> GPRnopc_and_GPRnoip_and_hGPR
20412 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_0
20413 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_1
20414 0, // GPRPair_with_gsub_0_in_hGPR:qsub_0
20415 0, // GPRPair_with_gsub_0_in_hGPR:qsub_1
20416 0, // GPRPair_with_gsub_0_in_hGPR:qsub_2
20417 0, // GPRPair_with_gsub_0_in_hGPR:qsub_3
20418 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0
20419 0, // GPRPair_with_gsub_0_in_hGPR:ssub_1
20420 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2
20421 0, // GPRPair_with_gsub_0_in_hGPR:ssub_3
20422 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4
20423 0, // GPRPair_with_gsub_0_in_hGPR:ssub_5
20424 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6
20425 0, // GPRPair_with_gsub_0_in_hGPR:ssub_7
20426 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8
20427 0, // GPRPair_with_gsub_0_in_hGPR:ssub_9
20428 0, // GPRPair_with_gsub_0_in_hGPR:ssub_10
20429 0, // GPRPair_with_gsub_0_in_hGPR:ssub_11
20430 0, // GPRPair_with_gsub_0_in_hGPR:ssub_12
20431 0, // GPRPair_with_gsub_0_in_hGPR:ssub_13
20432 0, // GPRPair_with_gsub_0_in_hGPR:ssub_14
20433 0, // GPRPair_with_gsub_0_in_hGPR:ssub_15
20434 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
20435 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20436 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
20437 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20438 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
20439 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20440 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20441 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20442 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20443 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20444 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
20445 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20446 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20447 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5
20448 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20449 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
20450 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
20451 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20452 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
20453 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20454 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7
20455 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
20456 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13
20457 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20458 },
20459 { // GPRPair_with_gsub_0_in_tcGPR
20460 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_0
20461 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_1
20462 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_2
20463 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_3
20464 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_4
20465 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5
20466 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_6
20467 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_7
20468 38, // GPRPair_with_gsub_0_in_tcGPR:gsub_0 -> tGPREven_and_tcGPR
20469 16, // GPRPair_with_gsub_0_in_tcGPR:gsub_1 -> GPRnoip_and_GPRnopc
20470 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_0
20471 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_1
20472 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_0
20473 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_1
20474 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_2
20475 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_3
20476 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0
20477 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_1
20478 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2
20479 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_3
20480 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4
20481 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_5
20482 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6
20483 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_7
20484 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8
20485 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_9
20486 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_10
20487 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_11
20488 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_12
20489 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_13
20490 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_14
20491 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_15
20492 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5
20493 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20494 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7
20495 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20496 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5
20497 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20498 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20499 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20500 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20501 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20502 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9
20503 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20504 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20505 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5
20506 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20507 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7
20508 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9
20509 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20510 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13
20511 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20512 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_dsub_7
20513 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7
20514 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13
20515 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20516 },
20517 { // GPRPair_with_gsub_0_in_tcGPRnotr12
20518 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_0
20519 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_1
20520 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_2
20521 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_3
20522 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_4
20523 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5
20524 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_6
20525 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_7
20526 41, // GPRPair_with_gsub_0_in_tcGPRnotr12:gsub_0 -> tGPREven_and_tcGPRnotr12
20527 42, // GPRPair_with_gsub_0_in_tcGPRnotr12:gsub_1 -> tGPROdd_and_tcGPR
20528 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qqsub_0
20529 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qqsub_1
20530 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_0
20531 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_1
20532 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_2
20533 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:qsub_3
20534 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0
20535 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_1
20536 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2
20537 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_3
20538 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4
20539 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_5
20540 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6
20541 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_7
20542 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8
20543 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_9
20544 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_10
20545 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_11
20546 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_12
20547 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_13
20548 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_14
20549 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_15
20550 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5
20551 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20552 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7
20553 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20554 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5
20555 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20556 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20557 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20558 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20559 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20560 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9
20561 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20562 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20563 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_dsub_5
20564 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20565 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_dsub_5_dsub_7
20566 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9
20567 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20568 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8_ssub_9_ssub_12_ssub_13
20569 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20570 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_dsub_7
20571 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_ssub_12_ssub_13_dsub_7
20572 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:dsub_5_ssub_12_ssub_13
20573 0, // GPRPair_with_gsub_0_in_tcGPRnotr12:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20574 },
20575 { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
20576 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_0
20577 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_1
20578 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_2
20579 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_3
20580 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_4
20581 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5
20582 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_6
20583 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_7
20584 39, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_GPRnoip_and_tGPREven
20585 40, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_1 -> hGPR_and_tGPROdd
20586 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_0
20587 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_1
20588 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_0
20589 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_1
20590 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_2
20591 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_3
20592 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0
20593 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_1
20594 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2
20595 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_3
20596 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4
20597 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_5
20598 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6
20599 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_7
20600 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8
20601 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_9
20602 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_10
20603 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_11
20604 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_12
20605 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_13
20606 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_14
20607 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_15
20608 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5
20609 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20610 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7
20611 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20612 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5
20613 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20614 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20615 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20616 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20617 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20618 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9
20619 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20620 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20621 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5
20622 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20623 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7
20624 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9
20625 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20626 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13
20627 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20628 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7
20629 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7
20630 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13
20631 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20632 },
20633 { // GPRPair_with_gsub_1_in_GPRsp
20634 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_0
20635 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_1
20636 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_2
20637 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_3
20638 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_4
20639 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5
20640 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_6
20641 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_7
20642 50, // GPRPair_with_gsub_1_in_GPRsp:gsub_0 -> hGPR_and_tcGPR
20643 46, // GPRPair_with_gsub_1_in_GPRsp:gsub_1 -> GPRsp
20644 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_0
20645 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_1
20646 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_0
20647 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_1
20648 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_2
20649 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_3
20650 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0
20651 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_1
20652 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2
20653 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_3
20654 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4
20655 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_5
20656 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6
20657 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_7
20658 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8
20659 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_9
20660 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_10
20661 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_11
20662 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_12
20663 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_13
20664 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_14
20665 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_15
20666 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5
20667 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20668 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7
20669 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20670 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5
20671 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20672 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20673 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20674 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20675 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20676 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9
20677 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20678 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20679 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5
20680 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20681 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5_dsub_7
20682 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9
20683 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20684 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_ssub_12_ssub_13
20685 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20686 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_dsub_7
20687 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13_dsub_7
20688 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13
20689 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20690 },
20691 { // DPairSpc
20692 51, // DPairSpc:dsub_0 -> DPR
20693 0, // DPairSpc:dsub_1
20694 51, // DPairSpc:dsub_2 -> DPR
20695 0, // DPairSpc:dsub_3
20696 0, // DPairSpc:dsub_4
20697 0, // DPairSpc:dsub_5
20698 0, // DPairSpc:dsub_6
20699 0, // DPairSpc:dsub_7
20700 0, // DPairSpc:gsub_0
20701 0, // DPairSpc:gsub_1
20702 0, // DPairSpc:qqsub_0
20703 0, // DPairSpc:qqsub_1
20704 0, // DPairSpc:qsub_0
20705 0, // DPairSpc:qsub_1
20706 0, // DPairSpc:qsub_2
20707 0, // DPairSpc:qsub_3
20708 3, // DPairSpc:ssub_0 -> SPR
20709 3, // DPairSpc:ssub_1 -> SPR
20710 0, // DPairSpc:ssub_2
20711 0, // DPairSpc:ssub_3
20712 3, // DPairSpc:ssub_4 -> SPR
20713 3, // DPairSpc:ssub_5 -> SPR
20714 0, // DPairSpc:ssub_6
20715 0, // DPairSpc:ssub_7
20716 0, // DPairSpc:ssub_8
20717 0, // DPairSpc:ssub_9
20718 0, // DPairSpc:ssub_10
20719 0, // DPairSpc:ssub_11
20720 0, // DPairSpc:ssub_12
20721 0, // DPairSpc:ssub_13
20722 0, // DPairSpc:ssub_14
20723 0, // DPairSpc:ssub_15
20724 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5
20725 0, // DPairSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20726 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7
20727 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20728 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5
20729 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20730 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20731 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20732 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20733 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20734 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9
20735 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20736 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20737 0, // DPairSpc:ssub_6_ssub_7_dsub_5
20738 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20739 0, // DPairSpc:ssub_6_ssub_7_dsub_5_dsub_7
20740 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9
20741 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20742 0, // DPairSpc:ssub_8_ssub_9_ssub_12_ssub_13
20743 0, // DPairSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20744 0, // DPairSpc:dsub_5_dsub_7
20745 0, // DPairSpc:dsub_5_ssub_12_ssub_13_dsub_7
20746 0, // DPairSpc:dsub_5_ssub_12_ssub_13
20747 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20748 },
20749 { // DPairSpc_with_ssub_0
20750 4, // DPairSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
20751 0, // DPairSpc_with_ssub_0:dsub_1
20752 51, // DPairSpc_with_ssub_0:dsub_2 -> DPR
20753 0, // DPairSpc_with_ssub_0:dsub_3
20754 0, // DPairSpc_with_ssub_0:dsub_4
20755 0, // DPairSpc_with_ssub_0:dsub_5
20756 0, // DPairSpc_with_ssub_0:dsub_6
20757 0, // DPairSpc_with_ssub_0:dsub_7
20758 0, // DPairSpc_with_ssub_0:gsub_0
20759 0, // DPairSpc_with_ssub_0:gsub_1
20760 0, // DPairSpc_with_ssub_0:qqsub_0
20761 0, // DPairSpc_with_ssub_0:qqsub_1
20762 0, // DPairSpc_with_ssub_0:qsub_0
20763 0, // DPairSpc_with_ssub_0:qsub_1
20764 0, // DPairSpc_with_ssub_0:qsub_2
20765 0, // DPairSpc_with_ssub_0:qsub_3
20766 3, // DPairSpc_with_ssub_0:ssub_0 -> SPR
20767 3, // DPairSpc_with_ssub_0:ssub_1 -> SPR
20768 0, // DPairSpc_with_ssub_0:ssub_2
20769 0, // DPairSpc_with_ssub_0:ssub_3
20770 3, // DPairSpc_with_ssub_0:ssub_4 -> SPR
20771 3, // DPairSpc_with_ssub_0:ssub_5 -> SPR
20772 0, // DPairSpc_with_ssub_0:ssub_6
20773 0, // DPairSpc_with_ssub_0:ssub_7
20774 0, // DPairSpc_with_ssub_0:ssub_8
20775 0, // DPairSpc_with_ssub_0:ssub_9
20776 0, // DPairSpc_with_ssub_0:ssub_10
20777 0, // DPairSpc_with_ssub_0:ssub_11
20778 0, // DPairSpc_with_ssub_0:ssub_12
20779 0, // DPairSpc_with_ssub_0:ssub_13
20780 0, // DPairSpc_with_ssub_0:ssub_14
20781 0, // DPairSpc_with_ssub_0:ssub_15
20782 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5
20783 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20784 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
20785 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20786 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5
20787 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20788 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20789 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20790 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20791 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20792 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9
20793 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20794 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20795 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5
20796 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20797 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
20798 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
20799 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20800 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
20801 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20802 0, // DPairSpc_with_ssub_0:dsub_5_dsub_7
20803 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
20804 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13
20805 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20806 },
20807 { // DPairSpc_with_ssub_4
20808 52, // DPairSpc_with_ssub_4:dsub_0 -> DPR_VFP2
20809 0, // DPairSpc_with_ssub_4:dsub_1
20810 52, // DPairSpc_with_ssub_4:dsub_2 -> DPR_VFP2
20811 0, // DPairSpc_with_ssub_4:dsub_3
20812 0, // DPairSpc_with_ssub_4:dsub_4
20813 0, // DPairSpc_with_ssub_4:dsub_5
20814 0, // DPairSpc_with_ssub_4:dsub_6
20815 0, // DPairSpc_with_ssub_4:dsub_7
20816 0, // DPairSpc_with_ssub_4:gsub_0
20817 0, // DPairSpc_with_ssub_4:gsub_1
20818 0, // DPairSpc_with_ssub_4:qqsub_0
20819 0, // DPairSpc_with_ssub_4:qqsub_1
20820 0, // DPairSpc_with_ssub_4:qsub_0
20821 0, // DPairSpc_with_ssub_4:qsub_1
20822 0, // DPairSpc_with_ssub_4:qsub_2
20823 0, // DPairSpc_with_ssub_4:qsub_3
20824 3, // DPairSpc_with_ssub_4:ssub_0 -> SPR
20825 3, // DPairSpc_with_ssub_4:ssub_1 -> SPR
20826 0, // DPairSpc_with_ssub_4:ssub_2
20827 0, // DPairSpc_with_ssub_4:ssub_3
20828 3, // DPairSpc_with_ssub_4:ssub_4 -> SPR
20829 3, // DPairSpc_with_ssub_4:ssub_5 -> SPR
20830 0, // DPairSpc_with_ssub_4:ssub_6
20831 0, // DPairSpc_with_ssub_4:ssub_7
20832 0, // DPairSpc_with_ssub_4:ssub_8
20833 0, // DPairSpc_with_ssub_4:ssub_9
20834 0, // DPairSpc_with_ssub_4:ssub_10
20835 0, // DPairSpc_with_ssub_4:ssub_11
20836 0, // DPairSpc_with_ssub_4:ssub_12
20837 0, // DPairSpc_with_ssub_4:ssub_13
20838 0, // DPairSpc_with_ssub_4:ssub_14
20839 0, // DPairSpc_with_ssub_4:ssub_15
20840 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5
20841 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20842 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7
20843 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20844 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5
20845 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20846 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20847 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20848 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20849 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20850 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9
20851 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20852 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20853 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5
20854 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20855 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7
20856 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9
20857 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20858 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13
20859 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20860 0, // DPairSpc_with_ssub_4:dsub_5_dsub_7
20861 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7
20862 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13
20863 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20864 },
20865 { // DPairSpc_with_dsub_0_in_DPR_8
20866 20, // DPairSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
20867 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_1
20868 52, // DPairSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
20869 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_3
20870 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_4
20871 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5
20872 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_6
20873 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_7
20874 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_0
20875 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_1
20876 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_0
20877 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_1
20878 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_0
20879 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_1
20880 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_2
20881 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_3
20882 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
20883 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
20884 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2
20885 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_3
20886 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR
20887 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR
20888 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6
20889 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_7
20890 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8
20891 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_9
20892 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_10
20893 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_11
20894 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_12
20895 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_13
20896 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_14
20897 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_15
20898 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5
20899 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20900 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
20901 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20902 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
20903 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20904 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20905 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20906 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20907 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20908 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
20909 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20910 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20911 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
20912 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20913 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
20914 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
20915 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20916 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
20917 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20918 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7
20919 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
20920 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
20921 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20922 },
20923 { // DPairSpc_with_dsub_2_in_DPR_8
20924 53, // DPairSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
20925 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_1
20926 53, // DPairSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
20927 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_3
20928 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_4
20929 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5
20930 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_6
20931 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_7
20932 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_0
20933 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_1
20934 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_0
20935 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_1
20936 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_0
20937 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_1
20938 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_2
20939 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_3
20940 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
20941 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
20942 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2
20943 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_3
20944 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
20945 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
20946 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6
20947 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_7
20948 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8
20949 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_9
20950 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_10
20951 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_11
20952 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_12
20953 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_13
20954 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_14
20955 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_15
20956 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5
20957 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
20958 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
20959 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
20960 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
20961 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
20962 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20963 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
20964 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
20965 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20966 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
20967 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
20968 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
20969 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5
20970 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
20971 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
20972 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
20973 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20974 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
20975 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
20976 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7
20977 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
20978 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13
20979 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
20980 },
20981 { // DPair
20982 51, // DPair:dsub_0 -> DPR
20983 51, // DPair:dsub_1 -> DPR
20984 0, // DPair:dsub_2
20985 0, // DPair:dsub_3
20986 0, // DPair:dsub_4
20987 0, // DPair:dsub_5
20988 0, // DPair:dsub_6
20989 0, // DPair:dsub_7
20990 0, // DPair:gsub_0
20991 0, // DPair:gsub_1
20992 0, // DPair:qqsub_0
20993 0, // DPair:qqsub_1
20994 0, // DPair:qsub_0
20995 0, // DPair:qsub_1
20996 0, // DPair:qsub_2
20997 0, // DPair:qsub_3
20998 3, // DPair:ssub_0 -> SPR
20999 3, // DPair:ssub_1 -> SPR
21000 3, // DPair:ssub_2 -> SPR
21001 3, // DPair:ssub_3 -> SPR
21002 0, // DPair:ssub_4
21003 0, // DPair:ssub_5
21004 0, // DPair:ssub_6
21005 0, // DPair:ssub_7
21006 0, // DPair:ssub_8
21007 0, // DPair:ssub_9
21008 0, // DPair:ssub_10
21009 0, // DPair:ssub_11
21010 0, // DPair:ssub_12
21011 0, // DPair:ssub_13
21012 0, // DPair:ssub_14
21013 0, // DPair:ssub_15
21014 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5
21015 0, // DPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21016 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7
21017 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21018 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5
21019 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21020 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21021 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21022 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21023 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21024 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9
21025 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21026 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21027 0, // DPair:ssub_6_ssub_7_dsub_5
21028 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21029 0, // DPair:ssub_6_ssub_7_dsub_5_dsub_7
21030 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9
21031 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21032 0, // DPair:ssub_8_ssub_9_ssub_12_ssub_13
21033 0, // DPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21034 0, // DPair:dsub_5_dsub_7
21035 0, // DPair:dsub_5_ssub_12_ssub_13_dsub_7
21036 0, // DPair:dsub_5_ssub_12_ssub_13
21037 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21038 },
21039 { // DPair_with_ssub_0
21040 4, // DPair_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
21041 51, // DPair_with_ssub_0:dsub_1 -> DPR
21042 0, // DPair_with_ssub_0:dsub_2
21043 0, // DPair_with_ssub_0:dsub_3
21044 0, // DPair_with_ssub_0:dsub_4
21045 0, // DPair_with_ssub_0:dsub_5
21046 0, // DPair_with_ssub_0:dsub_6
21047 0, // DPair_with_ssub_0:dsub_7
21048 0, // DPair_with_ssub_0:gsub_0
21049 0, // DPair_with_ssub_0:gsub_1
21050 0, // DPair_with_ssub_0:qqsub_0
21051 0, // DPair_with_ssub_0:qqsub_1
21052 0, // DPair_with_ssub_0:qsub_0
21053 0, // DPair_with_ssub_0:qsub_1
21054 0, // DPair_with_ssub_0:qsub_2
21055 0, // DPair_with_ssub_0:qsub_3
21056 3, // DPair_with_ssub_0:ssub_0 -> SPR
21057 3, // DPair_with_ssub_0:ssub_1 -> SPR
21058 3, // DPair_with_ssub_0:ssub_2 -> SPR
21059 3, // DPair_with_ssub_0:ssub_3 -> SPR
21060 0, // DPair_with_ssub_0:ssub_4
21061 0, // DPair_with_ssub_0:ssub_5
21062 0, // DPair_with_ssub_0:ssub_6
21063 0, // DPair_with_ssub_0:ssub_7
21064 0, // DPair_with_ssub_0:ssub_8
21065 0, // DPair_with_ssub_0:ssub_9
21066 0, // DPair_with_ssub_0:ssub_10
21067 0, // DPair_with_ssub_0:ssub_11
21068 0, // DPair_with_ssub_0:ssub_12
21069 0, // DPair_with_ssub_0:ssub_13
21070 0, // DPair_with_ssub_0:ssub_14
21071 0, // DPair_with_ssub_0:ssub_15
21072 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5
21073 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21074 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
21075 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21076 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5
21077 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21078 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21079 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21080 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21081 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21082 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9
21083 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21084 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21085 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5
21086 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21087 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
21088 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
21089 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21090 0, // DPair_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
21091 0, // DPair_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21092 0, // DPair_with_ssub_0:dsub_5_dsub_7
21093 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
21094 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13
21095 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21096 },
21097 { // QPR
21098 51, // QPR:dsub_0 -> DPR
21099 51, // QPR:dsub_1 -> DPR
21100 0, // QPR:dsub_2
21101 0, // QPR:dsub_3
21102 0, // QPR:dsub_4
21103 0, // QPR:dsub_5
21104 0, // QPR:dsub_6
21105 0, // QPR:dsub_7
21106 0, // QPR:gsub_0
21107 0, // QPR:gsub_1
21108 0, // QPR:qqsub_0
21109 0, // QPR:qqsub_1
21110 0, // QPR:qsub_0
21111 0, // QPR:qsub_1
21112 0, // QPR:qsub_2
21113 0, // QPR:qsub_3
21114 3, // QPR:ssub_0 -> SPR
21115 3, // QPR:ssub_1 -> SPR
21116 3, // QPR:ssub_2 -> SPR
21117 3, // QPR:ssub_3 -> SPR
21118 0, // QPR:ssub_4
21119 0, // QPR:ssub_5
21120 0, // QPR:ssub_6
21121 0, // QPR:ssub_7
21122 0, // QPR:ssub_8
21123 0, // QPR:ssub_9
21124 0, // QPR:ssub_10
21125 0, // QPR:ssub_11
21126 0, // QPR:ssub_12
21127 0, // QPR:ssub_13
21128 0, // QPR:ssub_14
21129 0, // QPR:ssub_15
21130 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5
21131 0, // QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21132 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7
21133 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21134 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5
21135 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21136 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21137 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21138 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21139 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21140 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9
21141 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21142 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21143 0, // QPR:ssub_6_ssub_7_dsub_5
21144 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21145 0, // QPR:ssub_6_ssub_7_dsub_5_dsub_7
21146 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9
21147 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21148 0, // QPR:ssub_8_ssub_9_ssub_12_ssub_13
21149 0, // QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21150 0, // QPR:dsub_5_dsub_7
21151 0, // QPR:dsub_5_ssub_12_ssub_13_dsub_7
21152 0, // QPR:dsub_5_ssub_12_ssub_13
21153 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21154 },
21155 { // DPair_with_ssub_2
21156 52, // DPair_with_ssub_2:dsub_0 -> DPR_VFP2
21157 52, // DPair_with_ssub_2:dsub_1 -> DPR_VFP2
21158 0, // DPair_with_ssub_2:dsub_2
21159 0, // DPair_with_ssub_2:dsub_3
21160 0, // DPair_with_ssub_2:dsub_4
21161 0, // DPair_with_ssub_2:dsub_5
21162 0, // DPair_with_ssub_2:dsub_6
21163 0, // DPair_with_ssub_2:dsub_7
21164 0, // DPair_with_ssub_2:gsub_0
21165 0, // DPair_with_ssub_2:gsub_1
21166 0, // DPair_with_ssub_2:qqsub_0
21167 0, // DPair_with_ssub_2:qqsub_1
21168 0, // DPair_with_ssub_2:qsub_0
21169 0, // DPair_with_ssub_2:qsub_1
21170 0, // DPair_with_ssub_2:qsub_2
21171 0, // DPair_with_ssub_2:qsub_3
21172 3, // DPair_with_ssub_2:ssub_0 -> SPR
21173 3, // DPair_with_ssub_2:ssub_1 -> SPR
21174 3, // DPair_with_ssub_2:ssub_2 -> SPR
21175 3, // DPair_with_ssub_2:ssub_3 -> SPR
21176 0, // DPair_with_ssub_2:ssub_4
21177 0, // DPair_with_ssub_2:ssub_5
21178 0, // DPair_with_ssub_2:ssub_6
21179 0, // DPair_with_ssub_2:ssub_7
21180 0, // DPair_with_ssub_2:ssub_8
21181 0, // DPair_with_ssub_2:ssub_9
21182 0, // DPair_with_ssub_2:ssub_10
21183 0, // DPair_with_ssub_2:ssub_11
21184 0, // DPair_with_ssub_2:ssub_12
21185 0, // DPair_with_ssub_2:ssub_13
21186 0, // DPair_with_ssub_2:ssub_14
21187 0, // DPair_with_ssub_2:ssub_15
21188 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5
21189 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21190 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7
21191 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21192 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5
21193 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21194 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21195 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21196 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21197 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21198 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9
21199 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21200 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21201 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5
21202 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21203 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7
21204 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9
21205 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21206 0, // DPair_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13
21207 0, // DPair_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21208 0, // DPair_with_ssub_2:dsub_5_dsub_7
21209 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7
21210 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13
21211 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21212 },
21213 { // DPair_with_dsub_0_in_DPR_8
21214 20, // DPair_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
21215 52, // DPair_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2
21216 0, // DPair_with_dsub_0_in_DPR_8:dsub_2
21217 0, // DPair_with_dsub_0_in_DPR_8:dsub_3
21218 0, // DPair_with_dsub_0_in_DPR_8:dsub_4
21219 0, // DPair_with_dsub_0_in_DPR_8:dsub_5
21220 0, // DPair_with_dsub_0_in_DPR_8:dsub_6
21221 0, // DPair_with_dsub_0_in_DPR_8:dsub_7
21222 0, // DPair_with_dsub_0_in_DPR_8:gsub_0
21223 0, // DPair_with_dsub_0_in_DPR_8:gsub_1
21224 0, // DPair_with_dsub_0_in_DPR_8:qqsub_0
21225 0, // DPair_with_dsub_0_in_DPR_8:qqsub_1
21226 0, // DPair_with_dsub_0_in_DPR_8:qsub_0
21227 0, // DPair_with_dsub_0_in_DPR_8:qsub_1
21228 0, // DPair_with_dsub_0_in_DPR_8:qsub_2
21229 0, // DPair_with_dsub_0_in_DPR_8:qsub_3
21230 8, // DPair_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
21231 8, // DPair_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
21232 3, // DPair_with_dsub_0_in_DPR_8:ssub_2 -> SPR
21233 3, // DPair_with_dsub_0_in_DPR_8:ssub_3 -> SPR
21234 0, // DPair_with_dsub_0_in_DPR_8:ssub_4
21235 0, // DPair_with_dsub_0_in_DPR_8:ssub_5
21236 0, // DPair_with_dsub_0_in_DPR_8:ssub_6
21237 0, // DPair_with_dsub_0_in_DPR_8:ssub_7
21238 0, // DPair_with_dsub_0_in_DPR_8:ssub_8
21239 0, // DPair_with_dsub_0_in_DPR_8:ssub_9
21240 0, // DPair_with_dsub_0_in_DPR_8:ssub_10
21241 0, // DPair_with_dsub_0_in_DPR_8:ssub_11
21242 0, // DPair_with_dsub_0_in_DPR_8:ssub_12
21243 0, // DPair_with_dsub_0_in_DPR_8:ssub_13
21244 0, // DPair_with_dsub_0_in_DPR_8:ssub_14
21245 0, // DPair_with_dsub_0_in_DPR_8:ssub_15
21246 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5
21247 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21248 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
21249 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21250 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
21251 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21252 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21253 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21254 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21255 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21256 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
21257 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21258 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21259 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
21260 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21261 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
21262 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
21263 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21264 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
21265 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21266 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_dsub_7
21267 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
21268 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
21269 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21270 },
21271 { // MQPR
21272 52, // MQPR:dsub_0 -> DPR_VFP2
21273 52, // MQPR:dsub_1 -> DPR_VFP2
21274 0, // MQPR:dsub_2
21275 0, // MQPR:dsub_3
21276 0, // MQPR:dsub_4
21277 0, // MQPR:dsub_5
21278 0, // MQPR:dsub_6
21279 0, // MQPR:dsub_7
21280 0, // MQPR:gsub_0
21281 0, // MQPR:gsub_1
21282 0, // MQPR:qqsub_0
21283 0, // MQPR:qqsub_1
21284 0, // MQPR:qsub_0
21285 0, // MQPR:qsub_1
21286 0, // MQPR:qsub_2
21287 0, // MQPR:qsub_3
21288 3, // MQPR:ssub_0 -> SPR
21289 3, // MQPR:ssub_1 -> SPR
21290 3, // MQPR:ssub_2 -> SPR
21291 3, // MQPR:ssub_3 -> SPR
21292 0, // MQPR:ssub_4
21293 0, // MQPR:ssub_5
21294 0, // MQPR:ssub_6
21295 0, // MQPR:ssub_7
21296 0, // MQPR:ssub_8
21297 0, // MQPR:ssub_9
21298 0, // MQPR:ssub_10
21299 0, // MQPR:ssub_11
21300 0, // MQPR:ssub_12
21301 0, // MQPR:ssub_13
21302 0, // MQPR:ssub_14
21303 0, // MQPR:ssub_15
21304 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5
21305 0, // MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21306 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7
21307 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21308 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5
21309 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21310 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21311 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21312 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21313 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21314 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9
21315 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21316 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21317 0, // MQPR:ssub_6_ssub_7_dsub_5
21318 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21319 0, // MQPR:ssub_6_ssub_7_dsub_5_dsub_7
21320 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9
21321 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21322 0, // MQPR:ssub_8_ssub_9_ssub_12_ssub_13
21323 0, // MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21324 0, // MQPR:dsub_5_dsub_7
21325 0, // MQPR:dsub_5_ssub_12_ssub_13_dsub_7
21326 0, // MQPR:dsub_5_ssub_12_ssub_13
21327 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21328 },
21329 { // QPR_VFP2
21330 52, // QPR_VFP2:dsub_0 -> DPR_VFP2
21331 52, // QPR_VFP2:dsub_1 -> DPR_VFP2
21332 0, // QPR_VFP2:dsub_2
21333 0, // QPR_VFP2:dsub_3
21334 0, // QPR_VFP2:dsub_4
21335 0, // QPR_VFP2:dsub_5
21336 0, // QPR_VFP2:dsub_6
21337 0, // QPR_VFP2:dsub_7
21338 0, // QPR_VFP2:gsub_0
21339 0, // QPR_VFP2:gsub_1
21340 0, // QPR_VFP2:qqsub_0
21341 0, // QPR_VFP2:qqsub_1
21342 0, // QPR_VFP2:qsub_0
21343 0, // QPR_VFP2:qsub_1
21344 0, // QPR_VFP2:qsub_2
21345 0, // QPR_VFP2:qsub_3
21346 3, // QPR_VFP2:ssub_0 -> SPR
21347 3, // QPR_VFP2:ssub_1 -> SPR
21348 3, // QPR_VFP2:ssub_2 -> SPR
21349 3, // QPR_VFP2:ssub_3 -> SPR
21350 0, // QPR_VFP2:ssub_4
21351 0, // QPR_VFP2:ssub_5
21352 0, // QPR_VFP2:ssub_6
21353 0, // QPR_VFP2:ssub_7
21354 0, // QPR_VFP2:ssub_8
21355 0, // QPR_VFP2:ssub_9
21356 0, // QPR_VFP2:ssub_10
21357 0, // QPR_VFP2:ssub_11
21358 0, // QPR_VFP2:ssub_12
21359 0, // QPR_VFP2:ssub_13
21360 0, // QPR_VFP2:ssub_14
21361 0, // QPR_VFP2:ssub_15
21362 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5
21363 0, // QPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21364 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7
21365 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21366 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5
21367 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21368 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21369 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21370 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21371 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21372 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9
21373 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21374 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21375 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5
21376 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21377 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7
21378 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9
21379 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21380 0, // QPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13
21381 0, // QPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21382 0, // QPR_VFP2:dsub_5_dsub_7
21383 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7
21384 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13
21385 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21386 },
21387 { // DPair_with_dsub_1_in_DPR_8
21388 53, // DPair_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8
21389 53, // DPair_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8
21390 0, // DPair_with_dsub_1_in_DPR_8:dsub_2
21391 0, // DPair_with_dsub_1_in_DPR_8:dsub_3
21392 0, // DPair_with_dsub_1_in_DPR_8:dsub_4
21393 0, // DPair_with_dsub_1_in_DPR_8:dsub_5
21394 0, // DPair_with_dsub_1_in_DPR_8:dsub_6
21395 0, // DPair_with_dsub_1_in_DPR_8:dsub_7
21396 0, // DPair_with_dsub_1_in_DPR_8:gsub_0
21397 0, // DPair_with_dsub_1_in_DPR_8:gsub_1
21398 0, // DPair_with_dsub_1_in_DPR_8:qqsub_0
21399 0, // DPair_with_dsub_1_in_DPR_8:qqsub_1
21400 0, // DPair_with_dsub_1_in_DPR_8:qsub_0
21401 0, // DPair_with_dsub_1_in_DPR_8:qsub_1
21402 0, // DPair_with_dsub_1_in_DPR_8:qsub_2
21403 0, // DPair_with_dsub_1_in_DPR_8:qsub_3
21404 8, // DPair_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8
21405 8, // DPair_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8
21406 8, // DPair_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8
21407 8, // DPair_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8
21408 0, // DPair_with_dsub_1_in_DPR_8:ssub_4
21409 0, // DPair_with_dsub_1_in_DPR_8:ssub_5
21410 0, // DPair_with_dsub_1_in_DPR_8:ssub_6
21411 0, // DPair_with_dsub_1_in_DPR_8:ssub_7
21412 0, // DPair_with_dsub_1_in_DPR_8:ssub_8
21413 0, // DPair_with_dsub_1_in_DPR_8:ssub_9
21414 0, // DPair_with_dsub_1_in_DPR_8:ssub_10
21415 0, // DPair_with_dsub_1_in_DPR_8:ssub_11
21416 0, // DPair_with_dsub_1_in_DPR_8:ssub_12
21417 0, // DPair_with_dsub_1_in_DPR_8:ssub_13
21418 0, // DPair_with_dsub_1_in_DPR_8:ssub_14
21419 0, // DPair_with_dsub_1_in_DPR_8:ssub_15
21420 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5
21421 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21422 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
21423 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21424 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
21425 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21426 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21427 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21428 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21429 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21430 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
21431 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21432 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21433 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5
21434 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21435 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
21436 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
21437 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21438 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
21439 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21440 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_dsub_7
21441 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
21442 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13
21443 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21444 },
21445 { // QPR_8
21446 53, // QPR_8:dsub_0 -> DPR_8
21447 53, // QPR_8:dsub_1 -> DPR_8
21448 0, // QPR_8:dsub_2
21449 0, // QPR_8:dsub_3
21450 0, // QPR_8:dsub_4
21451 0, // QPR_8:dsub_5
21452 0, // QPR_8:dsub_6
21453 0, // QPR_8:dsub_7
21454 0, // QPR_8:gsub_0
21455 0, // QPR_8:gsub_1
21456 0, // QPR_8:qqsub_0
21457 0, // QPR_8:qqsub_1
21458 0, // QPR_8:qsub_0
21459 0, // QPR_8:qsub_1
21460 0, // QPR_8:qsub_2
21461 0, // QPR_8:qsub_3
21462 8, // QPR_8:ssub_0 -> SPR_8
21463 8, // QPR_8:ssub_1 -> SPR_8
21464 8, // QPR_8:ssub_2 -> SPR_8
21465 8, // QPR_8:ssub_3 -> SPR_8
21466 0, // QPR_8:ssub_4
21467 0, // QPR_8:ssub_5
21468 0, // QPR_8:ssub_6
21469 0, // QPR_8:ssub_7
21470 0, // QPR_8:ssub_8
21471 0, // QPR_8:ssub_9
21472 0, // QPR_8:ssub_10
21473 0, // QPR_8:ssub_11
21474 0, // QPR_8:ssub_12
21475 0, // QPR_8:ssub_13
21476 0, // QPR_8:ssub_14
21477 0, // QPR_8:ssub_15
21478 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5
21479 0, // QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21480 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7
21481 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21482 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5
21483 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21484 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21485 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21486 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21487 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21488 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
21489 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21490 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21491 0, // QPR_8:ssub_6_ssub_7_dsub_5
21492 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21493 0, // QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
21494 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
21495 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21496 0, // QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
21497 0, // QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21498 0, // QPR_8:dsub_5_dsub_7
21499 0, // QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
21500 0, // QPR_8:dsub_5_ssub_12_ssub_13
21501 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21502 },
21503 { // DTriple
21504 51, // DTriple:dsub_0 -> DPR
21505 51, // DTriple:dsub_1 -> DPR
21506 51, // DTriple:dsub_2 -> DPR
21507 0, // DTriple:dsub_3
21508 0, // DTriple:dsub_4
21509 0, // DTriple:dsub_5
21510 0, // DTriple:dsub_6
21511 0, // DTriple:dsub_7
21512 0, // DTriple:gsub_0
21513 0, // DTriple:gsub_1
21514 0, // DTriple:qqsub_0
21515 0, // DTriple:qqsub_1
21516 67, // DTriple:qsub_0 -> DPair
21517 0, // DTriple:qsub_1
21518 0, // DTriple:qsub_2
21519 0, // DTriple:qsub_3
21520 3, // DTriple:ssub_0 -> SPR
21521 3, // DTriple:ssub_1 -> SPR
21522 3, // DTriple:ssub_2 -> SPR
21523 3, // DTriple:ssub_3 -> SPR
21524 3, // DTriple:ssub_4 -> SPR
21525 3, // DTriple:ssub_5 -> SPR
21526 0, // DTriple:ssub_6
21527 0, // DTriple:ssub_7
21528 0, // DTriple:ssub_8
21529 0, // DTriple:ssub_9
21530 0, // DTriple:ssub_10
21531 0, // DTriple:ssub_11
21532 0, // DTriple:ssub_12
21533 0, // DTriple:ssub_13
21534 0, // DTriple:ssub_14
21535 0, // DTriple:ssub_15
21536 62, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
21537 0, // DTriple:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21538 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7
21539 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21540 67, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
21541 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21542 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21543 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21544 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21545 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21546 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9
21547 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21548 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21549 0, // DTriple:ssub_6_ssub_7_dsub_5
21550 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21551 0, // DTriple:ssub_6_ssub_7_dsub_5_dsub_7
21552 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9
21553 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21554 0, // DTriple:ssub_8_ssub_9_ssub_12_ssub_13
21555 0, // DTriple:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21556 0, // DTriple:dsub_5_dsub_7
21557 0, // DTriple:dsub_5_ssub_12_ssub_13_dsub_7
21558 0, // DTriple:dsub_5_ssub_12_ssub_13
21559 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21560 },
21561 { // DTripleSpc
21562 51, // DTripleSpc:dsub_0 -> DPR
21563 0, // DTripleSpc:dsub_1
21564 51, // DTripleSpc:dsub_2 -> DPR
21565 0, // DTripleSpc:dsub_3
21566 51, // DTripleSpc:dsub_4 -> DPR
21567 0, // DTripleSpc:dsub_5
21568 0, // DTripleSpc:dsub_6
21569 0, // DTripleSpc:dsub_7
21570 0, // DTripleSpc:gsub_0
21571 0, // DTripleSpc:gsub_1
21572 0, // DTripleSpc:qqsub_0
21573 0, // DTripleSpc:qqsub_1
21574 0, // DTripleSpc:qsub_0
21575 0, // DTripleSpc:qsub_1
21576 0, // DTripleSpc:qsub_2
21577 0, // DTripleSpc:qsub_3
21578 3, // DTripleSpc:ssub_0 -> SPR
21579 3, // DTripleSpc:ssub_1 -> SPR
21580 0, // DTripleSpc:ssub_2
21581 0, // DTripleSpc:ssub_3
21582 3, // DTripleSpc:ssub_4 -> SPR
21583 3, // DTripleSpc:ssub_5 -> SPR
21584 0, // DTripleSpc:ssub_6
21585 0, // DTripleSpc:ssub_7
21586 3, // DTripleSpc:ssub_8 -> SPR
21587 3, // DTripleSpc:ssub_9 -> SPR
21588 0, // DTripleSpc:ssub_10
21589 0, // DTripleSpc:ssub_11
21590 0, // DTripleSpc:ssub_12
21591 0, // DTripleSpc:ssub_13
21592 0, // DTripleSpc:ssub_14
21593 0, // DTripleSpc:ssub_15
21594 62, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
21595 0, // DTripleSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21596 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7
21597 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21598 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5
21599 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21600 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21601 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21602 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21603 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21604 62, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
21605 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21606 0, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21607 0, // DTripleSpc:ssub_6_ssub_7_dsub_5
21608 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21609 0, // DTripleSpc:ssub_6_ssub_7_dsub_5_dsub_7
21610 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9
21611 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21612 0, // DTripleSpc:ssub_8_ssub_9_ssub_12_ssub_13
21613 0, // DTripleSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21614 0, // DTripleSpc:dsub_5_dsub_7
21615 0, // DTripleSpc:dsub_5_ssub_12_ssub_13_dsub_7
21616 0, // DTripleSpc:dsub_5_ssub_12_ssub_13
21617 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21618 },
21619 { // DTripleSpc_with_ssub_0
21620 4, // DTripleSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
21621 0, // DTripleSpc_with_ssub_0:dsub_1
21622 51, // DTripleSpc_with_ssub_0:dsub_2 -> DPR
21623 0, // DTripleSpc_with_ssub_0:dsub_3
21624 51, // DTripleSpc_with_ssub_0:dsub_4 -> DPR
21625 0, // DTripleSpc_with_ssub_0:dsub_5
21626 0, // DTripleSpc_with_ssub_0:dsub_6
21627 0, // DTripleSpc_with_ssub_0:dsub_7
21628 0, // DTripleSpc_with_ssub_0:gsub_0
21629 0, // DTripleSpc_with_ssub_0:gsub_1
21630 0, // DTripleSpc_with_ssub_0:qqsub_0
21631 0, // DTripleSpc_with_ssub_0:qqsub_1
21632 0, // DTripleSpc_with_ssub_0:qsub_0
21633 0, // DTripleSpc_with_ssub_0:qsub_1
21634 0, // DTripleSpc_with_ssub_0:qsub_2
21635 0, // DTripleSpc_with_ssub_0:qsub_3
21636 3, // DTripleSpc_with_ssub_0:ssub_0 -> SPR
21637 3, // DTripleSpc_with_ssub_0:ssub_1 -> SPR
21638 0, // DTripleSpc_with_ssub_0:ssub_2
21639 0, // DTripleSpc_with_ssub_0:ssub_3
21640 3, // DTripleSpc_with_ssub_0:ssub_4 -> SPR
21641 3, // DTripleSpc_with_ssub_0:ssub_5 -> SPR
21642 0, // DTripleSpc_with_ssub_0:ssub_6
21643 0, // DTripleSpc_with_ssub_0:ssub_7
21644 3, // DTripleSpc_with_ssub_0:ssub_8 -> SPR
21645 3, // DTripleSpc_with_ssub_0:ssub_9 -> SPR
21646 0, // DTripleSpc_with_ssub_0:ssub_10
21647 0, // DTripleSpc_with_ssub_0:ssub_11
21648 0, // DTripleSpc_with_ssub_0:ssub_12
21649 0, // DTripleSpc_with_ssub_0:ssub_13
21650 0, // DTripleSpc_with_ssub_0:ssub_14
21651 0, // DTripleSpc_with_ssub_0:ssub_15
21652 63, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
21653 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21654 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
21655 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21656 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5
21657 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21658 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21659 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21660 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21661 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21662 62, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
21663 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21664 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21665 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5
21666 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21667 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
21668 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
21669 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21670 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
21671 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21672 0, // DTripleSpc_with_ssub_0:dsub_5_dsub_7
21673 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
21674 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13
21675 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21676 },
21677 { // DTriple_with_ssub_0
21678 4, // DTriple_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
21679 51, // DTriple_with_ssub_0:dsub_1 -> DPR
21680 51, // DTriple_with_ssub_0:dsub_2 -> DPR
21681 0, // DTriple_with_ssub_0:dsub_3
21682 0, // DTriple_with_ssub_0:dsub_4
21683 0, // DTriple_with_ssub_0:dsub_5
21684 0, // DTriple_with_ssub_0:dsub_6
21685 0, // DTriple_with_ssub_0:dsub_7
21686 0, // DTriple_with_ssub_0:gsub_0
21687 0, // DTriple_with_ssub_0:gsub_1
21688 0, // DTriple_with_ssub_0:qqsub_0
21689 0, // DTriple_with_ssub_0:qqsub_1
21690 68, // DTriple_with_ssub_0:qsub_0 -> DPair_with_ssub_0
21691 0, // DTriple_with_ssub_0:qsub_1
21692 0, // DTriple_with_ssub_0:qsub_2
21693 0, // DTriple_with_ssub_0:qsub_3
21694 3, // DTriple_with_ssub_0:ssub_0 -> SPR
21695 3, // DTriple_with_ssub_0:ssub_1 -> SPR
21696 3, // DTriple_with_ssub_0:ssub_2 -> SPR
21697 3, // DTriple_with_ssub_0:ssub_3 -> SPR
21698 3, // DTriple_with_ssub_0:ssub_4 -> SPR
21699 3, // DTriple_with_ssub_0:ssub_5 -> SPR
21700 0, // DTriple_with_ssub_0:ssub_6
21701 0, // DTriple_with_ssub_0:ssub_7
21702 0, // DTriple_with_ssub_0:ssub_8
21703 0, // DTriple_with_ssub_0:ssub_9
21704 0, // DTriple_with_ssub_0:ssub_10
21705 0, // DTriple_with_ssub_0:ssub_11
21706 0, // DTriple_with_ssub_0:ssub_12
21707 0, // DTriple_with_ssub_0:ssub_13
21708 0, // DTriple_with_ssub_0:ssub_14
21709 0, // DTriple_with_ssub_0:ssub_15
21710 63, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
21711 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21712 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
21713 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21714 67, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
21715 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21716 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21717 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21718 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21719 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21720 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9
21721 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21722 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21723 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5
21724 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21725 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
21726 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
21727 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21728 0, // DTriple_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
21729 0, // DTriple_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21730 0, // DTriple_with_ssub_0:dsub_5_dsub_7
21731 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
21732 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13
21733 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21734 },
21735 { // DTriple_with_qsub_0_in_QPR
21736 51, // DTriple_with_qsub_0_in_QPR:dsub_0 -> DPR
21737 51, // DTriple_with_qsub_0_in_QPR:dsub_1 -> DPR
21738 51, // DTriple_with_qsub_0_in_QPR:dsub_2 -> DPR
21739 0, // DTriple_with_qsub_0_in_QPR:dsub_3
21740 0, // DTriple_with_qsub_0_in_QPR:dsub_4
21741 0, // DTriple_with_qsub_0_in_QPR:dsub_5
21742 0, // DTriple_with_qsub_0_in_QPR:dsub_6
21743 0, // DTriple_with_qsub_0_in_QPR:dsub_7
21744 0, // DTriple_with_qsub_0_in_QPR:gsub_0
21745 0, // DTriple_with_qsub_0_in_QPR:gsub_1
21746 0, // DTriple_with_qsub_0_in_QPR:qqsub_0
21747 0, // DTriple_with_qsub_0_in_QPR:qqsub_1
21748 69, // DTriple_with_qsub_0_in_QPR:qsub_0 -> QPR
21749 0, // DTriple_with_qsub_0_in_QPR:qsub_1
21750 0, // DTriple_with_qsub_0_in_QPR:qsub_2
21751 0, // DTriple_with_qsub_0_in_QPR:qsub_3
21752 3, // DTriple_with_qsub_0_in_QPR:ssub_0 -> SPR
21753 3, // DTriple_with_qsub_0_in_QPR:ssub_1 -> SPR
21754 3, // DTriple_with_qsub_0_in_QPR:ssub_2 -> SPR
21755 3, // DTriple_with_qsub_0_in_QPR:ssub_3 -> SPR
21756 3, // DTriple_with_qsub_0_in_QPR:ssub_4 -> SPR
21757 3, // DTriple_with_qsub_0_in_QPR:ssub_5 -> SPR
21758 0, // DTriple_with_qsub_0_in_QPR:ssub_6
21759 0, // DTriple_with_qsub_0_in_QPR:ssub_7
21760 0, // DTriple_with_qsub_0_in_QPR:ssub_8
21761 0, // DTriple_with_qsub_0_in_QPR:ssub_9
21762 0, // DTriple_with_qsub_0_in_QPR:ssub_10
21763 0, // DTriple_with_qsub_0_in_QPR:ssub_11
21764 0, // DTriple_with_qsub_0_in_QPR:ssub_12
21765 0, // DTriple_with_qsub_0_in_QPR:ssub_13
21766 0, // DTriple_with_qsub_0_in_QPR:ssub_14
21767 0, // DTriple_with_qsub_0_in_QPR:ssub_15
21768 62, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
21769 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21770 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7
21771 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21772 67, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
21773 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21774 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21775 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21776 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21777 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21778 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9
21779 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21780 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21781 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5
21782 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21783 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7
21784 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9
21785 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21786 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13
21787 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21788 0, // DTriple_with_qsub_0_in_QPR:dsub_5_dsub_7
21789 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7
21790 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13
21791 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21792 },
21793 { // DTriple_with_ssub_2
21794 52, // DTriple_with_ssub_2:dsub_0 -> DPR_VFP2
21795 52, // DTriple_with_ssub_2:dsub_1 -> DPR_VFP2
21796 51, // DTriple_with_ssub_2:dsub_2 -> DPR
21797 0, // DTriple_with_ssub_2:dsub_3
21798 0, // DTriple_with_ssub_2:dsub_4
21799 0, // DTriple_with_ssub_2:dsub_5
21800 0, // DTriple_with_ssub_2:dsub_6
21801 0, // DTriple_with_ssub_2:dsub_7
21802 0, // DTriple_with_ssub_2:gsub_0
21803 0, // DTriple_with_ssub_2:gsub_1
21804 0, // DTriple_with_ssub_2:qqsub_0
21805 0, // DTriple_with_ssub_2:qqsub_1
21806 70, // DTriple_with_ssub_2:qsub_0 -> DPair_with_ssub_2
21807 0, // DTriple_with_ssub_2:qsub_1
21808 0, // DTriple_with_ssub_2:qsub_2
21809 0, // DTriple_with_ssub_2:qsub_3
21810 3, // DTriple_with_ssub_2:ssub_0 -> SPR
21811 3, // DTriple_with_ssub_2:ssub_1 -> SPR
21812 3, // DTriple_with_ssub_2:ssub_2 -> SPR
21813 3, // DTriple_with_ssub_2:ssub_3 -> SPR
21814 3, // DTriple_with_ssub_2:ssub_4 -> SPR
21815 3, // DTriple_with_ssub_2:ssub_5 -> SPR
21816 0, // DTriple_with_ssub_2:ssub_6
21817 0, // DTriple_with_ssub_2:ssub_7
21818 0, // DTriple_with_ssub_2:ssub_8
21819 0, // DTriple_with_ssub_2:ssub_9
21820 0, // DTriple_with_ssub_2:ssub_10
21821 0, // DTriple_with_ssub_2:ssub_11
21822 0, // DTriple_with_ssub_2:ssub_12
21823 0, // DTriple_with_ssub_2:ssub_13
21824 0, // DTriple_with_ssub_2:ssub_14
21825 0, // DTriple_with_ssub_2:ssub_15
21826 63, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
21827 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21828 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7
21829 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21830 68, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0
21831 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21832 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21833 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21834 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21835 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21836 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9
21837 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21838 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21839 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5
21840 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21841 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7
21842 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9
21843 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21844 0, // DTriple_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13
21845 0, // DTriple_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21846 0, // DTriple_with_ssub_2:dsub_5_dsub_7
21847 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7
21848 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13
21849 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21850 },
21851 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
21852 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR
21853 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR
21854 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR
21855 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3
21856 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4
21857 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5
21858 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6
21859 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7
21860 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0
21861 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1
21862 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0
21863 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1
21864 67, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair
21865 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1
21866 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2
21867 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3
21868 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR
21869 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR
21870 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR
21871 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR
21872 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR
21873 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR
21874 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6
21875 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7
21876 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8
21877 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9
21878 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10
21879 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11
21880 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12
21881 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13
21882 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14
21883 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15
21884 62, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
21885 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21886 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7
21887 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21888 69, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR
21889 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21890 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21891 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21892 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21893 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21894 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9
21895 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21896 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21897 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5
21898 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21899 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7
21900 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9
21901 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21902 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13
21903 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21904 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7
21905 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7
21906 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13
21907 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21908 },
21909 { // DTripleSpc_with_ssub_4
21910 52, // DTripleSpc_with_ssub_4:dsub_0 -> DPR_VFP2
21911 0, // DTripleSpc_with_ssub_4:dsub_1
21912 52, // DTripleSpc_with_ssub_4:dsub_2 -> DPR_VFP2
21913 0, // DTripleSpc_with_ssub_4:dsub_3
21914 51, // DTripleSpc_with_ssub_4:dsub_4 -> DPR
21915 0, // DTripleSpc_with_ssub_4:dsub_5
21916 0, // DTripleSpc_with_ssub_4:dsub_6
21917 0, // DTripleSpc_with_ssub_4:dsub_7
21918 0, // DTripleSpc_with_ssub_4:gsub_0
21919 0, // DTripleSpc_with_ssub_4:gsub_1
21920 0, // DTripleSpc_with_ssub_4:qqsub_0
21921 0, // DTripleSpc_with_ssub_4:qqsub_1
21922 0, // DTripleSpc_with_ssub_4:qsub_0
21923 0, // DTripleSpc_with_ssub_4:qsub_1
21924 0, // DTripleSpc_with_ssub_4:qsub_2
21925 0, // DTripleSpc_with_ssub_4:qsub_3
21926 3, // DTripleSpc_with_ssub_4:ssub_0 -> SPR
21927 3, // DTripleSpc_with_ssub_4:ssub_1 -> SPR
21928 0, // DTripleSpc_with_ssub_4:ssub_2
21929 0, // DTripleSpc_with_ssub_4:ssub_3
21930 3, // DTripleSpc_with_ssub_4:ssub_4 -> SPR
21931 3, // DTripleSpc_with_ssub_4:ssub_5 -> SPR
21932 0, // DTripleSpc_with_ssub_4:ssub_6
21933 0, // DTripleSpc_with_ssub_4:ssub_7
21934 3, // DTripleSpc_with_ssub_4:ssub_8 -> SPR
21935 3, // DTripleSpc_with_ssub_4:ssub_9 -> SPR
21936 0, // DTripleSpc_with_ssub_4:ssub_10
21937 0, // DTripleSpc_with_ssub_4:ssub_11
21938 0, // DTripleSpc_with_ssub_4:ssub_12
21939 0, // DTripleSpc_with_ssub_4:ssub_13
21940 0, // DTripleSpc_with_ssub_4:ssub_14
21941 0, // DTripleSpc_with_ssub_4:ssub_15
21942 64, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
21943 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
21944 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7
21945 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
21946 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5
21947 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
21948 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21949 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
21950 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
21951 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21952 63, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0
21953 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
21954 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
21955 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5
21956 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
21957 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7
21958 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9
21959 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21960 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13
21961 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
21962 0, // DTripleSpc_with_ssub_4:dsub_5_dsub_7
21963 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7
21964 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13
21965 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
21966 },
21967 { // DTriple_with_ssub_4
21968 52, // DTriple_with_ssub_4:dsub_0 -> DPR_VFP2
21969 52, // DTriple_with_ssub_4:dsub_1 -> DPR_VFP2
21970 52, // DTriple_with_ssub_4:dsub_2 -> DPR_VFP2
21971 0, // DTriple_with_ssub_4:dsub_3
21972 0, // DTriple_with_ssub_4:dsub_4
21973 0, // DTriple_with_ssub_4:dsub_5
21974 0, // DTriple_with_ssub_4:dsub_6
21975 0, // DTriple_with_ssub_4:dsub_7
21976 0, // DTriple_with_ssub_4:gsub_0
21977 0, // DTriple_with_ssub_4:gsub_1
21978 0, // DTriple_with_ssub_4:qqsub_0
21979 0, // DTriple_with_ssub_4:qqsub_1
21980 70, // DTriple_with_ssub_4:qsub_0 -> DPair_with_ssub_2
21981 0, // DTriple_with_ssub_4:qsub_1
21982 0, // DTriple_with_ssub_4:qsub_2
21983 0, // DTriple_with_ssub_4:qsub_3
21984 3, // DTriple_with_ssub_4:ssub_0 -> SPR
21985 3, // DTriple_with_ssub_4:ssub_1 -> SPR
21986 3, // DTriple_with_ssub_4:ssub_2 -> SPR
21987 3, // DTriple_with_ssub_4:ssub_3 -> SPR
21988 3, // DTriple_with_ssub_4:ssub_4 -> SPR
21989 3, // DTriple_with_ssub_4:ssub_5 -> SPR
21990 0, // DTriple_with_ssub_4:ssub_6
21991 0, // DTriple_with_ssub_4:ssub_7
21992 0, // DTriple_with_ssub_4:ssub_8
21993 0, // DTriple_with_ssub_4:ssub_9
21994 0, // DTriple_with_ssub_4:ssub_10
21995 0, // DTriple_with_ssub_4:ssub_11
21996 0, // DTriple_with_ssub_4:ssub_12
21997 0, // DTriple_with_ssub_4:ssub_13
21998 0, // DTriple_with_ssub_4:ssub_14
21999 0, // DTriple_with_ssub_4:ssub_15
22000 64, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
22001 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22002 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7
22003 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22004 70, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
22005 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22006 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22007 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22008 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22009 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22010 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9
22011 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22012 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22013 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5
22014 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22015 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7
22016 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9
22017 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22018 0, // DTriple_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13
22019 0, // DTriple_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22020 0, // DTriple_with_ssub_4:dsub_5_dsub_7
22021 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7
22022 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13
22023 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22024 },
22025 { // DTripleSpc_with_ssub_8
22026 52, // DTripleSpc_with_ssub_8:dsub_0 -> DPR_VFP2
22027 0, // DTripleSpc_with_ssub_8:dsub_1
22028 52, // DTripleSpc_with_ssub_8:dsub_2 -> DPR_VFP2
22029 0, // DTripleSpc_with_ssub_8:dsub_3
22030 52, // DTripleSpc_with_ssub_8:dsub_4 -> DPR_VFP2
22031 0, // DTripleSpc_with_ssub_8:dsub_5
22032 0, // DTripleSpc_with_ssub_8:dsub_6
22033 0, // DTripleSpc_with_ssub_8:dsub_7
22034 0, // DTripleSpc_with_ssub_8:gsub_0
22035 0, // DTripleSpc_with_ssub_8:gsub_1
22036 0, // DTripleSpc_with_ssub_8:qqsub_0
22037 0, // DTripleSpc_with_ssub_8:qqsub_1
22038 0, // DTripleSpc_with_ssub_8:qsub_0
22039 0, // DTripleSpc_with_ssub_8:qsub_1
22040 0, // DTripleSpc_with_ssub_8:qsub_2
22041 0, // DTripleSpc_with_ssub_8:qsub_3
22042 3, // DTripleSpc_with_ssub_8:ssub_0 -> SPR
22043 3, // DTripleSpc_with_ssub_8:ssub_1 -> SPR
22044 0, // DTripleSpc_with_ssub_8:ssub_2
22045 0, // DTripleSpc_with_ssub_8:ssub_3
22046 3, // DTripleSpc_with_ssub_8:ssub_4 -> SPR
22047 3, // DTripleSpc_with_ssub_8:ssub_5 -> SPR
22048 0, // DTripleSpc_with_ssub_8:ssub_6
22049 0, // DTripleSpc_with_ssub_8:ssub_7
22050 3, // DTripleSpc_with_ssub_8:ssub_8 -> SPR
22051 3, // DTripleSpc_with_ssub_8:ssub_9 -> SPR
22052 0, // DTripleSpc_with_ssub_8:ssub_10
22053 0, // DTripleSpc_with_ssub_8:ssub_11
22054 0, // DTripleSpc_with_ssub_8:ssub_12
22055 0, // DTripleSpc_with_ssub_8:ssub_13
22056 0, // DTripleSpc_with_ssub_8:ssub_14
22057 0, // DTripleSpc_with_ssub_8:ssub_15
22058 64, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
22059 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22060 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7
22061 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22062 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5
22063 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22064 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22065 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22066 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22067 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22068 64, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
22069 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22070 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22071 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5
22072 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22073 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7
22074 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9
22075 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22076 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13
22077 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22078 0, // DTripleSpc_with_ssub_8:dsub_5_dsub_7
22079 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7
22080 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13
22081 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22082 },
22083 { // DTripleSpc_with_dsub_0_in_DPR_8
22084 20, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
22085 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_1
22086 52, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
22087 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_3
22088 52, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2
22089 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5
22090 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_6
22091 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_7
22092 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_0
22093 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_1
22094 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_0
22095 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_1
22096 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_0
22097 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_1
22098 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_2
22099 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_3
22100 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
22101 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
22102 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2
22103 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_3
22104 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR
22105 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR
22106 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6
22107 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_7
22108 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR
22109 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR
22110 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_10
22111 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_11
22112 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_12
22113 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_13
22114 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_14
22115 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_15
22116 65, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
22117 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22118 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22119 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22120 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
22121 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22122 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22123 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22124 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22125 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22126 64, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
22127 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22128 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22129 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
22130 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22131 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22132 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22133 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22134 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22135 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22136 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7
22137 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22138 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
22139 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22140 },
22141 { // DTriple_with_dsub_0_in_DPR_8
22142 20, // DTriple_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
22143 52, // DTriple_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2
22144 52, // DTriple_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
22145 0, // DTriple_with_dsub_0_in_DPR_8:dsub_3
22146 0, // DTriple_with_dsub_0_in_DPR_8:dsub_4
22147 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5
22148 0, // DTriple_with_dsub_0_in_DPR_8:dsub_6
22149 0, // DTriple_with_dsub_0_in_DPR_8:dsub_7
22150 0, // DTriple_with_dsub_0_in_DPR_8:gsub_0
22151 0, // DTriple_with_dsub_0_in_DPR_8:gsub_1
22152 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_0
22153 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_1
22154 71, // DTriple_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8
22155 0, // DTriple_with_dsub_0_in_DPR_8:qsub_1
22156 0, // DTriple_with_dsub_0_in_DPR_8:qsub_2
22157 0, // DTriple_with_dsub_0_in_DPR_8:qsub_3
22158 8, // DTriple_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
22159 8, // DTriple_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
22160 3, // DTriple_with_dsub_0_in_DPR_8:ssub_2 -> SPR
22161 3, // DTriple_with_dsub_0_in_DPR_8:ssub_3 -> SPR
22162 3, // DTriple_with_dsub_0_in_DPR_8:ssub_4 -> SPR
22163 3, // DTriple_with_dsub_0_in_DPR_8:ssub_5 -> SPR
22164 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6
22165 0, // DTriple_with_dsub_0_in_DPR_8:ssub_7
22166 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8
22167 0, // DTriple_with_dsub_0_in_DPR_8:ssub_9
22168 0, // DTriple_with_dsub_0_in_DPR_8:ssub_10
22169 0, // DTriple_with_dsub_0_in_DPR_8:ssub_11
22170 0, // DTriple_with_dsub_0_in_DPR_8:ssub_12
22171 0, // DTriple_with_dsub_0_in_DPR_8:ssub_13
22172 0, // DTriple_with_dsub_0_in_DPR_8:ssub_14
22173 0, // DTriple_with_dsub_0_in_DPR_8:ssub_15
22174 65, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
22175 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22176 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22177 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22178 70, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
22179 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22180 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22181 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22182 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22183 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22184 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
22185 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22186 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22187 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
22188 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22189 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22190 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22191 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22192 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22193 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22194 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_dsub_7
22195 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22196 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
22197 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22198 },
22199 { // DTriple_with_qsub_0_in_MQPR
22200 52, // DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2
22201 52, // DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2
22202 51, // DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR
22203 0, // DTriple_with_qsub_0_in_MQPR:dsub_3
22204 0, // DTriple_with_qsub_0_in_MQPR:dsub_4
22205 0, // DTriple_with_qsub_0_in_MQPR:dsub_5
22206 0, // DTriple_with_qsub_0_in_MQPR:dsub_6
22207 0, // DTriple_with_qsub_0_in_MQPR:dsub_7
22208 0, // DTriple_with_qsub_0_in_MQPR:gsub_0
22209 0, // DTriple_with_qsub_0_in_MQPR:gsub_1
22210 0, // DTriple_with_qsub_0_in_MQPR:qqsub_0
22211 0, // DTriple_with_qsub_0_in_MQPR:qqsub_1
22212 72, // DTriple_with_qsub_0_in_MQPR:qsub_0 -> MQPR
22213 0, // DTriple_with_qsub_0_in_MQPR:qsub_1
22214 0, // DTriple_with_qsub_0_in_MQPR:qsub_2
22215 0, // DTriple_with_qsub_0_in_MQPR:qsub_3
22216 3, // DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR
22217 3, // DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR
22218 3, // DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR
22219 3, // DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR
22220 3, // DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR
22221 3, // DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR
22222 0, // DTriple_with_qsub_0_in_MQPR:ssub_6
22223 0, // DTriple_with_qsub_0_in_MQPR:ssub_7
22224 0, // DTriple_with_qsub_0_in_MQPR:ssub_8
22225 0, // DTriple_with_qsub_0_in_MQPR:ssub_9
22226 0, // DTriple_with_qsub_0_in_MQPR:ssub_10
22227 0, // DTriple_with_qsub_0_in_MQPR:ssub_11
22228 0, // DTriple_with_qsub_0_in_MQPR:ssub_12
22229 0, // DTriple_with_qsub_0_in_MQPR:ssub_13
22230 0, // DTriple_with_qsub_0_in_MQPR:ssub_14
22231 0, // DTriple_with_qsub_0_in_MQPR:ssub_15
22232 63, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
22233 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22234 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7
22235 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22236 68, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0
22237 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22238 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22239 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22240 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22241 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22242 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
22243 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22244 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22245 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5
22246 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22247 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
22248 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
22249 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22250 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
22251 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22252 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7
22253 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
22254 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13
22255 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22256 },
22257 { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
22258 52, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2
22259 51, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR
22260 51, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR
22261 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3
22262 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4
22263 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5
22264 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6
22265 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7
22266 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0
22267 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1
22268 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0
22269 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1
22270 68, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0
22271 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1
22272 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2
22273 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3
22274 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR
22275 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR
22276 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR
22277 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR
22278 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR
22279 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR
22280 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6
22281 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7
22282 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8
22283 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9
22284 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10
22285 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11
22286 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12
22287 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13
22288 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14
22289 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15
22290 63, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
22291 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22292 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7
22293 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22294 69, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR
22295 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22296 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22297 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22298 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22299 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22300 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9
22301 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22302 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22303 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5
22304 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22305 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7
22306 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9
22307 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22308 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13
22309 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22310 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7
22311 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7
22312 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13
22313 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22314 },
22315 { // DTriple_with_dsub_1_in_DPR_8
22316 53, // DTriple_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8
22317 53, // DTriple_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8
22318 52, // DTriple_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2
22319 0, // DTriple_with_dsub_1_in_DPR_8:dsub_3
22320 0, // DTriple_with_dsub_1_in_DPR_8:dsub_4
22321 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5
22322 0, // DTriple_with_dsub_1_in_DPR_8:dsub_6
22323 0, // DTriple_with_dsub_1_in_DPR_8:dsub_7
22324 0, // DTriple_with_dsub_1_in_DPR_8:gsub_0
22325 0, // DTriple_with_dsub_1_in_DPR_8:gsub_1
22326 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_0
22327 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_1
22328 74, // DTriple_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
22329 0, // DTriple_with_dsub_1_in_DPR_8:qsub_1
22330 0, // DTriple_with_dsub_1_in_DPR_8:qsub_2
22331 0, // DTriple_with_dsub_1_in_DPR_8:qsub_3
22332 8, // DTriple_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8
22333 8, // DTriple_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8
22334 8, // DTriple_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8
22335 8, // DTriple_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8
22336 3, // DTriple_with_dsub_1_in_DPR_8:ssub_4 -> SPR
22337 3, // DTriple_with_dsub_1_in_DPR_8:ssub_5 -> SPR
22338 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6
22339 0, // DTriple_with_dsub_1_in_DPR_8:ssub_7
22340 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8
22341 0, // DTriple_with_dsub_1_in_DPR_8:ssub_9
22342 0, // DTriple_with_dsub_1_in_DPR_8:ssub_10
22343 0, // DTriple_with_dsub_1_in_DPR_8:ssub_11
22344 0, // DTriple_with_dsub_1_in_DPR_8:ssub_12
22345 0, // DTriple_with_dsub_1_in_DPR_8:ssub_13
22346 0, // DTriple_with_dsub_1_in_DPR_8:ssub_14
22347 0, // DTriple_with_dsub_1_in_DPR_8:ssub_15
22348 65, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
22349 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22350 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22351 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22352 71, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8
22353 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22354 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22355 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22356 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22357 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22358 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
22359 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22360 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22361 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5
22362 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22363 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22364 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22365 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22366 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22367 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22368 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_dsub_7
22369 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22370 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13
22371 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22372 },
22373 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
22374 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2
22375 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2
22376 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2
22377 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3
22378 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
22379 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
22380 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
22381 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
22382 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
22383 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
22384 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
22385 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
22386 70, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2
22387 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1
22388 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
22389 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
22390 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR
22391 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR
22392 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR
22393 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR
22394 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR
22395 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR
22396 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6
22397 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7
22398 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
22399 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
22400 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
22401 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
22402 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
22403 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
22404 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
22405 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
22406 64, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
22407 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22408 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7
22409 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22410 73, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2
22411 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22412 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22413 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22414 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22415 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22416 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
22417 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22418 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22419 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
22420 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22421 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
22422 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
22423 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22424 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
22425 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22426 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
22427 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
22428 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
22429 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22430 },
22431 { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
22432 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2
22433 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2
22434 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR_VFP2
22435 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_3
22436 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_4
22437 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5
22438 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_6
22439 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_7
22440 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_0
22441 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_1
22442 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_0
22443 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_1
22444 73, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_0 -> QPR_VFP2
22445 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_1
22446 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_2
22447 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_3
22448 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR
22449 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR
22450 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR
22451 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR
22452 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR
22453 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR
22454 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6
22455 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_7
22456 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8
22457 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_9
22458 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_10
22459 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_11
22460 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_12
22461 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_13
22462 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_14
22463 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_15
22464 64, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
22465 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22466 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7
22467 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22468 70, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
22469 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22470 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22471 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22472 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22473 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22474 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
22475 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22476 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22477 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5
22478 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22479 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
22480 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
22481 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22482 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
22483 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22484 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7
22485 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
22486 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13
22487 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22488 },
22489 { // DTripleSpc_with_dsub_2_in_DPR_8
22490 53, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
22491 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_1
22492 53, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
22493 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_3
22494 52, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2
22495 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5
22496 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_6
22497 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_7
22498 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_0
22499 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_1
22500 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_0
22501 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_1
22502 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_0
22503 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_1
22504 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_2
22505 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_3
22506 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
22507 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
22508 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2
22509 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_3
22510 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
22511 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
22512 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6
22513 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_7
22514 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR
22515 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR
22516 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_10
22517 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_11
22518 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_12
22519 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_13
22520 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_14
22521 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_15
22522 66, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
22523 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22524 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22525 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22526 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
22527 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22528 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22529 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22530 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22531 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22532 65, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8
22533 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22534 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22535 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5
22536 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22537 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22538 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22539 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22540 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22541 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22542 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7
22543 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22544 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13
22545 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22546 },
22547 { // DTriple_with_dsub_2_in_DPR_8
22548 53, // DTriple_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
22549 53, // DTriple_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8
22550 53, // DTriple_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
22551 0, // DTriple_with_dsub_2_in_DPR_8:dsub_3
22552 0, // DTriple_with_dsub_2_in_DPR_8:dsub_4
22553 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5
22554 0, // DTriple_with_dsub_2_in_DPR_8:dsub_6
22555 0, // DTriple_with_dsub_2_in_DPR_8:dsub_7
22556 0, // DTriple_with_dsub_2_in_DPR_8:gsub_0
22557 0, // DTriple_with_dsub_2_in_DPR_8:gsub_1
22558 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_0
22559 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_1
22560 74, // DTriple_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
22561 0, // DTriple_with_dsub_2_in_DPR_8:qsub_1
22562 0, // DTriple_with_dsub_2_in_DPR_8:qsub_2
22563 0, // DTriple_with_dsub_2_in_DPR_8:qsub_3
22564 8, // DTriple_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
22565 8, // DTriple_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
22566 8, // DTriple_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8
22567 8, // DTriple_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8
22568 8, // DTriple_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
22569 8, // DTriple_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
22570 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6
22571 0, // DTriple_with_dsub_2_in_DPR_8:ssub_7
22572 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8
22573 0, // DTriple_with_dsub_2_in_DPR_8:ssub_9
22574 0, // DTriple_with_dsub_2_in_DPR_8:ssub_10
22575 0, // DTriple_with_dsub_2_in_DPR_8:ssub_11
22576 0, // DTriple_with_dsub_2_in_DPR_8:ssub_12
22577 0, // DTriple_with_dsub_2_in_DPR_8:ssub_13
22578 0, // DTriple_with_dsub_2_in_DPR_8:ssub_14
22579 0, // DTriple_with_dsub_2_in_DPR_8:ssub_15
22580 66, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
22581 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22582 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22583 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22584 74, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
22585 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22586 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22587 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22588 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22589 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22590 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
22591 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22592 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22593 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5
22594 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22595 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22596 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22597 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22598 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22599 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22600 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_dsub_7
22601 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22602 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13
22603 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22604 },
22605 { // DTripleSpc_with_dsub_4_in_DPR_8
22606 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8
22607 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_1
22608 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8
22609 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_3
22610 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8
22611 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5
22612 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_6
22613 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_7
22614 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_0
22615 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_1
22616 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_0
22617 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_1
22618 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_0
22619 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_1
22620 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_2
22621 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_3
22622 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8
22623 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8
22624 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2
22625 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_3
22626 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8
22627 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8
22628 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6
22629 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_7
22630 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8
22631 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8
22632 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_10
22633 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_11
22634 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_12
22635 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_13
22636 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_14
22637 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_15
22638 66, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
22639 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22640 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22641 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22642 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
22643 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22644 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22645 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22646 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22647 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22648 66, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8
22649 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22650 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22651 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5
22652 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22653 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22654 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22655 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22656 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22657 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22658 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7
22659 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22660 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13
22661 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22662 },
22663 { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
22664 53, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8
22665 52, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2
22666 52, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2
22667 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3
22668 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
22669 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
22670 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
22671 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
22672 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
22673 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
22674 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
22675 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
22676 71, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8
22677 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1
22678 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
22679 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
22680 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8
22681 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8
22682 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR
22683 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR
22684 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR
22685 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR
22686 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6
22687 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7
22688 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
22689 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
22690 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
22691 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
22692 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
22693 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
22694 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
22695 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
22696 65, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
22697 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22698 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7
22699 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22700 73, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2
22701 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22702 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22703 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22704 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22705 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22706 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
22707 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22708 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22709 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
22710 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22711 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
22712 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
22713 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22714 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
22715 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22716 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
22717 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
22718 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
22719 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22720 },
22721 { // DTriple_with_qsub_0_in_QPR_8
22722 53, // DTriple_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8
22723 53, // DTriple_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8
22724 52, // DTriple_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2
22725 0, // DTriple_with_qsub_0_in_QPR_8:dsub_3
22726 0, // DTriple_with_qsub_0_in_QPR_8:dsub_4
22727 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5
22728 0, // DTriple_with_qsub_0_in_QPR_8:dsub_6
22729 0, // DTriple_with_qsub_0_in_QPR_8:dsub_7
22730 0, // DTriple_with_qsub_0_in_QPR_8:gsub_0
22731 0, // DTriple_with_qsub_0_in_QPR_8:gsub_1
22732 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_0
22733 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_1
22734 75, // DTriple_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8
22735 0, // DTriple_with_qsub_0_in_QPR_8:qsub_1
22736 0, // DTriple_with_qsub_0_in_QPR_8:qsub_2
22737 0, // DTriple_with_qsub_0_in_QPR_8:qsub_3
22738 8, // DTriple_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8
22739 8, // DTriple_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8
22740 8, // DTriple_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8
22741 8, // DTriple_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8
22742 3, // DTriple_with_qsub_0_in_QPR_8:ssub_4 -> SPR
22743 3, // DTriple_with_qsub_0_in_QPR_8:ssub_5 -> SPR
22744 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6
22745 0, // DTriple_with_qsub_0_in_QPR_8:ssub_7
22746 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8
22747 0, // DTriple_with_qsub_0_in_QPR_8:ssub_9
22748 0, // DTriple_with_qsub_0_in_QPR_8:ssub_10
22749 0, // DTriple_with_qsub_0_in_QPR_8:ssub_11
22750 0, // DTriple_with_qsub_0_in_QPR_8:ssub_12
22751 0, // DTriple_with_qsub_0_in_QPR_8:ssub_13
22752 0, // DTriple_with_qsub_0_in_QPR_8:ssub_14
22753 0, // DTriple_with_qsub_0_in_QPR_8:ssub_15
22754 65, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
22755 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22756 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22757 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22758 71, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8
22759 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22760 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22761 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22762 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22763 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22764 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
22765 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22766 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22767 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5
22768 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22769 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22770 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22771 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22772 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22773 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22774 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_dsub_7
22775 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22776 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13
22777 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22778 },
22779 { // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
22780 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_8
22781 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_8
22782 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR_8
22783 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_3
22784 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_4
22785 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5
22786 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_6
22787 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_7
22788 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:gsub_0
22789 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:gsub_1
22790 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qqsub_0
22791 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qqsub_1
22792 75, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_0 -> QPR_8
22793 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_1
22794 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_2
22795 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_3
22796 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR_8
22797 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR_8
22798 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR_8
22799 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR_8
22800 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR_8
22801 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR_8
22802 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6
22803 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_7
22804 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8
22805 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_9
22806 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_10
22807 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_11
22808 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_12
22809 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_13
22810 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_14
22811 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_15
22812 66, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
22813 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22814 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7
22815 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22816 74, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
22817 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22818 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22819 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22820 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22821 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22822 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
22823 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22824 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22825 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5
22826 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22827 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
22828 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
22829 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22830 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
22831 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22832 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7
22833 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
22834 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13
22835 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22836 },
22837 { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
22838 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8
22839 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8
22840 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8
22841 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3
22842 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4
22843 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5
22844 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6
22845 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7
22846 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0
22847 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1
22848 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0
22849 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1
22850 74, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
22851 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1
22852 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2
22853 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3
22854 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8
22855 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8
22856 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8
22857 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8
22858 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8
22859 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8
22860 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6
22861 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7
22862 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8
22863 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9
22864 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10
22865 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11
22866 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12
22867 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13
22868 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14
22869 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15
22870 66, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
22871 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22872 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7
22873 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22874 75, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8
22875 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22876 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22877 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22878 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22879 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22880 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
22881 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22882 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22883 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5
22884 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22885 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
22886 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
22887 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22888 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
22889 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22890 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7
22891 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
22892 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13
22893 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22894 },
22895 { // DQuadSpc
22896 51, // DQuadSpc:dsub_0 -> DPR
22897 0, // DQuadSpc:dsub_1
22898 51, // DQuadSpc:dsub_2 -> DPR
22899 0, // DQuadSpc:dsub_3
22900 51, // DQuadSpc:dsub_4 -> DPR
22901 0, // DQuadSpc:dsub_5
22902 0, // DQuadSpc:dsub_6
22903 0, // DQuadSpc:dsub_7
22904 0, // DQuadSpc:gsub_0
22905 0, // DQuadSpc:gsub_1
22906 0, // DQuadSpc:qqsub_0
22907 0, // DQuadSpc:qqsub_1
22908 0, // DQuadSpc:qsub_0
22909 0, // DQuadSpc:qsub_1
22910 0, // DQuadSpc:qsub_2
22911 0, // DQuadSpc:qsub_3
22912 3, // DQuadSpc:ssub_0 -> SPR
22913 3, // DQuadSpc:ssub_1 -> SPR
22914 0, // DQuadSpc:ssub_2
22915 0, // DQuadSpc:ssub_3
22916 3, // DQuadSpc:ssub_4 -> SPR
22917 3, // DQuadSpc:ssub_5 -> SPR
22918 0, // DQuadSpc:ssub_6
22919 0, // DQuadSpc:ssub_7
22920 3, // DQuadSpc:ssub_8 -> SPR
22921 3, // DQuadSpc:ssub_9 -> SPR
22922 0, // DQuadSpc:ssub_10
22923 0, // DQuadSpc:ssub_11
22924 0, // DQuadSpc:ssub_12
22925 0, // DQuadSpc:ssub_13
22926 0, // DQuadSpc:ssub_14
22927 0, // DQuadSpc:ssub_15
22928 62, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
22929 0, // DQuadSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22930 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7
22931 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22932 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5
22933 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22934 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22935 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22936 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22937 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22938 62, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
22939 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22940 0, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22941 0, // DQuadSpc:ssub_6_ssub_7_dsub_5
22942 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
22943 0, // DQuadSpc:ssub_6_ssub_7_dsub_5_dsub_7
22944 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9
22945 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22946 0, // DQuadSpc:ssub_8_ssub_9_ssub_12_ssub_13
22947 0, // DQuadSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
22948 0, // DQuadSpc:dsub_5_dsub_7
22949 0, // DQuadSpc:dsub_5_ssub_12_ssub_13_dsub_7
22950 0, // DQuadSpc:dsub_5_ssub_12_ssub_13
22951 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
22952 },
22953 { // DQuadSpc_with_ssub_0
22954 4, // DQuadSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
22955 0, // DQuadSpc_with_ssub_0:dsub_1
22956 51, // DQuadSpc_with_ssub_0:dsub_2 -> DPR
22957 0, // DQuadSpc_with_ssub_0:dsub_3
22958 51, // DQuadSpc_with_ssub_0:dsub_4 -> DPR
22959 0, // DQuadSpc_with_ssub_0:dsub_5
22960 0, // DQuadSpc_with_ssub_0:dsub_6
22961 0, // DQuadSpc_with_ssub_0:dsub_7
22962 0, // DQuadSpc_with_ssub_0:gsub_0
22963 0, // DQuadSpc_with_ssub_0:gsub_1
22964 0, // DQuadSpc_with_ssub_0:qqsub_0
22965 0, // DQuadSpc_with_ssub_0:qqsub_1
22966 0, // DQuadSpc_with_ssub_0:qsub_0
22967 0, // DQuadSpc_with_ssub_0:qsub_1
22968 0, // DQuadSpc_with_ssub_0:qsub_2
22969 0, // DQuadSpc_with_ssub_0:qsub_3
22970 3, // DQuadSpc_with_ssub_0:ssub_0 -> SPR
22971 3, // DQuadSpc_with_ssub_0:ssub_1 -> SPR
22972 0, // DQuadSpc_with_ssub_0:ssub_2
22973 0, // DQuadSpc_with_ssub_0:ssub_3
22974 3, // DQuadSpc_with_ssub_0:ssub_4 -> SPR
22975 3, // DQuadSpc_with_ssub_0:ssub_5 -> SPR
22976 0, // DQuadSpc_with_ssub_0:ssub_6
22977 0, // DQuadSpc_with_ssub_0:ssub_7
22978 3, // DQuadSpc_with_ssub_0:ssub_8 -> SPR
22979 3, // DQuadSpc_with_ssub_0:ssub_9 -> SPR
22980 0, // DQuadSpc_with_ssub_0:ssub_10
22981 0, // DQuadSpc_with_ssub_0:ssub_11
22982 0, // DQuadSpc_with_ssub_0:ssub_12
22983 0, // DQuadSpc_with_ssub_0:ssub_13
22984 0, // DQuadSpc_with_ssub_0:ssub_14
22985 0, // DQuadSpc_with_ssub_0:ssub_15
22986 63, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
22987 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
22988 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7
22989 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
22990 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5
22991 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
22992 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22993 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
22994 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
22995 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22996 62, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
22997 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
22998 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
22999 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5
23000 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23001 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
23002 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
23003 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23004 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
23005 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23006 0, // DQuadSpc_with_ssub_0:dsub_5_dsub_7
23007 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
23008 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13
23009 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23010 },
23011 { // DQuadSpc_with_ssub_4
23012 52, // DQuadSpc_with_ssub_4:dsub_0 -> DPR_VFP2
23013 0, // DQuadSpc_with_ssub_4:dsub_1
23014 52, // DQuadSpc_with_ssub_4:dsub_2 -> DPR_VFP2
23015 0, // DQuadSpc_with_ssub_4:dsub_3
23016 51, // DQuadSpc_with_ssub_4:dsub_4 -> DPR
23017 0, // DQuadSpc_with_ssub_4:dsub_5
23018 0, // DQuadSpc_with_ssub_4:dsub_6
23019 0, // DQuadSpc_with_ssub_4:dsub_7
23020 0, // DQuadSpc_with_ssub_4:gsub_0
23021 0, // DQuadSpc_with_ssub_4:gsub_1
23022 0, // DQuadSpc_with_ssub_4:qqsub_0
23023 0, // DQuadSpc_with_ssub_4:qqsub_1
23024 0, // DQuadSpc_with_ssub_4:qsub_0
23025 0, // DQuadSpc_with_ssub_4:qsub_1
23026 0, // DQuadSpc_with_ssub_4:qsub_2
23027 0, // DQuadSpc_with_ssub_4:qsub_3
23028 3, // DQuadSpc_with_ssub_4:ssub_0 -> SPR
23029 3, // DQuadSpc_with_ssub_4:ssub_1 -> SPR
23030 0, // DQuadSpc_with_ssub_4:ssub_2
23031 0, // DQuadSpc_with_ssub_4:ssub_3
23032 3, // DQuadSpc_with_ssub_4:ssub_4 -> SPR
23033 3, // DQuadSpc_with_ssub_4:ssub_5 -> SPR
23034 0, // DQuadSpc_with_ssub_4:ssub_6
23035 0, // DQuadSpc_with_ssub_4:ssub_7
23036 3, // DQuadSpc_with_ssub_4:ssub_8 -> SPR
23037 3, // DQuadSpc_with_ssub_4:ssub_9 -> SPR
23038 0, // DQuadSpc_with_ssub_4:ssub_10
23039 0, // DQuadSpc_with_ssub_4:ssub_11
23040 0, // DQuadSpc_with_ssub_4:ssub_12
23041 0, // DQuadSpc_with_ssub_4:ssub_13
23042 0, // DQuadSpc_with_ssub_4:ssub_14
23043 0, // DQuadSpc_with_ssub_4:ssub_15
23044 64, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
23045 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
23046 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7
23047 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
23048 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5
23049 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23050 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23051 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23052 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23053 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23054 63, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0
23055 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23056 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23057 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5
23058 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23059 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7
23060 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9
23061 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23062 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13
23063 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23064 0, // DQuadSpc_with_ssub_4:dsub_5_dsub_7
23065 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7
23066 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13
23067 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23068 },
23069 { // DQuadSpc_with_ssub_8
23070 52, // DQuadSpc_with_ssub_8:dsub_0 -> DPR_VFP2
23071 0, // DQuadSpc_with_ssub_8:dsub_1
23072 52, // DQuadSpc_with_ssub_8:dsub_2 -> DPR_VFP2
23073 0, // DQuadSpc_with_ssub_8:dsub_3
23074 52, // DQuadSpc_with_ssub_8:dsub_4 -> DPR_VFP2
23075 0, // DQuadSpc_with_ssub_8:dsub_5
23076 0, // DQuadSpc_with_ssub_8:dsub_6
23077 0, // DQuadSpc_with_ssub_8:dsub_7
23078 0, // DQuadSpc_with_ssub_8:gsub_0
23079 0, // DQuadSpc_with_ssub_8:gsub_1
23080 0, // DQuadSpc_with_ssub_8:qqsub_0
23081 0, // DQuadSpc_with_ssub_8:qqsub_1
23082 0, // DQuadSpc_with_ssub_8:qsub_0
23083 0, // DQuadSpc_with_ssub_8:qsub_1
23084 0, // DQuadSpc_with_ssub_8:qsub_2
23085 0, // DQuadSpc_with_ssub_8:qsub_3
23086 3, // DQuadSpc_with_ssub_8:ssub_0 -> SPR
23087 3, // DQuadSpc_with_ssub_8:ssub_1 -> SPR
23088 0, // DQuadSpc_with_ssub_8:ssub_2
23089 0, // DQuadSpc_with_ssub_8:ssub_3
23090 3, // DQuadSpc_with_ssub_8:ssub_4 -> SPR
23091 3, // DQuadSpc_with_ssub_8:ssub_5 -> SPR
23092 0, // DQuadSpc_with_ssub_8:ssub_6
23093 0, // DQuadSpc_with_ssub_8:ssub_7
23094 3, // DQuadSpc_with_ssub_8:ssub_8 -> SPR
23095 3, // DQuadSpc_with_ssub_8:ssub_9 -> SPR
23096 0, // DQuadSpc_with_ssub_8:ssub_10
23097 0, // DQuadSpc_with_ssub_8:ssub_11
23098 0, // DQuadSpc_with_ssub_8:ssub_12
23099 0, // DQuadSpc_with_ssub_8:ssub_13
23100 0, // DQuadSpc_with_ssub_8:ssub_14
23101 0, // DQuadSpc_with_ssub_8:ssub_15
23102 64, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
23103 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
23104 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7
23105 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
23106 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5
23107 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23108 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23109 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23110 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23111 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23112 64, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
23113 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23114 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23115 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5
23116 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23117 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7
23118 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9
23119 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23120 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13
23121 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23122 0, // DQuadSpc_with_ssub_8:dsub_5_dsub_7
23123 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7
23124 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13
23125 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23126 },
23127 { // DQuadSpc_with_dsub_0_in_DPR_8
23128 20, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
23129 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_1
23130 52, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
23131 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_3
23132 52, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2
23133 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5
23134 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_6
23135 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_7
23136 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_0
23137 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_1
23138 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_0
23139 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_1
23140 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_0
23141 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_1
23142 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_2
23143 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_3
23144 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
23145 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
23146 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2
23147 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_3
23148 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR
23149 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR
23150 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6
23151 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_7
23152 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR
23153 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR
23154 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_10
23155 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_11
23156 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_12
23157 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_13
23158 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_14
23159 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_15
23160 65, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
23161 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
23162 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
23163 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
23164 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
23165 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23166 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23167 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23168 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23169 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23170 64, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
23171 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23172 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23173 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
23174 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23175 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
23176 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
23177 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23178 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
23179 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23180 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7
23181 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
23182 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
23183 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23184 },
23185 { // DQuadSpc_with_dsub_2_in_DPR_8
23186 53, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
23187 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_1
23188 53, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
23189 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_3
23190 52, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2
23191 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5
23192 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_6
23193 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_7
23194 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_0
23195 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_1
23196 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_0
23197 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_1
23198 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_0
23199 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_1
23200 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_2
23201 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_3
23202 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
23203 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
23204 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2
23205 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_3
23206 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
23207 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
23208 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6
23209 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_7
23210 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR
23211 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR
23212 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_10
23213 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_11
23214 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_12
23215 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_13
23216 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_14
23217 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_15
23218 66, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
23219 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
23220 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
23221 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
23222 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
23223 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23224 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23225 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23226 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23227 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23228 65, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8
23229 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23230 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23231 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5
23232 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23233 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
23234 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
23235 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23236 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
23237 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23238 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7
23239 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
23240 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13
23241 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23242 },
23243 { // DQuadSpc_with_dsub_4_in_DPR_8
23244 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8
23245 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_1
23246 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8
23247 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_3
23248 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8
23249 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5
23250 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_6
23251 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_7
23252 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_0
23253 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_1
23254 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_0
23255 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_1
23256 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_0
23257 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_1
23258 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_2
23259 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_3
23260 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8
23261 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8
23262 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2
23263 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_3
23264 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8
23265 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8
23266 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6
23267 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_7
23268 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8
23269 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8
23270 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_10
23271 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_11
23272 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_12
23273 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_13
23274 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_14
23275 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_15
23276 66, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
23277 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5
23278 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7
23279 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7
23280 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5
23281 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23282 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23283 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23284 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23285 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23286 66, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8
23287 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23288 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23289 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5
23290 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23291 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
23292 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
23293 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23294 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
23295 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23296 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7
23297 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
23298 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13
23299 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23300 },
23301 { // DQuad
23302 51, // DQuad:dsub_0 -> DPR
23303 51, // DQuad:dsub_1 -> DPR
23304 51, // DQuad:dsub_2 -> DPR
23305 51, // DQuad:dsub_3 -> DPR
23306 0, // DQuad:dsub_4
23307 0, // DQuad:dsub_5
23308 0, // DQuad:dsub_6
23309 0, // DQuad:dsub_7
23310 0, // DQuad:gsub_0
23311 0, // DQuad:gsub_1
23312 0, // DQuad:qqsub_0
23313 0, // DQuad:qqsub_1
23314 67, // DQuad:qsub_0 -> DPair
23315 67, // DQuad:qsub_1 -> DPair
23316 0, // DQuad:qsub_2
23317 0, // DQuad:qsub_3
23318 3, // DQuad:ssub_0 -> SPR
23319 3, // DQuad:ssub_1 -> SPR
23320 3, // DQuad:ssub_2 -> SPR
23321 3, // DQuad:ssub_3 -> SPR
23322 3, // DQuad:ssub_4 -> SPR
23323 3, // DQuad:ssub_5 -> SPR
23324 3, // DQuad:ssub_6 -> SPR
23325 3, // DQuad:ssub_7 -> SPR
23326 0, // DQuad:ssub_8
23327 0, // DQuad:ssub_9
23328 0, // DQuad:ssub_10
23329 0, // DQuad:ssub_11
23330 0, // DQuad:ssub_12
23331 0, // DQuad:ssub_13
23332 0, // DQuad:ssub_14
23333 0, // DQuad:ssub_15
23334 62, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
23335 76, // DQuad:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple
23336 62, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
23337 76, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple
23338 67, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
23339 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23340 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23341 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23342 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23343 0, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23344 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9
23345 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23346 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23347 0, // DQuad:ssub_6_ssub_7_dsub_5
23348 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23349 0, // DQuad:ssub_6_ssub_7_dsub_5_dsub_7
23350 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9
23351 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23352 0, // DQuad:ssub_8_ssub_9_ssub_12_ssub_13
23353 0, // DQuad:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23354 0, // DQuad:dsub_5_dsub_7
23355 0, // DQuad:dsub_5_ssub_12_ssub_13_dsub_7
23356 0, // DQuad:dsub_5_ssub_12_ssub_13
23357 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23358 },
23359 { // DQuad_with_ssub_0
23360 4, // DQuad_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0
23361 51, // DQuad_with_ssub_0:dsub_1 -> DPR
23362 51, // DQuad_with_ssub_0:dsub_2 -> DPR
23363 51, // DQuad_with_ssub_0:dsub_3 -> DPR
23364 0, // DQuad_with_ssub_0:dsub_4
23365 0, // DQuad_with_ssub_0:dsub_5
23366 0, // DQuad_with_ssub_0:dsub_6
23367 0, // DQuad_with_ssub_0:dsub_7
23368 0, // DQuad_with_ssub_0:gsub_0
23369 0, // DQuad_with_ssub_0:gsub_1
23370 0, // DQuad_with_ssub_0:qqsub_0
23371 0, // DQuad_with_ssub_0:qqsub_1
23372 68, // DQuad_with_ssub_0:qsub_0 -> DPair_with_ssub_0
23373 67, // DQuad_with_ssub_0:qsub_1 -> DPair
23374 0, // DQuad_with_ssub_0:qsub_2
23375 0, // DQuad_with_ssub_0:qsub_3
23376 3, // DQuad_with_ssub_0:ssub_0 -> SPR
23377 3, // DQuad_with_ssub_0:ssub_1 -> SPR
23378 3, // DQuad_with_ssub_0:ssub_2 -> SPR
23379 3, // DQuad_with_ssub_0:ssub_3 -> SPR
23380 3, // DQuad_with_ssub_0:ssub_4 -> SPR
23381 3, // DQuad_with_ssub_0:ssub_5 -> SPR
23382 3, // DQuad_with_ssub_0:ssub_6 -> SPR
23383 3, // DQuad_with_ssub_0:ssub_7 -> SPR
23384 0, // DQuad_with_ssub_0:ssub_8
23385 0, // DQuad_with_ssub_0:ssub_9
23386 0, // DQuad_with_ssub_0:ssub_10
23387 0, // DQuad_with_ssub_0:ssub_11
23388 0, // DQuad_with_ssub_0:ssub_12
23389 0, // DQuad_with_ssub_0:ssub_13
23390 0, // DQuad_with_ssub_0:ssub_14
23391 0, // DQuad_with_ssub_0:ssub_15
23392 63, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
23393 79, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0
23394 62, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
23395 76, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple
23396 67, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
23397 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23398 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23399 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23400 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23401 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23402 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9
23403 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23404 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23405 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5
23406 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23407 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7
23408 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9
23409 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23410 0, // DQuad_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13
23411 0, // DQuad_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23412 0, // DQuad_with_ssub_0:dsub_5_dsub_7
23413 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7
23414 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13
23415 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23416 },
23417 { // DQuad_with_ssub_2
23418 52, // DQuad_with_ssub_2:dsub_0 -> DPR_VFP2
23419 52, // DQuad_with_ssub_2:dsub_1 -> DPR_VFP2
23420 51, // DQuad_with_ssub_2:dsub_2 -> DPR
23421 51, // DQuad_with_ssub_2:dsub_3 -> DPR
23422 0, // DQuad_with_ssub_2:dsub_4
23423 0, // DQuad_with_ssub_2:dsub_5
23424 0, // DQuad_with_ssub_2:dsub_6
23425 0, // DQuad_with_ssub_2:dsub_7
23426 0, // DQuad_with_ssub_2:gsub_0
23427 0, // DQuad_with_ssub_2:gsub_1
23428 0, // DQuad_with_ssub_2:qqsub_0
23429 0, // DQuad_with_ssub_2:qqsub_1
23430 70, // DQuad_with_ssub_2:qsub_0 -> DPair_with_ssub_2
23431 67, // DQuad_with_ssub_2:qsub_1 -> DPair
23432 0, // DQuad_with_ssub_2:qsub_2
23433 0, // DQuad_with_ssub_2:qsub_3
23434 3, // DQuad_with_ssub_2:ssub_0 -> SPR
23435 3, // DQuad_with_ssub_2:ssub_1 -> SPR
23436 3, // DQuad_with_ssub_2:ssub_2 -> SPR
23437 3, // DQuad_with_ssub_2:ssub_3 -> SPR
23438 3, // DQuad_with_ssub_2:ssub_4 -> SPR
23439 3, // DQuad_with_ssub_2:ssub_5 -> SPR
23440 3, // DQuad_with_ssub_2:ssub_6 -> SPR
23441 3, // DQuad_with_ssub_2:ssub_7 -> SPR
23442 0, // DQuad_with_ssub_2:ssub_8
23443 0, // DQuad_with_ssub_2:ssub_9
23444 0, // DQuad_with_ssub_2:ssub_10
23445 0, // DQuad_with_ssub_2:ssub_11
23446 0, // DQuad_with_ssub_2:ssub_12
23447 0, // DQuad_with_ssub_2:ssub_13
23448 0, // DQuad_with_ssub_2:ssub_14
23449 0, // DQuad_with_ssub_2:ssub_15
23450 63, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
23451 81, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2
23452 63, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0
23453 79, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0
23454 68, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0
23455 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23456 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23457 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23458 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23459 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23460 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9
23461 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23462 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23463 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5
23464 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23465 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7
23466 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9
23467 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23468 0, // DQuad_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13
23469 0, // DQuad_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23470 0, // DQuad_with_ssub_2:dsub_5_dsub_7
23471 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7
23472 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13
23473 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23474 },
23475 { // QQPR
23476 51, // QQPR:dsub_0 -> DPR
23477 51, // QQPR:dsub_1 -> DPR
23478 51, // QQPR:dsub_2 -> DPR
23479 51, // QQPR:dsub_3 -> DPR
23480 0, // QQPR:dsub_4
23481 0, // QQPR:dsub_5
23482 0, // QQPR:dsub_6
23483 0, // QQPR:dsub_7
23484 0, // QQPR:gsub_0
23485 0, // QQPR:gsub_1
23486 0, // QQPR:qqsub_0
23487 0, // QQPR:qqsub_1
23488 69, // QQPR:qsub_0 -> QPR
23489 69, // QQPR:qsub_1 -> QPR
23490 0, // QQPR:qsub_2
23491 0, // QQPR:qsub_3
23492 3, // QQPR:ssub_0 -> SPR
23493 3, // QQPR:ssub_1 -> SPR
23494 3, // QQPR:ssub_2 -> SPR
23495 3, // QQPR:ssub_3 -> SPR
23496 3, // QQPR:ssub_4 -> SPR
23497 3, // QQPR:ssub_5 -> SPR
23498 3, // QQPR:ssub_6 -> SPR
23499 3, // QQPR:ssub_7 -> SPR
23500 0, // QQPR:ssub_8
23501 0, // QQPR:ssub_9
23502 0, // QQPR:ssub_10
23503 0, // QQPR:ssub_11
23504 0, // QQPR:ssub_12
23505 0, // QQPR:ssub_13
23506 0, // QQPR:ssub_14
23507 0, // QQPR:ssub_15
23508 62, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
23509 80, // QQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR
23510 62, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
23511 82, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23512 67, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
23513 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23514 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23515 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23516 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23517 0, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23518 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9
23519 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23520 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23521 0, // QQPR:ssub_6_ssub_7_dsub_5
23522 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23523 0, // QQPR:ssub_6_ssub_7_dsub_5_dsub_7
23524 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9
23525 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23526 0, // QQPR:ssub_8_ssub_9_ssub_12_ssub_13
23527 0, // QQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23528 0, // QQPR:dsub_5_dsub_7
23529 0, // QQPR:dsub_5_ssub_12_ssub_13_dsub_7
23530 0, // QQPR:dsub_5_ssub_12_ssub_13
23531 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23532 },
23533 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23534 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR
23535 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR
23536 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR
23537 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR
23538 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4
23539 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5
23540 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6
23541 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7
23542 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0
23543 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1
23544 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0
23545 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1
23546 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair
23547 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair
23548 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2
23549 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3
23550 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR
23551 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR
23552 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR
23553 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR
23554 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR
23555 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR
23556 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR
23557 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR
23558 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8
23559 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9
23560 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10
23561 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11
23562 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12
23563 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13
23564 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14
23565 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15
23566 62, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
23567 82, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23568 62, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
23569 80, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR
23570 69, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR
23571 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23572 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23573 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23574 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23575 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23576 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9
23577 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23578 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23579 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5
23580 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23581 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7
23582 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9
23583 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23584 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13
23585 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23586 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7
23587 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7
23588 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13
23589 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23590 },
23591 { // DQuad_with_ssub_4
23592 52, // DQuad_with_ssub_4:dsub_0 -> DPR_VFP2
23593 52, // DQuad_with_ssub_4:dsub_1 -> DPR_VFP2
23594 52, // DQuad_with_ssub_4:dsub_2 -> DPR_VFP2
23595 51, // DQuad_with_ssub_4:dsub_3 -> DPR
23596 0, // DQuad_with_ssub_4:dsub_4
23597 0, // DQuad_with_ssub_4:dsub_5
23598 0, // DQuad_with_ssub_4:dsub_6
23599 0, // DQuad_with_ssub_4:dsub_7
23600 0, // DQuad_with_ssub_4:gsub_0
23601 0, // DQuad_with_ssub_4:gsub_1
23602 0, // DQuad_with_ssub_4:qqsub_0
23603 0, // DQuad_with_ssub_4:qqsub_1
23604 70, // DQuad_with_ssub_4:qsub_0 -> DPair_with_ssub_2
23605 68, // DQuad_with_ssub_4:qsub_1 -> DPair_with_ssub_0
23606 0, // DQuad_with_ssub_4:qsub_2
23607 0, // DQuad_with_ssub_4:qsub_3
23608 3, // DQuad_with_ssub_4:ssub_0 -> SPR
23609 3, // DQuad_with_ssub_4:ssub_1 -> SPR
23610 3, // DQuad_with_ssub_4:ssub_2 -> SPR
23611 3, // DQuad_with_ssub_4:ssub_3 -> SPR
23612 3, // DQuad_with_ssub_4:ssub_4 -> SPR
23613 3, // DQuad_with_ssub_4:ssub_5 -> SPR
23614 3, // DQuad_with_ssub_4:ssub_6 -> SPR
23615 3, // DQuad_with_ssub_4:ssub_7 -> SPR
23616 0, // DQuad_with_ssub_4:ssub_8
23617 0, // DQuad_with_ssub_4:ssub_9
23618 0, // DQuad_with_ssub_4:ssub_10
23619 0, // DQuad_with_ssub_4:ssub_11
23620 0, // DQuad_with_ssub_4:ssub_12
23621 0, // DQuad_with_ssub_4:ssub_13
23622 0, // DQuad_with_ssub_4:ssub_14
23623 0, // DQuad_with_ssub_4:ssub_15
23624 64, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
23625 84, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4
23626 63, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0
23627 81, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2
23628 70, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
23629 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23630 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23631 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23632 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23633 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23634 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9
23635 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23636 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23637 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5
23638 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23639 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7
23640 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9
23641 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23642 0, // DQuad_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13
23643 0, // DQuad_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23644 0, // DQuad_with_ssub_4:dsub_5_dsub_7
23645 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7
23646 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13
23647 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23648 },
23649 { // DQuad_with_ssub_6
23650 52, // DQuad_with_ssub_6:dsub_0 -> DPR_VFP2
23651 52, // DQuad_with_ssub_6:dsub_1 -> DPR_VFP2
23652 52, // DQuad_with_ssub_6:dsub_2 -> DPR_VFP2
23653 52, // DQuad_with_ssub_6:dsub_3 -> DPR_VFP2
23654 0, // DQuad_with_ssub_6:dsub_4
23655 0, // DQuad_with_ssub_6:dsub_5
23656 0, // DQuad_with_ssub_6:dsub_6
23657 0, // DQuad_with_ssub_6:dsub_7
23658 0, // DQuad_with_ssub_6:gsub_0
23659 0, // DQuad_with_ssub_6:gsub_1
23660 0, // DQuad_with_ssub_6:qqsub_0
23661 0, // DQuad_with_ssub_6:qqsub_1
23662 70, // DQuad_with_ssub_6:qsub_0 -> DPair_with_ssub_2
23663 70, // DQuad_with_ssub_6:qsub_1 -> DPair_with_ssub_2
23664 0, // DQuad_with_ssub_6:qsub_2
23665 0, // DQuad_with_ssub_6:qsub_3
23666 3, // DQuad_with_ssub_6:ssub_0 -> SPR
23667 3, // DQuad_with_ssub_6:ssub_1 -> SPR
23668 3, // DQuad_with_ssub_6:ssub_2 -> SPR
23669 3, // DQuad_with_ssub_6:ssub_3 -> SPR
23670 3, // DQuad_with_ssub_6:ssub_4 -> SPR
23671 3, // DQuad_with_ssub_6:ssub_5 -> SPR
23672 3, // DQuad_with_ssub_6:ssub_6 -> SPR
23673 3, // DQuad_with_ssub_6:ssub_7 -> SPR
23674 0, // DQuad_with_ssub_6:ssub_8
23675 0, // DQuad_with_ssub_6:ssub_9
23676 0, // DQuad_with_ssub_6:ssub_10
23677 0, // DQuad_with_ssub_6:ssub_11
23678 0, // DQuad_with_ssub_6:ssub_12
23679 0, // DQuad_with_ssub_6:ssub_13
23680 0, // DQuad_with_ssub_6:ssub_14
23681 0, // DQuad_with_ssub_6:ssub_15
23682 64, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
23683 84, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4
23684 64, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
23685 84, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4
23686 70, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
23687 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23688 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23689 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23690 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23691 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23692 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9
23693 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23694 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23695 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5
23696 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23697 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5_dsub_7
23698 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9
23699 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23700 0, // DQuad_with_ssub_6:ssub_8_ssub_9_ssub_12_ssub_13
23701 0, // DQuad_with_ssub_6:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23702 0, // DQuad_with_ssub_6:dsub_5_dsub_7
23703 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13_dsub_7
23704 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13
23705 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23706 },
23707 { // DQuad_with_dsub_0_in_DPR_8
23708 20, // DQuad_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
23709 52, // DQuad_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2
23710 52, // DQuad_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
23711 52, // DQuad_with_dsub_0_in_DPR_8:dsub_3 -> DPR_VFP2
23712 0, // DQuad_with_dsub_0_in_DPR_8:dsub_4
23713 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5
23714 0, // DQuad_with_dsub_0_in_DPR_8:dsub_6
23715 0, // DQuad_with_dsub_0_in_DPR_8:dsub_7
23716 0, // DQuad_with_dsub_0_in_DPR_8:gsub_0
23717 0, // DQuad_with_dsub_0_in_DPR_8:gsub_1
23718 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_0
23719 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_1
23720 71, // DQuad_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8
23721 70, // DQuad_with_dsub_0_in_DPR_8:qsub_1 -> DPair_with_ssub_2
23722 0, // DQuad_with_dsub_0_in_DPR_8:qsub_2
23723 0, // DQuad_with_dsub_0_in_DPR_8:qsub_3
23724 8, // DQuad_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
23725 8, // DQuad_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
23726 3, // DQuad_with_dsub_0_in_DPR_8:ssub_2 -> SPR
23727 3, // DQuad_with_dsub_0_in_DPR_8:ssub_3 -> SPR
23728 3, // DQuad_with_dsub_0_in_DPR_8:ssub_4 -> SPR
23729 3, // DQuad_with_dsub_0_in_DPR_8:ssub_5 -> SPR
23730 3, // DQuad_with_dsub_0_in_DPR_8:ssub_6 -> SPR
23731 3, // DQuad_with_dsub_0_in_DPR_8:ssub_7 -> SPR
23732 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8
23733 0, // DQuad_with_dsub_0_in_DPR_8:ssub_9
23734 0, // DQuad_with_dsub_0_in_DPR_8:ssub_10
23735 0, // DQuad_with_dsub_0_in_DPR_8:ssub_11
23736 0, // DQuad_with_dsub_0_in_DPR_8:ssub_12
23737 0, // DQuad_with_dsub_0_in_DPR_8:ssub_13
23738 0, // DQuad_with_dsub_0_in_DPR_8:ssub_14
23739 0, // DQuad_with_dsub_0_in_DPR_8:ssub_15
23740 65, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
23741 87, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8
23742 64, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
23743 84, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4
23744 70, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
23745 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23746 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23747 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23748 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23749 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23750 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
23751 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23752 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23753 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5
23754 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23755 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
23756 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
23757 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23758 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
23759 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23760 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_dsub_7
23761 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
23762 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13
23763 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23764 },
23765 { // DQuad_with_qsub_0_in_MQPR
23766 52, // DQuad_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2
23767 52, // DQuad_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2
23768 51, // DQuad_with_qsub_0_in_MQPR:dsub_2 -> DPR
23769 51, // DQuad_with_qsub_0_in_MQPR:dsub_3 -> DPR
23770 0, // DQuad_with_qsub_0_in_MQPR:dsub_4
23771 0, // DQuad_with_qsub_0_in_MQPR:dsub_5
23772 0, // DQuad_with_qsub_0_in_MQPR:dsub_6
23773 0, // DQuad_with_qsub_0_in_MQPR:dsub_7
23774 0, // DQuad_with_qsub_0_in_MQPR:gsub_0
23775 0, // DQuad_with_qsub_0_in_MQPR:gsub_1
23776 0, // DQuad_with_qsub_0_in_MQPR:qqsub_0
23777 0, // DQuad_with_qsub_0_in_MQPR:qqsub_1
23778 72, // DQuad_with_qsub_0_in_MQPR:qsub_0 -> MQPR
23779 69, // DQuad_with_qsub_0_in_MQPR:qsub_1 -> QPR
23780 0, // DQuad_with_qsub_0_in_MQPR:qsub_2
23781 0, // DQuad_with_qsub_0_in_MQPR:qsub_3
23782 3, // DQuad_with_qsub_0_in_MQPR:ssub_0 -> SPR
23783 3, // DQuad_with_qsub_0_in_MQPR:ssub_1 -> SPR
23784 3, // DQuad_with_qsub_0_in_MQPR:ssub_2 -> SPR
23785 3, // DQuad_with_qsub_0_in_MQPR:ssub_3 -> SPR
23786 3, // DQuad_with_qsub_0_in_MQPR:ssub_4 -> SPR
23787 3, // DQuad_with_qsub_0_in_MQPR:ssub_5 -> SPR
23788 3, // DQuad_with_qsub_0_in_MQPR:ssub_6 -> SPR
23789 3, // DQuad_with_qsub_0_in_MQPR:ssub_7 -> SPR
23790 0, // DQuad_with_qsub_0_in_MQPR:ssub_8
23791 0, // DQuad_with_qsub_0_in_MQPR:ssub_9
23792 0, // DQuad_with_qsub_0_in_MQPR:ssub_10
23793 0, // DQuad_with_qsub_0_in_MQPR:ssub_11
23794 0, // DQuad_with_qsub_0_in_MQPR:ssub_12
23795 0, // DQuad_with_qsub_0_in_MQPR:ssub_13
23796 0, // DQuad_with_qsub_0_in_MQPR:ssub_14
23797 0, // DQuad_with_qsub_0_in_MQPR:ssub_15
23798 63, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
23799 88, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR
23800 63, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0
23801 89, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23802 68, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0
23803 0, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23804 0, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23805 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23806 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23807 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23808 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
23809 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23810 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23811 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5
23812 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23813 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
23814 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
23815 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23816 0, // DQuad_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
23817 0, // DQuad_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23818 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_dsub_7
23819 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
23820 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13
23821 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23822 },
23823 { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23824 52, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2
23825 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR
23826 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR
23827 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR
23828 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4
23829 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5
23830 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6
23831 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7
23832 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0
23833 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1
23834 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0
23835 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1
23836 68, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0
23837 67, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair
23838 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2
23839 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3
23840 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR
23841 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR
23842 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR
23843 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR
23844 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR
23845 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR
23846 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR
23847 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR
23848 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8
23849 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9
23850 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10
23851 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11
23852 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12
23853 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13
23854 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14
23855 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15
23856 63, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
23857 89, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
23858 62, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
23859 80, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR
23860 69, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR
23861 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23862 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23863 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23864 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23865 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23866 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9
23867 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23868 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23869 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5
23870 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23871 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7
23872 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9
23873 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23874 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13
23875 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23876 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7
23877 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7
23878 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13
23879 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23880 },
23881 { // DQuad_with_dsub_1_in_DPR_8
23882 53, // DQuad_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8
23883 53, // DQuad_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8
23884 52, // DQuad_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2
23885 52, // DQuad_with_dsub_1_in_DPR_8:dsub_3 -> DPR_VFP2
23886 0, // DQuad_with_dsub_1_in_DPR_8:dsub_4
23887 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5
23888 0, // DQuad_with_dsub_1_in_DPR_8:dsub_6
23889 0, // DQuad_with_dsub_1_in_DPR_8:dsub_7
23890 0, // DQuad_with_dsub_1_in_DPR_8:gsub_0
23891 0, // DQuad_with_dsub_1_in_DPR_8:gsub_1
23892 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_0
23893 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_1
23894 74, // DQuad_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
23895 70, // DQuad_with_dsub_1_in_DPR_8:qsub_1 -> DPair_with_ssub_2
23896 0, // DQuad_with_dsub_1_in_DPR_8:qsub_2
23897 0, // DQuad_with_dsub_1_in_DPR_8:qsub_3
23898 8, // DQuad_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8
23899 8, // DQuad_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8
23900 8, // DQuad_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8
23901 8, // DQuad_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8
23902 3, // DQuad_with_dsub_1_in_DPR_8:ssub_4 -> SPR
23903 3, // DQuad_with_dsub_1_in_DPR_8:ssub_5 -> SPR
23904 3, // DQuad_with_dsub_1_in_DPR_8:ssub_6 -> SPR
23905 3, // DQuad_with_dsub_1_in_DPR_8:ssub_7 -> SPR
23906 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8
23907 0, // DQuad_with_dsub_1_in_DPR_8:ssub_9
23908 0, // DQuad_with_dsub_1_in_DPR_8:ssub_10
23909 0, // DQuad_with_dsub_1_in_DPR_8:ssub_11
23910 0, // DQuad_with_dsub_1_in_DPR_8:ssub_12
23911 0, // DQuad_with_dsub_1_in_DPR_8:ssub_13
23912 0, // DQuad_with_dsub_1_in_DPR_8:ssub_14
23913 0, // DQuad_with_dsub_1_in_DPR_8:ssub_15
23914 65, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
23915 90, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8
23916 65, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8
23917 87, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8
23918 71, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8
23919 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23920 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23921 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23922 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23923 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23924 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
23925 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23926 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23927 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5
23928 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23929 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
23930 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
23931 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23932 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
23933 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23934 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_dsub_7
23935 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
23936 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13
23937 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23938 },
23939 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
23940 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2
23941 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2
23942 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2
23943 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR
23944 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
23945 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
23946 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
23947 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
23948 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
23949 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
23950 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
23951 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
23952 70, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2
23953 68, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_0
23954 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
23955 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
23956 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR
23957 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR
23958 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR
23959 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR
23960 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR
23961 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR
23962 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR
23963 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR
23964 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
23965 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
23966 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
23967 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
23968 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
23969 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
23970 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
23971 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
23972 64, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
23973 91, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
23974 63, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0
23975 88, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_MQPR
23976 73, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2
23977 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
23978 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23979 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
23980 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
23981 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23982 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
23983 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
23984 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
23985 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
23986 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
23987 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
23988 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
23989 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23990 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
23991 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
23992 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
23993 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
23994 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
23995 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
23996 },
23997 { // MQQPR
23998 52, // MQQPR:dsub_0 -> DPR_VFP2
23999 52, // MQQPR:dsub_1 -> DPR_VFP2
24000 52, // MQQPR:dsub_2 -> DPR_VFP2
24001 52, // MQQPR:dsub_3 -> DPR_VFP2
24002 0, // MQQPR:dsub_4
24003 0, // MQQPR:dsub_5
24004 0, // MQQPR:dsub_6
24005 0, // MQQPR:dsub_7
24006 0, // MQQPR:gsub_0
24007 0, // MQQPR:gsub_1
24008 0, // MQQPR:qqsub_0
24009 0, // MQQPR:qqsub_1
24010 73, // MQQPR:qsub_0 -> QPR_VFP2
24011 73, // MQQPR:qsub_1 -> QPR_VFP2
24012 0, // MQQPR:qsub_2
24013 0, // MQQPR:qsub_3
24014 3, // MQQPR:ssub_0 -> SPR
24015 3, // MQQPR:ssub_1 -> SPR
24016 3, // MQQPR:ssub_2 -> SPR
24017 3, // MQQPR:ssub_3 -> SPR
24018 3, // MQQPR:ssub_4 -> SPR
24019 3, // MQQPR:ssub_5 -> SPR
24020 3, // MQQPR:ssub_6 -> SPR
24021 3, // MQQPR:ssub_7 -> SPR
24022 0, // MQQPR:ssub_8
24023 0, // MQQPR:ssub_9
24024 0, // MQQPR:ssub_10
24025 0, // MQQPR:ssub_11
24026 0, // MQQPR:ssub_12
24027 0, // MQQPR:ssub_13
24028 0, // MQQPR:ssub_14
24029 0, // MQQPR:ssub_15
24030 64, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
24031 92, // MQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24032 64, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24033 91, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24034 70, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
24035 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24036 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24037 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24038 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24039 0, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24040 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9
24041 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24042 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24043 0, // MQQPR:ssub_6_ssub_7_dsub_5
24044 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24045 0, // MQQPR:ssub_6_ssub_7_dsub_5_dsub_7
24046 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9
24047 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24048 0, // MQQPR:ssub_8_ssub_9_ssub_12_ssub_13
24049 0, // MQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24050 0, // MQQPR:dsub_5_dsub_7
24051 0, // MQQPR:dsub_5_ssub_12_ssub_13_dsub_7
24052 0, // MQQPR:dsub_5_ssub_12_ssub_13
24053 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24054 },
24055 { // DQuad_with_dsub_2_in_DPR_8
24056 53, // DQuad_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
24057 53, // DQuad_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8
24058 53, // DQuad_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
24059 52, // DQuad_with_dsub_2_in_DPR_8:dsub_3 -> DPR_VFP2
24060 0, // DQuad_with_dsub_2_in_DPR_8:dsub_4
24061 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5
24062 0, // DQuad_with_dsub_2_in_DPR_8:dsub_6
24063 0, // DQuad_with_dsub_2_in_DPR_8:dsub_7
24064 0, // DQuad_with_dsub_2_in_DPR_8:gsub_0
24065 0, // DQuad_with_dsub_2_in_DPR_8:gsub_1
24066 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_0
24067 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_1
24068 74, // DQuad_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
24069 71, // DQuad_with_dsub_2_in_DPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8
24070 0, // DQuad_with_dsub_2_in_DPR_8:qsub_2
24071 0, // DQuad_with_dsub_2_in_DPR_8:qsub_3
24072 8, // DQuad_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
24073 8, // DQuad_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
24074 8, // DQuad_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8
24075 8, // DQuad_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8
24076 8, // DQuad_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
24077 8, // DQuad_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
24078 3, // DQuad_with_dsub_2_in_DPR_8:ssub_6 -> SPR
24079 3, // DQuad_with_dsub_2_in_DPR_8:ssub_7 -> SPR
24080 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8
24081 0, // DQuad_with_dsub_2_in_DPR_8:ssub_9
24082 0, // DQuad_with_dsub_2_in_DPR_8:ssub_10
24083 0, // DQuad_with_dsub_2_in_DPR_8:ssub_11
24084 0, // DQuad_with_dsub_2_in_DPR_8:ssub_12
24085 0, // DQuad_with_dsub_2_in_DPR_8:ssub_13
24086 0, // DQuad_with_dsub_2_in_DPR_8:ssub_14
24087 0, // DQuad_with_dsub_2_in_DPR_8:ssub_15
24088 66, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24089 94, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8
24090 65, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8
24091 90, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_1_in_DPR_8
24092 74, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
24093 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24094 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24095 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24096 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24097 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24098 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
24099 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24100 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24101 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5
24102 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24103 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
24104 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
24105 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24106 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
24107 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24108 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_dsub_7
24109 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
24110 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13
24111 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24112 },
24113 { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24114 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2
24115 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2
24116 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2
24117 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2
24118 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
24119 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
24120 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
24121 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
24122 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
24123 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
24124 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
24125 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
24126 70, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2
24127 70, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2
24128 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
24129 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
24130 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR
24131 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR
24132 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR
24133 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR
24134 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR
24135 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR
24136 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR
24137 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR
24138 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
24139 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
24140 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
24141 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
24142 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
24143 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
24144 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
24145 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
24146 64, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
24147 91, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24148 64, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24149 92, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24150 73, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2
24151 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24152 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24153 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24154 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24155 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24156 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
24157 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24158 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24159 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
24160 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24161 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
24162 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
24163 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24164 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
24165 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24166 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
24167 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
24168 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
24169 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24170 },
24171 { // DQuad_with_dsub_3_in_DPR_8
24172 53, // DQuad_with_dsub_3_in_DPR_8:dsub_0 -> DPR_8
24173 53, // DQuad_with_dsub_3_in_DPR_8:dsub_1 -> DPR_8
24174 53, // DQuad_with_dsub_3_in_DPR_8:dsub_2 -> DPR_8
24175 53, // DQuad_with_dsub_3_in_DPR_8:dsub_3 -> DPR_8
24176 0, // DQuad_with_dsub_3_in_DPR_8:dsub_4
24177 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5
24178 0, // DQuad_with_dsub_3_in_DPR_8:dsub_6
24179 0, // DQuad_with_dsub_3_in_DPR_8:dsub_7
24180 0, // DQuad_with_dsub_3_in_DPR_8:gsub_0
24181 0, // DQuad_with_dsub_3_in_DPR_8:gsub_1
24182 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_0
24183 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_1
24184 74, // DQuad_with_dsub_3_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
24185 74, // DQuad_with_dsub_3_in_DPR_8:qsub_1 -> DPair_with_dsub_1_in_DPR_8
24186 0, // DQuad_with_dsub_3_in_DPR_8:qsub_2
24187 0, // DQuad_with_dsub_3_in_DPR_8:qsub_3
24188 8, // DQuad_with_dsub_3_in_DPR_8:ssub_0 -> SPR_8
24189 8, // DQuad_with_dsub_3_in_DPR_8:ssub_1 -> SPR_8
24190 8, // DQuad_with_dsub_3_in_DPR_8:ssub_2 -> SPR_8
24191 8, // DQuad_with_dsub_3_in_DPR_8:ssub_3 -> SPR_8
24192 8, // DQuad_with_dsub_3_in_DPR_8:ssub_4 -> SPR_8
24193 8, // DQuad_with_dsub_3_in_DPR_8:ssub_5 -> SPR_8
24194 8, // DQuad_with_dsub_3_in_DPR_8:ssub_6 -> SPR_8
24195 8, // DQuad_with_dsub_3_in_DPR_8:ssub_7 -> SPR_8
24196 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8
24197 0, // DQuad_with_dsub_3_in_DPR_8:ssub_9
24198 0, // DQuad_with_dsub_3_in_DPR_8:ssub_10
24199 0, // DQuad_with_dsub_3_in_DPR_8:ssub_11
24200 0, // DQuad_with_dsub_3_in_DPR_8:ssub_12
24201 0, // DQuad_with_dsub_3_in_DPR_8:ssub_13
24202 0, // DQuad_with_dsub_3_in_DPR_8:ssub_14
24203 0, // DQuad_with_dsub_3_in_DPR_8:ssub_15
24204 66, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24205 94, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8
24206 66, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
24207 94, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_2_in_DPR_8
24208 74, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
24209 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24210 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24211 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24212 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24213 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24214 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9
24215 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24216 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24217 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5
24218 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24219 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7
24220 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9
24221 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24222 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13
24223 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24224 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_dsub_7
24225 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7
24226 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13
24227 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24228 },
24229 { // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24230 53, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8
24231 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2
24232 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2
24233 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2
24234 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
24235 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
24236 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
24237 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
24238 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
24239 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
24240 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
24241 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
24242 71, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8
24243 70, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2
24244 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
24245 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
24246 8, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8
24247 8, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8
24248 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR
24249 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR
24250 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR
24251 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR
24252 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR
24253 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR
24254 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
24255 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
24256 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
24257 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
24258 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
24259 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
24260 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
24261 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
24262 65, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
24263 96, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24264 64, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24265 92, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24266 73, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2
24267 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24268 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24269 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24270 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24271 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24272 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
24273 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24274 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24275 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
24276 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24277 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
24278 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
24279 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24280 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
24281 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24282 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
24283 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
24284 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
24285 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24286 },
24287 { // DQuad_with_qsub_0_in_QPR_8
24288 53, // DQuad_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8
24289 53, // DQuad_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8
24290 52, // DQuad_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2
24291 52, // DQuad_with_qsub_0_in_QPR_8:dsub_3 -> DPR_VFP2
24292 0, // DQuad_with_qsub_0_in_QPR_8:dsub_4
24293 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5
24294 0, // DQuad_with_qsub_0_in_QPR_8:dsub_6
24295 0, // DQuad_with_qsub_0_in_QPR_8:dsub_7
24296 0, // DQuad_with_qsub_0_in_QPR_8:gsub_0
24297 0, // DQuad_with_qsub_0_in_QPR_8:gsub_1
24298 0, // DQuad_with_qsub_0_in_QPR_8:qqsub_0
24299 0, // DQuad_with_qsub_0_in_QPR_8:qqsub_1
24300 75, // DQuad_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8
24301 73, // DQuad_with_qsub_0_in_QPR_8:qsub_1 -> QPR_VFP2
24302 0, // DQuad_with_qsub_0_in_QPR_8:qsub_2
24303 0, // DQuad_with_qsub_0_in_QPR_8:qsub_3
24304 8, // DQuad_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8
24305 8, // DQuad_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8
24306 8, // DQuad_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8
24307 8, // DQuad_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8
24308 3, // DQuad_with_qsub_0_in_QPR_8:ssub_4 -> SPR
24309 3, // DQuad_with_qsub_0_in_QPR_8:ssub_5 -> SPR
24310 3, // DQuad_with_qsub_0_in_QPR_8:ssub_6 -> SPR
24311 3, // DQuad_with_qsub_0_in_QPR_8:ssub_7 -> SPR
24312 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8
24313 0, // DQuad_with_qsub_0_in_QPR_8:ssub_9
24314 0, // DQuad_with_qsub_0_in_QPR_8:ssub_10
24315 0, // DQuad_with_qsub_0_in_QPR_8:ssub_11
24316 0, // DQuad_with_qsub_0_in_QPR_8:ssub_12
24317 0, // DQuad_with_qsub_0_in_QPR_8:ssub_13
24318 0, // DQuad_with_qsub_0_in_QPR_8:ssub_14
24319 0, // DQuad_with_qsub_0_in_QPR_8:ssub_15
24320 65, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
24321 97, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8
24322 65, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8
24323 96, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24324 71, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8
24325 0, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24326 0, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24327 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24328 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24329 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24330 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
24331 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24332 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24333 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5
24334 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24335 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
24336 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
24337 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24338 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
24339 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24340 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_dsub_7
24341 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
24342 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13
24343 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24344 },
24345 { // DQuad_with_qsub_1_in_QPR_8
24346 53, // DQuad_with_qsub_1_in_QPR_8:dsub_0 -> DPR_8
24347 53, // DQuad_with_qsub_1_in_QPR_8:dsub_1 -> DPR_8
24348 53, // DQuad_with_qsub_1_in_QPR_8:dsub_2 -> DPR_8
24349 53, // DQuad_with_qsub_1_in_QPR_8:dsub_3 -> DPR_8
24350 0, // DQuad_with_qsub_1_in_QPR_8:dsub_4
24351 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5
24352 0, // DQuad_with_qsub_1_in_QPR_8:dsub_6
24353 0, // DQuad_with_qsub_1_in_QPR_8:dsub_7
24354 0, // DQuad_with_qsub_1_in_QPR_8:gsub_0
24355 0, // DQuad_with_qsub_1_in_QPR_8:gsub_1
24356 0, // DQuad_with_qsub_1_in_QPR_8:qqsub_0
24357 0, // DQuad_with_qsub_1_in_QPR_8:qqsub_1
24358 75, // DQuad_with_qsub_1_in_QPR_8:qsub_0 -> QPR_8
24359 75, // DQuad_with_qsub_1_in_QPR_8:qsub_1 -> QPR_8
24360 0, // DQuad_with_qsub_1_in_QPR_8:qsub_2
24361 0, // DQuad_with_qsub_1_in_QPR_8:qsub_3
24362 8, // DQuad_with_qsub_1_in_QPR_8:ssub_0 -> SPR_8
24363 8, // DQuad_with_qsub_1_in_QPR_8:ssub_1 -> SPR_8
24364 8, // DQuad_with_qsub_1_in_QPR_8:ssub_2 -> SPR_8
24365 8, // DQuad_with_qsub_1_in_QPR_8:ssub_3 -> SPR_8
24366 8, // DQuad_with_qsub_1_in_QPR_8:ssub_4 -> SPR_8
24367 8, // DQuad_with_qsub_1_in_QPR_8:ssub_5 -> SPR_8
24368 8, // DQuad_with_qsub_1_in_QPR_8:ssub_6 -> SPR_8
24369 8, // DQuad_with_qsub_1_in_QPR_8:ssub_7 -> SPR_8
24370 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8
24371 0, // DQuad_with_qsub_1_in_QPR_8:ssub_9
24372 0, // DQuad_with_qsub_1_in_QPR_8:ssub_10
24373 0, // DQuad_with_qsub_1_in_QPR_8:ssub_11
24374 0, // DQuad_with_qsub_1_in_QPR_8:ssub_12
24375 0, // DQuad_with_qsub_1_in_QPR_8:ssub_13
24376 0, // DQuad_with_qsub_1_in_QPR_8:ssub_14
24377 0, // DQuad_with_qsub_1_in_QPR_8:ssub_15
24378 66, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24379 98, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
24380 66, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
24381 99, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24382 74, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
24383 0, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24384 0, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24385 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24386 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24387 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24388 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
24389 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24390 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24391 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_dsub_5
24392 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24393 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
24394 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
24395 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24396 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
24397 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24398 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_dsub_7
24399 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
24400 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_ssub_12_ssub_13
24401 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24402 },
24403 { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24404 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8
24405 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8
24406 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8
24407 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3 -> DPR_VFP2
24408 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4
24409 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5
24410 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6
24411 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7
24412 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0
24413 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1
24414 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0
24415 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1
24416 74, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8
24417 71, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8
24418 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2
24419 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3
24420 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8
24421 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8
24422 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8
24423 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8
24424 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8
24425 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8
24426 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6 -> SPR
24427 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7 -> SPR
24428 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8
24429 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9
24430 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10
24431 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11
24432 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12
24433 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13
24434 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14
24435 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15
24436 66, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24437 99, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24438 65, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8
24439 97, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR_8
24440 75, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8
24441 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24442 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24443 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24444 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24445 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24446 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9
24447 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24448 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24449 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5
24450 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24451 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7
24452 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9
24453 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24454 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13
24455 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24456 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7
24457 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7
24458 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13
24459 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24460 },
24461 { // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24462 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8
24463 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_8
24464 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_8
24465 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_8
24466 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4
24467 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5
24468 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6
24469 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7
24470 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0
24471 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1
24472 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0
24473 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1
24474 74, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_1_in_DPR_8
24475 74, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_dsub_1_in_DPR_8
24476 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2
24477 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3
24478 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8
24479 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8
24480 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR_8
24481 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR_8
24482 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR_8
24483 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR_8
24484 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR_8
24485 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR_8
24486 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8
24487 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9
24488 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10
24489 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11
24490 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12
24491 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13
24492 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14
24493 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15
24494 66, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24495 99, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24496 66, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
24497 98, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
24498 75, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8
24499 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9
24500 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24501 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5
24502 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24503 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24504 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9
24505 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9
24506 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24507 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5
24508 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5
24509 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7
24510 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9
24511 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24512 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13
24513 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13
24514 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7
24515 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7
24516 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13
24517 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2
24518 },
24519 { // QQQQPR
24520 51, // QQQQPR:dsub_0 -> DPR
24521 51, // QQQQPR:dsub_1 -> DPR
24522 51, // QQQQPR:dsub_2 -> DPR
24523 51, // QQQQPR:dsub_3 -> DPR
24524 51, // QQQQPR:dsub_4 -> DPR
24525 51, // QQQQPR:dsub_5 -> DPR
24526 51, // QQQQPR:dsub_6 -> DPR
24527 51, // QQQQPR:dsub_7 -> DPR
24528 0, // QQQQPR:gsub_0
24529 0, // QQQQPR:gsub_1
24530 110, // QQQQPR:qqsub_0 -> QQPR
24531 110, // QQQQPR:qqsub_1 -> QQPR
24532 69, // QQQQPR:qsub_0 -> QPR
24533 69, // QQQQPR:qsub_1 -> QPR
24534 69, // QQQQPR:qsub_2 -> QPR
24535 69, // QQQQPR:qsub_3 -> QPR
24536 3, // QQQQPR:ssub_0 -> SPR
24537 3, // QQQQPR:ssub_1 -> SPR
24538 3, // QQQQPR:ssub_2 -> SPR
24539 3, // QQQQPR:ssub_3 -> SPR
24540 3, // QQQQPR:ssub_4 -> SPR
24541 3, // QQQQPR:ssub_5 -> SPR
24542 3, // QQQQPR:ssub_6 -> SPR
24543 3, // QQQQPR:ssub_7 -> SPR
24544 3, // QQQQPR:ssub_8 -> SPR
24545 3, // QQQQPR:ssub_9 -> SPR
24546 3, // QQQQPR:ssub_10 -> SPR
24547 3, // QQQQPR:ssub_11 -> SPR
24548 3, // QQQQPR:ssub_12 -> SPR
24549 3, // QQQQPR:ssub_13 -> SPR
24550 3, // QQQQPR:ssub_14 -> SPR
24551 3, // QQQQPR:ssub_15 -> SPR
24552 62, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc
24553 80, // QQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR
24554 62, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc
24555 82, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24556 67, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair
24557 100, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc
24558 0, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24559 100, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc
24560 0, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24561 111, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24562 62, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
24563 80, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR
24564 100, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc
24565 62, // QQQQPR:ssub_6_ssub_7_dsub_5 -> DPairSpc
24566 82, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24567 100, // QQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc
24568 67, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair
24569 111, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24570 62, // QQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc
24571 80, // QQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR
24572 62, // QQQQPR:dsub_5_dsub_7 -> DPairSpc
24573 82, // QQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24574 67, // QQQQPR:dsub_5_ssub_12_ssub_13 -> DPair
24575 110, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR
24576 },
24577 { // QQQQPR_with_ssub_0
24578 52, // QQQQPR_with_ssub_0:dsub_0 -> DPR_VFP2
24579 52, // QQQQPR_with_ssub_0:dsub_1 -> DPR_VFP2
24580 51, // QQQQPR_with_ssub_0:dsub_2 -> DPR
24581 51, // QQQQPR_with_ssub_0:dsub_3 -> DPR
24582 51, // QQQQPR_with_ssub_0:dsub_4 -> DPR
24583 51, // QQQQPR_with_ssub_0:dsub_5 -> DPR
24584 51, // QQQQPR_with_ssub_0:dsub_6 -> DPR
24585 51, // QQQQPR_with_ssub_0:dsub_7 -> DPR
24586 0, // QQQQPR_with_ssub_0:gsub_0
24587 0, // QQQQPR_with_ssub_0:gsub_1
24588 115, // QQQQPR_with_ssub_0:qqsub_0 -> DQuad_with_qsub_0_in_MQPR
24589 110, // QQQQPR_with_ssub_0:qqsub_1 -> QQPR
24590 72, // QQQQPR_with_ssub_0:qsub_0 -> MQPR
24591 69, // QQQQPR_with_ssub_0:qsub_1 -> QPR
24592 69, // QQQQPR_with_ssub_0:qsub_2 -> QPR
24593 69, // QQQQPR_with_ssub_0:qsub_3 -> QPR
24594 3, // QQQQPR_with_ssub_0:ssub_0 -> SPR
24595 3, // QQQQPR_with_ssub_0:ssub_1 -> SPR
24596 3, // QQQQPR_with_ssub_0:ssub_2 -> SPR
24597 3, // QQQQPR_with_ssub_0:ssub_3 -> SPR
24598 3, // QQQQPR_with_ssub_0:ssub_4 -> SPR
24599 3, // QQQQPR_with_ssub_0:ssub_5 -> SPR
24600 3, // QQQQPR_with_ssub_0:ssub_6 -> SPR
24601 3, // QQQQPR_with_ssub_0:ssub_7 -> SPR
24602 3, // QQQQPR_with_ssub_0:ssub_8 -> SPR
24603 3, // QQQQPR_with_ssub_0:ssub_9 -> SPR
24604 3, // QQQQPR_with_ssub_0:ssub_10 -> SPR
24605 3, // QQQQPR_with_ssub_0:ssub_11 -> SPR
24606 3, // QQQQPR_with_ssub_0:ssub_12 -> SPR
24607 3, // QQQQPR_with_ssub_0:ssub_13 -> SPR
24608 3, // QQQQPR_with_ssub_0:ssub_14 -> SPR
24609 3, // QQQQPR_with_ssub_0:ssub_15 -> SPR
24610 63, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0
24611 88, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR
24612 63, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0
24613 89, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24614 68, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0
24615 101, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0
24616 0, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24617 101, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_0
24618 0, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24619 116, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24620 62, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc
24621 80, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR
24622 100, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc
24623 62, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5 -> DPairSpc
24624 82, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24625 100, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc
24626 67, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair
24627 111, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24628 62, // QQQQPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc
24629 80, // QQQQPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR
24630 62, // QQQQPR_with_ssub_0:dsub_5_dsub_7 -> DPairSpc
24631 82, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24632 67, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13 -> DPair
24633 110, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR
24634 },
24635 { // QQQQPR_with_ssub_4
24636 52, // QQQQPR_with_ssub_4:dsub_0 -> DPR_VFP2
24637 52, // QQQQPR_with_ssub_4:dsub_1 -> DPR_VFP2
24638 52, // QQQQPR_with_ssub_4:dsub_2 -> DPR_VFP2
24639 52, // QQQQPR_with_ssub_4:dsub_3 -> DPR_VFP2
24640 51, // QQQQPR_with_ssub_4:dsub_4 -> DPR
24641 51, // QQQQPR_with_ssub_4:dsub_5 -> DPR
24642 51, // QQQQPR_with_ssub_4:dsub_6 -> DPR
24643 51, // QQQQPR_with_ssub_4:dsub_7 -> DPR
24644 0, // QQQQPR_with_ssub_4:gsub_0
24645 0, // QQQQPR_with_ssub_4:gsub_1
24646 119, // QQQQPR_with_ssub_4:qqsub_0 -> MQQPR
24647 110, // QQQQPR_with_ssub_4:qqsub_1 -> QQPR
24648 73, // QQQQPR_with_ssub_4:qsub_0 -> QPR_VFP2
24649 73, // QQQQPR_with_ssub_4:qsub_1 -> QPR_VFP2
24650 69, // QQQQPR_with_ssub_4:qsub_2 -> QPR
24651 69, // QQQQPR_with_ssub_4:qsub_3 -> QPR
24652 3, // QQQQPR_with_ssub_4:ssub_0 -> SPR
24653 3, // QQQQPR_with_ssub_4:ssub_1 -> SPR
24654 3, // QQQQPR_with_ssub_4:ssub_2 -> SPR
24655 3, // QQQQPR_with_ssub_4:ssub_3 -> SPR
24656 3, // QQQQPR_with_ssub_4:ssub_4 -> SPR
24657 3, // QQQQPR_with_ssub_4:ssub_5 -> SPR
24658 3, // QQQQPR_with_ssub_4:ssub_6 -> SPR
24659 3, // QQQQPR_with_ssub_4:ssub_7 -> SPR
24660 3, // QQQQPR_with_ssub_4:ssub_8 -> SPR
24661 3, // QQQQPR_with_ssub_4:ssub_9 -> SPR
24662 3, // QQQQPR_with_ssub_4:ssub_10 -> SPR
24663 3, // QQQQPR_with_ssub_4:ssub_11 -> SPR
24664 3, // QQQQPR_with_ssub_4:ssub_12 -> SPR
24665 3, // QQQQPR_with_ssub_4:ssub_13 -> SPR
24666 3, // QQQQPR_with_ssub_4:ssub_14 -> SPR
24667 3, // QQQQPR_with_ssub_4:ssub_15 -> SPR
24668 64, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
24669 92, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24670 64, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24671 91, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24672 70, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
24673 102, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4
24674 0, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24675 102, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_4
24676 0, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24677 118, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24678 63, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0
24679 88, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_MQPR
24680 101, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_0
24681 63, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_0
24682 89, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24683 101, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_0
24684 68, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_0
24685 116, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24686 62, // QQQQPR_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc
24687 80, // QQQQPR_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR
24688 62, // QQQQPR_with_ssub_4:dsub_5_dsub_7 -> DPairSpc
24689 82, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24690 67, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13 -> DPair
24691 115, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_0_in_MQPR
24692 },
24693 { // QQQQPR_with_ssub_8
24694 52, // QQQQPR_with_ssub_8:dsub_0 -> DPR_VFP2
24695 52, // QQQQPR_with_ssub_8:dsub_1 -> DPR_VFP2
24696 52, // QQQQPR_with_ssub_8:dsub_2 -> DPR_VFP2
24697 52, // QQQQPR_with_ssub_8:dsub_3 -> DPR_VFP2
24698 52, // QQQQPR_with_ssub_8:dsub_4 -> DPR_VFP2
24699 52, // QQQQPR_with_ssub_8:dsub_5 -> DPR_VFP2
24700 51, // QQQQPR_with_ssub_8:dsub_6 -> DPR
24701 51, // QQQQPR_with_ssub_8:dsub_7 -> DPR
24702 0, // QQQQPR_with_ssub_8:gsub_0
24703 0, // QQQQPR_with_ssub_8:gsub_1
24704 119, // QQQQPR_with_ssub_8:qqsub_0 -> MQQPR
24705 115, // QQQQPR_with_ssub_8:qqsub_1 -> DQuad_with_qsub_0_in_MQPR
24706 73, // QQQQPR_with_ssub_8:qsub_0 -> QPR_VFP2
24707 73, // QQQQPR_with_ssub_8:qsub_1 -> QPR_VFP2
24708 73, // QQQQPR_with_ssub_8:qsub_2 -> QPR_VFP2
24709 69, // QQQQPR_with_ssub_8:qsub_3 -> QPR
24710 3, // QQQQPR_with_ssub_8:ssub_0 -> SPR
24711 3, // QQQQPR_with_ssub_8:ssub_1 -> SPR
24712 3, // QQQQPR_with_ssub_8:ssub_2 -> SPR
24713 3, // QQQQPR_with_ssub_8:ssub_3 -> SPR
24714 3, // QQQQPR_with_ssub_8:ssub_4 -> SPR
24715 3, // QQQQPR_with_ssub_8:ssub_5 -> SPR
24716 3, // QQQQPR_with_ssub_8:ssub_6 -> SPR
24717 3, // QQQQPR_with_ssub_8:ssub_7 -> SPR
24718 3, // QQQQPR_with_ssub_8:ssub_8 -> SPR
24719 3, // QQQQPR_with_ssub_8:ssub_9 -> SPR
24720 3, // QQQQPR_with_ssub_8:ssub_10 -> SPR
24721 3, // QQQQPR_with_ssub_8:ssub_11 -> SPR
24722 3, // QQQQPR_with_ssub_8:ssub_12 -> SPR
24723 3, // QQQQPR_with_ssub_8:ssub_13 -> SPR
24724 3, // QQQQPR_with_ssub_8:ssub_14 -> SPR
24725 3, // QQQQPR_with_ssub_8:ssub_15 -> SPR
24726 64, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
24727 92, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24728 64, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24729 91, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24730 70, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
24731 103, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8
24732 0, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24733 103, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8
24734 0, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24735 121, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24736 64, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
24737 92, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24738 102, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_4
24739 64, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4
24740 91, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24741 102, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_4
24742 70, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2
24743 118, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24744 63, // QQQQPR_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_0
24745 88, // QQQQPR_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_MQPR
24746 63, // QQQQPR_with_ssub_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_0
24747 89, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
24748 68, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_0
24749 119, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR
24750 },
24751 { // MQQQQPR
24752 52, // MQQQQPR:dsub_0 -> DPR_VFP2
24753 52, // MQQQQPR:dsub_1 -> DPR_VFP2
24754 52, // MQQQQPR:dsub_2 -> DPR_VFP2
24755 52, // MQQQQPR:dsub_3 -> DPR_VFP2
24756 52, // MQQQQPR:dsub_4 -> DPR_VFP2
24757 52, // MQQQQPR:dsub_5 -> DPR_VFP2
24758 52, // MQQQQPR:dsub_6 -> DPR_VFP2
24759 52, // MQQQQPR:dsub_7 -> DPR_VFP2
24760 0, // MQQQQPR:gsub_0
24761 0, // MQQQQPR:gsub_1
24762 119, // MQQQQPR:qqsub_0 -> MQQPR
24763 119, // MQQQQPR:qqsub_1 -> MQQPR
24764 73, // MQQQQPR:qsub_0 -> QPR_VFP2
24765 73, // MQQQQPR:qsub_1 -> QPR_VFP2
24766 73, // MQQQQPR:qsub_2 -> QPR_VFP2
24767 73, // MQQQQPR:qsub_3 -> QPR_VFP2
24768 3, // MQQQQPR:ssub_0 -> SPR
24769 3, // MQQQQPR:ssub_1 -> SPR
24770 3, // MQQQQPR:ssub_2 -> SPR
24771 3, // MQQQQPR:ssub_3 -> SPR
24772 3, // MQQQQPR:ssub_4 -> SPR
24773 3, // MQQQQPR:ssub_5 -> SPR
24774 3, // MQQQQPR:ssub_6 -> SPR
24775 3, // MQQQQPR:ssub_7 -> SPR
24776 3, // MQQQQPR:ssub_8 -> SPR
24777 3, // MQQQQPR:ssub_9 -> SPR
24778 3, // MQQQQPR:ssub_10 -> SPR
24779 3, // MQQQQPR:ssub_11 -> SPR
24780 3, // MQQQQPR:ssub_12 -> SPR
24781 3, // MQQQQPR:ssub_13 -> SPR
24782 3, // MQQQQPR:ssub_14 -> SPR
24783 3, // MQQQQPR:ssub_15 -> SPR
24784 64, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4
24785 92, // MQQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24786 64, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4
24787 91, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24788 70, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2
24789 103, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8
24790 0, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24791 103, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8
24792 0, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24793 121, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24794 64, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
24795 92, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24796 103, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8
24797 64, // MQQQQPR:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4
24798 91, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24799 103, // MQQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8
24800 70, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2
24801 121, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24802 64, // MQQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4
24803 92, // MQQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24804 64, // MQQQQPR:dsub_5_dsub_7 -> DPairSpc_with_ssub_4
24805 91, // MQQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24806 70, // MQQQQPR:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2
24807 119, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR
24808 },
24809 { // MQQQQPR_with_dsub_0_in_DPR_8
24810 53, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_0 -> DPR_8
24811 53, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_1 -> DPR_8
24812 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2
24813 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_3 -> DPR_VFP2
24814 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2
24815 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5 -> DPR_VFP2
24816 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_6 -> DPR_VFP2
24817 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_7 -> DPR_VFP2
24818 0, // MQQQQPR_with_dsub_0_in_DPR_8:gsub_0
24819 0, // MQQQQPR_with_dsub_0_in_DPR_8:gsub_1
24820 124, // MQQQQPR_with_dsub_0_in_DPR_8:qqsub_0 -> DQuad_with_qsub_0_in_QPR_8
24821 119, // MQQQQPR_with_dsub_0_in_DPR_8:qqsub_1 -> MQQPR
24822 75, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_0 -> QPR_8
24823 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_1 -> QPR_VFP2
24824 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_2 -> QPR_VFP2
24825 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_3 -> QPR_VFP2
24826 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8
24827 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8
24828 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2 -> SPR_8
24829 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_3 -> SPR_8
24830 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4 -> SPR
24831 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_5 -> SPR
24832 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6 -> SPR
24833 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_7 -> SPR
24834 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8 -> SPR
24835 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_9 -> SPR
24836 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_10 -> SPR
24837 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_11 -> SPR
24838 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_12 -> SPR
24839 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_13 -> SPR
24840 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_14 -> SPR
24841 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_15 -> SPR
24842 65, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8
24843 97, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8
24844 65, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8
24845 96, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24846 71, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8
24847 104, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8
24848 0, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24849 104, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_0_in_DPR_8
24850 0, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24851 123, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24852 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4
24853 92, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24854 103, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8
24855 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4
24856 91, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24857 103, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8
24858 70, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2
24859 121, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24860 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4
24861 92, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24862 64, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4
24863 91, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24864 70, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2
24865 119, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR
24866 },
24867 { // MQQQQPR_with_dsub_2_in_DPR_8
24868 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8
24869 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8
24870 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8
24871 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8
24872 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2
24873 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5 -> DPR_VFP2
24874 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_6 -> DPR_VFP2
24875 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_7 -> DPR_VFP2
24876 0, // MQQQQPR_with_dsub_2_in_DPR_8:gsub_0
24877 0, // MQQQQPR_with_dsub_2_in_DPR_8:gsub_1
24878 125, // MQQQQPR_with_dsub_2_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8
24879 119, // MQQQQPR_with_dsub_2_in_DPR_8:qqsub_1 -> MQQPR
24880 75, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8
24881 75, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_1 -> QPR_8
24882 73, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_2 -> QPR_VFP2
24883 73, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_3 -> QPR_VFP2
24884 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8
24885 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8
24886 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8
24887 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8
24888 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8
24889 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8
24890 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8
24891 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8
24892 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8 -> SPR
24893 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_9 -> SPR
24894 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_10 -> SPR
24895 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_11 -> SPR
24896 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_12 -> SPR
24897 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_13 -> SPR
24898 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_14 -> SPR
24899 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_15 -> SPR
24900 66, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24901 98, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
24902 66, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
24903 99, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24904 74, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
24905 105, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8
24906 0, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24907 105, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_2_in_DPR_8
24908 0, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24909 126, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24910 65, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8
24911 97, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR_8
24912 104, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_0_in_DPR_8
24913 65, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_0_in_DPR_8
24914 96, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24915 104, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_0_in_DPR_8
24916 71, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_0_in_DPR_8
24917 123, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24918 64, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4
24919 92, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
24920 64, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4
24921 91, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24922 70, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2
24923 124, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_0_in_QPR_8
24924 },
24925 { // MQQQQPR_with_dsub_4_in_DPR_8
24926 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8
24927 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_1 -> DPR_8
24928 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8
24929 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_3 -> DPR_8
24930 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8
24931 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5 -> DPR_8
24932 52, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_6 -> DPR_VFP2
24933 52, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_7 -> DPR_VFP2
24934 0, // MQQQQPR_with_dsub_4_in_DPR_8:gsub_0
24935 0, // MQQQQPR_with_dsub_4_in_DPR_8:gsub_1
24936 125, // MQQQQPR_with_dsub_4_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8
24937 124, // MQQQQPR_with_dsub_4_in_DPR_8:qqsub_1 -> DQuad_with_qsub_0_in_QPR_8
24938 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_0 -> QPR_8
24939 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_1 -> QPR_8
24940 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_2 -> QPR_8
24941 73, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_3 -> QPR_VFP2
24942 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8
24943 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8
24944 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2 -> SPR_8
24945 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_3 -> SPR_8
24946 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8
24947 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8
24948 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6 -> SPR_8
24949 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_7 -> SPR_8
24950 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8
24951 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8
24952 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_10 -> SPR_8
24953 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_11 -> SPR_8
24954 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_12 -> SPR
24955 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_13 -> SPR
24956 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_14 -> SPR
24957 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_15 -> SPR
24958 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24959 98, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
24960 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
24961 99, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24962 74, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
24963 106, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8
24964 0, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
24965 106, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8
24966 0, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
24967 127, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24968 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8
24969 98, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
24970 105, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_2_in_DPR_8
24971 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_2_in_DPR_8
24972 99, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24973 105, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_2_in_DPR_8
24974 74, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8
24975 126, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
24976 65, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_0_in_DPR_8
24977 97, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR_8
24978 65, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_0_in_DPR_8
24979 96, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
24980 71, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_0_in_DPR_8
24981 125, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_1_in_QPR_8
24982 },
24983 { // MQQQQPR_with_dsub_6_in_DPR_8
24984 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_0 -> DPR_8
24985 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_1 -> DPR_8
24986 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_2 -> DPR_8
24987 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_3 -> DPR_8
24988 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_4 -> DPR_8
24989 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5 -> DPR_8
24990 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_6 -> DPR_8
24991 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_7 -> DPR_8
24992 0, // MQQQQPR_with_dsub_6_in_DPR_8:gsub_0
24993 0, // MQQQQPR_with_dsub_6_in_DPR_8:gsub_1
24994 125, // MQQQQPR_with_dsub_6_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8
24995 125, // MQQQQPR_with_dsub_6_in_DPR_8:qqsub_1 -> DQuad_with_qsub_1_in_QPR_8
24996 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_0 -> QPR_8
24997 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_1 -> QPR_8
24998 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_2 -> QPR_8
24999 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_3 -> QPR_8
25000 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0 -> SPR_8
25001 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_1 -> SPR_8
25002 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2 -> SPR_8
25003 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_3 -> SPR_8
25004 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4 -> SPR_8
25005 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_5 -> SPR_8
25006 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6 -> SPR_8
25007 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_7 -> SPR_8
25008 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8 -> SPR_8
25009 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_9 -> SPR_8
25010 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_10 -> SPR_8
25011 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_11 -> SPR_8
25012 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_12 -> SPR_8
25013 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_13 -> SPR_8
25014 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_14 -> SPR_8
25015 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_15 -> SPR_8
25016 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8
25017 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
25018 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8
25019 99, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
25020 74, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8
25021 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8
25022 0, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13
25023 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8
25024 0, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7
25025 127, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25026 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8
25027 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
25028 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_4_in_DPR_8
25029 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_2_in_DPR_8
25030 99, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
25031 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_4_in_DPR_8
25032 74, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8
25033 127, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25034 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_2_in_DPR_8
25035 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
25036 66, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_2_in_DPR_8
25037 99, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
25038 74, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_1_in_DPR_8
25039 125, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_1_in_QPR_8
25040 },
25041 };
25042 assert(RC && "Missing regclass");
25043 if (!Idx) return RC;
25044 --Idx;
25045 assert(Idx < 56 && "Bad subreg");
25046 unsigned TV = Table[RC->getID()][Idx];
25047 return TV ? getRegClass(TV - 1) : nullptr;
25048}
25049
25050/// Get the weight in units of pressure for this register class.
25051const RegClassWeight &ARMGenRegisterInfo::
25052getRegClassWeight(const TargetRegisterClass *RC) const {
25053 static const RegClassWeight RCWeightTable[] = {
25054 {1, 32}, // HPR
25055 {1, 65}, // FPWithVPR
25056 {1, 32}, // SPR
25057 {2, 32}, // FPWithVPR_with_ssub_0
25058 {1, 16}, // GPR
25059 {1, 16}, // GPRwithAPSR
25060 {1, 16}, // GPRwithZR
25061 {1, 16}, // SPR_8
25062 {1, 15}, // GPRnopc
25063 {1, 15}, // GPRnosp
25064 {1, 15}, // GPRwithAPSR_NZCVnosp
25065 {0, 14}, // GPRwithAPSRnosp
25066 {1, 15}, // GPRwithZRnosp
25067 {1, 14}, // GPRnoip
25068 {1, 14}, // rGPR
25069 {1, 13}, // GPRnoip_and_GPRnopc
25070 {1, 13}, // GPRnoip_and_GPRnosp
25071 {1, 12}, // GPRnoip_and_GPRwithAPSR_NZCVnosp
25072 {1, 9}, // tGPRwithpc
25073 {2, 16}, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8
25074 {1, 8}, // hGPR
25075 {1, 8}, // tGPR
25076 {1, 8}, // tGPREven
25077 {1, 7}, // GPRnopc_and_hGPR
25078 {1, 7}, // GPRnosp_and_hGPR
25079 {1, 6}, // GPRnoip_and_hGPR
25080 {1, 6}, // GPRnoip_and_tGPREven
25081 {1, 6}, // GPRnosp_and_GPRnopc_and_hGPR
25082 {1, 6}, // tGPROdd
25083 {1, 5}, // GPRnopc_and_GPRnoip_and_hGPR
25084 {1, 5}, // GPRnosp_and_GPRnoip_and_hGPR
25085 {1, 5}, // tcGPR
25086 {1, 4}, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR
25087 {1, 4}, // hGPR_and_tGPREven
25088 {1, 4}, // tGPR_and_tGPREven
25089 {1, 4}, // tGPR_and_tGPROdd
25090 {1, 4}, // tcGPRnotr12
25091 {1, 3}, // tGPREven_and_tcGPR
25092 {1, 2}, // hGPR_and_GPRnoip_and_tGPREven
25093 {1, 2}, // hGPR_and_tGPROdd
25094 {1, 2}, // tGPREven_and_tcGPRnotr12
25095 {1, 2}, // tGPROdd_and_tcGPR
25096 {0, 0}, // CCR
25097 {1, 1}, // FPCXTRegs
25098 {1, 1}, // GPRlr
25099 {1, 1}, // GPRsp
25100 {1, 1}, // VCCR
25101 {1, 1}, // cl_FPSCR_NZCV
25102 {1, 1}, // hGPR_and_tGPRwithpc
25103 {1, 1}, // hGPR_and_tcGPR
25104 {2, 64}, // DPR
25105 {2, 32}, // DPR_VFP2
25106 {2, 16}, // DPR_8
25107 {2, 14}, // GPRPair
25108 {2, 12}, // GPRPairnosp
25109 {2, 8}, // GPRPair_with_gsub_0_in_tGPR
25110 {2, 6}, // GPRPair_with_gsub_0_in_hGPR
25111 {2, 6}, // GPRPair_with_gsub_0_in_tcGPR
25112 {2, 4}, // GPRPair_with_gsub_0_in_tcGPRnotr12
25113 {2, 4}, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR
25114 {2, 2}, // GPRPair_with_gsub_1_in_GPRsp
25115 {4, 64}, // DPairSpc
25116 {4, 36}, // DPairSpc_with_ssub_0
25117 {4, 32}, // DPairSpc_with_ssub_4
25118 {4, 20}, // DPairSpc_with_dsub_0_in_DPR_8
25119 {4, 16}, // DPairSpc_with_dsub_2_in_DPR_8
25120 {4, 64}, // DPair
25121 {4, 34}, // DPair_with_ssub_0
25122 {4, 64}, // QPR
25123 {4, 32}, // DPair_with_ssub_2
25124 {4, 18}, // DPair_with_dsub_0_in_DPR_8
25125 {4, 32}, // MQPR
25126 {4, 32}, // QPR_VFP2
25127 {4, 16}, // DPair_with_dsub_1_in_DPR_8
25128 {4, 16}, // QPR_8
25129 {6, 64}, // DTriple
25130 {6, 64}, // DTripleSpc
25131 {6, 40}, // DTripleSpc_with_ssub_0
25132 {6, 36}, // DTriple_with_ssub_0
25133 {6, 62}, // DTriple_with_qsub_0_in_QPR
25134 {6, 34}, // DTriple_with_ssub_2
25135 {6, 62}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25136 {6, 36}, // DTripleSpc_with_ssub_4
25137 {6, 32}, // DTriple_with_ssub_4
25138 {6, 32}, // DTripleSpc_with_ssub_8
25139 {6, 24}, // DTripleSpc_with_dsub_0_in_DPR_8
25140 {6, 20}, // DTriple_with_dsub_0_in_DPR_8
25141 {6, 34}, // DTriple_with_qsub_0_in_MQPR
25142 {6, 34}, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25143 {6, 18}, // DTriple_with_dsub_1_in_DPR_8
25144 {6, 30}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25145 {6, 30}, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR
25146 {6, 20}, // DTripleSpc_with_dsub_2_in_DPR_8
25147 {6, 16}, // DTriple_with_dsub_2_in_DPR_8
25148 {6, 16}, // DTripleSpc_with_dsub_4_in_DPR_8
25149 {6, 18}, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25150 {6, 18}, // DTriple_with_qsub_0_in_QPR_8
25151 {6, 14}, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR
25152 {6, 14}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
25153 {6, 64}, // DQuadSpc
25154 {6, 40}, // DQuadSpc_with_ssub_0
25155 {6, 36}, // DQuadSpc_with_ssub_4
25156 {6, 32}, // DQuadSpc_with_ssub_8
25157 {6, 24}, // DQuadSpc_with_dsub_0_in_DPR_8
25158 {6, 20}, // DQuadSpc_with_dsub_2_in_DPR_8
25159 {6, 16}, // DQuadSpc_with_dsub_4_in_DPR_8
25160 {8, 64}, // DQuad
25161 {8, 38}, // DQuad_with_ssub_0
25162 {8, 36}, // DQuad_with_ssub_2
25163 {8, 64}, // QQPR
25164 {8, 60}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25165 {8, 34}, // DQuad_with_ssub_4
25166 {8, 32}, // DQuad_with_ssub_6
25167 {8, 22}, // DQuad_with_dsub_0_in_DPR_8
25168 {8, 36}, // DQuad_with_qsub_0_in_MQPR
25169 {8, 36}, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25170 {8, 20}, // DQuad_with_dsub_1_in_DPR_8
25171 {8, 32}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25172 {8, 32}, // MQQPR
25173 {8, 18}, // DQuad_with_dsub_2_in_DPR_8
25174 {8, 28}, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25175 {8, 16}, // DQuad_with_dsub_3_in_DPR_8
25176 {8, 20}, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25177 {8, 20}, // DQuad_with_qsub_0_in_QPR_8
25178 {8, 16}, // DQuad_with_qsub_1_in_QPR_8
25179 {8, 16}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8
25180 {8, 12}, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25181 {16, 64}, // QQQQPR
25182 {16, 44}, // QQQQPR_with_ssub_0
25183 {16, 40}, // QQQQPR_with_ssub_4
25184 {16, 36}, // QQQQPR_with_ssub_8
25185 {16, 32}, // MQQQQPR
25186 {16, 28}, // MQQQQPR_with_dsub_0_in_DPR_8
25187 {16, 24}, // MQQQQPR_with_dsub_2_in_DPR_8
25188 {16, 20}, // MQQQQPR_with_dsub_4_in_DPR_8
25189 {16, 16}, // MQQQQPR_with_dsub_6_in_DPR_8
25190 };
25191 return RCWeightTable[RC->getID()];
25192}
25193
25194/// Get the weight in units of pressure for this register unit.
25195unsigned ARMGenRegisterInfo::
25196getRegUnitWeight(unsigned RegUnit) const {
25197 assert(RegUnit < 84 && "invalid register unit");
25198 static const uint8_t RUWeightTable[] = {
25199 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
25200 return RUWeightTable[RegUnit];
25201}
25202
25203
25204// Get the number of dimensions of register pressure.
25205unsigned ARMGenRegisterInfo::getNumRegPressureSets() const {
25206 return 34;
25207}
25208
25209// Get the name of this register unit pressure set.
25210const char *ARMGenRegisterInfo::
25211getRegPressureSetName(unsigned Idx) const {
25212 static const char *PressureNameTable[] = {
25213 "FPCXTRegs",
25214 "GPRlr",
25215 "VCCR",
25216 "cl_FPSCR_NZCV",
25217 "hGPR_and_tGPRwithpc",
25218 "GPRsp",
25219 "tGPROdd",
25220 "tcGPR",
25221 "hGPR",
25222 "tGPROdd_with_tcGPR",
25223 "tGPR",
25224 "tGPR_with_tcGPR",
25225 "tGPREven",
25226 "hGPR_with_tGPREven",
25227 "hGPR_with_tGPROdd",
25228 "hGPR_with_tcGPR",
25229 "tGPR_with_tGPREven",
25230 "GPR",
25231 "GPRwithZR",
25232 "GPRwithAPSR_with_GPRwithZR",
25233 "DQuad_with_dsub_0_in_DPR_8",
25234 "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR",
25235 "HPR",
25236 "DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR",
25237 "DPair_with_ssub_0",
25238 "DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR",
25239 "DPairSpc_with_ssub_0",
25240 "DQuad_with_ssub_0",
25241 "DTripleSpc_with_ssub_0",
25242 "QQQQPR_with_ssub_0",
25243 "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR",
25244 "DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR",
25245 "DTriple_with_qsub_0_in_QPR",
25246 "DPR",
25247 };
25248 return PressureNameTable[Idx];
25249}
25250
25251// Get the register unit pressure limit for this dimension.
25252// This limit must be adjusted dynamically for reserved registers.
25253unsigned ARMGenRegisterInfo::
25254getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
25255 static const uint8_t PressureLimitTable[] = {
25256 1, // 0: FPCXTRegs
25257 1, // 1: GPRlr
25258 1, // 2: VCCR
25259 1, // 3: cl_FPSCR_NZCV
25260 1, // 4: hGPR_and_tGPRwithpc
25261 2, // 5: GPRsp
25262 6, // 6: tGPROdd
25263 6, // 7: tcGPR
25264 8, // 8: hGPR
25265 10, // 9: tGPROdd_with_tcGPR
25266 11, // 10: tGPR
25267 11, // 11: tGPR_with_tcGPR
25268 11, // 12: tGPREven
25269 12, // 13: hGPR_with_tGPREven
25270 12, // 14: hGPR_with_tGPROdd
25271 12, // 15: hGPR_with_tcGPR
25272 13, // 16: tGPR_with_tGPREven
25273 17, // 17: GPR
25274 17, // 18: GPRwithZR
25275 17, // 19: GPRwithAPSR_with_GPRwithZR
25276 24, // 20: DQuad_with_dsub_0_in_DPR_8
25277 32, // 21: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR
25278 32, // 22: HPR
25279 34, // 23: DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25280 34, // 24: DPair_with_ssub_0
25281 36, // 25: DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25282 36, // 26: DPairSpc_with_ssub_0
25283 38, // 27: DQuad_with_ssub_0
25284 40, // 28: DTripleSpc_with_ssub_0
25285 44, // 29: QQQQPR_with_ssub_0
25286 60, // 30: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25287 62, // 31: DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR
25288 62, // 32: DTriple_with_qsub_0_in_QPR
25289 64, // 33: DPR
25290 };
25291 return PressureLimitTable[Idx];
25292}
25293
25294/// Table of pressure sets per register class or unit.
25295static const int RCSetsTable[] = {
25296 /* 0 */ 0, -1,
25297 /* 2 */ 2, -1,
25298 /* 4 */ 3, -1,
25299 /* 6 */ 8, 13, 14, 15, 17, 18, -1,
25300 /* 13 */ 10, 11, 16, 17, 18, -1,
25301 /* 19 */ 4, 8, 10, 11, 13, 14, 15, 16, 17, 18, -1,
25302 /* 30 */ 17, 19, -1,
25303 /* 33 */ 6, 9, 10, 14, 17, 18, 19, -1,
25304 /* 41 */ 7, 9, 11, 12, 15, 17, 18, 19, -1,
25305 /* 50 */ 8, 13, 14, 15, 17, 18, 19, -1,
25306 /* 58 */ 6, 8, 9, 10, 13, 14, 15, 17, 18, 19, -1,
25307 /* 69 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 17, 18, 19, -1,
25308 /* 82 */ 10, 11, 16, 17, 18, 19, -1,
25309 /* 89 */ 10, 11, 12, 13, 16, 17, 18, 19, -1,
25310 /* 98 */ 6, 9, 10, 11, 14, 16, 17, 18, 19, -1,
25311 /* 108 */ 7, 9, 11, 12, 15, 16, 17, 18, 19, -1,
25312 /* 118 */ 7, 9, 10, 11, 12, 15, 16, 17, 18, 19, -1,
25313 /* 129 */ 7, 9, 11, 12, 13, 15, 16, 17, 18, 19, -1,
25314 /* 140 */ 7, 9, 10, 11, 12, 13, 15, 16, 17, 18, 19, -1,
25315 /* 152 */ 6, 7, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, -1,
25316 /* 165 */ 1, 8, 12, 13, 14, 15, 16, 17, 18, 19, -1,
25317 /* 176 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19, -1,
25318 /* 190 */ 31, 33, -1,
25319 /* 193 */ 20, 22, 24, 26, 27, 28, 29, 32, 33, -1,
25320 /* 203 */ 25, 27, 28, 29, 30, 31, 32, 33, -1,
25321 /* 212 */ 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1,
25322 /* 223 */ 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1,
25323 /* 236 */ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1,
25324};
25325
25326/// Get the dimensions of register pressure impacted by this register class.
25327/// Returns a -1 terminated array of pressure set IDs
25328const int *ARMGenRegisterInfo::
25329getRegClassPressureSets(const TargetRegisterClass *RC) const {
25330 static const uint8_t RCSetStartTable[] = {
25331 194,1,194,1,10,30,38,193,37,10,1,1,38,10,37,37,10,37,13,1,6,82,91,50,6,6,91,50,33,50,6,108,50,166,89,98,118,129,166,58,140,152,1,0,165,69,2,4,19,176,191,194,193,37,37,82,50,41,118,50,69,191,196,194,193,193,191,195,191,194,193,194,194,193,193,191,191,198,196,200,195,190,196,194,194,193,193,195,212,193,237,194,193,193,193,236,193,193,236,191,198,196,194,193,193,193,191,197,196,191,207,195,194,193,196,203,193,223,194,193,237,193,236,193,193,236,236,191,199,198,196,194,194,193,193,193,};
25332 return &RCSetsTable[RCSetStartTable[RC->getID()]];
25333}
25334
25335/// Get the dimensions of register pressure impacted by this register unit.
25336/// Returns a -1 terminated array of pressure set IDs
25337const int *ARMGenRegisterInfo::
25338getRegUnitPressureSets(unsigned RegUnit) const {
25339 assert(RegUnit < 84 && "invalid register unit");
25340 static const uint8_t RUSetStartTable[] = {
25341 1,30,1,0,1,1,1,4,1,1,1,165,19,1,69,1,2,38,193,193,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,237,237,237,237,237,237,237,223,212,203,205,206,206,207,207,207,207,207,207,207,207,207,190,1,1,1,1,1,140,152,140,152,89,98,89,98,166,58,166,58,176,};
25342 return &RCSetsTable[RUSetStartTable[RegUnit]];
25343}
25344
25345extern const MCRegisterDesc ARMRegDesc[];
25346extern const int16_t ARMRegDiffLists[];
25347extern const LaneBitmask ARMLaneMaskLists[];
25348extern const char ARMRegStrings[];
25349extern const char ARMRegClassStrings[];
25350extern const MCPhysReg ARMRegUnitRoots[][2];
25351extern const uint16_t ARMSubRegIdxLists[];
25352extern const uint16_t ARMRegEncodingTable[];
25353// ARM Dwarf<->LLVM register mappings.
25354extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[];
25355extern const unsigned ARMDwarfFlavour0Dwarf2LSize;
25356
25357extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[];
25358extern const unsigned ARMEHFlavour0Dwarf2LSize;
25359
25360extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[];
25361extern const unsigned ARMDwarfFlavour0L2DwarfSize;
25362
25363extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[];
25364extern const unsigned ARMEHFlavour0L2DwarfSize;
25365
25366ARMGenRegisterInfo::
25367ARMGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
25368 unsigned PC, unsigned HwMode)
25369 : TargetRegisterInfo(&ARMRegInfoDesc, RegisterClasses, RegisterClasses+136,
25370 SubRegIndexNameTable, SubRegIdxRangeTable, SubRegIndexLaneMaskTable,
25371 LaneBitmask(0xFFFFFFFFFFFFFFFF), RegClassInfos, VTLists, HwMode) {
25372 InitMCRegisterInfo(ARMRegDesc, 296, RA, PC,
25373 ARMMCRegisterClasses, 136,
25374 ARMRegUnitRoots,
25375 84,
25376 ARMRegDiffLists,
25377 ARMLaneMaskLists,
25378 ARMRegStrings,
25379 ARMRegClassStrings,
25380 ARMSubRegIdxLists,
25381 57,
25382 ARMRegEncodingTable);
25383
25384 switch (DwarfFlavour) {
25385 default:
25386 llvm_unreachable("Unknown DWARF flavour");
25387 case 0:
25388 mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false);
25389 break;
25390 }
25391 switch (EHFlavour) {
25392 default:
25393 llvm_unreachable("Unknown DWARF flavour");
25394 case 0:
25395 mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true);
25396 break;
25397 }
25398 switch (DwarfFlavour) {
25399 default:
25400 llvm_unreachable("Unknown DWARF flavour");
25401 case 0:
25402 mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false);
25403 break;
25404 }
25405 switch (EHFlavour) {
25406 default:
25407 llvm_unreachable("Unknown DWARF flavour");
25408 case 0:
25409 mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true);
25410 break;
25411 }
25412}
25413
25414static const MCPhysReg CSR_AAPCS_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25415static const uint32_t CSR_AAPCS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25416static const MCPhysReg CSR_AAPCS_SplitPush_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25417static const uint32_t CSR_AAPCS_SplitPush_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25418static const MCPhysReg CSR_AAPCS_SwiftError_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25419static const uint32_t CSR_AAPCS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25420static const MCPhysReg CSR_AAPCS_SwiftTail_SaveList[] = { ARM::LR, ARM::R11, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25421static const uint32_t CSR_AAPCS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25422static const MCPhysReg CSR_AAPCS_ThisReturn_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 };
25423static const uint32_t CSR_AAPCS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe201, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25424static const MCPhysReg CSR_ATPCS_SplitPush_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25425static const uint32_t CSR_ATPCS_SplitPush_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25426static const MCPhysReg CSR_ATPCS_SplitPush_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25427static const uint32_t CSR_ATPCS_SplitPush_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25428static const MCPhysReg CSR_ATPCS_SplitPush_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25429static const uint32_t CSR_ATPCS_SplitPush_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25430static const MCPhysReg CSR_FIQ_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 };
25431static const uint32_t CSR_FIQ_RegMask[] = { 0x00002000, 0x00000000, 0x0011fe00, 0x00000000, 0x00000000, 0x000f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
25432static const MCPhysReg CSR_FPRegs_SaveList[] = { ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, 0 };
25433static const uint32_t CSR_FPRegs_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffc001ff, 0xffffffff, 0xffffffff, 0xff80ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, };
25434static const MCPhysReg CSR_GenericInt_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 };
25435static const uint32_t CSR_GenericInt_RegMask[] = { 0x00002000, 0x00000000, 0x003ffe00, 0x00000000, 0x00000000, 0x003f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
25436static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
25437static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
25438static const MCPhysReg CSR_Win_AAPCS_CFGuard_Check_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 };
25439static const uint32_t CSR_Win_AAPCS_CFGuard_Check_RegMask[] = { 0xfff02000, 0xfe00000f, 0xffdfe001, 0xffffffff, 0x07f0000f, 0xffbc00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, };
25440static const MCPhysReg CSR_Win_SplitFP_SaveList[] = { ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::LR, ARM::R11, 0 };
25441static const uint32_t CSR_Win_SplitFP_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25442static const MCPhysReg CSR_iOS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25443static const uint32_t CSR_iOS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25444static const MCPhysReg CSR_iOS_CXX_TLS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R12, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 };
25445static const uint32_t CSR_iOS_CXX_TLS_RegMask[] = { 0xfff02000, 0xfe0fffff, 0xfffffdff, 0xffffffff, 0xffffffff, 0xffbeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, };
25446static const MCPhysReg CSR_iOS_CXX_TLS_PE_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R7, ARM::R5, ARM::R4, 0 };
25447static const uint32_t CSR_iOS_CXX_TLS_PE_RegMask[] = { 0x00002000, 0x00000000, 0x00316000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
25448static const MCPhysReg CSR_iOS_CXX_TLS_ViaCopy_SaveList[] = { ARM::R6, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 };
25449static const uint32_t CSR_iOS_CXX_TLS_ViaCopy_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffce9dff, 0xffffffff, 0xffffffff, 0xff92ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, };
25450static const MCPhysReg CSR_iOS_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25451static const uint32_t CSR_iOS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x0019e001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25452static const MCPhysReg CSR_iOS_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 };
25453static const uint32_t CSR_iOS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0013e001, 0xc03fffc0, 0x0700000f, 0x800c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25454static const MCPhysReg CSR_iOS_TLSCall_SaveList[] = { ARM::LR, ARM::SP, ARM::R11, ARM::R10, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 };
25455static const uint32_t CSR_iOS_TLSCall_RegMask[] = { 0xfff12000, 0xfe0fffff, 0xffdbfdff, 0xffffffff, 0xffffffff, 0xffaeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, };
25456static const MCPhysReg CSR_iOS_ThisReturn_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 };
25457static const uint32_t CSR_iOS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be201, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, };
25458
25459
25460ArrayRef<const uint32_t *> ARMGenRegisterInfo::getRegMasks() const {
25461 static const uint32_t *const Masks[] = {
25462 CSR_AAPCS_RegMask,
25463 CSR_AAPCS_SplitPush_RegMask,
25464 CSR_AAPCS_SwiftError_RegMask,
25465 CSR_AAPCS_SwiftTail_RegMask,
25466 CSR_AAPCS_ThisReturn_RegMask,
25467 CSR_ATPCS_SplitPush_RegMask,
25468 CSR_ATPCS_SplitPush_SwiftError_RegMask,
25469 CSR_ATPCS_SplitPush_SwiftTail_RegMask,
25470 CSR_FIQ_RegMask,
25471 CSR_FPRegs_RegMask,
25472 CSR_GenericInt_RegMask,
25473 CSR_NoRegs_RegMask,
25474 CSR_Win_AAPCS_CFGuard_Check_RegMask,
25475 CSR_Win_SplitFP_RegMask,
25476 CSR_iOS_RegMask,
25477 CSR_iOS_CXX_TLS_RegMask,
25478 CSR_iOS_CXX_TLS_PE_RegMask,
25479 CSR_iOS_CXX_TLS_ViaCopy_RegMask,
25480 CSR_iOS_SwiftError_RegMask,
25481 CSR_iOS_SwiftTail_RegMask,
25482 CSR_iOS_TLSCall_RegMask,
25483 CSR_iOS_ThisReturn_RegMask,
25484 };
25485 return ArrayRef(Masks);
25486}
25487
25488bool ARMGenRegisterInfo::
25489isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
25490 return
25491 false;
25492}
25493
25494bool ARMGenRegisterInfo::
25495isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
25496 return
25497 false;
25498}
25499
25500bool ARMGenRegisterInfo::
25501isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
25502 return
25503 false;
25504}
25505
25506bool ARMGenRegisterInfo::
25507isConstantPhysReg(MCRegister PhysReg) const {
25508 return
25509 false;
25510}
25511
25512ArrayRef<const char *> ARMGenRegisterInfo::getRegMaskNames() const {
25513 static const char *Names[] = {
25514 "CSR_AAPCS",
25515 "CSR_AAPCS_SplitPush",
25516 "CSR_AAPCS_SwiftError",
25517 "CSR_AAPCS_SwiftTail",
25518 "CSR_AAPCS_ThisReturn",
25519 "CSR_ATPCS_SplitPush",
25520 "CSR_ATPCS_SplitPush_SwiftError",
25521 "CSR_ATPCS_SplitPush_SwiftTail",
25522 "CSR_FIQ",
25523 "CSR_FPRegs",
25524 "CSR_GenericInt",
25525 "CSR_NoRegs",
25526 "CSR_Win_AAPCS_CFGuard_Check",
25527 "CSR_Win_SplitFP",
25528 "CSR_iOS",
25529 "CSR_iOS_CXX_TLS",
25530 "CSR_iOS_CXX_TLS_PE",
25531 "CSR_iOS_CXX_TLS_ViaCopy",
25532 "CSR_iOS_SwiftError",
25533 "CSR_iOS_SwiftTail",
25534 "CSR_iOS_TLSCall",
25535 "CSR_iOS_ThisReturn",
25536 };
25537 return ArrayRef(Names);
25538}
25539
25540const ARMFrameLowering *
25541ARMGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
25542 return static_cast<const ARMFrameLowering *>(
25543 MF.getSubtarget().getFrameLowering());
25544}
25545
25546} // end namespace llvm
25547
25548#endif // GET_REGINFO_TARGET_DESC
25549
25550