1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Subtarget Enumeration Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_SUBTARGETINFO_ENUM
11#undef GET_SUBTARGETINFO_ENUM
12
13namespace llvm {
14namespace AVR {
15enum {
16 ELFArchAVR1 = 0,
17 ELFArchAVR2 = 1,
18 ELFArchAVR3 = 2,
19 ELFArchAVR4 = 3,
20 ELFArchAVR5 = 4,
21 ELFArchAVR6 = 5,
22 ELFArchAVR25 = 6,
23 ELFArchAVR31 = 7,
24 ELFArchAVR35 = 8,
25 ELFArchAVR51 = 9,
26 ELFArchTiny = 10,
27 ELFArchXMEGA1 = 11,
28 ELFArchXMEGA2 = 12,
29 ELFArchXMEGA3 = 13,
30 ELFArchXMEGA4 = 14,
31 ELFArchXMEGA5 = 15,
32 ELFArchXMEGA6 = 16,
33 ELFArchXMEGA7 = 17,
34 FamilyAVR0 = 18,
35 FamilyAVR1 = 19,
36 FamilyAVR2 = 20,
37 FamilyAVR3 = 21,
38 FamilyAVR4 = 22,
39 FamilyAVR5 = 23,
40 FamilyAVR6 = 24,
41 FamilyAVR25 = 25,
42 FamilyAVR31 = 26,
43 FamilyAVR35 = 27,
44 FamilyAVR51 = 28,
45 FamilyTiny = 29,
46 FamilyXMEGA = 30,
47 FamilyXMEGA3 = 31,
48 FamilyXMEGAU = 32,
49 FeatureADDSUBIW = 33,
50 FeatureBREAK = 34,
51 FeatureDES = 35,
52 FeatureEIJMPCALL = 36,
53 FeatureELPM = 37,
54 FeatureELPMX = 38,
55 FeatureIJMPCALL = 39,
56 FeatureJMPCALL = 40,
57 FeatureLPM = 41,
58 FeatureLPMX = 42,
59 FeatureLowByteFirst = 43,
60 FeatureMMR = 44,
61 FeatureMOVW = 45,
62 FeatureMultiplication = 46,
63 FeatureRMW = 47,
64 FeatureSPM = 48,
65 FeatureSPMX = 49,
66 FeatureSRAM = 50,
67 FeatureSetSpecial = 51,
68 FeatureSmallStack = 52,
69 FeatureTinyEncoding = 53,
70 NumSubtargetFeatures = 54
71};
72} // end namespace AVR
73} // end namespace llvm
74
75#endif // GET_SUBTARGETINFO_ENUM
76
77
78#ifdef GET_SUBTARGETINFO_MACRO
79GET_SUBTARGETINFO_MACRO(HasADDSUBIW, false, hasADDSUBIW)
80GET_SUBTARGETINFO_MACRO(HasBREAK, false, hasBREAK)
81GET_SUBTARGETINFO_MACRO(HasDES, false, hasDES)
82GET_SUBTARGETINFO_MACRO(HasEIJMPCALL, false, hasEIJMPCALL)
83GET_SUBTARGETINFO_MACRO(HasELPM, false, hasELPM)
84GET_SUBTARGETINFO_MACRO(HasELPMX, false, hasELPMX)
85GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR0, false, hasFeatureSetFamilyAVR0)
86GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR1, false, hasFeatureSetFamilyAVR1)
87GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR2, false, hasFeatureSetFamilyAVR2)
88GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR25, false, hasFeatureSetFamilyAVR25)
89GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR3, false, hasFeatureSetFamilyAVR3)
90GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR31, false, hasFeatureSetFamilyAVR31)
91GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR35, false, hasFeatureSetFamilyAVR35)
92GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR4, false, hasFeatureSetFamilyAVR4)
93GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR5, false, hasFeatureSetFamilyAVR5)
94GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR51, false, hasFeatureSetFamilyAVR51)
95GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR6, false, hasFeatureSetFamilyAVR6)
96GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyTiny, false, hasFeatureSetFamilyTiny)
97GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGA, false, hasFeatureSetFamilyXMEGA)
98GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGA3, false, hasFeatureSetFamilyXMEGA3)
99GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGAU, false, hasFeatureSetFamilyXMEGAU)
100GET_SUBTARGETINFO_MACRO(HasFeatureSetFeatureSetSpecial, false, hasFeatureSetFeatureSetSpecial)
101GET_SUBTARGETINFO_MACRO(HasJMPCALL, false, hasJMPCALL)
102GET_SUBTARGETINFO_MACRO(HasLPM, false, hasLPM)
103GET_SUBTARGETINFO_MACRO(HasLPMX, false, hasLPMX)
104GET_SUBTARGETINFO_MACRO(HasLowByteFirst, false, hasLowByteFirst)
105GET_SUBTARGETINFO_MACRO(HasMOVW, false, hasMOVW)
106GET_SUBTARGETINFO_MACRO(HasMemMappedGPR, false, hasMemMappedGPR)
107GET_SUBTARGETINFO_MACRO(HasSPM, false, hasSPM)
108GET_SUBTARGETINFO_MACRO(HasSPMX, false, hasSPMX)
109GET_SUBTARGETINFO_MACRO(HasSRAM, false, hasSRAM)
110GET_SUBTARGETINFO_MACRO(HasSRAMIJMPCALL, false, hasSRAMIJMPCALL)
111GET_SUBTARGETINFO_MACRO(HasSmallStack, false, hasSmallStack)
112GET_SUBTARGETINFO_MACRO(HasTinyEncoding, false, hasTinyEncoding)
113GET_SUBTARGETINFO_MACRO(SupportsMultiplication, false, supportsMultiplication)
114GET_SUBTARGETINFO_MACRO(SupportsRMW, false, supportsRMW)
115#undef GET_SUBTARGETINFO_MACRO
116#endif // GET_SUBTARGETINFO_MACRO
117
118
119#ifdef GET_SUBTARGETINFO_MC_DESC
120#undef GET_SUBTARGETINFO_MC_DESC
121
122namespace llvm {
123// Sorted (by key) array of values for CPU features.
124extern const llvm::SubtargetFeatureKV AVRFeatureKV[] = {
125 { "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", AVR::FeatureADDSUBIW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
126 { "avr0", "The device is a part of the avr0 family", AVR::FamilyAVR0, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
127 { "avr1", "The device is a part of the avr1 family", AVR::FamilyAVR1, { { { 0x120000040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
128 { "avr2", "The device is a part of the avr2 family", AVR::FamilyAVR2, { { { 0x4008200080000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
129 { "avr25", "The device is a part of the avr25 family", AVR::FamilyAVR25, { { { 0x1240400100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
130 { "avr3", "The device is a part of the avr3 family", AVR::FamilyAVR3, { { { 0x10000100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
131 { "avr31", "The device is a part of the avr31 family", AVR::FamilyAVR31, { { { 0x2000200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
132 { "avr35", "The device is a part of the avr35 family", AVR::FamilyAVR35, { { { 0x1240400200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
133 { "avr4", "The device is a part of the avr4 family", AVR::FamilyAVR4, { { { 0x1640400100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
134 { "avr5", "The device is a part of the avr5 family", AVR::FamilyAVR5, { { { 0x1640400200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
135 { "avr51", "The device is a part of the avr51 family", AVR::FamilyAVR51, { { { 0x6000800000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
136 { "avr6", "The device is a part of the avr6 family", AVR::FamilyAVR6, { { { 0x1010000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
137 { "avrtiny", "The device is a part of the avrtiny family", AVR::FamilyTiny, { { { 0x34000400040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
138 { "break", "The device supports the `BREAK` debugging instruction", AVR::FeatureBREAK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
139 { "des", "The device supports the `DES k` encryption instruction", AVR::FeatureDES, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
140 { "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", AVR::FeatureEIJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
141 { "elpm", "The device supports the ELPM instruction", AVR::FeatureELPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
142 { "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", AVR::FeatureELPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
143 { "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", AVR::FeatureIJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
144 { "jmpcall", "The device supports the `JMP` and `CALL` instructions", AVR::FeatureJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
145 { "lowbytefirst", "Do the low byte first when writing a 16-bit port or storing a 16-bit word", AVR::FeatureLowByteFirst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
146 { "lpm", "The device supports the `LPM` instruction", AVR::FeatureLPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
147 { "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", AVR::FeatureLPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
148 { "memmappedregs", "The device has CPU registers mapped in data address space", AVR::FeatureMMR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
149 { "movw", "The device supports the 16-bit MOVW instruction", AVR::FeatureMOVW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
150 { "mul", "The device supports the multiplication instructions", AVR::FeatureMultiplication, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
151 { "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", AVR::FeatureRMW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
152 { "smallstack", "The device has an 8-bit stack pointer", AVR::FeatureSmallStack, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
153 { "special", "Enable use of the entire instruction set - used for debugging", AVR::FeatureSetSpecial, { { { 0x7f7fe00000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
154 { "spm", "The device supports the `SPM` instruction", AVR::FeatureSPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
155 { "spmx", "The device supports the `SPM Z+` instruction", AVR::FeatureSPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
156 { "sram", "The device has random access memory", AVR::FeatureSRAM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
157 { "tinyencoding", "The device has Tiny core specific instruction encodings", AVR::FeatureTinyEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
158 { "xmega", "The device is a part of the xmega family", AVR::FamilyXMEGA, { { { 0x76ffe00040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
159 { "xmega3", "The device is a part of the xmega3 family", AVR::FamilyXMEGA3, { { { 0x46f8600040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
160 { "xmegau", "The device is a part of the xmegau family", AVR::FamilyXMEGAU, { { { 0x800040000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },
161};
162
163#ifdef DBGFIELD
164#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
165#endif
166#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
167#define DBGFIELD(x) x,
168#else
169#define DBGFIELD(x)
170#endif
171
172// ===============================================================
173// Data tables for the new per-operand machine model.
174
175// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}
176extern const llvm::MCWriteProcResEntry AVRWriteProcResTable[] = {
177 { 0, 0, 0 }, // Invalid
178}; // AVRWriteProcResTable
179
180// {Cycles, WriteResourceID}
181extern const llvm::MCWriteLatencyEntry AVRWriteLatencyTable[] = {
182 { 0, 0}, // Invalid
183}; // AVRWriteLatencyTable
184
185// {UseIdx, WriteResourceID, Cycles}
186extern const llvm::MCReadAdvanceEntry AVRReadAdvanceTable[] = {
187 {0, 0, 0}, // Invalid
188}; // AVRReadAdvanceTable
189
190#undef DBGFIELD
191
192static const llvm::MCSchedModel NoSchedModel = {
193 MCSchedModel::DefaultIssueWidth,
194 MCSchedModel::DefaultMicroOpBufferSize,
195 MCSchedModel::DefaultLoopMicroOpBufferSize,
196 MCSchedModel::DefaultLoadLatency,
197 MCSchedModel::DefaultHighLatency,
198 MCSchedModel::DefaultMispredictPenalty,
199 false, // PostRAScheduler
200 false, // CompleteModel
201 false, // EnableIntervals
202 0, // Processor ID
203 nullptr, nullptr, 0, 0, // No instruction-level machine model.
204 nullptr, // No Itinerary
205 nullptr // No extra processor descriptor
206};
207
208// Sorted (by key) array of values for CPU subtype.
209extern const llvm::SubtargetSubTypeKV AVRSubTypeKV[] = {
210 { "at43usb320", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
211 { "at43usb355", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
212 { "at76c711", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
213 { "at86rf401", { { { 0x240000100040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
214 { "at90c8534", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
215 { "at90can128", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
216 { "at90can32", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
217 { "at90can64", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
218 { "at90pwm1", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
219 { "at90pwm161", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
220 { "at90pwm2", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
221 { "at90pwm216", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
222 { "at90pwm2b", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
223 { "at90pwm3", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
224 { "at90pwm316", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
225 { "at90pwm3b", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
226 { "at90pwm81", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
227 { "at90s1200", { { { 0x10000000040001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
228 { "at90s2313", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
229 { "at90s2323", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
230 { "at90s2333", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
231 { "at90s2343", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
232 { "at90s4414", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
233 { "at90s4433", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
234 { "at90s4434", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
235 { "at90s8515", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
236 { "at90s8535", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
237 { "at90scr100", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
238 { "at90usb1286", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
239 { "at90usb1287", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
240 { "at90usb162", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
241 { "at90usb646", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
242 { "at90usb647", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
243 { "at90usb82", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
244 { "at94k", { { { 0x640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
245 { "ata5272", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
246 { "ata5505", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
247 { "ata5702m322", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
248 { "ata5782", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
249 { "ata5790", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
250 { "ata5790n", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
251 { "ata5791", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
252 { "ata5795", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
253 { "ata5831", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
254 { "ata6285", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
255 { "ata6286", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
256 { "ata6289", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
257 { "ata6612c", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
258 { "ata6613c", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
259 { "ata6614q", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
260 { "ata6616c", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
261 { "ata6617c", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
262 { "ata664251", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
263 { "ata8210", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
264 { "ata8510", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
265 { "atmega103", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
266 { "atmega128", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
267 { "atmega1280", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
268 { "atmega1281", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
269 { "atmega1284", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
270 { "atmega1284p", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
271 { "atmega1284rfr2", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
272 { "atmega128a", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
273 { "atmega128rfa1", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
274 { "atmega128rfr2", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
275 { "atmega16", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
276 { "atmega1608", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
277 { "atmega1609", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
278 { "atmega161", { { { 0x1640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
279 { "atmega162", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
280 { "atmega163", { { { 0x1640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
281 { "atmega164a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
282 { "atmega164p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
283 { "atmega164pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
284 { "atmega165", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
285 { "atmega165a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
286 { "atmega165p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
287 { "atmega165pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
288 { "atmega168", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
289 { "atmega168a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
290 { "atmega168p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
291 { "atmega168pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
292 { "atmega168pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
293 { "atmega169", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
294 { "atmega169a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
295 { "atmega169p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
296 { "atmega169pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
297 { "atmega16a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
298 { "atmega16hva", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
299 { "atmega16hva2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
300 { "atmega16hvb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
301 { "atmega16hvbrevb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
302 { "atmega16m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
303 { "atmega16u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
304 { "atmega16u4", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
305 { "atmega2560", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
306 { "atmega2561", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
307 { "atmega2564rfr2", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
308 { "atmega256rfr2", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
309 { "atmega32", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
310 { "atmega3208", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
311 { "atmega3209", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
312 { "atmega323", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
313 { "atmega324a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
314 { "atmega324p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
315 { "atmega324pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
316 { "atmega324pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
317 { "atmega325", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
318 { "atmega3250", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
319 { "atmega3250a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
320 { "atmega3250p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
321 { "atmega3250pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
322 { "atmega325a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
323 { "atmega325p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
324 { "atmega325pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
325 { "atmega328", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
326 { "atmega328p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
327 { "atmega328pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
328 { "atmega329", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
329 { "atmega3290", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
330 { "atmega3290a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
331 { "atmega3290p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
332 { "atmega3290pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
333 { "atmega329a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
334 { "atmega329p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
335 { "atmega329pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
336 { "atmega32a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
337 { "atmega32c1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
338 { "atmega32hvb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
339 { "atmega32hvbrevb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
340 { "atmega32m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
341 { "atmega32u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
342 { "atmega32u4", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
343 { "atmega32u6", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
344 { "atmega406", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
345 { "atmega48", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
346 { "atmega4808", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
347 { "atmega4809", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
348 { "atmega48a", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
349 { "atmega48p", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
350 { "atmega48pa", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
351 { "atmega48pb", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
352 { "atmega64", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
353 { "atmega640", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
354 { "atmega644", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
355 { "atmega644a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
356 { "atmega644p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
357 { "atmega644pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
358 { "atmega644rfr2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
359 { "atmega645", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
360 { "atmega6450", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
361 { "atmega6450a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
362 { "atmega6450p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
363 { "atmega645a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
364 { "atmega645p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
365 { "atmega649", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
366 { "atmega6490", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
367 { "atmega6490a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
368 { "atmega6490p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
369 { "atmega649a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
370 { "atmega649p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
371 { "atmega64a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
372 { "atmega64c1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
373 { "atmega64hve", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
374 { "atmega64hve2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
375 { "atmega64m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
376 { "atmega64rfr2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
377 { "atmega8", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
378 { "atmega808", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
379 { "atmega809", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
380 { "atmega8515", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
381 { "atmega8535", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
382 { "atmega88", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
383 { "atmega88a", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
384 { "atmega88p", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
385 { "atmega88pa", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
386 { "atmega88pb", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
387 { "atmega8a", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
388 { "atmega8hva", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
389 { "atmega8u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
390 { "attiny10", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
391 { "attiny102", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
392 { "attiny104", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
393 { "attiny11", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
394 { "attiny12", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
395 { "attiny13", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
396 { "attiny13a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
397 { "attiny15", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
398 { "attiny1604", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
399 { "attiny1606", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
400 { "attiny1607", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
401 { "attiny1614", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
402 { "attiny1616", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
403 { "attiny1617", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
404 { "attiny1624", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
405 { "attiny1626", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
406 { "attiny1627", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
407 { "attiny1634", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
408 { "attiny167", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
409 { "attiny20", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
410 { "attiny202", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
411 { "attiny204", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
412 { "attiny212", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
413 { "attiny214", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
414 { "attiny22", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
415 { "attiny2313", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
416 { "attiny2313a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
417 { "attiny24", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
418 { "attiny24a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
419 { "attiny25", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
420 { "attiny26", { { { 0x10040000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
421 { "attiny261", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
422 { "attiny261a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
423 { "attiny28", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
424 { "attiny3216", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
425 { "attiny3217", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
426 { "attiny4", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
427 { "attiny40", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
428 { "attiny402", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
429 { "attiny404", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
430 { "attiny406", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
431 { "attiny412", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
432 { "attiny414", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
433 { "attiny416", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
434 { "attiny417", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
435 { "attiny4313", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
436 { "attiny43u", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
437 { "attiny44", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
438 { "attiny441", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
439 { "attiny44a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
440 { "attiny45", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
441 { "attiny461", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
442 { "attiny461a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
443 { "attiny48", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
444 { "attiny5", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
445 { "attiny804", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
446 { "attiny806", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
447 { "attiny807", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
448 { "attiny814", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
449 { "attiny816", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
450 { "attiny817", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
451 { "attiny828", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
452 { "attiny84", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
453 { "attiny841", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
454 { "attiny84a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
455 { "attiny85", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
456 { "attiny861", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
457 { "attiny861a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
458 { "attiny87", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
459 { "attiny88", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
460 { "attiny9", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
461 { "atxmega128a1", { { { 0x40020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
462 { "atxmega128a1u", { { { 0x100020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
463 { "atxmega128a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
464 { "atxmega128a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
465 { "atxmega128a4u", { { { 0x100020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
466 { "atxmega128b1", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
467 { "atxmega128b3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
468 { "atxmega128c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
469 { "atxmega128d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
470 { "atxmega128d4", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
471 { "atxmega16a4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
472 { "atxmega16a4u", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
473 { "atxmega16c4", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
474 { "atxmega16d4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
475 { "atxmega16e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
476 { "atxmega192a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
477 { "atxmega192a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
478 { "atxmega192c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
479 { "atxmega192d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
480 { "atxmega256a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
481 { "atxmega256a3b", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
482 { "atxmega256a3bu", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
483 { "atxmega256a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
484 { "atxmega256c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
485 { "atxmega256d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
486 { "atxmega32a4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
487 { "atxmega32a4u", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
488 { "atxmega32c3", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
489 { "atxmega32c4", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
490 { "atxmega32d3", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
491 { "atxmega32d4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
492 { "atxmega32e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
493 { "atxmega384c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
494 { "atxmega384d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
495 { "atxmega64a1", { { { 0x40008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
496 { "atxmega64a1u", { { { 0x100008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
497 { "atxmega64a3", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
498 { "atxmega64a3u", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
499 { "atxmega64a4u", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
500 { "atxmega64b1", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
501 { "atxmega64b3", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
502 { "atxmega64c3", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
503 { "atxmega64d3", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
504 { "atxmega64d4", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
505 { "atxmega8e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
506 { "avr1", { { { 0x80001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
507 { "avr2", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
508 { "avr25", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
509 { "avr3", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
510 { "avr31", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
511 { "avr35", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
512 { "avr4", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
513 { "avr5", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
514 { "avr51", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
515 { "avr6", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
516 { "avrtiny", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
517 { "avrxmega1", { { { 0x40000800ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
518 { "avrxmega2", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
519 { "avrxmega3", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
520 { "avrxmega4", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
521 { "avrxmega5", { { { 0x40008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
522 { "avrxmega6", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
523 { "avrxmega7", { { { 0x40020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
524 { "m3000", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },
525};
526
527namespace AVR_MC {
528unsigned resolveVariantSchedClassImpl(unsigned SchedClass,
529 const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) {
530 // Don't know how to resolve this scheduling class.
531 return 0;
532}
533} // end namespace AVR_MC
534
535struct AVRGenMCSubtargetInfo : public MCSubtargetInfo {
536 AVRGenMCSubtargetInfo(const Triple &TT,
537 StringRef CPU, StringRef TuneCPU, StringRef FS,
538 ArrayRef<SubtargetFeatureKV> PF,
539 ArrayRef<SubtargetSubTypeKV> PD,
540 const MCWriteProcResEntry *WPR,
541 const MCWriteLatencyEntry *WL,
542 const MCReadAdvanceEntry *RA, const InstrStage *IS,
543 const unsigned *OC, const unsigned *FP) :
544 MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD,
545 WPR, WL, RA, IS, OC, FP) { }
546
547 unsigned resolveVariantSchedClass(unsigned SchedClass,
548 const MCInst *MI, const MCInstrInfo *MCII,
549 unsigned CPUID) const override {
550 return AVR_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);
551 }
552};
553
554static inline MCSubtargetInfo *createAVRMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {
555 return new AVRGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AVRFeatureKV, AVRSubTypeKV,
556 AVRWriteProcResTable, AVRWriteLatencyTable, AVRReadAdvanceTable,
557 nullptr, nullptr, nullptr);
558}
559
560} // end namespace llvm
561
562#endif // GET_SUBTARGETINFO_MC_DESC
563
564
565#ifdef GET_SUBTARGETINFO_TARGET_DESC
566#undef GET_SUBTARGETINFO_TARGET_DESC
567
568#include "llvm/Support/Debug.h"
569#include "llvm/Support/raw_ostream.h"
570
571// ParseSubtargetFeatures - Parses features string setting specified
572// subtarget options.
573void llvm::AVRSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {
574 LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
575 LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);
576 LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");
577 InitMCProcessorInfo(CPU, TuneCPU, FS);
578 const FeatureBitset &Bits = getFeatureBits();
579 if (Bits[AVR::ELFArchAVR1] && ELFArch < ELF::EF_AVR_ARCH_AVR1) ELFArch = ELF::EF_AVR_ARCH_AVR1;
580 if (Bits[AVR::ELFArchAVR2] && ELFArch < ELF::EF_AVR_ARCH_AVR2) ELFArch = ELF::EF_AVR_ARCH_AVR2;
581 if (Bits[AVR::ELFArchAVR3] && ELFArch < ELF::EF_AVR_ARCH_AVR3) ELFArch = ELF::EF_AVR_ARCH_AVR3;
582 if (Bits[AVR::ELFArchAVR4] && ELFArch < ELF::EF_AVR_ARCH_AVR4) ELFArch = ELF::EF_AVR_ARCH_AVR4;
583 if (Bits[AVR::ELFArchAVR5] && ELFArch < ELF::EF_AVR_ARCH_AVR5) ELFArch = ELF::EF_AVR_ARCH_AVR5;
584 if (Bits[AVR::ELFArchAVR6] && ELFArch < ELF::EF_AVR_ARCH_AVR6) ELFArch = ELF::EF_AVR_ARCH_AVR6;
585 if (Bits[AVR::ELFArchAVR25] && ELFArch < ELF::EF_AVR_ARCH_AVR25) ELFArch = ELF::EF_AVR_ARCH_AVR25;
586 if (Bits[AVR::ELFArchAVR31] && ELFArch < ELF::EF_AVR_ARCH_AVR31) ELFArch = ELF::EF_AVR_ARCH_AVR31;
587 if (Bits[AVR::ELFArchAVR35] && ELFArch < ELF::EF_AVR_ARCH_AVR35) ELFArch = ELF::EF_AVR_ARCH_AVR35;
588 if (Bits[AVR::ELFArchAVR51] && ELFArch < ELF::EF_AVR_ARCH_AVR51) ELFArch = ELF::EF_AVR_ARCH_AVR51;
589 if (Bits[AVR::ELFArchTiny] && ELFArch < ELF::EF_AVR_ARCH_AVRTINY) ELFArch = ELF::EF_AVR_ARCH_AVRTINY;
590 if (Bits[AVR::ELFArchXMEGA1] && ELFArch < ELF::EF_AVR_ARCH_XMEGA1) ELFArch = ELF::EF_AVR_ARCH_XMEGA1;
591 if (Bits[AVR::ELFArchXMEGA2] && ELFArch < ELF::EF_AVR_ARCH_XMEGA2) ELFArch = ELF::EF_AVR_ARCH_XMEGA2;
592 if (Bits[AVR::ELFArchXMEGA3] && ELFArch < ELF::EF_AVR_ARCH_XMEGA3) ELFArch = ELF::EF_AVR_ARCH_XMEGA3;
593 if (Bits[AVR::ELFArchXMEGA4] && ELFArch < ELF::EF_AVR_ARCH_XMEGA4) ELFArch = ELF::EF_AVR_ARCH_XMEGA4;
594 if (Bits[AVR::ELFArchXMEGA5] && ELFArch < ELF::EF_AVR_ARCH_XMEGA5) ELFArch = ELF::EF_AVR_ARCH_XMEGA5;
595 if (Bits[AVR::ELFArchXMEGA6] && ELFArch < ELF::EF_AVR_ARCH_XMEGA6) ELFArch = ELF::EF_AVR_ARCH_XMEGA6;
596 if (Bits[AVR::ELFArchXMEGA7] && ELFArch < ELF::EF_AVR_ARCH_XMEGA7) ELFArch = ELF::EF_AVR_ARCH_XMEGA7;
597 if (Bits[AVR::FamilyAVR0]) HasFeatureSetFamilyAVR0 = true;
598 if (Bits[AVR::FamilyAVR1]) HasFeatureSetFamilyAVR1 = true;
599 if (Bits[AVR::FamilyAVR2]) HasFeatureSetFamilyAVR2 = true;
600 if (Bits[AVR::FamilyAVR3]) HasFeatureSetFamilyAVR3 = true;
601 if (Bits[AVR::FamilyAVR4]) HasFeatureSetFamilyAVR4 = true;
602 if (Bits[AVR::FamilyAVR5]) HasFeatureSetFamilyAVR5 = true;
603 if (Bits[AVR::FamilyAVR6]) HasFeatureSetFamilyAVR6 = true;
604 if (Bits[AVR::FamilyAVR25]) HasFeatureSetFamilyAVR25 = true;
605 if (Bits[AVR::FamilyAVR31]) HasFeatureSetFamilyAVR31 = true;
606 if (Bits[AVR::FamilyAVR35]) HasFeatureSetFamilyAVR35 = true;
607 if (Bits[AVR::FamilyAVR51]) HasFeatureSetFamilyAVR51 = true;
608 if (Bits[AVR::FamilyTiny]) HasFeatureSetFamilyTiny = true;
609 if (Bits[AVR::FamilyXMEGA]) HasFeatureSetFamilyXMEGA = true;
610 if (Bits[AVR::FamilyXMEGA3]) HasFeatureSetFamilyXMEGA3 = true;
611 if (Bits[AVR::FamilyXMEGAU]) HasFeatureSetFamilyXMEGAU = true;
612 if (Bits[AVR::FeatureADDSUBIW]) HasADDSUBIW = true;
613 if (Bits[AVR::FeatureBREAK]) HasBREAK = true;
614 if (Bits[AVR::FeatureDES]) HasDES = true;
615 if (Bits[AVR::FeatureEIJMPCALL]) HasEIJMPCALL = true;
616 if (Bits[AVR::FeatureELPM]) HasELPM = true;
617 if (Bits[AVR::FeatureELPMX]) HasELPMX = true;
618 if (Bits[AVR::FeatureIJMPCALL]) HasSRAMIJMPCALL = true;
619 if (Bits[AVR::FeatureJMPCALL]) HasJMPCALL = true;
620 if (Bits[AVR::FeatureLPM]) HasLPM = true;
621 if (Bits[AVR::FeatureLPMX]) HasLPMX = true;
622 if (Bits[AVR::FeatureLowByteFirst]) HasLowByteFirst = true;
623 if (Bits[AVR::FeatureMMR]) HasMemMappedGPR = true;
624 if (Bits[AVR::FeatureMOVW]) HasMOVW = true;
625 if (Bits[AVR::FeatureMultiplication]) SupportsMultiplication = true;
626 if (Bits[AVR::FeatureRMW]) SupportsRMW = true;
627 if (Bits[AVR::FeatureSPM]) HasSPM = true;
628 if (Bits[AVR::FeatureSPMX]) HasSPMX = true;
629 if (Bits[AVR::FeatureSRAM]) HasSRAM = true;
630 if (Bits[AVR::FeatureSetSpecial]) HasFeatureSetFeatureSetSpecial = true;
631 if (Bits[AVR::FeatureSmallStack]) HasSmallStack = true;
632 if (Bits[AVR::FeatureTinyEncoding]) HasTinyEncoding = true;
633}
634#endif // GET_SUBTARGETINFO_TARGET_DESC
635
636
637#ifdef GET_SUBTARGETINFO_HEADER
638#undef GET_SUBTARGETINFO_HEADER
639
640namespace llvm {
641class DFAPacketizer;
642namespace AVR_MC {
643unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID);
644} // end namespace AVR_MC
645
646struct AVRGenSubtargetInfo : public TargetSubtargetInfo {
647 explicit AVRGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);
648public:
649 unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const override;
650 unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const override;
651 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
652};
653} // end namespace llvm
654
655#endif // GET_SUBTARGETINFO_HEADER
656
657
658#ifdef GET_SUBTARGETINFO_CTOR
659#undef GET_SUBTARGETINFO_CTOR
660
661#include "llvm/CodeGen/TargetSchedule.h"
662
663namespace llvm {
664extern const llvm::SubtargetFeatureKV AVRFeatureKV[];
665extern const llvm::SubtargetSubTypeKV AVRSubTypeKV[];
666extern const llvm::MCWriteProcResEntry AVRWriteProcResTable[];
667extern const llvm::MCWriteLatencyEntry AVRWriteLatencyTable[];
668extern const llvm::MCReadAdvanceEntry AVRReadAdvanceTable[];
669AVRGenSubtargetInfo::AVRGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)
670 : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AVRFeatureKV, 36), ArrayRef(AVRSubTypeKV, 315),
671 AVRWriteProcResTable, AVRWriteLatencyTable, AVRReadAdvanceTable,
672 nullptr, nullptr, nullptr) {}
673
674unsigned AVRGenSubtargetInfo
675::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
676 report_fatal_error("Expected a variant SchedClass");
677} // AVRGenSubtargetInfo::resolveSchedClass
678
679unsigned AVRGenSubtargetInfo
680::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {
681 return AVR_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);
682} // AVRGenSubtargetInfo::resolveVariantSchedClass
683
684} // end namespace llvm
685
686#endif // GET_SUBTARGETINFO_CTOR
687
688
689#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
690#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
691
692#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS
693
694
695#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
696#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
697
698#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
699
700