1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* * Lanai Disassembler *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#include "llvm/MC/MCInst.h"
11#include "llvm/MC/MCSubtargetInfo.h"
12#include "llvm/Support/DataTypes.h"
13#include "llvm/Support/Debug.h"
14#include "llvm/Support/LEB128.h"
15#include "llvm/Support/raw_ostream.h"
16#include "llvm/TargetParser/SubtargetFeature.h"
17#include <assert.h>
18
19namespace llvm {
20
21// Helper functions for extracting fields from encoded instructions.
22// InsnType must either be integral or an APInt-like object that must:
23// * be default-constructible and copy-constructible
24// * be constructible from an APInt (this can be private)
25// * Support insertBits(bits, startBit, numBits)
26// * Support extractBitsAsZExtValue(numBits, startBit)
27// * Support the ~, &, ==, and != operators with other objects of the same type
28// * Support the != and bitwise & with uint64_t
29// * Support put (<<) to raw_ostream&
30template <typename InsnType>
31#if defined(_MSC_VER) && !defined(__clang__)
32__declspec(noinline)
33#endif
34static std::enable_if_t<std::is_integral<InsnType>::value, InsnType>
35fieldFromInstruction(const InsnType &insn, unsigned startBit,
36 unsigned numBits) {
37 assert(startBit + numBits <= 64 && "Cannot support >64-bit extractions!");
38 assert(startBit + numBits <= (sizeof(InsnType) * 8) &&
39 "Instruction field out of bounds!");
40 InsnType fieldMask;
41 if (numBits == sizeof(InsnType) * 8)
42 fieldMask = (InsnType)(-1LL);
43 else
44 fieldMask = (((InsnType)1 << numBits) - 1) << startBit;
45 return (insn & fieldMask) >> startBit;
46}
47
48template <typename InsnType>
49static std::enable_if_t<!std::is_integral<InsnType>::value, uint64_t>
50fieldFromInstruction(const InsnType &insn, unsigned startBit,
51 unsigned numBits) {
52 return insn.extractBitsAsZExtValue(numBits, startBit);
53}
54
55// Helper function for inserting bits extracted from an encoded instruction into
56// a field.
57template <typename InsnType>
58static std::enable_if_t<std::is_integral<InsnType>::value>
59insertBits(InsnType &field, InsnType bits, unsigned startBit, unsigned numBits) {
60 assert(startBit + numBits <= sizeof field * 8);
61 field |= (InsnType)bits << startBit;
62}
63
64template <typename InsnType>
65static std::enable_if_t<!std::is_integral<InsnType>::value>
66insertBits(InsnType &field, uint64_t bits, unsigned startBit, unsigned numBits) {
67 field.insertBits(bits, startBit, numBits);
68}
69
70static bool Check(DecodeStatus &Out, DecodeStatus In) {
71 Out = static_cast<DecodeStatus>(Out & In);
72 return Out != MCDisassembler::Fail;
73}
74
75static const uint8_t DecoderTableLanai32[] = {
76/* 0 */ MCD::OPC_ExtractField, 28, 4, // Inst{31-28} ...
77/* 3 */ MCD::OPC_FilterValue, 0, 138, 0, 0, // Skip to: 146
78/* 8 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
79/* 11 */ MCD::OPC_FilterValue, 0, 103, 0, 0, // Skip to: 119
80/* 16 */ MCD::OPC_ExtractField, 0, 16, // Inst{15-0} ...
81/* 19 */ MCD::OPC_FilterValue, 1, 11, 0, 0, // Skip to: 35
82/* 24 */ MCD::OPC_CheckField, 18, 10, 0, 84, 0, 0, // Skip to: 115
83/* 31 */ MCD::OPC_Decode, 215, 2, 0, // Opcode: NOP
84/* 35 */ MCD::OPC_FilterValue, 2, 11, 0, 0, // Skip to: 51
85/* 40 */ MCD::OPC_CheckField, 18, 10, 0, 68, 0, 0, // Skip to: 115
86/* 47 */ MCD::OPC_Decode, 209, 2, 0, // Opcode: LOG0
87/* 51 */ MCD::OPC_FilterValue, 3, 11, 0, 0, // Skip to: 67
88/* 56 */ MCD::OPC_CheckField, 18, 10, 0, 52, 0, 0, // Skip to: 115
89/* 63 */ MCD::OPC_Decode, 210, 2, 0, // Opcode: LOG1
90/* 67 */ MCD::OPC_FilterValue, 4, 11, 0, 0, // Skip to: 83
91/* 72 */ MCD::OPC_CheckField, 18, 10, 0, 36, 0, 0, // Skip to: 115
92/* 79 */ MCD::OPC_Decode, 211, 2, 0, // Opcode: LOG2
93/* 83 */ MCD::OPC_FilterValue, 5, 11, 0, 0, // Skip to: 99
94/* 88 */ MCD::OPC_CheckField, 18, 10, 0, 20, 0, 0, // Skip to: 115
95/* 95 */ MCD::OPC_Decode, 212, 2, 0, // Opcode: LOG3
96/* 99 */ MCD::OPC_FilterValue, 6, 11, 0, 0, // Skip to: 115
97/* 104 */ MCD::OPC_CheckField, 18, 10, 0, 4, 0, 0, // Skip to: 115
98/* 111 */ MCD::OPC_Decode, 213, 2, 0, // Opcode: LOG4
99/* 115 */ MCD::OPC_Decode, 182, 2, 1, // Opcode: ADD_I_LO
100/* 119 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 128
101/* 124 */ MCD::OPC_Decode, 181, 2, 1, // Opcode: ADD_I_HI
102/* 128 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 137
103/* 133 */ MCD::OPC_Decode, 179, 2, 1, // Opcode: ADD_F_I_LO
104/* 137 */ MCD::OPC_FilterValue, 3, 198, 3, 0, // Skip to: 1108
105/* 142 */ MCD::OPC_Decode, 178, 2, 1, // Opcode: ADD_F_I_HI
106/* 146 */ MCD::OPC_FilterValue, 1, 39, 0, 0, // Skip to: 190
107/* 151 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
108/* 154 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 163
109/* 159 */ MCD::OPC_Decode, 176, 2, 1, // Opcode: ADDC_I_LO
110/* 163 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 172
111/* 168 */ MCD::OPC_Decode, 175, 2, 1, // Opcode: ADDC_I_HI
112/* 172 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 181
113/* 177 */ MCD::OPC_Decode, 173, 2, 1, // Opcode: ADDC_F_I_LO
114/* 181 */ MCD::OPC_FilterValue, 3, 154, 3, 0, // Skip to: 1108
115/* 186 */ MCD::OPC_Decode, 172, 2, 1, // Opcode: ADDC_F_I_HI
116/* 190 */ MCD::OPC_FilterValue, 2, 39, 0, 0, // Skip to: 234
117/* 195 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
118/* 198 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 207
119/* 203 */ MCD::OPC_Decode, 255, 2, 1, // Opcode: SUB_I_LO
120/* 207 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 216
121/* 212 */ MCD::OPC_Decode, 254, 2, 1, // Opcode: SUB_I_HI
122/* 216 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 225
123/* 221 */ MCD::OPC_Decode, 252, 2, 1, // Opcode: SUB_F_I_LO
124/* 225 */ MCD::OPC_FilterValue, 3, 110, 3, 0, // Skip to: 1108
125/* 230 */ MCD::OPC_Decode, 251, 2, 1, // Opcode: SUB_F_I_HI
126/* 234 */ MCD::OPC_FilterValue, 3, 39, 0, 0, // Skip to: 278
127/* 239 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
128/* 242 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 251
129/* 247 */ MCD::OPC_Decode, 249, 2, 1, // Opcode: SUBB_I_LO
130/* 251 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 260
131/* 256 */ MCD::OPC_Decode, 248, 2, 1, // Opcode: SUBB_I_HI
132/* 260 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 269
133/* 265 */ MCD::OPC_Decode, 246, 2, 1, // Opcode: SUBB_F_I_LO
134/* 269 */ MCD::OPC_FilterValue, 3, 66, 3, 0, // Skip to: 1108
135/* 274 */ MCD::OPC_Decode, 245, 2, 1, // Opcode: SUBB_F_I_HI
136/* 278 */ MCD::OPC_FilterValue, 4, 39, 0, 0, // Skip to: 322
137/* 283 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
138/* 286 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 295
139/* 291 */ MCD::OPC_Decode, 188, 2, 1, // Opcode: AND_I_LO
140/* 295 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 304
141/* 300 */ MCD::OPC_Decode, 187, 2, 1, // Opcode: AND_I_HI
142/* 304 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 313
143/* 309 */ MCD::OPC_Decode, 185, 2, 1, // Opcode: AND_F_I_LO
144/* 313 */ MCD::OPC_FilterValue, 3, 22, 3, 0, // Skip to: 1108
145/* 318 */ MCD::OPC_Decode, 184, 2, 1, // Opcode: AND_F_I_HI
146/* 322 */ MCD::OPC_FilterValue, 5, 39, 0, 0, // Skip to: 366
147/* 327 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
148/* 330 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 339
149/* 335 */ MCD::OPC_Decode, 220, 2, 1, // Opcode: OR_I_LO
150/* 339 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 348
151/* 344 */ MCD::OPC_Decode, 219, 2, 1, // Opcode: OR_I_HI
152/* 348 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 357
153/* 353 */ MCD::OPC_Decode, 217, 2, 1, // Opcode: OR_F_I_LO
154/* 357 */ MCD::OPC_FilterValue, 3, 234, 2, 0, // Skip to: 1108
155/* 362 */ MCD::OPC_Decode, 216, 2, 1, // Opcode: OR_F_I_HI
156/* 366 */ MCD::OPC_FilterValue, 6, 39, 0, 0, // Skip to: 410
157/* 371 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
158/* 374 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 383
159/* 379 */ MCD::OPC_Decode, 136, 3, 1, // Opcode: XOR_I_LO
160/* 383 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 392
161/* 388 */ MCD::OPC_Decode, 135, 3, 1, // Opcode: XOR_I_HI
162/* 392 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 401
163/* 397 */ MCD::OPC_Decode, 133, 3, 1, // Opcode: XOR_F_I_LO
164/* 401 */ MCD::OPC_FilterValue, 3, 190, 2, 0, // Skip to: 1108
165/* 406 */ MCD::OPC_Decode, 132, 3, 1, // Opcode: XOR_F_I_HI
166/* 410 */ MCD::OPC_FilterValue, 7, 39, 0, 0, // Skip to: 454
167/* 415 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
168/* 418 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 427
169/* 423 */ MCD::OPC_Decode, 235, 2, 2, // Opcode: SL_I
170/* 427 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 436
171/* 432 */ MCD::OPC_Decode, 225, 2, 2, // Opcode: SA_I
172/* 436 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 445
173/* 441 */ MCD::OPC_Decode, 234, 2, 2, // Opcode: SL_F_I
174/* 445 */ MCD::OPC_FilterValue, 3, 146, 2, 0, // Skip to: 1108
175/* 450 */ MCD::OPC_Decode, 224, 2, 2, // Opcode: SA_F_I
176/* 454 */ MCD::OPC_FilterValue, 8, 18, 0, 0, // Skip to: 477
177/* 459 */ MCD::OPC_CheckField, 0, 28, 252, 255, 219, 8, 4, 0, 0, // Skip to: 473
178/* 469 */ MCD::OPC_Decode, 223, 2, 0, // Opcode: RET
179/* 473 */ MCD::OPC_Decode, 205, 2, 3, // Opcode: LDW_RI
180/* 477 */ MCD::OPC_FilterValue, 9, 4, 0, 0, // Skip to: 486
181/* 482 */ MCD::OPC_Decode, 129, 3, 3, // Opcode: SW_RI
182/* 486 */ MCD::OPC_FilterValue, 10, 57, 0, 0, // Skip to: 548
183/* 491 */ MCD::OPC_ExtractField, 0, 3, // Inst{2-0} ...
184/* 494 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 503
185/* 499 */ MCD::OPC_Decode, 202, 2, 4, // Opcode: LDHs_RR
186/* 503 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 512
187/* 508 */ MCD::OPC_Decode, 204, 2, 4, // Opcode: LDHz_RR
188/* 512 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 521
189/* 517 */ MCD::OPC_Decode, 206, 2, 4, // Opcode: LDW_RR
190/* 521 */ MCD::OPC_FilterValue, 3, 4, 0, 0, // Skip to: 530
191/* 526 */ MCD::OPC_Decode, 207, 2, 4, // Opcode: LDWz_RR
192/* 530 */ MCD::OPC_FilterValue, 4, 4, 0, 0, // Skip to: 539
193/* 535 */ MCD::OPC_Decode, 198, 2, 4, // Opcode: LDBs_RR
194/* 539 */ MCD::OPC_FilterValue, 5, 52, 2, 0, // Skip to: 1108
195/* 544 */ MCD::OPC_Decode, 200, 2, 4, // Opcode: LDBz_RR
196/* 548 */ MCD::OPC_FilterValue, 11, 30, 0, 0, // Skip to: 583
197/* 553 */ MCD::OPC_ExtractField, 0, 3, // Inst{2-0} ...
198/* 556 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 565
199/* 561 */ MCD::OPC_Decode, 244, 2, 4, // Opcode: STH_RR
200/* 565 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 574
201/* 570 */ MCD::OPC_Decode, 130, 3, 4, // Opcode: SW_RR
202/* 574 */ MCD::OPC_FilterValue, 4, 17, 2, 0, // Skip to: 1108
203/* 579 */ MCD::OPC_Decode, 242, 2, 4, // Opcode: STB_RR
204/* 583 */ MCD::OPC_FilterValue, 12, 57, 1, 0, // Skip to: 901
205/* 588 */ MCD::OPC_ExtractField, 3, 8, // Inst{10-3} ...
206/* 591 */ MCD::OPC_FilterValue, 0, 21, 0, 0, // Skip to: 617
207/* 596 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
208/* 599 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 608
209/* 604 */ MCD::OPC_Decode, 183, 2, 5, // Opcode: ADD_R
210/* 608 */ MCD::OPC_FilterValue, 1, 239, 1, 0, // Skip to: 1108
211/* 613 */ MCD::OPC_Decode, 180, 2, 5, // Opcode: ADD_F_R
212/* 617 */ MCD::OPC_FilterValue, 32, 21, 0, 0, // Skip to: 643
213/* 622 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
214/* 625 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 634
215/* 630 */ MCD::OPC_Decode, 177, 2, 5, // Opcode: ADDC_R
216/* 634 */ MCD::OPC_FilterValue, 1, 213, 1, 0, // Skip to: 1108
217/* 639 */ MCD::OPC_Decode, 174, 2, 5, // Opcode: ADDC_F_R
218/* 643 */ MCD::OPC_FilterValue, 64, 21, 0, 0, // Skip to: 669
219/* 648 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
220/* 651 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 660
221/* 656 */ MCD::OPC_Decode, 128, 3, 5, // Opcode: SUB_R
222/* 660 */ MCD::OPC_FilterValue, 1, 187, 1, 0, // Skip to: 1108
223/* 665 */ MCD::OPC_Decode, 253, 2, 5, // Opcode: SUB_F_R
224/* 669 */ MCD::OPC_FilterValue, 96, 21, 0, 0, // Skip to: 695
225/* 674 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
226/* 677 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 686
227/* 682 */ MCD::OPC_Decode, 250, 2, 5, // Opcode: SUBB_R
228/* 686 */ MCD::OPC_FilterValue, 1, 161, 1, 0, // Skip to: 1108
229/* 691 */ MCD::OPC_Decode, 247, 2, 5, // Opcode: SUBB_F_R
230/* 695 */ MCD::OPC_FilterValue, 128, 1, 21, 0, 0, // Skip to: 722
231/* 701 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
232/* 704 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 713
233/* 709 */ MCD::OPC_Decode, 189, 2, 5, // Opcode: AND_R
234/* 713 */ MCD::OPC_FilterValue, 1, 134, 1, 0, // Skip to: 1108
235/* 718 */ MCD::OPC_Decode, 186, 2, 5, // Opcode: AND_F_R
236/* 722 */ MCD::OPC_FilterValue, 160, 1, 75, 0, 0, // Skip to: 803
237/* 728 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
238/* 731 */ MCD::OPC_FilterValue, 0, 58, 0, 0, // Skip to: 794
239/* 736 */ MCD::OPC_CheckField, 18, 10, 64, 18, 0, 0, // Skip to: 761
240/* 743 */ MCD::OPC_CheckField, 16, 1, 0, 11, 0, 0, // Skip to: 761
241/* 750 */ MCD::OPC_CheckField, 0, 3, 0, 4, 0, 0, // Skip to: 761
242/* 757 */ MCD::OPC_Decode, 195, 2, 6, // Opcode: JR
243/* 761 */ MCD::OPC_CheckField, 23, 5, 2, 11, 0, 0, // Skip to: 779
244/* 768 */ MCD::OPC_CheckField, 11, 5, 0, 4, 0, 0, // Skip to: 779
245/* 775 */ MCD::OPC_Decode, 191, 2, 7, // Opcode: BRIND_CC
246/* 779 */ MCD::OPC_CheckField, 23, 5, 2, 4, 0, 0, // Skip to: 790
247/* 786 */ MCD::OPC_Decode, 192, 2, 8, // Opcode: BRIND_CCA
248/* 790 */ MCD::OPC_Decode, 221, 2, 5, // Opcode: OR_R
249/* 794 */ MCD::OPC_FilterValue, 1, 53, 1, 0, // Skip to: 1108
250/* 799 */ MCD::OPC_Decode, 218, 2, 5, // Opcode: OR_F_R
251/* 803 */ MCD::OPC_FilterValue, 192, 1, 21, 0, 0, // Skip to: 830
252/* 809 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
253/* 812 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 821
254/* 817 */ MCD::OPC_Decode, 137, 3, 5, // Opcode: XOR_R
255/* 821 */ MCD::OPC_FilterValue, 1, 26, 1, 0, // Skip to: 1108
256/* 826 */ MCD::OPC_Decode, 134, 3, 5, // Opcode: XOR_F_R
257/* 830 */ MCD::OPC_FilterValue, 224, 1, 11, 0, 0, // Skip to: 847
258/* 836 */ MCD::OPC_CheckField, 17, 1, 0, 9, 1, 0, // Skip to: 1108
259/* 843 */ MCD::OPC_Decode, 227, 2, 9, // Opcode: SELECT
260/* 847 */ MCD::OPC_FilterValue, 240, 1, 21, 0, 0, // Skip to: 874
261/* 853 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
262/* 856 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 865
263/* 861 */ MCD::OPC_Decode, 232, 2, 5, // Opcode: SHL_R
264/* 865 */ MCD::OPC_FilterValue, 1, 238, 0, 0, // Skip to: 1108
265/* 870 */ MCD::OPC_Decode, 231, 2, 5, // Opcode: SHL_F_R
266/* 874 */ MCD::OPC_FilterValue, 248, 1, 228, 0, 0, // Skip to: 1108
267/* 880 */ MCD::OPC_ExtractField, 17, 1, // Inst{17} ...
268/* 883 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 892
269/* 888 */ MCD::OPC_Decode, 237, 2, 5, // Opcode: SRA_R
270/* 892 */ MCD::OPC_FilterValue, 1, 211, 0, 0, // Skip to: 1108
271/* 897 */ MCD::OPC_Decode, 236, 2, 5, // Opcode: SRA_F_R
272/* 901 */ MCD::OPC_FilterValue, 13, 30, 0, 0, // Skip to: 936
273/* 906 */ MCD::OPC_ExtractField, 0, 18, // Inst{17-0} ...
274/* 909 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 918
275/* 914 */ MCD::OPC_Decode, 222, 2, 10, // Opcode: POPC
276/* 918 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 927
277/* 923 */ MCD::OPC_Decode, 208, 2, 10, // Opcode: LEADZ
278/* 927 */ MCD::OPC_FilterValue, 3, 176, 0, 0, // Skip to: 1108
279/* 932 */ MCD::OPC_Decode, 131, 3, 10, // Opcode: TRAILZ
280/* 936 */ MCD::OPC_FilterValue, 14, 70, 0, 0, // Skip to: 1011
281/* 941 */ MCD::OPC_ExtractField, 1, 1, // Inst{1} ...
282/* 944 */ MCD::OPC_FilterValue, 0, 22, 0, 0, // Skip to: 971
283/* 949 */ MCD::OPC_CheckField, 25, 3, 0, 11, 0, 0, // Skip to: 967
284/* 956 */ MCD::OPC_CheckField, 0, 1, 0, 4, 0, 0, // Skip to: 967
285/* 963 */ MCD::OPC_Decode, 194, 2, 11, // Opcode: BT
286/* 967 */ MCD::OPC_Decode, 190, 2, 12, // Opcode: BRCC
287/* 971 */ MCD::OPC_FilterValue, 1, 132, 0, 0, // Skip to: 1108
288/* 976 */ MCD::OPC_ExtractField, 23, 2, // Inst{24-23} ...
289/* 979 */ MCD::OPC_FilterValue, 0, 11, 0, 0, // Skip to: 995
290/* 984 */ MCD::OPC_CheckField, 2, 16, 0, 117, 0, 0, // Skip to: 1108
291/* 991 */ MCD::OPC_Decode, 226, 2, 13, // Opcode: SCC
292/* 995 */ MCD::OPC_FilterValue, 2, 108, 0, 0, // Skip to: 1108
293/* 1000 */ MCD::OPC_CheckField, 16, 7, 0, 101, 0, 0, // Skip to: 1108
294/* 1007 */ MCD::OPC_Decode, 193, 2, 14, // Opcode: BRR
295/* 1011 */ MCD::OPC_FilterValue, 15, 92, 0, 0, // Skip to: 1108
296/* 1016 */ MCD::OPC_ExtractField, 16, 2, // Inst{17-16} ...
297/* 1019 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 1028
298/* 1024 */ MCD::OPC_Decode, 196, 2, 15, // Opcode: LDADDR
299/* 1028 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 1037
300/* 1033 */ MCD::OPC_Decode, 240, 2, 15, // Opcode: STADDR
301/* 1037 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 1046
302/* 1042 */ MCD::OPC_Decode, 233, 2, 15, // Opcode: SLI
303/* 1046 */ MCD::OPC_FilterValue, 3, 57, 0, 0, // Skip to: 1108
304/* 1051 */ MCD::OPC_ExtractField, 12, 4, // Inst{15-12} ...
305/* 1054 */ MCD::OPC_FilterValue, 0, 4, 0, 0, // Skip to: 1063
306/* 1059 */ MCD::OPC_Decode, 201, 2, 16, // Opcode: LDHs_RI
307/* 1063 */ MCD::OPC_FilterValue, 1, 4, 0, 0, // Skip to: 1072
308/* 1068 */ MCD::OPC_Decode, 203, 2, 16, // Opcode: LDHz_RI
309/* 1072 */ MCD::OPC_FilterValue, 2, 4, 0, 0, // Skip to: 1081
310/* 1077 */ MCD::OPC_Decode, 243, 2, 16, // Opcode: STH_RI
311/* 1081 */ MCD::OPC_FilterValue, 4, 4, 0, 0, // Skip to: 1090
312/* 1086 */ MCD::OPC_Decode, 197, 2, 16, // Opcode: LDBs_RI
313/* 1090 */ MCD::OPC_FilterValue, 5, 4, 0, 0, // Skip to: 1099
314/* 1095 */ MCD::OPC_Decode, 199, 2, 16, // Opcode: LDBz_RI
315/* 1099 */ MCD::OPC_FilterValue, 6, 4, 0, 0, // Skip to: 1108
316/* 1104 */ MCD::OPC_Decode, 241, 2, 16, // Opcode: STB_RI
317/* 1108 */ MCD::OPC_Fail,
318 0
319};
320
321static bool checkDecoderPredicate(unsigned Idx, const FeatureBitset &Bits) {
322 llvm_unreachable("Invalid index!");
323}
324
325template <typename InsnType>
326static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
327 uint64_t Address, const MCDisassembler *Decoder, bool &DecodeComplete) {
328 DecodeComplete = true;
329 using TmpType = std::conditional_t<std::is_integral<InsnType>::value, InsnType, uint64_t>;
330 TmpType tmp;
331 switch (Idx) {
332 default: llvm_unreachable("Invalid index!");
333 case 0:
334 return S;
335 case 1:
336 tmp = fieldFromInstruction(insn, 23, 5);
337 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
338 tmp = fieldFromInstruction(insn, 18, 5);
339 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
340 tmp = fieldFromInstruction(insn, 0, 16);
341 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
342 return S;
343 case 2:
344 tmp = fieldFromInstruction(insn, 23, 5);
345 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
346 tmp = fieldFromInstruction(insn, 18, 5);
347 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
348 tmp = fieldFromInstruction(insn, 0, 16);
349 if (!Check(S, decodeShiftImm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
350 return S;
351 case 3:
352 tmp = fieldFromInstruction(insn, 23, 5);
353 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
354 tmp = fieldFromInstruction(insn, 0, 23);
355 if (!Check(S, decodeRiMemoryValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
356 return S;
357 case 4:
358 tmp = fieldFromInstruction(insn, 23, 5);
359 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
360 tmp = 0x0;
361 insertBits(tmp, fieldFromInstruction(insn, 3, 8), 0, 8);
362 insertBits(tmp, fieldFromInstruction(insn, 11, 5), 10, 5);
363 insertBits(tmp, fieldFromInstruction(insn, 16, 2), 8, 2);
364 insertBits(tmp, fieldFromInstruction(insn, 18, 5), 15, 5);
365 if (!Check(S, decodeRrMemoryValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
366 return S;
367 case 5:
368 tmp = fieldFromInstruction(insn, 23, 5);
369 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
370 tmp = fieldFromInstruction(insn, 18, 5);
371 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
372 tmp = fieldFromInstruction(insn, 11, 5);
373 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
374 tmp = 0x0;
375 insertBits(tmp, fieldFromInstruction(insn, 0, 3), 1, 3);
376 insertBits(tmp, fieldFromInstruction(insn, 16, 1), 0, 1);
377 if (!Check(S, decodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
378 return S;
379 case 6:
380 tmp = fieldFromInstruction(insn, 11, 5);
381 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
382 return S;
383 case 7:
384 tmp = fieldFromInstruction(insn, 18, 5);
385 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
386 tmp = 0x0;
387 insertBits(tmp, fieldFromInstruction(insn, 0, 3), 1, 3);
388 insertBits(tmp, fieldFromInstruction(insn, 16, 1), 0, 1);
389 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
390 return S;
391 case 8:
392 tmp = fieldFromInstruction(insn, 18, 5);
393 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
394 tmp = fieldFromInstruction(insn, 11, 5);
395 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
396 tmp = 0x0;
397 insertBits(tmp, fieldFromInstruction(insn, 0, 3), 1, 3);
398 insertBits(tmp, fieldFromInstruction(insn, 16, 1), 0, 1);
399 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
400 return S;
401 case 9:
402 tmp = fieldFromInstruction(insn, 23, 5);
403 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
404 tmp = fieldFromInstruction(insn, 18, 5);
405 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
406 tmp = fieldFromInstruction(insn, 11, 5);
407 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
408 tmp = 0x0;
409 insertBits(tmp, fieldFromInstruction(insn, 0, 3), 1, 3);
410 insertBits(tmp, fieldFromInstruction(insn, 16, 1), 0, 1);
411 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
412 return S;
413 case 10:
414 tmp = fieldFromInstruction(insn, 23, 5);
415 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
416 tmp = fieldFromInstruction(insn, 18, 5);
417 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
418 return S;
419 case 11:
420 tmp = fieldFromInstruction(insn, 2, 23) << 2;
421 if (!Check(S, decodeBranch(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
422 return S;
423 case 12:
424 tmp = fieldFromInstruction(insn, 2, 23) << 2;
425 if (!Check(S, decodeBranch(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
426 tmp = 0x0;
427 insertBits(tmp, fieldFromInstruction(insn, 0, 1), 0, 1);
428 insertBits(tmp, fieldFromInstruction(insn, 25, 3), 1, 3);
429 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
430 return S;
431 case 13:
432 tmp = fieldFromInstruction(insn, 18, 5);
433 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
434 tmp = 0x0;
435 insertBits(tmp, fieldFromInstruction(insn, 0, 1), 0, 1);
436 insertBits(tmp, fieldFromInstruction(insn, 25, 3), 1, 3);
437 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
438 return S;
439 case 14:
440 tmp = fieldFromInstruction(insn, 2, 14) << 2;
441 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
442 tmp = 0x0;
443 insertBits(tmp, fieldFromInstruction(insn, 0, 1), 0, 1);
444 insertBits(tmp, fieldFromInstruction(insn, 25, 3), 1, 3);
445 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
446 return S;
447 case 15:
448 tmp = fieldFromInstruction(insn, 23, 5);
449 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
450 tmp = 0x0;
451 insertBits(tmp, fieldFromInstruction(insn, 0, 16), 0, 16);
452 insertBits(tmp, fieldFromInstruction(insn, 18, 5), 16, 5);
453 MI.addOperand(Op: MCOperand::createImm(Val: tmp));
454 return S;
455 case 16:
456 tmp = fieldFromInstruction(insn, 23, 5);
457 if (!Check(S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
458 tmp = 0x0;
459 insertBits(tmp, fieldFromInstruction(insn, 0, 12), 0, 12);
460 insertBits(tmp, fieldFromInstruction(insn, 18, 5), 12, 5);
461 if (!Check(S, decodeSplsValue(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
462 return S;
463 }
464}
465
466template <typename InsnType>
467static DecodeStatus decodeInstruction(const uint8_t DecodeTable[], MCInst &MI,
468 InsnType insn, uint64_t Address,
469 const MCDisassembler *DisAsm,
470 const MCSubtargetInfo &STI) {
471 const FeatureBitset &Bits = STI.getFeatureBits();
472
473 const uint8_t *Ptr = DecodeTable;
474 uint64_t CurFieldValue = 0;
475 DecodeStatus S = MCDisassembler::Success;
476 while (true) {
477 ptrdiff_t Loc = Ptr - DecodeTable;
478 switch (*Ptr) {
479 default:
480 errs() << Loc << ": Unexpected decode table opcode!\n";
481 return MCDisassembler::Fail;
482 case MCD::OPC_ExtractField: {
483 // Decode the start value.
484 unsigned Start = decodeULEB128AndIncUnsafe(p&: ++Ptr);
485 unsigned Len = *Ptr++;
486 CurFieldValue = fieldFromInstruction(insn, Start, Len);
487 LLVM_DEBUG(dbgs() << Loc << ": OPC_ExtractField(" << Start << ", "
488 << Len << "): " << CurFieldValue << "\n");
489 break;
490 }
491 case MCD::OPC_FilterValue: {
492 // Decode the field value.
493 uint64_t Val = decodeULEB128AndIncUnsafe(p&: ++Ptr);
494 // NumToSkip is a plain 24-bit integer.
495 unsigned NumToSkip = *Ptr++;
496 NumToSkip |= (*Ptr++) << 8;
497 NumToSkip |= (*Ptr++) << 16;
498
499 // Perform the filter operation.
500 if (Val != CurFieldValue)
501 Ptr += NumToSkip;
502 LLVM_DEBUG(dbgs() << Loc << ": OPC_FilterValue(" << Val << ", " << NumToSkip
503 << "): " << ((Val != CurFieldValue) ? "FAIL:" : "PASS:")
504 << " continuing at " << (Ptr - DecodeTable) << "\n");
505
506 break;
507 }
508 case MCD::OPC_CheckField: {
509 // Decode the start value.
510 unsigned Start = decodeULEB128AndIncUnsafe(p&: ++Ptr);
511 unsigned Len = *Ptr;
512 uint64_t FieldValue = fieldFromInstruction(insn, Start, Len);
513 // Decode the field value.
514 unsigned PtrLen = 0;
515 uint64_t ExpectedValue = decodeULEB128(p: ++Ptr, n: &PtrLen);
516 Ptr += PtrLen;
517 // NumToSkip is a plain 24-bit integer.
518 unsigned NumToSkip = *Ptr++;
519 NumToSkip |= (*Ptr++) << 8;
520 NumToSkip |= (*Ptr++) << 16;
521
522 // If the actual and expected values don't match, skip.
523 if (ExpectedValue != FieldValue)
524 Ptr += NumToSkip;
525 LLVM_DEBUG(dbgs() << Loc << ": OPC_CheckField(" << Start << ", "
526 << Len << ", " << ExpectedValue << ", " << NumToSkip
527 << "): FieldValue = " << FieldValue << ", ExpectedValue = "
528 << ExpectedValue << ": "
529 << ((ExpectedValue == FieldValue) ? "PASS\n" : "FAIL\n"));
530 break;
531 }
532 case MCD::OPC_CheckPredicate: {
533 // Decode the Predicate Index value.
534 unsigned PIdx = decodeULEB128AndIncUnsafe(p&: ++Ptr);
535 // NumToSkip is a plain 24-bit integer.
536 unsigned NumToSkip = *Ptr++;
537 NumToSkip |= (*Ptr++) << 8;
538 NumToSkip |= (*Ptr++) << 16;
539 // Check the predicate.
540 bool Pred;
541 if (!(Pred = checkDecoderPredicate(Idx: PIdx, Bits)))
542 Ptr += NumToSkip;
543 (void)Pred;
544 LLVM_DEBUG(dbgs() << Loc << ": OPC_CheckPredicate(" << PIdx << "): "
545 << (Pred ? "PASS\n" : "FAIL\n"));
546
547 break;
548 }
549 case MCD::OPC_Decode: {
550 // Decode the Opcode value.
551 unsigned Opc = decodeULEB128AndIncUnsafe(p&: ++Ptr);
552 unsigned DecodeIdx = decodeULEB128AndIncUnsafe(p&: Ptr);
553
554 MI.clear();
555 MI.setOpcode(Opc);
556 bool DecodeComplete;
557 S = decodeToMCInst(S, DecodeIdx, insn, MI, Address, DisAsm, DecodeComplete);
558 assert(DecodeComplete);
559
560 LLVM_DEBUG(dbgs() << Loc << ": OPC_Decode: opcode " << Opc
561 << ", using decoder " << DecodeIdx << ": "
562 << (S != MCDisassembler::Fail ? "PASS" : "FAIL") << "\n");
563 return S;
564 }
565 case MCD::OPC_TryDecode: {
566 // Decode the Opcode value.
567 unsigned Opc = decodeULEB128AndIncUnsafe(p&: ++Ptr);
568 unsigned DecodeIdx = decodeULEB128AndIncUnsafe(p&: Ptr);
569 // NumToSkip is a plain 24-bit integer.
570 unsigned NumToSkip = *Ptr++;
571 NumToSkip |= (*Ptr++) << 8;
572 NumToSkip |= (*Ptr++) << 16;
573
574 // Perform the decode operation.
575 MCInst TmpMI;
576 TmpMI.setOpcode(Opc);
577 bool DecodeComplete;
578 S = decodeToMCInst(S, DecodeIdx, insn, TmpMI, Address, DisAsm, DecodeComplete);
579 LLVM_DEBUG(dbgs() << Loc << ": OPC_TryDecode: opcode " << Opc
580 << ", using decoder " << DecodeIdx << ": ");
581
582 if (DecodeComplete) {
583 // Decoding complete.
584 LLVM_DEBUG(dbgs() << (S != MCDisassembler::Fail ? "PASS" : "FAIL") << "\n");
585 MI = TmpMI;
586 return S;
587 } else {
588 assert(S == MCDisassembler::Fail);
589 // If the decoding was incomplete, skip.
590 Ptr += NumToSkip;
591 LLVM_DEBUG(dbgs() << "FAIL: continuing at " << (Ptr - DecodeTable) << "\n");
592 // Reset decode status. This also drops a SoftFail status that could be
593 // set before the decode attempt.
594 S = MCDisassembler::Success;
595 }
596 break;
597 }
598 case MCD::OPC_SoftFail: {
599 // Decode the mask values.
600 uint64_t PositiveMask = decodeULEB128AndIncUnsafe(p&: ++Ptr);
601 uint64_t NegativeMask = decodeULEB128AndIncUnsafe(p&: Ptr);
602 bool Fail = (insn & PositiveMask) != 0 || (~insn & NegativeMask) != 0;
603 if (Fail)
604 S = MCDisassembler::SoftFail;
605 LLVM_DEBUG(dbgs() << Loc << ": OPC_SoftFail: " << (Fail ? "FAIL\n" : "PASS\n"));
606 break;
607 }
608 case MCD::OPC_Fail: {
609 LLVM_DEBUG(dbgs() << Loc << ": OPC_Fail\n");
610 return MCDisassembler::Fail;
611 }
612 }
613 }
614 llvm_unreachable("bogosity detected in disassembler state machine!");
615}
616
617
618} // end namespace llvm
619