1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: LoongArch.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10
11#ifdef GET_ASSEMBLER_HEADER
12#undef GET_ASSEMBLER_HEADER
13 // This should be included into the middle of the declaration of
14 // your subclasses implementation of MCTargetAsmParser.
15 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
16 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
17 const OperandVector &Operands);
18 void convertToMapAndConstraints(unsigned Kind,
19 const OperandVector &Operands) override;
20 unsigned MatchInstructionImpl(const OperandVector &Operands,
21 MCInst &Inst,
22 uint64_t &ErrorInfo,
23 FeatureBitset &MissingFeatures,
24 bool matchingInlineAsm,
25 unsigned VariantID = 0);
26 unsigned MatchInstructionImpl(const OperandVector &Operands,
27 MCInst &Inst,
28 uint64_t &ErrorInfo,
29 bool matchingInlineAsm,
30 unsigned VariantID = 0) {
31 FeatureBitset MissingFeatures;
32 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
33 matchingInlineAsm, VariantID);
34 }
35
36 ParseStatus MatchOperandParserImpl(
37 OperandVector &Operands,
38 StringRef Mnemonic,
39 bool ParseForAllFeatures = false);
40 ParseStatus tryCustomParseOperand(
41 OperandVector &Operands,
42 unsigned MCK);
43
44#endif // GET_ASSEMBLER_HEADER
45
46
47#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
48#undef GET_OPERAND_DIAGNOSTIC_TYPES
49
50 Match_InvalidBareSymbol,
51 Match_InvalidImm32,
52 Match_InvalidImm64,
53 Match_InvalidSImm10,
54 Match_InvalidSImm10lsl2,
55 Match_InvalidSImm11lsl1,
56 Match_InvalidSImm12,
57 Match_InvalidSImm12addlike,
58 Match_InvalidSImm12lu52id,
59 Match_InvalidSImm13,
60 Match_InvalidSImm14lsl2,
61 Match_InvalidSImm16,
62 Match_InvalidSImm16lsl2,
63 Match_InvalidSImm20,
64 Match_InvalidSImm20lu12iw,
65 Match_InvalidSImm20lu32id,
66 Match_InvalidSImm20pcaddi,
67 Match_InvalidSImm20pcaddu18i,
68 Match_InvalidSImm20pcalau12i,
69 Match_InvalidSImm21lsl2,
70 Match_InvalidSImm26Operand,
71 Match_InvalidSImm5,
72 Match_InvalidSImm8,
73 Match_InvalidSImm8lsl1,
74 Match_InvalidSImm8lsl2,
75 Match_InvalidSImm8lsl3,
76 Match_InvalidSImm9lsl3,
77 Match_InvalidTPRelAddSymbol,
78 Match_InvalidUImm1,
79 Match_InvalidUImm12,
80 Match_InvalidUImm12ori,
81 Match_InvalidUImm14,
82 Match_InvalidUImm15,
83 Match_InvalidUImm2,
84 Match_InvalidUImm2plus1,
85 Match_InvalidUImm3,
86 Match_InvalidUImm4,
87 Match_InvalidUImm5,
88 Match_InvalidUImm6,
89 Match_InvalidUImm7,
90 Match_InvalidUImm8,
91 END_OPERAND_DIAGNOSTIC_TYPES
92#endif // GET_OPERAND_DIAGNOSTIC_TYPES
93
94
95#ifdef GET_REGISTER_MATCHER
96#undef GET_REGISTER_MATCHER
97
98// Bits for subtarget features that participate in instruction matching.
99enum SubtargetFeatureBits : uint8_t {
100 Feature_IsLA64Bit = 4,
101 Feature_IsLA32Bit = 3,
102 Feature_HasLaGlobalWithPcrelBit = 1,
103 Feature_HasLaGlobalWithAbsBit = 0,
104 Feature_HasLaLocalWithAbsBit = 2,
105};
106
107static MCRegister MatchRegisterName(StringRef Name) {
108 switch (Name.size()) {
109 default: break;
110 case 2: // 30 strings to match.
111 switch (Name[0]) {
112 default: break;
113 case 'f': // 20 strings to match.
114 switch (Name[1]) {
115 default: break;
116 case '0': // 2 strings to match.
117 return LoongArch::F0; // "f0"
118 case '1': // 2 strings to match.
119 return LoongArch::F1; // "f1"
120 case '2': // 2 strings to match.
121 return LoongArch::F2; // "f2"
122 case '3': // 2 strings to match.
123 return LoongArch::F3; // "f3"
124 case '4': // 2 strings to match.
125 return LoongArch::F4; // "f4"
126 case '5': // 2 strings to match.
127 return LoongArch::F5; // "f5"
128 case '6': // 2 strings to match.
129 return LoongArch::F6; // "f6"
130 case '7': // 2 strings to match.
131 return LoongArch::F7; // "f7"
132 case '8': // 2 strings to match.
133 return LoongArch::F8; // "f8"
134 case '9': // 2 strings to match.
135 return LoongArch::F9; // "f9"
136 }
137 break;
138 case 'r': // 10 strings to match.
139 switch (Name[1]) {
140 default: break;
141 case '0': // 1 string to match.
142 return LoongArch::R0; // "r0"
143 case '1': // 1 string to match.
144 return LoongArch::R1; // "r1"
145 case '2': // 1 string to match.
146 return LoongArch::R2; // "r2"
147 case '3': // 1 string to match.
148 return LoongArch::R3; // "r3"
149 case '4': // 1 string to match.
150 return LoongArch::R4; // "r4"
151 case '5': // 1 string to match.
152 return LoongArch::R5; // "r5"
153 case '6': // 1 string to match.
154 return LoongArch::R6; // "r6"
155 case '7': // 1 string to match.
156 return LoongArch::R7; // "r7"
157 case '8': // 1 string to match.
158 return LoongArch::R8; // "r8"
159 case '9': // 1 string to match.
160 return LoongArch::R9; // "r9"
161 }
162 break;
163 }
164 break;
165 case 3: // 86 strings to match.
166 switch (Name[0]) {
167 default: break;
168 case 'f': // 44 strings to match.
169 switch (Name[1]) {
170 default: break;
171 case '1': // 20 strings to match.
172 switch (Name[2]) {
173 default: break;
174 case '0': // 2 strings to match.
175 return LoongArch::F10; // "f10"
176 case '1': // 2 strings to match.
177 return LoongArch::F11; // "f11"
178 case '2': // 2 strings to match.
179 return LoongArch::F12; // "f12"
180 case '3': // 2 strings to match.
181 return LoongArch::F13; // "f13"
182 case '4': // 2 strings to match.
183 return LoongArch::F14; // "f14"
184 case '5': // 2 strings to match.
185 return LoongArch::F15; // "f15"
186 case '6': // 2 strings to match.
187 return LoongArch::F16; // "f16"
188 case '7': // 2 strings to match.
189 return LoongArch::F17; // "f17"
190 case '8': // 2 strings to match.
191 return LoongArch::F18; // "f18"
192 case '9': // 2 strings to match.
193 return LoongArch::F19; // "f19"
194 }
195 break;
196 case '2': // 20 strings to match.
197 switch (Name[2]) {
198 default: break;
199 case '0': // 2 strings to match.
200 return LoongArch::F20; // "f20"
201 case '1': // 2 strings to match.
202 return LoongArch::F21; // "f21"
203 case '2': // 2 strings to match.
204 return LoongArch::F22; // "f22"
205 case '3': // 2 strings to match.
206 return LoongArch::F23; // "f23"
207 case '4': // 2 strings to match.
208 return LoongArch::F24; // "f24"
209 case '5': // 2 strings to match.
210 return LoongArch::F25; // "f25"
211 case '6': // 2 strings to match.
212 return LoongArch::F26; // "f26"
213 case '7': // 2 strings to match.
214 return LoongArch::F27; // "f27"
215 case '8': // 2 strings to match.
216 return LoongArch::F28; // "f28"
217 case '9': // 2 strings to match.
218 return LoongArch::F29; // "f29"
219 }
220 break;
221 case '3': // 4 strings to match.
222 switch (Name[2]) {
223 default: break;
224 case '0': // 2 strings to match.
225 return LoongArch::F30; // "f30"
226 case '1': // 2 strings to match.
227 return LoongArch::F31; // "f31"
228 }
229 break;
230 }
231 break;
232 case 'r': // 22 strings to match.
233 switch (Name[1]) {
234 default: break;
235 case '1': // 10 strings to match.
236 switch (Name[2]) {
237 default: break;
238 case '0': // 1 string to match.
239 return LoongArch::R10; // "r10"
240 case '1': // 1 string to match.
241 return LoongArch::R11; // "r11"
242 case '2': // 1 string to match.
243 return LoongArch::R12; // "r12"
244 case '3': // 1 string to match.
245 return LoongArch::R13; // "r13"
246 case '4': // 1 string to match.
247 return LoongArch::R14; // "r14"
248 case '5': // 1 string to match.
249 return LoongArch::R15; // "r15"
250 case '6': // 1 string to match.
251 return LoongArch::R16; // "r16"
252 case '7': // 1 string to match.
253 return LoongArch::R17; // "r17"
254 case '8': // 1 string to match.
255 return LoongArch::R18; // "r18"
256 case '9': // 1 string to match.
257 return LoongArch::R19; // "r19"
258 }
259 break;
260 case '2': // 10 strings to match.
261 switch (Name[2]) {
262 default: break;
263 case '0': // 1 string to match.
264 return LoongArch::R20; // "r20"
265 case '1': // 1 string to match.
266 return LoongArch::R21; // "r21"
267 case '2': // 1 string to match.
268 return LoongArch::R22; // "r22"
269 case '3': // 1 string to match.
270 return LoongArch::R23; // "r23"
271 case '4': // 1 string to match.
272 return LoongArch::R24; // "r24"
273 case '5': // 1 string to match.
274 return LoongArch::R25; // "r25"
275 case '6': // 1 string to match.
276 return LoongArch::R26; // "r26"
277 case '7': // 1 string to match.
278 return LoongArch::R27; // "r27"
279 case '8': // 1 string to match.
280 return LoongArch::R28; // "r28"
281 case '9': // 1 string to match.
282 return LoongArch::R29; // "r29"
283 }
284 break;
285 case '3': // 2 strings to match.
286 switch (Name[2]) {
287 default: break;
288 case '0': // 1 string to match.
289 return LoongArch::R30; // "r30"
290 case '1': // 1 string to match.
291 return LoongArch::R31; // "r31"
292 }
293 break;
294 }
295 break;
296 case 'v': // 10 strings to match.
297 if (Name[1] != 'r')
298 break;
299 switch (Name[2]) {
300 default: break;
301 case '0': // 1 string to match.
302 return LoongArch::VR0; // "vr0"
303 case '1': // 1 string to match.
304 return LoongArch::VR1; // "vr1"
305 case '2': // 1 string to match.
306 return LoongArch::VR2; // "vr2"
307 case '3': // 1 string to match.
308 return LoongArch::VR3; // "vr3"
309 case '4': // 1 string to match.
310 return LoongArch::VR4; // "vr4"
311 case '5': // 1 string to match.
312 return LoongArch::VR5; // "vr5"
313 case '6': // 1 string to match.
314 return LoongArch::VR6; // "vr6"
315 case '7': // 1 string to match.
316 return LoongArch::VR7; // "vr7"
317 case '8': // 1 string to match.
318 return LoongArch::VR8; // "vr8"
319 case '9': // 1 string to match.
320 return LoongArch::VR9; // "vr9"
321 }
322 break;
323 case 'x': // 10 strings to match.
324 if (Name[1] != 'r')
325 break;
326 switch (Name[2]) {
327 default: break;
328 case '0': // 1 string to match.
329 return LoongArch::XR0; // "xr0"
330 case '1': // 1 string to match.
331 return LoongArch::XR1; // "xr1"
332 case '2': // 1 string to match.
333 return LoongArch::XR2; // "xr2"
334 case '3': // 1 string to match.
335 return LoongArch::XR3; // "xr3"
336 case '4': // 1 string to match.
337 return LoongArch::XR4; // "xr4"
338 case '5': // 1 string to match.
339 return LoongArch::XR5; // "xr5"
340 case '6': // 1 string to match.
341 return LoongArch::XR6; // "xr6"
342 case '7': // 1 string to match.
343 return LoongArch::XR7; // "xr7"
344 case '8': // 1 string to match.
345 return LoongArch::XR8; // "xr8"
346 case '9': // 1 string to match.
347 return LoongArch::XR9; // "xr9"
348 }
349 break;
350 }
351 break;
352 case 4: // 56 strings to match.
353 switch (Name[0]) {
354 default: break;
355 case 'f': // 8 strings to match.
356 if (memcmp(Name.data()+1, "cc", 2) != 0)
357 break;
358 switch (Name[3]) {
359 default: break;
360 case '0': // 1 string to match.
361 return LoongArch::FCC0; // "fcc0"
362 case '1': // 1 string to match.
363 return LoongArch::FCC1; // "fcc1"
364 case '2': // 1 string to match.
365 return LoongArch::FCC2; // "fcc2"
366 case '3': // 1 string to match.
367 return LoongArch::FCC3; // "fcc3"
368 case '4': // 1 string to match.
369 return LoongArch::FCC4; // "fcc4"
370 case '5': // 1 string to match.
371 return LoongArch::FCC5; // "fcc5"
372 case '6': // 1 string to match.
373 return LoongArch::FCC6; // "fcc6"
374 case '7': // 1 string to match.
375 return LoongArch::FCC7; // "fcc7"
376 }
377 break;
378 case 's': // 4 strings to match.
379 if (memcmp(Name.data()+1, "cr", 2) != 0)
380 break;
381 switch (Name[3]) {
382 default: break;
383 case '0': // 1 string to match.
384 return LoongArch::SCR0; // "scr0"
385 case '1': // 1 string to match.
386 return LoongArch::SCR1; // "scr1"
387 case '2': // 1 string to match.
388 return LoongArch::SCR2; // "scr2"
389 case '3': // 1 string to match.
390 return LoongArch::SCR3; // "scr3"
391 }
392 break;
393 case 'v': // 22 strings to match.
394 if (Name[1] != 'r')
395 break;
396 switch (Name[2]) {
397 default: break;
398 case '1': // 10 strings to match.
399 switch (Name[3]) {
400 default: break;
401 case '0': // 1 string to match.
402 return LoongArch::VR10; // "vr10"
403 case '1': // 1 string to match.
404 return LoongArch::VR11; // "vr11"
405 case '2': // 1 string to match.
406 return LoongArch::VR12; // "vr12"
407 case '3': // 1 string to match.
408 return LoongArch::VR13; // "vr13"
409 case '4': // 1 string to match.
410 return LoongArch::VR14; // "vr14"
411 case '5': // 1 string to match.
412 return LoongArch::VR15; // "vr15"
413 case '6': // 1 string to match.
414 return LoongArch::VR16; // "vr16"
415 case '7': // 1 string to match.
416 return LoongArch::VR17; // "vr17"
417 case '8': // 1 string to match.
418 return LoongArch::VR18; // "vr18"
419 case '9': // 1 string to match.
420 return LoongArch::VR19; // "vr19"
421 }
422 break;
423 case '2': // 10 strings to match.
424 switch (Name[3]) {
425 default: break;
426 case '0': // 1 string to match.
427 return LoongArch::VR20; // "vr20"
428 case '1': // 1 string to match.
429 return LoongArch::VR21; // "vr21"
430 case '2': // 1 string to match.
431 return LoongArch::VR22; // "vr22"
432 case '3': // 1 string to match.
433 return LoongArch::VR23; // "vr23"
434 case '4': // 1 string to match.
435 return LoongArch::VR24; // "vr24"
436 case '5': // 1 string to match.
437 return LoongArch::VR25; // "vr25"
438 case '6': // 1 string to match.
439 return LoongArch::VR26; // "vr26"
440 case '7': // 1 string to match.
441 return LoongArch::VR27; // "vr27"
442 case '8': // 1 string to match.
443 return LoongArch::VR28; // "vr28"
444 case '9': // 1 string to match.
445 return LoongArch::VR29; // "vr29"
446 }
447 break;
448 case '3': // 2 strings to match.
449 switch (Name[3]) {
450 default: break;
451 case '0': // 1 string to match.
452 return LoongArch::VR30; // "vr30"
453 case '1': // 1 string to match.
454 return LoongArch::VR31; // "vr31"
455 }
456 break;
457 }
458 break;
459 case 'x': // 22 strings to match.
460 if (Name[1] != 'r')
461 break;
462 switch (Name[2]) {
463 default: break;
464 case '1': // 10 strings to match.
465 switch (Name[3]) {
466 default: break;
467 case '0': // 1 string to match.
468 return LoongArch::XR10; // "xr10"
469 case '1': // 1 string to match.
470 return LoongArch::XR11; // "xr11"
471 case '2': // 1 string to match.
472 return LoongArch::XR12; // "xr12"
473 case '3': // 1 string to match.
474 return LoongArch::XR13; // "xr13"
475 case '4': // 1 string to match.
476 return LoongArch::XR14; // "xr14"
477 case '5': // 1 string to match.
478 return LoongArch::XR15; // "xr15"
479 case '6': // 1 string to match.
480 return LoongArch::XR16; // "xr16"
481 case '7': // 1 string to match.
482 return LoongArch::XR17; // "xr17"
483 case '8': // 1 string to match.
484 return LoongArch::XR18; // "xr18"
485 case '9': // 1 string to match.
486 return LoongArch::XR19; // "xr19"
487 }
488 break;
489 case '2': // 10 strings to match.
490 switch (Name[3]) {
491 default: break;
492 case '0': // 1 string to match.
493 return LoongArch::XR20; // "xr20"
494 case '1': // 1 string to match.
495 return LoongArch::XR21; // "xr21"
496 case '2': // 1 string to match.
497 return LoongArch::XR22; // "xr22"
498 case '3': // 1 string to match.
499 return LoongArch::XR23; // "xr23"
500 case '4': // 1 string to match.
501 return LoongArch::XR24; // "xr24"
502 case '5': // 1 string to match.
503 return LoongArch::XR25; // "xr25"
504 case '6': // 1 string to match.
505 return LoongArch::XR26; // "xr26"
506 case '7': // 1 string to match.
507 return LoongArch::XR27; // "xr27"
508 case '8': // 1 string to match.
509 return LoongArch::XR28; // "xr28"
510 case '9': // 1 string to match.
511 return LoongArch::XR29; // "xr29"
512 }
513 break;
514 case '3': // 2 strings to match.
515 switch (Name[3]) {
516 default: break;
517 case '0': // 1 string to match.
518 return LoongArch::XR30; // "xr30"
519 case '1': // 1 string to match.
520 return LoongArch::XR31; // "xr31"
521 }
522 break;
523 }
524 break;
525 }
526 break;
527 case 5: // 4 strings to match.
528 if (memcmp(Name.data()+0, "fcsr", 4) != 0)
529 break;
530 switch (Name[4]) {
531 default: break;
532 case '0': // 1 string to match.
533 return LoongArch::FCSR0; // "fcsr0"
534 case '1': // 1 string to match.
535 return LoongArch::FCSR1; // "fcsr1"
536 case '2': // 1 string to match.
537 return LoongArch::FCSR2; // "fcsr2"
538 case '3': // 1 string to match.
539 return LoongArch::FCSR3; // "fcsr3"
540 }
541 break;
542 }
543 return LoongArch::NoRegister;
544}
545
546static MCRegister MatchRegisterAltName(StringRef Name) {
547 switch (Name.size()) {
548 default: break;
549 case 2: // 31 strings to match.
550 switch (Name[0]) {
551 default: break;
552 case 'a': // 8 strings to match.
553 switch (Name[1]) {
554 default: break;
555 case '0': // 1 string to match.
556 return LoongArch::R4; // "a0"
557 case '1': // 1 string to match.
558 return LoongArch::R5; // "a1"
559 case '2': // 1 string to match.
560 return LoongArch::R6; // "a2"
561 case '3': // 1 string to match.
562 return LoongArch::R7; // "a3"
563 case '4': // 1 string to match.
564 return LoongArch::R8; // "a4"
565 case '5': // 1 string to match.
566 return LoongArch::R9; // "a5"
567 case '6': // 1 string to match.
568 return LoongArch::R10; // "a6"
569 case '7': // 1 string to match.
570 return LoongArch::R11; // "a7"
571 }
572 break;
573 case 'f': // 1 string to match.
574 if (Name[1] != 'p')
575 break;
576 return LoongArch::R22; // "fp"
577 case 'r': // 1 string to match.
578 if (Name[1] != 'a')
579 break;
580 return LoongArch::R1; // "ra"
581 case 's': // 11 strings to match.
582 switch (Name[1]) {
583 default: break;
584 case '0': // 1 string to match.
585 return LoongArch::R23; // "s0"
586 case '1': // 1 string to match.
587 return LoongArch::R24; // "s1"
588 case '2': // 1 string to match.
589 return LoongArch::R25; // "s2"
590 case '3': // 1 string to match.
591 return LoongArch::R26; // "s3"
592 case '4': // 1 string to match.
593 return LoongArch::R27; // "s4"
594 case '5': // 1 string to match.
595 return LoongArch::R28; // "s5"
596 case '6': // 1 string to match.
597 return LoongArch::R29; // "s6"
598 case '7': // 1 string to match.
599 return LoongArch::R30; // "s7"
600 case '8': // 1 string to match.
601 return LoongArch::R31; // "s8"
602 case '9': // 1 string to match.
603 return LoongArch::R22; // "s9"
604 case 'p': // 1 string to match.
605 return LoongArch::R3; // "sp"
606 }
607 break;
608 case 't': // 10 strings to match.
609 switch (Name[1]) {
610 default: break;
611 case '0': // 1 string to match.
612 return LoongArch::R12; // "t0"
613 case '1': // 1 string to match.
614 return LoongArch::R13; // "t1"
615 case '2': // 1 string to match.
616 return LoongArch::R14; // "t2"
617 case '3': // 1 string to match.
618 return LoongArch::R15; // "t3"
619 case '4': // 1 string to match.
620 return LoongArch::R16; // "t4"
621 case '5': // 1 string to match.
622 return LoongArch::R17; // "t5"
623 case '6': // 1 string to match.
624 return LoongArch::R18; // "t6"
625 case '7': // 1 string to match.
626 return LoongArch::R19; // "t7"
627 case '8': // 1 string to match.
628 return LoongArch::R20; // "t8"
629 case 'p': // 1 string to match.
630 return LoongArch::R2; // "tp"
631 }
632 break;
633 }
634 break;
635 case 3: // 52 strings to match.
636 if (Name[0] != 'f')
637 break;
638 switch (Name[1]) {
639 default: break;
640 case 'a': // 16 strings to match.
641 switch (Name[2]) {
642 default: break;
643 case '0': // 2 strings to match.
644 return LoongArch::F0; // "fa0"
645 case '1': // 2 strings to match.
646 return LoongArch::F1; // "fa1"
647 case '2': // 2 strings to match.
648 return LoongArch::F2; // "fa2"
649 case '3': // 2 strings to match.
650 return LoongArch::F3; // "fa3"
651 case '4': // 2 strings to match.
652 return LoongArch::F4; // "fa4"
653 case '5': // 2 strings to match.
654 return LoongArch::F5; // "fa5"
655 case '6': // 2 strings to match.
656 return LoongArch::F6; // "fa6"
657 case '7': // 2 strings to match.
658 return LoongArch::F7; // "fa7"
659 }
660 break;
661 case 's': // 16 strings to match.
662 switch (Name[2]) {
663 default: break;
664 case '0': // 2 strings to match.
665 return LoongArch::F24; // "fs0"
666 case '1': // 2 strings to match.
667 return LoongArch::F25; // "fs1"
668 case '2': // 2 strings to match.
669 return LoongArch::F26; // "fs2"
670 case '3': // 2 strings to match.
671 return LoongArch::F27; // "fs3"
672 case '4': // 2 strings to match.
673 return LoongArch::F28; // "fs4"
674 case '5': // 2 strings to match.
675 return LoongArch::F29; // "fs5"
676 case '6': // 2 strings to match.
677 return LoongArch::F30; // "fs6"
678 case '7': // 2 strings to match.
679 return LoongArch::F31; // "fs7"
680 }
681 break;
682 case 't': // 20 strings to match.
683 switch (Name[2]) {
684 default: break;
685 case '0': // 2 strings to match.
686 return LoongArch::F8; // "ft0"
687 case '1': // 2 strings to match.
688 return LoongArch::F9; // "ft1"
689 case '2': // 2 strings to match.
690 return LoongArch::F10; // "ft2"
691 case '3': // 2 strings to match.
692 return LoongArch::F11; // "ft3"
693 case '4': // 2 strings to match.
694 return LoongArch::F12; // "ft4"
695 case '5': // 2 strings to match.
696 return LoongArch::F13; // "ft5"
697 case '6': // 2 strings to match.
698 return LoongArch::F14; // "ft6"
699 case '7': // 2 strings to match.
700 return LoongArch::F15; // "ft7"
701 case '8': // 2 strings to match.
702 return LoongArch::F16; // "ft8"
703 case '9': // 2 strings to match.
704 return LoongArch::F17; // "ft9"
705 }
706 break;
707 }
708 break;
709 case 4: // 13 strings to match.
710 switch (Name[0]) {
711 default: break;
712 case 'f': // 12 strings to match.
713 if (memcmp(Name.data()+1, "t1", 2) != 0)
714 break;
715 switch (Name[3]) {
716 default: break;
717 case '0': // 2 strings to match.
718 return LoongArch::F18; // "ft10"
719 case '1': // 2 strings to match.
720 return LoongArch::F19; // "ft11"
721 case '2': // 2 strings to match.
722 return LoongArch::F20; // "ft12"
723 case '3': // 2 strings to match.
724 return LoongArch::F21; // "ft13"
725 case '4': // 2 strings to match.
726 return LoongArch::F22; // "ft14"
727 case '5': // 2 strings to match.
728 return LoongArch::F23; // "ft15"
729 }
730 break;
731 case 'z': // 1 string to match.
732 if (memcmp(Name.data()+1, "ero", 3) != 0)
733 break;
734 return LoongArch::R0; // "zero"
735 }
736 break;
737 }
738 return LoongArch::NoRegister;
739}
740
741#endif // GET_REGISTER_MATCHER
742
743
744#ifdef GET_SUBTARGET_FEATURE_NAME
745#undef GET_SUBTARGET_FEATURE_NAME
746
747// User-level names for subtarget features that participate in
748// instruction matching.
749static const char *getSubtargetFeatureName(uint64_t Val) {
750 switch(Val) {
751 case Feature_IsLA64Bit: return "LA64 Basic Integer and Privilege Instruction Set";
752 case Feature_IsLA32Bit: return "LA32 Basic Integer and Privilege Instruction Set";
753 case Feature_HasLaGlobalWithPcrelBit: return "Expand la.global as la.pcrel";
754 case Feature_HasLaGlobalWithAbsBit: return "Expand la.global as la.abs";
755 case Feature_HasLaLocalWithAbsBit: return "Expand la.local as la.abs";
756 default: return "(unknown)";
757 }
758}
759
760#endif // GET_SUBTARGET_FEATURE_NAME
761
762
763#ifdef GET_MATCHER_IMPLEMENTATION
764#undef GET_MATCHER_IMPLEMENTATION
765
766enum {
767 Tie0_1_1,
768};
769
770static const uint8_t TiedAsmOperandTable[][3] = {
771 /* Tie0_1_1 */ { 0, 1, 1 },
772};
773
774namespace {
775enum OperatorConversionKind {
776 CVT_Done,
777 CVT_Reg,
778 CVT_Tied,
779 CVT_95_Reg,
780 CVT_95_addImmOperands,
781 CVT_95_addRegOperands,
782 CVT_regR0,
783 CVT_imm_95_0,
784 CVT_regR1,
785 CVT_NUM_CONVERTERS
786};
787
788enum InstructionConversionKind {
789 Convert__Reg1_0__Reg1_1__Reg1_2,
790 Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3,
791 Convert__Reg1_0__Reg1_1__SImm12addlike1_2,
792 Convert__Reg1_0__Reg1_1__SImm51_2,
793 Convert__Reg1_0__Reg1_1__SImm161_2,
794 Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3,
795 Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2,
796 Convert__Reg1_0__Reg1_1__UImm121_2,
797 Convert__Reg1_0__Reg1_1__UImm41_2,
798 Convert__Reg1_0__UImm81_1,
799 Convert__Reg1_0__UImm41_1,
800 Convert__Reg1_0__UImm51_1__UImm41_2,
801 Convert__Reg1_0__Reg1_1,
802 Convert__SImm26OperandB1_0,
803 Convert__Reg1_0__SImm21lsl21_1,
804 Convert__Reg1_0__Reg1_1__SImm16lsl21_2,
805 Convert__Reg1_0__regR0__SImm16lsl21_1,
806 Convert__Reg1_1__Reg1_0__SImm16lsl21_2,
807 Convert__regR0__Reg1_0__SImm16lsl21_1,
808 Convert__SImm26OperandBL1_0,
809 Convert__UImm151_0,
810 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3,
811 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3,
812 Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3,
813 Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3,
814 Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3,
815 Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3,
816 Convert__UImm51_0__Reg1_1__SImm121_2,
817 Convert__BareSymbol1_0,
818 Convert__Reg1_0__UImm141_1,
819 Convert__Reg1_0__Tie0_1_1__UImm141_1,
820 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2,
821 Convert_NoOperands,
822 Convert__Reg1_0__Reg1_1__SImm121_2,
823 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
824 Convert__Reg1_2__Reg1_1__UImm51_0,
825 Convert__SImm21lsl21_0,
826 Convert__regR0__Reg1_0__imm_95_0,
827 Convert__Reg1_0__BareSymbol1_1,
828 Convert__Reg1_0__imm_95_0__BareSymbol1_1,
829 Convert__Reg1_0__Reg1_1__BareSymbol1_2,
830 Convert__Reg1_0__Reg1_1__UImm81_2,
831 Convert__Reg1_0__Reg1_1__SImm14lsl21_2,
832 Convert__Reg1_0__Imm641_1,
833 Convert__Reg1_0__Imm321_1,
834 Convert__Reg1_0__SImm20lu12iw1_1,
835 Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1,
836 Convert__Reg1_0__Reg1_1__SImm12lu52id1_2,
837 Convert__Reg1_0__Reg1_1__regR0,
838 Convert__Reg1_0__Tie0_1_1__Reg1_1,
839 Convert__regR0__regR0__imm_95_0,
840 Convert__Reg1_0__Reg1_1__UImm12ori1_2,
841 Convert__Reg1_0__SImm20pcaddi1_1,
842 Convert__Reg1_0__SImm201_1,
843 Convert__Reg1_0__SImm20pcaddu18i1_1,
844 Convert__Reg1_0__SImm20pcalau12i1_1,
845 Convert__UImm51_0__Reg1_1__Reg1_2,
846 Convert__Reg1_0__Reg1_1__UImm31_2,
847 Convert__Reg1_0__Reg1_1__UImm61_2,
848 Convert__Reg1_0__Reg1_1__UImm51_2,
849 Convert__regR0__regR1__imm_95_0,
850 Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2,
851 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
852 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2,
853 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2,
854 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2,
855 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2,
856 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2,
857 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2,
858 Convert__Reg1_0__SImm131_1,
859 Convert__Reg1_0__Reg1_1__SImm9lsl31_2,
860 Convert__Reg1_0__Reg1_1__SImm11lsl11_2,
861 Convert__Reg1_0__Reg1_1__SImm10lsl21_2,
862 Convert__Reg1_0__Reg1_1__UImm11_2,
863 Convert__Reg1_0__Reg1_1__UImm21_2,
864 Convert__Reg1_0__SImm101_1,
865 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2,
866 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2,
867 Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3,
868 Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3,
869 Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3,
870 Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3,
871 Convert__Reg1_0,
872 Convert__UImm31_0,
873 Convert__Reg1_0__UImm31_1,
874 Convert__Reg1_0__UImm61_1,
875 Convert__Reg1_0__UImm51_1,
876 Convert__Reg1_0__UImm51_1__UImm81_2,
877 Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3,
878 Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3,
879 Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3,
880 Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3,
881 CVT_NUM_SIGNATURES
882};
883
884} // end anonymous namespace
885
886static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
887 // Convert__Reg1_0__Reg1_1__Reg1_2
888 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
889 // Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3
890 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
891 // Convert__Reg1_0__Reg1_1__SImm12addlike1_2
892 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
893 // Convert__Reg1_0__Reg1_1__SImm51_2
894 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
895 // Convert__Reg1_0__Reg1_1__SImm161_2
896 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
897 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3
898 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
899 // Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2
900 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addRegOperands, 3, CVT_Done },
901 // Convert__Reg1_0__Reg1_1__UImm121_2
902 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
903 // Convert__Reg1_0__Reg1_1__UImm41_2
904 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
905 // Convert__Reg1_0__UImm81_1
906 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
907 // Convert__Reg1_0__UImm41_1
908 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
909 // Convert__Reg1_0__UImm51_1__UImm41_2
910 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
911 // Convert__Reg1_0__Reg1_1
912 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
913 // Convert__SImm26OperandB1_0
914 { CVT_95_addImmOperands, 1, CVT_Done },
915 // Convert__Reg1_0__SImm21lsl21_1
916 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
917 // Convert__Reg1_0__Reg1_1__SImm16lsl21_2
918 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
919 // Convert__Reg1_0__regR0__SImm16lsl21_1
920 { CVT_95_Reg, 1, CVT_regR0, 0, CVT_95_addImmOperands, 2, CVT_Done },
921 // Convert__Reg1_1__Reg1_0__SImm16lsl21_2
922 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_Done },
923 // Convert__regR0__Reg1_0__SImm16lsl21_1
924 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
925 // Convert__SImm26OperandBL1_0
926 { CVT_95_addImmOperands, 1, CVT_Done },
927 // Convert__UImm151_0
928 { CVT_95_addImmOperands, 1, CVT_Done },
929 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3
930 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
931 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3
932 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
933 // Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3
934 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
935 // Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3
936 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
937 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3
938 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
939 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3
940 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
941 // Convert__UImm51_0__Reg1_1__SImm121_2
942 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
943 // Convert__BareSymbol1_0
944 { CVT_95_addImmOperands, 1, CVT_Done },
945 // Convert__Reg1_0__UImm141_1
946 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
947 // Convert__Reg1_0__Tie0_1_1__UImm141_1
948 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
949 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2
950 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
951 // Convert_NoOperands
952 { CVT_Done },
953 // Convert__Reg1_0__Reg1_1__SImm121_2
954 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
955 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
956 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
957 // Convert__Reg1_2__Reg1_1__UImm51_0
958 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
959 // Convert__SImm21lsl21_0
960 { CVT_95_addImmOperands, 1, CVT_Done },
961 // Convert__regR0__Reg1_0__imm_95_0
962 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
963 // Convert__Reg1_0__BareSymbol1_1
964 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
965 // Convert__Reg1_0__imm_95_0__BareSymbol1_1
966 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_95_addImmOperands, 2, CVT_Done },
967 // Convert__Reg1_0__Reg1_1__BareSymbol1_2
968 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
969 // Convert__Reg1_0__Reg1_1__UImm81_2
970 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
971 // Convert__Reg1_0__Reg1_1__SImm14lsl21_2
972 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
973 // Convert__Reg1_0__Imm641_1
974 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
975 // Convert__Reg1_0__Imm321_1
976 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
977 // Convert__Reg1_0__SImm20lu12iw1_1
978 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
979 // Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1
980 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
981 // Convert__Reg1_0__Reg1_1__SImm12lu52id1_2
982 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
983 // Convert__Reg1_0__Reg1_1__regR0
984 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_regR0, 0, CVT_Done },
985 // Convert__Reg1_0__Tie0_1_1__Reg1_1
986 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
987 // Convert__regR0__regR0__imm_95_0
988 { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done },
989 // Convert__Reg1_0__Reg1_1__UImm12ori1_2
990 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
991 // Convert__Reg1_0__SImm20pcaddi1_1
992 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
993 // Convert__Reg1_0__SImm201_1
994 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
995 // Convert__Reg1_0__SImm20pcaddu18i1_1
996 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
997 // Convert__Reg1_0__SImm20pcalau12i1_1
998 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
999 // Convert__UImm51_0__Reg1_1__Reg1_2
1000 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1001 // Convert__Reg1_0__Reg1_1__UImm31_2
1002 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1003 // Convert__Reg1_0__Reg1_1__UImm61_2
1004 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1005 // Convert__Reg1_0__Reg1_1__UImm51_2
1006 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1007 // Convert__regR0__regR1__imm_95_0
1008 { CVT_regR0, 0, CVT_regR1, 0, CVT_imm_95_0, 0, CVT_Done },
1009 // Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2
1010 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1011 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
1012 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1013 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2
1014 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1015 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2
1016 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1017 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2
1018 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1019 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2
1020 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1021 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2
1022 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1023 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2
1024 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1025 // Convert__Reg1_0__SImm131_1
1026 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1027 // Convert__Reg1_0__Reg1_1__SImm9lsl31_2
1028 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1029 // Convert__Reg1_0__Reg1_1__SImm11lsl11_2
1030 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1031 // Convert__Reg1_0__Reg1_1__SImm10lsl21_2
1032 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1033 // Convert__Reg1_0__Reg1_1__UImm11_2
1034 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1035 // Convert__Reg1_0__Reg1_1__UImm21_2
1036 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1037 // Convert__Reg1_0__SImm101_1
1038 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1039 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2
1040 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1041 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2
1042 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
1043 // Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3
1044 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1045 // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3
1046 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1047 // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3
1048 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1049 // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3
1050 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1051 // Convert__Reg1_0
1052 { CVT_95_Reg, 1, CVT_Done },
1053 // Convert__UImm31_0
1054 { CVT_95_addImmOperands, 1, CVT_Done },
1055 // Convert__Reg1_0__UImm31_1
1056 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1057 // Convert__Reg1_0__UImm61_1
1058 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1059 // Convert__Reg1_0__UImm51_1
1060 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1061 // Convert__Reg1_0__UImm51_1__UImm81_2
1062 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
1063 // Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3
1064 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1065 // Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3
1066 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1067 // Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3
1068 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1069 // Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3
1070 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
1071};
1072
1073void LoongArchAsmParser::
1074convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
1075 const OperandVector &Operands) {
1076 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1077 const uint8_t *Converter = ConversionTable[Kind];
1078 Inst.setOpcode(Opcode);
1079 for (const uint8_t *p = Converter; *p; p += 2) {
1080 unsigned OpIdx = *(p + 1);
1081 switch (*p) {
1082 default: llvm_unreachable("invalid conversion entry!");
1083 case CVT_Reg:
1084 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1085 break;
1086 case CVT_Tied: {
1087 assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) -
1088 std::begin(TiedAsmOperandTable)) &&
1089 "Tied operand not found");
1090 unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0];
1091 if (TiedResOpnd != (uint8_t)-1)
1092 Inst.addOperand(Inst.getOperand(TiedResOpnd));
1093 break;
1094 }
1095 case CVT_95_Reg:
1096 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1097 break;
1098 case CVT_95_addImmOperands:
1099 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
1100 break;
1101 case CVT_95_addRegOperands:
1102 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1103 break;
1104 case CVT_regR0:
1105 Inst.addOperand(MCOperand::createReg(LoongArch::R0));
1106 break;
1107 case CVT_imm_95_0:
1108 Inst.addOperand(MCOperand::createImm(0));
1109 break;
1110 case CVT_regR1:
1111 Inst.addOperand(MCOperand::createReg(LoongArch::R1));
1112 break;
1113 }
1114 }
1115}
1116
1117void LoongArchAsmParser::
1118convertToMapAndConstraints(unsigned Kind,
1119 const OperandVector &Operands) {
1120 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1121 unsigned NumMCOperands = 0;
1122 const uint8_t *Converter = ConversionTable[Kind];
1123 for (const uint8_t *p = Converter; *p; p += 2) {
1124 switch (*p) {
1125 default: llvm_unreachable("invalid conversion entry!");
1126 case CVT_Reg:
1127 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1128 Operands[*(p + 1)]->setConstraint("r");
1129 ++NumMCOperands;
1130 break;
1131 case CVT_Tied:
1132 ++NumMCOperands;
1133 break;
1134 case CVT_95_Reg:
1135 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1136 Operands[*(p + 1)]->setConstraint("r");
1137 NumMCOperands += 1;
1138 break;
1139 case CVT_95_addImmOperands:
1140 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1141 Operands[*(p + 1)]->setConstraint("m");
1142 NumMCOperands += 1;
1143 break;
1144 case CVT_95_addRegOperands:
1145 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1146 Operands[*(p + 1)]->setConstraint("m");
1147 NumMCOperands += 1;
1148 break;
1149 case CVT_regR0:
1150 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1151 Operands[*(p + 1)]->setConstraint("m");
1152 ++NumMCOperands;
1153 break;
1154 case CVT_imm_95_0:
1155 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1156 Operands[*(p + 1)]->setConstraint("");
1157 ++NumMCOperands;
1158 break;
1159 case CVT_regR1:
1160 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1161 Operands[*(p + 1)]->setConstraint("m");
1162 ++NumMCOperands;
1163 break;
1164 }
1165 }
1166}
1167
1168namespace {
1169
1170/// MatchClassKind - The kinds of classes which participate in
1171/// instruction matching.
1172enum MatchClassKind {
1173 InvalidMatchClass = 0,
1174 OptionalMatchClass = 1,
1175 MCK_LAST_TOKEN = OptionalMatchClass,
1176 MCK_FCSR, // register class 'FCSR'
1177 MCK_SCR, // register class 'SCR'
1178 MCK_CFR, // register class 'CFR'
1179 MCK_GPRT, // register class 'GPRT'
1180 MCK_FPR32, // register class 'FPR32'
1181 MCK_FPR64, // register class 'FPR64'
1182 MCK_GPR, // register class 'GPR'
1183 MCK_LASX256, // register class 'LASX256'
1184 MCK_LSX128, // register class 'LSX128'
1185 MCK_LAST_REGISTER = MCK_LSX128,
1186 MCK_AtomicMemAsmOperand, // user defined class 'AtomicMemAsmOperand'
1187 MCK_BareSymbol, // user defined class 'BareSymbol'
1188 MCK_Imm, // user defined class 'ImmAsmOperand'
1189 MCK_SImm26OperandB, // user defined class 'SImm26OperandB'
1190 MCK_SImm26OperandBL, // user defined class 'SImm26OperandBL'
1191 MCK_TPRelAddSymbol, // user defined class 'TPRelAddSymbol'
1192 MCK_Imm32, // user defined class 'anonymous_8028'
1193 MCK_Imm64, // user defined class 'anonymous_8029'
1194 MCK_UImm1, // user defined class 'anonymous_8030'
1195 MCK_UImm2, // user defined class 'anonymous_8031'
1196 MCK_UImm2plus1, // user defined class 'anonymous_8032'
1197 MCK_UImm3, // user defined class 'anonymous_8033'
1198 MCK_UImm4, // user defined class 'anonymous_8034'
1199 MCK_UImm5, // user defined class 'anonymous_8035'
1200 MCK_UImm6, // user defined class 'anonymous_8036'
1201 MCK_UImm7, // user defined class 'anonymous_8037'
1202 MCK_UImm8, // user defined class 'anonymous_8038'
1203 MCK_UImm12, // user defined class 'anonymous_8039'
1204 MCK_UImm12ori, // user defined class 'anonymous_8040'
1205 MCK_UImm14, // user defined class 'anonymous_8041'
1206 MCK_UImm15, // user defined class 'anonymous_8042'
1207 MCK_SImm5, // user defined class 'anonymous_8043'
1208 MCK_SImm8, // user defined class 'anonymous_8044'
1209 MCK_SImm8lsl1, // user defined class 'anonymous_8045'
1210 MCK_SImm8lsl2, // user defined class 'anonymous_8046'
1211 MCK_SImm8lsl3, // user defined class 'anonymous_8047'
1212 MCK_SImm9lsl3, // user defined class 'anonymous_8048'
1213 MCK_SImm10, // user defined class 'anonymous_8049'
1214 MCK_SImm10lsl2, // user defined class 'anonymous_8050'
1215 MCK_SImm11lsl1, // user defined class 'anonymous_8051'
1216 MCK_SImm12, // user defined class 'anonymous_8052'
1217 MCK_SImm12addlike, // user defined class 'anonymous_8053'
1218 MCK_SImm12lu52id, // user defined class 'anonymous_8054'
1219 MCK_SImm13, // user defined class 'anonymous_8055'
1220 MCK_SImm14lsl2, // user defined class 'anonymous_8056'
1221 MCK_SImm16, // user defined class 'anonymous_8057'
1222 MCK_SImm16lsl2, // user defined class 'anonymous_8058'
1223 MCK_SImm20, // user defined class 'anonymous_8059'
1224 MCK_SImm20pcalau12i, // user defined class 'anonymous_8060'
1225 MCK_SImm20lu12iw, // user defined class 'anonymous_8061'
1226 MCK_SImm20lu32id, // user defined class 'anonymous_8062'
1227 MCK_SImm20pcaddu18i, // user defined class 'anonymous_8063'
1228 MCK_SImm20pcaddi, // user defined class 'anonymous_8064'
1229 MCK_SImm21lsl2, // user defined class 'anonymous_8065'
1230 NumMatchClassKinds
1231};
1232
1233} // end anonymous namespace
1234
1235static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
1236 return MCTargetAsmParser::Match_InvalidOperand;
1237}
1238
1239static MatchClassKind matchTokenString(StringRef Name) {
1240 return InvalidMatchClass;
1241}
1242
1243/// isSubclass - Compute whether \p A is a subclass of \p B.
1244static bool isSubclass(MatchClassKind A, MatchClassKind B) {
1245 if (A == B)
1246 return true;
1247
1248 switch (A) {
1249 default:
1250 return false;
1251
1252 case MCK_GPRT:
1253 return B == MCK_GPR;
1254 }
1255}
1256
1257static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
1258 LoongArchOperand &Operand = (LoongArchOperand &)GOp;
1259 if (Kind == InvalidMatchClass)
1260 return MCTargetAsmParser::Match_InvalidOperand;
1261
1262 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
1263 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
1264 MCTargetAsmParser::Match_Success :
1265 MCTargetAsmParser::Match_InvalidOperand;
1266
1267 switch (Kind) {
1268 default: break;
1269 // 'AtomicMemAsmOperand' class
1270 case MCK_AtomicMemAsmOperand: {
1271 DiagnosticPredicate DP(Operand.isGPR());
1272 if (DP.isMatch())
1273 return MCTargetAsmParser::Match_Success;
1274 break;
1275 }
1276 // 'BareSymbol' class
1277 case MCK_BareSymbol: {
1278 DiagnosticPredicate DP(Operand.isBareSymbol());
1279 if (DP.isMatch())
1280 return MCTargetAsmParser::Match_Success;
1281 if (DP.isNearMatch())
1282 return LoongArchAsmParser::Match_InvalidBareSymbol;
1283 break;
1284 }
1285 // 'Imm' class
1286 case MCK_Imm: {
1287 DiagnosticPredicate DP(Operand.isImm());
1288 if (DP.isMatch())
1289 return MCTargetAsmParser::Match_Success;
1290 break;
1291 }
1292 // 'SImm26OperandB' class
1293 case MCK_SImm26OperandB: {
1294 DiagnosticPredicate DP(Operand.isSImm26Operand());
1295 if (DP.isMatch())
1296 return MCTargetAsmParser::Match_Success;
1297 if (DP.isNearMatch())
1298 return LoongArchAsmParser::Match_InvalidSImm26Operand;
1299 break;
1300 }
1301 // 'SImm26OperandBL' class
1302 case MCK_SImm26OperandBL: {
1303 DiagnosticPredicate DP(Operand.isSImm26Operand());
1304 if (DP.isMatch())
1305 return MCTargetAsmParser::Match_Success;
1306 if (DP.isNearMatch())
1307 return LoongArchAsmParser::Match_InvalidSImm26Operand;
1308 break;
1309 }
1310 // 'TPRelAddSymbol' class
1311 case MCK_TPRelAddSymbol: {
1312 DiagnosticPredicate DP(Operand.isTPRelAddSymbol());
1313 if (DP.isMatch())
1314 return MCTargetAsmParser::Match_Success;
1315 if (DP.isNearMatch())
1316 return LoongArchAsmParser::Match_InvalidTPRelAddSymbol;
1317 break;
1318 }
1319 // 'Imm32' class
1320 case MCK_Imm32: {
1321 DiagnosticPredicate DP(Operand.isImm32());
1322 if (DP.isMatch())
1323 return MCTargetAsmParser::Match_Success;
1324 if (DP.isNearMatch())
1325 return LoongArchAsmParser::Match_InvalidImm32;
1326 break;
1327 }
1328 // 'Imm64' class
1329 case MCK_Imm64: {
1330 DiagnosticPredicate DP(Operand.isImm64());
1331 if (DP.isMatch())
1332 return MCTargetAsmParser::Match_Success;
1333 if (DP.isNearMatch())
1334 return LoongArchAsmParser::Match_InvalidImm64;
1335 break;
1336 }
1337 // 'UImm1' class
1338 case MCK_UImm1: {
1339 DiagnosticPredicate DP(Operand.isUImm1());
1340 if (DP.isMatch())
1341 return MCTargetAsmParser::Match_Success;
1342 if (DP.isNearMatch())
1343 return LoongArchAsmParser::Match_InvalidUImm1;
1344 break;
1345 }
1346 // 'UImm2' class
1347 case MCK_UImm2: {
1348 DiagnosticPredicate DP(Operand.isUImm2());
1349 if (DP.isMatch())
1350 return MCTargetAsmParser::Match_Success;
1351 if (DP.isNearMatch())
1352 return LoongArchAsmParser::Match_InvalidUImm2;
1353 break;
1354 }
1355 // 'UImm2plus1' class
1356 case MCK_UImm2plus1: {
1357 DiagnosticPredicate DP(Operand.isUImm2plus1());
1358 if (DP.isMatch())
1359 return MCTargetAsmParser::Match_Success;
1360 if (DP.isNearMatch())
1361 return LoongArchAsmParser::Match_InvalidUImm2plus1;
1362 break;
1363 }
1364 // 'UImm3' class
1365 case MCK_UImm3: {
1366 DiagnosticPredicate DP(Operand.isUImm3());
1367 if (DP.isMatch())
1368 return MCTargetAsmParser::Match_Success;
1369 if (DP.isNearMatch())
1370 return LoongArchAsmParser::Match_InvalidUImm3;
1371 break;
1372 }
1373 // 'UImm4' class
1374 case MCK_UImm4: {
1375 DiagnosticPredicate DP(Operand.isUImm4());
1376 if (DP.isMatch())
1377 return MCTargetAsmParser::Match_Success;
1378 if (DP.isNearMatch())
1379 return LoongArchAsmParser::Match_InvalidUImm4;
1380 break;
1381 }
1382 // 'UImm5' class
1383 case MCK_UImm5: {
1384 DiagnosticPredicate DP(Operand.isUImm5());
1385 if (DP.isMatch())
1386 return MCTargetAsmParser::Match_Success;
1387 if (DP.isNearMatch())
1388 return LoongArchAsmParser::Match_InvalidUImm5;
1389 break;
1390 }
1391 // 'UImm6' class
1392 case MCK_UImm6: {
1393 DiagnosticPredicate DP(Operand.isUImm6());
1394 if (DP.isMatch())
1395 return MCTargetAsmParser::Match_Success;
1396 if (DP.isNearMatch())
1397 return LoongArchAsmParser::Match_InvalidUImm6;
1398 break;
1399 }
1400 // 'UImm7' class
1401 case MCK_UImm7: {
1402 DiagnosticPredicate DP(Operand.isUImm7());
1403 if (DP.isMatch())
1404 return MCTargetAsmParser::Match_Success;
1405 if (DP.isNearMatch())
1406 return LoongArchAsmParser::Match_InvalidUImm7;
1407 break;
1408 }
1409 // 'UImm8' class
1410 case MCK_UImm8: {
1411 DiagnosticPredicate DP(Operand.isUImm8());
1412 if (DP.isMatch())
1413 return MCTargetAsmParser::Match_Success;
1414 if (DP.isNearMatch())
1415 return LoongArchAsmParser::Match_InvalidUImm8;
1416 break;
1417 }
1418 // 'UImm12' class
1419 case MCK_UImm12: {
1420 DiagnosticPredicate DP(Operand.isUImm12());
1421 if (DP.isMatch())
1422 return MCTargetAsmParser::Match_Success;
1423 if (DP.isNearMatch())
1424 return LoongArchAsmParser::Match_InvalidUImm12;
1425 break;
1426 }
1427 // 'UImm12ori' class
1428 case MCK_UImm12ori: {
1429 DiagnosticPredicate DP(Operand.isUImm12ori());
1430 if (DP.isMatch())
1431 return MCTargetAsmParser::Match_Success;
1432 if (DP.isNearMatch())
1433 return LoongArchAsmParser::Match_InvalidUImm12ori;
1434 break;
1435 }
1436 // 'UImm14' class
1437 case MCK_UImm14: {
1438 DiagnosticPredicate DP(Operand.isUImm14());
1439 if (DP.isMatch())
1440 return MCTargetAsmParser::Match_Success;
1441 if (DP.isNearMatch())
1442 return LoongArchAsmParser::Match_InvalidUImm14;
1443 break;
1444 }
1445 // 'UImm15' class
1446 case MCK_UImm15: {
1447 DiagnosticPredicate DP(Operand.isUImm15());
1448 if (DP.isMatch())
1449 return MCTargetAsmParser::Match_Success;
1450 if (DP.isNearMatch())
1451 return LoongArchAsmParser::Match_InvalidUImm15;
1452 break;
1453 }
1454 // 'SImm5' class
1455 case MCK_SImm5: {
1456 DiagnosticPredicate DP(Operand.isSImm5());
1457 if (DP.isMatch())
1458 return MCTargetAsmParser::Match_Success;
1459 if (DP.isNearMatch())
1460 return LoongArchAsmParser::Match_InvalidSImm5;
1461 break;
1462 }
1463 // 'SImm8' class
1464 case MCK_SImm8: {
1465 DiagnosticPredicate DP(Operand.isSImm8());
1466 if (DP.isMatch())
1467 return MCTargetAsmParser::Match_Success;
1468 if (DP.isNearMatch())
1469 return LoongArchAsmParser::Match_InvalidSImm8;
1470 break;
1471 }
1472 // 'SImm8lsl1' class
1473 case MCK_SImm8lsl1: {
1474 DiagnosticPredicate DP(Operand.isSImm8lsl1());
1475 if (DP.isMatch())
1476 return MCTargetAsmParser::Match_Success;
1477 if (DP.isNearMatch())
1478 return LoongArchAsmParser::Match_InvalidSImm8lsl1;
1479 break;
1480 }
1481 // 'SImm8lsl2' class
1482 case MCK_SImm8lsl2: {
1483 DiagnosticPredicate DP(Operand.isSImm8lsl2());
1484 if (DP.isMatch())
1485 return MCTargetAsmParser::Match_Success;
1486 if (DP.isNearMatch())
1487 return LoongArchAsmParser::Match_InvalidSImm8lsl2;
1488 break;
1489 }
1490 // 'SImm8lsl3' class
1491 case MCK_SImm8lsl3: {
1492 DiagnosticPredicate DP(Operand.isSImm8lsl3());
1493 if (DP.isMatch())
1494 return MCTargetAsmParser::Match_Success;
1495 if (DP.isNearMatch())
1496 return LoongArchAsmParser::Match_InvalidSImm8lsl3;
1497 break;
1498 }
1499 // 'SImm9lsl3' class
1500 case MCK_SImm9lsl3: {
1501 DiagnosticPredicate DP(Operand.isSImm9lsl3());
1502 if (DP.isMatch())
1503 return MCTargetAsmParser::Match_Success;
1504 if (DP.isNearMatch())
1505 return LoongArchAsmParser::Match_InvalidSImm9lsl3;
1506 break;
1507 }
1508 // 'SImm10' class
1509 case MCK_SImm10: {
1510 DiagnosticPredicate DP(Operand.isSImm10());
1511 if (DP.isMatch())
1512 return MCTargetAsmParser::Match_Success;
1513 if (DP.isNearMatch())
1514 return LoongArchAsmParser::Match_InvalidSImm10;
1515 break;
1516 }
1517 // 'SImm10lsl2' class
1518 case MCK_SImm10lsl2: {
1519 DiagnosticPredicate DP(Operand.isSImm10lsl2());
1520 if (DP.isMatch())
1521 return MCTargetAsmParser::Match_Success;
1522 if (DP.isNearMatch())
1523 return LoongArchAsmParser::Match_InvalidSImm10lsl2;
1524 break;
1525 }
1526 // 'SImm11lsl1' class
1527 case MCK_SImm11lsl1: {
1528 DiagnosticPredicate DP(Operand.isSImm11lsl1());
1529 if (DP.isMatch())
1530 return MCTargetAsmParser::Match_Success;
1531 if (DP.isNearMatch())
1532 return LoongArchAsmParser::Match_InvalidSImm11lsl1;
1533 break;
1534 }
1535 // 'SImm12' class
1536 case MCK_SImm12: {
1537 DiagnosticPredicate DP(Operand.isSImm12());
1538 if (DP.isMatch())
1539 return MCTargetAsmParser::Match_Success;
1540 if (DP.isNearMatch())
1541 return LoongArchAsmParser::Match_InvalidSImm12;
1542 break;
1543 }
1544 // 'SImm12addlike' class
1545 case MCK_SImm12addlike: {
1546 DiagnosticPredicate DP(Operand.isSImm12addlike());
1547 if (DP.isMatch())
1548 return MCTargetAsmParser::Match_Success;
1549 if (DP.isNearMatch())
1550 return LoongArchAsmParser::Match_InvalidSImm12addlike;
1551 break;
1552 }
1553 // 'SImm12lu52id' class
1554 case MCK_SImm12lu52id: {
1555 DiagnosticPredicate DP(Operand.isSImm12lu52id());
1556 if (DP.isMatch())
1557 return MCTargetAsmParser::Match_Success;
1558 if (DP.isNearMatch())
1559 return LoongArchAsmParser::Match_InvalidSImm12lu52id;
1560 break;
1561 }
1562 // 'SImm13' class
1563 case MCK_SImm13: {
1564 DiagnosticPredicate DP(Operand.isSImm13());
1565 if (DP.isMatch())
1566 return MCTargetAsmParser::Match_Success;
1567 if (DP.isNearMatch())
1568 return LoongArchAsmParser::Match_InvalidSImm13;
1569 break;
1570 }
1571 // 'SImm14lsl2' class
1572 case MCK_SImm14lsl2: {
1573 DiagnosticPredicate DP(Operand.isSImm14lsl2());
1574 if (DP.isMatch())
1575 return MCTargetAsmParser::Match_Success;
1576 if (DP.isNearMatch())
1577 return LoongArchAsmParser::Match_InvalidSImm14lsl2;
1578 break;
1579 }
1580 // 'SImm16' class
1581 case MCK_SImm16: {
1582 DiagnosticPredicate DP(Operand.isSImm16());
1583 if (DP.isMatch())
1584 return MCTargetAsmParser::Match_Success;
1585 if (DP.isNearMatch())
1586 return LoongArchAsmParser::Match_InvalidSImm16;
1587 break;
1588 }
1589 // 'SImm16lsl2' class
1590 case MCK_SImm16lsl2: {
1591 DiagnosticPredicate DP(Operand.isSImm16lsl2());
1592 if (DP.isMatch())
1593 return MCTargetAsmParser::Match_Success;
1594 if (DP.isNearMatch())
1595 return LoongArchAsmParser::Match_InvalidSImm16lsl2;
1596 break;
1597 }
1598 // 'SImm20' class
1599 case MCK_SImm20: {
1600 DiagnosticPredicate DP(Operand.isSImm20());
1601 if (DP.isMatch())
1602 return MCTargetAsmParser::Match_Success;
1603 if (DP.isNearMatch())
1604 return LoongArchAsmParser::Match_InvalidSImm20;
1605 break;
1606 }
1607 // 'SImm20pcalau12i' class
1608 case MCK_SImm20pcalau12i: {
1609 DiagnosticPredicate DP(Operand.isSImm20pcalau12i());
1610 if (DP.isMatch())
1611 return MCTargetAsmParser::Match_Success;
1612 if (DP.isNearMatch())
1613 return LoongArchAsmParser::Match_InvalidSImm20pcalau12i;
1614 break;
1615 }
1616 // 'SImm20lu12iw' class
1617 case MCK_SImm20lu12iw: {
1618 DiagnosticPredicate DP(Operand.isSImm20lu12iw());
1619 if (DP.isMatch())
1620 return MCTargetAsmParser::Match_Success;
1621 if (DP.isNearMatch())
1622 return LoongArchAsmParser::Match_InvalidSImm20lu12iw;
1623 break;
1624 }
1625 // 'SImm20lu32id' class
1626 case MCK_SImm20lu32id: {
1627 DiagnosticPredicate DP(Operand.isSImm20lu32id());
1628 if (DP.isMatch())
1629 return MCTargetAsmParser::Match_Success;
1630 if (DP.isNearMatch())
1631 return LoongArchAsmParser::Match_InvalidSImm20lu32id;
1632 break;
1633 }
1634 // 'SImm20pcaddu18i' class
1635 case MCK_SImm20pcaddu18i: {
1636 DiagnosticPredicate DP(Operand.isSImm20pcaddu18i());
1637 if (DP.isMatch())
1638 return MCTargetAsmParser::Match_Success;
1639 if (DP.isNearMatch())
1640 return LoongArchAsmParser::Match_InvalidSImm20pcaddu18i;
1641 break;
1642 }
1643 // 'SImm20pcaddi' class
1644 case MCK_SImm20pcaddi: {
1645 DiagnosticPredicate DP(Operand.isSImm20pcaddi());
1646 if (DP.isMatch())
1647 return MCTargetAsmParser::Match_Success;
1648 if (DP.isNearMatch())
1649 return LoongArchAsmParser::Match_InvalidSImm20pcaddi;
1650 break;
1651 }
1652 // 'SImm21lsl2' class
1653 case MCK_SImm21lsl2: {
1654 DiagnosticPredicate DP(Operand.isSImm21lsl2());
1655 if (DP.isMatch())
1656 return MCTargetAsmParser::Match_Success;
1657 if (DP.isNearMatch())
1658 return LoongArchAsmParser::Match_InvalidSImm21lsl2;
1659 break;
1660 }
1661 } // end switch (Kind)
1662
1663 if (Operand.isReg()) {
1664 MatchClassKind OpKind;
1665 switch (Operand.getReg().id()) {
1666 default: OpKind = InvalidMatchClass; break;
1667 case LoongArch::R0: OpKind = MCK_GPR; break;
1668 case LoongArch::R1: OpKind = MCK_GPR; break;
1669 case LoongArch::R2: OpKind = MCK_GPR; break;
1670 case LoongArch::R3: OpKind = MCK_GPR; break;
1671 case LoongArch::R4: OpKind = MCK_GPRT; break;
1672 case LoongArch::R5: OpKind = MCK_GPRT; break;
1673 case LoongArch::R6: OpKind = MCK_GPRT; break;
1674 case LoongArch::R7: OpKind = MCK_GPRT; break;
1675 case LoongArch::R8: OpKind = MCK_GPRT; break;
1676 case LoongArch::R9: OpKind = MCK_GPRT; break;
1677 case LoongArch::R10: OpKind = MCK_GPRT; break;
1678 case LoongArch::R11: OpKind = MCK_GPRT; break;
1679 case LoongArch::R12: OpKind = MCK_GPRT; break;
1680 case LoongArch::R13: OpKind = MCK_GPRT; break;
1681 case LoongArch::R14: OpKind = MCK_GPRT; break;
1682 case LoongArch::R15: OpKind = MCK_GPRT; break;
1683 case LoongArch::R16: OpKind = MCK_GPRT; break;
1684 case LoongArch::R17: OpKind = MCK_GPRT; break;
1685 case LoongArch::R18: OpKind = MCK_GPRT; break;
1686 case LoongArch::R19: OpKind = MCK_GPRT; break;
1687 case LoongArch::R20: OpKind = MCK_GPRT; break;
1688 case LoongArch::R21: OpKind = MCK_GPR; break;
1689 case LoongArch::R22: OpKind = MCK_GPR; break;
1690 case LoongArch::R23: OpKind = MCK_GPR; break;
1691 case LoongArch::R24: OpKind = MCK_GPR; break;
1692 case LoongArch::R25: OpKind = MCK_GPR; break;
1693 case LoongArch::R26: OpKind = MCK_GPR; break;
1694 case LoongArch::R27: OpKind = MCK_GPR; break;
1695 case LoongArch::R28: OpKind = MCK_GPR; break;
1696 case LoongArch::R29: OpKind = MCK_GPR; break;
1697 case LoongArch::R30: OpKind = MCK_GPR; break;
1698 case LoongArch::R31: OpKind = MCK_GPR; break;
1699 case LoongArch::F0: OpKind = MCK_FPR32; break;
1700 case LoongArch::F1: OpKind = MCK_FPR32; break;
1701 case LoongArch::F2: OpKind = MCK_FPR32; break;
1702 case LoongArch::F3: OpKind = MCK_FPR32; break;
1703 case LoongArch::F4: OpKind = MCK_FPR32; break;
1704 case LoongArch::F5: OpKind = MCK_FPR32; break;
1705 case LoongArch::F6: OpKind = MCK_FPR32; break;
1706 case LoongArch::F7: OpKind = MCK_FPR32; break;
1707 case LoongArch::F8: OpKind = MCK_FPR32; break;
1708 case LoongArch::F9: OpKind = MCK_FPR32; break;
1709 case LoongArch::F10: OpKind = MCK_FPR32; break;
1710 case LoongArch::F11: OpKind = MCK_FPR32; break;
1711 case LoongArch::F12: OpKind = MCK_FPR32; break;
1712 case LoongArch::F13: OpKind = MCK_FPR32; break;
1713 case LoongArch::F14: OpKind = MCK_FPR32; break;
1714 case LoongArch::F15: OpKind = MCK_FPR32; break;
1715 case LoongArch::F16: OpKind = MCK_FPR32; break;
1716 case LoongArch::F17: OpKind = MCK_FPR32; break;
1717 case LoongArch::F18: OpKind = MCK_FPR32; break;
1718 case LoongArch::F19: OpKind = MCK_FPR32; break;
1719 case LoongArch::F20: OpKind = MCK_FPR32; break;
1720 case LoongArch::F21: OpKind = MCK_FPR32; break;
1721 case LoongArch::F22: OpKind = MCK_FPR32; break;
1722 case LoongArch::F23: OpKind = MCK_FPR32; break;
1723 case LoongArch::F24: OpKind = MCK_FPR32; break;
1724 case LoongArch::F25: OpKind = MCK_FPR32; break;
1725 case LoongArch::F26: OpKind = MCK_FPR32; break;
1726 case LoongArch::F27: OpKind = MCK_FPR32; break;
1727 case LoongArch::F28: OpKind = MCK_FPR32; break;
1728 case LoongArch::F29: OpKind = MCK_FPR32; break;
1729 case LoongArch::F30: OpKind = MCK_FPR32; break;
1730 case LoongArch::F31: OpKind = MCK_FPR32; break;
1731 case LoongArch::F0_64: OpKind = MCK_FPR64; break;
1732 case LoongArch::F1_64: OpKind = MCK_FPR64; break;
1733 case LoongArch::F2_64: OpKind = MCK_FPR64; break;
1734 case LoongArch::F3_64: OpKind = MCK_FPR64; break;
1735 case LoongArch::F4_64: OpKind = MCK_FPR64; break;
1736 case LoongArch::F5_64: OpKind = MCK_FPR64; break;
1737 case LoongArch::F6_64: OpKind = MCK_FPR64; break;
1738 case LoongArch::F7_64: OpKind = MCK_FPR64; break;
1739 case LoongArch::F8_64: OpKind = MCK_FPR64; break;
1740 case LoongArch::F9_64: OpKind = MCK_FPR64; break;
1741 case LoongArch::F10_64: OpKind = MCK_FPR64; break;
1742 case LoongArch::F11_64: OpKind = MCK_FPR64; break;
1743 case LoongArch::F12_64: OpKind = MCK_FPR64; break;
1744 case LoongArch::F13_64: OpKind = MCK_FPR64; break;
1745 case LoongArch::F14_64: OpKind = MCK_FPR64; break;
1746 case LoongArch::F15_64: OpKind = MCK_FPR64; break;
1747 case LoongArch::F16_64: OpKind = MCK_FPR64; break;
1748 case LoongArch::F17_64: OpKind = MCK_FPR64; break;
1749 case LoongArch::F18_64: OpKind = MCK_FPR64; break;
1750 case LoongArch::F19_64: OpKind = MCK_FPR64; break;
1751 case LoongArch::F20_64: OpKind = MCK_FPR64; break;
1752 case LoongArch::F21_64: OpKind = MCK_FPR64; break;
1753 case LoongArch::F22_64: OpKind = MCK_FPR64; break;
1754 case LoongArch::F23_64: OpKind = MCK_FPR64; break;
1755 case LoongArch::F24_64: OpKind = MCK_FPR64; break;
1756 case LoongArch::F25_64: OpKind = MCK_FPR64; break;
1757 case LoongArch::F26_64: OpKind = MCK_FPR64; break;
1758 case LoongArch::F27_64: OpKind = MCK_FPR64; break;
1759 case LoongArch::F28_64: OpKind = MCK_FPR64; break;
1760 case LoongArch::F29_64: OpKind = MCK_FPR64; break;
1761 case LoongArch::F30_64: OpKind = MCK_FPR64; break;
1762 case LoongArch::F31_64: OpKind = MCK_FPR64; break;
1763 case LoongArch::FCC0: OpKind = MCK_CFR; break;
1764 case LoongArch::FCC1: OpKind = MCK_CFR; break;
1765 case LoongArch::FCC2: OpKind = MCK_CFR; break;
1766 case LoongArch::FCC3: OpKind = MCK_CFR; break;
1767 case LoongArch::FCC4: OpKind = MCK_CFR; break;
1768 case LoongArch::FCC5: OpKind = MCK_CFR; break;
1769 case LoongArch::FCC6: OpKind = MCK_CFR; break;
1770 case LoongArch::FCC7: OpKind = MCK_CFR; break;
1771 case LoongArch::FCSR0: OpKind = MCK_FCSR; break;
1772 case LoongArch::FCSR1: OpKind = MCK_FCSR; break;
1773 case LoongArch::FCSR2: OpKind = MCK_FCSR; break;
1774 case LoongArch::FCSR3: OpKind = MCK_FCSR; break;
1775 case LoongArch::VR0: OpKind = MCK_LSX128; break;
1776 case LoongArch::VR1: OpKind = MCK_LSX128; break;
1777 case LoongArch::VR2: OpKind = MCK_LSX128; break;
1778 case LoongArch::VR3: OpKind = MCK_LSX128; break;
1779 case LoongArch::VR4: OpKind = MCK_LSX128; break;
1780 case LoongArch::VR5: OpKind = MCK_LSX128; break;
1781 case LoongArch::VR6: OpKind = MCK_LSX128; break;
1782 case LoongArch::VR7: OpKind = MCK_LSX128; break;
1783 case LoongArch::VR8: OpKind = MCK_LSX128; break;
1784 case LoongArch::VR9: OpKind = MCK_LSX128; break;
1785 case LoongArch::VR10: OpKind = MCK_LSX128; break;
1786 case LoongArch::VR11: OpKind = MCK_LSX128; break;
1787 case LoongArch::VR12: OpKind = MCK_LSX128; break;
1788 case LoongArch::VR13: OpKind = MCK_LSX128; break;
1789 case LoongArch::VR14: OpKind = MCK_LSX128; break;
1790 case LoongArch::VR15: OpKind = MCK_LSX128; break;
1791 case LoongArch::VR16: OpKind = MCK_LSX128; break;
1792 case LoongArch::VR17: OpKind = MCK_LSX128; break;
1793 case LoongArch::VR18: OpKind = MCK_LSX128; break;
1794 case LoongArch::VR19: OpKind = MCK_LSX128; break;
1795 case LoongArch::VR20: OpKind = MCK_LSX128; break;
1796 case LoongArch::VR21: OpKind = MCK_LSX128; break;
1797 case LoongArch::VR22: OpKind = MCK_LSX128; break;
1798 case LoongArch::VR23: OpKind = MCK_LSX128; break;
1799 case LoongArch::VR24: OpKind = MCK_LSX128; break;
1800 case LoongArch::VR25: OpKind = MCK_LSX128; break;
1801 case LoongArch::VR26: OpKind = MCK_LSX128; break;
1802 case LoongArch::VR27: OpKind = MCK_LSX128; break;
1803 case LoongArch::VR28: OpKind = MCK_LSX128; break;
1804 case LoongArch::VR29: OpKind = MCK_LSX128; break;
1805 case LoongArch::VR30: OpKind = MCK_LSX128; break;
1806 case LoongArch::VR31: OpKind = MCK_LSX128; break;
1807 case LoongArch::XR0: OpKind = MCK_LASX256; break;
1808 case LoongArch::XR1: OpKind = MCK_LASX256; break;
1809 case LoongArch::XR2: OpKind = MCK_LASX256; break;
1810 case LoongArch::XR3: OpKind = MCK_LASX256; break;
1811 case LoongArch::XR4: OpKind = MCK_LASX256; break;
1812 case LoongArch::XR5: OpKind = MCK_LASX256; break;
1813 case LoongArch::XR6: OpKind = MCK_LASX256; break;
1814 case LoongArch::XR7: OpKind = MCK_LASX256; break;
1815 case LoongArch::XR8: OpKind = MCK_LASX256; break;
1816 case LoongArch::XR9: OpKind = MCK_LASX256; break;
1817 case LoongArch::XR10: OpKind = MCK_LASX256; break;
1818 case LoongArch::XR11: OpKind = MCK_LASX256; break;
1819 case LoongArch::XR12: OpKind = MCK_LASX256; break;
1820 case LoongArch::XR13: OpKind = MCK_LASX256; break;
1821 case LoongArch::XR14: OpKind = MCK_LASX256; break;
1822 case LoongArch::XR15: OpKind = MCK_LASX256; break;
1823 case LoongArch::XR16: OpKind = MCK_LASX256; break;
1824 case LoongArch::XR17: OpKind = MCK_LASX256; break;
1825 case LoongArch::XR18: OpKind = MCK_LASX256; break;
1826 case LoongArch::XR19: OpKind = MCK_LASX256; break;
1827 case LoongArch::XR20: OpKind = MCK_LASX256; break;
1828 case LoongArch::XR21: OpKind = MCK_LASX256; break;
1829 case LoongArch::XR22: OpKind = MCK_LASX256; break;
1830 case LoongArch::XR23: OpKind = MCK_LASX256; break;
1831 case LoongArch::XR24: OpKind = MCK_LASX256; break;
1832 case LoongArch::XR25: OpKind = MCK_LASX256; break;
1833 case LoongArch::XR26: OpKind = MCK_LASX256; break;
1834 case LoongArch::XR27: OpKind = MCK_LASX256; break;
1835 case LoongArch::XR28: OpKind = MCK_LASX256; break;
1836 case LoongArch::XR29: OpKind = MCK_LASX256; break;
1837 case LoongArch::XR30: OpKind = MCK_LASX256; break;
1838 case LoongArch::XR31: OpKind = MCK_LASX256; break;
1839 case LoongArch::SCR0: OpKind = MCK_SCR; break;
1840 case LoongArch::SCR1: OpKind = MCK_SCR; break;
1841 case LoongArch::SCR2: OpKind = MCK_SCR; break;
1842 case LoongArch::SCR3: OpKind = MCK_SCR; break;
1843 }
1844 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
1845 getDiagKindFromRegisterClass(Kind);
1846 }
1847
1848 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
1849 return getDiagKindFromRegisterClass(Kind);
1850
1851 return MCTargetAsmParser::Match_InvalidOperand;
1852}
1853
1854#ifndef NDEBUG
1855const char *getMatchClassName(MatchClassKind Kind) {
1856 switch (Kind) {
1857 case InvalidMatchClass: return "InvalidMatchClass";
1858 case OptionalMatchClass: return "OptionalMatchClass";
1859 case MCK_FCSR: return "MCK_FCSR";
1860 case MCK_SCR: return "MCK_SCR";
1861 case MCK_CFR: return "MCK_CFR";
1862 case MCK_GPRT: return "MCK_GPRT";
1863 case MCK_FPR32: return "MCK_FPR32";
1864 case MCK_FPR64: return "MCK_FPR64";
1865 case MCK_GPR: return "MCK_GPR";
1866 case MCK_LASX256: return "MCK_LASX256";
1867 case MCK_LSX128: return "MCK_LSX128";
1868 case MCK_AtomicMemAsmOperand: return "MCK_AtomicMemAsmOperand";
1869 case MCK_BareSymbol: return "MCK_BareSymbol";
1870 case MCK_Imm: return "MCK_Imm";
1871 case MCK_SImm26OperandB: return "MCK_SImm26OperandB";
1872 case MCK_SImm26OperandBL: return "MCK_SImm26OperandBL";
1873 case MCK_TPRelAddSymbol: return "MCK_TPRelAddSymbol";
1874 case MCK_Imm32: return "MCK_Imm32";
1875 case MCK_Imm64: return "MCK_Imm64";
1876 case MCK_UImm1: return "MCK_UImm1";
1877 case MCK_UImm2: return "MCK_UImm2";
1878 case MCK_UImm2plus1: return "MCK_UImm2plus1";
1879 case MCK_UImm3: return "MCK_UImm3";
1880 case MCK_UImm4: return "MCK_UImm4";
1881 case MCK_UImm5: return "MCK_UImm5";
1882 case MCK_UImm6: return "MCK_UImm6";
1883 case MCK_UImm7: return "MCK_UImm7";
1884 case MCK_UImm8: return "MCK_UImm8";
1885 case MCK_UImm12: return "MCK_UImm12";
1886 case MCK_UImm12ori: return "MCK_UImm12ori";
1887 case MCK_UImm14: return "MCK_UImm14";
1888 case MCK_UImm15: return "MCK_UImm15";
1889 case MCK_SImm5: return "MCK_SImm5";
1890 case MCK_SImm8: return "MCK_SImm8";
1891 case MCK_SImm8lsl1: return "MCK_SImm8lsl1";
1892 case MCK_SImm8lsl2: return "MCK_SImm8lsl2";
1893 case MCK_SImm8lsl3: return "MCK_SImm8lsl3";
1894 case MCK_SImm9lsl3: return "MCK_SImm9lsl3";
1895 case MCK_SImm10: return "MCK_SImm10";
1896 case MCK_SImm10lsl2: return "MCK_SImm10lsl2";
1897 case MCK_SImm11lsl1: return "MCK_SImm11lsl1";
1898 case MCK_SImm12: return "MCK_SImm12";
1899 case MCK_SImm12addlike: return "MCK_SImm12addlike";
1900 case MCK_SImm12lu52id: return "MCK_SImm12lu52id";
1901 case MCK_SImm13: return "MCK_SImm13";
1902 case MCK_SImm14lsl2: return "MCK_SImm14lsl2";
1903 case MCK_SImm16: return "MCK_SImm16";
1904 case MCK_SImm16lsl2: return "MCK_SImm16lsl2";
1905 case MCK_SImm20: return "MCK_SImm20";
1906 case MCK_SImm20pcalau12i: return "MCK_SImm20pcalau12i";
1907 case MCK_SImm20lu12iw: return "MCK_SImm20lu12iw";
1908 case MCK_SImm20lu32id: return "MCK_SImm20lu32id";
1909 case MCK_SImm20pcaddu18i: return "MCK_SImm20pcaddu18i";
1910 case MCK_SImm20pcaddi: return "MCK_SImm20pcaddi";
1911 case MCK_SImm21lsl2: return "MCK_SImm21lsl2";
1912 case NumMatchClassKinds: return "NumMatchClassKinds";
1913 }
1914 llvm_unreachable("unhandled MatchClassKind!");
1915}
1916
1917#endif // NDEBUG
1918FeatureBitset LoongArchAsmParser::
1919ComputeAvailableFeatures(const FeatureBitset &FB) const {
1920 FeatureBitset Features;
1921 if (FB[LoongArch::Feature64Bit])
1922 Features.set(Feature_IsLA64Bit);
1923 if (!FB[LoongArch::Feature64Bit])
1924 Features.set(Feature_IsLA32Bit);
1925 if (FB[LoongArch::LaGlobalWithPcrel])
1926 Features.set(Feature_HasLaGlobalWithPcrelBit);
1927 if (FB[LoongArch::LaGlobalWithAbs])
1928 Features.set(Feature_HasLaGlobalWithAbsBit);
1929 if (FB[LoongArch::LaLocalWithAbs])
1930 Features.set(Feature_HasLaLocalWithAbsBit);
1931 return Features;
1932}
1933
1934static bool checkAsmTiedOperandConstraints(const LoongArchAsmParser&AsmParser,
1935 unsigned Kind, const OperandVector &Operands,
1936 uint64_t &ErrorInfo) {
1937 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1938 const uint8_t *Converter = ConversionTable[Kind];
1939 for (const uint8_t *p = Converter; *p; p += 2) {
1940 switch (*p) {
1941 case CVT_Tied: {
1942 unsigned OpIdx = *(p + 1);
1943 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
1944 std::begin(TiedAsmOperandTable)) &&
1945 "Tied operand not found");
1946 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
1947 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
1948 if (OpndNum1 != OpndNum2) {
1949 auto &SrcOp1 = Operands[OpndNum1];
1950 auto &SrcOp2 = Operands[OpndNum2];
1951 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) {
1952 ErrorInfo = OpndNum2;
1953 return false;
1954 }
1955 }
1956 break;
1957 }
1958 default:
1959 break;
1960 }
1961 }
1962 return true;
1963}
1964
1965static const char MnemonicTable[] =
1966 "\005adc.b\005adc.d\005adc.h\005adc.w\005add.d\005add.w\006addi.d\006add"
1967 "i.w\taddu12i.d\taddu12i.w\taddu16i.d\006alsl.d\006alsl.w\007alsl.wu\007"
1968 "amadd.b\007amadd.d\007amadd.h\007amadd.w\namadd_db.b\namadd_db.d\namadd"
1969 "_db.h\namadd_db.w\007amand.d\007amand.w\namand_db.d\namand_db.w\007amca"
1970 "s.b\007amcas.d\007amcas.h\007amcas.w\namcas_db.b\namcas_db.d\namcas_db."
1971 "h\namcas_db.w\007ammax.d\010ammax.du\007ammax.w\010ammax.wu\nammax_db.d"
1972 "\013ammax_db.du\nammax_db.w\013ammax_db.wu\007ammin.d\010ammin.du\007am"
1973 "min.w\010ammin.wu\nammin_db.d\013ammin_db.du\nammin_db.w\013ammin_db.wu"
1974 "\006amor.d\006amor.w\tamor_db.d\tamor_db.w\010amswap.b\010amswap.d\010a"
1975 "mswap.h\010amswap.w\013amswap_db.b\013amswap_db.d\013amswap_db.h\013ams"
1976 "wap_db.w\007amxor.d\007amxor.w\namxor_db.d\namxor_db.w\003and\004andi\004"
1977 "andn\010armadc.w\010armadd.w\010armand.w\tarmmfflag\010armmov.d\010armm"
1978 "ov.w\007armmove\tarmmtflag\010armnot.w\007armor.w\tarmrotr.w\narmrotri."
1979 "w\010armrrx.w\010armsbc.w\010armsll.w\tarmslli.w\010armsra.w\tarmsrai.w"
1980 "\010armsrl.w\tarmsrli.w\010armsub.w\010armxor.w\010asrtgt.d\010asrtle.d"
1981 "\001b\005bceqz\005bcnez\003beq\004beqz\003bge\004bgeu\004bgez\003bgt\004"
1982 "bgtu\004bgtz\tbitrev.4b\tbitrev.8b\010bitrev.d\010bitrev.w\002bl\003ble"
1983 "\004bleu\004blez\003blt\004bltu\004bltz\003bne\004bnez\005break\tbstrin"
1984 "s.d\tbstrins.w\nbstrpick.d\nbstrpick.w\nbytepick.d\nbytepick.w\005cacop"
1985 "\006call36\005clo.d\005clo.w\005clz.d\005clz.w\006cpucfg\tcrc.w.b.w\tcr"
1986 "c.w.d.w\tcrc.w.h.w\tcrc.w.w.w\ncrcc.w.b.w\ncrcc.w.d.w\ncrcc.w.h.w\ncrcc"
1987 ".w.w.w\005csrrd\005csrwr\007csrxchg\005cto.d\005cto.w\005ctz.d\005ctz.w"
1988 "\004dbar\004dbcl\005div.d\006div.du\005div.w\006div.wu\004ertn\007ext.w"
1989 ".b\007ext.w.h\006fabs.d\006fabs.s\006fadd.d\006fadd.s\010fclass.d\010fc"
1990 "lass.s\nfcmp.caf.d\nfcmp.caf.s\nfcmp.ceq.d\nfcmp.ceq.s\nfcmp.cle.d\nfcm"
1991 "p.cle.s\nfcmp.clt.d\nfcmp.clt.s\nfcmp.cne.d\nfcmp.cne.s\nfcmp.cor.d\nfc"
1992 "mp.cor.s\013fcmp.cueq.d\013fcmp.cueq.s\013fcmp.cule.d\013fcmp.cule.s\013"
1993 "fcmp.cult.d\013fcmp.cult.s\nfcmp.cun.d\nfcmp.cun.s\013fcmp.cune.d\013fc"
1994 "mp.cune.s\nfcmp.saf.d\nfcmp.saf.s\nfcmp.seq.d\nfcmp.seq.s\nfcmp.sle.d\n"
1995 "fcmp.sle.s\nfcmp.slt.d\nfcmp.slt.s\nfcmp.sne.d\nfcmp.sne.s\nfcmp.sor.d\n"
1996 "fcmp.sor.s\013fcmp.sueq.d\013fcmp.sueq.s\013fcmp.sule.d\013fcmp.sule.s\013"
1997 "fcmp.sult.d\013fcmp.sult.s\nfcmp.sun.d\nfcmp.sun.s\013fcmp.sune.d\013fc"
1998 "mp.sune.s\013fcopysign.d\013fcopysign.s\tfcvt.d.ld\010fcvt.d.s\tfcvt.ld"
1999 ".d\010fcvt.s.d\tfcvt.ud.d\006fdiv.d\006fdiv.s\tffint.d.l\tffint.d.w\tff"
2000 "int.s.l\tffint.s.w\005fld.d\005fld.s\007fldgt.d\007fldgt.s\007fldle.d\007"
2001 "fldle.s\006fldx.d\006fldx.s\007flogb.d\007flogb.s\007fmadd.d\007fmadd.s"
2002 "\006fmax.d\006fmax.s\007fmaxa.d\007fmaxa.s\006fmin.d\006fmin.s\007fmina"
2003 ".d\007fmina.s\006fmov.d\006fmov.s\007fmsub.d\007fmsub.s\006fmul.d\006fm"
2004 "ul.s\006fneg.d\006fneg.s\010fnmadd.d\010fnmadd.s\010fnmsub.d\010fnmsub."
2005 "s\010frecip.d\010frecip.s\tfrecipe.d\tfrecipe.s\007frint.d\007frint.s\010"
2006 "frsqrt.d\010frsqrt.s\tfrsqrte.d\tfrsqrte.s\tfscaleb.d\tfscaleb.s\004fse"
2007 "l\007fsqrt.d\007fsqrt.s\005fst.d\005fst.s\007fstgt.d\007fstgt.s\007fstl"
2008 "e.d\007fstle.s\006fstx.d\006fstx.s\006fsub.d\006fsub.s\tftint.l.d\tftin"
2009 "t.l.s\tftint.w.d\tftint.w.s\013ftintrm.l.d\013ftintrm.l.s\013ftintrm.w."
2010 "d\013ftintrm.w.s\014ftintrne.l.d\014ftintrne.l.s\014ftintrne.w.d\014fti"
2011 "ntrne.w.s\013ftintrp.l.d\013ftintrp.l.s\013ftintrp.w.d\013ftintrp.w.s\013"
2012 "ftintrz.l.d\013ftintrz.l.s\013ftintrz.w.d\013ftintrz.w.s\006gcsrrd\006g"
2013 "csrwr\010gcsrxchg\tgtlbflush\004hvcl\004ibar\004idle\006invtlb\tiocsrrd"
2014 ".b\tiocsrrd.d\tiocsrrd.h\tiocsrrd.w\tiocsrwr.b\tiocsrwr.d\tiocsrwr.h\ti"
2015 "ocsrwr.w\004jirl\006jiscr0\006jiscr1\002jr\002la\006la.abs\tla.global\006"
2016 "la.got\010la.local\010la.pcrel\013la.tls.desc\tla.tls.gd\tla.tls.ie\tla"
2017 ".tls.ld\tla.tls.le\004ld.b\005ld.bu\004ld.d\004ld.h\005ld.hu\004ld.w\005"
2018 "ld.wu\005lddir\006ldgt.b\006ldgt.d\006ldgt.h\006ldgt.w\005ldl.d\005ldl."
2019 "w\006ldle.b\006ldle.d\006ldle.h\006ldle.w\005ldpte\007ldptr.d\007ldptr."
2020 "w\005ldr.d\005ldr.w\005ldx.b\006ldx.bu\005ldx.d\005ldx.h\006ldx.hu\005l"
2021 "dx.w\006ldx.wu\004li.d\004li.w\004ll.d\004ll.w\007llacq.d\007llacq.w\007"
2022 "lu12i.w\007lu32i.d\007lu52i.d\007maskeqz\007masknez\005mod.d\006mod.du\005"
2023 "mod.w\006mod.wu\010movcf2fr\010movcf2gr\004move\nmovfcsr2gr\010movfr2cf"
2024 "\nmovfr2gr.d\nmovfr2gr.s\013movfrh2gr.s\010movgr2cf\nmovgr2fcsr\nmovgr2"
2025 "fr.d\nmovgr2fr.w\013movgr2frh.w\tmovgr2scr\tmovscr2gr\005mul.d\005mul.w"
2026 "\006mulh.d\007mulh.du\006mulh.w\007mulh.wu\010mulw.d.w\tmulw.d.wu\003no"
2027 "p\003nor\002or\003ori\003orn\006pcaddi\tpcaddu12i\tpcaddu18i\tpcalau12i"
2028 "\005preld\006preldx\005rcr.b\005rcr.d\005rcr.h\005rcr.w\006rcri.b\006rc"
2029 "ri.d\006rcri.h\006rcri.w\010rdtime.d\trdtimeh.w\trdtimel.w\003ret\007re"
2030 "vb.2h\007revb.2w\007revb.4h\006revb.d\007revh.2w\006revh.d\006rotr.b\006"
2031 "rotr.d\006rotr.h\006rotr.w\007rotri.b\007rotri.d\007rotri.h\007rotri.w\005"
2032 "sbc.b\005sbc.d\005sbc.h\005sbc.w\004sc.d\004sc.q\004sc.w\007screl.d\007"
2033 "screl.w\007setarmj\007setx86j\013setx86loope\014setx86loopne\005sll.d\005"
2034 "sll.w\006slli.d\006slli.w\003slt\004slti\004sltu\005sltui\005sra.d\005s"
2035 "ra.w\006srai.d\006srai.w\005srl.d\005srl.w\006srli.d\006srli.w\004st.b\004"
2036 "st.d\004st.h\004st.w\006stgt.b\006stgt.d\006stgt.h\006stgt.w\005stl.d\005"
2037 "stl.w\006stle.b\006stle.d\006stle.h\006stle.w\007stptr.d\007stptr.w\005"
2038 "str.d\005str.w\005stx.b\005stx.d\005stx.h\005stx.w\005sub.d\005sub.w\007"
2039 "syscall\006tail36\006tlbclr\007tlbfill\010tlbflush\005tlbrd\007tlbsrch\005"
2040 "tlbwr\007vabsd.b\010vabsd.bu\007vabsd.d\010vabsd.du\007vabsd.h\010vabsd"
2041 ".hu\007vabsd.w\010vabsd.wu\006vadd.b\006vadd.d\006vadd.h\006vadd.q\006v"
2042 "add.w\007vadda.b\007vadda.d\007vadda.h\007vadda.w\010vaddi.bu\010vaddi."
2043 "du\010vaddi.hu\010vaddi.wu\013vaddwev.d.w\014vaddwev.d.wu\016vaddwev.d."
2044 "wu.w\013vaddwev.h.b\014vaddwev.h.bu\016vaddwev.h.bu.b\013vaddwev.q.d\014"
2045 "vaddwev.q.du\016vaddwev.q.du.d\013vaddwev.w.h\014vaddwev.w.hu\016vaddwe"
2046 "v.w.hu.h\013vaddwod.d.w\014vaddwod.d.wu\016vaddwod.d.wu.w\013vaddwod.h."
2047 "b\014vaddwod.h.bu\016vaddwod.h.bu.b\013vaddwod.q.d\014vaddwod.q.du\016v"
2048 "addwod.q.du.d\013vaddwod.w.h\014vaddwod.w.hu\016vaddwod.w.hu.h\006vand."
2049 "v\007vandi.b\007vandn.v\006vavg.b\007vavg.bu\006vavg.d\007vavg.du\006va"
2050 "vg.h\007vavg.hu\006vavg.w\007vavg.wu\007vavgr.b\010vavgr.bu\007vavgr.d\010"
2051 "vavgr.du\007vavgr.h\010vavgr.hu\007vavgr.w\010vavgr.wu\tvbitclr.b\tvbit"
2052 "clr.d\tvbitclr.h\tvbitclr.w\nvbitclri.b\nvbitclri.d\nvbitclri.h\nvbitcl"
2053 "ri.w\tvbitrev.b\tvbitrev.d\tvbitrev.h\tvbitrev.w\nvbitrevi.b\nvbitrevi."
2054 "d\nvbitrevi.h\nvbitrevi.w\tvbitsel.v\nvbitseli.b\tvbitset.b\tvbitset.d\t"
2055 "vbitset.h\tvbitset.w\nvbitseti.b\nvbitseti.d\nvbitseti.h\nvbitseti.w\007"
2056 "vbsll.v\007vbsrl.v\006vclo.b\006vclo.d\006vclo.h\006vclo.w\006vclz.b\006"
2057 "vclz.d\006vclz.h\006vclz.w\006vdiv.b\007vdiv.bu\006vdiv.d\007vdiv.du\006"
2058 "vdiv.h\007vdiv.hu\006vdiv.w\007vdiv.wu\013vext2xv.d.b\013vext2xv.d.h\013"
2059 "vext2xv.d.w\015vext2xv.du.bu\015vext2xv.du.hu\015vext2xv.du.wu\013vext2"
2060 "xv.h.b\015vext2xv.hu.bu\013vext2xv.w.b\013vext2xv.w.h\015vext2xv.wu.bu\015"
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2067 "ueq.d\014vfcmp.cueq.s\014vfcmp.cule.d\014vfcmp.cule.s\014vfcmp.cult.d\014"
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2073 "fcmp.sun.d\013vfcmp.sun.s\014vfcmp.sune.d\014vfcmp.sune.s\tvfcvt.h.s\tv"
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2080 "vfrecipe.d\nvfrecipe.s\010vfrint.d\010vfrint.s\nvfrintrm.d\nvfrintrm.s\013"
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2082 "z.s\tvfrsqrt.d\tvfrsqrt.s\nvfrsqrte.d\nvfrsqrte.s\010vfrstp.b\010vfrstp"
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2089 "z.l.d\015vftintrz.lu.d\014vftintrz.w.d\014vftintrz.w.s\015vftintrz.wu.s"
2090 "\015vftintrzh.l.s\015vftintrzl.l.s\nvhaddw.d.w\014vhaddw.du.wu\nvhaddw."
2091 "h.b\014vhaddw.hu.bu\nvhaddw.q.d\014vhaddw.qu.du\nvhaddw.w.h\014vhaddw.w"
2092 "u.hu\nvhsubw.d.w\014vhsubw.du.wu\nvhsubw.h.b\014vhsubw.hu.bu\nvhsubw.q."
2093 "d\014vhsubw.qu.du\nvhsubw.w.h\014vhsubw.wu.hu\007vilvh.b\007vilvh.d\007"
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2099 "ddwev.q.du\017vmaddwev.q.du.d\014vmaddwev.w.h\015vmaddwev.w.hu\017vmadd"
2100 "wev.w.hu.h\014vmaddwod.d.w\015vmaddwod.d.wu\017vmaddwod.d.wu.w\014vmadd"
2101 "wod.h.b\015vmaddwod.h.bu\017vmaddwod.h.bu.b\014vmaddwod.q.d\015vmaddwod"
2102 ".q.du\017vmaddwod.q.du.d\014vmaddwod.w.h\015vmaddwod.w.hu\017vmaddwod.w"
2103 ".hu.h\006vmax.b\007vmax.bu\006vmax.d\007vmax.du\006vmax.h\007vmax.hu\006"
2104 "vmax.w\007vmax.wu\007vmaxi.b\010vmaxi.bu\007vmaxi.d\010vmaxi.du\007vmax"
2105 "i.h\010vmaxi.hu\007vmaxi.w\010vmaxi.wu\006vmin.b\007vmin.bu\006vmin.d\007"
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2107 "u\007vmini.d\010vmini.du\007vmini.h\010vmini.hu\007vmini.w\010vmini.wu\006"
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2111 "vmuh.d\007vmuh.du\006vmuh.h\007vmuh.hu\006vmuh.w\007vmuh.wu\006vmul.b\006"
2112 "vmul.d\006vmul.h\006vmul.w\013vmulwev.d.w\014vmulwev.d.wu\016vmulwev.d."
2113 "wu.w\013vmulwev.h.b\014vmulwev.h.bu\016vmulwev.h.bu.b\013vmulwev.q.d\014"
2114 "vmulwev.q.du\016vmulwev.q.du.d\013vmulwev.w.h\014vmulwev.w.hu\016vmulwe"
2115 "v.w.hu.h\013vmulwod.d.w\014vmulwod.d.wu\016vmulwod.d.wu.w\013vmulwod.h."
2116 "b\014vmulwod.h.bu\016vmulwod.h.bu.b\013vmulwod.q.d\014vmulwod.q.du\016v"
2117 "mulwod.q.du.d\013vmulwod.w.h\014vmulwod.w.hu\016vmulwod.w.hu.h\006vneg."
2118 "b\006vneg.d\006vneg.h\006vneg.w\006vnor.v\007vnori.b\005vor.v\006vori.b"
2119 "\006vorn.v\tvpackev.b\tvpackev.d\tvpackev.h\tvpackev.w\tvpackod.b\tvpac"
2120 "kod.d\tvpackod.h\tvpackod.w\007vpcnt.b\007vpcnt.d\007vpcnt.h\007vpcnt.w"
2121 "\010vpermi.w\tvpickev.b\tvpickev.d\tvpickev.h\tvpickev.w\tvpickod.b\tvp"
2122 "ickod.d\tvpickod.h\tvpickod.w\014vpickve2gr.b\015vpickve2gr.bu\014vpick"
2123 "ve2gr.d\015vpickve2gr.du\014vpickve2gr.h\015vpickve2gr.hu\014vpickve2gr"
2124 ".w\015vpickve2gr.wu\014vreplgr2vr.b\014vreplgr2vr.d\014vreplgr2vr.h\014"
2125 "vreplgr2vr.w\010vrepli.b\010vrepli.d\010vrepli.h\010vrepli.w\tvreplve.b"
2126 "\tvreplve.d\tvreplve.h\tvreplve.w\nvreplvei.b\nvreplvei.d\nvreplvei.h\n"
2127 "vreplvei.w\007vrotr.b\007vrotr.d\007vrotr.h\007vrotr.w\010vrotri.b\010v"
2128 "rotri.d\010vrotri.h\010vrotri.w\007vsadd.b\010vsadd.bu\007vsadd.d\010vs"
2129 "add.du\007vsadd.h\010vsadd.hu\007vsadd.w\010vsadd.wu\006vsat.b\007vsat."
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2131 "eq.b\006vseq.d\006vseq.h\006vseq.w\007vseqi.b\007vseqi.d\007vseqi.h\007"
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2133 "\014vsetanyeqz.b\014vsetanyeqz.d\014vsetanyeqz.h\014vsetanyeqz.w\tvsete"
2134 "qz.v\tvsetnez.v\007vshuf.b\007vshuf.d\007vshuf.h\007vshuf.w\tvshuf4i.b\t"
2135 "vshuf4i.d\tvshuf4i.h\tvshuf4i.w\nvsigncov.b\nvsigncov.d\nvsigncov.h\nvs"
2136 "igncov.w\006vsle.b\007vsle.bu\006vsle.d\007vsle.du\006vsle.h\007vsle.hu"
2137 "\006vsle.w\007vsle.wu\007vslei.b\010vslei.bu\007vslei.d\010vslei.du\007"
2138 "vslei.h\010vslei.hu\007vslei.w\010vslei.wu\006vsll.b\006vsll.d\006vsll."
2139 "h\006vsll.w\007vslli.b\007vslli.d\007vslli.h\007vslli.w\013vsllwil.d.w\015"
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2297 ".w\014xvsllwil.d.w\016xvsllwil.du.wu\014xvsllwil.h.b\016xvsllwil.hu.bu\014"
2298 "xvsllwil.w.h\016xvsllwil.wu.hu\007xvslt.b\010xvslt.bu\007xvslt.d\010xvs"
2299 "lt.du\007xvslt.h\010xvslt.hu\007xvslt.w\010xvslt.wu\010xvslti.b\txvslti"
2300 ".bu\010xvslti.d\txvslti.du\010xvslti.h\txvslti.hu\010xvslti.w\txvslti.w"
2301 "u\007xvsra.b\007xvsra.d\007xvsra.h\007xvsra.w\010xvsrai.b\010xvsrai.d\010"
2302 "xvsrai.h\010xvsrai.w\nxvsran.b.h\nxvsran.h.w\nxvsran.w.d\013xvsrani.b.h"
2303 "\013xvsrani.d.q\013xvsrani.h.w\013xvsrani.w.d\010xvsrar.b\010xvsrar.d\010"
2304 "xvsrar.h\010xvsrar.w\txvsrari.b\txvsrari.d\txvsrari.h\txvsrari.w\013xvs"
2305 "rarn.b.h\013xvsrarn.h.w\013xvsrarn.w.d\014xvsrarni.b.h\014xvsrarni.d.q\014"
2306 "xvsrarni.h.w\014xvsrarni.w.d\007xvsrl.b\007xvsrl.d\007xvsrl.h\007xvsrl."
2307 "w\010xvsrli.b\010xvsrli.d\010xvsrli.h\010xvsrli.w\nxvsrln.b.h\nxvsrln.h"
2308 ".w\nxvsrln.w.d\013xvsrlni.b.h\013xvsrlni.d.q\013xvsrlni.h.w\013xvsrlni."
2309 "w.d\010xvsrlr.b\010xvsrlr.d\010xvsrlr.h\010xvsrlr.w\txvsrlri.b\txvsrlri"
2310 ".d\txvsrlri.h\txvsrlri.w\013xvsrlrn.b.h\013xvsrlrn.h.w\013xvsrlrn.w.d\014"
2311 "xvsrlrni.b.h\014xvsrlrni.d.q\014xvsrlrni.h.w\014xvsrlrni.w.d\013xvssran"
2312 ".b.h\014xvssran.bu.h\013xvssran.h.w\014xvssran.hu.w\013xvssran.w.d\014x"
2313 "vssran.wu.d\014xvssrani.b.h\015xvssrani.bu.h\014xvssrani.d.q\015xvssran"
2314 "i.du.q\014xvssrani.h.w\015xvssrani.hu.w\014xvssrani.w.d\015xvssrani.wu."
2315 "d\014xvssrarn.b.h\015xvssrarn.bu.h\014xvssrarn.h.w\015xvssrarn.hu.w\014"
2316 "xvssrarn.w.d\015xvssrarn.wu.d\015xvssrarni.b.h\016xvssrarni.bu.h\015xvs"
2317 "srarni.d.q\016xvssrarni.du.q\015xvssrarni.h.w\016xvssrarni.hu.w\015xvss"
2318 "rarni.w.d\016xvssrarni.wu.d\013xvssrln.b.h\014xvssrln.bu.h\013xvssrln.h"
2319 ".w\014xvssrln.hu.w\013xvssrln.w.d\014xvssrln.wu.d\014xvssrlni.b.h\015xv"
2320 "ssrlni.bu.h\014xvssrlni.d.q\015xvssrlni.du.q\014xvssrlni.h.w\015xvssrln"
2321 "i.hu.w\014xvssrlni.w.d\015xvssrlni.wu.d\014xvssrlrn.b.h\015xvssrlrn.bu."
2322 "h\014xvssrlrn.h.w\015xvssrlrn.hu.w\014xvssrlrn.w.d\015xvssrlrn.wu.d\015"
2323 "xvssrlrni.b.h\016xvssrlrni.bu.h\015xvssrlrni.d.q\016xvssrlrni.du.q\015x"
2324 "vssrlrni.h.w\016xvssrlrni.hu.w\015xvssrlrni.w.d\016xvssrlrni.wu.d\010xv"
2325 "ssub.b\txvssub.bu\010xvssub.d\txvssub.du\010xvssub.h\txvssub.hu\010xvss"
2326 "ub.w\txvssub.wu\004xvst\txvstelm.b\txvstelm.d\txvstelm.h\txvstelm.w\005"
2327 "xvstx\007xvsub.b\007xvsub.d\007xvsub.h\007xvsub.q\007xvsub.w\txvsubi.bu"
2328 "\txvsubi.du\txvsubi.hu\txvsubi.wu\014xvsubwev.d.w\015xvsubwev.d.wu\014x"
2329 "vsubwev.h.b\015xvsubwev.h.bu\014xvsubwev.q.d\015xvsubwev.q.du\014xvsubw"
2330 "ev.w.h\015xvsubwev.w.hu\014xvsubwod.d.w\015xvsubwod.d.wu\014xvsubwod.h."
2331 "b\015xvsubwod.h.bu\014xvsubwod.q.d\015xvsubwod.q.du\014xvsubwod.w.h\015"
2332 "xvsubwod.w.hu\007xvxor.v\010xvxori.b";
2333
2334// Feature bitsets.
2335enum : uint8_t {
2336 AMFBS_None,
2337 AMFBS_HasLaGlobalWithAbs,
2338 AMFBS_HasLaGlobalWithPcrel,
2339 AMFBS_HasLaLocalWithAbs,
2340 AMFBS_IsLA32,
2341 AMFBS_IsLA64,
2342 AMFBS_IsLA32_HasLaGlobalWithAbs,
2343 AMFBS_IsLA64_HasLaGlobalWithAbs,
2344};
2345
2346static constexpr FeatureBitset FeatureBitsets[] = {
2347 {}, // AMFBS_None
2348 {Feature_HasLaGlobalWithAbsBit, },
2349 {Feature_HasLaGlobalWithPcrelBit, },
2350 {Feature_HasLaLocalWithAbsBit, },
2351 {Feature_IsLA32Bit, },
2352 {Feature_IsLA64Bit, },
2353 {Feature_IsLA32Bit, Feature_HasLaGlobalWithAbsBit, },
2354 {Feature_IsLA64Bit, Feature_HasLaGlobalWithAbsBit, },
2355};
2356
2357namespace {
2358 struct MatchEntry {
2359 uint16_t Mnemonic;
2360 uint16_t Opcode;
2361 uint8_t ConvertFn;
2362 uint8_t RequiredFeaturesIdx;
2363 uint8_t Classes[4];
2364 StringRef getMnemonic() const {
2365 return StringRef(MnemonicTable + Mnemonic + 1,
2366 MnemonicTable[Mnemonic]);
2367 }
2368 };
2369
2370 // Predicate for searching for an opcode.
2371 struct LessOpcode {
2372 bool operator()(const MatchEntry &LHS, StringRef RHS) {
2373 return LHS.getMnemonic() < RHS;
2374 }
2375 bool operator()(StringRef LHS, const MatchEntry &RHS) {
2376 return LHS < RHS.getMnemonic();
2377 }
2378 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
2379 return LHS.getMnemonic() < RHS.getMnemonic();
2380 }
2381 };
2382} // end anonymous namespace
2383
2384static const MatchEntry MatchTable0[] = {
2385 { 0 /* adc.b */, LoongArch::ADC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2386 { 6 /* adc.d */, LoongArch::ADC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2387 { 12 /* adc.h */, LoongArch::ADC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2388 { 18 /* adc.w */, LoongArch::ADC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2389 { 24 /* add.d */, LoongArch::ADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2390 { 24 /* add.d */, LoongArch::PseudoAddTPRel_D, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, },
2391 { 30 /* add.w */, LoongArch::ADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2392 { 30 /* add.w */, LoongArch::PseudoAddTPRel_W, Convert__Reg1_0__Reg1_1__Reg1_2__TPRelAddSymbol1_3, AMFBS_IsLA32, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_TPRelAddSymbol }, },
2393 { 36 /* addi.d */, LoongArch::ADDI_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2394 { 43 /* addi.w */, LoongArch::ADDI_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2395 { 50 /* addu12i.d */, LoongArch::ADDU12I_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm5 }, },
2396 { 60 /* addu12i.w */, LoongArch::ADDU12I_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm5 }, },
2397 { 70 /* addu16i.d */, LoongArch::ADDU16I_D, Convert__Reg1_0__Reg1_1__SImm161_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm16 }, },
2398 { 80 /* alsl.d */, LoongArch::ALSL_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2399 { 87 /* alsl.w */, LoongArch::ALSL_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2400 { 94 /* alsl.wu */, LoongArch::ALSL_WU, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, },
2401 { 102 /* amadd.b */, LoongArch::AMADD_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2402 { 110 /* amadd.d */, LoongArch::AMADD_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2403 { 118 /* amadd.h */, LoongArch::AMADD_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2404 { 126 /* amadd.w */, LoongArch::AMADD_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2405 { 134 /* amadd_db.b */, LoongArch::AMADD__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2406 { 145 /* amadd_db.d */, LoongArch::AMADD__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2407 { 156 /* amadd_db.h */, LoongArch::AMADD__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2408 { 167 /* amadd_db.w */, LoongArch::AMADD__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2409 { 178 /* amand.d */, LoongArch::AMAND_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2410 { 186 /* amand.w */, LoongArch::AMAND_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2411 { 194 /* amand_db.d */, LoongArch::AMAND__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2412 { 205 /* amand_db.w */, LoongArch::AMAND__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2413 { 216 /* amcas.b */, LoongArch::AMCAS_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2414 { 224 /* amcas.d */, LoongArch::AMCAS_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2415 { 232 /* amcas.h */, LoongArch::AMCAS_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2416 { 240 /* amcas.w */, LoongArch::AMCAS_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2417 { 248 /* amcas_db.b */, LoongArch::AMCAS__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2418 { 259 /* amcas_db.d */, LoongArch::AMCAS__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2419 { 270 /* amcas_db.h */, LoongArch::AMCAS__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2420 { 281 /* amcas_db.w */, LoongArch::AMCAS__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2421 { 292 /* ammax.d */, LoongArch::AMMAX_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2422 { 300 /* ammax.du */, LoongArch::AMMAX_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2423 { 309 /* ammax.w */, LoongArch::AMMAX_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2424 { 317 /* ammax.wu */, LoongArch::AMMAX_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2425 { 326 /* ammax_db.d */, LoongArch::AMMAX__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2426 { 337 /* ammax_db.du */, LoongArch::AMMAX__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2427 { 349 /* ammax_db.w */, LoongArch::AMMAX__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2428 { 360 /* ammax_db.wu */, LoongArch::AMMAX__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2429 { 372 /* ammin.d */, LoongArch::AMMIN_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2430 { 380 /* ammin.du */, LoongArch::AMMIN_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2431 { 389 /* ammin.w */, LoongArch::AMMIN_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2432 { 397 /* ammin.wu */, LoongArch::AMMIN_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2433 { 406 /* ammin_db.d */, LoongArch::AMMIN__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2434 { 417 /* ammin_db.du */, LoongArch::AMMIN__DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2435 { 429 /* ammin_db.w */, LoongArch::AMMIN__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2436 { 440 /* ammin_db.wu */, LoongArch::AMMIN__DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2437 { 452 /* amor.d */, LoongArch::AMOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2438 { 459 /* amor.w */, LoongArch::AMOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2439 { 466 /* amor_db.d */, LoongArch::AMOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2440 { 476 /* amor_db.w */, LoongArch::AMOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2441 { 486 /* amswap.b */, LoongArch::AMSWAP_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2442 { 495 /* amswap.d */, LoongArch::AMSWAP_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2443 { 504 /* amswap.h */, LoongArch::AMSWAP_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2444 { 513 /* amswap.w */, LoongArch::AMSWAP_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2445 { 522 /* amswap_db.b */, LoongArch::AMSWAP__DB_B, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2446 { 534 /* amswap_db.d */, LoongArch::AMSWAP__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2447 { 546 /* amswap_db.h */, LoongArch::AMSWAP__DB_H, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2448 { 558 /* amswap_db.w */, LoongArch::AMSWAP__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2449 { 570 /* amxor.d */, LoongArch::AMXOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2450 { 578 /* amxor.w */, LoongArch::AMXOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2451 { 586 /* amxor_db.d */, LoongArch::AMXOR__DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2452 { 597 /* amxor_db.w */, LoongArch::AMXOR__DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, },
2453 { 608 /* and */, LoongArch::AND, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2454 { 612 /* andi */, LoongArch::ANDI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, },
2455 { 617 /* andn */, LoongArch::ANDN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2456 { 622 /* armadc.w */, LoongArch::ARMADC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2457 { 631 /* armadd.w */, LoongArch::ARMADD_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2458 { 640 /* armand.w */, LoongArch::ARMAND_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2459 { 649 /* armmfflag */, LoongArch::ARMMFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2460 { 659 /* armmov.d */, LoongArch::ARMMOV_D, Convert__Reg1_0__UImm41_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm4 }, },
2461 { 668 /* armmov.w */, LoongArch::ARMMOV_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2462 { 677 /* armmove */, LoongArch::ARMMOVE, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2463 { 685 /* armmtflag */, LoongArch::ARMMTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2464 { 695 /* armnot.w */, LoongArch::ARMNOT_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2465 { 704 /* armor.w */, LoongArch::ARMOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2466 { 712 /* armrotr.w */, LoongArch::ARMROTR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2467 { 722 /* armrotri.w */, LoongArch::ARMROTRI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2468 { 733 /* armrrx.w */, LoongArch::ARMRRX_W, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2469 { 742 /* armsbc.w */, LoongArch::ARMSBC_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2470 { 751 /* armsll.w */, LoongArch::ARMSLL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2471 { 760 /* armslli.w */, LoongArch::ARMSLLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2472 { 770 /* armsra.w */, LoongArch::ARMSRA_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2473 { 779 /* armsrai.w */, LoongArch::ARMSRAI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2474 { 789 /* armsrl.w */, LoongArch::ARMSRL_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2475 { 798 /* armsrli.w */, LoongArch::ARMSRLI_W, Convert__Reg1_0__UImm51_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm4 }, },
2476 { 808 /* armsub.w */, LoongArch::ARMSUB_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2477 { 817 /* armxor.w */, LoongArch::ARMXOR_W, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2478 { 826 /* asrtgt.d */, LoongArch::ASRTGT_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2479 { 835 /* asrtle.d */, LoongArch::ASRTLE_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2480 { 844 /* b */, LoongArch::B, Convert__SImm26OperandB1_0, AMFBS_None, { MCK_SImm26OperandB }, },
2481 { 846 /* bceqz */, LoongArch::BCEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, },
2482 { 852 /* bcnez */, LoongArch::BCNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_CFR, MCK_SImm21lsl2 }, },
2483 { 858 /* beq */, LoongArch::BEQ, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2484 { 862 /* beqz */, LoongArch::BEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, },
2485 { 867 /* bge */, LoongArch::BGE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2486 { 871 /* bgeu */, LoongArch::BGEU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2487 { 876 /* bgez */, LoongArch::BGE, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2488 { 881 /* bgt */, LoongArch::BLT, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2489 { 885 /* bgtu */, LoongArch::BLTU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2490 { 890 /* bgtz */, LoongArch::BLT, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2491 { 895 /* bitrev.4b */, LoongArch::BITREV_4B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2492 { 905 /* bitrev.8b */, LoongArch::BITREV_8B, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2493 { 915 /* bitrev.d */, LoongArch::BITREV_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2494 { 924 /* bitrev.w */, LoongArch::BITREV_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2495 { 933 /* bl */, LoongArch::BL, Convert__SImm26OperandBL1_0, AMFBS_None, { MCK_SImm26OperandBL }, },
2496 { 936 /* ble */, LoongArch::BGE, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2497 { 940 /* bleu */, LoongArch::BGEU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2498 { 945 /* blez */, LoongArch::BGE, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2499 { 950 /* blt */, LoongArch::BLT, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2500 { 954 /* bltu */, LoongArch::BLTU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2501 { 959 /* bltz */, LoongArch::BLT, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, },
2502 { 964 /* bne */, LoongArch::BNE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2503 { 968 /* bnez */, LoongArch::BNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, },
2504 { 973 /* break */, LoongArch::BREAK, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2505 { 979 /* bstrins.d */, LoongArch::BSTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, },
2506 { 989 /* bstrins.w */, LoongArch::BSTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, },
2507 { 999 /* bstrpick.d */, LoongArch::BSTRPICK_D, Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, },
2508 { 1010 /* bstrpick.w */, LoongArch::BSTRPICK_W, Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, },
2509 { 1021 /* bytepick.d */, LoongArch::BYTEPICK_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2510 { 1032 /* bytepick.w */, LoongArch::BYTEPICK_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2 }, },
2511 { 1043 /* cacop */, LoongArch::CACOP, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, },
2512 { 1049 /* call36 */, LoongArch::PseudoCALL36, Convert__BareSymbol1_0, AMFBS_IsLA64, { MCK_BareSymbol }, },
2513 { 1056 /* clo.d */, LoongArch::CLO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2514 { 1062 /* clo.w */, LoongArch::CLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2515 { 1068 /* clz.d */, LoongArch::CLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2516 { 1074 /* clz.w */, LoongArch::CLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2517 { 1080 /* cpucfg */, LoongArch::CPUCFG, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2518 { 1087 /* crc.w.b.w */, LoongArch::CRC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2519 { 1097 /* crc.w.d.w */, LoongArch::CRC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2520 { 1107 /* crc.w.h.w */, LoongArch::CRC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2521 { 1117 /* crc.w.w.w */, LoongArch::CRC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2522 { 1127 /* crcc.w.b.w */, LoongArch::CRCC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2523 { 1138 /* crcc.w.d.w */, LoongArch::CRCC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2524 { 1149 /* crcc.w.h.w */, LoongArch::CRCC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2525 { 1160 /* crcc.w.w.w */, LoongArch::CRCC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2526 { 1171 /* csrrd */, LoongArch::CSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2527 { 1177 /* csrwr */, LoongArch::CSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2528 { 1183 /* csrxchg */, LoongArch::CSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm14 }, },
2529 { 1191 /* cto.d */, LoongArch::CTO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2530 { 1197 /* cto.w */, LoongArch::CTO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2531 { 1203 /* ctz.d */, LoongArch::CTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2532 { 1209 /* ctz.w */, LoongArch::CTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2533 { 1215 /* dbar */, LoongArch::DBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2534 { 1220 /* dbcl */, LoongArch::DBCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2535 { 1225 /* div.d */, LoongArch::DIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2536 { 1231 /* div.du */, LoongArch::DIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2537 { 1238 /* div.w */, LoongArch::DIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2538 { 1244 /* div.wu */, LoongArch::DIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2539 { 1251 /* ertn */, LoongArch::ERTN, Convert_NoOperands, AMFBS_None, { }, },
2540 { 1256 /* ext.w.b */, LoongArch::EXT_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2541 { 1264 /* ext.w.h */, LoongArch::EXT_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2542 { 1272 /* fabs.d */, LoongArch::FABS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2543 { 1279 /* fabs.s */, LoongArch::FABS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2544 { 1286 /* fadd.d */, LoongArch::FADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2545 { 1293 /* fadd.s */, LoongArch::FADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2546 { 1300 /* fclass.d */, LoongArch::FCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2547 { 1309 /* fclass.s */, LoongArch::FCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2548 { 1318 /* fcmp.caf.d */, LoongArch::FCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2549 { 1329 /* fcmp.caf.s */, LoongArch::FCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2550 { 1340 /* fcmp.ceq.d */, LoongArch::FCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2551 { 1351 /* fcmp.ceq.s */, LoongArch::FCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2552 { 1362 /* fcmp.cle.d */, LoongArch::FCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2553 { 1373 /* fcmp.cle.s */, LoongArch::FCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2554 { 1384 /* fcmp.clt.d */, LoongArch::FCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2555 { 1395 /* fcmp.clt.s */, LoongArch::FCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2556 { 1406 /* fcmp.cne.d */, LoongArch::FCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2557 { 1417 /* fcmp.cne.s */, LoongArch::FCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2558 { 1428 /* fcmp.cor.d */, LoongArch::FCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2559 { 1439 /* fcmp.cor.s */, LoongArch::FCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2560 { 1450 /* fcmp.cueq.d */, LoongArch::FCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2561 { 1462 /* fcmp.cueq.s */, LoongArch::FCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2562 { 1474 /* fcmp.cule.d */, LoongArch::FCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2563 { 1486 /* fcmp.cule.s */, LoongArch::FCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2564 { 1498 /* fcmp.cult.d */, LoongArch::FCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2565 { 1510 /* fcmp.cult.s */, LoongArch::FCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2566 { 1522 /* fcmp.cun.d */, LoongArch::FCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2567 { 1533 /* fcmp.cun.s */, LoongArch::FCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2568 { 1544 /* fcmp.cune.d */, LoongArch::FCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2569 { 1556 /* fcmp.cune.s */, LoongArch::FCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2570 { 1568 /* fcmp.saf.d */, LoongArch::FCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2571 { 1579 /* fcmp.saf.s */, LoongArch::FCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2572 { 1590 /* fcmp.seq.d */, LoongArch::FCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2573 { 1601 /* fcmp.seq.s */, LoongArch::FCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2574 { 1612 /* fcmp.sle.d */, LoongArch::FCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2575 { 1623 /* fcmp.sle.s */, LoongArch::FCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2576 { 1634 /* fcmp.slt.d */, LoongArch::FCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2577 { 1645 /* fcmp.slt.s */, LoongArch::FCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2578 { 1656 /* fcmp.sne.d */, LoongArch::FCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2579 { 1667 /* fcmp.sne.s */, LoongArch::FCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2580 { 1678 /* fcmp.sor.d */, LoongArch::FCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2581 { 1689 /* fcmp.sor.s */, LoongArch::FCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2582 { 1700 /* fcmp.sueq.d */, LoongArch::FCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2583 { 1712 /* fcmp.sueq.s */, LoongArch::FCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2584 { 1724 /* fcmp.sule.d */, LoongArch::FCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2585 { 1736 /* fcmp.sule.s */, LoongArch::FCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2586 { 1748 /* fcmp.sult.d */, LoongArch::FCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2587 { 1760 /* fcmp.sult.s */, LoongArch::FCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2588 { 1772 /* fcmp.sun.d */, LoongArch::FCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2589 { 1783 /* fcmp.sun.s */, LoongArch::FCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2590 { 1794 /* fcmp.sune.d */, LoongArch::FCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, },
2591 { 1806 /* fcmp.sune.s */, LoongArch::FCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, },
2592 { 1818 /* fcopysign.d */, LoongArch::FCOPYSIGN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2593 { 1830 /* fcopysign.s */, LoongArch::FCOPYSIGN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2594 { 1842 /* fcvt.d.ld */, LoongArch::FCVT_D_LD, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2595 { 1852 /* fcvt.d.s */, LoongArch::FCVT_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2596 { 1861 /* fcvt.ld.d */, LoongArch::FCVT_LD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2597 { 1871 /* fcvt.s.d */, LoongArch::FCVT_S_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2598 { 1880 /* fcvt.ud.d */, LoongArch::FCVT_UD_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2599 { 1890 /* fdiv.d */, LoongArch::FDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2600 { 1897 /* fdiv.s */, LoongArch::FDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2601 { 1904 /* ffint.d.l */, LoongArch::FFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2602 { 1914 /* ffint.d.w */, LoongArch::FFINT_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2603 { 1924 /* ffint.s.l */, LoongArch::FFINT_S_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2604 { 1934 /* ffint.s.w */, LoongArch::FFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2605 { 1944 /* fld.d */, LoongArch::FLD_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, },
2606 { 1950 /* fld.s */, LoongArch::FLD_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, },
2607 { 1956 /* fldgt.d */, LoongArch::FLDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2608 { 1964 /* fldgt.s */, LoongArch::FLDGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2609 { 1972 /* fldle.d */, LoongArch::FLDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2610 { 1980 /* fldle.s */, LoongArch::FLDLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2611 { 1988 /* fldx.d */, LoongArch::FLDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2612 { 1995 /* fldx.s */, LoongArch::FLDX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2613 { 2002 /* flogb.d */, LoongArch::FLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2614 { 2010 /* flogb.s */, LoongArch::FLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2615 { 2018 /* fmadd.d */, LoongArch::FMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2616 { 2026 /* fmadd.s */, LoongArch::FMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2617 { 2034 /* fmax.d */, LoongArch::FMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2618 { 2041 /* fmax.s */, LoongArch::FMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2619 { 2048 /* fmaxa.d */, LoongArch::FMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2620 { 2056 /* fmaxa.s */, LoongArch::FMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2621 { 2064 /* fmin.d */, LoongArch::FMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2622 { 2071 /* fmin.s */, LoongArch::FMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2623 { 2078 /* fmina.d */, LoongArch::FMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2624 { 2086 /* fmina.s */, LoongArch::FMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2625 { 2094 /* fmov.d */, LoongArch::FMOV_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2626 { 2101 /* fmov.s */, LoongArch::FMOV_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2627 { 2108 /* fmsub.d */, LoongArch::FMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2628 { 2116 /* fmsub.s */, LoongArch::FMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2629 { 2124 /* fmul.d */, LoongArch::FMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2630 { 2131 /* fmul.s */, LoongArch::FMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2631 { 2138 /* fneg.d */, LoongArch::FNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2632 { 2145 /* fneg.s */, LoongArch::FNEG_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2633 { 2152 /* fnmadd.d */, LoongArch::FNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2634 { 2161 /* fnmadd.s */, LoongArch::FNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2635 { 2170 /* fnmsub.d */, LoongArch::FNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2636 { 2179 /* fnmsub.s */, LoongArch::FNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2637 { 2188 /* frecip.d */, LoongArch::FRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2638 { 2197 /* frecip.s */, LoongArch::FRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2639 { 2206 /* frecipe.d */, LoongArch::FRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2640 { 2216 /* frecipe.s */, LoongArch::FRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2641 { 2226 /* frint.d */, LoongArch::FRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2642 { 2234 /* frint.s */, LoongArch::FRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2643 { 2242 /* frsqrt.d */, LoongArch::FRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2644 { 2251 /* frsqrt.s */, LoongArch::FRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2645 { 2260 /* frsqrte.d */, LoongArch::FRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2646 { 2270 /* frsqrte.s */, LoongArch::FRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2647 { 2280 /* fscaleb.d */, LoongArch::FSCALEB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2648 { 2290 /* fscaleb.s */, LoongArch::FSCALEB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2649 { 2300 /* fsel */, LoongArch::FSEL_xS, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CFR }, },
2650 { 2305 /* fsqrt.d */, LoongArch::FSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2651 { 2313 /* fsqrt.s */, LoongArch::FSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2652 { 2321 /* fst.d */, LoongArch::FST_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, },
2653 { 2327 /* fst.s */, LoongArch::FST_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, },
2654 { 2333 /* fstgt.d */, LoongArch::FSTGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2655 { 2341 /* fstgt.s */, LoongArch::FSTGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2656 { 2349 /* fstle.d */, LoongArch::FSTLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2657 { 2357 /* fstle.s */, LoongArch::FSTLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2658 { 2365 /* fstx.d */, LoongArch::FSTX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_GPR, MCK_GPR }, },
2659 { 2372 /* fstx.s */, LoongArch::FSTX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_GPR, MCK_GPR }, },
2660 { 2379 /* fsub.d */, LoongArch::FSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, },
2661 { 2386 /* fsub.s */, LoongArch::FSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
2662 { 2393 /* ftint.l.d */, LoongArch::FTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2663 { 2403 /* ftint.l.s */, LoongArch::FTINT_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2664 { 2413 /* ftint.w.d */, LoongArch::FTINT_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2665 { 2423 /* ftint.w.s */, LoongArch::FTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2666 { 2433 /* ftintrm.l.d */, LoongArch::FTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2667 { 2445 /* ftintrm.l.s */, LoongArch::FTINTRM_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2668 { 2457 /* ftintrm.w.d */, LoongArch::FTINTRM_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2669 { 2469 /* ftintrm.w.s */, LoongArch::FTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2670 { 2481 /* ftintrne.l.d */, LoongArch::FTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2671 { 2494 /* ftintrne.l.s */, LoongArch::FTINTRNE_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2672 { 2507 /* ftintrne.w.d */, LoongArch::FTINTRNE_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2673 { 2520 /* ftintrne.w.s */, LoongArch::FTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2674 { 2533 /* ftintrp.l.d */, LoongArch::FTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2675 { 2545 /* ftintrp.l.s */, LoongArch::FTINTRP_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2676 { 2557 /* ftintrp.w.d */, LoongArch::FTINTRP_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2677 { 2569 /* ftintrp.w.s */, LoongArch::FTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2678 { 2581 /* ftintrz.l.d */, LoongArch::FTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR64 }, },
2679 { 2593 /* ftintrz.l.s */, LoongArch::FTINTRZ_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_FPR32 }, },
2680 { 2605 /* ftintrz.w.d */, LoongArch::FTINTRZ_W_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR64 }, },
2681 { 2617 /* ftintrz.w.s */, LoongArch::FTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_FPR32 }, },
2682 { 2629 /* gcsrrd */, LoongArch::GCSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2683 { 2636 /* gcsrwr */, LoongArch::GCSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, },
2684 { 2643 /* gcsrxchg */, LoongArch::GCSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm14 }, },
2685 { 2652 /* gtlbflush */, LoongArch::GTLBFLUSH, Convert_NoOperands, AMFBS_None, { }, },
2686 { 2662 /* hvcl */, LoongArch::HVCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2687 { 2667 /* ibar */, LoongArch::IBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2688 { 2672 /* idle */, LoongArch::IDLE, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2689 { 2677 /* invtlb */, LoongArch::INVTLB, Convert__Reg1_2__Reg1_1__UImm51_0, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_GPR }, },
2690 { 2684 /* iocsrrd.b */, LoongArch::IOCSRRD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2691 { 2694 /* iocsrrd.d */, LoongArch::IOCSRRD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2692 { 2704 /* iocsrrd.h */, LoongArch::IOCSRRD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2693 { 2714 /* iocsrrd.w */, LoongArch::IOCSRRD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2694 { 2724 /* iocsrwr.b */, LoongArch::IOCSRWR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2695 { 2734 /* iocsrwr.d */, LoongArch::IOCSRWR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2696 { 2744 /* iocsrwr.h */, LoongArch::IOCSRWR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2697 { 2754 /* iocsrwr.w */, LoongArch::IOCSRWR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2698 { 2764 /* jirl */, LoongArch::JIRL, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, },
2699 { 2769 /* jiscr0 */, LoongArch::JISCR0, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, },
2700 { 2776 /* jiscr1 */, LoongArch::JISCR1, Convert__SImm21lsl21_0, AMFBS_None, { MCK_SImm21lsl2 }, },
2701 { 2783 /* jr */, LoongArch::JIRL, Convert__regR0__Reg1_0__imm_95_0, AMFBS_None, { MCK_GPR }, },
2702 { 2786 /* la */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, },
2703 { 2786 /* la */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2704 { 2786 /* la */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2705 { 2789 /* la.abs */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2706 { 2789 /* la.abs */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2707 { 2796 /* la.global */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, },
2708 { 2796 /* la.global */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2709 { 2796 /* la.global */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2710 { 2796 /* la.global */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2711 { 2796 /* la.global */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2712 { 2796 /* la.global */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2713 { 2806 /* la.got */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2714 { 2806 /* la.got */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2715 { 2813 /* la.local */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2716 { 2813 /* la.local */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2717 { 2813 /* la.local */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2718 { 2813 /* la.local */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2719 { 2822 /* la.pcrel */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2720 { 2822 /* la.pcrel */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2721 { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_IsLA32_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2722 { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_IsLA64_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, },
2723 { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_PC, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2724 { 2831 /* la.tls.desc */, LoongArch::PseudoLA_TLS_DESC_PC_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2725 { 2843 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2726 { 2843 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2727 { 2853 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2728 { 2853 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2729 { 2863 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2730 { 2863 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, },
2731 { 2873 /* la.tls.le */, LoongArch::PseudoLA_TLS_LE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, },
2732 { 2883 /* ld.b */, LoongArch::LD_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2733 { 2888 /* ld.bu */, LoongArch::LD_BU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2734 { 2894 /* ld.d */, LoongArch::LD_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2735 { 2899 /* ld.h */, LoongArch::LD_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2736 { 2904 /* ld.hu */, LoongArch::LD_HU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2737 { 2910 /* ld.w */, LoongArch::LD_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2738 { 2915 /* ld.wu */, LoongArch::LD_WU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2739 { 2921 /* lddir */, LoongArch::LDDIR, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm8 }, },
2740 { 2927 /* ldgt.b */, LoongArch::LDGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2741 { 2934 /* ldgt.d */, LoongArch::LDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2742 { 2941 /* ldgt.h */, LoongArch::LDGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2743 { 2948 /* ldgt.w */, LoongArch::LDGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2744 { 2955 /* ldl.d */, LoongArch::LDL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2745 { 2961 /* ldl.w */, LoongArch::LDL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2746 { 2967 /* ldle.b */, LoongArch::LDLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2747 { 2974 /* ldle.d */, LoongArch::LDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2748 { 2981 /* ldle.h */, LoongArch::LDLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2749 { 2988 /* ldle.w */, LoongArch::LDLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2750 { 2995 /* ldpte */, LoongArch::LDPTE, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
2751 { 3001 /* ldptr.d */, LoongArch::LDPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2752 { 3009 /* ldptr.w */, LoongArch::LDPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2753 { 3017 /* ldr.d */, LoongArch::LDR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2754 { 3023 /* ldr.w */, LoongArch::LDR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2755 { 3029 /* ldx.b */, LoongArch::LDX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2756 { 3035 /* ldx.bu */, LoongArch::LDX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2757 { 3042 /* ldx.d */, LoongArch::LDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2758 { 3048 /* ldx.h */, LoongArch::LDX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2759 { 3054 /* ldx.hu */, LoongArch::LDX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2760 { 3061 /* ldx.w */, LoongArch::LDX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2761 { 3067 /* ldx.wu */, LoongArch::LDX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2762 { 3074 /* li.d */, LoongArch::PseudoLI_D, Convert__Reg1_0__Imm641_1, AMFBS_IsLA64, { MCK_GPR, MCK_Imm64 }, },
2763 { 3079 /* li.w */, LoongArch::PseudoLI_W, Convert__Reg1_0__Imm321_1, AMFBS_None, { MCK_GPR, MCK_Imm32 }, },
2764 { 3084 /* ll.d */, LoongArch::LL_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2765 { 3089 /* ll.w */, LoongArch::LL_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2766 { 3094 /* llacq.d */, LoongArch::LLACQ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2767 { 3102 /* llacq.w */, LoongArch::LLACQ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2768 { 3110 /* lu12i.w */, LoongArch::LU12I_W, Convert__Reg1_0__SImm20lu12iw1_1, AMFBS_None, { MCK_GPR, MCK_SImm20lu12iw }, },
2769 { 3118 /* lu32i.d */, LoongArch::LU32I_D, Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20lu32id }, },
2770 { 3126 /* lu52i.d */, LoongArch::LU52I_D, Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12lu52id }, },
2771 { 3134 /* maskeqz */, LoongArch::MASKEQZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2772 { 3142 /* masknez */, LoongArch::MASKNEZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2773 { 3150 /* mod.d */, LoongArch::MOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2774 { 3156 /* mod.du */, LoongArch::MOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2775 { 3163 /* mod.w */, LoongArch::MOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2776 { 3169 /* mod.wu */, LoongArch::MOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2777 { 3176 /* movcf2fr */, LoongArch::MOVCF2FR_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_CFR }, },
2778 { 3185 /* movcf2gr */, LoongArch::MOVCF2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_CFR }, },
2779 { 3194 /* move */, LoongArch::OR, Convert__Reg1_0__Reg1_1__regR0, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2780 { 3199 /* movfcsr2gr */, LoongArch::MOVFCSR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FCSR }, },
2781 { 3210 /* movfr2cf */, LoongArch::MOVFR2CF_xS, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_FPR32 }, },
2782 { 3219 /* movfr2gr.d */, LoongArch::MOVFR2GR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_FPR64 }, },
2783 { 3230 /* movfr2gr.s */, LoongArch::MOVFR2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR32 }, },
2784 { 3241 /* movfrh2gr.s */, LoongArch::MOVFRH2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_FPR64 }, },
2785 { 3253 /* movgr2cf */, LoongArch::MOVGR2CF, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_GPR }, },
2786 { 3262 /* movgr2fcsr */, LoongArch::MOVGR2FCSR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FCSR, MCK_GPR }, },
2787 { 3273 /* movgr2fr.d */, LoongArch::MOVGR2FR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_FPR64, MCK_GPR }, },
2788 { 3284 /* movgr2fr.w */, LoongArch::MOVGR2FR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPR32, MCK_GPR }, },
2789 { 3295 /* movgr2frh.w */, LoongArch::MOVGR2FRH_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FPR64, MCK_GPR }, },
2790 { 3307 /* movgr2scr */, LoongArch::MOVGR2SCR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SCR, MCK_GPR }, },
2791 { 3317 /* movscr2gr */, LoongArch::MOVSCR2GR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_SCR }, },
2792 { 3327 /* mul.d */, LoongArch::MUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2793 { 3333 /* mul.w */, LoongArch::MUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2794 { 3339 /* mulh.d */, LoongArch::MULH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2795 { 3346 /* mulh.du */, LoongArch::MULH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2796 { 3354 /* mulh.w */, LoongArch::MULH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2797 { 3361 /* mulh.wu */, LoongArch::MULH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2798 { 3369 /* mulw.d.w */, LoongArch::MULW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2799 { 3378 /* mulw.d.wu */, LoongArch::MULW_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2800 { 3388 /* nop */, LoongArch::ANDI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, },
2801 { 3392 /* nor */, LoongArch::NOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2802 { 3396 /* or */, LoongArch::OR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2803 { 3399 /* ori */, LoongArch::ORI, Convert__Reg1_0__Reg1_1__UImm12ori1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12ori }, },
2804 { 3403 /* orn */, LoongArch::ORN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2805 { 3407 /* pcaddi */, LoongArch::PCADDI, Convert__Reg1_0__SImm20pcaddi1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcaddi }, },
2806 { 3414 /* pcaddu12i */, LoongArch::PCADDU12I, Convert__Reg1_0__SImm201_1, AMFBS_None, { MCK_GPR, MCK_SImm20 }, },
2807 { 3424 /* pcaddu18i */, LoongArch::PCADDU18I, Convert__Reg1_0__SImm20pcaddu18i1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20pcaddu18i }, },
2808 { 3434 /* pcalau12i */, LoongArch::PCALAU12I, Convert__Reg1_0__SImm20pcalau12i1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcalau12i }, },
2809 { 3444 /* preld */, LoongArch::PRELD, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, },
2810 { 3450 /* preldx */, LoongArch::PRELDX, Convert__UImm51_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_UImm5, MCK_GPR, MCK_GPR }, },
2811 { 3457 /* rcr.b */, LoongArch::RCR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2812 { 3463 /* rcr.d */, LoongArch::RCR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2813 { 3469 /* rcr.h */, LoongArch::RCR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2814 { 3475 /* rcr.w */, LoongArch::RCR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2815 { 3481 /* rcri.b */, LoongArch::RCRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2816 { 3488 /* rcri.d */, LoongArch::RCRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2817 { 3495 /* rcri.h */, LoongArch::RCRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2818 { 3502 /* rcri.w */, LoongArch::RCRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2819 { 3509 /* rdtime.d */, LoongArch::RDTIME_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2820 { 3518 /* rdtimeh.w */, LoongArch::RDTIMEH_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2821 { 3528 /* rdtimel.w */, LoongArch::RDTIMEL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2822 { 3538 /* ret */, LoongArch::JIRL, Convert__regR0__regR1__imm_95_0, AMFBS_None, { }, },
2823 { 3542 /* revb.2h */, LoongArch::REVB_2H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2824 { 3550 /* revb.2w */, LoongArch::REVB_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2825 { 3558 /* revb.4h */, LoongArch::REVB_4H, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2826 { 3566 /* revb.d */, LoongArch::REVB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2827 { 3573 /* revh.2w */, LoongArch::REVH_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2828 { 3581 /* revh.d */, LoongArch::REVH_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2829 { 3588 /* rotr.b */, LoongArch::ROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2830 { 3595 /* rotr.d */, LoongArch::ROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2831 { 3602 /* rotr.h */, LoongArch::ROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2832 { 3609 /* rotr.w */, LoongArch::ROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2833 { 3616 /* rotri.b */, LoongArch::ROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm3 }, },
2834 { 3624 /* rotri.d */, LoongArch::ROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2835 { 3632 /* rotri.h */, LoongArch::ROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm4 }, },
2836 { 3640 /* rotri.w */, LoongArch::ROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2837 { 3648 /* sbc.b */, LoongArch::SBC_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2838 { 3654 /* sbc.d */, LoongArch::SBC_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2839 { 3660 /* sbc.h */, LoongArch::SBC_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2840 { 3666 /* sbc.w */, LoongArch::SBC_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2841 { 3672 /* sc.d */, LoongArch::SC_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2842 { 3677 /* sc.q */, LoongArch::SC_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2843 { 3682 /* sc.w */, LoongArch::SC_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2844 { 3687 /* screl.d */, LoongArch::SCREL_D, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
2845 { 3695 /* screl.w */, LoongArch::SCREL_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2846 { 3703 /* setarmj */, LoongArch::SETARMJ, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2847 { 3711 /* setx86j */, LoongArch::SETX86J, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
2848 { 3719 /* setx86loope */, LoongArch::SETX86LOOPE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2849 { 3731 /* setx86loopne */, LoongArch::SETX86LOOPNE, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
2850 { 3744 /* sll.d */, LoongArch::SLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2851 { 3750 /* sll.w */, LoongArch::SLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2852 { 3756 /* slli.d */, LoongArch::SLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2853 { 3763 /* slli.w */, LoongArch::SLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2854 { 3770 /* slt */, LoongArch::SLT, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2855 { 3774 /* slti */, LoongArch::SLTI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, },
2856 { 3779 /* sltu */, LoongArch::SLTU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2857 { 3784 /* sltui */, LoongArch::SLTUI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, },
2858 { 3790 /* sra.d */, LoongArch::SRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2859 { 3796 /* sra.w */, LoongArch::SRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2860 { 3802 /* srai.d */, LoongArch::SRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2861 { 3809 /* srai.w */, LoongArch::SRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2862 { 3816 /* srl.d */, LoongArch::SRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2863 { 3822 /* srl.w */, LoongArch::SRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2864 { 3828 /* srli.d */, LoongArch::SRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, },
2865 { 3835 /* srli.w */, LoongArch::SRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, },
2866 { 3842 /* st.b */, LoongArch::ST_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2867 { 3847 /* st.d */, LoongArch::ST_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2868 { 3852 /* st.h */, LoongArch::ST_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2869 { 3857 /* st.w */, LoongArch::ST_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2870 { 3862 /* stgt.b */, LoongArch::STGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2871 { 3869 /* stgt.d */, LoongArch::STGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2872 { 3876 /* stgt.h */, LoongArch::STGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2873 { 3883 /* stgt.w */, LoongArch::STGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2874 { 3890 /* stl.d */, LoongArch::STL_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2875 { 3896 /* stl.w */, LoongArch::STL_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2876 { 3902 /* stle.b */, LoongArch::STLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2877 { 3909 /* stle.d */, LoongArch::STLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2878 { 3916 /* stle.h */, LoongArch::STLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2879 { 3923 /* stle.w */, LoongArch::STLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2880 { 3930 /* stptr.d */, LoongArch::STPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2881 { 3938 /* stptr.w */, LoongArch::STPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, },
2882 { 3946 /* str.d */, LoongArch::STR_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2883 { 3952 /* str.w */, LoongArch::STR_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, },
2884 { 3958 /* stx.b */, LoongArch::STX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2885 { 3964 /* stx.d */, LoongArch::STX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2886 { 3970 /* stx.h */, LoongArch::STX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2887 { 3976 /* stx.w */, LoongArch::STX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2888 { 3982 /* sub.d */, LoongArch::SUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2889 { 3988 /* sub.w */, LoongArch::SUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
2890 { 3994 /* syscall */, LoongArch::SYSCALL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, },
2891 { 4002 /* tail36 */, LoongArch::PseudoTAIL36, Convert__Reg1_0__BareSymbol1_1, AMFBS_IsLA64, { MCK_GPR, MCK_BareSymbol }, },
2892 { 4009 /* tlbclr */, LoongArch::TLBCLR, Convert_NoOperands, AMFBS_None, { }, },
2893 { 4016 /* tlbfill */, LoongArch::TLBFILL, Convert_NoOperands, AMFBS_None, { }, },
2894 { 4024 /* tlbflush */, LoongArch::TLBFLUSH, Convert_NoOperands, AMFBS_None, { }, },
2895 { 4033 /* tlbrd */, LoongArch::TLBRD, Convert_NoOperands, AMFBS_None, { }, },
2896 { 4039 /* tlbsrch */, LoongArch::TLBSRCH, Convert_NoOperands, AMFBS_None, { }, },
2897 { 4047 /* tlbwr */, LoongArch::TLBWR, Convert_NoOperands, AMFBS_None, { }, },
2898 { 4053 /* vabsd.b */, LoongArch::VABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2899 { 4061 /* vabsd.bu */, LoongArch::VABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2900 { 4070 /* vabsd.d */, LoongArch::VABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2901 { 4078 /* vabsd.du */, LoongArch::VABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2902 { 4087 /* vabsd.h */, LoongArch::VABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2903 { 4095 /* vabsd.hu */, LoongArch::VABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2904 { 4104 /* vabsd.w */, LoongArch::VABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2905 { 4112 /* vabsd.wu */, LoongArch::VABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2906 { 4121 /* vadd.b */, LoongArch::VADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2907 { 4128 /* vadd.d */, LoongArch::VADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2908 { 4135 /* vadd.h */, LoongArch::VADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2909 { 4142 /* vadd.q */, LoongArch::VADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2910 { 4149 /* vadd.w */, LoongArch::VADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2911 { 4156 /* vadda.b */, LoongArch::VADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2912 { 4164 /* vadda.d */, LoongArch::VADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2913 { 4172 /* vadda.h */, LoongArch::VADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2914 { 4180 /* vadda.w */, LoongArch::VADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2915 { 4188 /* vaddi.bu */, LoongArch::VADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2916 { 4197 /* vaddi.du */, LoongArch::VADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2917 { 4206 /* vaddi.hu */, LoongArch::VADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2918 { 4215 /* vaddi.wu */, LoongArch::VADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2919 { 4224 /* vaddwev.d.w */, LoongArch::VADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2920 { 4236 /* vaddwev.d.wu */, LoongArch::VADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2921 { 4249 /* vaddwev.d.wu.w */, LoongArch::VADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2922 { 4264 /* vaddwev.h.b */, LoongArch::VADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2923 { 4276 /* vaddwev.h.bu */, LoongArch::VADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2924 { 4289 /* vaddwev.h.bu.b */, LoongArch::VADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2925 { 4304 /* vaddwev.q.d */, LoongArch::VADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2926 { 4316 /* vaddwev.q.du */, LoongArch::VADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2927 { 4329 /* vaddwev.q.du.d */, LoongArch::VADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2928 { 4344 /* vaddwev.w.h */, LoongArch::VADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2929 { 4356 /* vaddwev.w.hu */, LoongArch::VADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2930 { 4369 /* vaddwev.w.hu.h */, LoongArch::VADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2931 { 4384 /* vaddwod.d.w */, LoongArch::VADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2932 { 4396 /* vaddwod.d.wu */, LoongArch::VADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2933 { 4409 /* vaddwod.d.wu.w */, LoongArch::VADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2934 { 4424 /* vaddwod.h.b */, LoongArch::VADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2935 { 4436 /* vaddwod.h.bu */, LoongArch::VADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2936 { 4449 /* vaddwod.h.bu.b */, LoongArch::VADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2937 { 4464 /* vaddwod.q.d */, LoongArch::VADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2938 { 4476 /* vaddwod.q.du */, LoongArch::VADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2939 { 4489 /* vaddwod.q.du.d */, LoongArch::VADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2940 { 4504 /* vaddwod.w.h */, LoongArch::VADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2941 { 4516 /* vaddwod.w.hu */, LoongArch::VADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2942 { 4529 /* vaddwod.w.hu.h */, LoongArch::VADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2943 { 4544 /* vand.v */, LoongArch::VAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2944 { 4551 /* vandi.b */, LoongArch::VANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
2945 { 4559 /* vandn.v */, LoongArch::VANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2946 { 4567 /* vavg.b */, LoongArch::VAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2947 { 4574 /* vavg.bu */, LoongArch::VAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2948 { 4582 /* vavg.d */, LoongArch::VAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2949 { 4589 /* vavg.du */, LoongArch::VAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2950 { 4597 /* vavg.h */, LoongArch::VAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2951 { 4604 /* vavg.hu */, LoongArch::VAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2952 { 4612 /* vavg.w */, LoongArch::VAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2953 { 4619 /* vavg.wu */, LoongArch::VAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2954 { 4627 /* vavgr.b */, LoongArch::VAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2955 { 4635 /* vavgr.bu */, LoongArch::VAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2956 { 4644 /* vavgr.d */, LoongArch::VAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2957 { 4652 /* vavgr.du */, LoongArch::VAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2958 { 4661 /* vavgr.h */, LoongArch::VAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2959 { 4669 /* vavgr.hu */, LoongArch::VAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2960 { 4678 /* vavgr.w */, LoongArch::VAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2961 { 4686 /* vavgr.wu */, LoongArch::VAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2962 { 4695 /* vbitclr.b */, LoongArch::VBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2963 { 4705 /* vbitclr.d */, LoongArch::VBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2964 { 4715 /* vbitclr.h */, LoongArch::VBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2965 { 4725 /* vbitclr.w */, LoongArch::VBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2966 { 4735 /* vbitclri.b */, LoongArch::VBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
2967 { 4746 /* vbitclri.d */, LoongArch::VBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
2968 { 4757 /* vbitclri.h */, LoongArch::VBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
2969 { 4768 /* vbitclri.w */, LoongArch::VBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2970 { 4779 /* vbitrev.b */, LoongArch::VBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2971 { 4789 /* vbitrev.d */, LoongArch::VBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2972 { 4799 /* vbitrev.h */, LoongArch::VBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2973 { 4809 /* vbitrev.w */, LoongArch::VBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2974 { 4819 /* vbitrevi.b */, LoongArch::VBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
2975 { 4830 /* vbitrevi.d */, LoongArch::VBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
2976 { 4841 /* vbitrevi.h */, LoongArch::VBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
2977 { 4852 /* vbitrevi.w */, LoongArch::VBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2978 { 4863 /* vbitsel.v */, LoongArch::VBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2979 { 4873 /* vbitseli.b */, LoongArch::VBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
2980 { 4884 /* vbitset.b */, LoongArch::VBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2981 { 4894 /* vbitset.d */, LoongArch::VBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2982 { 4904 /* vbitset.h */, LoongArch::VBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2983 { 4914 /* vbitset.w */, LoongArch::VBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2984 { 4924 /* vbitseti.b */, LoongArch::VBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
2985 { 4935 /* vbitseti.d */, LoongArch::VBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
2986 { 4946 /* vbitseti.h */, LoongArch::VBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
2987 { 4957 /* vbitseti.w */, LoongArch::VBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2988 { 4968 /* vbsll.v */, LoongArch::VBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2989 { 4976 /* vbsrl.v */, LoongArch::VBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
2990 { 4984 /* vclo.b */, LoongArch::VCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2991 { 4991 /* vclo.d */, LoongArch::VCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2992 { 4998 /* vclo.h */, LoongArch::VCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2993 { 5005 /* vclo.w */, LoongArch::VCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2994 { 5012 /* vclz.b */, LoongArch::VCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2995 { 5019 /* vclz.d */, LoongArch::VCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2996 { 5026 /* vclz.h */, LoongArch::VCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2997 { 5033 /* vclz.w */, LoongArch::VCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
2998 { 5040 /* vdiv.b */, LoongArch::VDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
2999 { 5047 /* vdiv.bu */, LoongArch::VDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3000 { 5055 /* vdiv.d */, LoongArch::VDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3001 { 5062 /* vdiv.du */, LoongArch::VDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3002 { 5070 /* vdiv.h */, LoongArch::VDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3003 { 5077 /* vdiv.hu */, LoongArch::VDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3004 { 5085 /* vdiv.w */, LoongArch::VDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3005 { 5092 /* vdiv.wu */, LoongArch::VDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3006 { 5100 /* vext2xv.d.b */, LoongArch::VEXT2XV_D_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3007 { 5112 /* vext2xv.d.h */, LoongArch::VEXT2XV_D_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3008 { 5124 /* vext2xv.d.w */, LoongArch::VEXT2XV_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3009 { 5136 /* vext2xv.du.bu */, LoongArch::VEXT2XV_DU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3010 { 5150 /* vext2xv.du.hu */, LoongArch::VEXT2XV_DU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3011 { 5164 /* vext2xv.du.wu */, LoongArch::VEXT2XV_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3012 { 5178 /* vext2xv.h.b */, LoongArch::VEXT2XV_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3013 { 5190 /* vext2xv.hu.bu */, LoongArch::VEXT2XV_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3014 { 5204 /* vext2xv.w.b */, LoongArch::VEXT2XV_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3015 { 5216 /* vext2xv.w.h */, LoongArch::VEXT2XV_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3016 { 5228 /* vext2xv.wu.bu */, LoongArch::VEXT2XV_WU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3017 { 5242 /* vext2xv.wu.hu */, LoongArch::VEXT2XV_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3018 { 5256 /* vexth.d.w */, LoongArch::VEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3019 { 5266 /* vexth.du.wu */, LoongArch::VEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3020 { 5278 /* vexth.h.b */, LoongArch::VEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3021 { 5288 /* vexth.hu.bu */, LoongArch::VEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3022 { 5300 /* vexth.q.d */, LoongArch::VEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3023 { 5310 /* vexth.qu.du */, LoongArch::VEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3024 { 5322 /* vexth.w.h */, LoongArch::VEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3025 { 5332 /* vexth.wu.hu */, LoongArch::VEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3026 { 5344 /* vextl.q.d */, LoongArch::VEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3027 { 5354 /* vextl.qu.du */, LoongArch::VEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3028 { 5366 /* vextrins.b */, LoongArch::VEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3029 { 5377 /* vextrins.d */, LoongArch::VEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3030 { 5388 /* vextrins.h */, LoongArch::VEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3031 { 5399 /* vextrins.w */, LoongArch::VEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3032 { 5410 /* vfadd.d */, LoongArch::VFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3033 { 5418 /* vfadd.s */, LoongArch::VFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3034 { 5426 /* vfclass.d */, LoongArch::VFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3035 { 5436 /* vfclass.s */, LoongArch::VFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3036 { 5446 /* vfcmp.caf.d */, LoongArch::VFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3037 { 5458 /* vfcmp.caf.s */, LoongArch::VFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3038 { 5470 /* vfcmp.ceq.d */, LoongArch::VFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3039 { 5482 /* vfcmp.ceq.s */, LoongArch::VFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3040 { 5494 /* vfcmp.cle.d */, LoongArch::VFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3041 { 5506 /* vfcmp.cle.s */, LoongArch::VFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3042 { 5518 /* vfcmp.clt.d */, LoongArch::VFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3043 { 5530 /* vfcmp.clt.s */, LoongArch::VFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3044 { 5542 /* vfcmp.cne.d */, LoongArch::VFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3045 { 5554 /* vfcmp.cne.s */, LoongArch::VFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3046 { 5566 /* vfcmp.cor.d */, LoongArch::VFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3047 { 5578 /* vfcmp.cor.s */, LoongArch::VFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3048 { 5590 /* vfcmp.cueq.d */, LoongArch::VFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3049 { 5603 /* vfcmp.cueq.s */, LoongArch::VFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3050 { 5616 /* vfcmp.cule.d */, LoongArch::VFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3051 { 5629 /* vfcmp.cule.s */, LoongArch::VFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3052 { 5642 /* vfcmp.cult.d */, LoongArch::VFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3053 { 5655 /* vfcmp.cult.s */, LoongArch::VFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3054 { 5668 /* vfcmp.cun.d */, LoongArch::VFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3055 { 5680 /* vfcmp.cun.s */, LoongArch::VFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3056 { 5692 /* vfcmp.cune.d */, LoongArch::VFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3057 { 5705 /* vfcmp.cune.s */, LoongArch::VFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3058 { 5718 /* vfcmp.saf.d */, LoongArch::VFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3059 { 5730 /* vfcmp.saf.s */, LoongArch::VFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3060 { 5742 /* vfcmp.seq.d */, LoongArch::VFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3061 { 5754 /* vfcmp.seq.s */, LoongArch::VFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3062 { 5766 /* vfcmp.sle.d */, LoongArch::VFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3063 { 5778 /* vfcmp.sle.s */, LoongArch::VFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3064 { 5790 /* vfcmp.slt.d */, LoongArch::VFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3065 { 5802 /* vfcmp.slt.s */, LoongArch::VFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3066 { 5814 /* vfcmp.sne.d */, LoongArch::VFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3067 { 5826 /* vfcmp.sne.s */, LoongArch::VFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3068 { 5838 /* vfcmp.sor.d */, LoongArch::VFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3069 { 5850 /* vfcmp.sor.s */, LoongArch::VFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3070 { 5862 /* vfcmp.sueq.d */, LoongArch::VFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3071 { 5875 /* vfcmp.sueq.s */, LoongArch::VFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3072 { 5888 /* vfcmp.sule.d */, LoongArch::VFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3073 { 5901 /* vfcmp.sule.s */, LoongArch::VFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3074 { 5914 /* vfcmp.sult.d */, LoongArch::VFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3075 { 5927 /* vfcmp.sult.s */, LoongArch::VFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3076 { 5940 /* vfcmp.sun.d */, LoongArch::VFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3077 { 5952 /* vfcmp.sun.s */, LoongArch::VFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3078 { 5964 /* vfcmp.sune.d */, LoongArch::VFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3079 { 5977 /* vfcmp.sune.s */, LoongArch::VFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3080 { 5990 /* vfcvt.h.s */, LoongArch::VFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3081 { 6000 /* vfcvt.s.d */, LoongArch::VFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3082 { 6010 /* vfcvth.d.s */, LoongArch::VFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3083 { 6021 /* vfcvth.s.h */, LoongArch::VFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3084 { 6032 /* vfcvtl.d.s */, LoongArch::VFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3085 { 6043 /* vfcvtl.s.h */, LoongArch::VFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3086 { 6054 /* vfdiv.d */, LoongArch::VFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3087 { 6062 /* vfdiv.s */, LoongArch::VFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3088 { 6070 /* vffint.d.l */, LoongArch::VFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3089 { 6081 /* vffint.d.lu */, LoongArch::VFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3090 { 6093 /* vffint.s.l */, LoongArch::VFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3091 { 6104 /* vffint.s.w */, LoongArch::VFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3092 { 6115 /* vffint.s.wu */, LoongArch::VFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3093 { 6127 /* vffinth.d.w */, LoongArch::VFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3094 { 6139 /* vffintl.d.w */, LoongArch::VFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3095 { 6151 /* vflogb.d */, LoongArch::VFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3096 { 6160 /* vflogb.s */, LoongArch::VFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3097 { 6169 /* vfmadd.d */, LoongArch::VFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3098 { 6178 /* vfmadd.s */, LoongArch::VFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3099 { 6187 /* vfmax.d */, LoongArch::VFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3100 { 6195 /* vfmax.s */, LoongArch::VFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3101 { 6203 /* vfmaxa.d */, LoongArch::VFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3102 { 6212 /* vfmaxa.s */, LoongArch::VFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3103 { 6221 /* vfmin.d */, LoongArch::VFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3104 { 6229 /* vfmin.s */, LoongArch::VFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3105 { 6237 /* vfmina.d */, LoongArch::VFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3106 { 6246 /* vfmina.s */, LoongArch::VFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3107 { 6255 /* vfmsub.d */, LoongArch::VFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3108 { 6264 /* vfmsub.s */, LoongArch::VFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3109 { 6273 /* vfmul.d */, LoongArch::VFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3110 { 6281 /* vfmul.s */, LoongArch::VFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3111 { 6289 /* vfnmadd.d */, LoongArch::VFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3112 { 6299 /* vfnmadd.s */, LoongArch::VFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3113 { 6309 /* vfnmsub.d */, LoongArch::VFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3114 { 6319 /* vfnmsub.s */, LoongArch::VFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3115 { 6329 /* vfrecip.d */, LoongArch::VFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3116 { 6339 /* vfrecip.s */, LoongArch::VFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3117 { 6349 /* vfrecipe.d */, LoongArch::VFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3118 { 6360 /* vfrecipe.s */, LoongArch::VFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3119 { 6371 /* vfrint.d */, LoongArch::VFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3120 { 6380 /* vfrint.s */, LoongArch::VFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3121 { 6389 /* vfrintrm.d */, LoongArch::VFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3122 { 6400 /* vfrintrm.s */, LoongArch::VFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3123 { 6411 /* vfrintrne.d */, LoongArch::VFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3124 { 6423 /* vfrintrne.s */, LoongArch::VFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3125 { 6435 /* vfrintrp.d */, LoongArch::VFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3126 { 6446 /* vfrintrp.s */, LoongArch::VFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3127 { 6457 /* vfrintrz.d */, LoongArch::VFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3128 { 6468 /* vfrintrz.s */, LoongArch::VFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3129 { 6479 /* vfrsqrt.d */, LoongArch::VFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3130 { 6489 /* vfrsqrt.s */, LoongArch::VFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3131 { 6499 /* vfrsqrte.d */, LoongArch::VFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3132 { 6510 /* vfrsqrte.s */, LoongArch::VFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3133 { 6521 /* vfrstp.b */, LoongArch::VFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3134 { 6530 /* vfrstp.h */, LoongArch::VFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3135 { 6539 /* vfrstpi.b */, LoongArch::VFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3136 { 6549 /* vfrstpi.h */, LoongArch::VFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3137 { 6559 /* vfsqrt.d */, LoongArch::VFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3138 { 6568 /* vfsqrt.s */, LoongArch::VFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3139 { 6577 /* vfsub.d */, LoongArch::VFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3140 { 6585 /* vfsub.s */, LoongArch::VFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3141 { 6593 /* vftint.l.d */, LoongArch::VFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3142 { 6604 /* vftint.lu.d */, LoongArch::VFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3143 { 6616 /* vftint.w.d */, LoongArch::VFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3144 { 6627 /* vftint.w.s */, LoongArch::VFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3145 { 6638 /* vftint.wu.s */, LoongArch::VFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3146 { 6650 /* vftinth.l.s */, LoongArch::VFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3147 { 6662 /* vftintl.l.s */, LoongArch::VFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3148 { 6674 /* vftintrm.l.d */, LoongArch::VFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3149 { 6687 /* vftintrm.w.d */, LoongArch::VFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3150 { 6700 /* vftintrm.w.s */, LoongArch::VFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3151 { 6713 /* vftintrmh.l.s */, LoongArch::VFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3152 { 6727 /* vftintrml.l.s */, LoongArch::VFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3153 { 6741 /* vftintrne.l.d */, LoongArch::VFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3154 { 6755 /* vftintrne.w.d */, LoongArch::VFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3155 { 6769 /* vftintrne.w.s */, LoongArch::VFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3156 { 6783 /* vftintrneh.l.s */, LoongArch::VFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3157 { 6798 /* vftintrnel.l.s */, LoongArch::VFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3158 { 6813 /* vftintrp.l.d */, LoongArch::VFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3159 { 6826 /* vftintrp.w.d */, LoongArch::VFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3160 { 6839 /* vftintrp.w.s */, LoongArch::VFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3161 { 6852 /* vftintrph.l.s */, LoongArch::VFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3162 { 6866 /* vftintrpl.l.s */, LoongArch::VFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3163 { 6880 /* vftintrz.l.d */, LoongArch::VFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3164 { 6893 /* vftintrz.lu.d */, LoongArch::VFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3165 { 6907 /* vftintrz.w.d */, LoongArch::VFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3166 { 6920 /* vftintrz.w.s */, LoongArch::VFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3167 { 6933 /* vftintrz.wu.s */, LoongArch::VFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3168 { 6947 /* vftintrzh.l.s */, LoongArch::VFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3169 { 6961 /* vftintrzl.l.s */, LoongArch::VFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3170 { 6975 /* vhaddw.d.w */, LoongArch::VHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3171 { 6986 /* vhaddw.du.wu */, LoongArch::VHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3172 { 6999 /* vhaddw.h.b */, LoongArch::VHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3173 { 7010 /* vhaddw.hu.bu */, LoongArch::VHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3174 { 7023 /* vhaddw.q.d */, LoongArch::VHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3175 { 7034 /* vhaddw.qu.du */, LoongArch::VHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3176 { 7047 /* vhaddw.w.h */, LoongArch::VHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3177 { 7058 /* vhaddw.wu.hu */, LoongArch::VHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3178 { 7071 /* vhsubw.d.w */, LoongArch::VHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3179 { 7082 /* vhsubw.du.wu */, LoongArch::VHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3180 { 7095 /* vhsubw.h.b */, LoongArch::VHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3181 { 7106 /* vhsubw.hu.bu */, LoongArch::VHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3182 { 7119 /* vhsubw.q.d */, LoongArch::VHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3183 { 7130 /* vhsubw.qu.du */, LoongArch::VHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3184 { 7143 /* vhsubw.w.h */, LoongArch::VHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3185 { 7154 /* vhsubw.wu.hu */, LoongArch::VHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3186 { 7167 /* vilvh.b */, LoongArch::VILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3187 { 7175 /* vilvh.d */, LoongArch::VILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3188 { 7183 /* vilvh.h */, LoongArch::VILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3189 { 7191 /* vilvh.w */, LoongArch::VILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3190 { 7199 /* vilvl.b */, LoongArch::VILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3191 { 7207 /* vilvl.d */, LoongArch::VILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3192 { 7215 /* vilvl.h */, LoongArch::VILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3193 { 7223 /* vilvl.w */, LoongArch::VILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3194 { 7231 /* vinsgr2vr.b */, LoongArch::VINSGR2VR_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm4 }, },
3195 { 7243 /* vinsgr2vr.d */, LoongArch::VINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm1 }, },
3196 { 7255 /* vinsgr2vr.h */, LoongArch::VINSGR2VR_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm3 }, },
3197 { 7267 /* vinsgr2vr.w */, LoongArch::VINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_UImm2 }, },
3198 { 7279 /* vld */, LoongArch::VLD, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, },
3199 { 7283 /* vldi */, LoongArch::VLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LSX128, MCK_SImm13 }, },
3200 { 7288 /* vldrepl.b */, LoongArch::VLDREPL_B, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, },
3201 { 7298 /* vldrepl.d */, LoongArch::VLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm9lsl3 }, },
3202 { 7308 /* vldrepl.h */, LoongArch::VLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm11lsl1 }, },
3203 { 7318 /* vldrepl.w */, LoongArch::VLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm10lsl2 }, },
3204 { 7328 /* vldx */, LoongArch::VLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, },
3205 { 7333 /* vmadd.b */, LoongArch::VMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3206 { 7341 /* vmadd.d */, LoongArch::VMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3207 { 7349 /* vmadd.h */, LoongArch::VMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3208 { 7357 /* vmadd.w */, LoongArch::VMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3209 { 7365 /* vmaddwev.d.w */, LoongArch::VMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3210 { 7378 /* vmaddwev.d.wu */, LoongArch::VMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3211 { 7392 /* vmaddwev.d.wu.w */, LoongArch::VMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3212 { 7408 /* vmaddwev.h.b */, LoongArch::VMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3213 { 7421 /* vmaddwev.h.bu */, LoongArch::VMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3214 { 7435 /* vmaddwev.h.bu.b */, LoongArch::VMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3215 { 7451 /* vmaddwev.q.d */, LoongArch::VMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3216 { 7464 /* vmaddwev.q.du */, LoongArch::VMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3217 { 7478 /* vmaddwev.q.du.d */, LoongArch::VMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3218 { 7494 /* vmaddwev.w.h */, LoongArch::VMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3219 { 7507 /* vmaddwev.w.hu */, LoongArch::VMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3220 { 7521 /* vmaddwev.w.hu.h */, LoongArch::VMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3221 { 7537 /* vmaddwod.d.w */, LoongArch::VMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3222 { 7550 /* vmaddwod.d.wu */, LoongArch::VMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3223 { 7564 /* vmaddwod.d.wu.w */, LoongArch::VMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3224 { 7580 /* vmaddwod.h.b */, LoongArch::VMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3225 { 7593 /* vmaddwod.h.bu */, LoongArch::VMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3226 { 7607 /* vmaddwod.h.bu.b */, LoongArch::VMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3227 { 7623 /* vmaddwod.q.d */, LoongArch::VMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3228 { 7636 /* vmaddwod.q.du */, LoongArch::VMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3229 { 7650 /* vmaddwod.q.du.d */, LoongArch::VMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3230 { 7666 /* vmaddwod.w.h */, LoongArch::VMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3231 { 7679 /* vmaddwod.w.hu */, LoongArch::VMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3232 { 7693 /* vmaddwod.w.hu.h */, LoongArch::VMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3233 { 7709 /* vmax.b */, LoongArch::VMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3234 { 7716 /* vmax.bu */, LoongArch::VMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3235 { 7724 /* vmax.d */, LoongArch::VMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3236 { 7731 /* vmax.du */, LoongArch::VMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3237 { 7739 /* vmax.h */, LoongArch::VMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3238 { 7746 /* vmax.hu */, LoongArch::VMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3239 { 7754 /* vmax.w */, LoongArch::VMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3240 { 7761 /* vmax.wu */, LoongArch::VMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3241 { 7769 /* vmaxi.b */, LoongArch::VMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3242 { 7777 /* vmaxi.bu */, LoongArch::VMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3243 { 7786 /* vmaxi.d */, LoongArch::VMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3244 { 7794 /* vmaxi.du */, LoongArch::VMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3245 { 7803 /* vmaxi.h */, LoongArch::VMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3246 { 7811 /* vmaxi.hu */, LoongArch::VMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3247 { 7820 /* vmaxi.w */, LoongArch::VMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3248 { 7828 /* vmaxi.wu */, LoongArch::VMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3249 { 7837 /* vmin.b */, LoongArch::VMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3250 { 7844 /* vmin.bu */, LoongArch::VMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3251 { 7852 /* vmin.d */, LoongArch::VMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3252 { 7859 /* vmin.du */, LoongArch::VMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3253 { 7867 /* vmin.h */, LoongArch::VMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3254 { 7874 /* vmin.hu */, LoongArch::VMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3255 { 7882 /* vmin.w */, LoongArch::VMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3256 { 7889 /* vmin.wu */, LoongArch::VMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3257 { 7897 /* vmini.b */, LoongArch::VMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3258 { 7905 /* vmini.bu */, LoongArch::VMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3259 { 7914 /* vmini.d */, LoongArch::VMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3260 { 7922 /* vmini.du */, LoongArch::VMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3261 { 7931 /* vmini.h */, LoongArch::VMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3262 { 7939 /* vmini.hu */, LoongArch::VMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3263 { 7948 /* vmini.w */, LoongArch::VMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3264 { 7956 /* vmini.wu */, LoongArch::VMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3265 { 7965 /* vmod.b */, LoongArch::VMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3266 { 7972 /* vmod.bu */, LoongArch::VMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3267 { 7980 /* vmod.d */, LoongArch::VMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3268 { 7987 /* vmod.du */, LoongArch::VMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3269 { 7995 /* vmod.h */, LoongArch::VMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3270 { 8002 /* vmod.hu */, LoongArch::VMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3271 { 8010 /* vmod.w */, LoongArch::VMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3272 { 8017 /* vmod.wu */, LoongArch::VMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3273 { 8025 /* vmskgez.b */, LoongArch::VMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3274 { 8035 /* vmskltz.b */, LoongArch::VMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3275 { 8045 /* vmskltz.d */, LoongArch::VMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3276 { 8055 /* vmskltz.h */, LoongArch::VMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3277 { 8065 /* vmskltz.w */, LoongArch::VMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3278 { 8075 /* vmsknz.b */, LoongArch::VMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3279 { 8084 /* vmsub.b */, LoongArch::VMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3280 { 8092 /* vmsub.d */, LoongArch::VMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3281 { 8100 /* vmsub.h */, LoongArch::VMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3282 { 8108 /* vmsub.w */, LoongArch::VMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3283 { 8116 /* vmuh.b */, LoongArch::VMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3284 { 8123 /* vmuh.bu */, LoongArch::VMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3285 { 8131 /* vmuh.d */, LoongArch::VMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3286 { 8138 /* vmuh.du */, LoongArch::VMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3287 { 8146 /* vmuh.h */, LoongArch::VMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3288 { 8153 /* vmuh.hu */, LoongArch::VMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3289 { 8161 /* vmuh.w */, LoongArch::VMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3290 { 8168 /* vmuh.wu */, LoongArch::VMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3291 { 8176 /* vmul.b */, LoongArch::VMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3292 { 8183 /* vmul.d */, LoongArch::VMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3293 { 8190 /* vmul.h */, LoongArch::VMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3294 { 8197 /* vmul.w */, LoongArch::VMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3295 { 8204 /* vmulwev.d.w */, LoongArch::VMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3296 { 8216 /* vmulwev.d.wu */, LoongArch::VMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3297 { 8229 /* vmulwev.d.wu.w */, LoongArch::VMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3298 { 8244 /* vmulwev.h.b */, LoongArch::VMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3299 { 8256 /* vmulwev.h.bu */, LoongArch::VMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3300 { 8269 /* vmulwev.h.bu.b */, LoongArch::VMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3301 { 8284 /* vmulwev.q.d */, LoongArch::VMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3302 { 8296 /* vmulwev.q.du */, LoongArch::VMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3303 { 8309 /* vmulwev.q.du.d */, LoongArch::VMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3304 { 8324 /* vmulwev.w.h */, LoongArch::VMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3305 { 8336 /* vmulwev.w.hu */, LoongArch::VMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3306 { 8349 /* vmulwev.w.hu.h */, LoongArch::VMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3307 { 8364 /* vmulwod.d.w */, LoongArch::VMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3308 { 8376 /* vmulwod.d.wu */, LoongArch::VMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3309 { 8389 /* vmulwod.d.wu.w */, LoongArch::VMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3310 { 8404 /* vmulwod.h.b */, LoongArch::VMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3311 { 8416 /* vmulwod.h.bu */, LoongArch::VMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3312 { 8429 /* vmulwod.h.bu.b */, LoongArch::VMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3313 { 8444 /* vmulwod.q.d */, LoongArch::VMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3314 { 8456 /* vmulwod.q.du */, LoongArch::VMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3315 { 8469 /* vmulwod.q.du.d */, LoongArch::VMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3316 { 8484 /* vmulwod.w.h */, LoongArch::VMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3317 { 8496 /* vmulwod.w.hu */, LoongArch::VMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3318 { 8509 /* vmulwod.w.hu.h */, LoongArch::VMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3319 { 8524 /* vneg.b */, LoongArch::VNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3320 { 8531 /* vneg.d */, LoongArch::VNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3321 { 8538 /* vneg.h */, LoongArch::VNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3322 { 8545 /* vneg.w */, LoongArch::VNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3323 { 8552 /* vnor.v */, LoongArch::VNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3324 { 8559 /* vnori.b */, LoongArch::VNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3325 { 8567 /* vor.v */, LoongArch::VOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3326 { 8573 /* vori.b */, LoongArch::VORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3327 { 8580 /* vorn.v */, LoongArch::VORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3328 { 8587 /* vpackev.b */, LoongArch::VPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3329 { 8597 /* vpackev.d */, LoongArch::VPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3330 { 8607 /* vpackev.h */, LoongArch::VPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3331 { 8617 /* vpackev.w */, LoongArch::VPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3332 { 8627 /* vpackod.b */, LoongArch::VPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3333 { 8637 /* vpackod.d */, LoongArch::VPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3334 { 8647 /* vpackod.h */, LoongArch::VPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3335 { 8657 /* vpackod.w */, LoongArch::VPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3336 { 8667 /* vpcnt.b */, LoongArch::VPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3337 { 8675 /* vpcnt.d */, LoongArch::VPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3338 { 8683 /* vpcnt.h */, LoongArch::VPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3339 { 8691 /* vpcnt.w */, LoongArch::VPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_LSX128 }, },
3340 { 8699 /* vpermi.w */, LoongArch::VPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3341 { 8708 /* vpickev.b */, LoongArch::VPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3342 { 8718 /* vpickev.d */, LoongArch::VPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3343 { 8728 /* vpickev.h */, LoongArch::VPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3344 { 8738 /* vpickev.w */, LoongArch::VPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3345 { 8748 /* vpickod.b */, LoongArch::VPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3346 { 8758 /* vpickod.d */, LoongArch::VPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3347 { 8768 /* vpickod.h */, LoongArch::VPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3348 { 8778 /* vpickod.w */, LoongArch::VPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3349 { 8788 /* vpickve2gr.b */, LoongArch::VPICKVE2GR_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, },
3350 { 8801 /* vpickve2gr.bu */, LoongArch::VPICKVE2GR_BU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm4 }, },
3351 { 8815 /* vpickve2gr.d */, LoongArch::VPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, },
3352 { 8828 /* vpickve2gr.du */, LoongArch::VPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm1 }, },
3353 { 8842 /* vpickve2gr.h */, LoongArch::VPICKVE2GR_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, },
3354 { 8855 /* vpickve2gr.hu */, LoongArch::VPICKVE2GR_HU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm3 }, },
3355 { 8869 /* vpickve2gr.w */, LoongArch::VPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, },
3356 { 8882 /* vpickve2gr.wu */, LoongArch::VPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LSX128, MCK_UImm2 }, },
3357 { 8896 /* vreplgr2vr.b */, LoongArch::VREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3358 { 8909 /* vreplgr2vr.d */, LoongArch::VREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3359 { 8922 /* vreplgr2vr.h */, LoongArch::VREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3360 { 8935 /* vreplgr2vr.w */, LoongArch::VREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LSX128, MCK_GPR }, },
3361 { 8948 /* vrepli.b */, LoongArch::PseudoVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3362 { 8957 /* vrepli.d */, LoongArch::PseudoVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3363 { 8966 /* vrepli.h */, LoongArch::PseudoVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3364 { 8975 /* vrepli.w */, LoongArch::PseudoVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LSX128, MCK_SImm10 }, },
3365 { 8984 /* vreplve.b */, LoongArch::VREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3366 { 8994 /* vreplve.d */, LoongArch::VREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3367 { 9004 /* vreplve.h */, LoongArch::VREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3368 { 9014 /* vreplve.w */, LoongArch::VREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_GPR }, },
3369 { 9024 /* vreplvei.b */, LoongArch::VREPLVEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3370 { 9035 /* vreplvei.d */, LoongArch::VREPLVEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm1 }, },
3371 { 9046 /* vreplvei.h */, LoongArch::VREPLVEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3372 { 9057 /* vreplvei.w */, LoongArch::VREPLVEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm2 }, },
3373 { 9068 /* vrotr.b */, LoongArch::VROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3374 { 9076 /* vrotr.d */, LoongArch::VROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3375 { 9084 /* vrotr.h */, LoongArch::VROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3376 { 9092 /* vrotr.w */, LoongArch::VROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3377 { 9100 /* vrotri.b */, LoongArch::VROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3378 { 9109 /* vrotri.d */, LoongArch::VROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3379 { 9118 /* vrotri.h */, LoongArch::VROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3380 { 9127 /* vrotri.w */, LoongArch::VROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3381 { 9136 /* vsadd.b */, LoongArch::VSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3382 { 9144 /* vsadd.bu */, LoongArch::VSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3383 { 9153 /* vsadd.d */, LoongArch::VSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3384 { 9161 /* vsadd.du */, LoongArch::VSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3385 { 9170 /* vsadd.h */, LoongArch::VSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3386 { 9178 /* vsadd.hu */, LoongArch::VSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3387 { 9187 /* vsadd.w */, LoongArch::VSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3388 { 9195 /* vsadd.wu */, LoongArch::VSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3389 { 9204 /* vsat.b */, LoongArch::VSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3390 { 9211 /* vsat.bu */, LoongArch::VSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3391 { 9219 /* vsat.d */, LoongArch::VSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3392 { 9226 /* vsat.du */, LoongArch::VSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3393 { 9234 /* vsat.h */, LoongArch::VSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3394 { 9241 /* vsat.hu */, LoongArch::VSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3395 { 9249 /* vsat.w */, LoongArch::VSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3396 { 9256 /* vsat.wu */, LoongArch::VSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3397 { 9264 /* vseq.b */, LoongArch::VSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3398 { 9271 /* vseq.d */, LoongArch::VSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3399 { 9278 /* vseq.h */, LoongArch::VSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3400 { 9285 /* vseq.w */, LoongArch::VSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3401 { 9292 /* vseqi.b */, LoongArch::VSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3402 { 9300 /* vseqi.d */, LoongArch::VSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3403 { 9308 /* vseqi.h */, LoongArch::VSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3404 { 9316 /* vseqi.w */, LoongArch::VSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3405 { 9324 /* vsetallnez.b */, LoongArch::VSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3406 { 9337 /* vsetallnez.d */, LoongArch::VSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3407 { 9350 /* vsetallnez.h */, LoongArch::VSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3408 { 9363 /* vsetallnez.w */, LoongArch::VSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3409 { 9376 /* vsetanyeqz.b */, LoongArch::VSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3410 { 9389 /* vsetanyeqz.d */, LoongArch::VSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3411 { 9402 /* vsetanyeqz.h */, LoongArch::VSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3412 { 9415 /* vsetanyeqz.w */, LoongArch::VSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3413 { 9428 /* vseteqz.v */, LoongArch::VSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3414 { 9438 /* vsetnez.v */, LoongArch::VSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LSX128 }, },
3415 { 9448 /* vshuf.b */, LoongArch::VSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3416 { 9456 /* vshuf.d */, LoongArch::VSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3417 { 9464 /* vshuf.h */, LoongArch::VSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3418 { 9472 /* vshuf.w */, LoongArch::VSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3419 { 9480 /* vshuf4i.b */, LoongArch::VSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3420 { 9490 /* vshuf4i.d */, LoongArch::VSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3421 { 9500 /* vshuf4i.h */, LoongArch::VSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3422 { 9510 /* vshuf4i.w */, LoongArch::VSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3423 { 9520 /* vsigncov.b */, LoongArch::VSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3424 { 9531 /* vsigncov.d */, LoongArch::VSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3425 { 9542 /* vsigncov.h */, LoongArch::VSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3426 { 9553 /* vsigncov.w */, LoongArch::VSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3427 { 9564 /* vsle.b */, LoongArch::VSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3428 { 9571 /* vsle.bu */, LoongArch::VSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3429 { 9579 /* vsle.d */, LoongArch::VSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3430 { 9586 /* vsle.du */, LoongArch::VSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3431 { 9594 /* vsle.h */, LoongArch::VSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3432 { 9601 /* vsle.hu */, LoongArch::VSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3433 { 9609 /* vsle.w */, LoongArch::VSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3434 { 9616 /* vsle.wu */, LoongArch::VSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3435 { 9624 /* vslei.b */, LoongArch::VSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3436 { 9632 /* vslei.bu */, LoongArch::VSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3437 { 9641 /* vslei.d */, LoongArch::VSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3438 { 9649 /* vslei.du */, LoongArch::VSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3439 { 9658 /* vslei.h */, LoongArch::VSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3440 { 9666 /* vslei.hu */, LoongArch::VSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3441 { 9675 /* vslei.w */, LoongArch::VSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3442 { 9683 /* vslei.wu */, LoongArch::VSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3443 { 9692 /* vsll.b */, LoongArch::VSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3444 { 9699 /* vsll.d */, LoongArch::VSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3445 { 9706 /* vsll.h */, LoongArch::VSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3446 { 9713 /* vsll.w */, LoongArch::VSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3447 { 9720 /* vslli.b */, LoongArch::VSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3448 { 9728 /* vslli.d */, LoongArch::VSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3449 { 9736 /* vslli.h */, LoongArch::VSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3450 { 9744 /* vslli.w */, LoongArch::VSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3451 { 9752 /* vsllwil.d.w */, LoongArch::VSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3452 { 9764 /* vsllwil.du.wu */, LoongArch::VSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3453 { 9778 /* vsllwil.h.b */, LoongArch::VSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3454 { 9790 /* vsllwil.hu.bu */, LoongArch::VSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3455 { 9804 /* vsllwil.w.h */, LoongArch::VSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3456 { 9816 /* vsllwil.wu.hu */, LoongArch::VSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3457 { 9830 /* vslt.b */, LoongArch::VSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3458 { 9837 /* vslt.bu */, LoongArch::VSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3459 { 9845 /* vslt.d */, LoongArch::VSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3460 { 9852 /* vslt.du */, LoongArch::VSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3461 { 9860 /* vslt.h */, LoongArch::VSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3462 { 9867 /* vslt.hu */, LoongArch::VSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3463 { 9875 /* vslt.w */, LoongArch::VSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3464 { 9882 /* vslt.wu */, LoongArch::VSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3465 { 9890 /* vslti.b */, LoongArch::VSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3466 { 9898 /* vslti.bu */, LoongArch::VSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3467 { 9907 /* vslti.d */, LoongArch::VSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3468 { 9915 /* vslti.du */, LoongArch::VSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3469 { 9924 /* vslti.h */, LoongArch::VSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3470 { 9932 /* vslti.hu */, LoongArch::VSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3471 { 9941 /* vslti.w */, LoongArch::VSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_SImm5 }, },
3472 { 9949 /* vslti.wu */, LoongArch::VSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3473 { 9958 /* vsra.b */, LoongArch::VSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3474 { 9965 /* vsra.d */, LoongArch::VSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3475 { 9972 /* vsra.h */, LoongArch::VSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3476 { 9979 /* vsra.w */, LoongArch::VSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3477 { 9986 /* vsrai.b */, LoongArch::VSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3478 { 9994 /* vsrai.d */, LoongArch::VSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3479 { 10002 /* vsrai.h */, LoongArch::VSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3480 { 10010 /* vsrai.w */, LoongArch::VSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3481 { 10018 /* vsran.b.h */, LoongArch::VSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3482 { 10028 /* vsran.h.w */, LoongArch::VSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3483 { 10038 /* vsran.w.d */, LoongArch::VSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3484 { 10048 /* vsrani.b.h */, LoongArch::VSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3485 { 10059 /* vsrani.d.q */, LoongArch::VSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3486 { 10070 /* vsrani.h.w */, LoongArch::VSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3487 { 10081 /* vsrani.w.d */, LoongArch::VSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3488 { 10092 /* vsrar.b */, LoongArch::VSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3489 { 10100 /* vsrar.d */, LoongArch::VSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3490 { 10108 /* vsrar.h */, LoongArch::VSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3491 { 10116 /* vsrar.w */, LoongArch::VSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3492 { 10124 /* vsrari.b */, LoongArch::VSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3493 { 10133 /* vsrari.d */, LoongArch::VSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3494 { 10142 /* vsrari.h */, LoongArch::VSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3495 { 10151 /* vsrari.w */, LoongArch::VSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3496 { 10160 /* vsrarn.b.h */, LoongArch::VSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3497 { 10171 /* vsrarn.h.w */, LoongArch::VSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3498 { 10182 /* vsrarn.w.d */, LoongArch::VSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3499 { 10193 /* vsrarni.b.h */, LoongArch::VSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3500 { 10205 /* vsrarni.d.q */, LoongArch::VSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3501 { 10217 /* vsrarni.h.w */, LoongArch::VSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3502 { 10229 /* vsrarni.w.d */, LoongArch::VSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3503 { 10241 /* vsrl.b */, LoongArch::VSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3504 { 10248 /* vsrl.d */, LoongArch::VSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3505 { 10255 /* vsrl.h */, LoongArch::VSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3506 { 10262 /* vsrl.w */, LoongArch::VSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3507 { 10269 /* vsrli.b */, LoongArch::VSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3508 { 10277 /* vsrli.d */, LoongArch::VSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3509 { 10285 /* vsrli.h */, LoongArch::VSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3510 { 10293 /* vsrli.w */, LoongArch::VSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3511 { 10301 /* vsrln.b.h */, LoongArch::VSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3512 { 10311 /* vsrln.h.w */, LoongArch::VSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3513 { 10321 /* vsrln.w.d */, LoongArch::VSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3514 { 10331 /* vsrlni.b.h */, LoongArch::VSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3515 { 10342 /* vsrlni.d.q */, LoongArch::VSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3516 { 10353 /* vsrlni.h.w */, LoongArch::VSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3517 { 10364 /* vsrlni.w.d */, LoongArch::VSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3518 { 10375 /* vsrlr.b */, LoongArch::VSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3519 { 10383 /* vsrlr.d */, LoongArch::VSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3520 { 10391 /* vsrlr.h */, LoongArch::VSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3521 { 10399 /* vsrlr.w */, LoongArch::VSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3522 { 10407 /* vsrlri.b */, LoongArch::VSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm3 }, },
3523 { 10416 /* vsrlri.d */, LoongArch::VSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3524 { 10425 /* vsrlri.h */, LoongArch::VSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3525 { 10434 /* vsrlri.w */, LoongArch::VSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3526 { 10443 /* vsrlrn.b.h */, LoongArch::VSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3527 { 10454 /* vsrlrn.h.w */, LoongArch::VSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3528 { 10465 /* vsrlrn.w.d */, LoongArch::VSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3529 { 10476 /* vsrlrni.b.h */, LoongArch::VSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3530 { 10488 /* vsrlrni.d.q */, LoongArch::VSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3531 { 10500 /* vsrlrni.h.w */, LoongArch::VSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3532 { 10512 /* vsrlrni.w.d */, LoongArch::VSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3533 { 10524 /* vssran.b.h */, LoongArch::VSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3534 { 10535 /* vssran.bu.h */, LoongArch::VSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3535 { 10547 /* vssran.h.w */, LoongArch::VSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3536 { 10558 /* vssran.hu.w */, LoongArch::VSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3537 { 10570 /* vssran.w.d */, LoongArch::VSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3538 { 10581 /* vssran.wu.d */, LoongArch::VSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3539 { 10593 /* vssrani.b.h */, LoongArch::VSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3540 { 10605 /* vssrani.bu.h */, LoongArch::VSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3541 { 10618 /* vssrani.d.q */, LoongArch::VSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3542 { 10630 /* vssrani.du.q */, LoongArch::VSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3543 { 10643 /* vssrani.h.w */, LoongArch::VSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3544 { 10655 /* vssrani.hu.w */, LoongArch::VSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3545 { 10668 /* vssrani.w.d */, LoongArch::VSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3546 { 10680 /* vssrani.wu.d */, LoongArch::VSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3547 { 10693 /* vssrarn.b.h */, LoongArch::VSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3548 { 10705 /* vssrarn.bu.h */, LoongArch::VSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3549 { 10718 /* vssrarn.h.w */, LoongArch::VSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3550 { 10730 /* vssrarn.hu.w */, LoongArch::VSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3551 { 10743 /* vssrarn.w.d */, LoongArch::VSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3552 { 10755 /* vssrarn.wu.d */, LoongArch::VSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3553 { 10768 /* vssrarni.b.h */, LoongArch::VSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3554 { 10781 /* vssrarni.bu.h */, LoongArch::VSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3555 { 10795 /* vssrarni.d.q */, LoongArch::VSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3556 { 10808 /* vssrarni.du.q */, LoongArch::VSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3557 { 10822 /* vssrarni.h.w */, LoongArch::VSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3558 { 10835 /* vssrarni.hu.w */, LoongArch::VSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3559 { 10849 /* vssrarni.w.d */, LoongArch::VSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3560 { 10862 /* vssrarni.wu.d */, LoongArch::VSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3561 { 10876 /* vssrln.b.h */, LoongArch::VSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3562 { 10887 /* vssrln.bu.h */, LoongArch::VSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3563 { 10899 /* vssrln.h.w */, LoongArch::VSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3564 { 10910 /* vssrln.hu.w */, LoongArch::VSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3565 { 10922 /* vssrln.w.d */, LoongArch::VSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3566 { 10933 /* vssrln.wu.d */, LoongArch::VSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3567 { 10945 /* vssrlni.b.h */, LoongArch::VSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3568 { 10957 /* vssrlni.bu.h */, LoongArch::VSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3569 { 10970 /* vssrlni.d.q */, LoongArch::VSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3570 { 10982 /* vssrlni.du.q */, LoongArch::VSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3571 { 10995 /* vssrlni.h.w */, LoongArch::VSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3572 { 11007 /* vssrlni.hu.w */, LoongArch::VSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3573 { 11020 /* vssrlni.w.d */, LoongArch::VSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3574 { 11032 /* vssrlni.wu.d */, LoongArch::VSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3575 { 11045 /* vssrlrn.b.h */, LoongArch::VSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3576 { 11057 /* vssrlrn.bu.h */, LoongArch::VSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3577 { 11070 /* vssrlrn.h.w */, LoongArch::VSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3578 { 11082 /* vssrlrn.hu.w */, LoongArch::VSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3579 { 11095 /* vssrlrn.w.d */, LoongArch::VSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3580 { 11107 /* vssrlrn.wu.d */, LoongArch::VSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3581 { 11120 /* vssrlrni.b.h */, LoongArch::VSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3582 { 11133 /* vssrlrni.bu.h */, LoongArch::VSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm4 }, },
3583 { 11147 /* vssrlrni.d.q */, LoongArch::VSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3584 { 11160 /* vssrlrni.du.q */, LoongArch::VSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm7 }, },
3585 { 11174 /* vssrlrni.h.w */, LoongArch::VSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3586 { 11187 /* vssrlrni.hu.w */, LoongArch::VSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3587 { 11201 /* vssrlrni.w.d */, LoongArch::VSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3588 { 11214 /* vssrlrni.wu.d */, LoongArch::VSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm6 }, },
3589 { 11228 /* vssub.b */, LoongArch::VSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3590 { 11236 /* vssub.bu */, LoongArch::VSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3591 { 11245 /* vssub.d */, LoongArch::VSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3592 { 11253 /* vssub.du */, LoongArch::VSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3593 { 11262 /* vssub.h */, LoongArch::VSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3594 { 11270 /* vssub.hu */, LoongArch::VSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3595 { 11279 /* vssub.w */, LoongArch::VSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3596 { 11287 /* vssub.wu */, LoongArch::VSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3597 { 11296 /* vst */, LoongArch::VST, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm12 }, },
3598 { 11300 /* vstelm.b */, LoongArch::VSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm41_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8, MCK_UImm4 }, },
3599 { 11309 /* vstelm.d */, LoongArch::VSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm11_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl3, MCK_UImm1 }, },
3600 { 11318 /* vstelm.h */, LoongArch::VSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm31_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl1, MCK_UImm3 }, },
3601 { 11327 /* vstelm.w */, LoongArch::VSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm21_3, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_SImm8lsl2, MCK_UImm2 }, },
3602 { 11336 /* vstx */, LoongArch::VSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_GPR, MCK_GPR }, },
3603 { 11341 /* vsub.b */, LoongArch::VSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3604 { 11348 /* vsub.d */, LoongArch::VSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3605 { 11355 /* vsub.h */, LoongArch::VSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3606 { 11362 /* vsub.q */, LoongArch::VSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3607 { 11369 /* vsub.w */, LoongArch::VSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3608 { 11376 /* vsubi.bu */, LoongArch::VSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3609 { 11385 /* vsubi.du */, LoongArch::VSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3610 { 11394 /* vsubi.hu */, LoongArch::VSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3611 { 11403 /* vsubi.wu */, LoongArch::VSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm5 }, },
3612 { 11412 /* vsubwev.d.w */, LoongArch::VSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3613 { 11424 /* vsubwev.d.wu */, LoongArch::VSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3614 { 11437 /* vsubwev.h.b */, LoongArch::VSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3615 { 11449 /* vsubwev.h.bu */, LoongArch::VSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3616 { 11462 /* vsubwev.q.d */, LoongArch::VSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3617 { 11474 /* vsubwev.q.du */, LoongArch::VSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3618 { 11487 /* vsubwev.w.h */, LoongArch::VSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3619 { 11499 /* vsubwev.w.hu */, LoongArch::VSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3620 { 11512 /* vsubwod.d.w */, LoongArch::VSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3621 { 11524 /* vsubwod.d.wu */, LoongArch::VSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3622 { 11537 /* vsubwod.h.b */, LoongArch::VSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3623 { 11549 /* vsubwod.h.bu */, LoongArch::VSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3624 { 11562 /* vsubwod.q.d */, LoongArch::VSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3625 { 11574 /* vsubwod.q.du */, LoongArch::VSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3626 { 11587 /* vsubwod.w.h */, LoongArch::VSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3627 { 11599 /* vsubwod.w.hu */, LoongArch::VSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3628 { 11612 /* vxor.v */, LoongArch::VXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_LSX128 }, },
3629 { 11619 /* vxori.b */, LoongArch::VXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LSX128, MCK_LSX128, MCK_UImm8 }, },
3630 { 11627 /* x86adc.b */, LoongArch::X86ADC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3631 { 11636 /* x86adc.d */, LoongArch::X86ADC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3632 { 11645 /* x86adc.h */, LoongArch::X86ADC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3633 { 11654 /* x86adc.w */, LoongArch::X86ADC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3634 { 11663 /* x86add.b */, LoongArch::X86ADD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3635 { 11672 /* x86add.d */, LoongArch::X86ADD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3636 { 11681 /* x86add.du */, LoongArch::X86ADD_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3637 { 11691 /* x86add.h */, LoongArch::X86ADD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3638 { 11700 /* x86add.w */, LoongArch::X86ADD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3639 { 11709 /* x86add.wu */, LoongArch::X86ADD_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3640 { 11719 /* x86and.b */, LoongArch::X86AND_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3641 { 11728 /* x86and.d */, LoongArch::X86AND_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3642 { 11737 /* x86and.h */, LoongArch::X86AND_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3643 { 11746 /* x86and.w */, LoongArch::X86AND_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3644 { 11755 /* x86clrtm */, LoongArch::X86CLRTM, Convert_NoOperands, AMFBS_None, { }, },
3645 { 11764 /* x86dec.b */, LoongArch::X86DEC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3646 { 11773 /* x86dec.d */, LoongArch::X86DEC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, },
3647 { 11782 /* x86dec.h */, LoongArch::X86DEC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3648 { 11791 /* x86dec.w */, LoongArch::X86DEC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3649 { 11800 /* x86dectop */, LoongArch::X86DECTOP, Convert_NoOperands, AMFBS_None, { }, },
3650 { 11810 /* x86inc.b */, LoongArch::X86INC_B, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3651 { 11819 /* x86inc.d */, LoongArch::X86INC_D, Convert__Reg1_0, AMFBS_IsLA64, { MCK_GPR }, },
3652 { 11828 /* x86inc.h */, LoongArch::X86INC_H, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3653 { 11837 /* x86inc.w */, LoongArch::X86INC_W, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3654 { 11846 /* x86inctop */, LoongArch::X86INCTOP, Convert_NoOperands, AMFBS_None, { }, },
3655 { 11856 /* x86mfflag */, LoongArch::X86MFFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
3656 { 11866 /* x86mftop */, LoongArch::X86MFTOP, Convert__Reg1_0, AMFBS_None, { MCK_GPR }, },
3657 { 11875 /* x86mtflag */, LoongArch::X86MTFLAG, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, },
3658 { 11885 /* x86mttop */, LoongArch::X86MTTOP, Convert__UImm31_0, AMFBS_None, { MCK_UImm3 }, },
3659 { 11894 /* x86mul.b */, LoongArch::X86MUL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3660 { 11903 /* x86mul.bu */, LoongArch::X86MUL_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3661 { 11913 /* x86mul.d */, LoongArch::X86MUL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3662 { 11922 /* x86mul.du */, LoongArch::X86MUL_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3663 { 11932 /* x86mul.h */, LoongArch::X86MUL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3664 { 11941 /* x86mul.hu */, LoongArch::X86MUL_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3665 { 11951 /* x86mul.w */, LoongArch::X86MUL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3666 { 11960 /* x86mul.wu */, LoongArch::X86MUL_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3667 { 11970 /* x86or.b */, LoongArch::X86OR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3668 { 11978 /* x86or.d */, LoongArch::X86OR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3669 { 11986 /* x86or.h */, LoongArch::X86OR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3670 { 11994 /* x86or.w */, LoongArch::X86OR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3671 { 12002 /* x86rcl.b */, LoongArch::X86RCL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3672 { 12011 /* x86rcl.d */, LoongArch::X86RCL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3673 { 12020 /* x86rcl.h */, LoongArch::X86RCL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3674 { 12029 /* x86rcl.w */, LoongArch::X86RCL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3675 { 12038 /* x86rcli.b */, LoongArch::X86RCLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3676 { 12048 /* x86rcli.d */, LoongArch::X86RCLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3677 { 12058 /* x86rcli.h */, LoongArch::X86RCLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3678 { 12068 /* x86rcli.w */, LoongArch::X86RCLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3679 { 12078 /* x86rcr.b */, LoongArch::X86RCR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3680 { 12087 /* x86rcr.d */, LoongArch::X86RCR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3681 { 12096 /* x86rcr.h */, LoongArch::X86RCR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3682 { 12105 /* x86rcr.w */, LoongArch::X86RCR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3683 { 12114 /* x86rcri.b */, LoongArch::X86RCRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3684 { 12124 /* x86rcri.d */, LoongArch::X86RCRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3685 { 12134 /* x86rcri.h */, LoongArch::X86RCRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3686 { 12144 /* x86rcri.w */, LoongArch::X86RCRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3687 { 12154 /* x86rotl.b */, LoongArch::X86ROTL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3688 { 12164 /* x86rotl.d */, LoongArch::X86ROTL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3689 { 12174 /* x86rotl.h */, LoongArch::X86ROTL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3690 { 12184 /* x86rotl.w */, LoongArch::X86ROTL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3691 { 12194 /* x86rotli.b */, LoongArch::X86ROTLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3692 { 12205 /* x86rotli.d */, LoongArch::X86ROTLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3693 { 12216 /* x86rotli.h */, LoongArch::X86ROTLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3694 { 12227 /* x86rotli.w */, LoongArch::X86ROTLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3695 { 12238 /* x86rotr.b */, LoongArch::X86ROTR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3696 { 12248 /* x86rotr.d */, LoongArch::X86ROTR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3697 { 12258 /* x86rotr.h */, LoongArch::X86ROTR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3698 { 12268 /* x86rotr.w */, LoongArch::X86ROTR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3699 { 12278 /* x86rotri.b */, LoongArch::X86ROTRI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3700 { 12289 /* x86rotri.d */, LoongArch::X86ROTRI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3701 { 12300 /* x86rotri.h */, LoongArch::X86ROTRI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3702 { 12311 /* x86rotri.w */, LoongArch::X86ROTRI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3703 { 12322 /* x86sbc.b */, LoongArch::X86SBC_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3704 { 12331 /* x86sbc.d */, LoongArch::X86SBC_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3705 { 12340 /* x86sbc.h */, LoongArch::X86SBC_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3706 { 12349 /* x86sbc.w */, LoongArch::X86SBC_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3707 { 12358 /* x86settag */, LoongArch::X86SETTAG, Convert__Reg1_0__UImm51_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_UImm5, MCK_UImm8 }, },
3708 { 12368 /* x86settm */, LoongArch::X86SETTM, Convert_NoOperands, AMFBS_None, { }, },
3709 { 12377 /* x86sll.b */, LoongArch::X86SLL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3710 { 12386 /* x86sll.d */, LoongArch::X86SLL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3711 { 12395 /* x86sll.h */, LoongArch::X86SLL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3712 { 12404 /* x86sll.w */, LoongArch::X86SLL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3713 { 12413 /* x86slli.b */, LoongArch::X86SLLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3714 { 12423 /* x86slli.d */, LoongArch::X86SLLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3715 { 12433 /* x86slli.h */, LoongArch::X86SLLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3716 { 12443 /* x86slli.w */, LoongArch::X86SLLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3717 { 12453 /* x86sra.b */, LoongArch::X86SRA_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3718 { 12462 /* x86sra.d */, LoongArch::X86SRA_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3719 { 12471 /* x86sra.h */, LoongArch::X86SRA_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3720 { 12480 /* x86sra.w */, LoongArch::X86SRA_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3721 { 12489 /* x86srai.b */, LoongArch::X86SRAI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3722 { 12499 /* x86srai.d */, LoongArch::X86SRAI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3723 { 12509 /* x86srai.h */, LoongArch::X86SRAI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3724 { 12519 /* x86srai.w */, LoongArch::X86SRAI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3725 { 12529 /* x86srl.b */, LoongArch::X86SRL_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3726 { 12538 /* x86srl.d */, LoongArch::X86SRL_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3727 { 12547 /* x86srl.h */, LoongArch::X86SRL_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3728 { 12556 /* x86srl.w */, LoongArch::X86SRL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3729 { 12565 /* x86srli.b */, LoongArch::X86SRLI_B, Convert__Reg1_0__UImm31_1, AMFBS_None, { MCK_GPR, MCK_UImm3 }, },
3730 { 12575 /* x86srli.d */, LoongArch::X86SRLI_D, Convert__Reg1_0__UImm61_1, AMFBS_IsLA64, { MCK_GPR, MCK_UImm6 }, },
3731 { 12585 /* x86srli.h */, LoongArch::X86SRLI_H, Convert__Reg1_0__UImm41_1, AMFBS_None, { MCK_GPR, MCK_UImm4 }, },
3732 { 12595 /* x86srli.w */, LoongArch::X86SRLI_W, Convert__Reg1_0__UImm51_1, AMFBS_None, { MCK_GPR, MCK_UImm5 }, },
3733 { 12605 /* x86sub.b */, LoongArch::X86SUB_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3734 { 12614 /* x86sub.d */, LoongArch::X86SUB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3735 { 12623 /* x86sub.du */, LoongArch::X86SUB_DU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3736 { 12633 /* x86sub.h */, LoongArch::X86SUB_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3737 { 12642 /* x86sub.w */, LoongArch::X86SUB_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3738 { 12651 /* x86sub.wu */, LoongArch::X86SUB_WU, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3739 { 12661 /* x86xor.b */, LoongArch::X86XOR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3740 { 12670 /* x86xor.d */, LoongArch::X86XOR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, },
3741 { 12679 /* x86xor.h */, LoongArch::X86XOR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3742 { 12688 /* x86xor.w */, LoongArch::X86XOR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, },
3743 { 12697 /* xor */, LoongArch::XOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, },
3744 { 12701 /* xori */, LoongArch::XORI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, },
3745 { 12706 /* xvabsd.b */, LoongArch::XVABSD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3746 { 12715 /* xvabsd.bu */, LoongArch::XVABSD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3747 { 12725 /* xvabsd.d */, LoongArch::XVABSD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3748 { 12734 /* xvabsd.du */, LoongArch::XVABSD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3749 { 12744 /* xvabsd.h */, LoongArch::XVABSD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3750 { 12753 /* xvabsd.hu */, LoongArch::XVABSD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3751 { 12763 /* xvabsd.w */, LoongArch::XVABSD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3752 { 12772 /* xvabsd.wu */, LoongArch::XVABSD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3753 { 12782 /* xvadd.b */, LoongArch::XVADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3754 { 12790 /* xvadd.d */, LoongArch::XVADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3755 { 12798 /* xvadd.h */, LoongArch::XVADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3756 { 12806 /* xvadd.q */, LoongArch::XVADD_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3757 { 12814 /* xvadd.w */, LoongArch::XVADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3758 { 12822 /* xvadda.b */, LoongArch::XVADDA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3759 { 12831 /* xvadda.d */, LoongArch::XVADDA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3760 { 12840 /* xvadda.h */, LoongArch::XVADDA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3761 { 12849 /* xvadda.w */, LoongArch::XVADDA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3762 { 12858 /* xvaddi.bu */, LoongArch::XVADDI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3763 { 12868 /* xvaddi.du */, LoongArch::XVADDI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3764 { 12878 /* xvaddi.hu */, LoongArch::XVADDI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3765 { 12888 /* xvaddi.wu */, LoongArch::XVADDI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3766 { 12898 /* xvaddwev.d.w */, LoongArch::XVADDWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3767 { 12911 /* xvaddwev.d.wu */, LoongArch::XVADDWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3768 { 12925 /* xvaddwev.d.wu.w */, LoongArch::XVADDWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3769 { 12941 /* xvaddwev.h.b */, LoongArch::XVADDWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3770 { 12954 /* xvaddwev.h.bu */, LoongArch::XVADDWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3771 { 12968 /* xvaddwev.h.bu.b */, LoongArch::XVADDWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3772 { 12984 /* xvaddwev.q.d */, LoongArch::XVADDWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3773 { 12997 /* xvaddwev.q.du */, LoongArch::XVADDWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3774 { 13011 /* xvaddwev.q.du.d */, LoongArch::XVADDWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3775 { 13027 /* xvaddwev.w.h */, LoongArch::XVADDWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3776 { 13040 /* xvaddwev.w.hu */, LoongArch::XVADDWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3777 { 13054 /* xvaddwev.w.hu.h */, LoongArch::XVADDWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3778 { 13070 /* xvaddwod.d.w */, LoongArch::XVADDWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3779 { 13083 /* xvaddwod.d.wu */, LoongArch::XVADDWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3780 { 13097 /* xvaddwod.d.wu.w */, LoongArch::XVADDWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3781 { 13113 /* xvaddwod.h.b */, LoongArch::XVADDWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3782 { 13126 /* xvaddwod.h.bu */, LoongArch::XVADDWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3783 { 13140 /* xvaddwod.h.bu.b */, LoongArch::XVADDWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3784 { 13156 /* xvaddwod.q.d */, LoongArch::XVADDWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3785 { 13169 /* xvaddwod.q.du */, LoongArch::XVADDWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3786 { 13183 /* xvaddwod.q.du.d */, LoongArch::XVADDWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3787 { 13199 /* xvaddwod.w.h */, LoongArch::XVADDWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3788 { 13212 /* xvaddwod.w.hu */, LoongArch::XVADDWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3789 { 13226 /* xvaddwod.w.hu.h */, LoongArch::XVADDWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3790 { 13242 /* xvand.v */, LoongArch::XVAND_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3791 { 13250 /* xvandi.b */, LoongArch::XVANDI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3792 { 13259 /* xvandn.v */, LoongArch::XVANDN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3793 { 13268 /* xvavg.b */, LoongArch::XVAVG_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3794 { 13276 /* xvavg.bu */, LoongArch::XVAVG_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3795 { 13285 /* xvavg.d */, LoongArch::XVAVG_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3796 { 13293 /* xvavg.du */, LoongArch::XVAVG_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3797 { 13302 /* xvavg.h */, LoongArch::XVAVG_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3798 { 13310 /* xvavg.hu */, LoongArch::XVAVG_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3799 { 13319 /* xvavg.w */, LoongArch::XVAVG_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3800 { 13327 /* xvavg.wu */, LoongArch::XVAVG_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3801 { 13336 /* xvavgr.b */, LoongArch::XVAVGR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3802 { 13345 /* xvavgr.bu */, LoongArch::XVAVGR_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3803 { 13355 /* xvavgr.d */, LoongArch::XVAVGR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3804 { 13364 /* xvavgr.du */, LoongArch::XVAVGR_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3805 { 13374 /* xvavgr.h */, LoongArch::XVAVGR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3806 { 13383 /* xvavgr.hu */, LoongArch::XVAVGR_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3807 { 13393 /* xvavgr.w */, LoongArch::XVAVGR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3808 { 13402 /* xvavgr.wu */, LoongArch::XVAVGR_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3809 { 13412 /* xvbitclr.b */, LoongArch::XVBITCLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3810 { 13423 /* xvbitclr.d */, LoongArch::XVBITCLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3811 { 13434 /* xvbitclr.h */, LoongArch::XVBITCLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3812 { 13445 /* xvbitclr.w */, LoongArch::XVBITCLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3813 { 13456 /* xvbitclri.b */, LoongArch::XVBITCLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3814 { 13468 /* xvbitclri.d */, LoongArch::XVBITCLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3815 { 13480 /* xvbitclri.h */, LoongArch::XVBITCLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3816 { 13492 /* xvbitclri.w */, LoongArch::XVBITCLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3817 { 13504 /* xvbitrev.b */, LoongArch::XVBITREV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3818 { 13515 /* xvbitrev.d */, LoongArch::XVBITREV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3819 { 13526 /* xvbitrev.h */, LoongArch::XVBITREV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3820 { 13537 /* xvbitrev.w */, LoongArch::XVBITREV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3821 { 13548 /* xvbitrevi.b */, LoongArch::XVBITREVI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3822 { 13560 /* xvbitrevi.d */, LoongArch::XVBITREVI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3823 { 13572 /* xvbitrevi.h */, LoongArch::XVBITREVI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3824 { 13584 /* xvbitrevi.w */, LoongArch::XVBITREVI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3825 { 13596 /* xvbitsel.v */, LoongArch::XVBITSEL_V, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3826 { 13607 /* xvbitseli.b */, LoongArch::XVBITSELI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3827 { 13619 /* xvbitset.b */, LoongArch::XVBITSET_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3828 { 13630 /* xvbitset.d */, LoongArch::XVBITSET_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3829 { 13641 /* xvbitset.h */, LoongArch::XVBITSET_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3830 { 13652 /* xvbitset.w */, LoongArch::XVBITSET_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3831 { 13663 /* xvbitseti.b */, LoongArch::XVBITSETI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
3832 { 13675 /* xvbitseti.d */, LoongArch::XVBITSETI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
3833 { 13687 /* xvbitseti.h */, LoongArch::XVBITSETI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
3834 { 13699 /* xvbitseti.w */, LoongArch::XVBITSETI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3835 { 13711 /* xvbsll.v */, LoongArch::XVBSLL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3836 { 13720 /* xvbsrl.v */, LoongArch::XVBSRL_V, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3837 { 13729 /* xvclo.b */, LoongArch::XVCLO_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3838 { 13737 /* xvclo.d */, LoongArch::XVCLO_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3839 { 13745 /* xvclo.h */, LoongArch::XVCLO_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3840 { 13753 /* xvclo.w */, LoongArch::XVCLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3841 { 13761 /* xvclz.b */, LoongArch::XVCLZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3842 { 13769 /* xvclz.d */, LoongArch::XVCLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3843 { 13777 /* xvclz.h */, LoongArch::XVCLZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3844 { 13785 /* xvclz.w */, LoongArch::XVCLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3845 { 13793 /* xvdiv.b */, LoongArch::XVDIV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3846 { 13801 /* xvdiv.bu */, LoongArch::XVDIV_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3847 { 13810 /* xvdiv.d */, LoongArch::XVDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3848 { 13818 /* xvdiv.du */, LoongArch::XVDIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3849 { 13827 /* xvdiv.h */, LoongArch::XVDIV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3850 { 13835 /* xvdiv.hu */, LoongArch::XVDIV_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3851 { 13844 /* xvdiv.w */, LoongArch::XVDIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3852 { 13852 /* xvdiv.wu */, LoongArch::XVDIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3853 { 13861 /* xvexth.d.w */, LoongArch::XVEXTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3854 { 13872 /* xvexth.du.wu */, LoongArch::XVEXTH_DU_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3855 { 13885 /* xvexth.h.b */, LoongArch::XVEXTH_H_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3856 { 13896 /* xvexth.hu.bu */, LoongArch::XVEXTH_HU_BU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3857 { 13909 /* xvexth.q.d */, LoongArch::XVEXTH_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3858 { 13920 /* xvexth.qu.du */, LoongArch::XVEXTH_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3859 { 13933 /* xvexth.w.h */, LoongArch::XVEXTH_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3860 { 13944 /* xvexth.wu.hu */, LoongArch::XVEXTH_WU_HU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3861 { 13957 /* xvextl.q.d */, LoongArch::XVEXTL_Q_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3862 { 13968 /* xvextl.qu.du */, LoongArch::XVEXTL_QU_DU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3863 { 13981 /* xvextrins.b */, LoongArch::XVEXTRINS_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3864 { 13993 /* xvextrins.d */, LoongArch::XVEXTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3865 { 14005 /* xvextrins.h */, LoongArch::XVEXTRINS_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3866 { 14017 /* xvextrins.w */, LoongArch::XVEXTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
3867 { 14029 /* xvfadd.d */, LoongArch::XVFADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3868 { 14038 /* xvfadd.s */, LoongArch::XVFADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3869 { 14047 /* xvfclass.d */, LoongArch::XVFCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3870 { 14058 /* xvfclass.s */, LoongArch::XVFCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3871 { 14069 /* xvfcmp.caf.d */, LoongArch::XVFCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3872 { 14082 /* xvfcmp.caf.s */, LoongArch::XVFCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3873 { 14095 /* xvfcmp.ceq.d */, LoongArch::XVFCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3874 { 14108 /* xvfcmp.ceq.s */, LoongArch::XVFCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3875 { 14121 /* xvfcmp.cle.d */, LoongArch::XVFCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3876 { 14134 /* xvfcmp.cle.s */, LoongArch::XVFCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3877 { 14147 /* xvfcmp.clt.d */, LoongArch::XVFCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3878 { 14160 /* xvfcmp.clt.s */, LoongArch::XVFCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3879 { 14173 /* xvfcmp.cne.d */, LoongArch::XVFCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3880 { 14186 /* xvfcmp.cne.s */, LoongArch::XVFCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3881 { 14199 /* xvfcmp.cor.d */, LoongArch::XVFCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3882 { 14212 /* xvfcmp.cor.s */, LoongArch::XVFCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3883 { 14225 /* xvfcmp.cueq.d */, LoongArch::XVFCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3884 { 14239 /* xvfcmp.cueq.s */, LoongArch::XVFCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3885 { 14253 /* xvfcmp.cule.d */, LoongArch::XVFCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3886 { 14267 /* xvfcmp.cule.s */, LoongArch::XVFCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3887 { 14281 /* xvfcmp.cult.d */, LoongArch::XVFCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3888 { 14295 /* xvfcmp.cult.s */, LoongArch::XVFCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3889 { 14309 /* xvfcmp.cun.d */, LoongArch::XVFCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3890 { 14322 /* xvfcmp.cun.s */, LoongArch::XVFCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3891 { 14335 /* xvfcmp.cune.d */, LoongArch::XVFCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3892 { 14349 /* xvfcmp.cune.s */, LoongArch::XVFCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3893 { 14363 /* xvfcmp.saf.d */, LoongArch::XVFCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3894 { 14376 /* xvfcmp.saf.s */, LoongArch::XVFCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3895 { 14389 /* xvfcmp.seq.d */, LoongArch::XVFCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3896 { 14402 /* xvfcmp.seq.s */, LoongArch::XVFCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3897 { 14415 /* xvfcmp.sle.d */, LoongArch::XVFCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3898 { 14428 /* xvfcmp.sle.s */, LoongArch::XVFCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3899 { 14441 /* xvfcmp.slt.d */, LoongArch::XVFCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3900 { 14454 /* xvfcmp.slt.s */, LoongArch::XVFCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3901 { 14467 /* xvfcmp.sne.d */, LoongArch::XVFCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3902 { 14480 /* xvfcmp.sne.s */, LoongArch::XVFCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3903 { 14493 /* xvfcmp.sor.d */, LoongArch::XVFCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3904 { 14506 /* xvfcmp.sor.s */, LoongArch::XVFCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3905 { 14519 /* xvfcmp.sueq.d */, LoongArch::XVFCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3906 { 14533 /* xvfcmp.sueq.s */, LoongArch::XVFCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3907 { 14547 /* xvfcmp.sule.d */, LoongArch::XVFCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3908 { 14561 /* xvfcmp.sule.s */, LoongArch::XVFCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3909 { 14575 /* xvfcmp.sult.d */, LoongArch::XVFCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3910 { 14589 /* xvfcmp.sult.s */, LoongArch::XVFCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3911 { 14603 /* xvfcmp.sun.d */, LoongArch::XVFCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3912 { 14616 /* xvfcmp.sun.s */, LoongArch::XVFCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3913 { 14629 /* xvfcmp.sune.d */, LoongArch::XVFCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3914 { 14643 /* xvfcmp.sune.s */, LoongArch::XVFCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3915 { 14657 /* xvfcvt.h.s */, LoongArch::XVFCVT_H_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3916 { 14668 /* xvfcvt.s.d */, LoongArch::XVFCVT_S_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3917 { 14679 /* xvfcvth.d.s */, LoongArch::XVFCVTH_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3918 { 14691 /* xvfcvth.s.h */, LoongArch::XVFCVTH_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3919 { 14703 /* xvfcvtl.d.s */, LoongArch::XVFCVTL_D_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3920 { 14715 /* xvfcvtl.s.h */, LoongArch::XVFCVTL_S_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3921 { 14727 /* xvfdiv.d */, LoongArch::XVFDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3922 { 14736 /* xvfdiv.s */, LoongArch::XVFDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3923 { 14745 /* xvffint.d.l */, LoongArch::XVFFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3924 { 14757 /* xvffint.d.lu */, LoongArch::XVFFINT_D_LU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3925 { 14770 /* xvffint.s.l */, LoongArch::XVFFINT_S_L, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3926 { 14782 /* xvffint.s.w */, LoongArch::XVFFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3927 { 14794 /* xvffint.s.wu */, LoongArch::XVFFINT_S_WU, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3928 { 14807 /* xvffinth.d.w */, LoongArch::XVFFINTH_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3929 { 14820 /* xvffintl.d.w */, LoongArch::XVFFINTL_D_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3930 { 14833 /* xvflogb.d */, LoongArch::XVFLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3931 { 14843 /* xvflogb.s */, LoongArch::XVFLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3932 { 14853 /* xvfmadd.d */, LoongArch::XVFMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3933 { 14863 /* xvfmadd.s */, LoongArch::XVFMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3934 { 14873 /* xvfmax.d */, LoongArch::XVFMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3935 { 14882 /* xvfmax.s */, LoongArch::XVFMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3936 { 14891 /* xvfmaxa.d */, LoongArch::XVFMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3937 { 14901 /* xvfmaxa.s */, LoongArch::XVFMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3938 { 14911 /* xvfmin.d */, LoongArch::XVFMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3939 { 14920 /* xvfmin.s */, LoongArch::XVFMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3940 { 14929 /* xvfmina.d */, LoongArch::XVFMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3941 { 14939 /* xvfmina.s */, LoongArch::XVFMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3942 { 14949 /* xvfmsub.d */, LoongArch::XVFMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3943 { 14959 /* xvfmsub.s */, LoongArch::XVFMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3944 { 14969 /* xvfmul.d */, LoongArch::XVFMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3945 { 14978 /* xvfmul.s */, LoongArch::XVFMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3946 { 14987 /* xvfnmadd.d */, LoongArch::XVFNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3947 { 14998 /* xvfnmadd.s */, LoongArch::XVFNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3948 { 15009 /* xvfnmsub.d */, LoongArch::XVFNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3949 { 15020 /* xvfnmsub.s */, LoongArch::XVFNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3950 { 15031 /* xvfrecip.d */, LoongArch::XVFRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3951 { 15042 /* xvfrecip.s */, LoongArch::XVFRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3952 { 15053 /* xvfrecipe.d */, LoongArch::XVFRECIPE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3953 { 15065 /* xvfrecipe.s */, LoongArch::XVFRECIPE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3954 { 15077 /* xvfrint.d */, LoongArch::XVFRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3955 { 15087 /* xvfrint.s */, LoongArch::XVFRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3956 { 15097 /* xvfrintrm.d */, LoongArch::XVFRINTRM_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3957 { 15109 /* xvfrintrm.s */, LoongArch::XVFRINTRM_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3958 { 15121 /* xvfrintrne.d */, LoongArch::XVFRINTRNE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3959 { 15134 /* xvfrintrne.s */, LoongArch::XVFRINTRNE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3960 { 15147 /* xvfrintrp.d */, LoongArch::XVFRINTRP_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3961 { 15159 /* xvfrintrp.s */, LoongArch::XVFRINTRP_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3962 { 15171 /* xvfrintrz.d */, LoongArch::XVFRINTRZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3963 { 15183 /* xvfrintrz.s */, LoongArch::XVFRINTRZ_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3964 { 15195 /* xvfrsqrt.d */, LoongArch::XVFRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3965 { 15206 /* xvfrsqrt.s */, LoongArch::XVFRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3966 { 15217 /* xvfrsqrte.d */, LoongArch::XVFRSQRTE_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3967 { 15229 /* xvfrsqrte.s */, LoongArch::XVFRSQRTE_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3968 { 15241 /* xvfrstp.b */, LoongArch::XVFRSTP_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3969 { 15251 /* xvfrstp.h */, LoongArch::XVFRSTP_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3970 { 15261 /* xvfrstpi.b */, LoongArch::XVFRSTPI_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3971 { 15272 /* xvfrstpi.h */, LoongArch::XVFRSTPI_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
3972 { 15283 /* xvfsqrt.d */, LoongArch::XVFSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3973 { 15293 /* xvfsqrt.s */, LoongArch::XVFSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3974 { 15303 /* xvfsub.d */, LoongArch::XVFSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3975 { 15312 /* xvfsub.s */, LoongArch::XVFSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3976 { 15321 /* xvftint.l.d */, LoongArch::XVFTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3977 { 15333 /* xvftint.lu.d */, LoongArch::XVFTINT_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3978 { 15346 /* xvftint.w.d */, LoongArch::XVFTINT_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3979 { 15358 /* xvftint.w.s */, LoongArch::XVFTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3980 { 15370 /* xvftint.wu.s */, LoongArch::XVFTINT_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3981 { 15383 /* xvftinth.l.s */, LoongArch::XVFTINTH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3982 { 15396 /* xvftintl.l.s */, LoongArch::XVFTINTL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3983 { 15409 /* xvftintrm.l.d */, LoongArch::XVFTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3984 { 15423 /* xvftintrm.w.d */, LoongArch::XVFTINTRM_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3985 { 15437 /* xvftintrm.w.s */, LoongArch::XVFTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3986 { 15451 /* xvftintrmh.l.s */, LoongArch::XVFTINTRMH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3987 { 15466 /* xvftintrml.l.s */, LoongArch::XVFTINTRML_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3988 { 15481 /* xvftintrne.l.d */, LoongArch::XVFTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3989 { 15496 /* xvftintrne.w.d */, LoongArch::XVFTINTRNE_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3990 { 15511 /* xvftintrne.w.s */, LoongArch::XVFTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3991 { 15526 /* xvftintrneh.l.s */, LoongArch::XVFTINTRNEH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3992 { 15542 /* xvftintrnel.l.s */, LoongArch::XVFTINTRNEL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3993 { 15558 /* xvftintrp.l.d */, LoongArch::XVFTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3994 { 15572 /* xvftintrp.w.d */, LoongArch::XVFTINTRP_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
3995 { 15586 /* xvftintrp.w.s */, LoongArch::XVFTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3996 { 15600 /* xvftintrph.l.s */, LoongArch::XVFTINTRPH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3997 { 15615 /* xvftintrpl.l.s */, LoongArch::XVFTINTRPL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3998 { 15630 /* xvftintrz.l.d */, LoongArch::XVFTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
3999 { 15644 /* xvftintrz.lu.d */, LoongArch::XVFTINTRZ_LU_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4000 { 15659 /* xvftintrz.w.d */, LoongArch::XVFTINTRZ_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4001 { 15673 /* xvftintrz.w.s */, LoongArch::XVFTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4002 { 15687 /* xvftintrz.wu.s */, LoongArch::XVFTINTRZ_WU_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4003 { 15702 /* xvftintrzh.l.s */, LoongArch::XVFTINTRZH_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4004 { 15717 /* xvftintrzl.l.s */, LoongArch::XVFTINTRZL_L_S, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4005 { 15732 /* xvhaddw.d.w */, LoongArch::XVHADDW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4006 { 15744 /* xvhaddw.du.wu */, LoongArch::XVHADDW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4007 { 15758 /* xvhaddw.h.b */, LoongArch::XVHADDW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4008 { 15770 /* xvhaddw.hu.bu */, LoongArch::XVHADDW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4009 { 15784 /* xvhaddw.q.d */, LoongArch::XVHADDW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4010 { 15796 /* xvhaddw.qu.du */, LoongArch::XVHADDW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4011 { 15810 /* xvhaddw.w.h */, LoongArch::XVHADDW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4012 { 15822 /* xvhaddw.wu.hu */, LoongArch::XVHADDW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4013 { 15836 /* xvhseli.d */, LoongArch::XVHSELI_D, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4014 { 15846 /* xvhsubw.d.w */, LoongArch::XVHSUBW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4015 { 15858 /* xvhsubw.du.wu */, LoongArch::XVHSUBW_DU_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4016 { 15872 /* xvhsubw.h.b */, LoongArch::XVHSUBW_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4017 { 15884 /* xvhsubw.hu.bu */, LoongArch::XVHSUBW_HU_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4018 { 15898 /* xvhsubw.q.d */, LoongArch::XVHSUBW_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4019 { 15910 /* xvhsubw.qu.du */, LoongArch::XVHSUBW_QU_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4020 { 15924 /* xvhsubw.w.h */, LoongArch::XVHSUBW_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4021 { 15936 /* xvhsubw.wu.hu */, LoongArch::XVHSUBW_WU_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4022 { 15950 /* xvilvh.b */, LoongArch::XVILVH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4023 { 15959 /* xvilvh.d */, LoongArch::XVILVH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4024 { 15968 /* xvilvh.h */, LoongArch::XVILVH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4025 { 15977 /* xvilvh.w */, LoongArch::XVILVH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4026 { 15986 /* xvilvl.b */, LoongArch::XVILVL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4027 { 15995 /* xvilvl.d */, LoongArch::XVILVL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4028 { 16004 /* xvilvl.h */, LoongArch::XVILVL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4029 { 16013 /* xvilvl.w */, LoongArch::XVILVL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4030 { 16022 /* xvinsgr2vr.d */, LoongArch::XVINSGR2VR_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm2 }, },
4031 { 16035 /* xvinsgr2vr.w */, LoongArch::XVINSGR2VR_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_UImm3 }, },
4032 { 16048 /* xvinsve0.d */, LoongArch::XVINSVE0_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4033 { 16059 /* xvinsve0.w */, LoongArch::XVINSVE0_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4034 { 16070 /* xvld */, LoongArch::XVLD, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, },
4035 { 16075 /* xvldi */, LoongArch::XVLDI, Convert__Reg1_0__SImm131_1, AMFBS_None, { MCK_LASX256, MCK_SImm13 }, },
4036 { 16081 /* xvldrepl.b */, LoongArch::XVLDREPL_B, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, },
4037 { 16092 /* xvldrepl.d */, LoongArch::XVLDREPL_D, Convert__Reg1_0__Reg1_1__SImm9lsl31_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm9lsl3 }, },
4038 { 16103 /* xvldrepl.h */, LoongArch::XVLDREPL_H, Convert__Reg1_0__Reg1_1__SImm11lsl11_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm11lsl1 }, },
4039 { 16114 /* xvldrepl.w */, LoongArch::XVLDREPL_W, Convert__Reg1_0__Reg1_1__SImm10lsl21_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm10lsl2 }, },
4040 { 16125 /* xvldx */, LoongArch::XVLDX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, },
4041 { 16131 /* xvmadd.b */, LoongArch::XVMADD_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4042 { 16140 /* xvmadd.d */, LoongArch::XVMADD_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4043 { 16149 /* xvmadd.h */, LoongArch::XVMADD_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4044 { 16158 /* xvmadd.w */, LoongArch::XVMADD_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4045 { 16167 /* xvmaddwev.d.w */, LoongArch::XVMADDWEV_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4046 { 16181 /* xvmaddwev.d.wu */, LoongArch::XVMADDWEV_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4047 { 16196 /* xvmaddwev.d.wu.w */, LoongArch::XVMADDWEV_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4048 { 16213 /* xvmaddwev.h.b */, LoongArch::XVMADDWEV_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4049 { 16227 /* xvmaddwev.h.bu */, LoongArch::XVMADDWEV_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4050 { 16242 /* xvmaddwev.h.bu.b */, LoongArch::XVMADDWEV_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4051 { 16259 /* xvmaddwev.q.d */, LoongArch::XVMADDWEV_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4052 { 16273 /* xvmaddwev.q.du */, LoongArch::XVMADDWEV_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4053 { 16288 /* xvmaddwev.q.du.d */, LoongArch::XVMADDWEV_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4054 { 16305 /* xvmaddwev.w.h */, LoongArch::XVMADDWEV_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4055 { 16319 /* xvmaddwev.w.hu */, LoongArch::XVMADDWEV_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4056 { 16334 /* xvmaddwev.w.hu.h */, LoongArch::XVMADDWEV_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4057 { 16351 /* xvmaddwod.d.w */, LoongArch::XVMADDWOD_D_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4058 { 16365 /* xvmaddwod.d.wu */, LoongArch::XVMADDWOD_D_WU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4059 { 16380 /* xvmaddwod.d.wu.w */, LoongArch::XVMADDWOD_D_WU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4060 { 16397 /* xvmaddwod.h.b */, LoongArch::XVMADDWOD_H_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4061 { 16411 /* xvmaddwod.h.bu */, LoongArch::XVMADDWOD_H_BU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4062 { 16426 /* xvmaddwod.h.bu.b */, LoongArch::XVMADDWOD_H_BU_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4063 { 16443 /* xvmaddwod.q.d */, LoongArch::XVMADDWOD_Q_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4064 { 16457 /* xvmaddwod.q.du */, LoongArch::XVMADDWOD_Q_DU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4065 { 16472 /* xvmaddwod.q.du.d */, LoongArch::XVMADDWOD_Q_DU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4066 { 16489 /* xvmaddwod.w.h */, LoongArch::XVMADDWOD_W_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4067 { 16503 /* xvmaddwod.w.hu */, LoongArch::XVMADDWOD_W_HU, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4068 { 16518 /* xvmaddwod.w.hu.h */, LoongArch::XVMADDWOD_W_HU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4069 { 16535 /* xvmax.b */, LoongArch::XVMAX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4070 { 16543 /* xvmax.bu */, LoongArch::XVMAX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4071 { 16552 /* xvmax.d */, LoongArch::XVMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4072 { 16560 /* xvmax.du */, LoongArch::XVMAX_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4073 { 16569 /* xvmax.h */, LoongArch::XVMAX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4074 { 16577 /* xvmax.hu */, LoongArch::XVMAX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4075 { 16586 /* xvmax.w */, LoongArch::XVMAX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4076 { 16594 /* xvmax.wu */, LoongArch::XVMAX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4077 { 16603 /* xvmaxi.b */, LoongArch::XVMAXI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4078 { 16612 /* xvmaxi.bu */, LoongArch::XVMAXI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4079 { 16622 /* xvmaxi.d */, LoongArch::XVMAXI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4080 { 16631 /* xvmaxi.du */, LoongArch::XVMAXI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4081 { 16641 /* xvmaxi.h */, LoongArch::XVMAXI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4082 { 16650 /* xvmaxi.hu */, LoongArch::XVMAXI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4083 { 16660 /* xvmaxi.w */, LoongArch::XVMAXI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4084 { 16669 /* xvmaxi.wu */, LoongArch::XVMAXI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4085 { 16679 /* xvmin.b */, LoongArch::XVMIN_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4086 { 16687 /* xvmin.bu */, LoongArch::XVMIN_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4087 { 16696 /* xvmin.d */, LoongArch::XVMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4088 { 16704 /* xvmin.du */, LoongArch::XVMIN_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4089 { 16713 /* xvmin.h */, LoongArch::XVMIN_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4090 { 16721 /* xvmin.hu */, LoongArch::XVMIN_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4091 { 16730 /* xvmin.w */, LoongArch::XVMIN_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4092 { 16738 /* xvmin.wu */, LoongArch::XVMIN_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4093 { 16747 /* xvmini.b */, LoongArch::XVMINI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4094 { 16756 /* xvmini.bu */, LoongArch::XVMINI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4095 { 16766 /* xvmini.d */, LoongArch::XVMINI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4096 { 16775 /* xvmini.du */, LoongArch::XVMINI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4097 { 16785 /* xvmini.h */, LoongArch::XVMINI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4098 { 16794 /* xvmini.hu */, LoongArch::XVMINI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4099 { 16804 /* xvmini.w */, LoongArch::XVMINI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4100 { 16813 /* xvmini.wu */, LoongArch::XVMINI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4101 { 16823 /* xvmod.b */, LoongArch::XVMOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4102 { 16831 /* xvmod.bu */, LoongArch::XVMOD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4103 { 16840 /* xvmod.d */, LoongArch::XVMOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4104 { 16848 /* xvmod.du */, LoongArch::XVMOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4105 { 16857 /* xvmod.h */, LoongArch::XVMOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4106 { 16865 /* xvmod.hu */, LoongArch::XVMOD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4107 { 16874 /* xvmod.w */, LoongArch::XVMOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4108 { 16882 /* xvmod.wu */, LoongArch::XVMOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4109 { 16891 /* xvmskgez.b */, LoongArch::XVMSKGEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4110 { 16902 /* xvmskltz.b */, LoongArch::XVMSKLTZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4111 { 16913 /* xvmskltz.d */, LoongArch::XVMSKLTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4112 { 16924 /* xvmskltz.h */, LoongArch::XVMSKLTZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4113 { 16935 /* xvmskltz.w */, LoongArch::XVMSKLTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4114 { 16946 /* xvmsknz.b */, LoongArch::XVMSKNZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4115 { 16956 /* xvmsub.b */, LoongArch::XVMSUB_B, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4116 { 16965 /* xvmsub.d */, LoongArch::XVMSUB_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4117 { 16974 /* xvmsub.h */, LoongArch::XVMSUB_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4118 { 16983 /* xvmsub.w */, LoongArch::XVMSUB_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4119 { 16992 /* xvmuh.b */, LoongArch::XVMUH_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4120 { 17000 /* xvmuh.bu */, LoongArch::XVMUH_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4121 { 17009 /* xvmuh.d */, LoongArch::XVMUH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4122 { 17017 /* xvmuh.du */, LoongArch::XVMUH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4123 { 17026 /* xvmuh.h */, LoongArch::XVMUH_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4124 { 17034 /* xvmuh.hu */, LoongArch::XVMUH_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4125 { 17043 /* xvmuh.w */, LoongArch::XVMUH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4126 { 17051 /* xvmuh.wu */, LoongArch::XVMUH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4127 { 17060 /* xvmul.b */, LoongArch::XVMUL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4128 { 17068 /* xvmul.d */, LoongArch::XVMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4129 { 17076 /* xvmul.h */, LoongArch::XVMUL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4130 { 17084 /* xvmul.w */, LoongArch::XVMUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4131 { 17092 /* xvmulwev.d.w */, LoongArch::XVMULWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4132 { 17105 /* xvmulwev.d.wu */, LoongArch::XVMULWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4133 { 17119 /* xvmulwev.d.wu.w */, LoongArch::XVMULWEV_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4134 { 17135 /* xvmulwev.h.b */, LoongArch::XVMULWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4135 { 17148 /* xvmulwev.h.bu */, LoongArch::XVMULWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4136 { 17162 /* xvmulwev.h.bu.b */, LoongArch::XVMULWEV_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4137 { 17178 /* xvmulwev.q.d */, LoongArch::XVMULWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4138 { 17191 /* xvmulwev.q.du */, LoongArch::XVMULWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4139 { 17205 /* xvmulwev.q.du.d */, LoongArch::XVMULWEV_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4140 { 17221 /* xvmulwev.w.h */, LoongArch::XVMULWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4141 { 17234 /* xvmulwev.w.hu */, LoongArch::XVMULWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4142 { 17248 /* xvmulwev.w.hu.h */, LoongArch::XVMULWEV_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4143 { 17264 /* xvmulwod.d.w */, LoongArch::XVMULWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4144 { 17277 /* xvmulwod.d.wu */, LoongArch::XVMULWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4145 { 17291 /* xvmulwod.d.wu.w */, LoongArch::XVMULWOD_D_WU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4146 { 17307 /* xvmulwod.h.b */, LoongArch::XVMULWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4147 { 17320 /* xvmulwod.h.bu */, LoongArch::XVMULWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4148 { 17334 /* xvmulwod.h.bu.b */, LoongArch::XVMULWOD_H_BU_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4149 { 17350 /* xvmulwod.q.d */, LoongArch::XVMULWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4150 { 17363 /* xvmulwod.q.du */, LoongArch::XVMULWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4151 { 17377 /* xvmulwod.q.du.d */, LoongArch::XVMULWOD_Q_DU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4152 { 17393 /* xvmulwod.w.h */, LoongArch::XVMULWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4153 { 17406 /* xvmulwod.w.hu */, LoongArch::XVMULWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4154 { 17420 /* xvmulwod.w.hu.h */, LoongArch::XVMULWOD_W_HU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4155 { 17436 /* xvneg.b */, LoongArch::XVNEG_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4156 { 17444 /* xvneg.d */, LoongArch::XVNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4157 { 17452 /* xvneg.h */, LoongArch::XVNEG_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4158 { 17460 /* xvneg.w */, LoongArch::XVNEG_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4159 { 17468 /* xvnor.v */, LoongArch::XVNOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4160 { 17476 /* xvnori.b */, LoongArch::XVNORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4161 { 17485 /* xvor.v */, LoongArch::XVOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4162 { 17492 /* xvori.b */, LoongArch::XVORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4163 { 17500 /* xvorn.v */, LoongArch::XVORN_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4164 { 17508 /* xvpackev.b */, LoongArch::XVPACKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4165 { 17519 /* xvpackev.d */, LoongArch::XVPACKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4166 { 17530 /* xvpackev.h */, LoongArch::XVPACKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4167 { 17541 /* xvpackev.w */, LoongArch::XVPACKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4168 { 17552 /* xvpackod.b */, LoongArch::XVPACKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4169 { 17563 /* xvpackod.d */, LoongArch::XVPACKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4170 { 17574 /* xvpackod.h */, LoongArch::XVPACKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4171 { 17585 /* xvpackod.w */, LoongArch::XVPACKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4172 { 17596 /* xvpcnt.b */, LoongArch::XVPCNT_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4173 { 17605 /* xvpcnt.d */, LoongArch::XVPCNT_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4174 { 17614 /* xvpcnt.h */, LoongArch::XVPCNT_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4175 { 17623 /* xvpcnt.w */, LoongArch::XVPCNT_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4176 { 17632 /* xvperm.w */, LoongArch::XVPERM_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4177 { 17641 /* xvpermi.d */, LoongArch::XVPERMI_D, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4178 { 17651 /* xvpermi.q */, LoongArch::XVPERMI_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4179 { 17661 /* xvpermi.w */, LoongArch::XVPERMI_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4180 { 17671 /* xvpickev.b */, LoongArch::XVPICKEV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4181 { 17682 /* xvpickev.d */, LoongArch::XVPICKEV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4182 { 17693 /* xvpickev.h */, LoongArch::XVPICKEV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4183 { 17704 /* xvpickev.w */, LoongArch::XVPICKEV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4184 { 17715 /* xvpickod.b */, LoongArch::XVPICKOD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4185 { 17726 /* xvpickod.d */, LoongArch::XVPICKOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4186 { 17737 /* xvpickod.h */, LoongArch::XVPICKOD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4187 { 17748 /* xvpickod.w */, LoongArch::XVPICKOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4188 { 17759 /* xvpickve.d */, LoongArch::XVPICKVE_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4189 { 17770 /* xvpickve.w */, LoongArch::XVPICKVE_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4190 { 17781 /* xvpickve2gr.d */, LoongArch::XVPICKVE2GR_D, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, },
4191 { 17795 /* xvpickve2gr.du */, LoongArch::XVPICKVE2GR_DU, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm2 }, },
4192 { 17810 /* xvpickve2gr.w */, LoongArch::XVPICKVE2GR_W, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, },
4193 { 17824 /* xvpickve2gr.wu */, LoongArch::XVPICKVE2GR_WU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_GPR, MCK_LASX256, MCK_UImm3 }, },
4194 { 17839 /* xvrepl128vei.b */, LoongArch::XVREPL128VEI_B, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4195 { 17854 /* xvrepl128vei.d */, LoongArch::XVREPL128VEI_D, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm1 }, },
4196 { 17869 /* xvrepl128vei.h */, LoongArch::XVREPL128VEI_H, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4197 { 17884 /* xvrepl128vei.w */, LoongArch::XVREPL128VEI_W, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm2 }, },
4198 { 17899 /* xvreplgr2vr.b */, LoongArch::XVREPLGR2VR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4199 { 17913 /* xvreplgr2vr.d */, LoongArch::XVREPLGR2VR_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4200 { 17927 /* xvreplgr2vr.h */, LoongArch::XVREPLGR2VR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4201 { 17941 /* xvreplgr2vr.w */, LoongArch::XVREPLGR2VR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_GPR }, },
4202 { 17955 /* xvrepli.b */, LoongArch::PseudoXVREPLI_B, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4203 { 17965 /* xvrepli.d */, LoongArch::PseudoXVREPLI_D, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4204 { 17975 /* xvrepli.h */, LoongArch::PseudoXVREPLI_H, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4205 { 17985 /* xvrepli.w */, LoongArch::PseudoXVREPLI_W, Convert__Reg1_0__SImm101_1, AMFBS_None, { MCK_LASX256, MCK_SImm10 }, },
4206 { 17995 /* xvreplve.b */, LoongArch::XVREPLVE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4207 { 18006 /* xvreplve.d */, LoongArch::XVREPLVE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4208 { 18017 /* xvreplve.h */, LoongArch::XVREPLVE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4209 { 18028 /* xvreplve.w */, LoongArch::XVREPLVE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_GPR }, },
4210 { 18039 /* xvreplve0.b */, LoongArch::XVREPLVE0_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4211 { 18051 /* xvreplve0.d */, LoongArch::XVREPLVE0_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4212 { 18063 /* xvreplve0.h */, LoongArch::XVREPLVE0_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4213 { 18075 /* xvreplve0.q */, LoongArch::XVREPLVE0_Q, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4214 { 18087 /* xvreplve0.w */, LoongArch::XVREPLVE0_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_LASX256, MCK_LASX256 }, },
4215 { 18099 /* xvrotr.b */, LoongArch::XVROTR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4216 { 18108 /* xvrotr.d */, LoongArch::XVROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4217 { 18117 /* xvrotr.h */, LoongArch::XVROTR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4218 { 18126 /* xvrotr.w */, LoongArch::XVROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4219 { 18135 /* xvrotri.b */, LoongArch::XVROTRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4220 { 18145 /* xvrotri.d */, LoongArch::XVROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4221 { 18155 /* xvrotri.h */, LoongArch::XVROTRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4222 { 18165 /* xvrotri.w */, LoongArch::XVROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4223 { 18175 /* xvsadd.b */, LoongArch::XVSADD_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4224 { 18184 /* xvsadd.bu */, LoongArch::XVSADD_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4225 { 18194 /* xvsadd.d */, LoongArch::XVSADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4226 { 18203 /* xvsadd.du */, LoongArch::XVSADD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4227 { 18213 /* xvsadd.h */, LoongArch::XVSADD_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4228 { 18222 /* xvsadd.hu */, LoongArch::XVSADD_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4229 { 18232 /* xvsadd.w */, LoongArch::XVSADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4230 { 18241 /* xvsadd.wu */, LoongArch::XVSADD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4231 { 18251 /* xvsat.b */, LoongArch::XVSAT_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4232 { 18259 /* xvsat.bu */, LoongArch::XVSAT_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4233 { 18268 /* xvsat.d */, LoongArch::XVSAT_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4234 { 18276 /* xvsat.du */, LoongArch::XVSAT_DU, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4235 { 18285 /* xvsat.h */, LoongArch::XVSAT_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4236 { 18293 /* xvsat.hu */, LoongArch::XVSAT_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4237 { 18302 /* xvsat.w */, LoongArch::XVSAT_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4238 { 18310 /* xvsat.wu */, LoongArch::XVSAT_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4239 { 18319 /* xvseq.b */, LoongArch::XVSEQ_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4240 { 18327 /* xvseq.d */, LoongArch::XVSEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4241 { 18335 /* xvseq.h */, LoongArch::XVSEQ_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4242 { 18343 /* xvseq.w */, LoongArch::XVSEQ_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4243 { 18351 /* xvseqi.b */, LoongArch::XVSEQI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4244 { 18360 /* xvseqi.d */, LoongArch::XVSEQI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4245 { 18369 /* xvseqi.h */, LoongArch::XVSEQI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4246 { 18378 /* xvseqi.w */, LoongArch::XVSEQI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4247 { 18387 /* xvsetallnez.b */, LoongArch::XVSETALLNEZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4248 { 18401 /* xvsetallnez.d */, LoongArch::XVSETALLNEZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4249 { 18415 /* xvsetallnez.h */, LoongArch::XVSETALLNEZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4250 { 18429 /* xvsetallnez.w */, LoongArch::XVSETALLNEZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4251 { 18443 /* xvsetanyeqz.b */, LoongArch::XVSETANYEQZ_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4252 { 18457 /* xvsetanyeqz.d */, LoongArch::XVSETANYEQZ_D, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4253 { 18471 /* xvsetanyeqz.h */, LoongArch::XVSETANYEQZ_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4254 { 18485 /* xvsetanyeqz.w */, LoongArch::XVSETANYEQZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4255 { 18499 /* xvseteqz.v */, LoongArch::XVSETEQZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4256 { 18510 /* xvsetnez.v */, LoongArch::XVSETNEZ_V, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_CFR, MCK_LASX256 }, },
4257 { 18521 /* xvshuf.b */, LoongArch::XVSHUF_B, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4258 { 18530 /* xvshuf.d */, LoongArch::XVSHUF_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4259 { 18539 /* xvshuf.h */, LoongArch::XVSHUF_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4260 { 18548 /* xvshuf.w */, LoongArch::XVSHUF_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4261 { 18557 /* xvshuf4i.b */, LoongArch::XVSHUF4I_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4262 { 18568 /* xvshuf4i.d */, LoongArch::XVSHUF4I_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4263 { 18579 /* xvshuf4i.h */, LoongArch::XVSHUF4I_H, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4264 { 18590 /* xvshuf4i.w */, LoongArch::XVSHUF4I_W, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4265 { 18601 /* xvsigncov.b */, LoongArch::XVSIGNCOV_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4266 { 18613 /* xvsigncov.d */, LoongArch::XVSIGNCOV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4267 { 18625 /* xvsigncov.h */, LoongArch::XVSIGNCOV_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4268 { 18637 /* xvsigncov.w */, LoongArch::XVSIGNCOV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4269 { 18649 /* xvsle.b */, LoongArch::XVSLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4270 { 18657 /* xvsle.bu */, LoongArch::XVSLE_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4271 { 18666 /* xvsle.d */, LoongArch::XVSLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4272 { 18674 /* xvsle.du */, LoongArch::XVSLE_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4273 { 18683 /* xvsle.h */, LoongArch::XVSLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4274 { 18691 /* xvsle.hu */, LoongArch::XVSLE_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4275 { 18700 /* xvsle.w */, LoongArch::XVSLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4276 { 18708 /* xvsle.wu */, LoongArch::XVSLE_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4277 { 18717 /* xvslei.b */, LoongArch::XVSLEI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4278 { 18726 /* xvslei.bu */, LoongArch::XVSLEI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4279 { 18736 /* xvslei.d */, LoongArch::XVSLEI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4280 { 18745 /* xvslei.du */, LoongArch::XVSLEI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4281 { 18755 /* xvslei.h */, LoongArch::XVSLEI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4282 { 18764 /* xvslei.hu */, LoongArch::XVSLEI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4283 { 18774 /* xvslei.w */, LoongArch::XVSLEI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4284 { 18783 /* xvslei.wu */, LoongArch::XVSLEI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4285 { 18793 /* xvsll.b */, LoongArch::XVSLL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4286 { 18801 /* xvsll.d */, LoongArch::XVSLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4287 { 18809 /* xvsll.h */, LoongArch::XVSLL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4288 { 18817 /* xvsll.w */, LoongArch::XVSLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4289 { 18825 /* xvslli.b */, LoongArch::XVSLLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4290 { 18834 /* xvslli.d */, LoongArch::XVSLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4291 { 18843 /* xvslli.h */, LoongArch::XVSLLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4292 { 18852 /* xvslli.w */, LoongArch::XVSLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4293 { 18861 /* xvsllwil.d.w */, LoongArch::XVSLLWIL_D_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4294 { 18874 /* xvsllwil.du.wu */, LoongArch::XVSLLWIL_DU_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4295 { 18889 /* xvsllwil.h.b */, LoongArch::XVSLLWIL_H_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4296 { 18902 /* xvsllwil.hu.bu */, LoongArch::XVSLLWIL_HU_BU, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4297 { 18917 /* xvsllwil.w.h */, LoongArch::XVSLLWIL_W_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4298 { 18930 /* xvsllwil.wu.hu */, LoongArch::XVSLLWIL_WU_HU, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4299 { 18945 /* xvslt.b */, LoongArch::XVSLT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4300 { 18953 /* xvslt.bu */, LoongArch::XVSLT_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4301 { 18962 /* xvslt.d */, LoongArch::XVSLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4302 { 18970 /* xvslt.du */, LoongArch::XVSLT_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4303 { 18979 /* xvslt.h */, LoongArch::XVSLT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4304 { 18987 /* xvslt.hu */, LoongArch::XVSLT_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4305 { 18996 /* xvslt.w */, LoongArch::XVSLT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4306 { 19004 /* xvslt.wu */, LoongArch::XVSLT_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4307 { 19013 /* xvslti.b */, LoongArch::XVSLTI_B, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4308 { 19022 /* xvslti.bu */, LoongArch::XVSLTI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4309 { 19032 /* xvslti.d */, LoongArch::XVSLTI_D, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4310 { 19041 /* xvslti.du */, LoongArch::XVSLTI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4311 { 19051 /* xvslti.h */, LoongArch::XVSLTI_H, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4312 { 19060 /* xvslti.hu */, LoongArch::XVSLTI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4313 { 19070 /* xvslti.w */, LoongArch::XVSLTI_W, Convert__Reg1_0__Reg1_1__SImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_SImm5 }, },
4314 { 19079 /* xvslti.wu */, LoongArch::XVSLTI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4315 { 19089 /* xvsra.b */, LoongArch::XVSRA_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4316 { 19097 /* xvsra.d */, LoongArch::XVSRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4317 { 19105 /* xvsra.h */, LoongArch::XVSRA_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4318 { 19113 /* xvsra.w */, LoongArch::XVSRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4319 { 19121 /* xvsrai.b */, LoongArch::XVSRAI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4320 { 19130 /* xvsrai.d */, LoongArch::XVSRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4321 { 19139 /* xvsrai.h */, LoongArch::XVSRAI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4322 { 19148 /* xvsrai.w */, LoongArch::XVSRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4323 { 19157 /* xvsran.b.h */, LoongArch::XVSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4324 { 19168 /* xvsran.h.w */, LoongArch::XVSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4325 { 19179 /* xvsran.w.d */, LoongArch::XVSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4326 { 19190 /* xvsrani.b.h */, LoongArch::XVSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4327 { 19202 /* xvsrani.d.q */, LoongArch::XVSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4328 { 19214 /* xvsrani.h.w */, LoongArch::XVSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4329 { 19226 /* xvsrani.w.d */, LoongArch::XVSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4330 { 19238 /* xvsrar.b */, LoongArch::XVSRAR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4331 { 19247 /* xvsrar.d */, LoongArch::XVSRAR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4332 { 19256 /* xvsrar.h */, LoongArch::XVSRAR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4333 { 19265 /* xvsrar.w */, LoongArch::XVSRAR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4334 { 19274 /* xvsrari.b */, LoongArch::XVSRARI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4335 { 19284 /* xvsrari.d */, LoongArch::XVSRARI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4336 { 19294 /* xvsrari.h */, LoongArch::XVSRARI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4337 { 19304 /* xvsrari.w */, LoongArch::XVSRARI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4338 { 19314 /* xvsrarn.b.h */, LoongArch::XVSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4339 { 19326 /* xvsrarn.h.w */, LoongArch::XVSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4340 { 19338 /* xvsrarn.w.d */, LoongArch::XVSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4341 { 19350 /* xvsrarni.b.h */, LoongArch::XVSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4342 { 19363 /* xvsrarni.d.q */, LoongArch::XVSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4343 { 19376 /* xvsrarni.h.w */, LoongArch::XVSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4344 { 19389 /* xvsrarni.w.d */, LoongArch::XVSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4345 { 19402 /* xvsrl.b */, LoongArch::XVSRL_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4346 { 19410 /* xvsrl.d */, LoongArch::XVSRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4347 { 19418 /* xvsrl.h */, LoongArch::XVSRL_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4348 { 19426 /* xvsrl.w */, LoongArch::XVSRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4349 { 19434 /* xvsrli.b */, LoongArch::XVSRLI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4350 { 19443 /* xvsrli.d */, LoongArch::XVSRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4351 { 19452 /* xvsrli.h */, LoongArch::XVSRLI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4352 { 19461 /* xvsrli.w */, LoongArch::XVSRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4353 { 19470 /* xvsrln.b.h */, LoongArch::XVSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4354 { 19481 /* xvsrln.h.w */, LoongArch::XVSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4355 { 19492 /* xvsrln.w.d */, LoongArch::XVSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4356 { 19503 /* xvsrlni.b.h */, LoongArch::XVSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4357 { 19515 /* xvsrlni.d.q */, LoongArch::XVSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4358 { 19527 /* xvsrlni.h.w */, LoongArch::XVSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4359 { 19539 /* xvsrlni.w.d */, LoongArch::XVSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4360 { 19551 /* xvsrlr.b */, LoongArch::XVSRLR_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4361 { 19560 /* xvsrlr.d */, LoongArch::XVSRLR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4362 { 19569 /* xvsrlr.h */, LoongArch::XVSRLR_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4363 { 19578 /* xvsrlr.w */, LoongArch::XVSRLR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4364 { 19587 /* xvsrlri.b */, LoongArch::XVSRLRI_B, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm3 }, },
4365 { 19597 /* xvsrlri.d */, LoongArch::XVSRLRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4366 { 19607 /* xvsrlri.h */, LoongArch::XVSRLRI_H, Convert__Reg1_0__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4367 { 19617 /* xvsrlri.w */, LoongArch::XVSRLRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4368 { 19627 /* xvsrlrn.b.h */, LoongArch::XVSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4369 { 19639 /* xvsrlrn.h.w */, LoongArch::XVSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4370 { 19651 /* xvsrlrn.w.d */, LoongArch::XVSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4371 { 19663 /* xvsrlrni.b.h */, LoongArch::XVSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4372 { 19676 /* xvsrlrni.d.q */, LoongArch::XVSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4373 { 19689 /* xvsrlrni.h.w */, LoongArch::XVSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4374 { 19702 /* xvsrlrni.w.d */, LoongArch::XVSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4375 { 19715 /* xvssran.b.h */, LoongArch::XVSSRAN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4376 { 19727 /* xvssran.bu.h */, LoongArch::XVSSRAN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4377 { 19740 /* xvssran.h.w */, LoongArch::XVSSRAN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4378 { 19752 /* xvssran.hu.w */, LoongArch::XVSSRAN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4379 { 19765 /* xvssran.w.d */, LoongArch::XVSSRAN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4380 { 19777 /* xvssran.wu.d */, LoongArch::XVSSRAN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4381 { 19790 /* xvssrani.b.h */, LoongArch::XVSSRANI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4382 { 19803 /* xvssrani.bu.h */, LoongArch::XVSSRANI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4383 { 19817 /* xvssrani.d.q */, LoongArch::XVSSRANI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4384 { 19830 /* xvssrani.du.q */, LoongArch::XVSSRANI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4385 { 19844 /* xvssrani.h.w */, LoongArch::XVSSRANI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4386 { 19857 /* xvssrani.hu.w */, LoongArch::XVSSRANI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4387 { 19871 /* xvssrani.w.d */, LoongArch::XVSSRANI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4388 { 19884 /* xvssrani.wu.d */, LoongArch::XVSSRANI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4389 { 19898 /* xvssrarn.b.h */, LoongArch::XVSSRARN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4390 { 19911 /* xvssrarn.bu.h */, LoongArch::XVSSRARN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4391 { 19925 /* xvssrarn.h.w */, LoongArch::XVSSRARN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4392 { 19938 /* xvssrarn.hu.w */, LoongArch::XVSSRARN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4393 { 19952 /* xvssrarn.w.d */, LoongArch::XVSSRARN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4394 { 19965 /* xvssrarn.wu.d */, LoongArch::XVSSRARN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4395 { 19979 /* xvssrarni.b.h */, LoongArch::XVSSRARNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4396 { 19993 /* xvssrarni.bu.h */, LoongArch::XVSSRARNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4397 { 20008 /* xvssrarni.d.q */, LoongArch::XVSSRARNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4398 { 20022 /* xvssrarni.du.q */, LoongArch::XVSSRARNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4399 { 20037 /* xvssrarni.h.w */, LoongArch::XVSSRARNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4400 { 20051 /* xvssrarni.hu.w */, LoongArch::XVSSRARNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4401 { 20066 /* xvssrarni.w.d */, LoongArch::XVSSRARNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4402 { 20080 /* xvssrarni.wu.d */, LoongArch::XVSSRARNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4403 { 20095 /* xvssrln.b.h */, LoongArch::XVSSRLN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4404 { 20107 /* xvssrln.bu.h */, LoongArch::XVSSRLN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4405 { 20120 /* xvssrln.h.w */, LoongArch::XVSSRLN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4406 { 20132 /* xvssrln.hu.w */, LoongArch::XVSSRLN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4407 { 20145 /* xvssrln.w.d */, LoongArch::XVSSRLN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4408 { 20157 /* xvssrln.wu.d */, LoongArch::XVSSRLN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4409 { 20170 /* xvssrlni.b.h */, LoongArch::XVSSRLNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4410 { 20183 /* xvssrlni.bu.h */, LoongArch::XVSSRLNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4411 { 20197 /* xvssrlni.d.q */, LoongArch::XVSSRLNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4412 { 20210 /* xvssrlni.du.q */, LoongArch::XVSSRLNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4413 { 20224 /* xvssrlni.h.w */, LoongArch::XVSSRLNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4414 { 20237 /* xvssrlni.hu.w */, LoongArch::XVSSRLNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4415 { 20251 /* xvssrlni.w.d */, LoongArch::XVSSRLNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4416 { 20264 /* xvssrlni.wu.d */, LoongArch::XVSSRLNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4417 { 20278 /* xvssrlrn.b.h */, LoongArch::XVSSRLRN_B_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4418 { 20291 /* xvssrlrn.bu.h */, LoongArch::XVSSRLRN_BU_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4419 { 20305 /* xvssrlrn.h.w */, LoongArch::XVSSRLRN_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4420 { 20318 /* xvssrlrn.hu.w */, LoongArch::XVSSRLRN_HU_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4421 { 20332 /* xvssrlrn.w.d */, LoongArch::XVSSRLRN_W_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4422 { 20345 /* xvssrlrn.wu.d */, LoongArch::XVSSRLRN_WU_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4423 { 20359 /* xvssrlrni.b.h */, LoongArch::XVSSRLRNI_B_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4424 { 20373 /* xvssrlrni.bu.h */, LoongArch::XVSSRLRNI_BU_H, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm41_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm4 }, },
4425 { 20388 /* xvssrlrni.d.q */, LoongArch::XVSSRLRNI_D_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4426 { 20402 /* xvssrlrni.du.q */, LoongArch::XVSSRLRNI_DU_Q, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm7 }, },
4427 { 20417 /* xvssrlrni.h.w */, LoongArch::XVSSRLRNI_H_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4428 { 20431 /* xvssrlrni.hu.w */, LoongArch::XVSSRLRNI_HU_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4429 { 20446 /* xvssrlrni.w.d */, LoongArch::XVSSRLRNI_W_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4430 { 20460 /* xvssrlrni.wu.d */, LoongArch::XVSSRLRNI_WU_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm6 }, },
4431 { 20475 /* xvssub.b */, LoongArch::XVSSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4432 { 20484 /* xvssub.bu */, LoongArch::XVSSUB_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4433 { 20494 /* xvssub.d */, LoongArch::XVSSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4434 { 20503 /* xvssub.du */, LoongArch::XVSSUB_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4435 { 20513 /* xvssub.h */, LoongArch::XVSSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4436 { 20522 /* xvssub.hu */, LoongArch::XVSSUB_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4437 { 20532 /* xvssub.w */, LoongArch::XVSSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4438 { 20541 /* xvssub.wu */, LoongArch::XVSSUB_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4439 { 20551 /* xvst */, LoongArch::XVST, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm12 }, },
4440 { 20556 /* xvstelm.b */, LoongArch::XVSTELM_B, Convert__Reg1_0__Reg1_1__SImm81_2__UImm51_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8, MCK_UImm5 }, },
4441 { 20566 /* xvstelm.d */, LoongArch::XVSTELM_D, Convert__Reg1_0__Reg1_1__SImm8lsl31_2__UImm21_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl3, MCK_UImm2 }, },
4442 { 20576 /* xvstelm.h */, LoongArch::XVSTELM_H, Convert__Reg1_0__Reg1_1__SImm8lsl11_2__UImm41_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl1, MCK_UImm4 }, },
4443 { 20586 /* xvstelm.w */, LoongArch::XVSTELM_W, Convert__Reg1_0__Reg1_1__SImm8lsl21_2__UImm31_3, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_SImm8lsl2, MCK_UImm3 }, },
4444 { 20596 /* xvstx */, LoongArch::XVSTX, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_GPR, MCK_GPR }, },
4445 { 20602 /* xvsub.b */, LoongArch::XVSUB_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4446 { 20610 /* xvsub.d */, LoongArch::XVSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4447 { 20618 /* xvsub.h */, LoongArch::XVSUB_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4448 { 20626 /* xvsub.q */, LoongArch::XVSUB_Q, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4449 { 20634 /* xvsub.w */, LoongArch::XVSUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4450 { 20642 /* xvsubi.bu */, LoongArch::XVSUBI_BU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4451 { 20652 /* xvsubi.du */, LoongArch::XVSUBI_DU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4452 { 20662 /* xvsubi.hu */, LoongArch::XVSUBI_HU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4453 { 20672 /* xvsubi.wu */, LoongArch::XVSUBI_WU, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm5 }, },
4454 { 20682 /* xvsubwev.d.w */, LoongArch::XVSUBWEV_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4455 { 20695 /* xvsubwev.d.wu */, LoongArch::XVSUBWEV_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4456 { 20709 /* xvsubwev.h.b */, LoongArch::XVSUBWEV_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4457 { 20722 /* xvsubwev.h.bu */, LoongArch::XVSUBWEV_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4458 { 20736 /* xvsubwev.q.d */, LoongArch::XVSUBWEV_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4459 { 20749 /* xvsubwev.q.du */, LoongArch::XVSUBWEV_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4460 { 20763 /* xvsubwev.w.h */, LoongArch::XVSUBWEV_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4461 { 20776 /* xvsubwev.w.hu */, LoongArch::XVSUBWEV_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4462 { 20790 /* xvsubwod.d.w */, LoongArch::XVSUBWOD_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4463 { 20803 /* xvsubwod.d.wu */, LoongArch::XVSUBWOD_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4464 { 20817 /* xvsubwod.h.b */, LoongArch::XVSUBWOD_H_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4465 { 20830 /* xvsubwod.h.bu */, LoongArch::XVSUBWOD_H_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4466 { 20844 /* xvsubwod.q.d */, LoongArch::XVSUBWOD_Q_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4467 { 20857 /* xvsubwod.q.du */, LoongArch::XVSUBWOD_Q_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4468 { 20871 /* xvsubwod.w.h */, LoongArch::XVSUBWOD_W_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4469 { 20884 /* xvsubwod.w.hu */, LoongArch::XVSUBWOD_W_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4470 { 20898 /* xvxor.v */, LoongArch::XVXOR_V, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_LASX256 }, },
4471 { 20906 /* xvxori.b */, LoongArch::XVXORI_B, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_LASX256, MCK_LASX256, MCK_UImm8 }, },
4472};
4473
4474#include "llvm/Support/Debug.h"
4475#include "llvm/Support/Format.h"
4476
4477unsigned LoongArchAsmParser::
4478MatchInstructionImpl(const OperandVector &Operands,
4479 MCInst &Inst,
4480 uint64_t &ErrorInfo,
4481 FeatureBitset &MissingFeatures,
4482 bool matchingInlineAsm, unsigned VariantID) {
4483 // Eliminate obvious mismatches.
4484 if (Operands.size() > 5) {
4485 ErrorInfo = 5;
4486 return Match_InvalidOperand;
4487 }
4488
4489 // Get the current feature set.
4490 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
4491
4492 // Get the instruction mnemonic, which is the first token.
4493 StringRef Mnemonic = ((LoongArchOperand &)*Operands[0]).getToken();
4494
4495 // Some state to try to produce better error messages.
4496 bool HadMatchOtherThanFeatures = false;
4497 bool HadMatchOtherThanPredicate = false;
4498 unsigned RetCode = Match_InvalidOperand;
4499 MissingFeatures.set();
4500 // Set ErrorInfo to the operand that mismatches if it is
4501 // wrong for all instances of the instruction.
4502 ErrorInfo = ~0ULL;
4503 // Find the appropriate table for this asm variant.
4504 const MatchEntry *Start, *End;
4505 switch (VariantID) {
4506 default: llvm_unreachable("invalid variant!");
4507 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4508 }
4509 // Search the table.
4510 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4511
4512 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
4513 std::distance(MnemonicRange.first, MnemonicRange.second) <<
4514 " encodings with mnemonic '" << Mnemonic << "'\n");
4515
4516 // Return a more specific error code if no mnemonics match.
4517 if (MnemonicRange.first == MnemonicRange.second)
4518 return Match_MnemonicFail;
4519
4520 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4521 it != ie; ++it) {
4522 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
4523 bool HasRequiredFeatures =
4524 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
4525 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
4526 << MII.getName(it->Opcode) << "\n");
4527 // equal_range guarantees that instruction mnemonic matches.
4528 assert(Mnemonic == it->getMnemonic());
4529 bool OperandsValid = true;
4530 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 4; ++FormalIdx) {
4531 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
4532 DEBUG_WITH_TYPE("asm-matcher",
4533 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
4534 << " against actual operand at index " << ActualIdx);
4535 if (ActualIdx < Operands.size())
4536 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
4537 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
4538 else
4539 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
4540 if (ActualIdx >= Operands.size()) {
4541 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n");
4542 if (Formal == InvalidMatchClass) {
4543 break;
4544 }
4545 if (isSubclass(Formal, OptionalMatchClass)) {
4546 continue;
4547 }
4548 OperandsValid = false;
4549 ErrorInfo = ActualIdx;
4550 break;
4551 }
4552 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
4553 unsigned Diag = validateOperandClass(Actual, Formal);
4554 if (Diag == Match_Success) {
4555 DEBUG_WITH_TYPE("asm-matcher",
4556 dbgs() << "match success using generic matcher\n");
4557 ++ActualIdx;
4558 continue;
4559 }
4560 // If the generic handler indicates an invalid operand
4561 // failure, check for a special case.
4562 if (Diag != Match_Success) {
4563 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
4564 if (TargetDiag == Match_Success) {
4565 DEBUG_WITH_TYPE("asm-matcher",
4566 dbgs() << "match success using target matcher\n");
4567 ++ActualIdx;
4568 continue;
4569 }
4570 // If the target matcher returned a specific error code use
4571 // that, else use the one from the generic matcher.
4572 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
4573 Diag = TargetDiag;
4574 }
4575 // If current formal operand wasn't matched and it is optional
4576 // then try to match next formal operand
4577 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
4578 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
4579 continue;
4580 }
4581 // If this operand is broken for all of the instances of this
4582 // mnemonic, keep track of it so we can report loc info.
4583 // If we already had a match that only failed due to a
4584 // target predicate, that diagnostic is preferred.
4585 if (!HadMatchOtherThanPredicate &&
4586 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
4587 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
4588 RetCode = Diag;
4589 ErrorInfo = ActualIdx;
4590 }
4591 // Otherwise, just reject this instance of the mnemonic.
4592 OperandsValid = false;
4593 break;
4594 }
4595
4596 if (!OperandsValid) {
4597 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
4598 "operand mismatches, ignoring "
4599 "this opcode\n");
4600 continue;
4601 }
4602 if (!HasRequiredFeatures) {
4603 HadMatchOtherThanFeatures = true;
4604 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
4605 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
4606 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
4607 if (NewMissingFeatures[I])
4608 dbgs() << ' ' << I;
4609 dbgs() << "\n");
4610 if (NewMissingFeatures.count() <=
4611 MissingFeatures.count())
4612 MissingFeatures = NewMissingFeatures;
4613 continue;
4614 }
4615
4616 Inst.clear();
4617
4618 Inst.setOpcode(it->Opcode);
4619 // We have a potential match but have not rendered the operands.
4620 // Check the target predicate to handle any context sensitive
4621 // constraints.
4622 // For example, Ties that are referenced multiple times must be
4623 // checked here to ensure the input is the same for each match
4624 // constraints. If we leave it any later the ties will have been
4625 // canonicalized
4626 unsigned MatchResult;
4627 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
4628 Inst.clear();
4629 DEBUG_WITH_TYPE(
4630 "asm-matcher",
4631 dbgs() << "Early target match predicate failed with diag code "
4632 << MatchResult << "\n");
4633 RetCode = MatchResult;
4634 HadMatchOtherThanPredicate = true;
4635 continue;
4636 }
4637
4638 if (matchingInlineAsm) {
4639 convertToMapAndConstraints(it->ConvertFn, Operands);
4640 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
4641 ErrorInfo))
4642 return Match_InvalidTiedOperand;
4643
4644 return Match_Success;
4645 }
4646
4647 // We have selected a definite instruction, convert the parsed
4648 // operands into the appropriate MCInst.
4649 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
4650
4651 // We have a potential match. Check the target predicate to
4652 // handle any context sensitive constraints.
4653 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
4654 DEBUG_WITH_TYPE("asm-matcher",
4655 dbgs() << "Target match predicate failed with diag code "
4656 << MatchResult << "\n");
4657 Inst.clear();
4658 RetCode = MatchResult;
4659 HadMatchOtherThanPredicate = true;
4660 continue;
4661 }
4662
4663 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
4664 ErrorInfo))
4665 return Match_InvalidTiedOperand;
4666
4667 DEBUG_WITH_TYPE(
4668 "asm-matcher",
4669 dbgs() << "Opcode result: complete match, selecting this opcode\n");
4670 return Match_Success;
4671 }
4672
4673 // Okay, we had no match. Try to return a useful error code.
4674 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
4675 return RetCode;
4676
4677 ErrorInfo = 0;
4678 return Match_MissingFeature;
4679}
4680
4681namespace {
4682 struct OperandMatchEntry {
4683 uint16_t Mnemonic;
4684 uint8_t OperandMask;
4685 uint8_t Class;
4686 uint8_t RequiredFeaturesIdx;
4687
4688 StringRef getMnemonic() const {
4689 return StringRef(MnemonicTable + Mnemonic + 1,
4690 MnemonicTable[Mnemonic]);
4691 }
4692 };
4693
4694 // Predicate for searching for an opcode.
4695 struct LessOpcodeOperand {
4696 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
4697 return LHS.getMnemonic() < RHS;
4698 }
4699 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
4700 return LHS < RHS.getMnemonic();
4701 }
4702 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
4703 return LHS.getMnemonic() < RHS.getMnemonic();
4704 }
4705 };
4706} // end anonymous namespace
4707
4708static const OperandMatchEntry OperandMatchTable[88] = {
4709 /* Operand List Mnemonic, Mask, Operand Class, Features */
4710 { 24 /* add.d */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA64 },
4711 { 30 /* add.w */, 8 /* 3 */, MCK_TPRelAddSymbol, AMFBS_IsLA32 },
4712 { 102 /* amadd.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4713 { 110 /* amadd.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4714 { 118 /* amadd.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4715 { 126 /* amadd.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4716 { 134 /* amadd_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4717 { 145 /* amadd_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4718 { 156 /* amadd_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4719 { 167 /* amadd_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4720 { 178 /* amand.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4721 { 186 /* amand.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4722 { 194 /* amand_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4723 { 205 /* amand_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4724 { 216 /* amcas.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4725 { 224 /* amcas.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4726 { 232 /* amcas.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4727 { 240 /* amcas.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4728 { 248 /* amcas_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4729 { 259 /* amcas_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4730 { 270 /* amcas_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4731 { 281 /* amcas_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4732 { 292 /* ammax.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4733 { 300 /* ammax.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4734 { 309 /* ammax.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4735 { 317 /* ammax.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4736 { 326 /* ammax_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4737 { 337 /* ammax_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4738 { 349 /* ammax_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4739 { 360 /* ammax_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4740 { 372 /* ammin.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4741 { 380 /* ammin.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4742 { 389 /* ammin.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4743 { 397 /* ammin.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4744 { 406 /* ammin_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4745 { 417 /* ammin_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4746 { 429 /* ammin_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4747 { 440 /* ammin_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4748 { 452 /* amor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4749 { 459 /* amor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4750 { 466 /* amor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4751 { 476 /* amor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4752 { 486 /* amswap.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4753 { 495 /* amswap.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4754 { 504 /* amswap.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4755 { 513 /* amswap.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4756 { 522 /* amswap_db.b */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4757 { 534 /* amswap_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4758 { 546 /* amswap_db.h */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4759 { 558 /* amswap_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4760 { 570 /* amxor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4761 { 578 /* amxor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4762 { 586 /* amxor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4763 { 597 /* amxor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 },
4764 { 844 /* b */, 1 /* 0 */, MCK_SImm26OperandB, AMFBS_None },
4765 { 933 /* bl */, 1 /* 0 */, MCK_SImm26OperandBL, AMFBS_None },
4766 { 1049 /* call36 */, 1 /* 0 */, MCK_BareSymbol, AMFBS_IsLA64 },
4767 { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4768 { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4769 { 2786 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4770 { 2789 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4771 { 2789 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4772 { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4773 { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4774 { 2796 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4775 { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel },
4776 { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs },
4777 { 2796 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None },
4778 { 2806 /* la.got */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4779 { 2806 /* la.got */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4780 { 2813 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs },
4781 { 2813 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4782 { 2813 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs },
4783 { 2813 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None },
4784 { 2822 /* la.pcrel */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4785 { 2822 /* la.pcrel */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4786 { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA32_HasLaGlobalWithAbs },
4787 { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA64_HasLaGlobalWithAbs },
4788 { 2831 /* la.tls.desc */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4789 { 2831 /* la.tls.desc */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4790 { 2843 /* la.tls.gd */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4791 { 2843 /* la.tls.gd */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4792 { 2853 /* la.tls.ie */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4793 { 2853 /* la.tls.ie */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4794 { 2863 /* la.tls.ld */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4795 { 2863 /* la.tls.ld */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 },
4796 { 2873 /* la.tls.le */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None },
4797 { 4002 /* tail36 */, 2 /* 1 */, MCK_BareSymbol, AMFBS_IsLA64 },
4798};
4799
4800ParseStatus LoongArchAsmParser::
4801tryCustomParseOperand(OperandVector &Operands,
4802 unsigned MCK) {
4803
4804 switch(MCK) {
4805 case MCK_AtomicMemAsmOperand:
4806 return parseAtomicMemOp(Operands);
4807 case MCK_BareSymbol:
4808 return parseImmediate(Operands);
4809 case MCK_SImm26OperandB:
4810 return parseImmediate(Operands);
4811 case MCK_SImm26OperandBL:
4812 return parseSImm26Operand(Operands);
4813 case MCK_TPRelAddSymbol:
4814 return parseOperandWithModifier(Operands);
4815 default:
4816 return ParseStatus::NoMatch;
4817 }
4818 return ParseStatus::NoMatch;
4819}
4820
4821ParseStatus LoongArchAsmParser::
4822MatchOperandParserImpl(OperandVector &Operands,
4823 StringRef Mnemonic,
4824 bool ParseForAllFeatures) {
4825 // Get the current feature set.
4826 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
4827
4828 // Get the next operand index.
4829 unsigned NextOpNum = Operands.size() - 1;
4830 // Search the table.
4831 auto MnemonicRange =
4832 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
4833 Mnemonic, LessOpcodeOperand());
4834
4835 if (MnemonicRange.first == MnemonicRange.second)
4836 return ParseStatus::NoMatch;
4837
4838 for (const OperandMatchEntry *it = MnemonicRange.first,
4839 *ie = MnemonicRange.second; it != ie; ++it) {
4840 // equal_range guarantees that instruction mnemonic matches.
4841 assert(Mnemonic == it->getMnemonic());
4842
4843 // check if the available features match
4844 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
4845 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures)
4846 continue;
4847
4848 // check if the operand in question has a custom parser.
4849 if (!(it->OperandMask & (1 << NextOpNum)))
4850 continue;
4851
4852 // call custom parse method to handle the operand
4853 ParseStatus Result = tryCustomParseOperand(Operands, it->Class);
4854 if (!Result.isNoMatch())
4855 return Result;
4856 }
4857
4858 // Okay, we had no match.
4859 return ParseStatus::NoMatch;
4860}
4861
4862#endif // GET_MATCHER_IMPLEMENTATION
4863
4864
4865#ifdef GET_MNEMONIC_SPELL_CHECKER
4866#undef GET_MNEMONIC_SPELL_CHECKER
4867
4868static std::string LoongArchMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
4869 const unsigned MaxEditDist = 2;
4870 std::vector<StringRef> Candidates;
4871 StringRef Prev = "";
4872
4873 // Find the appropriate table for this asm variant.
4874 const MatchEntry *Start, *End;
4875 switch (VariantID) {
4876 default: llvm_unreachable("invalid variant!");
4877 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4878 }
4879
4880 for (auto I = Start; I < End; I++) {
4881 // Ignore unsupported instructions.
4882 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
4883 if ((FBS & RequiredFeatures) != RequiredFeatures)
4884 continue;
4885
4886 StringRef T = I->getMnemonic();
4887 // Avoid recomputing the edit distance for the same string.
4888 if (T == Prev)
4889 continue;
4890
4891 Prev = T;
4892 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
4893 if (Dist <= MaxEditDist)
4894 Candidates.push_back(T);
4895 }
4896
4897 if (Candidates.empty())
4898 return "";
4899
4900 std::string Res = ", did you mean: ";
4901 unsigned i = 0;
4902 for (; i < Candidates.size() - 1; i++)
4903 Res += Candidates[i].str() + ", ";
4904 return Res + Candidates[i].str() + "?";
4905}
4906
4907#endif // GET_MNEMONIC_SPELL_CHECKER
4908
4909
4910#ifdef GET_MNEMONIC_CHECKER
4911#undef GET_MNEMONIC_CHECKER
4912
4913static bool LoongArchCheckMnemonic(StringRef Mnemonic,
4914 const FeatureBitset &AvailableFeatures,
4915 unsigned VariantID) {
4916 // Find the appropriate table for this asm variant.
4917 const MatchEntry *Start, *End;
4918 switch (VariantID) {
4919 default: llvm_unreachable("invalid variant!");
4920 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4921 }
4922
4923 // Search the table.
4924 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4925
4926 if (MnemonicRange.first == MnemonicRange.second)
4927 return false;
4928
4929 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4930 it != ie; ++it) {
4931 const FeatureBitset &RequiredFeatures =
4932 FeatureBitsets[it->RequiredFeaturesIdx];
4933 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
4934 return true;
4935 }
4936 return false;
4937}
4938
4939#endif // GET_MNEMONIC_CHECKER
4940
4941