1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: Sparc.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10
11#ifdef GET_ASSEMBLER_HEADER
12#undef GET_ASSEMBLER_HEADER
13 // This should be included into the middle of the declaration of
14 // your subclasses implementation of MCTargetAsmParser.
15 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
16 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
17 const OperandVector &Operands);
18 void convertToMapAndConstraints(unsigned Kind,
19 const OperandVector &Operands) override;
20 unsigned MatchInstructionImpl(const OperandVector &Operands,
21 MCInst &Inst,
22 uint64_t &ErrorInfo,
23 FeatureBitset &MissingFeatures,
24 bool matchingInlineAsm,
25 unsigned VariantID = 0);
26 unsigned MatchInstructionImpl(const OperandVector &Operands,
27 MCInst &Inst,
28 uint64_t &ErrorInfo,
29 bool matchingInlineAsm,
30 unsigned VariantID = 0) {
31 FeatureBitset MissingFeatures;
32 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
33 matchingInlineAsm, VariantID);
34 }
35
36 ParseStatus MatchOperandParserImpl(
37 OperandVector &Operands,
38 StringRef Mnemonic,
39 bool ParseForAllFeatures = false);
40 ParseStatus tryCustomParseOperand(
41 OperandVector &Operands,
42 unsigned MCK);
43
44#endif // GET_ASSEMBLER_HEADER
45
46
47#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
48#undef GET_OPERAND_DIAGNOSTIC_TYPES
49
50#endif // GET_OPERAND_DIAGNOSTIC_TYPES
51
52
53#ifdef GET_REGISTER_MATCHER
54#undef GET_REGISTER_MATCHER
55
56// Bits for subtarget features that participate in instruction matching.
57enum SubtargetFeatureBits : uint8_t {
58 Feature_UseSoftMulDivBit = 6,
59 Feature_HasV9Bit = 2,
60 Feature_HasVISBit = 3,
61 Feature_HasVIS2Bit = 4,
62 Feature_HasVIS3Bit = 5,
63 Feature_HasCASABit = 0,
64 Feature_HasPWRPSRBit = 1,
65};
66
67static MCRegister MatchRegisterName(StringRef Name) {
68 switch (Name.size()) {
69 default: break;
70 case 1: // 1 string to match.
71 if (Name[0] != 'y')
72 break;
73 return SP::Y; // "y"
74 case 2: // 86 strings to match.
75 switch (Name[0]) {
76 default: break;
77 case 'c': // 16 strings to match.
78 switch (Name[1]) {
79 default: break;
80 case '0': // 2 strings to match.
81 return SP::C0; // "c0"
82 case '1': // 1 string to match.
83 return SP::C1; // "c1"
84 case '2': // 2 strings to match.
85 return SP::C2; // "c2"
86 case '3': // 1 string to match.
87 return SP::C3; // "c3"
88 case '4': // 2 strings to match.
89 return SP::C4; // "c4"
90 case '5': // 1 string to match.
91 return SP::C5; // "c5"
92 case '6': // 2 strings to match.
93 return SP::C6; // "c6"
94 case '7': // 1 string to match.
95 return SP::C7; // "c7"
96 case '8': // 2 strings to match.
97 return SP::C8; // "c8"
98 case '9': // 1 string to match.
99 return SP::C9; // "c9"
100 case 'q': // 1 string to match.
101 return SP::CPQ; // "cq"
102 }
103 break;
104 case 'f': // 20 strings to match.
105 switch (Name[1]) {
106 default: break;
107 case '0': // 3 strings to match.
108 return SP::D0; // "f0"
109 case '1': // 1 string to match.
110 return SP::F1; // "f1"
111 case '2': // 2 strings to match.
112 return SP::D1; // "f2"
113 case '3': // 1 string to match.
114 return SP::F3; // "f3"
115 case '4': // 3 strings to match.
116 return SP::D2; // "f4"
117 case '5': // 1 string to match.
118 return SP::F5; // "f5"
119 case '6': // 2 strings to match.
120 return SP::D3; // "f6"
121 case '7': // 1 string to match.
122 return SP::F7; // "f7"
123 case '8': // 3 strings to match.
124 return SP::D4; // "f8"
125 case '9': // 1 string to match.
126 return SP::F9; // "f9"
127 case 'p': // 1 string to match.
128 return SP::I6; // "fp"
129 case 'q': // 1 string to match.
130 return SP::FQ; // "fq"
131 }
132 break;
133 case 'g': // 13 strings to match.
134 switch (Name[1]) {
135 default: break;
136 case '0': // 2 strings to match.
137 return SP::G0; // "g0"
138 case '1': // 1 string to match.
139 return SP::G1; // "g1"
140 case '2': // 2 strings to match.
141 return SP::G2; // "g2"
142 case '3': // 1 string to match.
143 return SP::G3; // "g3"
144 case '4': // 2 strings to match.
145 return SP::G4; // "g4"
146 case '5': // 1 string to match.
147 return SP::G5; // "g5"
148 case '6': // 2 strings to match.
149 return SP::G6; // "g6"
150 case '7': // 1 string to match.
151 return SP::G7; // "g7"
152 case 'l': // 1 string to match.
153 return SP::GL; // "gl"
154 }
155 break;
156 case 'i': // 11 strings to match.
157 switch (Name[1]) {
158 default: break;
159 case '0': // 2 strings to match.
160 return SP::I0; // "i0"
161 case '1': // 1 string to match.
162 return SP::I1; // "i1"
163 case '2': // 2 strings to match.
164 return SP::I2; // "i2"
165 case '3': // 1 string to match.
166 return SP::I3; // "i3"
167 case '4': // 2 strings to match.
168 return SP::I4; // "i4"
169 case '5': // 1 string to match.
170 return SP::I5; // "i5"
171 case '6': // 1 string to match.
172 return SP::I6_I7; // "i6"
173 case '7': // 1 string to match.
174 return SP::I7; // "i7"
175 }
176 break;
177 case 'l': // 12 strings to match.
178 switch (Name[1]) {
179 default: break;
180 case '0': // 2 strings to match.
181 return SP::L0; // "l0"
182 case '1': // 1 string to match.
183 return SP::L1; // "l1"
184 case '2': // 2 strings to match.
185 return SP::L2; // "l2"
186 case '3': // 1 string to match.
187 return SP::L3; // "l3"
188 case '4': // 2 strings to match.
189 return SP::L4; // "l4"
190 case '5': // 1 string to match.
191 return SP::L5; // "l5"
192 case '6': // 2 strings to match.
193 return SP::L6; // "l6"
194 case '7': // 1 string to match.
195 return SP::L7; // "l7"
196 }
197 break;
198 case 'o': // 11 strings to match.
199 switch (Name[1]) {
200 default: break;
201 case '0': // 2 strings to match.
202 return SP::O0; // "o0"
203 case '1': // 1 string to match.
204 return SP::O1; // "o1"
205 case '2': // 2 strings to match.
206 return SP::O2; // "o2"
207 case '3': // 1 string to match.
208 return SP::O3; // "o3"
209 case '4': // 2 strings to match.
210 return SP::O4; // "o4"
211 case '5': // 1 string to match.
212 return SP::O5; // "o5"
213 case '6': // 1 string to match.
214 return SP::O6_O7; // "o6"
215 case '7': // 1 string to match.
216 return SP::O7; // "o7"
217 }
218 break;
219 case 's': // 1 string to match.
220 if (Name[1] != 'p')
221 break;
222 return SP::O6; // "sp"
223 case 't': // 2 strings to match.
224 switch (Name[1]) {
225 default: break;
226 case 'l': // 1 string to match.
227 return SP::TL; // "tl"
228 case 't': // 1 string to match.
229 return SP::TT; // "tt"
230 }
231 break;
232 }
233 break;
234 case 3: // 106 strings to match.
235 switch (Name[0]) {
236 default: break;
237 case 'c': // 35 strings to match.
238 switch (Name[1]) {
239 default: break;
240 case '1': // 15 strings to match.
241 switch (Name[2]) {
242 default: break;
243 case '0': // 2 strings to match.
244 return SP::C10; // "c10"
245 case '1': // 1 string to match.
246 return SP::C11; // "c11"
247 case '2': // 2 strings to match.
248 return SP::C12; // "c12"
249 case '3': // 1 string to match.
250 return SP::C13; // "c13"
251 case '4': // 2 strings to match.
252 return SP::C14; // "c14"
253 case '5': // 1 string to match.
254 return SP::C15; // "c15"
255 case '6': // 2 strings to match.
256 return SP::C16; // "c16"
257 case '7': // 1 string to match.
258 return SP::C17; // "c17"
259 case '8': // 2 strings to match.
260 return SP::C18; // "c18"
261 case '9': // 1 string to match.
262 return SP::C19; // "c19"
263 }
264 break;
265 case '2': // 15 strings to match.
266 switch (Name[2]) {
267 default: break;
268 case '0': // 2 strings to match.
269 return SP::C20; // "c20"
270 case '1': // 1 string to match.
271 return SP::C21; // "c21"
272 case '2': // 2 strings to match.
273 return SP::C22; // "c22"
274 case '3': // 1 string to match.
275 return SP::C23; // "c23"
276 case '4': // 2 strings to match.
277 return SP::C24; // "c24"
278 case '5': // 1 string to match.
279 return SP::C25; // "c25"
280 case '6': // 2 strings to match.
281 return SP::C26; // "c26"
282 case '7': // 1 string to match.
283 return SP::C27; // "c27"
284 case '8': // 2 strings to match.
285 return SP::C28; // "c28"
286 case '9': // 1 string to match.
287 return SP::C29; // "c29"
288 }
289 break;
290 case '3': // 3 strings to match.
291 switch (Name[2]) {
292 default: break;
293 case '0': // 2 strings to match.
294 return SP::C30; // "c30"
295 case '1': // 1 string to match.
296 return SP::C31; // "c31"
297 }
298 break;
299 case 's': // 1 string to match.
300 if (Name[2] != 'r')
301 break;
302 return SP::CPSR; // "csr"
303 case 'w': // 1 string to match.
304 if (Name[2] != 'p')
305 break;
306 return SP::CWP; // "cwp"
307 }
308 break;
309 case 'f': // 63 strings to match.
310 switch (Name[1]) {
311 default: break;
312 case '1': // 17 strings to match.
313 switch (Name[2]) {
314 default: break;
315 case '0': // 2 strings to match.
316 return SP::D5; // "f10"
317 case '1': // 1 string to match.
318 return SP::F11; // "f11"
319 case '2': // 3 strings to match.
320 return SP::D6; // "f12"
321 case '3': // 1 string to match.
322 return SP::F13; // "f13"
323 case '4': // 2 strings to match.
324 return SP::D7; // "f14"
325 case '5': // 1 string to match.
326 return SP::F15; // "f15"
327 case '6': // 3 strings to match.
328 return SP::D8; // "f16"
329 case '7': // 1 string to match.
330 return SP::F17; // "f17"
331 case '8': // 2 strings to match.
332 return SP::D9; // "f18"
333 case '9': // 1 string to match.
334 return SP::F19; // "f19"
335 }
336 break;
337 case '2': // 18 strings to match.
338 switch (Name[2]) {
339 default: break;
340 case '0': // 3 strings to match.
341 return SP::D10; // "f20"
342 case '1': // 1 string to match.
343 return SP::F21; // "f21"
344 case '2': // 2 strings to match.
345 return SP::D11; // "f22"
346 case '3': // 1 string to match.
347 return SP::F23; // "f23"
348 case '4': // 3 strings to match.
349 return SP::D12; // "f24"
350 case '5': // 1 string to match.
351 return SP::F25; // "f25"
352 case '6': // 2 strings to match.
353 return SP::D13; // "f26"
354 case '7': // 1 string to match.
355 return SP::F27; // "f27"
356 case '8': // 3 strings to match.
357 return SP::D14; // "f28"
358 case '9': // 1 string to match.
359 return SP::F29; // "f29"
360 }
361 break;
362 case '3': // 9 strings to match.
363 switch (Name[2]) {
364 default: break;
365 case '0': // 2 strings to match.
366 return SP::D15; // "f30"
367 case '1': // 1 string to match.
368 return SP::F31; // "f31"
369 case '2': // 2 strings to match.
370 return SP::D16; // "f32"
371 case '4': // 1 string to match.
372 return SP::D17; // "f34"
373 case '6': // 2 strings to match.
374 return SP::D18; // "f36"
375 case '8': // 1 string to match.
376 return SP::D19; // "f38"
377 }
378 break;
379 case '4': // 8 strings to match.
380 switch (Name[2]) {
381 default: break;
382 case '0': // 2 strings to match.
383 return SP::D20; // "f40"
384 case '2': // 1 string to match.
385 return SP::D21; // "f42"
386 case '4': // 2 strings to match.
387 return SP::D22; // "f44"
388 case '6': // 1 string to match.
389 return SP::D23; // "f46"
390 case '8': // 2 strings to match.
391 return SP::D24; // "f48"
392 }
393 break;
394 case '5': // 7 strings to match.
395 switch (Name[2]) {
396 default: break;
397 case '0': // 1 string to match.
398 return SP::D25; // "f50"
399 case '2': // 2 strings to match.
400 return SP::D26; // "f52"
401 case '4': // 1 string to match.
402 return SP::D27; // "f54"
403 case '6': // 2 strings to match.
404 return SP::D28; // "f56"
405 case '8': // 1 string to match.
406 return SP::D29; // "f58"
407 }
408 break;
409 case '6': // 3 strings to match.
410 switch (Name[2]) {
411 default: break;
412 case '0': // 2 strings to match.
413 return SP::D30; // "f60"
414 case '2': // 1 string to match.
415 return SP::D31; // "f62"
416 }
417 break;
418 case 's': // 1 string to match.
419 if (Name[2] != 'r')
420 break;
421 return SP::FSR; // "fsr"
422 }
423 break;
424 case 'i': // 1 string to match.
425 if (memcmp(Name.data()+1, "cc", 2) != 0)
426 break;
427 return SP::ICC; // "icc"
428 case 'p': // 2 strings to match.
429 switch (Name[1]) {
430 default: break;
431 case 'i': // 1 string to match.
432 if (Name[2] != 'l')
433 break;
434 return SP::PIL; // "pil"
435 case 's': // 1 string to match.
436 if (Name[2] != 'r')
437 break;
438 return SP::PSR; // "psr"
439 }
440 break;
441 case 't': // 3 strings to match.
442 switch (Name[1]) {
443 default: break;
444 case 'b': // 2 strings to match.
445 switch (Name[2]) {
446 default: break;
447 case 'a': // 1 string to match.
448 return SP::TBA; // "tba"
449 case 'r': // 1 string to match.
450 return SP::TBR; // "tbr"
451 }
452 break;
453 case 'p': // 1 string to match.
454 if (Name[2] != 'c')
455 break;
456 return SP::TPC; // "tpc"
457 }
458 break;
459 case 'v': // 1 string to match.
460 if (memcmp(Name.data()+1, "er", 2) != 0)
461 break;
462 return SP::VER; // "ver"
463 case 'w': // 1 string to match.
464 if (memcmp(Name.data()+1, "im", 2) != 0)
465 break;
466 return SP::WIM; // "wim"
467 }
468 break;
469 case 4: // 15 strings to match.
470 switch (Name[0]) {
471 default: break;
472 case 'a': // 9 strings to match.
473 if (memcmp(Name.data()+1, "sr", 2) != 0)
474 break;
475 switch (Name[3]) {
476 default: break;
477 case '1': // 1 string to match.
478 return SP::ASR1; // "asr1"
479 case '2': // 1 string to match.
480 return SP::ASR2; // "asr2"
481 case '3': // 1 string to match.
482 return SP::ASR3; // "asr3"
483 case '4': // 1 string to match.
484 return SP::ASR4; // "asr4"
485 case '5': // 1 string to match.
486 return SP::ASR5; // "asr5"
487 case '6': // 1 string to match.
488 return SP::ASR6; // "asr6"
489 case '7': // 1 string to match.
490 return SP::ASR7; // "asr7"
491 case '8': // 1 string to match.
492 return SP::ASR8; // "asr8"
493 case '9': // 1 string to match.
494 return SP::ASR9; // "asr9"
495 }
496 break;
497 case 'f': // 4 strings to match.
498 if (memcmp(Name.data()+1, "cc", 2) != 0)
499 break;
500 switch (Name[3]) {
501 default: break;
502 case '0': // 1 string to match.
503 return SP::FCC0; // "fcc0"
504 case '1': // 1 string to match.
505 return SP::FCC1; // "fcc1"
506 case '2': // 1 string to match.
507 return SP::FCC2; // "fcc2"
508 case '3': // 1 string to match.
509 return SP::FCC3; // "fcc3"
510 }
511 break;
512 case 't': // 2 strings to match.
513 switch (Name[1]) {
514 default: break;
515 case 'i': // 1 string to match.
516 if (memcmp(Name.data()+2, "ck", 2) != 0)
517 break;
518 return SP::TICK; // "tick"
519 case 'n': // 1 string to match.
520 if (memcmp(Name.data()+2, "pc", 2) != 0)
521 break;
522 return SP::TNPC; // "tnpc"
523 }
524 break;
525 }
526 break;
527 case 5: // 22 strings to match.
528 if (memcmp(Name.data()+0, "asr", 3) != 0)
529 break;
530 switch (Name[3]) {
531 default: break;
532 case '1': // 10 strings to match.
533 switch (Name[4]) {
534 default: break;
535 case '0': // 1 string to match.
536 return SP::ASR10; // "asr10"
537 case '1': // 1 string to match.
538 return SP::ASR11; // "asr11"
539 case '2': // 1 string to match.
540 return SP::ASR12; // "asr12"
541 case '3': // 1 string to match.
542 return SP::ASR13; // "asr13"
543 case '4': // 1 string to match.
544 return SP::ASR14; // "asr14"
545 case '5': // 1 string to match.
546 return SP::ASR15; // "asr15"
547 case '6': // 1 string to match.
548 return SP::ASR16; // "asr16"
549 case '7': // 1 string to match.
550 return SP::ASR17; // "asr17"
551 case '8': // 1 string to match.
552 return SP::ASR18; // "asr18"
553 case '9': // 1 string to match.
554 return SP::ASR19; // "asr19"
555 }
556 break;
557 case '2': // 10 strings to match.
558 switch (Name[4]) {
559 default: break;
560 case '0': // 1 string to match.
561 return SP::ASR20; // "asr20"
562 case '1': // 1 string to match.
563 return SP::ASR21; // "asr21"
564 case '2': // 1 string to match.
565 return SP::ASR22; // "asr22"
566 case '3': // 1 string to match.
567 return SP::ASR23; // "asr23"
568 case '4': // 1 string to match.
569 return SP::ASR24; // "asr24"
570 case '5': // 1 string to match.
571 return SP::ASR25; // "asr25"
572 case '6': // 1 string to match.
573 return SP::ASR26; // "asr26"
574 case '7': // 1 string to match.
575 return SP::ASR27; // "asr27"
576 case '8': // 1 string to match.
577 return SP::ASR28; // "asr28"
578 case '9': // 1 string to match.
579 return SP::ASR29; // "asr29"
580 }
581 break;
582 case '3': // 2 strings to match.
583 switch (Name[4]) {
584 default: break;
585 case '0': // 1 string to match.
586 return SP::ASR30; // "asr30"
587 case '1': // 1 string to match.
588 return SP::ASR31; // "asr31"
589 }
590 break;
591 }
592 break;
593 case 6: // 3 strings to match.
594 switch (Name[0]) {
595 default: break;
596 case 'p': // 1 string to match.
597 if (memcmp(Name.data()+1, "state", 5) != 0)
598 break;
599 return SP::PSTATE; // "pstate"
600 case 't': // 1 string to match.
601 if (memcmp(Name.data()+1, "state", 5) != 0)
602 break;
603 return SP::TSTATE; // "tstate"
604 case 'w': // 1 string to match.
605 if (memcmp(Name.data()+1, "state", 5) != 0)
606 break;
607 return SP::WSTATE; // "wstate"
608 }
609 break;
610 case 7: // 1 string to match.
611 if (memcmp(Name.data()+0, "cansave", 7) != 0)
612 break;
613 return SP::CANSAVE; // "cansave"
614 case 8: // 2 strings to match.
615 switch (Name[0]) {
616 default: break;
617 case 'c': // 1 string to match.
618 if (memcmp(Name.data()+1, "leanwin", 7) != 0)
619 break;
620 return SP::CLEANWIN; // "cleanwin"
621 case 'o': // 1 string to match.
622 if (memcmp(Name.data()+1, "therwin", 7) != 0)
623 break;
624 return SP::OTHERWIN; // "otherwin"
625 }
626 break;
627 case 10: // 1 string to match.
628 if (memcmp(Name.data()+0, "canrestore", 10) != 0)
629 break;
630 return SP::CANRESTORE; // "canrestore"
631 }
632 return SP::NoRegister;
633}
634
635static MCRegister MatchRegisterAltName(StringRef Name) {
636 switch (Name.size()) {
637 default: break;
638 case 2: // 1 string to match.
639 if (memcmp(Name.data()+0, "pc", 2) != 0)
640 break;
641 return SP::ASR5; // "pc"
642 case 3: // 2 strings to match.
643 switch (Name[0]) {
644 default: break;
645 case 'a': // 1 string to match.
646 if (memcmp(Name.data()+1, "si", 2) != 0)
647 break;
648 return SP::ASR3; // "asi"
649 case 'c': // 1 string to match.
650 if (memcmp(Name.data()+1, "cr", 2) != 0)
651 break;
652 return SP::ASR2; // "ccr"
653 }
654 break;
655 case 4: // 2 strings to match.
656 switch (Name[0]) {
657 default: break;
658 case 'f': // 1 string to match.
659 if (memcmp(Name.data()+1, "prs", 3) != 0)
660 break;
661 return SP::ASR6; // "fprs"
662 case 't': // 1 string to match.
663 if (memcmp(Name.data()+1, "ick", 3) != 0)
664 break;
665 return SP::ASR4; // "tick"
666 }
667 break;
668 }
669 return SP::NoRegister;
670}
671
672#endif // GET_REGISTER_MATCHER
673
674
675#ifdef GET_SUBTARGET_FEATURE_NAME
676#undef GET_SUBTARGET_FEATURE_NAME
677
678// User-level names for subtarget features that participate in
679// instruction matching.
680static const char *getSubtargetFeatureName(uint64_t Val) {
681 switch(Val) {
682 case Feature_UseSoftMulDivBit: return "";
683 case Feature_HasV9Bit: return "";
684 case Feature_HasVISBit: return "";
685 case Feature_HasVIS2Bit: return "";
686 case Feature_HasVIS3Bit: return "";
687 case Feature_HasCASABit: return "";
688 case Feature_HasPWRPSRBit: return "";
689 default: return "(unknown)";
690 }
691}
692
693#endif // GET_SUBTARGET_FEATURE_NAME
694
695
696#ifdef GET_MATCHER_IMPLEMENTATION
697#undef GET_MATCHER_IMPLEMENTATION
698
699static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) {
700 switch (VariantID) {
701 case 0:
702 switch (Mnemonic.size()) {
703 default: break;
704 case 3: // 1 string to match.
705 if (memcmp(Mnemonic.data()+0, "stw", 3) != 0)
706 break;
707 if (Features.test(Feature_HasV9Bit)) // "stw"
708 Mnemonic = "st";
709 return;
710 case 4: // 10 strings to match.
711 switch (Mnemonic[0]) {
712 default: break;
713 case 'a': // 1 string to match.
714 if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
715 break;
716 if (Features.test(Feature_HasV9Bit)) // "addc"
717 Mnemonic = "addx";
718 return;
719 case 'l': // 1 string to match.
720 if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
721 break;
722 if (Features.test(Feature_HasV9Bit)) // "lduw"
723 Mnemonic = "ld";
724 return;
725 case 's': // 8 strings to match.
726 switch (Mnemonic[1]) {
727 default: break;
728 case 't': // 7 strings to match.
729 switch (Mnemonic[2]) {
730 default: break;
731 case 's': // 3 strings to match.
732 switch (Mnemonic[3]) {
733 default: break;
734 case 'b': // 1 string to match.
735 Mnemonic = "stb"; // "stsb"
736 return;
737 case 'h': // 1 string to match.
738 Mnemonic = "sth"; // "stsh"
739 return;
740 case 'w': // 1 string to match.
741 if (Features.test(Feature_HasV9Bit)) // "stsw"
742 Mnemonic = "st";
743 return;
744 }
745 break;
746 case 'u': // 3 strings to match.
747 switch (Mnemonic[3]) {
748 default: break;
749 case 'b': // 1 string to match.
750 Mnemonic = "stb"; // "stub"
751 return;
752 case 'h': // 1 string to match.
753 Mnemonic = "sth"; // "stuh"
754 return;
755 case 'w': // 1 string to match.
756 if (Features.test(Feature_HasV9Bit)) // "stuw"
757 Mnemonic = "st";
758 return;
759 }
760 break;
761 case 'w': // 1 string to match.
762 if (Mnemonic[3] != 'a')
763 break;
764 if (Features.test(Feature_HasV9Bit)) // "stwa"
765 Mnemonic = "sta";
766 return;
767 }
768 break;
769 case 'u': // 1 string to match.
770 if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
771 break;
772 if (Features.test(Feature_HasV9Bit)) // "subc"
773 Mnemonic = "subx";
774 return;
775 }
776 break;
777 }
778 break;
779 case 5: // 7 strings to match.
780 switch (Mnemonic[0]) {
781 default: break;
782 case 'l': // 1 string to match.
783 if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
784 break;
785 if (Features.test(Feature_HasV9Bit)) // "lduwa"
786 Mnemonic = "lda";
787 return;
788 case 's': // 6 strings to match.
789 if (Mnemonic[1] != 't')
790 break;
791 switch (Mnemonic[2]) {
792 default: break;
793 case 's': // 3 strings to match.
794 switch (Mnemonic[3]) {
795 default: break;
796 case 'b': // 1 string to match.
797 if (Mnemonic[4] != 'a')
798 break;
799 Mnemonic = "stba"; // "stsba"
800 return;
801 case 'h': // 1 string to match.
802 if (Mnemonic[4] != 'a')
803 break;
804 Mnemonic = "stha"; // "stsha"
805 return;
806 case 'w': // 1 string to match.
807 if (Mnemonic[4] != 'a')
808 break;
809 if (Features.test(Feature_HasV9Bit)) // "stswa"
810 Mnemonic = "sta";
811 return;
812 }
813 break;
814 case 'u': // 3 strings to match.
815 switch (Mnemonic[3]) {
816 default: break;
817 case 'b': // 1 string to match.
818 if (Mnemonic[4] != 'a')
819 break;
820 Mnemonic = "stba"; // "stuba"
821 return;
822 case 'h': // 1 string to match.
823 if (Mnemonic[4] != 'a')
824 break;
825 Mnemonic = "stha"; // "stuha"
826 return;
827 case 'w': // 1 string to match.
828 if (Mnemonic[4] != 'a')
829 break;
830 if (Features.test(Feature_HasV9Bit)) // "stuwa"
831 Mnemonic = "sta";
832 return;
833 }
834 break;
835 }
836 break;
837 }
838 break;
839 case 6: // 4 strings to match.
840 switch (Mnemonic[0]) {
841 default: break;
842 case 'a': // 1 string to match.
843 if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
844 break;
845 if (Features.test(Feature_HasV9Bit)) // "addccc"
846 Mnemonic = "addxcc";
847 return;
848 case 'i': // 1 string to match.
849 if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
850 break;
851 Mnemonic = "flush"; // "iflush"
852 return;
853 case 'r': // 1 string to match.
854 if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
855 break;
856 if (Features.test(Feature_HasV9Bit)) // "return"
857 Mnemonic = "rett";
858 return;
859 case 's': // 1 string to match.
860 if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
861 break;
862 if (Features.test(Feature_HasV9Bit)) // "subccc"
863 Mnemonic = "subxcc";
864 return;
865 }
866 break;
867 }
868 break;
869 }
870 switch (Mnemonic.size()) {
871 default: break;
872 case 3: // 1 string to match.
873 if (memcmp(Mnemonic.data()+0, "stw", 3) != 0)
874 break;
875 if (Features.test(Feature_HasV9Bit)) // "stw"
876 Mnemonic = "st";
877 return;
878 case 4: // 10 strings to match.
879 switch (Mnemonic[0]) {
880 default: break;
881 case 'a': // 1 string to match.
882 if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
883 break;
884 if (Features.test(Feature_HasV9Bit)) // "addc"
885 Mnemonic = "addx";
886 return;
887 case 'l': // 1 string to match.
888 if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
889 break;
890 if (Features.test(Feature_HasV9Bit)) // "lduw"
891 Mnemonic = "ld";
892 return;
893 case 's': // 8 strings to match.
894 switch (Mnemonic[1]) {
895 default: break;
896 case 't': // 7 strings to match.
897 switch (Mnemonic[2]) {
898 default: break;
899 case 's': // 3 strings to match.
900 switch (Mnemonic[3]) {
901 default: break;
902 case 'b': // 1 string to match.
903 Mnemonic = "stb"; // "stsb"
904 return;
905 case 'h': // 1 string to match.
906 Mnemonic = "sth"; // "stsh"
907 return;
908 case 'w': // 1 string to match.
909 if (Features.test(Feature_HasV9Bit)) // "stsw"
910 Mnemonic = "st";
911 return;
912 }
913 break;
914 case 'u': // 3 strings to match.
915 switch (Mnemonic[3]) {
916 default: break;
917 case 'b': // 1 string to match.
918 Mnemonic = "stb"; // "stub"
919 return;
920 case 'h': // 1 string to match.
921 Mnemonic = "sth"; // "stuh"
922 return;
923 case 'w': // 1 string to match.
924 if (Features.test(Feature_HasV9Bit)) // "stuw"
925 Mnemonic = "st";
926 return;
927 }
928 break;
929 case 'w': // 1 string to match.
930 if (Mnemonic[3] != 'a')
931 break;
932 if (Features.test(Feature_HasV9Bit)) // "stwa"
933 Mnemonic = "sta";
934 return;
935 }
936 break;
937 case 'u': // 1 string to match.
938 if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
939 break;
940 if (Features.test(Feature_HasV9Bit)) // "subc"
941 Mnemonic = "subx";
942 return;
943 }
944 break;
945 }
946 break;
947 case 5: // 7 strings to match.
948 switch (Mnemonic[0]) {
949 default: break;
950 case 'l': // 1 string to match.
951 if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
952 break;
953 if (Features.test(Feature_HasV9Bit)) // "lduwa"
954 Mnemonic = "lda";
955 return;
956 case 's': // 6 strings to match.
957 if (Mnemonic[1] != 't')
958 break;
959 switch (Mnemonic[2]) {
960 default: break;
961 case 's': // 3 strings to match.
962 switch (Mnemonic[3]) {
963 default: break;
964 case 'b': // 1 string to match.
965 if (Mnemonic[4] != 'a')
966 break;
967 Mnemonic = "stba"; // "stsba"
968 return;
969 case 'h': // 1 string to match.
970 if (Mnemonic[4] != 'a')
971 break;
972 Mnemonic = "stha"; // "stsha"
973 return;
974 case 'w': // 1 string to match.
975 if (Mnemonic[4] != 'a')
976 break;
977 if (Features.test(Feature_HasV9Bit)) // "stswa"
978 Mnemonic = "sta";
979 return;
980 }
981 break;
982 case 'u': // 3 strings to match.
983 switch (Mnemonic[3]) {
984 default: break;
985 case 'b': // 1 string to match.
986 if (Mnemonic[4] != 'a')
987 break;
988 Mnemonic = "stba"; // "stuba"
989 return;
990 case 'h': // 1 string to match.
991 if (Mnemonic[4] != 'a')
992 break;
993 Mnemonic = "stha"; // "stuha"
994 return;
995 case 'w': // 1 string to match.
996 if (Mnemonic[4] != 'a')
997 break;
998 if (Features.test(Feature_HasV9Bit)) // "stuwa"
999 Mnemonic = "sta";
1000 return;
1001 }
1002 break;
1003 }
1004 break;
1005 }
1006 break;
1007 case 6: // 4 strings to match.
1008 switch (Mnemonic[0]) {
1009 default: break;
1010 case 'a': // 1 string to match.
1011 if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
1012 break;
1013 if (Features.test(Feature_HasV9Bit)) // "addccc"
1014 Mnemonic = "addxcc";
1015 return;
1016 case 'i': // 1 string to match.
1017 if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
1018 break;
1019 Mnemonic = "flush"; // "iflush"
1020 return;
1021 case 'r': // 1 string to match.
1022 if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
1023 break;
1024 if (Features.test(Feature_HasV9Bit)) // "return"
1025 Mnemonic = "rett";
1026 return;
1027 case 's': // 1 string to match.
1028 if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
1029 break;
1030 if (Features.test(Feature_HasV9Bit)) // "subccc"
1031 Mnemonic = "subxcc";
1032 return;
1033 }
1034 break;
1035 }
1036}
1037
1038enum {
1039 Tie0_1_1,
1040 Tie0_3_3,
1041 Tie0_5_5,
1042};
1043
1044static const uint8_t TiedAsmOperandTable[][3] = {
1045 /* Tie0_1_1 */ { 0, 1, 1 },
1046 /* Tie0_3_3 */ { 0, 3, 3 },
1047 /* Tie0_5_5 */ { 0, 5, 5 },
1048};
1049
1050namespace {
1051enum OperatorConversionKind {
1052 CVT_Done,
1053 CVT_Reg,
1054 CVT_Tied,
1055 CVT_95_Reg,
1056 CVT_95_addImmOperands,
1057 CVT_95_addTailRelocSymOperands,
1058 CVT_imm_95_8,
1059 CVT_imm_95_13,
1060 CVT_imm_95_5,
1061 CVT_imm_95_1,
1062 CVT_imm_95_10,
1063 CVT_imm_95_11,
1064 CVT_imm_95_12,
1065 CVT_imm_95_3,
1066 CVT_imm_95_2,
1067 CVT_imm_95_4,
1068 CVT_imm_95_0,
1069 CVT_imm_95_9,
1070 CVT_imm_95_6,
1071 CVT_imm_95_14,
1072 CVT_imm_95_7,
1073 CVT_regG0,
1074 CVT_imm_95_15,
1075 CVT_95_addCallTargetOperands,
1076 CVT_regO7,
1077 CVT_95_addMEMriOperands,
1078 CVT_95_addMEMrrOperands,
1079 CVT_imm_95_128,
1080 CVT_95_addASITagOperands,
1081 CVT_imm_95_136,
1082 CVT_regFCC0,
1083 CVT_95_addMembarTagOperands,
1084 CVT_95_addPrefetchTagOperands,
1085 CVT_95_addShiftAmtImm5Operands,
1086 CVT_95_addShiftAmtImm6Operands,
1087 CVT_NUM_CONVERTERS
1088};
1089
1090enum InstructionConversionKind {
1091 Convert__Reg1_2__Reg1_0__Reg1_1,
1092 Convert__Reg1_2__Reg1_0__Imm1_1,
1093 Convert__Reg1_2__Reg1_0__Reg1_1__TailRelocSymAdd_TLS1_3,
1094 Convert__Reg1_2__Reg1_1__Imm1_0,
1095 Convert__Imm1_0__imm_95_8,
1096 Convert__Imm1_1__imm_95_8,
1097 Convert__Imm1_1__Imm1_0,
1098 Convert__Imm1_2__imm_95_8,
1099 Convert__Imm1_2__Imm1_0,
1100 Convert__Imm1_3__imm_95_8,
1101 Convert__Imm1_3__Imm1_0,
1102 Convert__Imm1_4__Imm1_0,
1103 Convert__Imm1_0,
1104 Convert__Imm1_0__imm_95_13,
1105 Convert__Imm1_1__imm_95_13,
1106 Convert__Imm1_2__imm_95_13,
1107 Convert__Imm1_3__imm_95_13,
1108 Convert__Reg1_1__Reg1_1__Reg1_0,
1109 Convert__Reg1_1__Reg1_1__Imm1_0,
1110 Convert__Imm1_0__imm_95_5,
1111 Convert__Imm1_1__imm_95_5,
1112 Convert__Imm1_2__imm_95_5,
1113 Convert__Imm1_3__imm_95_5,
1114 Convert__Imm1_0__imm_95_1,
1115 Convert__Imm1_1__imm_95_1,
1116 Convert__Imm1_2__imm_95_1,
1117 Convert__Imm1_3__imm_95_1,
1118 Convert__Imm1_0__imm_95_10,
1119 Convert__Imm1_1__imm_95_10,
1120 Convert__Imm1_2__imm_95_10,
1121 Convert__Imm1_3__imm_95_10,
1122 Convert__Imm1_0__imm_95_11,
1123 Convert__Imm1_1__imm_95_11,
1124 Convert__Imm1_2__imm_95_11,
1125 Convert__Imm1_3__imm_95_11,
1126 Convert__Imm1_0__imm_95_12,
1127 Convert__Imm1_1__imm_95_12,
1128 Convert__Imm1_2__imm_95_12,
1129 Convert__Imm1_3__imm_95_12,
1130 Convert__Imm1_0__imm_95_3,
1131 Convert__Imm1_1__imm_95_3,
1132 Convert__Imm1_2__imm_95_3,
1133 Convert__Imm1_3__imm_95_3,
1134 Convert__Imm1_0__imm_95_2,
1135 Convert__Imm1_1__imm_95_2,
1136 Convert__Imm1_2__imm_95_2,
1137 Convert__Imm1_3__imm_95_2,
1138 Convert__Imm1_0__imm_95_4,
1139 Convert__Imm1_1__imm_95_4,
1140 Convert__Imm1_2__imm_95_4,
1141 Convert__Imm1_3__imm_95_4,
1142 Convert__Imm1_0__imm_95_0,
1143 Convert__Imm1_1__imm_95_0,
1144 Convert__Imm1_2__imm_95_0,
1145 Convert__Imm1_3__imm_95_0,
1146 Convert__Imm1_0__imm_95_9,
1147 Convert__Imm1_1__imm_95_9,
1148 Convert__Imm1_2__imm_95_9,
1149 Convert__Imm1_3__imm_95_9,
1150 Convert__Imm1_0__imm_95_6,
1151 Convert__Imm1_1__imm_95_6,
1152 Convert__Imm1_2__imm_95_6,
1153 Convert__Imm1_3__imm_95_6,
1154 Convert__Imm1_0__imm_95_14,
1155 Convert__Imm1_1__imm_95_14,
1156 Convert__Imm1_2__imm_95_14,
1157 Convert__Imm1_3__imm_95_14,
1158 Convert__Imm1_2__Imm1_0__Reg1_1,
1159 Convert__Imm1_3__Imm1_0__Reg1_2,
1160 Convert__Imm1_4__Imm1_0__Reg1_3,
1161 Convert__Imm1_1__imm_95_1__Reg1_0,
1162 Convert__Imm1_2__imm_95_1__Reg1_1,
1163 Convert__Imm1_3__imm_95_1__Reg1_2,
1164 Convert__Imm1_1__imm_95_7__Reg1_0,
1165 Convert__Imm1_2__imm_95_7__Reg1_1,
1166 Convert__Imm1_3__imm_95_7__Reg1_2,
1167 Convert__Imm1_1__imm_95_6__Reg1_0,
1168 Convert__Imm1_2__imm_95_6__Reg1_1,
1169 Convert__Imm1_3__imm_95_6__Reg1_2,
1170 Convert__Imm1_1__imm_95_2__Reg1_0,
1171 Convert__Imm1_2__imm_95_2__Reg1_1,
1172 Convert__Imm1_3__imm_95_2__Reg1_2,
1173 Convert__Imm1_1__imm_95_3__Reg1_0,
1174 Convert__Imm1_2__imm_95_3__Reg1_1,
1175 Convert__Imm1_3__imm_95_3__Reg1_2,
1176 Convert__Imm1_1__imm_95_5__Reg1_0,
1177 Convert__Imm1_2__imm_95_5__Reg1_1,
1178 Convert__Imm1_3__imm_95_5__Reg1_2,
1179 Convert__regG0__Reg1_1__Reg1_0,
1180 Convert__regG0__Reg1_1__Imm1_0,
1181 Convert__Imm1_0__imm_95_15,
1182 Convert__Imm1_1__imm_95_15,
1183 Convert__Imm1_2__imm_95_15,
1184 Convert__Imm1_3__imm_95_15,
1185 Convert__Imm1_0__imm_95_7,
1186 Convert__Imm1_1__imm_95_7,
1187 Convert__Imm1_2__imm_95_7,
1188 Convert__Imm1_3__imm_95_7,
1189 Convert__CallTarget1_0,
1190 Convert__regO7__MEMri2_0,
1191 Convert__regO7__MEMrr2_0,
1192 Convert__CallTarget1_0__TailRelocSymCall_TLS1_1,
1193 Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_128,
1194 Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1,
1195 Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__ASITag1_3,
1196 Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_136,
1197 Convert__Reg1_0__regG0__regG0,
1198 Convert__MEMri2_1__regG0,
1199 Convert__MEMrr2_1__regG0,
1200 Convert__Reg1_0,
1201 Convert__regG0__Reg1_0__Reg1_1,
1202 Convert__regG0__Reg1_0__Imm1_1,
1203 Convert__Reg1_0__Reg1_0__imm_95_1,
1204 Convert_NoOperands,
1205 Convert__Reg1_1__Reg1_0,
1206 Convert__Imm1_1__imm_95_8__Reg1_0,
1207 Convert__Imm1_2__imm_95_8__Reg1_1,
1208 Convert__Imm1_3__imm_95_8__Reg1_2,
1209 Convert__Imm1_1__imm_95_9__Reg1_0,
1210 Convert__Imm1_2__imm_95_9__Reg1_1,
1211 Convert__Imm1_3__imm_95_9__Reg1_2,
1212 Convert__Imm1_1__imm_95_11__Reg1_0,
1213 Convert__Imm1_2__imm_95_11__Reg1_1,
1214 Convert__Imm1_3__imm_95_11__Reg1_2,
1215 Convert__Imm1_1__imm_95_4__Reg1_0,
1216 Convert__Imm1_2__imm_95_4__Reg1_1,
1217 Convert__Imm1_3__imm_95_4__Reg1_2,
1218 Convert__Imm1_1__imm_95_13__Reg1_0,
1219 Convert__Imm1_2__imm_95_13__Reg1_1,
1220 Convert__Imm1_3__imm_95_13__Reg1_2,
1221 Convert__Imm1_1__imm_95_0__Reg1_0,
1222 Convert__Imm1_2__imm_95_0__Reg1_1,
1223 Convert__Imm1_3__imm_95_0__Reg1_2,
1224 Convert__Imm1_1__imm_95_15__Reg1_0,
1225 Convert__Imm1_2__imm_95_15__Reg1_1,
1226 Convert__Imm1_3__imm_95_15__Reg1_2,
1227 Convert__Imm1_1__imm_95_10__Reg1_0,
1228 Convert__Imm1_2__imm_95_10__Reg1_1,
1229 Convert__Imm1_3__imm_95_10__Reg1_2,
1230 Convert__Imm1_1__imm_95_12__Reg1_0,
1231 Convert__Imm1_2__imm_95_12__Reg1_1,
1232 Convert__Imm1_3__imm_95_12__Reg1_2,
1233 Convert__Imm1_1__imm_95_14__Reg1_0,
1234 Convert__Imm1_2__imm_95_14__Reg1_1,
1235 Convert__Imm1_3__imm_95_14__Reg1_2,
1236 Convert__regFCC0__Reg1_0__Reg1_1,
1237 Convert__Reg1_0__Reg1_1__Reg1_2,
1238 Convert__MEMri2_0,
1239 Convert__MEMrr2_0,
1240 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8,
1241 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8,
1242 Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0,
1243 Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0,
1244 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13,
1245 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5,
1246 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1,
1247 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9,
1248 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10,
1249 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6,
1250 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11,
1251 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11,
1252 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12,
1253 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3,
1254 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4,
1255 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2,
1256 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13,
1257 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4,
1258 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2,
1259 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0,
1260 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0,
1261 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9,
1262 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1,
1263 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6,
1264 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15,
1265 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14,
1266 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7,
1267 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10,
1268 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5,
1269 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12,
1270 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3,
1271 Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14,
1272 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15,
1273 Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7,
1274 Convert__Reg1_0__Tie0_1_1,
1275 Convert__regG0__MEMri2_0,
1276 Convert__regG0__MEMrr2_0,
1277 Convert__Reg1_1__MEMri2_0,
1278 Convert__Reg1_1__MEMrr2_0,
1279 Convert__MEMri2_1,
1280 Convert__Reg1_3__MEMri2_1,
1281 Convert__MEMrr2_1,
1282 Convert__Reg1_3__MEMrr2_1,
1283 Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_GOT1_4,
1284 Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_TLS1_4,
1285 Convert__Reg1_4__MEMri2_1,
1286 Convert__Reg1_4__MEMrr2_1__ASITag1_3,
1287 Convert__MembarTag1_0,
1288 Convert__Reg1_1,
1289 Convert__regG0__Reg1_0,
1290 Convert__Reg1_1__regG0__Reg1_0,
1291 Convert__regG0__Imm1_0,
1292 Convert__Reg1_1__regG0__Imm1_0,
1293 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8,
1294 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8,
1295 Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0,
1296 Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0,
1297 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13,
1298 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5,
1299 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1,
1300 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9,
1301 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10,
1302 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6,
1303 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11,
1304 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11,
1305 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12,
1306 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3,
1307 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4,
1308 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2,
1309 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13,
1310 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4,
1311 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2,
1312 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0,
1313 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0,
1314 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9,
1315 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1,
1316 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6,
1317 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15,
1318 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14,
1319 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7,
1320 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3,
1321 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5,
1322 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10,
1323 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12,
1324 Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14,
1325 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15,
1326 Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7,
1327 Convert__Reg1_0__regG0__Reg1_0,
1328 Convert__Reg1_0__Reg1_0__regG0,
1329 Convert__Reg1_1__Reg1_0__regG0,
1330 Convert__MEMri2_1__PrefetchTag1_3,
1331 Convert__MEMrr2_1__PrefetchTag1_3,
1332 Convert__MEMri2_1__PrefetchTag1_4,
1333 Convert__MEMrr2_1__ASITag1_3__PrefetchTag1_4,
1334 Convert__Reg1_0__Reg1_1,
1335 Convert__Reg1_0__Imm1_1,
1336 Convert__regG0__regG0__regG0,
1337 Convert__imm_95_8,
1338 Convert__Reg1_1__Imm1_0,
1339 Convert__Reg1_2__Imm1_0__Reg1_1,
1340 Convert__imm_95_0,
1341 Convert__Reg1_2__Reg1_0__ShiftAmtImm51_1,
1342 Convert__Reg1_2__Reg1_0__ShiftAmtImm61_1,
1343 Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0,
1344 Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0,
1345 Convert__MEMri2_2,
1346 Convert__MEMrr2_2,
1347 Convert__MEMri2_2__Reg1_0,
1348 Convert__MEMrr2_2__Reg1_0,
1349 Convert__MEMrr2_2__Reg1_0__ASITag1_4,
1350 Convert__Reg1_3__MEMri2_1__Tie0_1_1,
1351 Convert__Reg1_3__MEMrr2_1__Tie0_1_1,
1352 Convert__Reg1_4__MEMri2_1__Tie0_1_1,
1353 Convert__Reg1_4__MEMrr2_1__ASITag1_3__Tie0_1_1,
1354 Convert__regG0__Reg1_0__imm_95_8,
1355 Convert__regG0__Imm1_0__imm_95_8,
1356 Convert__regG0__Reg1_1__imm_95_8,
1357 Convert__regG0__Imm1_1__imm_95_8,
1358 Convert__Reg1_0__Reg1_2__imm_95_8,
1359 Convert__Reg1_0__Imm1_2__imm_95_8,
1360 Convert__Reg1_1__Reg1_3__imm_95_8,
1361 Convert__Reg1_1__Imm1_3__imm_95_8,
1362 Convert__Reg1_1__Reg1_3__Imm1_0,
1363 Convert__Reg1_1__Imm1_3__Imm1_0,
1364 Convert__Reg1_2__Reg1_4__Imm1_0,
1365 Convert__Reg1_2__Imm1_4__Imm1_0,
1366 Convert__regG0__Reg1_0__imm_95_13,
1367 Convert__regG0__Imm1_0__imm_95_13,
1368 Convert__regG0__Reg1_1__imm_95_13,
1369 Convert__regG0__Imm1_1__imm_95_13,
1370 Convert__Reg1_0__Reg1_2__imm_95_13,
1371 Convert__Reg1_0__Imm1_2__imm_95_13,
1372 Convert__Reg1_1__Reg1_3__imm_95_13,
1373 Convert__Reg1_1__Imm1_3__imm_95_13,
1374 Convert__regG0__Reg1_0__imm_95_5,
1375 Convert__regG0__Imm1_0__imm_95_5,
1376 Convert__regG0__Reg1_1__imm_95_5,
1377 Convert__regG0__Imm1_1__imm_95_5,
1378 Convert__Reg1_0__Reg1_2__imm_95_5,
1379 Convert__Reg1_0__Imm1_2__imm_95_5,
1380 Convert__Reg1_1__Reg1_3__imm_95_5,
1381 Convert__Reg1_1__Imm1_3__imm_95_5,
1382 Convert__regG0__Reg1_0__imm_95_1,
1383 Convert__regG0__Imm1_0__imm_95_1,
1384 Convert__regG0__Reg1_1__imm_95_1,
1385 Convert__regG0__Imm1_1__imm_95_1,
1386 Convert__Reg1_0__Reg1_2__imm_95_1,
1387 Convert__Reg1_0__Imm1_2__imm_95_1,
1388 Convert__Reg1_1__Reg1_3__imm_95_1,
1389 Convert__Reg1_1__Imm1_3__imm_95_1,
1390 Convert__regG0__Reg1_0__imm_95_10,
1391 Convert__regG0__Imm1_0__imm_95_10,
1392 Convert__regG0__Reg1_1__imm_95_10,
1393 Convert__regG0__Imm1_1__imm_95_10,
1394 Convert__Reg1_0__Reg1_2__imm_95_10,
1395 Convert__Reg1_0__Imm1_2__imm_95_10,
1396 Convert__Reg1_1__Reg1_3__imm_95_10,
1397 Convert__Reg1_1__Imm1_3__imm_95_10,
1398 Convert__regG0__Reg1_0__imm_95_11,
1399 Convert__regG0__Imm1_0__imm_95_11,
1400 Convert__regG0__Reg1_1__imm_95_11,
1401 Convert__regG0__Imm1_1__imm_95_11,
1402 Convert__Reg1_0__Reg1_2__imm_95_11,
1403 Convert__Reg1_0__Imm1_2__imm_95_11,
1404 Convert__Reg1_1__Reg1_3__imm_95_11,
1405 Convert__Reg1_1__Imm1_3__imm_95_11,
1406 Convert__regG0__Reg1_0__imm_95_12,
1407 Convert__regG0__Imm1_0__imm_95_12,
1408 Convert__regG0__Reg1_1__imm_95_12,
1409 Convert__regG0__Imm1_1__imm_95_12,
1410 Convert__Reg1_0__Reg1_2__imm_95_12,
1411 Convert__Reg1_0__Imm1_2__imm_95_12,
1412 Convert__Reg1_1__Reg1_3__imm_95_12,
1413 Convert__Reg1_1__Imm1_3__imm_95_12,
1414 Convert__regG0__Reg1_0__imm_95_3,
1415 Convert__regG0__Imm1_0__imm_95_3,
1416 Convert__regG0__Reg1_1__imm_95_3,
1417 Convert__regG0__Imm1_1__imm_95_3,
1418 Convert__Reg1_0__Reg1_2__imm_95_3,
1419 Convert__Reg1_0__Imm1_2__imm_95_3,
1420 Convert__Reg1_1__Reg1_3__imm_95_3,
1421 Convert__Reg1_1__Imm1_3__imm_95_3,
1422 Convert__regG0__Reg1_0__imm_95_2,
1423 Convert__regG0__Imm1_0__imm_95_2,
1424 Convert__regG0__Reg1_1__imm_95_2,
1425 Convert__regG0__Imm1_1__imm_95_2,
1426 Convert__Reg1_0__Reg1_2__imm_95_2,
1427 Convert__Reg1_0__Imm1_2__imm_95_2,
1428 Convert__Reg1_1__Reg1_3__imm_95_2,
1429 Convert__Reg1_1__Imm1_3__imm_95_2,
1430 Convert__regG0__Reg1_0__imm_95_4,
1431 Convert__regG0__Imm1_0__imm_95_4,
1432 Convert__regG0__Reg1_1__imm_95_4,
1433 Convert__regG0__Imm1_1__imm_95_4,
1434 Convert__Reg1_0__Reg1_2__imm_95_4,
1435 Convert__Reg1_0__Imm1_2__imm_95_4,
1436 Convert__Reg1_1__Reg1_3__imm_95_4,
1437 Convert__Reg1_1__Imm1_3__imm_95_4,
1438 Convert__regG0__Reg1_0__imm_95_0,
1439 Convert__regG0__Imm1_0__imm_95_0,
1440 Convert__regG0__Reg1_1__imm_95_0,
1441 Convert__regG0__Imm1_1__imm_95_0,
1442 Convert__Reg1_0__Reg1_2__imm_95_0,
1443 Convert__Reg1_0__Imm1_2__imm_95_0,
1444 Convert__Reg1_1__Reg1_3__imm_95_0,
1445 Convert__Reg1_1__Imm1_3__imm_95_0,
1446 Convert__regG0__Reg1_0__imm_95_9,
1447 Convert__regG0__Imm1_0__imm_95_9,
1448 Convert__regG0__Reg1_1__imm_95_9,
1449 Convert__regG0__Imm1_1__imm_95_9,
1450 Convert__Reg1_0__Reg1_2__imm_95_9,
1451 Convert__Reg1_0__Imm1_2__imm_95_9,
1452 Convert__Reg1_1__Reg1_3__imm_95_9,
1453 Convert__Reg1_1__Imm1_3__imm_95_9,
1454 Convert__regG0__Reg1_0__imm_95_6,
1455 Convert__regG0__Imm1_0__imm_95_6,
1456 Convert__regG0__Reg1_1__imm_95_6,
1457 Convert__regG0__Imm1_1__imm_95_6,
1458 Convert__Reg1_0__Reg1_2__imm_95_6,
1459 Convert__Reg1_0__Imm1_2__imm_95_6,
1460 Convert__Reg1_1__Reg1_3__imm_95_6,
1461 Convert__Reg1_1__Imm1_3__imm_95_6,
1462 Convert__regG0__Reg1_0__imm_95_14,
1463 Convert__regG0__Imm1_0__imm_95_14,
1464 Convert__regG0__Reg1_1__imm_95_14,
1465 Convert__regG0__Imm1_1__imm_95_14,
1466 Convert__Reg1_0__Reg1_2__imm_95_14,
1467 Convert__Reg1_0__Imm1_2__imm_95_14,
1468 Convert__Reg1_1__Reg1_3__imm_95_14,
1469 Convert__Reg1_1__Imm1_3__imm_95_14,
1470 Convert__regG0__Reg1_0__regG0,
1471 Convert__regG0__Reg1_0__imm_95_15,
1472 Convert__regG0__Imm1_0__imm_95_15,
1473 Convert__regG0__Reg1_1__imm_95_15,
1474 Convert__regG0__Imm1_1__imm_95_15,
1475 Convert__Reg1_0__Reg1_2__imm_95_15,
1476 Convert__Reg1_0__Imm1_2__imm_95_15,
1477 Convert__Reg1_1__Reg1_3__imm_95_15,
1478 Convert__Reg1_1__Imm1_3__imm_95_15,
1479 Convert__regG0__Reg1_0__imm_95_7,
1480 Convert__regG0__Imm1_0__imm_95_7,
1481 Convert__regG0__Reg1_1__imm_95_7,
1482 Convert__regG0__Imm1_1__imm_95_7,
1483 Convert__Reg1_0__Reg1_2__imm_95_7,
1484 Convert__Reg1_0__Imm1_2__imm_95_7,
1485 Convert__Reg1_1__Reg1_3__imm_95_7,
1486 Convert__Reg1_1__Imm1_3__imm_95_7,
1487 CVT_NUM_SIGNATURES
1488};
1489
1490} // end anonymous namespace
1491
1492static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
1493 // Convert__Reg1_2__Reg1_0__Reg1_1
1494 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1495 // Convert__Reg1_2__Reg1_0__Imm1_1
1496 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1497 // Convert__Reg1_2__Reg1_0__Reg1_1__TailRelocSymAdd_TLS1_3
1498 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addTailRelocSymOperands, 4, CVT_Done },
1499 // Convert__Reg1_2__Reg1_1__Imm1_0
1500 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1501 // Convert__Imm1_0__imm_95_8
1502 { CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
1503 // Convert__Imm1_1__imm_95_8
1504 { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
1505 // Convert__Imm1_1__Imm1_0
1506 { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
1507 // Convert__Imm1_2__imm_95_8
1508 { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
1509 // Convert__Imm1_2__Imm1_0
1510 { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
1511 // Convert__Imm1_3__imm_95_8
1512 { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
1513 // Convert__Imm1_3__Imm1_0
1514 { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
1515 // Convert__Imm1_4__Imm1_0
1516 { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
1517 // Convert__Imm1_0
1518 { CVT_95_addImmOperands, 1, CVT_Done },
1519 // Convert__Imm1_0__imm_95_13
1520 { CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
1521 // Convert__Imm1_1__imm_95_13
1522 { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
1523 // Convert__Imm1_2__imm_95_13
1524 { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
1525 // Convert__Imm1_3__imm_95_13
1526 { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
1527 // Convert__Reg1_1__Reg1_1__Reg1_0
1528 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
1529 // Convert__Reg1_1__Reg1_1__Imm1_0
1530 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1531 // Convert__Imm1_0__imm_95_5
1532 { CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
1533 // Convert__Imm1_1__imm_95_5
1534 { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
1535 // Convert__Imm1_2__imm_95_5
1536 { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
1537 // Convert__Imm1_3__imm_95_5
1538 { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
1539 // Convert__Imm1_0__imm_95_1
1540 { CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
1541 // Convert__Imm1_1__imm_95_1
1542 { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
1543 // Convert__Imm1_2__imm_95_1
1544 { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
1545 // Convert__Imm1_3__imm_95_1
1546 { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
1547 // Convert__Imm1_0__imm_95_10
1548 { CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
1549 // Convert__Imm1_1__imm_95_10
1550 { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
1551 // Convert__Imm1_2__imm_95_10
1552 { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
1553 // Convert__Imm1_3__imm_95_10
1554 { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
1555 // Convert__Imm1_0__imm_95_11
1556 { CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
1557 // Convert__Imm1_1__imm_95_11
1558 { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
1559 // Convert__Imm1_2__imm_95_11
1560 { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
1561 // Convert__Imm1_3__imm_95_11
1562 { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
1563 // Convert__Imm1_0__imm_95_12
1564 { CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
1565 // Convert__Imm1_1__imm_95_12
1566 { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
1567 // Convert__Imm1_2__imm_95_12
1568 { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
1569 // Convert__Imm1_3__imm_95_12
1570 { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
1571 // Convert__Imm1_0__imm_95_3
1572 { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
1573 // Convert__Imm1_1__imm_95_3
1574 { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
1575 // Convert__Imm1_2__imm_95_3
1576 { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
1577 // Convert__Imm1_3__imm_95_3
1578 { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
1579 // Convert__Imm1_0__imm_95_2
1580 { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
1581 // Convert__Imm1_1__imm_95_2
1582 { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
1583 // Convert__Imm1_2__imm_95_2
1584 { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
1585 // Convert__Imm1_3__imm_95_2
1586 { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
1587 // Convert__Imm1_0__imm_95_4
1588 { CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
1589 // Convert__Imm1_1__imm_95_4
1590 { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
1591 // Convert__Imm1_2__imm_95_4
1592 { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
1593 // Convert__Imm1_3__imm_95_4
1594 { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
1595 // Convert__Imm1_0__imm_95_0
1596 { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
1597 // Convert__Imm1_1__imm_95_0
1598 { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
1599 // Convert__Imm1_2__imm_95_0
1600 { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
1601 // Convert__Imm1_3__imm_95_0
1602 { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
1603 // Convert__Imm1_0__imm_95_9
1604 { CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
1605 // Convert__Imm1_1__imm_95_9
1606 { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
1607 // Convert__Imm1_2__imm_95_9
1608 { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
1609 // Convert__Imm1_3__imm_95_9
1610 { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
1611 // Convert__Imm1_0__imm_95_6
1612 { CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
1613 // Convert__Imm1_1__imm_95_6
1614 { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
1615 // Convert__Imm1_2__imm_95_6
1616 { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
1617 // Convert__Imm1_3__imm_95_6
1618 { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
1619 // Convert__Imm1_0__imm_95_14
1620 { CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
1621 // Convert__Imm1_1__imm_95_14
1622 { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
1623 // Convert__Imm1_2__imm_95_14
1624 { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
1625 // Convert__Imm1_3__imm_95_14
1626 { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
1627 // Convert__Imm1_2__Imm1_0__Reg1_1
1628 { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_Done },
1629 // Convert__Imm1_3__Imm1_0__Reg1_2
1630 { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_95_Reg, 3, CVT_Done },
1631 // Convert__Imm1_4__Imm1_0__Reg1_3
1632 { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_95_Reg, 4, CVT_Done },
1633 // Convert__Imm1_1__imm_95_1__Reg1_0
1634 { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_95_Reg, 1, CVT_Done },
1635 // Convert__Imm1_2__imm_95_1__Reg1_1
1636 { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_95_Reg, 2, CVT_Done },
1637 // Convert__Imm1_3__imm_95_1__Reg1_2
1638 { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_95_Reg, 3, CVT_Done },
1639 // Convert__Imm1_1__imm_95_7__Reg1_0
1640 { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_95_Reg, 1, CVT_Done },
1641 // Convert__Imm1_2__imm_95_7__Reg1_1
1642 { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_95_Reg, 2, CVT_Done },
1643 // Convert__Imm1_3__imm_95_7__Reg1_2
1644 { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_95_Reg, 3, CVT_Done },
1645 // Convert__Imm1_1__imm_95_6__Reg1_0
1646 { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_95_Reg, 1, CVT_Done },
1647 // Convert__Imm1_2__imm_95_6__Reg1_1
1648 { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_95_Reg, 2, CVT_Done },
1649 // Convert__Imm1_3__imm_95_6__Reg1_2
1650 { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_95_Reg, 3, CVT_Done },
1651 // Convert__Imm1_1__imm_95_2__Reg1_0
1652 { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_95_Reg, 1, CVT_Done },
1653 // Convert__Imm1_2__imm_95_2__Reg1_1
1654 { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_95_Reg, 2, CVT_Done },
1655 // Convert__Imm1_3__imm_95_2__Reg1_2
1656 { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_95_Reg, 3, CVT_Done },
1657 // Convert__Imm1_1__imm_95_3__Reg1_0
1658 { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_95_Reg, 1, CVT_Done },
1659 // Convert__Imm1_2__imm_95_3__Reg1_1
1660 { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_95_Reg, 2, CVT_Done },
1661 // Convert__Imm1_3__imm_95_3__Reg1_2
1662 { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_95_Reg, 3, CVT_Done },
1663 // Convert__Imm1_1__imm_95_5__Reg1_0
1664 { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_95_Reg, 1, CVT_Done },
1665 // Convert__Imm1_2__imm_95_5__Reg1_1
1666 { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_95_Reg, 2, CVT_Done },
1667 // Convert__Imm1_3__imm_95_5__Reg1_2
1668 { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_95_Reg, 3, CVT_Done },
1669 // Convert__regG0__Reg1_1__Reg1_0
1670 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
1671 // Convert__regG0__Reg1_1__Imm1_0
1672 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1673 // Convert__Imm1_0__imm_95_15
1674 { CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
1675 // Convert__Imm1_1__imm_95_15
1676 { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
1677 // Convert__Imm1_2__imm_95_15
1678 { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
1679 // Convert__Imm1_3__imm_95_15
1680 { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
1681 // Convert__Imm1_0__imm_95_7
1682 { CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
1683 // Convert__Imm1_1__imm_95_7
1684 { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
1685 // Convert__Imm1_2__imm_95_7
1686 { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
1687 // Convert__Imm1_3__imm_95_7
1688 { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
1689 // Convert__CallTarget1_0
1690 { CVT_95_addCallTargetOperands, 1, CVT_Done },
1691 // Convert__regO7__MEMri2_0
1692 { CVT_regO7, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
1693 // Convert__regO7__MEMrr2_0
1694 { CVT_regO7, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
1695 // Convert__CallTarget1_0__TailRelocSymCall_TLS1_1
1696 { CVT_95_addCallTargetOperands, 1, CVT_95_addTailRelocSymOperands, 2, CVT_Done },
1697 // Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_128
1698 { CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_5_5, CVT_imm_95_128, 0, CVT_Done },
1699 // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1
1700 { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_Done },
1701 // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__ASITag1_3
1702 { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_addASITagOperands, 4, CVT_Done },
1703 // Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_136
1704 { CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_5_5, CVT_imm_95_136, 0, CVT_Done },
1705 // Convert__Reg1_0__regG0__regG0
1706 { CVT_95_Reg, 1, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
1707 // Convert__MEMri2_1__regG0
1708 { CVT_95_addMEMriOperands, 2, CVT_regG0, 0, CVT_Done },
1709 // Convert__MEMrr2_1__regG0
1710 { CVT_95_addMEMrrOperands, 2, CVT_regG0, 0, CVT_Done },
1711 // Convert__Reg1_0
1712 { CVT_95_Reg, 1, CVT_Done },
1713 // Convert__regG0__Reg1_0__Reg1_1
1714 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1715 // Convert__regG0__Reg1_0__Imm1_1
1716 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1717 // Convert__Reg1_0__Reg1_0__imm_95_1
1718 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
1719 // Convert_NoOperands
1720 { CVT_Done },
1721 // Convert__Reg1_1__Reg1_0
1722 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
1723 // Convert__Imm1_1__imm_95_8__Reg1_0
1724 { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_95_Reg, 1, CVT_Done },
1725 // Convert__Imm1_2__imm_95_8__Reg1_1
1726 { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_95_Reg, 2, CVT_Done },
1727 // Convert__Imm1_3__imm_95_8__Reg1_2
1728 { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_95_Reg, 3, CVT_Done },
1729 // Convert__Imm1_1__imm_95_9__Reg1_0
1730 { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_95_Reg, 1, CVT_Done },
1731 // Convert__Imm1_2__imm_95_9__Reg1_1
1732 { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_95_Reg, 2, CVT_Done },
1733 // Convert__Imm1_3__imm_95_9__Reg1_2
1734 { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_95_Reg, 3, CVT_Done },
1735 // Convert__Imm1_1__imm_95_11__Reg1_0
1736 { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_95_Reg, 1, CVT_Done },
1737 // Convert__Imm1_2__imm_95_11__Reg1_1
1738 { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_95_Reg, 2, CVT_Done },
1739 // Convert__Imm1_3__imm_95_11__Reg1_2
1740 { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_95_Reg, 3, CVT_Done },
1741 // Convert__Imm1_1__imm_95_4__Reg1_0
1742 { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_95_Reg, 1, CVT_Done },
1743 // Convert__Imm1_2__imm_95_4__Reg1_1
1744 { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_95_Reg, 2, CVT_Done },
1745 // Convert__Imm1_3__imm_95_4__Reg1_2
1746 { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_95_Reg, 3, CVT_Done },
1747 // Convert__Imm1_1__imm_95_13__Reg1_0
1748 { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_95_Reg, 1, CVT_Done },
1749 // Convert__Imm1_2__imm_95_13__Reg1_1
1750 { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_95_Reg, 2, CVT_Done },
1751 // Convert__Imm1_3__imm_95_13__Reg1_2
1752 { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_95_Reg, 3, CVT_Done },
1753 // Convert__Imm1_1__imm_95_0__Reg1_0
1754 { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_95_Reg, 1, CVT_Done },
1755 // Convert__Imm1_2__imm_95_0__Reg1_1
1756 { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_Done },
1757 // Convert__Imm1_3__imm_95_0__Reg1_2
1758 { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_95_Reg, 3, CVT_Done },
1759 // Convert__Imm1_1__imm_95_15__Reg1_0
1760 { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_95_Reg, 1, CVT_Done },
1761 // Convert__Imm1_2__imm_95_15__Reg1_1
1762 { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_95_Reg, 2, CVT_Done },
1763 // Convert__Imm1_3__imm_95_15__Reg1_2
1764 { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_95_Reg, 3, CVT_Done },
1765 // Convert__Imm1_1__imm_95_10__Reg1_0
1766 { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_95_Reg, 1, CVT_Done },
1767 // Convert__Imm1_2__imm_95_10__Reg1_1
1768 { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_95_Reg, 2, CVT_Done },
1769 // Convert__Imm1_3__imm_95_10__Reg1_2
1770 { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_95_Reg, 3, CVT_Done },
1771 // Convert__Imm1_1__imm_95_12__Reg1_0
1772 { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_95_Reg, 1, CVT_Done },
1773 // Convert__Imm1_2__imm_95_12__Reg1_1
1774 { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_95_Reg, 2, CVT_Done },
1775 // Convert__Imm1_3__imm_95_12__Reg1_2
1776 { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_95_Reg, 3, CVT_Done },
1777 // Convert__Imm1_1__imm_95_14__Reg1_0
1778 { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_95_Reg, 1, CVT_Done },
1779 // Convert__Imm1_2__imm_95_14__Reg1_1
1780 { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_95_Reg, 2, CVT_Done },
1781 // Convert__Imm1_3__imm_95_14__Reg1_2
1782 { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_95_Reg, 3, CVT_Done },
1783 // Convert__regFCC0__Reg1_0__Reg1_1
1784 { CVT_regFCC0, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1785 // Convert__Reg1_0__Reg1_1__Reg1_2
1786 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1787 // Convert__MEMri2_0
1788 { CVT_95_addMEMriOperands, 1, CVT_Done },
1789 // Convert__MEMrr2_0
1790 { CVT_95_addMEMrrOperands, 1, CVT_Done },
1791 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8
1792 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1793 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8
1794 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1795 // Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0
1796 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1797 // Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0
1798 { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1799 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13
1800 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1801 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5
1802 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1803 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1
1804 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1805 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9
1806 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1807 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10
1808 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1809 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6
1810 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1811 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11
1812 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1813 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11
1814 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1815 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12
1816 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1817 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3
1818 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1819 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4
1820 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1821 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2
1822 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1823 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13
1824 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1825 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4
1826 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1827 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2
1828 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1829 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0
1830 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1831 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0
1832 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1833 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9
1834 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1835 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1
1836 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1837 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6
1838 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1839 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15
1840 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1841 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14
1842 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1843 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7
1844 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1845 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10
1846 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1847 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5
1848 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1849 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12
1850 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1851 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3
1852 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1853 // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14
1854 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1855 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15
1856 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1857 // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7
1858 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1859 // Convert__Reg1_0__Tie0_1_1
1860 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
1861 // Convert__regG0__MEMri2_0
1862 { CVT_regG0, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
1863 // Convert__regG0__MEMrr2_0
1864 { CVT_regG0, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
1865 // Convert__Reg1_1__MEMri2_0
1866 { CVT_95_Reg, 2, CVT_95_addMEMriOperands, 1, CVT_Done },
1867 // Convert__Reg1_1__MEMrr2_0
1868 { CVT_95_Reg, 2, CVT_95_addMEMrrOperands, 1, CVT_Done },
1869 // Convert__MEMri2_1
1870 { CVT_95_addMEMriOperands, 2, CVT_Done },
1871 // Convert__Reg1_3__MEMri2_1
1872 { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Done },
1873 // Convert__MEMrr2_1
1874 { CVT_95_addMEMrrOperands, 2, CVT_Done },
1875 // Convert__Reg1_3__MEMrr2_1
1876 { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Done },
1877 // Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_GOT1_4
1878 { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_95_addTailRelocSymOperands, 5, CVT_Done },
1879 // Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_TLS1_4
1880 { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_95_addTailRelocSymOperands, 5, CVT_Done },
1881 // Convert__Reg1_4__MEMri2_1
1882 { CVT_95_Reg, 5, CVT_95_addMEMriOperands, 2, CVT_Done },
1883 // Convert__Reg1_4__MEMrr2_1__ASITag1_3
1884 { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addASITagOperands, 4, CVT_Done },
1885 // Convert__MembarTag1_0
1886 { CVT_95_addMembarTagOperands, 1, CVT_Done },
1887 // Convert__Reg1_1
1888 { CVT_95_Reg, 2, CVT_Done },
1889 // Convert__regG0__Reg1_0
1890 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1891 // Convert__Reg1_1__regG0__Reg1_0
1892 { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1893 // Convert__regG0__Imm1_0
1894 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1895 // Convert__Reg1_1__regG0__Imm1_0
1896 { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1897 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8
1898 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1899 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8
1900 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1901 // Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0
1902 { CVT_95_Reg, 4, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1903 // Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0
1904 { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1905 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13
1906 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1907 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5
1908 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1909 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1
1910 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1911 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9
1912 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1913 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10
1914 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1915 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6
1916 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1917 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11
1918 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1919 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11
1920 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1921 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12
1922 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1923 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3
1924 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1925 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4
1926 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1927 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2
1928 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1929 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13
1930 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1931 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4
1932 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1933 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2
1934 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1935 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0
1936 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1937 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0
1938 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1939 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9
1940 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1941 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1
1942 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1943 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6
1944 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1945 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15
1946 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1947 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14
1948 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1949 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7
1950 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1951 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3
1952 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1953 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5
1954 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1955 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10
1956 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1957 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12
1958 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1959 // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14
1960 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1961 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15
1962 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1963 // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7
1964 { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1965 // Convert__Reg1_0__regG0__Reg1_0
1966 { CVT_95_Reg, 1, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1967 // Convert__Reg1_0__Reg1_0__regG0
1968 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1969 // Convert__Reg1_1__Reg1_0__regG0
1970 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1971 // Convert__MEMri2_1__PrefetchTag1_3
1972 { CVT_95_addMEMriOperands, 2, CVT_95_addPrefetchTagOperands, 4, CVT_Done },
1973 // Convert__MEMrr2_1__PrefetchTag1_3
1974 { CVT_95_addMEMrrOperands, 2, CVT_95_addPrefetchTagOperands, 4, CVT_Done },
1975 // Convert__MEMri2_1__PrefetchTag1_4
1976 { CVT_95_addMEMriOperands, 2, CVT_95_addPrefetchTagOperands, 5, CVT_Done },
1977 // Convert__MEMrr2_1__ASITag1_3__PrefetchTag1_4
1978 { CVT_95_addMEMrrOperands, 2, CVT_95_addASITagOperands, 4, CVT_95_addPrefetchTagOperands, 5, CVT_Done },
1979 // Convert__Reg1_0__Reg1_1
1980 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1981 // Convert__Reg1_0__Imm1_1
1982 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
1983 // Convert__regG0__regG0__regG0
1984 { CVT_regG0, 0, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
1985 // Convert__imm_95_8
1986 { CVT_imm_95_8, 0, CVT_Done },
1987 // Convert__Reg1_1__Imm1_0
1988 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1989 // Convert__Reg1_2__Imm1_0__Reg1_1
1990 { CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_Done },
1991 // Convert__imm_95_0
1992 { CVT_imm_95_0, 0, CVT_Done },
1993 // Convert__Reg1_2__Reg1_0__ShiftAmtImm51_1
1994 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addShiftAmtImm5Operands, 2, CVT_Done },
1995 // Convert__Reg1_2__Reg1_0__ShiftAmtImm61_1
1996 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addShiftAmtImm6Operands, 2, CVT_Done },
1997 // Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0
1998 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
1999 // Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0
2000 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
2001 // Convert__MEMri2_2
2002 { CVT_95_addMEMriOperands, 3, CVT_Done },
2003 // Convert__MEMrr2_2
2004 { CVT_95_addMEMrrOperands, 3, CVT_Done },
2005 // Convert__MEMri2_2__Reg1_0
2006 { CVT_95_addMEMriOperands, 3, CVT_95_Reg, 1, CVT_Done },
2007 // Convert__MEMrr2_2__Reg1_0
2008 { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_Done },
2009 // Convert__MEMrr2_2__Reg1_0__ASITag1_4
2010 { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_95_addASITagOperands, 5, CVT_Done },
2011 // Convert__Reg1_3__MEMri2_1__Tie0_1_1
2012 { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
2013 // Convert__Reg1_3__MEMrr2_1__Tie0_1_1
2014 { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
2015 // Convert__Reg1_4__MEMri2_1__Tie0_1_1
2016 { CVT_95_Reg, 5, CVT_95_addMEMriOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
2017 // Convert__Reg1_4__MEMrr2_1__ASITag1_3__Tie0_1_1
2018 { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addASITagOperands, 4, CVT_Tied, Tie0_1_1, CVT_Done },
2019 // Convert__regG0__Reg1_0__imm_95_8
2020 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
2021 // Convert__regG0__Imm1_0__imm_95_8
2022 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
2023 // Convert__regG0__Reg1_1__imm_95_8
2024 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done },
2025 // Convert__regG0__Imm1_1__imm_95_8
2026 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
2027 // Convert__Reg1_0__Reg1_2__imm_95_8
2028 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_8, 0, CVT_Done },
2029 // Convert__Reg1_0__Imm1_2__imm_95_8
2030 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
2031 // Convert__Reg1_1__Reg1_3__imm_95_8
2032 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_8, 0, CVT_Done },
2033 // Convert__Reg1_1__Imm1_3__imm_95_8
2034 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
2035 // Convert__Reg1_1__Reg1_3__Imm1_0
2036 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
2037 // Convert__Reg1_1__Imm1_3__Imm1_0
2038 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
2039 // Convert__Reg1_2__Reg1_4__Imm1_0
2040 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
2041 // Convert__Reg1_2__Imm1_4__Imm1_0
2042 { CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
2043 // Convert__regG0__Reg1_0__imm_95_13
2044 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
2045 // Convert__regG0__Imm1_0__imm_95_13
2046 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
2047 // Convert__regG0__Reg1_1__imm_95_13
2048 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done },
2049 // Convert__regG0__Imm1_1__imm_95_13
2050 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
2051 // Convert__Reg1_0__Reg1_2__imm_95_13
2052 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_13, 0, CVT_Done },
2053 // Convert__Reg1_0__Imm1_2__imm_95_13
2054 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
2055 // Convert__Reg1_1__Reg1_3__imm_95_13
2056 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_13, 0, CVT_Done },
2057 // Convert__Reg1_1__Imm1_3__imm_95_13
2058 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
2059 // Convert__regG0__Reg1_0__imm_95_5
2060 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
2061 // Convert__regG0__Imm1_0__imm_95_5
2062 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
2063 // Convert__regG0__Reg1_1__imm_95_5
2064 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done },
2065 // Convert__regG0__Imm1_1__imm_95_5
2066 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
2067 // Convert__Reg1_0__Reg1_2__imm_95_5
2068 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_5, 0, CVT_Done },
2069 // Convert__Reg1_0__Imm1_2__imm_95_5
2070 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
2071 // Convert__Reg1_1__Reg1_3__imm_95_5
2072 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_5, 0, CVT_Done },
2073 // Convert__Reg1_1__Imm1_3__imm_95_5
2074 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
2075 // Convert__regG0__Reg1_0__imm_95_1
2076 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
2077 // Convert__regG0__Imm1_0__imm_95_1
2078 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
2079 // Convert__regG0__Reg1_1__imm_95_1
2080 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
2081 // Convert__regG0__Imm1_1__imm_95_1
2082 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
2083 // Convert__Reg1_0__Reg1_2__imm_95_1
2084 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
2085 // Convert__Reg1_0__Imm1_2__imm_95_1
2086 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
2087 // Convert__Reg1_1__Reg1_3__imm_95_1
2088 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_1, 0, CVT_Done },
2089 // Convert__Reg1_1__Imm1_3__imm_95_1
2090 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
2091 // Convert__regG0__Reg1_0__imm_95_10
2092 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
2093 // Convert__regG0__Imm1_0__imm_95_10
2094 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
2095 // Convert__regG0__Reg1_1__imm_95_10
2096 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done },
2097 // Convert__regG0__Imm1_1__imm_95_10
2098 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
2099 // Convert__Reg1_0__Reg1_2__imm_95_10
2100 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_10, 0, CVT_Done },
2101 // Convert__Reg1_0__Imm1_2__imm_95_10
2102 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
2103 // Convert__Reg1_1__Reg1_3__imm_95_10
2104 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_10, 0, CVT_Done },
2105 // Convert__Reg1_1__Imm1_3__imm_95_10
2106 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
2107 // Convert__regG0__Reg1_0__imm_95_11
2108 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
2109 // Convert__regG0__Imm1_0__imm_95_11
2110 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
2111 // Convert__regG0__Reg1_1__imm_95_11
2112 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done },
2113 // Convert__regG0__Imm1_1__imm_95_11
2114 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
2115 // Convert__Reg1_0__Reg1_2__imm_95_11
2116 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_11, 0, CVT_Done },
2117 // Convert__Reg1_0__Imm1_2__imm_95_11
2118 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
2119 // Convert__Reg1_1__Reg1_3__imm_95_11
2120 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_11, 0, CVT_Done },
2121 // Convert__Reg1_1__Imm1_3__imm_95_11
2122 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
2123 // Convert__regG0__Reg1_0__imm_95_12
2124 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
2125 // Convert__regG0__Imm1_0__imm_95_12
2126 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
2127 // Convert__regG0__Reg1_1__imm_95_12
2128 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done },
2129 // Convert__regG0__Imm1_1__imm_95_12
2130 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
2131 // Convert__Reg1_0__Reg1_2__imm_95_12
2132 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_12, 0, CVT_Done },
2133 // Convert__Reg1_0__Imm1_2__imm_95_12
2134 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
2135 // Convert__Reg1_1__Reg1_3__imm_95_12
2136 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_12, 0, CVT_Done },
2137 // Convert__Reg1_1__Imm1_3__imm_95_12
2138 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
2139 // Convert__regG0__Reg1_0__imm_95_3
2140 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
2141 // Convert__regG0__Imm1_0__imm_95_3
2142 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
2143 // Convert__regG0__Reg1_1__imm_95_3
2144 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done },
2145 // Convert__regG0__Imm1_1__imm_95_3
2146 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
2147 // Convert__Reg1_0__Reg1_2__imm_95_3
2148 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_3, 0, CVT_Done },
2149 // Convert__Reg1_0__Imm1_2__imm_95_3
2150 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
2151 // Convert__Reg1_1__Reg1_3__imm_95_3
2152 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_3, 0, CVT_Done },
2153 // Convert__Reg1_1__Imm1_3__imm_95_3
2154 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
2155 // Convert__regG0__Reg1_0__imm_95_2
2156 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
2157 // Convert__regG0__Imm1_0__imm_95_2
2158 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
2159 // Convert__regG0__Reg1_1__imm_95_2
2160 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done },
2161 // Convert__regG0__Imm1_1__imm_95_2
2162 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
2163 // Convert__Reg1_0__Reg1_2__imm_95_2
2164 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_2, 0, CVT_Done },
2165 // Convert__Reg1_0__Imm1_2__imm_95_2
2166 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
2167 // Convert__Reg1_1__Reg1_3__imm_95_2
2168 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_2, 0, CVT_Done },
2169 // Convert__Reg1_1__Imm1_3__imm_95_2
2170 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
2171 // Convert__regG0__Reg1_0__imm_95_4
2172 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
2173 // Convert__regG0__Imm1_0__imm_95_4
2174 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
2175 // Convert__regG0__Reg1_1__imm_95_4
2176 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done },
2177 // Convert__regG0__Imm1_1__imm_95_4
2178 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
2179 // Convert__Reg1_0__Reg1_2__imm_95_4
2180 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_4, 0, CVT_Done },
2181 // Convert__Reg1_0__Imm1_2__imm_95_4
2182 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
2183 // Convert__Reg1_1__Reg1_3__imm_95_4
2184 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_4, 0, CVT_Done },
2185 // Convert__Reg1_1__Imm1_3__imm_95_4
2186 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
2187 // Convert__regG0__Reg1_0__imm_95_0
2188 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
2189 // Convert__regG0__Imm1_0__imm_95_0
2190 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
2191 // Convert__regG0__Reg1_1__imm_95_0
2192 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
2193 // Convert__regG0__Imm1_1__imm_95_0
2194 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
2195 // Convert__Reg1_0__Reg1_2__imm_95_0
2196 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
2197 // Convert__Reg1_0__Imm1_2__imm_95_0
2198 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
2199 // Convert__Reg1_1__Reg1_3__imm_95_0
2200 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done },
2201 // Convert__Reg1_1__Imm1_3__imm_95_0
2202 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
2203 // Convert__regG0__Reg1_0__imm_95_9
2204 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
2205 // Convert__regG0__Imm1_0__imm_95_9
2206 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
2207 // Convert__regG0__Reg1_1__imm_95_9
2208 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done },
2209 // Convert__regG0__Imm1_1__imm_95_9
2210 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
2211 // Convert__Reg1_0__Reg1_2__imm_95_9
2212 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_9, 0, CVT_Done },
2213 // Convert__Reg1_0__Imm1_2__imm_95_9
2214 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
2215 // Convert__Reg1_1__Reg1_3__imm_95_9
2216 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_9, 0, CVT_Done },
2217 // Convert__Reg1_1__Imm1_3__imm_95_9
2218 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
2219 // Convert__regG0__Reg1_0__imm_95_6
2220 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
2221 // Convert__regG0__Imm1_0__imm_95_6
2222 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
2223 // Convert__regG0__Reg1_1__imm_95_6
2224 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done },
2225 // Convert__regG0__Imm1_1__imm_95_6
2226 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
2227 // Convert__Reg1_0__Reg1_2__imm_95_6
2228 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_6, 0, CVT_Done },
2229 // Convert__Reg1_0__Imm1_2__imm_95_6
2230 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
2231 // Convert__Reg1_1__Reg1_3__imm_95_6
2232 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_6, 0, CVT_Done },
2233 // Convert__Reg1_1__Imm1_3__imm_95_6
2234 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
2235 // Convert__regG0__Reg1_0__imm_95_14
2236 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
2237 // Convert__regG0__Imm1_0__imm_95_14
2238 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
2239 // Convert__regG0__Reg1_1__imm_95_14
2240 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done },
2241 // Convert__regG0__Imm1_1__imm_95_14
2242 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
2243 // Convert__Reg1_0__Reg1_2__imm_95_14
2244 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_14, 0, CVT_Done },
2245 // Convert__Reg1_0__Imm1_2__imm_95_14
2246 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
2247 // Convert__Reg1_1__Reg1_3__imm_95_14
2248 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_14, 0, CVT_Done },
2249 // Convert__Reg1_1__Imm1_3__imm_95_14
2250 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
2251 // Convert__regG0__Reg1_0__regG0
2252 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
2253 // Convert__regG0__Reg1_0__imm_95_15
2254 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
2255 // Convert__regG0__Imm1_0__imm_95_15
2256 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
2257 // Convert__regG0__Reg1_1__imm_95_15
2258 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done },
2259 // Convert__regG0__Imm1_1__imm_95_15
2260 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
2261 // Convert__Reg1_0__Reg1_2__imm_95_15
2262 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_15, 0, CVT_Done },
2263 // Convert__Reg1_0__Imm1_2__imm_95_15
2264 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
2265 // Convert__Reg1_1__Reg1_3__imm_95_15
2266 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_15, 0, CVT_Done },
2267 // Convert__Reg1_1__Imm1_3__imm_95_15
2268 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
2269 // Convert__regG0__Reg1_0__imm_95_7
2270 { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
2271 // Convert__regG0__Imm1_0__imm_95_7
2272 { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
2273 // Convert__regG0__Reg1_1__imm_95_7
2274 { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done },
2275 // Convert__regG0__Imm1_1__imm_95_7
2276 { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
2277 // Convert__Reg1_0__Reg1_2__imm_95_7
2278 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_7, 0, CVT_Done },
2279 // Convert__Reg1_0__Imm1_2__imm_95_7
2280 { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
2281 // Convert__Reg1_1__Reg1_3__imm_95_7
2282 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_7, 0, CVT_Done },
2283 // Convert__Reg1_1__Imm1_3__imm_95_7
2284 { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
2285};
2286
2287void SparcAsmParser::
2288convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
2289 const OperandVector &Operands) {
2290 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2291 const uint8_t *Converter = ConversionTable[Kind];
2292 Inst.setOpcode(Opcode);
2293 for (const uint8_t *p = Converter; *p; p += 2) {
2294 unsigned OpIdx = *(p + 1);
2295 switch (*p) {
2296 default: llvm_unreachable("invalid conversion entry!");
2297 case CVT_Reg:
2298 static_cast<SparcOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
2299 break;
2300 case CVT_Tied: {
2301 assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) -
2302 std::begin(TiedAsmOperandTable)) &&
2303 "Tied operand not found");
2304 unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0];
2305 if (TiedResOpnd != (uint8_t)-1)
2306 Inst.addOperand(Inst.getOperand(TiedResOpnd));
2307 break;
2308 }
2309 case CVT_95_Reg:
2310 static_cast<SparcOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
2311 break;
2312 case CVT_95_addImmOperands:
2313 static_cast<SparcOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
2314 break;
2315 case CVT_95_addTailRelocSymOperands:
2316 static_cast<SparcOperand &>(*Operands[OpIdx]).addTailRelocSymOperands(Inst, 1);
2317 break;
2318 case CVT_imm_95_8:
2319 Inst.addOperand(MCOperand::createImm(8));
2320 break;
2321 case CVT_imm_95_13:
2322 Inst.addOperand(MCOperand::createImm(13));
2323 break;
2324 case CVT_imm_95_5:
2325 Inst.addOperand(MCOperand::createImm(5));
2326 break;
2327 case CVT_imm_95_1:
2328 Inst.addOperand(MCOperand::createImm(1));
2329 break;
2330 case CVT_imm_95_10:
2331 Inst.addOperand(MCOperand::createImm(10));
2332 break;
2333 case CVT_imm_95_11:
2334 Inst.addOperand(MCOperand::createImm(11));
2335 break;
2336 case CVT_imm_95_12:
2337 Inst.addOperand(MCOperand::createImm(12));
2338 break;
2339 case CVT_imm_95_3:
2340 Inst.addOperand(MCOperand::createImm(3));
2341 break;
2342 case CVT_imm_95_2:
2343 Inst.addOperand(MCOperand::createImm(2));
2344 break;
2345 case CVT_imm_95_4:
2346 Inst.addOperand(MCOperand::createImm(4));
2347 break;
2348 case CVT_imm_95_0:
2349 Inst.addOperand(MCOperand::createImm(0));
2350 break;
2351 case CVT_imm_95_9:
2352 Inst.addOperand(MCOperand::createImm(9));
2353 break;
2354 case CVT_imm_95_6:
2355 Inst.addOperand(MCOperand::createImm(6));
2356 break;
2357 case CVT_imm_95_14:
2358 Inst.addOperand(MCOperand::createImm(14));
2359 break;
2360 case CVT_imm_95_7:
2361 Inst.addOperand(MCOperand::createImm(7));
2362 break;
2363 case CVT_regG0:
2364 Inst.addOperand(MCOperand::createReg(SP::G0));
2365 break;
2366 case CVT_imm_95_15:
2367 Inst.addOperand(MCOperand::createImm(15));
2368 break;
2369 case CVT_95_addCallTargetOperands:
2370 static_cast<SparcOperand &>(*Operands[OpIdx]).addCallTargetOperands(Inst, 1);
2371 break;
2372 case CVT_regO7:
2373 Inst.addOperand(MCOperand::createReg(SP::O7));
2374 break;
2375 case CVT_95_addMEMriOperands:
2376 static_cast<SparcOperand &>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
2377 break;
2378 case CVT_95_addMEMrrOperands:
2379 static_cast<SparcOperand &>(*Operands[OpIdx]).addMEMrrOperands(Inst, 2);
2380 break;
2381 case CVT_imm_95_128:
2382 Inst.addOperand(MCOperand::createImm(128));
2383 break;
2384 case CVT_95_addASITagOperands:
2385 static_cast<SparcOperand &>(*Operands[OpIdx]).addASITagOperands(Inst, 1);
2386 break;
2387 case CVT_imm_95_136:
2388 Inst.addOperand(MCOperand::createImm(136));
2389 break;
2390 case CVT_regFCC0:
2391 Inst.addOperand(MCOperand::createReg(SP::FCC0));
2392 break;
2393 case CVT_95_addMembarTagOperands:
2394 static_cast<SparcOperand &>(*Operands[OpIdx]).addMembarTagOperands(Inst, 1);
2395 break;
2396 case CVT_95_addPrefetchTagOperands:
2397 static_cast<SparcOperand &>(*Operands[OpIdx]).addPrefetchTagOperands(Inst, 1);
2398 break;
2399 case CVT_95_addShiftAmtImm5Operands:
2400 static_cast<SparcOperand &>(*Operands[OpIdx]).addShiftAmtImm5Operands(Inst, 1);
2401 break;
2402 case CVT_95_addShiftAmtImm6Operands:
2403 static_cast<SparcOperand &>(*Operands[OpIdx]).addShiftAmtImm6Operands(Inst, 1);
2404 break;
2405 }
2406 }
2407}
2408
2409void SparcAsmParser::
2410convertToMapAndConstraints(unsigned Kind,
2411 const OperandVector &Operands) {
2412 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2413 unsigned NumMCOperands = 0;
2414 const uint8_t *Converter = ConversionTable[Kind];
2415 for (const uint8_t *p = Converter; *p; p += 2) {
2416 switch (*p) {
2417 default: llvm_unreachable("invalid conversion entry!");
2418 case CVT_Reg:
2419 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2420 Operands[*(p + 1)]->setConstraint("r");
2421 ++NumMCOperands;
2422 break;
2423 case CVT_Tied:
2424 ++NumMCOperands;
2425 break;
2426 case CVT_95_Reg:
2427 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2428 Operands[*(p + 1)]->setConstraint("r");
2429 NumMCOperands += 1;
2430 break;
2431 case CVT_95_addImmOperands:
2432 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2433 Operands[*(p + 1)]->setConstraint("m");
2434 NumMCOperands += 1;
2435 break;
2436 case CVT_95_addTailRelocSymOperands:
2437 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2438 Operands[*(p + 1)]->setConstraint("m");
2439 NumMCOperands += 1;
2440 break;
2441 case CVT_imm_95_8:
2442 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2443 Operands[*(p + 1)]->setConstraint("");
2444 ++NumMCOperands;
2445 break;
2446 case CVT_imm_95_13:
2447 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2448 Operands[*(p + 1)]->setConstraint("");
2449 ++NumMCOperands;
2450 break;
2451 case CVT_imm_95_5:
2452 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2453 Operands[*(p + 1)]->setConstraint("");
2454 ++NumMCOperands;
2455 break;
2456 case CVT_imm_95_1:
2457 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2458 Operands[*(p + 1)]->setConstraint("");
2459 ++NumMCOperands;
2460 break;
2461 case CVT_imm_95_10:
2462 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2463 Operands[*(p + 1)]->setConstraint("");
2464 ++NumMCOperands;
2465 break;
2466 case CVT_imm_95_11:
2467 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2468 Operands[*(p + 1)]->setConstraint("");
2469 ++NumMCOperands;
2470 break;
2471 case CVT_imm_95_12:
2472 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2473 Operands[*(p + 1)]->setConstraint("");
2474 ++NumMCOperands;
2475 break;
2476 case CVT_imm_95_3:
2477 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2478 Operands[*(p + 1)]->setConstraint("");
2479 ++NumMCOperands;
2480 break;
2481 case CVT_imm_95_2:
2482 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2483 Operands[*(p + 1)]->setConstraint("");
2484 ++NumMCOperands;
2485 break;
2486 case CVT_imm_95_4:
2487 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2488 Operands[*(p + 1)]->setConstraint("");
2489 ++NumMCOperands;
2490 break;
2491 case CVT_imm_95_0:
2492 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2493 Operands[*(p + 1)]->setConstraint("");
2494 ++NumMCOperands;
2495 break;
2496 case CVT_imm_95_9:
2497 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2498 Operands[*(p + 1)]->setConstraint("");
2499 ++NumMCOperands;
2500 break;
2501 case CVT_imm_95_6:
2502 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2503 Operands[*(p + 1)]->setConstraint("");
2504 ++NumMCOperands;
2505 break;
2506 case CVT_imm_95_14:
2507 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2508 Operands[*(p + 1)]->setConstraint("");
2509 ++NumMCOperands;
2510 break;
2511 case CVT_imm_95_7:
2512 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2513 Operands[*(p + 1)]->setConstraint("");
2514 ++NumMCOperands;
2515 break;
2516 case CVT_regG0:
2517 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2518 Operands[*(p + 1)]->setConstraint("m");
2519 ++NumMCOperands;
2520 break;
2521 case CVT_imm_95_15:
2522 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2523 Operands[*(p + 1)]->setConstraint("");
2524 ++NumMCOperands;
2525 break;
2526 case CVT_95_addCallTargetOperands:
2527 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2528 Operands[*(p + 1)]->setConstraint("m");
2529 NumMCOperands += 1;
2530 break;
2531 case CVT_regO7:
2532 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2533 Operands[*(p + 1)]->setConstraint("m");
2534 ++NumMCOperands;
2535 break;
2536 case CVT_95_addMEMriOperands:
2537 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2538 Operands[*(p + 1)]->setConstraint("m");
2539 NumMCOperands += 2;
2540 break;
2541 case CVT_95_addMEMrrOperands:
2542 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2543 Operands[*(p + 1)]->setConstraint("m");
2544 NumMCOperands += 2;
2545 break;
2546 case CVT_imm_95_128:
2547 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2548 Operands[*(p + 1)]->setConstraint("");
2549 ++NumMCOperands;
2550 break;
2551 case CVT_95_addASITagOperands:
2552 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2553 Operands[*(p + 1)]->setConstraint("m");
2554 NumMCOperands += 1;
2555 break;
2556 case CVT_imm_95_136:
2557 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2558 Operands[*(p + 1)]->setConstraint("");
2559 ++NumMCOperands;
2560 break;
2561 case CVT_regFCC0:
2562 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2563 Operands[*(p + 1)]->setConstraint("m");
2564 ++NumMCOperands;
2565 break;
2566 case CVT_95_addMembarTagOperands:
2567 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2568 Operands[*(p + 1)]->setConstraint("m");
2569 NumMCOperands += 1;
2570 break;
2571 case CVT_95_addPrefetchTagOperands:
2572 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2573 Operands[*(p + 1)]->setConstraint("m");
2574 NumMCOperands += 1;
2575 break;
2576 case CVT_95_addShiftAmtImm5Operands:
2577 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2578 Operands[*(p + 1)]->setConstraint("m");
2579 NumMCOperands += 1;
2580 break;
2581 case CVT_95_addShiftAmtImm6Operands:
2582 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
2583 Operands[*(p + 1)]->setConstraint("m");
2584 NumMCOperands += 1;
2585 break;
2586 }
2587 }
2588}
2589
2590namespace {
2591
2592/// MatchClassKind - The kinds of classes which participate in
2593/// instruction matching.
2594enum MatchClassKind {
2595 InvalidMatchClass = 0,
2596 OptionalMatchClass = 1,
2597 MCK__PCT_asi, // '%asi'
2598 MCK__PCT_xcc, // '%xcc'
2599 MCK__43_, // '+'
2600 MCK_1, // '1'
2601 MCK_3, // '3'
2602 MCK_5, // '5'
2603 MCK__91_, // '['
2604 MCK__93_, // ']'
2605 MCK_a, // 'a'
2606 MCK_pn, // 'pn'
2607 MCK_pt, // 'pt'
2608 MCK_LAST_TOKEN = MCK_pt,
2609 MCK_Reg12, // derived register class
2610 MCK_CPQ, // register class 'CPQ'
2611 MCK_CPSR, // register class 'CPSR'
2612 MCK_FCC0, // register class 'FCC0'
2613 MCK_FQ, // register class 'FQ'
2614 MCK_FSR, // register class 'FSR'
2615 MCK_G0, // register class 'G0'
2616 MCK_ICC, // register class 'ICC'
2617 MCK_PSR, // register class 'PSR'
2618 MCK_TBR, // register class 'TBR'
2619 MCK_WIM, // register class 'WIM'
2620 MCK_Reg25, // derived register class
2621 MCK_Reg24, // derived register class
2622 MCK_FCCRegs, // register class 'FCCRegs'
2623 MCK_GPRIncomingArg, // register class 'GPRIncomingArg'
2624 MCK_GPROutgoingArg, // register class 'GPROutgoingArg'
2625 MCK_LowQFPRegs, // register class 'LowQFPRegs'
2626 MCK_CoprocPair, // register class 'CoprocPair'
2627 MCK_IntPair, // register class 'IntPair'
2628 MCK_LowDFPRegs, // register class 'LowDFPRegs'
2629 MCK_QFPRegs, // register class 'QFPRegs'
2630 MCK_PRRegs, // register class 'PRRegs'
2631 MCK_CoprocRegs, // register class 'CoprocRegs'
2632 MCK_DFPRegs, // register class 'DFPRegs'
2633 MCK_FPRegs, // register class 'FPRegs'
2634 MCK_IntRegs, // register class 'IntRegs,I64Regs'
2635 MCK_ASRRegs, // register class 'ASRRegs'
2636 MCK_LAST_REGISTER = MCK_ASRRegs,
2637 MCK_Imm, // user defined class 'ImmAsmOperand'
2638 MCK_ASITag, // user defined class 'SparcASITagAsmOperand'
2639 MCK_CallTarget, // user defined class 'SparcCallTargetAsmOperand'
2640 MCK_MEMri, // user defined class 'SparcMEMriAsmOperand'
2641 MCK_MEMrr, // user defined class 'SparcMEMrrAsmOperand'
2642 MCK_MembarTag, // user defined class 'SparcMembarTagAsmOperand'
2643 MCK_PrefetchTag, // user defined class 'SparcPrefetchTagAsmOperand'
2644 MCK_ShiftAmtImm5, // user defined class 'anonymous_8113'
2645 MCK_ShiftAmtImm6, // user defined class 'anonymous_8114'
2646 MCK_TailRelocSymLoad_GOT, // user defined class 'anonymous_8115'
2647 MCK_TailRelocSymAdd_TLS, // user defined class 'anonymous_8116'
2648 MCK_TailRelocSymLoad_TLS, // user defined class 'anonymous_8117'
2649 MCK_TailRelocSymCall_TLS, // user defined class 'anonymous_8118'
2650 NumMatchClassKinds
2651};
2652
2653} // end anonymous namespace
2654
2655static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
2656 return MCTargetAsmParser::Match_InvalidOperand;
2657}
2658
2659static MatchClassKind matchTokenString(StringRef Name) {
2660 switch (Name.size()) {
2661 default: break;
2662 case 1: // 7 strings to match.
2663 switch (Name[0]) {
2664 default: break;
2665 case '+': // 1 string to match.
2666 return MCK__43_; // "+"
2667 case '1': // 1 string to match.
2668 return MCK_1; // "1"
2669 case '3': // 1 string to match.
2670 return MCK_3; // "3"
2671 case '5': // 1 string to match.
2672 return MCK_5; // "5"
2673 case '[': // 1 string to match.
2674 return MCK__91_; // "["
2675 case ']': // 1 string to match.
2676 return MCK__93_; // "]"
2677 case 'a': // 1 string to match.
2678 return MCK_a; // "a"
2679 }
2680 break;
2681 case 2: // 2 strings to match.
2682 if (Name[0] != 'p')
2683 break;
2684 switch (Name[1]) {
2685 default: break;
2686 case 'n': // 1 string to match.
2687 return MCK_pn; // "pn"
2688 case 't': // 1 string to match.
2689 return MCK_pt; // "pt"
2690 }
2691 break;
2692 case 4: // 2 strings to match.
2693 if (Name[0] != '%')
2694 break;
2695 switch (Name[1]) {
2696 default: break;
2697 case 'a': // 1 string to match.
2698 if (memcmp(Name.data()+2, "si", 2) != 0)
2699 break;
2700 return MCK__PCT_asi; // "%asi"
2701 case 'x': // 1 string to match.
2702 if (memcmp(Name.data()+2, "cc", 2) != 0)
2703 break;
2704 return MCK__PCT_xcc; // "%xcc"
2705 }
2706 break;
2707 }
2708 return InvalidMatchClass;
2709}
2710
2711/// isSubclass - Compute whether \p A is a subclass of \p B.
2712static bool isSubclass(MatchClassKind A, MatchClassKind B) {
2713 if (A == B)
2714 return true;
2715
2716 switch (A) {
2717 default:
2718 return false;
2719
2720 case MCK_Reg12:
2721 switch (B) {
2722 default: return false;
2723 case MCK_PRRegs: return true;
2724 case MCK_ASRRegs: return true;
2725 }
2726
2727 case MCK_FCC0:
2728 return B == MCK_FCCRegs;
2729
2730 case MCK_G0:
2731 return B == MCK_IntRegs;
2732
2733 case MCK_Reg25:
2734 return B == MCK_IntPair;
2735
2736 case MCK_Reg24:
2737 return B == MCK_IntPair;
2738
2739 case MCK_GPRIncomingArg:
2740 return B == MCK_IntRegs;
2741
2742 case MCK_GPROutgoingArg:
2743 return B == MCK_IntRegs;
2744
2745 case MCK_LowQFPRegs:
2746 return B == MCK_QFPRegs;
2747
2748 case MCK_LowDFPRegs:
2749 return B == MCK_DFPRegs;
2750 }
2751}
2752
2753static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
2754 SparcOperand &Operand = (SparcOperand &)GOp;
2755 if (Kind == InvalidMatchClass)
2756 return MCTargetAsmParser::Match_InvalidOperand;
2757
2758 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
2759 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
2760 MCTargetAsmParser::Match_Success :
2761 MCTargetAsmParser::Match_InvalidOperand;
2762
2763 switch (Kind) {
2764 default: break;
2765 // 'Imm' class
2766 case MCK_Imm: {
2767 DiagnosticPredicate DP(Operand.isImm());
2768 if (DP.isMatch())
2769 return MCTargetAsmParser::Match_Success;
2770 break;
2771 }
2772 // 'ASITag' class
2773 case MCK_ASITag: {
2774 DiagnosticPredicate DP(Operand.isASITag());
2775 if (DP.isMatch())
2776 return MCTargetAsmParser::Match_Success;
2777 break;
2778 }
2779 // 'CallTarget' class
2780 case MCK_CallTarget: {
2781 DiagnosticPredicate DP(Operand.isCallTarget());
2782 if (DP.isMatch())
2783 return MCTargetAsmParser::Match_Success;
2784 break;
2785 }
2786 // 'MEMri' class
2787 case MCK_MEMri: {
2788 DiagnosticPredicate DP(Operand.isMEMri());
2789 if (DP.isMatch())
2790 return MCTargetAsmParser::Match_Success;
2791 break;
2792 }
2793 // 'MEMrr' class
2794 case MCK_MEMrr: {
2795 DiagnosticPredicate DP(Operand.isMEMrr());
2796 if (DP.isMatch())
2797 return MCTargetAsmParser::Match_Success;
2798 break;
2799 }
2800 // 'MembarTag' class
2801 case MCK_MembarTag: {
2802 DiagnosticPredicate DP(Operand.isMembarTag());
2803 if (DP.isMatch())
2804 return MCTargetAsmParser::Match_Success;
2805 break;
2806 }
2807 // 'PrefetchTag' class
2808 case MCK_PrefetchTag: {
2809 DiagnosticPredicate DP(Operand.isPrefetchTag());
2810 if (DP.isMatch())
2811 return MCTargetAsmParser::Match_Success;
2812 break;
2813 }
2814 // 'ShiftAmtImm5' class
2815 case MCK_ShiftAmtImm5: {
2816 DiagnosticPredicate DP(Operand.isShiftAmtImm5());
2817 if (DP.isMatch())
2818 return MCTargetAsmParser::Match_Success;
2819 break;
2820 }
2821 // 'ShiftAmtImm6' class
2822 case MCK_ShiftAmtImm6: {
2823 DiagnosticPredicate DP(Operand.isShiftAmtImm6());
2824 if (DP.isMatch())
2825 return MCTargetAsmParser::Match_Success;
2826 break;
2827 }
2828 // 'TailRelocSymLoad_GOT' class
2829 case MCK_TailRelocSymLoad_GOT: {
2830 DiagnosticPredicate DP(Operand.isTailRelocSym());
2831 if (DP.isMatch())
2832 return MCTargetAsmParser::Match_Success;
2833 break;
2834 }
2835 // 'TailRelocSymAdd_TLS' class
2836 case MCK_TailRelocSymAdd_TLS: {
2837 DiagnosticPredicate DP(Operand.isTailRelocSym());
2838 if (DP.isMatch())
2839 return MCTargetAsmParser::Match_Success;
2840 break;
2841 }
2842 // 'TailRelocSymLoad_TLS' class
2843 case MCK_TailRelocSymLoad_TLS: {
2844 DiagnosticPredicate DP(Operand.isTailRelocSym());
2845 if (DP.isMatch())
2846 return MCTargetAsmParser::Match_Success;
2847 break;
2848 }
2849 // 'TailRelocSymCall_TLS' class
2850 case MCK_TailRelocSymCall_TLS: {
2851 DiagnosticPredicate DP(Operand.isTailRelocSym());
2852 if (DP.isMatch())
2853 return MCTargetAsmParser::Match_Success;
2854 break;
2855 }
2856 } // end switch (Kind)
2857
2858 if (Operand.isReg()) {
2859 MatchClassKind OpKind;
2860 switch (Operand.getReg().id()) {
2861 default: OpKind = InvalidMatchClass; break;
2862 case SP::ICC: OpKind = MCK_ICC; break;
2863 case SP::FCC0: OpKind = MCK_FCC0; break;
2864 case SP::FCC1: OpKind = MCK_FCCRegs; break;
2865 case SP::FCC2: OpKind = MCK_FCCRegs; break;
2866 case SP::FCC3: OpKind = MCK_FCCRegs; break;
2867 case SP::FSR: OpKind = MCK_FSR; break;
2868 case SP::FQ: OpKind = MCK_FQ; break;
2869 case SP::CPSR: OpKind = MCK_CPSR; break;
2870 case SP::CPQ: OpKind = MCK_CPQ; break;
2871 case SP::Y: OpKind = MCK_ASRRegs; break;
2872 case SP::ASR1: OpKind = MCK_ASRRegs; break;
2873 case SP::ASR2: OpKind = MCK_ASRRegs; break;
2874 case SP::ASR3: OpKind = MCK_ASRRegs; break;
2875 case SP::ASR4: OpKind = MCK_ASRRegs; break;
2876 case SP::ASR5: OpKind = MCK_ASRRegs; break;
2877 case SP::ASR6: OpKind = MCK_ASRRegs; break;
2878 case SP::ASR7: OpKind = MCK_ASRRegs; break;
2879 case SP::ASR8: OpKind = MCK_ASRRegs; break;
2880 case SP::ASR9: OpKind = MCK_ASRRegs; break;
2881 case SP::ASR10: OpKind = MCK_ASRRegs; break;
2882 case SP::ASR11: OpKind = MCK_ASRRegs; break;
2883 case SP::ASR12: OpKind = MCK_ASRRegs; break;
2884 case SP::ASR13: OpKind = MCK_ASRRegs; break;
2885 case SP::ASR14: OpKind = MCK_ASRRegs; break;
2886 case SP::ASR15: OpKind = MCK_ASRRegs; break;
2887 case SP::ASR16: OpKind = MCK_ASRRegs; break;
2888 case SP::ASR17: OpKind = MCK_ASRRegs; break;
2889 case SP::ASR18: OpKind = MCK_ASRRegs; break;
2890 case SP::ASR19: OpKind = MCK_ASRRegs; break;
2891 case SP::ASR20: OpKind = MCK_ASRRegs; break;
2892 case SP::ASR21: OpKind = MCK_ASRRegs; break;
2893 case SP::ASR22: OpKind = MCK_ASRRegs; break;
2894 case SP::ASR23: OpKind = MCK_ASRRegs; break;
2895 case SP::ASR24: OpKind = MCK_ASRRegs; break;
2896 case SP::ASR25: OpKind = MCK_ASRRegs; break;
2897 case SP::ASR26: OpKind = MCK_ASRRegs; break;
2898 case SP::ASR27: OpKind = MCK_ASRRegs; break;
2899 case SP::ASR28: OpKind = MCK_ASRRegs; break;
2900 case SP::ASR29: OpKind = MCK_ASRRegs; break;
2901 case SP::ASR30: OpKind = MCK_ASRRegs; break;
2902 case SP::ASR31: OpKind = MCK_ASRRegs; break;
2903 case SP::PSR: OpKind = MCK_PSR; break;
2904 case SP::WIM: OpKind = MCK_WIM; break;
2905 case SP::TBR: OpKind = MCK_TBR; break;
2906 case SP::TPC: OpKind = MCK_PRRegs; break;
2907 case SP::TNPC: OpKind = MCK_PRRegs; break;
2908 case SP::TSTATE: OpKind = MCK_PRRegs; break;
2909 case SP::TT: OpKind = MCK_PRRegs; break;
2910 case SP::TICK: OpKind = MCK_Reg12; break;
2911 case SP::TBA: OpKind = MCK_PRRegs; break;
2912 case SP::PSTATE: OpKind = MCK_PRRegs; break;
2913 case SP::TL: OpKind = MCK_PRRegs; break;
2914 case SP::PIL: OpKind = MCK_PRRegs; break;
2915 case SP::CWP: OpKind = MCK_PRRegs; break;
2916 case SP::CANSAVE: OpKind = MCK_PRRegs; break;
2917 case SP::CANRESTORE: OpKind = MCK_PRRegs; break;
2918 case SP::CLEANWIN: OpKind = MCK_PRRegs; break;
2919 case SP::OTHERWIN: OpKind = MCK_PRRegs; break;
2920 case SP::WSTATE: OpKind = MCK_PRRegs; break;
2921 case SP::GL: OpKind = MCK_PRRegs; break;
2922 case SP::VER: OpKind = MCK_PRRegs; break;
2923 case SP::G0: OpKind = MCK_G0; break;
2924 case SP::G1: OpKind = MCK_IntRegs; break;
2925 case SP::G2: OpKind = MCK_IntRegs; break;
2926 case SP::G3: OpKind = MCK_IntRegs; break;
2927 case SP::G4: OpKind = MCK_IntRegs; break;
2928 case SP::G5: OpKind = MCK_IntRegs; break;
2929 case SP::G6: OpKind = MCK_IntRegs; break;
2930 case SP::G7: OpKind = MCK_IntRegs; break;
2931 case SP::O0: OpKind = MCK_GPROutgoingArg; break;
2932 case SP::O1: OpKind = MCK_GPROutgoingArg; break;
2933 case SP::O2: OpKind = MCK_GPROutgoingArg; break;
2934 case SP::O3: OpKind = MCK_GPROutgoingArg; break;
2935 case SP::O4: OpKind = MCK_GPROutgoingArg; break;
2936 case SP::O5: OpKind = MCK_GPROutgoingArg; break;
2937 case SP::O6: OpKind = MCK_IntRegs; break;
2938 case SP::O7: OpKind = MCK_IntRegs; break;
2939 case SP::L0: OpKind = MCK_IntRegs; break;
2940 case SP::L1: OpKind = MCK_IntRegs; break;
2941 case SP::L2: OpKind = MCK_IntRegs; break;
2942 case SP::L3: OpKind = MCK_IntRegs; break;
2943 case SP::L4: OpKind = MCK_IntRegs; break;
2944 case SP::L5: OpKind = MCK_IntRegs; break;
2945 case SP::L6: OpKind = MCK_IntRegs; break;
2946 case SP::L7: OpKind = MCK_IntRegs; break;
2947 case SP::I0: OpKind = MCK_GPRIncomingArg; break;
2948 case SP::I1: OpKind = MCK_GPRIncomingArg; break;
2949 case SP::I2: OpKind = MCK_GPRIncomingArg; break;
2950 case SP::I3: OpKind = MCK_GPRIncomingArg; break;
2951 case SP::I4: OpKind = MCK_GPRIncomingArg; break;
2952 case SP::I5: OpKind = MCK_GPRIncomingArg; break;
2953 case SP::I6: OpKind = MCK_IntRegs; break;
2954 case SP::I7: OpKind = MCK_IntRegs; break;
2955 case SP::F0: OpKind = MCK_FPRegs; break;
2956 case SP::F1: OpKind = MCK_FPRegs; break;
2957 case SP::F2: OpKind = MCK_FPRegs; break;
2958 case SP::F3: OpKind = MCK_FPRegs; break;
2959 case SP::F4: OpKind = MCK_FPRegs; break;
2960 case SP::F5: OpKind = MCK_FPRegs; break;
2961 case SP::F6: OpKind = MCK_FPRegs; break;
2962 case SP::F7: OpKind = MCK_FPRegs; break;
2963 case SP::F8: OpKind = MCK_FPRegs; break;
2964 case SP::F9: OpKind = MCK_FPRegs; break;
2965 case SP::F10: OpKind = MCK_FPRegs; break;
2966 case SP::F11: OpKind = MCK_FPRegs; break;
2967 case SP::F12: OpKind = MCK_FPRegs; break;
2968 case SP::F13: OpKind = MCK_FPRegs; break;
2969 case SP::F14: OpKind = MCK_FPRegs; break;
2970 case SP::F15: OpKind = MCK_FPRegs; break;
2971 case SP::F16: OpKind = MCK_FPRegs; break;
2972 case SP::F17: OpKind = MCK_FPRegs; break;
2973 case SP::F18: OpKind = MCK_FPRegs; break;
2974 case SP::F19: OpKind = MCK_FPRegs; break;
2975 case SP::F20: OpKind = MCK_FPRegs; break;
2976 case SP::F21: OpKind = MCK_FPRegs; break;
2977 case SP::F22: OpKind = MCK_FPRegs; break;
2978 case SP::F23: OpKind = MCK_FPRegs; break;
2979 case SP::F24: OpKind = MCK_FPRegs; break;
2980 case SP::F25: OpKind = MCK_FPRegs; break;
2981 case SP::F26: OpKind = MCK_FPRegs; break;
2982 case SP::F27: OpKind = MCK_FPRegs; break;
2983 case SP::F28: OpKind = MCK_FPRegs; break;
2984 case SP::F29: OpKind = MCK_FPRegs; break;
2985 case SP::F30: OpKind = MCK_FPRegs; break;
2986 case SP::F31: OpKind = MCK_FPRegs; break;
2987 case SP::D0: OpKind = MCK_LowDFPRegs; break;
2988 case SP::D1: OpKind = MCK_LowDFPRegs; break;
2989 case SP::D2: OpKind = MCK_LowDFPRegs; break;
2990 case SP::D3: OpKind = MCK_LowDFPRegs; break;
2991 case SP::D4: OpKind = MCK_LowDFPRegs; break;
2992 case SP::D5: OpKind = MCK_LowDFPRegs; break;
2993 case SP::D6: OpKind = MCK_LowDFPRegs; break;
2994 case SP::D7: OpKind = MCK_LowDFPRegs; break;
2995 case SP::D8: OpKind = MCK_LowDFPRegs; break;
2996 case SP::D9: OpKind = MCK_LowDFPRegs; break;
2997 case SP::D10: OpKind = MCK_LowDFPRegs; break;
2998 case SP::D11: OpKind = MCK_LowDFPRegs; break;
2999 case SP::D12: OpKind = MCK_LowDFPRegs; break;
3000 case SP::D13: OpKind = MCK_LowDFPRegs; break;
3001 case SP::D14: OpKind = MCK_LowDFPRegs; break;
3002 case SP::D15: OpKind = MCK_LowDFPRegs; break;
3003 case SP::C0: OpKind = MCK_CoprocRegs; break;
3004 case SP::C1: OpKind = MCK_CoprocRegs; break;
3005 case SP::C2: OpKind = MCK_CoprocRegs; break;
3006 case SP::C3: OpKind = MCK_CoprocRegs; break;
3007 case SP::C4: OpKind = MCK_CoprocRegs; break;
3008 case SP::C5: OpKind = MCK_CoprocRegs; break;
3009 case SP::C6: OpKind = MCK_CoprocRegs; break;
3010 case SP::C7: OpKind = MCK_CoprocRegs; break;
3011 case SP::C8: OpKind = MCK_CoprocRegs; break;
3012 case SP::C9: OpKind = MCK_CoprocRegs; break;
3013 case SP::C10: OpKind = MCK_CoprocRegs; break;
3014 case SP::C11: OpKind = MCK_CoprocRegs; break;
3015 case SP::C12: OpKind = MCK_CoprocRegs; break;
3016 case SP::C13: OpKind = MCK_CoprocRegs; break;
3017 case SP::C14: OpKind = MCK_CoprocRegs; break;
3018 case SP::C15: OpKind = MCK_CoprocRegs; break;
3019 case SP::C16: OpKind = MCK_CoprocRegs; break;
3020 case SP::C17: OpKind = MCK_CoprocRegs; break;
3021 case SP::C18: OpKind = MCK_CoprocRegs; break;
3022 case SP::C19: OpKind = MCK_CoprocRegs; break;
3023 case SP::C20: OpKind = MCK_CoprocRegs; break;
3024 case SP::C21: OpKind = MCK_CoprocRegs; break;
3025 case SP::C22: OpKind = MCK_CoprocRegs; break;
3026 case SP::C23: OpKind = MCK_CoprocRegs; break;
3027 case SP::C24: OpKind = MCK_CoprocRegs; break;
3028 case SP::C25: OpKind = MCK_CoprocRegs; break;
3029 case SP::C26: OpKind = MCK_CoprocRegs; break;
3030 case SP::C27: OpKind = MCK_CoprocRegs; break;
3031 case SP::C28: OpKind = MCK_CoprocRegs; break;
3032 case SP::C29: OpKind = MCK_CoprocRegs; break;
3033 case SP::C30: OpKind = MCK_CoprocRegs; break;
3034 case SP::C31: OpKind = MCK_CoprocRegs; break;
3035 case SP::D16: OpKind = MCK_DFPRegs; break;
3036 case SP::D17: OpKind = MCK_DFPRegs; break;
3037 case SP::D18: OpKind = MCK_DFPRegs; break;
3038 case SP::D19: OpKind = MCK_DFPRegs; break;
3039 case SP::D20: OpKind = MCK_DFPRegs; break;
3040 case SP::D21: OpKind = MCK_DFPRegs; break;
3041 case SP::D22: OpKind = MCK_DFPRegs; break;
3042 case SP::D23: OpKind = MCK_DFPRegs; break;
3043 case SP::D24: OpKind = MCK_DFPRegs; break;
3044 case SP::D25: OpKind = MCK_DFPRegs; break;
3045 case SP::D26: OpKind = MCK_DFPRegs; break;
3046 case SP::D27: OpKind = MCK_DFPRegs; break;
3047 case SP::D28: OpKind = MCK_DFPRegs; break;
3048 case SP::D29: OpKind = MCK_DFPRegs; break;
3049 case SP::D30: OpKind = MCK_DFPRegs; break;
3050 case SP::D31: OpKind = MCK_DFPRegs; break;
3051 case SP::Q0: OpKind = MCK_LowQFPRegs; break;
3052 case SP::Q1: OpKind = MCK_LowQFPRegs; break;
3053 case SP::Q2: OpKind = MCK_LowQFPRegs; break;
3054 case SP::Q3: OpKind = MCK_LowQFPRegs; break;
3055 case SP::Q4: OpKind = MCK_LowQFPRegs; break;
3056 case SP::Q5: OpKind = MCK_LowQFPRegs; break;
3057 case SP::Q6: OpKind = MCK_LowQFPRegs; break;
3058 case SP::Q7: OpKind = MCK_LowQFPRegs; break;
3059 case SP::Q8: OpKind = MCK_QFPRegs; break;
3060 case SP::Q9: OpKind = MCK_QFPRegs; break;
3061 case SP::Q10: OpKind = MCK_QFPRegs; break;
3062 case SP::Q11: OpKind = MCK_QFPRegs; break;
3063 case SP::Q12: OpKind = MCK_QFPRegs; break;
3064 case SP::Q13: OpKind = MCK_QFPRegs; break;
3065 case SP::Q14: OpKind = MCK_QFPRegs; break;
3066 case SP::Q15: OpKind = MCK_QFPRegs; break;
3067 case SP::G0_G1: OpKind = MCK_IntPair; break;
3068 case SP::G2_G3: OpKind = MCK_IntPair; break;
3069 case SP::G4_G5: OpKind = MCK_IntPair; break;
3070 case SP::G6_G7: OpKind = MCK_IntPair; break;
3071 case SP::O0_O1: OpKind = MCK_Reg24; break;
3072 case SP::O2_O3: OpKind = MCK_Reg24; break;
3073 case SP::O4_O5: OpKind = MCK_Reg24; break;
3074 case SP::O6_O7: OpKind = MCK_IntPair; break;
3075 case SP::L0_L1: OpKind = MCK_IntPair; break;
3076 case SP::L2_L3: OpKind = MCK_IntPair; break;
3077 case SP::L4_L5: OpKind = MCK_IntPair; break;
3078 case SP::L6_L7: OpKind = MCK_IntPair; break;
3079 case SP::I0_I1: OpKind = MCK_Reg25; break;
3080 case SP::I2_I3: OpKind = MCK_Reg25; break;
3081 case SP::I4_I5: OpKind = MCK_Reg25; break;
3082 case SP::I6_I7: OpKind = MCK_IntPair; break;
3083 case SP::C0_C1: OpKind = MCK_CoprocPair; break;
3084 case SP::C2_C3: OpKind = MCK_CoprocPair; break;
3085 case SP::C4_C5: OpKind = MCK_CoprocPair; break;
3086 case SP::C6_C7: OpKind = MCK_CoprocPair; break;
3087 case SP::C8_C9: OpKind = MCK_CoprocPair; break;
3088 case SP::C10_C11: OpKind = MCK_CoprocPair; break;
3089 case SP::C12_C13: OpKind = MCK_CoprocPair; break;
3090 case SP::C14_C15: OpKind = MCK_CoprocPair; break;
3091 case SP::C16_C17: OpKind = MCK_CoprocPair; break;
3092 case SP::C18_C19: OpKind = MCK_CoprocPair; break;
3093 case SP::C20_C21: OpKind = MCK_CoprocPair; break;
3094 case SP::C22_C23: OpKind = MCK_CoprocPair; break;
3095 case SP::C24_C25: OpKind = MCK_CoprocPair; break;
3096 case SP::C26_C27: OpKind = MCK_CoprocPair; break;
3097 case SP::C28_C29: OpKind = MCK_CoprocPair; break;
3098 case SP::C30_C31: OpKind = MCK_CoprocPair; break;
3099 }
3100 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
3101 getDiagKindFromRegisterClass(Kind);
3102 }
3103
3104 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
3105 return getDiagKindFromRegisterClass(Kind);
3106
3107 return MCTargetAsmParser::Match_InvalidOperand;
3108}
3109
3110#ifndef NDEBUG
3111const char *getMatchClassName(MatchClassKind Kind) {
3112 switch (Kind) {
3113 case InvalidMatchClass: return "InvalidMatchClass";
3114 case OptionalMatchClass: return "OptionalMatchClass";
3115 case MCK__PCT_asi: return "MCK__PCT_asi";
3116 case MCK__PCT_xcc: return "MCK__PCT_xcc";
3117 case MCK__43_: return "MCK__43_";
3118 case MCK_1: return "MCK_1";
3119 case MCK_3: return "MCK_3";
3120 case MCK_5: return "MCK_5";
3121 case MCK__91_: return "MCK__91_";
3122 case MCK__93_: return "MCK__93_";
3123 case MCK_a: return "MCK_a";
3124 case MCK_pn: return "MCK_pn";
3125 case MCK_pt: return "MCK_pt";
3126 case MCK_Reg12: return "MCK_Reg12";
3127 case MCK_CPQ: return "MCK_CPQ";
3128 case MCK_CPSR: return "MCK_CPSR";
3129 case MCK_FCC0: return "MCK_FCC0";
3130 case MCK_FQ: return "MCK_FQ";
3131 case MCK_FSR: return "MCK_FSR";
3132 case MCK_G0: return "MCK_G0";
3133 case MCK_ICC: return "MCK_ICC";
3134 case MCK_PSR: return "MCK_PSR";
3135 case MCK_TBR: return "MCK_TBR";
3136 case MCK_WIM: return "MCK_WIM";
3137 case MCK_Reg25: return "MCK_Reg25";
3138 case MCK_Reg24: return "MCK_Reg24";
3139 case MCK_FCCRegs: return "MCK_FCCRegs";
3140 case MCK_GPRIncomingArg: return "MCK_GPRIncomingArg";
3141 case MCK_GPROutgoingArg: return "MCK_GPROutgoingArg";
3142 case MCK_LowQFPRegs: return "MCK_LowQFPRegs";
3143 case MCK_CoprocPair: return "MCK_CoprocPair";
3144 case MCK_IntPair: return "MCK_IntPair";
3145 case MCK_LowDFPRegs: return "MCK_LowDFPRegs";
3146 case MCK_QFPRegs: return "MCK_QFPRegs";
3147 case MCK_PRRegs: return "MCK_PRRegs";
3148 case MCK_CoprocRegs: return "MCK_CoprocRegs";
3149 case MCK_DFPRegs: return "MCK_DFPRegs";
3150 case MCK_FPRegs: return "MCK_FPRegs";
3151 case MCK_IntRegs: return "MCK_IntRegs";
3152 case MCK_ASRRegs: return "MCK_ASRRegs";
3153 case MCK_Imm: return "MCK_Imm";
3154 case MCK_ASITag: return "MCK_ASITag";
3155 case MCK_CallTarget: return "MCK_CallTarget";
3156 case MCK_MEMri: return "MCK_MEMri";
3157 case MCK_MEMrr: return "MCK_MEMrr";
3158 case MCK_MembarTag: return "MCK_MembarTag";
3159 case MCK_PrefetchTag: return "MCK_PrefetchTag";
3160 case MCK_ShiftAmtImm5: return "MCK_ShiftAmtImm5";
3161 case MCK_ShiftAmtImm6: return "MCK_ShiftAmtImm6";
3162 case MCK_TailRelocSymLoad_GOT: return "MCK_TailRelocSymLoad_GOT";
3163 case MCK_TailRelocSymAdd_TLS: return "MCK_TailRelocSymAdd_TLS";
3164 case MCK_TailRelocSymLoad_TLS: return "MCK_TailRelocSymLoad_TLS";
3165 case MCK_TailRelocSymCall_TLS: return "MCK_TailRelocSymCall_TLS";
3166 case NumMatchClassKinds: return "NumMatchClassKinds";
3167 }
3168 llvm_unreachable("unhandled MatchClassKind!");
3169}
3170
3171#endif // NDEBUG
3172FeatureBitset SparcAsmParser::
3173ComputeAvailableFeatures(const FeatureBitset &FB) const {
3174 FeatureBitset Features;
3175 if (FB[Sparc::FeatureSoftMulDiv])
3176 Features.set(Feature_UseSoftMulDivBit);
3177 if (FB[Sparc::FeatureV9])
3178 Features.set(Feature_HasV9Bit);
3179 if (FB[Sparc::FeatureVIS])
3180 Features.set(Feature_HasVISBit);
3181 if (FB[Sparc::FeatureVIS2])
3182 Features.set(Feature_HasVIS2Bit);
3183 if (FB[Sparc::FeatureVIS3])
3184 Features.set(Feature_HasVIS3Bit);
3185 if (FB[Sparc::LeonCASA] || FB[Sparc::FeatureV9])
3186 Features.set(Feature_HasCASABit);
3187 if (FB[Sparc::FeaturePWRPSR])
3188 Features.set(Feature_HasPWRPSRBit);
3189 return Features;
3190}
3191
3192static bool checkAsmTiedOperandConstraints(const SparcAsmParser&AsmParser,
3193 unsigned Kind, const OperandVector &Operands,
3194 uint64_t &ErrorInfo) {
3195 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
3196 const uint8_t *Converter = ConversionTable[Kind];
3197 for (const uint8_t *p = Converter; *p; p += 2) {
3198 switch (*p) {
3199 case CVT_Tied: {
3200 unsigned OpIdx = *(p + 1);
3201 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
3202 std::begin(TiedAsmOperandTable)) &&
3203 "Tied operand not found");
3204 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
3205 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
3206 if (OpndNum1 != OpndNum2) {
3207 auto &SrcOp1 = Operands[OpndNum1];
3208 auto &SrcOp2 = Operands[OpndNum2];
3209 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) {
3210 ErrorInfo = OpndNum2;
3211 return false;
3212 }
3213 }
3214 break;
3215 }
3216 default:
3217 break;
3218 }
3219 }
3220 return true;
3221}
3222
3223static const char MnemonicTable[] =
3224 "\003add\005addcc\004addx\005addxc\006addxcc\007addxccc\talignaddr\nalig"
3225 "naddrl\003and\005andcc\004andn\006andncc\007array16\007array32\006array"
3226 "8\001b\002ba\003bcc\004bclr\003bcs\002be\003beq\002bg\003bge\004bgeu\003"
3227 "bgt\003bgu\002bl\003ble\004bleu\003blt\003blu\005bmask\002bn\003bne\004"
3228 "bneg\003bnz\004bpos\002br\003bre\005brgez\004brgz\005brlez\004brlz\004b"
3229 "rne\004brnz\003brz\004bset\010bshuffle\004btog\004btst\003bvc\003bvs\002"
3230 "bz\004call\003cas\004casa\004casl\004casx\005casxa\005casxl\002cb\003cb"
3231 "0\004cb01\005cb012\005cb013\004cb02\005cb023\004cb03\003cb1\004cb12\005"
3232 "cb123\004cb13\003cb2\004cb23\003cb3\003cba\003cbn\003clr\004clrb\004clr"
3233 "h\007cmask16\007cmask32\006cmask8\003cmp\003dec\005deccc\004done\006edg"
3234 "e16\007edge16l\010edge16ln\007edge16n\006edge32\007edge32l\010edge32ln\007"
3235 "edge32n\005edge8\006edge8l\007edge8ln\006edge8n\005fabsd\005fabsq\005fa"
3236 "bss\005faddd\005faddq\005fadds\nfaligndata\004fand\010fandnot1\tfandnot"
3237 "1s\010fandnot2\tfandnot2s\005fands\002fb\003fba\003fbe\003fbg\004fbge\003"
3238 "fbl\004fble\004fblg\003fbn\004fbne\004fbnz\003fbo\003fbu\004fbue\004fbu"
3239 "g\005fbuge\004fbul\005fbule\003fbz\010fchksm16\005fcmpd\006fcmped\006fc"
3240 "mpeq\010fcmpeq16\010fcmpeq32\006fcmpes\010fcmpgt16\010fcmpgt32\010fcmpl"
3241 "e16\010fcmple32\010fcmpne16\010fcmpne32\005fcmpq\005fcmps\005fdivd\005f"
3242 "divq\005fdivs\006fdmulq\005fdtoi\005fdtoq\005fdtos\005fdtox\007fexpand\006"
3243 "fhaddd\006fhadds\006fhsubd\006fhsubs\005fitod\005fitoq\005fitos\006flcm"
3244 "pd\006flcmps\005flush\006flushw\007fmean16\005fmovd\006fmovda\007fmovdc"
3245 "c\007fmovdcs\006fmovde\007fmovdeq\006fmovdg\007fmovdge\010fmovdgeu\007f"
3246 "movdgt\007fmovdgu\006fmovdl\007fmovdle\010fmovdleu\007fmovdlg\007fmovdl"
3247 "t\007fmovdlu\006fmovdn\007fmovdne\010fmovdneg\007fmovdnz\006fmovdo\010f"
3248 "movdpos\006fmovdu\007fmovdue\007fmovdug\010fmovduge\007fmovdul\010fmovd"
3249 "ule\007fmovdvc\007fmovdvs\006fmovdz\005fmovq\006fmovqa\007fmovqcc\007fm"
3250 "ovqcs\006fmovqe\007fmovqeq\006fmovqg\007fmovqge\010fmovqgeu\007fmovqgt\007"
3251 "fmovqgu\006fmovql\007fmovqle\010fmovqleu\007fmovqlg\007fmovqlt\007fmovq"
3252 "lu\006fmovqn\007fmovqne\010fmovqneg\007fmovqnz\006fmovqo\010fmovqpos\006"
3253 "fmovqu\007fmovque\007fmovqug\010fmovquge\007fmovqul\010fmovqule\007fmov"
3254 "qvc\007fmovqvs\006fmovqz\006fmovrd\007fmovrde\tfmovrdgez\010fmovrdgz\tf"
3255 "movrdlez\010fmovrdlz\010fmovrdne\010fmovrdnz\007fmovrdz\006fmovrq\007fm"
3256 "ovrqe\tfmovrqgez\010fmovrqgz\tfmovrqlez\010fmovrqlz\010fmovrqne\010fmov"
3257 "rqnz\007fmovrqz\006fmovrs\007fmovrse\tfmovrsgez\010fmovrsgz\tfmovrslez\010"
3258 "fmovrslz\010fmovrsne\010fmovrsnz\007fmovrsz\005fmovs\006fmovsa\007fmovs"
3259 "cc\007fmovscs\006fmovse\007fmovseq\006fmovsg\007fmovsge\010fmovsgeu\007"
3260 "fmovsgt\007fmovsgu\006fmovsl\007fmovsle\010fmovsleu\007fmovslg\007fmovs"
3261 "lt\007fmovslu\006fmovsn\007fmovsne\010fmovsneg\007fmovsnz\006fmovso\010"
3262 "fmovspos\006fmovsu\007fmovsue\007fmovsug\010fmovsuge\007fmovsul\010fmov"
3263 "sule\007fmovsvc\007fmovsvs\006fmovsz\nfmul8sux16\nfmul8ulx16\010fmul8x1"
3264 "6\nfmul8x16al\nfmul8x16au\005fmuld\013fmuld8sux16\013fmuld8ulx16\005fmu"
3265 "lq\005fmuls\006fnaddd\006fnadds\005fnand\006fnands\005fnegd\005fnegq\005"
3266 "fnegs\007fnhaddd\007fnhadds\004fnor\005fnors\005fnot1\006fnot1s\005fnot"
3267 "2\006fnot2s\004fone\005fones\003for\007fornot1\010fornot1s\007fornot2\010"
3268 "fornot2s\004fors\007fpack16\007fpack32\010fpackfix\007fpadd16\010fpadd1"
3269 "6s\007fpadd32\010fpadd32s\007fpadd64\007fpmerge\007fpsub16\010fpsub16s\007"
3270 "fpsub32\010fpsub32s\005fqtod\005fqtoi\005fqtos\005fqtox\007fslas16\007f"
3271 "slas32\006fsll16\006fsll32\006fsmuld\006fsqrtd\006fsqrtq\006fsqrts\006f"
3272 "sra16\006fsra32\005fsrc1\006fsrc1s\005fsrc2\006fsrc2s\006fsrl16\006fsrl"
3273 "32\005fstod\005fstoi\005fstoq\005fstox\005fsubd\005fsubq\005fsubs\005fx"
3274 "nor\006fxnors\004fxor\005fxors\005fxtod\005fxtoq\005fxtos\005fzero\006f"
3275 "zeros\003inc\005inccc\003jmp\004jmpl\002ld\003lda\003ldd\004ldda\003ldq"
3276 "\004ldqa\004ldsb\005ldsba\004ldsh\005ldsha\006ldstub\007ldstuba\004ldsw"
3277 "\005ldswa\004ldub\005lduba\004lduh\005lduha\003ldx\004ldxa\005lzcnt\006"
3278 "membar\003mov\004mova\005movcc\005movcs\007movdtox\004move\005moveq\004"
3279 "movg\005movge\006movgeu\005movgt\005movgu\004movl\005movle\006movleu\005"
3280 "movlg\005movlt\005movlu\004movn\005movne\006movneg\005movnz\004movo\006"
3281 "movpos\004movr\005movre\007movrgez\006movrgz\007movrlez\006movrlz\006mo"
3282 "vrne\006movrnz\005movrz\010movstosw\010movstouw\004movu\005movue\005mov"
3283 "ug\006movuge\005movul\006movule\005movvc\005movvs\004movz\006mulscc\004"
3284 "mulx\003neg\003nop\003not\002or\004orcc\003orn\005orncc\005pdist\006pdi"
3285 "stn\004popc\010prefetch\tprefetcha\003pwr\002rd\004rdpr\007restore\010r"
3286 "estored\003ret\004retl\005retry\004rett\004save\005saved\004sdiv\006sdi"
3287 "vcc\005sdivx\003set\005sethi\004setx\010shutdown\004siam\005signx\003si"
3288 "r\003sll\004sllx\004smac\004smul\006smulcc\003sra\004srax\003srl\004srl"
3289 "x\002st\003sta\003stb\004stba\005stbar\003std\004stda\003sth\004stha\003"
3290 "stq\004stqa\003stx\004stxa\003sub\005subcc\004subx\006subxcc\004swap\005"
3291 "swapa\001t\002ta\006taddcc\010taddcctv\003tcc\003tcs\002te\003teq\002tg"
3292 "\003tge\004tgeu\003tgt\003tgu\002tl\003tle\004tleu\003tlt\003tlu\002tn\003"
3293 "tne\004tneg\003tnz\004tpos\003tst\006tsubcc\010tsubcctv\003tvc\003tvs\002"
3294 "tz\004udiv\006udivcc\005udivx\004umac\004umul\006umulcc\007umulxhi\005u"
3295 "nimp\002wr\004wrpr\005xmulx\007xmulxhi\004xnor\006xnorcc\003xor\005xorc"
3296 "c";
3297
3298// Feature bitsets.
3299enum : uint8_t {
3300 AMFBS_None,
3301 AMFBS_HasCASA,
3302 AMFBS_HasPWRPSR,
3303 AMFBS_HasV9,
3304 AMFBS_HasVIS,
3305 AMFBS_HasVIS2,
3306 AMFBS_HasVIS3,
3307};
3308
3309static constexpr FeatureBitset FeatureBitsets[] = {
3310 {}, // AMFBS_None
3311 {Feature_HasCASABit, },
3312 {Feature_HasPWRPSRBit, },
3313 {Feature_HasV9Bit, },
3314 {Feature_HasVISBit, },
3315 {Feature_HasVIS2Bit, },
3316 {Feature_HasVIS3Bit, },
3317};
3318
3319namespace {
3320 struct MatchEntry {
3321 uint16_t Mnemonic;
3322 uint16_t Opcode;
3323 uint16_t ConvertFn;
3324 uint8_t RequiredFeaturesIdx;
3325 uint8_t Classes[6];
3326 StringRef getMnemonic() const {
3327 return StringRef(MnemonicTable + Mnemonic + 1,
3328 MnemonicTable[Mnemonic]);
3329 }
3330 };
3331
3332 // Predicate for searching for an opcode.
3333 struct LessOpcode {
3334 bool operator()(const MatchEntry &LHS, StringRef RHS) {
3335 return LHS.getMnemonic() < RHS;
3336 }
3337 bool operator()(StringRef LHS, const MatchEntry &RHS) {
3338 return LHS < RHS.getMnemonic();
3339 }
3340 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
3341 return LHS.getMnemonic() < RHS.getMnemonic();
3342 }
3343 };
3344} // end anonymous namespace
3345
3346static const MatchEntry MatchTable0[] = {
3347 { 0 /* add */, SP::ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3348 { 0 /* add */, SP::ADDri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3349 { 0 /* add */, SP::TLS_ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1__TailRelocSymAdd_TLS1_3, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs, MCK_TailRelocSymAdd_TLS }, },
3350 { 4 /* addcc */, SP::ADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3351 { 4 /* addcc */, SP::ADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3352 { 10 /* addx */, SP::ADDCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3353 { 10 /* addx */, SP::ADDCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3354 { 10 /* addx */, SP::ADDCri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
3355 { 15 /* addxc */, SP::ADDXC, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3356 { 21 /* addxcc */, SP::ADDErr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3357 { 21 /* addxcc */, SP::ADDEri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3358 { 28 /* addxccc */, SP::ADDXCCC, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3359 { 36 /* alignaddr */, SP::ALIGNADDR, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3360 { 46 /* alignaddrl */, SP::ALIGNADDRL, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3361 { 57 /* and */, SP::ANDrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3362 { 57 /* and */, SP::ANDri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3363 { 61 /* andcc */, SP::ANDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3364 { 61 /* andcc */, SP::ANDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3365 { 67 /* andn */, SP::ANDNrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3366 { 67 /* andn */, SP::ANDNri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3367 { 72 /* andncc */, SP::ANDNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3368 { 72 /* andncc */, SP::ANDNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3369 { 79 /* array16 */, SP::ARRAY16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3370 { 87 /* array32 */, SP::ARRAY32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3371 { 95 /* array8 */, SP::ARRAY8, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3372 { 102 /* b */, SP::BCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3373 { 102 /* b */, SP::BPXCC, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3374 { 102 /* b */, SP::BCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3375 { 102 /* b */, SP::BPICC, Convert__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3376 { 102 /* b */, SP::BCOND, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, },
3377 { 102 /* b */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3378 { 102 /* b */, SP::BPICCA, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3379 { 102 /* b */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3380 { 102 /* b */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3381 { 102 /* b */, SP::BPXCC, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3382 { 102 /* b */, SP::BPICC, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3383 { 102 /* b */, SP::BPXCC, Convert__Imm1_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_Imm }, },
3384 { 102 /* b */, SP::BCONDA, Convert__Imm1_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_a, MCK_Imm }, },
3385 { 102 /* b */, SP::BPICC, Convert__Imm1_2__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_Imm }, },
3386 { 102 /* b */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3387 { 102 /* b */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3388 { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3389 { 102 /* b */, SP::BPICCA, Convert__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3390 { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__Imm1_0, AMFBS_None, { MCK_Imm, MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3391 { 102 /* b */, SP::BPICCA, Convert__Imm1_3__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_a, MCK_ICC, MCK_Imm }, },
3392 { 102 /* b */, SP::BPXCCNT, Convert__Imm1_3__Imm1_0, AMFBS_None, { MCK_Imm, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3393 { 102 /* b */, SP::BPICCNT, Convert__Imm1_3__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_pn, MCK_ICC, MCK_Imm }, },
3394 { 102 /* b */, SP::BPXCCANT, Convert__Imm1_4__Imm1_0, AMFBS_None, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3395 { 102 /* b */, SP::BPICCANT, Convert__Imm1_4__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3396 { 104 /* ba */, SP::BA, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
3397 { 104 /* ba */, SP::BCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3398 { 104 /* ba */, SP::BPXCC, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3399 { 104 /* ba */, SP::BCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3400 { 104 /* ba */, SP::BPICC, Convert__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3401 { 104 /* ba */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3402 { 104 /* ba */, SP::BPICCA, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3403 { 104 /* ba */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3404 { 104 /* ba */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3405 { 104 /* ba */, SP::BPXCC, Convert__Imm1_2__imm_95_8, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3406 { 104 /* ba */, SP::BPICC, Convert__Imm1_2__imm_95_8, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3407 { 104 /* ba */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3408 { 104 /* ba */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3409 { 104 /* ba */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3410 { 104 /* ba */, SP::BPICCA, Convert__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3411 { 107 /* bcc */, SP::BCOND, Convert__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
3412 { 107 /* bcc */, SP::BPXCC, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3413 { 107 /* bcc */, SP::BCONDA, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK_a, MCK_Imm }, },
3414 { 107 /* bcc */, SP::BPICC, Convert__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3415 { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3416 { 107 /* bcc */, SP::BPICCA, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3417 { 107 /* bcc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3418 { 107 /* bcc */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3419 { 107 /* bcc */, SP::BPXCC, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3420 { 107 /* bcc */, SP::BPICC, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3421 { 107 /* bcc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3422 { 107 /* bcc */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3423 { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3424 { 107 /* bcc */, SP::BPICCA, Convert__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3425 { 111 /* bclr */, SP::ANDNrr, Convert__Reg1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
3426 { 111 /* bclr */, SP::ANDNri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3427 { 116 /* bcs */, SP::BCOND, Convert__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
3428 { 116 /* bcs */, SP::BPXCC, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3429 { 116 /* bcs */, SP::BCONDA, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK_a, MCK_Imm }, },
3430 { 116 /* bcs */, SP::BPICC, Convert__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3431 { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3432 { 116 /* bcs */, SP::BPICCA, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3433 { 116 /* bcs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3434 { 116 /* bcs */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3435 { 116 /* bcs */, SP::BPXCC, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3436 { 116 /* bcs */, SP::BPICC, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3437 { 116 /* bcs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3438 { 116 /* bcs */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3439 { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3440 { 116 /* bcs */, SP::BPICCA, Convert__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3441 { 120 /* be */, SP::BCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3442 { 120 /* be */, SP::BPXCC, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3443 { 120 /* be */, SP::BCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3444 { 120 /* be */, SP::BPICC, Convert__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3445 { 120 /* be */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3446 { 120 /* be */, SP::BPICCA, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3447 { 120 /* be */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3448 { 120 /* be */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3449 { 120 /* be */, SP::BPXCC, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3450 { 120 /* be */, SP::BPICC, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3451 { 120 /* be */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3452 { 120 /* be */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3453 { 120 /* be */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3454 { 120 /* be */, SP::BPICCA, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3455 { 123 /* beq */, SP::BCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3456 { 123 /* beq */, SP::BPXCC, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3457 { 123 /* beq */, SP::BCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3458 { 123 /* beq */, SP::BPICC, Convert__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3459 { 123 /* beq */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3460 { 123 /* beq */, SP::BPICCA, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3461 { 123 /* beq */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3462 { 123 /* beq */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3463 { 123 /* beq */, SP::BPXCC, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3464 { 123 /* beq */, SP::BPICC, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3465 { 123 /* beq */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3466 { 123 /* beq */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3467 { 123 /* beq */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3468 { 123 /* beq */, SP::BPICCA, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3469 { 127 /* bg */, SP::BCOND, Convert__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
3470 { 127 /* bg */, SP::BPXCC, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3471 { 127 /* bg */, SP::BCONDA, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK_a, MCK_Imm }, },
3472 { 127 /* bg */, SP::BPICC, Convert__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3473 { 127 /* bg */, SP::BPXCCA, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3474 { 127 /* bg */, SP::BPICCA, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3475 { 127 /* bg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3476 { 127 /* bg */, SP::BPICCNT, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3477 { 127 /* bg */, SP::BPXCC, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3478 { 127 /* bg */, SP::BPICC, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3479 { 127 /* bg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_10, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3480 { 127 /* bg */, SP::BPICCANT, Convert__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3481 { 127 /* bg */, SP::BPXCCA, Convert__Imm1_3__imm_95_10, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3482 { 127 /* bg */, SP::BPICCA, Convert__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3483 { 130 /* bge */, SP::BCOND, Convert__Imm1_0__imm_95_11, AMFBS_None, { MCK_Imm }, },
3484 { 130 /* bge */, SP::BPXCC, Convert__Imm1_1__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3485 { 130 /* bge */, SP::BCONDA, Convert__Imm1_1__imm_95_11, AMFBS_None, { MCK_a, MCK_Imm }, },
3486 { 130 /* bge */, SP::BPICC, Convert__Imm1_1__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3487 { 130 /* bge */, SP::BPXCCA, Convert__Imm1_2__imm_95_11, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3488 { 130 /* bge */, SP::BPICCA, Convert__Imm1_2__imm_95_11, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3489 { 130 /* bge */, SP::BPXCCNT, Convert__Imm1_2__imm_95_11, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3490 { 130 /* bge */, SP::BPICCNT, Convert__Imm1_2__imm_95_11, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3491 { 130 /* bge */, SP::BPXCC, Convert__Imm1_2__imm_95_11, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3492 { 130 /* bge */, SP::BPICC, Convert__Imm1_2__imm_95_11, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3493 { 130 /* bge */, SP::BPXCCANT, Convert__Imm1_3__imm_95_11, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3494 { 130 /* bge */, SP::BPICCANT, Convert__Imm1_3__imm_95_11, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3495 { 130 /* bge */, SP::BPXCCA, Convert__Imm1_3__imm_95_11, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3496 { 130 /* bge */, SP::BPICCA, Convert__Imm1_3__imm_95_11, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3497 { 134 /* bgeu */, SP::BCOND, Convert__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
3498 { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3499 { 134 /* bgeu */, SP::BCONDA, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK_a, MCK_Imm }, },
3500 { 134 /* bgeu */, SP::BPICC, Convert__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3501 { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3502 { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3503 { 134 /* bgeu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3504 { 134 /* bgeu */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3505 { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_2__imm_95_13, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3506 { 134 /* bgeu */, SP::BPICC, Convert__Imm1_2__imm_95_13, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3507 { 134 /* bgeu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3508 { 134 /* bgeu */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3509 { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3510 { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3511 { 139 /* bgt */, SP::BCOND, Convert__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
3512 { 139 /* bgt */, SP::BPXCC, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3513 { 139 /* bgt */, SP::BCONDA, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK_a, MCK_Imm }, },
3514 { 139 /* bgt */, SP::BPICC, Convert__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3515 { 139 /* bgt */, SP::BPXCCA, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3516 { 139 /* bgt */, SP::BPICCA, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3517 { 139 /* bgt */, SP::BPXCCNT, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3518 { 139 /* bgt */, SP::BPICCNT, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3519 { 139 /* bgt */, SP::BPXCC, Convert__Imm1_2__imm_95_10, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3520 { 139 /* bgt */, SP::BPICC, Convert__Imm1_2__imm_95_10, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3521 { 139 /* bgt */, SP::BPXCCANT, Convert__Imm1_3__imm_95_10, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3522 { 139 /* bgt */, SP::BPICCANT, Convert__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3523 { 139 /* bgt */, SP::BPXCCA, Convert__Imm1_3__imm_95_10, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3524 { 139 /* bgt */, SP::BPICCA, Convert__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3525 { 143 /* bgu */, SP::BCOND, Convert__Imm1_0__imm_95_12, AMFBS_None, { MCK_Imm }, },
3526 { 143 /* bgu */, SP::BPXCC, Convert__Imm1_1__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3527 { 143 /* bgu */, SP::BCONDA, Convert__Imm1_1__imm_95_12, AMFBS_None, { MCK_a, MCK_Imm }, },
3528 { 143 /* bgu */, SP::BPICC, Convert__Imm1_1__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3529 { 143 /* bgu */, SP::BPXCCA, Convert__Imm1_2__imm_95_12, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3530 { 143 /* bgu */, SP::BPICCA, Convert__Imm1_2__imm_95_12, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3531 { 143 /* bgu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_12, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3532 { 143 /* bgu */, SP::BPICCNT, Convert__Imm1_2__imm_95_12, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3533 { 143 /* bgu */, SP::BPXCC, Convert__Imm1_2__imm_95_12, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3534 { 143 /* bgu */, SP::BPICC, Convert__Imm1_2__imm_95_12, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3535 { 143 /* bgu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_12, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3536 { 143 /* bgu */, SP::BPICCANT, Convert__Imm1_3__imm_95_12, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3537 { 143 /* bgu */, SP::BPXCCA, Convert__Imm1_3__imm_95_12, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3538 { 143 /* bgu */, SP::BPICCA, Convert__Imm1_3__imm_95_12, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3539 { 147 /* bl */, SP::BCOND, Convert__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
3540 { 147 /* bl */, SP::BPXCC, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3541 { 147 /* bl */, SP::BCONDA, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK_a, MCK_Imm }, },
3542 { 147 /* bl */, SP::BPICC, Convert__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3543 { 147 /* bl */, SP::BPXCCA, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3544 { 147 /* bl */, SP::BPICCA, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3545 { 147 /* bl */, SP::BPXCCNT, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3546 { 147 /* bl */, SP::BPICCNT, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3547 { 147 /* bl */, SP::BPXCC, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3548 { 147 /* bl */, SP::BPICC, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3549 { 147 /* bl */, SP::BPXCCANT, Convert__Imm1_3__imm_95_3, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3550 { 147 /* bl */, SP::BPICCANT, Convert__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3551 { 147 /* bl */, SP::BPXCCA, Convert__Imm1_3__imm_95_3, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3552 { 147 /* bl */, SP::BPICCA, Convert__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3553 { 150 /* ble */, SP::BCOND, Convert__Imm1_0__imm_95_2, AMFBS_None, { MCK_Imm }, },
3554 { 150 /* ble */, SP::BPXCC, Convert__Imm1_1__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3555 { 150 /* ble */, SP::BCONDA, Convert__Imm1_1__imm_95_2, AMFBS_None, { MCK_a, MCK_Imm }, },
3556 { 150 /* ble */, SP::BPICC, Convert__Imm1_1__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3557 { 150 /* ble */, SP::BPXCCA, Convert__Imm1_2__imm_95_2, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3558 { 150 /* ble */, SP::BPICCA, Convert__Imm1_2__imm_95_2, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3559 { 150 /* ble */, SP::BPXCCNT, Convert__Imm1_2__imm_95_2, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3560 { 150 /* ble */, SP::BPICCNT, Convert__Imm1_2__imm_95_2, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3561 { 150 /* ble */, SP::BPXCC, Convert__Imm1_2__imm_95_2, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3562 { 150 /* ble */, SP::BPICC, Convert__Imm1_2__imm_95_2, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3563 { 150 /* ble */, SP::BPXCCANT, Convert__Imm1_3__imm_95_2, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3564 { 150 /* ble */, SP::BPICCANT, Convert__Imm1_3__imm_95_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3565 { 150 /* ble */, SP::BPXCCA, Convert__Imm1_3__imm_95_2, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3566 { 150 /* ble */, SP::BPICCA, Convert__Imm1_3__imm_95_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3567 { 154 /* bleu */, SP::BCOND, Convert__Imm1_0__imm_95_4, AMFBS_None, { MCK_Imm }, },
3568 { 154 /* bleu */, SP::BPXCC, Convert__Imm1_1__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3569 { 154 /* bleu */, SP::BCONDA, Convert__Imm1_1__imm_95_4, AMFBS_None, { MCK_a, MCK_Imm }, },
3570 { 154 /* bleu */, SP::BPICC, Convert__Imm1_1__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3571 { 154 /* bleu */, SP::BPXCCA, Convert__Imm1_2__imm_95_4, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3572 { 154 /* bleu */, SP::BPICCA, Convert__Imm1_2__imm_95_4, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3573 { 154 /* bleu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_4, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3574 { 154 /* bleu */, SP::BPICCNT, Convert__Imm1_2__imm_95_4, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3575 { 154 /* bleu */, SP::BPXCC, Convert__Imm1_2__imm_95_4, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3576 { 154 /* bleu */, SP::BPICC, Convert__Imm1_2__imm_95_4, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3577 { 154 /* bleu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_4, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3578 { 154 /* bleu */, SP::BPICCANT, Convert__Imm1_3__imm_95_4, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3579 { 154 /* bleu */, SP::BPXCCA, Convert__Imm1_3__imm_95_4, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3580 { 154 /* bleu */, SP::BPICCA, Convert__Imm1_3__imm_95_4, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3581 { 159 /* blt */, SP::BCOND, Convert__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
3582 { 159 /* blt */, SP::BPXCC, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3583 { 159 /* blt */, SP::BCONDA, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK_a, MCK_Imm }, },
3584 { 159 /* blt */, SP::BPICC, Convert__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3585 { 159 /* blt */, SP::BPXCCA, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3586 { 159 /* blt */, SP::BPICCA, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3587 { 159 /* blt */, SP::BPXCCNT, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3588 { 159 /* blt */, SP::BPICCNT, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3589 { 159 /* blt */, SP::BPXCC, Convert__Imm1_2__imm_95_3, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3590 { 159 /* blt */, SP::BPICC, Convert__Imm1_2__imm_95_3, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3591 { 159 /* blt */, SP::BPXCCANT, Convert__Imm1_3__imm_95_3, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3592 { 159 /* blt */, SP::BPICCANT, Convert__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3593 { 159 /* blt */, SP::BPXCCA, Convert__Imm1_3__imm_95_3, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3594 { 159 /* blt */, SP::BPICCA, Convert__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3595 { 163 /* blu */, SP::BCOND, Convert__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
3596 { 163 /* blu */, SP::BPXCC, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3597 { 163 /* blu */, SP::BCONDA, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK_a, MCK_Imm }, },
3598 { 163 /* blu */, SP::BPICC, Convert__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3599 { 163 /* blu */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3600 { 163 /* blu */, SP::BPICCA, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3601 { 163 /* blu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3602 { 163 /* blu */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3603 { 163 /* blu */, SP::BPXCC, Convert__Imm1_2__imm_95_5, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3604 { 163 /* blu */, SP::BPICC, Convert__Imm1_2__imm_95_5, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3605 { 163 /* blu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3606 { 163 /* blu */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3607 { 163 /* blu */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3608 { 163 /* blu */, SP::BPICCA, Convert__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3609 { 167 /* bmask */, SP::BMASK, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3610 { 173 /* bn */, SP::BCOND, Convert__Imm1_0__imm_95_0, AMFBS_None, { MCK_Imm }, },
3611 { 173 /* bn */, SP::BPXCC, Convert__Imm1_1__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3612 { 173 /* bn */, SP::BCONDA, Convert__Imm1_1__imm_95_0, AMFBS_None, { MCK_a, MCK_Imm }, },
3613 { 173 /* bn */, SP::BPICC, Convert__Imm1_1__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3614 { 173 /* bn */, SP::BPXCCA, Convert__Imm1_2__imm_95_0, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3615 { 173 /* bn */, SP::BPICCA, Convert__Imm1_2__imm_95_0, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3616 { 173 /* bn */, SP::BPXCCNT, Convert__Imm1_2__imm_95_0, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3617 { 173 /* bn */, SP::BPICCNT, Convert__Imm1_2__imm_95_0, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3618 { 173 /* bn */, SP::BPXCC, Convert__Imm1_2__imm_95_0, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3619 { 173 /* bn */, SP::BPICC, Convert__Imm1_2__imm_95_0, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3620 { 173 /* bn */, SP::BPXCCANT, Convert__Imm1_3__imm_95_0, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3621 { 173 /* bn */, SP::BPICCANT, Convert__Imm1_3__imm_95_0, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3622 { 173 /* bn */, SP::BPXCCA, Convert__Imm1_3__imm_95_0, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3623 { 173 /* bn */, SP::BPICCA, Convert__Imm1_3__imm_95_0, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3624 { 176 /* bne */, SP::BCOND, Convert__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
3625 { 176 /* bne */, SP::BPXCC, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3626 { 176 /* bne */, SP::BCONDA, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK_a, MCK_Imm }, },
3627 { 176 /* bne */, SP::BPICC, Convert__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3628 { 176 /* bne */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3629 { 176 /* bne */, SP::BPICCA, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3630 { 176 /* bne */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3631 { 176 /* bne */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3632 { 176 /* bne */, SP::BPXCC, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3633 { 176 /* bne */, SP::BPICC, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3634 { 176 /* bne */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3635 { 176 /* bne */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3636 { 176 /* bne */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3637 { 176 /* bne */, SP::BPICCA, Convert__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3638 { 180 /* bneg */, SP::BCOND, Convert__Imm1_0__imm_95_6, AMFBS_None, { MCK_Imm }, },
3639 { 180 /* bneg */, SP::BPXCC, Convert__Imm1_1__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3640 { 180 /* bneg */, SP::BCONDA, Convert__Imm1_1__imm_95_6, AMFBS_None, { MCK_a, MCK_Imm }, },
3641 { 180 /* bneg */, SP::BPICC, Convert__Imm1_1__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3642 { 180 /* bneg */, SP::BPXCCA, Convert__Imm1_2__imm_95_6, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3643 { 180 /* bneg */, SP::BPICCA, Convert__Imm1_2__imm_95_6, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3644 { 180 /* bneg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_6, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3645 { 180 /* bneg */, SP::BPICCNT, Convert__Imm1_2__imm_95_6, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3646 { 180 /* bneg */, SP::BPXCC, Convert__Imm1_2__imm_95_6, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3647 { 180 /* bneg */, SP::BPICC, Convert__Imm1_2__imm_95_6, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3648 { 180 /* bneg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_6, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3649 { 180 /* bneg */, SP::BPICCANT, Convert__Imm1_3__imm_95_6, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3650 { 180 /* bneg */, SP::BPXCCA, Convert__Imm1_3__imm_95_6, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3651 { 180 /* bneg */, SP::BPICCA, Convert__Imm1_3__imm_95_6, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3652 { 185 /* bnz */, SP::BCOND, Convert__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
3653 { 185 /* bnz */, SP::BPXCC, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3654 { 185 /* bnz */, SP::BCONDA, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK_a, MCK_Imm }, },
3655 { 185 /* bnz */, SP::BPICC, Convert__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3656 { 185 /* bnz */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3657 { 185 /* bnz */, SP::BPICCA, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3658 { 185 /* bnz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3659 { 185 /* bnz */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3660 { 185 /* bnz */, SP::BPXCC, Convert__Imm1_2__imm_95_9, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3661 { 185 /* bnz */, SP::BPICC, Convert__Imm1_2__imm_95_9, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3662 { 185 /* bnz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3663 { 185 /* bnz */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3664 { 185 /* bnz */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3665 { 185 /* bnz */, SP::BPICCA, Convert__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3666 { 189 /* bpos */, SP::BCOND, Convert__Imm1_0__imm_95_14, AMFBS_None, { MCK_Imm }, },
3667 { 189 /* bpos */, SP::BPXCC, Convert__Imm1_1__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3668 { 189 /* bpos */, SP::BCONDA, Convert__Imm1_1__imm_95_14, AMFBS_None, { MCK_a, MCK_Imm }, },
3669 { 189 /* bpos */, SP::BPICC, Convert__Imm1_1__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3670 { 189 /* bpos */, SP::BPXCCA, Convert__Imm1_2__imm_95_14, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3671 { 189 /* bpos */, SP::BPICCA, Convert__Imm1_2__imm_95_14, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3672 { 189 /* bpos */, SP::BPXCCNT, Convert__Imm1_2__imm_95_14, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3673 { 189 /* bpos */, SP::BPICCNT, Convert__Imm1_2__imm_95_14, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3674 { 189 /* bpos */, SP::BPXCC, Convert__Imm1_2__imm_95_14, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3675 { 189 /* bpos */, SP::BPICC, Convert__Imm1_2__imm_95_14, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3676 { 189 /* bpos */, SP::BPXCCANT, Convert__Imm1_3__imm_95_14, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3677 { 189 /* bpos */, SP::BPICCANT, Convert__Imm1_3__imm_95_14, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3678 { 189 /* bpos */, SP::BPXCCA, Convert__Imm1_3__imm_95_14, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3679 { 189 /* bpos */, SP::BPICCA, Convert__Imm1_3__imm_95_14, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3680 { 194 /* br */, SP::BPR, Convert__Imm1_2__Imm1_0__Reg1_1, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_Imm }, },
3681 { 194 /* br */, SP::BPRA, Convert__Imm1_3__Imm1_0__Reg1_2, AMFBS_None, { MCK_Imm, MCK_a, MCK_IntRegs, MCK_Imm }, },
3682 { 194 /* br */, SP::BPRNT, Convert__Imm1_3__Imm1_0__Reg1_2, AMFBS_None, { MCK_Imm, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3683 { 194 /* br */, SP::BPRANT, Convert__Imm1_4__Imm1_0__Reg1_3, AMFBS_None, { MCK_Imm, MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3684 { 197 /* bre */, SP::BPR, Convert__Imm1_1__imm_95_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3685 { 197 /* bre */, SP::BPRA, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3686 { 197 /* bre */, SP::BPRNT, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3687 { 197 /* bre */, SP::BPR, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3688 { 197 /* bre */, SP::BPRANT, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3689 { 197 /* bre */, SP::BPRA, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3690 { 201 /* brgez */, SP::BPR, Convert__Imm1_1__imm_95_7__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3691 { 201 /* brgez */, SP::BPRA, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3692 { 201 /* brgez */, SP::BPRNT, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3693 { 201 /* brgez */, SP::BPR, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3694 { 201 /* brgez */, SP::BPRANT, Convert__Imm1_3__imm_95_7__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3695 { 201 /* brgez */, SP::BPRA, Convert__Imm1_3__imm_95_7__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3696 { 207 /* brgz */, SP::BPR, Convert__Imm1_1__imm_95_6__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3697 { 207 /* brgz */, SP::BPRA, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3698 { 207 /* brgz */, SP::BPRNT, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3699 { 207 /* brgz */, SP::BPR, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3700 { 207 /* brgz */, SP::BPRANT, Convert__Imm1_3__imm_95_6__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3701 { 207 /* brgz */, SP::BPRA, Convert__Imm1_3__imm_95_6__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3702 { 212 /* brlez */, SP::BPR, Convert__Imm1_1__imm_95_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3703 { 212 /* brlez */, SP::BPRA, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3704 { 212 /* brlez */, SP::BPRNT, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3705 { 212 /* brlez */, SP::BPR, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3706 { 212 /* brlez */, SP::BPRANT, Convert__Imm1_3__imm_95_2__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3707 { 212 /* brlez */, SP::BPRA, Convert__Imm1_3__imm_95_2__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3708 { 218 /* brlz */, SP::BPR, Convert__Imm1_1__imm_95_3__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3709 { 218 /* brlz */, SP::BPRA, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3710 { 218 /* brlz */, SP::BPRNT, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3711 { 218 /* brlz */, SP::BPR, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3712 { 218 /* brlz */, SP::BPRANT, Convert__Imm1_3__imm_95_3__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3713 { 218 /* brlz */, SP::BPRA, Convert__Imm1_3__imm_95_3__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3714 { 223 /* brne */, SP::BPR, Convert__Imm1_1__imm_95_5__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3715 { 223 /* brne */, SP::BPRA, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3716 { 223 /* brne */, SP::BPRNT, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3717 { 223 /* brne */, SP::BPR, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3718 { 223 /* brne */, SP::BPRANT, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3719 { 223 /* brne */, SP::BPRA, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3720 { 228 /* brnz */, SP::BPR, Convert__Imm1_1__imm_95_5__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3721 { 228 /* brnz */, SP::BPRA, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3722 { 228 /* brnz */, SP::BPRNT, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3723 { 228 /* brnz */, SP::BPR, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3724 { 228 /* brnz */, SP::BPRANT, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3725 { 228 /* brnz */, SP::BPRA, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3726 { 233 /* brz */, SP::BPR, Convert__Imm1_1__imm_95_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3727 { 233 /* brz */, SP::BPRA, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_a, MCK_IntRegs, MCK_Imm }, },
3728 { 233 /* brz */, SP::BPRNT, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
3729 { 233 /* brz */, SP::BPR, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_None, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
3730 { 233 /* brz */, SP::BPRANT, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_None, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
3731 { 233 /* brz */, SP::BPRA, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_None, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
3732 { 237 /* bset */, SP::ORrr, Convert__Reg1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
3733 { 237 /* bset */, SP::ORri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3734 { 242 /* bshuffle */, SP::BSHUFFLE, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3735 { 251 /* btog */, SP::XORrr, Convert__Reg1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
3736 { 251 /* btog */, SP::XORri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3737 { 256 /* btst */, SP::ANDCCrr, Convert__regG0__Reg1_1__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
3738 { 256 /* btst */, SP::ANDCCri, Convert__regG0__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3739 { 261 /* bvc */, SP::BCOND, Convert__Imm1_0__imm_95_15, AMFBS_None, { MCK_Imm }, },
3740 { 261 /* bvc */, SP::BPXCC, Convert__Imm1_1__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3741 { 261 /* bvc */, SP::BCONDA, Convert__Imm1_1__imm_95_15, AMFBS_None, { MCK_a, MCK_Imm }, },
3742 { 261 /* bvc */, SP::BPICC, Convert__Imm1_1__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3743 { 261 /* bvc */, SP::BPXCCA, Convert__Imm1_2__imm_95_15, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3744 { 261 /* bvc */, SP::BPICCA, Convert__Imm1_2__imm_95_15, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3745 { 261 /* bvc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_15, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3746 { 261 /* bvc */, SP::BPICCNT, Convert__Imm1_2__imm_95_15, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3747 { 261 /* bvc */, SP::BPXCC, Convert__Imm1_2__imm_95_15, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3748 { 261 /* bvc */, SP::BPICC, Convert__Imm1_2__imm_95_15, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3749 { 261 /* bvc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_15, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3750 { 261 /* bvc */, SP::BPICCANT, Convert__Imm1_3__imm_95_15, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3751 { 261 /* bvc */, SP::BPXCCA, Convert__Imm1_3__imm_95_15, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3752 { 261 /* bvc */, SP::BPICCA, Convert__Imm1_3__imm_95_15, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3753 { 265 /* bvs */, SP::BCOND, Convert__Imm1_0__imm_95_7, AMFBS_None, { MCK_Imm }, },
3754 { 265 /* bvs */, SP::BPXCC, Convert__Imm1_1__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3755 { 265 /* bvs */, SP::BCONDA, Convert__Imm1_1__imm_95_7, AMFBS_None, { MCK_a, MCK_Imm }, },
3756 { 265 /* bvs */, SP::BPICC, Convert__Imm1_1__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3757 { 265 /* bvs */, SP::BPXCCA, Convert__Imm1_2__imm_95_7, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3758 { 265 /* bvs */, SP::BPICCA, Convert__Imm1_2__imm_95_7, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3759 { 265 /* bvs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_7, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3760 { 265 /* bvs */, SP::BPICCNT, Convert__Imm1_2__imm_95_7, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3761 { 265 /* bvs */, SP::BPXCC, Convert__Imm1_2__imm_95_7, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3762 { 265 /* bvs */, SP::BPICC, Convert__Imm1_2__imm_95_7, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3763 { 265 /* bvs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_7, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3764 { 265 /* bvs */, SP::BPICCANT, Convert__Imm1_3__imm_95_7, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3765 { 265 /* bvs */, SP::BPXCCA, Convert__Imm1_3__imm_95_7, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3766 { 265 /* bvs */, SP::BPICCA, Convert__Imm1_3__imm_95_7, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3767 { 269 /* bz */, SP::BCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3768 { 269 /* bz */, SP::BPXCC, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm }, },
3769 { 269 /* bz */, SP::BCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3770 { 269 /* bz */, SP::BPICC, Convert__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
3771 { 269 /* bz */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
3772 { 269 /* bz */, SP::BPICCA, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_ICC, MCK_Imm }, },
3773 { 269 /* bz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3774 { 269 /* bz */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pn, MCK_ICC, MCK_Imm }, },
3775 { 269 /* bz */, SP::BPXCC, Convert__Imm1_2__imm_95_1, AMFBS_None, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3776 { 269 /* bz */, SP::BPICC, Convert__Imm1_2__imm_95_1, AMFBS_HasV9, { MCK_pt, MCK_ICC, MCK_Imm }, },
3777 { 269 /* bz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
3778 { 269 /* bz */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_ICC, MCK_Imm }, },
3779 { 269 /* bz */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, AMFBS_None, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
3780 { 269 /* bz */, SP::BPICCA, Convert__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_ICC, MCK_Imm }, },
3781 { 272 /* call */, SP::CALL, Convert__CallTarget1_0, AMFBS_None, { MCK_CallTarget }, },
3782 { 272 /* call */, SP::JMPLri, Convert__regO7__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
3783 { 272 /* call */, SP::JMPLrr, Convert__regO7__MEMrr2_0, AMFBS_None, { MCK_MEMrr }, },
3784 { 272 /* call */, SP::TLS_CALL, Convert__CallTarget1_0__TailRelocSymCall_TLS1_1, AMFBS_None, { MCK_CallTarget, MCK_TailRelocSymCall_TLS }, },
3785 { 277 /* cas */, SP::CASArr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_128, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
3786 { 281 /* casa */, SP::CASAri, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK__PCT_asi, MCK_IntRegs, MCK_IntRegs }, },
3787 { 281 /* casa */, SP::CASArr, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__ASITag1_3, AMFBS_HasCASA, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_ASITag, MCK_IntRegs, MCK_IntRegs }, },
3788 { 286 /* casl */, SP::CASArr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_136, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
3789 { 291 /* casx */, SP::CASXArr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_128, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
3790 { 296 /* casxa */, SP::CASXAri, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK__PCT_asi, MCK_IntRegs, MCK_IntRegs }, },
3791 { 296 /* casxa */, SP::CASXArr, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__ASITag1_3, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_ASITag, MCK_IntRegs, MCK_IntRegs }, },
3792 { 302 /* casxl */, SP::CASXArr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_5_5__imm_95_136, AMFBS_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
3793 { 308 /* cb */, SP::CBCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3794 { 308 /* cb */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3795 { 308 /* cb */, SP::CBCOND, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, },
3796 { 308 /* cb */, SP::CBCONDA, Convert__Imm1_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_a, MCK_Imm }, },
3797 { 311 /* cb0 */, SP::CBCOND, Convert__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
3798 { 311 /* cb0 */, SP::CBCONDA, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK_a, MCK_Imm }, },
3799 { 315 /* cb01 */, SP::CBCOND, Convert__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
3800 { 315 /* cb01 */, SP::CBCONDA, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK_a, MCK_Imm }, },
3801 { 320 /* cb012 */, SP::CBCOND, Convert__Imm1_0__imm_95_15, AMFBS_None, { MCK_Imm }, },
3802 { 320 /* cb012 */, SP::CBCONDA, Convert__Imm1_1__imm_95_15, AMFBS_None, { MCK_a, MCK_Imm }, },
3803 { 326 /* cb013 */, SP::CBCOND, Convert__Imm1_0__imm_95_14, AMFBS_None, { MCK_Imm }, },
3804 { 326 /* cb013 */, SP::CBCONDA, Convert__Imm1_1__imm_95_14, AMFBS_None, { MCK_a, MCK_Imm }, },
3805 { 332 /* cb02 */, SP::CBCOND, Convert__Imm1_0__imm_95_11, AMFBS_None, { MCK_Imm }, },
3806 { 332 /* cb02 */, SP::CBCONDA, Convert__Imm1_1__imm_95_11, AMFBS_None, { MCK_a, MCK_Imm }, },
3807 { 337 /* cb023 */, SP::CBCOND, Convert__Imm1_0__imm_95_12, AMFBS_None, { MCK_Imm }, },
3808 { 337 /* cb023 */, SP::CBCONDA, Convert__Imm1_1__imm_95_12, AMFBS_None, { MCK_a, MCK_Imm }, },
3809 { 343 /* cb03 */, SP::CBCOND, Convert__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
3810 { 343 /* cb03 */, SP::CBCONDA, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK_a, MCK_Imm }, },
3811 { 348 /* cb1 */, SP::CBCOND, Convert__Imm1_0__imm_95_4, AMFBS_None, { MCK_Imm }, },
3812 { 348 /* cb1 */, SP::CBCONDA, Convert__Imm1_1__imm_95_4, AMFBS_None, { MCK_a, MCK_Imm }, },
3813 { 352 /* cb12 */, SP::CBCOND, Convert__Imm1_0__imm_95_2, AMFBS_None, { MCK_Imm }, },
3814 { 352 /* cb12 */, SP::CBCONDA, Convert__Imm1_1__imm_95_2, AMFBS_None, { MCK_a, MCK_Imm }, },
3815 { 357 /* cb123 */, SP::CBCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3816 { 357 /* cb123 */, SP::CBCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3817 { 363 /* cb13 */, SP::CBCOND, Convert__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
3818 { 363 /* cb13 */, SP::CBCONDA, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK_a, MCK_Imm }, },
3819 { 368 /* cb2 */, SP::CBCOND, Convert__Imm1_0__imm_95_6, AMFBS_None, { MCK_Imm }, },
3820 { 368 /* cb2 */, SP::CBCONDA, Convert__Imm1_1__imm_95_6, AMFBS_None, { MCK_a, MCK_Imm }, },
3821 { 372 /* cb23 */, SP::CBCOND, Convert__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
3822 { 372 /* cb23 */, SP::CBCONDA, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK_a, MCK_Imm }, },
3823 { 377 /* cb3 */, SP::CBCOND, Convert__Imm1_0__imm_95_7, AMFBS_None, { MCK_Imm }, },
3824 { 377 /* cb3 */, SP::CBCONDA, Convert__Imm1_1__imm_95_7, AMFBS_None, { MCK_a, MCK_Imm }, },
3825 { 381 /* cba */, SP::CBCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3826 { 381 /* cba */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3827 { 385 /* cbn */, SP::CBCOND, Convert__Imm1_0__imm_95_0, AMFBS_None, { MCK_Imm }, },
3828 { 385 /* cbn */, SP::CBCONDA, Convert__Imm1_1__imm_95_0, AMFBS_None, { MCK_a, MCK_Imm }, },
3829 { 389 /* clr */, SP::ORrr, Convert__Reg1_0__regG0__regG0, AMFBS_None, { MCK_IntRegs }, },
3830 { 389 /* clr */, SP::STri, Convert__MEMri2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_ }, },
3831 { 389 /* clr */, SP::STrr, Convert__MEMrr2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
3832 { 393 /* clrb */, SP::STBri, Convert__MEMri2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_ }, },
3833 { 393 /* clrb */, SP::STBrr, Convert__MEMrr2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
3834 { 398 /* clrh */, SP::STHri, Convert__MEMri2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_ }, },
3835 { 398 /* clrh */, SP::STHrr, Convert__MEMrr2_1__regG0, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
3836 { 403 /* cmask16 */, SP::CMASK16, Convert__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs }, },
3837 { 411 /* cmask32 */, SP::CMASK32, Convert__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs }, },
3838 { 419 /* cmask8 */, SP::CMASK8, Convert__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs }, },
3839 { 426 /* cmp */, SP::SUBCCrr, Convert__regG0__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
3840 { 426 /* cmp */, SP::SUBCCri, Convert__regG0__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm }, },
3841 { 430 /* dec */, SP::SUBri, Convert__Reg1_0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
3842 { 430 /* dec */, SP::SUBri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3843 { 434 /* deccc */, SP::SUBCCri, Convert__Reg1_0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
3844 { 434 /* deccc */, SP::SUBCCri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
3845 { 440 /* done */, SP::DONE, Convert_NoOperands, AMFBS_HasV9, { }, },
3846 { 445 /* edge16 */, SP::EDGE16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3847 { 452 /* edge16l */, SP::EDGE16L, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3848 { 460 /* edge16ln */, SP::EDGE16LN, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3849 { 469 /* edge16n */, SP::EDGE16N, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3850 { 477 /* edge32 */, SP::EDGE32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3851 { 484 /* edge32l */, SP::EDGE32L, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3852 { 492 /* edge32ln */, SP::EDGE32LN, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3853 { 501 /* edge32n */, SP::EDGE32N, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3854 { 509 /* edge8 */, SP::EDGE8, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3855 { 515 /* edge8l */, SP::EDGE8L, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3856 { 522 /* edge8ln */, SP::EDGE8LN, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3857 { 530 /* edge8n */, SP::EDGE8N, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3858 { 537 /* fabsd */, SP::FABSD, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
3859 { 543 /* fabsq */, SP::FABSQ, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
3860 { 549 /* fabss */, SP::FABSS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
3861 { 555 /* faddd */, SP::FADDD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3862 { 561 /* faddq */, SP::FADDQ, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3863 { 567 /* fadds */, SP::FADDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3864 { 573 /* faligndata */, SP::FALIGNADATA, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3865 { 584 /* fand */, SP::FAND, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3866 { 589 /* fandnot1 */, SP::FANDNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3867 { 598 /* fandnot1s */, SP::FANDNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3868 { 608 /* fandnot2 */, SP::FANDNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3869 { 617 /* fandnot2s */, SP::FANDNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3870 { 627 /* fands */, SP::FANDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3871 { 633 /* fb */, SP::FBCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3872 { 633 /* fb */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3873 { 633 /* fb */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3874 { 633 /* fb */, SP::FBCOND, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, },
3875 { 633 /* fb */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3876 { 633 /* fb */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3877 { 633 /* fb */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3878 { 633 /* fb */, SP::FBCONDA, Convert__Imm1_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_a, MCK_Imm }, },
3879 { 633 /* fb */, SP::FBCOND_V9, Convert__Imm1_2__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_Imm }, },
3880 { 633 /* fb */, SP::BPFCC, Convert__Imm1_2__Imm1_0__Reg1_1, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm }, },
3881 { 633 /* fb */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3882 { 633 /* fb */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3883 { 633 /* fb */, SP::FBCONDA_V9, Convert__Imm1_3__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_a, MCK_FCC0, MCK_Imm }, },
3884 { 633 /* fb */, SP::BPFCCA, Convert__Imm1_3__Imm1_0__Reg1_2, AMFBS_HasV9, { MCK_Imm, MCK_a, MCK_FCCRegs, MCK_Imm }, },
3885 { 633 /* fb */, SP::BPFCCNT, Convert__Imm1_3__Imm1_0__Reg1_2, AMFBS_HasV9, { MCK_Imm, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3886 { 633 /* fb */, SP::BPFCCANT, Convert__Imm1_4__Imm1_0__Reg1_3, AMFBS_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3887 { 636 /* fba */, SP::FBCOND, Convert__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
3888 { 636 /* fba */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, AMFBS_None, { MCK_a, MCK_Imm }, },
3889 { 636 /* fba */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3890 { 636 /* fba */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3891 { 636 /* fba */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3892 { 636 /* fba */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3893 { 636 /* fba */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3894 { 636 /* fba */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3895 { 640 /* fbe */, SP::FBCOND, Convert__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
3896 { 640 /* fbe */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK_a, MCK_Imm }, },
3897 { 640 /* fbe */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3898 { 640 /* fbe */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3899 { 640 /* fbe */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3900 { 640 /* fbe */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3901 { 640 /* fbe */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3902 { 640 /* fbe */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3903 { 644 /* fbg */, SP::FBCOND, Convert__Imm1_0__imm_95_6, AMFBS_None, { MCK_Imm }, },
3904 { 644 /* fbg */, SP::FBCONDA, Convert__Imm1_1__imm_95_6, AMFBS_None, { MCK_a, MCK_Imm }, },
3905 { 644 /* fbg */, SP::BPFCC, Convert__Imm1_1__imm_95_6__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3906 { 644 /* fbg */, SP::BPFCCA, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3907 { 644 /* fbg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3908 { 644 /* fbg */, SP::BPFCC, Convert__Imm1_2__imm_95_6__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3909 { 644 /* fbg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_6__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3910 { 644 /* fbg */, SP::BPFCCA, Convert__Imm1_3__imm_95_6__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3911 { 648 /* fbge */, SP::FBCOND, Convert__Imm1_0__imm_95_11, AMFBS_None, { MCK_Imm }, },
3912 { 648 /* fbge */, SP::FBCONDA, Convert__Imm1_1__imm_95_11, AMFBS_None, { MCK_a, MCK_Imm }, },
3913 { 648 /* fbge */, SP::BPFCC, Convert__Imm1_1__imm_95_11__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3914 { 648 /* fbge */, SP::BPFCCA, Convert__Imm1_2__imm_95_11__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3915 { 648 /* fbge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_11__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3916 { 648 /* fbge */, SP::BPFCC, Convert__Imm1_2__imm_95_11__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3917 { 648 /* fbge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_11__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3918 { 648 /* fbge */, SP::BPFCCA, Convert__Imm1_3__imm_95_11__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3919 { 653 /* fbl */, SP::FBCOND, Convert__Imm1_0__imm_95_4, AMFBS_None, { MCK_Imm }, },
3920 { 653 /* fbl */, SP::FBCONDA, Convert__Imm1_1__imm_95_4, AMFBS_None, { MCK_a, MCK_Imm }, },
3921 { 653 /* fbl */, SP::BPFCC, Convert__Imm1_1__imm_95_4__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3922 { 653 /* fbl */, SP::BPFCCA, Convert__Imm1_2__imm_95_4__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3923 { 653 /* fbl */, SP::BPFCCNT, Convert__Imm1_2__imm_95_4__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3924 { 653 /* fbl */, SP::BPFCC, Convert__Imm1_2__imm_95_4__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3925 { 653 /* fbl */, SP::BPFCCANT, Convert__Imm1_3__imm_95_4__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3926 { 653 /* fbl */, SP::BPFCCA, Convert__Imm1_3__imm_95_4__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3927 { 657 /* fble */, SP::FBCOND, Convert__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
3928 { 657 /* fble */, SP::FBCONDA, Convert__Imm1_1__imm_95_13, AMFBS_None, { MCK_a, MCK_Imm }, },
3929 { 657 /* fble */, SP::BPFCC, Convert__Imm1_1__imm_95_13__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3930 { 657 /* fble */, SP::BPFCCA, Convert__Imm1_2__imm_95_13__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3931 { 657 /* fble */, SP::BPFCCNT, Convert__Imm1_2__imm_95_13__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3932 { 657 /* fble */, SP::BPFCC, Convert__Imm1_2__imm_95_13__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3933 { 657 /* fble */, SP::BPFCCANT, Convert__Imm1_3__imm_95_13__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3934 { 657 /* fble */, SP::BPFCCA, Convert__Imm1_3__imm_95_13__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3935 { 662 /* fblg */, SP::FBCOND, Convert__Imm1_0__imm_95_2, AMFBS_None, { MCK_Imm }, },
3936 { 662 /* fblg */, SP::FBCONDA, Convert__Imm1_1__imm_95_2, AMFBS_None, { MCK_a, MCK_Imm }, },
3937 { 662 /* fblg */, SP::BPFCC, Convert__Imm1_1__imm_95_2__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3938 { 662 /* fblg */, SP::BPFCCA, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3939 { 662 /* fblg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3940 { 662 /* fblg */, SP::BPFCC, Convert__Imm1_2__imm_95_2__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3941 { 662 /* fblg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_2__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3942 { 662 /* fblg */, SP::BPFCCA, Convert__Imm1_3__imm_95_2__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3943 { 667 /* fbn */, SP::FBCOND, Convert__Imm1_0__imm_95_0, AMFBS_None, { MCK_Imm }, },
3944 { 667 /* fbn */, SP::FBCONDA, Convert__Imm1_1__imm_95_0, AMFBS_None, { MCK_a, MCK_Imm }, },
3945 { 667 /* fbn */, SP::BPFCC, Convert__Imm1_1__imm_95_0__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3946 { 667 /* fbn */, SP::BPFCCA, Convert__Imm1_2__imm_95_0__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3947 { 667 /* fbn */, SP::BPFCCNT, Convert__Imm1_2__imm_95_0__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3948 { 667 /* fbn */, SP::BPFCC, Convert__Imm1_2__imm_95_0__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3949 { 667 /* fbn */, SP::BPFCCANT, Convert__Imm1_3__imm_95_0__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3950 { 667 /* fbn */, SP::BPFCCA, Convert__Imm1_3__imm_95_0__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3951 { 671 /* fbne */, SP::FBCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3952 { 671 /* fbne */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3953 { 671 /* fbne */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3954 { 671 /* fbne */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3955 { 671 /* fbne */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3956 { 671 /* fbne */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3957 { 671 /* fbne */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3958 { 671 /* fbne */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3959 { 676 /* fbnz */, SP::FBCOND, Convert__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
3960 { 676 /* fbnz */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, AMFBS_None, { MCK_a, MCK_Imm }, },
3961 { 676 /* fbnz */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3962 { 676 /* fbnz */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3963 { 676 /* fbnz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3964 { 676 /* fbnz */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3965 { 676 /* fbnz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3966 { 676 /* fbnz */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3967 { 681 /* fbo */, SP::FBCOND, Convert__Imm1_0__imm_95_15, AMFBS_None, { MCK_Imm }, },
3968 { 681 /* fbo */, SP::FBCONDA, Convert__Imm1_1__imm_95_15, AMFBS_None, { MCK_a, MCK_Imm }, },
3969 { 681 /* fbo */, SP::BPFCC, Convert__Imm1_1__imm_95_15__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3970 { 681 /* fbo */, SP::BPFCCA, Convert__Imm1_2__imm_95_15__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3971 { 681 /* fbo */, SP::BPFCCNT, Convert__Imm1_2__imm_95_15__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3972 { 681 /* fbo */, SP::BPFCC, Convert__Imm1_2__imm_95_15__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3973 { 681 /* fbo */, SP::BPFCCANT, Convert__Imm1_3__imm_95_15__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3974 { 681 /* fbo */, SP::BPFCCA, Convert__Imm1_3__imm_95_15__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3975 { 685 /* fbu */, SP::FBCOND, Convert__Imm1_0__imm_95_7, AMFBS_None, { MCK_Imm }, },
3976 { 685 /* fbu */, SP::FBCONDA, Convert__Imm1_1__imm_95_7, AMFBS_None, { MCK_a, MCK_Imm }, },
3977 { 685 /* fbu */, SP::BPFCC, Convert__Imm1_1__imm_95_7__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3978 { 685 /* fbu */, SP::BPFCCA, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3979 { 685 /* fbu */, SP::BPFCCNT, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3980 { 685 /* fbu */, SP::BPFCC, Convert__Imm1_2__imm_95_7__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3981 { 685 /* fbu */, SP::BPFCCANT, Convert__Imm1_3__imm_95_7__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3982 { 685 /* fbu */, SP::BPFCCA, Convert__Imm1_3__imm_95_7__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3983 { 689 /* fbue */, SP::FBCOND, Convert__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
3984 { 689 /* fbue */, SP::FBCONDA, Convert__Imm1_1__imm_95_10, AMFBS_None, { MCK_a, MCK_Imm }, },
3985 { 689 /* fbue */, SP::BPFCC, Convert__Imm1_1__imm_95_10__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3986 { 689 /* fbue */, SP::BPFCCA, Convert__Imm1_2__imm_95_10__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3987 { 689 /* fbue */, SP::BPFCCNT, Convert__Imm1_2__imm_95_10__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3988 { 689 /* fbue */, SP::BPFCC, Convert__Imm1_2__imm_95_10__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3989 { 689 /* fbue */, SP::BPFCCANT, Convert__Imm1_3__imm_95_10__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3990 { 689 /* fbue */, SP::BPFCCA, Convert__Imm1_3__imm_95_10__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3991 { 694 /* fbug */, SP::FBCOND, Convert__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
3992 { 694 /* fbug */, SP::FBCONDA, Convert__Imm1_1__imm_95_5, AMFBS_None, { MCK_a, MCK_Imm }, },
3993 { 694 /* fbug */, SP::BPFCC, Convert__Imm1_1__imm_95_5__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3994 { 694 /* fbug */, SP::BPFCCA, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3995 { 694 /* fbug */, SP::BPFCCNT, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3996 { 694 /* fbug */, SP::BPFCC, Convert__Imm1_2__imm_95_5__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3997 { 694 /* fbug */, SP::BPFCCANT, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3998 { 694 /* fbug */, SP::BPFCCA, Convert__Imm1_3__imm_95_5__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3999 { 699 /* fbuge */, SP::FBCOND, Convert__Imm1_0__imm_95_12, AMFBS_None, { MCK_Imm }, },
4000 { 699 /* fbuge */, SP::FBCONDA, Convert__Imm1_1__imm_95_12, AMFBS_None, { MCK_a, MCK_Imm }, },
4001 { 699 /* fbuge */, SP::BPFCC, Convert__Imm1_1__imm_95_12__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
4002 { 699 /* fbuge */, SP::BPFCCA, Convert__Imm1_2__imm_95_12__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
4003 { 699 /* fbuge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_12__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4004 { 699 /* fbuge */, SP::BPFCC, Convert__Imm1_2__imm_95_12__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4005 { 699 /* fbuge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_12__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4006 { 699 /* fbuge */, SP::BPFCCA, Convert__Imm1_3__imm_95_12__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4007 { 705 /* fbul */, SP::FBCOND, Convert__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
4008 { 705 /* fbul */, SP::FBCONDA, Convert__Imm1_1__imm_95_3, AMFBS_None, { MCK_a, MCK_Imm }, },
4009 { 705 /* fbul */, SP::BPFCC, Convert__Imm1_1__imm_95_3__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
4010 { 705 /* fbul */, SP::BPFCCA, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
4011 { 705 /* fbul */, SP::BPFCCNT, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4012 { 705 /* fbul */, SP::BPFCC, Convert__Imm1_2__imm_95_3__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4013 { 705 /* fbul */, SP::BPFCCANT, Convert__Imm1_3__imm_95_3__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4014 { 705 /* fbul */, SP::BPFCCA, Convert__Imm1_3__imm_95_3__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4015 { 710 /* fbule */, SP::FBCOND, Convert__Imm1_0__imm_95_14, AMFBS_None, { MCK_Imm }, },
4016 { 710 /* fbule */, SP::FBCONDA, Convert__Imm1_1__imm_95_14, AMFBS_None, { MCK_a, MCK_Imm }, },
4017 { 710 /* fbule */, SP::BPFCC, Convert__Imm1_1__imm_95_14__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
4018 { 710 /* fbule */, SP::BPFCCA, Convert__Imm1_2__imm_95_14__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
4019 { 710 /* fbule */, SP::BPFCCNT, Convert__Imm1_2__imm_95_14__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4020 { 710 /* fbule */, SP::BPFCC, Convert__Imm1_2__imm_95_14__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4021 { 710 /* fbule */, SP::BPFCCANT, Convert__Imm1_3__imm_95_14__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4022 { 710 /* fbule */, SP::BPFCCA, Convert__Imm1_3__imm_95_14__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4023 { 716 /* fbz */, SP::FBCOND, Convert__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
4024 { 716 /* fbz */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, AMFBS_None, { MCK_a, MCK_Imm }, },
4025 { 716 /* fbz */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm }, },
4026 { 716 /* fbz */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
4027 { 716 /* fbz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4028 { 716 /* fbz */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, AMFBS_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4029 { 716 /* fbz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
4030 { 716 /* fbz */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, AMFBS_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
4031 { 720 /* fchksm16 */, SP::FCHKSM16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4032 { 729 /* fcmpd */, SP::V9FCMPD, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs }, },
4033 { 729 /* fcmpd */, SP::V9FCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4034 { 735 /* fcmped */, SP::V9FCMPED, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs }, },
4035 { 735 /* fcmped */, SP::V9FCMPED, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4036 { 742 /* fcmpeq */, SP::V9FCMPEQ, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs }, },
4037 { 742 /* fcmpeq */, SP::V9FCMPEQ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4038 { 749 /* fcmpeq16 */, SP::FCMPEQ16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4039 { 758 /* fcmpeq32 */, SP::FCMPEQ32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4040 { 767 /* fcmpes */, SP::V9FCMPES, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4041 { 767 /* fcmpes */, SP::V9FCMPES, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4042 { 774 /* fcmpgt16 */, SP::FCMPGT16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4043 { 783 /* fcmpgt32 */, SP::FCMPGT32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4044 { 792 /* fcmple16 */, SP::FCMPLE16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4045 { 801 /* fcmple32 */, SP::FCMPLE32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4046 { 810 /* fcmpne16 */, SP::FCMPNE16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4047 { 819 /* fcmpne32 */, SP::FCMPNE32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
4048 { 828 /* fcmpq */, SP::V9FCMPQ, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs }, },
4049 { 828 /* fcmpq */, SP::V9FCMPQ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4050 { 834 /* fcmps */, SP::V9FCMPS, Convert__regFCC0__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4051 { 834 /* fcmps */, SP::V9FCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4052 { 840 /* fdivd */, SP::FDIVD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4053 { 846 /* fdivq */, SP::FDIVQ, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4054 { 852 /* fdivs */, SP::FDIVS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4055 { 858 /* fdmulq */, SP::FDMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs, MCK_QFPRegs }, },
4056 { 865 /* fdtoi */, SP::FDTOI, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_FPRegs }, },
4057 { 871 /* fdtoq */, SP::FDTOQ, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_QFPRegs }, },
4058 { 877 /* fdtos */, SP::FDTOS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_FPRegs }, },
4059 { 883 /* fdtox */, SP::FDTOX, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs }, },
4060 { 889 /* fexpand */, SP::FEXPAND, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4061 { 897 /* fhaddd */, SP::FHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4062 { 904 /* fhadds */, SP::FHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4063 { 911 /* fhsubd */, SP::FHSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4064 { 918 /* fhsubs */, SP::FHSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4065 { 925 /* fitod */, SP::FITOD, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_DFPRegs }, },
4066 { 931 /* fitoq */, SP::FITOQ, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_QFPRegs }, },
4067 { 937 /* fitos */, SP::FITOS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4068 { 943 /* flcmpd */, SP::FLCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4069 { 950 /* flcmps */, SP::FLCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4070 { 957 /* flush */, SP::FLUSH, Convert_NoOperands, AMFBS_None, { }, },
4071 { 957 /* flush */, SP::FLUSH, Convert_NoOperands, AMFBS_None, { MCK_G0 }, },
4072 { 957 /* flush */, SP::FLUSHri, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4073 { 957 /* flush */, SP::FLUSHrr, Convert__MEMrr2_0, AMFBS_None, { MCK_MEMrr }, },
4074 { 963 /* flushw */, SP::FLUSHW, Convert_NoOperands, AMFBS_HasV9, { }, },
4075 { 970 /* fmean16 */, SP::FMEAN16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4076 { 978 /* fmovd */, SP::FMOVD, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
4077 { 978 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4078 { 978 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4079 { 978 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4080 { 978 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4081 { 978 /* fmovd */, SP::FMOVD_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_DFPRegs, MCK_DFPRegs }, },
4082 { 978 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4083 { 978 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4084 { 984 /* fmovda */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4085 { 984 /* fmovda */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4086 { 984 /* fmovda */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4087 { 991 /* fmovdcc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4088 { 991 /* fmovdcc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4089 { 999 /* fmovdcs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4090 { 999 /* fmovdcs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4091 { 1007 /* fmovde */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4092 { 1007 /* fmovde */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4093 { 1007 /* fmovde */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4094 { 1014 /* fmovdeq */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4095 { 1014 /* fmovdeq */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4096 { 1022 /* fmovdg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4097 { 1022 /* fmovdg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4098 { 1022 /* fmovdg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4099 { 1029 /* fmovdge */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4100 { 1029 /* fmovdge */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4101 { 1029 /* fmovdge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4102 { 1037 /* fmovdgeu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4103 { 1037 /* fmovdgeu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4104 { 1046 /* fmovdgt */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4105 { 1046 /* fmovdgt */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4106 { 1054 /* fmovdgu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4107 { 1054 /* fmovdgu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4108 { 1062 /* fmovdl */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4109 { 1062 /* fmovdl */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4110 { 1062 /* fmovdl */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4111 { 1069 /* fmovdle */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4112 { 1069 /* fmovdle */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4113 { 1069 /* fmovdle */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4114 { 1077 /* fmovdleu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4115 { 1077 /* fmovdleu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4116 { 1086 /* fmovdlg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4117 { 1094 /* fmovdlt */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4118 { 1094 /* fmovdlt */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4119 { 1102 /* fmovdlu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4120 { 1102 /* fmovdlu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4121 { 1110 /* fmovdn */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4122 { 1110 /* fmovdn */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4123 { 1110 /* fmovdn */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4124 { 1117 /* fmovdne */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4125 { 1117 /* fmovdne */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4126 { 1117 /* fmovdne */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4127 { 1125 /* fmovdneg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4128 { 1125 /* fmovdneg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4129 { 1134 /* fmovdnz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4130 { 1134 /* fmovdnz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4131 { 1134 /* fmovdnz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4132 { 1142 /* fmovdo */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4133 { 1149 /* fmovdpos */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4134 { 1149 /* fmovdpos */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4135 { 1158 /* fmovdu */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4136 { 1165 /* fmovdue */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4137 { 1173 /* fmovdug */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4138 { 1181 /* fmovduge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4139 { 1190 /* fmovdul */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4140 { 1198 /* fmovdule */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4141 { 1207 /* fmovdvc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4142 { 1207 /* fmovdvc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4143 { 1215 /* fmovdvs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4144 { 1215 /* fmovdvs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4145 { 1223 /* fmovdz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
4146 { 1223 /* fmovdz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_DFPRegs, MCK_DFPRegs }, },
4147 { 1223 /* fmovdz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4148 { 1230 /* fmovq */, SP::FMOVQ, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
4149 { 1230 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4150 { 1230 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4151 { 1230 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4152 { 1230 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4153 { 1230 /* fmovq */, SP::FMOVQ_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_QFPRegs, MCK_QFPRegs }, },
4154 { 1230 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4155 { 1230 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4156 { 1236 /* fmovqa */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4157 { 1236 /* fmovqa */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4158 { 1236 /* fmovqa */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4159 { 1243 /* fmovqcc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4160 { 1243 /* fmovqcc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4161 { 1251 /* fmovqcs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4162 { 1251 /* fmovqcs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4163 { 1259 /* fmovqe */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4164 { 1259 /* fmovqe */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4165 { 1259 /* fmovqe */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4166 { 1266 /* fmovqeq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4167 { 1266 /* fmovqeq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4168 { 1274 /* fmovqg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4169 { 1274 /* fmovqg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4170 { 1274 /* fmovqg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4171 { 1281 /* fmovqge */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4172 { 1281 /* fmovqge */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4173 { 1281 /* fmovqge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4174 { 1289 /* fmovqgeu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4175 { 1289 /* fmovqgeu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4176 { 1298 /* fmovqgt */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4177 { 1298 /* fmovqgt */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4178 { 1306 /* fmovqgu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4179 { 1306 /* fmovqgu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4180 { 1314 /* fmovql */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4181 { 1314 /* fmovql */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4182 { 1314 /* fmovql */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4183 { 1321 /* fmovqle */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4184 { 1321 /* fmovqle */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4185 { 1321 /* fmovqle */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4186 { 1329 /* fmovqleu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4187 { 1329 /* fmovqleu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4188 { 1338 /* fmovqlg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4189 { 1346 /* fmovqlt */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4190 { 1346 /* fmovqlt */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4191 { 1354 /* fmovqlu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4192 { 1354 /* fmovqlu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4193 { 1362 /* fmovqn */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4194 { 1362 /* fmovqn */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4195 { 1362 /* fmovqn */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4196 { 1369 /* fmovqne */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4197 { 1369 /* fmovqne */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4198 { 1369 /* fmovqne */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4199 { 1377 /* fmovqneg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4200 { 1377 /* fmovqneg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4201 { 1386 /* fmovqnz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4202 { 1386 /* fmovqnz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4203 { 1386 /* fmovqnz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4204 { 1394 /* fmovqo */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4205 { 1401 /* fmovqpos */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4206 { 1401 /* fmovqpos */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4207 { 1410 /* fmovqu */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4208 { 1417 /* fmovque */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4209 { 1425 /* fmovqug */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4210 { 1433 /* fmovquge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4211 { 1442 /* fmovqul */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4212 { 1450 /* fmovqule */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4213 { 1459 /* fmovqvc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4214 { 1459 /* fmovqvc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4215 { 1467 /* fmovqvs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4216 { 1467 /* fmovqvs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4217 { 1475 /* fmovqz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
4218 { 1475 /* fmovqz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_QFPRegs, MCK_QFPRegs }, },
4219 { 1475 /* fmovqz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4220 { 1482 /* fmovrd */, SP::FMOVRD, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4221 { 1489 /* fmovrde */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4222 { 1497 /* fmovrdgez */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4223 { 1507 /* fmovrdgz */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4224 { 1516 /* fmovrdlez */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4225 { 1526 /* fmovrdlz */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4226 { 1535 /* fmovrdne */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4227 { 1544 /* fmovrdnz */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4228 { 1553 /* fmovrdz */, SP::FMOVRD, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4229 { 1561 /* fmovrq */, SP::FMOVRQ, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4230 { 1568 /* fmovrqe */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4231 { 1576 /* fmovrqgez */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4232 { 1586 /* fmovrqgz */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4233 { 1595 /* fmovrqlez */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4234 { 1605 /* fmovrqlz */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4235 { 1614 /* fmovrqne */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4236 { 1623 /* fmovrqnz */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4237 { 1632 /* fmovrqz */, SP::FMOVRQ, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4238 { 1640 /* fmovrs */, SP::FMOVRS, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4239 { 1647 /* fmovrse */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4240 { 1655 /* fmovrsgez */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4241 { 1665 /* fmovrsgz */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4242 { 1674 /* fmovrslez */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4243 { 1684 /* fmovrslz */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4244 { 1693 /* fmovrsne */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4245 { 1702 /* fmovrsnz */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4246 { 1711 /* fmovrsz */, SP::FMOVRS, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
4247 { 1719 /* fmovs */, SP::FMOVS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4248 { 1719 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4249 { 1719 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4250 { 1719 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4251 { 1719 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4252 { 1719 /* fmovs */, SP::FMOVS_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_FPRegs, MCK_FPRegs }, },
4253 { 1719 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4254 { 1719 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4255 { 1725 /* fmovsa */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4256 { 1725 /* fmovsa */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4257 { 1725 /* fmovsa */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4258 { 1732 /* fmovscc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4259 { 1732 /* fmovscc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4260 { 1740 /* fmovscs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4261 { 1740 /* fmovscs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4262 { 1748 /* fmovse */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4263 { 1748 /* fmovse */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4264 { 1748 /* fmovse */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4265 { 1755 /* fmovseq */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4266 { 1755 /* fmovseq */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4267 { 1763 /* fmovsg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4268 { 1763 /* fmovsg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4269 { 1763 /* fmovsg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4270 { 1770 /* fmovsge */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4271 { 1770 /* fmovsge */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4272 { 1770 /* fmovsge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4273 { 1778 /* fmovsgeu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4274 { 1778 /* fmovsgeu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4275 { 1787 /* fmovsgt */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4276 { 1787 /* fmovsgt */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4277 { 1795 /* fmovsgu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4278 { 1795 /* fmovsgu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4279 { 1803 /* fmovsl */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4280 { 1803 /* fmovsl */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4281 { 1803 /* fmovsl */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4282 { 1810 /* fmovsle */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4283 { 1810 /* fmovsle */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4284 { 1810 /* fmovsle */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4285 { 1818 /* fmovsleu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4286 { 1818 /* fmovsleu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4287 { 1827 /* fmovslg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4288 { 1835 /* fmovslt */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4289 { 1835 /* fmovslt */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4290 { 1843 /* fmovslu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4291 { 1843 /* fmovslu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4292 { 1851 /* fmovsn */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4293 { 1851 /* fmovsn */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4294 { 1851 /* fmovsn */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4295 { 1858 /* fmovsne */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4296 { 1858 /* fmovsne */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4297 { 1858 /* fmovsne */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4298 { 1866 /* fmovsneg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4299 { 1866 /* fmovsneg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4300 { 1875 /* fmovsnz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4301 { 1875 /* fmovsnz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4302 { 1875 /* fmovsnz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4303 { 1883 /* fmovso */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4304 { 1890 /* fmovspos */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4305 { 1890 /* fmovspos */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4306 { 1899 /* fmovsu */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4307 { 1906 /* fmovsue */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4308 { 1914 /* fmovsug */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4309 { 1922 /* fmovsuge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4310 { 1931 /* fmovsul */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4311 { 1939 /* fmovsule */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4312 { 1948 /* fmovsvc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4313 { 1948 /* fmovsvc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4314 { 1956 /* fmovsvs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4315 { 1956 /* fmovsvs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4316 { 1964 /* fmovsz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
4317 { 1964 /* fmovsz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_FPRegs, MCK_FPRegs }, },
4318 { 1964 /* fmovsz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
4319 { 1971 /* fmul8sux16 */, SP::FMUL8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4320 { 1982 /* fmul8ulx16 */, SP::FMUL8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4321 { 1993 /* fmul8x16 */, SP::FMUL8X16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4322 { 2002 /* fmul8x16al */, SP::FMUL8X16AL, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4323 { 2013 /* fmul8x16au */, SP::FMUL8X16AU, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4324 { 2024 /* fmuld */, SP::FMULD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4325 { 2030 /* fmuld8sux16 */, SP::FMULD8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4326 { 2042 /* fmuld8ulx16 */, SP::FMULD8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4327 { 2054 /* fmulq */, SP::FMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4328 { 2060 /* fmuls */, SP::FMULS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4329 { 2066 /* fnaddd */, SP::FNADDD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4330 { 2073 /* fnadds */, SP::FNADDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4331 { 2080 /* fnand */, SP::FNAND, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4332 { 2086 /* fnands */, SP::FNANDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4333 { 2093 /* fnegd */, SP::FNEGD, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
4334 { 2099 /* fnegq */, SP::FNEGQ, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
4335 { 2105 /* fnegs */, SP::FNEGS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4336 { 2111 /* fnhaddd */, SP::FNHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4337 { 2111 /* fnhaddd */, SP::FNMULD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4338 { 2119 /* fnhadds */, SP::FNHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4339 { 2119 /* fnhadds */, SP::FNMULS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4340 { 2119 /* fnhadds */, SP::FNSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4341 { 2127 /* fnor */, SP::FNOR, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4342 { 2132 /* fnors */, SP::FNORS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4343 { 2138 /* fnot1 */, SP::FNOT1, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4344 { 2144 /* fnot1s */, SP::FNOT1S, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
4345 { 2151 /* fnot2 */, SP::FNOT2, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4346 { 2157 /* fnot2s */, SP::FNOT2S, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
4347 { 2164 /* fone */, SP::FONE, Convert__Reg1_0__Tie0_1_1, AMFBS_HasVIS, { MCK_DFPRegs }, },
4348 { 2169 /* fones */, SP::FONES, Convert__Reg1_0__Tie0_1_1, AMFBS_HasVIS, { MCK_FPRegs }, },
4349 { 2175 /* for */, SP::FOR, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4350 { 2179 /* fornot1 */, SP::FORNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4351 { 2187 /* fornot1s */, SP::FORNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4352 { 2196 /* fornot2 */, SP::FORNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4353 { 2204 /* fornot2s */, SP::FORNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4354 { 2213 /* fors */, SP::FORS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4355 { 2218 /* fpack16 */, SP::FPACK16, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4356 { 2226 /* fpack32 */, SP::FPACK32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4357 { 2234 /* fpackfix */, SP::FPACKFIX, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4358 { 2243 /* fpadd16 */, SP::FPADD16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4359 { 2251 /* fpadd16s */, SP::FPADD16S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4360 { 2260 /* fpadd32 */, SP::FPADD32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4361 { 2268 /* fpadd32s */, SP::FPADD32S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4362 { 2277 /* fpadd64 */, SP::FPADD64, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4363 { 2285 /* fpmerge */, SP::FPMERGE, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4364 { 2293 /* fpsub16 */, SP::FPSUB16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4365 { 2301 /* fpsub16S */, SP::FPSUB16S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4366 { 2310 /* fpsub32 */, SP::FPSUB32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4367 { 2318 /* fpsub32S */, SP::FPSUB32S, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4368 { 2327 /* fqtod */, SP::FQTOD, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_QFPRegs, MCK_DFPRegs }, },
4369 { 2333 /* fqtoi */, SP::FQTOI, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_QFPRegs, MCK_FPRegs }, },
4370 { 2339 /* fqtos */, SP::FQTOS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_QFPRegs, MCK_FPRegs }, },
4371 { 2345 /* fqtox */, SP::FQTOX, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_QFPRegs, MCK_DFPRegs }, },
4372 { 2351 /* fslas16 */, SP::FSLAS16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4373 { 2359 /* fslas32 */, SP::FSLAS32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4374 { 2367 /* fsll16 */, SP::FSLL16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4375 { 2374 /* fsll32 */, SP::FSLL32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4376 { 2381 /* fsmuld */, SP::FSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs, MCK_DFPRegs }, },
4377 { 2388 /* fsqrtd */, SP::FSQRTD, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs }, },
4378 { 2395 /* fsqrtq */, SP::FSQRTQ, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs }, },
4379 { 2402 /* fsqrts */, SP::FSQRTS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4380 { 2409 /* fsra16 */, SP::FSRA16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4381 { 2416 /* fsra32 */, SP::FSRA32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4382 { 2423 /* fsrc1 */, SP::FSRC1, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4383 { 2429 /* fsrc1s */, SP::FSRC1S, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
4384 { 2436 /* fsrc2 */, SP::FSRC2, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
4385 { 2442 /* fsrc2s */, SP::FSRC2S, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
4386 { 2449 /* fsrl16 */, SP::FSRL16, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4387 { 2456 /* fsrl32 */, SP::FSRL32, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4388 { 2463 /* fstod */, SP::FSTOD, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_DFPRegs }, },
4389 { 2469 /* fstoi */, SP::FSTOI, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_FPRegs }, },
4390 { 2475 /* fstoq */, SP::FSTOQ, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_QFPRegs }, },
4391 { 2481 /* fstox */, SP::FSTOX, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK_DFPRegs }, },
4392 { 2487 /* fsubd */, SP::FSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4393 { 2493 /* fsubq */, SP::FSUBQ, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
4394 { 2499 /* fsubs */, SP::FSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4395 { 2505 /* fxnor */, SP::FXNOR, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4396 { 2511 /* fxnors */, SP::FXNORS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4397 { 2518 /* fxor */, SP::FXOR, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4398 { 2523 /* fxors */, SP::FXORS, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
4399 { 2529 /* fxtod */, SP::FXTOD, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_DFPRegs }, },
4400 { 2535 /* fxtoq */, SP::FXTOQ, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_QFPRegs }, },
4401 { 2541 /* fxtos */, SP::FXTOS, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK_FPRegs }, },
4402 { 2547 /* fzero */, SP::FZERO, Convert__Reg1_0__Tie0_1_1, AMFBS_HasVIS, { MCK_DFPRegs }, },
4403 { 2553 /* fzeros */, SP::FZEROS, Convert__Reg1_0__Tie0_1_1, AMFBS_HasVIS, { MCK_FPRegs }, },
4404 { 2560 /* inc */, SP::ADDri, Convert__Reg1_0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
4405 { 2560 /* inc */, SP::ADDri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
4406 { 2564 /* inccc */, SP::ADDCCri, Convert__Reg1_0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
4407 { 2564 /* inccc */, SP::ADDCCri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
4408 { 2570 /* jmp */, SP::JMPLri, Convert__regG0__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4409 { 2570 /* jmp */, SP::JMPLrr, Convert__regG0__MEMrr2_0, AMFBS_None, { MCK_MEMrr }, },
4410 { 2574 /* jmpl */, SP::JMPLri, Convert__Reg1_1__MEMri2_0, AMFBS_None, { MCK_MEMri, MCK_IntRegs }, },
4411 { 2574 /* jmpl */, SP::JMPLrr, Convert__Reg1_1__MEMrr2_0, AMFBS_None, { MCK_MEMrr, MCK_IntRegs }, },
4412 { 2579 /* ld */, SP::LDCSRri, Convert__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CPSR }, },
4413 { 2579 /* ld */, SP::LDFSRri, Convert__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FSR }, },
4414 { 2579 /* ld */, SP::LDCri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocRegs }, },
4415 { 2579 /* ld */, SP::LDFri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FPRegs }, },
4416 { 2579 /* ld */, SP::LDri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4417 { 2579 /* ld */, SP::LDCSRrr, Convert__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CPSR }, },
4418 { 2579 /* ld */, SP::LDFSRrr, Convert__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FSR }, },
4419 { 2579 /* ld */, SP::LDCrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocRegs }, },
4420 { 2579 /* ld */, SP::LDFrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FPRegs }, },
4421 { 2579 /* ld */, SP::LDrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4422 { 2579 /* ld */, SP::GDOP_LDrr, Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_GOT1_4, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_TailRelocSymLoad_GOT }, },
4423 { 2579 /* ld */, SP::TLS_LDrr, Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_TLS1_4, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_TailRelocSymLoad_TLS }, },
4424 { 2582 /* lda */, SP::LDFAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_FPRegs }, },
4425 { 2582 /* lda */, SP::LDAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4426 { 2582 /* lda */, SP::LDFArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_FPRegs }, },
4427 { 2582 /* lda */, SP::LDArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4428 { 2586 /* ldd */, SP::LDDCri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocPair }, },
4429 { 2586 /* ldd */, SP::LDDri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntPair }, },
4430 { 2586 /* ldd */, SP::LDDFri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_DFPRegs }, },
4431 { 2586 /* ldd */, SP::LDDCrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocPair }, },
4432 { 2586 /* ldd */, SP::LDDrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntPair }, },
4433 { 2586 /* ldd */, SP::LDDFrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_DFPRegs }, },
4434 { 2590 /* ldda */, SP::LDDAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntPair }, },
4435 { 2590 /* ldda */, SP::LDDFAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_DFPRegs }, },
4436 { 2590 /* ldda */, SP::LDDArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntPair }, },
4437 { 2590 /* ldda */, SP::LDDFArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_DFPRegs }, },
4438 { 2595 /* ldq */, SP::LDQFri, Convert__Reg1_3__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_QFPRegs }, },
4439 { 2595 /* ldq */, SP::LDQFrr, Convert__Reg1_3__MEMrr2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_QFPRegs }, },
4440 { 2599 /* ldqa */, SP::LDQFAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_QFPRegs }, },
4441 { 2599 /* ldqa */, SP::LDQFArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_QFPRegs }, },
4442 { 2604 /* ldsb */, SP::LDSBri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4443 { 2604 /* ldsb */, SP::LDSBrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4444 { 2609 /* ldsba */, SP::LDSBAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4445 { 2609 /* ldsba */, SP::LDSBArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4446 { 2615 /* ldsh */, SP::LDSHri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4447 { 2615 /* ldsh */, SP::LDSHrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4448 { 2620 /* ldsha */, SP::LDSHAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4449 { 2620 /* ldsha */, SP::LDSHArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4450 { 2626 /* ldstub */, SP::LDSTUBri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4451 { 2626 /* ldstub */, SP::LDSTUBrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4452 { 2633 /* ldstuba */, SP::LDSTUBAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4453 { 2633 /* ldstuba */, SP::LDSTUBArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4454 { 2641 /* ldsw */, SP::LDSWri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4455 { 2641 /* ldsw */, SP::LDSWrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4456 { 2646 /* ldswa */, SP::LDSWAri, Convert__Reg1_4__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4457 { 2646 /* ldswa */, SP::LDSWArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4458 { 2652 /* ldub */, SP::LDUBri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4459 { 2652 /* ldub */, SP::LDUBrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4460 { 2657 /* lduba */, SP::LDUBAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4461 { 2657 /* lduba */, SP::LDUBArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4462 { 2663 /* lduh */, SP::LDUHri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4463 { 2663 /* lduh */, SP::LDUHrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4464 { 2668 /* lduha */, SP::LDUHAri, Convert__Reg1_4__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4465 { 2668 /* lduha */, SP::LDUHArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4466 { 2674 /* ldx */, SP::LDXFSRri, Convert__MEMri2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FSR }, },
4467 { 2674 /* ldx */, SP::LDXri, Convert__Reg1_3__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4468 { 2674 /* ldx */, SP::LDXFSRrr, Convert__MEMrr2_1, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FSR }, },
4469 { 2674 /* ldx */, SP::LDXrr, Convert__Reg1_3__MEMrr2_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4470 { 2674 /* ldx */, SP::GDOP_LDXrr, Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_GOT1_4, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_TailRelocSymLoad_GOT }, },
4471 { 2674 /* ldx */, SP::TLS_LDXrr, Convert__Reg1_3__MEMrr2_1__TailRelocSymLoad_TLS1_4, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_TailRelocSymLoad_TLS }, },
4472 { 2678 /* ldxa */, SP::LDXAri, Convert__Reg1_4__MEMri2_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4473 { 2678 /* ldxa */, SP::LDXArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4474 { 2683 /* lzcnt */, SP::LZCNT, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs }, },
4475 { 2689 /* membar */, SP::MEMBARi, Convert__MembarTag1_0, AMFBS_HasV9, { MCK_MembarTag }, },
4476 { 2696 /* mov */, SP::RDPSR, Convert__Reg1_1, AMFBS_None, { MCK_PSR, MCK_IntRegs }, },
4477 { 2696 /* mov */, SP::RDTBR, Convert__Reg1_1, AMFBS_None, { MCK_TBR, MCK_IntRegs }, },
4478 { 2696 /* mov */, SP::RDWIM, Convert__Reg1_1, AMFBS_None, { MCK_WIM, MCK_IntRegs }, },
4479 { 2696 /* mov */, SP::WRPSRrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_PSR }, },
4480 { 2696 /* mov */, SP::WRTBRrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_TBR }, },
4481 { 2696 /* mov */, SP::WRWIMrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_WIM }, },
4482 { 2696 /* mov */, SP::ORrr, Convert__Reg1_1__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
4483 { 2696 /* mov */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_ASRRegs }, },
4484 { 2696 /* mov */, SP::RDASR, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_ASRRegs, MCK_IntRegs }, },
4485 { 2696 /* mov */, SP::WRPSRri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_PSR }, },
4486 { 2696 /* mov */, SP::WRTBRri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_TBR }, },
4487 { 2696 /* mov */, SP::WRWIMri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_WIM }, },
4488 { 2696 /* mov */, SP::ORri, Convert__Reg1_1__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
4489 { 2696 /* mov */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_ASRRegs }, },
4490 { 2696 /* mov */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4491 { 2696 /* mov */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4492 { 2696 /* mov */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4493 { 2696 /* mov */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4494 { 2696 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4495 { 2696 /* mov */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4496 { 2696 /* mov */, SP::MOVXCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4497 { 2696 /* mov */, SP::MOVXCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4498 { 2696 /* mov */, SP::MOVFCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_IntRegs, MCK_IntRegs }, },
4499 { 2696 /* mov */, SP::MOVFCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCC0, MCK_Imm, MCK_IntRegs }, },
4500 { 2696 /* mov */, SP::MOVICCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4501 { 2696 /* mov */, SP::MOVICCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4502 { 2696 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4503 { 2696 /* mov */, SP::V9MOVFCCri, Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4504 { 2700 /* mova */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4505 { 2700 /* mova */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4506 { 2700 /* mova */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4507 { 2700 /* mova */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4508 { 2700 /* mova */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4509 { 2700 /* mova */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4510 { 2705 /* movcc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4511 { 2705 /* movcc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4512 { 2705 /* movcc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4513 { 2705 /* movcc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4514 { 2711 /* movcs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4515 { 2711 /* movcs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4516 { 2711 /* movcs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4517 { 2711 /* movcs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4518 { 2717 /* movdtox */, SP::MOVDTOX, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
4519 { 2717 /* movdtox */, SP::MOVWTOS, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
4520 { 2717 /* movdtox */, SP::MOVXTOD, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
4521 { 2725 /* move */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4522 { 2725 /* move */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4523 { 2725 /* move */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4524 { 2725 /* move */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4525 { 2725 /* move */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4526 { 2725 /* move */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4527 { 2730 /* moveq */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4528 { 2730 /* moveq */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4529 { 2730 /* moveq */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4530 { 2730 /* moveq */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4531 { 2736 /* movg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4532 { 2736 /* movg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4533 { 2736 /* movg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4534 { 2736 /* movg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4535 { 2736 /* movg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4536 { 2736 /* movg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4537 { 2741 /* movge */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4538 { 2741 /* movge */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4539 { 2741 /* movge */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4540 { 2741 /* movge */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4541 { 2741 /* movge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4542 { 2741 /* movge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4543 { 2747 /* movgeu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4544 { 2747 /* movgeu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4545 { 2747 /* movgeu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4546 { 2747 /* movgeu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4547 { 2754 /* movgt */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4548 { 2754 /* movgt */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4549 { 2754 /* movgt */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4550 { 2754 /* movgt */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4551 { 2760 /* movgu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4552 { 2760 /* movgu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4553 { 2760 /* movgu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4554 { 2760 /* movgu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4555 { 2766 /* movl */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4556 { 2766 /* movl */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4557 { 2766 /* movl */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4558 { 2766 /* movl */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4559 { 2766 /* movl */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4560 { 2766 /* movl */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4561 { 2771 /* movle */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4562 { 2771 /* movle */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4563 { 2771 /* movle */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4564 { 2771 /* movle */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4565 { 2771 /* movle */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4566 { 2771 /* movle */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4567 { 2777 /* movleu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4568 { 2777 /* movleu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4569 { 2777 /* movleu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4570 { 2777 /* movleu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4571 { 2784 /* movlg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4572 { 2784 /* movlg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4573 { 2790 /* movlt */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4574 { 2790 /* movlt */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4575 { 2790 /* movlt */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4576 { 2790 /* movlt */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4577 { 2796 /* movlu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4578 { 2796 /* movlu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4579 { 2796 /* movlu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4580 { 2796 /* movlu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4581 { 2802 /* movn */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4582 { 2802 /* movn */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4583 { 2802 /* movn */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4584 { 2802 /* movn */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4585 { 2802 /* movn */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4586 { 2802 /* movn */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4587 { 2807 /* movne */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4588 { 2807 /* movne */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4589 { 2807 /* movne */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4590 { 2807 /* movne */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4591 { 2807 /* movne */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4592 { 2807 /* movne */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4593 { 2813 /* movneg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4594 { 2813 /* movneg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4595 { 2813 /* movneg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4596 { 2813 /* movneg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4597 { 2820 /* movnz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4598 { 2820 /* movnz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4599 { 2820 /* movnz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4600 { 2820 /* movnz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4601 { 2820 /* movnz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4602 { 2820 /* movnz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4603 { 2826 /* movo */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4604 { 2826 /* movo */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4605 { 2831 /* movpos */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4606 { 2831 /* movpos */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4607 { 2831 /* movpos */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4608 { 2831 /* movpos */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4609 { 2838 /* movr */, SP::MOVRrr, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4610 { 2838 /* movr */, SP::MOVRri, Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4611 { 2843 /* movre */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4612 { 2843 /* movre */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4613 { 2849 /* movrgez */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4614 { 2849 /* movrgez */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4615 { 2857 /* movrgz */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4616 { 2857 /* movrgz */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4617 { 2864 /* movrlez */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4618 { 2864 /* movrlez */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4619 { 2872 /* movrlz */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4620 { 2872 /* movrlz */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4621 { 2879 /* movrne */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4622 { 2879 /* movrne */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4623 { 2886 /* movrnz */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4624 { 2886 /* movrnz */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4625 { 2893 /* movrz */, SP::MOVRrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4626 { 2893 /* movrz */, SP::MOVRri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4627 { 2899 /* movstosw */, SP::MOVSTOSW, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
4628 { 2908 /* movstouw */, SP::MOVSTOUW, Convert__Reg1_1__Reg1_0, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
4629 { 2917 /* movu */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4630 { 2917 /* movu */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4631 { 2922 /* movue */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4632 { 2922 /* movue */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4633 { 2928 /* movug */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4634 { 2928 /* movug */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4635 { 2934 /* movuge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4636 { 2934 /* movuge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4637 { 2941 /* movul */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4638 { 2941 /* movul */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4639 { 2947 /* movule */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4640 { 2947 /* movule */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4641 { 2954 /* movvc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4642 { 2954 /* movvc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4643 { 2954 /* movvc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4644 { 2954 /* movvc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4645 { 2960 /* movvs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4646 { 2960 /* movvs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4647 { 2960 /* movvs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4648 { 2960 /* movvs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4649 { 2966 /* movz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
4650 { 2966 /* movz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_None, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
4651 { 2966 /* movz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK_IntRegs }, },
4652 { 2966 /* movz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm, MCK_IntRegs }, },
4653 { 2966 /* movz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
4654 { 2966 /* movz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, AMFBS_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
4655 { 2971 /* mulscc */, SP::MULSCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4656 { 2971 /* mulscc */, SP::MULSCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4657 { 2978 /* mulx */, SP::MULXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4658 { 2978 /* mulx */, SP::MULXri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4659 { 2983 /* neg */, SP::SUBrr, Convert__Reg1_0__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs }, },
4660 { 2983 /* neg */, SP::SUBrr, Convert__Reg1_1__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
4661 { 2987 /* nop */, SP::NOP, Convert_NoOperands, AMFBS_None, { }, },
4662 { 2991 /* not */, SP::XNORrr, Convert__Reg1_0__Reg1_0__regG0, AMFBS_None, { MCK_IntRegs }, },
4663 { 2991 /* not */, SP::XNORrr, Convert__Reg1_1__Reg1_0__regG0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs }, },
4664 { 2995 /* or */, SP::ORrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4665 { 2995 /* or */, SP::ORri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4666 { 2995 /* or */, SP::ORri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
4667 { 2998 /* orcc */, SP::ORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4668 { 2998 /* orcc */, SP::ORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4669 { 3003 /* orn */, SP::ORNrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4670 { 3003 /* orn */, SP::ORNri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4671 { 3007 /* orncc */, SP::ORNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4672 { 3007 /* orncc */, SP::ORNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4673 { 3013 /* pdist */, SP::PDIST, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4674 { 3019 /* pdistn */, SP::PDISTN, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
4675 { 3026 /* popc */, SP::POPCrr, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
4676 { 3031 /* prefetch */, SP::PREFETCHi, Convert__MEMri2_1__PrefetchTag1_3, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_PrefetchTag }, },
4677 { 3031 /* prefetch */, SP::PREFETCHr, Convert__MEMrr2_1__PrefetchTag1_3, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_PrefetchTag }, },
4678 { 3040 /* prefetcha */, SP::PREFETCHAi, Convert__MEMri2_1__PrefetchTag1_4, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_PrefetchTag }, },
4679 { 3040 /* prefetcha */, SP::PREFETCHAr, Convert__MEMrr2_1__ASITag1_3__PrefetchTag1_4, AMFBS_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_PrefetchTag }, },
4680 { 3050 /* pwr */, SP::PWRPSRrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_PSR }, },
4681 { 3050 /* pwr */, SP::PWRPSRri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_PSR }, },
4682 { 3050 /* pwr */, SP::PWRPSRrr, Convert__Reg1_0__Reg1_1, AMFBS_HasPWRPSR, { MCK_IntRegs, MCK_IntRegs, MCK_PSR }, },
4683 { 3050 /* pwr */, SP::PWRPSRri, Convert__Reg1_0__Imm1_1, AMFBS_HasPWRPSR, { MCK_IntRegs, MCK_Imm, MCK_PSR }, },
4684 { 3054 /* rd */, SP::RDPSR, Convert__Reg1_1, AMFBS_None, { MCK_PSR, MCK_IntRegs }, },
4685 { 3054 /* rd */, SP::RDTBR, Convert__Reg1_1, AMFBS_None, { MCK_TBR, MCK_IntRegs }, },
4686 { 3054 /* rd */, SP::RDWIM, Convert__Reg1_1, AMFBS_None, { MCK_WIM, MCK_IntRegs }, },
4687 { 3054 /* rd */, SP::RDASR, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_ASRRegs, MCK_IntRegs }, },
4688 { 3057 /* rdpr */, SP::RDFQ, Convert__Reg1_1, AMFBS_HasV9, { MCK_FQ, MCK_IntRegs }, },
4689 { 3057 /* rdpr */, SP::RDPR, Convert__Reg1_1__Reg1_0, AMFBS_HasV9, { MCK_PRRegs, MCK_IntRegs }, },
4690 { 3062 /* restore */, SP::RESTORErr, Convert__regG0__regG0__regG0, AMFBS_None, { }, },
4691 { 3062 /* restore */, SP::RESTORErr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4692 { 3062 /* restore */, SP::RESTOREri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4693 { 3070 /* restored */, SP::RESTORED, Convert_NoOperands, AMFBS_HasV9, { }, },
4694 { 3079 /* ret */, SP::RET, Convert__imm_95_8, AMFBS_None, { }, },
4695 { 3083 /* retl */, SP::RETL, Convert__imm_95_8, AMFBS_None, { }, },
4696 { 3088 /* retry */, SP::RETRY, Convert_NoOperands, AMFBS_HasV9, { }, },
4697 { 3094 /* rett */, SP::RETTri, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4698 { 3094 /* rett */, SP::RETTrr, Convert__MEMrr2_0, AMFBS_None, { MCK_MEMrr }, },
4699 { 3099 /* save */, SP::SAVErr, Convert__regG0__regG0__regG0, AMFBS_None, { }, },
4700 { 3099 /* save */, SP::SAVErr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4701 { 3099 /* save */, SP::SAVEri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4702 { 3104 /* saved */, SP::SAVED, Convert_NoOperands, AMFBS_HasV9, { }, },
4703 { 3110 /* sdiv */, SP::SDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4704 { 3110 /* sdiv */, SP::SDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4705 { 3115 /* sdivcc */, SP::SDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4706 { 3115 /* sdivcc */, SP::SDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4707 { 3122 /* sdivx */, SP::SDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4708 { 3122 /* sdivx */, SP::SDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4709 { 3128 /* set */, SP::SET, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
4710 { 3132 /* sethi */, SP::SETHIi, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs }, },
4711 { 3138 /* setx */, SP::SETX, Convert__Reg1_2__Imm1_0__Reg1_1, AMFBS_HasV9, { MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
4712 { 3143 /* shutdown */, SP::SHUTDOWN, Convert_NoOperands, AMFBS_HasVIS, { }, },
4713 { 3152 /* siam */, SP::SIAM, Convert_NoOperands, AMFBS_HasVIS2, { }, },
4714 { 3157 /* signx */, SP::SRArr, Convert__Reg1_0__Reg1_0__regG0, AMFBS_HasV9, { MCK_IntRegs }, },
4715 { 3157 /* signx */, SP::SRArr, Convert__Reg1_1__Reg1_0__regG0, AMFBS_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
4716 { 3163 /* sir */, SP::SIR, Convert__imm_95_0, AMFBS_None, { }, },
4717 { 3163 /* sir */, SP::SIR, Convert__Imm1_0, AMFBS_HasV9, { MCK_Imm }, },
4718 { 3167 /* sll */, SP::SLLrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4719 { 3167 /* sll */, SP::SLLri, Convert__Reg1_2__Reg1_0__ShiftAmtImm51_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm5, MCK_IntRegs }, },
4720 { 3171 /* sllx */, SP::SLLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4721 { 3171 /* sllx */, SP::SLLXri, Convert__Reg1_2__Reg1_0__ShiftAmtImm61_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm6, MCK_IntRegs }, },
4722 { 3176 /* smac */, SP::SMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4723 { 3176 /* smac */, SP::SMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4724 { 3181 /* smul */, SP::SMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4725 { 3181 /* smul */, SP::SMULri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4726 { 3186 /* smulcc */, SP::SMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4727 { 3186 /* smulcc */, SP::SMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4728 { 3193 /* sra */, SP::SRArr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4729 { 3193 /* sra */, SP::SRAri, Convert__Reg1_2__Reg1_0__ShiftAmtImm51_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm5, MCK_IntRegs }, },
4730 { 3197 /* srax */, SP::SRAXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4731 { 3197 /* srax */, SP::SRAXri, Convert__Reg1_2__Reg1_0__ShiftAmtImm61_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm6, MCK_IntRegs }, },
4732 { 3202 /* srl */, SP::SRLrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4733 { 3202 /* srl */, SP::SRLri, Convert__Reg1_2__Reg1_0__ShiftAmtImm51_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm5, MCK_IntRegs }, },
4734 { 3206 /* srlx */, SP::SRLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4735 { 3206 /* srlx */, SP::SRLXri, Convert__Reg1_2__Reg1_0__ShiftAmtImm61_1, AMFBS_None, { MCK_IntRegs, MCK_ShiftAmtImm6, MCK_IntRegs }, },
4736 { 3211 /* st */, SP::STCSRri, Convert__MEMri2_2, AMFBS_None, { MCK_CPSR, MCK__91_, MCK_MEMri, MCK__93_ }, },
4737 { 3211 /* st */, SP::STCSRrr, Convert__MEMrr2_2, AMFBS_None, { MCK_CPSR, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4738 { 3211 /* st */, SP::STFSRri, Convert__MEMri2_2, AMFBS_None, { MCK_FSR, MCK__91_, MCK_MEMri, MCK__93_ }, },
4739 { 3211 /* st */, SP::STFSRrr, Convert__MEMrr2_2, AMFBS_None, { MCK_FSR, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4740 { 3211 /* st */, SP::STCri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_CoprocRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4741 { 3211 /* st */, SP::STCrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_CoprocRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4742 { 3211 /* st */, SP::STFri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4743 { 3211 /* st */, SP::STFrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4744 { 3211 /* st */, SP::STri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4745 { 3211 /* st */, SP::STrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4746 { 3214 /* sta */, SP::STFAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_FPRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4747 { 3214 /* sta */, SP::STFArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_HasV9, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4748 { 3214 /* sta */, SP::STAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4749 { 3214 /* sta */, SP::STArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4750 { 3218 /* stb */, SP::STBri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4751 { 3218 /* stb */, SP::STBrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4752 { 3222 /* stba */, SP::STBAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4753 { 3222 /* stba */, SP::STBArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4754 { 3227 /* stbar */, SP::STBAR, Convert_NoOperands, AMFBS_None, { }, },
4755 { 3233 /* std */, SP::STDCQri, Convert__MEMri2_2, AMFBS_None, { MCK_CPQ, MCK__91_, MCK_MEMri, MCK__93_ }, },
4756 { 3233 /* std */, SP::STDCQrr, Convert__MEMrr2_2, AMFBS_None, { MCK_CPQ, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4757 { 3233 /* std */, SP::STDFQri, Convert__MEMri2_2, AMFBS_None, { MCK_FQ, MCK__91_, MCK_MEMri, MCK__93_ }, },
4758 { 3233 /* std */, SP::STDFQrr, Convert__MEMrr2_2, AMFBS_None, { MCK_FQ, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4759 { 3233 /* std */, SP::STDCri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_CoprocPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
4760 { 3233 /* std */, SP::STDCrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_CoprocPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4761 { 3233 /* std */, SP::STDri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
4762 { 3233 /* std */, SP::STDrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4763 { 3233 /* std */, SP::STDFri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4764 { 3233 /* std */, SP::STDFrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4765 { 3237 /* stda */, SP::STDAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_IntPair, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4766 { 3237 /* stda */, SP::STDArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_None, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4767 { 3237 /* stda */, SP::STDFAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_DFPRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4768 { 3237 /* stda */, SP::STDFArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_HasV9, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4769 { 3242 /* sth */, SP::STHri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4770 { 3242 /* sth */, SP::STHrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4771 { 3246 /* stha */, SP::STHAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4772 { 3246 /* stha */, SP::STHArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4773 { 3251 /* stq */, SP::STQFri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4774 { 3251 /* stq */, SP::STQFrr, Convert__MEMrr2_2__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4775 { 3255 /* stqa */, SP::STQFAri, Convert__MEMri2_2__Reg1_0, AMFBS_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4776 { 3255 /* stqa */, SP::STQFArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4777 { 3260 /* stx */, SP::STXFSRri, Convert__MEMri2_2, AMFBS_HasV9, { MCK_FSR, MCK__91_, MCK_MEMri, MCK__93_ }, },
4778 { 3260 /* stx */, SP::STXFSRrr, Convert__MEMrr2_2, AMFBS_HasV9, { MCK_FSR, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4779 { 3260 /* stx */, SP::STXri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
4780 { 3260 /* stx */, SP::STXrr, Convert__MEMrr2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
4781 { 3264 /* stxa */, SP::STXAri, Convert__MEMri2_2__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi }, },
4782 { 3264 /* stxa */, SP::STXArr, Convert__MEMrr2_2__Reg1_0__ASITag1_4, AMFBS_None, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag }, },
4783 { 3269 /* sub */, SP::SUBrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4784 { 3269 /* sub */, SP::SUBri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4785 { 3273 /* subcc */, SP::SUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4786 { 3273 /* subcc */, SP::SUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4787 { 3279 /* subx */, SP::SUBCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4788 { 3279 /* subx */, SP::SUBCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4789 { 3284 /* subxcc */, SP::SUBErr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4790 { 3284 /* subxcc */, SP::SUBEri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4791 { 3291 /* swap */, SP::SWAPri, Convert__Reg1_3__MEMri2_1__Tie0_1_1, AMFBS_None, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
4792 { 3291 /* swap */, SP::SWAPrr, Convert__Reg1_3__MEMrr2_1__Tie0_1_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
4793 { 3296 /* swapa */, SP::SWAPAri, Convert__Reg1_4__MEMri2_1__Tie0_1_1, AMFBS_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_asi, MCK_IntRegs }, },
4794 { 3296 /* swapa */, SP::SWAPArr, Convert__Reg1_4__MEMrr2_1__ASITag1_3__Tie0_1_1, AMFBS_None, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_ASITag, MCK_IntRegs }, },
4795 { 3302 /* t */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, AMFBS_None, { MCK_IntRegs }, },
4796 { 3302 /* t */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
4797 { 3302 /* t */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4798 { 3302 /* t */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4799 { 3302 /* t */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4800 { 3302 /* t */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4801 { 3302 /* t */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4802 { 3302 /* t */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4803 { 3302 /* t */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4804 { 3302 /* t */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4805 { 3302 /* t */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4806 { 3302 /* t */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4807 { 3302 /* t */, SP::TRAPrr, Convert__Reg1_1__Reg1_3__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4808 { 3302 /* t */, SP::TRAPri, Convert__Reg1_1__Imm1_3__Imm1_0, AMFBS_None, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4809 { 3302 /* t */, SP::TXCCrr, Convert__Reg1_2__Reg1_4__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4810 { 3302 /* t */, SP::TXCCri, Convert__Reg1_2__Imm1_4__Imm1_0, AMFBS_None, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4811 { 3302 /* t */, SP::TICCrr, Convert__Reg1_2__Reg1_4__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4812 { 3302 /* t */, SP::TICCri, Convert__Reg1_2__Imm1_4__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4813 { 3304 /* ta */, SP::TA1, Convert_NoOperands, AMFBS_None, { MCK_1 }, },
4814 { 3304 /* ta */, SP::TA3, Convert_NoOperands, AMFBS_None, { MCK_3 }, },
4815 { 3304 /* ta */, SP::TA5, Convert_NoOperands, AMFBS_None, { MCK_5 }, },
4816 { 3304 /* ta */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, AMFBS_None, { MCK_IntRegs }, },
4817 { 3304 /* ta */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, AMFBS_None, { MCK_Imm }, },
4818 { 3304 /* ta */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4819 { 3304 /* ta */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4820 { 3304 /* ta */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4821 { 3304 /* ta */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4822 { 3304 /* ta */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4823 { 3304 /* ta */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4824 { 3304 /* ta */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4825 { 3304 /* ta */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4826 { 3304 /* ta */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4827 { 3304 /* ta */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4828 { 3307 /* taddcc */, SP::TADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4829 { 3307 /* taddcc */, SP::TADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4830 { 3314 /* taddcctv */, SP::TADDCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4831 { 3314 /* taddcctv */, SP::TADDCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4832 { 3323 /* tcc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, AMFBS_None, { MCK_IntRegs }, },
4833 { 3323 /* tcc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
4834 { 3323 /* tcc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4835 { 3323 /* tcc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4836 { 3323 /* tcc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4837 { 3323 /* tcc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4838 { 3323 /* tcc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4839 { 3323 /* tcc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4840 { 3323 /* tcc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4841 { 3323 /* tcc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4842 { 3323 /* tcc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4843 { 3323 /* tcc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4844 { 3327 /* tcs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, AMFBS_None, { MCK_IntRegs }, },
4845 { 3327 /* tcs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
4846 { 3327 /* tcs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4847 { 3327 /* tcs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4848 { 3327 /* tcs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4849 { 3327 /* tcs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4850 { 3327 /* tcs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4851 { 3327 /* tcs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4852 { 3327 /* tcs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4853 { 3327 /* tcs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4854 { 3327 /* tcs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4855 { 3327 /* tcs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4856 { 3331 /* te */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
4857 { 3331 /* te */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
4858 { 3331 /* te */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4859 { 3331 /* te */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4860 { 3331 /* te */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4861 { 3331 /* te */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4862 { 3331 /* te */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4863 { 3331 /* te */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4864 { 3331 /* te */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4865 { 3331 /* te */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4866 { 3331 /* te */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4867 { 3331 /* te */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4868 { 3334 /* teq */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
4869 { 3334 /* teq */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
4870 { 3334 /* teq */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4871 { 3334 /* teq */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4872 { 3334 /* teq */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4873 { 3334 /* teq */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4874 { 3334 /* teq */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4875 { 3334 /* teq */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4876 { 3334 /* teq */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4877 { 3334 /* teq */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4878 { 3334 /* teq */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4879 { 3334 /* teq */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4880 { 3338 /* tg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_10, AMFBS_None, { MCK_IntRegs }, },
4881 { 3338 /* tg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
4882 { 3338 /* tg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4883 { 3338 /* tg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4884 { 3338 /* tg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4885 { 3338 /* tg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4886 { 3338 /* tg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_10, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4887 { 3338 /* tg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_10, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4888 { 3338 /* tg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4889 { 3338 /* tg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4890 { 3338 /* tg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4891 { 3338 /* tg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4892 { 3341 /* tge */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_11, AMFBS_None, { MCK_IntRegs }, },
4893 { 3341 /* tge */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_11, AMFBS_None, { MCK_Imm }, },
4894 { 3341 /* tge */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_11, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4895 { 3341 /* tge */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_11, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4896 { 3341 /* tge */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4897 { 3341 /* tge */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4898 { 3341 /* tge */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_11, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4899 { 3341 /* tge */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_11, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4900 { 3341 /* tge */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_11, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4901 { 3341 /* tge */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_11, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4902 { 3341 /* tge */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4903 { 3341 /* tge */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_11, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4904 { 3345 /* tgeu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, AMFBS_None, { MCK_IntRegs }, },
4905 { 3345 /* tgeu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, AMFBS_None, { MCK_Imm }, },
4906 { 3345 /* tgeu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4907 { 3345 /* tgeu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4908 { 3345 /* tgeu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4909 { 3345 /* tgeu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4910 { 3345 /* tgeu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4911 { 3345 /* tgeu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4912 { 3345 /* tgeu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4913 { 3345 /* tgeu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4914 { 3345 /* tgeu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4915 { 3345 /* tgeu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4916 { 3350 /* tgt */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_10, AMFBS_None, { MCK_IntRegs }, },
4917 { 3350 /* tgt */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_10, AMFBS_None, { MCK_Imm }, },
4918 { 3350 /* tgt */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4919 { 3350 /* tgt */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4920 { 3350 /* tgt */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4921 { 3350 /* tgt */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4922 { 3350 /* tgt */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_10, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4923 { 3350 /* tgt */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_10, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4924 { 3350 /* tgt */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4925 { 3350 /* tgt */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4926 { 3350 /* tgt */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4927 { 3350 /* tgt */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_10, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4928 { 3354 /* tgu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_12, AMFBS_None, { MCK_IntRegs }, },
4929 { 3354 /* tgu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_12, AMFBS_None, { MCK_Imm }, },
4930 { 3354 /* tgu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_12, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4931 { 3354 /* tgu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_12, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4932 { 3354 /* tgu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4933 { 3354 /* tgu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4934 { 3354 /* tgu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_12, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4935 { 3354 /* tgu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_12, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4936 { 3354 /* tgu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_12, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4937 { 3354 /* tgu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_12, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4938 { 3354 /* tgu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4939 { 3354 /* tgu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_12, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4940 { 3358 /* tl */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_3, AMFBS_None, { MCK_IntRegs }, },
4941 { 3358 /* tl */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
4942 { 3358 /* tl */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4943 { 3358 /* tl */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4944 { 3358 /* tl */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4945 { 3358 /* tl */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4946 { 3358 /* tl */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4947 { 3358 /* tl */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4948 { 3358 /* tl */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4949 { 3358 /* tl */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4950 { 3358 /* tl */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4951 { 3358 /* tl */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4952 { 3361 /* tle */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_2, AMFBS_None, { MCK_IntRegs }, },
4953 { 3361 /* tle */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_2, AMFBS_None, { MCK_Imm }, },
4954 { 3361 /* tle */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_2, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4955 { 3361 /* tle */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_2, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4956 { 3361 /* tle */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4957 { 3361 /* tle */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4958 { 3361 /* tle */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4959 { 3361 /* tle */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_2, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4960 { 3361 /* tle */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_2, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4961 { 3361 /* tle */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_2, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4962 { 3361 /* tle */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4963 { 3361 /* tle */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_2, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4964 { 3365 /* tleu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_4, AMFBS_None, { MCK_IntRegs }, },
4965 { 3365 /* tleu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_4, AMFBS_None, { MCK_Imm }, },
4966 { 3365 /* tleu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_4, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4967 { 3365 /* tleu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_4, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4968 { 3365 /* tleu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4969 { 3365 /* tleu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4970 { 3365 /* tleu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_4, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4971 { 3365 /* tleu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_4, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4972 { 3365 /* tleu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_4, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4973 { 3365 /* tleu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_4, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4974 { 3365 /* tleu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4975 { 3365 /* tleu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_4, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4976 { 3370 /* tlt */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_3, AMFBS_None, { MCK_IntRegs }, },
4977 { 3370 /* tlt */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_3, AMFBS_None, { MCK_Imm }, },
4978 { 3370 /* tlt */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4979 { 3370 /* tlt */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4980 { 3370 /* tlt */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4981 { 3370 /* tlt */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4982 { 3370 /* tlt */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4983 { 3370 /* tlt */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_3, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4984 { 3370 /* tlt */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4985 { 3370 /* tlt */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4986 { 3370 /* tlt */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4987 { 3370 /* tlt */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_3, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4988 { 3374 /* tlu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, AMFBS_None, { MCK_IntRegs }, },
4989 { 3374 /* tlu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, AMFBS_None, { MCK_Imm }, },
4990 { 3374 /* tlu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4991 { 3374 /* tlu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4992 { 3374 /* tlu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
4993 { 3374 /* tlu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
4994 { 3374 /* tlu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4995 { 3374 /* tlu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4996 { 3374 /* tlu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4997 { 3374 /* tlu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4998 { 3374 /* tlu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4999 { 3374 /* tlu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5000 { 3378 /* tn */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_0, AMFBS_None, { MCK_IntRegs }, },
5001 { 3378 /* tn */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_0, AMFBS_None, { MCK_Imm }, },
5002 { 3378 /* tn */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_0, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5003 { 3378 /* tn */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_0, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5004 { 3378 /* tn */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5005 { 3378 /* tn */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5006 { 3378 /* tn */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5007 { 3378 /* tn */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5008 { 3378 /* tn */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_0, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5009 { 3378 /* tn */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_0, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5010 { 3378 /* tn */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5011 { 3378 /* tn */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_0, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5012 { 3381 /* tne */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, AMFBS_None, { MCK_IntRegs }, },
5013 { 3381 /* tne */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
5014 { 3381 /* tne */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5015 { 3381 /* tne */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5016 { 3381 /* tne */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5017 { 3381 /* tne */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5018 { 3381 /* tne */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5019 { 3381 /* tne */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5020 { 3381 /* tne */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5021 { 3381 /* tne */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5022 { 3381 /* tne */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5023 { 3381 /* tne */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5024 { 3385 /* tneg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_6, AMFBS_None, { MCK_IntRegs }, },
5025 { 3385 /* tneg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_6, AMFBS_None, { MCK_Imm }, },
5026 { 3385 /* tneg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_6, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5027 { 3385 /* tneg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_6, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5028 { 3385 /* tneg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5029 { 3385 /* tneg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5030 { 3385 /* tneg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5031 { 3385 /* tneg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5032 { 3385 /* tneg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_6, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5033 { 3385 /* tneg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_6, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5034 { 3385 /* tneg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5035 { 3385 /* tneg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_6, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5036 { 3390 /* tnz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, AMFBS_None, { MCK_IntRegs }, },
5037 { 3390 /* tnz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, AMFBS_None, { MCK_Imm }, },
5038 { 3390 /* tnz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5039 { 3390 /* tnz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5040 { 3390 /* tnz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5041 { 3390 /* tnz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5042 { 3390 /* tnz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5043 { 3390 /* tnz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5044 { 3390 /* tnz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5045 { 3390 /* tnz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5046 { 3390 /* tnz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5047 { 3390 /* tnz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5048 { 3394 /* tpos */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_14, AMFBS_None, { MCK_IntRegs }, },
5049 { 3394 /* tpos */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_14, AMFBS_None, { MCK_Imm }, },
5050 { 3394 /* tpos */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_14, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5051 { 3394 /* tpos */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_14, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5052 { 3394 /* tpos */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5053 { 3394 /* tpos */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5054 { 3394 /* tpos */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_14, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5055 { 3394 /* tpos */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_14, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5056 { 3394 /* tpos */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_14, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5057 { 3394 /* tpos */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_14, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5058 { 3394 /* tpos */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5059 { 3394 /* tpos */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_14, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5060 { 3399 /* tst */, SP::ORCCrr, Convert__regG0__Reg1_0__regG0, AMFBS_None, { MCK_IntRegs }, },
5061 { 3403 /* tsubcc */, SP::TSUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5062 { 3403 /* tsubcc */, SP::TSUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5063 { 3410 /* tsubcctv */, SP::TSUBCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5064 { 3410 /* tsubcctv */, SP::TSUBCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5065 { 3419 /* tvc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_15, AMFBS_None, { MCK_IntRegs }, },
5066 { 3419 /* tvc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_15, AMFBS_None, { MCK_Imm }, },
5067 { 3419 /* tvc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_15, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5068 { 3419 /* tvc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_15, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5069 { 3419 /* tvc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5070 { 3419 /* tvc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5071 { 3419 /* tvc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_15, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5072 { 3419 /* tvc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_15, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5073 { 3419 /* tvc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_15, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5074 { 3419 /* tvc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_15, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5075 { 3419 /* tvc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5076 { 3419 /* tvc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_15, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5077 { 3423 /* tvs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_7, AMFBS_None, { MCK_IntRegs }, },
5078 { 3423 /* tvs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_7, AMFBS_None, { MCK_Imm }, },
5079 { 3423 /* tvs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_7, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5080 { 3423 /* tvs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_7, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5081 { 3423 /* tvs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5082 { 3423 /* tvs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5083 { 3423 /* tvs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5084 { 3423 /* tvs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5085 { 3423 /* tvs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_7, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5086 { 3423 /* tvs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_7, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5087 { 3423 /* tvs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5088 { 3423 /* tvs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_7, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5089 { 3427 /* tz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, AMFBS_None, { MCK_IntRegs }, },
5090 { 3427 /* tz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, AMFBS_None, { MCK_Imm }, },
5091 { 3427 /* tz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
5092 { 3427 /* tz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
5093 { 3427 /* tz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs }, },
5094 { 3427 /* tz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_Imm }, },
5095 { 3427 /* tz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5096 { 3427 /* tz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
5097 { 3427 /* tz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5098 { 3427 /* tz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5099 { 3427 /* tz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
5100 { 3427 /* tz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, AMFBS_HasV9, { MCK_ICC, MCK_IntRegs, MCK__43_, MCK_Imm }, },
5101 { 3430 /* udiv */, SP::UDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5102 { 3430 /* udiv */, SP::UDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5103 { 3435 /* udivcc */, SP::UDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5104 { 3435 /* udivcc */, SP::UDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5105 { 3442 /* udivx */, SP::UDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5106 { 3442 /* udivx */, SP::UDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5107 { 3448 /* umac */, SP::UMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5108 { 3448 /* umac */, SP::UMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5109 { 3453 /* umul */, SP::UMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5110 { 3453 /* umul */, SP::UMULri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5111 { 3458 /* umulcc */, SP::UMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5112 { 3458 /* umulcc */, SP::UMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5113 { 3465 /* umulxhi */, SP::UMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5114 { 3473 /* unimp */, SP::UNIMP, Convert__imm_95_0, AMFBS_None, { }, },
5115 { 3473 /* unimp */, SP::UNIMP, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
5116 { 3479 /* wr */, SP::WRPSRrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_PSR }, },
5117 { 3479 /* wr */, SP::WRTBRrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_TBR }, },
5118 { 3479 /* wr */, SP::WRWIMrr, Convert__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_WIM }, },
5119 { 3479 /* wr */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, AMFBS_None, { MCK_IntRegs, MCK_ASRRegs }, },
5120 { 3479 /* wr */, SP::WRPSRri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_PSR }, },
5121 { 3479 /* wr */, SP::WRTBRri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_TBR }, },
5122 { 3479 /* wr */, SP::WRWIMri, Convert__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_WIM }, },
5123 { 3479 /* wr */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, AMFBS_None, { MCK_Imm, MCK_ASRRegs }, },
5124 { 3479 /* wr */, SP::WRPSRrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_PSR }, },
5125 { 3479 /* wr */, SP::WRTBRrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_TBR }, },
5126 { 3479 /* wr */, SP::WRWIMrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_WIM }, },
5127 { 3479 /* wr */, SP::WRASRrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_ASRRegs }, },
5128 { 3479 /* wr */, SP::WRPSRri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_PSR }, },
5129 { 3479 /* wr */, SP::WRTBRri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_TBR }, },
5130 { 3479 /* wr */, SP::WRWIMri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_WIM }, },
5131 { 3479 /* wr */, SP::WRASRri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_ASRRegs }, },
5132 { 3482 /* wrpr */, SP::WRPRrr, Convert__Reg1_1__Reg1_0__regG0, AMFBS_HasV9, { MCK_IntRegs, MCK_PRRegs }, },
5133 { 3482 /* wrpr */, SP::WRPRri, Convert__Reg1_1__regG0__Imm1_0, AMFBS_HasV9, { MCK_Imm, MCK_PRRegs }, },
5134 { 3482 /* wrpr */, SP::WRPRrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasV9, { MCK_IntRegs, MCK_IntRegs, MCK_PRRegs }, },
5135 { 3482 /* wrpr */, SP::WRPRri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_HasV9, { MCK_IntRegs, MCK_Imm, MCK_PRRegs }, },
5136 { 3487 /* xmulx */, SP::XMULX, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5137 { 3493 /* xmulxhi */, SP::XMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5138 { 3501 /* xnor */, SP::XNORrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5139 { 3501 /* xnor */, SP::XNORri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5140 { 3506 /* xnorcc */, SP::XNORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5141 { 3506 /* xnorcc */, SP::XNORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5142 { 3513 /* xor */, SP::XORrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5143 { 3513 /* xor */, SP::XORri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5144 { 3517 /* xorcc */, SP::XORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, AMFBS_None, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
5145 { 3517 /* xorcc */, SP::XORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, AMFBS_None, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
5146};
5147
5148#include "llvm/Support/Debug.h"
5149#include "llvm/Support/Format.h"
5150
5151unsigned SparcAsmParser::
5152MatchInstructionImpl(const OperandVector &Operands,
5153 MCInst &Inst,
5154 uint64_t &ErrorInfo,
5155 FeatureBitset &MissingFeatures,
5156 bool matchingInlineAsm, unsigned VariantID) {
5157 // Eliminate obvious mismatches.
5158 if (Operands.size() > 7) {
5159 ErrorInfo = 7;
5160 return Match_InvalidOperand;
5161 }
5162
5163 // Get the current feature set.
5164 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
5165
5166 // Get the instruction mnemonic, which is the first token.
5167 StringRef Mnemonic = ((SparcOperand &)*Operands[0]).getToken();
5168
5169 // Process all MnemonicAliases to remap the mnemonic.
5170 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
5171
5172 // Some state to try to produce better error messages.
5173 bool HadMatchOtherThanFeatures = false;
5174 bool HadMatchOtherThanPredicate = false;
5175 unsigned RetCode = Match_InvalidOperand;
5176 MissingFeatures.set();
5177 // Set ErrorInfo to the operand that mismatches if it is
5178 // wrong for all instances of the instruction.
5179 ErrorInfo = ~0ULL;
5180 // Find the appropriate table for this asm variant.
5181 const MatchEntry *Start, *End;
5182 switch (VariantID) {
5183 default: llvm_unreachable("invalid variant!");
5184 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
5185 }
5186 // Search the table.
5187 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
5188
5189 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
5190 std::distance(MnemonicRange.first, MnemonicRange.second) <<
5191 " encodings with mnemonic '" << Mnemonic << "'\n");
5192
5193 // Return a more specific error code if no mnemonics match.
5194 if (MnemonicRange.first == MnemonicRange.second)
5195 return Match_MnemonicFail;
5196
5197 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
5198 it != ie; ++it) {
5199 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
5200 bool HasRequiredFeatures =
5201 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
5202 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
5203 << MII.getName(it->Opcode) << "\n");
5204 // equal_range guarantees that instruction mnemonic matches.
5205 assert(Mnemonic == it->getMnemonic());
5206 bool OperandsValid = true;
5207 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; ++FormalIdx) {
5208 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
5209 DEBUG_WITH_TYPE("asm-matcher",
5210 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
5211 << " against actual operand at index " << ActualIdx);
5212 if (ActualIdx < Operands.size())
5213 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
5214 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
5215 else
5216 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
5217 if (ActualIdx >= Operands.size()) {
5218 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n");
5219 if (Formal == InvalidMatchClass) {
5220 break;
5221 }
5222 if (isSubclass(Formal, OptionalMatchClass)) {
5223 continue;
5224 }
5225 OperandsValid = false;
5226 ErrorInfo = ActualIdx;
5227 break;
5228 }
5229 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
5230 unsigned Diag = validateOperandClass(Actual, Formal);
5231 if (Diag == Match_Success) {
5232 DEBUG_WITH_TYPE("asm-matcher",
5233 dbgs() << "match success using generic matcher\n");
5234 ++ActualIdx;
5235 continue;
5236 }
5237 // If the generic handler indicates an invalid operand
5238 // failure, check for a special case.
5239 if (Diag != Match_Success) {
5240 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
5241 if (TargetDiag == Match_Success) {
5242 DEBUG_WITH_TYPE("asm-matcher",
5243 dbgs() << "match success using target matcher\n");
5244 ++ActualIdx;
5245 continue;
5246 }
5247 // If the target matcher returned a specific error code use
5248 // that, else use the one from the generic matcher.
5249 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
5250 Diag = TargetDiag;
5251 }
5252 // If current formal operand wasn't matched and it is optional
5253 // then try to match next formal operand
5254 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
5255 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
5256 continue;
5257 }
5258 // If this operand is broken for all of the instances of this
5259 // mnemonic, keep track of it so we can report loc info.
5260 // If we already had a match that only failed due to a
5261 // target predicate, that diagnostic is preferred.
5262 if (!HadMatchOtherThanPredicate &&
5263 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
5264 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
5265 RetCode = Diag;
5266 ErrorInfo = ActualIdx;
5267 }
5268 // Otherwise, just reject this instance of the mnemonic.
5269 OperandsValid = false;
5270 break;
5271 }
5272
5273 if (!OperandsValid) {
5274 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
5275 "operand mismatches, ignoring "
5276 "this opcode\n");
5277 continue;
5278 }
5279 if (!HasRequiredFeatures) {
5280 HadMatchOtherThanFeatures = true;
5281 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
5282 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
5283 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
5284 if (NewMissingFeatures[I])
5285 dbgs() << ' ' << I;
5286 dbgs() << "\n");
5287 if (NewMissingFeatures.count() <=
5288 MissingFeatures.count())
5289 MissingFeatures = NewMissingFeatures;
5290 continue;
5291 }
5292
5293 Inst.clear();
5294
5295 Inst.setOpcode(it->Opcode);
5296 // We have a potential match but have not rendered the operands.
5297 // Check the target predicate to handle any context sensitive
5298 // constraints.
5299 // For example, Ties that are referenced multiple times must be
5300 // checked here to ensure the input is the same for each match
5301 // constraints. If we leave it any later the ties will have been
5302 // canonicalized
5303 unsigned MatchResult;
5304 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
5305 Inst.clear();
5306 DEBUG_WITH_TYPE(
5307 "asm-matcher",
5308 dbgs() << "Early target match predicate failed with diag code "
5309 << MatchResult << "\n");
5310 RetCode = MatchResult;
5311 HadMatchOtherThanPredicate = true;
5312 continue;
5313 }
5314
5315 if (matchingInlineAsm) {
5316 convertToMapAndConstraints(it->ConvertFn, Operands);
5317 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
5318 ErrorInfo))
5319 return Match_InvalidTiedOperand;
5320
5321 return Match_Success;
5322 }
5323
5324 // We have selected a definite instruction, convert the parsed
5325 // operands into the appropriate MCInst.
5326 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
5327
5328 // We have a potential match. Check the target predicate to
5329 // handle any context sensitive constraints.
5330 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
5331 DEBUG_WITH_TYPE("asm-matcher",
5332 dbgs() << "Target match predicate failed with diag code "
5333 << MatchResult << "\n");
5334 Inst.clear();
5335 RetCode = MatchResult;
5336 HadMatchOtherThanPredicate = true;
5337 continue;
5338 }
5339
5340 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
5341 ErrorInfo))
5342 return Match_InvalidTiedOperand;
5343
5344 DEBUG_WITH_TYPE(
5345 "asm-matcher",
5346 dbgs() << "Opcode result: complete match, selecting this opcode\n");
5347 return Match_Success;
5348 }
5349
5350 // Okay, we had no match. Try to return a useful error code.
5351 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
5352 return RetCode;
5353
5354 ErrorInfo = 0;
5355 return Match_MissingFeature;
5356}
5357
5358namespace {
5359 struct OperandMatchEntry {
5360 uint16_t Mnemonic;
5361 uint8_t OperandMask;
5362 uint8_t Class;
5363 uint8_t RequiredFeaturesIdx;
5364
5365 StringRef getMnemonic() const {
5366 return StringRef(MnemonicTable + Mnemonic + 1,
5367 MnemonicTable[Mnemonic]);
5368 }
5369 };
5370
5371 // Predicate for searching for an opcode.
5372 struct LessOpcodeOperand {
5373 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
5374 return LHS.getMnemonic() < RHS;
5375 }
5376 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
5377 return LHS < RHS.getMnemonic();
5378 }
5379 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
5380 return LHS.getMnemonic() < RHS.getMnemonic();
5381 }
5382 };
5383} // end anonymous namespace
5384
5385static const OperandMatchEntry OperandMatchTable[175] = {
5386 /* Operand List Mnemonic, Mask, Operand Class, Features */
5387 { 0 /* add */, 8 /* 3 */, MCK_TailRelocSymAdd_TLS, AMFBS_None },
5388 { 272 /* call */, 1 /* 0 */, MCK_CallTarget, AMFBS_None },
5389 { 272 /* call */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
5390 { 272 /* call */, 1 /* 0 */, MCK_MEMrr, AMFBS_None },
5391 { 272 /* call */, 1 /* 0 */, MCK_CallTarget, AMFBS_None },
5392 { 272 /* call */, 2 /* 1 */, MCK_TailRelocSymCall_TLS, AMFBS_None },
5393 { 281 /* casa */, 8 /* 3 */, MCK_ASITag, AMFBS_HasCASA },
5394 { 296 /* casxa */, 8 /* 3 */, MCK_ASITag, AMFBS_HasV9 },
5395 { 389 /* clr */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5396 { 389 /* clr */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5397 { 393 /* clrb */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5398 { 393 /* clrb */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5399 { 398 /* clrh */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5400 { 398 /* clrh */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5401 { 957 /* flush */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
5402 { 957 /* flush */, 1 /* 0 */, MCK_MEMrr, AMFBS_None },
5403 { 2570 /* jmp */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
5404 { 2570 /* jmp */, 1 /* 0 */, MCK_MEMrr, AMFBS_None },
5405 { 2574 /* jmpl */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
5406 { 2574 /* jmpl */, 1 /* 0 */, MCK_MEMrr, AMFBS_None },
5407 { 2579 /* ld */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5408 { 2579 /* ld */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5409 { 2579 /* ld */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5410 { 2579 /* ld */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5411 { 2579 /* ld */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5412 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5413 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5414 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5415 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5416 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5417 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5418 { 2579 /* ld */, 16 /* 4 */, MCK_TailRelocSymLoad_GOT, AMFBS_None },
5419 { 2579 /* ld */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5420 { 2579 /* ld */, 16 /* 4 */, MCK_TailRelocSymLoad_TLS, AMFBS_None },
5421 { 2582 /* lda */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5422 { 2582 /* lda */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5423 { 2582 /* lda */, 8 /* 3 */, MCK_ASITag, AMFBS_HasV9 },
5424 { 2582 /* lda */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5425 { 2582 /* lda */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5426 { 2582 /* lda */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5427 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5428 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5429 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5430 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5431 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5432 { 2586 /* ldd */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5433 { 2590 /* ldda */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5434 { 2590 /* ldda */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5435 { 2590 /* ldda */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5436 { 2590 /* ldda */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5437 { 2590 /* ldda */, 8 /* 3 */, MCK_ASITag, AMFBS_HasV9 },
5438 { 2590 /* ldda */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5439 { 2595 /* ldq */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5440 { 2595 /* ldq */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5441 { 2599 /* ldqa */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5442 { 2599 /* ldqa */, 8 /* 3 */, MCK_ASITag, AMFBS_HasV9 },
5443 { 2599 /* ldqa */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5444 { 2604 /* ldsb */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5445 { 2604 /* ldsb */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5446 { 2609 /* ldsba */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5447 { 2609 /* ldsba */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5448 { 2609 /* ldsba */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5449 { 2615 /* ldsh */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5450 { 2615 /* ldsh */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5451 { 2620 /* ldsha */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5452 { 2620 /* ldsha */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5453 { 2620 /* ldsha */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5454 { 2626 /* ldstub */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5455 { 2626 /* ldstub */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5456 { 2633 /* ldstuba */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5457 { 2633 /* ldstuba */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5458 { 2633 /* ldstuba */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5459 { 2641 /* ldsw */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5460 { 2641 /* ldsw */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5461 { 2646 /* ldswa */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5462 { 2646 /* ldswa */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5463 { 2646 /* ldswa */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5464 { 2652 /* ldub */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5465 { 2652 /* ldub */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5466 { 2657 /* lduba */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5467 { 2657 /* lduba */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5468 { 2657 /* lduba */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5469 { 2663 /* lduh */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5470 { 2663 /* lduh */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5471 { 2668 /* lduha */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5472 { 2668 /* lduha */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5473 { 2668 /* lduha */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5474 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5475 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5476 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5477 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5478 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5479 { 2674 /* ldx */, 16 /* 4 */, MCK_TailRelocSymLoad_GOT, AMFBS_None },
5480 { 2674 /* ldx */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5481 { 2674 /* ldx */, 16 /* 4 */, MCK_TailRelocSymLoad_TLS, AMFBS_None },
5482 { 2678 /* ldxa */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5483 { 2678 /* ldxa */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5484 { 2678 /* ldxa */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5485 { 2689 /* membar */, 1 /* 0 */, MCK_MembarTag, AMFBS_HasV9 },
5486 { 3031 /* prefetch */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5487 { 3031 /* prefetch */, 8 /* 3 */, MCK_PrefetchTag, AMFBS_HasV9 },
5488 { 3031 /* prefetch */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5489 { 3031 /* prefetch */, 8 /* 3 */, MCK_PrefetchTag, AMFBS_HasV9 },
5490 { 3040 /* prefetcha */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5491 { 3040 /* prefetcha */, 16 /* 4 */, MCK_PrefetchTag, AMFBS_HasV9 },
5492 { 3040 /* prefetcha */, 8 /* 3 */, MCK_ASITag, AMFBS_HasV9 },
5493 { 3040 /* prefetcha */, 2 /* 1 */, MCK_MEMrr, AMFBS_HasV9 },
5494 { 3040 /* prefetcha */, 16 /* 4 */, MCK_PrefetchTag, AMFBS_HasV9 },
5495 { 3094 /* rett */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
5496 { 3094 /* rett */, 1 /* 0 */, MCK_MEMrr, AMFBS_None },
5497 { 3167 /* sll */, 2 /* 1 */, MCK_ShiftAmtImm5, AMFBS_None },
5498 { 3171 /* sllx */, 2 /* 1 */, MCK_ShiftAmtImm6, AMFBS_None },
5499 { 3193 /* sra */, 2 /* 1 */, MCK_ShiftAmtImm5, AMFBS_None },
5500 { 3197 /* srax */, 2 /* 1 */, MCK_ShiftAmtImm6, AMFBS_None },
5501 { 3202 /* srl */, 2 /* 1 */, MCK_ShiftAmtImm5, AMFBS_None },
5502 { 3206 /* srlx */, 2 /* 1 */, MCK_ShiftAmtImm6, AMFBS_None },
5503 { 3211 /* st */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5504 { 3211 /* st */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5505 { 3211 /* st */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5506 { 3211 /* st */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5507 { 3211 /* st */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5508 { 3211 /* st */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5509 { 3211 /* st */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5510 { 3211 /* st */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5511 { 3211 /* st */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5512 { 3211 /* st */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5513 { 3214 /* sta */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5514 { 3214 /* sta */, 16 /* 4 */, MCK_ASITag, AMFBS_HasV9 },
5515 { 3214 /* sta */, 4 /* 2 */, MCK_MEMrr, AMFBS_HasV9 },
5516 { 3214 /* sta */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5517 { 3214 /* sta */, 16 /* 4 */, MCK_ASITag, AMFBS_None },
5518 { 3214 /* sta */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5519 { 3218 /* stb */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5520 { 3218 /* stb */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5521 { 3222 /* stba */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5522 { 3222 /* stba */, 16 /* 4 */, MCK_ASITag, AMFBS_None },
5523 { 3222 /* stba */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5524 { 3233 /* std */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5525 { 3233 /* std */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5526 { 3233 /* std */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5527 { 3233 /* std */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5528 { 3233 /* std */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5529 { 3233 /* std */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5530 { 3233 /* std */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5531 { 3233 /* std */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5532 { 3233 /* std */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5533 { 3233 /* std */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5534 { 3237 /* stda */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5535 { 3237 /* stda */, 16 /* 4 */, MCK_ASITag, AMFBS_None },
5536 { 3237 /* stda */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5537 { 3237 /* stda */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5538 { 3237 /* stda */, 16 /* 4 */, MCK_ASITag, AMFBS_HasV9 },
5539 { 3237 /* stda */, 4 /* 2 */, MCK_MEMrr, AMFBS_HasV9 },
5540 { 3242 /* sth */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5541 { 3242 /* sth */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5542 { 3246 /* stha */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5543 { 3246 /* stha */, 16 /* 4 */, MCK_ASITag, AMFBS_None },
5544 { 3246 /* stha */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5545 { 3251 /* stq */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5546 { 3251 /* stq */, 4 /* 2 */, MCK_MEMrr, AMFBS_HasV9 },
5547 { 3255 /* stqa */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5548 { 3255 /* stqa */, 16 /* 4 */, MCK_ASITag, AMFBS_HasV9 },
5549 { 3255 /* stqa */, 4 /* 2 */, MCK_MEMrr, AMFBS_HasV9 },
5550 { 3260 /* stx */, 4 /* 2 */, MCK_MEMri, AMFBS_HasV9 },
5551 { 3260 /* stx */, 4 /* 2 */, MCK_MEMrr, AMFBS_HasV9 },
5552 { 3260 /* stx */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5553 { 3260 /* stx */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5554 { 3264 /* stxa */, 4 /* 2 */, MCK_MEMri, AMFBS_None },
5555 { 3264 /* stxa */, 16 /* 4 */, MCK_ASITag, AMFBS_None },
5556 { 3264 /* stxa */, 4 /* 2 */, MCK_MEMrr, AMFBS_None },
5557 { 3291 /* swap */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
5558 { 3291 /* swap */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5559 { 3296 /* swapa */, 2 /* 1 */, MCK_MEMri, AMFBS_HasV9 },
5560 { 3296 /* swapa */, 8 /* 3 */, MCK_ASITag, AMFBS_None },
5561 { 3296 /* swapa */, 2 /* 1 */, MCK_MEMrr, AMFBS_None },
5562};
5563
5564ParseStatus SparcAsmParser::
5565tryCustomParseOperand(OperandVector &Operands,
5566 unsigned MCK) {
5567
5568 switch(MCK) {
5569 case MCK_ASITag:
5570 return parseASITag(Operands);
5571 case MCK_CallTarget:
5572 return parseCallTarget(Operands);
5573 case MCK_MEMri:
5574 return parseMEMOperand(Operands);
5575 case MCK_MEMrr:
5576 return parseMEMOperand(Operands);
5577 case MCK_MembarTag:
5578 return parseMembarTag(Operands);
5579 case MCK_PrefetchTag:
5580 return parsePrefetchTag(Operands);
5581 case MCK_ShiftAmtImm5:
5582 return parseShiftAmtImm<5>(Operands);
5583 case MCK_ShiftAmtImm6:
5584 return parseShiftAmtImm<6>(Operands);
5585 case MCK_TailRelocSymLoad_GOT:
5586 return parseTailRelocSym<TailRelocKind::Load_GOT>(Operands);
5587 case MCK_TailRelocSymAdd_TLS:
5588 return parseTailRelocSym<TailRelocKind::Add_TLS>(Operands);
5589 case MCK_TailRelocSymLoad_TLS:
5590 return parseTailRelocSym<TailRelocKind::Load_TLS>(Operands);
5591 case MCK_TailRelocSymCall_TLS:
5592 return parseTailRelocSym<TailRelocKind::Call_TLS>(Operands);
5593 default:
5594 return ParseStatus::NoMatch;
5595 }
5596 return ParseStatus::NoMatch;
5597}
5598
5599ParseStatus SparcAsmParser::
5600MatchOperandParserImpl(OperandVector &Operands,
5601 StringRef Mnemonic,
5602 bool ParseForAllFeatures) {
5603 // Get the current feature set.
5604 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
5605
5606 // Get the next operand index.
5607 unsigned NextOpNum = Operands.size() - 1;
5608 // Search the table.
5609 auto MnemonicRange =
5610 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
5611 Mnemonic, LessOpcodeOperand());
5612
5613 if (MnemonicRange.first == MnemonicRange.second)
5614 return ParseStatus::NoMatch;
5615
5616 for (const OperandMatchEntry *it = MnemonicRange.first,
5617 *ie = MnemonicRange.second; it != ie; ++it) {
5618 // equal_range guarantees that instruction mnemonic matches.
5619 assert(Mnemonic == it->getMnemonic());
5620
5621 // check if the available features match
5622 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
5623 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures)
5624 continue;
5625
5626 // check if the operand in question has a custom parser.
5627 if (!(it->OperandMask & (1 << NextOpNum)))
5628 continue;
5629
5630 // call custom parse method to handle the operand
5631 ParseStatus Result = tryCustomParseOperand(Operands, it->Class);
5632 if (!Result.isNoMatch())
5633 return Result;
5634 }
5635
5636 // Okay, we had no match.
5637 return ParseStatus::NoMatch;
5638}
5639
5640#endif // GET_MATCHER_IMPLEMENTATION
5641
5642
5643#ifdef GET_MNEMONIC_SPELL_CHECKER
5644#undef GET_MNEMONIC_SPELL_CHECKER
5645
5646static std::string SparcMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
5647 const unsigned MaxEditDist = 2;
5648 std::vector<StringRef> Candidates;
5649 StringRef Prev = "";
5650
5651 // Find the appropriate table for this asm variant.
5652 const MatchEntry *Start, *End;
5653 switch (VariantID) {
5654 default: llvm_unreachable("invalid variant!");
5655 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
5656 }
5657
5658 for (auto I = Start; I < End; I++) {
5659 // Ignore unsupported instructions.
5660 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
5661 if ((FBS & RequiredFeatures) != RequiredFeatures)
5662 continue;
5663
5664 StringRef T = I->getMnemonic();
5665 // Avoid recomputing the edit distance for the same string.
5666 if (T == Prev)
5667 continue;
5668
5669 Prev = T;
5670 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
5671 if (Dist <= MaxEditDist)
5672 Candidates.push_back(T);
5673 }
5674
5675 if (Candidates.empty())
5676 return "";
5677
5678 std::string Res = ", did you mean: ";
5679 unsigned i = 0;
5680 for (; i < Candidates.size() - 1; i++)
5681 Res += Candidates[i].str() + ", ";
5682 return Res + Candidates[i].str() + "?";
5683}
5684
5685#endif // GET_MNEMONIC_SPELL_CHECKER
5686
5687
5688#ifdef GET_MNEMONIC_CHECKER
5689#undef GET_MNEMONIC_CHECKER
5690
5691static bool SparcCheckMnemonic(StringRef Mnemonic,
5692 const FeatureBitset &AvailableFeatures,
5693 unsigned VariantID) {
5694 // Process all MnemonicAliases to remap the mnemonic.
5695 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
5696
5697 // Find the appropriate table for this asm variant.
5698 const MatchEntry *Start, *End;
5699 switch (VariantID) {
5700 default: llvm_unreachable("invalid variant!");
5701 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
5702 }
5703
5704 // Search the table.
5705 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
5706
5707 if (MnemonicRange.first == MnemonicRange.second)
5708 return false;
5709
5710 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
5711 it != ie; ++it) {
5712 const FeatureBitset &RequiredFeatures =
5713 FeatureBitsets[it->RequiredFeaturesIdx];
5714 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
5715 return true;
5716 }
5717 return false;
5718}
5719
5720#endif // GET_MNEMONIC_CHECKER
5721
5722