1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: VE.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10
11#ifdef GET_ASSEMBLER_HEADER
12#undef GET_ASSEMBLER_HEADER
13 // This should be included into the middle of the declaration of
14 // your subclasses implementation of MCTargetAsmParser.
15 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
16 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
17 const OperandVector &Operands);
18 void convertToMapAndConstraints(unsigned Kind,
19 const OperandVector &Operands) override;
20 unsigned MatchInstructionImpl(const OperandVector &Operands,
21 MCInst &Inst,
22 uint64_t &ErrorInfo,
23 FeatureBitset &MissingFeatures,
24 bool matchingInlineAsm,
25 unsigned VariantID = 0);
26 unsigned MatchInstructionImpl(const OperandVector &Operands,
27 MCInst &Inst,
28 uint64_t &ErrorInfo,
29 bool matchingInlineAsm,
30 unsigned VariantID = 0) {
31 FeatureBitset MissingFeatures;
32 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
33 matchingInlineAsm, VariantID);
34 }
35
36 ParseStatus MatchOperandParserImpl(
37 OperandVector &Operands,
38 StringRef Mnemonic,
39 bool ParseForAllFeatures = false);
40 ParseStatus tryCustomParseOperand(
41 OperandVector &Operands,
42 unsigned MCK);
43
44#endif // GET_ASSEMBLER_HEADER
45
46
47#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
48#undef GET_OPERAND_DIAGNOSTIC_TYPES
49
50#endif // GET_OPERAND_DIAGNOSTIC_TYPES
51
52
53#ifdef GET_REGISTER_MATCHER
54#undef GET_REGISTER_MATCHER
55
56// Bits for subtarget features that participate in instruction matching.
57enum SubtargetFeatureBits : uint8_t {
58};
59
60static MCRegister MatchRegisterName(StringRef Name) {
61 switch (Name.size()) {
62 default: break;
63 case 2: // 32 strings to match.
64 switch (Name[0]) {
65 default: break;
66 case 'i': // 1 string to match.
67 if (Name[1] != 'c')
68 break;
69 return VE::IC; // "ic"
70 case 'q': // 10 strings to match.
71 switch (Name[1]) {
72 default: break;
73 case '0': // 1 string to match.
74 return VE::Q0; // "q0"
75 case '1': // 1 string to match.
76 return VE::Q1; // "q1"
77 case '2': // 1 string to match.
78 return VE::Q2; // "q2"
79 case '3': // 1 string to match.
80 return VE::Q3; // "q3"
81 case '4': // 1 string to match.
82 return VE::Q4; // "q4"
83 case '5': // 1 string to match.
84 return VE::Q5; // "q5"
85 case '6': // 1 string to match.
86 return VE::Q6; // "q6"
87 case '7': // 1 string to match.
88 return VE::Q7; // "q7"
89 case '8': // 1 string to match.
90 return VE::Q8; // "q8"
91 case '9': // 1 string to match.
92 return VE::Q9; // "q9"
93 }
94 break;
95 case 's': // 10 strings to match.
96 switch (Name[1]) {
97 default: break;
98 case '0': // 1 string to match.
99 return VE::SX0; // "s0"
100 case '1': // 1 string to match.
101 return VE::SX1; // "s1"
102 case '2': // 1 string to match.
103 return VE::SX2; // "s2"
104 case '3': // 1 string to match.
105 return VE::SX3; // "s3"
106 case '4': // 1 string to match.
107 return VE::SX4; // "s4"
108 case '5': // 1 string to match.
109 return VE::SX5; // "s5"
110 case '6': // 1 string to match.
111 return VE::SX6; // "s6"
112 case '7': // 1 string to match.
113 return VE::SX7; // "s7"
114 case '8': // 1 string to match.
115 return VE::SX8; // "s8"
116 case '9': // 1 string to match.
117 return VE::SX9; // "s9"
118 }
119 break;
120 case 'v': // 11 strings to match.
121 switch (Name[1]) {
122 default: break;
123 case '0': // 1 string to match.
124 return VE::V0; // "v0"
125 case '1': // 1 string to match.
126 return VE::V1; // "v1"
127 case '2': // 1 string to match.
128 return VE::V2; // "v2"
129 case '3': // 1 string to match.
130 return VE::V3; // "v3"
131 case '4': // 1 string to match.
132 return VE::V4; // "v4"
133 case '5': // 1 string to match.
134 return VE::V5; // "v5"
135 case '6': // 1 string to match.
136 return VE::V6; // "v6"
137 case '7': // 1 string to match.
138 return VE::V7; // "v7"
139 case '8': // 1 string to match.
140 return VE::V8; // "v8"
141 case '9': // 1 string to match.
142 return VE::V9; // "v9"
143 case 'l': // 1 string to match.
144 return VE::VL; // "vl"
145 }
146 break;
147 }
148 break;
149 case 3: // 164 strings to match.
150 switch (Name[0]) {
151 default: break;
152 case 'p': // 1 string to match.
153 if (memcmp(Name.data()+1, "sw", 2) != 0)
154 break;
155 return VE::PSW; // "psw"
156 case 'q': // 22 strings to match.
157 switch (Name[1]) {
158 default: break;
159 case '1': // 10 strings to match.
160 switch (Name[2]) {
161 default: break;
162 case '0': // 1 string to match.
163 return VE::Q10; // "q10"
164 case '1': // 1 string to match.
165 return VE::Q11; // "q11"
166 case '2': // 1 string to match.
167 return VE::Q12; // "q12"
168 case '3': // 1 string to match.
169 return VE::Q13; // "q13"
170 case '4': // 1 string to match.
171 return VE::Q14; // "q14"
172 case '5': // 1 string to match.
173 return VE::Q15; // "q15"
174 case '6': // 1 string to match.
175 return VE::Q16; // "q16"
176 case '7': // 1 string to match.
177 return VE::Q17; // "q17"
178 case '8': // 1 string to match.
179 return VE::Q18; // "q18"
180 case '9': // 1 string to match.
181 return VE::Q19; // "q19"
182 }
183 break;
184 case '2': // 10 strings to match.
185 switch (Name[2]) {
186 default: break;
187 case '0': // 1 string to match.
188 return VE::Q20; // "q20"
189 case '1': // 1 string to match.
190 return VE::Q21; // "q21"
191 case '2': // 1 string to match.
192 return VE::Q22; // "q22"
193 case '3': // 1 string to match.
194 return VE::Q23; // "q23"
195 case '4': // 1 string to match.
196 return VE::Q24; // "q24"
197 case '5': // 1 string to match.
198 return VE::Q25; // "q25"
199 case '6': // 1 string to match.
200 return VE::Q26; // "q26"
201 case '7': // 1 string to match.
202 return VE::Q27; // "q27"
203 case '8': // 1 string to match.
204 return VE::Q28; // "q28"
205 case '9': // 1 string to match.
206 return VE::Q29; // "q29"
207 }
208 break;
209 case '3': // 2 strings to match.
210 switch (Name[2]) {
211 default: break;
212 case '0': // 1 string to match.
213 return VE::Q30; // "q30"
214 case '1': // 1 string to match.
215 return VE::Q31; // "q31"
216 }
217 break;
218 }
219 break;
220 case 's': // 75 strings to match.
221 switch (Name[1]) {
222 default: break;
223 case '1': // 10 strings to match.
224 switch (Name[2]) {
225 default: break;
226 case '0': // 1 string to match.
227 return VE::SX10; // "s10"
228 case '1': // 1 string to match.
229 return VE::SX11; // "s11"
230 case '2': // 1 string to match.
231 return VE::SX12; // "s12"
232 case '3': // 1 string to match.
233 return VE::SX13; // "s13"
234 case '4': // 1 string to match.
235 return VE::SX14; // "s14"
236 case '5': // 1 string to match.
237 return VE::SX15; // "s15"
238 case '6': // 1 string to match.
239 return VE::SX16; // "s16"
240 case '7': // 1 string to match.
241 return VE::SX17; // "s17"
242 case '8': // 1 string to match.
243 return VE::SX18; // "s18"
244 case '9': // 1 string to match.
245 return VE::SX19; // "s19"
246 }
247 break;
248 case '2': // 10 strings to match.
249 switch (Name[2]) {
250 default: break;
251 case '0': // 1 string to match.
252 return VE::SX20; // "s20"
253 case '1': // 1 string to match.
254 return VE::SX21; // "s21"
255 case '2': // 1 string to match.
256 return VE::SX22; // "s22"
257 case '3': // 1 string to match.
258 return VE::SX23; // "s23"
259 case '4': // 1 string to match.
260 return VE::SX24; // "s24"
261 case '5': // 1 string to match.
262 return VE::SX25; // "s25"
263 case '6': // 1 string to match.
264 return VE::SX26; // "s26"
265 case '7': // 1 string to match.
266 return VE::SX27; // "s27"
267 case '8': // 1 string to match.
268 return VE::SX28; // "s28"
269 case '9': // 1 string to match.
270 return VE::SX29; // "s29"
271 }
272 break;
273 case '3': // 10 strings to match.
274 switch (Name[2]) {
275 default: break;
276 case '0': // 1 string to match.
277 return VE::SX30; // "s30"
278 case '1': // 1 string to match.
279 return VE::SX31; // "s31"
280 case '2': // 1 string to match.
281 return VE::SX32; // "s32"
282 case '3': // 1 string to match.
283 return VE::SX33; // "s33"
284 case '4': // 1 string to match.
285 return VE::SX34; // "s34"
286 case '5': // 1 string to match.
287 return VE::SX35; // "s35"
288 case '6': // 1 string to match.
289 return VE::SX36; // "s36"
290 case '7': // 1 string to match.
291 return VE::SX37; // "s37"
292 case '8': // 1 string to match.
293 return VE::SX38; // "s38"
294 case '9': // 1 string to match.
295 return VE::SX39; // "s39"
296 }
297 break;
298 case '4': // 10 strings to match.
299 switch (Name[2]) {
300 default: break;
301 case '0': // 1 string to match.
302 return VE::SX40; // "s40"
303 case '1': // 1 string to match.
304 return VE::SX41; // "s41"
305 case '2': // 1 string to match.
306 return VE::SX42; // "s42"
307 case '3': // 1 string to match.
308 return VE::SX43; // "s43"
309 case '4': // 1 string to match.
310 return VE::SX44; // "s44"
311 case '5': // 1 string to match.
312 return VE::SX45; // "s45"
313 case '6': // 1 string to match.
314 return VE::SX46; // "s46"
315 case '7': // 1 string to match.
316 return VE::SX47; // "s47"
317 case '8': // 1 string to match.
318 return VE::SX48; // "s48"
319 case '9': // 1 string to match.
320 return VE::SX49; // "s49"
321 }
322 break;
323 case '5': // 10 strings to match.
324 switch (Name[2]) {
325 default: break;
326 case '0': // 1 string to match.
327 return VE::SX50; // "s50"
328 case '1': // 1 string to match.
329 return VE::SX51; // "s51"
330 case '2': // 1 string to match.
331 return VE::SX52; // "s52"
332 case '3': // 1 string to match.
333 return VE::SX53; // "s53"
334 case '4': // 1 string to match.
335 return VE::SX54; // "s54"
336 case '5': // 1 string to match.
337 return VE::SX55; // "s55"
338 case '6': // 1 string to match.
339 return VE::SX56; // "s56"
340 case '7': // 1 string to match.
341 return VE::SX57; // "s57"
342 case '8': // 1 string to match.
343 return VE::SX58; // "s58"
344 case '9': // 1 string to match.
345 return VE::SX59; // "s59"
346 }
347 break;
348 case '6': // 4 strings to match.
349 switch (Name[2]) {
350 default: break;
351 case '0': // 1 string to match.
352 return VE::SX60; // "s60"
353 case '1': // 1 string to match.
354 return VE::SX61; // "s61"
355 case '2': // 1 string to match.
356 return VE::SX62; // "s62"
357 case '3': // 1 string to match.
358 return VE::SX63; // "s63"
359 }
360 break;
361 case 'a': // 1 string to match.
362 if (Name[2] != 'r')
363 break;
364 return VE::SAR; // "sar"
365 case 'f': // 10 strings to match.
366 switch (Name[2]) {
367 default: break;
368 case '0': // 1 string to match.
369 return VE::SF0; // "sf0"
370 case '1': // 1 string to match.
371 return VE::SF1; // "sf1"
372 case '2': // 1 string to match.
373 return VE::SF2; // "sf2"
374 case '3': // 1 string to match.
375 return VE::SF3; // "sf3"
376 case '4': // 1 string to match.
377 return VE::SF4; // "sf4"
378 case '5': // 1 string to match.
379 return VE::SF5; // "sf5"
380 case '6': // 1 string to match.
381 return VE::SF6; // "sf6"
382 case '7': // 1 string to match.
383 return VE::SF7; // "sf7"
384 case '8': // 1 string to match.
385 return VE::SF8; // "sf8"
386 case '9': // 1 string to match.
387 return VE::SF9; // "sf9"
388 }
389 break;
390 case 'w': // 10 strings to match.
391 switch (Name[2]) {
392 default: break;
393 case '0': // 1 string to match.
394 return VE::SW0; // "sw0"
395 case '1': // 1 string to match.
396 return VE::SW1; // "sw1"
397 case '2': // 1 string to match.
398 return VE::SW2; // "sw2"
399 case '3': // 1 string to match.
400 return VE::SW3; // "sw3"
401 case '4': // 1 string to match.
402 return VE::SW4; // "sw4"
403 case '5': // 1 string to match.
404 return VE::SW5; // "sw5"
405 case '6': // 1 string to match.
406 return VE::SW6; // "sw6"
407 case '7': // 1 string to match.
408 return VE::SW7; // "sw7"
409 case '8': // 1 string to match.
410 return VE::SW8; // "sw8"
411 case '9': // 1 string to match.
412 return VE::SW9; // "sw9"
413 }
414 break;
415 }
416 break;
417 case 'v': // 66 strings to match.
418 switch (Name[1]) {
419 default: break;
420 case '1': // 10 strings to match.
421 switch (Name[2]) {
422 default: break;
423 case '0': // 1 string to match.
424 return VE::V10; // "v10"
425 case '1': // 1 string to match.
426 return VE::V11; // "v11"
427 case '2': // 1 string to match.
428 return VE::V12; // "v12"
429 case '3': // 1 string to match.
430 return VE::V13; // "v13"
431 case '4': // 1 string to match.
432 return VE::V14; // "v14"
433 case '5': // 1 string to match.
434 return VE::V15; // "v15"
435 case '6': // 1 string to match.
436 return VE::V16; // "v16"
437 case '7': // 1 string to match.
438 return VE::V17; // "v17"
439 case '8': // 1 string to match.
440 return VE::V18; // "v18"
441 case '9': // 1 string to match.
442 return VE::V19; // "v19"
443 }
444 break;
445 case '2': // 10 strings to match.
446 switch (Name[2]) {
447 default: break;
448 case '0': // 1 string to match.
449 return VE::V20; // "v20"
450 case '1': // 1 string to match.
451 return VE::V21; // "v21"
452 case '2': // 1 string to match.
453 return VE::V22; // "v22"
454 case '3': // 1 string to match.
455 return VE::V23; // "v23"
456 case '4': // 1 string to match.
457 return VE::V24; // "v24"
458 case '5': // 1 string to match.
459 return VE::V25; // "v25"
460 case '6': // 1 string to match.
461 return VE::V26; // "v26"
462 case '7': // 1 string to match.
463 return VE::V27; // "v27"
464 case '8': // 1 string to match.
465 return VE::V28; // "v28"
466 case '9': // 1 string to match.
467 return VE::V29; // "v29"
468 }
469 break;
470 case '3': // 10 strings to match.
471 switch (Name[2]) {
472 default: break;
473 case '0': // 1 string to match.
474 return VE::V30; // "v30"
475 case '1': // 1 string to match.
476 return VE::V31; // "v31"
477 case '2': // 1 string to match.
478 return VE::V32; // "v32"
479 case '3': // 1 string to match.
480 return VE::V33; // "v33"
481 case '4': // 1 string to match.
482 return VE::V34; // "v34"
483 case '5': // 1 string to match.
484 return VE::V35; // "v35"
485 case '6': // 1 string to match.
486 return VE::V36; // "v36"
487 case '7': // 1 string to match.
488 return VE::V37; // "v37"
489 case '8': // 1 string to match.
490 return VE::V38; // "v38"
491 case '9': // 1 string to match.
492 return VE::V39; // "v39"
493 }
494 break;
495 case '4': // 10 strings to match.
496 switch (Name[2]) {
497 default: break;
498 case '0': // 1 string to match.
499 return VE::V40; // "v40"
500 case '1': // 1 string to match.
501 return VE::V41; // "v41"
502 case '2': // 1 string to match.
503 return VE::V42; // "v42"
504 case '3': // 1 string to match.
505 return VE::V43; // "v43"
506 case '4': // 1 string to match.
507 return VE::V44; // "v44"
508 case '5': // 1 string to match.
509 return VE::V45; // "v45"
510 case '6': // 1 string to match.
511 return VE::V46; // "v46"
512 case '7': // 1 string to match.
513 return VE::V47; // "v47"
514 case '8': // 1 string to match.
515 return VE::V48; // "v48"
516 case '9': // 1 string to match.
517 return VE::V49; // "v49"
518 }
519 break;
520 case '5': // 10 strings to match.
521 switch (Name[2]) {
522 default: break;
523 case '0': // 1 string to match.
524 return VE::V50; // "v50"
525 case '1': // 1 string to match.
526 return VE::V51; // "v51"
527 case '2': // 1 string to match.
528 return VE::V52; // "v52"
529 case '3': // 1 string to match.
530 return VE::V53; // "v53"
531 case '4': // 1 string to match.
532 return VE::V54; // "v54"
533 case '5': // 1 string to match.
534 return VE::V55; // "v55"
535 case '6': // 1 string to match.
536 return VE::V56; // "v56"
537 case '7': // 1 string to match.
538 return VE::V57; // "v57"
539 case '8': // 1 string to match.
540 return VE::V58; // "v58"
541 case '9': // 1 string to match.
542 return VE::V59; // "v59"
543 }
544 break;
545 case '6': // 4 strings to match.
546 switch (Name[2]) {
547 default: break;
548 case '0': // 1 string to match.
549 return VE::V60; // "v60"
550 case '1': // 1 string to match.
551 return VE::V61; // "v61"
552 case '2': // 1 string to match.
553 return VE::V62; // "v62"
554 case '3': // 1 string to match.
555 return VE::V63; // "v63"
556 }
557 break;
558 case 'i': // 1 string to match.
559 if (Name[2] != 'x')
560 break;
561 return VE::VIX; // "vix"
562 case 'm': // 11 strings to match.
563 switch (Name[2]) {
564 default: break;
565 case '0': // 2 strings to match.
566 return VE::VM0; // "vm0"
567 case '1': // 1 string to match.
568 return VE::VM1; // "vm1"
569 case '2': // 1 string to match.
570 return VE::VM2; // "vm2"
571 case '3': // 1 string to match.
572 return VE::VM3; // "vm3"
573 case '4': // 1 string to match.
574 return VE::VM4; // "vm4"
575 case '5': // 1 string to match.
576 return VE::VM5; // "vm5"
577 case '6': // 1 string to match.
578 return VE::VM6; // "vm6"
579 case '7': // 1 string to match.
580 return VE::VM7; // "vm7"
581 case '8': // 1 string to match.
582 return VE::VM8; // "vm8"
583 case '9': // 1 string to match.
584 return VE::VM9; // "vm9"
585 }
586 break;
587 }
588 break;
589 }
590 break;
591 case 4: // 132 strings to match.
592 switch (Name[0]) {
593 default: break;
594 case 'p': // 11 strings to match.
595 if (Name[1] != 'm')
596 break;
597 switch (Name[2]) {
598 default: break;
599 case 'c': // 10 strings to match.
600 switch (Name[3]) {
601 default: break;
602 case '0': // 1 string to match.
603 return VE::PMC0; // "pmc0"
604 case '1': // 1 string to match.
605 return VE::PMC1; // "pmc1"
606 case '2': // 1 string to match.
607 return VE::PMC2; // "pmc2"
608 case '3': // 1 string to match.
609 return VE::PMC3; // "pmc3"
610 case '4': // 1 string to match.
611 return VE::PMC4; // "pmc4"
612 case '5': // 1 string to match.
613 return VE::PMC5; // "pmc5"
614 case '6': // 1 string to match.
615 return VE::PMC6; // "pmc6"
616 case '7': // 1 string to match.
617 return VE::PMC7; // "pmc7"
618 case '8': // 1 string to match.
619 return VE::PMC8; // "pmc8"
620 case '9': // 1 string to match.
621 return VE::PMC9; // "pmc9"
622 }
623 break;
624 case 'm': // 1 string to match.
625 if (Name[3] != 'r')
626 break;
627 return VE::PMMR; // "pmmr"
628 }
629 break;
630 case 's': // 108 strings to match.
631 switch (Name[1]) {
632 default: break;
633 case 'f': // 54 strings to match.
634 switch (Name[2]) {
635 default: break;
636 case '1': // 10 strings to match.
637 switch (Name[3]) {
638 default: break;
639 case '0': // 1 string to match.
640 return VE::SF10; // "sf10"
641 case '1': // 1 string to match.
642 return VE::SF11; // "sf11"
643 case '2': // 1 string to match.
644 return VE::SF12; // "sf12"
645 case '3': // 1 string to match.
646 return VE::SF13; // "sf13"
647 case '4': // 1 string to match.
648 return VE::SF14; // "sf14"
649 case '5': // 1 string to match.
650 return VE::SF15; // "sf15"
651 case '6': // 1 string to match.
652 return VE::SF16; // "sf16"
653 case '7': // 1 string to match.
654 return VE::SF17; // "sf17"
655 case '8': // 1 string to match.
656 return VE::SF18; // "sf18"
657 case '9': // 1 string to match.
658 return VE::SF19; // "sf19"
659 }
660 break;
661 case '2': // 10 strings to match.
662 switch (Name[3]) {
663 default: break;
664 case '0': // 1 string to match.
665 return VE::SF20; // "sf20"
666 case '1': // 1 string to match.
667 return VE::SF21; // "sf21"
668 case '2': // 1 string to match.
669 return VE::SF22; // "sf22"
670 case '3': // 1 string to match.
671 return VE::SF23; // "sf23"
672 case '4': // 1 string to match.
673 return VE::SF24; // "sf24"
674 case '5': // 1 string to match.
675 return VE::SF25; // "sf25"
676 case '6': // 1 string to match.
677 return VE::SF26; // "sf26"
678 case '7': // 1 string to match.
679 return VE::SF27; // "sf27"
680 case '8': // 1 string to match.
681 return VE::SF28; // "sf28"
682 case '9': // 1 string to match.
683 return VE::SF29; // "sf29"
684 }
685 break;
686 case '3': // 10 strings to match.
687 switch (Name[3]) {
688 default: break;
689 case '0': // 1 string to match.
690 return VE::SF30; // "sf30"
691 case '1': // 1 string to match.
692 return VE::SF31; // "sf31"
693 case '2': // 1 string to match.
694 return VE::SF32; // "sf32"
695 case '3': // 1 string to match.
696 return VE::SF33; // "sf33"
697 case '4': // 1 string to match.
698 return VE::SF34; // "sf34"
699 case '5': // 1 string to match.
700 return VE::SF35; // "sf35"
701 case '6': // 1 string to match.
702 return VE::SF36; // "sf36"
703 case '7': // 1 string to match.
704 return VE::SF37; // "sf37"
705 case '8': // 1 string to match.
706 return VE::SF38; // "sf38"
707 case '9': // 1 string to match.
708 return VE::SF39; // "sf39"
709 }
710 break;
711 case '4': // 10 strings to match.
712 switch (Name[3]) {
713 default: break;
714 case '0': // 1 string to match.
715 return VE::SF40; // "sf40"
716 case '1': // 1 string to match.
717 return VE::SF41; // "sf41"
718 case '2': // 1 string to match.
719 return VE::SF42; // "sf42"
720 case '3': // 1 string to match.
721 return VE::SF43; // "sf43"
722 case '4': // 1 string to match.
723 return VE::SF44; // "sf44"
724 case '5': // 1 string to match.
725 return VE::SF45; // "sf45"
726 case '6': // 1 string to match.
727 return VE::SF46; // "sf46"
728 case '7': // 1 string to match.
729 return VE::SF47; // "sf47"
730 case '8': // 1 string to match.
731 return VE::SF48; // "sf48"
732 case '9': // 1 string to match.
733 return VE::SF49; // "sf49"
734 }
735 break;
736 case '5': // 10 strings to match.
737 switch (Name[3]) {
738 default: break;
739 case '0': // 1 string to match.
740 return VE::SF50; // "sf50"
741 case '1': // 1 string to match.
742 return VE::SF51; // "sf51"
743 case '2': // 1 string to match.
744 return VE::SF52; // "sf52"
745 case '3': // 1 string to match.
746 return VE::SF53; // "sf53"
747 case '4': // 1 string to match.
748 return VE::SF54; // "sf54"
749 case '5': // 1 string to match.
750 return VE::SF55; // "sf55"
751 case '6': // 1 string to match.
752 return VE::SF56; // "sf56"
753 case '7': // 1 string to match.
754 return VE::SF57; // "sf57"
755 case '8': // 1 string to match.
756 return VE::SF58; // "sf58"
757 case '9': // 1 string to match.
758 return VE::SF59; // "sf59"
759 }
760 break;
761 case '6': // 4 strings to match.
762 switch (Name[3]) {
763 default: break;
764 case '0': // 1 string to match.
765 return VE::SF60; // "sf60"
766 case '1': // 1 string to match.
767 return VE::SF61; // "sf61"
768 case '2': // 1 string to match.
769 return VE::SF62; // "sf62"
770 case '3': // 1 string to match.
771 return VE::SF63; // "sf63"
772 }
773 break;
774 }
775 break;
776 case 'w': // 54 strings to match.
777 switch (Name[2]) {
778 default: break;
779 case '1': // 10 strings to match.
780 switch (Name[3]) {
781 default: break;
782 case '0': // 1 string to match.
783 return VE::SW10; // "sw10"
784 case '1': // 1 string to match.
785 return VE::SW11; // "sw11"
786 case '2': // 1 string to match.
787 return VE::SW12; // "sw12"
788 case '3': // 1 string to match.
789 return VE::SW13; // "sw13"
790 case '4': // 1 string to match.
791 return VE::SW14; // "sw14"
792 case '5': // 1 string to match.
793 return VE::SW15; // "sw15"
794 case '6': // 1 string to match.
795 return VE::SW16; // "sw16"
796 case '7': // 1 string to match.
797 return VE::SW17; // "sw17"
798 case '8': // 1 string to match.
799 return VE::SW18; // "sw18"
800 case '9': // 1 string to match.
801 return VE::SW19; // "sw19"
802 }
803 break;
804 case '2': // 10 strings to match.
805 switch (Name[3]) {
806 default: break;
807 case '0': // 1 string to match.
808 return VE::SW20; // "sw20"
809 case '1': // 1 string to match.
810 return VE::SW21; // "sw21"
811 case '2': // 1 string to match.
812 return VE::SW22; // "sw22"
813 case '3': // 1 string to match.
814 return VE::SW23; // "sw23"
815 case '4': // 1 string to match.
816 return VE::SW24; // "sw24"
817 case '5': // 1 string to match.
818 return VE::SW25; // "sw25"
819 case '6': // 1 string to match.
820 return VE::SW26; // "sw26"
821 case '7': // 1 string to match.
822 return VE::SW27; // "sw27"
823 case '8': // 1 string to match.
824 return VE::SW28; // "sw28"
825 case '9': // 1 string to match.
826 return VE::SW29; // "sw29"
827 }
828 break;
829 case '3': // 10 strings to match.
830 switch (Name[3]) {
831 default: break;
832 case '0': // 1 string to match.
833 return VE::SW30; // "sw30"
834 case '1': // 1 string to match.
835 return VE::SW31; // "sw31"
836 case '2': // 1 string to match.
837 return VE::SW32; // "sw32"
838 case '3': // 1 string to match.
839 return VE::SW33; // "sw33"
840 case '4': // 1 string to match.
841 return VE::SW34; // "sw34"
842 case '5': // 1 string to match.
843 return VE::SW35; // "sw35"
844 case '6': // 1 string to match.
845 return VE::SW36; // "sw36"
846 case '7': // 1 string to match.
847 return VE::SW37; // "sw37"
848 case '8': // 1 string to match.
849 return VE::SW38; // "sw38"
850 case '9': // 1 string to match.
851 return VE::SW39; // "sw39"
852 }
853 break;
854 case '4': // 10 strings to match.
855 switch (Name[3]) {
856 default: break;
857 case '0': // 1 string to match.
858 return VE::SW40; // "sw40"
859 case '1': // 1 string to match.
860 return VE::SW41; // "sw41"
861 case '2': // 1 string to match.
862 return VE::SW42; // "sw42"
863 case '3': // 1 string to match.
864 return VE::SW43; // "sw43"
865 case '4': // 1 string to match.
866 return VE::SW44; // "sw44"
867 case '5': // 1 string to match.
868 return VE::SW45; // "sw45"
869 case '6': // 1 string to match.
870 return VE::SW46; // "sw46"
871 case '7': // 1 string to match.
872 return VE::SW47; // "sw47"
873 case '8': // 1 string to match.
874 return VE::SW48; // "sw48"
875 case '9': // 1 string to match.
876 return VE::SW49; // "sw49"
877 }
878 break;
879 case '5': // 10 strings to match.
880 switch (Name[3]) {
881 default: break;
882 case '0': // 1 string to match.
883 return VE::SW50; // "sw50"
884 case '1': // 1 string to match.
885 return VE::SW51; // "sw51"
886 case '2': // 1 string to match.
887 return VE::SW52; // "sw52"
888 case '3': // 1 string to match.
889 return VE::SW53; // "sw53"
890 case '4': // 1 string to match.
891 return VE::SW54; // "sw54"
892 case '5': // 1 string to match.
893 return VE::SW55; // "sw55"
894 case '6': // 1 string to match.
895 return VE::SW56; // "sw56"
896 case '7': // 1 string to match.
897 return VE::SW57; // "sw57"
898 case '8': // 1 string to match.
899 return VE::SW58; // "sw58"
900 case '9': // 1 string to match.
901 return VE::SW59; // "sw59"
902 }
903 break;
904 case '6': // 4 strings to match.
905 switch (Name[3]) {
906 default: break;
907 case '0': // 1 string to match.
908 return VE::SW60; // "sw60"
909 case '1': // 1 string to match.
910 return VE::SW61; // "sw61"
911 case '2': // 1 string to match.
912 return VE::SW62; // "sw62"
913 case '3': // 1 string to match.
914 return VE::SW63; // "sw63"
915 }
916 break;
917 }
918 break;
919 }
920 break;
921 case 'v': // 13 strings to match.
922 if (Name[1] != 'm')
923 break;
924 switch (Name[2]) {
925 default: break;
926 case '1': // 6 strings to match.
927 switch (Name[3]) {
928 default: break;
929 case '0': // 1 string to match.
930 return VE::VM10; // "vm10"
931 case '1': // 1 string to match.
932 return VE::VM11; // "vm11"
933 case '2': // 1 string to match.
934 return VE::VM12; // "vm12"
935 case '3': // 1 string to match.
936 return VE::VM13; // "vm13"
937 case '4': // 1 string to match.
938 return VE::VM14; // "vm14"
939 case '5': // 1 string to match.
940 return VE::VM15; // "vm15"
941 }
942 break;
943 case 'p': // 7 strings to match.
944 switch (Name[3]) {
945 default: break;
946 case '1': // 1 string to match.
947 return VE::VMP1; // "vmp1"
948 case '2': // 1 string to match.
949 return VE::VMP2; // "vmp2"
950 case '3': // 1 string to match.
951 return VE::VMP3; // "vmp3"
952 case '4': // 1 string to match.
953 return VE::VMP4; // "vmp4"
954 case '5': // 1 string to match.
955 return VE::VMP5; // "vmp5"
956 case '6': // 1 string to match.
957 return VE::VMP6; // "vmp6"
958 case '7': // 1 string to match.
959 return VE::VMP7; // "vmp7"
960 }
961 break;
962 }
963 break;
964 }
965 break;
966 case 5: // 10 strings to match.
967 switch (Name[0]) {
968 default: break;
969 case 'p': // 9 strings to match.
970 if (memcmp(Name.data()+1, "mc", 2) != 0)
971 break;
972 switch (Name[3]) {
973 default: break;
974 case '1': // 5 strings to match.
975 switch (Name[4]) {
976 default: break;
977 case '0': // 1 string to match.
978 return VE::PMC10; // "pmc10"
979 case '1': // 1 string to match.
980 return VE::PMC11; // "pmc11"
981 case '2': // 1 string to match.
982 return VE::PMC12; // "pmc12"
983 case '3': // 1 string to match.
984 return VE::PMC13; // "pmc13"
985 case '4': // 1 string to match.
986 return VE::PMC14; // "pmc14"
987 }
988 break;
989 case 'r': // 4 strings to match.
990 switch (Name[4]) {
991 default: break;
992 case '0': // 1 string to match.
993 return VE::PMCR0; // "pmcr0"
994 case '1': // 1 string to match.
995 return VE::PMCR1; // "pmcr1"
996 case '2': // 1 string to match.
997 return VE::PMCR2; // "pmcr2"
998 case '3': // 1 string to match.
999 return VE::PMCR3; // "pmcr3"
1000 }
1001 break;
1002 }
1003 break;
1004 case 'u': // 1 string to match.
1005 if (memcmp(Name.data()+1, "srcc", 4) != 0)
1006 break;
1007 return VE::USRCC; // "usrcc"
1008 }
1009 break;
1010 }
1011 return VE::NoRegister;
1012}
1013
1014static MCRegister MatchRegisterAltName(StringRef Name) {
1015 switch (Name.size()) {
1016 default: break;
1017 case 2: // 50 strings to match.
1018 switch (Name[0]) {
1019 default: break;
1020 case 'f': // 1 string to match.
1021 if (Name[1] != 'p')
1022 break;
1023 return VE::SX9; // "fp"
1024 case 'l': // 1 string to match.
1025 if (Name[1] != 'r')
1026 break;
1027 return VE::SX10; // "lr"
1028 case 's': // 37 strings to match.
1029 switch (Name[1]) {
1030 default: break;
1031 case '0': // 4 strings to match.
1032 return VE::Q0; // "s0"
1033 case '1': // 3 strings to match.
1034 return VE::SF1; // "s1"
1035 case '2': // 4 strings to match.
1036 return VE::Q1; // "s2"
1037 case '3': // 3 strings to match.
1038 return VE::SF3; // "s3"
1039 case '4': // 4 strings to match.
1040 return VE::Q2; // "s4"
1041 case '5': // 3 strings to match.
1042 return VE::SF5; // "s5"
1043 case '6': // 4 strings to match.
1044 return VE::Q3; // "s6"
1045 case '7': // 3 strings to match.
1046 return VE::SF7; // "s7"
1047 case '8': // 4 strings to match.
1048 return VE::Q4; // "s8"
1049 case '9': // 3 strings to match.
1050 return VE::SF9; // "s9"
1051 case 'l': // 1 string to match.
1052 return VE::SX8; // "sl"
1053 case 'p': // 1 string to match.
1054 return VE::SX11; // "sp"
1055 }
1056 break;
1057 case 't': // 1 string to match.
1058 if (Name[1] != 'p')
1059 break;
1060 return VE::SX14; // "tp"
1061 case 'v': // 10 strings to match.
1062 switch (Name[1]) {
1063 default: break;
1064 case '0': // 1 string to match.
1065 return VE::V0; // "v0"
1066 case '1': // 1 string to match.
1067 return VE::V1; // "v1"
1068 case '2': // 1 string to match.
1069 return VE::V2; // "v2"
1070 case '3': // 1 string to match.
1071 return VE::V3; // "v3"
1072 case '4': // 1 string to match.
1073 return VE::V4; // "v4"
1074 case '5': // 1 string to match.
1075 return VE::V5; // "v5"
1076 case '6': // 1 string to match.
1077 return VE::V6; // "v6"
1078 case '7': // 1 string to match.
1079 return VE::V7; // "v7"
1080 case '8': // 1 string to match.
1081 return VE::V8; // "v8"
1082 case '9': // 1 string to match.
1083 return VE::V9; // "v9"
1084 }
1085 break;
1086 }
1087 break;
1088 case 3: // 261 strings to match.
1089 switch (Name[0]) {
1090 default: break;
1091 case 'g': // 1 string to match.
1092 if (memcmp(Name.data()+1, "ot", 2) != 0)
1093 break;
1094 return VE::SX15; // "got"
1095 case 'p': // 1 string to match.
1096 if (memcmp(Name.data()+1, "lt", 2) != 0)
1097 break;
1098 return VE::SX16; // "plt"
1099 case 's': // 189 strings to match.
1100 switch (Name[1]) {
1101 default: break;
1102 case '1': // 35 strings to match.
1103 switch (Name[2]) {
1104 default: break;
1105 case '0': // 4 strings to match.
1106 return VE::Q5; // "s10"
1107 case '1': // 3 strings to match.
1108 return VE::SF11; // "s11"
1109 case '2': // 4 strings to match.
1110 return VE::Q6; // "s12"
1111 case '3': // 3 strings to match.
1112 return VE::SF13; // "s13"
1113 case '4': // 4 strings to match.
1114 return VE::Q7; // "s14"
1115 case '5': // 3 strings to match.
1116 return VE::SF15; // "s15"
1117 case '6': // 4 strings to match.
1118 return VE::Q8; // "s16"
1119 case '7': // 3 strings to match.
1120 return VE::SF17; // "s17"
1121 case '8': // 4 strings to match.
1122 return VE::Q9; // "s18"
1123 case '9': // 3 strings to match.
1124 return VE::SF19; // "s19"
1125 }
1126 break;
1127 case '2': // 35 strings to match.
1128 switch (Name[2]) {
1129 default: break;
1130 case '0': // 4 strings to match.
1131 return VE::Q10; // "s20"
1132 case '1': // 3 strings to match.
1133 return VE::SF21; // "s21"
1134 case '2': // 4 strings to match.
1135 return VE::Q11; // "s22"
1136 case '3': // 3 strings to match.
1137 return VE::SF23; // "s23"
1138 case '4': // 4 strings to match.
1139 return VE::Q12; // "s24"
1140 case '5': // 3 strings to match.
1141 return VE::SF25; // "s25"
1142 case '6': // 4 strings to match.
1143 return VE::Q13; // "s26"
1144 case '7': // 3 strings to match.
1145 return VE::SF27; // "s27"
1146 case '8': // 4 strings to match.
1147 return VE::Q14; // "s28"
1148 case '9': // 3 strings to match.
1149 return VE::SF29; // "s29"
1150 }
1151 break;
1152 case '3': // 35 strings to match.
1153 switch (Name[2]) {
1154 default: break;
1155 case '0': // 4 strings to match.
1156 return VE::Q15; // "s30"
1157 case '1': // 3 strings to match.
1158 return VE::SF31; // "s31"
1159 case '2': // 4 strings to match.
1160 return VE::Q16; // "s32"
1161 case '3': // 3 strings to match.
1162 return VE::SF33; // "s33"
1163 case '4': // 4 strings to match.
1164 return VE::Q17; // "s34"
1165 case '5': // 3 strings to match.
1166 return VE::SF35; // "s35"
1167 case '6': // 4 strings to match.
1168 return VE::Q18; // "s36"
1169 case '7': // 3 strings to match.
1170 return VE::SF37; // "s37"
1171 case '8': // 4 strings to match.
1172 return VE::Q19; // "s38"
1173 case '9': // 3 strings to match.
1174 return VE::SF39; // "s39"
1175 }
1176 break;
1177 case '4': // 35 strings to match.
1178 switch (Name[2]) {
1179 default: break;
1180 case '0': // 4 strings to match.
1181 return VE::Q20; // "s40"
1182 case '1': // 3 strings to match.
1183 return VE::SF41; // "s41"
1184 case '2': // 4 strings to match.
1185 return VE::Q21; // "s42"
1186 case '3': // 3 strings to match.
1187 return VE::SF43; // "s43"
1188 case '4': // 4 strings to match.
1189 return VE::Q22; // "s44"
1190 case '5': // 3 strings to match.
1191 return VE::SF45; // "s45"
1192 case '6': // 4 strings to match.
1193 return VE::Q23; // "s46"
1194 case '7': // 3 strings to match.
1195 return VE::SF47; // "s47"
1196 case '8': // 4 strings to match.
1197 return VE::Q24; // "s48"
1198 case '9': // 3 strings to match.
1199 return VE::SF49; // "s49"
1200 }
1201 break;
1202 case '5': // 35 strings to match.
1203 switch (Name[2]) {
1204 default: break;
1205 case '0': // 4 strings to match.
1206 return VE::Q25; // "s50"
1207 case '1': // 3 strings to match.
1208 return VE::SF51; // "s51"
1209 case '2': // 4 strings to match.
1210 return VE::Q26; // "s52"
1211 case '3': // 3 strings to match.
1212 return VE::SF53; // "s53"
1213 case '4': // 4 strings to match.
1214 return VE::Q27; // "s54"
1215 case '5': // 3 strings to match.
1216 return VE::SF55; // "s55"
1217 case '6': // 4 strings to match.
1218 return VE::Q28; // "s56"
1219 case '7': // 3 strings to match.
1220 return VE::SF57; // "s57"
1221 case '8': // 4 strings to match.
1222 return VE::Q29; // "s58"
1223 case '9': // 3 strings to match.
1224 return VE::SF59; // "s59"
1225 }
1226 break;
1227 case '6': // 14 strings to match.
1228 switch (Name[2]) {
1229 default: break;
1230 case '0': // 4 strings to match.
1231 return VE::Q30; // "s60"
1232 case '1': // 3 strings to match.
1233 return VE::SF61; // "s61"
1234 case '2': // 4 strings to match.
1235 return VE::Q31; // "s62"
1236 case '3': // 3 strings to match.
1237 return VE::SF63; // "s63"
1238 }
1239 break;
1240 }
1241 break;
1242 case 'v': // 70 strings to match.
1243 switch (Name[1]) {
1244 default: break;
1245 case '1': // 10 strings to match.
1246 switch (Name[2]) {
1247 default: break;
1248 case '0': // 1 string to match.
1249 return VE::V10; // "v10"
1250 case '1': // 1 string to match.
1251 return VE::V11; // "v11"
1252 case '2': // 1 string to match.
1253 return VE::V12; // "v12"
1254 case '3': // 1 string to match.
1255 return VE::V13; // "v13"
1256 case '4': // 1 string to match.
1257 return VE::V14; // "v14"
1258 case '5': // 1 string to match.
1259 return VE::V15; // "v15"
1260 case '6': // 1 string to match.
1261 return VE::V16; // "v16"
1262 case '7': // 1 string to match.
1263 return VE::V17; // "v17"
1264 case '8': // 1 string to match.
1265 return VE::V18; // "v18"
1266 case '9': // 1 string to match.
1267 return VE::V19; // "v19"
1268 }
1269 break;
1270 case '2': // 10 strings to match.
1271 switch (Name[2]) {
1272 default: break;
1273 case '0': // 1 string to match.
1274 return VE::V20; // "v20"
1275 case '1': // 1 string to match.
1276 return VE::V21; // "v21"
1277 case '2': // 1 string to match.
1278 return VE::V22; // "v22"
1279 case '3': // 1 string to match.
1280 return VE::V23; // "v23"
1281 case '4': // 1 string to match.
1282 return VE::V24; // "v24"
1283 case '5': // 1 string to match.
1284 return VE::V25; // "v25"
1285 case '6': // 1 string to match.
1286 return VE::V26; // "v26"
1287 case '7': // 1 string to match.
1288 return VE::V27; // "v27"
1289 case '8': // 1 string to match.
1290 return VE::V28; // "v28"
1291 case '9': // 1 string to match.
1292 return VE::V29; // "v29"
1293 }
1294 break;
1295 case '3': // 10 strings to match.
1296 switch (Name[2]) {
1297 default: break;
1298 case '0': // 1 string to match.
1299 return VE::V30; // "v30"
1300 case '1': // 1 string to match.
1301 return VE::V31; // "v31"
1302 case '2': // 1 string to match.
1303 return VE::V32; // "v32"
1304 case '3': // 1 string to match.
1305 return VE::V33; // "v33"
1306 case '4': // 1 string to match.
1307 return VE::V34; // "v34"
1308 case '5': // 1 string to match.
1309 return VE::V35; // "v35"
1310 case '6': // 1 string to match.
1311 return VE::V36; // "v36"
1312 case '7': // 1 string to match.
1313 return VE::V37; // "v37"
1314 case '8': // 1 string to match.
1315 return VE::V38; // "v38"
1316 case '9': // 1 string to match.
1317 return VE::V39; // "v39"
1318 }
1319 break;
1320 case '4': // 10 strings to match.
1321 switch (Name[2]) {
1322 default: break;
1323 case '0': // 1 string to match.
1324 return VE::V40; // "v40"
1325 case '1': // 1 string to match.
1326 return VE::V41; // "v41"
1327 case '2': // 1 string to match.
1328 return VE::V42; // "v42"
1329 case '3': // 1 string to match.
1330 return VE::V43; // "v43"
1331 case '4': // 1 string to match.
1332 return VE::V44; // "v44"
1333 case '5': // 1 string to match.
1334 return VE::V45; // "v45"
1335 case '6': // 1 string to match.
1336 return VE::V46; // "v46"
1337 case '7': // 1 string to match.
1338 return VE::V47; // "v47"
1339 case '8': // 1 string to match.
1340 return VE::V48; // "v48"
1341 case '9': // 1 string to match.
1342 return VE::V49; // "v49"
1343 }
1344 break;
1345 case '5': // 10 strings to match.
1346 switch (Name[2]) {
1347 default: break;
1348 case '0': // 1 string to match.
1349 return VE::V50; // "v50"
1350 case '1': // 1 string to match.
1351 return VE::V51; // "v51"
1352 case '2': // 1 string to match.
1353 return VE::V52; // "v52"
1354 case '3': // 1 string to match.
1355 return VE::V53; // "v53"
1356 case '4': // 1 string to match.
1357 return VE::V54; // "v54"
1358 case '5': // 1 string to match.
1359 return VE::V55; // "v55"
1360 case '6': // 1 string to match.
1361 return VE::V56; // "v56"
1362 case '7': // 1 string to match.
1363 return VE::V57; // "v57"
1364 case '8': // 1 string to match.
1365 return VE::V58; // "v58"
1366 case '9': // 1 string to match.
1367 return VE::V59; // "v59"
1368 }
1369 break;
1370 case '6': // 4 strings to match.
1371 switch (Name[2]) {
1372 default: break;
1373 case '0': // 1 string to match.
1374 return VE::V60; // "v60"
1375 case '1': // 1 string to match.
1376 return VE::V61; // "v61"
1377 case '2': // 1 string to match.
1378 return VE::V62; // "v62"
1379 case '3': // 1 string to match.
1380 return VE::V63; // "v63"
1381 }
1382 break;
1383 case 'i': // 1 string to match.
1384 if (Name[2] != 'x')
1385 break;
1386 return VE::VIX; // "vix"
1387 case 'm': // 15 strings to match.
1388 switch (Name[2]) {
1389 default: break;
1390 case '0': // 2 strings to match.
1391 return VE::VM0; // "vm0"
1392 case '1': // 1 string to match.
1393 return VE::VM1; // "vm1"
1394 case '2': // 2 strings to match.
1395 return VE::VM2; // "vm2"
1396 case '3': // 1 string to match.
1397 return VE::VM3; // "vm3"
1398 case '4': // 2 strings to match.
1399 return VE::VM4; // "vm4"
1400 case '5': // 1 string to match.
1401 return VE::VM5; // "vm5"
1402 case '6': // 2 strings to match.
1403 return VE::VM6; // "vm6"
1404 case '7': // 1 string to match.
1405 return VE::VM7; // "vm7"
1406 case '8': // 2 strings to match.
1407 return VE::VM8; // "vm8"
1408 case '9': // 1 string to match.
1409 return VE::VM9; // "vm9"
1410 }
1411 break;
1412 }
1413 break;
1414 }
1415 break;
1416 case 4: // 9 strings to match.
1417 if (memcmp(Name.data()+0, "vm1", 3) != 0)
1418 break;
1419 switch (Name[3]) {
1420 default: break;
1421 case '0': // 2 strings to match.
1422 return VE::VM10; // "vm10"
1423 case '1': // 1 string to match.
1424 return VE::VM11; // "vm11"
1425 case '2': // 2 strings to match.
1426 return VE::VM12; // "vm12"
1427 case '3': // 1 string to match.
1428 return VE::VM13; // "vm13"
1429 case '4': // 2 strings to match.
1430 return VE::VM14; // "vm14"
1431 case '5': // 1 string to match.
1432 return VE::VM15; // "vm15"
1433 }
1434 break;
1435 }
1436 return VE::NoRegister;
1437}
1438
1439#endif // GET_REGISTER_MATCHER
1440
1441
1442#ifdef GET_SUBTARGET_FEATURE_NAME
1443#undef GET_SUBTARGET_FEATURE_NAME
1444
1445// User-level names for subtarget features that participate in
1446// instruction matching.
1447static const char *getSubtargetFeatureName(uint64_t Val) {
1448 return "(unknown)";
1449}
1450
1451#endif // GET_SUBTARGET_FEATURE_NAME
1452
1453
1454#ifdef GET_MATCHER_IMPLEMENTATION
1455#undef GET_MATCHER_IMPLEMENTATION
1456
1457static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) {
1458 switch (VariantID) {
1459 case 0:
1460 switch (Mnemonic.size()) {
1461 default: break;
1462 case 4: // 1 string to match.
1463 if (memcmp(Mnemonic.data()+0, "vgtl", 4) != 0)
1464 break;
1465 Mnemonic = "vgtl.zx"; // "vgtl"
1466 return;
1467 case 6: // 12 strings to match.
1468 switch (Mnemonic[0]) {
1469 default: break;
1470 case 'c': // 4 strings to match.
1471 if (memcmp(Mnemonic.data()+1, "mov.", 4) != 0)
1472 break;
1473 switch (Mnemonic[5]) {
1474 default: break;
1475 case 'd': // 1 string to match.
1476 Mnemonic = "cmov.d.at"; // "cmov.d"
1477 return;
1478 case 'l': // 1 string to match.
1479 Mnemonic = "cmov.l.at"; // "cmov.l"
1480 return;
1481 case 's': // 1 string to match.
1482 Mnemonic = "cmov.s.at"; // "cmov.s"
1483 return;
1484 case 'w': // 1 string to match.
1485 Mnemonic = "cmov.w.at"; // "cmov.w"
1486 return;
1487 }
1488 break;
1489 case 'v': // 8 strings to match.
1490 switch (Mnemonic[1]) {
1491 default: break;
1492 case 'f': // 4 strings to match.
1493 if (memcmp(Mnemonic.data()+2, "mk.", 3) != 0)
1494 break;
1495 switch (Mnemonic[5]) {
1496 default: break;
1497 case 'd': // 1 string to match.
1498 Mnemonic = "vfmk.d.at"; // "vfmk.d"
1499 return;
1500 case 'l': // 1 string to match.
1501 Mnemonic = "vfmk.l.at"; // "vfmk.l"
1502 return;
1503 case 's': // 1 string to match.
1504 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s"
1505 return;
1506 case 'w': // 1 string to match.
1507 Mnemonic = "vfmk.w.at"; // "vfmk.w"
1508 return;
1509 }
1510 break;
1511 case 'm': // 1 string to match.
1512 if (memcmp(Mnemonic.data()+2, "rg.l", 4) != 0)
1513 break;
1514 Mnemonic = "vmrg"; // "vmrg.l"
1515 return;
1516 case 'r': // 1 string to match.
1517 if (memcmp(Mnemonic.data()+2, "cp.s", 4) != 0)
1518 break;
1519 Mnemonic = "pvrcp.up"; // "vrcp.s"
1520 return;
1521 case 's': // 2 strings to match.
1522 switch (Mnemonic[2]) {
1523 default: break;
1524 case 'l': // 1 string to match.
1525 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
1526 break;
1527 Mnemonic = "pvsla.lo"; // "vsla.w"
1528 return;
1529 case 'r': // 1 string to match.
1530 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
1531 break;
1532 Mnemonic = "pvsra.lo"; // "vsra.w"
1533 return;
1534 }
1535 break;
1536 }
1537 break;
1538 }
1539 break;
1540 case 7: // 19 strings to match.
1541 if (Mnemonic[0] != 'v')
1542 break;
1543 switch (Mnemonic[1]) {
1544 default: break;
1545 case 'a': // 2 strings to match.
1546 if (memcmp(Mnemonic.data()+2, "dd", 2) != 0)
1547 break;
1548 switch (Mnemonic[4]) {
1549 default: break;
1550 case 's': // 1 string to match.
1551 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1552 break;
1553 Mnemonic = "pvadds.lo"; // "vadds.w"
1554 return;
1555 case 'u': // 1 string to match.
1556 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1557 break;
1558 Mnemonic = "pvaddu.lo"; // "vaddu.w"
1559 return;
1560 }
1561 break;
1562 case 'c': // 2 strings to match.
1563 if (memcmp(Mnemonic.data()+2, "mp", 2) != 0)
1564 break;
1565 switch (Mnemonic[4]) {
1566 default: break;
1567 case 's': // 1 string to match.
1568 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1569 break;
1570 Mnemonic = "pvcmps.lo"; // "vcmps.w"
1571 return;
1572 case 'u': // 1 string to match.
1573 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1574 break;
1575 Mnemonic = "pvcmpu.lo"; // "vcmpu.w"
1576 return;
1577 }
1578 break;
1579 case 'd': // 1 string to match.
1580 if (memcmp(Mnemonic.data()+2, "ivs.w", 5) != 0)
1581 break;
1582 Mnemonic = "vdivs.w.zx"; // "vdivs.w"
1583 return;
1584 case 'f': // 8 strings to match.
1585 switch (Mnemonic[2]) {
1586 default: break;
1587 case 'a': // 1 string to match.
1588 if (memcmp(Mnemonic.data()+3, "dd.s", 4) != 0)
1589 break;
1590 Mnemonic = "pvfadd.up"; // "vfadd.s"
1591 return;
1592 case 'c': // 1 string to match.
1593 if (memcmp(Mnemonic.data()+3, "mp.s", 4) != 0)
1594 break;
1595 Mnemonic = "pvfcmp.up"; // "vfcmp.s"
1596 return;
1597 case 'm': // 5 strings to match.
1598 switch (Mnemonic[3]) {
1599 default: break;
1600 case 'a': // 2 strings to match.
1601 switch (Mnemonic[4]) {
1602 default: break;
1603 case 'd': // 1 string to match.
1604 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
1605 break;
1606 Mnemonic = "pvfmad.up"; // "vfmad.s"
1607 return;
1608 case 'x': // 1 string to match.
1609 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
1610 break;
1611 Mnemonic = "pvfmax.up"; // "vfmax.s"
1612 return;
1613 }
1614 break;
1615 case 'i': // 1 string to match.
1616 if (memcmp(Mnemonic.data()+4, "n.s", 3) != 0)
1617 break;
1618 Mnemonic = "pvfmin.up"; // "vfmin.s"
1619 return;
1620 case 's': // 1 string to match.
1621 if (memcmp(Mnemonic.data()+4, "b.s", 3) != 0)
1622 break;
1623 Mnemonic = "pvfmsb.up"; // "vfmsb.s"
1624 return;
1625 case 'u': // 1 string to match.
1626 if (memcmp(Mnemonic.data()+4, "l.s", 3) != 0)
1627 break;
1628 Mnemonic = "pvfmul.up"; // "vfmul.s"
1629 return;
1630 }
1631 break;
1632 case 's': // 1 string to match.
1633 if (memcmp(Mnemonic.data()+3, "ub.s", 4) != 0)
1634 break;
1635 Mnemonic = "pvfsub.up"; // "vfsub.s"
1636 return;
1637 }
1638 break;
1639 case 'g': // 1 string to match.
1640 if (memcmp(Mnemonic.data()+2, "tl.nc", 5) != 0)
1641 break;
1642 Mnemonic = "vgtl.zx.nc"; // "vgtl.nc"
1643 return;
1644 case 'm': // 3 strings to match.
1645 switch (Mnemonic[2]) {
1646 default: break;
1647 case 'a': // 1 string to match.
1648 if (memcmp(Mnemonic.data()+3, "xs.w", 4) != 0)
1649 break;
1650 Mnemonic = "pvmaxs.lo"; // "vmaxs.w"
1651 return;
1652 case 'i': // 1 string to match.
1653 if (memcmp(Mnemonic.data()+3, "ns.w", 4) != 0)
1654 break;
1655 Mnemonic = "pvmins.lo"; // "vmins.w"
1656 return;
1657 case 'u': // 1 string to match.
1658 if (memcmp(Mnemonic.data()+3, "ls.w", 4) != 0)
1659 break;
1660 Mnemonic = "vmuls.w.zx"; // "vmuls.w"
1661 return;
1662 }
1663 break;
1664 case 's': // 2 strings to match.
1665 if (memcmp(Mnemonic.data()+2, "ub", 2) != 0)
1666 break;
1667 switch (Mnemonic[4]) {
1668 default: break;
1669 case 's': // 1 string to match.
1670 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1671 break;
1672 Mnemonic = "pvsubs.lo"; // "vsubs.w"
1673 return;
1674 case 'u': // 1 string to match.
1675 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
1676 break;
1677 Mnemonic = "pvsubu.lo"; // "vsubu.w"
1678 return;
1679 }
1680 break;
1681 }
1682 break;
1683 case 8: // 3 strings to match.
1684 if (Mnemonic[0] != 'v')
1685 break;
1686 switch (Mnemonic[1]) {
1687 default: break;
1688 case 'f': // 2 strings to match.
1689 if (memcmp(Mnemonic.data()+2, "nm", 2) != 0)
1690 break;
1691 switch (Mnemonic[4]) {
1692 default: break;
1693 case 'a': // 1 string to match.
1694 if (memcmp(Mnemonic.data()+5, "d.s", 3) != 0)
1695 break;
1696 Mnemonic = "pvfnmad.up"; // "vfnmad.s"
1697 return;
1698 case 's': // 1 string to match.
1699 if (memcmp(Mnemonic.data()+5, "b.s", 3) != 0)
1700 break;
1701 Mnemonic = "pvfnmsb.up"; // "vfnmsb.s"
1702 return;
1703 }
1704 break;
1705 case 'r': // 1 string to match.
1706 if (memcmp(Mnemonic.data()+2, "sqrt.s", 6) != 0)
1707 break;
1708 Mnemonic = "pvrsqrt.up"; // "vrsqrt.s"
1709 return;
1710 }
1711 break;
1712 case 9: // 10 strings to match.
1713 if (Mnemonic[0] != 'v')
1714 break;
1715 switch (Mnemonic[1]) {
1716 default: break;
1717 case 'f': // 8 strings to match.
1718 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
1719 break;
1720 switch (Mnemonic[7]) {
1721 default: break;
1722 case 'a': // 2 strings to match.
1723 switch (Mnemonic[8]) {
1724 default: break;
1725 case 'f': // 1 string to match.
1726 Mnemonic = "pvfmk.s.up.af"; // "vfmk.s.af"
1727 return;
1728 case 't': // 1 string to match.
1729 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s.at"
1730 return;
1731 }
1732 break;
1733 case 'e': // 1 string to match.
1734 if (Mnemonic[8] != 'q')
1735 break;
1736 Mnemonic = "pvfmk.s.up.eq"; // "vfmk.s.eq"
1737 return;
1738 case 'g': // 2 strings to match.
1739 switch (Mnemonic[8]) {
1740 default: break;
1741 case 'e': // 1 string to match.
1742 Mnemonic = "pvfmk.s.up.ge"; // "vfmk.s.ge"
1743 return;
1744 case 't': // 1 string to match.
1745 Mnemonic = "pvfmk.s.up.gt"; // "vfmk.s.gt"
1746 return;
1747 }
1748 break;
1749 case 'l': // 2 strings to match.
1750 switch (Mnemonic[8]) {
1751 default: break;
1752 case 'e': // 1 string to match.
1753 Mnemonic = "pvfmk.s.up.le"; // "vfmk.s.le"
1754 return;
1755 case 't': // 1 string to match.
1756 Mnemonic = "pvfmk.s.up.lt"; // "vfmk.s.lt"
1757 return;
1758 }
1759 break;
1760 case 'n': // 1 string to match.
1761 if (Mnemonic[8] != 'e')
1762 break;
1763 Mnemonic = "pvfmk.s.up.ne"; // "vfmk.s.ne"
1764 return;
1765 }
1766 break;
1767 case 's': // 2 strings to match.
1768 switch (Mnemonic[2]) {
1769 default: break;
1770 case 'l': // 1 string to match.
1771 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
1772 break;
1773 Mnemonic = "pvsla.lo"; // "vsla.w.zx"
1774 return;
1775 case 'r': // 1 string to match.
1776 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
1777 break;
1778 Mnemonic = "pvsra.lo"; // "vsra.w.zx"
1779 return;
1780 }
1781 break;
1782 }
1783 break;
1784 case 10: // 11 strings to match.
1785 switch (Mnemonic[0]) {
1786 default: break;
1787 case 'p': // 4 strings to match.
1788 if (memcmp(Mnemonic.data()+1, "vfmk.", 5) != 0)
1789 break;
1790 switch (Mnemonic[6]) {
1791 default: break;
1792 case 's': // 2 strings to match.
1793 if (Mnemonic[7] != '.')
1794 break;
1795 switch (Mnemonic[8]) {
1796 default: break;
1797 case 'l': // 1 string to match.
1798 if (Mnemonic[9] != 'o')
1799 break;
1800 Mnemonic = "pvfmk.s.lo.at"; // "pvfmk.s.lo"
1801 return;
1802 case 'u': // 1 string to match.
1803 if (Mnemonic[9] != 'p')
1804 break;
1805 Mnemonic = "pvfmk.s.up.at"; // "pvfmk.s.up"
1806 return;
1807 }
1808 break;
1809 case 'w': // 2 strings to match.
1810 if (Mnemonic[7] != '.')
1811 break;
1812 switch (Mnemonic[8]) {
1813 default: break;
1814 case 'l': // 1 string to match.
1815 if (Mnemonic[9] != 'o')
1816 break;
1817 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo"
1818 return;
1819 case 'u': // 1 string to match.
1820 if (Mnemonic[9] != 'p')
1821 break;
1822 Mnemonic = "pvfmk.w.up.at"; // "pvfmk.w.up"
1823 return;
1824 }
1825 break;
1826 }
1827 break;
1828 case 'v': // 7 strings to match.
1829 switch (Mnemonic[1]) {
1830 default: break;
1831 case 'a': // 1 string to match.
1832 if (memcmp(Mnemonic.data()+2, "dds.w.zx", 8) != 0)
1833 break;
1834 Mnemonic = "pvadds.lo"; // "vadds.w.zx"
1835 return;
1836 case 'c': // 1 string to match.
1837 if (memcmp(Mnemonic.data()+2, "mps.w.zx", 8) != 0)
1838 break;
1839 Mnemonic = "pvcmps.lo"; // "vcmps.w.zx"
1840 return;
1841 case 'f': // 2 strings to match.
1842 if (memcmp(Mnemonic.data()+2, "mk.s.n", 6) != 0)
1843 break;
1844 switch (Mnemonic[8]) {
1845 default: break;
1846 case 'a': // 1 string to match.
1847 if (Mnemonic[9] != 'n')
1848 break;
1849 Mnemonic = "pvfmk.s.up.nan"; // "vfmk.s.nan"
1850 return;
1851 case 'u': // 1 string to match.
1852 if (Mnemonic[9] != 'm')
1853 break;
1854 Mnemonic = "pvfmk.s.up.num"; // "vfmk.s.num"
1855 return;
1856 }
1857 break;
1858 case 'm': // 2 strings to match.
1859 switch (Mnemonic[2]) {
1860 default: break;
1861 case 'a': // 1 string to match.
1862 if (memcmp(Mnemonic.data()+3, "xs.w.zx", 7) != 0)
1863 break;
1864 Mnemonic = "pvmaxs.lo"; // "vmaxs.w.zx"
1865 return;
1866 case 'i': // 1 string to match.
1867 if (memcmp(Mnemonic.data()+3, "ns.w.zx", 7) != 0)
1868 break;
1869 Mnemonic = "pvmins.lo"; // "vmins.w.zx"
1870 return;
1871 }
1872 break;
1873 case 's': // 1 string to match.
1874 if (memcmp(Mnemonic.data()+2, "ubs.w.zx", 8) != 0)
1875 break;
1876 Mnemonic = "pvsubs.lo"; // "vsubs.w.zx"
1877 return;
1878 }
1879 break;
1880 }
1881 break;
1882 case 11: // 4 strings to match.
1883 if (memcmp(Mnemonic.data()+0, "pvs", 3) != 0)
1884 break;
1885 switch (Mnemonic[3]) {
1886 default: break;
1887 case 'l': // 2 strings to match.
1888 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
1889 break;
1890 switch (Mnemonic[9]) {
1891 default: break;
1892 case 's': // 1 string to match.
1893 if (Mnemonic[10] != 'x')
1894 break;
1895 Mnemonic = "vsla.w.sx"; // "pvsla.lo.sx"
1896 return;
1897 case 'z': // 1 string to match.
1898 if (Mnemonic[10] != 'x')
1899 break;
1900 Mnemonic = "pvsla.lo"; // "pvsla.lo.zx"
1901 return;
1902 }
1903 break;
1904 case 'r': // 2 strings to match.
1905 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
1906 break;
1907 switch (Mnemonic[9]) {
1908 default: break;
1909 case 's': // 1 string to match.
1910 if (Mnemonic[10] != 'x')
1911 break;
1912 Mnemonic = "vsra.w.sx"; // "pvsra.lo.sx"
1913 return;
1914 case 'z': // 1 string to match.
1915 if (Mnemonic[10] != 'x')
1916 break;
1917 Mnemonic = "pvsra.lo"; // "pvsra.lo.zx"
1918 return;
1919 }
1920 break;
1921 }
1922 break;
1923 case 12: // 17 strings to match.
1924 switch (Mnemonic[0]) {
1925 default: break;
1926 case 'p': // 10 strings to match.
1927 if (Mnemonic[1] != 'v')
1928 break;
1929 switch (Mnemonic[2]) {
1930 default: break;
1931 case 'a': // 2 strings to match.
1932 if (memcmp(Mnemonic.data()+3, "dds.lo.", 7) != 0)
1933 break;
1934 switch (Mnemonic[10]) {
1935 default: break;
1936 case 's': // 1 string to match.
1937 if (Mnemonic[11] != 'x')
1938 break;
1939 Mnemonic = "vadds.w.sx"; // "pvadds.lo.sx"
1940 return;
1941 case 'z': // 1 string to match.
1942 if (Mnemonic[11] != 'x')
1943 break;
1944 Mnemonic = "pvadds.lo"; // "pvadds.lo.zx"
1945 return;
1946 }
1947 break;
1948 case 'c': // 2 strings to match.
1949 if (memcmp(Mnemonic.data()+3, "mps.lo.", 7) != 0)
1950 break;
1951 switch (Mnemonic[10]) {
1952 default: break;
1953 case 's': // 1 string to match.
1954 if (Mnemonic[11] != 'x')
1955 break;
1956 Mnemonic = "vcmps.w.sx"; // "pvcmps.lo.sx"
1957 return;
1958 case 'z': // 1 string to match.
1959 if (Mnemonic[11] != 'x')
1960 break;
1961 Mnemonic = "pvcmps.lo"; // "pvcmps.lo.zx"
1962 return;
1963 }
1964 break;
1965 case 'm': // 4 strings to match.
1966 switch (Mnemonic[3]) {
1967 default: break;
1968 case 'a': // 2 strings to match.
1969 if (memcmp(Mnemonic.data()+4, "xs.lo.", 6) != 0)
1970 break;
1971 switch (Mnemonic[10]) {
1972 default: break;
1973 case 's': // 1 string to match.
1974 if (Mnemonic[11] != 'x')
1975 break;
1976 Mnemonic = "vmaxs.w.sx"; // "pvmaxs.lo.sx"
1977 return;
1978 case 'z': // 1 string to match.
1979 if (Mnemonic[11] != 'x')
1980 break;
1981 Mnemonic = "pvmaxs.lo"; // "pvmaxs.lo.zx"
1982 return;
1983 }
1984 break;
1985 case 'i': // 2 strings to match.
1986 if (memcmp(Mnemonic.data()+4, "ns.lo.", 6) != 0)
1987 break;
1988 switch (Mnemonic[10]) {
1989 default: break;
1990 case 's': // 1 string to match.
1991 if (Mnemonic[11] != 'x')
1992 break;
1993 Mnemonic = "vmins.w.sx"; // "pvmins.lo.sx"
1994 return;
1995 case 'z': // 1 string to match.
1996 if (Mnemonic[11] != 'x')
1997 break;
1998 Mnemonic = "pvmins.lo"; // "pvmins.lo.zx"
1999 return;
2000 }
2001 break;
2002 }
2003 break;
2004 case 's': // 2 strings to match.
2005 if (memcmp(Mnemonic.data()+3, "ubs.lo.", 7) != 0)
2006 break;
2007 switch (Mnemonic[10]) {
2008 default: break;
2009 case 's': // 1 string to match.
2010 if (Mnemonic[11] != 'x')
2011 break;
2012 Mnemonic = "vsubs.w.sx"; // "pvsubs.lo.sx"
2013 return;
2014 case 'z': // 1 string to match.
2015 if (Mnemonic[11] != 'x')
2016 break;
2017 Mnemonic = "pvsubs.lo"; // "pvsubs.lo.zx"
2018 return;
2019 }
2020 break;
2021 }
2022 break;
2023 case 'v': // 7 strings to match.
2024 switch (Mnemonic[1]) {
2025 default: break;
2026 case 'f': // 6 strings to match.
2027 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
2028 break;
2029 switch (Mnemonic[7]) {
2030 default: break;
2031 case 'e': // 1 string to match.
2032 if (memcmp(Mnemonic.data()+8, "qnan", 4) != 0)
2033 break;
2034 Mnemonic = "pvfmk.s.up.eqnan"; // "vfmk.s.eqnan"
2035 return;
2036 case 'g': // 2 strings to match.
2037 switch (Mnemonic[8]) {
2038 default: break;
2039 case 'e': // 1 string to match.
2040 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2041 break;
2042 Mnemonic = "pvfmk.s.up.genan"; // "vfmk.s.genan"
2043 return;
2044 case 't': // 1 string to match.
2045 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2046 break;
2047 Mnemonic = "pvfmk.s.up.gtnan"; // "vfmk.s.gtnan"
2048 return;
2049 }
2050 break;
2051 case 'l': // 2 strings to match.
2052 switch (Mnemonic[8]) {
2053 default: break;
2054 case 'e': // 1 string to match.
2055 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2056 break;
2057 Mnemonic = "pvfmk.s.up.lenan"; // "vfmk.s.lenan"
2058 return;
2059 case 't': // 1 string to match.
2060 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2061 break;
2062 Mnemonic = "pvfmk.s.up.ltnan"; // "vfmk.s.ltnan"
2063 return;
2064 }
2065 break;
2066 case 'n': // 1 string to match.
2067 if (memcmp(Mnemonic.data()+8, "enan", 4) != 0)
2068 break;
2069 Mnemonic = "pvfmk.s.up.nenan"; // "vfmk.s.nenan"
2070 return;
2071 }
2072 break;
2073 case 'r': // 1 string to match.
2074 if (memcmp(Mnemonic.data()+2, "sqrt.s.nex", 10) != 0)
2075 break;
2076 Mnemonic = "pvrsqrt.up.nex"; // "vrsqrt.s.nex"
2077 return;
2078 }
2079 break;
2080 }
2081 break;
2082 case 13: // 8 strings to match.
2083 if (memcmp(Mnemonic.data()+0, "pvfmk.w.lo.", 11) != 0)
2084 break;
2085 switch (Mnemonic[11]) {
2086 default: break;
2087 case 'a': // 2 strings to match.
2088 switch (Mnemonic[12]) {
2089 default: break;
2090 case 'f': // 1 string to match.
2091 Mnemonic = "vfmk.w.af"; // "pvfmk.w.lo.af"
2092 return;
2093 case 't': // 1 string to match.
2094 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo.at"
2095 return;
2096 }
2097 break;
2098 case 'e': // 1 string to match.
2099 if (Mnemonic[12] != 'q')
2100 break;
2101 Mnemonic = "vfmk.w.eq"; // "pvfmk.w.lo.eq"
2102 return;
2103 case 'g': // 2 strings to match.
2104 switch (Mnemonic[12]) {
2105 default: break;
2106 case 'e': // 1 string to match.
2107 Mnemonic = "vfmk.w.ge"; // "pvfmk.w.lo.ge"
2108 return;
2109 case 't': // 1 string to match.
2110 Mnemonic = "vfmk.w.gt"; // "pvfmk.w.lo.gt"
2111 return;
2112 }
2113 break;
2114 case 'l': // 2 strings to match.
2115 switch (Mnemonic[12]) {
2116 default: break;
2117 case 'e': // 1 string to match.
2118 Mnemonic = "vfmk.w.le"; // "pvfmk.w.lo.le"
2119 return;
2120 case 't': // 1 string to match.
2121 Mnemonic = "vfmk.w.lt"; // "pvfmk.w.lo.lt"
2122 return;
2123 }
2124 break;
2125 case 'n': // 1 string to match.
2126 if (Mnemonic[12] != 'e')
2127 break;
2128 Mnemonic = "vfmk.w.ne"; // "pvfmk.w.lo.ne"
2129 return;
2130 }
2131 break;
2132 }
2133 break;
2134 }
2135 switch (Mnemonic.size()) {
2136 default: break;
2137 case 4: // 1 string to match.
2138 if (memcmp(Mnemonic.data()+0, "vgtl", 4) != 0)
2139 break;
2140 Mnemonic = "vgtl.zx"; // "vgtl"
2141 return;
2142 case 6: // 12 strings to match.
2143 switch (Mnemonic[0]) {
2144 default: break;
2145 case 'c': // 4 strings to match.
2146 if (memcmp(Mnemonic.data()+1, "mov.", 4) != 0)
2147 break;
2148 switch (Mnemonic[5]) {
2149 default: break;
2150 case 'd': // 1 string to match.
2151 Mnemonic = "cmov.d.at"; // "cmov.d"
2152 return;
2153 case 'l': // 1 string to match.
2154 Mnemonic = "cmov.l.at"; // "cmov.l"
2155 return;
2156 case 's': // 1 string to match.
2157 Mnemonic = "cmov.s.at"; // "cmov.s"
2158 return;
2159 case 'w': // 1 string to match.
2160 Mnemonic = "cmov.w.at"; // "cmov.w"
2161 return;
2162 }
2163 break;
2164 case 'v': // 8 strings to match.
2165 switch (Mnemonic[1]) {
2166 default: break;
2167 case 'f': // 4 strings to match.
2168 if (memcmp(Mnemonic.data()+2, "mk.", 3) != 0)
2169 break;
2170 switch (Mnemonic[5]) {
2171 default: break;
2172 case 'd': // 1 string to match.
2173 Mnemonic = "vfmk.d.at"; // "vfmk.d"
2174 return;
2175 case 'l': // 1 string to match.
2176 Mnemonic = "vfmk.l.at"; // "vfmk.l"
2177 return;
2178 case 's': // 1 string to match.
2179 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s"
2180 return;
2181 case 'w': // 1 string to match.
2182 Mnemonic = "vfmk.w.at"; // "vfmk.w"
2183 return;
2184 }
2185 break;
2186 case 'm': // 1 string to match.
2187 if (memcmp(Mnemonic.data()+2, "rg.l", 4) != 0)
2188 break;
2189 Mnemonic = "vmrg"; // "vmrg.l"
2190 return;
2191 case 'r': // 1 string to match.
2192 if (memcmp(Mnemonic.data()+2, "cp.s", 4) != 0)
2193 break;
2194 Mnemonic = "pvrcp.up"; // "vrcp.s"
2195 return;
2196 case 's': // 2 strings to match.
2197 switch (Mnemonic[2]) {
2198 default: break;
2199 case 'l': // 1 string to match.
2200 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
2201 break;
2202 Mnemonic = "pvsla.lo"; // "vsla.w"
2203 return;
2204 case 'r': // 1 string to match.
2205 if (memcmp(Mnemonic.data()+3, "a.w", 3) != 0)
2206 break;
2207 Mnemonic = "pvsra.lo"; // "vsra.w"
2208 return;
2209 }
2210 break;
2211 }
2212 break;
2213 }
2214 break;
2215 case 7: // 19 strings to match.
2216 if (Mnemonic[0] != 'v')
2217 break;
2218 switch (Mnemonic[1]) {
2219 default: break;
2220 case 'a': // 2 strings to match.
2221 if (memcmp(Mnemonic.data()+2, "dd", 2) != 0)
2222 break;
2223 switch (Mnemonic[4]) {
2224 default: break;
2225 case 's': // 1 string to match.
2226 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2227 break;
2228 Mnemonic = "pvadds.lo"; // "vadds.w"
2229 return;
2230 case 'u': // 1 string to match.
2231 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2232 break;
2233 Mnemonic = "pvaddu.lo"; // "vaddu.w"
2234 return;
2235 }
2236 break;
2237 case 'c': // 2 strings to match.
2238 if (memcmp(Mnemonic.data()+2, "mp", 2) != 0)
2239 break;
2240 switch (Mnemonic[4]) {
2241 default: break;
2242 case 's': // 1 string to match.
2243 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2244 break;
2245 Mnemonic = "pvcmps.lo"; // "vcmps.w"
2246 return;
2247 case 'u': // 1 string to match.
2248 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2249 break;
2250 Mnemonic = "pvcmpu.lo"; // "vcmpu.w"
2251 return;
2252 }
2253 break;
2254 case 'd': // 1 string to match.
2255 if (memcmp(Mnemonic.data()+2, "ivs.w", 5) != 0)
2256 break;
2257 Mnemonic = "vdivs.w.zx"; // "vdivs.w"
2258 return;
2259 case 'f': // 8 strings to match.
2260 switch (Mnemonic[2]) {
2261 default: break;
2262 case 'a': // 1 string to match.
2263 if (memcmp(Mnemonic.data()+3, "dd.s", 4) != 0)
2264 break;
2265 Mnemonic = "pvfadd.up"; // "vfadd.s"
2266 return;
2267 case 'c': // 1 string to match.
2268 if (memcmp(Mnemonic.data()+3, "mp.s", 4) != 0)
2269 break;
2270 Mnemonic = "pvfcmp.up"; // "vfcmp.s"
2271 return;
2272 case 'm': // 5 strings to match.
2273 switch (Mnemonic[3]) {
2274 default: break;
2275 case 'a': // 2 strings to match.
2276 switch (Mnemonic[4]) {
2277 default: break;
2278 case 'd': // 1 string to match.
2279 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
2280 break;
2281 Mnemonic = "pvfmad.up"; // "vfmad.s"
2282 return;
2283 case 'x': // 1 string to match.
2284 if (memcmp(Mnemonic.data()+5, ".s", 2) != 0)
2285 break;
2286 Mnemonic = "pvfmax.up"; // "vfmax.s"
2287 return;
2288 }
2289 break;
2290 case 'i': // 1 string to match.
2291 if (memcmp(Mnemonic.data()+4, "n.s", 3) != 0)
2292 break;
2293 Mnemonic = "pvfmin.up"; // "vfmin.s"
2294 return;
2295 case 's': // 1 string to match.
2296 if (memcmp(Mnemonic.data()+4, "b.s", 3) != 0)
2297 break;
2298 Mnemonic = "pvfmsb.up"; // "vfmsb.s"
2299 return;
2300 case 'u': // 1 string to match.
2301 if (memcmp(Mnemonic.data()+4, "l.s", 3) != 0)
2302 break;
2303 Mnemonic = "pvfmul.up"; // "vfmul.s"
2304 return;
2305 }
2306 break;
2307 case 's': // 1 string to match.
2308 if (memcmp(Mnemonic.data()+3, "ub.s", 4) != 0)
2309 break;
2310 Mnemonic = "pvfsub.up"; // "vfsub.s"
2311 return;
2312 }
2313 break;
2314 case 'g': // 1 string to match.
2315 if (memcmp(Mnemonic.data()+2, "tl.nc", 5) != 0)
2316 break;
2317 Mnemonic = "vgtl.zx.nc"; // "vgtl.nc"
2318 return;
2319 case 'm': // 3 strings to match.
2320 switch (Mnemonic[2]) {
2321 default: break;
2322 case 'a': // 1 string to match.
2323 if (memcmp(Mnemonic.data()+3, "xs.w", 4) != 0)
2324 break;
2325 Mnemonic = "pvmaxs.lo"; // "vmaxs.w"
2326 return;
2327 case 'i': // 1 string to match.
2328 if (memcmp(Mnemonic.data()+3, "ns.w", 4) != 0)
2329 break;
2330 Mnemonic = "pvmins.lo"; // "vmins.w"
2331 return;
2332 case 'u': // 1 string to match.
2333 if (memcmp(Mnemonic.data()+3, "ls.w", 4) != 0)
2334 break;
2335 Mnemonic = "vmuls.w.zx"; // "vmuls.w"
2336 return;
2337 }
2338 break;
2339 case 's': // 2 strings to match.
2340 if (memcmp(Mnemonic.data()+2, "ub", 2) != 0)
2341 break;
2342 switch (Mnemonic[4]) {
2343 default: break;
2344 case 's': // 1 string to match.
2345 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2346 break;
2347 Mnemonic = "pvsubs.lo"; // "vsubs.w"
2348 return;
2349 case 'u': // 1 string to match.
2350 if (memcmp(Mnemonic.data()+5, ".w", 2) != 0)
2351 break;
2352 Mnemonic = "pvsubu.lo"; // "vsubu.w"
2353 return;
2354 }
2355 break;
2356 }
2357 break;
2358 case 8: // 3 strings to match.
2359 if (Mnemonic[0] != 'v')
2360 break;
2361 switch (Mnemonic[1]) {
2362 default: break;
2363 case 'f': // 2 strings to match.
2364 if (memcmp(Mnemonic.data()+2, "nm", 2) != 0)
2365 break;
2366 switch (Mnemonic[4]) {
2367 default: break;
2368 case 'a': // 1 string to match.
2369 if (memcmp(Mnemonic.data()+5, "d.s", 3) != 0)
2370 break;
2371 Mnemonic = "pvfnmad.up"; // "vfnmad.s"
2372 return;
2373 case 's': // 1 string to match.
2374 if (memcmp(Mnemonic.data()+5, "b.s", 3) != 0)
2375 break;
2376 Mnemonic = "pvfnmsb.up"; // "vfnmsb.s"
2377 return;
2378 }
2379 break;
2380 case 'r': // 1 string to match.
2381 if (memcmp(Mnemonic.data()+2, "sqrt.s", 6) != 0)
2382 break;
2383 Mnemonic = "pvrsqrt.up"; // "vrsqrt.s"
2384 return;
2385 }
2386 break;
2387 case 9: // 10 strings to match.
2388 if (Mnemonic[0] != 'v')
2389 break;
2390 switch (Mnemonic[1]) {
2391 default: break;
2392 case 'f': // 8 strings to match.
2393 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
2394 break;
2395 switch (Mnemonic[7]) {
2396 default: break;
2397 case 'a': // 2 strings to match.
2398 switch (Mnemonic[8]) {
2399 default: break;
2400 case 'f': // 1 string to match.
2401 Mnemonic = "pvfmk.s.up.af"; // "vfmk.s.af"
2402 return;
2403 case 't': // 1 string to match.
2404 Mnemonic = "pvfmk.s.up.at"; // "vfmk.s.at"
2405 return;
2406 }
2407 break;
2408 case 'e': // 1 string to match.
2409 if (Mnemonic[8] != 'q')
2410 break;
2411 Mnemonic = "pvfmk.s.up.eq"; // "vfmk.s.eq"
2412 return;
2413 case 'g': // 2 strings to match.
2414 switch (Mnemonic[8]) {
2415 default: break;
2416 case 'e': // 1 string to match.
2417 Mnemonic = "pvfmk.s.up.ge"; // "vfmk.s.ge"
2418 return;
2419 case 't': // 1 string to match.
2420 Mnemonic = "pvfmk.s.up.gt"; // "vfmk.s.gt"
2421 return;
2422 }
2423 break;
2424 case 'l': // 2 strings to match.
2425 switch (Mnemonic[8]) {
2426 default: break;
2427 case 'e': // 1 string to match.
2428 Mnemonic = "pvfmk.s.up.le"; // "vfmk.s.le"
2429 return;
2430 case 't': // 1 string to match.
2431 Mnemonic = "pvfmk.s.up.lt"; // "vfmk.s.lt"
2432 return;
2433 }
2434 break;
2435 case 'n': // 1 string to match.
2436 if (Mnemonic[8] != 'e')
2437 break;
2438 Mnemonic = "pvfmk.s.up.ne"; // "vfmk.s.ne"
2439 return;
2440 }
2441 break;
2442 case 's': // 2 strings to match.
2443 switch (Mnemonic[2]) {
2444 default: break;
2445 case 'l': // 1 string to match.
2446 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
2447 break;
2448 Mnemonic = "pvsla.lo"; // "vsla.w.zx"
2449 return;
2450 case 'r': // 1 string to match.
2451 if (memcmp(Mnemonic.data()+3, "a.w.zx", 6) != 0)
2452 break;
2453 Mnemonic = "pvsra.lo"; // "vsra.w.zx"
2454 return;
2455 }
2456 break;
2457 }
2458 break;
2459 case 10: // 11 strings to match.
2460 switch (Mnemonic[0]) {
2461 default: break;
2462 case 'p': // 4 strings to match.
2463 if (memcmp(Mnemonic.data()+1, "vfmk.", 5) != 0)
2464 break;
2465 switch (Mnemonic[6]) {
2466 default: break;
2467 case 's': // 2 strings to match.
2468 if (Mnemonic[7] != '.')
2469 break;
2470 switch (Mnemonic[8]) {
2471 default: break;
2472 case 'l': // 1 string to match.
2473 if (Mnemonic[9] != 'o')
2474 break;
2475 Mnemonic = "pvfmk.s.lo.at"; // "pvfmk.s.lo"
2476 return;
2477 case 'u': // 1 string to match.
2478 if (Mnemonic[9] != 'p')
2479 break;
2480 Mnemonic = "pvfmk.s.up.at"; // "pvfmk.s.up"
2481 return;
2482 }
2483 break;
2484 case 'w': // 2 strings to match.
2485 if (Mnemonic[7] != '.')
2486 break;
2487 switch (Mnemonic[8]) {
2488 default: break;
2489 case 'l': // 1 string to match.
2490 if (Mnemonic[9] != 'o')
2491 break;
2492 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo"
2493 return;
2494 case 'u': // 1 string to match.
2495 if (Mnemonic[9] != 'p')
2496 break;
2497 Mnemonic = "pvfmk.w.up.at"; // "pvfmk.w.up"
2498 return;
2499 }
2500 break;
2501 }
2502 break;
2503 case 'v': // 7 strings to match.
2504 switch (Mnemonic[1]) {
2505 default: break;
2506 case 'a': // 1 string to match.
2507 if (memcmp(Mnemonic.data()+2, "dds.w.zx", 8) != 0)
2508 break;
2509 Mnemonic = "pvadds.lo"; // "vadds.w.zx"
2510 return;
2511 case 'c': // 1 string to match.
2512 if (memcmp(Mnemonic.data()+2, "mps.w.zx", 8) != 0)
2513 break;
2514 Mnemonic = "pvcmps.lo"; // "vcmps.w.zx"
2515 return;
2516 case 'f': // 2 strings to match.
2517 if (memcmp(Mnemonic.data()+2, "mk.s.n", 6) != 0)
2518 break;
2519 switch (Mnemonic[8]) {
2520 default: break;
2521 case 'a': // 1 string to match.
2522 if (Mnemonic[9] != 'n')
2523 break;
2524 Mnemonic = "pvfmk.s.up.nan"; // "vfmk.s.nan"
2525 return;
2526 case 'u': // 1 string to match.
2527 if (Mnemonic[9] != 'm')
2528 break;
2529 Mnemonic = "pvfmk.s.up.num"; // "vfmk.s.num"
2530 return;
2531 }
2532 break;
2533 case 'm': // 2 strings to match.
2534 switch (Mnemonic[2]) {
2535 default: break;
2536 case 'a': // 1 string to match.
2537 if (memcmp(Mnemonic.data()+3, "xs.w.zx", 7) != 0)
2538 break;
2539 Mnemonic = "pvmaxs.lo"; // "vmaxs.w.zx"
2540 return;
2541 case 'i': // 1 string to match.
2542 if (memcmp(Mnemonic.data()+3, "ns.w.zx", 7) != 0)
2543 break;
2544 Mnemonic = "pvmins.lo"; // "vmins.w.zx"
2545 return;
2546 }
2547 break;
2548 case 's': // 1 string to match.
2549 if (memcmp(Mnemonic.data()+2, "ubs.w.zx", 8) != 0)
2550 break;
2551 Mnemonic = "pvsubs.lo"; // "vsubs.w.zx"
2552 return;
2553 }
2554 break;
2555 }
2556 break;
2557 case 11: // 4 strings to match.
2558 if (memcmp(Mnemonic.data()+0, "pvs", 3) != 0)
2559 break;
2560 switch (Mnemonic[3]) {
2561 default: break;
2562 case 'l': // 2 strings to match.
2563 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
2564 break;
2565 switch (Mnemonic[9]) {
2566 default: break;
2567 case 's': // 1 string to match.
2568 if (Mnemonic[10] != 'x')
2569 break;
2570 Mnemonic = "vsla.w.sx"; // "pvsla.lo.sx"
2571 return;
2572 case 'z': // 1 string to match.
2573 if (Mnemonic[10] != 'x')
2574 break;
2575 Mnemonic = "pvsla.lo"; // "pvsla.lo.zx"
2576 return;
2577 }
2578 break;
2579 case 'r': // 2 strings to match.
2580 if (memcmp(Mnemonic.data()+4, "a.lo.", 5) != 0)
2581 break;
2582 switch (Mnemonic[9]) {
2583 default: break;
2584 case 's': // 1 string to match.
2585 if (Mnemonic[10] != 'x')
2586 break;
2587 Mnemonic = "vsra.w.sx"; // "pvsra.lo.sx"
2588 return;
2589 case 'z': // 1 string to match.
2590 if (Mnemonic[10] != 'x')
2591 break;
2592 Mnemonic = "pvsra.lo"; // "pvsra.lo.zx"
2593 return;
2594 }
2595 break;
2596 }
2597 break;
2598 case 12: // 17 strings to match.
2599 switch (Mnemonic[0]) {
2600 default: break;
2601 case 'p': // 10 strings to match.
2602 if (Mnemonic[1] != 'v')
2603 break;
2604 switch (Mnemonic[2]) {
2605 default: break;
2606 case 'a': // 2 strings to match.
2607 if (memcmp(Mnemonic.data()+3, "dds.lo.", 7) != 0)
2608 break;
2609 switch (Mnemonic[10]) {
2610 default: break;
2611 case 's': // 1 string to match.
2612 if (Mnemonic[11] != 'x')
2613 break;
2614 Mnemonic = "vadds.w.sx"; // "pvadds.lo.sx"
2615 return;
2616 case 'z': // 1 string to match.
2617 if (Mnemonic[11] != 'x')
2618 break;
2619 Mnemonic = "pvadds.lo"; // "pvadds.lo.zx"
2620 return;
2621 }
2622 break;
2623 case 'c': // 2 strings to match.
2624 if (memcmp(Mnemonic.data()+3, "mps.lo.", 7) != 0)
2625 break;
2626 switch (Mnemonic[10]) {
2627 default: break;
2628 case 's': // 1 string to match.
2629 if (Mnemonic[11] != 'x')
2630 break;
2631 Mnemonic = "vcmps.w.sx"; // "pvcmps.lo.sx"
2632 return;
2633 case 'z': // 1 string to match.
2634 if (Mnemonic[11] != 'x')
2635 break;
2636 Mnemonic = "pvcmps.lo"; // "pvcmps.lo.zx"
2637 return;
2638 }
2639 break;
2640 case 'm': // 4 strings to match.
2641 switch (Mnemonic[3]) {
2642 default: break;
2643 case 'a': // 2 strings to match.
2644 if (memcmp(Mnemonic.data()+4, "xs.lo.", 6) != 0)
2645 break;
2646 switch (Mnemonic[10]) {
2647 default: break;
2648 case 's': // 1 string to match.
2649 if (Mnemonic[11] != 'x')
2650 break;
2651 Mnemonic = "vmaxs.w.sx"; // "pvmaxs.lo.sx"
2652 return;
2653 case 'z': // 1 string to match.
2654 if (Mnemonic[11] != 'x')
2655 break;
2656 Mnemonic = "pvmaxs.lo"; // "pvmaxs.lo.zx"
2657 return;
2658 }
2659 break;
2660 case 'i': // 2 strings to match.
2661 if (memcmp(Mnemonic.data()+4, "ns.lo.", 6) != 0)
2662 break;
2663 switch (Mnemonic[10]) {
2664 default: break;
2665 case 's': // 1 string to match.
2666 if (Mnemonic[11] != 'x')
2667 break;
2668 Mnemonic = "vmins.w.sx"; // "pvmins.lo.sx"
2669 return;
2670 case 'z': // 1 string to match.
2671 if (Mnemonic[11] != 'x')
2672 break;
2673 Mnemonic = "pvmins.lo"; // "pvmins.lo.zx"
2674 return;
2675 }
2676 break;
2677 }
2678 break;
2679 case 's': // 2 strings to match.
2680 if (memcmp(Mnemonic.data()+3, "ubs.lo.", 7) != 0)
2681 break;
2682 switch (Mnemonic[10]) {
2683 default: break;
2684 case 's': // 1 string to match.
2685 if (Mnemonic[11] != 'x')
2686 break;
2687 Mnemonic = "vsubs.w.sx"; // "pvsubs.lo.sx"
2688 return;
2689 case 'z': // 1 string to match.
2690 if (Mnemonic[11] != 'x')
2691 break;
2692 Mnemonic = "pvsubs.lo"; // "pvsubs.lo.zx"
2693 return;
2694 }
2695 break;
2696 }
2697 break;
2698 case 'v': // 7 strings to match.
2699 switch (Mnemonic[1]) {
2700 default: break;
2701 case 'f': // 6 strings to match.
2702 if (memcmp(Mnemonic.data()+2, "mk.s.", 5) != 0)
2703 break;
2704 switch (Mnemonic[7]) {
2705 default: break;
2706 case 'e': // 1 string to match.
2707 if (memcmp(Mnemonic.data()+8, "qnan", 4) != 0)
2708 break;
2709 Mnemonic = "pvfmk.s.up.eqnan"; // "vfmk.s.eqnan"
2710 return;
2711 case 'g': // 2 strings to match.
2712 switch (Mnemonic[8]) {
2713 default: break;
2714 case 'e': // 1 string to match.
2715 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2716 break;
2717 Mnemonic = "pvfmk.s.up.genan"; // "vfmk.s.genan"
2718 return;
2719 case 't': // 1 string to match.
2720 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2721 break;
2722 Mnemonic = "pvfmk.s.up.gtnan"; // "vfmk.s.gtnan"
2723 return;
2724 }
2725 break;
2726 case 'l': // 2 strings to match.
2727 switch (Mnemonic[8]) {
2728 default: break;
2729 case 'e': // 1 string to match.
2730 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2731 break;
2732 Mnemonic = "pvfmk.s.up.lenan"; // "vfmk.s.lenan"
2733 return;
2734 case 't': // 1 string to match.
2735 if (memcmp(Mnemonic.data()+9, "nan", 3) != 0)
2736 break;
2737 Mnemonic = "pvfmk.s.up.ltnan"; // "vfmk.s.ltnan"
2738 return;
2739 }
2740 break;
2741 case 'n': // 1 string to match.
2742 if (memcmp(Mnemonic.data()+8, "enan", 4) != 0)
2743 break;
2744 Mnemonic = "pvfmk.s.up.nenan"; // "vfmk.s.nenan"
2745 return;
2746 }
2747 break;
2748 case 'r': // 1 string to match.
2749 if (memcmp(Mnemonic.data()+2, "sqrt.s.nex", 10) != 0)
2750 break;
2751 Mnemonic = "pvrsqrt.up.nex"; // "vrsqrt.s.nex"
2752 return;
2753 }
2754 break;
2755 }
2756 break;
2757 case 13: // 8 strings to match.
2758 if (memcmp(Mnemonic.data()+0, "pvfmk.w.lo.", 11) != 0)
2759 break;
2760 switch (Mnemonic[11]) {
2761 default: break;
2762 case 'a': // 2 strings to match.
2763 switch (Mnemonic[12]) {
2764 default: break;
2765 case 'f': // 1 string to match.
2766 Mnemonic = "vfmk.w.af"; // "pvfmk.w.lo.af"
2767 return;
2768 case 't': // 1 string to match.
2769 Mnemonic = "vfmk.w.at"; // "pvfmk.w.lo.at"
2770 return;
2771 }
2772 break;
2773 case 'e': // 1 string to match.
2774 if (Mnemonic[12] != 'q')
2775 break;
2776 Mnemonic = "vfmk.w.eq"; // "pvfmk.w.lo.eq"
2777 return;
2778 case 'g': // 2 strings to match.
2779 switch (Mnemonic[12]) {
2780 default: break;
2781 case 'e': // 1 string to match.
2782 Mnemonic = "vfmk.w.ge"; // "pvfmk.w.lo.ge"
2783 return;
2784 case 't': // 1 string to match.
2785 Mnemonic = "vfmk.w.gt"; // "pvfmk.w.lo.gt"
2786 return;
2787 }
2788 break;
2789 case 'l': // 2 strings to match.
2790 switch (Mnemonic[12]) {
2791 default: break;
2792 case 'e': // 1 string to match.
2793 Mnemonic = "vfmk.w.le"; // "pvfmk.w.lo.le"
2794 return;
2795 case 't': // 1 string to match.
2796 Mnemonic = "vfmk.w.lt"; // "pvfmk.w.lo.lt"
2797 return;
2798 }
2799 break;
2800 case 'n': // 1 string to match.
2801 if (Mnemonic[12] != 'e')
2802 break;
2803 Mnemonic = "vfmk.w.ne"; // "pvfmk.w.lo.ne"
2804 return;
2805 }
2806 break;
2807 }
2808}
2809
2810enum {
2811 Tie0_1_1,
2812};
2813
2814static const uint8_t TiedAsmOperandTable[][3] = {
2815 /* Tie0_1_1 */ { 0, 1, 1 },
2816};
2817
2818namespace {
2819enum OperatorConversionKind {
2820 CVT_Done,
2821 CVT_Reg,
2822 CVT_Tied,
2823 CVT_95_Reg,
2824 CVT_95_addMImmOperands,
2825 CVT_95_addSImm7Operands,
2826 CVT_95_addMEMriOperands,
2827 CVT_95_addUImm0to2Operands,
2828 CVT_95_addMEMziOperands,
2829 CVT_95_addCCOpOperands,
2830 CVT_95_addImmOperands,
2831 CVT_95_addZeroOperands,
2832 CVT_95_addMEMriiOperands,
2833 CVT_95_addMEMrriOperands,
2834 CVT_95_addMEMziiOperands,
2835 CVT_95_addMEMzriOperands,
2836 CVT_95_addUImm1Operands,
2837 CVT_95_addRDOpOperands,
2838 CVT_95_addUImm3Operands,
2839 CVT_95_addUImm2Operands,
2840 CVT_95_addUImm6Operands,
2841 CVT_95_addUImm7Operands,
2842 CVT_95_addUImm4Operands,
2843 CVT_NUM_CONVERTERS
2844};
2845
2846enum InstructionConversionKind {
2847 Convert__Reg1_0__Reg1_1__Reg1_2,
2848 Convert__Reg1_0__Reg1_1__MImm1_2,
2849 Convert__Reg1_0__Reg1_2__SImm71_1,
2850 Convert__Reg1_0__SImm71_1__MImm1_2,
2851 Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1,
2852 Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1,
2853 Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1,
2854 Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1,
2855 Convert__CCOp1_0__Reg1_2__MEMri2_3,
2856 Convert__CCOp1_0__Reg1_2__MEMzi2_3,
2857 Convert__CCOp1_0__SImm71_2__MEMri2_3,
2858 Convert__CCOp1_0__SImm71_2__MEMzi2_3,
2859 Convert__MEMri2_0,
2860 Convert__MEMzi2_0,
2861 Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4,
2862 Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4,
2863 Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4,
2864 Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4,
2865 Convert__Imm1_0,
2866 Convert__Reg1_0__Reg1_1,
2867 Convert__Reg1_0__MImm1_1,
2868 Convert__Reg1_0__MEMrii3_1,
2869 Convert__Reg1_0__MEMrri3_1,
2870 Convert__Reg1_0__MEMzii3_1,
2871 Convert__Reg1_0__MEMzri3_1,
2872 Convert__Reg1_0__Reg1_1__UImm11_2,
2873 Convert__Reg1_0__MImm1_1__UImm11_2,
2874 Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1,
2875 Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1,
2876 Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1,
2877 Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1,
2878 Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1,
2879 Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1,
2880 Convert__Reg1_0__SImm71_1__Reg1_2,
2881 Convert__Reg1_0__SImm71_1,
2882 Convert__Reg1_1__RDOp1_0__Reg1_2,
2883 Convert__Reg1_1__RDOp1_0__SImm71_2,
2884 Convert__UImm31_0,
2885 Convert_NoOperands,
2886 Convert__UImm21_0,
2887 Convert__Reg1_0__Reg1_1__UImm31_2,
2888 Convert__Reg1_0__SImm71_1__UImm31_2,
2889 Convert__Reg1_0__Reg1_1__Zero1_2,
2890 Convert__Reg1_0__SImm71_1__Zero1_2,
2891 Convert__Reg1_0,
2892 Convert__UImm61_0,
2893 Convert__Reg1_0__MEMri2_1,
2894 Convert__Reg1_0__MEMzi2_1,
2895 Convert__Reg1_0__Reg1_2__Reg1_4,
2896 Convert__Reg1_0__Reg1_2__MImm1_4,
2897 Convert__Reg1_0__UImm71_2__Reg1_4,
2898 Convert__Reg1_0__UImm71_2__MImm1_4,
2899 Convert__SImm71_0,
2900 Convert__Reg1_0__UImm21_1__Reg1_2,
2901 Convert__Reg1_0__UImm21_1__MImm1_2,
2902 Convert__Reg1_0__Reg1_1__Reg1_3,
2903 Convert__Reg1_0__Reg1_1__UImm71_3,
2904 Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1,
2905 Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1,
2906 Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1,
2907 Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1,
2908 Convert__MEMrii3_0,
2909 Convert__MEMrri3_0,
2910 Convert__MEMzii3_0,
2911 Convert__MEMzri3_0,
2912 Convert__Reg1_0__Zero1_1,
2913 Convert__SImm71_0__Reg1_1,
2914 Convert__SImm71_0__Zero1_1,
2915 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2916 Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3,
2917 Convert__Reg1_0__MImm1_1__Reg1_2,
2918 Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3,
2919 Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3,
2920 Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3,
2921 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4,
2922 Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4,
2923 Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4,
2924 Convert__Reg1_1__CCOp1_0__Reg1_2,
2925 Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3,
2926 Convert__Reg1_0__Reg1_1__UImm71_2,
2927 Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3,
2928 Convert__Reg1_1__Reg1_2__Reg1_0,
2929 Convert__Reg1_1__Zero1_2__Reg1_0,
2930 Convert__SImm71_1__Reg1_2__Reg1_0,
2931 Convert__SImm71_1__Zero1_2__Reg1_0,
2932 Convert__MEMri2_1__Reg1_0,
2933 Convert__MEMzi2_1__Reg1_0,
2934 Convert__Reg1_0__MImm1_1__UImm71_2,
2935 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
2936 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2,
2937 Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2,
2938 Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2,
2939 Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2,
2940 Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2,
2941 Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2,
2942 Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2,
2943 Convert__MEMrii3_1__Reg1_0,
2944 Convert__MEMrri3_1__Reg1_0,
2945 Convert__MEMzii3_1__Reg1_0,
2946 Convert__MEMzri3_1__Reg1_0,
2947 Convert__Reg1_0__Reg1_1__UImm21_2,
2948 Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1,
2949 Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1,
2950 Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1,
2951 Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1,
2952 Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1,
2953 Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1,
2954 Convert__Reg1_0__Reg1_1__SImm71_2,
2955 Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3,
2956 Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3,
2957 Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3,
2958 Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4,
2959 Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4,
2960 Convert__Reg1_0__UImm71_1__Reg1_2,
2961 Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3,
2962 Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0,
2963 Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0,
2964 Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0,
2965 Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0,
2966 Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4,
2967 Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4,
2968 Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4,
2969 Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4,
2970 Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3,
2971 Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3,
2972 Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3,
2973 Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4,
2974 Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4,
2975 Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4,
2976 Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3,
2977 Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5,
2978 Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5,
2979 Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6,
2980 Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6,
2981 Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3,
2982 Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3,
2983 Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3,
2984 Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3,
2985 CVT_NUM_SIGNATURES
2986};
2987
2988} // end anonymous namespace
2989
2990static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
2991 // Convert__Reg1_0__Reg1_1__Reg1_2
2992 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
2993 // Convert__Reg1_0__Reg1_1__MImm1_2
2994 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMImmOperands, 3, CVT_Done },
2995 // Convert__Reg1_0__Reg1_2__SImm71_1
2996 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addSImm7Operands, 2, CVT_Done },
2997 // Convert__Reg1_0__SImm71_1__MImm1_2
2998 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addMImmOperands, 3, CVT_Done },
2999 // Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1
3000 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3001 // Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1
3002 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm0to2Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3003 // Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1
3004 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3005 // Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1
3006 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm0to2Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3007 // Convert__CCOp1_0__Reg1_2__MEMri2_3
3008 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addMEMriOperands, 4, CVT_Done },
3009 // Convert__CCOp1_0__Reg1_2__MEMzi2_3
3010 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addMEMziOperands, 4, CVT_Done },
3011 // Convert__CCOp1_0__SImm71_2__MEMri2_3
3012 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addMEMriOperands, 4, CVT_Done },
3013 // Convert__CCOp1_0__SImm71_2__MEMzi2_3
3014 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addMEMziOperands, 4, CVT_Done },
3015 // Convert__MEMri2_0
3016 { CVT_95_addMEMriOperands, 1, CVT_Done },
3017 // Convert__MEMzi2_0
3018 { CVT_95_addMEMziOperands, 1, CVT_Done },
3019 // Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4
3020 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
3021 // Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4
3022 { CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
3023 // Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4
3024 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
3025 // Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4
3026 { CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
3027 // Convert__Imm1_0
3028 { CVT_95_addImmOperands, 1, CVT_Done },
3029 // Convert__Reg1_0__Reg1_1
3030 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
3031 // Convert__Reg1_0__MImm1_1
3032 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Done },
3033 // Convert__Reg1_0__MEMrii3_1
3034 { CVT_95_Reg, 1, CVT_95_addMEMriiOperands, 2, CVT_Done },
3035 // Convert__Reg1_0__MEMrri3_1
3036 { CVT_95_Reg, 1, CVT_95_addMEMrriOperands, 2, CVT_Done },
3037 // Convert__Reg1_0__MEMzii3_1
3038 { CVT_95_Reg, 1, CVT_95_addMEMziiOperands, 2, CVT_Done },
3039 // Convert__Reg1_0__MEMzri3_1
3040 { CVT_95_Reg, 1, CVT_95_addMEMzriOperands, 2, CVT_Done },
3041 // Convert__Reg1_0__Reg1_1__UImm11_2
3042 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm1Operands, 3, CVT_Done },
3043 // Convert__Reg1_0__MImm1_1__UImm11_2
3044 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Done },
3045 // Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1
3046 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addSImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3047 // Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1
3048 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addSImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3049 // Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1
3050 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3051 // Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1
3052 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3053 // Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1
3054 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 4, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3055 // Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1
3056 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_addSImm7Operands, 4, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3057 // Convert__Reg1_0__SImm71_1__Reg1_2
3058 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_Done },
3059 // Convert__Reg1_0__SImm71_1
3060 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_Done },
3061 // Convert__Reg1_1__RDOp1_0__Reg1_2
3062 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_Reg, 3, CVT_Done },
3063 // Convert__Reg1_1__RDOp1_0__SImm71_2
3064 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_addSImm7Operands, 3, CVT_Done },
3065 // Convert__UImm31_0
3066 { CVT_95_addUImm3Operands, 1, CVT_Done },
3067 // Convert_NoOperands
3068 { CVT_Done },
3069 // Convert__UImm21_0
3070 { CVT_95_addUImm2Operands, 1, CVT_Done },
3071 // Convert__Reg1_0__Reg1_1__UImm31_2
3072 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_Done },
3073 // Convert__Reg1_0__SImm71_1__UImm31_2
3074 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addUImm3Operands, 3, CVT_Done },
3075 // Convert__Reg1_0__Reg1_1__Zero1_2
3076 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_Done },
3077 // Convert__Reg1_0__SImm71_1__Zero1_2
3078 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_Done },
3079 // Convert__Reg1_0
3080 { CVT_95_Reg, 1, CVT_Done },
3081 // Convert__UImm61_0
3082 { CVT_95_addUImm6Operands, 1, CVT_Done },
3083 // Convert__Reg1_0__MEMri2_1
3084 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_Done },
3085 // Convert__Reg1_0__MEMzi2_1
3086 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_Done },
3087 // Convert__Reg1_0__Reg1_2__Reg1_4
3088 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3089 // Convert__Reg1_0__Reg1_2__MImm1_4
3090 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMImmOperands, 5, CVT_Done },
3091 // Convert__Reg1_0__UImm71_2__Reg1_4
3092 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 3, CVT_95_Reg, 5, CVT_Done },
3093 // Convert__Reg1_0__UImm71_2__MImm1_4
3094 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 3, CVT_95_addMImmOperands, 5, CVT_Done },
3095 // Convert__SImm71_0
3096 { CVT_95_addSImm7Operands, 1, CVT_Done },
3097 // Convert__Reg1_0__UImm21_1__Reg1_2
3098 { CVT_95_Reg, 1, CVT_95_addUImm2Operands, 2, CVT_95_Reg, 3, CVT_Done },
3099 // Convert__Reg1_0__UImm21_1__MImm1_2
3100 { CVT_95_Reg, 1, CVT_95_addUImm2Operands, 2, CVT_95_addMImmOperands, 3, CVT_Done },
3101 // Convert__Reg1_0__Reg1_1__Reg1_3
3102 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Done },
3103 // Convert__Reg1_0__Reg1_1__UImm71_3
3104 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 4, CVT_Done },
3105 // Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1
3106 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3107 // Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1
3108 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3109 // Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1
3110 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3111 // Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1
3112 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addMImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3113 // Convert__MEMrii3_0
3114 { CVT_95_addMEMriiOperands, 1, CVT_Done },
3115 // Convert__MEMrri3_0
3116 { CVT_95_addMEMrriOperands, 1, CVT_Done },
3117 // Convert__MEMzii3_0
3118 { CVT_95_addMEMziiOperands, 1, CVT_Done },
3119 // Convert__MEMzri3_0
3120 { CVT_95_addMEMzriOperands, 1, CVT_Done },
3121 // Convert__Reg1_0__Zero1_1
3122 { CVT_95_Reg, 1, CVT_95_addZeroOperands, 2, CVT_Done },
3123 // Convert__SImm71_0__Reg1_1
3124 { CVT_95_addSImm7Operands, 1, CVT_95_Reg, 2, CVT_Done },
3125 // Convert__SImm71_0__Zero1_1
3126 { CVT_95_addSImm7Operands, 1, CVT_95_addZeroOperands, 2, CVT_Done },
3127 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
3128 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3129 // Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3
3130 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3131 // Convert__Reg1_0__MImm1_1__Reg1_2
3132 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_Done },
3133 // Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3
3134 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3135 // Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3
3136 { CVT_95_Reg, 2, CVT_95_addRDOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3137 // Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3
3138 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_Done },
3139 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4
3140 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
3141 // Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4
3142 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
3143 // Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4
3144 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
3145 // Convert__Reg1_1__CCOp1_0__Reg1_2
3146 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_Done },
3147 // Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3
3148 { CVT_95_Reg, 2, CVT_95_addCCOpOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3149 // Convert__Reg1_0__Reg1_1__UImm71_2
3150 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
3151 // Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3
3152 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_95_Reg, 4, CVT_Done },
3153 // Convert__Reg1_1__Reg1_2__Reg1_0
3154 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Done },
3155 // Convert__Reg1_1__Zero1_2__Reg1_0
3156 { CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_Done },
3157 // Convert__SImm71_1__Reg1_2__Reg1_0
3158 { CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Done },
3159 // Convert__SImm71_1__Zero1_2__Reg1_0
3160 { CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_Done },
3161 // Convert__MEMri2_1__Reg1_0
3162 { CVT_95_addMEMriOperands, 2, CVT_95_Reg, 1, CVT_Done },
3163 // Convert__MEMzi2_1__Reg1_0
3164 { CVT_95_addMEMziOperands, 2, CVT_95_Reg, 1, CVT_Done },
3165 // Convert__Reg1_0__MImm1_1__UImm71_2
3166 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
3167 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
3168 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3169 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2
3170 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
3171 // Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2
3172 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMImmOperands, 2, CVT_95_Reg, 3, CVT_Done },
3173 // Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2
3174 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMImmOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Done },
3175 // Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2
3176 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_Done },
3177 // Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2
3178 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addUImm7Operands, 3, CVT_Done },
3179 // Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2
3180 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_Done },
3181 // Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2
3182 { CVT_95_Reg, 1, CVT_95_addMImmOperands, 2, CVT_Tied, Tie0_1_1, CVT_95_addUImm7Operands, 3, CVT_Done },
3183 // Convert__MEMrii3_1__Reg1_0
3184 { CVT_95_addMEMriiOperands, 2, CVT_95_Reg, 1, CVT_Done },
3185 // Convert__MEMrri3_1__Reg1_0
3186 { CVT_95_addMEMrriOperands, 2, CVT_95_Reg, 1, CVT_Done },
3187 // Convert__MEMzii3_1__Reg1_0
3188 { CVT_95_addMEMziiOperands, 2, CVT_95_Reg, 1, CVT_Done },
3189 // Convert__MEMzri3_1__Reg1_0
3190 { CVT_95_addMEMzriOperands, 2, CVT_95_Reg, 1, CVT_Done },
3191 // Convert__Reg1_0__Reg1_1__UImm21_2
3192 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm2Operands, 3, CVT_Done },
3193 // Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1
3194 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3195 // Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1
3196 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm7Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3197 // Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1
3198 { CVT_95_Reg, 1, CVT_95_addMEMriOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3199 // Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1
3200 { CVT_95_Reg, 1, CVT_95_addMEMziOperands, 2, CVT_95_addUImm1Operands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3201 // Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1
3202 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3203 // Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1
3204 { CVT_95_Reg, 1, CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_Tied, Tie0_1_1, CVT_Done },
3205 // Convert__Reg1_0__Reg1_1__SImm71_2
3206 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_Done },
3207 // Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3
3208 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addSImm7Operands, 4, CVT_Done },
3209 // Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3
3210 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_Done },
3211 // Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3
3212 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_Done },
3213 // Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4
3214 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 5, CVT_Done },
3215 // Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4
3216 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 5, CVT_Done },
3217 // Convert__Reg1_0__UImm71_1__Reg1_2
3218 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 2, CVT_95_Reg, 3, CVT_Done },
3219 // Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3
3220 { CVT_95_Reg, 1, CVT_95_addUImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3221 // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0
3222 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3223 // Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0
3224 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_Done },
3225 // Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0
3226 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3227 // Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0
3228 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_Done },
3229 // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4
3230 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
3231 // Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4
3232 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
3233 // Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4
3234 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
3235 // Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4
3236 { CVT_95_Reg, 2, CVT_95_addSImm7Operands, 3, CVT_95_addZeroOperands, 4, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done },
3237 // Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3
3238 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMImmOperands, 4, CVT_Done },
3239 // Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3
3240 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_Reg, 4, CVT_Done },
3241 // Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3
3242 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_addMImmOperands, 4, CVT_Done },
3243 // Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4
3244 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMImmOperands, 4, CVT_95_Reg, 5, CVT_Done },
3245 // Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4
3246 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done },
3247 // Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4
3248 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addUImm3Operands, 3, CVT_95_addMImmOperands, 4, CVT_95_Reg, 5, CVT_Done },
3249 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3
3250 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addUImm4Operands, 4, CVT_Done },
3251 // Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5
3252 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_Done },
3253 // Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5
3254 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addUImm7Operands, 6, CVT_Done },
3255 // Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6
3256 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3257 // Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6
3258 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addUImm7Operands, 6, CVT_95_Reg, 7, CVT_Done },
3259 // Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3
3260 { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
3261 // Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3
3262 { CVT_95_Reg, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
3263 // Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3
3264 { CVT_95_addSImm7Operands, 2, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
3265 // Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3
3266 { CVT_95_addSImm7Operands, 2, CVT_95_addZeroOperands, 3, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done },
3267};
3268
3269void VEAsmParser::
3270convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
3271 const OperandVector &Operands) {
3272 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
3273 const uint8_t *Converter = ConversionTable[Kind];
3274 Inst.setOpcode(Opcode);
3275 for (const uint8_t *p = Converter; *p; p += 2) {
3276 unsigned OpIdx = *(p + 1);
3277 switch (*p) {
3278 default: llvm_unreachable("invalid conversion entry!");
3279 case CVT_Reg:
3280 static_cast<VEOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
3281 break;
3282 case CVT_Tied: {
3283 assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) -
3284 std::begin(TiedAsmOperandTable)) &&
3285 "Tied operand not found");
3286 unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0];
3287 if (TiedResOpnd != (uint8_t)-1)
3288 Inst.addOperand(Inst.getOperand(TiedResOpnd));
3289 break;
3290 }
3291 case CVT_95_Reg:
3292 static_cast<VEOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
3293 break;
3294 case CVT_95_addMImmOperands:
3295 static_cast<VEOperand &>(*Operands[OpIdx]).addMImmOperands(Inst, 1);
3296 break;
3297 case CVT_95_addSImm7Operands:
3298 static_cast<VEOperand &>(*Operands[OpIdx]).addSImm7Operands(Inst, 1);
3299 break;
3300 case CVT_95_addMEMriOperands:
3301 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
3302 break;
3303 case CVT_95_addUImm0to2Operands:
3304 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm0to2Operands(Inst, 1);
3305 break;
3306 case CVT_95_addMEMziOperands:
3307 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMziOperands(Inst, 2);
3308 break;
3309 case CVT_95_addCCOpOperands:
3310 static_cast<VEOperand &>(*Operands[OpIdx]).addCCOpOperands(Inst, 1);
3311 break;
3312 case CVT_95_addImmOperands:
3313 static_cast<VEOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
3314 break;
3315 case CVT_95_addZeroOperands:
3316 static_cast<VEOperand &>(*Operands[OpIdx]).addZeroOperands(Inst, 1);
3317 break;
3318 case CVT_95_addMEMriiOperands:
3319 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMriiOperands(Inst, 3);
3320 break;
3321 case CVT_95_addMEMrriOperands:
3322 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMrriOperands(Inst, 3);
3323 break;
3324 case CVT_95_addMEMziiOperands:
3325 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMziiOperands(Inst, 3);
3326 break;
3327 case CVT_95_addMEMzriOperands:
3328 static_cast<VEOperand &>(*Operands[OpIdx]).addMEMzriOperands(Inst, 3);
3329 break;
3330 case CVT_95_addUImm1Operands:
3331 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm1Operands(Inst, 1);
3332 break;
3333 case CVT_95_addRDOpOperands:
3334 static_cast<VEOperand &>(*Operands[OpIdx]).addRDOpOperands(Inst, 1);
3335 break;
3336 case CVT_95_addUImm3Operands:
3337 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm3Operands(Inst, 1);
3338 break;
3339 case CVT_95_addUImm2Operands:
3340 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm2Operands(Inst, 1);
3341 break;
3342 case CVT_95_addUImm6Operands:
3343 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm6Operands(Inst, 1);
3344 break;
3345 case CVT_95_addUImm7Operands:
3346 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm7Operands(Inst, 1);
3347 break;
3348 case CVT_95_addUImm4Operands:
3349 static_cast<VEOperand &>(*Operands[OpIdx]).addUImm4Operands(Inst, 1);
3350 break;
3351 }
3352 }
3353}
3354
3355void VEAsmParser::
3356convertToMapAndConstraints(unsigned Kind,
3357 const OperandVector &Operands) {
3358 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
3359 unsigned NumMCOperands = 0;
3360 const uint8_t *Converter = ConversionTable[Kind];
3361 for (const uint8_t *p = Converter; *p; p += 2) {
3362 switch (*p) {
3363 default: llvm_unreachable("invalid conversion entry!");
3364 case CVT_Reg:
3365 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3366 Operands[*(p + 1)]->setConstraint("r");
3367 ++NumMCOperands;
3368 break;
3369 case CVT_Tied:
3370 ++NumMCOperands;
3371 break;
3372 case CVT_95_Reg:
3373 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3374 Operands[*(p + 1)]->setConstraint("r");
3375 NumMCOperands += 1;
3376 break;
3377 case CVT_95_addMImmOperands:
3378 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3379 Operands[*(p + 1)]->setConstraint("m");
3380 NumMCOperands += 1;
3381 break;
3382 case CVT_95_addSImm7Operands:
3383 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3384 Operands[*(p + 1)]->setConstraint("m");
3385 NumMCOperands += 1;
3386 break;
3387 case CVT_95_addMEMriOperands:
3388 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3389 Operands[*(p + 1)]->setConstraint("m");
3390 NumMCOperands += 2;
3391 break;
3392 case CVT_95_addUImm0to2Operands:
3393 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3394 Operands[*(p + 1)]->setConstraint("m");
3395 NumMCOperands += 1;
3396 break;
3397 case CVT_95_addMEMziOperands:
3398 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3399 Operands[*(p + 1)]->setConstraint("m");
3400 NumMCOperands += 2;
3401 break;
3402 case CVT_95_addCCOpOperands:
3403 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3404 Operands[*(p + 1)]->setConstraint("m");
3405 NumMCOperands += 1;
3406 break;
3407 case CVT_95_addImmOperands:
3408 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3409 Operands[*(p + 1)]->setConstraint("m");
3410 NumMCOperands += 1;
3411 break;
3412 case CVT_95_addZeroOperands:
3413 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3414 Operands[*(p + 1)]->setConstraint("m");
3415 NumMCOperands += 1;
3416 break;
3417 case CVT_95_addMEMriiOperands:
3418 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3419 Operands[*(p + 1)]->setConstraint("m");
3420 NumMCOperands += 3;
3421 break;
3422 case CVT_95_addMEMrriOperands:
3423 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3424 Operands[*(p + 1)]->setConstraint("m");
3425 NumMCOperands += 3;
3426 break;
3427 case CVT_95_addMEMziiOperands:
3428 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3429 Operands[*(p + 1)]->setConstraint("m");
3430 NumMCOperands += 3;
3431 break;
3432 case CVT_95_addMEMzriOperands:
3433 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3434 Operands[*(p + 1)]->setConstraint("m");
3435 NumMCOperands += 3;
3436 break;
3437 case CVT_95_addUImm1Operands:
3438 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3439 Operands[*(p + 1)]->setConstraint("m");
3440 NumMCOperands += 1;
3441 break;
3442 case CVT_95_addRDOpOperands:
3443 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3444 Operands[*(p + 1)]->setConstraint("m");
3445 NumMCOperands += 1;
3446 break;
3447 case CVT_95_addUImm3Operands:
3448 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3449 Operands[*(p + 1)]->setConstraint("m");
3450 NumMCOperands += 1;
3451 break;
3452 case CVT_95_addUImm2Operands:
3453 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3454 Operands[*(p + 1)]->setConstraint("m");
3455 NumMCOperands += 1;
3456 break;
3457 case CVT_95_addUImm6Operands:
3458 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3459 Operands[*(p + 1)]->setConstraint("m");
3460 NumMCOperands += 1;
3461 break;
3462 case CVT_95_addUImm7Operands:
3463 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3464 Operands[*(p + 1)]->setConstraint("m");
3465 NumMCOperands += 1;
3466 break;
3467 case CVT_95_addUImm4Operands:
3468 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
3469 Operands[*(p + 1)]->setConstraint("m");
3470 NumMCOperands += 1;
3471 break;
3472 }
3473 }
3474}
3475
3476namespace {
3477
3478/// MatchClassKind - The kinds of classes which participate in
3479/// instruction matching.
3480enum MatchClassKind {
3481 InvalidMatchClass = 0,
3482 OptionalMatchClass = 1,
3483 MCK__40_, // '('
3484 MCK__41_, // ')'
3485 MCK__DOT_d, // '.d'
3486 MCK__DOT_d_DOT_nt, // '.d.nt'
3487 MCK__DOT_d_DOT_t, // '.d.t'
3488 MCK__DOT_l, // '.l'
3489 MCK__DOT_l_DOT_nt, // '.l.nt'
3490 MCK__DOT_l_DOT_t, // '.l.t'
3491 MCK__DOT_s, // '.s'
3492 MCK__DOT_s_DOT_nt, // '.s.nt'
3493 MCK__DOT_s_DOT_t, // '.s.t'
3494 MCK__DOT_w, // '.w'
3495 MCK__DOT_w_DOT_nt, // '.w.nt'
3496 MCK__DOT_w_DOT_t, // '.w.t'
3497 MCK_LAST_TOKEN = MCK__DOT_w_DOT_t,
3498 MCK_VLS, // register class 'VLS'
3499 MCK_Reg9, // derived register class
3500 MCK_VM512, // register class 'VM512'
3501 MCK_VM, // register class 'VM'
3502 MCK_MISC, // register class 'MISC'
3503 MCK_F128, // register class 'F128'
3504 MCK_F32, // register class 'F32'
3505 MCK_I32, // register class 'I32'
3506 MCK_I64, // register class 'I64'
3507 MCK_V64, // register class 'V64'
3508 MCK_LAST_REGISTER = MCK_V64,
3509 MCK_CCOp, // user defined class 'CCOpAsmOperand'
3510 MCK_Imm, // user defined class 'ImmAsmOperand'
3511 MCK_MImm, // user defined class 'MImmAsmOperand'
3512 MCK_RDOp, // user defined class 'RDOpAsmOperand'
3513 MCK_SImm7, // user defined class 'SImm7AsmOperand'
3514 MCK_UImm0to2, // user defined class 'UImm0to2AsmOperand'
3515 MCK_UImm1, // user defined class 'UImm1AsmOperand'
3516 MCK_UImm2, // user defined class 'UImm2AsmOperand'
3517 MCK_UImm3, // user defined class 'UImm3AsmOperand'
3518 MCK_UImm4, // user defined class 'UImm4AsmOperand'
3519 MCK_UImm6, // user defined class 'UImm6AsmOperand'
3520 MCK_UImm7, // user defined class 'UImm7AsmOperand'
3521 MCK_MEMri, // user defined class 'VEMEMriAsmOperand'
3522 MCK_MEMrii, // user defined class 'VEMEMriiAsmOperand'
3523 MCK_MEMrri, // user defined class 'VEMEMrriAsmOperand'
3524 MCK_MEMzi, // user defined class 'VEMEMziAsmOperand'
3525 MCK_MEMzii, // user defined class 'VEMEMziiAsmOperand'
3526 MCK_MEMzri, // user defined class 'VEMEMzriAsmOperand'
3527 MCK_Zero, // user defined class 'ZeroAsmOperand'
3528 NumMatchClassKinds
3529};
3530
3531} // end anonymous namespace
3532
3533static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
3534 return MCTargetAsmParser::Match_InvalidOperand;
3535}
3536
3537static MatchClassKind matchTokenString(StringRef Name) {
3538 switch (Name.size()) {
3539 default: break;
3540 case 1: // 2 strings to match.
3541 switch (Name[0]) {
3542 default: break;
3543 case '(': // 1 string to match.
3544 return MCK__40_; // "("
3545 case ')': // 1 string to match.
3546 return MCK__41_; // ")"
3547 }
3548 break;
3549 case 2: // 4 strings to match.
3550 if (Name[0] != '.')
3551 break;
3552 switch (Name[1]) {
3553 default: break;
3554 case 'd': // 1 string to match.
3555 return MCK__DOT_d; // ".d"
3556 case 'l': // 1 string to match.
3557 return MCK__DOT_l; // ".l"
3558 case 's': // 1 string to match.
3559 return MCK__DOT_s; // ".s"
3560 case 'w': // 1 string to match.
3561 return MCK__DOT_w; // ".w"
3562 }
3563 break;
3564 case 4: // 4 strings to match.
3565 if (Name[0] != '.')
3566 break;
3567 switch (Name[1]) {
3568 default: break;
3569 case 'd': // 1 string to match.
3570 if (memcmp(Name.data()+2, ".t", 2) != 0)
3571 break;
3572 return MCK__DOT_d_DOT_t; // ".d.t"
3573 case 'l': // 1 string to match.
3574 if (memcmp(Name.data()+2, ".t", 2) != 0)
3575 break;
3576 return MCK__DOT_l_DOT_t; // ".l.t"
3577 case 's': // 1 string to match.
3578 if (memcmp(Name.data()+2, ".t", 2) != 0)
3579 break;
3580 return MCK__DOT_s_DOT_t; // ".s.t"
3581 case 'w': // 1 string to match.
3582 if (memcmp(Name.data()+2, ".t", 2) != 0)
3583 break;
3584 return MCK__DOT_w_DOT_t; // ".w.t"
3585 }
3586 break;
3587 case 5: // 4 strings to match.
3588 if (Name[0] != '.')
3589 break;
3590 switch (Name[1]) {
3591 default: break;
3592 case 'd': // 1 string to match.
3593 if (memcmp(Name.data()+2, ".nt", 3) != 0)
3594 break;
3595 return MCK__DOT_d_DOT_nt; // ".d.nt"
3596 case 'l': // 1 string to match.
3597 if (memcmp(Name.data()+2, ".nt", 3) != 0)
3598 break;
3599 return MCK__DOT_l_DOT_nt; // ".l.nt"
3600 case 's': // 1 string to match.
3601 if (memcmp(Name.data()+2, ".nt", 3) != 0)
3602 break;
3603 return MCK__DOT_s_DOT_nt; // ".s.nt"
3604 case 'w': // 1 string to match.
3605 if (memcmp(Name.data()+2, ".nt", 3) != 0)
3606 break;
3607 return MCK__DOT_w_DOT_nt; // ".w.nt"
3608 }
3609 break;
3610 }
3611 return InvalidMatchClass;
3612}
3613
3614/// isSubclass - Compute whether \p A is a subclass of \p B.
3615static bool isSubclass(MatchClassKind A, MatchClassKind B) {
3616 if (A == B)
3617 return true;
3618
3619 switch (A) {
3620 default:
3621 return false;
3622
3623 case MCK_Reg9:
3624 return B == MCK_VM512;
3625 }
3626}
3627
3628static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
3629 VEOperand &Operand = (VEOperand &)GOp;
3630 if (Kind == InvalidMatchClass)
3631 return MCTargetAsmParser::Match_InvalidOperand;
3632
3633 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
3634 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
3635 MCTargetAsmParser::Match_Success :
3636 MCTargetAsmParser::Match_InvalidOperand;
3637
3638 switch (Kind) {
3639 default: break;
3640 // 'CCOp' class
3641 case MCK_CCOp: {
3642 DiagnosticPredicate DP(Operand.isCCOp());
3643 if (DP.isMatch())
3644 return MCTargetAsmParser::Match_Success;
3645 break;
3646 }
3647 // 'Imm' class
3648 case MCK_Imm: {
3649 DiagnosticPredicate DP(Operand.isImm());
3650 if (DP.isMatch())
3651 return MCTargetAsmParser::Match_Success;
3652 break;
3653 }
3654 // 'MImm' class
3655 case MCK_MImm: {
3656 DiagnosticPredicate DP(Operand.isMImm());
3657 if (DP.isMatch())
3658 return MCTargetAsmParser::Match_Success;
3659 break;
3660 }
3661 // 'RDOp' class
3662 case MCK_RDOp: {
3663 DiagnosticPredicate DP(Operand.isRDOp());
3664 if (DP.isMatch())
3665 return MCTargetAsmParser::Match_Success;
3666 break;
3667 }
3668 // 'SImm7' class
3669 case MCK_SImm7: {
3670 DiagnosticPredicate DP(Operand.isSImm7());
3671 if (DP.isMatch())
3672 return MCTargetAsmParser::Match_Success;
3673 break;
3674 }
3675 // 'UImm0to2' class
3676 case MCK_UImm0to2: {
3677 DiagnosticPredicate DP(Operand.isUImm0to2());
3678 if (DP.isMatch())
3679 return MCTargetAsmParser::Match_Success;
3680 break;
3681 }
3682 // 'UImm1' class
3683 case MCK_UImm1: {
3684 DiagnosticPredicate DP(Operand.isUImm1());
3685 if (DP.isMatch())
3686 return MCTargetAsmParser::Match_Success;
3687 break;
3688 }
3689 // 'UImm2' class
3690 case MCK_UImm2: {
3691 DiagnosticPredicate DP(Operand.isUImm2());
3692 if (DP.isMatch())
3693 return MCTargetAsmParser::Match_Success;
3694 break;
3695 }
3696 // 'UImm3' class
3697 case MCK_UImm3: {
3698 DiagnosticPredicate DP(Operand.isUImm3());
3699 if (DP.isMatch())
3700 return MCTargetAsmParser::Match_Success;
3701 break;
3702 }
3703 // 'UImm4' class
3704 case MCK_UImm4: {
3705 DiagnosticPredicate DP(Operand.isUImm4());
3706 if (DP.isMatch())
3707 return MCTargetAsmParser::Match_Success;
3708 break;
3709 }
3710 // 'UImm6' class
3711 case MCK_UImm6: {
3712 DiagnosticPredicate DP(Operand.isUImm6());
3713 if (DP.isMatch())
3714 return MCTargetAsmParser::Match_Success;
3715 break;
3716 }
3717 // 'UImm7' class
3718 case MCK_UImm7: {
3719 DiagnosticPredicate DP(Operand.isUImm7());
3720 if (DP.isMatch())
3721 return MCTargetAsmParser::Match_Success;
3722 break;
3723 }
3724 // 'MEMri' class
3725 case MCK_MEMri: {
3726 DiagnosticPredicate DP(Operand.isMEMri());
3727 if (DP.isMatch())
3728 return MCTargetAsmParser::Match_Success;
3729 break;
3730 }
3731 // 'MEMrii' class
3732 case MCK_MEMrii: {
3733 DiagnosticPredicate DP(Operand.isMEMrii());
3734 if (DP.isMatch())
3735 return MCTargetAsmParser::Match_Success;
3736 break;
3737 }
3738 // 'MEMrri' class
3739 case MCK_MEMrri: {
3740 DiagnosticPredicate DP(Operand.isMEMrri());
3741 if (DP.isMatch())
3742 return MCTargetAsmParser::Match_Success;
3743 break;
3744 }
3745 // 'MEMzi' class
3746 case MCK_MEMzi: {
3747 DiagnosticPredicate DP(Operand.isMEMzi());
3748 if (DP.isMatch())
3749 return MCTargetAsmParser::Match_Success;
3750 break;
3751 }
3752 // 'MEMzii' class
3753 case MCK_MEMzii: {
3754 DiagnosticPredicate DP(Operand.isMEMzii());
3755 if (DP.isMatch())
3756 return MCTargetAsmParser::Match_Success;
3757 break;
3758 }
3759 // 'MEMzri' class
3760 case MCK_MEMzri: {
3761 DiagnosticPredicate DP(Operand.isMEMzri());
3762 if (DP.isMatch())
3763 return MCTargetAsmParser::Match_Success;
3764 break;
3765 }
3766 // 'Zero' class
3767 case MCK_Zero: {
3768 DiagnosticPredicate DP(Operand.isZero());
3769 if (DP.isMatch())
3770 return MCTargetAsmParser::Match_Success;
3771 break;
3772 }
3773 } // end switch (Kind)
3774
3775 if (Operand.isReg()) {
3776 MatchClassKind OpKind;
3777 switch (Operand.getReg().id()) {
3778 default: OpKind = InvalidMatchClass; break;
3779 case VE::USRCC: OpKind = MCK_MISC; break;
3780 case VE::PSW: OpKind = MCK_MISC; break;
3781 case VE::SAR: OpKind = MCK_MISC; break;
3782 case VE::PMMR: OpKind = MCK_MISC; break;
3783 case VE::PMCR0: OpKind = MCK_MISC; break;
3784 case VE::PMCR1: OpKind = MCK_MISC; break;
3785 case VE::PMCR2: OpKind = MCK_MISC; break;
3786 case VE::PMCR3: OpKind = MCK_MISC; break;
3787 case VE::PMC0: OpKind = MCK_MISC; break;
3788 case VE::PMC1: OpKind = MCK_MISC; break;
3789 case VE::PMC2: OpKind = MCK_MISC; break;
3790 case VE::PMC3: OpKind = MCK_MISC; break;
3791 case VE::PMC4: OpKind = MCK_MISC; break;
3792 case VE::PMC5: OpKind = MCK_MISC; break;
3793 case VE::PMC6: OpKind = MCK_MISC; break;
3794 case VE::PMC7: OpKind = MCK_MISC; break;
3795 case VE::PMC8: OpKind = MCK_MISC; break;
3796 case VE::PMC9: OpKind = MCK_MISC; break;
3797 case VE::PMC10: OpKind = MCK_MISC; break;
3798 case VE::PMC11: OpKind = MCK_MISC; break;
3799 case VE::PMC12: OpKind = MCK_MISC; break;
3800 case VE::PMC13: OpKind = MCK_MISC; break;
3801 case VE::PMC14: OpKind = MCK_MISC; break;
3802 case VE::VL: OpKind = MCK_VLS; break;
3803 case VE::SW0: OpKind = MCK_I32; break;
3804 case VE::SW1: OpKind = MCK_I32; break;
3805 case VE::SW2: OpKind = MCK_I32; break;
3806 case VE::SW3: OpKind = MCK_I32; break;
3807 case VE::SW4: OpKind = MCK_I32; break;
3808 case VE::SW5: OpKind = MCK_I32; break;
3809 case VE::SW6: OpKind = MCK_I32; break;
3810 case VE::SW7: OpKind = MCK_I32; break;
3811 case VE::SW8: OpKind = MCK_I32; break;
3812 case VE::SW9: OpKind = MCK_I32; break;
3813 case VE::SW10: OpKind = MCK_I32; break;
3814 case VE::SW11: OpKind = MCK_I32; break;
3815 case VE::SW12: OpKind = MCK_I32; break;
3816 case VE::SW13: OpKind = MCK_I32; break;
3817 case VE::SW14: OpKind = MCK_I32; break;
3818 case VE::SW15: OpKind = MCK_I32; break;
3819 case VE::SW16: OpKind = MCK_I32; break;
3820 case VE::SW17: OpKind = MCK_I32; break;
3821 case VE::SW18: OpKind = MCK_I32; break;
3822 case VE::SW19: OpKind = MCK_I32; break;
3823 case VE::SW20: OpKind = MCK_I32; break;
3824 case VE::SW21: OpKind = MCK_I32; break;
3825 case VE::SW22: OpKind = MCK_I32; break;
3826 case VE::SW23: OpKind = MCK_I32; break;
3827 case VE::SW24: OpKind = MCK_I32; break;
3828 case VE::SW25: OpKind = MCK_I32; break;
3829 case VE::SW26: OpKind = MCK_I32; break;
3830 case VE::SW27: OpKind = MCK_I32; break;
3831 case VE::SW28: OpKind = MCK_I32; break;
3832 case VE::SW29: OpKind = MCK_I32; break;
3833 case VE::SW30: OpKind = MCK_I32; break;
3834 case VE::SW31: OpKind = MCK_I32; break;
3835 case VE::SW32: OpKind = MCK_I32; break;
3836 case VE::SW33: OpKind = MCK_I32; break;
3837 case VE::SW34: OpKind = MCK_I32; break;
3838 case VE::SW35: OpKind = MCK_I32; break;
3839 case VE::SW36: OpKind = MCK_I32; break;
3840 case VE::SW37: OpKind = MCK_I32; break;
3841 case VE::SW38: OpKind = MCK_I32; break;
3842 case VE::SW39: OpKind = MCK_I32; break;
3843 case VE::SW40: OpKind = MCK_I32; break;
3844 case VE::SW41: OpKind = MCK_I32; break;
3845 case VE::SW42: OpKind = MCK_I32; break;
3846 case VE::SW43: OpKind = MCK_I32; break;
3847 case VE::SW44: OpKind = MCK_I32; break;
3848 case VE::SW45: OpKind = MCK_I32; break;
3849 case VE::SW46: OpKind = MCK_I32; break;
3850 case VE::SW47: OpKind = MCK_I32; break;
3851 case VE::SW48: OpKind = MCK_I32; break;
3852 case VE::SW49: OpKind = MCK_I32; break;
3853 case VE::SW50: OpKind = MCK_I32; break;
3854 case VE::SW51: OpKind = MCK_I32; break;
3855 case VE::SW52: OpKind = MCK_I32; break;
3856 case VE::SW53: OpKind = MCK_I32; break;
3857 case VE::SW54: OpKind = MCK_I32; break;
3858 case VE::SW55: OpKind = MCK_I32; break;
3859 case VE::SW56: OpKind = MCK_I32; break;
3860 case VE::SW57: OpKind = MCK_I32; break;
3861 case VE::SW58: OpKind = MCK_I32; break;
3862 case VE::SW59: OpKind = MCK_I32; break;
3863 case VE::SW60: OpKind = MCK_I32; break;
3864 case VE::SW61: OpKind = MCK_I32; break;
3865 case VE::SW62: OpKind = MCK_I32; break;
3866 case VE::SW63: OpKind = MCK_I32; break;
3867 case VE::SF0: OpKind = MCK_F32; break;
3868 case VE::SF1: OpKind = MCK_F32; break;
3869 case VE::SF2: OpKind = MCK_F32; break;
3870 case VE::SF3: OpKind = MCK_F32; break;
3871 case VE::SF4: OpKind = MCK_F32; break;
3872 case VE::SF5: OpKind = MCK_F32; break;
3873 case VE::SF6: OpKind = MCK_F32; break;
3874 case VE::SF7: OpKind = MCK_F32; break;
3875 case VE::SF8: OpKind = MCK_F32; break;
3876 case VE::SF9: OpKind = MCK_F32; break;
3877 case VE::SF10: OpKind = MCK_F32; break;
3878 case VE::SF11: OpKind = MCK_F32; break;
3879 case VE::SF12: OpKind = MCK_F32; break;
3880 case VE::SF13: OpKind = MCK_F32; break;
3881 case VE::SF14: OpKind = MCK_F32; break;
3882 case VE::SF15: OpKind = MCK_F32; break;
3883 case VE::SF16: OpKind = MCK_F32; break;
3884 case VE::SF17: OpKind = MCK_F32; break;
3885 case VE::SF18: OpKind = MCK_F32; break;
3886 case VE::SF19: OpKind = MCK_F32; break;
3887 case VE::SF20: OpKind = MCK_F32; break;
3888 case VE::SF21: OpKind = MCK_F32; break;
3889 case VE::SF22: OpKind = MCK_F32; break;
3890 case VE::SF23: OpKind = MCK_F32; break;
3891 case VE::SF24: OpKind = MCK_F32; break;
3892 case VE::SF25: OpKind = MCK_F32; break;
3893 case VE::SF26: OpKind = MCK_F32; break;
3894 case VE::SF27: OpKind = MCK_F32; break;
3895 case VE::SF28: OpKind = MCK_F32; break;
3896 case VE::SF29: OpKind = MCK_F32; break;
3897 case VE::SF30: OpKind = MCK_F32; break;
3898 case VE::SF31: OpKind = MCK_F32; break;
3899 case VE::SF32: OpKind = MCK_F32; break;
3900 case VE::SF33: OpKind = MCK_F32; break;
3901 case VE::SF34: OpKind = MCK_F32; break;
3902 case VE::SF35: OpKind = MCK_F32; break;
3903 case VE::SF36: OpKind = MCK_F32; break;
3904 case VE::SF37: OpKind = MCK_F32; break;
3905 case VE::SF38: OpKind = MCK_F32; break;
3906 case VE::SF39: OpKind = MCK_F32; break;
3907 case VE::SF40: OpKind = MCK_F32; break;
3908 case VE::SF41: OpKind = MCK_F32; break;
3909 case VE::SF42: OpKind = MCK_F32; break;
3910 case VE::SF43: OpKind = MCK_F32; break;
3911 case VE::SF44: OpKind = MCK_F32; break;
3912 case VE::SF45: OpKind = MCK_F32; break;
3913 case VE::SF46: OpKind = MCK_F32; break;
3914 case VE::SF47: OpKind = MCK_F32; break;
3915 case VE::SF48: OpKind = MCK_F32; break;
3916 case VE::SF49: OpKind = MCK_F32; break;
3917 case VE::SF50: OpKind = MCK_F32; break;
3918 case VE::SF51: OpKind = MCK_F32; break;
3919 case VE::SF52: OpKind = MCK_F32; break;
3920 case VE::SF53: OpKind = MCK_F32; break;
3921 case VE::SF54: OpKind = MCK_F32; break;
3922 case VE::SF55: OpKind = MCK_F32; break;
3923 case VE::SF56: OpKind = MCK_F32; break;
3924 case VE::SF57: OpKind = MCK_F32; break;
3925 case VE::SF58: OpKind = MCK_F32; break;
3926 case VE::SF59: OpKind = MCK_F32; break;
3927 case VE::SF60: OpKind = MCK_F32; break;
3928 case VE::SF61: OpKind = MCK_F32; break;
3929 case VE::SF62: OpKind = MCK_F32; break;
3930 case VE::SF63: OpKind = MCK_F32; break;
3931 case VE::SX8: OpKind = MCK_I64; break;
3932 case VE::SX9: OpKind = MCK_I64; break;
3933 case VE::SX10: OpKind = MCK_I64; break;
3934 case VE::SX11: OpKind = MCK_I64; break;
3935 case VE::SX14: OpKind = MCK_I64; break;
3936 case VE::SX15: OpKind = MCK_I64; break;
3937 case VE::SX16: OpKind = MCK_I64; break;
3938 case VE::SX0: OpKind = MCK_I64; break;
3939 case VE::SX1: OpKind = MCK_I64; break;
3940 case VE::SX2: OpKind = MCK_I64; break;
3941 case VE::SX3: OpKind = MCK_I64; break;
3942 case VE::SX4: OpKind = MCK_I64; break;
3943 case VE::SX5: OpKind = MCK_I64; break;
3944 case VE::SX6: OpKind = MCK_I64; break;
3945 case VE::SX7: OpKind = MCK_I64; break;
3946 case VE::SX12: OpKind = MCK_I64; break;
3947 case VE::SX13: OpKind = MCK_I64; break;
3948 case VE::SX17: OpKind = MCK_I64; break;
3949 case VE::SX18: OpKind = MCK_I64; break;
3950 case VE::SX19: OpKind = MCK_I64; break;
3951 case VE::SX20: OpKind = MCK_I64; break;
3952 case VE::SX21: OpKind = MCK_I64; break;
3953 case VE::SX22: OpKind = MCK_I64; break;
3954 case VE::SX23: OpKind = MCK_I64; break;
3955 case VE::SX24: OpKind = MCK_I64; break;
3956 case VE::SX25: OpKind = MCK_I64; break;
3957 case VE::SX26: OpKind = MCK_I64; break;
3958 case VE::SX27: OpKind = MCK_I64; break;
3959 case VE::SX28: OpKind = MCK_I64; break;
3960 case VE::SX29: OpKind = MCK_I64; break;
3961 case VE::SX30: OpKind = MCK_I64; break;
3962 case VE::SX31: OpKind = MCK_I64; break;
3963 case VE::SX32: OpKind = MCK_I64; break;
3964 case VE::SX33: OpKind = MCK_I64; break;
3965 case VE::SX34: OpKind = MCK_I64; break;
3966 case VE::SX35: OpKind = MCK_I64; break;
3967 case VE::SX36: OpKind = MCK_I64; break;
3968 case VE::SX37: OpKind = MCK_I64; break;
3969 case VE::SX38: OpKind = MCK_I64; break;
3970 case VE::SX39: OpKind = MCK_I64; break;
3971 case VE::SX40: OpKind = MCK_I64; break;
3972 case VE::SX41: OpKind = MCK_I64; break;
3973 case VE::SX42: OpKind = MCK_I64; break;
3974 case VE::SX43: OpKind = MCK_I64; break;
3975 case VE::SX44: OpKind = MCK_I64; break;
3976 case VE::SX45: OpKind = MCK_I64; break;
3977 case VE::SX46: OpKind = MCK_I64; break;
3978 case VE::SX47: OpKind = MCK_I64; break;
3979 case VE::SX48: OpKind = MCK_I64; break;
3980 case VE::SX49: OpKind = MCK_I64; break;
3981 case VE::SX50: OpKind = MCK_I64; break;
3982 case VE::SX51: OpKind = MCK_I64; break;
3983 case VE::SX52: OpKind = MCK_I64; break;
3984 case VE::SX53: OpKind = MCK_I64; break;
3985 case VE::SX54: OpKind = MCK_I64; break;
3986 case VE::SX55: OpKind = MCK_I64; break;
3987 case VE::SX56: OpKind = MCK_I64; break;
3988 case VE::SX57: OpKind = MCK_I64; break;
3989 case VE::SX58: OpKind = MCK_I64; break;
3990 case VE::SX59: OpKind = MCK_I64; break;
3991 case VE::SX60: OpKind = MCK_I64; break;
3992 case VE::SX61: OpKind = MCK_I64; break;
3993 case VE::SX62: OpKind = MCK_I64; break;
3994 case VE::SX63: OpKind = MCK_I64; break;
3995 case VE::Q0: OpKind = MCK_F128; break;
3996 case VE::Q1: OpKind = MCK_F128; break;
3997 case VE::Q2: OpKind = MCK_F128; break;
3998 case VE::Q3: OpKind = MCK_F128; break;
3999 case VE::Q4: OpKind = MCK_F128; break;
4000 case VE::Q5: OpKind = MCK_F128; break;
4001 case VE::Q6: OpKind = MCK_F128; break;
4002 case VE::Q7: OpKind = MCK_F128; break;
4003 case VE::Q8: OpKind = MCK_F128; break;
4004 case VE::Q9: OpKind = MCK_F128; break;
4005 case VE::Q10: OpKind = MCK_F128; break;
4006 case VE::Q11: OpKind = MCK_F128; break;
4007 case VE::Q12: OpKind = MCK_F128; break;
4008 case VE::Q13: OpKind = MCK_F128; break;
4009 case VE::Q14: OpKind = MCK_F128; break;
4010 case VE::Q15: OpKind = MCK_F128; break;
4011 case VE::Q16: OpKind = MCK_F128; break;
4012 case VE::Q17: OpKind = MCK_F128; break;
4013 case VE::Q18: OpKind = MCK_F128; break;
4014 case VE::Q19: OpKind = MCK_F128; break;
4015 case VE::Q20: OpKind = MCK_F128; break;
4016 case VE::Q21: OpKind = MCK_F128; break;
4017 case VE::Q22: OpKind = MCK_F128; break;
4018 case VE::Q23: OpKind = MCK_F128; break;
4019 case VE::Q24: OpKind = MCK_F128; break;
4020 case VE::Q25: OpKind = MCK_F128; break;
4021 case VE::Q26: OpKind = MCK_F128; break;
4022 case VE::Q27: OpKind = MCK_F128; break;
4023 case VE::Q28: OpKind = MCK_F128; break;
4024 case VE::Q29: OpKind = MCK_F128; break;
4025 case VE::Q30: OpKind = MCK_F128; break;
4026 case VE::Q31: OpKind = MCK_F128; break;
4027 case VE::V0: OpKind = MCK_V64; break;
4028 case VE::V1: OpKind = MCK_V64; break;
4029 case VE::V2: OpKind = MCK_V64; break;
4030 case VE::V3: OpKind = MCK_V64; break;
4031 case VE::V4: OpKind = MCK_V64; break;
4032 case VE::V5: OpKind = MCK_V64; break;
4033 case VE::V6: OpKind = MCK_V64; break;
4034 case VE::V7: OpKind = MCK_V64; break;
4035 case VE::V8: OpKind = MCK_V64; break;
4036 case VE::V9: OpKind = MCK_V64; break;
4037 case VE::V10: OpKind = MCK_V64; break;
4038 case VE::V11: OpKind = MCK_V64; break;
4039 case VE::V12: OpKind = MCK_V64; break;
4040 case VE::V13: OpKind = MCK_V64; break;
4041 case VE::V14: OpKind = MCK_V64; break;
4042 case VE::V15: OpKind = MCK_V64; break;
4043 case VE::V16: OpKind = MCK_V64; break;
4044 case VE::V17: OpKind = MCK_V64; break;
4045 case VE::V18: OpKind = MCK_V64; break;
4046 case VE::V19: OpKind = MCK_V64; break;
4047 case VE::V20: OpKind = MCK_V64; break;
4048 case VE::V21: OpKind = MCK_V64; break;
4049 case VE::V22: OpKind = MCK_V64; break;
4050 case VE::V23: OpKind = MCK_V64; break;
4051 case VE::V24: OpKind = MCK_V64; break;
4052 case VE::V25: OpKind = MCK_V64; break;
4053 case VE::V26: OpKind = MCK_V64; break;
4054 case VE::V27: OpKind = MCK_V64; break;
4055 case VE::V28: OpKind = MCK_V64; break;
4056 case VE::V29: OpKind = MCK_V64; break;
4057 case VE::V30: OpKind = MCK_V64; break;
4058 case VE::V31: OpKind = MCK_V64; break;
4059 case VE::V32: OpKind = MCK_V64; break;
4060 case VE::V33: OpKind = MCK_V64; break;
4061 case VE::V34: OpKind = MCK_V64; break;
4062 case VE::V35: OpKind = MCK_V64; break;
4063 case VE::V36: OpKind = MCK_V64; break;
4064 case VE::V37: OpKind = MCK_V64; break;
4065 case VE::V38: OpKind = MCK_V64; break;
4066 case VE::V39: OpKind = MCK_V64; break;
4067 case VE::V40: OpKind = MCK_V64; break;
4068 case VE::V41: OpKind = MCK_V64; break;
4069 case VE::V42: OpKind = MCK_V64; break;
4070 case VE::V43: OpKind = MCK_V64; break;
4071 case VE::V44: OpKind = MCK_V64; break;
4072 case VE::V45: OpKind = MCK_V64; break;
4073 case VE::V46: OpKind = MCK_V64; break;
4074 case VE::V47: OpKind = MCK_V64; break;
4075 case VE::V48: OpKind = MCK_V64; break;
4076 case VE::V49: OpKind = MCK_V64; break;
4077 case VE::V50: OpKind = MCK_V64; break;
4078 case VE::V51: OpKind = MCK_V64; break;
4079 case VE::V52: OpKind = MCK_V64; break;
4080 case VE::V53: OpKind = MCK_V64; break;
4081 case VE::V54: OpKind = MCK_V64; break;
4082 case VE::V55: OpKind = MCK_V64; break;
4083 case VE::V56: OpKind = MCK_V64; break;
4084 case VE::V57: OpKind = MCK_V64; break;
4085 case VE::V58: OpKind = MCK_V64; break;
4086 case VE::V59: OpKind = MCK_V64; break;
4087 case VE::V60: OpKind = MCK_V64; break;
4088 case VE::V61: OpKind = MCK_V64; break;
4089 case VE::V62: OpKind = MCK_V64; break;
4090 case VE::V63: OpKind = MCK_V64; break;
4091 case VE::VIX: OpKind = MCK_V64; break;
4092 case VE::VM0: OpKind = MCK_VM; break;
4093 case VE::VM1: OpKind = MCK_VM; break;
4094 case VE::VM2: OpKind = MCK_VM; break;
4095 case VE::VM3: OpKind = MCK_VM; break;
4096 case VE::VM4: OpKind = MCK_VM; break;
4097 case VE::VM5: OpKind = MCK_VM; break;
4098 case VE::VM6: OpKind = MCK_VM; break;
4099 case VE::VM7: OpKind = MCK_VM; break;
4100 case VE::VM8: OpKind = MCK_VM; break;
4101 case VE::VM9: OpKind = MCK_VM; break;
4102 case VE::VM10: OpKind = MCK_VM; break;
4103 case VE::VM11: OpKind = MCK_VM; break;
4104 case VE::VM12: OpKind = MCK_VM; break;
4105 case VE::VM13: OpKind = MCK_VM; break;
4106 case VE::VM14: OpKind = MCK_VM; break;
4107 case VE::VM15: OpKind = MCK_VM; break;
4108 case VE::VMP0: OpKind = MCK_VM512; break;
4109 case VE::VMP1: OpKind = MCK_Reg9; break;
4110 case VE::VMP2: OpKind = MCK_Reg9; break;
4111 case VE::VMP3: OpKind = MCK_Reg9; break;
4112 case VE::VMP4: OpKind = MCK_Reg9; break;
4113 case VE::VMP5: OpKind = MCK_Reg9; break;
4114 case VE::VMP6: OpKind = MCK_Reg9; break;
4115 case VE::VMP7: OpKind = MCK_Reg9; break;
4116 }
4117 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
4118 getDiagKindFromRegisterClass(Kind);
4119 }
4120
4121 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
4122 return getDiagKindFromRegisterClass(Kind);
4123
4124 return MCTargetAsmParser::Match_InvalidOperand;
4125}
4126
4127#ifndef NDEBUG
4128const char *getMatchClassName(MatchClassKind Kind) {
4129 switch (Kind) {
4130 case InvalidMatchClass: return "InvalidMatchClass";
4131 case OptionalMatchClass: return "OptionalMatchClass";
4132 case MCK__40_: return "MCK__40_";
4133 case MCK__41_: return "MCK__41_";
4134 case MCK__DOT_d: return "MCK__DOT_d";
4135 case MCK__DOT_d_DOT_nt: return "MCK__DOT_d_DOT_nt";
4136 case MCK__DOT_d_DOT_t: return "MCK__DOT_d_DOT_t";
4137 case MCK__DOT_l: return "MCK__DOT_l";
4138 case MCK__DOT_l_DOT_nt: return "MCK__DOT_l_DOT_nt";
4139 case MCK__DOT_l_DOT_t: return "MCK__DOT_l_DOT_t";
4140 case MCK__DOT_s: return "MCK__DOT_s";
4141 case MCK__DOT_s_DOT_nt: return "MCK__DOT_s_DOT_nt";
4142 case MCK__DOT_s_DOT_t: return "MCK__DOT_s_DOT_t";
4143 case MCK__DOT_w: return "MCK__DOT_w";
4144 case MCK__DOT_w_DOT_nt: return "MCK__DOT_w_DOT_nt";
4145 case MCK__DOT_w_DOT_t: return "MCK__DOT_w_DOT_t";
4146 case MCK_VLS: return "MCK_VLS";
4147 case MCK_Reg9: return "MCK_Reg9";
4148 case MCK_VM512: return "MCK_VM512";
4149 case MCK_VM: return "MCK_VM";
4150 case MCK_MISC: return "MCK_MISC";
4151 case MCK_F128: return "MCK_F128";
4152 case MCK_F32: return "MCK_F32";
4153 case MCK_I32: return "MCK_I32";
4154 case MCK_I64: return "MCK_I64";
4155 case MCK_V64: return "MCK_V64";
4156 case MCK_CCOp: return "MCK_CCOp";
4157 case MCK_Imm: return "MCK_Imm";
4158 case MCK_MImm: return "MCK_MImm";
4159 case MCK_RDOp: return "MCK_RDOp";
4160 case MCK_SImm7: return "MCK_SImm7";
4161 case MCK_UImm0to2: return "MCK_UImm0to2";
4162 case MCK_UImm1: return "MCK_UImm1";
4163 case MCK_UImm2: return "MCK_UImm2";
4164 case MCK_UImm3: return "MCK_UImm3";
4165 case MCK_UImm4: return "MCK_UImm4";
4166 case MCK_UImm6: return "MCK_UImm6";
4167 case MCK_UImm7: return "MCK_UImm7";
4168 case MCK_MEMri: return "MCK_MEMri";
4169 case MCK_MEMrii: return "MCK_MEMrii";
4170 case MCK_MEMrri: return "MCK_MEMrri";
4171 case MCK_MEMzi: return "MCK_MEMzi";
4172 case MCK_MEMzii: return "MCK_MEMzii";
4173 case MCK_MEMzri: return "MCK_MEMzri";
4174 case MCK_Zero: return "MCK_Zero";
4175 case NumMatchClassKinds: return "NumMatchClassKinds";
4176 }
4177 llvm_unreachable("unhandled MatchClassKind!");
4178}
4179
4180#endif // NDEBUG
4181FeatureBitset VEAsmParser::
4182ComputeAvailableFeatures(const FeatureBitset &FB) const {
4183 FeatureBitset Features;
4184 return Features;
4185}
4186
4187static bool checkAsmTiedOperandConstraints(const VEAsmParser&AsmParser,
4188 unsigned Kind, const OperandVector &Operands,
4189 uint64_t &ErrorInfo) {
4190 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
4191 const uint8_t *Converter = ConversionTable[Kind];
4192 for (const uint8_t *p = Converter; *p; p += 2) {
4193 switch (*p) {
4194 case CVT_Tied: {
4195 unsigned OpIdx = *(p + 1);
4196 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
4197 std::begin(TiedAsmOperandTable)) &&
4198 "Tied operand not found");
4199 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
4200 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
4201 if (OpndNum1 != OpndNum2) {
4202 auto &SrcOp1 = Operands[OpndNum1];
4203 auto &SrcOp2 = Operands[OpndNum2];
4204 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) {
4205 ErrorInfo = OpndNum2;
4206 return false;
4207 }
4208 }
4209 break;
4210 }
4211 default:
4212 break;
4213 }
4214 }
4215 return true;
4216}
4217
4218static const char MnemonicTable[] =
4219 "\006adds.l\tadds.w.sx\tadds.w.zx\006addu.l\006addu.w\003and\004andm\005"
4220 "atmam\001b\003b.d\006b.d.nt\005b.d.t\003b.l\006b.l.nt\005b.l.t\003b.s\006"
4221 "b.s.nt\005b.s.t\003b.w\006b.w.nt\005b.w.t\005baf.d\010baf.d.nt\007baf.d"
4222 ".t\005baf.l\010baf.l.nt\007baf.l.t\005baf.s\010baf.s.nt\007baf.s.t\005b"
4223 "af.w\010baf.w.nt\007baf.w.t\002br\004br.d\007br.d.nt\006br.d.t\004br.l\007"
4224 "br.l.nt\006br.l.t\004br.s\007br.s.nt\006br.s.t\004br.w\007br.w.nt\006br"
4225 ".w.t\006braf.d\tbraf.d.nt\010braf.d.t\006braf.l\tbraf.l.nt\010braf.l.t\006"
4226 "braf.s\tbraf.s.nt\010braf.s.t\006braf.w\tbraf.w.nt\010braf.w.t\003brv\004"
4227 "bsic\004bswp\005cas.l\005cas.w\007cmov.d.\007cmov.l.\007cmov.s.\007cmov"
4228 ".w.\006cmps.l\tcmps.w.sx\tcmps.w.zx\006cmpu.l\006cmpu.w\007cvt.d.l\007c"
4229 "vt.d.q\007cvt.d.s\007cvt.d.w\007cvt.l.d\007cvt.q.d\007cvt.q.s\007cvt.s."
4230 "d\007cvt.s.q\007cvt.s.w\ncvt.w.d.sx\ncvt.w.d.zx\ncvt.w.s.sx\ncvt.w.s.zx"
4231 "\006divs.l\tdivs.w.sx\tdivs.w.zx\006divu.l\006divu.w\003dld\007dldl.sx\007"
4232 "dldl.zx\004dldu\003eqv\004eqvm\006fadd.d\006fadd.q\006fadd.s\006fcmp.d\006"
4233 "fcmp.q\006fcmp.s\006fdiv.d\006fdiv.s\006fencec\006fencei\006fencem\005f"
4234 "idcr\006fmax.d\006fmax.s\006fmin.d\006fmin.s\006fmul.d\006fmul.q\006fmu"
4235 "l.s\006fsub.d\006fsub.q\006fsub.s\003lcr\002ld\007ld1b.sx\007ld1b.zx\007"
4236 "ld2b.sx\007ld2b.zx\006ldl.sx\006ldl.zx\003ldu\003ldz\003lea\006lea.sl\003"
4237 "lfr\005lhm.b\005lhm.h\005lhm.l\005lhm.w\003lpm\003lsv\004lvix\003lvl\003"
4238 "lvm\003lvs\004lzvm\006maxs.l\tmaxs.w.sx\tmaxs.w.zx\006mins.l\tmins.w.sx"
4239 "\tmins.w.zx\004monc\010monc.hdb\003mrg\006muls.l\010muls.l.w\tmuls.w.sx"
4240 "\tmuls.w.zx\006mulu.l\006mulu.w\004negm\003nnd\004nndm\003nop\002or\003"
4241 "orm\004pcnt\004pcvm\004pfch\005pfchv\010pfchv.nc\006pvadds\tpvadds.lo\t"
4242 "pvadds.up\006pvaddu\tpvaddu.lo\tpvaddu.up\005pvand\010pvand.lo\010pvand"
4243 ".up\005pvbrd\005pvbrv\010pvbrv.lo\010pvbrv.up\006pvcmps\tpvcmps.lo\tpvc"
4244 "mps.up\006pvcmpu\tpvcmpu.lo\tpvcmpu.up\tpvcvt.s.w\014pvcvt.s.w.lo\014pv"
4245 "cvt.s.w.up\tpvcvt.w.s\014pvcvt.w.s.lo\014pvcvt.w.s.up\005pveqv\010pveqv"
4246 ".lo\010pveqv.up\006pvfadd\tpvfadd.lo\tpvfadd.up\006pvfcmp\tpvfcmp.lo\tp"
4247 "vfcmp.up\006pvfmad\tpvfmad.lo\tpvfmad.up\006pvfmax\tpvfmax.lo\tpvfmax.u"
4248 "p\006pvfmin\tpvfmin.lo\tpvfmin.up\013pvfmk.s.lo.\015pvfmk.s.lo.af\015pv"
4249 "fmk.s.lo.at\013pvfmk.s.up.\015pvfmk.s.up.af\015pvfmk.s.up.at\013pvfmk.w"
4250 ".up.\015pvfmk.w.up.af\015pvfmk.w.up.at\006pvfmsb\tpvfmsb.lo\tpvfmsb.up\006"
4251 "pvfmul\tpvfmul.lo\tpvfmul.up\007pvfnmad\npvfnmad.lo\npvfnmad.up\007pvfn"
4252 "msb\npvfnmsb.lo\npvfnmsb.up\006pvfsub\tpvfsub.lo\tpvfsub.up\005pvldz\010"
4253 "pvldz.lo\010pvldz.up\006pvmaxs\tpvmaxs.lo\tpvmaxs.up\006pvmins\tpvmins."
4254 "lo\tpvmins.up\004pvor\007pvor.lo\007pvor.up\006pvpcnt\tpvpcnt.lo\tpvpcn"
4255 "t.up\005pvrcp\010pvrcp.lo\010pvrcp.up\007pvrsqrt\npvrsqrt.lo\016pvrsqrt"
4256 ".lo.nex\013pvrsqrt.nex\npvrsqrt.up\016pvrsqrt.up.nex\005pvseq\010pvseq."
4257 "lo\010pvseq.up\005pvsla\010pvsla.lo\010pvsla.up\005pvsll\010pvsll.lo\010"
4258 "pvsll.up\005pvsra\010pvsra.lo\010pvsra.up\005pvsrl\010pvsrl.lo\010pvsrl"
4259 ".up\006pvsubs\tpvsubs.lo\tpvsubs.up\006pvsubu\tpvsubu.lo\tpvsubu.up\005"
4260 "pvxor\010pvxor.lo\010pvxor.up\003scr\003sfr\005shm.b\005shm.h\005shm.l\005"
4261 "shm.w\003sic\005sla.l\010sla.w.sx\010sla.w.zx\003sld\003sll\004smir\004"
4262 "smvl\003spm\005sra.l\010sra.w.sx\010sra.w.zx\003srd\003srl\002st\004st1"
4263 "b\004st2b\003stl\003stu\006subs.l\tsubs.w.sx\tsubs.w.zx\006subu.l\006su"
4264 "bu.w\003svl\003svm\004svob\004tovm\007ts1am.l\007ts1am.w\005ts2am\005ts"
4265 "3am\004tscr\007vadds.l\nvadds.w.sx\007vaddu.l\004vand\004vbrd\005vbrdl\005"
4266 "vbrdu\004vbrv\007vcmps.l\nvcmps.w.sx\007vcmpu.l\003vcp\010vcvt.d.l\010v"
4267 "cvt.d.s\010vcvt.d.w\010vcvt.l.d\010vcvt.s.d\010vcvt.s.w\013vcvt.w.d.sx\013"
4268 "vcvt.w.d.zx\013vcvt.w.s.sx\013vcvt.w.s.zx\007vdivs.l\nvdivs.w.sx\nvdivs"
4269 ".w.zx\007vdivu.l\007vdivu.w\004veqv\003vex\007vfadd.d\007vfcmp.d\007vfd"
4270 "iv.d\007vfdiv.s\006vfia.d\006vfia.s\007vfiam.d\007vfiam.s\006vfim.d\006"
4271 "vfim.s\007vfima.d\007vfima.s\007vfims.d\007vfims.s\006vfis.d\006vfis.s\007"
4272 "vfism.d\007vfism.s\007vfmad.d\007vfmax.d\007vfmin.d\007vfmk.d.\tvfmk.d."
4273 "af\tvfmk.d.at\007vfmk.l.\tvfmk.l.af\tvfmk.l.at\007vfmk.w.\tvfmk.w.af\tv"
4274 "fmk.w.at\007vfmsb.d\007vfmul.d\010vfnmad.d\010vfnmsb.d\014vfrmax.d.fst\014"
4275 "vfrmax.d.lst\014vfrmax.s.fst\014vfrmax.s.lst\014vfrmin.d.fst\014vfrmin."
4276 "d.lst\014vfrmin.s.fst\014vfrmin.s.lst\010vfsqrt.d\010vfsqrt.s\007vfsub."
4277 "d\007vfsum.d\007vfsum.s\003vgt\006vgt.nc\007vgtl.sx\nvgtl.sx.nc\007vgtl"
4278 ".zx\nvgtl.zx.nc\004vgtu\007vgtu.nc\003vld\006vld.nc\005vld2d\010vld2d.n"
4279 "c\007vldl.sx\nvldl.sx.nc\007vldl.zx\nvldl.zx.nc\tvldl2d.sx\014vldl2d.sx"
4280 ".nc\tvldl2d.zx\014vldl2d.zx.nc\004vldu\007vldu.nc\006vldu2d\tvldu2d.nc\004"
4281 "vldz\007vmaxs.l\nvmaxs.w.sx\007vmins.l\nvmins.w.sx\004vmrg\006vmrg.w\007"
4282 "vmuls.l\tvmuls.l.w\nvmuls.w.sx\nvmuls.w.zx\007vmulu.l\007vmulu.w\003vmv"
4283 "\003vor\005vpcnt\005vrand\006vrcp.d\014vrmaxs.l.fst\014vrmaxs.l.lst\017"
4284 "vrmaxs.w.fst.sx\017vrmaxs.w.fst.zx\017vrmaxs.w.lst.sx\017vrmaxs.w.lst.z"
4285 "x\014vrmins.l.fst\014vrmins.l.lst\017vrmins.w.fst.sx\017vrmins.w.fst.zx"
4286 "\017vrmins.w.lst.sx\017vrmins.w.lst.zx\004vror\010vrsqrt.d\014vrsqrt.d."
4287 "nex\005vrxor\003vsc\006vsc.nc\tvsc.nc.ot\006vsc.ot\004vscl\007vscl.nc\n"
4288 "vscl.nc.ot\007vscl.ot\004vscu\007vscu.nc\nvscu.nc.ot\007vscu.ot\004vseq"
4289 "\004vsfa\004vshf\006vsla.l\tvsla.w.sx\004vsld\004vsll\006vsra.l\tvsra.w"
4290 ".sx\004vsrd\004vsrl\003vst\006vst.nc\tvst.nc.ot\006vst.ot\005vst2d\010v"
4291 "st2d.nc\013vst2d.nc.ot\010vst2d.ot\004vstl\007vstl.nc\nvstl.nc.ot\007vs"
4292 "tl.ot\006vstl2d\tvstl2d.nc\014vstl2d.nc.ot\tvstl2d.ot\004vstu\007vstu.n"
4293 "c\nvstu.nc.ot\007vstu.ot\006vstu2d\tvstu2d.nc\014vstu2d.nc.ot\tvstu2d.o"
4294 "t\007vsubs.l\nvsubs.w.sx\007vsubu.l\006vsum.l\tvsum.w.sx\tvsum.w.zx\004"
4295 "vxor\003xor\004xorm";
4296
4297// Feature bitsets.
4298enum : uint8_t {
4299 AMFBS_None,
4300};
4301
4302static constexpr FeatureBitset FeatureBitsets[] = {
4303 {}, // AMFBS_None
4304};
4305
4306namespace {
4307 struct MatchEntry {
4308 uint16_t Mnemonic;
4309 uint16_t Opcode;
4310 uint8_t ConvertFn;
4311 uint8_t RequiredFeaturesIdx;
4312 uint8_t Classes[7];
4313 StringRef getMnemonic() const {
4314 return StringRef(MnemonicTable + Mnemonic + 1,
4315 MnemonicTable[Mnemonic]);
4316 }
4317 };
4318
4319 // Predicate for searching for an opcode.
4320 struct LessOpcode {
4321 bool operator()(const MatchEntry &LHS, StringRef RHS) {
4322 return LHS.getMnemonic() < RHS;
4323 }
4324 bool operator()(StringRef LHS, const MatchEntry &RHS) {
4325 return LHS < RHS.getMnemonic();
4326 }
4327 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
4328 return LHS.getMnemonic() < RHS.getMnemonic();
4329 }
4330 };
4331} // end anonymous namespace
4332
4333static const MatchEntry MatchTable0[] = {
4334 { 0 /* adds.l */, VE::ADDSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4335 { 0 /* adds.l */, VE::ADDSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4336 { 0 /* adds.l */, VE::ADDSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4337 { 0 /* adds.l */, VE::ADDSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4338 { 7 /* adds.w.sx */, VE::ADDSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4339 { 7 /* adds.w.sx */, VE::ADDSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4340 { 7 /* adds.w.sx */, VE::ADDSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4341 { 7 /* adds.w.sx */, VE::ADDSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4342 { 17 /* adds.w.zx */, VE::ADDSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4343 { 17 /* adds.w.zx */, VE::ADDSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4344 { 17 /* adds.w.zx */, VE::ADDSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4345 { 17 /* adds.w.zx */, VE::ADDSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4346 { 27 /* addu.l */, VE::ADDULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4347 { 27 /* addu.l */, VE::ADDULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4348 { 27 /* addu.l */, VE::ADDULri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4349 { 27 /* addu.l */, VE::ADDULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4350 { 34 /* addu.w */, VE::ADDUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4351 { 34 /* addu.w */, VE::ADDUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4352 { 34 /* addu.w */, VE::ADDUWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4353 { 34 /* addu.w */, VE::ADDUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4354 { 41 /* and */, VE::ANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4355 { 41 /* and */, VE::ANDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4356 { 41 /* and */, VE::ANDri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4357 { 41 /* and */, VE::ANDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4358 { 45 /* andm */, VE::ANDMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4359 { 50 /* atmam */, VE::ATMAMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
4360 { 50 /* atmam */, VE::ATMAMrii, Convert__Reg1_0__MEMri2_1__UImm0to21_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm0to2 }, },
4361 { 50 /* atmam */, VE::ATMAMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
4362 { 50 /* atmam */, VE::ATMAMzii, Convert__Reg1_0__MEMzi2_1__UImm0to21_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm0to2 }, },
4363 { 56 /* b */, VE::BCFDrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_MEMri }, },
4364 { 56 /* b */, VE::BCFDrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_MEMzi }, },
4365 { 56 /* b */, VE::BCFDiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_MEMri }, },
4366 { 56 /* b */, VE::BCFDizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_MEMzi }, },
4367 { 56 /* b */, VE::BCFDrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_MEMri }, },
4368 { 56 /* b */, VE::BCFDrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_MEMzi }, },
4369 { 56 /* b */, VE::BCFDiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_MEMri }, },
4370 { 56 /* b */, VE::BCFDizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
4371 { 56 /* b */, VE::BCFDrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_MEMri }, },
4372 { 56 /* b */, VE::BCFDrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_MEMzi }, },
4373 { 56 /* b */, VE::BCFDiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_MEMri }, },
4374 { 56 /* b */, VE::BCFDizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_MEMzi }, },
4375 { 56 /* b */, VE::BCFLrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_MEMri }, },
4376 { 56 /* b */, VE::BCFLrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_MEMzi }, },
4377 { 56 /* b */, VE::BCFLiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_MEMri }, },
4378 { 56 /* b */, VE::BCFLizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_MEMzi }, },
4379 { 56 /* b */, VE::BCFLrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_MEMri }, },
4380 { 56 /* b */, VE::BCFLrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_MEMzi }, },
4381 { 56 /* b */, VE::BCFLiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_MEMri }, },
4382 { 56 /* b */, VE::BCFLizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
4383 { 56 /* b */, VE::BCFLrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_MEMri }, },
4384 { 56 /* b */, VE::BCFLrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_MEMzi }, },
4385 { 56 /* b */, VE::BCFLiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_MEMri }, },
4386 { 56 /* b */, VE::BCFLizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_MEMzi }, },
4387 { 56 /* b */, VE::BCFSrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_MEMri }, },
4388 { 56 /* b */, VE::BCFSrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_MEMzi }, },
4389 { 56 /* b */, VE::BCFSiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_MEMri }, },
4390 { 56 /* b */, VE::BCFSizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_MEMzi }, },
4391 { 56 /* b */, VE::BCFSrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_MEMri }, },
4392 { 56 /* b */, VE::BCFSrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_MEMzi }, },
4393 { 56 /* b */, VE::BCFSiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_MEMri }, },
4394 { 56 /* b */, VE::BCFSizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
4395 { 56 /* b */, VE::BCFSrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_MEMri }, },
4396 { 56 /* b */, VE::BCFSrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_MEMzi }, },
4397 { 56 /* b */, VE::BCFSiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_MEMri }, },
4398 { 56 /* b */, VE::BCFSizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_MEMzi }, },
4399 { 56 /* b */, VE::BCFWrri, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_MEMri }, },
4400 { 56 /* b */, VE::BCFWrzi, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_MEMzi }, },
4401 { 56 /* b */, VE::BCFWiri, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_MEMri }, },
4402 { 56 /* b */, VE::BCFWizi, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_MEMzi }, },
4403 { 56 /* b */, VE::BCFWrri_nt, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_MEMri }, },
4404 { 56 /* b */, VE::BCFWrzi_nt, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_MEMzi }, },
4405 { 56 /* b */, VE::BCFWiri_nt, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_MEMri }, },
4406 { 56 /* b */, VE::BCFWizi_nt, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_MEMzi }, },
4407 { 56 /* b */, VE::BCFWrri_t, Convert__CCOp1_0__Reg1_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_MEMri }, },
4408 { 56 /* b */, VE::BCFWrzi_t, Convert__CCOp1_0__Reg1_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_MEMzi }, },
4409 { 56 /* b */, VE::BCFWiri_t, Convert__CCOp1_0__SImm71_2__MEMri2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_MEMri }, },
4410 { 56 /* b */, VE::BCFWizi_t, Convert__CCOp1_0__SImm71_2__MEMzi2_3, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_MEMzi }, },
4411 { 58 /* b.d */, VE::BCFDari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4412 { 58 /* b.d */, VE::BCFDazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4413 { 62 /* b.d.nt */, VE::BCFDari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4414 { 62 /* b.d.nt */, VE::BCFDazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4415 { 69 /* b.d.t */, VE::BCFDari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4416 { 69 /* b.d.t */, VE::BCFDazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4417 { 75 /* b.l */, VE::BCFLari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4418 { 75 /* b.l */, VE::BCFLazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4419 { 79 /* b.l.nt */, VE::BCFLari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4420 { 79 /* b.l.nt */, VE::BCFLazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4421 { 86 /* b.l.t */, VE::BCFLari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4422 { 86 /* b.l.t */, VE::BCFLazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4423 { 92 /* b.s */, VE::BCFSari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4424 { 92 /* b.s */, VE::BCFSazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4425 { 96 /* b.s.nt */, VE::BCFSari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4426 { 96 /* b.s.nt */, VE::BCFSazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4427 { 103 /* b.s.t */, VE::BCFSari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4428 { 103 /* b.s.t */, VE::BCFSazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4429 { 109 /* b.w */, VE::BCFWari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4430 { 109 /* b.w */, VE::BCFWazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4431 { 113 /* b.w.nt */, VE::BCFWari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4432 { 113 /* b.w.nt */, VE::BCFWazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4433 { 120 /* b.w.t */, VE::BCFWari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4434 { 120 /* b.w.t */, VE::BCFWazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4435 { 126 /* baf.d */, VE::BCFDnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4436 { 126 /* baf.d */, VE::BCFDnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4437 { 132 /* baf.d.nt */, VE::BCFDnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4438 { 132 /* baf.d.nt */, VE::BCFDnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4439 { 141 /* baf.d.t */, VE::BCFDnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4440 { 141 /* baf.d.t */, VE::BCFDnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4441 { 149 /* baf.l */, VE::BCFLnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4442 { 149 /* baf.l */, VE::BCFLnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4443 { 155 /* baf.l.nt */, VE::BCFLnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4444 { 155 /* baf.l.nt */, VE::BCFLnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4445 { 164 /* baf.l.t */, VE::BCFLnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4446 { 164 /* baf.l.t */, VE::BCFLnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4447 { 172 /* baf.s */, VE::BCFSnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4448 { 172 /* baf.s */, VE::BCFSnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4449 { 178 /* baf.s.nt */, VE::BCFSnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4450 { 178 /* baf.s.nt */, VE::BCFSnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4451 { 187 /* baf.s.t */, VE::BCFSnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4452 { 187 /* baf.s.t */, VE::BCFSnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4453 { 195 /* baf.w */, VE::BCFWnari, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4454 { 195 /* baf.w */, VE::BCFWnazi, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4455 { 201 /* baf.w.nt */, VE::BCFWnari_nt, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4456 { 201 /* baf.w.nt */, VE::BCFWnazi_nt, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4457 { 210 /* baf.w.t */, VE::BCFWnari_t, Convert__MEMri2_0, AMFBS_None, { MCK_MEMri }, },
4458 { 210 /* baf.w.t */, VE::BCFWnazi_t, Convert__MEMzi2_0, AMFBS_None, { MCK_MEMzi }, },
4459 { 218 /* br */, VE::BRCFDrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_I64, MCK_Imm }, },
4460 { 218 /* br */, VE::BRCFDrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_I64, MCK_Zero, MCK_Imm }, },
4461 { 218 /* br */, VE::BRCFDir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_I64, MCK_Imm }, },
4462 { 218 /* br */, VE::BRCFDiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4463 { 218 /* br */, VE::BRCFDrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_I64, MCK_Imm }, },
4464 { 218 /* br */, VE::BRCFDrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_I64, MCK_Zero, MCK_Imm }, },
4465 { 218 /* br */, VE::BRCFDir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_I64, MCK_Imm }, },
4466 { 218 /* br */, VE::BRCFDiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4467 { 218 /* br */, VE::BRCFDrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_I64, MCK_Imm }, },
4468 { 218 /* br */, VE::BRCFDrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_I64, MCK_Zero, MCK_Imm }, },
4469 { 218 /* br */, VE::BRCFDir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_I64, MCK_Imm }, },
4470 { 218 /* br */, VE::BRCFDiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_d_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4471 { 218 /* br */, VE::BRCFLrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_I64, MCK_Imm }, },
4472 { 218 /* br */, VE::BRCFLrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_I64, MCK_Zero, MCK_Imm }, },
4473 { 218 /* br */, VE::BRCFLir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_I64, MCK_Imm }, },
4474 { 218 /* br */, VE::BRCFLiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4475 { 218 /* br */, VE::BRCFLrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_I64, MCK_Imm }, },
4476 { 218 /* br */, VE::BRCFLrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_I64, MCK_Zero, MCK_Imm }, },
4477 { 218 /* br */, VE::BRCFLir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_I64, MCK_Imm }, },
4478 { 218 /* br */, VE::BRCFLiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4479 { 218 /* br */, VE::BRCFLrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_I64, MCK_Imm }, },
4480 { 218 /* br */, VE::BRCFLrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_I64, MCK_Zero, MCK_Imm }, },
4481 { 218 /* br */, VE::BRCFLir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_I64, MCK_Imm }, },
4482 { 218 /* br */, VE::BRCFLiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_l_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4483 { 218 /* br */, VE::BRCFSrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_F32, MCK_Imm }, },
4484 { 218 /* br */, VE::BRCFSrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_F32, MCK_Zero, MCK_Imm }, },
4485 { 218 /* br */, VE::BRCFSir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_F32, MCK_Imm }, },
4486 { 218 /* br */, VE::BRCFSiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4487 { 218 /* br */, VE::BRCFSrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_F32, MCK_Imm }, },
4488 { 218 /* br */, VE::BRCFSrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_F32, MCK_Zero, MCK_Imm }, },
4489 { 218 /* br */, VE::BRCFSir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_F32, MCK_Imm }, },
4490 { 218 /* br */, VE::BRCFSiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4491 { 218 /* br */, VE::BRCFSrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_F32, MCK_Imm }, },
4492 { 218 /* br */, VE::BRCFSrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_F32, MCK_Zero, MCK_Imm }, },
4493 { 218 /* br */, VE::BRCFSir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_F32, MCK_Imm }, },
4494 { 218 /* br */, VE::BRCFSiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_s_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4495 { 218 /* br */, VE::BRCFWrr, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_I32, MCK_Imm }, },
4496 { 218 /* br */, VE::BRCFWrz, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_I32, MCK_Zero, MCK_Imm }, },
4497 { 218 /* br */, VE::BRCFWir, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_I32, MCK_Imm }, },
4498 { 218 /* br */, VE::BRCFWiz, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4499 { 218 /* br */, VE::BRCFWrr_nt, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_I32, MCK_Imm }, },
4500 { 218 /* br */, VE::BRCFWrz_nt, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_I32, MCK_Zero, MCK_Imm }, },
4501 { 218 /* br */, VE::BRCFWir_nt, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_I32, MCK_Imm }, },
4502 { 218 /* br */, VE::BRCFWiz_nt, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_nt, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4503 { 218 /* br */, VE::BRCFWrr_t, Convert__CCOp1_0__Reg1_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_I32, MCK_Imm }, },
4504 { 218 /* br */, VE::BRCFWrz_t, Convert__CCOp1_0__Reg1_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_I32, MCK_Zero, MCK_Imm }, },
4505 { 218 /* br */, VE::BRCFWir_t, Convert__CCOp1_0__SImm71_2__Reg1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_I32, MCK_Imm }, },
4506 { 218 /* br */, VE::BRCFWiz_t, Convert__CCOp1_0__SImm71_2__Zero1_3__Imm1_4, AMFBS_None, { MCK_CCOp, MCK__DOT_w_DOT_t, MCK_SImm7, MCK_Zero, MCK_Imm }, },
4507 { 221 /* br.d */, VE::BRCFDa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4508 { 226 /* br.d.nt */, VE::BRCFDa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4509 { 234 /* br.d.t */, VE::BRCFDa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4510 { 241 /* br.l */, VE::BRCFLa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4511 { 246 /* br.l.nt */, VE::BRCFLa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4512 { 254 /* br.l.t */, VE::BRCFLa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4513 { 261 /* br.s */, VE::BRCFSa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4514 { 266 /* br.s.nt */, VE::BRCFSa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4515 { 274 /* br.s.t */, VE::BRCFSa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4516 { 281 /* br.w */, VE::BRCFWa, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4517 { 286 /* br.w.nt */, VE::BRCFWa_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4518 { 294 /* br.w.t */, VE::BRCFWa_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4519 { 301 /* braf.d */, VE::BRCFDna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4520 { 308 /* braf.d.nt */, VE::BRCFDna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4521 { 318 /* braf.d.t */, VE::BRCFDna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4522 { 327 /* braf.l */, VE::BRCFLna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4523 { 334 /* braf.l.nt */, VE::BRCFLna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4524 { 344 /* braf.l.t */, VE::BRCFLna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4525 { 353 /* braf.s */, VE::BRCFSna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4526 { 360 /* braf.s.nt */, VE::BRCFSna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4527 { 370 /* braf.s.t */, VE::BRCFSna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4528 { 379 /* braf.w */, VE::BRCFWna, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4529 { 386 /* braf.w.nt */, VE::BRCFWna_nt, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4530 { 396 /* braf.w.t */, VE::BRCFWna_t, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
4531 { 405 /* brv */, VE::BRVr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4532 { 405 /* brv */, VE::BRVm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
4533 { 409 /* bsic */, VE::BSICrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4534 { 409 /* bsic */, VE::BSICrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4535 { 409 /* bsic */, VE::BSICzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4536 { 409 /* bsic */, VE::BSICzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4537 { 414 /* bswp */, VE::BSWPri, Convert__Reg1_0__Reg1_1__UImm11_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm1 }, },
4538 { 414 /* bswp */, VE::BSWPmi, Convert__Reg1_0__MImm1_1__UImm11_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm1 }, },
4539 { 419 /* cas.l */, VE::CASLrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
4540 { 419 /* cas.l */, VE::CASLrii, Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_SImm7 }, },
4541 { 419 /* cas.l */, VE::CASLzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
4542 { 419 /* cas.l */, VE::CASLzii, Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_SImm7 }, },
4543 { 425 /* cas.w */, VE::CASWrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_I32 }, },
4544 { 425 /* cas.w */, VE::CASWrii, Convert__Reg1_0__MEMri2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_SImm7 }, },
4545 { 425 /* cas.w */, VE::CASWzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_I32 }, },
4546 { 425 /* cas.w */, VE::CASWzii, Convert__Reg1_0__MEMzi2_1__SImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_SImm7 }, },
4547 { 431 /* cmov.d. */, VE::CMOVDrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I64 }, },
4548 { 431 /* cmov.d. */, VE::CMOVDir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
4549 { 431 /* cmov.d. */, VE::CMOVDrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I64 }, },
4550 { 431 /* cmov.d. */, VE::CMOVDim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
4551 { 439 /* cmov.l. */, VE::CMOVLrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I64 }, },
4552 { 439 /* cmov.l. */, VE::CMOVLir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
4553 { 439 /* cmov.l. */, VE::CMOVLrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I64 }, },
4554 { 439 /* cmov.l. */, VE::CMOVLim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
4555 { 447 /* cmov.s. */, VE::CMOVSrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_F32 }, },
4556 { 447 /* cmov.s. */, VE::CMOVSir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
4557 { 447 /* cmov.s. */, VE::CMOVSrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_F32 }, },
4558 { 447 /* cmov.s. */, VE::CMOVSim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
4559 { 455 /* cmov.w. */, VE::CMOVWrr, Convert__Reg1_1__CCOp1_0__Reg1_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_I32 }, },
4560 { 455 /* cmov.w. */, VE::CMOVWir, Convert__Reg1_1__CCOp1_0__SImm71_3__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_I64, MCK_SImm7 }, },
4561 { 455 /* cmov.w. */, VE::CMOVWrm, Convert__Reg1_1__CCOp1_0__Reg1_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_I32 }, },
4562 { 455 /* cmov.w. */, VE::CMOVWim, Convert__Reg1_1__CCOp1_0__SImm71_3__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_CCOp, MCK_I64, MCK_MImm, MCK_SImm7 }, },
4563 { 463 /* cmps.l */, VE::CMPSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4564 { 463 /* cmps.l */, VE::CMPSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4565 { 463 /* cmps.l */, VE::CMPSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4566 { 463 /* cmps.l */, VE::CMPSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4567 { 470 /* cmps.w.sx */, VE::CMPSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4568 { 470 /* cmps.w.sx */, VE::CMPSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4569 { 470 /* cmps.w.sx */, VE::CMPSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4570 { 470 /* cmps.w.sx */, VE::CMPSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4571 { 480 /* cmps.w.zx */, VE::CMPSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4572 { 480 /* cmps.w.zx */, VE::CMPSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4573 { 480 /* cmps.w.zx */, VE::CMPSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4574 { 480 /* cmps.w.zx */, VE::CMPSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4575 { 490 /* cmpu.l */, VE::CMPULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4576 { 490 /* cmpu.l */, VE::CMPULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4577 { 490 /* cmpu.l */, VE::CMPULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4578 { 490 /* cmpu.l */, VE::CMPULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4579 { 497 /* cmpu.w */, VE::CMPUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4580 { 497 /* cmpu.w */, VE::CMPUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4581 { 497 /* cmpu.w */, VE::CMPUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4582 { 497 /* cmpu.w */, VE::CMPUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4583 { 504 /* cvt.d.l */, VE::CVTDLr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4584 { 504 /* cvt.d.l */, VE::CVTDLi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
4585 { 512 /* cvt.d.q */, VE::CVTDQr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_F128 }, },
4586 { 512 /* cvt.d.q */, VE::CVTDQi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
4587 { 520 /* cvt.d.s */, VE::CVTDSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_F32 }, },
4588 { 520 /* cvt.d.s */, VE::CVTDSi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
4589 { 528 /* cvt.d.w */, VE::CVTDWr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I32 }, },
4590 { 528 /* cvt.d.w */, VE::CVTDWi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7 }, },
4591 { 536 /* cvt.l.d */, VE::CVTLDr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I64, MCK_I64 }, },
4592 { 536 /* cvt.l.d */, VE::CVTLDi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I64, MCK_SImm7 }, },
4593 { 544 /* cvt.q.d */, VE::CVTQDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F128, MCK_I64 }, },
4594 { 544 /* cvt.q.d */, VE::CVTQDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F128, MCK_SImm7 }, },
4595 { 552 /* cvt.q.s */, VE::CVTQSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F128, MCK_F32 }, },
4596 { 552 /* cvt.q.s */, VE::CVTQSi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F128, MCK_SImm7 }, },
4597 { 560 /* cvt.s.d */, VE::CVTSDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_I64 }, },
4598 { 560 /* cvt.s.d */, VE::CVTSDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
4599 { 568 /* cvt.s.q */, VE::CVTSQr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_F128 }, },
4600 { 568 /* cvt.s.q */, VE::CVTSQi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
4601 { 576 /* cvt.s.w */, VE::CVTSWr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_F32, MCK_I32 }, },
4602 { 576 /* cvt.s.w */, VE::CVTSWi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_F32, MCK_SImm7 }, },
4603 { 584 /* cvt.w.d.sx */, VE::CVTWDSXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_I64 }, },
4604 { 584 /* cvt.w.d.sx */, VE::CVTWDSXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
4605 { 595 /* cvt.w.d.zx */, VE::CVTWDZXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_I64 }, },
4606 { 595 /* cvt.w.d.zx */, VE::CVTWDZXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
4607 { 606 /* cvt.w.s.sx */, VE::CVTWSSXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_F32 }, },
4608 { 606 /* cvt.w.s.sx */, VE::CVTWSSXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
4609 { 617 /* cvt.w.s.zx */, VE::CVTWSZXr, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_F32 }, },
4610 { 617 /* cvt.w.s.zx */, VE::CVTWSZXi, Convert__Reg1_1__RDOp1_0__SImm71_2, AMFBS_None, { MCK_RDOp, MCK_I32, MCK_SImm7 }, },
4611 { 628 /* divs.l */, VE::DIVSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4612 { 628 /* divs.l */, VE::DIVSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4613 { 628 /* divs.l */, VE::DIVSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4614 { 628 /* divs.l */, VE::DIVSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4615 { 635 /* divs.w.sx */, VE::DIVSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4616 { 635 /* divs.w.sx */, VE::DIVSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4617 { 635 /* divs.w.sx */, VE::DIVSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4618 { 635 /* divs.w.sx */, VE::DIVSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4619 { 645 /* divs.w.zx */, VE::DIVSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4620 { 645 /* divs.w.zx */, VE::DIVSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4621 { 645 /* divs.w.zx */, VE::DIVSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4622 { 645 /* divs.w.zx */, VE::DIVSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4623 { 655 /* divu.l */, VE::DIVULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4624 { 655 /* divu.l */, VE::DIVULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4625 { 655 /* divu.l */, VE::DIVULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4626 { 655 /* divu.l */, VE::DIVULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4627 { 662 /* divu.w */, VE::DIVUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4628 { 662 /* divu.w */, VE::DIVUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4629 { 662 /* divu.w */, VE::DIVUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4630 { 662 /* divu.w */, VE::DIVUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4631 { 669 /* dld */, VE::DLDrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4632 { 669 /* dld */, VE::DLDrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4633 { 669 /* dld */, VE::DLDzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4634 { 669 /* dld */, VE::DLDzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4635 { 673 /* dldl.sx */, VE::DLDLSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4636 { 673 /* dldl.sx */, VE::DLDLSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4637 { 673 /* dldl.sx */, VE::DLDLSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4638 { 673 /* dldl.sx */, VE::DLDLSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4639 { 681 /* dldl.zx */, VE::DLDLZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4640 { 681 /* dldl.zx */, VE::DLDLZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4641 { 681 /* dldl.zx */, VE::DLDLZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4642 { 681 /* dldl.zx */, VE::DLDLZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4643 { 689 /* dldu */, VE::DLDUrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
4644 { 689 /* dldu */, VE::DLDUrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
4645 { 689 /* dldu */, VE::DLDUzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
4646 { 689 /* dldu */, VE::DLDUzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
4647 { 694 /* eqv */, VE::EQVrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4648 { 694 /* eqv */, VE::EQVrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4649 { 694 /* eqv */, VE::EQVri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4650 { 694 /* eqv */, VE::EQVim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4651 { 698 /* eqvm */, VE::EQVMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4652 { 703 /* fadd.d */, VE::FADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4653 { 703 /* fadd.d */, VE::FADDDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4654 { 703 /* fadd.d */, VE::FADDDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4655 { 703 /* fadd.d */, VE::FADDDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4656 { 710 /* fadd.q */, VE::FADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4657 { 710 /* fadd.q */, VE::FADDQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4658 { 710 /* fadd.q */, VE::FADDQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4659 { 710 /* fadd.q */, VE::FADDQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4660 { 717 /* fadd.s */, VE::FADDSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4661 { 717 /* fadd.s */, VE::FADDSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4662 { 717 /* fadd.s */, VE::FADDSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4663 { 717 /* fadd.s */, VE::FADDSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4664 { 724 /* fcmp.d */, VE::FCMPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4665 { 724 /* fcmp.d */, VE::FCMPDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4666 { 724 /* fcmp.d */, VE::FCMPDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4667 { 724 /* fcmp.d */, VE::FCMPDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4668 { 731 /* fcmp.q */, VE::FCMPQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_F128, MCK_F128 }, },
4669 { 731 /* fcmp.q */, VE::FCMPQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_F128, MCK_MImm }, },
4670 { 731 /* fcmp.q */, VE::FCMPQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_F128 }, },
4671 { 731 /* fcmp.q */, VE::FCMPQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4672 { 738 /* fcmp.s */, VE::FCMPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4673 { 738 /* fcmp.s */, VE::FCMPSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4674 { 738 /* fcmp.s */, VE::FCMPSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4675 { 738 /* fcmp.s */, VE::FCMPSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4676 { 745 /* fdiv.d */, VE::FDIVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4677 { 745 /* fdiv.d */, VE::FDIVDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4678 { 745 /* fdiv.d */, VE::FDIVDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4679 { 745 /* fdiv.d */, VE::FDIVDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4680 { 752 /* fdiv.s */, VE::FDIVSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4681 { 752 /* fdiv.s */, VE::FDIVSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4682 { 752 /* fdiv.s */, VE::FDIVSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4683 { 752 /* fdiv.s */, VE::FDIVSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4684 { 759 /* fencec */, VE::FENCEC, Convert__UImm31_0, AMFBS_None, { MCK_UImm3 }, },
4685 { 766 /* fencei */, VE::FENCEI, Convert_NoOperands, AMFBS_None, { }, },
4686 { 773 /* fencem */, VE::FENCEM, Convert__UImm21_0, AMFBS_None, { MCK_UImm2 }, },
4687 { 780 /* fidcr */, VE::FIDCRri, Convert__Reg1_0__Reg1_1__UImm31_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm3 }, },
4688 { 780 /* fidcr */, VE::FIDCRii, Convert__Reg1_0__SImm71_1__UImm31_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_UImm3 }, },
4689 { 786 /* fmax.d */, VE::FMAXDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4690 { 786 /* fmax.d */, VE::FMAXDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4691 { 786 /* fmax.d */, VE::FMAXDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4692 { 786 /* fmax.d */, VE::FMAXDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4693 { 793 /* fmax.s */, VE::FMAXSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4694 { 793 /* fmax.s */, VE::FMAXSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4695 { 793 /* fmax.s */, VE::FMAXSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4696 { 793 /* fmax.s */, VE::FMAXSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4697 { 800 /* fmin.d */, VE::FMINDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4698 { 800 /* fmin.d */, VE::FMINDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4699 { 800 /* fmin.d */, VE::FMINDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4700 { 800 /* fmin.d */, VE::FMINDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4701 { 807 /* fmin.s */, VE::FMINSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4702 { 807 /* fmin.s */, VE::FMINSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4703 { 807 /* fmin.s */, VE::FMINSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4704 { 807 /* fmin.s */, VE::FMINSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4705 { 814 /* fmul.d */, VE::FMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4706 { 814 /* fmul.d */, VE::FMULDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4707 { 814 /* fmul.d */, VE::FMULDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4708 { 814 /* fmul.d */, VE::FMULDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4709 { 821 /* fmul.q */, VE::FMULQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4710 { 821 /* fmul.q */, VE::FMULQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4711 { 821 /* fmul.q */, VE::FMULQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4712 { 821 /* fmul.q */, VE::FMULQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4713 { 828 /* fmul.s */, VE::FMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4714 { 828 /* fmul.s */, VE::FMULSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4715 { 828 /* fmul.s */, VE::FMULSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4716 { 828 /* fmul.s */, VE::FMULSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4717 { 835 /* fsub.d */, VE::FSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4718 { 835 /* fsub.d */, VE::FSUBDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4719 { 835 /* fsub.d */, VE::FSUBDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4720 { 835 /* fsub.d */, VE::FSUBDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4721 { 842 /* fsub.q */, VE::FSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_F128 }, },
4722 { 842 /* fsub.q */, VE::FSUBQrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_F128, MCK_MImm }, },
4723 { 842 /* fsub.q */, VE::FSUBQir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_F128 }, },
4724 { 842 /* fsub.q */, VE::FSUBQim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F128, MCK_SImm7, MCK_MImm }, },
4725 { 849 /* fsub.s */, VE::FSUBSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_F32 }, },
4726 { 849 /* fsub.s */, VE::FSUBSrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_F32, MCK_MImm }, },
4727 { 849 /* fsub.s */, VE::FSUBSir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_F32 }, },
4728 { 849 /* fsub.s */, VE::FSUBSim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_F32, MCK_SImm7, MCK_MImm }, },
4729 { 856 /* lcr */, VE::LCRrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4730 { 856 /* lcr */, VE::LCRrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
4731 { 856 /* lcr */, VE::LCRir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4732 { 856 /* lcr */, VE::LCRiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
4733 { 860 /* ld */, VE::LDrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4734 { 860 /* ld */, VE::LDrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4735 { 860 /* ld */, VE::LDzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4736 { 860 /* ld */, VE::LDzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4737 { 863 /* ld1b.sx */, VE::LD1BSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4738 { 863 /* ld1b.sx */, VE::LD1BSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4739 { 863 /* ld1b.sx */, VE::LD1BSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4740 { 863 /* ld1b.sx */, VE::LD1BSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4741 { 871 /* ld1b.zx */, VE::LD1BZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4742 { 871 /* ld1b.zx */, VE::LD1BZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4743 { 871 /* ld1b.zx */, VE::LD1BZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4744 { 871 /* ld1b.zx */, VE::LD1BZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4745 { 879 /* ld2b.sx */, VE::LD2BSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4746 { 879 /* ld2b.sx */, VE::LD2BSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4747 { 879 /* ld2b.sx */, VE::LD2BSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4748 { 879 /* ld2b.sx */, VE::LD2BSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4749 { 887 /* ld2b.zx */, VE::LD2BZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4750 { 887 /* ld2b.zx */, VE::LD2BZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4751 { 887 /* ld2b.zx */, VE::LD2BZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4752 { 887 /* ld2b.zx */, VE::LD2BZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4753 { 895 /* ldl.sx */, VE::LDLSXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4754 { 895 /* ldl.sx */, VE::LDLSXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4755 { 895 /* ldl.sx */, VE::LDLSXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4756 { 895 /* ldl.sx */, VE::LDLSXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4757 { 902 /* ldl.zx */, VE::LDLZXrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
4758 { 902 /* ldl.zx */, VE::LDLZXrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
4759 { 902 /* ldl.zx */, VE::LDLZXzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
4760 { 902 /* ldl.zx */, VE::LDLZXzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
4761 { 909 /* ldu */, VE::LDUrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
4762 { 909 /* ldu */, VE::LDUrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
4763 { 909 /* ldu */, VE::LDUzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
4764 { 909 /* ldu */, VE::LDUzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
4765 { 913 /* ldz */, VE::LDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4766 { 913 /* ldz */, VE::LDZm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
4767 { 917 /* lea */, VE::LEArii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4768 { 917 /* lea */, VE::LEArri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4769 { 917 /* lea */, VE::LEAzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4770 { 917 /* lea */, VE::LEAzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4771 { 921 /* lea.sl */, VE::LEASLrii, Convert__Reg1_0__MEMrii3_1, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
4772 { 921 /* lea.sl */, VE::LEASLrri, Convert__Reg1_0__MEMrri3_1, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
4773 { 921 /* lea.sl */, VE::LEASLzii, Convert__Reg1_0__MEMzii3_1, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
4774 { 921 /* lea.sl */, VE::LEASLzri, Convert__Reg1_0__MEMzri3_1, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
4775 { 928 /* lfr */, VE::LFRr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4776 { 928 /* lfr */, VE::LFRi, Convert__UImm61_0, AMFBS_None, { MCK_UImm6 }, },
4777 { 932 /* lhm.b */, VE::LHMBri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4778 { 932 /* lhm.b */, VE::LHMBzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4779 { 938 /* lhm.h */, VE::LHMHri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4780 { 938 /* lhm.h */, VE::LHMHzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4781 { 944 /* lhm.l */, VE::LHMLri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4782 { 944 /* lhm.l */, VE::LHMLzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4783 { 950 /* lhm.w */, VE::LHMWri, Convert__Reg1_0__MEMri2_1, AMFBS_None, { MCK_I64, MCK_MEMri }, },
4784 { 950 /* lhm.w */, VE::LHMWzi, Convert__Reg1_0__MEMzi2_1, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
4785 { 956 /* lpm */, VE::LPM, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4786 { 960 /* lsv */, VE::LSVrr, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_I64, MCK__41_, MCK_I64 }, },
4787 { 960 /* lsv */, VE::LSVrm, Convert__Reg1_0__Reg1_2__MImm1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_I64, MCK__41_, MCK_MImm }, },
4788 { 960 /* lsv */, VE::LSVir, Convert__Reg1_0__UImm71_2__Reg1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_UImm7, MCK__41_, MCK_I64 }, },
4789 { 960 /* lsv */, VE::LSVim, Convert__Reg1_0__UImm71_2__MImm1_4, AMFBS_None, { MCK_V64, MCK__40_, MCK_UImm7, MCK__41_, MCK_MImm }, },
4790 { 964 /* lvix */, VE::LVIXr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4791 { 964 /* lvix */, VE::LVIXi, Convert__UImm61_0, AMFBS_None, { MCK_UImm6 }, },
4792 { 969 /* lvl */, VE::LVLr, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
4793 { 969 /* lvl */, VE::LVLi, Convert__SImm71_0, AMFBS_None, { MCK_SImm7 }, },
4794 { 973 /* lvm */, VE::LVMrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_I64, MCK_I64 }, },
4795 { 973 /* lvm */, VE::LVMrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_VM, MCK_I64, MCK_MImm }, },
4796 { 973 /* lvm */, VE::LVMir, Convert__Reg1_0__UImm21_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_UImm2, MCK_I64 }, },
4797 { 973 /* lvm */, VE::LVMim, Convert__Reg1_0__UImm21_1__MImm1_2, AMFBS_None, { MCK_VM, MCK_UImm2, MCK_MImm }, },
4798 { 977 /* lvs */, VE::LVSvr, Convert__Reg1_0__Reg1_1__Reg1_3, AMFBS_None, { MCK_I64, MCK_V64, MCK__40_, MCK_I64, MCK__41_ }, },
4799 { 977 /* lvs */, VE::LVSvi, Convert__Reg1_0__Reg1_1__UImm71_3, AMFBS_None, { MCK_I64, MCK_V64, MCK__40_, MCK_UImm7, MCK__41_ }, },
4800 { 981 /* lzvm */, VE::LZVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
4801 { 986 /* maxs.l */, VE::MAXSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4802 { 986 /* maxs.l */, VE::MAXSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4803 { 986 /* maxs.l */, VE::MAXSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4804 { 986 /* maxs.l */, VE::MAXSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4805 { 993 /* maxs.w.sx */, VE::MAXSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4806 { 993 /* maxs.w.sx */, VE::MAXSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4807 { 993 /* maxs.w.sx */, VE::MAXSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4808 { 993 /* maxs.w.sx */, VE::MAXSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4809 { 1003 /* maxs.w.zx */, VE::MAXSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4810 { 1003 /* maxs.w.zx */, VE::MAXSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4811 { 1003 /* maxs.w.zx */, VE::MAXSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4812 { 1003 /* maxs.w.zx */, VE::MAXSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4813 { 1013 /* mins.l */, VE::MINSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4814 { 1013 /* mins.l */, VE::MINSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4815 { 1013 /* mins.l */, VE::MINSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4816 { 1013 /* mins.l */, VE::MINSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4817 { 1020 /* mins.w.sx */, VE::MINSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4818 { 1020 /* mins.w.sx */, VE::MINSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4819 { 1020 /* mins.w.sx */, VE::MINSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4820 { 1020 /* mins.w.sx */, VE::MINSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4821 { 1030 /* mins.w.zx */, VE::MINSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4822 { 1030 /* mins.w.zx */, VE::MINSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4823 { 1030 /* mins.w.zx */, VE::MINSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4824 { 1030 /* mins.w.zx */, VE::MINSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4825 { 1040 /* monc */, VE::MONC, Convert_NoOperands, AMFBS_None, { }, },
4826 { 1045 /* monc.hdb */, VE::MONCHDB, Convert_NoOperands, AMFBS_None, { }, },
4827 { 1054 /* mrg */, VE::MRGrr, Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4828 { 1054 /* mrg */, VE::MRGrm, Convert__Reg1_0__Reg1_1__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4829 { 1054 /* mrg */, VE::MRGir, Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4830 { 1054 /* mrg */, VE::MRGim, Convert__Reg1_0__SImm71_1__MImm1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4831 { 1058 /* muls.l */, VE::MULSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4832 { 1058 /* muls.l */, VE::MULSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4833 { 1058 /* muls.l */, VE::MULSLri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4834 { 1058 /* muls.l */, VE::MULSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4835 { 1065 /* muls.l.w */, VE::MULSLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I32, MCK_I32 }, },
4836 { 1065 /* muls.l.w */, VE::MULSLWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I32, MCK_MImm }, },
4837 { 1065 /* muls.l.w */, VE::MULSLWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I32 }, },
4838 { 1065 /* muls.l.w */, VE::MULSLWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4839 { 1074 /* muls.w.sx */, VE::MULSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4840 { 1074 /* muls.w.sx */, VE::MULSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4841 { 1074 /* muls.w.sx */, VE::MULSWSXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4842 { 1074 /* muls.w.sx */, VE::MULSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4843 { 1084 /* muls.w.zx */, VE::MULSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4844 { 1084 /* muls.w.zx */, VE::MULSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4845 { 1084 /* muls.w.zx */, VE::MULSWZXri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4846 { 1084 /* muls.w.zx */, VE::MULSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4847 { 1094 /* mulu.l */, VE::MULULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4848 { 1094 /* mulu.l */, VE::MULULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4849 { 1094 /* mulu.l */, VE::MULULri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4850 { 1094 /* mulu.l */, VE::MULULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4851 { 1101 /* mulu.w */, VE::MULUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
4852 { 1101 /* mulu.w */, VE::MULUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
4853 { 1101 /* mulu.w */, VE::MULUWri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
4854 { 1101 /* mulu.w */, VE::MULUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
4855 { 1108 /* negm */, VE::NEGMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
4856 { 1113 /* nnd */, VE::NNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4857 { 1113 /* nnd */, VE::NNDrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4858 { 1113 /* nnd */, VE::NNDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4859 { 1113 /* nnd */, VE::NNDim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4860 { 1117 /* nndm */, VE::NNDMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4861 { 1122 /* nop */, VE::NOP, Convert_NoOperands, AMFBS_None, { }, },
4862 { 1126 /* or */, VE::ORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
4863 { 1126 /* or */, VE::ORrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
4864 { 1126 /* or */, VE::ORri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
4865 { 1126 /* or */, VE::ORim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
4866 { 1129 /* orm */, VE::ORMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
4867 { 1133 /* pcnt */, VE::PCNTr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4868 { 1133 /* pcnt */, VE::PCNTm, Convert__Reg1_0__MImm1_1, AMFBS_None, { MCK_I64, MCK_MImm }, },
4869 { 1138 /* pcvm */, VE::PCVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
4870 { 1143 /* pfch */, VE::PFCHrii, Convert__MEMrii3_0, AMFBS_None, { MCK_MEMrii }, },
4871 { 1143 /* pfch */, VE::PFCHrri, Convert__MEMrri3_0, AMFBS_None, { MCK_MEMrri }, },
4872 { 1143 /* pfch */, VE::PFCHzii, Convert__MEMzii3_0, AMFBS_None, { MCK_MEMzii }, },
4873 { 1143 /* pfch */, VE::PFCHzri, Convert__MEMzri3_0, AMFBS_None, { MCK_MEMzri }, },
4874 { 1148 /* pfchv */, VE::PFCHVrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4875 { 1148 /* pfchv */, VE::PFCHVrz, Convert__Reg1_0__Zero1_1, AMFBS_None, { MCK_I64, MCK_Zero }, },
4876 { 1148 /* pfchv */, VE::PFCHVir, Convert__SImm71_0__Reg1_1, AMFBS_None, { MCK_SImm7, MCK_I64 }, },
4877 { 1148 /* pfchv */, VE::PFCHViz, Convert__SImm71_0__Zero1_1, AMFBS_None, { MCK_SImm7, MCK_Zero }, },
4878 { 1154 /* pfchv.nc */, VE::PFCHVNCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_I64 }, },
4879 { 1154 /* pfchv.nc */, VE::PFCHVNCrz, Convert__Reg1_0__Zero1_1, AMFBS_None, { MCK_I64, MCK_Zero }, },
4880 { 1154 /* pfchv.nc */, VE::PFCHVNCir, Convert__SImm71_0__Reg1_1, AMFBS_None, { MCK_SImm7, MCK_I64 }, },
4881 { 1154 /* pfchv.nc */, VE::PFCHVNCiz, Convert__SImm71_0__Zero1_1, AMFBS_None, { MCK_SImm7, MCK_Zero }, },
4882 { 1163 /* pvadds */, VE::PVADDSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4883 { 1163 /* pvadds */, VE::PVADDSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4884 { 1163 /* pvadds */, VE::PVADDSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4885 { 1163 /* pvadds */, VE::PVADDSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4886 { 1163 /* pvadds */, VE::PVADDSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4887 { 1163 /* pvadds */, VE::PVADDSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4888 { 1170 /* pvadds.lo */, VE::PVADDSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4889 { 1170 /* pvadds.lo */, VE::PVADDSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4890 { 1170 /* pvadds.lo */, VE::PVADDSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4891 { 1170 /* pvadds.lo */, VE::PVADDSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4892 { 1170 /* pvadds.lo */, VE::PVADDSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4893 { 1170 /* pvadds.lo */, VE::PVADDSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4894 { 1180 /* pvadds.up */, VE::PVADDSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4895 { 1180 /* pvadds.up */, VE::PVADDSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4896 { 1180 /* pvadds.up */, VE::PVADDSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4897 { 1180 /* pvadds.up */, VE::PVADDSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4898 { 1180 /* pvadds.up */, VE::PVADDSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4899 { 1180 /* pvadds.up */, VE::PVADDSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4900 { 1190 /* pvaddu */, VE::PVADDUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4901 { 1190 /* pvaddu */, VE::PVADDUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4902 { 1190 /* pvaddu */, VE::PVADDUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4903 { 1190 /* pvaddu */, VE::PVADDUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4904 { 1190 /* pvaddu */, VE::PVADDUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4905 { 1190 /* pvaddu */, VE::PVADDUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4906 { 1197 /* pvaddu.lo */, VE::PVADDULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4907 { 1197 /* pvaddu.lo */, VE::PVADDULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4908 { 1197 /* pvaddu.lo */, VE::PVADDULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4909 { 1197 /* pvaddu.lo */, VE::PVADDULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4910 { 1197 /* pvaddu.lo */, VE::PVADDULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4911 { 1197 /* pvaddu.lo */, VE::PVADDULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4912 { 1207 /* pvaddu.up */, VE::PVADDUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4913 { 1207 /* pvaddu.up */, VE::PVADDUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4914 { 1207 /* pvaddu.up */, VE::PVADDUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4915 { 1207 /* pvaddu.up */, VE::PVADDUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4916 { 1207 /* pvaddu.up */, VE::PVADDUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4917 { 1207 /* pvaddu.up */, VE::PVADDUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4918 { 1217 /* pvand */, VE::PVANDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4919 { 1217 /* pvand */, VE::PVANDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4920 { 1217 /* pvand */, VE::PVANDmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4921 { 1217 /* pvand */, VE::PVANDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4922 { 1217 /* pvand */, VE::PVANDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4923 { 1217 /* pvand */, VE::PVANDmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
4924 { 1223 /* pvand.lo */, VE::PVANDLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4925 { 1223 /* pvand.lo */, VE::PVANDLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4926 { 1223 /* pvand.lo */, VE::PVANDLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4927 { 1223 /* pvand.lo */, VE::PVANDLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4928 { 1223 /* pvand.lo */, VE::PVANDLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4929 { 1223 /* pvand.lo */, VE::PVANDLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4930 { 1232 /* pvand.up */, VE::PVANDUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
4931 { 1232 /* pvand.up */, VE::PVANDUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4932 { 1232 /* pvand.up */, VE::PVANDUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4933 { 1232 /* pvand.up */, VE::PVANDUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
4934 { 1232 /* pvand.up */, VE::PVANDUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4935 { 1232 /* pvand.up */, VE::PVANDUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
4936 { 1241 /* pvbrd */, VE::PVBRDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I64 }, },
4937 { 1241 /* pvbrd */, VE::PVBRDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
4938 { 1241 /* pvbrd */, VE::PVBRDrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_VM512 }, },
4939 { 1241 /* pvbrd */, VE::PVBRDim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM512 }, },
4940 { 1247 /* pvbrv */, VE::PVBRVv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4941 { 1247 /* pvbrv */, VE::PVBRVvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4942 { 1253 /* pvbrv.lo */, VE::PVBRVLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4943 { 1253 /* pvbrv.lo */, VE::PVBRVLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4944 { 1262 /* pvbrv.up */, VE::PVBRVUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4945 { 1262 /* pvbrv.up */, VE::PVBRVUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4946 { 1271 /* pvcmps */, VE::PVCMPSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4947 { 1271 /* pvcmps */, VE::PVCMPSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4948 { 1271 /* pvcmps */, VE::PVCMPSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4949 { 1271 /* pvcmps */, VE::PVCMPSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4950 { 1271 /* pvcmps */, VE::PVCMPSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4951 { 1271 /* pvcmps */, VE::PVCMPSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4952 { 1278 /* pvcmps.lo */, VE::PVCMPSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4953 { 1278 /* pvcmps.lo */, VE::PVCMPSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4954 { 1278 /* pvcmps.lo */, VE::PVCMPSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4955 { 1278 /* pvcmps.lo */, VE::PVCMPSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4956 { 1278 /* pvcmps.lo */, VE::PVCMPSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4957 { 1278 /* pvcmps.lo */, VE::PVCMPSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4958 { 1288 /* pvcmps.up */, VE::PVCMPSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4959 { 1288 /* pvcmps.up */, VE::PVCMPSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4960 { 1288 /* pvcmps.up */, VE::PVCMPSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4961 { 1288 /* pvcmps.up */, VE::PVCMPSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4962 { 1288 /* pvcmps.up */, VE::PVCMPSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4963 { 1288 /* pvcmps.up */, VE::PVCMPSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4964 { 1298 /* pvcmpu */, VE::PVCMPUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4965 { 1298 /* pvcmpu */, VE::PVCMPUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4966 { 1298 /* pvcmpu */, VE::PVCMPUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4967 { 1298 /* pvcmpu */, VE::PVCMPUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4968 { 1298 /* pvcmpu */, VE::PVCMPUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4969 { 1298 /* pvcmpu */, VE::PVCMPUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
4970 { 1305 /* pvcmpu.lo */, VE::PVCMPULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
4971 { 1305 /* pvcmpu.lo */, VE::PVCMPULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4972 { 1305 /* pvcmpu.lo */, VE::PVCMPULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4973 { 1305 /* pvcmpu.lo */, VE::PVCMPULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
4974 { 1305 /* pvcmpu.lo */, VE::PVCMPULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4975 { 1305 /* pvcmpu.lo */, VE::PVCMPULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4976 { 1315 /* pvcmpu.up */, VE::PVCMPUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4977 { 1315 /* pvcmpu.up */, VE::PVCMPUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4978 { 1315 /* pvcmpu.up */, VE::PVCMPUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
4979 { 1315 /* pvcmpu.up */, VE::PVCMPUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
4980 { 1315 /* pvcmpu.up */, VE::PVCMPUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
4981 { 1315 /* pvcmpu.up */, VE::PVCMPUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
4982 { 1325 /* pvcvt.s.w */, VE::PVCVTSWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4983 { 1325 /* pvcvt.s.w */, VE::PVCVTSWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
4984 { 1335 /* pvcvt.s.w.lo */, VE::PVCVTSWLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4985 { 1335 /* pvcvt.s.w.lo */, VE::PVCVTSWLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4986 { 1348 /* pvcvt.s.w.up */, VE::PVCVTSWUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
4987 { 1348 /* pvcvt.s.w.up */, VE::PVCVTSWUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
4988 { 1361 /* pvcvt.w.s */, VE::PVCVTWSv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4989 { 1361 /* pvcvt.w.s */, VE::PVCVTWSvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM512 }, },
4990 { 1371 /* pvcvt.w.s.lo */, VE::PVCVTWSLOv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4991 { 1371 /* pvcvt.w.s.lo */, VE::PVCVTWSLOvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
4992 { 1384 /* pvcvt.w.s.up */, VE::PVCVTWSUPv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
4993 { 1384 /* pvcvt.w.s.up */, VE::PVCVTWSUPvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
4994 { 1397 /* pveqv */, VE::PVEQVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
4995 { 1397 /* pveqv */, VE::PVEQVvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
4996 { 1397 /* pveqv */, VE::PVEQVmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
4997 { 1397 /* pveqv */, VE::PVEQVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
4998 { 1397 /* pveqv */, VE::PVEQVvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
4999 { 1397 /* pveqv */, VE::PVEQVmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
5000 { 1403 /* pveqv.lo */, VE::PVEQVLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5001 { 1403 /* pveqv.lo */, VE::PVEQVLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5002 { 1403 /* pveqv.lo */, VE::PVEQVLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5003 { 1403 /* pveqv.lo */, VE::PVEQVLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5004 { 1403 /* pveqv.lo */, VE::PVEQVLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5005 { 1403 /* pveqv.lo */, VE::PVEQVLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5006 { 1412 /* pveqv.up */, VE::PVEQVUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5007 { 1412 /* pveqv.up */, VE::PVEQVUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5008 { 1412 /* pveqv.up */, VE::PVEQVUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5009 { 1412 /* pveqv.up */, VE::PVEQVUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5010 { 1412 /* pveqv.up */, VE::PVEQVUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5011 { 1412 /* pveqv.up */, VE::PVEQVUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5012 { 1421 /* pvfadd */, VE::PVFADDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5013 { 1421 /* pvfadd */, VE::PVFADDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5014 { 1421 /* pvfadd */, VE::PVFADDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5015 { 1421 /* pvfadd */, VE::PVFADDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5016 { 1421 /* pvfadd */, VE::PVFADDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5017 { 1421 /* pvfadd */, VE::PVFADDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5018 { 1428 /* pvfadd.lo */, VE::PVFADDLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5019 { 1428 /* pvfadd.lo */, VE::PVFADDLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5020 { 1428 /* pvfadd.lo */, VE::PVFADDLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5021 { 1428 /* pvfadd.lo */, VE::PVFADDLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5022 { 1428 /* pvfadd.lo */, VE::PVFADDLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5023 { 1428 /* pvfadd.lo */, VE::PVFADDLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5024 { 1438 /* pvfadd.up */, VE::PVFADDUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5025 { 1438 /* pvfadd.up */, VE::PVFADDUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5026 { 1438 /* pvfadd.up */, VE::PVFADDUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5027 { 1438 /* pvfadd.up */, VE::PVFADDUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5028 { 1438 /* pvfadd.up */, VE::PVFADDUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5029 { 1438 /* pvfadd.up */, VE::PVFADDUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5030 { 1448 /* pvfcmp */, VE::PVFCMPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5031 { 1448 /* pvfcmp */, VE::PVFCMPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5032 { 1448 /* pvfcmp */, VE::PVFCMPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5033 { 1448 /* pvfcmp */, VE::PVFCMPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5034 { 1448 /* pvfcmp */, VE::PVFCMPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5035 { 1448 /* pvfcmp */, VE::PVFCMPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5036 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5037 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5038 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5039 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5040 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5041 { 1455 /* pvfcmp.lo */, VE::PVFCMPLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5042 { 1465 /* pvfcmp.up */, VE::PVFCMPUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5043 { 1465 /* pvfcmp.up */, VE::PVFCMPUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5044 { 1465 /* pvfcmp.up */, VE::PVFCMPUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5045 { 1465 /* pvfcmp.up */, VE::PVFCMPUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5046 { 1465 /* pvfcmp.up */, VE::PVFCMPUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5047 { 1465 /* pvfcmp.up */, VE::PVFCMPUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5048 { 1475 /* pvfmad */, VE::PVFMADrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5049 { 1475 /* pvfmad */, VE::PVFMADvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5050 { 1475 /* pvfmad */, VE::PVFMADvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5051 { 1475 /* pvfmad */, VE::PVFMADviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5052 { 1475 /* pvfmad */, VE::PVFMADivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5053 { 1475 /* pvfmad */, VE::PVFMADrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
5054 { 1475 /* pvfmad */, VE::PVFMADvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5055 { 1475 /* pvfmad */, VE::PVFMADvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5056 { 1475 /* pvfmad */, VE::PVFMADvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5057 { 1475 /* pvfmad */, VE::PVFMADivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
5058 { 1482 /* pvfmad.lo */, VE::PVFMADLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5059 { 1482 /* pvfmad.lo */, VE::PVFMADLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5060 { 1482 /* pvfmad.lo */, VE::PVFMADLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5061 { 1482 /* pvfmad.lo */, VE::PVFMADLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5062 { 1482 /* pvfmad.lo */, VE::PVFMADLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5063 { 1482 /* pvfmad.lo */, VE::PVFMADLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5064 { 1482 /* pvfmad.lo */, VE::PVFMADLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5065 { 1482 /* pvfmad.lo */, VE::PVFMADLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5066 { 1482 /* pvfmad.lo */, VE::PVFMADLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5067 { 1482 /* pvfmad.lo */, VE::PVFMADLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5068 { 1492 /* pvfmad.up */, VE::PVFMADUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
5069 { 1492 /* pvfmad.up */, VE::PVFMADUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
5070 { 1492 /* pvfmad.up */, VE::PVFMADUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5071 { 1492 /* pvfmad.up */, VE::PVFMADUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5072 { 1492 /* pvfmad.up */, VE::PVFMADUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5073 { 1492 /* pvfmad.up */, VE::PVFMADUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
5074 { 1492 /* pvfmad.up */, VE::PVFMADUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5075 { 1492 /* pvfmad.up */, VE::PVFMADUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5076 { 1492 /* pvfmad.up */, VE::PVFMADUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5077 { 1492 /* pvfmad.up */, VE::PVFMADUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5078 { 1502 /* pvfmax */, VE::PVFMAXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5079 { 1502 /* pvfmax */, VE::PVFMAXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5080 { 1502 /* pvfmax */, VE::PVFMAXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5081 { 1502 /* pvfmax */, VE::PVFMAXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5082 { 1502 /* pvfmax */, VE::PVFMAXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5083 { 1502 /* pvfmax */, VE::PVFMAXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5084 { 1509 /* pvfmax.lo */, VE::PVFMAXLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5085 { 1509 /* pvfmax.lo */, VE::PVFMAXLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5086 { 1509 /* pvfmax.lo */, VE::PVFMAXLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5087 { 1509 /* pvfmax.lo */, VE::PVFMAXLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5088 { 1509 /* pvfmax.lo */, VE::PVFMAXLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5089 { 1509 /* pvfmax.lo */, VE::PVFMAXLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5090 { 1519 /* pvfmax.up */, VE::PVFMAXUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5091 { 1519 /* pvfmax.up */, VE::PVFMAXUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5092 { 1519 /* pvfmax.up */, VE::PVFMAXUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5093 { 1519 /* pvfmax.up */, VE::PVFMAXUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5094 { 1519 /* pvfmax.up */, VE::PVFMAXUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5095 { 1519 /* pvfmax.up */, VE::PVFMAXUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5096 { 1529 /* pvfmin */, VE::PVFMINrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5097 { 1529 /* pvfmin */, VE::PVFMINvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5098 { 1529 /* pvfmin */, VE::PVFMINiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5099 { 1529 /* pvfmin */, VE::PVFMINrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5100 { 1529 /* pvfmin */, VE::PVFMINvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5101 { 1529 /* pvfmin */, VE::PVFMINivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5102 { 1536 /* pvfmin.lo */, VE::PVFMINLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5103 { 1536 /* pvfmin.lo */, VE::PVFMINLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5104 { 1536 /* pvfmin.lo */, VE::PVFMINLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5105 { 1536 /* pvfmin.lo */, VE::PVFMINLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5106 { 1536 /* pvfmin.lo */, VE::PVFMINLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5107 { 1536 /* pvfmin.lo */, VE::PVFMINLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5108 { 1546 /* pvfmin.up */, VE::PVFMINUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5109 { 1546 /* pvfmin.up */, VE::PVFMINUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5110 { 1546 /* pvfmin.up */, VE::PVFMINUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5111 { 1546 /* pvfmin.up */, VE::PVFMINUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5112 { 1546 /* pvfmin.up */, VE::PVFMINUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5113 { 1546 /* pvfmin.up */, VE::PVFMINUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5114 { 1556 /* pvfmk.s.lo. */, VE::PVFMKSLOv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5115 { 1556 /* pvfmk.s.lo. */, VE::PVFMKSLOvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5116 { 1568 /* pvfmk.s.lo.af */, VE::PVFMKSLOna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5117 { 1568 /* pvfmk.s.lo.af */, VE::PVFMKSLOnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5118 { 1582 /* pvfmk.s.lo.at */, VE::PVFMKSLOa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5119 { 1582 /* pvfmk.s.lo.at */, VE::PVFMKSLOam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5120 { 1596 /* pvfmk.s.up. */, VE::PVFMKSUPv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5121 { 1596 /* pvfmk.s.up. */, VE::PVFMKSUPvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5122 { 1608 /* pvfmk.s.up.af */, VE::PVFMKSUPna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5123 { 1608 /* pvfmk.s.up.af */, VE::PVFMKSUPnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5124 { 1622 /* pvfmk.s.up.at */, VE::PVFMKSUPa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5125 { 1622 /* pvfmk.s.up.at */, VE::PVFMKSUPam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5126 { 1636 /* pvfmk.w.up. */, VE::PVFMKWUPv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5127 { 1636 /* pvfmk.w.up. */, VE::PVFMKWUPvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5128 { 1648 /* pvfmk.w.up.af */, VE::PVFMKWUPna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5129 { 1648 /* pvfmk.w.up.af */, VE::PVFMKWUPnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5130 { 1662 /* pvfmk.w.up.at */, VE::PVFMKWUPa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5131 { 1662 /* pvfmk.w.up.at */, VE::PVFMKWUPam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5132 { 1676 /* pvfmsb */, VE::PVFMSBrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5133 { 1676 /* pvfmsb */, VE::PVFMSBvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5134 { 1676 /* pvfmsb */, VE::PVFMSBvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5135 { 1676 /* pvfmsb */, VE::PVFMSBviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5136 { 1676 /* pvfmsb */, VE::PVFMSBivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5137 { 1676 /* pvfmsb */, VE::PVFMSBrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
5138 { 1676 /* pvfmsb */, VE::PVFMSBvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5139 { 1676 /* pvfmsb */, VE::PVFMSBvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5140 { 1676 /* pvfmsb */, VE::PVFMSBvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5141 { 1676 /* pvfmsb */, VE::PVFMSBivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
5142 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5143 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5144 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5145 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5146 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5147 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5148 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5149 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5150 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5151 { 1683 /* pvfmsb.lo */, VE::PVFMSBLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5152 { 1693 /* pvfmsb.up */, VE::PVFMSBUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
5153 { 1693 /* pvfmsb.up */, VE::PVFMSBUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
5154 { 1693 /* pvfmsb.up */, VE::PVFMSBUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5155 { 1693 /* pvfmsb.up */, VE::PVFMSBUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5156 { 1693 /* pvfmsb.up */, VE::PVFMSBUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5157 { 1693 /* pvfmsb.up */, VE::PVFMSBUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
5158 { 1693 /* pvfmsb.up */, VE::PVFMSBUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5159 { 1693 /* pvfmsb.up */, VE::PVFMSBUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5160 { 1693 /* pvfmsb.up */, VE::PVFMSBUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5161 { 1693 /* pvfmsb.up */, VE::PVFMSBUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5162 { 1703 /* pvfmul */, VE::PVFMULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5163 { 1703 /* pvfmul */, VE::PVFMULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5164 { 1703 /* pvfmul */, VE::PVFMULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5165 { 1703 /* pvfmul */, VE::PVFMULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5166 { 1703 /* pvfmul */, VE::PVFMULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5167 { 1703 /* pvfmul */, VE::PVFMULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5168 { 1710 /* pvfmul.lo */, VE::PVFMULLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5169 { 1710 /* pvfmul.lo */, VE::PVFMULLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5170 { 1710 /* pvfmul.lo */, VE::PVFMULLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5171 { 1710 /* pvfmul.lo */, VE::PVFMULLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5172 { 1710 /* pvfmul.lo */, VE::PVFMULLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5173 { 1710 /* pvfmul.lo */, VE::PVFMULLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5174 { 1720 /* pvfmul.up */, VE::PVFMULUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5175 { 1720 /* pvfmul.up */, VE::PVFMULUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5176 { 1720 /* pvfmul.up */, VE::PVFMULUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5177 { 1720 /* pvfmul.up */, VE::PVFMULUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5178 { 1720 /* pvfmul.up */, VE::PVFMULUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5179 { 1720 /* pvfmul.up */, VE::PVFMULUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5180 { 1730 /* pvfnmad */, VE::PVFNMADrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5181 { 1730 /* pvfnmad */, VE::PVFNMADvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5182 { 1730 /* pvfnmad */, VE::PVFNMADvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5183 { 1730 /* pvfnmad */, VE::PVFNMADviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5184 { 1730 /* pvfnmad */, VE::PVFNMADivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5185 { 1730 /* pvfnmad */, VE::PVFNMADrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
5186 { 1730 /* pvfnmad */, VE::PVFNMADvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5187 { 1730 /* pvfnmad */, VE::PVFNMADvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5188 { 1730 /* pvfnmad */, VE::PVFNMADvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5189 { 1730 /* pvfnmad */, VE::PVFNMADivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
5190 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5191 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5192 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5193 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5194 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5195 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5196 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5197 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5198 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5199 { 1738 /* pvfnmad.lo */, VE::PVFNMADLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5200 { 1749 /* pvfnmad.up */, VE::PVFNMADUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
5201 { 1749 /* pvfnmad.up */, VE::PVFNMADUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
5202 { 1749 /* pvfnmad.up */, VE::PVFNMADUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5203 { 1749 /* pvfnmad.up */, VE::PVFNMADUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5204 { 1749 /* pvfnmad.up */, VE::PVFNMADUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5205 { 1749 /* pvfnmad.up */, VE::PVFNMADUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
5206 { 1749 /* pvfnmad.up */, VE::PVFNMADUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5207 { 1749 /* pvfnmad.up */, VE::PVFNMADUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5208 { 1749 /* pvfnmad.up */, VE::PVFNMADUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5209 { 1749 /* pvfnmad.up */, VE::PVFNMADUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5210 { 1760 /* pvfnmsb */, VE::PVFNMSBrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5211 { 1760 /* pvfnmsb */, VE::PVFNMSBvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5212 { 1760 /* pvfnmsb */, VE::PVFNMSBvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5213 { 1760 /* pvfnmsb */, VE::PVFNMSBviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5214 { 1760 /* pvfnmsb */, VE::PVFNMSBivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5215 { 1760 /* pvfnmsb */, VE::PVFNMSBrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM512 }, },
5216 { 1760 /* pvfnmsb */, VE::PVFNMSBvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5217 { 1760 /* pvfnmsb */, VE::PVFNMSBvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5218 { 1760 /* pvfnmsb */, VE::PVFNMSBvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5219 { 1760 /* pvfnmsb */, VE::PVFNMSBivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM512 }, },
5220 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5221 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5222 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5223 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5224 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5225 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5226 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5227 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5228 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5229 { 1768 /* pvfnmsb.lo */, VE::PVFNMSBLOivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5230 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64 }, },
5231 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64 }, },
5232 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5233 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5234 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5235 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_V64, MCK_VM }, },
5236 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5237 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5238 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5239 { 1779 /* pvfnmsb.up */, VE::PVFNMSBUPivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5240 { 1790 /* pvfsub */, VE::PVFSUBrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5241 { 1790 /* pvfsub */, VE::PVFSUBvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5242 { 1790 /* pvfsub */, VE::PVFSUBiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5243 { 1790 /* pvfsub */, VE::PVFSUBrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5244 { 1790 /* pvfsub */, VE::PVFSUBvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5245 { 1790 /* pvfsub */, VE::PVFSUBivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5246 { 1797 /* pvfsub.lo */, VE::PVFSUBLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5247 { 1797 /* pvfsub.lo */, VE::PVFSUBLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5248 { 1797 /* pvfsub.lo */, VE::PVFSUBLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5249 { 1797 /* pvfsub.lo */, VE::PVFSUBLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5250 { 1797 /* pvfsub.lo */, VE::PVFSUBLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5251 { 1797 /* pvfsub.lo */, VE::PVFSUBLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5252 { 1807 /* pvfsub.up */, VE::PVFSUBUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5253 { 1807 /* pvfsub.up */, VE::PVFSUBUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5254 { 1807 /* pvfsub.up */, VE::PVFSUBUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5255 { 1807 /* pvfsub.up */, VE::PVFSUBUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5256 { 1807 /* pvfsub.up */, VE::PVFSUBUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5257 { 1807 /* pvfsub.up */, VE::PVFSUBUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5258 { 1817 /* pvldz */, VE::PVLDZv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5259 { 1817 /* pvldz */, VE::PVLDZvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
5260 { 1823 /* pvldz.lo */, VE::PVLDZLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5261 { 1823 /* pvldz.lo */, VE::PVLDZLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5262 { 1832 /* pvldz.up */, VE::PVLDZUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5263 { 1832 /* pvldz.up */, VE::PVLDZUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5264 { 1841 /* pvmaxs */, VE::PVMAXSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5265 { 1841 /* pvmaxs */, VE::PVMAXSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5266 { 1841 /* pvmaxs */, VE::PVMAXSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5267 { 1841 /* pvmaxs */, VE::PVMAXSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5268 { 1841 /* pvmaxs */, VE::PVMAXSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5269 { 1841 /* pvmaxs */, VE::PVMAXSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5270 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5271 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5272 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5273 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5274 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5275 { 1848 /* pvmaxs.lo */, VE::PVMAXSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5276 { 1858 /* pvmaxs.up */, VE::PVMAXSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5277 { 1858 /* pvmaxs.up */, VE::PVMAXSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5278 { 1858 /* pvmaxs.up */, VE::PVMAXSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5279 { 1858 /* pvmaxs.up */, VE::PVMAXSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5280 { 1858 /* pvmaxs.up */, VE::PVMAXSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5281 { 1858 /* pvmaxs.up */, VE::PVMAXSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5282 { 1868 /* pvmins */, VE::PVMINSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5283 { 1868 /* pvmins */, VE::PVMINSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5284 { 1868 /* pvmins */, VE::PVMINSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5285 { 1868 /* pvmins */, VE::PVMINSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5286 { 1868 /* pvmins */, VE::PVMINSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5287 { 1868 /* pvmins */, VE::PVMINSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5288 { 1875 /* pvmins.lo */, VE::PVMINSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5289 { 1875 /* pvmins.lo */, VE::PVMINSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5290 { 1875 /* pvmins.lo */, VE::PVMINSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5291 { 1875 /* pvmins.lo */, VE::PVMINSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5292 { 1875 /* pvmins.lo */, VE::PVMINSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5293 { 1875 /* pvmins.lo */, VE::PVMINSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5294 { 1885 /* pvmins.up */, VE::PVMINSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5295 { 1885 /* pvmins.up */, VE::PVMINSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5296 { 1885 /* pvmins.up */, VE::PVMINSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5297 { 1885 /* pvmins.up */, VE::PVMINSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5298 { 1885 /* pvmins.up */, VE::PVMINSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5299 { 1885 /* pvmins.up */, VE::PVMINSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5300 { 1895 /* pvor */, VE::PVORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5301 { 1895 /* pvor */, VE::PVORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5302 { 1895 /* pvor */, VE::PVORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5303 { 1895 /* pvor */, VE::PVORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5304 { 1895 /* pvor */, VE::PVORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5305 { 1895 /* pvor */, VE::PVORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
5306 { 1900 /* pvor.lo */, VE::PVORLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5307 { 1900 /* pvor.lo */, VE::PVORLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5308 { 1900 /* pvor.lo */, VE::PVORLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5309 { 1900 /* pvor.lo */, VE::PVORLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5310 { 1900 /* pvor.lo */, VE::PVORLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5311 { 1900 /* pvor.lo */, VE::PVORLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5312 { 1908 /* pvor.up */, VE::PVORUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5313 { 1908 /* pvor.up */, VE::PVORUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5314 { 1908 /* pvor.up */, VE::PVORUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5315 { 1908 /* pvor.up */, VE::PVORUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5316 { 1908 /* pvor.up */, VE::PVORUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5317 { 1908 /* pvor.up */, VE::PVORUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5318 { 1916 /* pvpcnt */, VE::PVPCNTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5319 { 1916 /* pvpcnt */, VE::PVPCNTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
5320 { 1923 /* pvpcnt.lo */, VE::PVPCNTLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5321 { 1923 /* pvpcnt.lo */, VE::PVPCNTLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5322 { 1933 /* pvpcnt.up */, VE::PVPCNTUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5323 { 1933 /* pvpcnt.up */, VE::PVPCNTUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5324 { 1943 /* pvrcp */, VE::PVRCPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5325 { 1943 /* pvrcp */, VE::PVRCPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
5326 { 1949 /* pvrcp.lo */, VE::PVRCPLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5327 { 1949 /* pvrcp.lo */, VE::PVRCPLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5328 { 1958 /* pvrcp.up */, VE::PVRCPUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5329 { 1958 /* pvrcp.up */, VE::PVRCPUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5330 { 1967 /* pvrsqrt */, VE::PVRSQRTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5331 { 1967 /* pvrsqrt */, VE::PVRSQRTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
5332 { 1975 /* pvrsqrt.lo */, VE::PVRSQRTLOv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5333 { 1975 /* pvrsqrt.lo */, VE::PVRSQRTLOvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5334 { 1986 /* pvrsqrt.lo.nex */, VE::PVRSQRTLONEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5335 { 1986 /* pvrsqrt.lo.nex */, VE::PVRSQRTLONEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5336 { 2001 /* pvrsqrt.nex */, VE::PVRSQRTNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5337 { 2001 /* pvrsqrt.nex */, VE::PVRSQRTNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM512 }, },
5338 { 2013 /* pvrsqrt.up */, VE::PVRSQRTUPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5339 { 2013 /* pvrsqrt.up */, VE::PVRSQRTUPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5340 { 2024 /* pvrsqrt.up.nex */, VE::PVRSQRTUPNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5341 { 2024 /* pvrsqrt.up.nex */, VE::PVRSQRTUPNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5342 { 2039 /* pvseq */, VE::PVSEQ, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
5343 { 2039 /* pvseq */, VE::PVSEQm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM512 }, },
5344 { 2045 /* pvseq.lo */, VE::PVSEQLO, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
5345 { 2045 /* pvseq.lo */, VE::PVSEQLOm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
5346 { 2054 /* pvseq.up */, VE::PVSEQUP, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
5347 { 2054 /* pvseq.up */, VE::PVSEQUPm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
5348 { 2063 /* pvsla */, VE::PVSLAvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5349 { 2063 /* pvsla */, VE::PVSLAvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5350 { 2063 /* pvsla */, VE::PVSLAvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5351 { 2063 /* pvsla */, VE::PVSLAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
5352 { 2063 /* pvsla */, VE::PVSLAvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5353 { 2063 /* pvsla */, VE::PVSLAvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
5354 { 2069 /* pvsla.lo */, VE::PVSLALOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5355 { 2069 /* pvsla.lo */, VE::PVSLALOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5356 { 2069 /* pvsla.lo */, VE::PVSLALOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5357 { 2069 /* pvsla.lo */, VE::PVSLALOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5358 { 2069 /* pvsla.lo */, VE::PVSLALOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5359 { 2069 /* pvsla.lo */, VE::PVSLALOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5360 { 2078 /* pvsla.up */, VE::PVSLAUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5361 { 2078 /* pvsla.up */, VE::PVSLAUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5362 { 2078 /* pvsla.up */, VE::PVSLAUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5363 { 2078 /* pvsla.up */, VE::PVSLAUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5364 { 2078 /* pvsla.up */, VE::PVSLAUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5365 { 2078 /* pvsla.up */, VE::PVSLAUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5366 { 2087 /* pvsll */, VE::PVSLLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5367 { 2087 /* pvsll */, VE::PVSLLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5368 { 2087 /* pvsll */, VE::PVSLLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5369 { 2087 /* pvsll */, VE::PVSLLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
5370 { 2087 /* pvsll */, VE::PVSLLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5371 { 2087 /* pvsll */, VE::PVSLLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
5372 { 2093 /* pvsll.lo */, VE::PVSLLLOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5373 { 2093 /* pvsll.lo */, VE::PVSLLLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5374 { 2093 /* pvsll.lo */, VE::PVSLLLOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5375 { 2093 /* pvsll.lo */, VE::PVSLLLOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5376 { 2093 /* pvsll.lo */, VE::PVSLLLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5377 { 2093 /* pvsll.lo */, VE::PVSLLLOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5378 { 2102 /* pvsll.up */, VE::PVSLLUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5379 { 2102 /* pvsll.up */, VE::PVSLLUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5380 { 2102 /* pvsll.up */, VE::PVSLLUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5381 { 2102 /* pvsll.up */, VE::PVSLLUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5382 { 2102 /* pvsll.up */, VE::PVSLLUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5383 { 2102 /* pvsll.up */, VE::PVSLLUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5384 { 2111 /* pvsra */, VE::PVSRAvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5385 { 2111 /* pvsra */, VE::PVSRAvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5386 { 2111 /* pvsra */, VE::PVSRAvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5387 { 2111 /* pvsra */, VE::PVSRAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
5388 { 2111 /* pvsra */, VE::PVSRAvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5389 { 2111 /* pvsra */, VE::PVSRAvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
5390 { 2117 /* pvsra.lo */, VE::PVSRALOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5391 { 2117 /* pvsra.lo */, VE::PVSRALOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5392 { 2117 /* pvsra.lo */, VE::PVSRALOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5393 { 2117 /* pvsra.lo */, VE::PVSRALOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5394 { 2117 /* pvsra.lo */, VE::PVSRALOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5395 { 2117 /* pvsra.lo */, VE::PVSRALOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5396 { 2126 /* pvsra.up */, VE::PVSRAUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5397 { 2126 /* pvsra.up */, VE::PVSRAUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5398 { 2126 /* pvsra.up */, VE::PVSRAUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5399 { 2126 /* pvsra.up */, VE::PVSRAUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5400 { 2126 /* pvsra.up */, VE::PVSRAUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5401 { 2126 /* pvsra.up */, VE::PVSRAUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5402 { 2135 /* pvsrl */, VE::PVSRLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5403 { 2135 /* pvsrl */, VE::PVSRLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5404 { 2135 /* pvsrl */, VE::PVSRLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5405 { 2135 /* pvsrl */, VE::PVSRLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM512 }, },
5406 { 2135 /* pvsrl */, VE::PVSRLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5407 { 2135 /* pvsrl */, VE::PVSRLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM512 }, },
5408 { 2141 /* pvsrl.lo */, VE::PVSRLLOvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5409 { 2141 /* pvsrl.lo */, VE::PVSRLLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5410 { 2141 /* pvsrl.lo */, VE::PVSRLLOvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5411 { 2141 /* pvsrl.lo */, VE::PVSRLLOvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5412 { 2141 /* pvsrl.lo */, VE::PVSRLLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5413 { 2141 /* pvsrl.lo */, VE::PVSRLLOvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5414 { 2150 /* pvsrl.up */, VE::PVSRLUPvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5415 { 2150 /* pvsrl.up */, VE::PVSRLUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5416 { 2150 /* pvsrl.up */, VE::PVSRLUPvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
5417 { 2150 /* pvsrl.up */, VE::PVSRLUPvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5418 { 2150 /* pvsrl.up */, VE::PVSRLUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5419 { 2150 /* pvsrl.up */, VE::PVSRLUPvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
5420 { 2159 /* pvsubs */, VE::PVSUBSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5421 { 2159 /* pvsubs */, VE::PVSUBSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5422 { 2159 /* pvsubs */, VE::PVSUBSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5423 { 2159 /* pvsubs */, VE::PVSUBSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5424 { 2159 /* pvsubs */, VE::PVSUBSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5425 { 2159 /* pvsubs */, VE::PVSUBSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5426 { 2166 /* pvsubs.lo */, VE::PVSUBSLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5427 { 2166 /* pvsubs.lo */, VE::PVSUBSLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5428 { 2166 /* pvsubs.lo */, VE::PVSUBSLOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5429 { 2166 /* pvsubs.lo */, VE::PVSUBSLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5430 { 2166 /* pvsubs.lo */, VE::PVSUBSLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5431 { 2166 /* pvsubs.lo */, VE::PVSUBSLOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5432 { 2176 /* pvsubs.up */, VE::PVSUBSUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5433 { 2176 /* pvsubs.up */, VE::PVSUBSUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5434 { 2176 /* pvsubs.up */, VE::PVSUBSUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5435 { 2176 /* pvsubs.up */, VE::PVSUBSUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5436 { 2176 /* pvsubs.up */, VE::PVSUBSUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5437 { 2176 /* pvsubs.up */, VE::PVSUBSUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5438 { 2186 /* pvsubu */, VE::PVSUBUrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5439 { 2186 /* pvsubu */, VE::PVSUBUvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5440 { 2186 /* pvsubu */, VE::PVSUBUiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5441 { 2186 /* pvsubu */, VE::PVSUBUrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5442 { 2186 /* pvsubu */, VE::PVSUBUvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5443 { 2186 /* pvsubu */, VE::PVSUBUivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
5444 { 2193 /* pvsubu.lo */, VE::PVSUBULOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5445 { 2193 /* pvsubu.lo */, VE::PVSUBULOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5446 { 2193 /* pvsubu.lo */, VE::PVSUBULOiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5447 { 2193 /* pvsubu.lo */, VE::PVSUBULOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5448 { 2193 /* pvsubu.lo */, VE::PVSUBULOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5449 { 2193 /* pvsubu.lo */, VE::PVSUBULOivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5450 { 2203 /* pvsubu.up */, VE::PVSUBUUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5451 { 2203 /* pvsubu.up */, VE::PVSUBUUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5452 { 2203 /* pvsubu.up */, VE::PVSUBUUPiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5453 { 2203 /* pvsubu.up */, VE::PVSUBUUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5454 { 2203 /* pvsubu.up */, VE::PVSUBUUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5455 { 2203 /* pvsubu.up */, VE::PVSUBUUPivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5456 { 2213 /* pvxor */, VE::PVXORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5457 { 2213 /* pvxor */, VE::PVXORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5458 { 2213 /* pvxor */, VE::PVXORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5459 { 2213 /* pvxor */, VE::PVXORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
5460 { 2213 /* pvxor */, VE::PVXORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
5461 { 2213 /* pvxor */, VE::PVXORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM512 }, },
5462 { 2219 /* pvxor.lo */, VE::PVXORLOrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5463 { 2219 /* pvxor.lo */, VE::PVXORLOvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5464 { 2219 /* pvxor.lo */, VE::PVXORLOmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5465 { 2219 /* pvxor.lo */, VE::PVXORLOrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5466 { 2219 /* pvxor.lo */, VE::PVXORLOvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5467 { 2219 /* pvxor.lo */, VE::PVXORLOmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5468 { 2228 /* pvxor.up */, VE::PVXORUPrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5469 { 2228 /* pvxor.up */, VE::PVXORUPvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5470 { 2228 /* pvxor.up */, VE::PVXORUPmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5471 { 2228 /* pvxor.up */, VE::PVXORUPrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5472 { 2228 /* pvxor.up */, VE::PVXORUPvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5473 { 2228 /* pvxor.up */, VE::PVXORUPmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5474 { 2237 /* scr */, VE::SCRrrr, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
5475 { 2237 /* scr */, VE::SCRrzr, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
5476 { 2237 /* scr */, VE::SCRirr, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
5477 { 2237 /* scr */, VE::SCRizr, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
5478 { 2241 /* sfr */, VE::SFR, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
5479 { 2245 /* shm.b */, VE::SHMBri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
5480 { 2245 /* shm.b */, VE::SHMBzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
5481 { 2251 /* shm.h */, VE::SHMHri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
5482 { 2251 /* shm.h */, VE::SHMHzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
5483 { 2257 /* shm.l */, VE::SHMLri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
5484 { 2257 /* shm.l */, VE::SHMLzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
5485 { 2263 /* shm.w */, VE::SHMWri, Convert__MEMri2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMri }, },
5486 { 2263 /* shm.w */, VE::SHMWzi, Convert__MEMzi2_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzi }, },
5487 { 2269 /* sic */, VE::SIC, Convert__Reg1_0, AMFBS_None, { MCK_I32 }, },
5488 { 2273 /* sla.l */, VE::SLALrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5489 { 2273 /* sla.l */, VE::SLALri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5490 { 2273 /* sla.l */, VE::SLALmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5491 { 2273 /* sla.l */, VE::SLALmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5492 { 2279 /* sla.w.sx */, VE::SLAWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5493 { 2279 /* sla.w.sx */, VE::SLAWSXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
5494 { 2279 /* sla.w.sx */, VE::SLAWSXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
5495 { 2279 /* sla.w.sx */, VE::SLAWSXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
5496 { 2288 /* sla.w.zx */, VE::SLAWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5497 { 2288 /* sla.w.zx */, VE::SLAWZXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
5498 { 2288 /* sla.w.zx */, VE::SLAWZXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
5499 { 2288 /* sla.w.zx */, VE::SLAWZXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
5500 { 2297 /* sld */, VE::SLDrrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5501 { 2297 /* sld */, VE::SLDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5502 { 2297 /* sld */, VE::SLDrmr, Convert__Reg1_0__Tie0_1_1__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5503 { 2297 /* sld */, VE::SLDrmi, Convert__Reg1_0__Tie0_1_1__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5504 { 2301 /* sll */, VE::SLLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5505 { 2301 /* sll */, VE::SLLri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5506 { 2301 /* sll */, VE::SLLmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5507 { 2301 /* sll */, VE::SLLmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5508 { 2305 /* smir */, VE::SMIR, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_MISC }, },
5509 { 2310 /* smvl */, VE::SMVL, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
5510 { 2315 /* spm */, VE::SPM, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
5511 { 2319 /* sra.l */, VE::SRALrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5512 { 2319 /* sra.l */, VE::SRALri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5513 { 2319 /* sra.l */, VE::SRALmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5514 { 2319 /* sra.l */, VE::SRALmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5515 { 2325 /* sra.w.sx */, VE::SRAWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5516 { 2325 /* sra.w.sx */, VE::SRAWSXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
5517 { 2325 /* sra.w.sx */, VE::SRAWSXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
5518 { 2325 /* sra.w.sx */, VE::SRAWSXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
5519 { 2334 /* sra.w.zx */, VE::SRAWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5520 { 2334 /* sra.w.zx */, VE::SRAWZXri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_UImm7 }, },
5521 { 2334 /* sra.w.zx */, VE::SRAWZXmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_I32 }, },
5522 { 2334 /* sra.w.zx */, VE::SRAWZXmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I32, MCK_MImm, MCK_UImm7 }, },
5523 { 2343 /* srd */, VE::SRDrrr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5524 { 2343 /* srd */, VE::SRDrri, Convert__Reg1_0__Reg1_1__Tie0_1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5525 { 2343 /* srd */, VE::SRDmrr, Convert__Reg1_0__MImm1_1__Tie0_1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5526 { 2343 /* srd */, VE::SRDmri, Convert__Reg1_0__MImm1_1__Tie0_1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5527 { 2347 /* srl */, VE::SRLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I32 }, },
5528 { 2347 /* srl */, VE::SRLri, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_UImm7 }, },
5529 { 2347 /* srl */, VE::SRLmr, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_I32 }, },
5530 { 2347 /* srl */, VE::SRLmi, Convert__Reg1_0__MImm1_1__UImm71_2, AMFBS_None, { MCK_I64, MCK_MImm, MCK_UImm7 }, },
5531 { 2351 /* st */, VE::STrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMrii }, },
5532 { 2351 /* st */, VE::STrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMrri }, },
5533 { 2351 /* st */, VE::STzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzii }, },
5534 { 2351 /* st */, VE::STzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I64, MCK_MEMzri }, },
5535 { 2354 /* st1b */, VE::ST1Brii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
5536 { 2354 /* st1b */, VE::ST1Brri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
5537 { 2354 /* st1b */, VE::ST1Bzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
5538 { 2354 /* st1b */, VE::ST1Bzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
5539 { 2359 /* st2b */, VE::ST2Brii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
5540 { 2359 /* st2b */, VE::ST2Brri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
5541 { 2359 /* st2b */, VE::ST2Bzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
5542 { 2359 /* st2b */, VE::ST2Bzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
5543 { 2364 /* stl */, VE::STLrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrii }, },
5544 { 2364 /* stl */, VE::STLrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMrri }, },
5545 { 2364 /* stl */, VE::STLzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzii }, },
5546 { 2364 /* stl */, VE::STLzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_I32, MCK_MEMzri }, },
5547 { 2368 /* stu */, VE::STUrii, Convert__MEMrii3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMrii }, },
5548 { 2368 /* stu */, VE::STUrri, Convert__MEMrri3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMrri }, },
5549 { 2368 /* stu */, VE::STUzii, Convert__MEMzii3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMzii }, },
5550 { 2368 /* stu */, VE::STUzri, Convert__MEMzri3_1__Reg1_0, AMFBS_None, { MCK_F32, MCK_MEMzri }, },
5551 { 2372 /* subs.l */, VE::SUBSLrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
5552 { 2372 /* subs.l */, VE::SUBSLrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
5553 { 2372 /* subs.l */, VE::SUBSLir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
5554 { 2372 /* subs.l */, VE::SUBSLim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
5555 { 2379 /* subs.w.sx */, VE::SUBSWSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5556 { 2379 /* subs.w.sx */, VE::SUBSWSXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
5557 { 2379 /* subs.w.sx */, VE::SUBSWSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
5558 { 2379 /* subs.w.sx */, VE::SUBSWSXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
5559 { 2389 /* subs.w.zx */, VE::SUBSWZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5560 { 2389 /* subs.w.zx */, VE::SUBSWZXrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
5561 { 2389 /* subs.w.zx */, VE::SUBSWZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
5562 { 2389 /* subs.w.zx */, VE::SUBSWZXim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
5563 { 2399 /* subu.l */, VE::SUBULrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
5564 { 2399 /* subu.l */, VE::SUBULrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
5565 { 2399 /* subu.l */, VE::SUBULir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
5566 { 2399 /* subu.l */, VE::SUBULim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
5567 { 2406 /* subu.w */, VE::SUBUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_I32 }, },
5568 { 2406 /* subu.w */, VE::SUBUWrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_I32, MCK_MImm }, },
5569 { 2406 /* subu.w */, VE::SUBUWir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_I32 }, },
5570 { 2406 /* subu.w */, VE::SUBUWim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I32, MCK_SImm7, MCK_MImm }, },
5571 { 2413 /* svl */, VE::SVL, Convert__Reg1_0, AMFBS_None, { MCK_I64 }, },
5572 { 2417 /* svm */, VE::SVMmr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_VM, MCK_I64 }, },
5573 { 2417 /* svm */, VE::SVMmi, Convert__Reg1_0__Reg1_1__UImm21_2, AMFBS_None, { MCK_I64, MCK_VM, MCK_UImm2 }, },
5574 { 2421 /* svob */, VE::SVOB, Convert_NoOperands, AMFBS_None, { }, },
5575 { 2426 /* tovm */, VE::TOVMm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_I64, MCK_VM }, },
5576 { 2431 /* ts1am.l */, VE::TS1AMLrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
5577 { 2431 /* ts1am.l */, VE::TS1AMLrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm7 }, },
5578 { 2431 /* ts1am.l */, VE::TS1AMLzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
5579 { 2431 /* ts1am.l */, VE::TS1AMLzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm7 }, },
5580 { 2439 /* ts1am.w */, VE::TS1AMWrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_I32 }, },
5581 { 2439 /* ts1am.w */, VE::TS1AMWrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMri, MCK_UImm7 }, },
5582 { 2439 /* ts1am.w */, VE::TS1AMWzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_I32 }, },
5583 { 2439 /* ts1am.w */, VE::TS1AMWzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I32, MCK_MEMzi, MCK_UImm7 }, },
5584 { 2447 /* ts2am */, VE::TS2AMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
5585 { 2447 /* ts2am */, VE::TS2AMrii, Convert__Reg1_0__MEMri2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm7 }, },
5586 { 2447 /* ts2am */, VE::TS2AMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
5587 { 2447 /* ts2am */, VE::TS2AMzii, Convert__Reg1_0__MEMzi2_1__UImm71_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm7 }, },
5588 { 2453 /* ts3am */, VE::TS3AMrir, Convert__Reg1_0__MEMri2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_I64 }, },
5589 { 2453 /* ts3am */, VE::TS3AMrii, Convert__Reg1_0__MEMri2_1__UImm11_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMri, MCK_UImm1 }, },
5590 { 2453 /* ts3am */, VE::TS3AMzir, Convert__Reg1_0__MEMzi2_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_I64 }, },
5591 { 2453 /* ts3am */, VE::TS3AMzii, Convert__Reg1_0__MEMzi2_1__UImm11_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_MEMzi, MCK_UImm1 }, },
5592 { 2459 /* tscr */, VE::TSCRrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
5593 { 2459 /* tscr */, VE::TSCRrzr, Convert__Reg1_0__Reg1_1__Zero1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_I64, MCK_Zero }, },
5594 { 2459 /* tscr */, VE::TSCRirr, Convert__Reg1_0__SImm71_1__Reg1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
5595 { 2459 /* tscr */, VE::TSCRizr, Convert__Reg1_0__SImm71_1__Zero1_2__Tie0_1_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_Zero }, },
5596 { 2464 /* vadds.l */, VE::VADDSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5597 { 2464 /* vadds.l */, VE::VADDSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5598 { 2464 /* vadds.l */, VE::VADDSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5599 { 2464 /* vadds.l */, VE::VADDSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5600 { 2464 /* vadds.l */, VE::VADDSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5601 { 2464 /* vadds.l */, VE::VADDSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5602 { 2472 /* vadds.w.sx */, VE::VADDSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5603 { 2472 /* vadds.w.sx */, VE::VADDSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5604 { 2472 /* vadds.w.sx */, VE::VADDSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5605 { 2472 /* vadds.w.sx */, VE::VADDSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5606 { 2472 /* vadds.w.sx */, VE::VADDSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5607 { 2472 /* vadds.w.sx */, VE::VADDSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5608 { 2483 /* vaddu.l */, VE::VADDULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5609 { 2483 /* vaddu.l */, VE::VADDULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5610 { 2483 /* vaddu.l */, VE::VADDULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5611 { 2483 /* vaddu.l */, VE::VADDULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5612 { 2483 /* vaddu.l */, VE::VADDULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5613 { 2483 /* vaddu.l */, VE::VADDULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5614 { 2491 /* vand */, VE::VANDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5615 { 2491 /* vand */, VE::VANDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5616 { 2491 /* vand */, VE::VANDmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5617 { 2491 /* vand */, VE::VANDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5618 { 2491 /* vand */, VE::VANDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5619 { 2491 /* vand */, VE::VANDmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5620 { 2496 /* vbrd */, VE::VBRDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I64 }, },
5621 { 2496 /* vbrd */, VE::VBRDi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
5622 { 2496 /* vbrd */, VE::VBRDrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_VM }, },
5623 { 2496 /* vbrd */, VE::VBRDim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
5624 { 2501 /* vbrdl */, VE::VBRDLr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_I32 }, },
5625 { 2501 /* vbrdl */, VE::VBRDLi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
5626 { 2501 /* vbrdl */, VE::VBRDLrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_VM }, },
5627 { 2501 /* vbrdl */, VE::VBRDLim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
5628 { 2507 /* vbrdu */, VE::VBRDUr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_F32 }, },
5629 { 2507 /* vbrdu */, VE::VBRDUi, Convert__Reg1_0__SImm71_1, AMFBS_None, { MCK_V64, MCK_SImm7 }, },
5630 { 2507 /* vbrdu */, VE::VBRDUrm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_VM }, },
5631 { 2507 /* vbrdu */, VE::VBRDUim, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_VM }, },
5632 { 2513 /* vbrv */, VE::VBRVv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5633 { 2513 /* vbrv */, VE::VBRVvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5634 { 2518 /* vcmps.l */, VE::VCMPSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5635 { 2518 /* vcmps.l */, VE::VCMPSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5636 { 2518 /* vcmps.l */, VE::VCMPSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5637 { 2518 /* vcmps.l */, VE::VCMPSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5638 { 2518 /* vcmps.l */, VE::VCMPSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5639 { 2518 /* vcmps.l */, VE::VCMPSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5640 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5641 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5642 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5643 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5644 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5645 { 2526 /* vcmps.w.sx */, VE::VCMPSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5646 { 2537 /* vcmpu.l */, VE::VCMPULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5647 { 2537 /* vcmpu.l */, VE::VCMPULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5648 { 2537 /* vcmpu.l */, VE::VCMPULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5649 { 2537 /* vcmpu.l */, VE::VCMPULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5650 { 2537 /* vcmpu.l */, VE::VCMPULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5651 { 2537 /* vcmpu.l */, VE::VCMPULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5652 { 2545 /* vcp */, VE::VCPv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5653 { 2545 /* vcp */, VE::VCPvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5654 { 2549 /* vcvt.d.l */, VE::VCVTDLv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5655 { 2549 /* vcvt.d.l */, VE::VCVTDLvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5656 { 2558 /* vcvt.d.s */, VE::VCVTDSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5657 { 2558 /* vcvt.d.s */, VE::VCVTDSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5658 { 2567 /* vcvt.d.w */, VE::VCVTDWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5659 { 2567 /* vcvt.d.w */, VE::VCVTDWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5660 { 2576 /* vcvt.l.d */, VE::VCVTLDv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5661 { 2576 /* vcvt.l.d */, VE::VCVTLDvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5662 { 2585 /* vcvt.s.d */, VE::VCVTSDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5663 { 2585 /* vcvt.s.d */, VE::VCVTSDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5664 { 2594 /* vcvt.s.w */, VE::VCVTSWv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5665 { 2594 /* vcvt.s.w */, VE::VCVTSWvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5666 { 2603 /* vcvt.w.d.sx */, VE::VCVTWDSXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5667 { 2603 /* vcvt.w.d.sx */, VE::VCVTWDSXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5668 { 2615 /* vcvt.w.d.zx */, VE::VCVTWDZXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5669 { 2615 /* vcvt.w.d.zx */, VE::VCVTWDZXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5670 { 2627 /* vcvt.w.s.sx */, VE::VCVTWSSXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5671 { 2627 /* vcvt.w.s.sx */, VE::VCVTWSSXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5672 { 2639 /* vcvt.w.s.zx */, VE::VCVTWSZXv, Convert__Reg1_1__RDOp1_0__Reg1_2, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64 }, },
5673 { 2639 /* vcvt.w.s.zx */, VE::VCVTWSZXvm, Convert__Reg1_1__RDOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_RDOp, MCK_V64, MCK_V64, MCK_VM }, },
5674 { 2651 /* vdivs.l */, VE::VDIVSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5675 { 2651 /* vdivs.l */, VE::VDIVSLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5676 { 2651 /* vdivs.l */, VE::VDIVSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5677 { 2651 /* vdivs.l */, VE::VDIVSLvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5678 { 2651 /* vdivs.l */, VE::VDIVSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5679 { 2651 /* vdivs.l */, VE::VDIVSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5680 { 2651 /* vdivs.l */, VE::VDIVSLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5681 { 2651 /* vdivs.l */, VE::VDIVSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5682 { 2651 /* vdivs.l */, VE::VDIVSLvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5683 { 2651 /* vdivs.l */, VE::VDIVSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5684 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5685 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5686 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5687 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5688 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5689 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5690 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5691 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5692 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5693 { 2659 /* vdivs.w.sx */, VE::VDIVSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5694 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5695 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5696 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5697 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5698 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5699 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5700 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5701 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5702 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5703 { 2670 /* vdivs.w.zx */, VE::VDIVSWZXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5704 { 2681 /* vdivu.l */, VE::VDIVULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5705 { 2681 /* vdivu.l */, VE::VDIVULvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5706 { 2681 /* vdivu.l */, VE::VDIVULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5707 { 2681 /* vdivu.l */, VE::VDIVULvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5708 { 2681 /* vdivu.l */, VE::VDIVULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5709 { 2681 /* vdivu.l */, VE::VDIVULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5710 { 2681 /* vdivu.l */, VE::VDIVULvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5711 { 2681 /* vdivu.l */, VE::VDIVULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5712 { 2681 /* vdivu.l */, VE::VDIVULvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5713 { 2681 /* vdivu.l */, VE::VDIVULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5714 { 2689 /* vdivu.w */, VE::VDIVUWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
5715 { 2689 /* vdivu.w */, VE::VDIVUWvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
5716 { 2689 /* vdivu.w */, VE::VDIVUWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5717 { 2689 /* vdivu.w */, VE::VDIVUWvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5718 { 2689 /* vdivu.w */, VE::VDIVUWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5719 { 2689 /* vdivu.w */, VE::VDIVUWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
5720 { 2689 /* vdivu.w */, VE::VDIVUWvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
5721 { 2689 /* vdivu.w */, VE::VDIVUWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5722 { 2689 /* vdivu.w */, VE::VDIVUWvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5723 { 2689 /* vdivu.w */, VE::VDIVUWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5724 { 2697 /* veqv */, VE::VEQVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5725 { 2697 /* veqv */, VE::VEQVvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5726 { 2697 /* veqv */, VE::VEQVmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
5727 { 2697 /* veqv */, VE::VEQVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5728 { 2697 /* veqv */, VE::VEQVvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5729 { 2697 /* veqv */, VE::VEQVmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
5730 { 2702 /* vex */, VE::VEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5731 { 2702 /* vex */, VE::VEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5732 { 2706 /* vfadd.d */, VE::VFADDDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5733 { 2706 /* vfadd.d */, VE::VFADDDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5734 { 2706 /* vfadd.d */, VE::VFADDDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5735 { 2706 /* vfadd.d */, VE::VFADDDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5736 { 2706 /* vfadd.d */, VE::VFADDDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5737 { 2706 /* vfadd.d */, VE::VFADDDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5738 { 2714 /* vfcmp.d */, VE::VFCMPDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5739 { 2714 /* vfcmp.d */, VE::VFCMPDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5740 { 2714 /* vfcmp.d */, VE::VFCMPDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5741 { 2714 /* vfcmp.d */, VE::VFCMPDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5742 { 2714 /* vfcmp.d */, VE::VFCMPDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5743 { 2714 /* vfcmp.d */, VE::VFCMPDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5744 { 2722 /* vfdiv.d */, VE::VFDIVDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5745 { 2722 /* vfdiv.d */, VE::VFDIVDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5746 { 2722 /* vfdiv.d */, VE::VFDIVDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5747 { 2722 /* vfdiv.d */, VE::VFDIVDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5748 { 2722 /* vfdiv.d */, VE::VFDIVDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5749 { 2722 /* vfdiv.d */, VE::VFDIVDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5750 { 2722 /* vfdiv.d */, VE::VFDIVDvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
5751 { 2722 /* vfdiv.d */, VE::VFDIVDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5752 { 2722 /* vfdiv.d */, VE::VFDIVDvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5753 { 2722 /* vfdiv.d */, VE::VFDIVDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5754 { 2730 /* vfdiv.s */, VE::VFDIVSrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64 }, },
5755 { 2730 /* vfdiv.s */, VE::VFDIVSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5756 { 2730 /* vfdiv.s */, VE::VFDIVSvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5757 { 2730 /* vfdiv.s */, VE::VFDIVSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5758 { 2730 /* vfdiv.s */, VE::VFDIVSiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5759 { 2730 /* vfdiv.s */, VE::VFDIVSrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_F32, MCK_V64, MCK_VM }, },
5760 { 2730 /* vfdiv.s */, VE::VFDIVSvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32, MCK_VM }, },
5761 { 2730 /* vfdiv.s */, VE::VFDIVSvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5762 { 2730 /* vfdiv.s */, VE::VFDIVSvim, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_VM }, },
5763 { 2730 /* vfdiv.s */, VE::VFDIVSivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5764 { 2738 /* vfia.d */, VE::VFIADvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5765 { 2738 /* vfia.d */, VE::VFIADvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5766 { 2745 /* vfia.s */, VE::VFIASvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5767 { 2745 /* vfia.s */, VE::VFIASvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5768 { 2752 /* vfiam.d */, VE::VFIAMDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5769 { 2752 /* vfiam.d */, VE::VFIAMDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5770 { 2760 /* vfiam.s */, VE::VFIAMSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5771 { 2760 /* vfiam.s */, VE::VFIAMSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5772 { 2768 /* vfim.d */, VE::VFIMDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5773 { 2768 /* vfim.d */, VE::VFIMDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5774 { 2775 /* vfim.s */, VE::VFIMSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5775 { 2775 /* vfim.s */, VE::VFIMSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5776 { 2782 /* vfima.d */, VE::VFIMADvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5777 { 2782 /* vfima.d */, VE::VFIMADvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5778 { 2790 /* vfima.s */, VE::VFIMASvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5779 { 2790 /* vfima.s */, VE::VFIMASvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5780 { 2798 /* vfims.d */, VE::VFIMSDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5781 { 2798 /* vfims.d */, VE::VFIMSDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5782 { 2806 /* vfims.s */, VE::VFIMSSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5783 { 2806 /* vfims.s */, VE::VFIMSSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5784 { 2814 /* vfis.d */, VE::VFISDvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
5785 { 2814 /* vfis.d */, VE::VFISDvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5786 { 2821 /* vfis.s */, VE::VFISSvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_F32 }, },
5787 { 2821 /* vfis.s */, VE::VFISSvi, Convert__Reg1_0__Reg1_1__SImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7 }, },
5788 { 2828 /* vfism.d */, VE::VFISMDvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
5789 { 2828 /* vfism.d */, VE::VFISMDvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5790 { 2836 /* vfism.s */, VE::VFISMSvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_F32 }, },
5791 { 2836 /* vfism.s */, VE::VFISMSvvi, Convert__Reg1_0__Reg1_1__Reg1_2__SImm71_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_SImm7 }, },
5792 { 2844 /* vfmad.d */, VE::VFMADDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5793 { 2844 /* vfmad.d */, VE::VFMADDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5794 { 2844 /* vfmad.d */, VE::VFMADDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5795 { 2844 /* vfmad.d */, VE::VFMADDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5796 { 2844 /* vfmad.d */, VE::VFMADDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5797 { 2844 /* vfmad.d */, VE::VFMADDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5798 { 2844 /* vfmad.d */, VE::VFMADDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5799 { 2844 /* vfmad.d */, VE::VFMADDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5800 { 2844 /* vfmad.d */, VE::VFMADDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5801 { 2844 /* vfmad.d */, VE::VFMADDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5802 { 2852 /* vfmax.d */, VE::VFMAXDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5803 { 2852 /* vfmax.d */, VE::VFMAXDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5804 { 2852 /* vfmax.d */, VE::VFMAXDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5805 { 2852 /* vfmax.d */, VE::VFMAXDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5806 { 2852 /* vfmax.d */, VE::VFMAXDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5807 { 2852 /* vfmax.d */, VE::VFMAXDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5808 { 2860 /* vfmin.d */, VE::VFMINDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5809 { 2860 /* vfmin.d */, VE::VFMINDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5810 { 2860 /* vfmin.d */, VE::VFMINDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5811 { 2860 /* vfmin.d */, VE::VFMINDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5812 { 2860 /* vfmin.d */, VE::VFMINDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5813 { 2860 /* vfmin.d */, VE::VFMINDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5814 { 2868 /* vfmk.d. */, VE::VFMKDv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5815 { 2868 /* vfmk.d. */, VE::VFMKDvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5816 { 2876 /* vfmk.d.af */, VE::VFMKDna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5817 { 2876 /* vfmk.d.af */, VE::VFMKDnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5818 { 2886 /* vfmk.d.at */, VE::VFMKDa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5819 { 2886 /* vfmk.d.at */, VE::VFMKDam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5820 { 2896 /* vfmk.l. */, VE::VFMKLv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5821 { 2896 /* vfmk.l. */, VE::VFMKLvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5822 { 2904 /* vfmk.l.af */, VE::VFMKLna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5823 { 2904 /* vfmk.l.af */, VE::VFMKLnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5824 { 2914 /* vfmk.l.at */, VE::VFMKLa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5825 { 2914 /* vfmk.l.at */, VE::VFMKLam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5826 { 2924 /* vfmk.w. */, VE::VFMKWv, Convert__Reg1_1__CCOp1_0__Reg1_2, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64 }, },
5827 { 2924 /* vfmk.w. */, VE::VFMKWvm, Convert__Reg1_1__CCOp1_0__Reg1_2__Reg1_3, AMFBS_None, { MCK_CCOp, MCK_VM, MCK_V64, MCK_VM }, },
5828 { 2932 /* vfmk.w.af */, VE::VFMKWna, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5829 { 2932 /* vfmk.w.af */, VE::VFMKWnam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5830 { 2942 /* vfmk.w.at */, VE::VFMKWa, Convert__Reg1_0, AMFBS_None, { MCK_VM }, },
5831 { 2942 /* vfmk.w.at */, VE::VFMKWam, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VM, MCK_VM }, },
5832 { 2952 /* vfmsb.d */, VE::VFMSBDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5833 { 2952 /* vfmsb.d */, VE::VFMSBDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5834 { 2952 /* vfmsb.d */, VE::VFMSBDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5835 { 2952 /* vfmsb.d */, VE::VFMSBDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5836 { 2952 /* vfmsb.d */, VE::VFMSBDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5837 { 2952 /* vfmsb.d */, VE::VFMSBDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5838 { 2952 /* vfmsb.d */, VE::VFMSBDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5839 { 2952 /* vfmsb.d */, VE::VFMSBDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5840 { 2952 /* vfmsb.d */, VE::VFMSBDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5841 { 2952 /* vfmsb.d */, VE::VFMSBDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5842 { 2960 /* vfmul.d */, VE::VFMULDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5843 { 2960 /* vfmul.d */, VE::VFMULDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5844 { 2960 /* vfmul.d */, VE::VFMULDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5845 { 2960 /* vfmul.d */, VE::VFMULDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5846 { 2960 /* vfmul.d */, VE::VFMULDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5847 { 2960 /* vfmul.d */, VE::VFMULDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5848 { 2968 /* vfnmad.d */, VE::VFNMADDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5849 { 2968 /* vfnmad.d */, VE::VFNMADDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5850 { 2968 /* vfnmad.d */, VE::VFNMADDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5851 { 2968 /* vfnmad.d */, VE::VFNMADDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5852 { 2968 /* vfnmad.d */, VE::VFNMADDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5853 { 2968 /* vfnmad.d */, VE::VFNMADDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5854 { 2968 /* vfnmad.d */, VE::VFNMADDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5855 { 2968 /* vfnmad.d */, VE::VFNMADDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5856 { 2968 /* vfnmad.d */, VE::VFNMADDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5857 { 2968 /* vfnmad.d */, VE::VFNMADDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5858 { 2977 /* vfnmsb.d */, VE::VFNMSBDrvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64 }, },
5859 { 2977 /* vfnmsb.d */, VE::VFNMSBDvrv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64 }, },
5860 { 2977 /* vfnmsb.d */, VE::VFNMSBDvvv, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64 }, },
5861 { 2977 /* vfnmsb.d */, VE::VFNMSBDviv, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64 }, },
5862 { 2977 /* vfnmsb.d */, VE::VFNMSBDivv, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64 }, },
5863 { 2977 /* vfnmsb.d */, VE::VFNMSBDrvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_V64, MCK_VM }, },
5864 { 2977 /* vfnmsb.d */, VE::VFNMSBDvrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5865 { 2977 /* vfnmsb.d */, VE::VFNMSBDvvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5866 { 2977 /* vfnmsb.d */, VE::VFNMSBDvivm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5867 { 2977 /* vfnmsb.d */, VE::VFNMSBDivvm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_V64, MCK_VM }, },
5868 { 2986 /* vfrmax.d.fst */, VE::VFRMAXDFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5869 { 2986 /* vfrmax.d.fst */, VE::VFRMAXDFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5870 { 2999 /* vfrmax.d.lst */, VE::VFRMAXDLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5871 { 2999 /* vfrmax.d.lst */, VE::VFRMAXDLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5872 { 3012 /* vfrmax.s.fst */, VE::VFRMAXSFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5873 { 3012 /* vfrmax.s.fst */, VE::VFRMAXSFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5874 { 3025 /* vfrmax.s.lst */, VE::VFRMAXSLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5875 { 3025 /* vfrmax.s.lst */, VE::VFRMAXSLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5876 { 3038 /* vfrmin.d.fst */, VE::VFRMINDFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5877 { 3038 /* vfrmin.d.fst */, VE::VFRMINDFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5878 { 3051 /* vfrmin.d.lst */, VE::VFRMINDLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5879 { 3051 /* vfrmin.d.lst */, VE::VFRMINDLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5880 { 3064 /* vfrmin.s.fst */, VE::VFRMINSFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5881 { 3064 /* vfrmin.s.fst */, VE::VFRMINSFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5882 { 3077 /* vfrmin.s.lst */, VE::VFRMINSLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5883 { 3077 /* vfrmin.s.lst */, VE::VFRMINSLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5884 { 3090 /* vfsqrt.d */, VE::VFSQRTDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5885 { 3090 /* vfsqrt.d */, VE::VFSQRTDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5886 { 3099 /* vfsqrt.s */, VE::VFSQRTSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5887 { 3099 /* vfsqrt.s */, VE::VFSQRTSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5888 { 3108 /* vfsub.d */, VE::VFSUBDrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
5889 { 3108 /* vfsub.d */, VE::VFSUBDvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
5890 { 3108 /* vfsub.d */, VE::VFSUBDiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
5891 { 3108 /* vfsub.d */, VE::VFSUBDrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
5892 { 3108 /* vfsub.d */, VE::VFSUBDvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
5893 { 3108 /* vfsub.d */, VE::VFSUBDivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
5894 { 3116 /* vfsum.d */, VE::VFSUMDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5895 { 3116 /* vfsum.d */, VE::VFSUMDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5896 { 3124 /* vfsum.s */, VE::VFSUMSv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
5897 { 3124 /* vfsum.s */, VE::VFSUMSvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
5898 { 3132 /* vgt */, VE::VGTsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5899 { 3132 /* vgt */, VE::VGTsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5900 { 3132 /* vgt */, VE::VGTsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5901 { 3132 /* vgt */, VE::VGTsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5902 { 3132 /* vgt */, VE::VGTvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5903 { 3132 /* vgt */, VE::VGTvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5904 { 3132 /* vgt */, VE::VGTvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5905 { 3132 /* vgt */, VE::VGTviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5906 { 3132 /* vgt */, VE::VGTsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5907 { 3132 /* vgt */, VE::VGTsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5908 { 3132 /* vgt */, VE::VGTsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5909 { 3132 /* vgt */, VE::VGTsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5910 { 3132 /* vgt */, VE::VGTvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5911 { 3132 /* vgt */, VE::VGTvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5912 { 3132 /* vgt */, VE::VGTvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5913 { 3132 /* vgt */, VE::VGTvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5914 { 3136 /* vgt.nc */, VE::VGTNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5915 { 3136 /* vgt.nc */, VE::VGTNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5916 { 3136 /* vgt.nc */, VE::VGTNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5917 { 3136 /* vgt.nc */, VE::VGTNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5918 { 3136 /* vgt.nc */, VE::VGTNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5919 { 3136 /* vgt.nc */, VE::VGTNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5920 { 3136 /* vgt.nc */, VE::VGTNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5921 { 3136 /* vgt.nc */, VE::VGTNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5922 { 3136 /* vgt.nc */, VE::VGTNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5923 { 3136 /* vgt.nc */, VE::VGTNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5924 { 3136 /* vgt.nc */, VE::VGTNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5925 { 3136 /* vgt.nc */, VE::VGTNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5926 { 3136 /* vgt.nc */, VE::VGTNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5927 { 3136 /* vgt.nc */, VE::VGTNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5928 { 3136 /* vgt.nc */, VE::VGTNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5929 { 3136 /* vgt.nc */, VE::VGTNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5930 { 3143 /* vgtl.sx */, VE::VGTLSXsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5931 { 3143 /* vgtl.sx */, VE::VGTLSXsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5932 { 3143 /* vgtl.sx */, VE::VGTLSXsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5933 { 3143 /* vgtl.sx */, VE::VGTLSXsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5934 { 3143 /* vgtl.sx */, VE::VGTLSXvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5935 { 3143 /* vgtl.sx */, VE::VGTLSXvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5936 { 3143 /* vgtl.sx */, VE::VGTLSXvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5937 { 3143 /* vgtl.sx */, VE::VGTLSXviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5938 { 3143 /* vgtl.sx */, VE::VGTLSXsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5939 { 3143 /* vgtl.sx */, VE::VGTLSXsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5940 { 3143 /* vgtl.sx */, VE::VGTLSXsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5941 { 3143 /* vgtl.sx */, VE::VGTLSXsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5942 { 3143 /* vgtl.sx */, VE::VGTLSXvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5943 { 3143 /* vgtl.sx */, VE::VGTLSXvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5944 { 3143 /* vgtl.sx */, VE::VGTLSXvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5945 { 3143 /* vgtl.sx */, VE::VGTLSXvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5946 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5947 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5948 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5949 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5950 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5951 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5952 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5953 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5954 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5955 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5956 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5957 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5958 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5959 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5960 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5961 { 3151 /* vgtl.sx.nc */, VE::VGTLSXNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5962 { 3162 /* vgtl.zx */, VE::VGTLZXsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5963 { 3162 /* vgtl.zx */, VE::VGTLZXsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5964 { 3162 /* vgtl.zx */, VE::VGTLZXsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5965 { 3162 /* vgtl.zx */, VE::VGTLZXsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5966 { 3162 /* vgtl.zx */, VE::VGTLZXvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5967 { 3162 /* vgtl.zx */, VE::VGTLZXvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5968 { 3162 /* vgtl.zx */, VE::VGTLZXvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5969 { 3162 /* vgtl.zx */, VE::VGTLZXviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5970 { 3162 /* vgtl.zx */, VE::VGTLZXsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5971 { 3162 /* vgtl.zx */, VE::VGTLZXsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5972 { 3162 /* vgtl.zx */, VE::VGTLZXsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5973 { 3162 /* vgtl.zx */, VE::VGTLZXsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5974 { 3162 /* vgtl.zx */, VE::VGTLZXvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5975 { 3162 /* vgtl.zx */, VE::VGTLZXvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5976 { 3162 /* vgtl.zx */, VE::VGTLZXvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5977 { 3162 /* vgtl.zx */, VE::VGTLZXvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5978 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5979 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5980 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5981 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5982 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5983 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
5984 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
5985 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
5986 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
5987 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
5988 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
5989 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5990 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
5991 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
5992 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
5993 { 3170 /* vgtl.zx.nc */, VE::VGTLZXNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
5994 { 3181 /* vgtu */, VE::VGTUsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
5995 { 3181 /* vgtu */, VE::VGTUsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
5996 { 3181 /* vgtu */, VE::VGTUsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
5997 { 3181 /* vgtu */, VE::VGTUsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
5998 { 3181 /* vgtu */, VE::VGTUvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
5999 { 3181 /* vgtu */, VE::VGTUvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6000 { 3181 /* vgtu */, VE::VGTUvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6001 { 3181 /* vgtu */, VE::VGTUviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6002 { 3181 /* vgtu */, VE::VGTUsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6003 { 3181 /* vgtu */, VE::VGTUsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6004 { 3181 /* vgtu */, VE::VGTUsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6005 { 3181 /* vgtu */, VE::VGTUsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6006 { 3181 /* vgtu */, VE::VGTUvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6007 { 3181 /* vgtu */, VE::VGTUvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6008 { 3181 /* vgtu */, VE::VGTUvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6009 { 3181 /* vgtu */, VE::VGTUvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6010 { 3186 /* vgtu.nc */, VE::VGTUNCsrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6011 { 3186 /* vgtu.nc */, VE::VGTUNCsrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6012 { 3186 /* vgtu.nc */, VE::VGTUNCsir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6013 { 3186 /* vgtu.nc */, VE::VGTUNCsiz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6014 { 3186 /* vgtu.nc */, VE::VGTUNCvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6015 { 3186 /* vgtu.nc */, VE::VGTUNCvrz, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6016 { 3186 /* vgtu.nc */, VE::VGTUNCvir, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6017 { 3186 /* vgtu.nc */, VE::VGTUNCviz, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6018 { 3186 /* vgtu.nc */, VE::VGTUNCsrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6019 { 3186 /* vgtu.nc */, VE::VGTUNCsrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6020 { 3186 /* vgtu.nc */, VE::VGTUNCsirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6021 { 3186 /* vgtu.nc */, VE::VGTUNCsizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6022 { 3186 /* vgtu.nc */, VE::VGTUNCvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6023 { 3186 /* vgtu.nc */, VE::VGTUNCvrzm, Convert__Reg1_0__Reg1_1__Reg1_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6024 { 3186 /* vgtu.nc */, VE::VGTUNCvirm, Convert__Reg1_0__Reg1_1__SImm71_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6025 { 3186 /* vgtu.nc */, VE::VGTUNCvizm, Convert__Reg1_0__Reg1_1__SImm71_2__Zero1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6026 { 3194 /* vld */, VE::VLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6027 { 3194 /* vld */, VE::VLDrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6028 { 3194 /* vld */, VE::VLDir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6029 { 3194 /* vld */, VE::VLDiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6030 { 3198 /* vld.nc */, VE::VLDNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6031 { 3198 /* vld.nc */, VE::VLDNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6032 { 3198 /* vld.nc */, VE::VLDNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6033 { 3198 /* vld.nc */, VE::VLDNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6034 { 3205 /* vld2d */, VE::VLD2Drr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6035 { 3205 /* vld2d */, VE::VLD2Drz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6036 { 3205 /* vld2d */, VE::VLD2Dir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6037 { 3205 /* vld2d */, VE::VLD2Diz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6038 { 3211 /* vld2d.nc */, VE::VLD2DNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6039 { 3211 /* vld2d.nc */, VE::VLD2DNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6040 { 3211 /* vld2d.nc */, VE::VLD2DNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6041 { 3211 /* vld2d.nc */, VE::VLD2DNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6042 { 3220 /* vldl.sx */, VE::VLDLSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6043 { 3220 /* vldl.sx */, VE::VLDLSXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6044 { 3220 /* vldl.sx */, VE::VLDLSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6045 { 3220 /* vldl.sx */, VE::VLDLSXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6046 { 3228 /* vldl.sx.nc */, VE::VLDLSXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6047 { 3228 /* vldl.sx.nc */, VE::VLDLSXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6048 { 3228 /* vldl.sx.nc */, VE::VLDLSXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6049 { 3228 /* vldl.sx.nc */, VE::VLDLSXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6050 { 3239 /* vldl.zx */, VE::VLDLZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6051 { 3239 /* vldl.zx */, VE::VLDLZXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6052 { 3239 /* vldl.zx */, VE::VLDLZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6053 { 3239 /* vldl.zx */, VE::VLDLZXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6054 { 3247 /* vldl.zx.nc */, VE::VLDLZXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6055 { 3247 /* vldl.zx.nc */, VE::VLDLZXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6056 { 3247 /* vldl.zx.nc */, VE::VLDLZXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6057 { 3247 /* vldl.zx.nc */, VE::VLDLZXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6058 { 3258 /* vldl2d.sx */, VE::VLDL2DSXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6059 { 3258 /* vldl2d.sx */, VE::VLDL2DSXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6060 { 3258 /* vldl2d.sx */, VE::VLDL2DSXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6061 { 3258 /* vldl2d.sx */, VE::VLDL2DSXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6062 { 3268 /* vldl2d.sx.nc */, VE::VLDL2DSXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6063 { 3268 /* vldl2d.sx.nc */, VE::VLDL2DSXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6064 { 3268 /* vldl2d.sx.nc */, VE::VLDL2DSXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6065 { 3268 /* vldl2d.sx.nc */, VE::VLDL2DSXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6066 { 3281 /* vldl2d.zx */, VE::VLDL2DZXrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6067 { 3281 /* vldl2d.zx */, VE::VLDL2DZXrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6068 { 3281 /* vldl2d.zx */, VE::VLDL2DZXir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6069 { 3281 /* vldl2d.zx */, VE::VLDL2DZXiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6070 { 3291 /* vldl2d.zx.nc */, VE::VLDL2DZXNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6071 { 3291 /* vldl2d.zx.nc */, VE::VLDL2DZXNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6072 { 3291 /* vldl2d.zx.nc */, VE::VLDL2DZXNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6073 { 3291 /* vldl2d.zx.nc */, VE::VLDL2DZXNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6074 { 3304 /* vldu */, VE::VLDUrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6075 { 3304 /* vldu */, VE::VLDUrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6076 { 3304 /* vldu */, VE::VLDUir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6077 { 3304 /* vldu */, VE::VLDUiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6078 { 3309 /* vldu.nc */, VE::VLDUNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6079 { 3309 /* vldu.nc */, VE::VLDUNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6080 { 3309 /* vldu.nc */, VE::VLDUNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6081 { 3309 /* vldu.nc */, VE::VLDUNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6082 { 3317 /* vldu2d */, VE::VLDU2Drr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6083 { 3317 /* vldu2d */, VE::VLDU2Drz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6084 { 3317 /* vldu2d */, VE::VLDU2Dir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6085 { 3317 /* vldu2d */, VE::VLDU2Diz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6086 { 3324 /* vldu2d.nc */, VE::VLDU2DNCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6087 { 3324 /* vldu2d.nc */, VE::VLDU2DNCrz, Convert__Reg1_0__Reg1_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6088 { 3324 /* vldu2d.nc */, VE::VLDU2DNCir, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6089 { 3324 /* vldu2d.nc */, VE::VLDU2DNCiz, Convert__Reg1_0__SImm71_1__Zero1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6090 { 3334 /* vldz */, VE::VLDZv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6091 { 3334 /* vldz */, VE::VLDZvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6092 { 3339 /* vmaxs.l */, VE::VMAXSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6093 { 3339 /* vmaxs.l */, VE::VMAXSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6094 { 3339 /* vmaxs.l */, VE::VMAXSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6095 { 3339 /* vmaxs.l */, VE::VMAXSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6096 { 3339 /* vmaxs.l */, VE::VMAXSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6097 { 3339 /* vmaxs.l */, VE::VMAXSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6098 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6099 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6100 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6101 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6102 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6103 { 3347 /* vmaxs.w.sx */, VE::VMAXSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6104 { 3358 /* vmins.l */, VE::VMINSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6105 { 3358 /* vmins.l */, VE::VMINSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6106 { 3358 /* vmins.l */, VE::VMINSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6107 { 3358 /* vmins.l */, VE::VMINSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6108 { 3358 /* vmins.l */, VE::VMINSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6109 { 3358 /* vmins.l */, VE::VMINSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6110 { 3366 /* vmins.w.sx */, VE::VMINSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6111 { 3366 /* vmins.w.sx */, VE::VMINSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6112 { 3366 /* vmins.w.sx */, VE::VMINSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6113 { 3366 /* vmins.w.sx */, VE::VMINSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6114 { 3366 /* vmins.w.sx */, VE::VMINSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6115 { 3366 /* vmins.w.sx */, VE::VMINSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6116 { 3377 /* vmrg */, VE::VMRGrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6117 { 3377 /* vmrg */, VE::VMRGvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6118 { 3377 /* vmrg */, VE::VMRGiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6119 { 3377 /* vmrg */, VE::VMRGrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6120 { 3377 /* vmrg */, VE::VMRGvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6121 { 3377 /* vmrg */, VE::VMRGivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6122 { 3382 /* vmrg.w */, VE::VMRGWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6123 { 3382 /* vmrg.w */, VE::VMRGWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6124 { 3382 /* vmrg.w */, VE::VMRGWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6125 { 3382 /* vmrg.w */, VE::VMRGWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM512 }, },
6126 { 3382 /* vmrg.w */, VE::VMRGWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM512 }, },
6127 { 3382 /* vmrg.w */, VE::VMRGWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM512 }, },
6128 { 3389 /* vmuls.l */, VE::VMULSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6129 { 3389 /* vmuls.l */, VE::VMULSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6130 { 3389 /* vmuls.l */, VE::VMULSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6131 { 3389 /* vmuls.l */, VE::VMULSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6132 { 3389 /* vmuls.l */, VE::VMULSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6133 { 3389 /* vmuls.l */, VE::VMULSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6134 { 3397 /* vmuls.l.w */, VE::VMULSLWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6135 { 3397 /* vmuls.l.w */, VE::VMULSLWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6136 { 3397 /* vmuls.l.w */, VE::VMULSLWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6137 { 3397 /* vmuls.l.w */, VE::VMULSLWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6138 { 3397 /* vmuls.l.w */, VE::VMULSLWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6139 { 3397 /* vmuls.l.w */, VE::VMULSLWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6140 { 3407 /* vmuls.w.sx */, VE::VMULSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6141 { 3407 /* vmuls.w.sx */, VE::VMULSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6142 { 3407 /* vmuls.w.sx */, VE::VMULSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6143 { 3407 /* vmuls.w.sx */, VE::VMULSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6144 { 3407 /* vmuls.w.sx */, VE::VMULSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6145 { 3407 /* vmuls.w.sx */, VE::VMULSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6146 { 3418 /* vmuls.w.zx */, VE::VMULSWZXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6147 { 3418 /* vmuls.w.zx */, VE::VMULSWZXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6148 { 3418 /* vmuls.w.zx */, VE::VMULSWZXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6149 { 3418 /* vmuls.w.zx */, VE::VMULSWZXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6150 { 3418 /* vmuls.w.zx */, VE::VMULSWZXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6151 { 3418 /* vmuls.w.zx */, VE::VMULSWZXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6152 { 3429 /* vmulu.l */, VE::VMULULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6153 { 3429 /* vmulu.l */, VE::VMULULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6154 { 3429 /* vmulu.l */, VE::VMULULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6155 { 3429 /* vmulu.l */, VE::VMULULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6156 { 3429 /* vmulu.l */, VE::VMULULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6157 { 3429 /* vmulu.l */, VE::VMULULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6158 { 3437 /* vmulu.w */, VE::VMULUWrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6159 { 3437 /* vmulu.w */, VE::VMULUWvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6160 { 3437 /* vmulu.w */, VE::VMULUWiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6161 { 3437 /* vmulu.w */, VE::VMULUWrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6162 { 3437 /* vmulu.w */, VE::VMULUWvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6163 { 3437 /* vmulu.w */, VE::VMULUWivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6164 { 3445 /* vmv */, VE::VMVrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6165 { 3445 /* vmv */, VE::VMViv, Convert__Reg1_0__UImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_UImm7, MCK_V64 }, },
6166 { 3445 /* vmv */, VE::VMVrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6167 { 3445 /* vmv */, VE::VMVivm, Convert__Reg1_0__UImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_UImm7, MCK_V64, MCK_VM }, },
6168 { 3449 /* vor */, VE::VORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6169 { 3449 /* vor */, VE::VORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6170 { 3449 /* vor */, VE::VORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
6171 { 3449 /* vor */, VE::VORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6172 { 3449 /* vor */, VE::VORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6173 { 3449 /* vor */, VE::VORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
6174 { 3453 /* vpcnt */, VE::VPCNTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6175 { 3453 /* vpcnt */, VE::VPCNTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6176 { 3459 /* vrand */, VE::VRANDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6177 { 3459 /* vrand */, VE::VRANDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6178 { 3465 /* vrcp.d */, VE::VRCPDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6179 { 3465 /* vrcp.d */, VE::VRCPDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6180 { 3472 /* vrmaxs.l.fst */, VE::VRMAXSLFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6181 { 3472 /* vrmaxs.l.fst */, VE::VRMAXSLFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6182 { 3485 /* vrmaxs.l.lst */, VE::VRMAXSLLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6183 { 3485 /* vrmaxs.l.lst */, VE::VRMAXSLLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6184 { 3498 /* vrmaxs.w.fst.sx */, VE::VRMAXSWFSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6185 { 3498 /* vrmaxs.w.fst.sx */, VE::VRMAXSWFSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6186 { 3514 /* vrmaxs.w.fst.zx */, VE::VRMAXSWFSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6187 { 3514 /* vrmaxs.w.fst.zx */, VE::VRMAXSWFSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6188 { 3530 /* vrmaxs.w.lst.sx */, VE::VRMAXSWLSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6189 { 3530 /* vrmaxs.w.lst.sx */, VE::VRMAXSWLSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6190 { 3546 /* vrmaxs.w.lst.zx */, VE::VRMAXSWLSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6191 { 3546 /* vrmaxs.w.lst.zx */, VE::VRMAXSWLSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6192 { 3562 /* vrmins.l.fst */, VE::VRMINSLFSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6193 { 3562 /* vrmins.l.fst */, VE::VRMINSLFSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6194 { 3575 /* vrmins.l.lst */, VE::VRMINSLLSTv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6195 { 3575 /* vrmins.l.lst */, VE::VRMINSLLSTvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6196 { 3588 /* vrmins.w.fst.sx */, VE::VRMINSWFSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6197 { 3588 /* vrmins.w.fst.sx */, VE::VRMINSWFSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6198 { 3604 /* vrmins.w.fst.zx */, VE::VRMINSWFSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6199 { 3604 /* vrmins.w.fst.zx */, VE::VRMINSWFSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6200 { 3620 /* vrmins.w.lst.sx */, VE::VRMINSWLSTSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6201 { 3620 /* vrmins.w.lst.sx */, VE::VRMINSWLSTSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6202 { 3636 /* vrmins.w.lst.zx */, VE::VRMINSWLSTZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6203 { 3636 /* vrmins.w.lst.zx */, VE::VRMINSWLSTZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6204 { 3652 /* vror */, VE::VRORv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6205 { 3652 /* vror */, VE::VRORvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6206 { 3657 /* vrsqrt.d */, VE::VRSQRTDv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6207 { 3657 /* vrsqrt.d */, VE::VRSQRTDvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6208 { 3666 /* vrsqrt.d.nex */, VE::VRSQRTDNEXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6209 { 3666 /* vrsqrt.d.nex */, VE::VRSQRTDNEXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6210 { 3679 /* vrxor */, VE::VRXORv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6211 { 3679 /* vrxor */, VE::VRXORvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6212 { 3685 /* vsc */, VE::VSCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6213 { 3685 /* vsc */, VE::VSCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6214 { 3685 /* vsc */, VE::VSCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6215 { 3685 /* vsc */, VE::VSCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6216 { 3685 /* vsc */, VE::VSCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6217 { 3685 /* vsc */, VE::VSCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6218 { 3685 /* vsc */, VE::VSCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6219 { 3685 /* vsc */, VE::VSCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6220 { 3685 /* vsc */, VE::VSCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6221 { 3685 /* vsc */, VE::VSCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6222 { 3685 /* vsc */, VE::VSCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6223 { 3685 /* vsc */, VE::VSCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6224 { 3685 /* vsc */, VE::VSCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6225 { 3685 /* vsc */, VE::VSCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6226 { 3685 /* vsc */, VE::VSCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6227 { 3685 /* vsc */, VE::VSCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6228 { 3689 /* vsc.nc */, VE::VSCNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6229 { 3689 /* vsc.nc */, VE::VSCNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6230 { 3689 /* vsc.nc */, VE::VSCNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6231 { 3689 /* vsc.nc */, VE::VSCNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6232 { 3689 /* vsc.nc */, VE::VSCNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6233 { 3689 /* vsc.nc */, VE::VSCNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6234 { 3689 /* vsc.nc */, VE::VSCNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6235 { 3689 /* vsc.nc */, VE::VSCNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6236 { 3689 /* vsc.nc */, VE::VSCNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6237 { 3689 /* vsc.nc */, VE::VSCNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6238 { 3689 /* vsc.nc */, VE::VSCNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6239 { 3689 /* vsc.nc */, VE::VSCNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6240 { 3689 /* vsc.nc */, VE::VSCNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6241 { 3689 /* vsc.nc */, VE::VSCNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6242 { 3689 /* vsc.nc */, VE::VSCNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6243 { 3689 /* vsc.nc */, VE::VSCNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6244 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6245 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6246 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6247 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6248 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6249 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6250 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6251 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6252 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6253 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6254 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6255 { 3696 /* vsc.nc.ot */, VE::VSCNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6256 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6257 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6258 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6259 { 3696 /* vsc.nc.ot */, VE::VSCNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6260 { 3706 /* vsc.ot */, VE::VSCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6261 { 3706 /* vsc.ot */, VE::VSCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6262 { 3706 /* vsc.ot */, VE::VSCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6263 { 3706 /* vsc.ot */, VE::VSCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6264 { 3706 /* vsc.ot */, VE::VSCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6265 { 3706 /* vsc.ot */, VE::VSCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6266 { 3706 /* vsc.ot */, VE::VSCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6267 { 3706 /* vsc.ot */, VE::VSCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6268 { 3706 /* vsc.ot */, VE::VSCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6269 { 3706 /* vsc.ot */, VE::VSCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6270 { 3706 /* vsc.ot */, VE::VSCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6271 { 3706 /* vsc.ot */, VE::VSCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6272 { 3706 /* vsc.ot */, VE::VSCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6273 { 3706 /* vsc.ot */, VE::VSCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6274 { 3706 /* vsc.ot */, VE::VSCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6275 { 3706 /* vsc.ot */, VE::VSCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6276 { 3713 /* vscl */, VE::VSCLsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6277 { 3713 /* vscl */, VE::VSCLsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6278 { 3713 /* vscl */, VE::VSCLsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6279 { 3713 /* vscl */, VE::VSCLsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6280 { 3713 /* vscl */, VE::VSCLvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6281 { 3713 /* vscl */, VE::VSCLvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6282 { 3713 /* vscl */, VE::VSCLvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6283 { 3713 /* vscl */, VE::VSCLvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6284 { 3713 /* vscl */, VE::VSCLsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6285 { 3713 /* vscl */, VE::VSCLsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6286 { 3713 /* vscl */, VE::VSCLsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6287 { 3713 /* vscl */, VE::VSCLsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6288 { 3713 /* vscl */, VE::VSCLvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6289 { 3713 /* vscl */, VE::VSCLvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6290 { 3713 /* vscl */, VE::VSCLvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6291 { 3713 /* vscl */, VE::VSCLvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6292 { 3718 /* vscl.nc */, VE::VSCLNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6293 { 3718 /* vscl.nc */, VE::VSCLNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6294 { 3718 /* vscl.nc */, VE::VSCLNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6295 { 3718 /* vscl.nc */, VE::VSCLNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6296 { 3718 /* vscl.nc */, VE::VSCLNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6297 { 3718 /* vscl.nc */, VE::VSCLNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6298 { 3718 /* vscl.nc */, VE::VSCLNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6299 { 3718 /* vscl.nc */, VE::VSCLNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6300 { 3718 /* vscl.nc */, VE::VSCLNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6301 { 3718 /* vscl.nc */, VE::VSCLNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6302 { 3718 /* vscl.nc */, VE::VSCLNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6303 { 3718 /* vscl.nc */, VE::VSCLNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6304 { 3718 /* vscl.nc */, VE::VSCLNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6305 { 3718 /* vscl.nc */, VE::VSCLNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6306 { 3718 /* vscl.nc */, VE::VSCLNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6307 { 3718 /* vscl.nc */, VE::VSCLNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6308 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6309 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6310 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6311 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6312 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6313 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6314 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6315 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6316 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6317 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6318 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6319 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6320 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6321 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6322 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6323 { 3726 /* vscl.nc.ot */, VE::VSCLNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6324 { 3737 /* vscl.ot */, VE::VSCLOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6325 { 3737 /* vscl.ot */, VE::VSCLOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6326 { 3737 /* vscl.ot */, VE::VSCLOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6327 { 3737 /* vscl.ot */, VE::VSCLOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6328 { 3737 /* vscl.ot */, VE::VSCLOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6329 { 3737 /* vscl.ot */, VE::VSCLOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6330 { 3737 /* vscl.ot */, VE::VSCLOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6331 { 3737 /* vscl.ot */, VE::VSCLOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6332 { 3737 /* vscl.ot */, VE::VSCLOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6333 { 3737 /* vscl.ot */, VE::VSCLOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6334 { 3737 /* vscl.ot */, VE::VSCLOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6335 { 3737 /* vscl.ot */, VE::VSCLOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6336 { 3737 /* vscl.ot */, VE::VSCLOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6337 { 3737 /* vscl.ot */, VE::VSCLOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6338 { 3737 /* vscl.ot */, VE::VSCLOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6339 { 3737 /* vscl.ot */, VE::VSCLOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6340 { 3745 /* vscu */, VE::VSCUsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6341 { 3745 /* vscu */, VE::VSCUsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6342 { 3745 /* vscu */, VE::VSCUsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6343 { 3745 /* vscu */, VE::VSCUsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6344 { 3745 /* vscu */, VE::VSCUvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6345 { 3745 /* vscu */, VE::VSCUvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6346 { 3745 /* vscu */, VE::VSCUvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6347 { 3745 /* vscu */, VE::VSCUvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6348 { 3745 /* vscu */, VE::VSCUsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6349 { 3745 /* vscu */, VE::VSCUsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6350 { 3745 /* vscu */, VE::VSCUsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6351 { 3745 /* vscu */, VE::VSCUsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6352 { 3745 /* vscu */, VE::VSCUvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6353 { 3745 /* vscu */, VE::VSCUvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6354 { 3745 /* vscu */, VE::VSCUvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6355 { 3745 /* vscu */, VE::VSCUvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6356 { 3750 /* vscu.nc */, VE::VSCUNCsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6357 { 3750 /* vscu.nc */, VE::VSCUNCsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6358 { 3750 /* vscu.nc */, VE::VSCUNCsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6359 { 3750 /* vscu.nc */, VE::VSCUNCsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6360 { 3750 /* vscu.nc */, VE::VSCUNCvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6361 { 3750 /* vscu.nc */, VE::VSCUNCvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6362 { 3750 /* vscu.nc */, VE::VSCUNCvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6363 { 3750 /* vscu.nc */, VE::VSCUNCvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6364 { 3750 /* vscu.nc */, VE::VSCUNCsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6365 { 3750 /* vscu.nc */, VE::VSCUNCsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6366 { 3750 /* vscu.nc */, VE::VSCUNCsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6367 { 3750 /* vscu.nc */, VE::VSCUNCsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6368 { 3750 /* vscu.nc */, VE::VSCUNCvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6369 { 3750 /* vscu.nc */, VE::VSCUNCvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6370 { 3750 /* vscu.nc */, VE::VSCUNCvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6371 { 3750 /* vscu.nc */, VE::VSCUNCvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6372 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6373 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6374 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6375 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6376 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6377 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6378 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6379 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6380 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6381 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6382 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6383 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6384 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6385 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6386 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6387 { 3758 /* vscu.nc.ot */, VE::VSCUNCOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6388 { 3769 /* vscu.ot */, VE::VSCUOTsrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64 }, },
6389 { 3769 /* vscu.ot */, VE::VSCUOTsrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero }, },
6390 { 3769 /* vscu.ot */, VE::VSCUOTsirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64 }, },
6391 { 3769 /* vscu.ot */, VE::VSCUOTsizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero }, },
6392 { 3769 /* vscu.ot */, VE::VSCUOTvrrv, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6393 { 3769 /* vscu.ot */, VE::VSCUOTvrzv, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero }, },
6394 { 3769 /* vscu.ot */, VE::VSCUOTvirv, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64 }, },
6395 { 3769 /* vscu.ot */, VE::VSCUOTvizv, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero }, },
6396 { 3769 /* vscu.ot */, VE::VSCUOTsrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_I64, MCK_VM }, },
6397 { 3769 /* vscu.ot */, VE::VSCUOTsrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_Zero, MCK_VM }, },
6398 { 3769 /* vscu.ot */, VE::VSCUOTsirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_I64, MCK_VM }, },
6399 { 3769 /* vscu.ot */, VE::VSCUOTsizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_I64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6400 { 3769 /* vscu.ot */, VE::VSCUOTvrrvm, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6401 { 3769 /* vscu.ot */, VE::VSCUOTvrzvm, Convert__Reg1_1__Reg1_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6402 { 3769 /* vscu.ot */, VE::VSCUOTvirvm, Convert__Reg1_1__SImm71_2__Reg1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6403 { 3769 /* vscu.ot */, VE::VSCUOTvizvm, Convert__Reg1_1__SImm71_2__Zero1_3__Reg1_0__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6404 { 3777 /* vseq */, VE::VSEQ, Convert__Reg1_0, AMFBS_None, { MCK_V64 }, },
6405 { 3777 /* vseq */, VE::VSEQm, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_VM }, },
6406 { 3782 /* vsfa */, VE::VSFAvrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64 }, },
6407 { 3782 /* vsfa */, VE::VSFAvrm, Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_MImm }, },
6408 { 3782 /* vsfa */, VE::VSFAvir, Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_I64 }, },
6409 { 3782 /* vsfa */, VE::VSFAvim, Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_MImm }, },
6410 { 3782 /* vsfa */, VE::VSFAvrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6411 { 3782 /* vsfa */, VE::VSFAvrmm, Convert__Reg1_0__Reg1_1__Reg1_2__MImm1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_MImm, MCK_VM }, },
6412 { 3782 /* vsfa */, VE::VSFAvirm, Convert__Reg1_0__Reg1_1__UImm31_2__Reg1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_I64, MCK_VM }, },
6413 { 3782 /* vsfa */, VE::VSFAvimm, Convert__Reg1_0__Reg1_1__UImm31_2__MImm1_3__Reg1_4, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm3, MCK_MImm, MCK_VM }, },
6414 { 3787 /* vshf */, VE::VSHFvvr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_I64 }, },
6415 { 3787 /* vshf */, VE::VSHFvvi, Convert__Reg1_0__Reg1_1__Reg1_2__UImm41_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_UImm4 }, },
6416 { 3792 /* vsla.l */, VE::VSLALvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
6417 { 3792 /* vsla.l */, VE::VSLALvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6418 { 3792 /* vsla.l */, VE::VSLALvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6419 { 3792 /* vsla.l */, VE::VSLALvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
6420 { 3792 /* vsla.l */, VE::VSLALvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6421 { 3792 /* vsla.l */, VE::VSLALvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6422 { 3799 /* vsla.w.sx */, VE::VSLAWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
6423 { 3799 /* vsla.w.sx */, VE::VSLAWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6424 { 3799 /* vsla.w.sx */, VE::VSLAWSXvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6425 { 3799 /* vsla.w.sx */, VE::VSLAWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
6426 { 3799 /* vsla.w.sx */, VE::VSLAWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6427 { 3799 /* vsla.w.sx */, VE::VSLAWSXvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6428 { 3809 /* vsld */, VE::VSLDvvr, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64 }, },
6429 { 3809 /* vsld */, VE::VSLDvvi, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7 }, },
6430 { 3809 /* vsld */, VE::VSLDvvrm, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64, MCK_VM }, },
6431 { 3809 /* vsld */, VE::VSLDvvim, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7, MCK_VM }, },
6432 { 3814 /* vsll */, VE::VSLLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
6433 { 3814 /* vsll */, VE::VSLLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6434 { 3814 /* vsll */, VE::VSLLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6435 { 3814 /* vsll */, VE::VSLLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
6436 { 3814 /* vsll */, VE::VSLLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6437 { 3814 /* vsll */, VE::VSLLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6438 { 3819 /* vsra.l */, VE::VSRALvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
6439 { 3819 /* vsra.l */, VE::VSRALvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6440 { 3819 /* vsra.l */, VE::VSRALvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6441 { 3819 /* vsra.l */, VE::VSRALvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
6442 { 3819 /* vsra.l */, VE::VSRALvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6443 { 3819 /* vsra.l */, VE::VSRALvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6444 { 3826 /* vsra.w.sx */, VE::VSRAWSXvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32 }, },
6445 { 3826 /* vsra.w.sx */, VE::VSRAWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6446 { 3826 /* vsra.w.sx */, VE::VSRAWSXvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6447 { 3826 /* vsra.w.sx */, VE::VSRAWSXvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I32, MCK_VM }, },
6448 { 3826 /* vsra.w.sx */, VE::VSRAWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6449 { 3826 /* vsra.w.sx */, VE::VSRAWSXvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6450 { 3836 /* vsrd */, VE::VSRDvvr, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64 }, },
6451 { 3836 /* vsrd */, VE::VSRDvvi, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7 }, },
6452 { 3836 /* vsrd */, VE::VSRDvvrm, Convert__Reg1_0__Reg1_2__Reg1_3__Reg1_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_I64, MCK_VM }, },
6453 { 3836 /* vsrd */, VE::VSRDvvim, Convert__Reg1_0__Reg1_2__Reg1_3__UImm71_5__Reg1_6, AMFBS_None, { MCK_V64, MCK__40_, MCK_V64, MCK_V64, MCK__41_, MCK_UImm7, MCK_VM }, },
6454 { 3841 /* vsrl */, VE::VSRLvr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64 }, },
6455 { 3841 /* vsrl */, VE::VSRLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6456 { 3841 /* vsrl */, VE::VSRLvi, Convert__Reg1_0__Reg1_1__UImm71_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7 }, },
6457 { 3841 /* vsrl */, VE::VSRLvrm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_I64, MCK_VM }, },
6458 { 3841 /* vsrl */, VE::VSRLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6459 { 3841 /* vsrl */, VE::VSRLvim, Convert__Reg1_0__Reg1_1__UImm71_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_UImm7, MCK_VM }, },
6460 { 3846 /* vst */, VE::VSTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6461 { 3846 /* vst */, VE::VSTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6462 { 3846 /* vst */, VE::VSTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6463 { 3846 /* vst */, VE::VSTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6464 { 3846 /* vst */, VE::VSTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6465 { 3846 /* vst */, VE::VSTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6466 { 3846 /* vst */, VE::VSTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6467 { 3846 /* vst */, VE::VSTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6468 { 3850 /* vst.nc */, VE::VSTNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6469 { 3850 /* vst.nc */, VE::VSTNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6470 { 3850 /* vst.nc */, VE::VSTNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6471 { 3850 /* vst.nc */, VE::VSTNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6472 { 3850 /* vst.nc */, VE::VSTNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6473 { 3850 /* vst.nc */, VE::VSTNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6474 { 3850 /* vst.nc */, VE::VSTNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6475 { 3850 /* vst.nc */, VE::VSTNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6476 { 3857 /* vst.nc.ot */, VE::VSTNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6477 { 3857 /* vst.nc.ot */, VE::VSTNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6478 { 3857 /* vst.nc.ot */, VE::VSTNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6479 { 3857 /* vst.nc.ot */, VE::VSTNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6480 { 3857 /* vst.nc.ot */, VE::VSTNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6481 { 3857 /* vst.nc.ot */, VE::VSTNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6482 { 3857 /* vst.nc.ot */, VE::VSTNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6483 { 3857 /* vst.nc.ot */, VE::VSTNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6484 { 3867 /* vst.ot */, VE::VSTOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6485 { 3867 /* vst.ot */, VE::VSTOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6486 { 3867 /* vst.ot */, VE::VSTOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6487 { 3867 /* vst.ot */, VE::VSTOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6488 { 3867 /* vst.ot */, VE::VSTOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6489 { 3867 /* vst.ot */, VE::VSTOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6490 { 3867 /* vst.ot */, VE::VSTOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6491 { 3867 /* vst.ot */, VE::VSTOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6492 { 3874 /* vst2d */, VE::VST2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6493 { 3874 /* vst2d */, VE::VST2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6494 { 3874 /* vst2d */, VE::VST2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6495 { 3874 /* vst2d */, VE::VST2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6496 { 3874 /* vst2d */, VE::VST2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6497 { 3874 /* vst2d */, VE::VST2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6498 { 3874 /* vst2d */, VE::VST2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6499 { 3874 /* vst2d */, VE::VST2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6500 { 3880 /* vst2d.nc */, VE::VST2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6501 { 3880 /* vst2d.nc */, VE::VST2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6502 { 3880 /* vst2d.nc */, VE::VST2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6503 { 3880 /* vst2d.nc */, VE::VST2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6504 { 3880 /* vst2d.nc */, VE::VST2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6505 { 3880 /* vst2d.nc */, VE::VST2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6506 { 3880 /* vst2d.nc */, VE::VST2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6507 { 3880 /* vst2d.nc */, VE::VST2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6508 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6509 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6510 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6511 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6512 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6513 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6514 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6515 { 3889 /* vst2d.nc.ot */, VE::VST2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6516 { 3901 /* vst2d.ot */, VE::VST2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6517 { 3901 /* vst2d.ot */, VE::VST2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6518 { 3901 /* vst2d.ot */, VE::VST2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6519 { 3901 /* vst2d.ot */, VE::VST2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6520 { 3901 /* vst2d.ot */, VE::VST2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6521 { 3901 /* vst2d.ot */, VE::VST2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6522 { 3901 /* vst2d.ot */, VE::VST2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6523 { 3901 /* vst2d.ot */, VE::VST2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6524 { 3910 /* vstl */, VE::VSTLrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6525 { 3910 /* vstl */, VE::VSTLrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6526 { 3910 /* vstl */, VE::VSTLirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6527 { 3910 /* vstl */, VE::VSTLizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6528 { 3910 /* vstl */, VE::VSTLrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6529 { 3910 /* vstl */, VE::VSTLrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6530 { 3910 /* vstl */, VE::VSTLirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6531 { 3910 /* vstl */, VE::VSTLizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6532 { 3915 /* vstl.nc */, VE::VSTLNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6533 { 3915 /* vstl.nc */, VE::VSTLNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6534 { 3915 /* vstl.nc */, VE::VSTLNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6535 { 3915 /* vstl.nc */, VE::VSTLNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6536 { 3915 /* vstl.nc */, VE::VSTLNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6537 { 3915 /* vstl.nc */, VE::VSTLNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6538 { 3915 /* vstl.nc */, VE::VSTLNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6539 { 3915 /* vstl.nc */, VE::VSTLNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6540 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6541 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6542 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6543 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6544 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6545 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6546 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6547 { 3923 /* vstl.nc.ot */, VE::VSTLNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6548 { 3934 /* vstl.ot */, VE::VSTLOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6549 { 3934 /* vstl.ot */, VE::VSTLOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6550 { 3934 /* vstl.ot */, VE::VSTLOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6551 { 3934 /* vstl.ot */, VE::VSTLOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6552 { 3934 /* vstl.ot */, VE::VSTLOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6553 { 3934 /* vstl.ot */, VE::VSTLOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6554 { 3934 /* vstl.ot */, VE::VSTLOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6555 { 3934 /* vstl.ot */, VE::VSTLOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6556 { 3942 /* vstl2d */, VE::VSTL2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6557 { 3942 /* vstl2d */, VE::VSTL2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6558 { 3942 /* vstl2d */, VE::VSTL2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6559 { 3942 /* vstl2d */, VE::VSTL2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6560 { 3942 /* vstl2d */, VE::VSTL2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6561 { 3942 /* vstl2d */, VE::VSTL2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6562 { 3942 /* vstl2d */, VE::VSTL2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6563 { 3942 /* vstl2d */, VE::VSTL2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6564 { 3949 /* vstl2d.nc */, VE::VSTL2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6565 { 3949 /* vstl2d.nc */, VE::VSTL2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6566 { 3949 /* vstl2d.nc */, VE::VSTL2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6567 { 3949 /* vstl2d.nc */, VE::VSTL2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6568 { 3949 /* vstl2d.nc */, VE::VSTL2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6569 { 3949 /* vstl2d.nc */, VE::VSTL2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6570 { 3949 /* vstl2d.nc */, VE::VSTL2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6571 { 3949 /* vstl2d.nc */, VE::VSTL2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6572 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6573 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6574 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6575 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6576 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6577 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6578 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6579 { 3959 /* vstl2d.nc.ot */, VE::VSTL2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6580 { 3972 /* vstl2d.ot */, VE::VSTL2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6581 { 3972 /* vstl2d.ot */, VE::VSTL2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6582 { 3972 /* vstl2d.ot */, VE::VSTL2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6583 { 3972 /* vstl2d.ot */, VE::VSTL2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6584 { 3972 /* vstl2d.ot */, VE::VSTL2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6585 { 3972 /* vstl2d.ot */, VE::VSTL2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6586 { 3972 /* vstl2d.ot */, VE::VSTL2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6587 { 3972 /* vstl2d.ot */, VE::VSTL2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6588 { 3982 /* vstu */, VE::VSTUrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6589 { 3982 /* vstu */, VE::VSTUrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6590 { 3982 /* vstu */, VE::VSTUirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6591 { 3982 /* vstu */, VE::VSTUizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6592 { 3982 /* vstu */, VE::VSTUrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6593 { 3982 /* vstu */, VE::VSTUrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6594 { 3982 /* vstu */, VE::VSTUirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6595 { 3982 /* vstu */, VE::VSTUizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6596 { 3987 /* vstu.nc */, VE::VSTUNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6597 { 3987 /* vstu.nc */, VE::VSTUNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6598 { 3987 /* vstu.nc */, VE::VSTUNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6599 { 3987 /* vstu.nc */, VE::VSTUNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6600 { 3987 /* vstu.nc */, VE::VSTUNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6601 { 3987 /* vstu.nc */, VE::VSTUNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6602 { 3987 /* vstu.nc */, VE::VSTUNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6603 { 3987 /* vstu.nc */, VE::VSTUNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6604 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6605 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6606 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6607 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6608 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6609 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6610 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6611 { 3995 /* vstu.nc.ot */, VE::VSTUNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6612 { 4006 /* vstu.ot */, VE::VSTUOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6613 { 4006 /* vstu.ot */, VE::VSTUOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6614 { 4006 /* vstu.ot */, VE::VSTUOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6615 { 4006 /* vstu.ot */, VE::VSTUOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6616 { 4006 /* vstu.ot */, VE::VSTUOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6617 { 4006 /* vstu.ot */, VE::VSTUOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6618 { 4006 /* vstu.ot */, VE::VSTUOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6619 { 4006 /* vstu.ot */, VE::VSTUOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6620 { 4014 /* vstu2d */, VE::VSTU2Drrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6621 { 4014 /* vstu2d */, VE::VSTU2Drzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6622 { 4014 /* vstu2d */, VE::VSTU2Dirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6623 { 4014 /* vstu2d */, VE::VSTU2Dizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6624 { 4014 /* vstu2d */, VE::VSTU2Drrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6625 { 4014 /* vstu2d */, VE::VSTU2Drzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6626 { 4014 /* vstu2d */, VE::VSTU2Dirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6627 { 4014 /* vstu2d */, VE::VSTU2Dizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6628 { 4021 /* vstu2d.nc */, VE::VSTU2DNCrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6629 { 4021 /* vstu2d.nc */, VE::VSTU2DNCrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6630 { 4021 /* vstu2d.nc */, VE::VSTU2DNCirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6631 { 4021 /* vstu2d.nc */, VE::VSTU2DNCizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6632 { 4021 /* vstu2d.nc */, VE::VSTU2DNCrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6633 { 4021 /* vstu2d.nc */, VE::VSTU2DNCrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6634 { 4021 /* vstu2d.nc */, VE::VSTU2DNCirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6635 { 4021 /* vstu2d.nc */, VE::VSTU2DNCizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6636 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6637 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6638 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6639 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6640 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6641 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6642 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6643 { 4031 /* vstu2d.nc.ot */, VE::VSTU2DNCOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6644 { 4044 /* vstu2d.ot */, VE::VSTU2DOTrrv, Convert__Reg1_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64 }, },
6645 { 4044 /* vstu2d.ot */, VE::VSTU2DOTrzv, Convert__Reg1_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero }, },
6646 { 4044 /* vstu2d.ot */, VE::VSTU2DOTirv, Convert__SImm71_1__Reg1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64 }, },
6647 { 4044 /* vstu2d.ot */, VE::VSTU2DOTizv, Convert__SImm71_1__Zero1_2__Reg1_0, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero }, },
6648 { 4044 /* vstu2d.ot */, VE::VSTU2DOTrrvm, Convert__Reg1_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_I64, MCK_VM }, },
6649 { 4044 /* vstu2d.ot */, VE::VSTU2DOTrzvm, Convert__Reg1_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_Zero, MCK_VM }, },
6650 { 4044 /* vstu2d.ot */, VE::VSTU2DOTirvm, Convert__SImm71_1__Reg1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_I64, MCK_VM }, },
6651 { 4044 /* vstu2d.ot */, VE::VSTU2DOTizvm, Convert__SImm71_1__Zero1_2__Reg1_0__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_Zero, MCK_VM }, },
6652 { 4054 /* vsubs.l */, VE::VSUBSLrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6653 { 4054 /* vsubs.l */, VE::VSUBSLvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6654 { 4054 /* vsubs.l */, VE::VSUBSLiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6655 { 4054 /* vsubs.l */, VE::VSUBSLrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6656 { 4054 /* vsubs.l */, VE::VSUBSLvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6657 { 4054 /* vsubs.l */, VE::VSUBSLivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6658 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64 }, },
6659 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6660 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6661 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I32, MCK_V64, MCK_VM }, },
6662 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6663 { 4062 /* vsubs.w.sx */, VE::VSUBSWSXivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6664 { 4073 /* vsubu.l */, VE::VSUBULrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6665 { 4073 /* vsubu.l */, VE::VSUBULvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6666 { 4073 /* vsubu.l */, VE::VSUBULiv, Convert__Reg1_0__SImm71_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64 }, },
6667 { 4073 /* vsubu.l */, VE::VSUBULrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6668 { 4073 /* vsubu.l */, VE::VSUBULvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6669 { 4073 /* vsubu.l */, VE::VSUBULivm, Convert__Reg1_0__SImm71_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_SImm7, MCK_V64, MCK_VM }, },
6670 { 4081 /* vsum.l */, VE::VSUMLv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6671 { 4081 /* vsum.l */, VE::VSUMLvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6672 { 4088 /* vsum.w.sx */, VE::VSUMWSXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6673 { 4088 /* vsum.w.sx */, VE::VSUMWSXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6674 { 4098 /* vsum.w.zx */, VE::VSUMWZXv, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_V64, MCK_V64 }, },
6675 { 4098 /* vsum.w.zx */, VE::VSUMWZXvm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_VM }, },
6676 { 4108 /* vxor */, VE::VXORrv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64 }, },
6677 { 4108 /* vxor */, VE::VXORvv, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64 }, },
6678 { 4108 /* vxor */, VE::VXORmv, Convert__Reg1_0__MImm1_1__Reg1_2, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64 }, },
6679 { 4108 /* vxor */, VE::VXORrvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_I64, MCK_V64, MCK_VM }, },
6680 { 4108 /* vxor */, VE::VXORvvm, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_V64, MCK_V64, MCK_VM }, },
6681 { 4108 /* vxor */, VE::VXORmvm, Convert__Reg1_0__MImm1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_V64, MCK_MImm, MCK_V64, MCK_VM }, },
6682 { 4113 /* xor */, VE::XORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_I64 }, },
6683 { 4113 /* xor */, VE::XORrm, Convert__Reg1_0__Reg1_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_I64, MCK_MImm }, },
6684 { 4113 /* xor */, VE::XORri, Convert__Reg1_0__Reg1_2__SImm71_1, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_I64 }, },
6685 { 4113 /* xor */, VE::XORim, Convert__Reg1_0__SImm71_1__MImm1_2, AMFBS_None, { MCK_I64, MCK_SImm7, MCK_MImm }, },
6686 { 4117 /* xorm */, VE::XORMmm, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VM, MCK_VM, MCK_VM }, },
6687};
6688
6689#include "llvm/Support/Debug.h"
6690#include "llvm/Support/Format.h"
6691
6692unsigned VEAsmParser::
6693MatchInstructionImpl(const OperandVector &Operands,
6694 MCInst &Inst,
6695 uint64_t &ErrorInfo,
6696 FeatureBitset &MissingFeatures,
6697 bool matchingInlineAsm, unsigned VariantID) {
6698 // Eliminate obvious mismatches.
6699 if (Operands.size() > 8) {
6700 ErrorInfo = 8;
6701 return Match_InvalidOperand;
6702 }
6703
6704 // Get the current feature set.
6705 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
6706
6707 // Get the instruction mnemonic, which is the first token.
6708 StringRef Mnemonic = ((VEOperand &)*Operands[0]).getToken();
6709
6710 // Process all MnemonicAliases to remap the mnemonic.
6711 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
6712
6713 // Some state to try to produce better error messages.
6714 bool HadMatchOtherThanFeatures = false;
6715 bool HadMatchOtherThanPredicate = false;
6716 unsigned RetCode = Match_InvalidOperand;
6717 MissingFeatures.set();
6718 // Set ErrorInfo to the operand that mismatches if it is
6719 // wrong for all instances of the instruction.
6720 ErrorInfo = ~0ULL;
6721 // Find the appropriate table for this asm variant.
6722 const MatchEntry *Start, *End;
6723 switch (VariantID) {
6724 default: llvm_unreachable("invalid variant!");
6725 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
6726 }
6727 // Search the table.
6728 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
6729
6730 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
6731 std::distance(MnemonicRange.first, MnemonicRange.second) <<
6732 " encodings with mnemonic '" << Mnemonic << "'\n");
6733
6734 // Return a more specific error code if no mnemonics match.
6735 if (MnemonicRange.first == MnemonicRange.second)
6736 return Match_MnemonicFail;
6737
6738 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
6739 it != ie; ++it) {
6740 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
6741 bool HasRequiredFeatures =
6742 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
6743 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
6744 << MII.getName(it->Opcode) << "\n");
6745 // equal_range guarantees that instruction mnemonic matches.
6746 assert(Mnemonic == it->getMnemonic());
6747 bool OperandsValid = true;
6748 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 7; ++FormalIdx) {
6749 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
6750 DEBUG_WITH_TYPE("asm-matcher",
6751 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
6752 << " against actual operand at index " << ActualIdx);
6753 if (ActualIdx < Operands.size())
6754 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
6755 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
6756 else
6757 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
6758 if (ActualIdx >= Operands.size()) {
6759 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n");
6760 if (Formal == InvalidMatchClass) {
6761 break;
6762 }
6763 if (isSubclass(Formal, OptionalMatchClass)) {
6764 continue;
6765 }
6766 OperandsValid = false;
6767 ErrorInfo = ActualIdx;
6768 break;
6769 }
6770 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
6771 unsigned Diag = validateOperandClass(Actual, Formal);
6772 if (Diag == Match_Success) {
6773 DEBUG_WITH_TYPE("asm-matcher",
6774 dbgs() << "match success using generic matcher\n");
6775 ++ActualIdx;
6776 continue;
6777 }
6778 // If the generic handler indicates an invalid operand
6779 // failure, check for a special case.
6780 if (Diag != Match_Success) {
6781 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
6782 if (TargetDiag == Match_Success) {
6783 DEBUG_WITH_TYPE("asm-matcher",
6784 dbgs() << "match success using target matcher\n");
6785 ++ActualIdx;
6786 continue;
6787 }
6788 // If the target matcher returned a specific error code use
6789 // that, else use the one from the generic matcher.
6790 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
6791 Diag = TargetDiag;
6792 }
6793 // If current formal operand wasn't matched and it is optional
6794 // then try to match next formal operand
6795 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
6796 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
6797 continue;
6798 }
6799 // If this operand is broken for all of the instances of this
6800 // mnemonic, keep track of it so we can report loc info.
6801 // If we already had a match that only failed due to a
6802 // target predicate, that diagnostic is preferred.
6803 if (!HadMatchOtherThanPredicate &&
6804 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
6805 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
6806 RetCode = Diag;
6807 ErrorInfo = ActualIdx;
6808 }
6809 // Otherwise, just reject this instance of the mnemonic.
6810 OperandsValid = false;
6811 break;
6812 }
6813
6814 if (!OperandsValid) {
6815 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
6816 "operand mismatches, ignoring "
6817 "this opcode\n");
6818 continue;
6819 }
6820 if (!HasRequiredFeatures) {
6821 HadMatchOtherThanFeatures = true;
6822 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
6823 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
6824 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
6825 if (NewMissingFeatures[I])
6826 dbgs() << ' ' << I;
6827 dbgs() << "\n");
6828 if (NewMissingFeatures.count() <=
6829 MissingFeatures.count())
6830 MissingFeatures = NewMissingFeatures;
6831 continue;
6832 }
6833
6834 Inst.clear();
6835
6836 Inst.setOpcode(it->Opcode);
6837 // We have a potential match but have not rendered the operands.
6838 // Check the target predicate to handle any context sensitive
6839 // constraints.
6840 // For example, Ties that are referenced multiple times must be
6841 // checked here to ensure the input is the same for each match
6842 // constraints. If we leave it any later the ties will have been
6843 // canonicalized
6844 unsigned MatchResult;
6845 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
6846 Inst.clear();
6847 DEBUG_WITH_TYPE(
6848 "asm-matcher",
6849 dbgs() << "Early target match predicate failed with diag code "
6850 << MatchResult << "\n");
6851 RetCode = MatchResult;
6852 HadMatchOtherThanPredicate = true;
6853 continue;
6854 }
6855
6856 if (matchingInlineAsm) {
6857 convertToMapAndConstraints(it->ConvertFn, Operands);
6858 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
6859 ErrorInfo))
6860 return Match_InvalidTiedOperand;
6861
6862 return Match_Success;
6863 }
6864
6865 // We have selected a definite instruction, convert the parsed
6866 // operands into the appropriate MCInst.
6867 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
6868
6869 // We have a potential match. Check the target predicate to
6870 // handle any context sensitive constraints.
6871 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
6872 DEBUG_WITH_TYPE("asm-matcher",
6873 dbgs() << "Target match predicate failed with diag code "
6874 << MatchResult << "\n");
6875 Inst.clear();
6876 RetCode = MatchResult;
6877 HadMatchOtherThanPredicate = true;
6878 continue;
6879 }
6880
6881 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands,
6882 ErrorInfo))
6883 return Match_InvalidTiedOperand;
6884
6885 DEBUG_WITH_TYPE(
6886 "asm-matcher",
6887 dbgs() << "Opcode result: complete match, selecting this opcode\n");
6888 return Match_Success;
6889 }
6890
6891 // Okay, we had no match. Try to return a useful error code.
6892 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
6893 return RetCode;
6894
6895 ErrorInfo = 0;
6896 return Match_MissingFeature;
6897}
6898
6899namespace {
6900 struct OperandMatchEntry {
6901 uint16_t Mnemonic;
6902 uint8_t OperandMask;
6903 uint8_t Class;
6904 uint8_t RequiredFeaturesIdx;
6905
6906 StringRef getMnemonic() const {
6907 return StringRef(MnemonicTable + Mnemonic + 1,
6908 MnemonicTable[Mnemonic]);
6909 }
6910 };
6911
6912 // Predicate for searching for an opcode.
6913 struct LessOpcodeOperand {
6914 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
6915 return LHS.getMnemonic() < RHS;
6916 }
6917 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
6918 return LHS < RHS.getMnemonic();
6919 }
6920 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
6921 return LHS.getMnemonic() < RHS.getMnemonic();
6922 }
6923 };
6924} // end anonymous namespace
6925
6926static const OperandMatchEntry OperandMatchTable[408] = {
6927 /* Operand List Mnemonic, Mask, Operand Class, Features */
6928 { 0 /* adds.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6929 { 0 /* adds.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6930 { 7 /* adds.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6931 { 7 /* adds.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6932 { 17 /* adds.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6933 { 17 /* adds.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6934 { 27 /* addu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6935 { 27 /* addu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6936 { 34 /* addu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6937 { 34 /* addu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6938 { 41 /* and */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6939 { 41 /* and */, 4 /* 2 */, MCK_MImm, AMFBS_None },
6940 { 50 /* atmam */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6941 { 50 /* atmam */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
6942 { 50 /* atmam */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6943 { 50 /* atmam */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
6944 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6945 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6946 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6947 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6948 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6949 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6950 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6951 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6952 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6953 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6954 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6955 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6956 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6957 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6958 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6959 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6960 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6961 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6962 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6963 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6964 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6965 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6966 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6967 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6968 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6969 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6970 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6971 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6972 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6973 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6974 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6975 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6976 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6977 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6978 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6979 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6980 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6981 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6982 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6983 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6984 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6985 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6986 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6987 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6988 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6989 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6990 { 56 /* b */, 8 /* 3 */, MCK_MEMri, AMFBS_None },
6991 { 56 /* b */, 8 /* 3 */, MCK_MEMzi, AMFBS_None },
6992 { 58 /* b.d */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6993 { 58 /* b.d */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6994 { 62 /* b.d.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6995 { 62 /* b.d.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6996 { 69 /* b.d.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6997 { 69 /* b.d.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
6998 { 75 /* b.l */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
6999 { 75 /* b.l */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7000 { 79 /* b.l.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7001 { 79 /* b.l.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7002 { 86 /* b.l.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7003 { 86 /* b.l.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7004 { 92 /* b.s */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7005 { 92 /* b.s */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7006 { 96 /* b.s.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7007 { 96 /* b.s.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7008 { 103 /* b.s.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7009 { 103 /* b.s.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7010 { 109 /* b.w */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7011 { 109 /* b.w */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7012 { 113 /* b.w.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7013 { 113 /* b.w.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7014 { 120 /* b.w.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7015 { 120 /* b.w.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7016 { 126 /* baf.d */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7017 { 126 /* baf.d */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7018 { 132 /* baf.d.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7019 { 132 /* baf.d.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7020 { 141 /* baf.d.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7021 { 141 /* baf.d.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7022 { 149 /* baf.l */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7023 { 149 /* baf.l */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7024 { 155 /* baf.l.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7025 { 155 /* baf.l.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7026 { 164 /* baf.l.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7027 { 164 /* baf.l.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7028 { 172 /* baf.s */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7029 { 172 /* baf.s */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7030 { 178 /* baf.s.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7031 { 178 /* baf.s.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7032 { 187 /* baf.s.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7033 { 187 /* baf.s.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7034 { 195 /* baf.w */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7035 { 195 /* baf.w */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7036 { 201 /* baf.w.nt */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7037 { 201 /* baf.w.nt */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7038 { 210 /* baf.w.t */, 1 /* 0 */, MCK_MEMri, AMFBS_None },
7039 { 210 /* baf.w.t */, 1 /* 0 */, MCK_MEMzi, AMFBS_None },
7040 { 405 /* brv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7041 { 409 /* bsic */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7042 { 409 /* bsic */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7043 { 409 /* bsic */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7044 { 409 /* bsic */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7045 { 414 /* bswp */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7046 { 419 /* cas.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7047 { 419 /* cas.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7048 { 419 /* cas.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7049 { 419 /* cas.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7050 { 425 /* cas.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7051 { 425 /* cas.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7052 { 425 /* cas.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7053 { 425 /* cas.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7054 { 431 /* cmov.d. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7055 { 431 /* cmov.d. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7056 { 439 /* cmov.l. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7057 { 439 /* cmov.l. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7058 { 447 /* cmov.s. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7059 { 447 /* cmov.s. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7060 { 455 /* cmov.w. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7061 { 455 /* cmov.w. */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7062 { 463 /* cmps.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7063 { 463 /* cmps.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7064 { 470 /* cmps.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7065 { 470 /* cmps.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7066 { 480 /* cmps.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7067 { 480 /* cmps.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7068 { 490 /* cmpu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7069 { 490 /* cmpu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7070 { 497 /* cmpu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7071 { 497 /* cmpu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7072 { 628 /* divs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7073 { 628 /* divs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7074 { 635 /* divs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7075 { 635 /* divs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7076 { 645 /* divs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7077 { 645 /* divs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7078 { 655 /* divu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7079 { 655 /* divu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7080 { 662 /* divu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7081 { 662 /* divu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7082 { 669 /* dld */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7083 { 669 /* dld */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7084 { 669 /* dld */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7085 { 669 /* dld */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7086 { 673 /* dldl.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7087 { 673 /* dldl.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7088 { 673 /* dldl.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7089 { 673 /* dldl.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7090 { 681 /* dldl.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7091 { 681 /* dldl.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7092 { 681 /* dldl.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7093 { 681 /* dldl.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7094 { 689 /* dldu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7095 { 689 /* dldu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7096 { 689 /* dldu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7097 { 689 /* dldu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7098 { 694 /* eqv */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7099 { 694 /* eqv */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7100 { 703 /* fadd.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7101 { 703 /* fadd.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7102 { 710 /* fadd.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7103 { 710 /* fadd.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7104 { 717 /* fadd.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7105 { 717 /* fadd.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7106 { 724 /* fcmp.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7107 { 724 /* fcmp.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7108 { 731 /* fcmp.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7109 { 731 /* fcmp.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7110 { 738 /* fcmp.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7111 { 738 /* fcmp.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7112 { 745 /* fdiv.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7113 { 745 /* fdiv.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7114 { 752 /* fdiv.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7115 { 752 /* fdiv.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7116 { 786 /* fmax.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7117 { 786 /* fmax.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7118 { 793 /* fmax.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7119 { 793 /* fmax.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7120 { 800 /* fmin.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7121 { 800 /* fmin.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7122 { 807 /* fmin.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7123 { 807 /* fmin.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7124 { 814 /* fmul.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7125 { 814 /* fmul.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7126 { 821 /* fmul.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7127 { 821 /* fmul.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7128 { 828 /* fmul.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7129 { 828 /* fmul.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7130 { 835 /* fsub.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7131 { 835 /* fsub.d */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7132 { 842 /* fsub.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7133 { 842 /* fsub.q */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7134 { 849 /* fsub.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7135 { 849 /* fsub.s */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7136 { 860 /* ld */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7137 { 860 /* ld */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7138 { 860 /* ld */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7139 { 860 /* ld */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7140 { 863 /* ld1b.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7141 { 863 /* ld1b.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7142 { 863 /* ld1b.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7143 { 863 /* ld1b.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7144 { 871 /* ld1b.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7145 { 871 /* ld1b.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7146 { 871 /* ld1b.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7147 { 871 /* ld1b.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7148 { 879 /* ld2b.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7149 { 879 /* ld2b.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7150 { 879 /* ld2b.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7151 { 879 /* ld2b.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7152 { 887 /* ld2b.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7153 { 887 /* ld2b.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7154 { 887 /* ld2b.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7155 { 887 /* ld2b.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7156 { 895 /* ldl.sx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7157 { 895 /* ldl.sx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7158 { 895 /* ldl.sx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7159 { 895 /* ldl.sx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7160 { 902 /* ldl.zx */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7161 { 902 /* ldl.zx */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7162 { 902 /* ldl.zx */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7163 { 902 /* ldl.zx */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7164 { 909 /* ldu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7165 { 909 /* ldu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7166 { 909 /* ldu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7167 { 909 /* ldu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7168 { 913 /* ldz */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7169 { 917 /* lea */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7170 { 917 /* lea */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7171 { 917 /* lea */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7172 { 917 /* lea */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7173 { 921 /* lea.sl */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7174 { 921 /* lea.sl */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7175 { 921 /* lea.sl */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7176 { 921 /* lea.sl */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7177 { 932 /* lhm.b */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7178 { 932 /* lhm.b */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7179 { 938 /* lhm.h */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7180 { 938 /* lhm.h */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7181 { 944 /* lhm.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7182 { 944 /* lhm.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7183 { 950 /* lhm.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7184 { 950 /* lhm.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7185 { 960 /* lsv */, 16 /* 4 */, MCK_MImm, AMFBS_None },
7186 { 960 /* lsv */, 16 /* 4 */, MCK_MImm, AMFBS_None },
7187 { 973 /* lvm */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7188 { 973 /* lvm */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7189 { 986 /* maxs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7190 { 986 /* maxs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7191 { 993 /* maxs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7192 { 993 /* maxs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7193 { 1003 /* maxs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7194 { 1003 /* maxs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7195 { 1013 /* mins.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7196 { 1013 /* mins.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7197 { 1020 /* mins.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7198 { 1020 /* mins.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7199 { 1030 /* mins.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7200 { 1030 /* mins.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7201 { 1054 /* mrg */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7202 { 1054 /* mrg */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7203 { 1058 /* muls.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7204 { 1058 /* muls.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7205 { 1065 /* muls.l.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7206 { 1065 /* muls.l.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7207 { 1074 /* muls.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7208 { 1074 /* muls.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7209 { 1084 /* muls.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7210 { 1084 /* muls.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7211 { 1094 /* mulu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7212 { 1094 /* mulu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7213 { 1101 /* mulu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7214 { 1101 /* mulu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7215 { 1113 /* nnd */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7216 { 1113 /* nnd */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7217 { 1126 /* or */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7218 { 1126 /* or */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7219 { 1133 /* pcnt */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7220 { 1143 /* pfch */, 1 /* 0 */, MCK_MEMrii, AMFBS_None },
7221 { 1143 /* pfch */, 1 /* 0 */, MCK_MEMrri, AMFBS_None },
7222 { 1143 /* pfch */, 1 /* 0 */, MCK_MEMzii, AMFBS_None },
7223 { 1143 /* pfch */, 1 /* 0 */, MCK_MEMzri, AMFBS_None },
7224 { 1217 /* pvand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7225 { 1217 /* pvand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7226 { 1223 /* pvand.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7227 { 1223 /* pvand.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7228 { 1232 /* pvand.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7229 { 1232 /* pvand.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7230 { 1397 /* pveqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7231 { 1397 /* pveqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7232 { 1403 /* pveqv.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7233 { 1403 /* pveqv.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7234 { 1412 /* pveqv.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7235 { 1412 /* pveqv.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7236 { 1895 /* pvor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7237 { 1895 /* pvor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7238 { 1900 /* pvor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7239 { 1900 /* pvor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7240 { 1908 /* pvor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7241 { 1908 /* pvor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7242 { 2213 /* pvxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7243 { 2213 /* pvxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7244 { 2219 /* pvxor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7245 { 2219 /* pvxor.lo */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7246 { 2228 /* pvxor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7247 { 2228 /* pvxor.up */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7248 { 2245 /* shm.b */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7249 { 2245 /* shm.b */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7250 { 2251 /* shm.h */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7251 { 2251 /* shm.h */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7252 { 2257 /* shm.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7253 { 2257 /* shm.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7254 { 2263 /* shm.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7255 { 2263 /* shm.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7256 { 2273 /* sla.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7257 { 2273 /* sla.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7258 { 2279 /* sla.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7259 { 2279 /* sla.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7260 { 2288 /* sla.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7261 { 2288 /* sla.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7262 { 2297 /* sld */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7263 { 2297 /* sld */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7264 { 2301 /* sll */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7265 { 2301 /* sll */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7266 { 2319 /* sra.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7267 { 2319 /* sra.l */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7268 { 2325 /* sra.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7269 { 2325 /* sra.w.sx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7270 { 2334 /* sra.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7271 { 2334 /* sra.w.zx */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7272 { 2343 /* srd */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7273 { 2343 /* srd */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7274 { 2347 /* srl */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7275 { 2347 /* srl */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7276 { 2351 /* st */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7277 { 2351 /* st */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7278 { 2351 /* st */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7279 { 2351 /* st */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7280 { 2354 /* st1b */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7281 { 2354 /* st1b */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7282 { 2354 /* st1b */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7283 { 2354 /* st1b */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7284 { 2359 /* st2b */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7285 { 2359 /* st2b */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7286 { 2359 /* st2b */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7287 { 2359 /* st2b */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7288 { 2364 /* stl */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7289 { 2364 /* stl */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7290 { 2364 /* stl */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7291 { 2364 /* stl */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7292 { 2368 /* stu */, 2 /* 1 */, MCK_MEMrii, AMFBS_None },
7293 { 2368 /* stu */, 2 /* 1 */, MCK_MEMrri, AMFBS_None },
7294 { 2368 /* stu */, 2 /* 1 */, MCK_MEMzii, AMFBS_None },
7295 { 2368 /* stu */, 2 /* 1 */, MCK_MEMzri, AMFBS_None },
7296 { 2372 /* subs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7297 { 2372 /* subs.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7298 { 2379 /* subs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7299 { 2379 /* subs.w.sx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7300 { 2389 /* subs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7301 { 2389 /* subs.w.zx */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7302 { 2399 /* subu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7303 { 2399 /* subu.l */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7304 { 2406 /* subu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7305 { 2406 /* subu.w */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7306 { 2431 /* ts1am.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7307 { 2431 /* ts1am.l */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7308 { 2431 /* ts1am.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7309 { 2431 /* ts1am.l */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7310 { 2439 /* ts1am.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7311 { 2439 /* ts1am.w */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7312 { 2439 /* ts1am.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7313 { 2439 /* ts1am.w */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7314 { 2447 /* ts2am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7315 { 2447 /* ts2am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7316 { 2447 /* ts2am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7317 { 2447 /* ts2am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7318 { 2453 /* ts3am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7319 { 2453 /* ts3am */, 2 /* 1 */, MCK_MEMri, AMFBS_None },
7320 { 2453 /* ts3am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7321 { 2453 /* ts3am */, 2 /* 1 */, MCK_MEMzi, AMFBS_None },
7322 { 2491 /* vand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7323 { 2491 /* vand */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7324 { 2697 /* veqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7325 { 2697 /* veqv */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7326 { 3449 /* vor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7327 { 3449 /* vor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7328 { 3782 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
7329 { 3782 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
7330 { 3782 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
7331 { 3782 /* vsfa */, 8 /* 3 */, MCK_MImm, AMFBS_None },
7332 { 4108 /* vxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7333 { 4108 /* vxor */, 2 /* 1 */, MCK_MImm, AMFBS_None },
7334 { 4113 /* xor */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7335 { 4113 /* xor */, 4 /* 2 */, MCK_MImm, AMFBS_None },
7336};
7337
7338ParseStatus VEAsmParser::
7339tryCustomParseOperand(OperandVector &Operands,
7340 unsigned MCK) {
7341
7342 switch(MCK) {
7343 case MCK_MImm:
7344 return parseMImmOperand(Operands);
7345 case MCK_MEMri:
7346 return parseMEMAsOperand(Operands);
7347 case MCK_MEMrii:
7348 return parseMEMOperand(Operands);
7349 case MCK_MEMrri:
7350 return parseMEMOperand(Operands);
7351 case MCK_MEMzi:
7352 return parseMEMAsOperand(Operands);
7353 case MCK_MEMzii:
7354 return parseMEMOperand(Operands);
7355 case MCK_MEMzri:
7356 return parseMEMOperand(Operands);
7357 default:
7358 return ParseStatus::NoMatch;
7359 }
7360 return ParseStatus::NoMatch;
7361}
7362
7363ParseStatus VEAsmParser::
7364MatchOperandParserImpl(OperandVector &Operands,
7365 StringRef Mnemonic,
7366 bool ParseForAllFeatures) {
7367 // Get the current feature set.
7368 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
7369
7370 // Get the next operand index.
7371 unsigned NextOpNum = Operands.size() - 1;
7372 // Search the table.
7373 auto MnemonicRange =
7374 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
7375 Mnemonic, LessOpcodeOperand());
7376
7377 if (MnemonicRange.first == MnemonicRange.second)
7378 return ParseStatus::NoMatch;
7379
7380 for (const OperandMatchEntry *it = MnemonicRange.first,
7381 *ie = MnemonicRange.second; it != ie; ++it) {
7382 // equal_range guarantees that instruction mnemonic matches.
7383 assert(Mnemonic == it->getMnemonic());
7384
7385 // check if the available features match
7386 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
7387 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures)
7388 continue;
7389
7390 // check if the operand in question has a custom parser.
7391 if (!(it->OperandMask & (1 << NextOpNum)))
7392 continue;
7393
7394 // call custom parse method to handle the operand
7395 ParseStatus Result = tryCustomParseOperand(Operands, it->Class);
7396 if (!Result.isNoMatch())
7397 return Result;
7398 }
7399
7400 // Okay, we had no match.
7401 return ParseStatus::NoMatch;
7402}
7403
7404#endif // GET_MATCHER_IMPLEMENTATION
7405
7406
7407#ifdef GET_MNEMONIC_SPELL_CHECKER
7408#undef GET_MNEMONIC_SPELL_CHECKER
7409
7410static std::string VEMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
7411 const unsigned MaxEditDist = 2;
7412 std::vector<StringRef> Candidates;
7413 StringRef Prev = "";
7414
7415 // Find the appropriate table for this asm variant.
7416 const MatchEntry *Start, *End;
7417 switch (VariantID) {
7418 default: llvm_unreachable("invalid variant!");
7419 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
7420 }
7421
7422 for (auto I = Start; I < End; I++) {
7423 // Ignore unsupported instructions.
7424 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
7425 if ((FBS & RequiredFeatures) != RequiredFeatures)
7426 continue;
7427
7428 StringRef T = I->getMnemonic();
7429 // Avoid recomputing the edit distance for the same string.
7430 if (T == Prev)
7431 continue;
7432
7433 Prev = T;
7434 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
7435 if (Dist <= MaxEditDist)
7436 Candidates.push_back(T);
7437 }
7438
7439 if (Candidates.empty())
7440 return "";
7441
7442 std::string Res = ", did you mean: ";
7443 unsigned i = 0;
7444 for (; i < Candidates.size() - 1; i++)
7445 Res += Candidates[i].str() + ", ";
7446 return Res + Candidates[i].str() + "?";
7447}
7448
7449#endif // GET_MNEMONIC_SPELL_CHECKER
7450
7451
7452#ifdef GET_MNEMONIC_CHECKER
7453#undef GET_MNEMONIC_CHECKER
7454
7455static bool VECheckMnemonic(StringRef Mnemonic,
7456 const FeatureBitset &AvailableFeatures,
7457 unsigned VariantID) {
7458 // Process all MnemonicAliases to remap the mnemonic.
7459 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
7460
7461 // Find the appropriate table for this asm variant.
7462 const MatchEntry *Start, *End;
7463 switch (VariantID) {
7464 default: llvm_unreachable("invalid variant!");
7465 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
7466 }
7467
7468 // Search the table.
7469 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
7470
7471 if (MnemonicRange.first == MnemonicRange.second)
7472 return false;
7473
7474 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
7475 it != ie; ++it) {
7476 const FeatureBitset &RequiredFeatures =
7477 FeatureBitsets[it->RequiredFeaturesIdx];
7478 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
7479 return true;
7480 }
7481 return false;
7482}
7483
7484#endif // GET_MNEMONIC_CHECKER
7485
7486