| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Machine Code Emitter *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | uint64_t VEMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, |
| 10 | SmallVectorImpl<MCFixup> &Fixups, |
| 11 | const MCSubtargetInfo &STI) const { |
| 12 | static const uint64_t InstBits[] = { |
| 13 | UINT64_C(0), |
| 14 | UINT64_C(0), |
| 15 | UINT64_C(0), |
| 16 | UINT64_C(0), |
| 17 | UINT64_C(0), |
| 18 | UINT64_C(0), |
| 19 | UINT64_C(0), |
| 20 | UINT64_C(0), |
| 21 | UINT64_C(0), |
| 22 | UINT64_C(0), |
| 23 | UINT64_C(0), |
| 24 | UINT64_C(0), |
| 25 | UINT64_C(0), |
| 26 | UINT64_C(0), |
| 27 | UINT64_C(0), |
| 28 | UINT64_C(0), |
| 29 | UINT64_C(0), |
| 30 | UINT64_C(0), |
| 31 | UINT64_C(0), |
| 32 | UINT64_C(0), |
| 33 | UINT64_C(0), |
| 34 | UINT64_C(0), |
| 35 | UINT64_C(0), |
| 36 | UINT64_C(0), |
| 37 | UINT64_C(0), |
| 38 | UINT64_C(0), |
| 39 | UINT64_C(0), |
| 40 | UINT64_C(0), |
| 41 | UINT64_C(0), |
| 42 | UINT64_C(0), |
| 43 | UINT64_C(0), |
| 44 | UINT64_C(0), |
| 45 | UINT64_C(0), |
| 46 | UINT64_C(0), |
| 47 | UINT64_C(0), |
| 48 | UINT64_C(0), |
| 49 | UINT64_C(0), |
| 50 | UINT64_C(0), |
| 51 | UINT64_C(0), |
| 52 | UINT64_C(0), |
| 53 | UINT64_C(0), |
| 54 | UINT64_C(0), |
| 55 | UINT64_C(0), |
| 56 | UINT64_C(0), |
| 57 | UINT64_C(0), |
| 58 | UINT64_C(0), |
| 59 | UINT64_C(0), |
| 60 | UINT64_C(0), |
| 61 | UINT64_C(0), |
| 62 | UINT64_C(0), |
| 63 | UINT64_C(0), |
| 64 | UINT64_C(0), |
| 65 | UINT64_C(0), |
| 66 | UINT64_C(0), |
| 67 | UINT64_C(0), |
| 68 | UINT64_C(0), |
| 69 | UINT64_C(0), |
| 70 | UINT64_C(0), |
| 71 | UINT64_C(0), |
| 72 | UINT64_C(0), |
| 73 | UINT64_C(0), |
| 74 | UINT64_C(0), |
| 75 | UINT64_C(0), |
| 76 | UINT64_C(0), |
| 77 | UINT64_C(0), |
| 78 | UINT64_C(0), |
| 79 | UINT64_C(0), |
| 80 | UINT64_C(0), |
| 81 | UINT64_C(0), |
| 82 | UINT64_C(0), |
| 83 | UINT64_C(0), |
| 84 | UINT64_C(0), |
| 85 | UINT64_C(0), |
| 86 | UINT64_C(0), |
| 87 | UINT64_C(0), |
| 88 | UINT64_C(0), |
| 89 | UINT64_C(0), |
| 90 | UINT64_C(0), |
| 91 | UINT64_C(0), |
| 92 | UINT64_C(0), |
| 93 | UINT64_C(0), |
| 94 | UINT64_C(0), |
| 95 | UINT64_C(0), |
| 96 | UINT64_C(0), |
| 97 | UINT64_C(0), |
| 98 | UINT64_C(0), |
| 99 | UINT64_C(0), |
| 100 | UINT64_C(0), |
| 101 | UINT64_C(0), |
| 102 | UINT64_C(0), |
| 103 | UINT64_C(0), |
| 104 | UINT64_C(0), |
| 105 | UINT64_C(0), |
| 106 | UINT64_C(0), |
| 107 | UINT64_C(0), |
| 108 | UINT64_C(0), |
| 109 | UINT64_C(0), |
| 110 | UINT64_C(0), |
| 111 | UINT64_C(0), |
| 112 | UINT64_C(0), |
| 113 | UINT64_C(0), |
| 114 | UINT64_C(0), |
| 115 | UINT64_C(0), |
| 116 | UINT64_C(0), |
| 117 | UINT64_C(0), |
| 118 | UINT64_C(0), |
| 119 | UINT64_C(0), |
| 120 | UINT64_C(0), |
| 121 | UINT64_C(0), |
| 122 | UINT64_C(0), |
| 123 | UINT64_C(0), |
| 124 | UINT64_C(0), |
| 125 | UINT64_C(0), |
| 126 | UINT64_C(0), |
| 127 | UINT64_C(0), |
| 128 | UINT64_C(0), |
| 129 | UINT64_C(0), |
| 130 | UINT64_C(0), |
| 131 | UINT64_C(0), |
| 132 | UINT64_C(0), |
| 133 | UINT64_C(0), |
| 134 | UINT64_C(0), |
| 135 | UINT64_C(0), |
| 136 | UINT64_C(0), |
| 137 | UINT64_C(0), |
| 138 | UINT64_C(0), |
| 139 | UINT64_C(0), |
| 140 | UINT64_C(0), |
| 141 | UINT64_C(0), |
| 142 | UINT64_C(0), |
| 143 | UINT64_C(0), |
| 144 | UINT64_C(0), |
| 145 | UINT64_C(0), |
| 146 | UINT64_C(0), |
| 147 | UINT64_C(0), |
| 148 | UINT64_C(0), |
| 149 | UINT64_C(0), |
| 150 | UINT64_C(0), |
| 151 | UINT64_C(0), |
| 152 | UINT64_C(0), |
| 153 | UINT64_C(0), |
| 154 | UINT64_C(0), |
| 155 | UINT64_C(0), |
| 156 | UINT64_C(0), |
| 157 | UINT64_C(0), |
| 158 | UINT64_C(0), |
| 159 | UINT64_C(0), |
| 160 | UINT64_C(0), |
| 161 | UINT64_C(0), |
| 162 | UINT64_C(0), |
| 163 | UINT64_C(0), |
| 164 | UINT64_C(0), |
| 165 | UINT64_C(0), |
| 166 | UINT64_C(0), |
| 167 | UINT64_C(0), |
| 168 | UINT64_C(0), |
| 169 | UINT64_C(0), |
| 170 | UINT64_C(0), |
| 171 | UINT64_C(0), |
| 172 | UINT64_C(0), |
| 173 | UINT64_C(0), |
| 174 | UINT64_C(0), |
| 175 | UINT64_C(0), |
| 176 | UINT64_C(0), |
| 177 | UINT64_C(0), |
| 178 | UINT64_C(0), |
| 179 | UINT64_C(0), |
| 180 | UINT64_C(0), |
| 181 | UINT64_C(0), |
| 182 | UINT64_C(0), |
| 183 | UINT64_C(0), |
| 184 | UINT64_C(0), |
| 185 | UINT64_C(0), |
| 186 | UINT64_C(0), |
| 187 | UINT64_C(0), |
| 188 | UINT64_C(0), |
| 189 | UINT64_C(0), |
| 190 | UINT64_C(0), |
| 191 | UINT64_C(0), |
| 192 | UINT64_C(0), |
| 193 | UINT64_C(0), |
| 194 | UINT64_C(0), |
| 195 | UINT64_C(0), |
| 196 | UINT64_C(0), |
| 197 | UINT64_C(0), |
| 198 | UINT64_C(0), |
| 199 | UINT64_C(0), |
| 200 | UINT64_C(0), |
| 201 | UINT64_C(0), |
| 202 | UINT64_C(0), |
| 203 | UINT64_C(0), |
| 204 | UINT64_C(0), |
| 205 | UINT64_C(0), |
| 206 | UINT64_C(0), |
| 207 | UINT64_C(0), |
| 208 | UINT64_C(0), |
| 209 | UINT64_C(0), |
| 210 | UINT64_C(0), |
| 211 | UINT64_C(0), |
| 212 | UINT64_C(0), |
| 213 | UINT64_C(0), |
| 214 | UINT64_C(0), |
| 215 | UINT64_C(0), |
| 216 | UINT64_C(0), |
| 217 | UINT64_C(0), |
| 218 | UINT64_C(0), |
| 219 | UINT64_C(0), |
| 220 | UINT64_C(0), |
| 221 | UINT64_C(0), |
| 222 | UINT64_C(0), |
| 223 | UINT64_C(0), |
| 224 | UINT64_C(0), |
| 225 | UINT64_C(0), |
| 226 | UINT64_C(0), |
| 227 | UINT64_C(0), |
| 228 | UINT64_C(0), |
| 229 | UINT64_C(0), |
| 230 | UINT64_C(0), |
| 231 | UINT64_C(0), |
| 232 | UINT64_C(0), |
| 233 | UINT64_C(0), |
| 234 | UINT64_C(0), |
| 235 | UINT64_C(0), |
| 236 | UINT64_C(0), |
| 237 | UINT64_C(0), |
| 238 | UINT64_C(0), |
| 239 | UINT64_C(0), |
| 240 | UINT64_C(0), |
| 241 | UINT64_C(0), |
| 242 | UINT64_C(0), |
| 243 | UINT64_C(0), |
| 244 | UINT64_C(0), |
| 245 | UINT64_C(0), |
| 246 | UINT64_C(0), |
| 247 | UINT64_C(0), |
| 248 | UINT64_C(0), |
| 249 | UINT64_C(0), |
| 250 | UINT64_C(0), |
| 251 | UINT64_C(0), |
| 252 | UINT64_C(0), |
| 253 | UINT64_C(0), |
| 254 | UINT64_C(0), |
| 255 | UINT64_C(0), |
| 256 | UINT64_C(0), |
| 257 | UINT64_C(0), |
| 258 | UINT64_C(0), |
| 259 | UINT64_C(0), |
| 260 | UINT64_C(0), |
| 261 | UINT64_C(0), |
| 262 | UINT64_C(0), |
| 263 | UINT64_C(0), |
| 264 | UINT64_C(0), |
| 265 | UINT64_C(0), |
| 266 | UINT64_C(0), |
| 267 | UINT64_C(0), |
| 268 | UINT64_C(0), |
| 269 | UINT64_C(0), |
| 270 | UINT64_C(0), |
| 271 | UINT64_C(0), |
| 272 | UINT64_C(0), |
| 273 | UINT64_C(0), |
| 274 | UINT64_C(0), |
| 275 | UINT64_C(0), |
| 276 | UINT64_C(0), |
| 277 | UINT64_C(0), |
| 278 | UINT64_C(0), |
| 279 | UINT64_C(0), |
| 280 | UINT64_C(0), |
| 281 | UINT64_C(0), |
| 282 | UINT64_C(0), |
| 283 | UINT64_C(0), |
| 284 | UINT64_C(0), |
| 285 | UINT64_C(0), |
| 286 | UINT64_C(0), |
| 287 | UINT64_C(0), |
| 288 | UINT64_C(0), |
| 289 | UINT64_C(0), |
| 290 | UINT64_C(0), |
| 291 | UINT64_C(0), |
| 292 | UINT64_C(0), |
| 293 | UINT64_C(0), |
| 294 | UINT64_C(0), |
| 295 | UINT64_C(0), |
| 296 | UINT64_C(0), |
| 297 | UINT64_C(0), |
| 298 | UINT64_C(0), |
| 299 | UINT64_C(0), |
| 300 | UINT64_C(0), |
| 301 | UINT64_C(0), |
| 302 | UINT64_C(0), |
| 303 | UINT64_C(0), |
| 304 | UINT64_C(0), |
| 305 | UINT64_C(0), |
| 306 | UINT64_C(0), |
| 307 | UINT64_C(0), |
| 308 | UINT64_C(0), |
| 309 | UINT64_C(0), |
| 310 | UINT64_C(0), |
| 311 | UINT64_C(0), |
| 312 | UINT64_C(0), |
| 313 | UINT64_C(0), |
| 314 | UINT64_C(0), |
| 315 | UINT64_C(0), |
| 316 | UINT64_C(0), |
| 317 | UINT64_C(0), |
| 318 | UINT64_C(0), |
| 319 | UINT64_C(0), |
| 320 | UINT64_C(0), |
| 321 | UINT64_C(0), |
| 322 | UINT64_C(0), |
| 323 | UINT64_C(0), |
| 324 | UINT64_C(0), |
| 325 | UINT64_C(0), |
| 326 | UINT64_C(0), |
| 327 | UINT64_C(0), |
| 328 | UINT64_C(0), |
| 329 | UINT64_C(0), |
| 330 | UINT64_C(0), |
| 331 | UINT64_C(0), |
| 332 | UINT64_C(0), |
| 333 | UINT64_C(0), |
| 334 | UINT64_C(0), |
| 335 | UINT64_C(0), |
| 336 | UINT64_C(0), |
| 337 | UINT64_C(0), |
| 338 | UINT64_C(0), |
| 339 | UINT64_C(0), |
| 340 | UINT64_C(0), |
| 341 | UINT64_C(0), |
| 342 | UINT64_C(0), |
| 343 | UINT64_C(6413125869375586304), // ADDSLim |
| 344 | UINT64_C(6413126419131400192), // ADDSLri |
| 345 | UINT64_C(6413266606863941632), // ADDSLrm |
| 346 | UINT64_C(6413267156619755520), // ADDSLrr |
| 347 | UINT64_C(5332261958806667264), // ADDSWSXim |
| 348 | UINT64_C(5332262508562481152), // ADDSWSXri |
| 349 | UINT64_C(5332402696295022592), // ADDSWSXrm |
| 350 | UINT64_C(5332403246050836480), // ADDSWSXrr |
| 351 | UINT64_C(5368290755825631232), // ADDSWZXim |
| 352 | UINT64_C(5368291305581445120), // ADDSWZXri |
| 353 | UINT64_C(5368431493313986560), // ADDSWZXrm |
| 354 | UINT64_C(5368432043069800448), // ADDSWZXrr |
| 355 | UINT64_C(5188146770730811392), // ADDULim |
| 356 | UINT64_C(5188147320486625280), // ADDULri |
| 357 | UINT64_C(5188287508219166720), // ADDULrm |
| 358 | UINT64_C(5188288057974980608), // ADDULrr |
| 359 | UINT64_C(5224175567749775360), // ADDUWim |
| 360 | UINT64_C(5224176117505589248), // ADDUWri |
| 361 | UINT64_C(5224316305238130688), // ADDUWrm |
| 362 | UINT64_C(5224316854993944576), // ADDUWrr |
| 363 | UINT64_C(9511602413006487552), // ANDMmm |
| 364 | UINT64_C(4899916394579099648), // ANDim |
| 365 | UINT64_C(4899916944334913536), // ANDri |
| 366 | UINT64_C(4900057132067454976), // ANDrm |
| 367 | UINT64_C(4900057681823268864), // ANDrr |
| 368 | UINT64_C(5980780854903832576), // ATMAMrii |
| 369 | UINT64_C(5980921592392187904), // ATMAMrir |
| 370 | UINT64_C(5980780305148018688), // ATMAMzii |
| 371 | UINT64_C(5980921042636374016), // ATMAMzir |
| 372 | UINT64_C(2021835307468455936), // BCFDari |
| 373 | UINT64_C(2030842506723196928), // BCFDari_nt |
| 374 | UINT64_C(2035346106350567424), // BCFDari_t |
| 375 | UINT64_C(2021834757712642048), // BCFDazi |
| 376 | UINT64_C(2030841956967383040), // BCFDazi_nt |
| 377 | UINT64_C(2035345556594753536), // BCFDazi_t |
| 378 | UINT64_C(2017613182817796096), // BCFDiri |
| 379 | UINT64_C(2026620382072537088), // BCFDiri_nt |
| 380 | UINT64_C(2031123981699907584), // BCFDiri_t |
| 381 | UINT64_C(2017612633061982208), // BCFDizi |
| 382 | UINT64_C(2026619832316723200), // BCFDizi_nt |
| 383 | UINT64_C(2031123431944093696), // BCFDizi_t |
| 384 | UINT64_C(2017613182817796096), // BCFDnari |
| 385 | UINT64_C(2026620382072537088), // BCFDnari_nt |
| 386 | UINT64_C(2031123981699907584), // BCFDnari_t |
| 387 | UINT64_C(2017612633061982208), // BCFDnazi |
| 388 | UINT64_C(2026619832316723200), // BCFDnazi_nt |
| 389 | UINT64_C(2031123431944093696), // BCFDnazi_t |
| 390 | UINT64_C(2017753920306151424), // BCFDrri |
| 391 | UINT64_C(2026761119560892416), // BCFDrri_nt |
| 392 | UINT64_C(2031264719188262912), // BCFDrri_t |
| 393 | UINT64_C(2017753370550337536), // BCFDrzi |
| 394 | UINT64_C(2026760569805078528), // BCFDrzi_nt |
| 395 | UINT64_C(2031264169432449024), // BCFDrzi_t |
| 396 | UINT64_C(1805662525354672128), // BCFLari |
| 397 | UINT64_C(1814669724609413120), // BCFLari_nt |
| 398 | UINT64_C(1819173324236783616), // BCFLari_t |
| 399 | UINT64_C(1805661975598858240), // BCFLazi |
| 400 | UINT64_C(1814669174853599232), // BCFLazi_nt |
| 401 | UINT64_C(1819172774480969728), // BCFLazi_t |
| 402 | UINT64_C(1801440400704012288), // BCFLiri |
| 403 | UINT64_C(1810447599958753280), // BCFLiri_nt |
| 404 | UINT64_C(1814951199586123776), // BCFLiri_t |
| 405 | UINT64_C(1801439850948198400), // BCFLizi |
| 406 | UINT64_C(1810447050202939392), // BCFLizi_nt |
| 407 | UINT64_C(1814950649830309888), // BCFLizi_t |
| 408 | UINT64_C(1801440400704012288), // BCFLnari |
| 409 | UINT64_C(1810447599958753280), // BCFLnari_nt |
| 410 | UINT64_C(1814951199586123776), // BCFLnari_t |
| 411 | UINT64_C(1801439850948198400), // BCFLnazi |
| 412 | UINT64_C(1810447050202939392), // BCFLnazi_nt |
| 413 | UINT64_C(1814950649830309888), // BCFLnazi_t |
| 414 | UINT64_C(1801581138192367616), // BCFLrri |
| 415 | UINT64_C(1810588337447108608), // BCFLrri_nt |
| 416 | UINT64_C(1815091937074479104), // BCFLrri_t |
| 417 | UINT64_C(1801580588436553728), // BCFLrzi |
| 418 | UINT64_C(1810587787691294720), // BCFLrzi_nt |
| 419 | UINT64_C(1815091387318665216), // BCFLrzi_t |
| 420 | UINT64_C(2057864104487419904), // BCFSari |
| 421 | UINT64_C(2066871303742160896), // BCFSari_nt |
| 422 | UINT64_C(2071374903369531392), // BCFSari_t |
| 423 | UINT64_C(2057863554731606016), // BCFSazi |
| 424 | UINT64_C(2066870753986347008), // BCFSazi_nt |
| 425 | UINT64_C(2071374353613717504), // BCFSazi_t |
| 426 | UINT64_C(2053641979836760064), // BCFSiri |
| 427 | UINT64_C(2062649179091501056), // BCFSiri_nt |
| 428 | UINT64_C(2067152778718871552), // BCFSiri_t |
| 429 | UINT64_C(2053641430080946176), // BCFSizi |
| 430 | UINT64_C(2062648629335687168), // BCFSizi_nt |
| 431 | UINT64_C(2067152228963057664), // BCFSizi_t |
| 432 | UINT64_C(2053641979836760064), // BCFSnari |
| 433 | UINT64_C(2062649179091501056), // BCFSnari_nt |
| 434 | UINT64_C(2067152778718871552), // BCFSnari_t |
| 435 | UINT64_C(2053641430080946176), // BCFSnazi |
| 436 | UINT64_C(2062648629335687168), // BCFSnazi_nt |
| 437 | UINT64_C(2067152228963057664), // BCFSnazi_t |
| 438 | UINT64_C(2053782717325115392), // BCFSrri |
| 439 | UINT64_C(2062789916579856384), // BCFSrri_nt |
| 440 | UINT64_C(2067293516207226880), // BCFSrri_t |
| 441 | UINT64_C(2053782167569301504), // BCFSrzi |
| 442 | UINT64_C(2062789366824042496), // BCFSrzi_nt |
| 443 | UINT64_C(2067292966451412992), // BCFSrzi_t |
| 444 | UINT64_C(1949777713430528000), // BCFWari |
| 445 | UINT64_C(1958784912685268992), // BCFWari_nt |
| 446 | UINT64_C(1963288512312639488), // BCFWari_t |
| 447 | UINT64_C(1949777163674714112), // BCFWazi |
| 448 | UINT64_C(1958784362929455104), // BCFWazi_nt |
| 449 | UINT64_C(1963287962556825600), // BCFWazi_t |
| 450 | UINT64_C(1945555588779868160), // BCFWiri |
| 451 | UINT64_C(1954562788034609152), // BCFWiri_nt |
| 452 | UINT64_C(1959066387661979648), // BCFWiri_t |
| 453 | UINT64_C(1945555039024054272), // BCFWizi |
| 454 | UINT64_C(1954562238278795264), // BCFWizi_nt |
| 455 | UINT64_C(1959065837906165760), // BCFWizi_t |
| 456 | UINT64_C(1945555588779868160), // BCFWnari |
| 457 | UINT64_C(1954562788034609152), // BCFWnari_nt |
| 458 | UINT64_C(1959066387661979648), // BCFWnari_t |
| 459 | UINT64_C(1945555039024054272), // BCFWnazi |
| 460 | UINT64_C(1954562238278795264), // BCFWnazi_nt |
| 461 | UINT64_C(1959065837906165760), // BCFWnazi_t |
| 462 | UINT64_C(1945696326268223488), // BCFWrri |
| 463 | UINT64_C(1954703525522964480), // BCFWrri_nt |
| 464 | UINT64_C(1959207125150334976), // BCFWrri_t |
| 465 | UINT64_C(1945695776512409600), // BCFWrzi |
| 466 | UINT64_C(1954702975767150592), // BCFWrzi_nt |
| 467 | UINT64_C(1959206575394521088), // BCFWrzi_t |
| 468 | UINT64_C(1751618780070412288), // BRCFDa |
| 469 | UINT64_C(1760625979325153280), // BRCFDa_nt |
| 470 | UINT64_C(1765129578952523776), // BRCFDa_t |
| 471 | UINT64_C(1747397205175566336), // BRCFDir |
| 472 | UINT64_C(1756404404430307328), // BRCFDir_nt |
| 473 | UINT64_C(1760908004057677824), // BRCFDir_t |
| 474 | UINT64_C(1747396655419752448), // BRCFDiz |
| 475 | UINT64_C(1756403854674493440), // BRCFDiz_nt |
| 476 | UINT64_C(1760907454301863936), // BRCFDiz_t |
| 477 | UINT64_C(1747396655419752448), // BRCFDna |
| 478 | UINT64_C(1756403854674493440), // BRCFDna_nt |
| 479 | UINT64_C(1760907454301863936), // BRCFDna_t |
| 480 | UINT64_C(1747537942663921664), // BRCFDrr |
| 481 | UINT64_C(1756545141918662656), // BRCFDrr_nt |
| 482 | UINT64_C(1761048741546033152), // BRCFDrr_t |
| 483 | UINT64_C(1747537392908107776), // BRCFDrz |
| 484 | UINT64_C(1756544592162848768), // BRCFDrz_nt |
| 485 | UINT64_C(1761048191790219264), // BRCFDrz_t |
| 486 | UINT64_C(1733604381560930304), // BRCFLa |
| 487 | UINT64_C(1742611580815671296), // BRCFLa_nt |
| 488 | UINT64_C(1747115180443041792), // BRCFLa_t |
| 489 | UINT64_C(1729382806666084352), // BRCFLir |
| 490 | UINT64_C(1738390005920825344), // BRCFLir_nt |
| 491 | UINT64_C(1742893605548195840), // BRCFLir_t |
| 492 | UINT64_C(1729382256910270464), // BRCFLiz |
| 493 | UINT64_C(1738389456165011456), // BRCFLiz_nt |
| 494 | UINT64_C(1742893055792381952), // BRCFLiz_t |
| 495 | UINT64_C(1729382256910270464), // BRCFLna |
| 496 | UINT64_C(1738389456165011456), // BRCFLna_nt |
| 497 | UINT64_C(1742893055792381952), // BRCFLna_t |
| 498 | UINT64_C(1729523544154439680), // BRCFLrr |
| 499 | UINT64_C(1738530743409180672), // BRCFLrr_nt |
| 500 | UINT64_C(1743034343036551168), // BRCFLrr_t |
| 501 | UINT64_C(1729522994398625792), // BRCFLrz |
| 502 | UINT64_C(1738530193653366784), // BRCFLrz_nt |
| 503 | UINT64_C(1743033793280737280), // BRCFLrz_t |
| 504 | UINT64_C(1787647577089376256), // BRCFSa |
| 505 | UINT64_C(1796654776344117248), // BRCFSa_nt |
| 506 | UINT64_C(1801158375971487744), // BRCFSa_t |
| 507 | UINT64_C(1783426002194530304), // BRCFSir |
| 508 | UINT64_C(1792433201449271296), // BRCFSir_nt |
| 509 | UINT64_C(1796936801076641792), // BRCFSir_t |
| 510 | UINT64_C(1783425452438716416), // BRCFSiz |
| 511 | UINT64_C(1792432651693457408), // BRCFSiz_nt |
| 512 | UINT64_C(1796936251320827904), // BRCFSiz_t |
| 513 | UINT64_C(1783425452438716416), // BRCFSna |
| 514 | UINT64_C(1792432651693457408), // BRCFSna_nt |
| 515 | UINT64_C(1796936251320827904), // BRCFSna_t |
| 516 | UINT64_C(1783566739682885632), // BRCFSrr |
| 517 | UINT64_C(1792573938937626624), // BRCFSrr_nt |
| 518 | UINT64_C(1797077538564997120), // BRCFSrr_t |
| 519 | UINT64_C(1783566189927071744), // BRCFSrz |
| 520 | UINT64_C(1792573389181812736), // BRCFSrz_nt |
| 521 | UINT64_C(1797076988809183232), // BRCFSrz_t |
| 522 | UINT64_C(1769633178579894272), // BRCFWa |
| 523 | UINT64_C(1778640377834635264), // BRCFWa_nt |
| 524 | UINT64_C(1783143977462005760), // BRCFWa_t |
| 525 | UINT64_C(1765411603685048320), // BRCFWir |
| 526 | UINT64_C(1774418802939789312), // BRCFWir_nt |
| 527 | UINT64_C(1778922402567159808), // BRCFWir_t |
| 528 | UINT64_C(1765411053929234432), // BRCFWiz |
| 529 | UINT64_C(1774418253183975424), // BRCFWiz_nt |
| 530 | UINT64_C(1778921852811345920), // BRCFWiz_t |
| 531 | UINT64_C(1765411053929234432), // BRCFWna |
| 532 | UINT64_C(1774418253183975424), // BRCFWna_nt |
| 533 | UINT64_C(1778921852811345920), // BRCFWna_t |
| 534 | UINT64_C(1765552341173403648), // BRCFWrr |
| 535 | UINT64_C(1774559540428144640), // BRCFWrr_nt |
| 536 | UINT64_C(1779063140055515136), // BRCFWrr_t |
| 537 | UINT64_C(1765551791417589760), // BRCFWrz |
| 538 | UINT64_C(1774558990672330752), // BRCFWrz_nt |
| 539 | UINT64_C(1779062590299701248), // BRCFWrz_t |
| 540 | UINT64_C(4107282860161892352), // BRVm |
| 541 | UINT64_C(4107283409917706240), // BRVr |
| 542 | UINT64_C(576461302059237376), // BSICrii |
| 543 | UINT64_C(576602039547592704), // BSICrri |
| 544 | UINT64_C(576460752303423488), // BSICzii |
| 545 | UINT64_C(576601489791778816), // BSICzri |
| 546 | UINT64_C(3098476543630901248), // BSWPmi |
| 547 | UINT64_C(3098477093386715136), // BSWPri |
| 548 | UINT64_C(579276051826343936), // CALLr |
| 549 | UINT64_C(7061644765472751616), // CASLrii |
| 550 | UINT64_C(7061785502961106944), // CASLrir |
| 551 | UINT64_C(7061644215716937728), // CASLzii |
| 552 | UINT64_C(7061784953205293056), // CASLzir |
| 553 | UINT64_C(7097673562491715584), // CASWrii |
| 554 | UINT64_C(7097814299980070912), // CASWrir |
| 555 | UINT64_C(7097673012735901696), // CASWzii |
| 556 | UINT64_C(7097813750224257024), // CASWzir |
| 557 | UINT64_C(4251398048237748288), // CMOVDim |
| 558 | UINT64_C(4251398597993562176), // CMOVDir |
| 559 | UINT64_C(4251538785726103616), // CMOVDrm |
| 560 | UINT64_C(4251539335481917504), // CMOVDrr |
| 561 | UINT64_C(4251398048237748224), // CMOVLim |
| 562 | UINT64_C(4251398597993562112), // CMOVLir |
| 563 | UINT64_C(4251538785726103552), // CMOVLrm |
| 564 | UINT64_C(4251539335481917440), // CMOVLrr |
| 565 | UINT64_C(4251398048237748416), // CMOVSim |
| 566 | UINT64_C(4251398597993562304), // CMOVSir |
| 567 | UINT64_C(4251538785726103744), // CMOVSrm |
| 568 | UINT64_C(4251539335481917632), // CMOVSrr |
| 569 | UINT64_C(4251398048237748352), // CMOVWim |
| 570 | UINT64_C(4251398597993562240), // CMOVWir |
| 571 | UINT64_C(4251538785726103680), // CMOVWrm |
| 572 | UINT64_C(4251539335481917568), // CMOVWrr |
| 573 | UINT64_C(7638104968020361216), // CMPSLim |
| 574 | UINT64_C(7638105517776175104), // CMPSLir |
| 575 | UINT64_C(7638245705508716544), // CMPSLrm |
| 576 | UINT64_C(7638246255264530432), // CMPSLrr |
| 577 | UINT64_C(8791026472627208192), // CMPSWSXim |
| 578 | UINT64_C(8791027022383022080), // CMPSWSXir |
| 579 | UINT64_C(8791167210115563520), // CMPSWSXrm |
| 580 | UINT64_C(8791167759871377408), // CMPSWSXrr |
| 581 | UINT64_C(8827055269646172160), // CMPSWZXim |
| 582 | UINT64_C(8827055819401986048), // CMPSWZXir |
| 583 | UINT64_C(8827196007134527488), // CMPSWZXrm |
| 584 | UINT64_C(8827196556890341376), // CMPSWZXrr |
| 585 | UINT64_C(6124895493223874560), // CMPULim |
| 586 | UINT64_C(6124896042979688448), // CMPULir |
| 587 | UINT64_C(6125036230712229888), // CMPULrm |
| 588 | UINT64_C(6125036780468043776), // CMPULrr |
| 589 | UINT64_C(6160924290242838528), // CMPUWim |
| 590 | UINT64_C(6160924839998652416), // CMPUWir |
| 591 | UINT64_C(6161065027731193856), // CMPUWrm |
| 592 | UINT64_C(6161065577487007744), // CMPUWrr |
| 593 | UINT64_C(6845471433603153920), // CVTDLi |
| 594 | UINT64_C(6845612171091509248), // CVTDLr |
| 595 | UINT64_C(1116892707587883008), // CVTDQi |
| 596 | UINT64_C(1117033445076238336), // CVTDQr |
| 597 | UINT64_C(1080863910568919040), // CVTDSi |
| 598 | UINT64_C(1081004648057274368), // CVTDSr |
| 599 | UINT64_C(6773413839565225984), // CVTDWi |
| 600 | UINT64_C(6773554577053581312), // CVTDWr |
| 601 | UINT64_C(5692549928996306944), // CVTLDi |
| 602 | UINT64_C(5692690666484662272), // CVTLDr |
| 603 | UINT64_C(3242591731706757120), // CVTQDi |
| 604 | UINT64_C(3242732469195112448), // CVTQDr |
| 605 | UINT64_C(3278620528725721088), // CVTQSi |
| 606 | UINT64_C(3278761266214076416), // CVTQSr |
| 607 | UINT64_C(2233785415175766016), // CVTSDi |
| 608 | UINT64_C(2233926152664121344), // CVTSDr |
| 609 | UINT64_C(2269814212194729984), // CVTSQi |
| 610 | UINT64_C(2269954949683085312), // CVTSQr |
| 611 | UINT64_C(6809442636584189952), // CVTSWi |
| 612 | UINT64_C(6809583374072545280), // CVTSWr |
| 613 | UINT64_C(5620492334958379008), // CVTWDSXi |
| 614 | UINT64_C(5620633072446734336), // CVTWDSXr |
| 615 | UINT64_C(5620492334958379136), // CVTWDZXi |
| 616 | UINT64_C(5620633072446734464), // CVTWDZXr |
| 617 | UINT64_C(5656521131977342976), // CVTWSSXi |
| 618 | UINT64_C(5656661869465698304), // CVTWSSXr |
| 619 | UINT64_C(5656521131977343104), // CVTWSZXi |
| 620 | UINT64_C(5656661869465698432), // CVTWSZXr |
| 621 | UINT64_C(9151314442816847872), // DIVSLim |
| 622 | UINT64_C(9151314992572661760), // DIVSLir |
| 623 | UINT64_C(9151455180305203200), // DIVSLrm |
| 624 | UINT64_C(9151455730061017088), // DIVSLrr |
| 625 | UINT64_C(8863084066665136128), // DIVSWSXim |
| 626 | UINT64_C(8863084616420950016), // DIVSWSXir |
| 627 | UINT64_C(8863224804153491456), // DIVSWSXrm |
| 628 | UINT64_C(8863225353909305344), // DIVSWSXrr |
| 629 | UINT64_C(8899112863684100096), // DIVSWZXim |
| 630 | UINT64_C(8899113413439913984), // DIVSWZXir |
| 631 | UINT64_C(8899253601172455424), // DIVSWZXrm |
| 632 | UINT64_C(8899254150928269312), // DIVSWZXrr |
| 633 | UINT64_C(7998392938210000896), // DIVULim |
| 634 | UINT64_C(7998393487965814784), // DIVULir |
| 635 | UINT64_C(7998533675698356224), // DIVULrm |
| 636 | UINT64_C(7998534225454170112), // DIVULrr |
| 637 | UINT64_C(8034421735228964864), // DIVUWim |
| 638 | UINT64_C(8034422284984778752), // DIVUWir |
| 639 | UINT64_C(8034562472717320192), // DIVUWrm |
| 640 | UINT64_C(8034563022473134080), // DIVUWrr |
| 641 | UINT64_C(792634084173021184), // DLDLSXrii |
| 642 | UINT64_C(792774821661376512), // DLDLSXrri |
| 643 | UINT64_C(792633534417207296), // DLDLSXzii |
| 644 | UINT64_C(792774271905562624), // DLDLSXzri |
| 645 | UINT64_C(828662881191985152), // DLDLZXrii |
| 646 | UINT64_C(828803618680340480), // DLDLZXrri |
| 647 | UINT64_C(828662331436171264), // DLDLZXzii |
| 648 | UINT64_C(828803068924526592), // DLDLZXzri |
| 649 | UINT64_C(720576490135093248), // DLDUrii |
| 650 | UINT64_C(720717227623448576), // DLDUrri |
| 651 | UINT64_C(720575940379279360), // DLDUzii |
| 652 | UINT64_C(720716677867634688), // DLDUzri |
| 653 | UINT64_C(648518896097165312), // DLDrii |
| 654 | UINT64_C(648659633585520640), // DLDrri |
| 655 | UINT64_C(648518346341351424), // DLDzii |
| 656 | UINT64_C(648659083829706752), // DLDzri |
| 657 | UINT64_C(9727775195120271360), // EQVMmm |
| 658 | UINT64_C(5116089176692883456), // EQVim |
| 659 | UINT64_C(5116089726448697344), // EQVri |
| 660 | UINT64_C(5116229914181238784), // EQVrm |
| 661 | UINT64_C(5116230463937052672), // EQVrr |
| 662 | UINT64_C(5476377146882523136), // FADDDim |
| 663 | UINT64_C(5476377696638337024), // FADDDir |
| 664 | UINT64_C(5476517884370878464), // FADDDrm |
| 665 | UINT64_C(5476518434126692352), // FADDDrr |
| 666 | UINT64_C(7782220156096217088), // FADDQim |
| 667 | UINT64_C(7782220705852030976), // FADDQir |
| 668 | UINT64_C(7782360893584572416), // FADDQrm |
| 669 | UINT64_C(7782361443340386304), // FADDQrr |
| 670 | UINT64_C(5512405943901487104), // FADDSim |
| 671 | UINT64_C(5512406493657300992), // FADDSir |
| 672 | UINT64_C(5512546681389842432), // FADDSrm |
| 673 | UINT64_C(5512547231145656320), // FADDSrr |
| 674 | UINT64_C(9079256848778919936), // FCMPDim |
| 675 | UINT64_C(9079257398534733824), // FCMPDir |
| 676 | UINT64_C(9079397586267275264), // FCMPDrm |
| 677 | UINT64_C(9079398136023089152), // FCMPDrr |
| 678 | UINT64_C(9007199254740992000), // FCMPQim |
| 679 | UINT64_C(9007199804496805888), // FCMPQir |
| 680 | UINT64_C(9007339992229347328), // FCMPQrm |
| 681 | UINT64_C(9007340541985161216), // FCMPQrr |
| 682 | UINT64_C(9115285645797883904), // FCMPSim |
| 683 | UINT64_C(9115286195553697792), // FCMPSir |
| 684 | UINT64_C(9115426383286239232), // FCMPSrm |
| 685 | UINT64_C(9115426933042053120), // FCMPSrr |
| 686 | UINT64_C(6701356245527298048), // FDIVDim |
| 687 | UINT64_C(6701356795283111936), // FDIVDir |
| 688 | UINT64_C(6701496983015653376), // FDIVDrm |
| 689 | UINT64_C(6701497532771467264), // FDIVDrr |
| 690 | UINT64_C(6737385042546262016), // FDIVSim |
| 691 | UINT64_C(6737385592302075904), // FDIVSir |
| 692 | UINT64_C(6737525780034617344), // FDIVSrm |
| 693 | UINT64_C(6737526329790431232), // FDIVSrr |
| 694 | UINT64_C(2305843009213693952), // FENCEC |
| 695 | UINT64_C(2341871806232657920), // FENCEI |
| 696 | UINT64_C(2305843009213693952), // FENCEM |
| 697 | UINT64_C(5836665117072162816), // FIDCRii |
| 698 | UINT64_C(5836805854560518144), // FIDCRri |
| 699 | UINT64_C(4467570830351532032), // FMAXDim |
| 700 | UINT64_C(4467571380107345920), // FMAXDir |
| 701 | UINT64_C(4467711567839887360), // FMAXDrm |
| 702 | UINT64_C(4467712117595701248), // FMAXDrr |
| 703 | UINT64_C(4503599627370496000), // FMAXSim |
| 704 | UINT64_C(4503600177126309888), // FMAXSir |
| 705 | UINT64_C(4503740364858851328), // FMAXSrm |
| 706 | UINT64_C(4503740914614665216), // FMAXSrr |
| 707 | UINT64_C(4467570830351532160), // FMINDim |
| 708 | UINT64_C(4467571380107346048), // FMINDir |
| 709 | UINT64_C(4467711567839887488), // FMINDrm |
| 710 | UINT64_C(4467712117595701376), // FMINDrr |
| 711 | UINT64_C(4503599627370496128), // FMINSim |
| 712 | UINT64_C(4503600177126310016), // FMINSir |
| 713 | UINT64_C(4503740364858851456), // FMINSrm |
| 714 | UINT64_C(4503740914614665344), // FMINSrr |
| 715 | UINT64_C(5548434740920451072), // FMULDim |
| 716 | UINT64_C(5548435290676264960), // FMULDir |
| 717 | UINT64_C(5548575478408806400), // FMULDrm |
| 718 | UINT64_C(5548576028164620288), // FMULDrr |
| 719 | UINT64_C(7854277750134145024), // FMULQim |
| 720 | UINT64_C(7854278299889958912), // FMULQir |
| 721 | UINT64_C(7854418487622500352), // FMULQrm |
| 722 | UINT64_C(7854419037378314240), // FMULQrr |
| 723 | UINT64_C(5584463537939415040), // FMULSim |
| 724 | UINT64_C(5584464087695228928), // FMULSir |
| 725 | UINT64_C(5584604275427770368), // FMULSrm |
| 726 | UINT64_C(5584604825183584256), // FMULSrr |
| 727 | UINT64_C(6629298651489370112), // FSUBDim |
| 728 | UINT64_C(6629299201245184000), // FSUBDir |
| 729 | UINT64_C(6629439388977725440), // FSUBDrm |
| 730 | UINT64_C(6629439938733539328), // FSUBDrr |
| 731 | UINT64_C(8935141660703064064), // FSUBQim |
| 732 | UINT64_C(8935142210458877952), // FSUBQir |
| 733 | UINT64_C(8935282398191419392), // FSUBQrm |
| 734 | UINT64_C(8935282947947233280), // FSUBQrr |
| 735 | UINT64_C(6665327448508334080), // FSUBSim |
| 736 | UINT64_C(6665327998264147968), // FSUBSir |
| 737 | UINT64_C(6665468185996689408), // FSUBSrm |
| 738 | UINT64_C(6665468735752503296), // FSUBSrr |
| 739 | UINT64_C(4611686568183201792), // LCRir |
| 740 | UINT64_C(4611686018427387904), // LCRiz |
| 741 | UINT64_C(4611827305671557120), // LCRrr |
| 742 | UINT64_C(4611826755915743232), // LCRrz |
| 743 | UINT64_C(360288519945453568), // LD1BSXrii |
| 744 | UINT64_C(360429257433808896), // LD1BSXrri |
| 745 | UINT64_C(360287970189639680), // LD1BSXzii |
| 746 | UINT64_C(360428707677995008), // LD1BSXzri |
| 747 | UINT64_C(396317316964417536), // LD1BZXrii |
| 748 | UINT64_C(396458054452772864), // LD1BZXrri |
| 749 | UINT64_C(396316767208603648), // LD1BZXzii |
| 750 | UINT64_C(396457504696958976), // LD1BZXzri |
| 751 | UINT64_C(288230925907525632), // LD2BSXrii |
| 752 | UINT64_C(288371663395880960), // LD2BSXrri |
| 753 | UINT64_C(288230376151711744), // LD2BSXzii |
| 754 | UINT64_C(288371113640067072), // LD2BSXzri |
| 755 | UINT64_C(324259722926489600), // LD2BZXrii |
| 756 | UINT64_C(324400460414844928), // LD2BZXrri |
| 757 | UINT64_C(324259173170675712), // LD2BZXzii |
| 758 | UINT64_C(324399910659031040), // LD2BZXzri |
| 759 | UINT64_C(216173331869597696), // LDLSXrii |
| 760 | UINT64_C(216314069357953024), // LDLSXrri |
| 761 | UINT64_C(216172782113783808), // LDLSXzii |
| 762 | UINT64_C(216313519602139136), // LDLSXzri |
| 763 | UINT64_C(252202128888561664), // LDLZXrii |
| 764 | UINT64_C(252342866376916992), // LDLZXrri |
| 765 | UINT64_C(252201579132747776), // LDLZXzii |
| 766 | UINT64_C(252342316621103104), // LDLZXzri |
| 767 | UINT64_C(144115737831669760), // LDUrii |
| 768 | UINT64_C(144256475320025088), // LDUrri |
| 769 | UINT64_C(144115188075855872), // LDUzii |
| 770 | UINT64_C(144255925564211200), // LDUzri |
| 771 | UINT64_C(7421932185906577408), // LDZm |
| 772 | UINT64_C(7421932735662391296), // LDZr |
| 773 | UINT64_C(72058143793741824), // LDrii |
| 774 | UINT64_C(72198881282097152), // LDrri |
| 775 | UINT64_C(72057594037927936), // LDzii |
| 776 | UINT64_C(72198331526283264), // LDzri |
| 777 | UINT64_C(468374911002345472), // LEASLrii |
| 778 | UINT64_C(468515648490700800), // LEASLrri |
| 779 | UINT64_C(468374361246531584), // LEASLzii |
| 780 | UINT64_C(468515098734886912), // LEASLzri |
| 781 | UINT64_C(432346113983381504), // LEArii |
| 782 | UINT64_C(432486851471736832), // LEArri |
| 783 | UINT64_C(432345564227567616), // LEAzii |
| 784 | UINT64_C(432486301715922944), // LEAzri |
| 785 | UINT64_C(7566047373982433280), // LFRi |
| 786 | UINT64_C(7566188111470788608), // LFRr |
| 787 | UINT64_C(2377901153007435776), // LHMBri |
| 788 | UINT64_C(2377900603251621888), // LHMBzi |
| 789 | UINT64_C(2377902252519063552), // LHMHri |
| 790 | UINT64_C(2377901702763249664), // LHMHzi |
| 791 | UINT64_C(2377904451542319104), // LHMLri |
| 792 | UINT64_C(2377903901786505216), // LHMLzi |
| 793 | UINT64_C(2377903352030691328), // LHMWri |
| 794 | UINT64_C(2377902802274877440), // LHMWzi |
| 795 | UINT64_C(4179481191688175616), // LPM |
| 796 | UINT64_C(10232178353385766912), // LSVim |
| 797 | UINT64_C(10232178353385766912), // LSVim_v |
| 798 | UINT64_C(10232178903141580800), // LSVir |
| 799 | UINT64_C(10232178903141580800), // LSVir_v |
| 800 | UINT64_C(10232319090874122240), // LSVrm |
| 801 | UINT64_C(10232319090874122240), // LSVrm_v |
| 802 | UINT64_C(10232319640629936128), // LSVrr |
| 803 | UINT64_C(10232319640629936128), // LSVrr_v |
| 804 | UINT64_C(12610078956637388800), // LVIXi |
| 805 | UINT64_C(12610219694125744128), // LVIXr |
| 806 | UINT64_C(13763000461244235776), // LVLi |
| 807 | UINT64_C(13763141198732591104), // LVLr |
| 808 | UINT64_C(13186539708940812288), // LVMim |
| 809 | UINT64_C(13186539708940812288), // LVMim_m |
| 810 | UINT64_C(13186540258696626176), // LVMir |
| 811 | UINT64_C(13186540258696626176), // LVMir_m |
| 812 | UINT64_C(13186680446429167616), // LVMrm |
| 813 | UINT64_C(13186680446429167616), // LVMrm_m |
| 814 | UINT64_C(13186680996184981504), // LVMrr |
| 815 | UINT64_C(13186680996184981504), // LVMrr_m |
| 816 | UINT64_C(11385099857992613888), // LVSvi |
| 817 | UINT64_C(11385240595480969216), // LVSvr |
| 818 | UINT64_C(11889503016258109440), // LZVMm |
| 819 | UINT64_C(11889503016258109440), // LZVMmL |
| 820 | UINT64_C(11889503016258109440), // LZVMml |
| 821 | UINT64_C(7493989779944505344), // MAXSLim |
| 822 | UINT64_C(7493990329700319232), // MAXSLri |
| 823 | UINT64_C(7494130517432860672), // MAXSLrm |
| 824 | UINT64_C(7494131067188674560), // MAXSLrr |
| 825 | UINT64_C(8646911284551352320), // MAXSWSXim |
| 826 | UINT64_C(8646911834307166208), // MAXSWSXri |
| 827 | UINT64_C(8647052022039707648), // MAXSWSXrm |
| 828 | UINT64_C(8647052571795521536), // MAXSWSXrr |
| 829 | UINT64_C(8682940081570316288), // MAXSWZXim |
| 830 | UINT64_C(8682940631326130176), // MAXSWZXri |
| 831 | UINT64_C(8683080819058671616), // MAXSWZXrm |
| 832 | UINT64_C(8683081368814485504), // MAXSWZXrr |
| 833 | UINT64_C(7493989779944505472), // MINSLim |
| 834 | UINT64_C(7493990329700319360), // MINSLri |
| 835 | UINT64_C(7494130517432860800), // MINSLrm |
| 836 | UINT64_C(7494131067188674688), // MINSLrr |
| 837 | UINT64_C(8646911284551352448), // MINSWSXim |
| 838 | UINT64_C(8646911834307166336), // MINSWSXri |
| 839 | UINT64_C(8647052022039707776), // MINSWSXrm |
| 840 | UINT64_C(8647052571795521664), // MINSWSXrr |
| 841 | UINT64_C(8682940081570316416), // MINSWZXim |
| 842 | UINT64_C(8682940631326130304), // MINSWZXri |
| 843 | UINT64_C(8683080819058671744), // MINSWZXrm |
| 844 | UINT64_C(8683081368814485632), // MINSWZXrr |
| 845 | UINT64_C(4539628424389459968), // MONC |
| 846 | UINT64_C(4575657221408423936), // MONCHDB |
| 847 | UINT64_C(6196953087261802496), // MRGim |
| 848 | UINT64_C(6196953637017616384), // MRGir |
| 849 | UINT64_C(6197093824750157824), // MRGrm |
| 850 | UINT64_C(6197094374505971712), // MRGrr |
| 851 | UINT64_C(7710162562058289152), // MULSLWim |
| 852 | UINT64_C(7710163111814103040), // MULSLWri |
| 853 | UINT64_C(7710303299546644480), // MULSLWrm |
| 854 | UINT64_C(7710303849302458368), // MULSLWrr |
| 855 | UINT64_C(7926335344172072960), // MULSLim |
| 856 | UINT64_C(7926335893927886848), // MULSLri |
| 857 | UINT64_C(7926476081660428288), // MULSLrm |
| 858 | UINT64_C(7926476631416242176), // MULSLrr |
| 859 | UINT64_C(5404319552844595200), // MULSWSXim |
| 860 | UINT64_C(5404320102600409088), // MULSWSXri |
| 861 | UINT64_C(5404460290332950528), // MULSWSXrm |
| 862 | UINT64_C(5404460840088764416), // MULSWSXrr |
| 863 | UINT64_C(5440348349863559168), // MULSWZXim |
| 864 | UINT64_C(5440348899619373056), // MULSWZXri |
| 865 | UINT64_C(5440489087351914496), // MULSWZXrm |
| 866 | UINT64_C(5440489637107728384), // MULSWZXrr |
| 867 | UINT64_C(5260204364768739328), // MULULim |
| 868 | UINT64_C(5260204914524553216), // MULULri |
| 869 | UINT64_C(5260345102257094656), // MULULrm |
| 870 | UINT64_C(5260345652012908544), // MULULrr |
| 871 | UINT64_C(5296233161787703296), // MULUWim |
| 872 | UINT64_C(5296233711543517184), // MULUWri |
| 873 | UINT64_C(5296373899276058624), // MULUWrm |
| 874 | UINT64_C(5296374449031872512), // MULUWrr |
| 875 | UINT64_C(10736581511651262464), // NEGMm |
| 876 | UINT64_C(10664523917613334528), // NNDMmm |
| 877 | UINT64_C(6052837899185946624), // NNDim |
| 878 | UINT64_C(6052838448941760512), // NNDir |
| 879 | UINT64_C(6052978636674301952), // NNDrm |
| 880 | UINT64_C(6052979186430115840), // NNDrr |
| 881 | UINT64_C(8718968878589280256), // NOP |
| 882 | UINT64_C(9583660007044415488), // ORMmm |
| 883 | UINT64_C(4971973988617027584), // ORim |
| 884 | UINT64_C(4971974538372841472), // ORri |
| 885 | UINT64_C(4972114726105382912), // ORrm |
| 886 | UINT64_C(4972115275861196800), // ORrr |
| 887 | UINT64_C(4035225266123964416), // PCNTm |
| 888 | UINT64_C(4035225815879778304), // PCNTr |
| 889 | UINT64_C(11817445422220181504), // PCVMm |
| 890 | UINT64_C(11817445422220181504), // PCVMmL |
| 891 | UINT64_C(11817445422220181504), // PCVMml |
| 892 | UINT64_C(9223372586610589696), // PFCHVNCir |
| 893 | UINT64_C(9223372586610589696), // PFCHVNCirL |
| 894 | UINT64_C(9223372586610589696), // PFCHVNCirl |
| 895 | UINT64_C(9223372036854775808), // PFCHVNCiz |
| 896 | UINT64_C(9223372036854775808), // PFCHVNCizL |
| 897 | UINT64_C(9223372036854775808), // PFCHVNCizl |
| 898 | UINT64_C(9223513324098945024), // PFCHVNCrr |
| 899 | UINT64_C(9223513324098945024), // PFCHVNCrrL |
| 900 | UINT64_C(9223513324098945024), // PFCHVNCrrl |
| 901 | UINT64_C(9223512774343131136), // PFCHVNCrz |
| 902 | UINT64_C(9223512774343131136), // PFCHVNCrzL |
| 903 | UINT64_C(9223512774343131136), // PFCHVNCrzl |
| 904 | UINT64_C(9241386985120071680), // PFCHVir |
| 905 | UINT64_C(9241386985120071680), // PFCHVirL |
| 906 | UINT64_C(9241386985120071680), // PFCHVirl |
| 907 | UINT64_C(9241386435364257792), // PFCHViz |
| 908 | UINT64_C(9241386435364257792), // PFCHVizL |
| 909 | UINT64_C(9241386435364257792), // PFCHVizl |
| 910 | UINT64_C(9241527722608427008), // PFCHVrr |
| 911 | UINT64_C(9241527722608427008), // PFCHVrrL |
| 912 | UINT64_C(9241527722608427008), // PFCHVrrl |
| 913 | UINT64_C(9241527172852613120), // PFCHVrz |
| 914 | UINT64_C(9241527172852613120), // PFCHVrzL |
| 915 | UINT64_C(9241527172852613120), // PFCHVrzl |
| 916 | UINT64_C(864691678210949120), // PFCHrii |
| 917 | UINT64_C(864832415699304448), // PFCHrri |
| 918 | UINT64_C(864691128455135232), // PFCHzii |
| 919 | UINT64_C(864831865943490560), // PFCHzri |
| 920 | UINT64_C(14582655593425666048), // PVADDSLOiv |
| 921 | UINT64_C(14582655593425666048), // PVADDSLOivL |
| 922 | UINT64_C(14582655593425666048), // PVADDSLOivL_v |
| 923 | UINT64_C(14582655593425666048), // PVADDSLOiv_v |
| 924 | UINT64_C(14582655593425666048), // PVADDSLOivl |
| 925 | UINT64_C(14582655593425666048), // PVADDSLOivl_v |
| 926 | UINT64_C(14582655593425666048), // PVADDSLOivm |
| 927 | UINT64_C(14582655593425666048), // PVADDSLOivmL |
| 928 | UINT64_C(14582655593425666048), // PVADDSLOivmL_v |
| 929 | UINT64_C(14582655593425666048), // PVADDSLOivm_v |
| 930 | UINT64_C(14582655593425666048), // PVADDSLOivml |
| 931 | UINT64_C(14582655593425666048), // PVADDSLOivml_v |
| 932 | UINT64_C(14582796330914021376), // PVADDSLOrv |
| 933 | UINT64_C(14582796330914021376), // PVADDSLOrvL |
| 934 | UINT64_C(14582796330914021376), // PVADDSLOrvL_v |
| 935 | UINT64_C(14582796330914021376), // PVADDSLOrv_v |
| 936 | UINT64_C(14582796330914021376), // PVADDSLOrvl |
| 937 | UINT64_C(14582796330914021376), // PVADDSLOrvl_v |
| 938 | UINT64_C(14582796330914021376), // PVADDSLOrvm |
| 939 | UINT64_C(14582796330914021376), // PVADDSLOrvmL |
| 940 | UINT64_C(14582796330914021376), // PVADDSLOrvmL_v |
| 941 | UINT64_C(14582796330914021376), // PVADDSLOrvm_v |
| 942 | UINT64_C(14582796330914021376), // PVADDSLOrvml |
| 943 | UINT64_C(14582796330914021376), // PVADDSLOrvml_v |
| 944 | UINT64_C(14573648394170925056), // PVADDSLOvv |
| 945 | UINT64_C(14573648394170925056), // PVADDSLOvvL |
| 946 | UINT64_C(14573648394170925056), // PVADDSLOvvL_v |
| 947 | UINT64_C(14573648394170925056), // PVADDSLOvv_v |
| 948 | UINT64_C(14573648394170925056), // PVADDSLOvvl |
| 949 | UINT64_C(14573648394170925056), // PVADDSLOvvl_v |
| 950 | UINT64_C(14573648394170925056), // PVADDSLOvvm |
| 951 | UINT64_C(14573648394170925056), // PVADDSLOvvmL |
| 952 | UINT64_C(14573648394170925056), // PVADDSLOvvmL_v |
| 953 | UINT64_C(14573648394170925056), // PVADDSLOvvm_v |
| 954 | UINT64_C(14573648394170925056), // PVADDSLOvvml |
| 955 | UINT64_C(14573648394170925056), // PVADDSLOvvml_v |
| 956 | UINT64_C(14600669991935148032), // PVADDSUPiv |
| 957 | UINT64_C(14600669991935148032), // PVADDSUPivL |
| 958 | UINT64_C(14600669991935148032), // PVADDSUPivL_v |
| 959 | UINT64_C(14600669991935148032), // PVADDSUPiv_v |
| 960 | UINT64_C(14600669991935148032), // PVADDSUPivl |
| 961 | UINT64_C(14600669991935148032), // PVADDSUPivl_v |
| 962 | UINT64_C(14600669991935148032), // PVADDSUPivm |
| 963 | UINT64_C(14600669991935148032), // PVADDSUPivmL |
| 964 | UINT64_C(14600669991935148032), // PVADDSUPivmL_v |
| 965 | UINT64_C(14600669991935148032), // PVADDSUPivm_v |
| 966 | UINT64_C(14600669991935148032), // PVADDSUPivml |
| 967 | UINT64_C(14600669991935148032), // PVADDSUPivml_v |
| 968 | UINT64_C(14600810729423503360), // PVADDSUPrv |
| 969 | UINT64_C(14600810729423503360), // PVADDSUPrvL |
| 970 | UINT64_C(14600810729423503360), // PVADDSUPrvL_v |
| 971 | UINT64_C(14600810729423503360), // PVADDSUPrv_v |
| 972 | UINT64_C(14600810729423503360), // PVADDSUPrvl |
| 973 | UINT64_C(14600810729423503360), // PVADDSUPrvl_v |
| 974 | UINT64_C(14600810729423503360), // PVADDSUPrvm |
| 975 | UINT64_C(14600810729423503360), // PVADDSUPrvmL |
| 976 | UINT64_C(14600810729423503360), // PVADDSUPrvmL_v |
| 977 | UINT64_C(14600810729423503360), // PVADDSUPrvm_v |
| 978 | UINT64_C(14600810729423503360), // PVADDSUPrvml |
| 979 | UINT64_C(14600810729423503360), // PVADDSUPrvml_v |
| 980 | UINT64_C(14591662792680407040), // PVADDSUPvv |
| 981 | UINT64_C(14591662792680407040), // PVADDSUPvvL |
| 982 | UINT64_C(14591662792680407040), // PVADDSUPvvL_v |
| 983 | UINT64_C(14591662792680407040), // PVADDSUPvv_v |
| 984 | UINT64_C(14591662792680407040), // PVADDSUPvvl |
| 985 | UINT64_C(14591662792680407040), // PVADDSUPvvl_v |
| 986 | UINT64_C(14591662792680407040), // PVADDSUPvvm |
| 987 | UINT64_C(14591662792680407040), // PVADDSUPvvmL |
| 988 | UINT64_C(14591662792680407040), // PVADDSUPvvmL_v |
| 989 | UINT64_C(14591662792680407040), // PVADDSUPvvm_v |
| 990 | UINT64_C(14591662792680407040), // PVADDSUPvvml |
| 991 | UINT64_C(14591662792680407040), // PVADDSUPvvml_v |
| 992 | UINT64_C(14618684390444630016), // PVADDSiv |
| 993 | UINT64_C(14618684390444630016), // PVADDSivL |
| 994 | UINT64_C(14618684390444630016), // PVADDSivL_v |
| 995 | UINT64_C(14618684390444630016), // PVADDSiv_v |
| 996 | UINT64_C(14618684390444630016), // PVADDSivl |
| 997 | UINT64_C(14618684390444630016), // PVADDSivl_v |
| 998 | UINT64_C(14618684390444630016), // PVADDSivm |
| 999 | UINT64_C(14618684390444630016), // PVADDSivmL |
| 1000 | UINT64_C(14618684390444630016), // PVADDSivmL_v |
| 1001 | UINT64_C(14618684390444630016), // PVADDSivm_v |
| 1002 | UINT64_C(14618684390444630016), // PVADDSivml |
| 1003 | UINT64_C(14618684390444630016), // PVADDSivml_v |
| 1004 | UINT64_C(14618825127932985344), // PVADDSrv |
| 1005 | UINT64_C(14618825127932985344), // PVADDSrvL |
| 1006 | UINT64_C(14618825127932985344), // PVADDSrvL_v |
| 1007 | UINT64_C(14618825127932985344), // PVADDSrv_v |
| 1008 | UINT64_C(14618825127932985344), // PVADDSrvl |
| 1009 | UINT64_C(14618825127932985344), // PVADDSrvl_v |
| 1010 | UINT64_C(14618825127932985344), // PVADDSrvm |
| 1011 | UINT64_C(14618825127932985344), // PVADDSrvmL |
| 1012 | UINT64_C(14618825127932985344), // PVADDSrvmL_v |
| 1013 | UINT64_C(14618825127932985344), // PVADDSrvm_v |
| 1014 | UINT64_C(14618825127932985344), // PVADDSrvml |
| 1015 | UINT64_C(14618825127932985344), // PVADDSrvml_v |
| 1016 | UINT64_C(14609677191189889024), // PVADDSvv |
| 1017 | UINT64_C(14609677191189889024), // PVADDSvvL |
| 1018 | UINT64_C(14609677191189889024), // PVADDSvvL_v |
| 1019 | UINT64_C(14609677191189889024), // PVADDSvv_v |
| 1020 | UINT64_C(14609677191189889024), // PVADDSvvl |
| 1021 | UINT64_C(14609677191189889024), // PVADDSvvl_v |
| 1022 | UINT64_C(14609677191189889024), // PVADDSvvm |
| 1023 | UINT64_C(14609677191189889024), // PVADDSvvmL |
| 1024 | UINT64_C(14609677191189889024), // PVADDSvvmL_v |
| 1025 | UINT64_C(14609677191189889024), // PVADDSvvm_v |
| 1026 | UINT64_C(14609677191189889024), // PVADDSvvml |
| 1027 | UINT64_C(14609677191189889024), // PVADDSvvml_v |
| 1028 | UINT64_C(14438540405349810176), // PVADDULOiv |
| 1029 | UINT64_C(14438540405349810176), // PVADDULOivL |
| 1030 | UINT64_C(14438540405349810176), // PVADDULOivL_v |
| 1031 | UINT64_C(14438540405349810176), // PVADDULOiv_v |
| 1032 | UINT64_C(14438540405349810176), // PVADDULOivl |
| 1033 | UINT64_C(14438540405349810176), // PVADDULOivl_v |
| 1034 | UINT64_C(14438540405349810176), // PVADDULOivm |
| 1035 | UINT64_C(14438540405349810176), // PVADDULOivmL |
| 1036 | UINT64_C(14438540405349810176), // PVADDULOivmL_v |
| 1037 | UINT64_C(14438540405349810176), // PVADDULOivm_v |
| 1038 | UINT64_C(14438540405349810176), // PVADDULOivml |
| 1039 | UINT64_C(14438540405349810176), // PVADDULOivml_v |
| 1040 | UINT64_C(14438681142838165504), // PVADDULOrv |
| 1041 | UINT64_C(14438681142838165504), // PVADDULOrvL |
| 1042 | UINT64_C(14438681142838165504), // PVADDULOrvL_v |
| 1043 | UINT64_C(14438681142838165504), // PVADDULOrv_v |
| 1044 | UINT64_C(14438681142838165504), // PVADDULOrvl |
| 1045 | UINT64_C(14438681142838165504), // PVADDULOrvl_v |
| 1046 | UINT64_C(14438681142838165504), // PVADDULOrvm |
| 1047 | UINT64_C(14438681142838165504), // PVADDULOrvmL |
| 1048 | UINT64_C(14438681142838165504), // PVADDULOrvmL_v |
| 1049 | UINT64_C(14438681142838165504), // PVADDULOrvm_v |
| 1050 | UINT64_C(14438681142838165504), // PVADDULOrvml |
| 1051 | UINT64_C(14438681142838165504), // PVADDULOrvml_v |
| 1052 | UINT64_C(14429533206095069184), // PVADDULOvv |
| 1053 | UINT64_C(14429533206095069184), // PVADDULOvvL |
| 1054 | UINT64_C(14429533206095069184), // PVADDULOvvL_v |
| 1055 | UINT64_C(14429533206095069184), // PVADDULOvv_v |
| 1056 | UINT64_C(14429533206095069184), // PVADDULOvvl |
| 1057 | UINT64_C(14429533206095069184), // PVADDULOvvl_v |
| 1058 | UINT64_C(14429533206095069184), // PVADDULOvvm |
| 1059 | UINT64_C(14429533206095069184), // PVADDULOvvmL |
| 1060 | UINT64_C(14429533206095069184), // PVADDULOvvmL_v |
| 1061 | UINT64_C(14429533206095069184), // PVADDULOvvm_v |
| 1062 | UINT64_C(14429533206095069184), // PVADDULOvvml |
| 1063 | UINT64_C(14429533206095069184), // PVADDULOvvml_v |
| 1064 | UINT64_C(14456554803859292160), // PVADDUUPiv |
| 1065 | UINT64_C(14456554803859292160), // PVADDUUPivL |
| 1066 | UINT64_C(14456554803859292160), // PVADDUUPivL_v |
| 1067 | UINT64_C(14456554803859292160), // PVADDUUPiv_v |
| 1068 | UINT64_C(14456554803859292160), // PVADDUUPivl |
| 1069 | UINT64_C(14456554803859292160), // PVADDUUPivl_v |
| 1070 | UINT64_C(14456554803859292160), // PVADDUUPivm |
| 1071 | UINT64_C(14456554803859292160), // PVADDUUPivmL |
| 1072 | UINT64_C(14456554803859292160), // PVADDUUPivmL_v |
| 1073 | UINT64_C(14456554803859292160), // PVADDUUPivm_v |
| 1074 | UINT64_C(14456554803859292160), // PVADDUUPivml |
| 1075 | UINT64_C(14456554803859292160), // PVADDUUPivml_v |
| 1076 | UINT64_C(14456695541347647488), // PVADDUUPrv |
| 1077 | UINT64_C(14456695541347647488), // PVADDUUPrvL |
| 1078 | UINT64_C(14456695541347647488), // PVADDUUPrvL_v |
| 1079 | UINT64_C(14456695541347647488), // PVADDUUPrv_v |
| 1080 | UINT64_C(14456695541347647488), // PVADDUUPrvl |
| 1081 | UINT64_C(14456695541347647488), // PVADDUUPrvl_v |
| 1082 | UINT64_C(14456695541347647488), // PVADDUUPrvm |
| 1083 | UINT64_C(14456695541347647488), // PVADDUUPrvmL |
| 1084 | UINT64_C(14456695541347647488), // PVADDUUPrvmL_v |
| 1085 | UINT64_C(14456695541347647488), // PVADDUUPrvm_v |
| 1086 | UINT64_C(14456695541347647488), // PVADDUUPrvml |
| 1087 | UINT64_C(14456695541347647488), // PVADDUUPrvml_v |
| 1088 | UINT64_C(14447547604604551168), // PVADDUUPvv |
| 1089 | UINT64_C(14447547604604551168), // PVADDUUPvvL |
| 1090 | UINT64_C(14447547604604551168), // PVADDUUPvvL_v |
| 1091 | UINT64_C(14447547604604551168), // PVADDUUPvv_v |
| 1092 | UINT64_C(14447547604604551168), // PVADDUUPvvl |
| 1093 | UINT64_C(14447547604604551168), // PVADDUUPvvl_v |
| 1094 | UINT64_C(14447547604604551168), // PVADDUUPvvm |
| 1095 | UINT64_C(14447547604604551168), // PVADDUUPvvmL |
| 1096 | UINT64_C(14447547604604551168), // PVADDUUPvvmL_v |
| 1097 | UINT64_C(14447547604604551168), // PVADDUUPvvm_v |
| 1098 | UINT64_C(14447547604604551168), // PVADDUUPvvml |
| 1099 | UINT64_C(14447547604604551168), // PVADDUUPvvml_v |
| 1100 | UINT64_C(14474569202368774144), // PVADDUiv |
| 1101 | UINT64_C(14474569202368774144), // PVADDUivL |
| 1102 | UINT64_C(14474569202368774144), // PVADDUivL_v |
| 1103 | UINT64_C(14474569202368774144), // PVADDUiv_v |
| 1104 | UINT64_C(14474569202368774144), // PVADDUivl |
| 1105 | UINT64_C(14474569202368774144), // PVADDUivl_v |
| 1106 | UINT64_C(14474569202368774144), // PVADDUivm |
| 1107 | UINT64_C(14474569202368774144), // PVADDUivmL |
| 1108 | UINT64_C(14474569202368774144), // PVADDUivmL_v |
| 1109 | UINT64_C(14474569202368774144), // PVADDUivm_v |
| 1110 | UINT64_C(14474569202368774144), // PVADDUivml |
| 1111 | UINT64_C(14474569202368774144), // PVADDUivml_v |
| 1112 | UINT64_C(14474709939857129472), // PVADDUrv |
| 1113 | UINT64_C(14474709939857129472), // PVADDUrvL |
| 1114 | UINT64_C(14474709939857129472), // PVADDUrvL_v |
| 1115 | UINT64_C(14474709939857129472), // PVADDUrv_v |
| 1116 | UINT64_C(14474709939857129472), // PVADDUrvl |
| 1117 | UINT64_C(14474709939857129472), // PVADDUrvl_v |
| 1118 | UINT64_C(14474709939857129472), // PVADDUrvm |
| 1119 | UINT64_C(14474709939857129472), // PVADDUrvmL |
| 1120 | UINT64_C(14474709939857129472), // PVADDUrvmL_v |
| 1121 | UINT64_C(14474709939857129472), // PVADDUrvm_v |
| 1122 | UINT64_C(14474709939857129472), // PVADDUrvml |
| 1123 | UINT64_C(14474709939857129472), // PVADDUrvml_v |
| 1124 | UINT64_C(14465562003114033152), // PVADDUvv |
| 1125 | UINT64_C(14465562003114033152), // PVADDUvvL |
| 1126 | UINT64_C(14465562003114033152), // PVADDUvvL_v |
| 1127 | UINT64_C(14465562003114033152), // PVADDUvv_v |
| 1128 | UINT64_C(14465562003114033152), // PVADDUvvl |
| 1129 | UINT64_C(14465562003114033152), // PVADDUvvl_v |
| 1130 | UINT64_C(14465562003114033152), // PVADDUvvm |
| 1131 | UINT64_C(14465562003114033152), // PVADDUvvmL |
| 1132 | UINT64_C(14465562003114033152), // PVADDUvvmL_v |
| 1133 | UINT64_C(14465562003114033152), // PVADDUvvm_v |
| 1134 | UINT64_C(14465562003114033152), // PVADDUvvml |
| 1135 | UINT64_C(14465562003114033152), // PVADDUvvml_v |
| 1136 | UINT64_C(14150310029198098432), // PVANDLOmv |
| 1137 | UINT64_C(14150310029198098432), // PVANDLOmvL |
| 1138 | UINT64_C(14150310029198098432), // PVANDLOmvL_v |
| 1139 | UINT64_C(14150310029198098432), // PVANDLOmv_v |
| 1140 | UINT64_C(14150310029198098432), // PVANDLOmvl |
| 1141 | UINT64_C(14150310029198098432), // PVANDLOmvl_v |
| 1142 | UINT64_C(14150310029198098432), // PVANDLOmvm |
| 1143 | UINT64_C(14150310029198098432), // PVANDLOmvmL |
| 1144 | UINT64_C(14150310029198098432), // PVANDLOmvmL_v |
| 1145 | UINT64_C(14150310029198098432), // PVANDLOmvm_v |
| 1146 | UINT64_C(14150310029198098432), // PVANDLOmvml |
| 1147 | UINT64_C(14150310029198098432), // PVANDLOmvml_v |
| 1148 | UINT64_C(14150450766686453760), // PVANDLOrv |
| 1149 | UINT64_C(14150450766686453760), // PVANDLOrvL |
| 1150 | UINT64_C(14150450766686453760), // PVANDLOrvL_v |
| 1151 | UINT64_C(14150450766686453760), // PVANDLOrv_v |
| 1152 | UINT64_C(14150450766686453760), // PVANDLOrvl |
| 1153 | UINT64_C(14150450766686453760), // PVANDLOrvl_v |
| 1154 | UINT64_C(14150450766686453760), // PVANDLOrvm |
| 1155 | UINT64_C(14150450766686453760), // PVANDLOrvmL |
| 1156 | UINT64_C(14150450766686453760), // PVANDLOrvmL_v |
| 1157 | UINT64_C(14150450766686453760), // PVANDLOrvm_v |
| 1158 | UINT64_C(14150450766686453760), // PVANDLOrvml |
| 1159 | UINT64_C(14150450766686453760), // PVANDLOrvml_v |
| 1160 | UINT64_C(14141302829943357440), // PVANDLOvv |
| 1161 | UINT64_C(14141302829943357440), // PVANDLOvvL |
| 1162 | UINT64_C(14141302829943357440), // PVANDLOvvL_v |
| 1163 | UINT64_C(14141302829943357440), // PVANDLOvv_v |
| 1164 | UINT64_C(14141302829943357440), // PVANDLOvvl |
| 1165 | UINT64_C(14141302829943357440), // PVANDLOvvl_v |
| 1166 | UINT64_C(14141302829943357440), // PVANDLOvvm |
| 1167 | UINT64_C(14141302829943357440), // PVANDLOvvmL |
| 1168 | UINT64_C(14141302829943357440), // PVANDLOvvmL_v |
| 1169 | UINT64_C(14141302829943357440), // PVANDLOvvm_v |
| 1170 | UINT64_C(14141302829943357440), // PVANDLOvvml |
| 1171 | UINT64_C(14141302829943357440), // PVANDLOvvml_v |
| 1172 | UINT64_C(14168324427707580416), // PVANDUPmv |
| 1173 | UINT64_C(14168324427707580416), // PVANDUPmvL |
| 1174 | UINT64_C(14168324427707580416), // PVANDUPmvL_v |
| 1175 | UINT64_C(14168324427707580416), // PVANDUPmv_v |
| 1176 | UINT64_C(14168324427707580416), // PVANDUPmvl |
| 1177 | UINT64_C(14168324427707580416), // PVANDUPmvl_v |
| 1178 | UINT64_C(14168324427707580416), // PVANDUPmvm |
| 1179 | UINT64_C(14168324427707580416), // PVANDUPmvmL |
| 1180 | UINT64_C(14168324427707580416), // PVANDUPmvmL_v |
| 1181 | UINT64_C(14168324427707580416), // PVANDUPmvm_v |
| 1182 | UINT64_C(14168324427707580416), // PVANDUPmvml |
| 1183 | UINT64_C(14168324427707580416), // PVANDUPmvml_v |
| 1184 | UINT64_C(14168465165195935744), // PVANDUPrv |
| 1185 | UINT64_C(14168465165195935744), // PVANDUPrvL |
| 1186 | UINT64_C(14168465165195935744), // PVANDUPrvL_v |
| 1187 | UINT64_C(14168465165195935744), // PVANDUPrv_v |
| 1188 | UINT64_C(14168465165195935744), // PVANDUPrvl |
| 1189 | UINT64_C(14168465165195935744), // PVANDUPrvl_v |
| 1190 | UINT64_C(14168465165195935744), // PVANDUPrvm |
| 1191 | UINT64_C(14168465165195935744), // PVANDUPrvmL |
| 1192 | UINT64_C(14168465165195935744), // PVANDUPrvmL_v |
| 1193 | UINT64_C(14168465165195935744), // PVANDUPrvm_v |
| 1194 | UINT64_C(14168465165195935744), // PVANDUPrvml |
| 1195 | UINT64_C(14168465165195935744), // PVANDUPrvml_v |
| 1196 | UINT64_C(14159317228452839424), // PVANDUPvv |
| 1197 | UINT64_C(14159317228452839424), // PVANDUPvvL |
| 1198 | UINT64_C(14159317228452839424), // PVANDUPvvL_v |
| 1199 | UINT64_C(14159317228452839424), // PVANDUPvv_v |
| 1200 | UINT64_C(14159317228452839424), // PVANDUPvvl |
| 1201 | UINT64_C(14159317228452839424), // PVANDUPvvl_v |
| 1202 | UINT64_C(14159317228452839424), // PVANDUPvvm |
| 1203 | UINT64_C(14159317228452839424), // PVANDUPvvmL |
| 1204 | UINT64_C(14159317228452839424), // PVANDUPvvmL_v |
| 1205 | UINT64_C(14159317228452839424), // PVANDUPvvm_v |
| 1206 | UINT64_C(14159317228452839424), // PVANDUPvvml |
| 1207 | UINT64_C(14159317228452839424), // PVANDUPvvml_v |
| 1208 | UINT64_C(14186338826217062400), // PVANDmv |
| 1209 | UINT64_C(14186338826217062400), // PVANDmvL |
| 1210 | UINT64_C(14186338826217062400), // PVANDmvL_v |
| 1211 | UINT64_C(14186338826217062400), // PVANDmv_v |
| 1212 | UINT64_C(14186338826217062400), // PVANDmvl |
| 1213 | UINT64_C(14186338826217062400), // PVANDmvl_v |
| 1214 | UINT64_C(14186338826217062400), // PVANDmvm |
| 1215 | UINT64_C(14186338826217062400), // PVANDmvmL |
| 1216 | UINT64_C(14186338826217062400), // PVANDmvmL_v |
| 1217 | UINT64_C(14186338826217062400), // PVANDmvm_v |
| 1218 | UINT64_C(14186338826217062400), // PVANDmvml |
| 1219 | UINT64_C(14186338826217062400), // PVANDmvml_v |
| 1220 | UINT64_C(14186479563705417728), // PVANDrv |
| 1221 | UINT64_C(14186479563705417728), // PVANDrvL |
| 1222 | UINT64_C(14186479563705417728), // PVANDrvL_v |
| 1223 | UINT64_C(14186479563705417728), // PVANDrv_v |
| 1224 | UINT64_C(14186479563705417728), // PVANDrvl |
| 1225 | UINT64_C(14186479563705417728), // PVANDrvl_v |
| 1226 | UINT64_C(14186479563705417728), // PVANDrvm |
| 1227 | UINT64_C(14186479563705417728), // PVANDrvmL |
| 1228 | UINT64_C(14186479563705417728), // PVANDrvmL_v |
| 1229 | UINT64_C(14186479563705417728), // PVANDrvm_v |
| 1230 | UINT64_C(14186479563705417728), // PVANDrvml |
| 1231 | UINT64_C(14186479563705417728), // PVANDrvml_v |
| 1232 | UINT64_C(14177331626962321408), // PVANDvv |
| 1233 | UINT64_C(14177331626962321408), // PVANDvvL |
| 1234 | UINT64_C(14177331626962321408), // PVANDvvL_v |
| 1235 | UINT64_C(14177331626962321408), // PVANDvv_v |
| 1236 | UINT64_C(14177331626962321408), // PVANDvvl |
| 1237 | UINT64_C(14177331626962321408), // PVANDvvl_v |
| 1238 | UINT64_C(14177331626962321408), // PVANDvvm |
| 1239 | UINT64_C(14177331626962321408), // PVANDvvmL |
| 1240 | UINT64_C(14177331626962321408), // PVANDvvmL_v |
| 1241 | UINT64_C(14177331626962321408), // PVANDvvm_v |
| 1242 | UINT64_C(14177331626962321408), // PVANDvvml |
| 1243 | UINT64_C(14177331626962321408), // PVANDvvml_v |
| 1244 | UINT64_C(10142106360838356992), // PVBRDi |
| 1245 | UINT64_C(10142106360838356992), // PVBRDiL |
| 1246 | UINT64_C(10142106360838356992), // PVBRDiL_v |
| 1247 | UINT64_C(10142106360838356992), // PVBRDi_v |
| 1248 | UINT64_C(10142106360838356992), // PVBRDil |
| 1249 | UINT64_C(10142106360838356992), // PVBRDil_v |
| 1250 | UINT64_C(10142106360838356992), // PVBRDim |
| 1251 | UINT64_C(10142106360838356992), // PVBRDimL |
| 1252 | UINT64_C(10142106360838356992), // PVBRDimL_v |
| 1253 | UINT64_C(10142106360838356992), // PVBRDim_v |
| 1254 | UINT64_C(10142106360838356992), // PVBRDiml |
| 1255 | UINT64_C(10142106360838356992), // PVBRDiml_v |
| 1256 | UINT64_C(10142247098326712320), // PVBRDr |
| 1257 | UINT64_C(10142247098326712320), // PVBRDrL |
| 1258 | UINT64_C(10142247098326712320), // PVBRDrL_v |
| 1259 | UINT64_C(10142247098326712320), // PVBRDr_v |
| 1260 | UINT64_C(10142247098326712320), // PVBRDrl |
| 1261 | UINT64_C(10142247098326712320), // PVBRDrl_v |
| 1262 | UINT64_C(10142247098326712320), // PVBRDrm |
| 1263 | UINT64_C(10142247098326712320), // PVBRDrmL |
| 1264 | UINT64_C(10142247098326712320), // PVBRDrmL_v |
| 1265 | UINT64_C(10142247098326712320), // PVBRDrm_v |
| 1266 | UINT64_C(10142247098326712320), // PVBRDrml |
| 1267 | UINT64_C(10142247098326712320), // PVBRDrml_v |
| 1268 | UINT64_C(17816240125877682176), // PVBRVLOv |
| 1269 | UINT64_C(17816240125877682176), // PVBRVLOvL |
| 1270 | UINT64_C(17816240125877682176), // PVBRVLOvL_v |
| 1271 | UINT64_C(17816240125877682176), // PVBRVLOv_v |
| 1272 | UINT64_C(17816240125877682176), // PVBRVLOvl |
| 1273 | UINT64_C(17816240125877682176), // PVBRVLOvl_v |
| 1274 | UINT64_C(17816240125877682176), // PVBRVLOvm |
| 1275 | UINT64_C(17816240125877682176), // PVBRVLOvmL |
| 1276 | UINT64_C(17816240125877682176), // PVBRVLOvmL_v |
| 1277 | UINT64_C(17816240125877682176), // PVBRVLOvm_v |
| 1278 | UINT64_C(17816240125877682176), // PVBRVLOvml |
| 1279 | UINT64_C(17816240125877682176), // PVBRVLOvml_v |
| 1280 | UINT64_C(17834254524387164160), // PVBRVUPv |
| 1281 | UINT64_C(17834254524387164160), // PVBRVUPvL |
| 1282 | UINT64_C(17834254524387164160), // PVBRVUPvL_v |
| 1283 | UINT64_C(17834254524387164160), // PVBRVUPv_v |
| 1284 | UINT64_C(17834254524387164160), // PVBRVUPvl |
| 1285 | UINT64_C(17834254524387164160), // PVBRVUPvl_v |
| 1286 | UINT64_C(17834254524387164160), // PVBRVUPvm |
| 1287 | UINT64_C(17834254524387164160), // PVBRVUPvmL |
| 1288 | UINT64_C(17834254524387164160), // PVBRVUPvmL_v |
| 1289 | UINT64_C(17834254524387164160), // PVBRVUPvm_v |
| 1290 | UINT64_C(17834254524387164160), // PVBRVUPvml |
| 1291 | UINT64_C(17834254524387164160), // PVBRVUPvml_v |
| 1292 | UINT64_C(17852268922896646144), // PVBRVv |
| 1293 | UINT64_C(17852268922896646144), // PVBRVvL |
| 1294 | UINT64_C(17852268922896646144), // PVBRVvL_v |
| 1295 | UINT64_C(17852268922896646144), // PVBRVv_v |
| 1296 | UINT64_C(17852268922896646144), // PVBRVvl |
| 1297 | UINT64_C(17852268922896646144), // PVBRVvl_v |
| 1298 | UINT64_C(17852268922896646144), // PVBRVvm |
| 1299 | UINT64_C(17852268922896646144), // PVBRVvmL |
| 1300 | UINT64_C(17852268922896646144), // PVBRVvmL_v |
| 1301 | UINT64_C(17852268922896646144), // PVBRVvm_v |
| 1302 | UINT64_C(17852268922896646144), // PVBRVvml |
| 1303 | UINT64_C(17852268922896646144), // PVBRVvml_v |
| 1304 | UINT64_C(18041420107246206976), // PVCMPSLOiv |
| 1305 | UINT64_C(18041420107246206976), // PVCMPSLOivL |
| 1306 | UINT64_C(18041420107246206976), // PVCMPSLOivL_v |
| 1307 | UINT64_C(18041420107246206976), // PVCMPSLOiv_v |
| 1308 | UINT64_C(18041420107246206976), // PVCMPSLOivl |
| 1309 | UINT64_C(18041420107246206976), // PVCMPSLOivl_v |
| 1310 | UINT64_C(18041420107246206976), // PVCMPSLOivm |
| 1311 | UINT64_C(18041420107246206976), // PVCMPSLOivmL |
| 1312 | UINT64_C(18041420107246206976), // PVCMPSLOivmL_v |
| 1313 | UINT64_C(18041420107246206976), // PVCMPSLOivm_v |
| 1314 | UINT64_C(18041420107246206976), // PVCMPSLOivml |
| 1315 | UINT64_C(18041420107246206976), // PVCMPSLOivml_v |
| 1316 | UINT64_C(18041560844734562304), // PVCMPSLOrv |
| 1317 | UINT64_C(18041560844734562304), // PVCMPSLOrvL |
| 1318 | UINT64_C(18041560844734562304), // PVCMPSLOrvL_v |
| 1319 | UINT64_C(18041560844734562304), // PVCMPSLOrv_v |
| 1320 | UINT64_C(18041560844734562304), // PVCMPSLOrvl |
| 1321 | UINT64_C(18041560844734562304), // PVCMPSLOrvl_v |
| 1322 | UINT64_C(18041560844734562304), // PVCMPSLOrvm |
| 1323 | UINT64_C(18041560844734562304), // PVCMPSLOrvmL |
| 1324 | UINT64_C(18041560844734562304), // PVCMPSLOrvmL_v |
| 1325 | UINT64_C(18041560844734562304), // PVCMPSLOrvm_v |
| 1326 | UINT64_C(18041560844734562304), // PVCMPSLOrvml |
| 1327 | UINT64_C(18041560844734562304), // PVCMPSLOrvml_v |
| 1328 | UINT64_C(18032412907991465984), // PVCMPSLOvv |
| 1329 | UINT64_C(18032412907991465984), // PVCMPSLOvvL |
| 1330 | UINT64_C(18032412907991465984), // PVCMPSLOvvL_v |
| 1331 | UINT64_C(18032412907991465984), // PVCMPSLOvv_v |
| 1332 | UINT64_C(18032412907991465984), // PVCMPSLOvvl |
| 1333 | UINT64_C(18032412907991465984), // PVCMPSLOvvl_v |
| 1334 | UINT64_C(18032412907991465984), // PVCMPSLOvvm |
| 1335 | UINT64_C(18032412907991465984), // PVCMPSLOvvmL |
| 1336 | UINT64_C(18032412907991465984), // PVCMPSLOvvmL_v |
| 1337 | UINT64_C(18032412907991465984), // PVCMPSLOvvm_v |
| 1338 | UINT64_C(18032412907991465984), // PVCMPSLOvvml |
| 1339 | UINT64_C(18032412907991465984), // PVCMPSLOvvml_v |
| 1340 | UINT64_C(18059434505755688960), // PVCMPSUPiv |
| 1341 | UINT64_C(18059434505755688960), // PVCMPSUPivL |
| 1342 | UINT64_C(18059434505755688960), // PVCMPSUPivL_v |
| 1343 | UINT64_C(18059434505755688960), // PVCMPSUPiv_v |
| 1344 | UINT64_C(18059434505755688960), // PVCMPSUPivl |
| 1345 | UINT64_C(18059434505755688960), // PVCMPSUPivl_v |
| 1346 | UINT64_C(18059434505755688960), // PVCMPSUPivm |
| 1347 | UINT64_C(18059434505755688960), // PVCMPSUPivmL |
| 1348 | UINT64_C(18059434505755688960), // PVCMPSUPivmL_v |
| 1349 | UINT64_C(18059434505755688960), // PVCMPSUPivm_v |
| 1350 | UINT64_C(18059434505755688960), // PVCMPSUPivml |
| 1351 | UINT64_C(18059434505755688960), // PVCMPSUPivml_v |
| 1352 | UINT64_C(18059575243244044288), // PVCMPSUPrv |
| 1353 | UINT64_C(18059575243244044288), // PVCMPSUPrvL |
| 1354 | UINT64_C(18059575243244044288), // PVCMPSUPrvL_v |
| 1355 | UINT64_C(18059575243244044288), // PVCMPSUPrv_v |
| 1356 | UINT64_C(18059575243244044288), // PVCMPSUPrvl |
| 1357 | UINT64_C(18059575243244044288), // PVCMPSUPrvl_v |
| 1358 | UINT64_C(18059575243244044288), // PVCMPSUPrvm |
| 1359 | UINT64_C(18059575243244044288), // PVCMPSUPrvmL |
| 1360 | UINT64_C(18059575243244044288), // PVCMPSUPrvmL_v |
| 1361 | UINT64_C(18059575243244044288), // PVCMPSUPrvm_v |
| 1362 | UINT64_C(18059575243244044288), // PVCMPSUPrvml |
| 1363 | UINT64_C(18059575243244044288), // PVCMPSUPrvml_v |
| 1364 | UINT64_C(18050427306500947968), // PVCMPSUPvv |
| 1365 | UINT64_C(18050427306500947968), // PVCMPSUPvvL |
| 1366 | UINT64_C(18050427306500947968), // PVCMPSUPvvL_v |
| 1367 | UINT64_C(18050427306500947968), // PVCMPSUPvv_v |
| 1368 | UINT64_C(18050427306500947968), // PVCMPSUPvvl |
| 1369 | UINT64_C(18050427306500947968), // PVCMPSUPvvl_v |
| 1370 | UINT64_C(18050427306500947968), // PVCMPSUPvvm |
| 1371 | UINT64_C(18050427306500947968), // PVCMPSUPvvmL |
| 1372 | UINT64_C(18050427306500947968), // PVCMPSUPvvmL_v |
| 1373 | UINT64_C(18050427306500947968), // PVCMPSUPvvm_v |
| 1374 | UINT64_C(18050427306500947968), // PVCMPSUPvvml |
| 1375 | UINT64_C(18050427306500947968), // PVCMPSUPvvml_v |
| 1376 | UINT64_C(18077448904265170944), // PVCMPSiv |
| 1377 | UINT64_C(18077448904265170944), // PVCMPSivL |
| 1378 | UINT64_C(18077448904265170944), // PVCMPSivL_v |
| 1379 | UINT64_C(18077448904265170944), // PVCMPSiv_v |
| 1380 | UINT64_C(18077448904265170944), // PVCMPSivl |
| 1381 | UINT64_C(18077448904265170944), // PVCMPSivl_v |
| 1382 | UINT64_C(18077448904265170944), // PVCMPSivm |
| 1383 | UINT64_C(18077448904265170944), // PVCMPSivmL |
| 1384 | UINT64_C(18077448904265170944), // PVCMPSivmL_v |
| 1385 | UINT64_C(18077448904265170944), // PVCMPSivm_v |
| 1386 | UINT64_C(18077448904265170944), // PVCMPSivml |
| 1387 | UINT64_C(18077448904265170944), // PVCMPSivml_v |
| 1388 | UINT64_C(18077589641753526272), // PVCMPSrv |
| 1389 | UINT64_C(18077589641753526272), // PVCMPSrvL |
| 1390 | UINT64_C(18077589641753526272), // PVCMPSrvL_v |
| 1391 | UINT64_C(18077589641753526272), // PVCMPSrv_v |
| 1392 | UINT64_C(18077589641753526272), // PVCMPSrvl |
| 1393 | UINT64_C(18077589641753526272), // PVCMPSrvl_v |
| 1394 | UINT64_C(18077589641753526272), // PVCMPSrvm |
| 1395 | UINT64_C(18077589641753526272), // PVCMPSrvmL |
| 1396 | UINT64_C(18077589641753526272), // PVCMPSrvmL_v |
| 1397 | UINT64_C(18077589641753526272), // PVCMPSrvm_v |
| 1398 | UINT64_C(18077589641753526272), // PVCMPSrvml |
| 1399 | UINT64_C(18077589641753526272), // PVCMPSrvml_v |
| 1400 | UINT64_C(18068441705010429952), // PVCMPSvv |
| 1401 | UINT64_C(18068441705010429952), // PVCMPSvvL |
| 1402 | UINT64_C(18068441705010429952), // PVCMPSvvL_v |
| 1403 | UINT64_C(18068441705010429952), // PVCMPSvv_v |
| 1404 | UINT64_C(18068441705010429952), // PVCMPSvvl |
| 1405 | UINT64_C(18068441705010429952), // PVCMPSvvl_v |
| 1406 | UINT64_C(18068441705010429952), // PVCMPSvvm |
| 1407 | UINT64_C(18068441705010429952), // PVCMPSvvmL |
| 1408 | UINT64_C(18068441705010429952), // PVCMPSvvmL_v |
| 1409 | UINT64_C(18068441705010429952), // PVCMPSvvm_v |
| 1410 | UINT64_C(18068441705010429952), // PVCMPSvvml |
| 1411 | UINT64_C(18068441705010429952), // PVCMPSvvml_v |
| 1412 | UINT64_C(13357676494780891136), // PVCMPULOiv |
| 1413 | UINT64_C(13357676494780891136), // PVCMPULOivL |
| 1414 | UINT64_C(13357676494780891136), // PVCMPULOivL_v |
| 1415 | UINT64_C(13357676494780891136), // PVCMPULOiv_v |
| 1416 | UINT64_C(13357676494780891136), // PVCMPULOivl |
| 1417 | UINT64_C(13357676494780891136), // PVCMPULOivl_v |
| 1418 | UINT64_C(13357676494780891136), // PVCMPULOivm |
| 1419 | UINT64_C(13357676494780891136), // PVCMPULOivmL |
| 1420 | UINT64_C(13357676494780891136), // PVCMPULOivmL_v |
| 1421 | UINT64_C(13357676494780891136), // PVCMPULOivm_v |
| 1422 | UINT64_C(13357676494780891136), // PVCMPULOivml |
| 1423 | UINT64_C(13357676494780891136), // PVCMPULOivml_v |
| 1424 | UINT64_C(13357817232269246464), // PVCMPULOrv |
| 1425 | UINT64_C(13357817232269246464), // PVCMPULOrvL |
| 1426 | UINT64_C(13357817232269246464), // PVCMPULOrvL_v |
| 1427 | UINT64_C(13357817232269246464), // PVCMPULOrv_v |
| 1428 | UINT64_C(13357817232269246464), // PVCMPULOrvl |
| 1429 | UINT64_C(13357817232269246464), // PVCMPULOrvl_v |
| 1430 | UINT64_C(13357817232269246464), // PVCMPULOrvm |
| 1431 | UINT64_C(13357817232269246464), // PVCMPULOrvmL |
| 1432 | UINT64_C(13357817232269246464), // PVCMPULOrvmL_v |
| 1433 | UINT64_C(13357817232269246464), // PVCMPULOrvm_v |
| 1434 | UINT64_C(13357817232269246464), // PVCMPULOrvml |
| 1435 | UINT64_C(13357817232269246464), // PVCMPULOrvml_v |
| 1436 | UINT64_C(13348669295526150144), // PVCMPULOvv |
| 1437 | UINT64_C(13348669295526150144), // PVCMPULOvvL |
| 1438 | UINT64_C(13348669295526150144), // PVCMPULOvvL_v |
| 1439 | UINT64_C(13348669295526150144), // PVCMPULOvv_v |
| 1440 | UINT64_C(13348669295526150144), // PVCMPULOvvl |
| 1441 | UINT64_C(13348669295526150144), // PVCMPULOvvl_v |
| 1442 | UINT64_C(13348669295526150144), // PVCMPULOvvm |
| 1443 | UINT64_C(13348669295526150144), // PVCMPULOvvmL |
| 1444 | UINT64_C(13348669295526150144), // PVCMPULOvvmL_v |
| 1445 | UINT64_C(13348669295526150144), // PVCMPULOvvm_v |
| 1446 | UINT64_C(13348669295526150144), // PVCMPULOvvml |
| 1447 | UINT64_C(13348669295526150144), // PVCMPULOvvml_v |
| 1448 | UINT64_C(13375690893290373120), // PVCMPUUPiv |
| 1449 | UINT64_C(13375690893290373120), // PVCMPUUPivL |
| 1450 | UINT64_C(13375690893290373120), // PVCMPUUPivL_v |
| 1451 | UINT64_C(13375690893290373120), // PVCMPUUPiv_v |
| 1452 | UINT64_C(13375690893290373120), // PVCMPUUPivl |
| 1453 | UINT64_C(13375690893290373120), // PVCMPUUPivl_v |
| 1454 | UINT64_C(13375690893290373120), // PVCMPUUPivm |
| 1455 | UINT64_C(13375690893290373120), // PVCMPUUPivmL |
| 1456 | UINT64_C(13375690893290373120), // PVCMPUUPivmL_v |
| 1457 | UINT64_C(13375690893290373120), // PVCMPUUPivm_v |
| 1458 | UINT64_C(13375690893290373120), // PVCMPUUPivml |
| 1459 | UINT64_C(13375690893290373120), // PVCMPUUPivml_v |
| 1460 | UINT64_C(13375831630778728448), // PVCMPUUPrv |
| 1461 | UINT64_C(13375831630778728448), // PVCMPUUPrvL |
| 1462 | UINT64_C(13375831630778728448), // PVCMPUUPrvL_v |
| 1463 | UINT64_C(13375831630778728448), // PVCMPUUPrv_v |
| 1464 | UINT64_C(13375831630778728448), // PVCMPUUPrvl |
| 1465 | UINT64_C(13375831630778728448), // PVCMPUUPrvl_v |
| 1466 | UINT64_C(13375831630778728448), // PVCMPUUPrvm |
| 1467 | UINT64_C(13375831630778728448), // PVCMPUUPrvmL |
| 1468 | UINT64_C(13375831630778728448), // PVCMPUUPrvmL_v |
| 1469 | UINT64_C(13375831630778728448), // PVCMPUUPrvm_v |
| 1470 | UINT64_C(13375831630778728448), // PVCMPUUPrvml |
| 1471 | UINT64_C(13375831630778728448), // PVCMPUUPrvml_v |
| 1472 | UINT64_C(13366683694035632128), // PVCMPUUPvv |
| 1473 | UINT64_C(13366683694035632128), // PVCMPUUPvvL |
| 1474 | UINT64_C(13366683694035632128), // PVCMPUUPvvL_v |
| 1475 | UINT64_C(13366683694035632128), // PVCMPUUPvv_v |
| 1476 | UINT64_C(13366683694035632128), // PVCMPUUPvvl |
| 1477 | UINT64_C(13366683694035632128), // PVCMPUUPvvl_v |
| 1478 | UINT64_C(13366683694035632128), // PVCMPUUPvvm |
| 1479 | UINT64_C(13366683694035632128), // PVCMPUUPvvmL |
| 1480 | UINT64_C(13366683694035632128), // PVCMPUUPvvmL_v |
| 1481 | UINT64_C(13366683694035632128), // PVCMPUUPvvm_v |
| 1482 | UINT64_C(13366683694035632128), // PVCMPUUPvvml |
| 1483 | UINT64_C(13366683694035632128), // PVCMPUUPvvml_v |
| 1484 | UINT64_C(13393705291799855104), // PVCMPUiv |
| 1485 | UINT64_C(13393705291799855104), // PVCMPUivL |
| 1486 | UINT64_C(13393705291799855104), // PVCMPUivL_v |
| 1487 | UINT64_C(13393705291799855104), // PVCMPUiv_v |
| 1488 | UINT64_C(13393705291799855104), // PVCMPUivl |
| 1489 | UINT64_C(13393705291799855104), // PVCMPUivl_v |
| 1490 | UINT64_C(13393705291799855104), // PVCMPUivm |
| 1491 | UINT64_C(13393705291799855104), // PVCMPUivmL |
| 1492 | UINT64_C(13393705291799855104), // PVCMPUivmL_v |
| 1493 | UINT64_C(13393705291799855104), // PVCMPUivm_v |
| 1494 | UINT64_C(13393705291799855104), // PVCMPUivml |
| 1495 | UINT64_C(13393705291799855104), // PVCMPUivml_v |
| 1496 | UINT64_C(13393846029288210432), // PVCMPUrv |
| 1497 | UINT64_C(13393846029288210432), // PVCMPUrvL |
| 1498 | UINT64_C(13393846029288210432), // PVCMPUrvL_v |
| 1499 | UINT64_C(13393846029288210432), // PVCMPUrv_v |
| 1500 | UINT64_C(13393846029288210432), // PVCMPUrvl |
| 1501 | UINT64_C(13393846029288210432), // PVCMPUrvl_v |
| 1502 | UINT64_C(13393846029288210432), // PVCMPUrvm |
| 1503 | UINT64_C(13393846029288210432), // PVCMPUrvmL |
| 1504 | UINT64_C(13393846029288210432), // PVCMPUrvmL_v |
| 1505 | UINT64_C(13393846029288210432), // PVCMPUrvm_v |
| 1506 | UINT64_C(13393846029288210432), // PVCMPUrvml |
| 1507 | UINT64_C(13393846029288210432), // PVCMPUrvml_v |
| 1508 | UINT64_C(13384698092545114112), // PVCMPUvv |
| 1509 | UINT64_C(13384698092545114112), // PVCMPUvvL |
| 1510 | UINT64_C(13384698092545114112), // PVCMPUvvL_v |
| 1511 | UINT64_C(13384698092545114112), // PVCMPUvv_v |
| 1512 | UINT64_C(13384698092545114112), // PVCMPUvvl |
| 1513 | UINT64_C(13384698092545114112), // PVCMPUvvl_v |
| 1514 | UINT64_C(13384698092545114112), // PVCMPUvvm |
| 1515 | UINT64_C(13384698092545114112), // PVCMPUvvmL |
| 1516 | UINT64_C(13384698092545114112), // PVCMPUvvmL_v |
| 1517 | UINT64_C(13384698092545114112), // PVCMPUvvm_v |
| 1518 | UINT64_C(13384698092545114112), // PVCMPUvvml |
| 1519 | UINT64_C(13384698092545114112), // PVCMPUvvml_v |
| 1520 | UINT64_C(17892801319542980608), // PVCVTSWLOv |
| 1521 | UINT64_C(17892801319542980608), // PVCVTSWLOvL |
| 1522 | UINT64_C(17892801319542980608), // PVCVTSWLOvL_v |
| 1523 | UINT64_C(17892801319542980608), // PVCVTSWLOv_v |
| 1524 | UINT64_C(17892801319542980608), // PVCVTSWLOvl |
| 1525 | UINT64_C(17892801319542980608), // PVCVTSWLOvl_v |
| 1526 | UINT64_C(17892801319542980608), // PVCVTSWLOvm |
| 1527 | UINT64_C(17892801319542980608), // PVCVTSWLOvmL |
| 1528 | UINT64_C(17892801319542980608), // PVCVTSWLOvmL_v |
| 1529 | UINT64_C(17892801319542980608), // PVCVTSWLOvm_v |
| 1530 | UINT64_C(17892801319542980608), // PVCVTSWLOvml |
| 1531 | UINT64_C(17892801319542980608), // PVCVTSWLOvml_v |
| 1532 | UINT64_C(17910815718052462592), // PVCVTSWUPv |
| 1533 | UINT64_C(17910815718052462592), // PVCVTSWUPvL |
| 1534 | UINT64_C(17910815718052462592), // PVCVTSWUPvL_v |
| 1535 | UINT64_C(17910815718052462592), // PVCVTSWUPv_v |
| 1536 | UINT64_C(17910815718052462592), // PVCVTSWUPvl |
| 1537 | UINT64_C(17910815718052462592), // PVCVTSWUPvl_v |
| 1538 | UINT64_C(17910815718052462592), // PVCVTSWUPvm |
| 1539 | UINT64_C(17910815718052462592), // PVCVTSWUPvmL |
| 1540 | UINT64_C(17910815718052462592), // PVCVTSWUPvmL_v |
| 1541 | UINT64_C(17910815718052462592), // PVCVTSWUPvm_v |
| 1542 | UINT64_C(17910815718052462592), // PVCVTSWUPvml |
| 1543 | UINT64_C(17910815718052462592), // PVCVTSWUPvml_v |
| 1544 | UINT64_C(17928830116561944576), // PVCVTSWv |
| 1545 | UINT64_C(17928830116561944576), // PVCVTSWvL |
| 1546 | UINT64_C(17928830116561944576), // PVCVTSWvL_v |
| 1547 | UINT64_C(17928830116561944576), // PVCVTSWv_v |
| 1548 | UINT64_C(17928830116561944576), // PVCVTSWvl |
| 1549 | UINT64_C(17928830116561944576), // PVCVTSWvl_v |
| 1550 | UINT64_C(17928830116561944576), // PVCVTSWvm |
| 1551 | UINT64_C(17928830116561944576), // PVCVTSWvmL |
| 1552 | UINT64_C(17928830116561944576), // PVCVTSWvmL_v |
| 1553 | UINT64_C(17928830116561944576), // PVCVTSWvm_v |
| 1554 | UINT64_C(17928830116561944576), // PVCVTSWvml |
| 1555 | UINT64_C(17928830116561944576), // PVCVTSWvml_v |
| 1556 | UINT64_C(16739879814936133632), // PVCVTWSLOv |
| 1557 | UINT64_C(16739879814936133632), // PVCVTWSLOvL |
| 1558 | UINT64_C(16739879814936133632), // PVCVTWSLOvL_v |
| 1559 | UINT64_C(16739879814936133632), // PVCVTWSLOv_v |
| 1560 | UINT64_C(16739879814936133632), // PVCVTWSLOvl |
| 1561 | UINT64_C(16739879814936133632), // PVCVTWSLOvl_v |
| 1562 | UINT64_C(16739879814936133632), // PVCVTWSLOvm |
| 1563 | UINT64_C(16739879814936133632), // PVCVTWSLOvmL |
| 1564 | UINT64_C(16739879814936133632), // PVCVTWSLOvmL_v |
| 1565 | UINT64_C(16739879814936133632), // PVCVTWSLOvm_v |
| 1566 | UINT64_C(16739879814936133632), // PVCVTWSLOvml |
| 1567 | UINT64_C(16739879814936133632), // PVCVTWSLOvml_v |
| 1568 | UINT64_C(16757894213445615616), // PVCVTWSUPv |
| 1569 | UINT64_C(16757894213445615616), // PVCVTWSUPvL |
| 1570 | UINT64_C(16757894213445615616), // PVCVTWSUPvL_v |
| 1571 | UINT64_C(16757894213445615616), // PVCVTWSUPv_v |
| 1572 | UINT64_C(16757894213445615616), // PVCVTWSUPvl |
| 1573 | UINT64_C(16757894213445615616), // PVCVTWSUPvl_v |
| 1574 | UINT64_C(16757894213445615616), // PVCVTWSUPvm |
| 1575 | UINT64_C(16757894213445615616), // PVCVTWSUPvmL |
| 1576 | UINT64_C(16757894213445615616), // PVCVTWSUPvmL_v |
| 1577 | UINT64_C(16757894213445615616), // PVCVTWSUPvm_v |
| 1578 | UINT64_C(16757894213445615616), // PVCVTWSUPvml |
| 1579 | UINT64_C(16757894213445615616), // PVCVTWSUPvml_v |
| 1580 | UINT64_C(16775908611955097600), // PVCVTWSv |
| 1581 | UINT64_C(16775908611955097600), // PVCVTWSvL |
| 1582 | UINT64_C(16775908611955097600), // PVCVTWSvL_v |
| 1583 | UINT64_C(16775908611955097600), // PVCVTWSv_v |
| 1584 | UINT64_C(16775908611955097600), // PVCVTWSvl |
| 1585 | UINT64_C(16775908611955097600), // PVCVTWSvl_v |
| 1586 | UINT64_C(16775908611955097600), // PVCVTWSvm |
| 1587 | UINT64_C(16775908611955097600), // PVCVTWSvmL |
| 1588 | UINT64_C(16775908611955097600), // PVCVTWSvmL_v |
| 1589 | UINT64_C(16775908611955097600), // PVCVTWSvm_v |
| 1590 | UINT64_C(16775908611955097600), // PVCVTWSvml |
| 1591 | UINT64_C(16775908611955097600), // PVCVTWSvml_v |
| 1592 | UINT64_C(14366482811311882240), // PVEQVLOmv |
| 1593 | UINT64_C(14366482811311882240), // PVEQVLOmvL |
| 1594 | UINT64_C(14366482811311882240), // PVEQVLOmvL_v |
| 1595 | UINT64_C(14366482811311882240), // PVEQVLOmv_v |
| 1596 | UINT64_C(14366482811311882240), // PVEQVLOmvl |
| 1597 | UINT64_C(14366482811311882240), // PVEQVLOmvl_v |
| 1598 | UINT64_C(14366482811311882240), // PVEQVLOmvm |
| 1599 | UINT64_C(14366482811311882240), // PVEQVLOmvmL |
| 1600 | UINT64_C(14366482811311882240), // PVEQVLOmvmL_v |
| 1601 | UINT64_C(14366482811311882240), // PVEQVLOmvm_v |
| 1602 | UINT64_C(14366482811311882240), // PVEQVLOmvml |
| 1603 | UINT64_C(14366482811311882240), // PVEQVLOmvml_v |
| 1604 | UINT64_C(14366623548800237568), // PVEQVLOrv |
| 1605 | UINT64_C(14366623548800237568), // PVEQVLOrvL |
| 1606 | UINT64_C(14366623548800237568), // PVEQVLOrvL_v |
| 1607 | UINT64_C(14366623548800237568), // PVEQVLOrv_v |
| 1608 | UINT64_C(14366623548800237568), // PVEQVLOrvl |
| 1609 | UINT64_C(14366623548800237568), // PVEQVLOrvl_v |
| 1610 | UINT64_C(14366623548800237568), // PVEQVLOrvm |
| 1611 | UINT64_C(14366623548800237568), // PVEQVLOrvmL |
| 1612 | UINT64_C(14366623548800237568), // PVEQVLOrvmL_v |
| 1613 | UINT64_C(14366623548800237568), // PVEQVLOrvm_v |
| 1614 | UINT64_C(14366623548800237568), // PVEQVLOrvml |
| 1615 | UINT64_C(14366623548800237568), // PVEQVLOrvml_v |
| 1616 | UINT64_C(14357475612057141248), // PVEQVLOvv |
| 1617 | UINT64_C(14357475612057141248), // PVEQVLOvvL |
| 1618 | UINT64_C(14357475612057141248), // PVEQVLOvvL_v |
| 1619 | UINT64_C(14357475612057141248), // PVEQVLOvv_v |
| 1620 | UINT64_C(14357475612057141248), // PVEQVLOvvl |
| 1621 | UINT64_C(14357475612057141248), // PVEQVLOvvl_v |
| 1622 | UINT64_C(14357475612057141248), // PVEQVLOvvm |
| 1623 | UINT64_C(14357475612057141248), // PVEQVLOvvmL |
| 1624 | UINT64_C(14357475612057141248), // PVEQVLOvvmL_v |
| 1625 | UINT64_C(14357475612057141248), // PVEQVLOvvm_v |
| 1626 | UINT64_C(14357475612057141248), // PVEQVLOvvml |
| 1627 | UINT64_C(14357475612057141248), // PVEQVLOvvml_v |
| 1628 | UINT64_C(14384497209821364224), // PVEQVUPmv |
| 1629 | UINT64_C(14384497209821364224), // PVEQVUPmvL |
| 1630 | UINT64_C(14384497209821364224), // PVEQVUPmvL_v |
| 1631 | UINT64_C(14384497209821364224), // PVEQVUPmv_v |
| 1632 | UINT64_C(14384497209821364224), // PVEQVUPmvl |
| 1633 | UINT64_C(14384497209821364224), // PVEQVUPmvl_v |
| 1634 | UINT64_C(14384497209821364224), // PVEQVUPmvm |
| 1635 | UINT64_C(14384497209821364224), // PVEQVUPmvmL |
| 1636 | UINT64_C(14384497209821364224), // PVEQVUPmvmL_v |
| 1637 | UINT64_C(14384497209821364224), // PVEQVUPmvm_v |
| 1638 | UINT64_C(14384497209821364224), // PVEQVUPmvml |
| 1639 | UINT64_C(14384497209821364224), // PVEQVUPmvml_v |
| 1640 | UINT64_C(14384637947309719552), // PVEQVUPrv |
| 1641 | UINT64_C(14384637947309719552), // PVEQVUPrvL |
| 1642 | UINT64_C(14384637947309719552), // PVEQVUPrvL_v |
| 1643 | UINT64_C(14384637947309719552), // PVEQVUPrv_v |
| 1644 | UINT64_C(14384637947309719552), // PVEQVUPrvl |
| 1645 | UINT64_C(14384637947309719552), // PVEQVUPrvl_v |
| 1646 | UINT64_C(14384637947309719552), // PVEQVUPrvm |
| 1647 | UINT64_C(14384637947309719552), // PVEQVUPrvmL |
| 1648 | UINT64_C(14384637947309719552), // PVEQVUPrvmL_v |
| 1649 | UINT64_C(14384637947309719552), // PVEQVUPrvm_v |
| 1650 | UINT64_C(14384637947309719552), // PVEQVUPrvml |
| 1651 | UINT64_C(14384637947309719552), // PVEQVUPrvml_v |
| 1652 | UINT64_C(14375490010566623232), // PVEQVUPvv |
| 1653 | UINT64_C(14375490010566623232), // PVEQVUPvvL |
| 1654 | UINT64_C(14375490010566623232), // PVEQVUPvvL_v |
| 1655 | UINT64_C(14375490010566623232), // PVEQVUPvv_v |
| 1656 | UINT64_C(14375490010566623232), // PVEQVUPvvl |
| 1657 | UINT64_C(14375490010566623232), // PVEQVUPvvl_v |
| 1658 | UINT64_C(14375490010566623232), // PVEQVUPvvm |
| 1659 | UINT64_C(14375490010566623232), // PVEQVUPvvmL |
| 1660 | UINT64_C(14375490010566623232), // PVEQVUPvvmL_v |
| 1661 | UINT64_C(14375490010566623232), // PVEQVUPvvm_v |
| 1662 | UINT64_C(14375490010566623232), // PVEQVUPvvml |
| 1663 | UINT64_C(14375490010566623232), // PVEQVUPvvml_v |
| 1664 | UINT64_C(14402511608330846208), // PVEQVmv |
| 1665 | UINT64_C(14402511608330846208), // PVEQVmvL |
| 1666 | UINT64_C(14402511608330846208), // PVEQVmvL_v |
| 1667 | UINT64_C(14402511608330846208), // PVEQVmv_v |
| 1668 | UINT64_C(14402511608330846208), // PVEQVmvl |
| 1669 | UINT64_C(14402511608330846208), // PVEQVmvl_v |
| 1670 | UINT64_C(14402511608330846208), // PVEQVmvm |
| 1671 | UINT64_C(14402511608330846208), // PVEQVmvmL |
| 1672 | UINT64_C(14402511608330846208), // PVEQVmvmL_v |
| 1673 | UINT64_C(14402511608330846208), // PVEQVmvm_v |
| 1674 | UINT64_C(14402511608330846208), // PVEQVmvml |
| 1675 | UINT64_C(14402511608330846208), // PVEQVmvml_v |
| 1676 | UINT64_C(14402652345819201536), // PVEQVrv |
| 1677 | UINT64_C(14402652345819201536), // PVEQVrvL |
| 1678 | UINT64_C(14402652345819201536), // PVEQVrvL_v |
| 1679 | UINT64_C(14402652345819201536), // PVEQVrv_v |
| 1680 | UINT64_C(14402652345819201536), // PVEQVrvl |
| 1681 | UINT64_C(14402652345819201536), // PVEQVrvl_v |
| 1682 | UINT64_C(14402652345819201536), // PVEQVrvm |
| 1683 | UINT64_C(14402652345819201536), // PVEQVrvmL |
| 1684 | UINT64_C(14402652345819201536), // PVEQVrvmL_v |
| 1685 | UINT64_C(14402652345819201536), // PVEQVrvm_v |
| 1686 | UINT64_C(14402652345819201536), // PVEQVrvml |
| 1687 | UINT64_C(14402652345819201536), // PVEQVrvml_v |
| 1688 | UINT64_C(14393504409076105216), // PVEQVvv |
| 1689 | UINT64_C(14393504409076105216), // PVEQVvvL |
| 1690 | UINT64_C(14393504409076105216), // PVEQVvvL_v |
| 1691 | UINT64_C(14393504409076105216), // PVEQVvv_v |
| 1692 | UINT64_C(14393504409076105216), // PVEQVvvl |
| 1693 | UINT64_C(14393504409076105216), // PVEQVvvl_v |
| 1694 | UINT64_C(14393504409076105216), // PVEQVvvm |
| 1695 | UINT64_C(14393504409076105216), // PVEQVvvmL |
| 1696 | UINT64_C(14393504409076105216), // PVEQVvvmL_v |
| 1697 | UINT64_C(14393504409076105216), // PVEQVvvm_v |
| 1698 | UINT64_C(14393504409076105216), // PVEQVvvml |
| 1699 | UINT64_C(14393504409076105216), // PVEQVvvml_v |
| 1700 | UINT64_C(14726770781501521920), // PVFADDLOiv |
| 1701 | UINT64_C(14726770781501521920), // PVFADDLOivL |
| 1702 | UINT64_C(14726770781501521920), // PVFADDLOivL_v |
| 1703 | UINT64_C(14726770781501521920), // PVFADDLOiv_v |
| 1704 | UINT64_C(14726770781501521920), // PVFADDLOivl |
| 1705 | UINT64_C(14726770781501521920), // PVFADDLOivl_v |
| 1706 | UINT64_C(14726770781501521920), // PVFADDLOivm |
| 1707 | UINT64_C(14726770781501521920), // PVFADDLOivmL |
| 1708 | UINT64_C(14726770781501521920), // PVFADDLOivmL_v |
| 1709 | UINT64_C(14726770781501521920), // PVFADDLOivm_v |
| 1710 | UINT64_C(14726770781501521920), // PVFADDLOivml |
| 1711 | UINT64_C(14726770781501521920), // PVFADDLOivml_v |
| 1712 | UINT64_C(14726911518989877248), // PVFADDLOrv |
| 1713 | UINT64_C(14726911518989877248), // PVFADDLOrvL |
| 1714 | UINT64_C(14726911518989877248), // PVFADDLOrvL_v |
| 1715 | UINT64_C(14726911518989877248), // PVFADDLOrv_v |
| 1716 | UINT64_C(14726911518989877248), // PVFADDLOrvl |
| 1717 | UINT64_C(14726911518989877248), // PVFADDLOrvl_v |
| 1718 | UINT64_C(14726911518989877248), // PVFADDLOrvm |
| 1719 | UINT64_C(14726911518989877248), // PVFADDLOrvmL |
| 1720 | UINT64_C(14726911518989877248), // PVFADDLOrvmL_v |
| 1721 | UINT64_C(14726911518989877248), // PVFADDLOrvm_v |
| 1722 | UINT64_C(14726911518989877248), // PVFADDLOrvml |
| 1723 | UINT64_C(14726911518989877248), // PVFADDLOrvml_v |
| 1724 | UINT64_C(14717763582246780928), // PVFADDLOvv |
| 1725 | UINT64_C(14717763582246780928), // PVFADDLOvvL |
| 1726 | UINT64_C(14717763582246780928), // PVFADDLOvvL_v |
| 1727 | UINT64_C(14717763582246780928), // PVFADDLOvv_v |
| 1728 | UINT64_C(14717763582246780928), // PVFADDLOvvl |
| 1729 | UINT64_C(14717763582246780928), // PVFADDLOvvl_v |
| 1730 | UINT64_C(14717763582246780928), // PVFADDLOvvm |
| 1731 | UINT64_C(14717763582246780928), // PVFADDLOvvmL |
| 1732 | UINT64_C(14717763582246780928), // PVFADDLOvvmL_v |
| 1733 | UINT64_C(14717763582246780928), // PVFADDLOvvm_v |
| 1734 | UINT64_C(14717763582246780928), // PVFADDLOvvml |
| 1735 | UINT64_C(14717763582246780928), // PVFADDLOvvml_v |
| 1736 | UINT64_C(14744785180011003904), // PVFADDUPiv |
| 1737 | UINT64_C(14744785180011003904), // PVFADDUPivL |
| 1738 | UINT64_C(14744785180011003904), // PVFADDUPivL_v |
| 1739 | UINT64_C(14744785180011003904), // PVFADDUPiv_v |
| 1740 | UINT64_C(14744785180011003904), // PVFADDUPivl |
| 1741 | UINT64_C(14744785180011003904), // PVFADDUPivl_v |
| 1742 | UINT64_C(14744785180011003904), // PVFADDUPivm |
| 1743 | UINT64_C(14744785180011003904), // PVFADDUPivmL |
| 1744 | UINT64_C(14744785180011003904), // PVFADDUPivmL_v |
| 1745 | UINT64_C(14744785180011003904), // PVFADDUPivm_v |
| 1746 | UINT64_C(14744785180011003904), // PVFADDUPivml |
| 1747 | UINT64_C(14744785180011003904), // PVFADDUPivml_v |
| 1748 | UINT64_C(14744925917499359232), // PVFADDUPrv |
| 1749 | UINT64_C(14744925917499359232), // PVFADDUPrvL |
| 1750 | UINT64_C(14744925917499359232), // PVFADDUPrvL_v |
| 1751 | UINT64_C(14744925917499359232), // PVFADDUPrv_v |
| 1752 | UINT64_C(14744925917499359232), // PVFADDUPrvl |
| 1753 | UINT64_C(14744925917499359232), // PVFADDUPrvl_v |
| 1754 | UINT64_C(14744925917499359232), // PVFADDUPrvm |
| 1755 | UINT64_C(14744925917499359232), // PVFADDUPrvmL |
| 1756 | UINT64_C(14744925917499359232), // PVFADDUPrvmL_v |
| 1757 | UINT64_C(14744925917499359232), // PVFADDUPrvm_v |
| 1758 | UINT64_C(14744925917499359232), // PVFADDUPrvml |
| 1759 | UINT64_C(14744925917499359232), // PVFADDUPrvml_v |
| 1760 | UINT64_C(14735777980756262912), // PVFADDUPvv |
| 1761 | UINT64_C(14735777980756262912), // PVFADDUPvvL |
| 1762 | UINT64_C(14735777980756262912), // PVFADDUPvvL_v |
| 1763 | UINT64_C(14735777980756262912), // PVFADDUPvv_v |
| 1764 | UINT64_C(14735777980756262912), // PVFADDUPvvl |
| 1765 | UINT64_C(14735777980756262912), // PVFADDUPvvl_v |
| 1766 | UINT64_C(14735777980756262912), // PVFADDUPvvm |
| 1767 | UINT64_C(14735777980756262912), // PVFADDUPvvmL |
| 1768 | UINT64_C(14735777980756262912), // PVFADDUPvvmL_v |
| 1769 | UINT64_C(14735777980756262912), // PVFADDUPvvm_v |
| 1770 | UINT64_C(14735777980756262912), // PVFADDUPvvml |
| 1771 | UINT64_C(14735777980756262912), // PVFADDUPvvml_v |
| 1772 | UINT64_C(14762799578520485888), // PVFADDiv |
| 1773 | UINT64_C(14762799578520485888), // PVFADDivL |
| 1774 | UINT64_C(14762799578520485888), // PVFADDivL_v |
| 1775 | UINT64_C(14762799578520485888), // PVFADDiv_v |
| 1776 | UINT64_C(14762799578520485888), // PVFADDivl |
| 1777 | UINT64_C(14762799578520485888), // PVFADDivl_v |
| 1778 | UINT64_C(14762799578520485888), // PVFADDivm |
| 1779 | UINT64_C(14762799578520485888), // PVFADDivmL |
| 1780 | UINT64_C(14762799578520485888), // PVFADDivmL_v |
| 1781 | UINT64_C(14762799578520485888), // PVFADDivm_v |
| 1782 | UINT64_C(14762799578520485888), // PVFADDivml |
| 1783 | UINT64_C(14762799578520485888), // PVFADDivml_v |
| 1784 | UINT64_C(14762940316008841216), // PVFADDrv |
| 1785 | UINT64_C(14762940316008841216), // PVFADDrvL |
| 1786 | UINT64_C(14762940316008841216), // PVFADDrvL_v |
| 1787 | UINT64_C(14762940316008841216), // PVFADDrv_v |
| 1788 | UINT64_C(14762940316008841216), // PVFADDrvl |
| 1789 | UINT64_C(14762940316008841216), // PVFADDrvl_v |
| 1790 | UINT64_C(14762940316008841216), // PVFADDrvm |
| 1791 | UINT64_C(14762940316008841216), // PVFADDrvmL |
| 1792 | UINT64_C(14762940316008841216), // PVFADDrvmL_v |
| 1793 | UINT64_C(14762940316008841216), // PVFADDrvm_v |
| 1794 | UINT64_C(14762940316008841216), // PVFADDrvml |
| 1795 | UINT64_C(14762940316008841216), // PVFADDrvml_v |
| 1796 | UINT64_C(14753792379265744896), // PVFADDvv |
| 1797 | UINT64_C(14753792379265744896), // PVFADDvvL |
| 1798 | UINT64_C(14753792379265744896), // PVFADDvvL_v |
| 1799 | UINT64_C(14753792379265744896), // PVFADDvv_v |
| 1800 | UINT64_C(14753792379265744896), // PVFADDvvl |
| 1801 | UINT64_C(14753792379265744896), // PVFADDvvl_v |
| 1802 | UINT64_C(14753792379265744896), // PVFADDvvm |
| 1803 | UINT64_C(14753792379265744896), // PVFADDvvmL |
| 1804 | UINT64_C(14753792379265744896), // PVFADDvvmL_v |
| 1805 | UINT64_C(14753792379265744896), // PVFADDvvm_v |
| 1806 | UINT64_C(14753792379265744896), // PVFADDvvml |
| 1807 | UINT64_C(14753792379265744896), // PVFADDvvml_v |
| 1808 | UINT64_C(18185535295322062848), // PVFCMPLOiv |
| 1809 | UINT64_C(18185535295322062848), // PVFCMPLOivL |
| 1810 | UINT64_C(18185535295322062848), // PVFCMPLOivL_v |
| 1811 | UINT64_C(18185535295322062848), // PVFCMPLOiv_v |
| 1812 | UINT64_C(18185535295322062848), // PVFCMPLOivl |
| 1813 | UINT64_C(18185535295322062848), // PVFCMPLOivl_v |
| 1814 | UINT64_C(18185535295322062848), // PVFCMPLOivm |
| 1815 | UINT64_C(18185535295322062848), // PVFCMPLOivmL |
| 1816 | UINT64_C(18185535295322062848), // PVFCMPLOivmL_v |
| 1817 | UINT64_C(18185535295322062848), // PVFCMPLOivm_v |
| 1818 | UINT64_C(18185535295322062848), // PVFCMPLOivml |
| 1819 | UINT64_C(18185535295322062848), // PVFCMPLOivml_v |
| 1820 | UINT64_C(18185676032810418176), // PVFCMPLOrv |
| 1821 | UINT64_C(18185676032810418176), // PVFCMPLOrvL |
| 1822 | UINT64_C(18185676032810418176), // PVFCMPLOrvL_v |
| 1823 | UINT64_C(18185676032810418176), // PVFCMPLOrv_v |
| 1824 | UINT64_C(18185676032810418176), // PVFCMPLOrvl |
| 1825 | UINT64_C(18185676032810418176), // PVFCMPLOrvl_v |
| 1826 | UINT64_C(18185676032810418176), // PVFCMPLOrvm |
| 1827 | UINT64_C(18185676032810418176), // PVFCMPLOrvmL |
| 1828 | UINT64_C(18185676032810418176), // PVFCMPLOrvmL_v |
| 1829 | UINT64_C(18185676032810418176), // PVFCMPLOrvm_v |
| 1830 | UINT64_C(18185676032810418176), // PVFCMPLOrvml |
| 1831 | UINT64_C(18185676032810418176), // PVFCMPLOrvml_v |
| 1832 | UINT64_C(18176528096067321856), // PVFCMPLOvv |
| 1833 | UINT64_C(18176528096067321856), // PVFCMPLOvvL |
| 1834 | UINT64_C(18176528096067321856), // PVFCMPLOvvL_v |
| 1835 | UINT64_C(18176528096067321856), // PVFCMPLOvv_v |
| 1836 | UINT64_C(18176528096067321856), // PVFCMPLOvvl |
| 1837 | UINT64_C(18176528096067321856), // PVFCMPLOvvl_v |
| 1838 | UINT64_C(18176528096067321856), // PVFCMPLOvvm |
| 1839 | UINT64_C(18176528096067321856), // PVFCMPLOvvmL |
| 1840 | UINT64_C(18176528096067321856), // PVFCMPLOvvmL_v |
| 1841 | UINT64_C(18176528096067321856), // PVFCMPLOvvm_v |
| 1842 | UINT64_C(18176528096067321856), // PVFCMPLOvvml |
| 1843 | UINT64_C(18176528096067321856), // PVFCMPLOvvml_v |
| 1844 | UINT64_C(18203549693831544832), // PVFCMPUPiv |
| 1845 | UINT64_C(18203549693831544832), // PVFCMPUPivL |
| 1846 | UINT64_C(18203549693831544832), // PVFCMPUPivL_v |
| 1847 | UINT64_C(18203549693831544832), // PVFCMPUPiv_v |
| 1848 | UINT64_C(18203549693831544832), // PVFCMPUPivl |
| 1849 | UINT64_C(18203549693831544832), // PVFCMPUPivl_v |
| 1850 | UINT64_C(18203549693831544832), // PVFCMPUPivm |
| 1851 | UINT64_C(18203549693831544832), // PVFCMPUPivmL |
| 1852 | UINT64_C(18203549693831544832), // PVFCMPUPivmL_v |
| 1853 | UINT64_C(18203549693831544832), // PVFCMPUPivm_v |
| 1854 | UINT64_C(18203549693831544832), // PVFCMPUPivml |
| 1855 | UINT64_C(18203549693831544832), // PVFCMPUPivml_v |
| 1856 | UINT64_C(18203690431319900160), // PVFCMPUPrv |
| 1857 | UINT64_C(18203690431319900160), // PVFCMPUPrvL |
| 1858 | UINT64_C(18203690431319900160), // PVFCMPUPrvL_v |
| 1859 | UINT64_C(18203690431319900160), // PVFCMPUPrv_v |
| 1860 | UINT64_C(18203690431319900160), // PVFCMPUPrvl |
| 1861 | UINT64_C(18203690431319900160), // PVFCMPUPrvl_v |
| 1862 | UINT64_C(18203690431319900160), // PVFCMPUPrvm |
| 1863 | UINT64_C(18203690431319900160), // PVFCMPUPrvmL |
| 1864 | UINT64_C(18203690431319900160), // PVFCMPUPrvmL_v |
| 1865 | UINT64_C(18203690431319900160), // PVFCMPUPrvm_v |
| 1866 | UINT64_C(18203690431319900160), // PVFCMPUPrvml |
| 1867 | UINT64_C(18203690431319900160), // PVFCMPUPrvml_v |
| 1868 | UINT64_C(18194542494576803840), // PVFCMPUPvv |
| 1869 | UINT64_C(18194542494576803840), // PVFCMPUPvvL |
| 1870 | UINT64_C(18194542494576803840), // PVFCMPUPvvL_v |
| 1871 | UINT64_C(18194542494576803840), // PVFCMPUPvv_v |
| 1872 | UINT64_C(18194542494576803840), // PVFCMPUPvvl |
| 1873 | UINT64_C(18194542494576803840), // PVFCMPUPvvl_v |
| 1874 | UINT64_C(18194542494576803840), // PVFCMPUPvvm |
| 1875 | UINT64_C(18194542494576803840), // PVFCMPUPvvmL |
| 1876 | UINT64_C(18194542494576803840), // PVFCMPUPvvmL_v |
| 1877 | UINT64_C(18194542494576803840), // PVFCMPUPvvm_v |
| 1878 | UINT64_C(18194542494576803840), // PVFCMPUPvvml |
| 1879 | UINT64_C(18194542494576803840), // PVFCMPUPvvml_v |
| 1880 | UINT64_C(18221564092341026816), // PVFCMPiv |
| 1881 | UINT64_C(18221564092341026816), // PVFCMPivL |
| 1882 | UINT64_C(18221564092341026816), // PVFCMPivL_v |
| 1883 | UINT64_C(18221564092341026816), // PVFCMPiv_v |
| 1884 | UINT64_C(18221564092341026816), // PVFCMPivl |
| 1885 | UINT64_C(18221564092341026816), // PVFCMPivl_v |
| 1886 | UINT64_C(18221564092341026816), // PVFCMPivm |
| 1887 | UINT64_C(18221564092341026816), // PVFCMPivmL |
| 1888 | UINT64_C(18221564092341026816), // PVFCMPivmL_v |
| 1889 | UINT64_C(18221564092341026816), // PVFCMPivm_v |
| 1890 | UINT64_C(18221564092341026816), // PVFCMPivml |
| 1891 | UINT64_C(18221564092341026816), // PVFCMPivml_v |
| 1892 | UINT64_C(18221704829829382144), // PVFCMPrv |
| 1893 | UINT64_C(18221704829829382144), // PVFCMPrvL |
| 1894 | UINT64_C(18221704829829382144), // PVFCMPrvL_v |
| 1895 | UINT64_C(18221704829829382144), // PVFCMPrv_v |
| 1896 | UINT64_C(18221704829829382144), // PVFCMPrvl |
| 1897 | UINT64_C(18221704829829382144), // PVFCMPrvl_v |
| 1898 | UINT64_C(18221704829829382144), // PVFCMPrvm |
| 1899 | UINT64_C(18221704829829382144), // PVFCMPrvmL |
| 1900 | UINT64_C(18221704829829382144), // PVFCMPrvmL_v |
| 1901 | UINT64_C(18221704829829382144), // PVFCMPrvm_v |
| 1902 | UINT64_C(18221704829829382144), // PVFCMPrvml |
| 1903 | UINT64_C(18221704829829382144), // PVFCMPrvml_v |
| 1904 | UINT64_C(18212556893086285824), // PVFCMPvv |
| 1905 | UINT64_C(18212556893086285824), // PVFCMPvvL |
| 1906 | UINT64_C(18212556893086285824), // PVFCMPvvL_v |
| 1907 | UINT64_C(18212556893086285824), // PVFCMPvv_v |
| 1908 | UINT64_C(18212556893086285824), // PVFCMPvvl |
| 1909 | UINT64_C(18212556893086285824), // PVFCMPvvl_v |
| 1910 | UINT64_C(18212556893086285824), // PVFCMPvvm |
| 1911 | UINT64_C(18212556893086285824), // PVFCMPvvmL |
| 1912 | UINT64_C(18212556893086285824), // PVFCMPvvmL_v |
| 1913 | UINT64_C(18212556893086285824), // PVFCMPvvm_v |
| 1914 | UINT64_C(18212556893086285824), // PVFCMPvvml |
| 1915 | UINT64_C(18212556893086285824), // PVFCMPvvml_v |
| 1916 | UINT64_C(16312037850335936512), // PVFMADLOivv |
| 1917 | UINT64_C(16312037850335936512), // PVFMADLOivvL |
| 1918 | UINT64_C(16312037850335936512), // PVFMADLOivvL_v |
| 1919 | UINT64_C(16312037850335936512), // PVFMADLOivv_v |
| 1920 | UINT64_C(16312037850335936512), // PVFMADLOivvl |
| 1921 | UINT64_C(16312037850335936512), // PVFMADLOivvl_v |
| 1922 | UINT64_C(16312037850335936512), // PVFMADLOivvm |
| 1923 | UINT64_C(16312037850335936512), // PVFMADLOivvmL |
| 1924 | UINT64_C(16312037850335936512), // PVFMADLOivvmL_v |
| 1925 | UINT64_C(16312037850335936512), // PVFMADLOivvm_v |
| 1926 | UINT64_C(16312037850335936512), // PVFMADLOivvml |
| 1927 | UINT64_C(16312037850335936512), // PVFMADLOivvml_v |
| 1928 | UINT64_C(16312178587824291840), // PVFMADLOrvv |
| 1929 | UINT64_C(16312178587824291840), // PVFMADLOrvvL |
| 1930 | UINT64_C(16312178587824291840), // PVFMADLOrvvL_v |
| 1931 | UINT64_C(16312178587824291840), // PVFMADLOrvv_v |
| 1932 | UINT64_C(16312178587824291840), // PVFMADLOrvvl |
| 1933 | UINT64_C(16312178587824291840), // PVFMADLOrvvl_v |
| 1934 | UINT64_C(16312178587824291840), // PVFMADLOrvvm |
| 1935 | UINT64_C(16312178587824291840), // PVFMADLOrvvmL |
| 1936 | UINT64_C(16312178587824291840), // PVFMADLOrvvmL_v |
| 1937 | UINT64_C(16312178587824291840), // PVFMADLOrvvm_v |
| 1938 | UINT64_C(16312178587824291840), // PVFMADLOrvvml |
| 1939 | UINT64_C(16312178587824291840), // PVFMADLOrvvml_v |
| 1940 | UINT64_C(16307534250708566016), // PVFMADLOviv |
| 1941 | UINT64_C(16307534250708566016), // PVFMADLOvivL |
| 1942 | UINT64_C(16307534250708566016), // PVFMADLOvivL_v |
| 1943 | UINT64_C(16307534250708566016), // PVFMADLOviv_v |
| 1944 | UINT64_C(16307534250708566016), // PVFMADLOvivl |
| 1945 | UINT64_C(16307534250708566016), // PVFMADLOvivl_v |
| 1946 | UINT64_C(16307534250708566016), // PVFMADLOvivm |
| 1947 | UINT64_C(16307534250708566016), // PVFMADLOvivmL |
| 1948 | UINT64_C(16307534250708566016), // PVFMADLOvivmL_v |
| 1949 | UINT64_C(16307534250708566016), // PVFMADLOvivm_v |
| 1950 | UINT64_C(16307534250708566016), // PVFMADLOvivml |
| 1951 | UINT64_C(16307534250708566016), // PVFMADLOvivml_v |
| 1952 | UINT64_C(16307674988196921344), // PVFMADLOvrv |
| 1953 | UINT64_C(16307674988196921344), // PVFMADLOvrvL |
| 1954 | UINT64_C(16307674988196921344), // PVFMADLOvrvL_v |
| 1955 | UINT64_C(16307674988196921344), // PVFMADLOvrv_v |
| 1956 | UINT64_C(16307674988196921344), // PVFMADLOvrvl |
| 1957 | UINT64_C(16307674988196921344), // PVFMADLOvrvl_v |
| 1958 | UINT64_C(16307674988196921344), // PVFMADLOvrvm |
| 1959 | UINT64_C(16307674988196921344), // PVFMADLOvrvmL |
| 1960 | UINT64_C(16307674988196921344), // PVFMADLOvrvmL_v |
| 1961 | UINT64_C(16307674988196921344), // PVFMADLOvrvm_v |
| 1962 | UINT64_C(16307674988196921344), // PVFMADLOvrvml |
| 1963 | UINT64_C(16307674988196921344), // PVFMADLOvrvml_v |
| 1964 | UINT64_C(16303030651081195520), // PVFMADLOvvv |
| 1965 | UINT64_C(16303030651081195520), // PVFMADLOvvvL |
| 1966 | UINT64_C(16303030651081195520), // PVFMADLOvvvL_v |
| 1967 | UINT64_C(16303030651081195520), // PVFMADLOvvv_v |
| 1968 | UINT64_C(16303030651081195520), // PVFMADLOvvvl |
| 1969 | UINT64_C(16303030651081195520), // PVFMADLOvvvl_v |
| 1970 | UINT64_C(16303030651081195520), // PVFMADLOvvvm |
| 1971 | UINT64_C(16303030651081195520), // PVFMADLOvvvmL |
| 1972 | UINT64_C(16303030651081195520), // PVFMADLOvvvmL_v |
| 1973 | UINT64_C(16303030651081195520), // PVFMADLOvvvm_v |
| 1974 | UINT64_C(16303030651081195520), // PVFMADLOvvvml |
| 1975 | UINT64_C(16303030651081195520), // PVFMADLOvvvml_v |
| 1976 | UINT64_C(16330052248845418496), // PVFMADUPivv |
| 1977 | UINT64_C(16330052248845418496), // PVFMADUPivvL |
| 1978 | UINT64_C(16330052248845418496), // PVFMADUPivvL_v |
| 1979 | UINT64_C(16330052248845418496), // PVFMADUPivv_v |
| 1980 | UINT64_C(16330052248845418496), // PVFMADUPivvl |
| 1981 | UINT64_C(16330052248845418496), // PVFMADUPivvl_v |
| 1982 | UINT64_C(16330052248845418496), // PVFMADUPivvm |
| 1983 | UINT64_C(16330052248845418496), // PVFMADUPivvmL |
| 1984 | UINT64_C(16330052248845418496), // PVFMADUPivvmL_v |
| 1985 | UINT64_C(16330052248845418496), // PVFMADUPivvm_v |
| 1986 | UINT64_C(16330052248845418496), // PVFMADUPivvml |
| 1987 | UINT64_C(16330052248845418496), // PVFMADUPivvml_v |
| 1988 | UINT64_C(16330192986333773824), // PVFMADUPrvv |
| 1989 | UINT64_C(16330192986333773824), // PVFMADUPrvvL |
| 1990 | UINT64_C(16330192986333773824), // PVFMADUPrvvL_v |
| 1991 | UINT64_C(16330192986333773824), // PVFMADUPrvv_v |
| 1992 | UINT64_C(16330192986333773824), // PVFMADUPrvvl |
| 1993 | UINT64_C(16330192986333773824), // PVFMADUPrvvl_v |
| 1994 | UINT64_C(16330192986333773824), // PVFMADUPrvvm |
| 1995 | UINT64_C(16330192986333773824), // PVFMADUPrvvmL |
| 1996 | UINT64_C(16330192986333773824), // PVFMADUPrvvmL_v |
| 1997 | UINT64_C(16330192986333773824), // PVFMADUPrvvm_v |
| 1998 | UINT64_C(16330192986333773824), // PVFMADUPrvvml |
| 1999 | UINT64_C(16330192986333773824), // PVFMADUPrvvml_v |
| 2000 | UINT64_C(16325548649218048000), // PVFMADUPviv |
| 2001 | UINT64_C(16325548649218048000), // PVFMADUPvivL |
| 2002 | UINT64_C(16325548649218048000), // PVFMADUPvivL_v |
| 2003 | UINT64_C(16325548649218048000), // PVFMADUPviv_v |
| 2004 | UINT64_C(16325548649218048000), // PVFMADUPvivl |
| 2005 | UINT64_C(16325548649218048000), // PVFMADUPvivl_v |
| 2006 | UINT64_C(16325548649218048000), // PVFMADUPvivm |
| 2007 | UINT64_C(16325548649218048000), // PVFMADUPvivmL |
| 2008 | UINT64_C(16325548649218048000), // PVFMADUPvivmL_v |
| 2009 | UINT64_C(16325548649218048000), // PVFMADUPvivm_v |
| 2010 | UINT64_C(16325548649218048000), // PVFMADUPvivml |
| 2011 | UINT64_C(16325548649218048000), // PVFMADUPvivml_v |
| 2012 | UINT64_C(16325689386706403328), // PVFMADUPvrv |
| 2013 | UINT64_C(16325689386706403328), // PVFMADUPvrvL |
| 2014 | UINT64_C(16325689386706403328), // PVFMADUPvrvL_v |
| 2015 | UINT64_C(16325689386706403328), // PVFMADUPvrv_v |
| 2016 | UINT64_C(16325689386706403328), // PVFMADUPvrvl |
| 2017 | UINT64_C(16325689386706403328), // PVFMADUPvrvl_v |
| 2018 | UINT64_C(16325689386706403328), // PVFMADUPvrvm |
| 2019 | UINT64_C(16325689386706403328), // PVFMADUPvrvmL |
| 2020 | UINT64_C(16325689386706403328), // PVFMADUPvrvmL_v |
| 2021 | UINT64_C(16325689386706403328), // PVFMADUPvrvm_v |
| 2022 | UINT64_C(16325689386706403328), // PVFMADUPvrvml |
| 2023 | UINT64_C(16325689386706403328), // PVFMADUPvrvml_v |
| 2024 | UINT64_C(16321045049590677504), // PVFMADUPvvv |
| 2025 | UINT64_C(16321045049590677504), // PVFMADUPvvvL |
| 2026 | UINT64_C(16321045049590677504), // PVFMADUPvvvL_v |
| 2027 | UINT64_C(16321045049590677504), // PVFMADUPvvv_v |
| 2028 | UINT64_C(16321045049590677504), // PVFMADUPvvvl |
| 2029 | UINT64_C(16321045049590677504), // PVFMADUPvvvl_v |
| 2030 | UINT64_C(16321045049590677504), // PVFMADUPvvvm |
| 2031 | UINT64_C(16321045049590677504), // PVFMADUPvvvmL |
| 2032 | UINT64_C(16321045049590677504), // PVFMADUPvvvmL_v |
| 2033 | UINT64_C(16321045049590677504), // PVFMADUPvvvm_v |
| 2034 | UINT64_C(16321045049590677504), // PVFMADUPvvvml |
| 2035 | UINT64_C(16321045049590677504), // PVFMADUPvvvml_v |
| 2036 | UINT64_C(16348066647354900480), // PVFMADivv |
| 2037 | UINT64_C(16348066647354900480), // PVFMADivvL |
| 2038 | UINT64_C(16348066647354900480), // PVFMADivvL_v |
| 2039 | UINT64_C(16348066647354900480), // PVFMADivv_v |
| 2040 | UINT64_C(16348066647354900480), // PVFMADivvl |
| 2041 | UINT64_C(16348066647354900480), // PVFMADivvl_v |
| 2042 | UINT64_C(16348066647354900480), // PVFMADivvm |
| 2043 | UINT64_C(16348066647354900480), // PVFMADivvmL |
| 2044 | UINT64_C(16348066647354900480), // PVFMADivvmL_v |
| 2045 | UINT64_C(16348066647354900480), // PVFMADivvm_v |
| 2046 | UINT64_C(16348066647354900480), // PVFMADivvml |
| 2047 | UINT64_C(16348066647354900480), // PVFMADivvml_v |
| 2048 | UINT64_C(16348207384843255808), // PVFMADrvv |
| 2049 | UINT64_C(16348207384843255808), // PVFMADrvvL |
| 2050 | UINT64_C(16348207384843255808), // PVFMADrvvL_v |
| 2051 | UINT64_C(16348207384843255808), // PVFMADrvv_v |
| 2052 | UINT64_C(16348207384843255808), // PVFMADrvvl |
| 2053 | UINT64_C(16348207384843255808), // PVFMADrvvl_v |
| 2054 | UINT64_C(16348207384843255808), // PVFMADrvvm |
| 2055 | UINT64_C(16348207384843255808), // PVFMADrvvmL |
| 2056 | UINT64_C(16348207384843255808), // PVFMADrvvmL_v |
| 2057 | UINT64_C(16348207384843255808), // PVFMADrvvm_v |
| 2058 | UINT64_C(16348207384843255808), // PVFMADrvvml |
| 2059 | UINT64_C(16348207384843255808), // PVFMADrvvml_v |
| 2060 | UINT64_C(16343563047727529984), // PVFMADviv |
| 2061 | UINT64_C(16343563047727529984), // PVFMADvivL |
| 2062 | UINT64_C(16343563047727529984), // PVFMADvivL_v |
| 2063 | UINT64_C(16343563047727529984), // PVFMADviv_v |
| 2064 | UINT64_C(16343563047727529984), // PVFMADvivl |
| 2065 | UINT64_C(16343563047727529984), // PVFMADvivl_v |
| 2066 | UINT64_C(16343563047727529984), // PVFMADvivm |
| 2067 | UINT64_C(16343563047727529984), // PVFMADvivmL |
| 2068 | UINT64_C(16343563047727529984), // PVFMADvivmL_v |
| 2069 | UINT64_C(16343563047727529984), // PVFMADvivm_v |
| 2070 | UINT64_C(16343563047727529984), // PVFMADvivml |
| 2071 | UINT64_C(16343563047727529984), // PVFMADvivml_v |
| 2072 | UINT64_C(16343703785215885312), // PVFMADvrv |
| 2073 | UINT64_C(16343703785215885312), // PVFMADvrvL |
| 2074 | UINT64_C(16343703785215885312), // PVFMADvrvL_v |
| 2075 | UINT64_C(16343703785215885312), // PVFMADvrv_v |
| 2076 | UINT64_C(16343703785215885312), // PVFMADvrvl |
| 2077 | UINT64_C(16343703785215885312), // PVFMADvrvl_v |
| 2078 | UINT64_C(16343703785215885312), // PVFMADvrvm |
| 2079 | UINT64_C(16343703785215885312), // PVFMADvrvmL |
| 2080 | UINT64_C(16343703785215885312), // PVFMADvrvmL_v |
| 2081 | UINT64_C(16343703785215885312), // PVFMADvrvm_v |
| 2082 | UINT64_C(16343703785215885312), // PVFMADvrvml |
| 2083 | UINT64_C(16343703785215885312), // PVFMADvrvml_v |
| 2084 | UINT64_C(16339059448100159488), // PVFMADvvv |
| 2085 | UINT64_C(16339059448100159488), // PVFMADvvvL |
| 2086 | UINT64_C(16339059448100159488), // PVFMADvvvL_v |
| 2087 | UINT64_C(16339059448100159488), // PVFMADvvv_v |
| 2088 | UINT64_C(16339059448100159488), // PVFMADvvvl |
| 2089 | UINT64_C(16339059448100159488), // PVFMADvvvl_v |
| 2090 | UINT64_C(16339059448100159488), // PVFMADvvvm |
| 2091 | UINT64_C(16339059448100159488), // PVFMADvvvmL |
| 2092 | UINT64_C(16339059448100159488), // PVFMADvvvmL_v |
| 2093 | UINT64_C(16339059448100159488), // PVFMADvvvm_v |
| 2094 | UINT64_C(16339059448100159488), // PVFMADvvvml |
| 2095 | UINT64_C(16339059448100159488), // PVFMADvvvml_v |
| 2096 | UINT64_C(13645906870932602880), // PVFMAXLOiv |
| 2097 | UINT64_C(13645906870932602880), // PVFMAXLOivL |
| 2098 | UINT64_C(13645906870932602880), // PVFMAXLOivL_v |
| 2099 | UINT64_C(13645906870932602880), // PVFMAXLOiv_v |
| 2100 | UINT64_C(13645906870932602880), // PVFMAXLOivl |
| 2101 | UINT64_C(13645906870932602880), // PVFMAXLOivl_v |
| 2102 | UINT64_C(13645906870932602880), // PVFMAXLOivm |
| 2103 | UINT64_C(13645906870932602880), // PVFMAXLOivmL |
| 2104 | UINT64_C(13645906870932602880), // PVFMAXLOivmL_v |
| 2105 | UINT64_C(13645906870932602880), // PVFMAXLOivm_v |
| 2106 | UINT64_C(13645906870932602880), // PVFMAXLOivml |
| 2107 | UINT64_C(13645906870932602880), // PVFMAXLOivml_v |
| 2108 | UINT64_C(13646047608420958208), // PVFMAXLOrv |
| 2109 | UINT64_C(13646047608420958208), // PVFMAXLOrvL |
| 2110 | UINT64_C(13646047608420958208), // PVFMAXLOrvL_v |
| 2111 | UINT64_C(13646047608420958208), // PVFMAXLOrv_v |
| 2112 | UINT64_C(13646047608420958208), // PVFMAXLOrvl |
| 2113 | UINT64_C(13646047608420958208), // PVFMAXLOrvl_v |
| 2114 | UINT64_C(13646047608420958208), // PVFMAXLOrvm |
| 2115 | UINT64_C(13646047608420958208), // PVFMAXLOrvmL |
| 2116 | UINT64_C(13646047608420958208), // PVFMAXLOrvmL_v |
| 2117 | UINT64_C(13646047608420958208), // PVFMAXLOrvm_v |
| 2118 | UINT64_C(13646047608420958208), // PVFMAXLOrvml |
| 2119 | UINT64_C(13646047608420958208), // PVFMAXLOrvml_v |
| 2120 | UINT64_C(13636899671677861888), // PVFMAXLOvv |
| 2121 | UINT64_C(13636899671677861888), // PVFMAXLOvvL |
| 2122 | UINT64_C(13636899671677861888), // PVFMAXLOvvL_v |
| 2123 | UINT64_C(13636899671677861888), // PVFMAXLOvv_v |
| 2124 | UINT64_C(13636899671677861888), // PVFMAXLOvvl |
| 2125 | UINT64_C(13636899671677861888), // PVFMAXLOvvl_v |
| 2126 | UINT64_C(13636899671677861888), // PVFMAXLOvvm |
| 2127 | UINT64_C(13636899671677861888), // PVFMAXLOvvmL |
| 2128 | UINT64_C(13636899671677861888), // PVFMAXLOvvmL_v |
| 2129 | UINT64_C(13636899671677861888), // PVFMAXLOvvm_v |
| 2130 | UINT64_C(13636899671677861888), // PVFMAXLOvvml |
| 2131 | UINT64_C(13636899671677861888), // PVFMAXLOvvml_v |
| 2132 | UINT64_C(13663921269442084864), // PVFMAXUPiv |
| 2133 | UINT64_C(13663921269442084864), // PVFMAXUPivL |
| 2134 | UINT64_C(13663921269442084864), // PVFMAXUPivL_v |
| 2135 | UINT64_C(13663921269442084864), // PVFMAXUPiv_v |
| 2136 | UINT64_C(13663921269442084864), // PVFMAXUPivl |
| 2137 | UINT64_C(13663921269442084864), // PVFMAXUPivl_v |
| 2138 | UINT64_C(13663921269442084864), // PVFMAXUPivm |
| 2139 | UINT64_C(13663921269442084864), // PVFMAXUPivmL |
| 2140 | UINT64_C(13663921269442084864), // PVFMAXUPivmL_v |
| 2141 | UINT64_C(13663921269442084864), // PVFMAXUPivm_v |
| 2142 | UINT64_C(13663921269442084864), // PVFMAXUPivml |
| 2143 | UINT64_C(13663921269442084864), // PVFMAXUPivml_v |
| 2144 | UINT64_C(13664062006930440192), // PVFMAXUPrv |
| 2145 | UINT64_C(13664062006930440192), // PVFMAXUPrvL |
| 2146 | UINT64_C(13664062006930440192), // PVFMAXUPrvL_v |
| 2147 | UINT64_C(13664062006930440192), // PVFMAXUPrv_v |
| 2148 | UINT64_C(13664062006930440192), // PVFMAXUPrvl |
| 2149 | UINT64_C(13664062006930440192), // PVFMAXUPrvl_v |
| 2150 | UINT64_C(13664062006930440192), // PVFMAXUPrvm |
| 2151 | UINT64_C(13664062006930440192), // PVFMAXUPrvmL |
| 2152 | UINT64_C(13664062006930440192), // PVFMAXUPrvmL_v |
| 2153 | UINT64_C(13664062006930440192), // PVFMAXUPrvm_v |
| 2154 | UINT64_C(13664062006930440192), // PVFMAXUPrvml |
| 2155 | UINT64_C(13664062006930440192), // PVFMAXUPrvml_v |
| 2156 | UINT64_C(13654914070187343872), // PVFMAXUPvv |
| 2157 | UINT64_C(13654914070187343872), // PVFMAXUPvvL |
| 2158 | UINT64_C(13654914070187343872), // PVFMAXUPvvL_v |
| 2159 | UINT64_C(13654914070187343872), // PVFMAXUPvv_v |
| 2160 | UINT64_C(13654914070187343872), // PVFMAXUPvvl |
| 2161 | UINT64_C(13654914070187343872), // PVFMAXUPvvl_v |
| 2162 | UINT64_C(13654914070187343872), // PVFMAXUPvvm |
| 2163 | UINT64_C(13654914070187343872), // PVFMAXUPvvmL |
| 2164 | UINT64_C(13654914070187343872), // PVFMAXUPvvmL_v |
| 2165 | UINT64_C(13654914070187343872), // PVFMAXUPvvm_v |
| 2166 | UINT64_C(13654914070187343872), // PVFMAXUPvvml |
| 2167 | UINT64_C(13654914070187343872), // PVFMAXUPvvml_v |
| 2168 | UINT64_C(13681935667951566848), // PVFMAXiv |
| 2169 | UINT64_C(13681935667951566848), // PVFMAXivL |
| 2170 | UINT64_C(13681935667951566848), // PVFMAXivL_v |
| 2171 | UINT64_C(13681935667951566848), // PVFMAXiv_v |
| 2172 | UINT64_C(13681935667951566848), // PVFMAXivl |
| 2173 | UINT64_C(13681935667951566848), // PVFMAXivl_v |
| 2174 | UINT64_C(13681935667951566848), // PVFMAXivm |
| 2175 | UINT64_C(13681935667951566848), // PVFMAXivmL |
| 2176 | UINT64_C(13681935667951566848), // PVFMAXivmL_v |
| 2177 | UINT64_C(13681935667951566848), // PVFMAXivm_v |
| 2178 | UINT64_C(13681935667951566848), // PVFMAXivml |
| 2179 | UINT64_C(13681935667951566848), // PVFMAXivml_v |
| 2180 | UINT64_C(13682076405439922176), // PVFMAXrv |
| 2181 | UINT64_C(13682076405439922176), // PVFMAXrvL |
| 2182 | UINT64_C(13682076405439922176), // PVFMAXrvL_v |
| 2183 | UINT64_C(13682076405439922176), // PVFMAXrv_v |
| 2184 | UINT64_C(13682076405439922176), // PVFMAXrvl |
| 2185 | UINT64_C(13682076405439922176), // PVFMAXrvl_v |
| 2186 | UINT64_C(13682076405439922176), // PVFMAXrvm |
| 2187 | UINT64_C(13682076405439922176), // PVFMAXrvmL |
| 2188 | UINT64_C(13682076405439922176), // PVFMAXrvmL_v |
| 2189 | UINT64_C(13682076405439922176), // PVFMAXrvm_v |
| 2190 | UINT64_C(13682076405439922176), // PVFMAXrvml |
| 2191 | UINT64_C(13682076405439922176), // PVFMAXrvml_v |
| 2192 | UINT64_C(13672928468696825856), // PVFMAXvv |
| 2193 | UINT64_C(13672928468696825856), // PVFMAXvvL |
| 2194 | UINT64_C(13672928468696825856), // PVFMAXvvL_v |
| 2195 | UINT64_C(13672928468696825856), // PVFMAXvv_v |
| 2196 | UINT64_C(13672928468696825856), // PVFMAXvvl |
| 2197 | UINT64_C(13672928468696825856), // PVFMAXvvl_v |
| 2198 | UINT64_C(13672928468696825856), // PVFMAXvvm |
| 2199 | UINT64_C(13672928468696825856), // PVFMAXvvmL |
| 2200 | UINT64_C(13672928468696825856), // PVFMAXvvmL_v |
| 2201 | UINT64_C(13672928468696825856), // PVFMAXvvm_v |
| 2202 | UINT64_C(13672928468696825856), // PVFMAXvvml |
| 2203 | UINT64_C(13672928468696825856), // PVFMAXvvml_v |
| 2204 | UINT64_C(13650410470559973376), // PVFMINLOiv |
| 2205 | UINT64_C(13650410470559973376), // PVFMINLOivL |
| 2206 | UINT64_C(13650410470559973376), // PVFMINLOivL_v |
| 2207 | UINT64_C(13650410470559973376), // PVFMINLOiv_v |
| 2208 | UINT64_C(13650410470559973376), // PVFMINLOivl |
| 2209 | UINT64_C(13650410470559973376), // PVFMINLOivl_v |
| 2210 | UINT64_C(13650410470559973376), // PVFMINLOivm |
| 2211 | UINT64_C(13650410470559973376), // PVFMINLOivmL |
| 2212 | UINT64_C(13650410470559973376), // PVFMINLOivmL_v |
| 2213 | UINT64_C(13650410470559973376), // PVFMINLOivm_v |
| 2214 | UINT64_C(13650410470559973376), // PVFMINLOivml |
| 2215 | UINT64_C(13650410470559973376), // PVFMINLOivml_v |
| 2216 | UINT64_C(13650551208048328704), // PVFMINLOrv |
| 2217 | UINT64_C(13650551208048328704), // PVFMINLOrvL |
| 2218 | UINT64_C(13650551208048328704), // PVFMINLOrvL_v |
| 2219 | UINT64_C(13650551208048328704), // PVFMINLOrv_v |
| 2220 | UINT64_C(13650551208048328704), // PVFMINLOrvl |
| 2221 | UINT64_C(13650551208048328704), // PVFMINLOrvl_v |
| 2222 | UINT64_C(13650551208048328704), // PVFMINLOrvm |
| 2223 | UINT64_C(13650551208048328704), // PVFMINLOrvmL |
| 2224 | UINT64_C(13650551208048328704), // PVFMINLOrvmL_v |
| 2225 | UINT64_C(13650551208048328704), // PVFMINLOrvm_v |
| 2226 | UINT64_C(13650551208048328704), // PVFMINLOrvml |
| 2227 | UINT64_C(13650551208048328704), // PVFMINLOrvml_v |
| 2228 | UINT64_C(13641403271305232384), // PVFMINLOvv |
| 2229 | UINT64_C(13641403271305232384), // PVFMINLOvvL |
| 2230 | UINT64_C(13641403271305232384), // PVFMINLOvvL_v |
| 2231 | UINT64_C(13641403271305232384), // PVFMINLOvv_v |
| 2232 | UINT64_C(13641403271305232384), // PVFMINLOvvl |
| 2233 | UINT64_C(13641403271305232384), // PVFMINLOvvl_v |
| 2234 | UINT64_C(13641403271305232384), // PVFMINLOvvm |
| 2235 | UINT64_C(13641403271305232384), // PVFMINLOvvmL |
| 2236 | UINT64_C(13641403271305232384), // PVFMINLOvvmL_v |
| 2237 | UINT64_C(13641403271305232384), // PVFMINLOvvm_v |
| 2238 | UINT64_C(13641403271305232384), // PVFMINLOvvml |
| 2239 | UINT64_C(13641403271305232384), // PVFMINLOvvml_v |
| 2240 | UINT64_C(13668424869069455360), // PVFMINUPiv |
| 2241 | UINT64_C(13668424869069455360), // PVFMINUPivL |
| 2242 | UINT64_C(13668424869069455360), // PVFMINUPivL_v |
| 2243 | UINT64_C(13668424869069455360), // PVFMINUPiv_v |
| 2244 | UINT64_C(13668424869069455360), // PVFMINUPivl |
| 2245 | UINT64_C(13668424869069455360), // PVFMINUPivl_v |
| 2246 | UINT64_C(13668424869069455360), // PVFMINUPivm |
| 2247 | UINT64_C(13668424869069455360), // PVFMINUPivmL |
| 2248 | UINT64_C(13668424869069455360), // PVFMINUPivmL_v |
| 2249 | UINT64_C(13668424869069455360), // PVFMINUPivm_v |
| 2250 | UINT64_C(13668424869069455360), // PVFMINUPivml |
| 2251 | UINT64_C(13668424869069455360), // PVFMINUPivml_v |
| 2252 | UINT64_C(13668565606557810688), // PVFMINUPrv |
| 2253 | UINT64_C(13668565606557810688), // PVFMINUPrvL |
| 2254 | UINT64_C(13668565606557810688), // PVFMINUPrvL_v |
| 2255 | UINT64_C(13668565606557810688), // PVFMINUPrv_v |
| 2256 | UINT64_C(13668565606557810688), // PVFMINUPrvl |
| 2257 | UINT64_C(13668565606557810688), // PVFMINUPrvl_v |
| 2258 | UINT64_C(13668565606557810688), // PVFMINUPrvm |
| 2259 | UINT64_C(13668565606557810688), // PVFMINUPrvmL |
| 2260 | UINT64_C(13668565606557810688), // PVFMINUPrvmL_v |
| 2261 | UINT64_C(13668565606557810688), // PVFMINUPrvm_v |
| 2262 | UINT64_C(13668565606557810688), // PVFMINUPrvml |
| 2263 | UINT64_C(13668565606557810688), // PVFMINUPrvml_v |
| 2264 | UINT64_C(13659417669814714368), // PVFMINUPvv |
| 2265 | UINT64_C(13659417669814714368), // PVFMINUPvvL |
| 2266 | UINT64_C(13659417669814714368), // PVFMINUPvvL_v |
| 2267 | UINT64_C(13659417669814714368), // PVFMINUPvv_v |
| 2268 | UINT64_C(13659417669814714368), // PVFMINUPvvl |
| 2269 | UINT64_C(13659417669814714368), // PVFMINUPvvl_v |
| 2270 | UINT64_C(13659417669814714368), // PVFMINUPvvm |
| 2271 | UINT64_C(13659417669814714368), // PVFMINUPvvmL |
| 2272 | UINT64_C(13659417669814714368), // PVFMINUPvvmL_v |
| 2273 | UINT64_C(13659417669814714368), // PVFMINUPvvm_v |
| 2274 | UINT64_C(13659417669814714368), // PVFMINUPvvml |
| 2275 | UINT64_C(13659417669814714368), // PVFMINUPvvml_v |
| 2276 | UINT64_C(13686439267578937344), // PVFMINiv |
| 2277 | UINT64_C(13686439267578937344), // PVFMINivL |
| 2278 | UINT64_C(13686439267578937344), // PVFMINivL_v |
| 2279 | UINT64_C(13686439267578937344), // PVFMINiv_v |
| 2280 | UINT64_C(13686439267578937344), // PVFMINivl |
| 2281 | UINT64_C(13686439267578937344), // PVFMINivl_v |
| 2282 | UINT64_C(13686439267578937344), // PVFMINivm |
| 2283 | UINT64_C(13686439267578937344), // PVFMINivmL |
| 2284 | UINT64_C(13686439267578937344), // PVFMINivmL_v |
| 2285 | UINT64_C(13686439267578937344), // PVFMINivm_v |
| 2286 | UINT64_C(13686439267578937344), // PVFMINivml |
| 2287 | UINT64_C(13686439267578937344), // PVFMINivml_v |
| 2288 | UINT64_C(13686580005067292672), // PVFMINrv |
| 2289 | UINT64_C(13686580005067292672), // PVFMINrvL |
| 2290 | UINT64_C(13686580005067292672), // PVFMINrvL_v |
| 2291 | UINT64_C(13686580005067292672), // PVFMINrv_v |
| 2292 | UINT64_C(13686580005067292672), // PVFMINrvl |
| 2293 | UINT64_C(13686580005067292672), // PVFMINrvl_v |
| 2294 | UINT64_C(13686580005067292672), // PVFMINrvm |
| 2295 | UINT64_C(13686580005067292672), // PVFMINrvmL |
| 2296 | UINT64_C(13686580005067292672), // PVFMINrvmL_v |
| 2297 | UINT64_C(13686580005067292672), // PVFMINrvm_v |
| 2298 | UINT64_C(13686580005067292672), // PVFMINrvml |
| 2299 | UINT64_C(13686580005067292672), // PVFMINrvml_v |
| 2300 | UINT64_C(13677432068324196352), // PVFMINvv |
| 2301 | UINT64_C(13677432068324196352), // PVFMINvvL |
| 2302 | UINT64_C(13677432068324196352), // PVFMINvvL_v |
| 2303 | UINT64_C(13677432068324196352), // PVFMINvv_v |
| 2304 | UINT64_C(13677432068324196352), // PVFMINvvl |
| 2305 | UINT64_C(13677432068324196352), // PVFMINvvl_v |
| 2306 | UINT64_C(13677432068324196352), // PVFMINvvm |
| 2307 | UINT64_C(13677432068324196352), // PVFMINvvmL |
| 2308 | UINT64_C(13677432068324196352), // PVFMINvvmL_v |
| 2309 | UINT64_C(13677432068324196352), // PVFMINvvm_v |
| 2310 | UINT64_C(13677432068324196352), // PVFMINvvml |
| 2311 | UINT64_C(13677432068324196352), // PVFMINvvml_v |
| 2312 | UINT64_C(13132496513413349376), // PVFMKSLOa |
| 2313 | UINT64_C(13132496513413349376), // PVFMKSLOaL |
| 2314 | UINT64_C(13132496513413349376), // PVFMKSLOal |
| 2315 | UINT64_C(13132496513413349376), // PVFMKSLOam |
| 2316 | UINT64_C(13132496513413349376), // PVFMKSLOamL |
| 2317 | UINT64_C(13132496513413349376), // PVFMKSLOaml |
| 2318 | UINT64_C(13132496513412366336), // PVFMKSLOna |
| 2319 | UINT64_C(13132496513412366336), // PVFMKSLOnaL |
| 2320 | UINT64_C(13132496513412366336), // PVFMKSLOnal |
| 2321 | UINT64_C(13132496513412366336), // PVFMKSLOnam |
| 2322 | UINT64_C(13132496513412366336), // PVFMKSLOnamL |
| 2323 | UINT64_C(13132496513412366336), // PVFMKSLOnaml |
| 2324 | UINT64_C(13132496513412366336), // PVFMKSLOv |
| 2325 | UINT64_C(13132496513412366336), // PVFMKSLOvL |
| 2326 | UINT64_C(13132496513412366336), // PVFMKSLOvl |
| 2327 | UINT64_C(13132496513412366336), // PVFMKSLOvm |
| 2328 | UINT64_C(13132496513412366336), // PVFMKSLOvmL |
| 2329 | UINT64_C(13132496513412366336), // PVFMKSLOvml |
| 2330 | UINT64_C(13150510911922831360), // PVFMKSUPa |
| 2331 | UINT64_C(13150510911922831360), // PVFMKSUPaL |
| 2332 | UINT64_C(13150510911922831360), // PVFMKSUPal |
| 2333 | UINT64_C(13150510911922831360), // PVFMKSUPam |
| 2334 | UINT64_C(13150510911922831360), // PVFMKSUPamL |
| 2335 | UINT64_C(13150510911922831360), // PVFMKSUPaml |
| 2336 | UINT64_C(13150510911921848320), // PVFMKSUPna |
| 2337 | UINT64_C(13150510911921848320), // PVFMKSUPnaL |
| 2338 | UINT64_C(13150510911921848320), // PVFMKSUPnal |
| 2339 | UINT64_C(13150510911921848320), // PVFMKSUPnam |
| 2340 | UINT64_C(13150510911921848320), // PVFMKSUPnamL |
| 2341 | UINT64_C(13150510911921848320), // PVFMKSUPnaml |
| 2342 | UINT64_C(13150510911921848320), // PVFMKSUPv |
| 2343 | UINT64_C(13150510911921848320), // PVFMKSUPvL |
| 2344 | UINT64_C(13150510911921848320), // PVFMKSUPvl |
| 2345 | UINT64_C(13150510911921848320), // PVFMKSUPvm |
| 2346 | UINT64_C(13150510911921848320), // PVFMKSUPvmL |
| 2347 | UINT64_C(13150510911921848320), // PVFMKSUPvml |
| 2348 | UINT64_C(13042424520865939456), // PVFMKWLOa |
| 2349 | UINT64_C(13042424520865939456), // PVFMKWLOaL |
| 2350 | UINT64_C(13042424520865939456), // PVFMKWLOal |
| 2351 | UINT64_C(13042424520865939456), // PVFMKWLOam |
| 2352 | UINT64_C(13042424520865939456), // PVFMKWLOamL |
| 2353 | UINT64_C(13042424520865939456), // PVFMKWLOaml |
| 2354 | UINT64_C(13042424520864956416), // PVFMKWLOna |
| 2355 | UINT64_C(13042424520864956416), // PVFMKWLOnaL |
| 2356 | UINT64_C(13042424520864956416), // PVFMKWLOnal |
| 2357 | UINT64_C(13042424520864956416), // PVFMKWLOnam |
| 2358 | UINT64_C(13042424520864956416), // PVFMKWLOnamL |
| 2359 | UINT64_C(13042424520864956416), // PVFMKWLOnaml |
| 2360 | UINT64_C(13042424520864956416), // PVFMKWLOv |
| 2361 | UINT64_C(13042424520864956416), // PVFMKWLOvL |
| 2362 | UINT64_C(13042424520864956416), // PVFMKWLOvl |
| 2363 | UINT64_C(13042424520864956416), // PVFMKWLOvm |
| 2364 | UINT64_C(13042424520864956416), // PVFMKWLOvmL |
| 2365 | UINT64_C(13042424520864956416), // PVFMKWLOvml |
| 2366 | UINT64_C(13078453317884903424), // PVFMKWUPa |
| 2367 | UINT64_C(13078453317884903424), // PVFMKWUPaL |
| 2368 | UINT64_C(13078453317884903424), // PVFMKWUPal |
| 2369 | UINT64_C(13078453317884903424), // PVFMKWUPam |
| 2370 | UINT64_C(13078453317884903424), // PVFMKWUPamL |
| 2371 | UINT64_C(13078453317884903424), // PVFMKWUPaml |
| 2372 | UINT64_C(13078453317883920384), // PVFMKWUPna |
| 2373 | UINT64_C(13078453317883920384), // PVFMKWUPnaL |
| 2374 | UINT64_C(13078453317883920384), // PVFMKWUPnal |
| 2375 | UINT64_C(13078453317883920384), // PVFMKWUPnam |
| 2376 | UINT64_C(13078453317883920384), // PVFMKWUPnamL |
| 2377 | UINT64_C(13078453317883920384), // PVFMKWUPnaml |
| 2378 | UINT64_C(13078453317883920384), // PVFMKWUPv |
| 2379 | UINT64_C(13078453317883920384), // PVFMKWUPvL |
| 2380 | UINT64_C(13078453317883920384), // PVFMKWUPvl |
| 2381 | UINT64_C(13078453317883920384), // PVFMKWUPvm |
| 2382 | UINT64_C(13078453317883920384), // PVFMKWUPvmL |
| 2383 | UINT64_C(13078453317883920384), // PVFMKWUPvml |
| 2384 | UINT64_C(17464959354942783488), // PVFMSBLOivv |
| 2385 | UINT64_C(17464959354942783488), // PVFMSBLOivvL |
| 2386 | UINT64_C(17464959354942783488), // PVFMSBLOivvL_v |
| 2387 | UINT64_C(17464959354942783488), // PVFMSBLOivv_v |
| 2388 | UINT64_C(17464959354942783488), // PVFMSBLOivvl |
| 2389 | UINT64_C(17464959354942783488), // PVFMSBLOivvl_v |
| 2390 | UINT64_C(17464959354942783488), // PVFMSBLOivvm |
| 2391 | UINT64_C(17464959354942783488), // PVFMSBLOivvmL |
| 2392 | UINT64_C(17464959354942783488), // PVFMSBLOivvmL_v |
| 2393 | UINT64_C(17464959354942783488), // PVFMSBLOivvm_v |
| 2394 | UINT64_C(17464959354942783488), // PVFMSBLOivvml |
| 2395 | UINT64_C(17464959354942783488), // PVFMSBLOivvml_v |
| 2396 | UINT64_C(17465100092431138816), // PVFMSBLOrvv |
| 2397 | UINT64_C(17465100092431138816), // PVFMSBLOrvvL |
| 2398 | UINT64_C(17465100092431138816), // PVFMSBLOrvvL_v |
| 2399 | UINT64_C(17465100092431138816), // PVFMSBLOrvv_v |
| 2400 | UINT64_C(17465100092431138816), // PVFMSBLOrvvl |
| 2401 | UINT64_C(17465100092431138816), // PVFMSBLOrvvl_v |
| 2402 | UINT64_C(17465100092431138816), // PVFMSBLOrvvm |
| 2403 | UINT64_C(17465100092431138816), // PVFMSBLOrvvmL |
| 2404 | UINT64_C(17465100092431138816), // PVFMSBLOrvvmL_v |
| 2405 | UINT64_C(17465100092431138816), // PVFMSBLOrvvm_v |
| 2406 | UINT64_C(17465100092431138816), // PVFMSBLOrvvml |
| 2407 | UINT64_C(17465100092431138816), // PVFMSBLOrvvml_v |
| 2408 | UINT64_C(17460455755315412992), // PVFMSBLOviv |
| 2409 | UINT64_C(17460455755315412992), // PVFMSBLOvivL |
| 2410 | UINT64_C(17460455755315412992), // PVFMSBLOvivL_v |
| 2411 | UINT64_C(17460455755315412992), // PVFMSBLOviv_v |
| 2412 | UINT64_C(17460455755315412992), // PVFMSBLOvivl |
| 2413 | UINT64_C(17460455755315412992), // PVFMSBLOvivl_v |
| 2414 | UINT64_C(17460455755315412992), // PVFMSBLOvivm |
| 2415 | UINT64_C(17460455755315412992), // PVFMSBLOvivmL |
| 2416 | UINT64_C(17460455755315412992), // PVFMSBLOvivmL_v |
| 2417 | UINT64_C(17460455755315412992), // PVFMSBLOvivm_v |
| 2418 | UINT64_C(17460455755315412992), // PVFMSBLOvivml |
| 2419 | UINT64_C(17460455755315412992), // PVFMSBLOvivml_v |
| 2420 | UINT64_C(17460596492803768320), // PVFMSBLOvrv |
| 2421 | UINT64_C(17460596492803768320), // PVFMSBLOvrvL |
| 2422 | UINT64_C(17460596492803768320), // PVFMSBLOvrvL_v |
| 2423 | UINT64_C(17460596492803768320), // PVFMSBLOvrv_v |
| 2424 | UINT64_C(17460596492803768320), // PVFMSBLOvrvl |
| 2425 | UINT64_C(17460596492803768320), // PVFMSBLOvrvl_v |
| 2426 | UINT64_C(17460596492803768320), // PVFMSBLOvrvm |
| 2427 | UINT64_C(17460596492803768320), // PVFMSBLOvrvmL |
| 2428 | UINT64_C(17460596492803768320), // PVFMSBLOvrvmL_v |
| 2429 | UINT64_C(17460596492803768320), // PVFMSBLOvrvm_v |
| 2430 | UINT64_C(17460596492803768320), // PVFMSBLOvrvml |
| 2431 | UINT64_C(17460596492803768320), // PVFMSBLOvrvml_v |
| 2432 | UINT64_C(17455952155688042496), // PVFMSBLOvvv |
| 2433 | UINT64_C(17455952155688042496), // PVFMSBLOvvvL |
| 2434 | UINT64_C(17455952155688042496), // PVFMSBLOvvvL_v |
| 2435 | UINT64_C(17455952155688042496), // PVFMSBLOvvv_v |
| 2436 | UINT64_C(17455952155688042496), // PVFMSBLOvvvl |
| 2437 | UINT64_C(17455952155688042496), // PVFMSBLOvvvl_v |
| 2438 | UINT64_C(17455952155688042496), // PVFMSBLOvvvm |
| 2439 | UINT64_C(17455952155688042496), // PVFMSBLOvvvmL |
| 2440 | UINT64_C(17455952155688042496), // PVFMSBLOvvvmL_v |
| 2441 | UINT64_C(17455952155688042496), // PVFMSBLOvvvm_v |
| 2442 | UINT64_C(17455952155688042496), // PVFMSBLOvvvml |
| 2443 | UINT64_C(17455952155688042496), // PVFMSBLOvvvml_v |
| 2444 | UINT64_C(17482973753452265472), // PVFMSBUPivv |
| 2445 | UINT64_C(17482973753452265472), // PVFMSBUPivvL |
| 2446 | UINT64_C(17482973753452265472), // PVFMSBUPivvL_v |
| 2447 | UINT64_C(17482973753452265472), // PVFMSBUPivv_v |
| 2448 | UINT64_C(17482973753452265472), // PVFMSBUPivvl |
| 2449 | UINT64_C(17482973753452265472), // PVFMSBUPivvl_v |
| 2450 | UINT64_C(17482973753452265472), // PVFMSBUPivvm |
| 2451 | UINT64_C(17482973753452265472), // PVFMSBUPivvmL |
| 2452 | UINT64_C(17482973753452265472), // PVFMSBUPivvmL_v |
| 2453 | UINT64_C(17482973753452265472), // PVFMSBUPivvm_v |
| 2454 | UINT64_C(17482973753452265472), // PVFMSBUPivvml |
| 2455 | UINT64_C(17482973753452265472), // PVFMSBUPivvml_v |
| 2456 | UINT64_C(17483114490940620800), // PVFMSBUPrvv |
| 2457 | UINT64_C(17483114490940620800), // PVFMSBUPrvvL |
| 2458 | UINT64_C(17483114490940620800), // PVFMSBUPrvvL_v |
| 2459 | UINT64_C(17483114490940620800), // PVFMSBUPrvv_v |
| 2460 | UINT64_C(17483114490940620800), // PVFMSBUPrvvl |
| 2461 | UINT64_C(17483114490940620800), // PVFMSBUPrvvl_v |
| 2462 | UINT64_C(17483114490940620800), // PVFMSBUPrvvm |
| 2463 | UINT64_C(17483114490940620800), // PVFMSBUPrvvmL |
| 2464 | UINT64_C(17483114490940620800), // PVFMSBUPrvvmL_v |
| 2465 | UINT64_C(17483114490940620800), // PVFMSBUPrvvm_v |
| 2466 | UINT64_C(17483114490940620800), // PVFMSBUPrvvml |
| 2467 | UINT64_C(17483114490940620800), // PVFMSBUPrvvml_v |
| 2468 | UINT64_C(17478470153824894976), // PVFMSBUPviv |
| 2469 | UINT64_C(17478470153824894976), // PVFMSBUPvivL |
| 2470 | UINT64_C(17478470153824894976), // PVFMSBUPvivL_v |
| 2471 | UINT64_C(17478470153824894976), // PVFMSBUPviv_v |
| 2472 | UINT64_C(17478470153824894976), // PVFMSBUPvivl |
| 2473 | UINT64_C(17478470153824894976), // PVFMSBUPvivl_v |
| 2474 | UINT64_C(17478470153824894976), // PVFMSBUPvivm |
| 2475 | UINT64_C(17478470153824894976), // PVFMSBUPvivmL |
| 2476 | UINT64_C(17478470153824894976), // PVFMSBUPvivmL_v |
| 2477 | UINT64_C(17478470153824894976), // PVFMSBUPvivm_v |
| 2478 | UINT64_C(17478470153824894976), // PVFMSBUPvivml |
| 2479 | UINT64_C(17478470153824894976), // PVFMSBUPvivml_v |
| 2480 | UINT64_C(17478610891313250304), // PVFMSBUPvrv |
| 2481 | UINT64_C(17478610891313250304), // PVFMSBUPvrvL |
| 2482 | UINT64_C(17478610891313250304), // PVFMSBUPvrvL_v |
| 2483 | UINT64_C(17478610891313250304), // PVFMSBUPvrv_v |
| 2484 | UINT64_C(17478610891313250304), // PVFMSBUPvrvl |
| 2485 | UINT64_C(17478610891313250304), // PVFMSBUPvrvl_v |
| 2486 | UINT64_C(17478610891313250304), // PVFMSBUPvrvm |
| 2487 | UINT64_C(17478610891313250304), // PVFMSBUPvrvmL |
| 2488 | UINT64_C(17478610891313250304), // PVFMSBUPvrvmL_v |
| 2489 | UINT64_C(17478610891313250304), // PVFMSBUPvrvm_v |
| 2490 | UINT64_C(17478610891313250304), // PVFMSBUPvrvml |
| 2491 | UINT64_C(17478610891313250304), // PVFMSBUPvrvml_v |
| 2492 | UINT64_C(17473966554197524480), // PVFMSBUPvvv |
| 2493 | UINT64_C(17473966554197524480), // PVFMSBUPvvvL |
| 2494 | UINT64_C(17473966554197524480), // PVFMSBUPvvvL_v |
| 2495 | UINT64_C(17473966554197524480), // PVFMSBUPvvv_v |
| 2496 | UINT64_C(17473966554197524480), // PVFMSBUPvvvl |
| 2497 | UINT64_C(17473966554197524480), // PVFMSBUPvvvl_v |
| 2498 | UINT64_C(17473966554197524480), // PVFMSBUPvvvm |
| 2499 | UINT64_C(17473966554197524480), // PVFMSBUPvvvmL |
| 2500 | UINT64_C(17473966554197524480), // PVFMSBUPvvvmL_v |
| 2501 | UINT64_C(17473966554197524480), // PVFMSBUPvvvm_v |
| 2502 | UINT64_C(17473966554197524480), // PVFMSBUPvvvml |
| 2503 | UINT64_C(17473966554197524480), // PVFMSBUPvvvml_v |
| 2504 | UINT64_C(17500988151961747456), // PVFMSBivv |
| 2505 | UINT64_C(17500988151961747456), // PVFMSBivvL |
| 2506 | UINT64_C(17500988151961747456), // PVFMSBivvL_v |
| 2507 | UINT64_C(17500988151961747456), // PVFMSBivv_v |
| 2508 | UINT64_C(17500988151961747456), // PVFMSBivvl |
| 2509 | UINT64_C(17500988151961747456), // PVFMSBivvl_v |
| 2510 | UINT64_C(17500988151961747456), // PVFMSBivvm |
| 2511 | UINT64_C(17500988151961747456), // PVFMSBivvmL |
| 2512 | UINT64_C(17500988151961747456), // PVFMSBivvmL_v |
| 2513 | UINT64_C(17500988151961747456), // PVFMSBivvm_v |
| 2514 | UINT64_C(17500988151961747456), // PVFMSBivvml |
| 2515 | UINT64_C(17500988151961747456), // PVFMSBivvml_v |
| 2516 | UINT64_C(17501128889450102784), // PVFMSBrvv |
| 2517 | UINT64_C(17501128889450102784), // PVFMSBrvvL |
| 2518 | UINT64_C(17501128889450102784), // PVFMSBrvvL_v |
| 2519 | UINT64_C(17501128889450102784), // PVFMSBrvv_v |
| 2520 | UINT64_C(17501128889450102784), // PVFMSBrvvl |
| 2521 | UINT64_C(17501128889450102784), // PVFMSBrvvl_v |
| 2522 | UINT64_C(17501128889450102784), // PVFMSBrvvm |
| 2523 | UINT64_C(17501128889450102784), // PVFMSBrvvmL |
| 2524 | UINT64_C(17501128889450102784), // PVFMSBrvvmL_v |
| 2525 | UINT64_C(17501128889450102784), // PVFMSBrvvm_v |
| 2526 | UINT64_C(17501128889450102784), // PVFMSBrvvml |
| 2527 | UINT64_C(17501128889450102784), // PVFMSBrvvml_v |
| 2528 | UINT64_C(17496484552334376960), // PVFMSBviv |
| 2529 | UINT64_C(17496484552334376960), // PVFMSBvivL |
| 2530 | UINT64_C(17496484552334376960), // PVFMSBvivL_v |
| 2531 | UINT64_C(17496484552334376960), // PVFMSBviv_v |
| 2532 | UINT64_C(17496484552334376960), // PVFMSBvivl |
| 2533 | UINT64_C(17496484552334376960), // PVFMSBvivl_v |
| 2534 | UINT64_C(17496484552334376960), // PVFMSBvivm |
| 2535 | UINT64_C(17496484552334376960), // PVFMSBvivmL |
| 2536 | UINT64_C(17496484552334376960), // PVFMSBvivmL_v |
| 2537 | UINT64_C(17496484552334376960), // PVFMSBvivm_v |
| 2538 | UINT64_C(17496484552334376960), // PVFMSBvivml |
| 2539 | UINT64_C(17496484552334376960), // PVFMSBvivml_v |
| 2540 | UINT64_C(17496625289822732288), // PVFMSBvrv |
| 2541 | UINT64_C(17496625289822732288), // PVFMSBvrvL |
| 2542 | UINT64_C(17496625289822732288), // PVFMSBvrvL_v |
| 2543 | UINT64_C(17496625289822732288), // PVFMSBvrv_v |
| 2544 | UINT64_C(17496625289822732288), // PVFMSBvrvl |
| 2545 | UINT64_C(17496625289822732288), // PVFMSBvrvl_v |
| 2546 | UINT64_C(17496625289822732288), // PVFMSBvrvm |
| 2547 | UINT64_C(17496625289822732288), // PVFMSBvrvmL |
| 2548 | UINT64_C(17496625289822732288), // PVFMSBvrvmL_v |
| 2549 | UINT64_C(17496625289822732288), // PVFMSBvrvm_v |
| 2550 | UINT64_C(17496625289822732288), // PVFMSBvrvml |
| 2551 | UINT64_C(17496625289822732288), // PVFMSBvrvml_v |
| 2552 | UINT64_C(17491980952707006464), // PVFMSBvvv |
| 2553 | UINT64_C(17491980952707006464), // PVFMSBvvvL |
| 2554 | UINT64_C(17491980952707006464), // PVFMSBvvvL_v |
| 2555 | UINT64_C(17491980952707006464), // PVFMSBvvv_v |
| 2556 | UINT64_C(17491980952707006464), // PVFMSBvvvl |
| 2557 | UINT64_C(17491980952707006464), // PVFMSBvvvl_v |
| 2558 | UINT64_C(17491980952707006464), // PVFMSBvvvm |
| 2559 | UINT64_C(17491980952707006464), // PVFMSBvvvmL |
| 2560 | UINT64_C(17491980952707006464), // PVFMSBvvvmL_v |
| 2561 | UINT64_C(17491980952707006464), // PVFMSBvvvm_v |
| 2562 | UINT64_C(17491980952707006464), // PVFMSBvvvml |
| 2563 | UINT64_C(17491980952707006464), // PVFMSBvvvml_v |
| 2564 | UINT64_C(14798828375539449856), // PVFMULLOiv |
| 2565 | UINT64_C(14798828375539449856), // PVFMULLOivL |
| 2566 | UINT64_C(14798828375539449856), // PVFMULLOivL_v |
| 2567 | UINT64_C(14798828375539449856), // PVFMULLOiv_v |
| 2568 | UINT64_C(14798828375539449856), // PVFMULLOivl |
| 2569 | UINT64_C(14798828375539449856), // PVFMULLOivl_v |
| 2570 | UINT64_C(14798828375539449856), // PVFMULLOivm |
| 2571 | UINT64_C(14798828375539449856), // PVFMULLOivmL |
| 2572 | UINT64_C(14798828375539449856), // PVFMULLOivmL_v |
| 2573 | UINT64_C(14798828375539449856), // PVFMULLOivm_v |
| 2574 | UINT64_C(14798828375539449856), // PVFMULLOivml |
| 2575 | UINT64_C(14798828375539449856), // PVFMULLOivml_v |
| 2576 | UINT64_C(14798969113027805184), // PVFMULLOrv |
| 2577 | UINT64_C(14798969113027805184), // PVFMULLOrvL |
| 2578 | UINT64_C(14798969113027805184), // PVFMULLOrvL_v |
| 2579 | UINT64_C(14798969113027805184), // PVFMULLOrv_v |
| 2580 | UINT64_C(14798969113027805184), // PVFMULLOrvl |
| 2581 | UINT64_C(14798969113027805184), // PVFMULLOrvl_v |
| 2582 | UINT64_C(14798969113027805184), // PVFMULLOrvm |
| 2583 | UINT64_C(14798969113027805184), // PVFMULLOrvmL |
| 2584 | UINT64_C(14798969113027805184), // PVFMULLOrvmL_v |
| 2585 | UINT64_C(14798969113027805184), // PVFMULLOrvm_v |
| 2586 | UINT64_C(14798969113027805184), // PVFMULLOrvml |
| 2587 | UINT64_C(14798969113027805184), // PVFMULLOrvml_v |
| 2588 | UINT64_C(14789821176284708864), // PVFMULLOvv |
| 2589 | UINT64_C(14789821176284708864), // PVFMULLOvvL |
| 2590 | UINT64_C(14789821176284708864), // PVFMULLOvvL_v |
| 2591 | UINT64_C(14789821176284708864), // PVFMULLOvv_v |
| 2592 | UINT64_C(14789821176284708864), // PVFMULLOvvl |
| 2593 | UINT64_C(14789821176284708864), // PVFMULLOvvl_v |
| 2594 | UINT64_C(14789821176284708864), // PVFMULLOvvm |
| 2595 | UINT64_C(14789821176284708864), // PVFMULLOvvmL |
| 2596 | UINT64_C(14789821176284708864), // PVFMULLOvvmL_v |
| 2597 | UINT64_C(14789821176284708864), // PVFMULLOvvm_v |
| 2598 | UINT64_C(14789821176284708864), // PVFMULLOvvml |
| 2599 | UINT64_C(14789821176284708864), // PVFMULLOvvml_v |
| 2600 | UINT64_C(14816842774048931840), // PVFMULUPiv |
| 2601 | UINT64_C(14816842774048931840), // PVFMULUPivL |
| 2602 | UINT64_C(14816842774048931840), // PVFMULUPivL_v |
| 2603 | UINT64_C(14816842774048931840), // PVFMULUPiv_v |
| 2604 | UINT64_C(14816842774048931840), // PVFMULUPivl |
| 2605 | UINT64_C(14816842774048931840), // PVFMULUPivl_v |
| 2606 | UINT64_C(14816842774048931840), // PVFMULUPivm |
| 2607 | UINT64_C(14816842774048931840), // PVFMULUPivmL |
| 2608 | UINT64_C(14816842774048931840), // PVFMULUPivmL_v |
| 2609 | UINT64_C(14816842774048931840), // PVFMULUPivm_v |
| 2610 | UINT64_C(14816842774048931840), // PVFMULUPivml |
| 2611 | UINT64_C(14816842774048931840), // PVFMULUPivml_v |
| 2612 | UINT64_C(14816983511537287168), // PVFMULUPrv |
| 2613 | UINT64_C(14816983511537287168), // PVFMULUPrvL |
| 2614 | UINT64_C(14816983511537287168), // PVFMULUPrvL_v |
| 2615 | UINT64_C(14816983511537287168), // PVFMULUPrv_v |
| 2616 | UINT64_C(14816983511537287168), // PVFMULUPrvl |
| 2617 | UINT64_C(14816983511537287168), // PVFMULUPrvl_v |
| 2618 | UINT64_C(14816983511537287168), // PVFMULUPrvm |
| 2619 | UINT64_C(14816983511537287168), // PVFMULUPrvmL |
| 2620 | UINT64_C(14816983511537287168), // PVFMULUPrvmL_v |
| 2621 | UINT64_C(14816983511537287168), // PVFMULUPrvm_v |
| 2622 | UINT64_C(14816983511537287168), // PVFMULUPrvml |
| 2623 | UINT64_C(14816983511537287168), // PVFMULUPrvml_v |
| 2624 | UINT64_C(14807835574794190848), // PVFMULUPvv |
| 2625 | UINT64_C(14807835574794190848), // PVFMULUPvvL |
| 2626 | UINT64_C(14807835574794190848), // PVFMULUPvvL_v |
| 2627 | UINT64_C(14807835574794190848), // PVFMULUPvv_v |
| 2628 | UINT64_C(14807835574794190848), // PVFMULUPvvl |
| 2629 | UINT64_C(14807835574794190848), // PVFMULUPvvl_v |
| 2630 | UINT64_C(14807835574794190848), // PVFMULUPvvm |
| 2631 | UINT64_C(14807835574794190848), // PVFMULUPvvmL |
| 2632 | UINT64_C(14807835574794190848), // PVFMULUPvvmL_v |
| 2633 | UINT64_C(14807835574794190848), // PVFMULUPvvm_v |
| 2634 | UINT64_C(14807835574794190848), // PVFMULUPvvml |
| 2635 | UINT64_C(14807835574794190848), // PVFMULUPvvml_v |
| 2636 | UINT64_C(14834857172558413824), // PVFMULiv |
| 2637 | UINT64_C(14834857172558413824), // PVFMULivL |
| 2638 | UINT64_C(14834857172558413824), // PVFMULivL_v |
| 2639 | UINT64_C(14834857172558413824), // PVFMULiv_v |
| 2640 | UINT64_C(14834857172558413824), // PVFMULivl |
| 2641 | UINT64_C(14834857172558413824), // PVFMULivl_v |
| 2642 | UINT64_C(14834857172558413824), // PVFMULivm |
| 2643 | UINT64_C(14834857172558413824), // PVFMULivmL |
| 2644 | UINT64_C(14834857172558413824), // PVFMULivmL_v |
| 2645 | UINT64_C(14834857172558413824), // PVFMULivm_v |
| 2646 | UINT64_C(14834857172558413824), // PVFMULivml |
| 2647 | UINT64_C(14834857172558413824), // PVFMULivml_v |
| 2648 | UINT64_C(14834997910046769152), // PVFMULrv |
| 2649 | UINT64_C(14834997910046769152), // PVFMULrvL |
| 2650 | UINT64_C(14834997910046769152), // PVFMULrvL_v |
| 2651 | UINT64_C(14834997910046769152), // PVFMULrv_v |
| 2652 | UINT64_C(14834997910046769152), // PVFMULrvl |
| 2653 | UINT64_C(14834997910046769152), // PVFMULrvl_v |
| 2654 | UINT64_C(14834997910046769152), // PVFMULrvm |
| 2655 | UINT64_C(14834997910046769152), // PVFMULrvmL |
| 2656 | UINT64_C(14834997910046769152), // PVFMULrvmL_v |
| 2657 | UINT64_C(14834997910046769152), // PVFMULrvm_v |
| 2658 | UINT64_C(14834997910046769152), // PVFMULrvml |
| 2659 | UINT64_C(14834997910046769152), // PVFMULrvml_v |
| 2660 | UINT64_C(14825849973303672832), // PVFMULvv |
| 2661 | UINT64_C(14825849973303672832), // PVFMULvvL |
| 2662 | UINT64_C(14825849973303672832), // PVFMULvvL_v |
| 2663 | UINT64_C(14825849973303672832), // PVFMULvv_v |
| 2664 | UINT64_C(14825849973303672832), // PVFMULvvl |
| 2665 | UINT64_C(14825849973303672832), // PVFMULvvl_v |
| 2666 | UINT64_C(14825849973303672832), // PVFMULvvm |
| 2667 | UINT64_C(14825849973303672832), // PVFMULvvmL |
| 2668 | UINT64_C(14825849973303672832), // PVFMULvvmL_v |
| 2669 | UINT64_C(14825849973303672832), // PVFMULvvm_v |
| 2670 | UINT64_C(14825849973303672832), // PVFMULvvml |
| 2671 | UINT64_C(14825849973303672832), // PVFMULvvml_v |
| 2672 | UINT64_C(16384095444373864448), // PVFNMADLOivv |
| 2673 | UINT64_C(16384095444373864448), // PVFNMADLOivvL |
| 2674 | UINT64_C(16384095444373864448), // PVFNMADLOivvL_v |
| 2675 | UINT64_C(16384095444373864448), // PVFNMADLOivv_v |
| 2676 | UINT64_C(16384095444373864448), // PVFNMADLOivvl |
| 2677 | UINT64_C(16384095444373864448), // PVFNMADLOivvl_v |
| 2678 | UINT64_C(16384095444373864448), // PVFNMADLOivvm |
| 2679 | UINT64_C(16384095444373864448), // PVFNMADLOivvmL |
| 2680 | UINT64_C(16384095444373864448), // PVFNMADLOivvmL_v |
| 2681 | UINT64_C(16384095444373864448), // PVFNMADLOivvm_v |
| 2682 | UINT64_C(16384095444373864448), // PVFNMADLOivvml |
| 2683 | UINT64_C(16384095444373864448), // PVFNMADLOivvml_v |
| 2684 | UINT64_C(16384236181862219776), // PVFNMADLOrvv |
| 2685 | UINT64_C(16384236181862219776), // PVFNMADLOrvvL |
| 2686 | UINT64_C(16384236181862219776), // PVFNMADLOrvvL_v |
| 2687 | UINT64_C(16384236181862219776), // PVFNMADLOrvv_v |
| 2688 | UINT64_C(16384236181862219776), // PVFNMADLOrvvl |
| 2689 | UINT64_C(16384236181862219776), // PVFNMADLOrvvl_v |
| 2690 | UINT64_C(16384236181862219776), // PVFNMADLOrvvm |
| 2691 | UINT64_C(16384236181862219776), // PVFNMADLOrvvmL |
| 2692 | UINT64_C(16384236181862219776), // PVFNMADLOrvvmL_v |
| 2693 | UINT64_C(16384236181862219776), // PVFNMADLOrvvm_v |
| 2694 | UINT64_C(16384236181862219776), // PVFNMADLOrvvml |
| 2695 | UINT64_C(16384236181862219776), // PVFNMADLOrvvml_v |
| 2696 | UINT64_C(16379591844746493952), // PVFNMADLOviv |
| 2697 | UINT64_C(16379591844746493952), // PVFNMADLOvivL |
| 2698 | UINT64_C(16379591844746493952), // PVFNMADLOvivL_v |
| 2699 | UINT64_C(16379591844746493952), // PVFNMADLOviv_v |
| 2700 | UINT64_C(16379591844746493952), // PVFNMADLOvivl |
| 2701 | UINT64_C(16379591844746493952), // PVFNMADLOvivl_v |
| 2702 | UINT64_C(16379591844746493952), // PVFNMADLOvivm |
| 2703 | UINT64_C(16379591844746493952), // PVFNMADLOvivmL |
| 2704 | UINT64_C(16379591844746493952), // PVFNMADLOvivmL_v |
| 2705 | UINT64_C(16379591844746493952), // PVFNMADLOvivm_v |
| 2706 | UINT64_C(16379591844746493952), // PVFNMADLOvivml |
| 2707 | UINT64_C(16379591844746493952), // PVFNMADLOvivml_v |
| 2708 | UINT64_C(16379732582234849280), // PVFNMADLOvrv |
| 2709 | UINT64_C(16379732582234849280), // PVFNMADLOvrvL |
| 2710 | UINT64_C(16379732582234849280), // PVFNMADLOvrvL_v |
| 2711 | UINT64_C(16379732582234849280), // PVFNMADLOvrv_v |
| 2712 | UINT64_C(16379732582234849280), // PVFNMADLOvrvl |
| 2713 | UINT64_C(16379732582234849280), // PVFNMADLOvrvl_v |
| 2714 | UINT64_C(16379732582234849280), // PVFNMADLOvrvm |
| 2715 | UINT64_C(16379732582234849280), // PVFNMADLOvrvmL |
| 2716 | UINT64_C(16379732582234849280), // PVFNMADLOvrvmL_v |
| 2717 | UINT64_C(16379732582234849280), // PVFNMADLOvrvm_v |
| 2718 | UINT64_C(16379732582234849280), // PVFNMADLOvrvml |
| 2719 | UINT64_C(16379732582234849280), // PVFNMADLOvrvml_v |
| 2720 | UINT64_C(16375088245119123456), // PVFNMADLOvvv |
| 2721 | UINT64_C(16375088245119123456), // PVFNMADLOvvvL |
| 2722 | UINT64_C(16375088245119123456), // PVFNMADLOvvvL_v |
| 2723 | UINT64_C(16375088245119123456), // PVFNMADLOvvv_v |
| 2724 | UINT64_C(16375088245119123456), // PVFNMADLOvvvl |
| 2725 | UINT64_C(16375088245119123456), // PVFNMADLOvvvl_v |
| 2726 | UINT64_C(16375088245119123456), // PVFNMADLOvvvm |
| 2727 | UINT64_C(16375088245119123456), // PVFNMADLOvvvmL |
| 2728 | UINT64_C(16375088245119123456), // PVFNMADLOvvvmL_v |
| 2729 | UINT64_C(16375088245119123456), // PVFNMADLOvvvm_v |
| 2730 | UINT64_C(16375088245119123456), // PVFNMADLOvvvml |
| 2731 | UINT64_C(16375088245119123456), // PVFNMADLOvvvml_v |
| 2732 | UINT64_C(16402109842883346432), // PVFNMADUPivv |
| 2733 | UINT64_C(16402109842883346432), // PVFNMADUPivvL |
| 2734 | UINT64_C(16402109842883346432), // PVFNMADUPivvL_v |
| 2735 | UINT64_C(16402109842883346432), // PVFNMADUPivv_v |
| 2736 | UINT64_C(16402109842883346432), // PVFNMADUPivvl |
| 2737 | UINT64_C(16402109842883346432), // PVFNMADUPivvl_v |
| 2738 | UINT64_C(16402109842883346432), // PVFNMADUPivvm |
| 2739 | UINT64_C(16402109842883346432), // PVFNMADUPivvmL |
| 2740 | UINT64_C(16402109842883346432), // PVFNMADUPivvmL_v |
| 2741 | UINT64_C(16402109842883346432), // PVFNMADUPivvm_v |
| 2742 | UINT64_C(16402109842883346432), // PVFNMADUPivvml |
| 2743 | UINT64_C(16402109842883346432), // PVFNMADUPivvml_v |
| 2744 | UINT64_C(16402250580371701760), // PVFNMADUPrvv |
| 2745 | UINT64_C(16402250580371701760), // PVFNMADUPrvvL |
| 2746 | UINT64_C(16402250580371701760), // PVFNMADUPrvvL_v |
| 2747 | UINT64_C(16402250580371701760), // PVFNMADUPrvv_v |
| 2748 | UINT64_C(16402250580371701760), // PVFNMADUPrvvl |
| 2749 | UINT64_C(16402250580371701760), // PVFNMADUPrvvl_v |
| 2750 | UINT64_C(16402250580371701760), // PVFNMADUPrvvm |
| 2751 | UINT64_C(16402250580371701760), // PVFNMADUPrvvmL |
| 2752 | UINT64_C(16402250580371701760), // PVFNMADUPrvvmL_v |
| 2753 | UINT64_C(16402250580371701760), // PVFNMADUPrvvm_v |
| 2754 | UINT64_C(16402250580371701760), // PVFNMADUPrvvml |
| 2755 | UINT64_C(16402250580371701760), // PVFNMADUPrvvml_v |
| 2756 | UINT64_C(16397606243255975936), // PVFNMADUPviv |
| 2757 | UINT64_C(16397606243255975936), // PVFNMADUPvivL |
| 2758 | UINT64_C(16397606243255975936), // PVFNMADUPvivL_v |
| 2759 | UINT64_C(16397606243255975936), // PVFNMADUPviv_v |
| 2760 | UINT64_C(16397606243255975936), // PVFNMADUPvivl |
| 2761 | UINT64_C(16397606243255975936), // PVFNMADUPvivl_v |
| 2762 | UINT64_C(16397606243255975936), // PVFNMADUPvivm |
| 2763 | UINT64_C(16397606243255975936), // PVFNMADUPvivmL |
| 2764 | UINT64_C(16397606243255975936), // PVFNMADUPvivmL_v |
| 2765 | UINT64_C(16397606243255975936), // PVFNMADUPvivm_v |
| 2766 | UINT64_C(16397606243255975936), // PVFNMADUPvivml |
| 2767 | UINT64_C(16397606243255975936), // PVFNMADUPvivml_v |
| 2768 | UINT64_C(16397746980744331264), // PVFNMADUPvrv |
| 2769 | UINT64_C(16397746980744331264), // PVFNMADUPvrvL |
| 2770 | UINT64_C(16397746980744331264), // PVFNMADUPvrvL_v |
| 2771 | UINT64_C(16397746980744331264), // PVFNMADUPvrv_v |
| 2772 | UINT64_C(16397746980744331264), // PVFNMADUPvrvl |
| 2773 | UINT64_C(16397746980744331264), // PVFNMADUPvrvl_v |
| 2774 | UINT64_C(16397746980744331264), // PVFNMADUPvrvm |
| 2775 | UINT64_C(16397746980744331264), // PVFNMADUPvrvmL |
| 2776 | UINT64_C(16397746980744331264), // PVFNMADUPvrvmL_v |
| 2777 | UINT64_C(16397746980744331264), // PVFNMADUPvrvm_v |
| 2778 | UINT64_C(16397746980744331264), // PVFNMADUPvrvml |
| 2779 | UINT64_C(16397746980744331264), // PVFNMADUPvrvml_v |
| 2780 | UINT64_C(16393102643628605440), // PVFNMADUPvvv |
| 2781 | UINT64_C(16393102643628605440), // PVFNMADUPvvvL |
| 2782 | UINT64_C(16393102643628605440), // PVFNMADUPvvvL_v |
| 2783 | UINT64_C(16393102643628605440), // PVFNMADUPvvv_v |
| 2784 | UINT64_C(16393102643628605440), // PVFNMADUPvvvl |
| 2785 | UINT64_C(16393102643628605440), // PVFNMADUPvvvl_v |
| 2786 | UINT64_C(16393102643628605440), // PVFNMADUPvvvm |
| 2787 | UINT64_C(16393102643628605440), // PVFNMADUPvvvmL |
| 2788 | UINT64_C(16393102643628605440), // PVFNMADUPvvvmL_v |
| 2789 | UINT64_C(16393102643628605440), // PVFNMADUPvvvm_v |
| 2790 | UINT64_C(16393102643628605440), // PVFNMADUPvvvml |
| 2791 | UINT64_C(16393102643628605440), // PVFNMADUPvvvml_v |
| 2792 | UINT64_C(16420124241392828416), // PVFNMADivv |
| 2793 | UINT64_C(16420124241392828416), // PVFNMADivvL |
| 2794 | UINT64_C(16420124241392828416), // PVFNMADivvL_v |
| 2795 | UINT64_C(16420124241392828416), // PVFNMADivv_v |
| 2796 | UINT64_C(16420124241392828416), // PVFNMADivvl |
| 2797 | UINT64_C(16420124241392828416), // PVFNMADivvl_v |
| 2798 | UINT64_C(16420124241392828416), // PVFNMADivvm |
| 2799 | UINT64_C(16420124241392828416), // PVFNMADivvmL |
| 2800 | UINT64_C(16420124241392828416), // PVFNMADivvmL_v |
| 2801 | UINT64_C(16420124241392828416), // PVFNMADivvm_v |
| 2802 | UINT64_C(16420124241392828416), // PVFNMADivvml |
| 2803 | UINT64_C(16420124241392828416), // PVFNMADivvml_v |
| 2804 | UINT64_C(16420264978881183744), // PVFNMADrvv |
| 2805 | UINT64_C(16420264978881183744), // PVFNMADrvvL |
| 2806 | UINT64_C(16420264978881183744), // PVFNMADrvvL_v |
| 2807 | UINT64_C(16420264978881183744), // PVFNMADrvv_v |
| 2808 | UINT64_C(16420264978881183744), // PVFNMADrvvl |
| 2809 | UINT64_C(16420264978881183744), // PVFNMADrvvl_v |
| 2810 | UINT64_C(16420264978881183744), // PVFNMADrvvm |
| 2811 | UINT64_C(16420264978881183744), // PVFNMADrvvmL |
| 2812 | UINT64_C(16420264978881183744), // PVFNMADrvvmL_v |
| 2813 | UINT64_C(16420264978881183744), // PVFNMADrvvm_v |
| 2814 | UINT64_C(16420264978881183744), // PVFNMADrvvml |
| 2815 | UINT64_C(16420264978881183744), // PVFNMADrvvml_v |
| 2816 | UINT64_C(16415620641765457920), // PVFNMADviv |
| 2817 | UINT64_C(16415620641765457920), // PVFNMADvivL |
| 2818 | UINT64_C(16415620641765457920), // PVFNMADvivL_v |
| 2819 | UINT64_C(16415620641765457920), // PVFNMADviv_v |
| 2820 | UINT64_C(16415620641765457920), // PVFNMADvivl |
| 2821 | UINT64_C(16415620641765457920), // PVFNMADvivl_v |
| 2822 | UINT64_C(16415620641765457920), // PVFNMADvivm |
| 2823 | UINT64_C(16415620641765457920), // PVFNMADvivmL |
| 2824 | UINT64_C(16415620641765457920), // PVFNMADvivmL_v |
| 2825 | UINT64_C(16415620641765457920), // PVFNMADvivm_v |
| 2826 | UINT64_C(16415620641765457920), // PVFNMADvivml |
| 2827 | UINT64_C(16415620641765457920), // PVFNMADvivml_v |
| 2828 | UINT64_C(16415761379253813248), // PVFNMADvrv |
| 2829 | UINT64_C(16415761379253813248), // PVFNMADvrvL |
| 2830 | UINT64_C(16415761379253813248), // PVFNMADvrvL_v |
| 2831 | UINT64_C(16415761379253813248), // PVFNMADvrv_v |
| 2832 | UINT64_C(16415761379253813248), // PVFNMADvrvl |
| 2833 | UINT64_C(16415761379253813248), // PVFNMADvrvl_v |
| 2834 | UINT64_C(16415761379253813248), // PVFNMADvrvm |
| 2835 | UINT64_C(16415761379253813248), // PVFNMADvrvmL |
| 2836 | UINT64_C(16415761379253813248), // PVFNMADvrvmL_v |
| 2837 | UINT64_C(16415761379253813248), // PVFNMADvrvm_v |
| 2838 | UINT64_C(16415761379253813248), // PVFNMADvrvml |
| 2839 | UINT64_C(16415761379253813248), // PVFNMADvrvml_v |
| 2840 | UINT64_C(16411117042138087424), // PVFNMADvvv |
| 2841 | UINT64_C(16411117042138087424), // PVFNMADvvvL |
| 2842 | UINT64_C(16411117042138087424), // PVFNMADvvvL_v |
| 2843 | UINT64_C(16411117042138087424), // PVFNMADvvv_v |
| 2844 | UINT64_C(16411117042138087424), // PVFNMADvvvl |
| 2845 | UINT64_C(16411117042138087424), // PVFNMADvvvl_v |
| 2846 | UINT64_C(16411117042138087424), // PVFNMADvvvm |
| 2847 | UINT64_C(16411117042138087424), // PVFNMADvvvmL |
| 2848 | UINT64_C(16411117042138087424), // PVFNMADvvvmL_v |
| 2849 | UINT64_C(16411117042138087424), // PVFNMADvvvm_v |
| 2850 | UINT64_C(16411117042138087424), // PVFNMADvvvml |
| 2851 | UINT64_C(16411117042138087424), // PVFNMADvvvml_v |
| 2852 | UINT64_C(17537016948980711424), // PVFNMSBLOivv |
| 2853 | UINT64_C(17537016948980711424), // PVFNMSBLOivvL |
| 2854 | UINT64_C(17537016948980711424), // PVFNMSBLOivvL_v |
| 2855 | UINT64_C(17537016948980711424), // PVFNMSBLOivv_v |
| 2856 | UINT64_C(17537016948980711424), // PVFNMSBLOivvl |
| 2857 | UINT64_C(17537016948980711424), // PVFNMSBLOivvl_v |
| 2858 | UINT64_C(17537016948980711424), // PVFNMSBLOivvm |
| 2859 | UINT64_C(17537016948980711424), // PVFNMSBLOivvmL |
| 2860 | UINT64_C(17537016948980711424), // PVFNMSBLOivvmL_v |
| 2861 | UINT64_C(17537016948980711424), // PVFNMSBLOivvm_v |
| 2862 | UINT64_C(17537016948980711424), // PVFNMSBLOivvml |
| 2863 | UINT64_C(17537016948980711424), // PVFNMSBLOivvml_v |
| 2864 | UINT64_C(17537157686469066752), // PVFNMSBLOrvv |
| 2865 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvL |
| 2866 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvL_v |
| 2867 | UINT64_C(17537157686469066752), // PVFNMSBLOrvv_v |
| 2868 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvl |
| 2869 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvl_v |
| 2870 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvm |
| 2871 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvmL |
| 2872 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvmL_v |
| 2873 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvm_v |
| 2874 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvml |
| 2875 | UINT64_C(17537157686469066752), // PVFNMSBLOrvvml_v |
| 2876 | UINT64_C(17532513349353340928), // PVFNMSBLOviv |
| 2877 | UINT64_C(17532513349353340928), // PVFNMSBLOvivL |
| 2878 | UINT64_C(17532513349353340928), // PVFNMSBLOvivL_v |
| 2879 | UINT64_C(17532513349353340928), // PVFNMSBLOviv_v |
| 2880 | UINT64_C(17532513349353340928), // PVFNMSBLOvivl |
| 2881 | UINT64_C(17532513349353340928), // PVFNMSBLOvivl_v |
| 2882 | UINT64_C(17532513349353340928), // PVFNMSBLOvivm |
| 2883 | UINT64_C(17532513349353340928), // PVFNMSBLOvivmL |
| 2884 | UINT64_C(17532513349353340928), // PVFNMSBLOvivmL_v |
| 2885 | UINT64_C(17532513349353340928), // PVFNMSBLOvivm_v |
| 2886 | UINT64_C(17532513349353340928), // PVFNMSBLOvivml |
| 2887 | UINT64_C(17532513349353340928), // PVFNMSBLOvivml_v |
| 2888 | UINT64_C(17532654086841696256), // PVFNMSBLOvrv |
| 2889 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvL |
| 2890 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvL_v |
| 2891 | UINT64_C(17532654086841696256), // PVFNMSBLOvrv_v |
| 2892 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvl |
| 2893 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvl_v |
| 2894 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvm |
| 2895 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvmL |
| 2896 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvmL_v |
| 2897 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvm_v |
| 2898 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvml |
| 2899 | UINT64_C(17532654086841696256), // PVFNMSBLOvrvml_v |
| 2900 | UINT64_C(17528009749725970432), // PVFNMSBLOvvv |
| 2901 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvL |
| 2902 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvL_v |
| 2903 | UINT64_C(17528009749725970432), // PVFNMSBLOvvv_v |
| 2904 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvl |
| 2905 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvl_v |
| 2906 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvm |
| 2907 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvmL |
| 2908 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvmL_v |
| 2909 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvm_v |
| 2910 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvml |
| 2911 | UINT64_C(17528009749725970432), // PVFNMSBLOvvvml_v |
| 2912 | UINT64_C(17555031347490193408), // PVFNMSBUPivv |
| 2913 | UINT64_C(17555031347490193408), // PVFNMSBUPivvL |
| 2914 | UINT64_C(17555031347490193408), // PVFNMSBUPivvL_v |
| 2915 | UINT64_C(17555031347490193408), // PVFNMSBUPivv_v |
| 2916 | UINT64_C(17555031347490193408), // PVFNMSBUPivvl |
| 2917 | UINT64_C(17555031347490193408), // PVFNMSBUPivvl_v |
| 2918 | UINT64_C(17555031347490193408), // PVFNMSBUPivvm |
| 2919 | UINT64_C(17555031347490193408), // PVFNMSBUPivvmL |
| 2920 | UINT64_C(17555031347490193408), // PVFNMSBUPivvmL_v |
| 2921 | UINT64_C(17555031347490193408), // PVFNMSBUPivvm_v |
| 2922 | UINT64_C(17555031347490193408), // PVFNMSBUPivvml |
| 2923 | UINT64_C(17555031347490193408), // PVFNMSBUPivvml_v |
| 2924 | UINT64_C(17555172084978548736), // PVFNMSBUPrvv |
| 2925 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvL |
| 2926 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvL_v |
| 2927 | UINT64_C(17555172084978548736), // PVFNMSBUPrvv_v |
| 2928 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvl |
| 2929 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvl_v |
| 2930 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvm |
| 2931 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvmL |
| 2932 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvmL_v |
| 2933 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvm_v |
| 2934 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvml |
| 2935 | UINT64_C(17555172084978548736), // PVFNMSBUPrvvml_v |
| 2936 | UINT64_C(17550527747862822912), // PVFNMSBUPviv |
| 2937 | UINT64_C(17550527747862822912), // PVFNMSBUPvivL |
| 2938 | UINT64_C(17550527747862822912), // PVFNMSBUPvivL_v |
| 2939 | UINT64_C(17550527747862822912), // PVFNMSBUPviv_v |
| 2940 | UINT64_C(17550527747862822912), // PVFNMSBUPvivl |
| 2941 | UINT64_C(17550527747862822912), // PVFNMSBUPvivl_v |
| 2942 | UINT64_C(17550527747862822912), // PVFNMSBUPvivm |
| 2943 | UINT64_C(17550527747862822912), // PVFNMSBUPvivmL |
| 2944 | UINT64_C(17550527747862822912), // PVFNMSBUPvivmL_v |
| 2945 | UINT64_C(17550527747862822912), // PVFNMSBUPvivm_v |
| 2946 | UINT64_C(17550527747862822912), // PVFNMSBUPvivml |
| 2947 | UINT64_C(17550527747862822912), // PVFNMSBUPvivml_v |
| 2948 | UINT64_C(17550668485351178240), // PVFNMSBUPvrv |
| 2949 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvL |
| 2950 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvL_v |
| 2951 | UINT64_C(17550668485351178240), // PVFNMSBUPvrv_v |
| 2952 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvl |
| 2953 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvl_v |
| 2954 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvm |
| 2955 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvmL |
| 2956 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvmL_v |
| 2957 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvm_v |
| 2958 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvml |
| 2959 | UINT64_C(17550668485351178240), // PVFNMSBUPvrvml_v |
| 2960 | UINT64_C(17546024148235452416), // PVFNMSBUPvvv |
| 2961 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvL |
| 2962 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvL_v |
| 2963 | UINT64_C(17546024148235452416), // PVFNMSBUPvvv_v |
| 2964 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvl |
| 2965 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvl_v |
| 2966 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvm |
| 2967 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvmL |
| 2968 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvmL_v |
| 2969 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvm_v |
| 2970 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvml |
| 2971 | UINT64_C(17546024148235452416), // PVFNMSBUPvvvml_v |
| 2972 | UINT64_C(17573045745999675392), // PVFNMSBivv |
| 2973 | UINT64_C(17573045745999675392), // PVFNMSBivvL |
| 2974 | UINT64_C(17573045745999675392), // PVFNMSBivvL_v |
| 2975 | UINT64_C(17573045745999675392), // PVFNMSBivv_v |
| 2976 | UINT64_C(17573045745999675392), // PVFNMSBivvl |
| 2977 | UINT64_C(17573045745999675392), // PVFNMSBivvl_v |
| 2978 | UINT64_C(17573045745999675392), // PVFNMSBivvm |
| 2979 | UINT64_C(17573045745999675392), // PVFNMSBivvmL |
| 2980 | UINT64_C(17573045745999675392), // PVFNMSBivvmL_v |
| 2981 | UINT64_C(17573045745999675392), // PVFNMSBivvm_v |
| 2982 | UINT64_C(17573045745999675392), // PVFNMSBivvml |
| 2983 | UINT64_C(17573045745999675392), // PVFNMSBivvml_v |
| 2984 | UINT64_C(17573186483488030720), // PVFNMSBrvv |
| 2985 | UINT64_C(17573186483488030720), // PVFNMSBrvvL |
| 2986 | UINT64_C(17573186483488030720), // PVFNMSBrvvL_v |
| 2987 | UINT64_C(17573186483488030720), // PVFNMSBrvv_v |
| 2988 | UINT64_C(17573186483488030720), // PVFNMSBrvvl |
| 2989 | UINT64_C(17573186483488030720), // PVFNMSBrvvl_v |
| 2990 | UINT64_C(17573186483488030720), // PVFNMSBrvvm |
| 2991 | UINT64_C(17573186483488030720), // PVFNMSBrvvmL |
| 2992 | UINT64_C(17573186483488030720), // PVFNMSBrvvmL_v |
| 2993 | UINT64_C(17573186483488030720), // PVFNMSBrvvm_v |
| 2994 | UINT64_C(17573186483488030720), // PVFNMSBrvvml |
| 2995 | UINT64_C(17573186483488030720), // PVFNMSBrvvml_v |
| 2996 | UINT64_C(17568542146372304896), // PVFNMSBviv |
| 2997 | UINT64_C(17568542146372304896), // PVFNMSBvivL |
| 2998 | UINT64_C(17568542146372304896), // PVFNMSBvivL_v |
| 2999 | UINT64_C(17568542146372304896), // PVFNMSBviv_v |
| 3000 | UINT64_C(17568542146372304896), // PVFNMSBvivl |
| 3001 | UINT64_C(17568542146372304896), // PVFNMSBvivl_v |
| 3002 | UINT64_C(17568542146372304896), // PVFNMSBvivm |
| 3003 | UINT64_C(17568542146372304896), // PVFNMSBvivmL |
| 3004 | UINT64_C(17568542146372304896), // PVFNMSBvivmL_v |
| 3005 | UINT64_C(17568542146372304896), // PVFNMSBvivm_v |
| 3006 | UINT64_C(17568542146372304896), // PVFNMSBvivml |
| 3007 | UINT64_C(17568542146372304896), // PVFNMSBvivml_v |
| 3008 | UINT64_C(17568682883860660224), // PVFNMSBvrv |
| 3009 | UINT64_C(17568682883860660224), // PVFNMSBvrvL |
| 3010 | UINT64_C(17568682883860660224), // PVFNMSBvrvL_v |
| 3011 | UINT64_C(17568682883860660224), // PVFNMSBvrv_v |
| 3012 | UINT64_C(17568682883860660224), // PVFNMSBvrvl |
| 3013 | UINT64_C(17568682883860660224), // PVFNMSBvrvl_v |
| 3014 | UINT64_C(17568682883860660224), // PVFNMSBvrvm |
| 3015 | UINT64_C(17568682883860660224), // PVFNMSBvrvmL |
| 3016 | UINT64_C(17568682883860660224), // PVFNMSBvrvmL_v |
| 3017 | UINT64_C(17568682883860660224), // PVFNMSBvrvm_v |
| 3018 | UINT64_C(17568682883860660224), // PVFNMSBvrvml |
| 3019 | UINT64_C(17568682883860660224), // PVFNMSBvrvml_v |
| 3020 | UINT64_C(17564038546744934400), // PVFNMSBvvv |
| 3021 | UINT64_C(17564038546744934400), // PVFNMSBvvvL |
| 3022 | UINT64_C(17564038546744934400), // PVFNMSBvvvL_v |
| 3023 | UINT64_C(17564038546744934400), // PVFNMSBvvv_v |
| 3024 | UINT64_C(17564038546744934400), // PVFNMSBvvvl |
| 3025 | UINT64_C(17564038546744934400), // PVFNMSBvvvl_v |
| 3026 | UINT64_C(17564038546744934400), // PVFNMSBvvvm |
| 3027 | UINT64_C(17564038546744934400), // PVFNMSBvvvmL |
| 3028 | UINT64_C(17564038546744934400), // PVFNMSBvvvmL_v |
| 3029 | UINT64_C(17564038546744934400), // PVFNMSBvvvm_v |
| 3030 | UINT64_C(17564038546744934400), // PVFNMSBvvvml |
| 3031 | UINT64_C(17564038546744934400), // PVFNMSBvvvml_v |
| 3032 | UINT64_C(15879692286108368896), // PVFSUBLOiv |
| 3033 | UINT64_C(15879692286108368896), // PVFSUBLOivL |
| 3034 | UINT64_C(15879692286108368896), // PVFSUBLOivL_v |
| 3035 | UINT64_C(15879692286108368896), // PVFSUBLOiv_v |
| 3036 | UINT64_C(15879692286108368896), // PVFSUBLOivl |
| 3037 | UINT64_C(15879692286108368896), // PVFSUBLOivl_v |
| 3038 | UINT64_C(15879692286108368896), // PVFSUBLOivm |
| 3039 | UINT64_C(15879692286108368896), // PVFSUBLOivmL |
| 3040 | UINT64_C(15879692286108368896), // PVFSUBLOivmL_v |
| 3041 | UINT64_C(15879692286108368896), // PVFSUBLOivm_v |
| 3042 | UINT64_C(15879692286108368896), // PVFSUBLOivml |
| 3043 | UINT64_C(15879692286108368896), // PVFSUBLOivml_v |
| 3044 | UINT64_C(15879833023596724224), // PVFSUBLOrv |
| 3045 | UINT64_C(15879833023596724224), // PVFSUBLOrvL |
| 3046 | UINT64_C(15879833023596724224), // PVFSUBLOrvL_v |
| 3047 | UINT64_C(15879833023596724224), // PVFSUBLOrv_v |
| 3048 | UINT64_C(15879833023596724224), // PVFSUBLOrvl |
| 3049 | UINT64_C(15879833023596724224), // PVFSUBLOrvl_v |
| 3050 | UINT64_C(15879833023596724224), // PVFSUBLOrvm |
| 3051 | UINT64_C(15879833023596724224), // PVFSUBLOrvmL |
| 3052 | UINT64_C(15879833023596724224), // PVFSUBLOrvmL_v |
| 3053 | UINT64_C(15879833023596724224), // PVFSUBLOrvm_v |
| 3054 | UINT64_C(15879833023596724224), // PVFSUBLOrvml |
| 3055 | UINT64_C(15879833023596724224), // PVFSUBLOrvml_v |
| 3056 | UINT64_C(15870685086853627904), // PVFSUBLOvv |
| 3057 | UINT64_C(15870685086853627904), // PVFSUBLOvvL |
| 3058 | UINT64_C(15870685086853627904), // PVFSUBLOvvL_v |
| 3059 | UINT64_C(15870685086853627904), // PVFSUBLOvv_v |
| 3060 | UINT64_C(15870685086853627904), // PVFSUBLOvvl |
| 3061 | UINT64_C(15870685086853627904), // PVFSUBLOvvl_v |
| 3062 | UINT64_C(15870685086853627904), // PVFSUBLOvvm |
| 3063 | UINT64_C(15870685086853627904), // PVFSUBLOvvmL |
| 3064 | UINT64_C(15870685086853627904), // PVFSUBLOvvmL_v |
| 3065 | UINT64_C(15870685086853627904), // PVFSUBLOvvm_v |
| 3066 | UINT64_C(15870685086853627904), // PVFSUBLOvvml |
| 3067 | UINT64_C(15870685086853627904), // PVFSUBLOvvml_v |
| 3068 | UINT64_C(15897706684617850880), // PVFSUBUPiv |
| 3069 | UINT64_C(15897706684617850880), // PVFSUBUPivL |
| 3070 | UINT64_C(15897706684617850880), // PVFSUBUPivL_v |
| 3071 | UINT64_C(15897706684617850880), // PVFSUBUPiv_v |
| 3072 | UINT64_C(15897706684617850880), // PVFSUBUPivl |
| 3073 | UINT64_C(15897706684617850880), // PVFSUBUPivl_v |
| 3074 | UINT64_C(15897706684617850880), // PVFSUBUPivm |
| 3075 | UINT64_C(15897706684617850880), // PVFSUBUPivmL |
| 3076 | UINT64_C(15897706684617850880), // PVFSUBUPivmL_v |
| 3077 | UINT64_C(15897706684617850880), // PVFSUBUPivm_v |
| 3078 | UINT64_C(15897706684617850880), // PVFSUBUPivml |
| 3079 | UINT64_C(15897706684617850880), // PVFSUBUPivml_v |
| 3080 | UINT64_C(15897847422106206208), // PVFSUBUPrv |
| 3081 | UINT64_C(15897847422106206208), // PVFSUBUPrvL |
| 3082 | UINT64_C(15897847422106206208), // PVFSUBUPrvL_v |
| 3083 | UINT64_C(15897847422106206208), // PVFSUBUPrv_v |
| 3084 | UINT64_C(15897847422106206208), // PVFSUBUPrvl |
| 3085 | UINT64_C(15897847422106206208), // PVFSUBUPrvl_v |
| 3086 | UINT64_C(15897847422106206208), // PVFSUBUPrvm |
| 3087 | UINT64_C(15897847422106206208), // PVFSUBUPrvmL |
| 3088 | UINT64_C(15897847422106206208), // PVFSUBUPrvmL_v |
| 3089 | UINT64_C(15897847422106206208), // PVFSUBUPrvm_v |
| 3090 | UINT64_C(15897847422106206208), // PVFSUBUPrvml |
| 3091 | UINT64_C(15897847422106206208), // PVFSUBUPrvml_v |
| 3092 | UINT64_C(15888699485363109888), // PVFSUBUPvv |
| 3093 | UINT64_C(15888699485363109888), // PVFSUBUPvvL |
| 3094 | UINT64_C(15888699485363109888), // PVFSUBUPvvL_v |
| 3095 | UINT64_C(15888699485363109888), // PVFSUBUPvv_v |
| 3096 | UINT64_C(15888699485363109888), // PVFSUBUPvvl |
| 3097 | UINT64_C(15888699485363109888), // PVFSUBUPvvl_v |
| 3098 | UINT64_C(15888699485363109888), // PVFSUBUPvvm |
| 3099 | UINT64_C(15888699485363109888), // PVFSUBUPvvmL |
| 3100 | UINT64_C(15888699485363109888), // PVFSUBUPvvmL_v |
| 3101 | UINT64_C(15888699485363109888), // PVFSUBUPvvm_v |
| 3102 | UINT64_C(15888699485363109888), // PVFSUBUPvvml |
| 3103 | UINT64_C(15888699485363109888), // PVFSUBUPvvml_v |
| 3104 | UINT64_C(15915721083127332864), // PVFSUBiv |
| 3105 | UINT64_C(15915721083127332864), // PVFSUBivL |
| 3106 | UINT64_C(15915721083127332864), // PVFSUBivL_v |
| 3107 | UINT64_C(15915721083127332864), // PVFSUBiv_v |
| 3108 | UINT64_C(15915721083127332864), // PVFSUBivl |
| 3109 | UINT64_C(15915721083127332864), // PVFSUBivl_v |
| 3110 | UINT64_C(15915721083127332864), // PVFSUBivm |
| 3111 | UINT64_C(15915721083127332864), // PVFSUBivmL |
| 3112 | UINT64_C(15915721083127332864), // PVFSUBivmL_v |
| 3113 | UINT64_C(15915721083127332864), // PVFSUBivm_v |
| 3114 | UINT64_C(15915721083127332864), // PVFSUBivml |
| 3115 | UINT64_C(15915721083127332864), // PVFSUBivml_v |
| 3116 | UINT64_C(15915861820615688192), // PVFSUBrv |
| 3117 | UINT64_C(15915861820615688192), // PVFSUBrvL |
| 3118 | UINT64_C(15915861820615688192), // PVFSUBrvL_v |
| 3119 | UINT64_C(15915861820615688192), // PVFSUBrv_v |
| 3120 | UINT64_C(15915861820615688192), // PVFSUBrvl |
| 3121 | UINT64_C(15915861820615688192), // PVFSUBrvl_v |
| 3122 | UINT64_C(15915861820615688192), // PVFSUBrvm |
| 3123 | UINT64_C(15915861820615688192), // PVFSUBrvmL |
| 3124 | UINT64_C(15915861820615688192), // PVFSUBrvmL_v |
| 3125 | UINT64_C(15915861820615688192), // PVFSUBrvm_v |
| 3126 | UINT64_C(15915861820615688192), // PVFSUBrvml |
| 3127 | UINT64_C(15915861820615688192), // PVFSUBrvml_v |
| 3128 | UINT64_C(15906713883872591872), // PVFSUBvv |
| 3129 | UINT64_C(15906713883872591872), // PVFSUBvvL |
| 3130 | UINT64_C(15906713883872591872), // PVFSUBvvL_v |
| 3131 | UINT64_C(15906713883872591872), // PVFSUBvv_v |
| 3132 | UINT64_C(15906713883872591872), // PVFSUBvvl |
| 3133 | UINT64_C(15906713883872591872), // PVFSUBvvl_v |
| 3134 | UINT64_C(15906713883872591872), // PVFSUBvvm |
| 3135 | UINT64_C(15906713883872591872), // PVFSUBvvmL |
| 3136 | UINT64_C(15906713883872591872), // PVFSUBvvmL_v |
| 3137 | UINT64_C(15906713883872591872), // PVFSUBvvm_v |
| 3138 | UINT64_C(15906713883872591872), // PVFSUBvvml |
| 3139 | UINT64_C(15906713883872591872), // PVFSUBvvml_v |
| 3140 | UINT64_C(16663318621270835200), // PVLDZLOv |
| 3141 | UINT64_C(16663318621270835200), // PVLDZLOvL |
| 3142 | UINT64_C(16663318621270835200), // PVLDZLOvL_v |
| 3143 | UINT64_C(16663318621270835200), // PVLDZLOv_v |
| 3144 | UINT64_C(16663318621270835200), // PVLDZLOvl |
| 3145 | UINT64_C(16663318621270835200), // PVLDZLOvl_v |
| 3146 | UINT64_C(16663318621270835200), // PVLDZLOvm |
| 3147 | UINT64_C(16663318621270835200), // PVLDZLOvmL |
| 3148 | UINT64_C(16663318621270835200), // PVLDZLOvmL_v |
| 3149 | UINT64_C(16663318621270835200), // PVLDZLOvm_v |
| 3150 | UINT64_C(16663318621270835200), // PVLDZLOvml |
| 3151 | UINT64_C(16663318621270835200), // PVLDZLOvml_v |
| 3152 | UINT64_C(16681333019780317184), // PVLDZUPv |
| 3153 | UINT64_C(16681333019780317184), // PVLDZUPvL |
| 3154 | UINT64_C(16681333019780317184), // PVLDZUPvL_v |
| 3155 | UINT64_C(16681333019780317184), // PVLDZUPv_v |
| 3156 | UINT64_C(16681333019780317184), // PVLDZUPvl |
| 3157 | UINT64_C(16681333019780317184), // PVLDZUPvl_v |
| 3158 | UINT64_C(16681333019780317184), // PVLDZUPvm |
| 3159 | UINT64_C(16681333019780317184), // PVLDZUPvmL |
| 3160 | UINT64_C(16681333019780317184), // PVLDZUPvmL_v |
| 3161 | UINT64_C(16681333019780317184), // PVLDZUPvm_v |
| 3162 | UINT64_C(16681333019780317184), // PVLDZUPvml |
| 3163 | UINT64_C(16681333019780317184), // PVLDZUPvml_v |
| 3164 | UINT64_C(16699347418289799168), // PVLDZv |
| 3165 | UINT64_C(16699347418289799168), // PVLDZvL |
| 3166 | UINT64_C(16699347418289799168), // PVLDZvL_v |
| 3167 | UINT64_C(16699347418289799168), // PVLDZv_v |
| 3168 | UINT64_C(16699347418289799168), // PVLDZvl |
| 3169 | UINT64_C(16699347418289799168), // PVLDZvl_v |
| 3170 | UINT64_C(16699347418289799168), // PVLDZvm |
| 3171 | UINT64_C(16699347418289799168), // PVLDZvmL |
| 3172 | UINT64_C(16699347418289799168), // PVLDZvmL_v |
| 3173 | UINT64_C(16699347418289799168), // PVLDZvm_v |
| 3174 | UINT64_C(16699347418289799168), // PVLDZvml |
| 3175 | UINT64_C(16699347418289799168), // PVLDZvml_v |
| 3176 | UINT64_C(9970969574998278144), // PVMAXSLOiv |
| 3177 | UINT64_C(9970969574998278144), // PVMAXSLOivL |
| 3178 | UINT64_C(9970969574998278144), // PVMAXSLOivL_v |
| 3179 | UINT64_C(9970969574998278144), // PVMAXSLOiv_v |
| 3180 | UINT64_C(9970969574998278144), // PVMAXSLOivl |
| 3181 | UINT64_C(9970969574998278144), // PVMAXSLOivl_v |
| 3182 | UINT64_C(9970969574998278144), // PVMAXSLOivm |
| 3183 | UINT64_C(9970969574998278144), // PVMAXSLOivmL |
| 3184 | UINT64_C(9970969574998278144), // PVMAXSLOivmL_v |
| 3185 | UINT64_C(9970969574998278144), // PVMAXSLOivm_v |
| 3186 | UINT64_C(9970969574998278144), // PVMAXSLOivml |
| 3187 | UINT64_C(9970969574998278144), // PVMAXSLOivml_v |
| 3188 | UINT64_C(9971110312486633472), // PVMAXSLOrv |
| 3189 | UINT64_C(9971110312486633472), // PVMAXSLOrvL |
| 3190 | UINT64_C(9971110312486633472), // PVMAXSLOrvL_v |
| 3191 | UINT64_C(9971110312486633472), // PVMAXSLOrv_v |
| 3192 | UINT64_C(9971110312486633472), // PVMAXSLOrvl |
| 3193 | UINT64_C(9971110312486633472), // PVMAXSLOrvl_v |
| 3194 | UINT64_C(9971110312486633472), // PVMAXSLOrvm |
| 3195 | UINT64_C(9971110312486633472), // PVMAXSLOrvmL |
| 3196 | UINT64_C(9971110312486633472), // PVMAXSLOrvmL_v |
| 3197 | UINT64_C(9971110312486633472), // PVMAXSLOrvm_v |
| 3198 | UINT64_C(9971110312486633472), // PVMAXSLOrvml |
| 3199 | UINT64_C(9971110312486633472), // PVMAXSLOrvml_v |
| 3200 | UINT64_C(9961962375743537152), // PVMAXSLOvv |
| 3201 | UINT64_C(9961962375743537152), // PVMAXSLOvvL |
| 3202 | UINT64_C(9961962375743537152), // PVMAXSLOvvL_v |
| 3203 | UINT64_C(9961962375743537152), // PVMAXSLOvv_v |
| 3204 | UINT64_C(9961962375743537152), // PVMAXSLOvvl |
| 3205 | UINT64_C(9961962375743537152), // PVMAXSLOvvl_v |
| 3206 | UINT64_C(9961962375743537152), // PVMAXSLOvvm |
| 3207 | UINT64_C(9961962375743537152), // PVMAXSLOvvmL |
| 3208 | UINT64_C(9961962375743537152), // PVMAXSLOvvmL_v |
| 3209 | UINT64_C(9961962375743537152), // PVMAXSLOvvm_v |
| 3210 | UINT64_C(9961962375743537152), // PVMAXSLOvvml |
| 3211 | UINT64_C(9961962375743537152), // PVMAXSLOvvml_v |
| 3212 | UINT64_C(9988983973507760128), // PVMAXSUPiv |
| 3213 | UINT64_C(9988983973507760128), // PVMAXSUPivL |
| 3214 | UINT64_C(9988983973507760128), // PVMAXSUPivL_v |
| 3215 | UINT64_C(9988983973507760128), // PVMAXSUPiv_v |
| 3216 | UINT64_C(9988983973507760128), // PVMAXSUPivl |
| 3217 | UINT64_C(9988983973507760128), // PVMAXSUPivl_v |
| 3218 | UINT64_C(9988983973507760128), // PVMAXSUPivm |
| 3219 | UINT64_C(9988983973507760128), // PVMAXSUPivmL |
| 3220 | UINT64_C(9988983973507760128), // PVMAXSUPivmL_v |
| 3221 | UINT64_C(9988983973507760128), // PVMAXSUPivm_v |
| 3222 | UINT64_C(9988983973507760128), // PVMAXSUPivml |
| 3223 | UINT64_C(9988983973507760128), // PVMAXSUPivml_v |
| 3224 | UINT64_C(9989124710996115456), // PVMAXSUPrv |
| 3225 | UINT64_C(9989124710996115456), // PVMAXSUPrvL |
| 3226 | UINT64_C(9989124710996115456), // PVMAXSUPrvL_v |
| 3227 | UINT64_C(9989124710996115456), // PVMAXSUPrv_v |
| 3228 | UINT64_C(9989124710996115456), // PVMAXSUPrvl |
| 3229 | UINT64_C(9989124710996115456), // PVMAXSUPrvl_v |
| 3230 | UINT64_C(9989124710996115456), // PVMAXSUPrvm |
| 3231 | UINT64_C(9989124710996115456), // PVMAXSUPrvmL |
| 3232 | UINT64_C(9989124710996115456), // PVMAXSUPrvmL_v |
| 3233 | UINT64_C(9989124710996115456), // PVMAXSUPrvm_v |
| 3234 | UINT64_C(9989124710996115456), // PVMAXSUPrvml |
| 3235 | UINT64_C(9989124710996115456), // PVMAXSUPrvml_v |
| 3236 | UINT64_C(9979976774253019136), // PVMAXSUPvv |
| 3237 | UINT64_C(9979976774253019136), // PVMAXSUPvvL |
| 3238 | UINT64_C(9979976774253019136), // PVMAXSUPvvL_v |
| 3239 | UINT64_C(9979976774253019136), // PVMAXSUPvv_v |
| 3240 | UINT64_C(9979976774253019136), // PVMAXSUPvvl |
| 3241 | UINT64_C(9979976774253019136), // PVMAXSUPvvl_v |
| 3242 | UINT64_C(9979976774253019136), // PVMAXSUPvvm |
| 3243 | UINT64_C(9979976774253019136), // PVMAXSUPvvmL |
| 3244 | UINT64_C(9979976774253019136), // PVMAXSUPvvmL_v |
| 3245 | UINT64_C(9979976774253019136), // PVMAXSUPvvm_v |
| 3246 | UINT64_C(9979976774253019136), // PVMAXSUPvvml |
| 3247 | UINT64_C(9979976774253019136), // PVMAXSUPvvml_v |
| 3248 | UINT64_C(10006998372017242112), // PVMAXSiv |
| 3249 | UINT64_C(10006998372017242112), // PVMAXSivL |
| 3250 | UINT64_C(10006998372017242112), // PVMAXSivL_v |
| 3251 | UINT64_C(10006998372017242112), // PVMAXSiv_v |
| 3252 | UINT64_C(10006998372017242112), // PVMAXSivl |
| 3253 | UINT64_C(10006998372017242112), // PVMAXSivl_v |
| 3254 | UINT64_C(10006998372017242112), // PVMAXSivm |
| 3255 | UINT64_C(10006998372017242112), // PVMAXSivmL |
| 3256 | UINT64_C(10006998372017242112), // PVMAXSivmL_v |
| 3257 | UINT64_C(10006998372017242112), // PVMAXSivm_v |
| 3258 | UINT64_C(10006998372017242112), // PVMAXSivml |
| 3259 | UINT64_C(10006998372017242112), // PVMAXSivml_v |
| 3260 | UINT64_C(10007139109505597440), // PVMAXSrv |
| 3261 | UINT64_C(10007139109505597440), // PVMAXSrvL |
| 3262 | UINT64_C(10007139109505597440), // PVMAXSrvL_v |
| 3263 | UINT64_C(10007139109505597440), // PVMAXSrv_v |
| 3264 | UINT64_C(10007139109505597440), // PVMAXSrvl |
| 3265 | UINT64_C(10007139109505597440), // PVMAXSrvl_v |
| 3266 | UINT64_C(10007139109505597440), // PVMAXSrvm |
| 3267 | UINT64_C(10007139109505597440), // PVMAXSrvmL |
| 3268 | UINT64_C(10007139109505597440), // PVMAXSrvmL_v |
| 3269 | UINT64_C(10007139109505597440), // PVMAXSrvm_v |
| 3270 | UINT64_C(10007139109505597440), // PVMAXSrvml |
| 3271 | UINT64_C(10007139109505597440), // PVMAXSrvml_v |
| 3272 | UINT64_C(9997991172762501120), // PVMAXSvv |
| 3273 | UINT64_C(9997991172762501120), // PVMAXSvvL |
| 3274 | UINT64_C(9997991172762501120), // PVMAXSvvL_v |
| 3275 | UINT64_C(9997991172762501120), // PVMAXSvv_v |
| 3276 | UINT64_C(9997991172762501120), // PVMAXSvvl |
| 3277 | UINT64_C(9997991172762501120), // PVMAXSvvl_v |
| 3278 | UINT64_C(9997991172762501120), // PVMAXSvvm |
| 3279 | UINT64_C(9997991172762501120), // PVMAXSvvmL |
| 3280 | UINT64_C(9997991172762501120), // PVMAXSvvmL_v |
| 3281 | UINT64_C(9997991172762501120), // PVMAXSvvm_v |
| 3282 | UINT64_C(9997991172762501120), // PVMAXSvvml |
| 3283 | UINT64_C(9997991172762501120), // PVMAXSvvml_v |
| 3284 | UINT64_C(9975473174625648640), // PVMINSLOiv |
| 3285 | UINT64_C(9975473174625648640), // PVMINSLOivL |
| 3286 | UINT64_C(9975473174625648640), // PVMINSLOivL_v |
| 3287 | UINT64_C(9975473174625648640), // PVMINSLOiv_v |
| 3288 | UINT64_C(9975473174625648640), // PVMINSLOivl |
| 3289 | UINT64_C(9975473174625648640), // PVMINSLOivl_v |
| 3290 | UINT64_C(9975473174625648640), // PVMINSLOivm |
| 3291 | UINT64_C(9975473174625648640), // PVMINSLOivmL |
| 3292 | UINT64_C(9975473174625648640), // PVMINSLOivmL_v |
| 3293 | UINT64_C(9975473174625648640), // PVMINSLOivm_v |
| 3294 | UINT64_C(9975473174625648640), // PVMINSLOivml |
| 3295 | UINT64_C(9975473174625648640), // PVMINSLOivml_v |
| 3296 | UINT64_C(9975613912114003968), // PVMINSLOrv |
| 3297 | UINT64_C(9975613912114003968), // PVMINSLOrvL |
| 3298 | UINT64_C(9975613912114003968), // PVMINSLOrvL_v |
| 3299 | UINT64_C(9975613912114003968), // PVMINSLOrv_v |
| 3300 | UINT64_C(9975613912114003968), // PVMINSLOrvl |
| 3301 | UINT64_C(9975613912114003968), // PVMINSLOrvl_v |
| 3302 | UINT64_C(9975613912114003968), // PVMINSLOrvm |
| 3303 | UINT64_C(9975613912114003968), // PVMINSLOrvmL |
| 3304 | UINT64_C(9975613912114003968), // PVMINSLOrvmL_v |
| 3305 | UINT64_C(9975613912114003968), // PVMINSLOrvm_v |
| 3306 | UINT64_C(9975613912114003968), // PVMINSLOrvml |
| 3307 | UINT64_C(9975613912114003968), // PVMINSLOrvml_v |
| 3308 | UINT64_C(9966465975370907648), // PVMINSLOvv |
| 3309 | UINT64_C(9966465975370907648), // PVMINSLOvvL |
| 3310 | UINT64_C(9966465975370907648), // PVMINSLOvvL_v |
| 3311 | UINT64_C(9966465975370907648), // PVMINSLOvv_v |
| 3312 | UINT64_C(9966465975370907648), // PVMINSLOvvl |
| 3313 | UINT64_C(9966465975370907648), // PVMINSLOvvl_v |
| 3314 | UINT64_C(9966465975370907648), // PVMINSLOvvm |
| 3315 | UINT64_C(9966465975370907648), // PVMINSLOvvmL |
| 3316 | UINT64_C(9966465975370907648), // PVMINSLOvvmL_v |
| 3317 | UINT64_C(9966465975370907648), // PVMINSLOvvm_v |
| 3318 | UINT64_C(9966465975370907648), // PVMINSLOvvml |
| 3319 | UINT64_C(9966465975370907648), // PVMINSLOvvml_v |
| 3320 | UINT64_C(9993487573135130624), // PVMINSUPiv |
| 3321 | UINT64_C(9993487573135130624), // PVMINSUPivL |
| 3322 | UINT64_C(9993487573135130624), // PVMINSUPivL_v |
| 3323 | UINT64_C(9993487573135130624), // PVMINSUPiv_v |
| 3324 | UINT64_C(9993487573135130624), // PVMINSUPivl |
| 3325 | UINT64_C(9993487573135130624), // PVMINSUPivl_v |
| 3326 | UINT64_C(9993487573135130624), // PVMINSUPivm |
| 3327 | UINT64_C(9993487573135130624), // PVMINSUPivmL |
| 3328 | UINT64_C(9993487573135130624), // PVMINSUPivmL_v |
| 3329 | UINT64_C(9993487573135130624), // PVMINSUPivm_v |
| 3330 | UINT64_C(9993487573135130624), // PVMINSUPivml |
| 3331 | UINT64_C(9993487573135130624), // PVMINSUPivml_v |
| 3332 | UINT64_C(9993628310623485952), // PVMINSUPrv |
| 3333 | UINT64_C(9993628310623485952), // PVMINSUPrvL |
| 3334 | UINT64_C(9993628310623485952), // PVMINSUPrvL_v |
| 3335 | UINT64_C(9993628310623485952), // PVMINSUPrv_v |
| 3336 | UINT64_C(9993628310623485952), // PVMINSUPrvl |
| 3337 | UINT64_C(9993628310623485952), // PVMINSUPrvl_v |
| 3338 | UINT64_C(9993628310623485952), // PVMINSUPrvm |
| 3339 | UINT64_C(9993628310623485952), // PVMINSUPrvmL |
| 3340 | UINT64_C(9993628310623485952), // PVMINSUPrvmL_v |
| 3341 | UINT64_C(9993628310623485952), // PVMINSUPrvm_v |
| 3342 | UINT64_C(9993628310623485952), // PVMINSUPrvml |
| 3343 | UINT64_C(9993628310623485952), // PVMINSUPrvml_v |
| 3344 | UINT64_C(9984480373880389632), // PVMINSUPvv |
| 3345 | UINT64_C(9984480373880389632), // PVMINSUPvvL |
| 3346 | UINT64_C(9984480373880389632), // PVMINSUPvvL_v |
| 3347 | UINT64_C(9984480373880389632), // PVMINSUPvv_v |
| 3348 | UINT64_C(9984480373880389632), // PVMINSUPvvl |
| 3349 | UINT64_C(9984480373880389632), // PVMINSUPvvl_v |
| 3350 | UINT64_C(9984480373880389632), // PVMINSUPvvm |
| 3351 | UINT64_C(9984480373880389632), // PVMINSUPvvmL |
| 3352 | UINT64_C(9984480373880389632), // PVMINSUPvvmL_v |
| 3353 | UINT64_C(9984480373880389632), // PVMINSUPvvm_v |
| 3354 | UINT64_C(9984480373880389632), // PVMINSUPvvml |
| 3355 | UINT64_C(9984480373880389632), // PVMINSUPvvml_v |
| 3356 | UINT64_C(10011501971644612608), // PVMINSiv |
| 3357 | UINT64_C(10011501971644612608), // PVMINSivL |
| 3358 | UINT64_C(10011501971644612608), // PVMINSivL_v |
| 3359 | UINT64_C(10011501971644612608), // PVMINSiv_v |
| 3360 | UINT64_C(10011501971644612608), // PVMINSivl |
| 3361 | UINT64_C(10011501971644612608), // PVMINSivl_v |
| 3362 | UINT64_C(10011501971644612608), // PVMINSivm |
| 3363 | UINT64_C(10011501971644612608), // PVMINSivmL |
| 3364 | UINT64_C(10011501971644612608), // PVMINSivmL_v |
| 3365 | UINT64_C(10011501971644612608), // PVMINSivm_v |
| 3366 | UINT64_C(10011501971644612608), // PVMINSivml |
| 3367 | UINT64_C(10011501971644612608), // PVMINSivml_v |
| 3368 | UINT64_C(10011642709132967936), // PVMINSrv |
| 3369 | UINT64_C(10011642709132967936), // PVMINSrvL |
| 3370 | UINT64_C(10011642709132967936), // PVMINSrvL_v |
| 3371 | UINT64_C(10011642709132967936), // PVMINSrv_v |
| 3372 | UINT64_C(10011642709132967936), // PVMINSrvl |
| 3373 | UINT64_C(10011642709132967936), // PVMINSrvl_v |
| 3374 | UINT64_C(10011642709132967936), // PVMINSrvm |
| 3375 | UINT64_C(10011642709132967936), // PVMINSrvmL |
| 3376 | UINT64_C(10011642709132967936), // PVMINSrvmL_v |
| 3377 | UINT64_C(10011642709132967936), // PVMINSrvm_v |
| 3378 | UINT64_C(10011642709132967936), // PVMINSrvml |
| 3379 | UINT64_C(10011642709132967936), // PVMINSrvml_v |
| 3380 | UINT64_C(10002494772389871616), // PVMINSvv |
| 3381 | UINT64_C(10002494772389871616), // PVMINSvvL |
| 3382 | UINT64_C(10002494772389871616), // PVMINSvvL_v |
| 3383 | UINT64_C(10002494772389871616), // PVMINSvv_v |
| 3384 | UINT64_C(10002494772389871616), // PVMINSvvl |
| 3385 | UINT64_C(10002494772389871616), // PVMINSvvl_v |
| 3386 | UINT64_C(10002494772389871616), // PVMINSvvm |
| 3387 | UINT64_C(10002494772389871616), // PVMINSvvmL |
| 3388 | UINT64_C(10002494772389871616), // PVMINSvvmL_v |
| 3389 | UINT64_C(10002494772389871616), // PVMINSvvm_v |
| 3390 | UINT64_C(10002494772389871616), // PVMINSvvml |
| 3391 | UINT64_C(10002494772389871616), // PVMINSvvml_v |
| 3392 | UINT64_C(14222367623236026368), // PVORLOmv |
| 3393 | UINT64_C(14222367623236026368), // PVORLOmvL |
| 3394 | UINT64_C(14222367623236026368), // PVORLOmvL_v |
| 3395 | UINT64_C(14222367623236026368), // PVORLOmv_v |
| 3396 | UINT64_C(14222367623236026368), // PVORLOmvl |
| 3397 | UINT64_C(14222367623236026368), // PVORLOmvl_v |
| 3398 | UINT64_C(14222367623236026368), // PVORLOmvm |
| 3399 | UINT64_C(14222367623236026368), // PVORLOmvmL |
| 3400 | UINT64_C(14222367623236026368), // PVORLOmvmL_v |
| 3401 | UINT64_C(14222367623236026368), // PVORLOmvm_v |
| 3402 | UINT64_C(14222367623236026368), // PVORLOmvml |
| 3403 | UINT64_C(14222367623236026368), // PVORLOmvml_v |
| 3404 | UINT64_C(14222508360724381696), // PVORLOrv |
| 3405 | UINT64_C(14222508360724381696), // PVORLOrvL |
| 3406 | UINT64_C(14222508360724381696), // PVORLOrvL_v |
| 3407 | UINT64_C(14222508360724381696), // PVORLOrv_v |
| 3408 | UINT64_C(14222508360724381696), // PVORLOrvl |
| 3409 | UINT64_C(14222508360724381696), // PVORLOrvl_v |
| 3410 | UINT64_C(14222508360724381696), // PVORLOrvm |
| 3411 | UINT64_C(14222508360724381696), // PVORLOrvmL |
| 3412 | UINT64_C(14222508360724381696), // PVORLOrvmL_v |
| 3413 | UINT64_C(14222508360724381696), // PVORLOrvm_v |
| 3414 | UINT64_C(14222508360724381696), // PVORLOrvml |
| 3415 | UINT64_C(14222508360724381696), // PVORLOrvml_v |
| 3416 | UINT64_C(14213360423981285376), // PVORLOvv |
| 3417 | UINT64_C(14213360423981285376), // PVORLOvvL |
| 3418 | UINT64_C(14213360423981285376), // PVORLOvvL_v |
| 3419 | UINT64_C(14213360423981285376), // PVORLOvv_v |
| 3420 | UINT64_C(14213360423981285376), // PVORLOvvl |
| 3421 | UINT64_C(14213360423981285376), // PVORLOvvl_v |
| 3422 | UINT64_C(14213360423981285376), // PVORLOvvm |
| 3423 | UINT64_C(14213360423981285376), // PVORLOvvmL |
| 3424 | UINT64_C(14213360423981285376), // PVORLOvvmL_v |
| 3425 | UINT64_C(14213360423981285376), // PVORLOvvm_v |
| 3426 | UINT64_C(14213360423981285376), // PVORLOvvml |
| 3427 | UINT64_C(14213360423981285376), // PVORLOvvml_v |
| 3428 | UINT64_C(14240382021745508352), // PVORUPmv |
| 3429 | UINT64_C(14240382021745508352), // PVORUPmvL |
| 3430 | UINT64_C(14240382021745508352), // PVORUPmvL_v |
| 3431 | UINT64_C(14240382021745508352), // PVORUPmv_v |
| 3432 | UINT64_C(14240382021745508352), // PVORUPmvl |
| 3433 | UINT64_C(14240382021745508352), // PVORUPmvl_v |
| 3434 | UINT64_C(14240382021745508352), // PVORUPmvm |
| 3435 | UINT64_C(14240382021745508352), // PVORUPmvmL |
| 3436 | UINT64_C(14240382021745508352), // PVORUPmvmL_v |
| 3437 | UINT64_C(14240382021745508352), // PVORUPmvm_v |
| 3438 | UINT64_C(14240382021745508352), // PVORUPmvml |
| 3439 | UINT64_C(14240382021745508352), // PVORUPmvml_v |
| 3440 | UINT64_C(14240522759233863680), // PVORUPrv |
| 3441 | UINT64_C(14240522759233863680), // PVORUPrvL |
| 3442 | UINT64_C(14240522759233863680), // PVORUPrvL_v |
| 3443 | UINT64_C(14240522759233863680), // PVORUPrv_v |
| 3444 | UINT64_C(14240522759233863680), // PVORUPrvl |
| 3445 | UINT64_C(14240522759233863680), // PVORUPrvl_v |
| 3446 | UINT64_C(14240522759233863680), // PVORUPrvm |
| 3447 | UINT64_C(14240522759233863680), // PVORUPrvmL |
| 3448 | UINT64_C(14240522759233863680), // PVORUPrvmL_v |
| 3449 | UINT64_C(14240522759233863680), // PVORUPrvm_v |
| 3450 | UINT64_C(14240522759233863680), // PVORUPrvml |
| 3451 | UINT64_C(14240522759233863680), // PVORUPrvml_v |
| 3452 | UINT64_C(14231374822490767360), // PVORUPvv |
| 3453 | UINT64_C(14231374822490767360), // PVORUPvvL |
| 3454 | UINT64_C(14231374822490767360), // PVORUPvvL_v |
| 3455 | UINT64_C(14231374822490767360), // PVORUPvv_v |
| 3456 | UINT64_C(14231374822490767360), // PVORUPvvl |
| 3457 | UINT64_C(14231374822490767360), // PVORUPvvl_v |
| 3458 | UINT64_C(14231374822490767360), // PVORUPvvm |
| 3459 | UINT64_C(14231374822490767360), // PVORUPvvmL |
| 3460 | UINT64_C(14231374822490767360), // PVORUPvvmL_v |
| 3461 | UINT64_C(14231374822490767360), // PVORUPvvm_v |
| 3462 | UINT64_C(14231374822490767360), // PVORUPvvml |
| 3463 | UINT64_C(14231374822490767360), // PVORUPvvml_v |
| 3464 | UINT64_C(14258396420254990336), // PVORmv |
| 3465 | UINT64_C(14258396420254990336), // PVORmvL |
| 3466 | UINT64_C(14258396420254990336), // PVORmvL_v |
| 3467 | UINT64_C(14258396420254990336), // PVORmv_v |
| 3468 | UINT64_C(14258396420254990336), // PVORmvl |
| 3469 | UINT64_C(14258396420254990336), // PVORmvl_v |
| 3470 | UINT64_C(14258396420254990336), // PVORmvm |
| 3471 | UINT64_C(14258396420254990336), // PVORmvmL |
| 3472 | UINT64_C(14258396420254990336), // PVORmvmL_v |
| 3473 | UINT64_C(14258396420254990336), // PVORmvm_v |
| 3474 | UINT64_C(14258396420254990336), // PVORmvml |
| 3475 | UINT64_C(14258396420254990336), // PVORmvml_v |
| 3476 | UINT64_C(14258537157743345664), // PVORrv |
| 3477 | UINT64_C(14258537157743345664), // PVORrvL |
| 3478 | UINT64_C(14258537157743345664), // PVORrvL_v |
| 3479 | UINT64_C(14258537157743345664), // PVORrv_v |
| 3480 | UINT64_C(14258537157743345664), // PVORrvl |
| 3481 | UINT64_C(14258537157743345664), // PVORrvl_v |
| 3482 | UINT64_C(14258537157743345664), // PVORrvm |
| 3483 | UINT64_C(14258537157743345664), // PVORrvmL |
| 3484 | UINT64_C(14258537157743345664), // PVORrvmL_v |
| 3485 | UINT64_C(14258537157743345664), // PVORrvm_v |
| 3486 | UINT64_C(14258537157743345664), // PVORrvml |
| 3487 | UINT64_C(14258537157743345664), // PVORrvml_v |
| 3488 | UINT64_C(14249389221000249344), // PVORvv |
| 3489 | UINT64_C(14249389221000249344), // PVORvvL |
| 3490 | UINT64_C(14249389221000249344), // PVORvvL_v |
| 3491 | UINT64_C(14249389221000249344), // PVORvv_v |
| 3492 | UINT64_C(14249389221000249344), // PVORvvl |
| 3493 | UINT64_C(14249389221000249344), // PVORvvl_v |
| 3494 | UINT64_C(14249389221000249344), // PVORvvm |
| 3495 | UINT64_C(14249389221000249344), // PVORvvmL |
| 3496 | UINT64_C(14249389221000249344), // PVORvvmL_v |
| 3497 | UINT64_C(14249389221000249344), // PVORvvm_v |
| 3498 | UINT64_C(14249389221000249344), // PVORvvml |
| 3499 | UINT64_C(14249389221000249344), // PVORvvml_v |
| 3500 | UINT64_C(12411920573033086976), // PVPCNTLOv |
| 3501 | UINT64_C(12411920573033086976), // PVPCNTLOvL |
| 3502 | UINT64_C(12411920573033086976), // PVPCNTLOvL_v |
| 3503 | UINT64_C(12411920573033086976), // PVPCNTLOv_v |
| 3504 | UINT64_C(12411920573033086976), // PVPCNTLOvl |
| 3505 | UINT64_C(12411920573033086976), // PVPCNTLOvl_v |
| 3506 | UINT64_C(12411920573033086976), // PVPCNTLOvm |
| 3507 | UINT64_C(12411920573033086976), // PVPCNTLOvmL |
| 3508 | UINT64_C(12411920573033086976), // PVPCNTLOvmL_v |
| 3509 | UINT64_C(12411920573033086976), // PVPCNTLOvm_v |
| 3510 | UINT64_C(12411920573033086976), // PVPCNTLOvml |
| 3511 | UINT64_C(12411920573033086976), // PVPCNTLOvml_v |
| 3512 | UINT64_C(12429934971542568960), // PVPCNTUPv |
| 3513 | UINT64_C(12429934971542568960), // PVPCNTUPvL |
| 3514 | UINT64_C(12429934971542568960), // PVPCNTUPvL_v |
| 3515 | UINT64_C(12429934971542568960), // PVPCNTUPv_v |
| 3516 | UINT64_C(12429934971542568960), // PVPCNTUPvl |
| 3517 | UINT64_C(12429934971542568960), // PVPCNTUPvl_v |
| 3518 | UINT64_C(12429934971542568960), // PVPCNTUPvm |
| 3519 | UINT64_C(12429934971542568960), // PVPCNTUPvmL |
| 3520 | UINT64_C(12429934971542568960), // PVPCNTUPvmL_v |
| 3521 | UINT64_C(12429934971542568960), // PVPCNTUPvm_v |
| 3522 | UINT64_C(12429934971542568960), // PVPCNTUPvml |
| 3523 | UINT64_C(12429934971542568960), // PVPCNTUPvml_v |
| 3524 | UINT64_C(12447949370052050944), // PVPCNTv |
| 3525 | UINT64_C(12447949370052050944), // PVPCNTvL |
| 3526 | UINT64_C(12447949370052050944), // PVPCNTvL_v |
| 3527 | UINT64_C(12447949370052050944), // PVPCNTv_v |
| 3528 | UINT64_C(12447949370052050944), // PVPCNTvl |
| 3529 | UINT64_C(12447949370052050944), // PVPCNTvl_v |
| 3530 | UINT64_C(12447949370052050944), // PVPCNTvm |
| 3531 | UINT64_C(12447949370052050944), // PVPCNTvmL |
| 3532 | UINT64_C(12447949370052050944), // PVPCNTvmL_v |
| 3533 | UINT64_C(12447949370052050944), // PVPCNTvm_v |
| 3534 | UINT64_C(12447949370052050944), // PVPCNTvml |
| 3535 | UINT64_C(12447949370052050944), // PVPCNTvml_v |
| 3536 | UINT64_C(16230973057043267584), // PVRCPLOv |
| 3537 | UINT64_C(16230973057043267584), // PVRCPLOvL |
| 3538 | UINT64_C(16230973057043267584), // PVRCPLOvL_v |
| 3539 | UINT64_C(16230973057043267584), // PVRCPLOv_v |
| 3540 | UINT64_C(16230973057043267584), // PVRCPLOvl |
| 3541 | UINT64_C(16230973057043267584), // PVRCPLOvl_v |
| 3542 | UINT64_C(16230973057043267584), // PVRCPLOvm |
| 3543 | UINT64_C(16230973057043267584), // PVRCPLOvmL |
| 3544 | UINT64_C(16230973057043267584), // PVRCPLOvmL_v |
| 3545 | UINT64_C(16230973057043267584), // PVRCPLOvm_v |
| 3546 | UINT64_C(16230973057043267584), // PVRCPLOvml |
| 3547 | UINT64_C(16230973057043267584), // PVRCPLOvml_v |
| 3548 | UINT64_C(16248987455552749568), // PVRCPUPv |
| 3549 | UINT64_C(16248987455552749568), // PVRCPUPvL |
| 3550 | UINT64_C(16248987455552749568), // PVRCPUPvL_v |
| 3551 | UINT64_C(16248987455552749568), // PVRCPUPv_v |
| 3552 | UINT64_C(16248987455552749568), // PVRCPUPvl |
| 3553 | UINT64_C(16248987455552749568), // PVRCPUPvl_v |
| 3554 | UINT64_C(16248987455552749568), // PVRCPUPvm |
| 3555 | UINT64_C(16248987455552749568), // PVRCPUPvmL |
| 3556 | UINT64_C(16248987455552749568), // PVRCPUPvmL_v |
| 3557 | UINT64_C(16248987455552749568), // PVRCPUPvm_v |
| 3558 | UINT64_C(16248987455552749568), // PVRCPUPvml |
| 3559 | UINT64_C(16248987455552749568), // PVRCPUPvml_v |
| 3560 | UINT64_C(16267001854062231552), // PVRCPv |
| 3561 | UINT64_C(16267001854062231552), // PVRCPvL |
| 3562 | UINT64_C(16267001854062231552), // PVRCPvL_v |
| 3563 | UINT64_C(16267001854062231552), // PVRCPv_v |
| 3564 | UINT64_C(16267001854062231552), // PVRCPvl |
| 3565 | UINT64_C(16267001854062231552), // PVRCPvl_v |
| 3566 | UINT64_C(16267001854062231552), // PVRCPvm |
| 3567 | UINT64_C(16267001854062231552), // PVRCPvmL |
| 3568 | UINT64_C(16267001854062231552), // PVRCPvmL_v |
| 3569 | UINT64_C(16267001854062231552), // PVRCPvm_v |
| 3570 | UINT64_C(16267001854062231552), // PVRCPvml |
| 3571 | UINT64_C(16267001854062231552), // PVRCPvml_v |
| 3572 | UINT64_C(17388398161277485056), // PVRSQRTLONEXv |
| 3573 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvL |
| 3574 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvL_v |
| 3575 | UINT64_C(17388398161277485056), // PVRSQRTLONEXv_v |
| 3576 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvl |
| 3577 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvl_v |
| 3578 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvm |
| 3579 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvmL |
| 3580 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvmL_v |
| 3581 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvm_v |
| 3582 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvml |
| 3583 | UINT64_C(17388398161277485056), // PVRSQRTLONEXvml_v |
| 3584 | UINT64_C(17383894561650114560), // PVRSQRTLOv |
| 3585 | UINT64_C(17383894561650114560), // PVRSQRTLOvL |
| 3586 | UINT64_C(17383894561650114560), // PVRSQRTLOvL_v |
| 3587 | UINT64_C(17383894561650114560), // PVRSQRTLOv_v |
| 3588 | UINT64_C(17383894561650114560), // PVRSQRTLOvl |
| 3589 | UINT64_C(17383894561650114560), // PVRSQRTLOvl_v |
| 3590 | UINT64_C(17383894561650114560), // PVRSQRTLOvm |
| 3591 | UINT64_C(17383894561650114560), // PVRSQRTLOvmL |
| 3592 | UINT64_C(17383894561650114560), // PVRSQRTLOvmL_v |
| 3593 | UINT64_C(17383894561650114560), // PVRSQRTLOvm_v |
| 3594 | UINT64_C(17383894561650114560), // PVRSQRTLOvml |
| 3595 | UINT64_C(17383894561650114560), // PVRSQRTLOvml_v |
| 3596 | UINT64_C(17424426958296449024), // PVRSQRTNEXv |
| 3597 | UINT64_C(17424426958296449024), // PVRSQRTNEXvL |
| 3598 | UINT64_C(17424426958296449024), // PVRSQRTNEXvL_v |
| 3599 | UINT64_C(17424426958296449024), // PVRSQRTNEXv_v |
| 3600 | UINT64_C(17424426958296449024), // PVRSQRTNEXvl |
| 3601 | UINT64_C(17424426958296449024), // PVRSQRTNEXvl_v |
| 3602 | UINT64_C(17424426958296449024), // PVRSQRTNEXvm |
| 3603 | UINT64_C(17424426958296449024), // PVRSQRTNEXvmL |
| 3604 | UINT64_C(17424426958296449024), // PVRSQRTNEXvmL_v |
| 3605 | UINT64_C(17424426958296449024), // PVRSQRTNEXvm_v |
| 3606 | UINT64_C(17424426958296449024), // PVRSQRTNEXvml |
| 3607 | UINT64_C(17424426958296449024), // PVRSQRTNEXvml_v |
| 3608 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXv |
| 3609 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvL |
| 3610 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvL_v |
| 3611 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXv_v |
| 3612 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvl |
| 3613 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvl_v |
| 3614 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvm |
| 3615 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvmL |
| 3616 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvmL_v |
| 3617 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvm_v |
| 3618 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvml |
| 3619 | UINT64_C(17406412559786967040), // PVRSQRTUPNEXvml_v |
| 3620 | UINT64_C(17401908960159596544), // PVRSQRTUPv |
| 3621 | UINT64_C(17401908960159596544), // PVRSQRTUPvL |
| 3622 | UINT64_C(17401908960159596544), // PVRSQRTUPvL_v |
| 3623 | UINT64_C(17401908960159596544), // PVRSQRTUPv_v |
| 3624 | UINT64_C(17401908960159596544), // PVRSQRTUPvl |
| 3625 | UINT64_C(17401908960159596544), // PVRSQRTUPvl_v |
| 3626 | UINT64_C(17401908960159596544), // PVRSQRTUPvm |
| 3627 | UINT64_C(17401908960159596544), // PVRSQRTUPvmL |
| 3628 | UINT64_C(17401908960159596544), // PVRSQRTUPvmL_v |
| 3629 | UINT64_C(17401908960159596544), // PVRSQRTUPvm_v |
| 3630 | UINT64_C(17401908960159596544), // PVRSQRTUPvml |
| 3631 | UINT64_C(17401908960159596544), // PVRSQRTUPvml_v |
| 3632 | UINT64_C(17419923358669078528), // PVRSQRTv |
| 3633 | UINT64_C(17419923358669078528), // PVRSQRTvL |
| 3634 | UINT64_C(17419923358669078528), // PVRSQRTvL_v |
| 3635 | UINT64_C(17419923358669078528), // PVRSQRTv_v |
| 3636 | UINT64_C(17419923358669078528), // PVRSQRTvl |
| 3637 | UINT64_C(17419923358669078528), // PVRSQRTvl_v |
| 3638 | UINT64_C(17419923358669078528), // PVRSQRTvm |
| 3639 | UINT64_C(17419923358669078528), // PVRSQRTvmL |
| 3640 | UINT64_C(17419923358669078528), // PVRSQRTvmL_v |
| 3641 | UINT64_C(17419923358669078528), // PVRSQRTvm_v |
| 3642 | UINT64_C(17419923358669078528), // PVRSQRTvml |
| 3643 | UINT64_C(17419923358669078528), // PVRSQRTvml_v |
| 3644 | UINT64_C(11078855083331420160), // PVSEQ |
| 3645 | UINT64_C(11078855083331420160), // PVSEQL |
| 3646 | UINT64_C(11042826286312456192), // PVSEQLO |
| 3647 | UINT64_C(11042826286312456192), // PVSEQLOL |
| 3648 | UINT64_C(11042826286312456192), // PVSEQLOL_v |
| 3649 | UINT64_C(11042826286312456192), // PVSEQLO_v |
| 3650 | UINT64_C(11042826286312456192), // PVSEQLOl |
| 3651 | UINT64_C(11042826286312456192), // PVSEQLOl_v |
| 3652 | UINT64_C(11042826286312456192), // PVSEQLOm |
| 3653 | UINT64_C(11042826286312456192), // PVSEQLOmL |
| 3654 | UINT64_C(11042826286312456192), // PVSEQLOmL_v |
| 3655 | UINT64_C(11042826286312456192), // PVSEQLOm_v |
| 3656 | UINT64_C(11042826286312456192), // PVSEQLOml |
| 3657 | UINT64_C(11042826286312456192), // PVSEQLOml_v |
| 3658 | UINT64_C(11078855083331420160), // PVSEQL_v |
| 3659 | UINT64_C(11060840684821938176), // PVSEQUP |
| 3660 | UINT64_C(11060840684821938176), // PVSEQUPL |
| 3661 | UINT64_C(11060840684821938176), // PVSEQUPL_v |
| 3662 | UINT64_C(11060840684821938176), // PVSEQUP_v |
| 3663 | UINT64_C(11060840684821938176), // PVSEQUPl |
| 3664 | UINT64_C(11060840684821938176), // PVSEQUPl_v |
| 3665 | UINT64_C(11060840684821938176), // PVSEQUPm |
| 3666 | UINT64_C(11060840684821938176), // PVSEQUPmL |
| 3667 | UINT64_C(11060840684821938176), // PVSEQUPmL_v |
| 3668 | UINT64_C(11060840684821938176), // PVSEQUPm_v |
| 3669 | UINT64_C(11060840684821938176), // PVSEQUPml |
| 3670 | UINT64_C(11060840684821938176), // PVSEQUPml_v |
| 3671 | UINT64_C(11078855083331420160), // PVSEQ_v |
| 3672 | UINT64_C(11078855083331420160), // PVSEQl |
| 3673 | UINT64_C(11078855083331420160), // PVSEQl_v |
| 3674 | UINT64_C(11078855083331420160), // PVSEQm |
| 3675 | UINT64_C(11078855083331420160), // PVSEQmL |
| 3676 | UINT64_C(11078855083331420160), // PVSEQmL_v |
| 3677 | UINT64_C(11078855083331420160), // PVSEQm_v |
| 3678 | UINT64_C(11078855083331420160), // PVSEQml |
| 3679 | UINT64_C(11078855083331420160), // PVSEQml_v |
| 3680 | UINT64_C(16600268226487648256), // PVSLALOvi |
| 3681 | UINT64_C(16600268226487648256), // PVSLALOviL |
| 3682 | UINT64_C(16600268226487648256), // PVSLALOviL_v |
| 3683 | UINT64_C(16600268226487648256), // PVSLALOvi_v |
| 3684 | UINT64_C(16600268226487648256), // PVSLALOvil |
| 3685 | UINT64_C(16600268226487648256), // PVSLALOvil_v |
| 3686 | UINT64_C(16600268226487648256), // PVSLALOvim |
| 3687 | UINT64_C(16600268226487648256), // PVSLALOvimL |
| 3688 | UINT64_C(16600268226487648256), // PVSLALOvimL_v |
| 3689 | UINT64_C(16600268226487648256), // PVSLALOvim_v |
| 3690 | UINT64_C(16600268226487648256), // PVSLALOviml |
| 3691 | UINT64_C(16600268226487648256), // PVSLALOviml_v |
| 3692 | UINT64_C(16600408963976003584), // PVSLALOvr |
| 3693 | UINT64_C(16600408963976003584), // PVSLALOvrL |
| 3694 | UINT64_C(16600408963976003584), // PVSLALOvrL_v |
| 3695 | UINT64_C(16600408963976003584), // PVSLALOvr_v |
| 3696 | UINT64_C(16600408963976003584), // PVSLALOvrl |
| 3697 | UINT64_C(16600408963976003584), // PVSLALOvrl_v |
| 3698 | UINT64_C(16600408963976003584), // PVSLALOvrm |
| 3699 | UINT64_C(16600408963976003584), // PVSLALOvrmL |
| 3700 | UINT64_C(16600408963976003584), // PVSLALOvrmL_v |
| 3701 | UINT64_C(16600408963976003584), // PVSLALOvrm_v |
| 3702 | UINT64_C(16600408963976003584), // PVSLALOvrml |
| 3703 | UINT64_C(16600408963976003584), // PVSLALOvrml_v |
| 3704 | UINT64_C(16591261027232907264), // PVSLALOvv |
| 3705 | UINT64_C(16591261027232907264), // PVSLALOvvL |
| 3706 | UINT64_C(16591261027232907264), // PVSLALOvvL_v |
| 3707 | UINT64_C(16591261027232907264), // PVSLALOvv_v |
| 3708 | UINT64_C(16591261027232907264), // PVSLALOvvl |
| 3709 | UINT64_C(16591261027232907264), // PVSLALOvvl_v |
| 3710 | UINT64_C(16591261027232907264), // PVSLALOvvm |
| 3711 | UINT64_C(16591261027232907264), // PVSLALOvvmL |
| 3712 | UINT64_C(16591261027232907264), // PVSLALOvvmL_v |
| 3713 | UINT64_C(16591261027232907264), // PVSLALOvvm_v |
| 3714 | UINT64_C(16591261027232907264), // PVSLALOvvml |
| 3715 | UINT64_C(16591261027232907264), // PVSLALOvvml_v |
| 3716 | UINT64_C(16618282624997130240), // PVSLAUPvi |
| 3717 | UINT64_C(16618282624997130240), // PVSLAUPviL |
| 3718 | UINT64_C(16618282624997130240), // PVSLAUPviL_v |
| 3719 | UINT64_C(16618282624997130240), // PVSLAUPvi_v |
| 3720 | UINT64_C(16618282624997130240), // PVSLAUPvil |
| 3721 | UINT64_C(16618282624997130240), // PVSLAUPvil_v |
| 3722 | UINT64_C(16618282624997130240), // PVSLAUPvim |
| 3723 | UINT64_C(16618282624997130240), // PVSLAUPvimL |
| 3724 | UINT64_C(16618282624997130240), // PVSLAUPvimL_v |
| 3725 | UINT64_C(16618282624997130240), // PVSLAUPvim_v |
| 3726 | UINT64_C(16618282624997130240), // PVSLAUPviml |
| 3727 | UINT64_C(16618282624997130240), // PVSLAUPviml_v |
| 3728 | UINT64_C(16618423362485485568), // PVSLAUPvr |
| 3729 | UINT64_C(16618423362485485568), // PVSLAUPvrL |
| 3730 | UINT64_C(16618423362485485568), // PVSLAUPvrL_v |
| 3731 | UINT64_C(16618423362485485568), // PVSLAUPvr_v |
| 3732 | UINT64_C(16618423362485485568), // PVSLAUPvrl |
| 3733 | UINT64_C(16618423362485485568), // PVSLAUPvrl_v |
| 3734 | UINT64_C(16618423362485485568), // PVSLAUPvrm |
| 3735 | UINT64_C(16618423362485485568), // PVSLAUPvrmL |
| 3736 | UINT64_C(16618423362485485568), // PVSLAUPvrmL_v |
| 3737 | UINT64_C(16618423362485485568), // PVSLAUPvrm_v |
| 3738 | UINT64_C(16618423362485485568), // PVSLAUPvrml |
| 3739 | UINT64_C(16618423362485485568), // PVSLAUPvrml_v |
| 3740 | UINT64_C(16609275425742389248), // PVSLAUPvv |
| 3741 | UINT64_C(16609275425742389248), // PVSLAUPvvL |
| 3742 | UINT64_C(16609275425742389248), // PVSLAUPvvL_v |
| 3743 | UINT64_C(16609275425742389248), // PVSLAUPvv_v |
| 3744 | UINT64_C(16609275425742389248), // PVSLAUPvvl |
| 3745 | UINT64_C(16609275425742389248), // PVSLAUPvvl_v |
| 3746 | UINT64_C(16609275425742389248), // PVSLAUPvvm |
| 3747 | UINT64_C(16609275425742389248), // PVSLAUPvvmL |
| 3748 | UINT64_C(16609275425742389248), // PVSLAUPvvmL_v |
| 3749 | UINT64_C(16609275425742389248), // PVSLAUPvvm_v |
| 3750 | UINT64_C(16609275425742389248), // PVSLAUPvvml |
| 3751 | UINT64_C(16609275425742389248), // PVSLAUPvvml_v |
| 3752 | UINT64_C(16636297023506612224), // PVSLAvi |
| 3753 | UINT64_C(16636297023506612224), // PVSLAviL |
| 3754 | UINT64_C(16636297023506612224), // PVSLAviL_v |
| 3755 | UINT64_C(16636297023506612224), // PVSLAvi_v |
| 3756 | UINT64_C(16636297023506612224), // PVSLAvil |
| 3757 | UINT64_C(16636297023506612224), // PVSLAvil_v |
| 3758 | UINT64_C(16636297023506612224), // PVSLAvim |
| 3759 | UINT64_C(16636297023506612224), // PVSLAvimL |
| 3760 | UINT64_C(16636297023506612224), // PVSLAvimL_v |
| 3761 | UINT64_C(16636297023506612224), // PVSLAvim_v |
| 3762 | UINT64_C(16636297023506612224), // PVSLAviml |
| 3763 | UINT64_C(16636297023506612224), // PVSLAviml_v |
| 3764 | UINT64_C(16636437760994967552), // PVSLAvr |
| 3765 | UINT64_C(16636437760994967552), // PVSLAvrL |
| 3766 | UINT64_C(16636437760994967552), // PVSLAvrL_v |
| 3767 | UINT64_C(16636437760994967552), // PVSLAvr_v |
| 3768 | UINT64_C(16636437760994967552), // PVSLAvrl |
| 3769 | UINT64_C(16636437760994967552), // PVSLAvrl_v |
| 3770 | UINT64_C(16636437760994967552), // PVSLAvrm |
| 3771 | UINT64_C(16636437760994967552), // PVSLAvrmL |
| 3772 | UINT64_C(16636437760994967552), // PVSLAvrmL_v |
| 3773 | UINT64_C(16636437760994967552), // PVSLAvrm_v |
| 3774 | UINT64_C(16636437760994967552), // PVSLAvrml |
| 3775 | UINT64_C(16636437760994967552), // PVSLAvrml_v |
| 3776 | UINT64_C(16627289824251871232), // PVSLAvv |
| 3777 | UINT64_C(16627289824251871232), // PVSLAvvL |
| 3778 | UINT64_C(16627289824251871232), // PVSLAvvL_v |
| 3779 | UINT64_C(16627289824251871232), // PVSLAvv_v |
| 3780 | UINT64_C(16627289824251871232), // PVSLAvvl |
| 3781 | UINT64_C(16627289824251871232), // PVSLAvvl_v |
| 3782 | UINT64_C(16627289824251871232), // PVSLAvvm |
| 3783 | UINT64_C(16627289824251871232), // PVSLAvvmL |
| 3784 | UINT64_C(16627289824251871232), // PVSLAvvmL_v |
| 3785 | UINT64_C(16627289824251871232), // PVSLAvvm_v |
| 3786 | UINT64_C(16627289824251871232), // PVSLAvvml |
| 3787 | UINT64_C(16627289824251871232), // PVSLAvvml_v |
| 3788 | UINT64_C(16528210632449720320), // PVSLLLOvi |
| 3789 | UINT64_C(16528210632449720320), // PVSLLLOviL |
| 3790 | UINT64_C(16528210632449720320), // PVSLLLOviL_v |
| 3791 | UINT64_C(16528210632449720320), // PVSLLLOvi_v |
| 3792 | UINT64_C(16528210632449720320), // PVSLLLOvil |
| 3793 | UINT64_C(16528210632449720320), // PVSLLLOvil_v |
| 3794 | UINT64_C(16528210632449720320), // PVSLLLOvim |
| 3795 | UINT64_C(16528210632449720320), // PVSLLLOvimL |
| 3796 | UINT64_C(16528210632449720320), // PVSLLLOvimL_v |
| 3797 | UINT64_C(16528210632449720320), // PVSLLLOvim_v |
| 3798 | UINT64_C(16528210632449720320), // PVSLLLOviml |
| 3799 | UINT64_C(16528210632449720320), // PVSLLLOviml_v |
| 3800 | UINT64_C(16528351369938075648), // PVSLLLOvr |
| 3801 | UINT64_C(16528351369938075648), // PVSLLLOvrL |
| 3802 | UINT64_C(16528351369938075648), // PVSLLLOvrL_v |
| 3803 | UINT64_C(16528351369938075648), // PVSLLLOvr_v |
| 3804 | UINT64_C(16528351369938075648), // PVSLLLOvrl |
| 3805 | UINT64_C(16528351369938075648), // PVSLLLOvrl_v |
| 3806 | UINT64_C(16528351369938075648), // PVSLLLOvrm |
| 3807 | UINT64_C(16528351369938075648), // PVSLLLOvrmL |
| 3808 | UINT64_C(16528351369938075648), // PVSLLLOvrmL_v |
| 3809 | UINT64_C(16528351369938075648), // PVSLLLOvrm_v |
| 3810 | UINT64_C(16528351369938075648), // PVSLLLOvrml |
| 3811 | UINT64_C(16528351369938075648), // PVSLLLOvrml_v |
| 3812 | UINT64_C(16519203433194979328), // PVSLLLOvv |
| 3813 | UINT64_C(16519203433194979328), // PVSLLLOvvL |
| 3814 | UINT64_C(16519203433194979328), // PVSLLLOvvL_v |
| 3815 | UINT64_C(16519203433194979328), // PVSLLLOvv_v |
| 3816 | UINT64_C(16519203433194979328), // PVSLLLOvvl |
| 3817 | UINT64_C(16519203433194979328), // PVSLLLOvvl_v |
| 3818 | UINT64_C(16519203433194979328), // PVSLLLOvvm |
| 3819 | UINT64_C(16519203433194979328), // PVSLLLOvvmL |
| 3820 | UINT64_C(16519203433194979328), // PVSLLLOvvmL_v |
| 3821 | UINT64_C(16519203433194979328), // PVSLLLOvvm_v |
| 3822 | UINT64_C(16519203433194979328), // PVSLLLOvvml |
| 3823 | UINT64_C(16519203433194979328), // PVSLLLOvvml_v |
| 3824 | UINT64_C(16546225030959202304), // PVSLLUPvi |
| 3825 | UINT64_C(16546225030959202304), // PVSLLUPviL |
| 3826 | UINT64_C(16546225030959202304), // PVSLLUPviL_v |
| 3827 | UINT64_C(16546225030959202304), // PVSLLUPvi_v |
| 3828 | UINT64_C(16546225030959202304), // PVSLLUPvil |
| 3829 | UINT64_C(16546225030959202304), // PVSLLUPvil_v |
| 3830 | UINT64_C(16546225030959202304), // PVSLLUPvim |
| 3831 | UINT64_C(16546225030959202304), // PVSLLUPvimL |
| 3832 | UINT64_C(16546225030959202304), // PVSLLUPvimL_v |
| 3833 | UINT64_C(16546225030959202304), // PVSLLUPvim_v |
| 3834 | UINT64_C(16546225030959202304), // PVSLLUPviml |
| 3835 | UINT64_C(16546225030959202304), // PVSLLUPviml_v |
| 3836 | UINT64_C(16546365768447557632), // PVSLLUPvr |
| 3837 | UINT64_C(16546365768447557632), // PVSLLUPvrL |
| 3838 | UINT64_C(16546365768447557632), // PVSLLUPvrL_v |
| 3839 | UINT64_C(16546365768447557632), // PVSLLUPvr_v |
| 3840 | UINT64_C(16546365768447557632), // PVSLLUPvrl |
| 3841 | UINT64_C(16546365768447557632), // PVSLLUPvrl_v |
| 3842 | UINT64_C(16546365768447557632), // PVSLLUPvrm |
| 3843 | UINT64_C(16546365768447557632), // PVSLLUPvrmL |
| 3844 | UINT64_C(16546365768447557632), // PVSLLUPvrmL_v |
| 3845 | UINT64_C(16546365768447557632), // PVSLLUPvrm_v |
| 3846 | UINT64_C(16546365768447557632), // PVSLLUPvrml |
| 3847 | UINT64_C(16546365768447557632), // PVSLLUPvrml_v |
| 3848 | UINT64_C(16537217831704461312), // PVSLLUPvv |
| 3849 | UINT64_C(16537217831704461312), // PVSLLUPvvL |
| 3850 | UINT64_C(16537217831704461312), // PVSLLUPvvL_v |
| 3851 | UINT64_C(16537217831704461312), // PVSLLUPvv_v |
| 3852 | UINT64_C(16537217831704461312), // PVSLLUPvvl |
| 3853 | UINT64_C(16537217831704461312), // PVSLLUPvvl_v |
| 3854 | UINT64_C(16537217831704461312), // PVSLLUPvvm |
| 3855 | UINT64_C(16537217831704461312), // PVSLLUPvvmL |
| 3856 | UINT64_C(16537217831704461312), // PVSLLUPvvmL_v |
| 3857 | UINT64_C(16537217831704461312), // PVSLLUPvvm_v |
| 3858 | UINT64_C(16537217831704461312), // PVSLLUPvvml |
| 3859 | UINT64_C(16537217831704461312), // PVSLLUPvvml_v |
| 3860 | UINT64_C(16564239429468684288), // PVSLLvi |
| 3861 | UINT64_C(16564239429468684288), // PVSLLviL |
| 3862 | UINT64_C(16564239429468684288), // PVSLLviL_v |
| 3863 | UINT64_C(16564239429468684288), // PVSLLvi_v |
| 3864 | UINT64_C(16564239429468684288), // PVSLLvil |
| 3865 | UINT64_C(16564239429468684288), // PVSLLvil_v |
| 3866 | UINT64_C(16564239429468684288), // PVSLLvim |
| 3867 | UINT64_C(16564239429468684288), // PVSLLvimL |
| 3868 | UINT64_C(16564239429468684288), // PVSLLvimL_v |
| 3869 | UINT64_C(16564239429468684288), // PVSLLvim_v |
| 3870 | UINT64_C(16564239429468684288), // PVSLLviml |
| 3871 | UINT64_C(16564239429468684288), // PVSLLviml_v |
| 3872 | UINT64_C(16564380166957039616), // PVSLLvr |
| 3873 | UINT64_C(16564380166957039616), // PVSLLvrL |
| 3874 | UINT64_C(16564380166957039616), // PVSLLvrL_v |
| 3875 | UINT64_C(16564380166957039616), // PVSLLvr_v |
| 3876 | UINT64_C(16564380166957039616), // PVSLLvrl |
| 3877 | UINT64_C(16564380166957039616), // PVSLLvrl_v |
| 3878 | UINT64_C(16564380166957039616), // PVSLLvrm |
| 3879 | UINT64_C(16564380166957039616), // PVSLLvrmL |
| 3880 | UINT64_C(16564380166957039616), // PVSLLvrmL_v |
| 3881 | UINT64_C(16564380166957039616), // PVSLLvrm_v |
| 3882 | UINT64_C(16564380166957039616), // PVSLLvrml |
| 3883 | UINT64_C(16564380166957039616), // PVSLLvrml_v |
| 3884 | UINT64_C(16555232230213943296), // PVSLLvv |
| 3885 | UINT64_C(16555232230213943296), // PVSLLvvL |
| 3886 | UINT64_C(16555232230213943296), // PVSLLvvL_v |
| 3887 | UINT64_C(16555232230213943296), // PVSLLvv_v |
| 3888 | UINT64_C(16555232230213943296), // PVSLLvvl |
| 3889 | UINT64_C(16555232230213943296), // PVSLLvvl_v |
| 3890 | UINT64_C(16555232230213943296), // PVSLLvvm |
| 3891 | UINT64_C(16555232230213943296), // PVSLLvvmL |
| 3892 | UINT64_C(16555232230213943296), // PVSLLvvmL_v |
| 3893 | UINT64_C(16555232230213943296), // PVSLLvvm_v |
| 3894 | UINT64_C(16555232230213943296), // PVSLLvvml |
| 3895 | UINT64_C(16555232230213943296), // PVSLLvvml_v |
| 3896 | UINT64_C(17753189731094495232), // PVSRALOvi |
| 3897 | UINT64_C(17753189731094495232), // PVSRALOviL |
| 3898 | UINT64_C(17753189731094495232), // PVSRALOviL_v |
| 3899 | UINT64_C(17753189731094495232), // PVSRALOvi_v |
| 3900 | UINT64_C(17753189731094495232), // PVSRALOvil |
| 3901 | UINT64_C(17753189731094495232), // PVSRALOvil_v |
| 3902 | UINT64_C(17753189731094495232), // PVSRALOvim |
| 3903 | UINT64_C(17753189731094495232), // PVSRALOvimL |
| 3904 | UINT64_C(17753189731094495232), // PVSRALOvimL_v |
| 3905 | UINT64_C(17753189731094495232), // PVSRALOvim_v |
| 3906 | UINT64_C(17753189731094495232), // PVSRALOviml |
| 3907 | UINT64_C(17753189731094495232), // PVSRALOviml_v |
| 3908 | UINT64_C(17753330468582850560), // PVSRALOvr |
| 3909 | UINT64_C(17753330468582850560), // PVSRALOvrL |
| 3910 | UINT64_C(17753330468582850560), // PVSRALOvrL_v |
| 3911 | UINT64_C(17753330468582850560), // PVSRALOvr_v |
| 3912 | UINT64_C(17753330468582850560), // PVSRALOvrl |
| 3913 | UINT64_C(17753330468582850560), // PVSRALOvrl_v |
| 3914 | UINT64_C(17753330468582850560), // PVSRALOvrm |
| 3915 | UINT64_C(17753330468582850560), // PVSRALOvrmL |
| 3916 | UINT64_C(17753330468582850560), // PVSRALOvrmL_v |
| 3917 | UINT64_C(17753330468582850560), // PVSRALOvrm_v |
| 3918 | UINT64_C(17753330468582850560), // PVSRALOvrml |
| 3919 | UINT64_C(17753330468582850560), // PVSRALOvrml_v |
| 3920 | UINT64_C(17744182531839754240), // PVSRALOvv |
| 3921 | UINT64_C(17744182531839754240), // PVSRALOvvL |
| 3922 | UINT64_C(17744182531839754240), // PVSRALOvvL_v |
| 3923 | UINT64_C(17744182531839754240), // PVSRALOvv_v |
| 3924 | UINT64_C(17744182531839754240), // PVSRALOvvl |
| 3925 | UINT64_C(17744182531839754240), // PVSRALOvvl_v |
| 3926 | UINT64_C(17744182531839754240), // PVSRALOvvm |
| 3927 | UINT64_C(17744182531839754240), // PVSRALOvvmL |
| 3928 | UINT64_C(17744182531839754240), // PVSRALOvvmL_v |
| 3929 | UINT64_C(17744182531839754240), // PVSRALOvvm_v |
| 3930 | UINT64_C(17744182531839754240), // PVSRALOvvml |
| 3931 | UINT64_C(17744182531839754240), // PVSRALOvvml_v |
| 3932 | UINT64_C(17771204129603977216), // PVSRAUPvi |
| 3933 | UINT64_C(17771204129603977216), // PVSRAUPviL |
| 3934 | UINT64_C(17771204129603977216), // PVSRAUPviL_v |
| 3935 | UINT64_C(17771204129603977216), // PVSRAUPvi_v |
| 3936 | UINT64_C(17771204129603977216), // PVSRAUPvil |
| 3937 | UINT64_C(17771204129603977216), // PVSRAUPvil_v |
| 3938 | UINT64_C(17771204129603977216), // PVSRAUPvim |
| 3939 | UINT64_C(17771204129603977216), // PVSRAUPvimL |
| 3940 | UINT64_C(17771204129603977216), // PVSRAUPvimL_v |
| 3941 | UINT64_C(17771204129603977216), // PVSRAUPvim_v |
| 3942 | UINT64_C(17771204129603977216), // PVSRAUPviml |
| 3943 | UINT64_C(17771204129603977216), // PVSRAUPviml_v |
| 3944 | UINT64_C(17771344867092332544), // PVSRAUPvr |
| 3945 | UINT64_C(17771344867092332544), // PVSRAUPvrL |
| 3946 | UINT64_C(17771344867092332544), // PVSRAUPvrL_v |
| 3947 | UINT64_C(17771344867092332544), // PVSRAUPvr_v |
| 3948 | UINT64_C(17771344867092332544), // PVSRAUPvrl |
| 3949 | UINT64_C(17771344867092332544), // PVSRAUPvrl_v |
| 3950 | UINT64_C(17771344867092332544), // PVSRAUPvrm |
| 3951 | UINT64_C(17771344867092332544), // PVSRAUPvrmL |
| 3952 | UINT64_C(17771344867092332544), // PVSRAUPvrmL_v |
| 3953 | UINT64_C(17771344867092332544), // PVSRAUPvrm_v |
| 3954 | UINT64_C(17771344867092332544), // PVSRAUPvrml |
| 3955 | UINT64_C(17771344867092332544), // PVSRAUPvrml_v |
| 3956 | UINT64_C(17762196930349236224), // PVSRAUPvv |
| 3957 | UINT64_C(17762196930349236224), // PVSRAUPvvL |
| 3958 | UINT64_C(17762196930349236224), // PVSRAUPvvL_v |
| 3959 | UINT64_C(17762196930349236224), // PVSRAUPvv_v |
| 3960 | UINT64_C(17762196930349236224), // PVSRAUPvvl |
| 3961 | UINT64_C(17762196930349236224), // PVSRAUPvvl_v |
| 3962 | UINT64_C(17762196930349236224), // PVSRAUPvvm |
| 3963 | UINT64_C(17762196930349236224), // PVSRAUPvvmL |
| 3964 | UINT64_C(17762196930349236224), // PVSRAUPvvmL_v |
| 3965 | UINT64_C(17762196930349236224), // PVSRAUPvvm_v |
| 3966 | UINT64_C(17762196930349236224), // PVSRAUPvvml |
| 3967 | UINT64_C(17762196930349236224), // PVSRAUPvvml_v |
| 3968 | UINT64_C(17789218528113459200), // PVSRAvi |
| 3969 | UINT64_C(17789218528113459200), // PVSRAviL |
| 3970 | UINT64_C(17789218528113459200), // PVSRAviL_v |
| 3971 | UINT64_C(17789218528113459200), // PVSRAvi_v |
| 3972 | UINT64_C(17789218528113459200), // PVSRAvil |
| 3973 | UINT64_C(17789218528113459200), // PVSRAvil_v |
| 3974 | UINT64_C(17789218528113459200), // PVSRAvim |
| 3975 | UINT64_C(17789218528113459200), // PVSRAvimL |
| 3976 | UINT64_C(17789218528113459200), // PVSRAvimL_v |
| 3977 | UINT64_C(17789218528113459200), // PVSRAvim_v |
| 3978 | UINT64_C(17789218528113459200), // PVSRAviml |
| 3979 | UINT64_C(17789218528113459200), // PVSRAviml_v |
| 3980 | UINT64_C(17789359265601814528), // PVSRAvr |
| 3981 | UINT64_C(17789359265601814528), // PVSRAvrL |
| 3982 | UINT64_C(17789359265601814528), // PVSRAvrL_v |
| 3983 | UINT64_C(17789359265601814528), // PVSRAvr_v |
| 3984 | UINT64_C(17789359265601814528), // PVSRAvrl |
| 3985 | UINT64_C(17789359265601814528), // PVSRAvrl_v |
| 3986 | UINT64_C(17789359265601814528), // PVSRAvrm |
| 3987 | UINT64_C(17789359265601814528), // PVSRAvrmL |
| 3988 | UINT64_C(17789359265601814528), // PVSRAvrmL_v |
| 3989 | UINT64_C(17789359265601814528), // PVSRAvrm_v |
| 3990 | UINT64_C(17789359265601814528), // PVSRAvrml |
| 3991 | UINT64_C(17789359265601814528), // PVSRAvrml_v |
| 3992 | UINT64_C(17780211328858718208), // PVSRAvv |
| 3993 | UINT64_C(17780211328858718208), // PVSRAvvL |
| 3994 | UINT64_C(17780211328858718208), // PVSRAvvL_v |
| 3995 | UINT64_C(17780211328858718208), // PVSRAvv_v |
| 3996 | UINT64_C(17780211328858718208), // PVSRAvvl |
| 3997 | UINT64_C(17780211328858718208), // PVSRAvvl_v |
| 3998 | UINT64_C(17780211328858718208), // PVSRAvvm |
| 3999 | UINT64_C(17780211328858718208), // PVSRAvvmL |
| 4000 | UINT64_C(17780211328858718208), // PVSRAvvmL_v |
| 4001 | UINT64_C(17780211328858718208), // PVSRAvvm_v |
| 4002 | UINT64_C(17780211328858718208), // PVSRAvvml |
| 4003 | UINT64_C(17780211328858718208), // PVSRAvvml_v |
| 4004 | UINT64_C(17681132137056567296), // PVSRLLOvi |
| 4005 | UINT64_C(17681132137056567296), // PVSRLLOviL |
| 4006 | UINT64_C(17681132137056567296), // PVSRLLOviL_v |
| 4007 | UINT64_C(17681132137056567296), // PVSRLLOvi_v |
| 4008 | UINT64_C(17681132137056567296), // PVSRLLOvil |
| 4009 | UINT64_C(17681132137056567296), // PVSRLLOvil_v |
| 4010 | UINT64_C(17681132137056567296), // PVSRLLOvim |
| 4011 | UINT64_C(17681132137056567296), // PVSRLLOvimL |
| 4012 | UINT64_C(17681132137056567296), // PVSRLLOvimL_v |
| 4013 | UINT64_C(17681132137056567296), // PVSRLLOvim_v |
| 4014 | UINT64_C(17681132137056567296), // PVSRLLOviml |
| 4015 | UINT64_C(17681132137056567296), // PVSRLLOviml_v |
| 4016 | UINT64_C(17681272874544922624), // PVSRLLOvr |
| 4017 | UINT64_C(17681272874544922624), // PVSRLLOvrL |
| 4018 | UINT64_C(17681272874544922624), // PVSRLLOvrL_v |
| 4019 | UINT64_C(17681272874544922624), // PVSRLLOvr_v |
| 4020 | UINT64_C(17681272874544922624), // PVSRLLOvrl |
| 4021 | UINT64_C(17681272874544922624), // PVSRLLOvrl_v |
| 4022 | UINT64_C(17681272874544922624), // PVSRLLOvrm |
| 4023 | UINT64_C(17681272874544922624), // PVSRLLOvrmL |
| 4024 | UINT64_C(17681272874544922624), // PVSRLLOvrmL_v |
| 4025 | UINT64_C(17681272874544922624), // PVSRLLOvrm_v |
| 4026 | UINT64_C(17681272874544922624), // PVSRLLOvrml |
| 4027 | UINT64_C(17681272874544922624), // PVSRLLOvrml_v |
| 4028 | UINT64_C(17672124937801826304), // PVSRLLOvv |
| 4029 | UINT64_C(17672124937801826304), // PVSRLLOvvL |
| 4030 | UINT64_C(17672124937801826304), // PVSRLLOvvL_v |
| 4031 | UINT64_C(17672124937801826304), // PVSRLLOvv_v |
| 4032 | UINT64_C(17672124937801826304), // PVSRLLOvvl |
| 4033 | UINT64_C(17672124937801826304), // PVSRLLOvvl_v |
| 4034 | UINT64_C(17672124937801826304), // PVSRLLOvvm |
| 4035 | UINT64_C(17672124937801826304), // PVSRLLOvvmL |
| 4036 | UINT64_C(17672124937801826304), // PVSRLLOvvmL_v |
| 4037 | UINT64_C(17672124937801826304), // PVSRLLOvvm_v |
| 4038 | UINT64_C(17672124937801826304), // PVSRLLOvvml |
| 4039 | UINT64_C(17672124937801826304), // PVSRLLOvvml_v |
| 4040 | UINT64_C(17699146535566049280), // PVSRLUPvi |
| 4041 | UINT64_C(17699146535566049280), // PVSRLUPviL |
| 4042 | UINT64_C(17699146535566049280), // PVSRLUPviL_v |
| 4043 | UINT64_C(17699146535566049280), // PVSRLUPvi_v |
| 4044 | UINT64_C(17699146535566049280), // PVSRLUPvil |
| 4045 | UINT64_C(17699146535566049280), // PVSRLUPvil_v |
| 4046 | UINT64_C(17699146535566049280), // PVSRLUPvim |
| 4047 | UINT64_C(17699146535566049280), // PVSRLUPvimL |
| 4048 | UINT64_C(17699146535566049280), // PVSRLUPvimL_v |
| 4049 | UINT64_C(17699146535566049280), // PVSRLUPvim_v |
| 4050 | UINT64_C(17699146535566049280), // PVSRLUPviml |
| 4051 | UINT64_C(17699146535566049280), // PVSRLUPviml_v |
| 4052 | UINT64_C(17699287273054404608), // PVSRLUPvr |
| 4053 | UINT64_C(17699287273054404608), // PVSRLUPvrL |
| 4054 | UINT64_C(17699287273054404608), // PVSRLUPvrL_v |
| 4055 | UINT64_C(17699287273054404608), // PVSRLUPvr_v |
| 4056 | UINT64_C(17699287273054404608), // PVSRLUPvrl |
| 4057 | UINT64_C(17699287273054404608), // PVSRLUPvrl_v |
| 4058 | UINT64_C(17699287273054404608), // PVSRLUPvrm |
| 4059 | UINT64_C(17699287273054404608), // PVSRLUPvrmL |
| 4060 | UINT64_C(17699287273054404608), // PVSRLUPvrmL_v |
| 4061 | UINT64_C(17699287273054404608), // PVSRLUPvrm_v |
| 4062 | UINT64_C(17699287273054404608), // PVSRLUPvrml |
| 4063 | UINT64_C(17699287273054404608), // PVSRLUPvrml_v |
| 4064 | UINT64_C(17690139336311308288), // PVSRLUPvv |
| 4065 | UINT64_C(17690139336311308288), // PVSRLUPvvL |
| 4066 | UINT64_C(17690139336311308288), // PVSRLUPvvL_v |
| 4067 | UINT64_C(17690139336311308288), // PVSRLUPvv_v |
| 4068 | UINT64_C(17690139336311308288), // PVSRLUPvvl |
| 4069 | UINT64_C(17690139336311308288), // PVSRLUPvvl_v |
| 4070 | UINT64_C(17690139336311308288), // PVSRLUPvvm |
| 4071 | UINT64_C(17690139336311308288), // PVSRLUPvvmL |
| 4072 | UINT64_C(17690139336311308288), // PVSRLUPvvmL_v |
| 4073 | UINT64_C(17690139336311308288), // PVSRLUPvvm_v |
| 4074 | UINT64_C(17690139336311308288), // PVSRLUPvvml |
| 4075 | UINT64_C(17690139336311308288), // PVSRLUPvvml_v |
| 4076 | UINT64_C(17717160934075531264), // PVSRLvi |
| 4077 | UINT64_C(17717160934075531264), // PVSRLviL |
| 4078 | UINT64_C(17717160934075531264), // PVSRLviL_v |
| 4079 | UINT64_C(17717160934075531264), // PVSRLvi_v |
| 4080 | UINT64_C(17717160934075531264), // PVSRLvil |
| 4081 | UINT64_C(17717160934075531264), // PVSRLvil_v |
| 4082 | UINT64_C(17717160934075531264), // PVSRLvim |
| 4083 | UINT64_C(17717160934075531264), // PVSRLvimL |
| 4084 | UINT64_C(17717160934075531264), // PVSRLvimL_v |
| 4085 | UINT64_C(17717160934075531264), // PVSRLvim_v |
| 4086 | UINT64_C(17717160934075531264), // PVSRLviml |
| 4087 | UINT64_C(17717160934075531264), // PVSRLviml_v |
| 4088 | UINT64_C(17717301671563886592), // PVSRLvr |
| 4089 | UINT64_C(17717301671563886592), // PVSRLvrL |
| 4090 | UINT64_C(17717301671563886592), // PVSRLvrL_v |
| 4091 | UINT64_C(17717301671563886592), // PVSRLvr_v |
| 4092 | UINT64_C(17717301671563886592), // PVSRLvrl |
| 4093 | UINT64_C(17717301671563886592), // PVSRLvrl_v |
| 4094 | UINT64_C(17717301671563886592), // PVSRLvrm |
| 4095 | UINT64_C(17717301671563886592), // PVSRLvrmL |
| 4096 | UINT64_C(17717301671563886592), // PVSRLvrmL_v |
| 4097 | UINT64_C(17717301671563886592), // PVSRLvrm_v |
| 4098 | UINT64_C(17717301671563886592), // PVSRLvrml |
| 4099 | UINT64_C(17717301671563886592), // PVSRLvrml_v |
| 4100 | UINT64_C(17708153734820790272), // PVSRLvv |
| 4101 | UINT64_C(17708153734820790272), // PVSRLvvL |
| 4102 | UINT64_C(17708153734820790272), // PVSRLvvL_v |
| 4103 | UINT64_C(17708153734820790272), // PVSRLvv_v |
| 4104 | UINT64_C(17708153734820790272), // PVSRLvvl |
| 4105 | UINT64_C(17708153734820790272), // PVSRLvvl_v |
| 4106 | UINT64_C(17708153734820790272), // PVSRLvvm |
| 4107 | UINT64_C(17708153734820790272), // PVSRLvvmL |
| 4108 | UINT64_C(17708153734820790272), // PVSRLvvmL_v |
| 4109 | UINT64_C(17708153734820790272), // PVSRLvvm_v |
| 4110 | UINT64_C(17708153734820790272), // PVSRLvvml |
| 4111 | UINT64_C(17708153734820790272), // PVSRLvvml_v |
| 4112 | UINT64_C(15735577098032513024), // PVSUBSLOiv |
| 4113 | UINT64_C(15735577098032513024), // PVSUBSLOivL |
| 4114 | UINT64_C(15735577098032513024), // PVSUBSLOivL_v |
| 4115 | UINT64_C(15735577098032513024), // PVSUBSLOiv_v |
| 4116 | UINT64_C(15735577098032513024), // PVSUBSLOivl |
| 4117 | UINT64_C(15735577098032513024), // PVSUBSLOivl_v |
| 4118 | UINT64_C(15735577098032513024), // PVSUBSLOivm |
| 4119 | UINT64_C(15735577098032513024), // PVSUBSLOivmL |
| 4120 | UINT64_C(15735577098032513024), // PVSUBSLOivmL_v |
| 4121 | UINT64_C(15735577098032513024), // PVSUBSLOivm_v |
| 4122 | UINT64_C(15735577098032513024), // PVSUBSLOivml |
| 4123 | UINT64_C(15735577098032513024), // PVSUBSLOivml_v |
| 4124 | UINT64_C(15735717835520868352), // PVSUBSLOrv |
| 4125 | UINT64_C(15735717835520868352), // PVSUBSLOrvL |
| 4126 | UINT64_C(15735717835520868352), // PVSUBSLOrvL_v |
| 4127 | UINT64_C(15735717835520868352), // PVSUBSLOrv_v |
| 4128 | UINT64_C(15735717835520868352), // PVSUBSLOrvl |
| 4129 | UINT64_C(15735717835520868352), // PVSUBSLOrvl_v |
| 4130 | UINT64_C(15735717835520868352), // PVSUBSLOrvm |
| 4131 | UINT64_C(15735717835520868352), // PVSUBSLOrvmL |
| 4132 | UINT64_C(15735717835520868352), // PVSUBSLOrvmL_v |
| 4133 | UINT64_C(15735717835520868352), // PVSUBSLOrvm_v |
| 4134 | UINT64_C(15735717835520868352), // PVSUBSLOrvml |
| 4135 | UINT64_C(15735717835520868352), // PVSUBSLOrvml_v |
| 4136 | UINT64_C(15726569898777772032), // PVSUBSLOvv |
| 4137 | UINT64_C(15726569898777772032), // PVSUBSLOvvL |
| 4138 | UINT64_C(15726569898777772032), // PVSUBSLOvvL_v |
| 4139 | UINT64_C(15726569898777772032), // PVSUBSLOvv_v |
| 4140 | UINT64_C(15726569898777772032), // PVSUBSLOvvl |
| 4141 | UINT64_C(15726569898777772032), // PVSUBSLOvvl_v |
| 4142 | UINT64_C(15726569898777772032), // PVSUBSLOvvm |
| 4143 | UINT64_C(15726569898777772032), // PVSUBSLOvvmL |
| 4144 | UINT64_C(15726569898777772032), // PVSUBSLOvvmL_v |
| 4145 | UINT64_C(15726569898777772032), // PVSUBSLOvvm_v |
| 4146 | UINT64_C(15726569898777772032), // PVSUBSLOvvml |
| 4147 | UINT64_C(15726569898777772032), // PVSUBSLOvvml_v |
| 4148 | UINT64_C(15753591496541995008), // PVSUBSUPiv |
| 4149 | UINT64_C(15753591496541995008), // PVSUBSUPivL |
| 4150 | UINT64_C(15753591496541995008), // PVSUBSUPivL_v |
| 4151 | UINT64_C(15753591496541995008), // PVSUBSUPiv_v |
| 4152 | UINT64_C(15753591496541995008), // PVSUBSUPivl |
| 4153 | UINT64_C(15753591496541995008), // PVSUBSUPivl_v |
| 4154 | UINT64_C(15753591496541995008), // PVSUBSUPivm |
| 4155 | UINT64_C(15753591496541995008), // PVSUBSUPivmL |
| 4156 | UINT64_C(15753591496541995008), // PVSUBSUPivmL_v |
| 4157 | UINT64_C(15753591496541995008), // PVSUBSUPivm_v |
| 4158 | UINT64_C(15753591496541995008), // PVSUBSUPivml |
| 4159 | UINT64_C(15753591496541995008), // PVSUBSUPivml_v |
| 4160 | UINT64_C(15753732234030350336), // PVSUBSUPrv |
| 4161 | UINT64_C(15753732234030350336), // PVSUBSUPrvL |
| 4162 | UINT64_C(15753732234030350336), // PVSUBSUPrvL_v |
| 4163 | UINT64_C(15753732234030350336), // PVSUBSUPrv_v |
| 4164 | UINT64_C(15753732234030350336), // PVSUBSUPrvl |
| 4165 | UINT64_C(15753732234030350336), // PVSUBSUPrvl_v |
| 4166 | UINT64_C(15753732234030350336), // PVSUBSUPrvm |
| 4167 | UINT64_C(15753732234030350336), // PVSUBSUPrvmL |
| 4168 | UINT64_C(15753732234030350336), // PVSUBSUPrvmL_v |
| 4169 | UINT64_C(15753732234030350336), // PVSUBSUPrvm_v |
| 4170 | UINT64_C(15753732234030350336), // PVSUBSUPrvml |
| 4171 | UINT64_C(15753732234030350336), // PVSUBSUPrvml_v |
| 4172 | UINT64_C(15744584297287254016), // PVSUBSUPvv |
| 4173 | UINT64_C(15744584297287254016), // PVSUBSUPvvL |
| 4174 | UINT64_C(15744584297287254016), // PVSUBSUPvvL_v |
| 4175 | UINT64_C(15744584297287254016), // PVSUBSUPvv_v |
| 4176 | UINT64_C(15744584297287254016), // PVSUBSUPvvl |
| 4177 | UINT64_C(15744584297287254016), // PVSUBSUPvvl_v |
| 4178 | UINT64_C(15744584297287254016), // PVSUBSUPvvm |
| 4179 | UINT64_C(15744584297287254016), // PVSUBSUPvvmL |
| 4180 | UINT64_C(15744584297287254016), // PVSUBSUPvvmL_v |
| 4181 | UINT64_C(15744584297287254016), // PVSUBSUPvvm_v |
| 4182 | UINT64_C(15744584297287254016), // PVSUBSUPvvml |
| 4183 | UINT64_C(15744584297287254016), // PVSUBSUPvvml_v |
| 4184 | UINT64_C(15771605895051476992), // PVSUBSiv |
| 4185 | UINT64_C(15771605895051476992), // PVSUBSivL |
| 4186 | UINT64_C(15771605895051476992), // PVSUBSivL_v |
| 4187 | UINT64_C(15771605895051476992), // PVSUBSiv_v |
| 4188 | UINT64_C(15771605895051476992), // PVSUBSivl |
| 4189 | UINT64_C(15771605895051476992), // PVSUBSivl_v |
| 4190 | UINT64_C(15771605895051476992), // PVSUBSivm |
| 4191 | UINT64_C(15771605895051476992), // PVSUBSivmL |
| 4192 | UINT64_C(15771605895051476992), // PVSUBSivmL_v |
| 4193 | UINT64_C(15771605895051476992), // PVSUBSivm_v |
| 4194 | UINT64_C(15771605895051476992), // PVSUBSivml |
| 4195 | UINT64_C(15771605895051476992), // PVSUBSivml_v |
| 4196 | UINT64_C(15771746632539832320), // PVSUBSrv |
| 4197 | UINT64_C(15771746632539832320), // PVSUBSrvL |
| 4198 | UINT64_C(15771746632539832320), // PVSUBSrvL_v |
| 4199 | UINT64_C(15771746632539832320), // PVSUBSrv_v |
| 4200 | UINT64_C(15771746632539832320), // PVSUBSrvl |
| 4201 | UINT64_C(15771746632539832320), // PVSUBSrvl_v |
| 4202 | UINT64_C(15771746632539832320), // PVSUBSrvm |
| 4203 | UINT64_C(15771746632539832320), // PVSUBSrvmL |
| 4204 | UINT64_C(15771746632539832320), // PVSUBSrvmL_v |
| 4205 | UINT64_C(15771746632539832320), // PVSUBSrvm_v |
| 4206 | UINT64_C(15771746632539832320), // PVSUBSrvml |
| 4207 | UINT64_C(15771746632539832320), // PVSUBSrvml_v |
| 4208 | UINT64_C(15762598695796736000), // PVSUBSvv |
| 4209 | UINT64_C(15762598695796736000), // PVSUBSvvL |
| 4210 | UINT64_C(15762598695796736000), // PVSUBSvvL_v |
| 4211 | UINT64_C(15762598695796736000), // PVSUBSvv_v |
| 4212 | UINT64_C(15762598695796736000), // PVSUBSvvl |
| 4213 | UINT64_C(15762598695796736000), // PVSUBSvvl_v |
| 4214 | UINT64_C(15762598695796736000), // PVSUBSvvm |
| 4215 | UINT64_C(15762598695796736000), // PVSUBSvvmL |
| 4216 | UINT64_C(15762598695796736000), // PVSUBSvvmL_v |
| 4217 | UINT64_C(15762598695796736000), // PVSUBSvvm_v |
| 4218 | UINT64_C(15762598695796736000), // PVSUBSvvml |
| 4219 | UINT64_C(15762598695796736000), // PVSUBSvvml_v |
| 4220 | UINT64_C(15591461909956657152), // PVSUBULOiv |
| 4221 | UINT64_C(15591461909956657152), // PVSUBULOivL |
| 4222 | UINT64_C(15591461909956657152), // PVSUBULOivL_v |
| 4223 | UINT64_C(15591461909956657152), // PVSUBULOiv_v |
| 4224 | UINT64_C(15591461909956657152), // PVSUBULOivl |
| 4225 | UINT64_C(15591461909956657152), // PVSUBULOivl_v |
| 4226 | UINT64_C(15591461909956657152), // PVSUBULOivm |
| 4227 | UINT64_C(15591461909956657152), // PVSUBULOivmL |
| 4228 | UINT64_C(15591461909956657152), // PVSUBULOivmL_v |
| 4229 | UINT64_C(15591461909956657152), // PVSUBULOivm_v |
| 4230 | UINT64_C(15591461909956657152), // PVSUBULOivml |
| 4231 | UINT64_C(15591461909956657152), // PVSUBULOivml_v |
| 4232 | UINT64_C(15591602647445012480), // PVSUBULOrv |
| 4233 | UINT64_C(15591602647445012480), // PVSUBULOrvL |
| 4234 | UINT64_C(15591602647445012480), // PVSUBULOrvL_v |
| 4235 | UINT64_C(15591602647445012480), // PVSUBULOrv_v |
| 4236 | UINT64_C(15591602647445012480), // PVSUBULOrvl |
| 4237 | UINT64_C(15591602647445012480), // PVSUBULOrvl_v |
| 4238 | UINT64_C(15591602647445012480), // PVSUBULOrvm |
| 4239 | UINT64_C(15591602647445012480), // PVSUBULOrvmL |
| 4240 | UINT64_C(15591602647445012480), // PVSUBULOrvmL_v |
| 4241 | UINT64_C(15591602647445012480), // PVSUBULOrvm_v |
| 4242 | UINT64_C(15591602647445012480), // PVSUBULOrvml |
| 4243 | UINT64_C(15591602647445012480), // PVSUBULOrvml_v |
| 4244 | UINT64_C(15582454710701916160), // PVSUBULOvv |
| 4245 | UINT64_C(15582454710701916160), // PVSUBULOvvL |
| 4246 | UINT64_C(15582454710701916160), // PVSUBULOvvL_v |
| 4247 | UINT64_C(15582454710701916160), // PVSUBULOvv_v |
| 4248 | UINT64_C(15582454710701916160), // PVSUBULOvvl |
| 4249 | UINT64_C(15582454710701916160), // PVSUBULOvvl_v |
| 4250 | UINT64_C(15582454710701916160), // PVSUBULOvvm |
| 4251 | UINT64_C(15582454710701916160), // PVSUBULOvvmL |
| 4252 | UINT64_C(15582454710701916160), // PVSUBULOvvmL_v |
| 4253 | UINT64_C(15582454710701916160), // PVSUBULOvvm_v |
| 4254 | UINT64_C(15582454710701916160), // PVSUBULOvvml |
| 4255 | UINT64_C(15582454710701916160), // PVSUBULOvvml_v |
| 4256 | UINT64_C(15609476308466139136), // PVSUBUUPiv |
| 4257 | UINT64_C(15609476308466139136), // PVSUBUUPivL |
| 4258 | UINT64_C(15609476308466139136), // PVSUBUUPivL_v |
| 4259 | UINT64_C(15609476308466139136), // PVSUBUUPiv_v |
| 4260 | UINT64_C(15609476308466139136), // PVSUBUUPivl |
| 4261 | UINT64_C(15609476308466139136), // PVSUBUUPivl_v |
| 4262 | UINT64_C(15609476308466139136), // PVSUBUUPivm |
| 4263 | UINT64_C(15609476308466139136), // PVSUBUUPivmL |
| 4264 | UINT64_C(15609476308466139136), // PVSUBUUPivmL_v |
| 4265 | UINT64_C(15609476308466139136), // PVSUBUUPivm_v |
| 4266 | UINT64_C(15609476308466139136), // PVSUBUUPivml |
| 4267 | UINT64_C(15609476308466139136), // PVSUBUUPivml_v |
| 4268 | UINT64_C(15609617045954494464), // PVSUBUUPrv |
| 4269 | UINT64_C(15609617045954494464), // PVSUBUUPrvL |
| 4270 | UINT64_C(15609617045954494464), // PVSUBUUPrvL_v |
| 4271 | UINT64_C(15609617045954494464), // PVSUBUUPrv_v |
| 4272 | UINT64_C(15609617045954494464), // PVSUBUUPrvl |
| 4273 | UINT64_C(15609617045954494464), // PVSUBUUPrvl_v |
| 4274 | UINT64_C(15609617045954494464), // PVSUBUUPrvm |
| 4275 | UINT64_C(15609617045954494464), // PVSUBUUPrvmL |
| 4276 | UINT64_C(15609617045954494464), // PVSUBUUPrvmL_v |
| 4277 | UINT64_C(15609617045954494464), // PVSUBUUPrvm_v |
| 4278 | UINT64_C(15609617045954494464), // PVSUBUUPrvml |
| 4279 | UINT64_C(15609617045954494464), // PVSUBUUPrvml_v |
| 4280 | UINT64_C(15600469109211398144), // PVSUBUUPvv |
| 4281 | UINT64_C(15600469109211398144), // PVSUBUUPvvL |
| 4282 | UINT64_C(15600469109211398144), // PVSUBUUPvvL_v |
| 4283 | UINT64_C(15600469109211398144), // PVSUBUUPvv_v |
| 4284 | UINT64_C(15600469109211398144), // PVSUBUUPvvl |
| 4285 | UINT64_C(15600469109211398144), // PVSUBUUPvvl_v |
| 4286 | UINT64_C(15600469109211398144), // PVSUBUUPvvm |
| 4287 | UINT64_C(15600469109211398144), // PVSUBUUPvvmL |
| 4288 | UINT64_C(15600469109211398144), // PVSUBUUPvvmL_v |
| 4289 | UINT64_C(15600469109211398144), // PVSUBUUPvvm_v |
| 4290 | UINT64_C(15600469109211398144), // PVSUBUUPvvml |
| 4291 | UINT64_C(15600469109211398144), // PVSUBUUPvvml_v |
| 4292 | UINT64_C(15627490706975621120), // PVSUBUiv |
| 4293 | UINT64_C(15627490706975621120), // PVSUBUivL |
| 4294 | UINT64_C(15627490706975621120), // PVSUBUivL_v |
| 4295 | UINT64_C(15627490706975621120), // PVSUBUiv_v |
| 4296 | UINT64_C(15627490706975621120), // PVSUBUivl |
| 4297 | UINT64_C(15627490706975621120), // PVSUBUivl_v |
| 4298 | UINT64_C(15627490706975621120), // PVSUBUivm |
| 4299 | UINT64_C(15627490706975621120), // PVSUBUivmL |
| 4300 | UINT64_C(15627490706975621120), // PVSUBUivmL_v |
| 4301 | UINT64_C(15627490706975621120), // PVSUBUivm_v |
| 4302 | UINT64_C(15627490706975621120), // PVSUBUivml |
| 4303 | UINT64_C(15627490706975621120), // PVSUBUivml_v |
| 4304 | UINT64_C(15627631444463976448), // PVSUBUrv |
| 4305 | UINT64_C(15627631444463976448), // PVSUBUrvL |
| 4306 | UINT64_C(15627631444463976448), // PVSUBUrvL_v |
| 4307 | UINT64_C(15627631444463976448), // PVSUBUrv_v |
| 4308 | UINT64_C(15627631444463976448), // PVSUBUrvl |
| 4309 | UINT64_C(15627631444463976448), // PVSUBUrvl_v |
| 4310 | UINT64_C(15627631444463976448), // PVSUBUrvm |
| 4311 | UINT64_C(15627631444463976448), // PVSUBUrvmL |
| 4312 | UINT64_C(15627631444463976448), // PVSUBUrvmL_v |
| 4313 | UINT64_C(15627631444463976448), // PVSUBUrvm_v |
| 4314 | UINT64_C(15627631444463976448), // PVSUBUrvml |
| 4315 | UINT64_C(15627631444463976448), // PVSUBUrvml_v |
| 4316 | UINT64_C(15618483507720880128), // PVSUBUvv |
| 4317 | UINT64_C(15618483507720880128), // PVSUBUvvL |
| 4318 | UINT64_C(15618483507720880128), // PVSUBUvvL_v |
| 4319 | UINT64_C(15618483507720880128), // PVSUBUvv_v |
| 4320 | UINT64_C(15618483507720880128), // PVSUBUvvl |
| 4321 | UINT64_C(15618483507720880128), // PVSUBUvvl_v |
| 4322 | UINT64_C(15618483507720880128), // PVSUBUvvm |
| 4323 | UINT64_C(15618483507720880128), // PVSUBUvvmL |
| 4324 | UINT64_C(15618483507720880128), // PVSUBUvvmL_v |
| 4325 | UINT64_C(15618483507720880128), // PVSUBUvvm_v |
| 4326 | UINT64_C(15618483507720880128), // PVSUBUvvml |
| 4327 | UINT64_C(15618483507720880128), // PVSUBUvvml_v |
| 4328 | UINT64_C(14294425217273954304), // PVXORLOmv |
| 4329 | UINT64_C(14294425217273954304), // PVXORLOmvL |
| 4330 | UINT64_C(14294425217273954304), // PVXORLOmvL_v |
| 4331 | UINT64_C(14294425217273954304), // PVXORLOmv_v |
| 4332 | UINT64_C(14294425217273954304), // PVXORLOmvl |
| 4333 | UINT64_C(14294425217273954304), // PVXORLOmvl_v |
| 4334 | UINT64_C(14294425217273954304), // PVXORLOmvm |
| 4335 | UINT64_C(14294425217273954304), // PVXORLOmvmL |
| 4336 | UINT64_C(14294425217273954304), // PVXORLOmvmL_v |
| 4337 | UINT64_C(14294425217273954304), // PVXORLOmvm_v |
| 4338 | UINT64_C(14294425217273954304), // PVXORLOmvml |
| 4339 | UINT64_C(14294425217273954304), // PVXORLOmvml_v |
| 4340 | UINT64_C(14294565954762309632), // PVXORLOrv |
| 4341 | UINT64_C(14294565954762309632), // PVXORLOrvL |
| 4342 | UINT64_C(14294565954762309632), // PVXORLOrvL_v |
| 4343 | UINT64_C(14294565954762309632), // PVXORLOrv_v |
| 4344 | UINT64_C(14294565954762309632), // PVXORLOrvl |
| 4345 | UINT64_C(14294565954762309632), // PVXORLOrvl_v |
| 4346 | UINT64_C(14294565954762309632), // PVXORLOrvm |
| 4347 | UINT64_C(14294565954762309632), // PVXORLOrvmL |
| 4348 | UINT64_C(14294565954762309632), // PVXORLOrvmL_v |
| 4349 | UINT64_C(14294565954762309632), // PVXORLOrvm_v |
| 4350 | UINT64_C(14294565954762309632), // PVXORLOrvml |
| 4351 | UINT64_C(14294565954762309632), // PVXORLOrvml_v |
| 4352 | UINT64_C(14285418018019213312), // PVXORLOvv |
| 4353 | UINT64_C(14285418018019213312), // PVXORLOvvL |
| 4354 | UINT64_C(14285418018019213312), // PVXORLOvvL_v |
| 4355 | UINT64_C(14285418018019213312), // PVXORLOvv_v |
| 4356 | UINT64_C(14285418018019213312), // PVXORLOvvl |
| 4357 | UINT64_C(14285418018019213312), // PVXORLOvvl_v |
| 4358 | UINT64_C(14285418018019213312), // PVXORLOvvm |
| 4359 | UINT64_C(14285418018019213312), // PVXORLOvvmL |
| 4360 | UINT64_C(14285418018019213312), // PVXORLOvvmL_v |
| 4361 | UINT64_C(14285418018019213312), // PVXORLOvvm_v |
| 4362 | UINT64_C(14285418018019213312), // PVXORLOvvml |
| 4363 | UINT64_C(14285418018019213312), // PVXORLOvvml_v |
| 4364 | UINT64_C(14312439615783436288), // PVXORUPmv |
| 4365 | UINT64_C(14312439615783436288), // PVXORUPmvL |
| 4366 | UINT64_C(14312439615783436288), // PVXORUPmvL_v |
| 4367 | UINT64_C(14312439615783436288), // PVXORUPmv_v |
| 4368 | UINT64_C(14312439615783436288), // PVXORUPmvl |
| 4369 | UINT64_C(14312439615783436288), // PVXORUPmvl_v |
| 4370 | UINT64_C(14312439615783436288), // PVXORUPmvm |
| 4371 | UINT64_C(14312439615783436288), // PVXORUPmvmL |
| 4372 | UINT64_C(14312439615783436288), // PVXORUPmvmL_v |
| 4373 | UINT64_C(14312439615783436288), // PVXORUPmvm_v |
| 4374 | UINT64_C(14312439615783436288), // PVXORUPmvml |
| 4375 | UINT64_C(14312439615783436288), // PVXORUPmvml_v |
| 4376 | UINT64_C(14312580353271791616), // PVXORUPrv |
| 4377 | UINT64_C(14312580353271791616), // PVXORUPrvL |
| 4378 | UINT64_C(14312580353271791616), // PVXORUPrvL_v |
| 4379 | UINT64_C(14312580353271791616), // PVXORUPrv_v |
| 4380 | UINT64_C(14312580353271791616), // PVXORUPrvl |
| 4381 | UINT64_C(14312580353271791616), // PVXORUPrvl_v |
| 4382 | UINT64_C(14312580353271791616), // PVXORUPrvm |
| 4383 | UINT64_C(14312580353271791616), // PVXORUPrvmL |
| 4384 | UINT64_C(14312580353271791616), // PVXORUPrvmL_v |
| 4385 | UINT64_C(14312580353271791616), // PVXORUPrvm_v |
| 4386 | UINT64_C(14312580353271791616), // PVXORUPrvml |
| 4387 | UINT64_C(14312580353271791616), // PVXORUPrvml_v |
| 4388 | UINT64_C(14303432416528695296), // PVXORUPvv |
| 4389 | UINT64_C(14303432416528695296), // PVXORUPvvL |
| 4390 | UINT64_C(14303432416528695296), // PVXORUPvvL_v |
| 4391 | UINT64_C(14303432416528695296), // PVXORUPvv_v |
| 4392 | UINT64_C(14303432416528695296), // PVXORUPvvl |
| 4393 | UINT64_C(14303432416528695296), // PVXORUPvvl_v |
| 4394 | UINT64_C(14303432416528695296), // PVXORUPvvm |
| 4395 | UINT64_C(14303432416528695296), // PVXORUPvvmL |
| 4396 | UINT64_C(14303432416528695296), // PVXORUPvvmL_v |
| 4397 | UINT64_C(14303432416528695296), // PVXORUPvvm_v |
| 4398 | UINT64_C(14303432416528695296), // PVXORUPvvml |
| 4399 | UINT64_C(14303432416528695296), // PVXORUPvvml_v |
| 4400 | UINT64_C(14330454014292918272), // PVXORmv |
| 4401 | UINT64_C(14330454014292918272), // PVXORmvL |
| 4402 | UINT64_C(14330454014292918272), // PVXORmvL_v |
| 4403 | UINT64_C(14330454014292918272), // PVXORmv_v |
| 4404 | UINT64_C(14330454014292918272), // PVXORmvl |
| 4405 | UINT64_C(14330454014292918272), // PVXORmvl_v |
| 4406 | UINT64_C(14330454014292918272), // PVXORmvm |
| 4407 | UINT64_C(14330454014292918272), // PVXORmvmL |
| 4408 | UINT64_C(14330454014292918272), // PVXORmvmL_v |
| 4409 | UINT64_C(14330454014292918272), // PVXORmvm_v |
| 4410 | UINT64_C(14330454014292918272), // PVXORmvml |
| 4411 | UINT64_C(14330454014292918272), // PVXORmvml_v |
| 4412 | UINT64_C(14330594751781273600), // PVXORrv |
| 4413 | UINT64_C(14330594751781273600), // PVXORrvL |
| 4414 | UINT64_C(14330594751781273600), // PVXORrvL_v |
| 4415 | UINT64_C(14330594751781273600), // PVXORrv_v |
| 4416 | UINT64_C(14330594751781273600), // PVXORrvl |
| 4417 | UINT64_C(14330594751781273600), // PVXORrvl_v |
| 4418 | UINT64_C(14330594751781273600), // PVXORrvm |
| 4419 | UINT64_C(14330594751781273600), // PVXORrvmL |
| 4420 | UINT64_C(14330594751781273600), // PVXORrvmL_v |
| 4421 | UINT64_C(14330594751781273600), // PVXORrvm_v |
| 4422 | UINT64_C(14330594751781273600), // PVXORrvml |
| 4423 | UINT64_C(14330594751781273600), // PVXORrvml_v |
| 4424 | UINT64_C(14321446815038177280), // PVXORvv |
| 4425 | UINT64_C(14321446815038177280), // PVXORvvL |
| 4426 | UINT64_C(14321446815038177280), // PVXORvvL_v |
| 4427 | UINT64_C(14321446815038177280), // PVXORvv_v |
| 4428 | UINT64_C(14321446815038177280), // PVXORvvl |
| 4429 | UINT64_C(14321446815038177280), // PVXORvvl_v |
| 4430 | UINT64_C(14321446815038177280), // PVXORvvm |
| 4431 | UINT64_C(14321446815038177280), // PVXORvvmL |
| 4432 | UINT64_C(14321446815038177280), // PVXORvvmL_v |
| 4433 | UINT64_C(14321446815038177280), // PVXORvvm_v |
| 4434 | UINT64_C(14321446815038177280), // PVXORvvml |
| 4435 | UINT64_C(14321446815038177280), // PVXORvvml_v |
| 4436 | UINT64_C(1819173367186456576), // RET |
| 4437 | UINT64_C(5764608072790048768), // SCRirr |
| 4438 | UINT64_C(5764607523034234880), // SCRizr |
| 4439 | UINT64_C(5764748810278404096), // SCRrrr |
| 4440 | UINT64_C(5764748260522590208), // SCRrzr |
| 4441 | UINT64_C(2954361355555045376), // SFR |
| 4442 | UINT64_C(3530822657614282752), // SHMBri |
| 4443 | UINT64_C(3530822107858468864), // SHMBzi |
| 4444 | UINT64_C(3530823757125910528), // SHMHri |
| 4445 | UINT64_C(3530823207370096640), // SHMHzi |
| 4446 | UINT64_C(3530825956149166080), // SHMLri |
| 4447 | UINT64_C(3530825406393352192), // SHMLzi |
| 4448 | UINT64_C(3530824856637538304), // SHMWri |
| 4449 | UINT64_C(3530824306881724416), // SHMWzi |
| 4450 | UINT64_C(2882303761517117440), // SIC |
| 4451 | UINT64_C(6269010681299730432), // SLALmi |
| 4452 | UINT64_C(6269151418788085760), // SLALmr |
| 4453 | UINT64_C(6269011231055544320), // SLALri |
| 4454 | UINT64_C(6269151968543899648), // SLALrr |
| 4455 | UINT64_C(7349874591868649472), // SLAWSXmi |
| 4456 | UINT64_C(7350015329357004800), // SLAWSXmr |
| 4457 | UINT64_C(7349875141624463360), // SLAWSXri |
| 4458 | UINT64_C(7350015879112818688), // SLAWSXrr |
| 4459 | UINT64_C(7385903388887613440), // SLAWZXmi |
| 4460 | UINT64_C(7386044126375968768), // SLAWZXmr |
| 4461 | UINT64_C(7385903938643427328), // SLAWZXri |
| 4462 | UINT64_C(7386044676131782656), // SLAWZXrr |
| 4463 | UINT64_C(7205759403792793600), // SLDrmi |
| 4464 | UINT64_C(7205900141281148928), // SLDrmr |
| 4465 | UINT64_C(7205759953548607488), // SLDrri |
| 4466 | UINT64_C(7205900691036962816), // SLDrrr |
| 4467 | UINT64_C(7277816997830721536), // SLLmi |
| 4468 | UINT64_C(7277957735319076864), // SLLmr |
| 4469 | UINT64_C(7277817547586535424), // SLLri |
| 4470 | UINT64_C(7277958285074890752), // SLLrr |
| 4471 | UINT64_C(2449958197289549824), // SMIR |
| 4472 | UINT64_C(3314649325744685056), // SMVL |
| 4473 | UINT64_C(3026418949592973312), // SPM |
| 4474 | UINT64_C(8574853690513424384), // SRALmi |
| 4475 | UINT64_C(8574994428001779712), // SRALmr |
| 4476 | UINT64_C(8574854240269238272), // SRALri |
| 4477 | UINT64_C(8574994977757593600), // SRALrr |
| 4478 | UINT64_C(8502796096475496448), // SRAWSXmi |
| 4479 | UINT64_C(8502936833963851776), // SRAWSXmr |
| 4480 | UINT64_C(8502796646231310336), // SRAWSXri |
| 4481 | UINT64_C(8502937383719665664), // SRAWSXrr |
| 4482 | UINT64_C(8538824893494460416), // SRAWZXmi |
| 4483 | UINT64_C(8538965630982815744), // SRAWZXmr |
| 4484 | UINT64_C(8538825443250274304), // SRAWZXri |
| 4485 | UINT64_C(8538966180738629632), // SRAWZXrr |
| 4486 | UINT64_C(8358680908399640576), // SRDmri |
| 4487 | UINT64_C(8358821645887995904), // SRDmrr |
| 4488 | UINT64_C(8358681458155454464), // SRDrri |
| 4489 | UINT64_C(8358822195643809792), // SRDrrr |
| 4490 | UINT64_C(8430738502437568512), // SRLmi |
| 4491 | UINT64_C(8430879239925923840), // SRLmr |
| 4492 | UINT64_C(8430739052193382400), // SRLri |
| 4493 | UINT64_C(8430879789681737728), // SRLrr |
| 4494 | UINT64_C(1513210024552300544), // ST1Brii |
| 4495 | UINT64_C(1513350762040655872), // ST1Brri |
| 4496 | UINT64_C(1513209474796486656), // ST1Bzii |
| 4497 | UINT64_C(1513350212284841984), // ST1Bzri |
| 4498 | UINT64_C(1441152430514372608), // ST2Brii |
| 4499 | UINT64_C(1441293168002727936), // ST2Brri |
| 4500 | UINT64_C(1441151880758558720), // ST2Bzii |
| 4501 | UINT64_C(1441292618246914048), // ST2Bzri |
| 4502 | UINT64_C(1369094836476444672), // STLrii |
| 4503 | UINT64_C(1369235573964800000), // STLrri |
| 4504 | UINT64_C(1369094286720630784), // STLzii |
| 4505 | UINT64_C(1369235024208986112), // STLzri |
| 4506 | UINT64_C(1297037242438516736), // STUrii |
| 4507 | UINT64_C(1297177979926872064), // STUrri |
| 4508 | UINT64_C(1297036692682702848), // STUzii |
| 4509 | UINT64_C(1297177430171058176), // STUzri |
| 4510 | UINT64_C(1224979648400588800), // STrii |
| 4511 | UINT64_C(1225120385888944128), // STrri |
| 4512 | UINT64_C(1224979098644774912), // STzii |
| 4513 | UINT64_C(1225119836133130240), // STzri |
| 4514 | UINT64_C(6557241057451442176), // SUBSLim |
| 4515 | UINT64_C(6557241607207256064), // SUBSLir |
| 4516 | UINT64_C(6557381794939797504), // SUBSLrm |
| 4517 | UINT64_C(6557382344695611392), // SUBSLrr |
| 4518 | UINT64_C(6485183463413514240), // SUBSWSXim |
| 4519 | UINT64_C(6485184013169328128), // SUBSWSXir |
| 4520 | UINT64_C(6485324200901869568), // SUBSWSXrm |
| 4521 | UINT64_C(6485324750657683456), // SUBSWSXrr |
| 4522 | UINT64_C(6521212260432478208), // SUBSWZXim |
| 4523 | UINT64_C(6521212810188292096), // SUBSWZXir |
| 4524 | UINT64_C(6521352997920833536), // SUBSWZXrm |
| 4525 | UINT64_C(6521353547676647424), // SUBSWZXrr |
| 4526 | UINT64_C(6341068275337658368), // SUBULim |
| 4527 | UINT64_C(6341068825093472256), // SUBULir |
| 4528 | UINT64_C(6341209012826013696), // SUBULrm |
| 4529 | UINT64_C(6341209562581827584), // SUBULrr |
| 4530 | UINT64_C(6377097072356622336), // SUBUWim |
| 4531 | UINT64_C(6377097622112436224), // SUBUWir |
| 4532 | UINT64_C(6377237809844977664), // SUBUWrm |
| 4533 | UINT64_C(6377238359600791552), // SUBUWrr |
| 4534 | UINT64_C(3386706919782612992), // SVL |
| 4535 | UINT64_C(12033618204333965312), // SVMmi |
| 4536 | UINT64_C(12033758941822320640), // SVMmr |
| 4537 | UINT64_C(3458764513820540928), // SVOB |
| 4538 | UINT64_C(11961560610296037376), // TOVMm |
| 4539 | UINT64_C(11961560610296037376), // TOVMmL |
| 4540 | UINT64_C(11961560610296037376), // TOVMml |
| 4541 | UINT64_C(4755801756259057664), // TS1AMLrii |
| 4542 | UINT64_C(4755942493747412992), // TS1AMLrir |
| 4543 | UINT64_C(4755801206503243776), // TS1AMLzii |
| 4544 | UINT64_C(4755941943991599104), // TS1AMLzir |
| 4545 | UINT64_C(4791830553278021632), // TS1AMWrii |
| 4546 | UINT64_C(4791971290766376960), // TS1AMWrir |
| 4547 | UINT64_C(4791830003522207744), // TS1AMWzii |
| 4548 | UINT64_C(4791970741010563072), // TS1AMWzir |
| 4549 | UINT64_C(4827859350296985600), // TS2AMrii |
| 4550 | UINT64_C(4828000087785340928), // TS2AMrir |
| 4551 | UINT64_C(4827858800541171712), // TS2AMzii |
| 4552 | UINT64_C(4827999538029527040), // TS2AMzir |
| 4553 | UINT64_C(5908723260865904640), // TS3AMrii |
| 4554 | UINT64_C(5908863998354259968), // TS3AMrir |
| 4555 | UINT64_C(5908722711110090752), // TS3AMzii |
| 4556 | UINT64_C(5908863448598446080), // TS3AMzir |
| 4557 | UINT64_C(4683744162221129728), // TSCRirr |
| 4558 | UINT64_C(4683743612465315840), // TSCRizr |
| 4559 | UINT64_C(4683884899709485056), // TSCRrrr |
| 4560 | UINT64_C(4683884349953671168), // TSCRrzr |
| 4561 | UINT64_C(10025012770526724096), // VADDSLiv |
| 4562 | UINT64_C(10025012770526724096), // VADDSLivL |
| 4563 | UINT64_C(10025012770526724096), // VADDSLivL_v |
| 4564 | UINT64_C(10025012770526724096), // VADDSLiv_v |
| 4565 | UINT64_C(10025012770526724096), // VADDSLivl |
| 4566 | UINT64_C(10025012770526724096), // VADDSLivl_v |
| 4567 | UINT64_C(10025012770526724096), // VADDSLivm |
| 4568 | UINT64_C(10025012770526724096), // VADDSLivmL |
| 4569 | UINT64_C(10025012770526724096), // VADDSLivmL_v |
| 4570 | UINT64_C(10025012770526724096), // VADDSLivm_v |
| 4571 | UINT64_C(10025012770526724096), // VADDSLivml |
| 4572 | UINT64_C(10025012770526724096), // VADDSLivml_v |
| 4573 | UINT64_C(10025153508015079424), // VADDSLrv |
| 4574 | UINT64_C(10025153508015079424), // VADDSLrvL |
| 4575 | UINT64_C(10025153508015079424), // VADDSLrvL_v |
| 4576 | UINT64_C(10025153508015079424), // VADDSLrv_v |
| 4577 | UINT64_C(10025153508015079424), // VADDSLrvl |
| 4578 | UINT64_C(10025153508015079424), // VADDSLrvl_v |
| 4579 | UINT64_C(10025153508015079424), // VADDSLrvm |
| 4580 | UINT64_C(10025153508015079424), // VADDSLrvmL |
| 4581 | UINT64_C(10025153508015079424), // VADDSLrvmL_v |
| 4582 | UINT64_C(10025153508015079424), // VADDSLrvm_v |
| 4583 | UINT64_C(10025153508015079424), // VADDSLrvml |
| 4584 | UINT64_C(10025153508015079424), // VADDSLrvml_v |
| 4585 | UINT64_C(10016005571271983104), // VADDSLvv |
| 4586 | UINT64_C(10016005571271983104), // VADDSLvvL |
| 4587 | UINT64_C(10016005571271983104), // VADDSLvvL_v |
| 4588 | UINT64_C(10016005571271983104), // VADDSLvv_v |
| 4589 | UINT64_C(10016005571271983104), // VADDSLvvl |
| 4590 | UINT64_C(10016005571271983104), // VADDSLvvl_v |
| 4591 | UINT64_C(10016005571271983104), // VADDSLvvm |
| 4592 | UINT64_C(10016005571271983104), // VADDSLvvmL |
| 4593 | UINT64_C(10016005571271983104), // VADDSLvvmL_v |
| 4594 | UINT64_C(10016005571271983104), // VADDSLvvm_v |
| 4595 | UINT64_C(10016005571271983104), // VADDSLvvml |
| 4596 | UINT64_C(10016005571271983104), // VADDSLvvml_v |
| 4597 | UINT64_C(14564641194916184064), // VADDSWSXiv |
| 4598 | UINT64_C(14564641194916184064), // VADDSWSXivL |
| 4599 | UINT64_C(14564641194916184064), // VADDSWSXivL_v |
| 4600 | UINT64_C(14564641194916184064), // VADDSWSXiv_v |
| 4601 | UINT64_C(14564641194916184064), // VADDSWSXivl |
| 4602 | UINT64_C(14564641194916184064), // VADDSWSXivl_v |
| 4603 | UINT64_C(14564641194916184064), // VADDSWSXivm |
| 4604 | UINT64_C(14564641194916184064), // VADDSWSXivmL |
| 4605 | UINT64_C(14564641194916184064), // VADDSWSXivmL_v |
| 4606 | UINT64_C(14564641194916184064), // VADDSWSXivm_v |
| 4607 | UINT64_C(14564641194916184064), // VADDSWSXivml |
| 4608 | UINT64_C(14564641194916184064), // VADDSWSXivml_v |
| 4609 | UINT64_C(14564781932404539392), // VADDSWSXrv |
| 4610 | UINT64_C(14564781932404539392), // VADDSWSXrvL |
| 4611 | UINT64_C(14564781932404539392), // VADDSWSXrvL_v |
| 4612 | UINT64_C(14564781932404539392), // VADDSWSXrv_v |
| 4613 | UINT64_C(14564781932404539392), // VADDSWSXrvl |
| 4614 | UINT64_C(14564781932404539392), // VADDSWSXrvl_v |
| 4615 | UINT64_C(14564781932404539392), // VADDSWSXrvm |
| 4616 | UINT64_C(14564781932404539392), // VADDSWSXrvmL |
| 4617 | UINT64_C(14564781932404539392), // VADDSWSXrvmL_v |
| 4618 | UINT64_C(14564781932404539392), // VADDSWSXrvm_v |
| 4619 | UINT64_C(14564781932404539392), // VADDSWSXrvml |
| 4620 | UINT64_C(14564781932404539392), // VADDSWSXrvml_v |
| 4621 | UINT64_C(14555633995661443072), // VADDSWSXvv |
| 4622 | UINT64_C(14555633995661443072), // VADDSWSXvvL |
| 4623 | UINT64_C(14555633995661443072), // VADDSWSXvvL_v |
| 4624 | UINT64_C(14555633995661443072), // VADDSWSXvv_v |
| 4625 | UINT64_C(14555633995661443072), // VADDSWSXvvl |
| 4626 | UINT64_C(14555633995661443072), // VADDSWSXvvl_v |
| 4627 | UINT64_C(14555633995661443072), // VADDSWSXvvm |
| 4628 | UINT64_C(14555633995661443072), // VADDSWSXvvmL |
| 4629 | UINT64_C(14555633995661443072), // VADDSWSXvvmL_v |
| 4630 | UINT64_C(14555633995661443072), // VADDSWSXvvm_v |
| 4631 | UINT64_C(14555633995661443072), // VADDSWSXvvml |
| 4632 | UINT64_C(14555633995661443072), // VADDSWSXvvml_v |
| 4633 | UINT64_C(14582655593425666048), // VADDSWZXiv |
| 4634 | UINT64_C(14582655593425666048), // VADDSWZXivL |
| 4635 | UINT64_C(14582655593425666048), // VADDSWZXivL_v |
| 4636 | UINT64_C(14582655593425666048), // VADDSWZXiv_v |
| 4637 | UINT64_C(14582655593425666048), // VADDSWZXivl |
| 4638 | UINT64_C(14582655593425666048), // VADDSWZXivl_v |
| 4639 | UINT64_C(14582655593425666048), // VADDSWZXivm |
| 4640 | UINT64_C(14582655593425666048), // VADDSWZXivmL |
| 4641 | UINT64_C(14582655593425666048), // VADDSWZXivmL_v |
| 4642 | UINT64_C(14582655593425666048), // VADDSWZXivm_v |
| 4643 | UINT64_C(14582655593425666048), // VADDSWZXivml |
| 4644 | UINT64_C(14582655593425666048), // VADDSWZXivml_v |
| 4645 | UINT64_C(14582796330914021376), // VADDSWZXrv |
| 4646 | UINT64_C(14582796330914021376), // VADDSWZXrvL |
| 4647 | UINT64_C(14582796330914021376), // VADDSWZXrvL_v |
| 4648 | UINT64_C(14582796330914021376), // VADDSWZXrv_v |
| 4649 | UINT64_C(14582796330914021376), // VADDSWZXrvl |
| 4650 | UINT64_C(14582796330914021376), // VADDSWZXrvl_v |
| 4651 | UINT64_C(14582796330914021376), // VADDSWZXrvm |
| 4652 | UINT64_C(14582796330914021376), // VADDSWZXrvmL |
| 4653 | UINT64_C(14582796330914021376), // VADDSWZXrvmL_v |
| 4654 | UINT64_C(14582796330914021376), // VADDSWZXrvm_v |
| 4655 | UINT64_C(14582796330914021376), // VADDSWZXrvml |
| 4656 | UINT64_C(14582796330914021376), // VADDSWZXrvml_v |
| 4657 | UINT64_C(14573648394170925056), // VADDSWZXvv |
| 4658 | UINT64_C(14573648394170925056), // VADDSWZXvvL |
| 4659 | UINT64_C(14573648394170925056), // VADDSWZXvvL_v |
| 4660 | UINT64_C(14573648394170925056), // VADDSWZXvv_v |
| 4661 | UINT64_C(14573648394170925056), // VADDSWZXvvl |
| 4662 | UINT64_C(14573648394170925056), // VADDSWZXvvl_v |
| 4663 | UINT64_C(14573648394170925056), // VADDSWZXvvm |
| 4664 | UINT64_C(14573648394170925056), // VADDSWZXvvmL |
| 4665 | UINT64_C(14573648394170925056), // VADDSWZXvvmL_v |
| 4666 | UINT64_C(14573648394170925056), // VADDSWZXvvm_v |
| 4667 | UINT64_C(14573648394170925056), // VADDSWZXvvml |
| 4668 | UINT64_C(14573648394170925056), // VADDSWZXvvml_v |
| 4669 | UINT64_C(14420526006840328192), // VADDULiv |
| 4670 | UINT64_C(14420526006840328192), // VADDULivL |
| 4671 | UINT64_C(14420526006840328192), // VADDULivL_v |
| 4672 | UINT64_C(14420526006840328192), // VADDULiv_v |
| 4673 | UINT64_C(14420526006840328192), // VADDULivl |
| 4674 | UINT64_C(14420526006840328192), // VADDULivl_v |
| 4675 | UINT64_C(14420526006840328192), // VADDULivm |
| 4676 | UINT64_C(14420526006840328192), // VADDULivmL |
| 4677 | UINT64_C(14420526006840328192), // VADDULivmL_v |
| 4678 | UINT64_C(14420526006840328192), // VADDULivm_v |
| 4679 | UINT64_C(14420526006840328192), // VADDULivml |
| 4680 | UINT64_C(14420526006840328192), // VADDULivml_v |
| 4681 | UINT64_C(14420666744328683520), // VADDULrv |
| 4682 | UINT64_C(14420666744328683520), // VADDULrvL |
| 4683 | UINT64_C(14420666744328683520), // VADDULrvL_v |
| 4684 | UINT64_C(14420666744328683520), // VADDULrv_v |
| 4685 | UINT64_C(14420666744328683520), // VADDULrvl |
| 4686 | UINT64_C(14420666744328683520), // VADDULrvl_v |
| 4687 | UINT64_C(14420666744328683520), // VADDULrvm |
| 4688 | UINT64_C(14420666744328683520), // VADDULrvmL |
| 4689 | UINT64_C(14420666744328683520), // VADDULrvmL_v |
| 4690 | UINT64_C(14420666744328683520), // VADDULrvm_v |
| 4691 | UINT64_C(14420666744328683520), // VADDULrvml |
| 4692 | UINT64_C(14420666744328683520), // VADDULrvml_v |
| 4693 | UINT64_C(14411518807585587200), // VADDULvv |
| 4694 | UINT64_C(14411518807585587200), // VADDULvvL |
| 4695 | UINT64_C(14411518807585587200), // VADDULvvL_v |
| 4696 | UINT64_C(14411518807585587200), // VADDULvv_v |
| 4697 | UINT64_C(14411518807585587200), // VADDULvvl |
| 4698 | UINT64_C(14411518807585587200), // VADDULvvl_v |
| 4699 | UINT64_C(14411518807585587200), // VADDULvvm |
| 4700 | UINT64_C(14411518807585587200), // VADDULvvmL |
| 4701 | UINT64_C(14411518807585587200), // VADDULvvmL_v |
| 4702 | UINT64_C(14411518807585587200), // VADDULvvm_v |
| 4703 | UINT64_C(14411518807585587200), // VADDULvvml |
| 4704 | UINT64_C(14411518807585587200), // VADDULvvml_v |
| 4705 | UINT64_C(14438540405349810176), // VADDUWiv |
| 4706 | UINT64_C(14438540405349810176), // VADDUWivL |
| 4707 | UINT64_C(14438540405349810176), // VADDUWivL_v |
| 4708 | UINT64_C(14438540405349810176), // VADDUWiv_v |
| 4709 | UINT64_C(14438540405349810176), // VADDUWivl |
| 4710 | UINT64_C(14438540405349810176), // VADDUWivl_v |
| 4711 | UINT64_C(14438540405349810176), // VADDUWivm |
| 4712 | UINT64_C(14438540405349810176), // VADDUWivmL |
| 4713 | UINT64_C(14438540405349810176), // VADDUWivmL_v |
| 4714 | UINT64_C(14438540405349810176), // VADDUWivm_v |
| 4715 | UINT64_C(14438540405349810176), // VADDUWivml |
| 4716 | UINT64_C(14438540405349810176), // VADDUWivml_v |
| 4717 | UINT64_C(14438681142838165504), // VADDUWrv |
| 4718 | UINT64_C(14438681142838165504), // VADDUWrvL |
| 4719 | UINT64_C(14438681142838165504), // VADDUWrvL_v |
| 4720 | UINT64_C(14438681142838165504), // VADDUWrv_v |
| 4721 | UINT64_C(14438681142838165504), // VADDUWrvl |
| 4722 | UINT64_C(14438681142838165504), // VADDUWrvl_v |
| 4723 | UINT64_C(14438681142838165504), // VADDUWrvm |
| 4724 | UINT64_C(14438681142838165504), // VADDUWrvmL |
| 4725 | UINT64_C(14438681142838165504), // VADDUWrvmL_v |
| 4726 | UINT64_C(14438681142838165504), // VADDUWrvm_v |
| 4727 | UINT64_C(14438681142838165504), // VADDUWrvml |
| 4728 | UINT64_C(14438681142838165504), // VADDUWrvml_v |
| 4729 | UINT64_C(14429533206095069184), // VADDUWvv |
| 4730 | UINT64_C(14429533206095069184), // VADDUWvvL |
| 4731 | UINT64_C(14429533206095069184), // VADDUWvvL_v |
| 4732 | UINT64_C(14429533206095069184), // VADDUWvv_v |
| 4733 | UINT64_C(14429533206095069184), // VADDUWvvl |
| 4734 | UINT64_C(14429533206095069184), // VADDUWvvl_v |
| 4735 | UINT64_C(14429533206095069184), // VADDUWvvm |
| 4736 | UINT64_C(14429533206095069184), // VADDUWvvmL |
| 4737 | UINT64_C(14429533206095069184), // VADDUWvvmL_v |
| 4738 | UINT64_C(14429533206095069184), // VADDUWvvm_v |
| 4739 | UINT64_C(14429533206095069184), // VADDUWvvml |
| 4740 | UINT64_C(14429533206095069184), // VADDUWvvml_v |
| 4741 | UINT64_C(14132295630688616448), // VANDmv |
| 4742 | UINT64_C(14132295630688616448), // VANDmvL |
| 4743 | UINT64_C(14132295630688616448), // VANDmvL_v |
| 4744 | UINT64_C(14132295630688616448), // VANDmv_v |
| 4745 | UINT64_C(14132295630688616448), // VANDmvl |
| 4746 | UINT64_C(14132295630688616448), // VANDmvl_v |
| 4747 | UINT64_C(14132295630688616448), // VANDmvm |
| 4748 | UINT64_C(14132295630688616448), // VANDmvmL |
| 4749 | UINT64_C(14132295630688616448), // VANDmvmL_v |
| 4750 | UINT64_C(14132295630688616448), // VANDmvm_v |
| 4751 | UINT64_C(14132295630688616448), // VANDmvml |
| 4752 | UINT64_C(14132295630688616448), // VANDmvml_v |
| 4753 | UINT64_C(14132436368176971776), // VANDrv |
| 4754 | UINT64_C(14132436368176971776), // VANDrvL |
| 4755 | UINT64_C(14132436368176971776), // VANDrvL_v |
| 4756 | UINT64_C(14132436368176971776), // VANDrv_v |
| 4757 | UINT64_C(14132436368176971776), // VANDrvl |
| 4758 | UINT64_C(14132436368176971776), // VANDrvl_v |
| 4759 | UINT64_C(14132436368176971776), // VANDrvm |
| 4760 | UINT64_C(14132436368176971776), // VANDrvmL |
| 4761 | UINT64_C(14132436368176971776), // VANDrvmL_v |
| 4762 | UINT64_C(14132436368176971776), // VANDrvm_v |
| 4763 | UINT64_C(14132436368176971776), // VANDrvml |
| 4764 | UINT64_C(14132436368176971776), // VANDrvml_v |
| 4765 | UINT64_C(14123288431433875456), // VANDvv |
| 4766 | UINT64_C(14123288431433875456), // VANDvvL |
| 4767 | UINT64_C(14123288431433875456), // VANDvvL_v |
| 4768 | UINT64_C(14123288431433875456), // VANDvv_v |
| 4769 | UINT64_C(14123288431433875456), // VANDvvl |
| 4770 | UINT64_C(14123288431433875456), // VANDvvl_v |
| 4771 | UINT64_C(14123288431433875456), // VANDvvm |
| 4772 | UINT64_C(14123288431433875456), // VANDvvmL |
| 4773 | UINT64_C(14123288431433875456), // VANDvvmL_v |
| 4774 | UINT64_C(14123288431433875456), // VANDvvm_v |
| 4775 | UINT64_C(14123288431433875456), // VANDvvml |
| 4776 | UINT64_C(14123288431433875456), // VANDvvml_v |
| 4777 | UINT64_C(10106077563819393024), // VBRDLi |
| 4778 | UINT64_C(10106077563819393024), // VBRDLiL |
| 4779 | UINT64_C(10106077563819393024), // VBRDLiL_v |
| 4780 | UINT64_C(10106077563819393024), // VBRDLi_v |
| 4781 | UINT64_C(10106077563819393024), // VBRDLil |
| 4782 | UINT64_C(10106077563819393024), // VBRDLil_v |
| 4783 | UINT64_C(10106077563819393024), // VBRDLim |
| 4784 | UINT64_C(10106077563819393024), // VBRDLimL |
| 4785 | UINT64_C(10106077563819393024), // VBRDLimL_v |
| 4786 | UINT64_C(10106077563819393024), // VBRDLim_v |
| 4787 | UINT64_C(10106077563819393024), // VBRDLiml |
| 4788 | UINT64_C(10106077563819393024), // VBRDLiml_v |
| 4789 | UINT64_C(10106218301307748352), // VBRDLr |
| 4790 | UINT64_C(10106218301307748352), // VBRDLrL |
| 4791 | UINT64_C(10106218301307748352), // VBRDLrL_v |
| 4792 | UINT64_C(10106218301307748352), // VBRDLr_v |
| 4793 | UINT64_C(10106218301307748352), // VBRDLrl |
| 4794 | UINT64_C(10106218301307748352), // VBRDLrl_v |
| 4795 | UINT64_C(10106218301307748352), // VBRDLrm |
| 4796 | UINT64_C(10106218301307748352), // VBRDLrmL |
| 4797 | UINT64_C(10106218301307748352), // VBRDLrmL_v |
| 4798 | UINT64_C(10106218301307748352), // VBRDLrm_v |
| 4799 | UINT64_C(10106218301307748352), // VBRDLrml |
| 4800 | UINT64_C(10106218301307748352), // VBRDLrml_v |
| 4801 | UINT64_C(10124091962328875008), // VBRDUi |
| 4802 | UINT64_C(10124091962328875008), // VBRDUiL |
| 4803 | UINT64_C(10124091962328875008), // VBRDUiL_v |
| 4804 | UINT64_C(10124091962328875008), // VBRDUi_v |
| 4805 | UINT64_C(10124091962328875008), // VBRDUil |
| 4806 | UINT64_C(10124091962328875008), // VBRDUil_v |
| 4807 | UINT64_C(10124091962328875008), // VBRDUim |
| 4808 | UINT64_C(10124091962328875008), // VBRDUimL |
| 4809 | UINT64_C(10124091962328875008), // VBRDUimL_v |
| 4810 | UINT64_C(10124091962328875008), // VBRDUim_v |
| 4811 | UINT64_C(10124091962328875008), // VBRDUiml |
| 4812 | UINT64_C(10124091962328875008), // VBRDUiml_v |
| 4813 | UINT64_C(10124232699817230336), // VBRDUr |
| 4814 | UINT64_C(10124232699817230336), // VBRDUrL |
| 4815 | UINT64_C(10124232699817230336), // VBRDUrL_v |
| 4816 | UINT64_C(10124232699817230336), // VBRDUr_v |
| 4817 | UINT64_C(10124232699817230336), // VBRDUrl |
| 4818 | UINT64_C(10124232699817230336), // VBRDUrl_v |
| 4819 | UINT64_C(10124232699817230336), // VBRDUrm |
| 4820 | UINT64_C(10124232699817230336), // VBRDUrmL |
| 4821 | UINT64_C(10124232699817230336), // VBRDUrmL_v |
| 4822 | UINT64_C(10124232699817230336), // VBRDUrm_v |
| 4823 | UINT64_C(10124232699817230336), // VBRDUrml |
| 4824 | UINT64_C(10124232699817230336), // VBRDUrml_v |
| 4825 | UINT64_C(10088063165309911040), // VBRDi |
| 4826 | UINT64_C(10088063165309911040), // VBRDiL |
| 4827 | UINT64_C(10088063165309911040), // VBRDiL_v |
| 4828 | UINT64_C(10088063165309911040), // VBRDi_v |
| 4829 | UINT64_C(10088063165309911040), // VBRDil |
| 4830 | UINT64_C(10088063165309911040), // VBRDil_v |
| 4831 | UINT64_C(10088063165309911040), // VBRDim |
| 4832 | UINT64_C(10088063165309911040), // VBRDimL |
| 4833 | UINT64_C(10088063165309911040), // VBRDimL_v |
| 4834 | UINT64_C(10088063165309911040), // VBRDim_v |
| 4835 | UINT64_C(10088063165309911040), // VBRDiml |
| 4836 | UINT64_C(10088063165309911040), // VBRDiml_v |
| 4837 | UINT64_C(10088203902798266368), // VBRDr |
| 4838 | UINT64_C(10088203902798266368), // VBRDrL |
| 4839 | UINT64_C(10088203902798266368), // VBRDrL_v |
| 4840 | UINT64_C(10088203902798266368), // VBRDr_v |
| 4841 | UINT64_C(10088203902798266368), // VBRDrl |
| 4842 | UINT64_C(10088203902798266368), // VBRDrl_v |
| 4843 | UINT64_C(10088203902798266368), // VBRDrm |
| 4844 | UINT64_C(10088203902798266368), // VBRDrmL |
| 4845 | UINT64_C(10088203902798266368), // VBRDrmL_v |
| 4846 | UINT64_C(10088203902798266368), // VBRDrm_v |
| 4847 | UINT64_C(10088203902798266368), // VBRDrml |
| 4848 | UINT64_C(10088203902798266368), // VBRDrml_v |
| 4849 | UINT64_C(17798225727368200192), // VBRVv |
| 4850 | UINT64_C(17798225727368200192), // VBRVvL |
| 4851 | UINT64_C(17798225727368200192), // VBRVvL_v |
| 4852 | UINT64_C(17798225727368200192), // VBRVv_v |
| 4853 | UINT64_C(17798225727368200192), // VBRVvl |
| 4854 | UINT64_C(17798225727368200192), // VBRVvl_v |
| 4855 | UINT64_C(17798225727368200192), // VBRVvm |
| 4856 | UINT64_C(17798225727368200192), // VBRVvmL |
| 4857 | UINT64_C(17798225727368200192), // VBRVvmL_v |
| 4858 | UINT64_C(17798225727368200192), // VBRVvm_v |
| 4859 | UINT64_C(17798225727368200192), // VBRVvml |
| 4860 | UINT64_C(17798225727368200192), // VBRVvml_v |
| 4861 | UINT64_C(13411719690309337088), // VCMPSLiv |
| 4862 | UINT64_C(13411719690309337088), // VCMPSLivL |
| 4863 | UINT64_C(13411719690309337088), // VCMPSLivL_v |
| 4864 | UINT64_C(13411719690309337088), // VCMPSLiv_v |
| 4865 | UINT64_C(13411719690309337088), // VCMPSLivl |
| 4866 | UINT64_C(13411719690309337088), // VCMPSLivl_v |
| 4867 | UINT64_C(13411719690309337088), // VCMPSLivm |
| 4868 | UINT64_C(13411719690309337088), // VCMPSLivmL |
| 4869 | UINT64_C(13411719690309337088), // VCMPSLivmL_v |
| 4870 | UINT64_C(13411719690309337088), // VCMPSLivm_v |
| 4871 | UINT64_C(13411719690309337088), // VCMPSLivml |
| 4872 | UINT64_C(13411719690309337088), // VCMPSLivml_v |
| 4873 | UINT64_C(13411860427797692416), // VCMPSLrv |
| 4874 | UINT64_C(13411860427797692416), // VCMPSLrvL |
| 4875 | UINT64_C(13411860427797692416), // VCMPSLrvL_v |
| 4876 | UINT64_C(13411860427797692416), // VCMPSLrv_v |
| 4877 | UINT64_C(13411860427797692416), // VCMPSLrvl |
| 4878 | UINT64_C(13411860427797692416), // VCMPSLrvl_v |
| 4879 | UINT64_C(13411860427797692416), // VCMPSLrvm |
| 4880 | UINT64_C(13411860427797692416), // VCMPSLrvmL |
| 4881 | UINT64_C(13411860427797692416), // VCMPSLrvmL_v |
| 4882 | UINT64_C(13411860427797692416), // VCMPSLrvm_v |
| 4883 | UINT64_C(13411860427797692416), // VCMPSLrvml |
| 4884 | UINT64_C(13411860427797692416), // VCMPSLrvml_v |
| 4885 | UINT64_C(13402712491054596096), // VCMPSLvv |
| 4886 | UINT64_C(13402712491054596096), // VCMPSLvvL |
| 4887 | UINT64_C(13402712491054596096), // VCMPSLvvL_v |
| 4888 | UINT64_C(13402712491054596096), // VCMPSLvv_v |
| 4889 | UINT64_C(13402712491054596096), // VCMPSLvvl |
| 4890 | UINT64_C(13402712491054596096), // VCMPSLvvl_v |
| 4891 | UINT64_C(13402712491054596096), // VCMPSLvvm |
| 4892 | UINT64_C(13402712491054596096), // VCMPSLvvmL |
| 4893 | UINT64_C(13402712491054596096), // VCMPSLvvmL_v |
| 4894 | UINT64_C(13402712491054596096), // VCMPSLvvm_v |
| 4895 | UINT64_C(13402712491054596096), // VCMPSLvvml |
| 4896 | UINT64_C(13402712491054596096), // VCMPSLvvml_v |
| 4897 | UINT64_C(18023405708736724992), // VCMPSWSXiv |
| 4898 | UINT64_C(18023405708736724992), // VCMPSWSXivL |
| 4899 | UINT64_C(18023405708736724992), // VCMPSWSXivL_v |
| 4900 | UINT64_C(18023405708736724992), // VCMPSWSXiv_v |
| 4901 | UINT64_C(18023405708736724992), // VCMPSWSXivl |
| 4902 | UINT64_C(18023405708736724992), // VCMPSWSXivl_v |
| 4903 | UINT64_C(18023405708736724992), // VCMPSWSXivm |
| 4904 | UINT64_C(18023405708736724992), // VCMPSWSXivmL |
| 4905 | UINT64_C(18023405708736724992), // VCMPSWSXivmL_v |
| 4906 | UINT64_C(18023405708736724992), // VCMPSWSXivm_v |
| 4907 | UINT64_C(18023405708736724992), // VCMPSWSXivml |
| 4908 | UINT64_C(18023405708736724992), // VCMPSWSXivml_v |
| 4909 | UINT64_C(18023546446225080320), // VCMPSWSXrv |
| 4910 | UINT64_C(18023546446225080320), // VCMPSWSXrvL |
| 4911 | UINT64_C(18023546446225080320), // VCMPSWSXrvL_v |
| 4912 | UINT64_C(18023546446225080320), // VCMPSWSXrv_v |
| 4913 | UINT64_C(18023546446225080320), // VCMPSWSXrvl |
| 4914 | UINT64_C(18023546446225080320), // VCMPSWSXrvl_v |
| 4915 | UINT64_C(18023546446225080320), // VCMPSWSXrvm |
| 4916 | UINT64_C(18023546446225080320), // VCMPSWSXrvmL |
| 4917 | UINT64_C(18023546446225080320), // VCMPSWSXrvmL_v |
| 4918 | UINT64_C(18023546446225080320), // VCMPSWSXrvm_v |
| 4919 | UINT64_C(18023546446225080320), // VCMPSWSXrvml |
| 4920 | UINT64_C(18023546446225080320), // VCMPSWSXrvml_v |
| 4921 | UINT64_C(18014398509481984000), // VCMPSWSXvv |
| 4922 | UINT64_C(18014398509481984000), // VCMPSWSXvvL |
| 4923 | UINT64_C(18014398509481984000), // VCMPSWSXvvL_v |
| 4924 | UINT64_C(18014398509481984000), // VCMPSWSXvv_v |
| 4925 | UINT64_C(18014398509481984000), // VCMPSWSXvvl |
| 4926 | UINT64_C(18014398509481984000), // VCMPSWSXvvl_v |
| 4927 | UINT64_C(18014398509481984000), // VCMPSWSXvvm |
| 4928 | UINT64_C(18014398509481984000), // VCMPSWSXvvmL |
| 4929 | UINT64_C(18014398509481984000), // VCMPSWSXvvmL_v |
| 4930 | UINT64_C(18014398509481984000), // VCMPSWSXvvm_v |
| 4931 | UINT64_C(18014398509481984000), // VCMPSWSXvvml |
| 4932 | UINT64_C(18014398509481984000), // VCMPSWSXvvml_v |
| 4933 | UINT64_C(18041420107246206976), // VCMPSWZXiv |
| 4934 | UINT64_C(18041420107246206976), // VCMPSWZXivL |
| 4935 | UINT64_C(18041420107246206976), // VCMPSWZXivL_v |
| 4936 | UINT64_C(18041420107246206976), // VCMPSWZXiv_v |
| 4937 | UINT64_C(18041420107246206976), // VCMPSWZXivl |
| 4938 | UINT64_C(18041420107246206976), // VCMPSWZXivl_v |
| 4939 | UINT64_C(18041420107246206976), // VCMPSWZXivm |
| 4940 | UINT64_C(18041420107246206976), // VCMPSWZXivmL |
| 4941 | UINT64_C(18041420107246206976), // VCMPSWZXivmL_v |
| 4942 | UINT64_C(18041420107246206976), // VCMPSWZXivm_v |
| 4943 | UINT64_C(18041420107246206976), // VCMPSWZXivml |
| 4944 | UINT64_C(18041420107246206976), // VCMPSWZXivml_v |
| 4945 | UINT64_C(18041560844734562304), // VCMPSWZXrv |
| 4946 | UINT64_C(18041560844734562304), // VCMPSWZXrvL |
| 4947 | UINT64_C(18041560844734562304), // VCMPSWZXrvL_v |
| 4948 | UINT64_C(18041560844734562304), // VCMPSWZXrv_v |
| 4949 | UINT64_C(18041560844734562304), // VCMPSWZXrvl |
| 4950 | UINT64_C(18041560844734562304), // VCMPSWZXrvl_v |
| 4951 | UINT64_C(18041560844734562304), // VCMPSWZXrvm |
| 4952 | UINT64_C(18041560844734562304), // VCMPSWZXrvmL |
| 4953 | UINT64_C(18041560844734562304), // VCMPSWZXrvmL_v |
| 4954 | UINT64_C(18041560844734562304), // VCMPSWZXrvm_v |
| 4955 | UINT64_C(18041560844734562304), // VCMPSWZXrvml |
| 4956 | UINT64_C(18041560844734562304), // VCMPSWZXrvml_v |
| 4957 | UINT64_C(18032412907991465984), // VCMPSWZXvv |
| 4958 | UINT64_C(18032412907991465984), // VCMPSWZXvvL |
| 4959 | UINT64_C(18032412907991465984), // VCMPSWZXvvL_v |
| 4960 | UINT64_C(18032412907991465984), // VCMPSWZXvv_v |
| 4961 | UINT64_C(18032412907991465984), // VCMPSWZXvvl |
| 4962 | UINT64_C(18032412907991465984), // VCMPSWZXvvl_v |
| 4963 | UINT64_C(18032412907991465984), // VCMPSWZXvvm |
| 4964 | UINT64_C(18032412907991465984), // VCMPSWZXvvmL |
| 4965 | UINT64_C(18032412907991465984), // VCMPSWZXvvmL_v |
| 4966 | UINT64_C(18032412907991465984), // VCMPSWZXvvm_v |
| 4967 | UINT64_C(18032412907991465984), // VCMPSWZXvvml |
| 4968 | UINT64_C(18032412907991465984), // VCMPSWZXvvml_v |
| 4969 | UINT64_C(13339662096271409152), // VCMPULiv |
| 4970 | UINT64_C(13339662096271409152), // VCMPULivL |
| 4971 | UINT64_C(13339662096271409152), // VCMPULivL_v |
| 4972 | UINT64_C(13339662096271409152), // VCMPULiv_v |
| 4973 | UINT64_C(13339662096271409152), // VCMPULivl |
| 4974 | UINT64_C(13339662096271409152), // VCMPULivl_v |
| 4975 | UINT64_C(13339662096271409152), // VCMPULivm |
| 4976 | UINT64_C(13339662096271409152), // VCMPULivmL |
| 4977 | UINT64_C(13339662096271409152), // VCMPULivmL_v |
| 4978 | UINT64_C(13339662096271409152), // VCMPULivm_v |
| 4979 | UINT64_C(13339662096271409152), // VCMPULivml |
| 4980 | UINT64_C(13339662096271409152), // VCMPULivml_v |
| 4981 | UINT64_C(13339802833759764480), // VCMPULrv |
| 4982 | UINT64_C(13339802833759764480), // VCMPULrvL |
| 4983 | UINT64_C(13339802833759764480), // VCMPULrvL_v |
| 4984 | UINT64_C(13339802833759764480), // VCMPULrv_v |
| 4985 | UINT64_C(13339802833759764480), // VCMPULrvl |
| 4986 | UINT64_C(13339802833759764480), // VCMPULrvl_v |
| 4987 | UINT64_C(13339802833759764480), // VCMPULrvm |
| 4988 | UINT64_C(13339802833759764480), // VCMPULrvmL |
| 4989 | UINT64_C(13339802833759764480), // VCMPULrvmL_v |
| 4990 | UINT64_C(13339802833759764480), // VCMPULrvm_v |
| 4991 | UINT64_C(13339802833759764480), // VCMPULrvml |
| 4992 | UINT64_C(13339802833759764480), // VCMPULrvml_v |
| 4993 | UINT64_C(13330654897016668160), // VCMPULvv |
| 4994 | UINT64_C(13330654897016668160), // VCMPULvvL |
| 4995 | UINT64_C(13330654897016668160), // VCMPULvvL_v |
| 4996 | UINT64_C(13330654897016668160), // VCMPULvv_v |
| 4997 | UINT64_C(13330654897016668160), // VCMPULvvl |
| 4998 | UINT64_C(13330654897016668160), // VCMPULvvl_v |
| 4999 | UINT64_C(13330654897016668160), // VCMPULvvm |
| 5000 | UINT64_C(13330654897016668160), // VCMPULvvmL |
| 5001 | UINT64_C(13330654897016668160), // VCMPULvvmL_v |
| 5002 | UINT64_C(13330654897016668160), // VCMPULvvm_v |
| 5003 | UINT64_C(13330654897016668160), // VCMPULvvml |
| 5004 | UINT64_C(13330654897016668160), // VCMPULvvml_v |
| 5005 | UINT64_C(13357676494780891136), // VCMPUWiv |
| 5006 | UINT64_C(13357676494780891136), // VCMPUWivL |
| 5007 | UINT64_C(13357676494780891136), // VCMPUWivL_v |
| 5008 | UINT64_C(13357676494780891136), // VCMPUWiv_v |
| 5009 | UINT64_C(13357676494780891136), // VCMPUWivl |
| 5010 | UINT64_C(13357676494780891136), // VCMPUWivl_v |
| 5011 | UINT64_C(13357676494780891136), // VCMPUWivm |
| 5012 | UINT64_C(13357676494780891136), // VCMPUWivmL |
| 5013 | UINT64_C(13357676494780891136), // VCMPUWivmL_v |
| 5014 | UINT64_C(13357676494780891136), // VCMPUWivm_v |
| 5015 | UINT64_C(13357676494780891136), // VCMPUWivml |
| 5016 | UINT64_C(13357676494780891136), // VCMPUWivml_v |
| 5017 | UINT64_C(13357817232269246464), // VCMPUWrv |
| 5018 | UINT64_C(13357817232269246464), // VCMPUWrvL |
| 5019 | UINT64_C(13357817232269246464), // VCMPUWrvL_v |
| 5020 | UINT64_C(13357817232269246464), // VCMPUWrv_v |
| 5021 | UINT64_C(13357817232269246464), // VCMPUWrvl |
| 5022 | UINT64_C(13357817232269246464), // VCMPUWrvl_v |
| 5023 | UINT64_C(13357817232269246464), // VCMPUWrvm |
| 5024 | UINT64_C(13357817232269246464), // VCMPUWrvmL |
| 5025 | UINT64_C(13357817232269246464), // VCMPUWrvmL_v |
| 5026 | UINT64_C(13357817232269246464), // VCMPUWrvm_v |
| 5027 | UINT64_C(13357817232269246464), // VCMPUWrvml |
| 5028 | UINT64_C(13357817232269246464), // VCMPUWrvml_v |
| 5029 | UINT64_C(13348669295526150144), // VCMPUWvv |
| 5030 | UINT64_C(13348669295526150144), // VCMPUWvvL |
| 5031 | UINT64_C(13348669295526150144), // VCMPUWvvL_v |
| 5032 | UINT64_C(13348669295526150144), // VCMPUWvv_v |
| 5033 | UINT64_C(13348669295526150144), // VCMPUWvvl |
| 5034 | UINT64_C(13348669295526150144), // VCMPUWvvl_v |
| 5035 | UINT64_C(13348669295526150144), // VCMPUWvvm |
| 5036 | UINT64_C(13348669295526150144), // VCMPUWvvmL |
| 5037 | UINT64_C(13348669295526150144), // VCMPUWvvmL_v |
| 5038 | UINT64_C(13348669295526150144), // VCMPUWvvm_v |
| 5039 | UINT64_C(13348669295526150144), // VCMPUWvvml |
| 5040 | UINT64_C(13348669295526150144), // VCMPUWvvml_v |
| 5041 | UINT64_C(10160120759347838976), // VCPv |
| 5042 | UINT64_C(10160120759347838976), // VCPvL |
| 5043 | UINT64_C(10160120759347838976), // VCPvL_v |
| 5044 | UINT64_C(10160120759347838976), // VCPv_v |
| 5045 | UINT64_C(10160120759347838976), // VCPvl |
| 5046 | UINT64_C(10160120759347838976), // VCPvl_v |
| 5047 | UINT64_C(10160120759347838976), // VCPvm |
| 5048 | UINT64_C(10160120759347838976), // VCPvmL |
| 5049 | UINT64_C(10160120759347838976), // VCPvmL_v |
| 5050 | UINT64_C(10160120759347838976), // VCPvm_v |
| 5051 | UINT64_C(10160120759347838976), // VCPvml |
| 5052 | UINT64_C(10160120759347838976), // VCPvml_v |
| 5053 | UINT64_C(13258597302978740224), // VCVTDLv |
| 5054 | UINT64_C(13258597302978740224), // VCVTDLvL |
| 5055 | UINT64_C(13258597302978740224), // VCVTDLvL_v |
| 5056 | UINT64_C(13258597302978740224), // VCVTDLv_v |
| 5057 | UINT64_C(13258597302978740224), // VCVTDLvl |
| 5058 | UINT64_C(13258597302978740224), // VCVTDLvl_v |
| 5059 | UINT64_C(13258597302978740224), // VCVTDLvm |
| 5060 | UINT64_C(13258597302978740224), // VCVTDLvmL |
| 5061 | UINT64_C(13258597302978740224), // VCVTDLvmL_v |
| 5062 | UINT64_C(13258597302978740224), // VCVTDLvm_v |
| 5063 | UINT64_C(13258597302978740224), // VCVTDLvml |
| 5064 | UINT64_C(13258597302978740224), // VCVTDLvml_v |
| 5065 | UINT64_C(10304235947423694848), // VCVTDSv |
| 5066 | UINT64_C(10304235947423694848), // VCVTDSvL |
| 5067 | UINT64_C(10304235947423694848), // VCVTDSvL_v |
| 5068 | UINT64_C(10304235947423694848), // VCVTDSv_v |
| 5069 | UINT64_C(10304235947423694848), // VCVTDSvl |
| 5070 | UINT64_C(10304235947423694848), // VCVTDSvl_v |
| 5071 | UINT64_C(10304235947423694848), // VCVTDSvm |
| 5072 | UINT64_C(10304235947423694848), // VCVTDSvmL |
| 5073 | UINT64_C(10304235947423694848), // VCVTDSvmL_v |
| 5074 | UINT64_C(10304235947423694848), // VCVTDSvm_v |
| 5075 | UINT64_C(10304235947423694848), // VCVTDSvml |
| 5076 | UINT64_C(10304235947423694848), // VCVTDSvml_v |
| 5077 | UINT64_C(17870283321406128128), // VCVTDWv |
| 5078 | UINT64_C(17870283321406128128), // VCVTDWvL |
| 5079 | UINT64_C(17870283321406128128), // VCVTDWvL_v |
| 5080 | UINT64_C(17870283321406128128), // VCVTDWv_v |
| 5081 | UINT64_C(17870283321406128128), // VCVTDWvl |
| 5082 | UINT64_C(17870283321406128128), // VCVTDWvl_v |
| 5083 | UINT64_C(17870283321406128128), // VCVTDWvm |
| 5084 | UINT64_C(17870283321406128128), // VCVTDWvmL |
| 5085 | UINT64_C(17870283321406128128), // VCVTDWvmL_v |
| 5086 | UINT64_C(17870283321406128128), // VCVTDWvm_v |
| 5087 | UINT64_C(17870283321406128128), // VCVTDWvml |
| 5088 | UINT64_C(17870283321406128128), // VCVTDWvml_v |
| 5089 | UINT64_C(12105675798371893248), // VCVTLDv |
| 5090 | UINT64_C(12105675798371893248), // VCVTLDvL |
| 5091 | UINT64_C(12105675798371893248), // VCVTLDvL_v |
| 5092 | UINT64_C(12105675798371893248), // VCVTLDv_v |
| 5093 | UINT64_C(12105675798371893248), // VCVTLDvl |
| 5094 | UINT64_C(12105675798371893248), // VCVTLDvl_v |
| 5095 | UINT64_C(12105675798371893248), // VCVTLDvm |
| 5096 | UINT64_C(12105675798371893248), // VCVTLDvmL |
| 5097 | UINT64_C(12105675798371893248), // VCVTLDvmL_v |
| 5098 | UINT64_C(12105675798371893248), // VCVTLDvm_v |
| 5099 | UINT64_C(12105675798371893248), // VCVTLDvml |
| 5100 | UINT64_C(12105675798371893248), // VCVTLDvml_v |
| 5101 | UINT64_C(11457157452030541824), // VCVTSDv |
| 5102 | UINT64_C(11457157452030541824), // VCVTSDvL |
| 5103 | UINT64_C(11457157452030541824), // VCVTSDvL_v |
| 5104 | UINT64_C(11457157452030541824), // VCVTSDv_v |
| 5105 | UINT64_C(11457157452030541824), // VCVTSDvl |
| 5106 | UINT64_C(11457157452030541824), // VCVTSDvl_v |
| 5107 | UINT64_C(11457157452030541824), // VCVTSDvm |
| 5108 | UINT64_C(11457157452030541824), // VCVTSDvmL |
| 5109 | UINT64_C(11457157452030541824), // VCVTSDvmL_v |
| 5110 | UINT64_C(11457157452030541824), // VCVTSDvm_v |
| 5111 | UINT64_C(11457157452030541824), // VCVTSDvml |
| 5112 | UINT64_C(11457157452030541824), // VCVTSDvml_v |
| 5113 | UINT64_C(17906312118425092096), // VCVTSWv |
| 5114 | UINT64_C(17906312118425092096), // VCVTSWvL |
| 5115 | UINT64_C(17906312118425092096), // VCVTSWvL_v |
| 5116 | UINT64_C(17906312118425092096), // VCVTSWv_v |
| 5117 | UINT64_C(17906312118425092096), // VCVTSWvl |
| 5118 | UINT64_C(17906312118425092096), // VCVTSWvl_v |
| 5119 | UINT64_C(17906312118425092096), // VCVTSWvm |
| 5120 | UINT64_C(17906312118425092096), // VCVTSWvmL |
| 5121 | UINT64_C(17906312118425092096), // VCVTSWvmL_v |
| 5122 | UINT64_C(17906312118425092096), // VCVTSWvm_v |
| 5123 | UINT64_C(17906312118425092096), // VCVTSWvml |
| 5124 | UINT64_C(17906312118425092096), // VCVTSWvml_v |
| 5125 | UINT64_C(16717361816799281152), // VCVTWDSXv |
| 5126 | UINT64_C(16717361816799281152), // VCVTWDSXvL |
| 5127 | UINT64_C(16717361816799281152), // VCVTWDSXvL_v |
| 5128 | UINT64_C(16717361816799281152), // VCVTWDSXv_v |
| 5129 | UINT64_C(16717361816799281152), // VCVTWDSXvl |
| 5130 | UINT64_C(16717361816799281152), // VCVTWDSXvl_v |
| 5131 | UINT64_C(16717361816799281152), // VCVTWDSXvm |
| 5132 | UINT64_C(16717361816799281152), // VCVTWDSXvmL |
| 5133 | UINT64_C(16717361816799281152), // VCVTWDSXvmL_v |
| 5134 | UINT64_C(16717361816799281152), // VCVTWDSXvm_v |
| 5135 | UINT64_C(16717361816799281152), // VCVTWDSXvml |
| 5136 | UINT64_C(16717361816799281152), // VCVTWDSXvml_v |
| 5137 | UINT64_C(16735376215308763136), // VCVTWDZXv |
| 5138 | UINT64_C(16735376215308763136), // VCVTWDZXvL |
| 5139 | UINT64_C(16735376215308763136), // VCVTWDZXvL_v |
| 5140 | UINT64_C(16735376215308763136), // VCVTWDZXv_v |
| 5141 | UINT64_C(16735376215308763136), // VCVTWDZXvl |
| 5142 | UINT64_C(16735376215308763136), // VCVTWDZXvl_v |
| 5143 | UINT64_C(16735376215308763136), // VCVTWDZXvm |
| 5144 | UINT64_C(16735376215308763136), // VCVTWDZXvmL |
| 5145 | UINT64_C(16735376215308763136), // VCVTWDZXvmL_v |
| 5146 | UINT64_C(16735376215308763136), // VCVTWDZXvm_v |
| 5147 | UINT64_C(16735376215308763136), // VCVTWDZXvml |
| 5148 | UINT64_C(16735376215308763136), // VCVTWDZXvml_v |
| 5149 | UINT64_C(16753390613818245120), // VCVTWSSXv |
| 5150 | UINT64_C(16753390613818245120), // VCVTWSSXvL |
| 5151 | UINT64_C(16753390613818245120), // VCVTWSSXvL_v |
| 5152 | UINT64_C(16753390613818245120), // VCVTWSSXv_v |
| 5153 | UINT64_C(16753390613818245120), // VCVTWSSXvl |
| 5154 | UINT64_C(16753390613818245120), // VCVTWSSXvl_v |
| 5155 | UINT64_C(16753390613818245120), // VCVTWSSXvm |
| 5156 | UINT64_C(16753390613818245120), // VCVTWSSXvmL |
| 5157 | UINT64_C(16753390613818245120), // VCVTWSSXvmL_v |
| 5158 | UINT64_C(16753390613818245120), // VCVTWSSXvm_v |
| 5159 | UINT64_C(16753390613818245120), // VCVTWSSXvml |
| 5160 | UINT64_C(16753390613818245120), // VCVTWSSXvml_v |
| 5161 | UINT64_C(16771405012327727104), // VCVTWSZXv |
| 5162 | UINT64_C(16771405012327727104), // VCVTWSZXvL |
| 5163 | UINT64_C(16771405012327727104), // VCVTWSZXvL_v |
| 5164 | UINT64_C(16771405012327727104), // VCVTWSZXv_v |
| 5165 | UINT64_C(16771405012327727104), // VCVTWSZXvl |
| 5166 | UINT64_C(16771405012327727104), // VCVTWSZXvl_v |
| 5167 | UINT64_C(16771405012327727104), // VCVTWSZXvm |
| 5168 | UINT64_C(16771405012327727104), // VCVTWSZXvmL |
| 5169 | UINT64_C(16771405012327727104), // VCVTWSZXvmL_v |
| 5170 | UINT64_C(16771405012327727104), // VCVTWSZXvm_v |
| 5171 | UINT64_C(16771405012327727104), // VCVTWSZXvml |
| 5172 | UINT64_C(16771405012327727104), // VCVTWSZXvml_v |
| 5173 | UINT64_C(18095463302774652928), // VDIVSLiv |
| 5174 | UINT64_C(18095463302774652928), // VDIVSLivL |
| 5175 | UINT64_C(18095463302774652928), // VDIVSLivL_v |
| 5176 | UINT64_C(18095463302774652928), // VDIVSLiv_v |
| 5177 | UINT64_C(18095463302774652928), // VDIVSLivl |
| 5178 | UINT64_C(18095463302774652928), // VDIVSLivl_v |
| 5179 | UINT64_C(18095463302774652928), // VDIVSLivm |
| 5180 | UINT64_C(18095463302774652928), // VDIVSLivmL |
| 5181 | UINT64_C(18095463302774652928), // VDIVSLivmL_v |
| 5182 | UINT64_C(18095463302774652928), // VDIVSLivm_v |
| 5183 | UINT64_C(18095463302774652928), // VDIVSLivml |
| 5184 | UINT64_C(18095463302774652928), // VDIVSLivml_v |
| 5185 | UINT64_C(18095604040263008256), // VDIVSLrv |
| 5186 | UINT64_C(18095604040263008256), // VDIVSLrvL |
| 5187 | UINT64_C(18095604040263008256), // VDIVSLrvL_v |
| 5188 | UINT64_C(18095604040263008256), // VDIVSLrv_v |
| 5189 | UINT64_C(18095604040263008256), // VDIVSLrvl |
| 5190 | UINT64_C(18095604040263008256), // VDIVSLrvl_v |
| 5191 | UINT64_C(18095604040263008256), // VDIVSLrvm |
| 5192 | UINT64_C(18095604040263008256), // VDIVSLrvmL |
| 5193 | UINT64_C(18095604040263008256), // VDIVSLrvmL_v |
| 5194 | UINT64_C(18095604040263008256), // VDIVSLrvm_v |
| 5195 | UINT64_C(18095604040263008256), // VDIVSLrvml |
| 5196 | UINT64_C(18095604040263008256), // VDIVSLrvml_v |
| 5197 | UINT64_C(18090959703147282432), // VDIVSLvi |
| 5198 | UINT64_C(18090959703147282432), // VDIVSLviL |
| 5199 | UINT64_C(18090959703147282432), // VDIVSLviL_v |
| 5200 | UINT64_C(18090959703147282432), // VDIVSLvi_v |
| 5201 | UINT64_C(18090959703147282432), // VDIVSLvil |
| 5202 | UINT64_C(18090959703147282432), // VDIVSLvil_v |
| 5203 | UINT64_C(18090959703147282432), // VDIVSLvim |
| 5204 | UINT64_C(18090959703147282432), // VDIVSLvimL |
| 5205 | UINT64_C(18090959703147282432), // VDIVSLvimL_v |
| 5206 | UINT64_C(18090959703147282432), // VDIVSLvim_v |
| 5207 | UINT64_C(18090959703147282432), // VDIVSLviml |
| 5208 | UINT64_C(18090959703147282432), // VDIVSLviml_v |
| 5209 | UINT64_C(18091100440635637760), // VDIVSLvr |
| 5210 | UINT64_C(18091100440635637760), // VDIVSLvrL |
| 5211 | UINT64_C(18091100440635637760), // VDIVSLvrL_v |
| 5212 | UINT64_C(18091100440635637760), // VDIVSLvr_v |
| 5213 | UINT64_C(18091100440635637760), // VDIVSLvrl |
| 5214 | UINT64_C(18091100440635637760), // VDIVSLvrl_v |
| 5215 | UINT64_C(18091100440635637760), // VDIVSLvrm |
| 5216 | UINT64_C(18091100440635637760), // VDIVSLvrmL |
| 5217 | UINT64_C(18091100440635637760), // VDIVSLvrmL_v |
| 5218 | UINT64_C(18091100440635637760), // VDIVSLvrm_v |
| 5219 | UINT64_C(18091100440635637760), // VDIVSLvrml |
| 5220 | UINT64_C(18091100440635637760), // VDIVSLvrml_v |
| 5221 | UINT64_C(18086456103519911936), // VDIVSLvv |
| 5222 | UINT64_C(18086456103519911936), // VDIVSLvvL |
| 5223 | UINT64_C(18086456103519911936), // VDIVSLvvL_v |
| 5224 | UINT64_C(18086456103519911936), // VDIVSLvv_v |
| 5225 | UINT64_C(18086456103519911936), // VDIVSLvvl |
| 5226 | UINT64_C(18086456103519911936), // VDIVSLvvl_v |
| 5227 | UINT64_C(18086456103519911936), // VDIVSLvvm |
| 5228 | UINT64_C(18086456103519911936), // VDIVSLvvmL |
| 5229 | UINT64_C(18086456103519911936), // VDIVSLvvmL_v |
| 5230 | UINT64_C(18086456103519911936), // VDIVSLvvm_v |
| 5231 | UINT64_C(18086456103519911936), // VDIVSLvvml |
| 5232 | UINT64_C(18086456103519911936), // VDIVSLvvml_v |
| 5233 | UINT64_C(16942541798167805952), // VDIVSWSXiv |
| 5234 | UINT64_C(16942541798167805952), // VDIVSWSXivL |
| 5235 | UINT64_C(16942541798167805952), // VDIVSWSXivL_v |
| 5236 | UINT64_C(16942541798167805952), // VDIVSWSXiv_v |
| 5237 | UINT64_C(16942541798167805952), // VDIVSWSXivl |
| 5238 | UINT64_C(16942541798167805952), // VDIVSWSXivl_v |
| 5239 | UINT64_C(16942541798167805952), // VDIVSWSXivm |
| 5240 | UINT64_C(16942541798167805952), // VDIVSWSXivmL |
| 5241 | UINT64_C(16942541798167805952), // VDIVSWSXivmL_v |
| 5242 | UINT64_C(16942541798167805952), // VDIVSWSXivm_v |
| 5243 | UINT64_C(16942541798167805952), // VDIVSWSXivml |
| 5244 | UINT64_C(16942541798167805952), // VDIVSWSXivml_v |
| 5245 | UINT64_C(16942682535656161280), // VDIVSWSXrv |
| 5246 | UINT64_C(16942682535656161280), // VDIVSWSXrvL |
| 5247 | UINT64_C(16942682535656161280), // VDIVSWSXrvL_v |
| 5248 | UINT64_C(16942682535656161280), // VDIVSWSXrv_v |
| 5249 | UINT64_C(16942682535656161280), // VDIVSWSXrvl |
| 5250 | UINT64_C(16942682535656161280), // VDIVSWSXrvl_v |
| 5251 | UINT64_C(16942682535656161280), // VDIVSWSXrvm |
| 5252 | UINT64_C(16942682535656161280), // VDIVSWSXrvmL |
| 5253 | UINT64_C(16942682535656161280), // VDIVSWSXrvmL_v |
| 5254 | UINT64_C(16942682535656161280), // VDIVSWSXrvm_v |
| 5255 | UINT64_C(16942682535656161280), // VDIVSWSXrvml |
| 5256 | UINT64_C(16942682535656161280), // VDIVSWSXrvml_v |
| 5257 | UINT64_C(16938038198540435456), // VDIVSWSXvi |
| 5258 | UINT64_C(16938038198540435456), // VDIVSWSXviL |
| 5259 | UINT64_C(16938038198540435456), // VDIVSWSXviL_v |
| 5260 | UINT64_C(16938038198540435456), // VDIVSWSXvi_v |
| 5261 | UINT64_C(16938038198540435456), // VDIVSWSXvil |
| 5262 | UINT64_C(16938038198540435456), // VDIVSWSXvil_v |
| 5263 | UINT64_C(16938038198540435456), // VDIVSWSXvim |
| 5264 | UINT64_C(16938038198540435456), // VDIVSWSXvimL |
| 5265 | UINT64_C(16938038198540435456), // VDIVSWSXvimL_v |
| 5266 | UINT64_C(16938038198540435456), // VDIVSWSXvim_v |
| 5267 | UINT64_C(16938038198540435456), // VDIVSWSXviml |
| 5268 | UINT64_C(16938038198540435456), // VDIVSWSXviml_v |
| 5269 | UINT64_C(16938178936028790784), // VDIVSWSXvr |
| 5270 | UINT64_C(16938178936028790784), // VDIVSWSXvrL |
| 5271 | UINT64_C(16938178936028790784), // VDIVSWSXvrL_v |
| 5272 | UINT64_C(16938178936028790784), // VDIVSWSXvr_v |
| 5273 | UINT64_C(16938178936028790784), // VDIVSWSXvrl |
| 5274 | UINT64_C(16938178936028790784), // VDIVSWSXvrl_v |
| 5275 | UINT64_C(16938178936028790784), // VDIVSWSXvrm |
| 5276 | UINT64_C(16938178936028790784), // VDIVSWSXvrmL |
| 5277 | UINT64_C(16938178936028790784), // VDIVSWSXvrmL_v |
| 5278 | UINT64_C(16938178936028790784), // VDIVSWSXvrm_v |
| 5279 | UINT64_C(16938178936028790784), // VDIVSWSXvrml |
| 5280 | UINT64_C(16938178936028790784), // VDIVSWSXvrml_v |
| 5281 | UINT64_C(16933534598913064960), // VDIVSWSXvv |
| 5282 | UINT64_C(16933534598913064960), // VDIVSWSXvvL |
| 5283 | UINT64_C(16933534598913064960), // VDIVSWSXvvL_v |
| 5284 | UINT64_C(16933534598913064960), // VDIVSWSXvv_v |
| 5285 | UINT64_C(16933534598913064960), // VDIVSWSXvvl |
| 5286 | UINT64_C(16933534598913064960), // VDIVSWSXvvl_v |
| 5287 | UINT64_C(16933534598913064960), // VDIVSWSXvvm |
| 5288 | UINT64_C(16933534598913064960), // VDIVSWSXvvmL |
| 5289 | UINT64_C(16933534598913064960), // VDIVSWSXvvmL_v |
| 5290 | UINT64_C(16933534598913064960), // VDIVSWSXvvm_v |
| 5291 | UINT64_C(16933534598913064960), // VDIVSWSXvvml |
| 5292 | UINT64_C(16933534598913064960), // VDIVSWSXvvml_v |
| 5293 | UINT64_C(16960556196677287936), // VDIVSWZXiv |
| 5294 | UINT64_C(16960556196677287936), // VDIVSWZXivL |
| 5295 | UINT64_C(16960556196677287936), // VDIVSWZXivL_v |
| 5296 | UINT64_C(16960556196677287936), // VDIVSWZXiv_v |
| 5297 | UINT64_C(16960556196677287936), // VDIVSWZXivl |
| 5298 | UINT64_C(16960556196677287936), // VDIVSWZXivl_v |
| 5299 | UINT64_C(16960556196677287936), // VDIVSWZXivm |
| 5300 | UINT64_C(16960556196677287936), // VDIVSWZXivmL |
| 5301 | UINT64_C(16960556196677287936), // VDIVSWZXivmL_v |
| 5302 | UINT64_C(16960556196677287936), // VDIVSWZXivm_v |
| 5303 | UINT64_C(16960556196677287936), // VDIVSWZXivml |
| 5304 | UINT64_C(16960556196677287936), // VDIVSWZXivml_v |
| 5305 | UINT64_C(16960696934165643264), // VDIVSWZXrv |
| 5306 | UINT64_C(16960696934165643264), // VDIVSWZXrvL |
| 5307 | UINT64_C(16960696934165643264), // VDIVSWZXrvL_v |
| 5308 | UINT64_C(16960696934165643264), // VDIVSWZXrv_v |
| 5309 | UINT64_C(16960696934165643264), // VDIVSWZXrvl |
| 5310 | UINT64_C(16960696934165643264), // VDIVSWZXrvl_v |
| 5311 | UINT64_C(16960696934165643264), // VDIVSWZXrvm |
| 5312 | UINT64_C(16960696934165643264), // VDIVSWZXrvmL |
| 5313 | UINT64_C(16960696934165643264), // VDIVSWZXrvmL_v |
| 5314 | UINT64_C(16960696934165643264), // VDIVSWZXrvm_v |
| 5315 | UINT64_C(16960696934165643264), // VDIVSWZXrvml |
| 5316 | UINT64_C(16960696934165643264), // VDIVSWZXrvml_v |
| 5317 | UINT64_C(16956052597049917440), // VDIVSWZXvi |
| 5318 | UINT64_C(16956052597049917440), // VDIVSWZXviL |
| 5319 | UINT64_C(16956052597049917440), // VDIVSWZXviL_v |
| 5320 | UINT64_C(16956052597049917440), // VDIVSWZXvi_v |
| 5321 | UINT64_C(16956052597049917440), // VDIVSWZXvil |
| 5322 | UINT64_C(16956052597049917440), // VDIVSWZXvil_v |
| 5323 | UINT64_C(16956052597049917440), // VDIVSWZXvim |
| 5324 | UINT64_C(16956052597049917440), // VDIVSWZXvimL |
| 5325 | UINT64_C(16956052597049917440), // VDIVSWZXvimL_v |
| 5326 | UINT64_C(16956052597049917440), // VDIVSWZXvim_v |
| 5327 | UINT64_C(16956052597049917440), // VDIVSWZXviml |
| 5328 | UINT64_C(16956052597049917440), // VDIVSWZXviml_v |
| 5329 | UINT64_C(16956193334538272768), // VDIVSWZXvr |
| 5330 | UINT64_C(16956193334538272768), // VDIVSWZXvrL |
| 5331 | UINT64_C(16956193334538272768), // VDIVSWZXvrL_v |
| 5332 | UINT64_C(16956193334538272768), // VDIVSWZXvr_v |
| 5333 | UINT64_C(16956193334538272768), // VDIVSWZXvrl |
| 5334 | UINT64_C(16956193334538272768), // VDIVSWZXvrl_v |
| 5335 | UINT64_C(16956193334538272768), // VDIVSWZXvrm |
| 5336 | UINT64_C(16956193334538272768), // VDIVSWZXvrmL |
| 5337 | UINT64_C(16956193334538272768), // VDIVSWZXvrmL_v |
| 5338 | UINT64_C(16956193334538272768), // VDIVSWZXvrm_v |
| 5339 | UINT64_C(16956193334538272768), // VDIVSWZXvrml |
| 5340 | UINT64_C(16956193334538272768), // VDIVSWZXvrml_v |
| 5341 | UINT64_C(16951548997422546944), // VDIVSWZXvv |
| 5342 | UINT64_C(16951548997422546944), // VDIVSWZXvvL |
| 5343 | UINT64_C(16951548997422546944), // VDIVSWZXvvL_v |
| 5344 | UINT64_C(16951548997422546944), // VDIVSWZXvv_v |
| 5345 | UINT64_C(16951548997422546944), // VDIVSWZXvvl |
| 5346 | UINT64_C(16951548997422546944), // VDIVSWZXvvl_v |
| 5347 | UINT64_C(16951548997422546944), // VDIVSWZXvvm |
| 5348 | UINT64_C(16951548997422546944), // VDIVSWZXvvmL |
| 5349 | UINT64_C(16951548997422546944), // VDIVSWZXvvmL_v |
| 5350 | UINT64_C(16951548997422546944), // VDIVSWZXvvm_v |
| 5351 | UINT64_C(16951548997422546944), // VDIVSWZXvvml |
| 5352 | UINT64_C(16951548997422546944), // VDIVSWZXvvml_v |
| 5353 | UINT64_C(16798426610091950080), // VDIVULiv |
| 5354 | UINT64_C(16798426610091950080), // VDIVULivL |
| 5355 | UINT64_C(16798426610091950080), // VDIVULivL_v |
| 5356 | UINT64_C(16798426610091950080), // VDIVULiv_v |
| 5357 | UINT64_C(16798426610091950080), // VDIVULivl |
| 5358 | UINT64_C(16798426610091950080), // VDIVULivl_v |
| 5359 | UINT64_C(16798426610091950080), // VDIVULivm |
| 5360 | UINT64_C(16798426610091950080), // VDIVULivmL |
| 5361 | UINT64_C(16798426610091950080), // VDIVULivmL_v |
| 5362 | UINT64_C(16798426610091950080), // VDIVULivm_v |
| 5363 | UINT64_C(16798426610091950080), // VDIVULivml |
| 5364 | UINT64_C(16798426610091950080), // VDIVULivml_v |
| 5365 | UINT64_C(16798567347580305408), // VDIVULrv |
| 5366 | UINT64_C(16798567347580305408), // VDIVULrvL |
| 5367 | UINT64_C(16798567347580305408), // VDIVULrvL_v |
| 5368 | UINT64_C(16798567347580305408), // VDIVULrv_v |
| 5369 | UINT64_C(16798567347580305408), // VDIVULrvl |
| 5370 | UINT64_C(16798567347580305408), // VDIVULrvl_v |
| 5371 | UINT64_C(16798567347580305408), // VDIVULrvm |
| 5372 | UINT64_C(16798567347580305408), // VDIVULrvmL |
| 5373 | UINT64_C(16798567347580305408), // VDIVULrvmL_v |
| 5374 | UINT64_C(16798567347580305408), // VDIVULrvm_v |
| 5375 | UINT64_C(16798567347580305408), // VDIVULrvml |
| 5376 | UINT64_C(16798567347580305408), // VDIVULrvml_v |
| 5377 | UINT64_C(16793923010464579584), // VDIVULvi |
| 5378 | UINT64_C(16793923010464579584), // VDIVULviL |
| 5379 | UINT64_C(16793923010464579584), // VDIVULviL_v |
| 5380 | UINT64_C(16793923010464579584), // VDIVULvi_v |
| 5381 | UINT64_C(16793923010464579584), // VDIVULvil |
| 5382 | UINT64_C(16793923010464579584), // VDIVULvil_v |
| 5383 | UINT64_C(16793923010464579584), // VDIVULvim |
| 5384 | UINT64_C(16793923010464579584), // VDIVULvimL |
| 5385 | UINT64_C(16793923010464579584), // VDIVULvimL_v |
| 5386 | UINT64_C(16793923010464579584), // VDIVULvim_v |
| 5387 | UINT64_C(16793923010464579584), // VDIVULviml |
| 5388 | UINT64_C(16793923010464579584), // VDIVULviml_v |
| 5389 | UINT64_C(16794063747952934912), // VDIVULvr |
| 5390 | UINT64_C(16794063747952934912), // VDIVULvrL |
| 5391 | UINT64_C(16794063747952934912), // VDIVULvrL_v |
| 5392 | UINT64_C(16794063747952934912), // VDIVULvr_v |
| 5393 | UINT64_C(16794063747952934912), // VDIVULvrl |
| 5394 | UINT64_C(16794063747952934912), // VDIVULvrl_v |
| 5395 | UINT64_C(16794063747952934912), // VDIVULvrm |
| 5396 | UINT64_C(16794063747952934912), // VDIVULvrmL |
| 5397 | UINT64_C(16794063747952934912), // VDIVULvrmL_v |
| 5398 | UINT64_C(16794063747952934912), // VDIVULvrm_v |
| 5399 | UINT64_C(16794063747952934912), // VDIVULvrml |
| 5400 | UINT64_C(16794063747952934912), // VDIVULvrml_v |
| 5401 | UINT64_C(16789419410837209088), // VDIVULvv |
| 5402 | UINT64_C(16789419410837209088), // VDIVULvvL |
| 5403 | UINT64_C(16789419410837209088), // VDIVULvvL_v |
| 5404 | UINT64_C(16789419410837209088), // VDIVULvv_v |
| 5405 | UINT64_C(16789419410837209088), // VDIVULvvl |
| 5406 | UINT64_C(16789419410837209088), // VDIVULvvl_v |
| 5407 | UINT64_C(16789419410837209088), // VDIVULvvm |
| 5408 | UINT64_C(16789419410837209088), // VDIVULvvmL |
| 5409 | UINT64_C(16789419410837209088), // VDIVULvvmL_v |
| 5410 | UINT64_C(16789419410837209088), // VDIVULvvm_v |
| 5411 | UINT64_C(16789419410837209088), // VDIVULvvml |
| 5412 | UINT64_C(16789419410837209088), // VDIVULvvml_v |
| 5413 | UINT64_C(16816441008601432064), // VDIVUWiv |
| 5414 | UINT64_C(16816441008601432064), // VDIVUWivL |
| 5415 | UINT64_C(16816441008601432064), // VDIVUWivL_v |
| 5416 | UINT64_C(16816441008601432064), // VDIVUWiv_v |
| 5417 | UINT64_C(16816441008601432064), // VDIVUWivl |
| 5418 | UINT64_C(16816441008601432064), // VDIVUWivl_v |
| 5419 | UINT64_C(16816441008601432064), // VDIVUWivm |
| 5420 | UINT64_C(16816441008601432064), // VDIVUWivmL |
| 5421 | UINT64_C(16816441008601432064), // VDIVUWivmL_v |
| 5422 | UINT64_C(16816441008601432064), // VDIVUWivm_v |
| 5423 | UINT64_C(16816441008601432064), // VDIVUWivml |
| 5424 | UINT64_C(16816441008601432064), // VDIVUWivml_v |
| 5425 | UINT64_C(16816581746089787392), // VDIVUWrv |
| 5426 | UINT64_C(16816581746089787392), // VDIVUWrvL |
| 5427 | UINT64_C(16816581746089787392), // VDIVUWrvL_v |
| 5428 | UINT64_C(16816581746089787392), // VDIVUWrv_v |
| 5429 | UINT64_C(16816581746089787392), // VDIVUWrvl |
| 5430 | UINT64_C(16816581746089787392), // VDIVUWrvl_v |
| 5431 | UINT64_C(16816581746089787392), // VDIVUWrvm |
| 5432 | UINT64_C(16816581746089787392), // VDIVUWrvmL |
| 5433 | UINT64_C(16816581746089787392), // VDIVUWrvmL_v |
| 5434 | UINT64_C(16816581746089787392), // VDIVUWrvm_v |
| 5435 | UINT64_C(16816581746089787392), // VDIVUWrvml |
| 5436 | UINT64_C(16816581746089787392), // VDIVUWrvml_v |
| 5437 | UINT64_C(16811937408974061568), // VDIVUWvi |
| 5438 | UINT64_C(16811937408974061568), // VDIVUWviL |
| 5439 | UINT64_C(16811937408974061568), // VDIVUWviL_v |
| 5440 | UINT64_C(16811937408974061568), // VDIVUWvi_v |
| 5441 | UINT64_C(16811937408974061568), // VDIVUWvil |
| 5442 | UINT64_C(16811937408974061568), // VDIVUWvil_v |
| 5443 | UINT64_C(16811937408974061568), // VDIVUWvim |
| 5444 | UINT64_C(16811937408974061568), // VDIVUWvimL |
| 5445 | UINT64_C(16811937408974061568), // VDIVUWvimL_v |
| 5446 | UINT64_C(16811937408974061568), // VDIVUWvim_v |
| 5447 | UINT64_C(16811937408974061568), // VDIVUWviml |
| 5448 | UINT64_C(16811937408974061568), // VDIVUWviml_v |
| 5449 | UINT64_C(16812078146462416896), // VDIVUWvr |
| 5450 | UINT64_C(16812078146462416896), // VDIVUWvrL |
| 5451 | UINT64_C(16812078146462416896), // VDIVUWvrL_v |
| 5452 | UINT64_C(16812078146462416896), // VDIVUWvr_v |
| 5453 | UINT64_C(16812078146462416896), // VDIVUWvrl |
| 5454 | UINT64_C(16812078146462416896), // VDIVUWvrl_v |
| 5455 | UINT64_C(16812078146462416896), // VDIVUWvrm |
| 5456 | UINT64_C(16812078146462416896), // VDIVUWvrmL |
| 5457 | UINT64_C(16812078146462416896), // VDIVUWvrmL_v |
| 5458 | UINT64_C(16812078146462416896), // VDIVUWvrm_v |
| 5459 | UINT64_C(16812078146462416896), // VDIVUWvrml |
| 5460 | UINT64_C(16812078146462416896), // VDIVUWvrml_v |
| 5461 | UINT64_C(16807433809346691072), // VDIVUWvv |
| 5462 | UINT64_C(16807433809346691072), // VDIVUWvvL |
| 5463 | UINT64_C(16807433809346691072), // VDIVUWvvL_v |
| 5464 | UINT64_C(16807433809346691072), // VDIVUWvv_v |
| 5465 | UINT64_C(16807433809346691072), // VDIVUWvvl |
| 5466 | UINT64_C(16807433809346691072), // VDIVUWvvl_v |
| 5467 | UINT64_C(16807433809346691072), // VDIVUWvvm |
| 5468 | UINT64_C(16807433809346691072), // VDIVUWvvmL |
| 5469 | UINT64_C(16807433809346691072), // VDIVUWvvmL_v |
| 5470 | UINT64_C(16807433809346691072), // VDIVUWvvm_v |
| 5471 | UINT64_C(16807433809346691072), // VDIVUWvvml |
| 5472 | UINT64_C(16807433809346691072), // VDIVUWvvml_v |
| 5473 | UINT64_C(14348468412802400256), // VEQVmv |
| 5474 | UINT64_C(14348468412802400256), // VEQVmvL |
| 5475 | UINT64_C(14348468412802400256), // VEQVmvL_v |
| 5476 | UINT64_C(14348468412802400256), // VEQVmv_v |
| 5477 | UINT64_C(14348468412802400256), // VEQVmvl |
| 5478 | UINT64_C(14348468412802400256), // VEQVmvl_v |
| 5479 | UINT64_C(14348468412802400256), // VEQVmvm |
| 5480 | UINT64_C(14348468412802400256), // VEQVmvmL |
| 5481 | UINT64_C(14348468412802400256), // VEQVmvmL_v |
| 5482 | UINT64_C(14348468412802400256), // VEQVmvm_v |
| 5483 | UINT64_C(14348468412802400256), // VEQVmvml |
| 5484 | UINT64_C(14348468412802400256), // VEQVmvml_v |
| 5485 | UINT64_C(14348609150290755584), // VEQVrv |
| 5486 | UINT64_C(14348609150290755584), // VEQVrvL |
| 5487 | UINT64_C(14348609150290755584), // VEQVrvL_v |
| 5488 | UINT64_C(14348609150290755584), // VEQVrv_v |
| 5489 | UINT64_C(14348609150290755584), // VEQVrvl |
| 5490 | UINT64_C(14348609150290755584), // VEQVrvl_v |
| 5491 | UINT64_C(14348609150290755584), // VEQVrvm |
| 5492 | UINT64_C(14348609150290755584), // VEQVrvmL |
| 5493 | UINT64_C(14348609150290755584), // VEQVrvmL_v |
| 5494 | UINT64_C(14348609150290755584), // VEQVrvm_v |
| 5495 | UINT64_C(14348609150290755584), // VEQVrvml |
| 5496 | UINT64_C(14348609150290755584), // VEQVrvml_v |
| 5497 | UINT64_C(14339461213547659264), // VEQVvv |
| 5498 | UINT64_C(14339461213547659264), // VEQVvvL |
| 5499 | UINT64_C(14339461213547659264), // VEQVvvL_v |
| 5500 | UINT64_C(14339461213547659264), // VEQVvv_v |
| 5501 | UINT64_C(14339461213547659264), // VEQVvvl |
| 5502 | UINT64_C(14339461213547659264), // VEQVvvl_v |
| 5503 | UINT64_C(14339461213547659264), // VEQVvvm |
| 5504 | UINT64_C(14339461213547659264), // VEQVvvmL |
| 5505 | UINT64_C(14339461213547659264), // VEQVvvmL_v |
| 5506 | UINT64_C(14339461213547659264), // VEQVvvm_v |
| 5507 | UINT64_C(14339461213547659264), // VEQVvvml |
| 5508 | UINT64_C(14339461213547659264), // VEQVvvml_v |
| 5509 | UINT64_C(11313042263954685952), // VEXv |
| 5510 | UINT64_C(11313042263954685952), // VEXvL |
| 5511 | UINT64_C(11313042263954685952), // VEXvL_v |
| 5512 | UINT64_C(11313042263954685952), // VEXv_v |
| 5513 | UINT64_C(11313042263954685952), // VEXvl |
| 5514 | UINT64_C(11313042263954685952), // VEXvl_v |
| 5515 | UINT64_C(11313042263954685952), // VEXvm |
| 5516 | UINT64_C(11313042263954685952), // VEXvmL |
| 5517 | UINT64_C(11313042263954685952), // VEXvmL_v |
| 5518 | UINT64_C(11313042263954685952), // VEXvm_v |
| 5519 | UINT64_C(11313042263954685952), // VEXvml |
| 5520 | UINT64_C(11313042263954685952), // VEXvml_v |
| 5521 | UINT64_C(14708756382992039936), // VFADDDiv |
| 5522 | UINT64_C(14708756382992039936), // VFADDDivL |
| 5523 | UINT64_C(14708756382992039936), // VFADDDivL_v |
| 5524 | UINT64_C(14708756382992039936), // VFADDDiv_v |
| 5525 | UINT64_C(14708756382992039936), // VFADDDivl |
| 5526 | UINT64_C(14708756382992039936), // VFADDDivl_v |
| 5527 | UINT64_C(14708756382992039936), // VFADDDivm |
| 5528 | UINT64_C(14708756382992039936), // VFADDDivmL |
| 5529 | UINT64_C(14708756382992039936), // VFADDDivmL_v |
| 5530 | UINT64_C(14708756382992039936), // VFADDDivm_v |
| 5531 | UINT64_C(14708756382992039936), // VFADDDivml |
| 5532 | UINT64_C(14708756382992039936), // VFADDDivml_v |
| 5533 | UINT64_C(14708897120480395264), // VFADDDrv |
| 5534 | UINT64_C(14708897120480395264), // VFADDDrvL |
| 5535 | UINT64_C(14708897120480395264), // VFADDDrvL_v |
| 5536 | UINT64_C(14708897120480395264), // VFADDDrv_v |
| 5537 | UINT64_C(14708897120480395264), // VFADDDrvl |
| 5538 | UINT64_C(14708897120480395264), // VFADDDrvl_v |
| 5539 | UINT64_C(14708897120480395264), // VFADDDrvm |
| 5540 | UINT64_C(14708897120480395264), // VFADDDrvmL |
| 5541 | UINT64_C(14708897120480395264), // VFADDDrvmL_v |
| 5542 | UINT64_C(14708897120480395264), // VFADDDrvm_v |
| 5543 | UINT64_C(14708897120480395264), // VFADDDrvml |
| 5544 | UINT64_C(14708897120480395264), // VFADDDrvml_v |
| 5545 | UINT64_C(14699749183737298944), // VFADDDvv |
| 5546 | UINT64_C(14699749183737298944), // VFADDDvvL |
| 5547 | UINT64_C(14699749183737298944), // VFADDDvvL_v |
| 5548 | UINT64_C(14699749183737298944), // VFADDDvv_v |
| 5549 | UINT64_C(14699749183737298944), // VFADDDvvl |
| 5550 | UINT64_C(14699749183737298944), // VFADDDvvl_v |
| 5551 | UINT64_C(14699749183737298944), // VFADDDvvm |
| 5552 | UINT64_C(14699749183737298944), // VFADDDvvmL |
| 5553 | UINT64_C(14699749183737298944), // VFADDDvvmL_v |
| 5554 | UINT64_C(14699749183737298944), // VFADDDvvm_v |
| 5555 | UINT64_C(14699749183737298944), // VFADDDvvml |
| 5556 | UINT64_C(14699749183737298944), // VFADDDvvml_v |
| 5557 | UINT64_C(14744785180011003904), // VFADDSiv |
| 5558 | UINT64_C(14744785180011003904), // VFADDSivL |
| 5559 | UINT64_C(14744785180011003904), // VFADDSivL_v |
| 5560 | UINT64_C(14744785180011003904), // VFADDSiv_v |
| 5561 | UINT64_C(14744785180011003904), // VFADDSivl |
| 5562 | UINT64_C(14744785180011003904), // VFADDSivl_v |
| 5563 | UINT64_C(14744785180011003904), // VFADDSivm |
| 5564 | UINT64_C(14744785180011003904), // VFADDSivmL |
| 5565 | UINT64_C(14744785180011003904), // VFADDSivmL_v |
| 5566 | UINT64_C(14744785180011003904), // VFADDSivm_v |
| 5567 | UINT64_C(14744785180011003904), // VFADDSivml |
| 5568 | UINT64_C(14744785180011003904), // VFADDSivml_v |
| 5569 | UINT64_C(14744925917499359232), // VFADDSrv |
| 5570 | UINT64_C(14744925917499359232), // VFADDSrvL |
| 5571 | UINT64_C(14744925917499359232), // VFADDSrvL_v |
| 5572 | UINT64_C(14744925917499359232), // VFADDSrv_v |
| 5573 | UINT64_C(14744925917499359232), // VFADDSrvl |
| 5574 | UINT64_C(14744925917499359232), // VFADDSrvl_v |
| 5575 | UINT64_C(14744925917499359232), // VFADDSrvm |
| 5576 | UINT64_C(14744925917499359232), // VFADDSrvmL |
| 5577 | UINT64_C(14744925917499359232), // VFADDSrvmL_v |
| 5578 | UINT64_C(14744925917499359232), // VFADDSrvm_v |
| 5579 | UINT64_C(14744925917499359232), // VFADDSrvml |
| 5580 | UINT64_C(14744925917499359232), // VFADDSrvml_v |
| 5581 | UINT64_C(14735777980756262912), // VFADDSvv |
| 5582 | UINT64_C(14735777980756262912), // VFADDSvvL |
| 5583 | UINT64_C(14735777980756262912), // VFADDSvvL_v |
| 5584 | UINT64_C(14735777980756262912), // VFADDSvv_v |
| 5585 | UINT64_C(14735777980756262912), // VFADDSvvl |
| 5586 | UINT64_C(14735777980756262912), // VFADDSvvl_v |
| 5587 | UINT64_C(14735777980756262912), // VFADDSvvm |
| 5588 | UINT64_C(14735777980756262912), // VFADDSvvmL |
| 5589 | UINT64_C(14735777980756262912), // VFADDSvvmL_v |
| 5590 | UINT64_C(14735777980756262912), // VFADDSvvm_v |
| 5591 | UINT64_C(14735777980756262912), // VFADDSvvml |
| 5592 | UINT64_C(14735777980756262912), // VFADDSvvml_v |
| 5593 | UINT64_C(18167520896812580864), // VFCMPDiv |
| 5594 | UINT64_C(18167520896812580864), // VFCMPDivL |
| 5595 | UINT64_C(18167520896812580864), // VFCMPDivL_v |
| 5596 | UINT64_C(18167520896812580864), // VFCMPDiv_v |
| 5597 | UINT64_C(18167520896812580864), // VFCMPDivl |
| 5598 | UINT64_C(18167520896812580864), // VFCMPDivl_v |
| 5599 | UINT64_C(18167520896812580864), // VFCMPDivm |
| 5600 | UINT64_C(18167520896812580864), // VFCMPDivmL |
| 5601 | UINT64_C(18167520896812580864), // VFCMPDivmL_v |
| 5602 | UINT64_C(18167520896812580864), // VFCMPDivm_v |
| 5603 | UINT64_C(18167520896812580864), // VFCMPDivml |
| 5604 | UINT64_C(18167520896812580864), // VFCMPDivml_v |
| 5605 | UINT64_C(18167661634300936192), // VFCMPDrv |
| 5606 | UINT64_C(18167661634300936192), // VFCMPDrvL |
| 5607 | UINT64_C(18167661634300936192), // VFCMPDrvL_v |
| 5608 | UINT64_C(18167661634300936192), // VFCMPDrv_v |
| 5609 | UINT64_C(18167661634300936192), // VFCMPDrvl |
| 5610 | UINT64_C(18167661634300936192), // VFCMPDrvl_v |
| 5611 | UINT64_C(18167661634300936192), // VFCMPDrvm |
| 5612 | UINT64_C(18167661634300936192), // VFCMPDrvmL |
| 5613 | UINT64_C(18167661634300936192), // VFCMPDrvmL_v |
| 5614 | UINT64_C(18167661634300936192), // VFCMPDrvm_v |
| 5615 | UINT64_C(18167661634300936192), // VFCMPDrvml |
| 5616 | UINT64_C(18167661634300936192), // VFCMPDrvml_v |
| 5617 | UINT64_C(18158513697557839872), // VFCMPDvv |
| 5618 | UINT64_C(18158513697557839872), // VFCMPDvvL |
| 5619 | UINT64_C(18158513697557839872), // VFCMPDvvL_v |
| 5620 | UINT64_C(18158513697557839872), // VFCMPDvv_v |
| 5621 | UINT64_C(18158513697557839872), // VFCMPDvvl |
| 5622 | UINT64_C(18158513697557839872), // VFCMPDvvl_v |
| 5623 | UINT64_C(18158513697557839872), // VFCMPDvvm |
| 5624 | UINT64_C(18158513697557839872), // VFCMPDvvmL |
| 5625 | UINT64_C(18158513697557839872), // VFCMPDvvmL_v |
| 5626 | UINT64_C(18158513697557839872), // VFCMPDvvm_v |
| 5627 | UINT64_C(18158513697557839872), // VFCMPDvvml |
| 5628 | UINT64_C(18158513697557839872), // VFCMPDvvml_v |
| 5629 | UINT64_C(18203549693831544832), // VFCMPSiv |
| 5630 | UINT64_C(18203549693831544832), // VFCMPSivL |
| 5631 | UINT64_C(18203549693831544832), // VFCMPSivL_v |
| 5632 | UINT64_C(18203549693831544832), // VFCMPSiv_v |
| 5633 | UINT64_C(18203549693831544832), // VFCMPSivl |
| 5634 | UINT64_C(18203549693831544832), // VFCMPSivl_v |
| 5635 | UINT64_C(18203549693831544832), // VFCMPSivm |
| 5636 | UINT64_C(18203549693831544832), // VFCMPSivmL |
| 5637 | UINT64_C(18203549693831544832), // VFCMPSivmL_v |
| 5638 | UINT64_C(18203549693831544832), // VFCMPSivm_v |
| 5639 | UINT64_C(18203549693831544832), // VFCMPSivml |
| 5640 | UINT64_C(18203549693831544832), // VFCMPSivml_v |
| 5641 | UINT64_C(18203690431319900160), // VFCMPSrv |
| 5642 | UINT64_C(18203690431319900160), // VFCMPSrvL |
| 5643 | UINT64_C(18203690431319900160), // VFCMPSrvL_v |
| 5644 | UINT64_C(18203690431319900160), // VFCMPSrv_v |
| 5645 | UINT64_C(18203690431319900160), // VFCMPSrvl |
| 5646 | UINT64_C(18203690431319900160), // VFCMPSrvl_v |
| 5647 | UINT64_C(18203690431319900160), // VFCMPSrvm |
| 5648 | UINT64_C(18203690431319900160), // VFCMPSrvmL |
| 5649 | UINT64_C(18203690431319900160), // VFCMPSrvmL_v |
| 5650 | UINT64_C(18203690431319900160), // VFCMPSrvm_v |
| 5651 | UINT64_C(18203690431319900160), // VFCMPSrvml |
| 5652 | UINT64_C(18203690431319900160), // VFCMPSrvml_v |
| 5653 | UINT64_C(18194542494576803840), // VFCMPSvv |
| 5654 | UINT64_C(18194542494576803840), // VFCMPSvvL |
| 5655 | UINT64_C(18194542494576803840), // VFCMPSvvL_v |
| 5656 | UINT64_C(18194542494576803840), // VFCMPSvv_v |
| 5657 | UINT64_C(18194542494576803840), // VFCMPSvvl |
| 5658 | UINT64_C(18194542494576803840), // VFCMPSvvl_v |
| 5659 | UINT64_C(18194542494576803840), // VFCMPSvvm |
| 5660 | UINT64_C(18194542494576803840), // VFCMPSvvmL |
| 5661 | UINT64_C(18194542494576803840), // VFCMPSvvmL_v |
| 5662 | UINT64_C(18194542494576803840), // VFCMPSvvm_v |
| 5663 | UINT64_C(18194542494576803840), // VFCMPSvvml |
| 5664 | UINT64_C(18194542494576803840), // VFCMPSvvml_v |
| 5665 | UINT64_C(15933735481636814848), // VFDIVDiv |
| 5666 | UINT64_C(15933735481636814848), // VFDIVDivL |
| 5667 | UINT64_C(15933735481636814848), // VFDIVDivL_v |
| 5668 | UINT64_C(15933735481636814848), // VFDIVDiv_v |
| 5669 | UINT64_C(15933735481636814848), // VFDIVDivl |
| 5670 | UINT64_C(15933735481636814848), // VFDIVDivl_v |
| 5671 | UINT64_C(15933735481636814848), // VFDIVDivm |
| 5672 | UINT64_C(15933735481636814848), // VFDIVDivmL |
| 5673 | UINT64_C(15933735481636814848), // VFDIVDivmL_v |
| 5674 | UINT64_C(15933735481636814848), // VFDIVDivm_v |
| 5675 | UINT64_C(15933735481636814848), // VFDIVDivml |
| 5676 | UINT64_C(15933735481636814848), // VFDIVDivml_v |
| 5677 | UINT64_C(15933876219125170176), // VFDIVDrv |
| 5678 | UINT64_C(15933876219125170176), // VFDIVDrvL |
| 5679 | UINT64_C(15933876219125170176), // VFDIVDrvL_v |
| 5680 | UINT64_C(15933876219125170176), // VFDIVDrv_v |
| 5681 | UINT64_C(15933876219125170176), // VFDIVDrvl |
| 5682 | UINT64_C(15933876219125170176), // VFDIVDrvl_v |
| 5683 | UINT64_C(15933876219125170176), // VFDIVDrvm |
| 5684 | UINT64_C(15933876219125170176), // VFDIVDrvmL |
| 5685 | UINT64_C(15933876219125170176), // VFDIVDrvmL_v |
| 5686 | UINT64_C(15933876219125170176), // VFDIVDrvm_v |
| 5687 | UINT64_C(15933876219125170176), // VFDIVDrvml |
| 5688 | UINT64_C(15933876219125170176), // VFDIVDrvml_v |
| 5689 | UINT64_C(15929231882009444352), // VFDIVDvi |
| 5690 | UINT64_C(15929231882009444352), // VFDIVDviL |
| 5691 | UINT64_C(15929231882009444352), // VFDIVDviL_v |
| 5692 | UINT64_C(15929231882009444352), // VFDIVDvi_v |
| 5693 | UINT64_C(15929231882009444352), // VFDIVDvil |
| 5694 | UINT64_C(15929231882009444352), // VFDIVDvil_v |
| 5695 | UINT64_C(15929231882009444352), // VFDIVDvim |
| 5696 | UINT64_C(15929231882009444352), // VFDIVDvimL |
| 5697 | UINT64_C(15929231882009444352), // VFDIVDvimL_v |
| 5698 | UINT64_C(15929231882009444352), // VFDIVDvim_v |
| 5699 | UINT64_C(15929231882009444352), // VFDIVDviml |
| 5700 | UINT64_C(15929231882009444352), // VFDIVDviml_v |
| 5701 | UINT64_C(15929372619497799680), // VFDIVDvr |
| 5702 | UINT64_C(15929372619497799680), // VFDIVDvrL |
| 5703 | UINT64_C(15929372619497799680), // VFDIVDvrL_v |
| 5704 | UINT64_C(15929372619497799680), // VFDIVDvr_v |
| 5705 | UINT64_C(15929372619497799680), // VFDIVDvrl |
| 5706 | UINT64_C(15929372619497799680), // VFDIVDvrl_v |
| 5707 | UINT64_C(15929372619497799680), // VFDIVDvrm |
| 5708 | UINT64_C(15929372619497799680), // VFDIVDvrmL |
| 5709 | UINT64_C(15929372619497799680), // VFDIVDvrmL_v |
| 5710 | UINT64_C(15929372619497799680), // VFDIVDvrm_v |
| 5711 | UINT64_C(15929372619497799680), // VFDIVDvrml |
| 5712 | UINT64_C(15929372619497799680), // VFDIVDvrml_v |
| 5713 | UINT64_C(15924728282382073856), // VFDIVDvv |
| 5714 | UINT64_C(15924728282382073856), // VFDIVDvvL |
| 5715 | UINT64_C(15924728282382073856), // VFDIVDvvL_v |
| 5716 | UINT64_C(15924728282382073856), // VFDIVDvv_v |
| 5717 | UINT64_C(15924728282382073856), // VFDIVDvvl |
| 5718 | UINT64_C(15924728282382073856), // VFDIVDvvl_v |
| 5719 | UINT64_C(15924728282382073856), // VFDIVDvvm |
| 5720 | UINT64_C(15924728282382073856), // VFDIVDvvmL |
| 5721 | UINT64_C(15924728282382073856), // VFDIVDvvmL_v |
| 5722 | UINT64_C(15924728282382073856), // VFDIVDvvm_v |
| 5723 | UINT64_C(15924728282382073856), // VFDIVDvvml |
| 5724 | UINT64_C(15924728282382073856), // VFDIVDvvml_v |
| 5725 | UINT64_C(15969764278655778816), // VFDIVSiv |
| 5726 | UINT64_C(15969764278655778816), // VFDIVSivL |
| 5727 | UINT64_C(15969764278655778816), // VFDIVSivL_v |
| 5728 | UINT64_C(15969764278655778816), // VFDIVSiv_v |
| 5729 | UINT64_C(15969764278655778816), // VFDIVSivl |
| 5730 | UINT64_C(15969764278655778816), // VFDIVSivl_v |
| 5731 | UINT64_C(15969764278655778816), // VFDIVSivm |
| 5732 | UINT64_C(15969764278655778816), // VFDIVSivmL |
| 5733 | UINT64_C(15969764278655778816), // VFDIVSivmL_v |
| 5734 | UINT64_C(15969764278655778816), // VFDIVSivm_v |
| 5735 | UINT64_C(15969764278655778816), // VFDIVSivml |
| 5736 | UINT64_C(15969764278655778816), // VFDIVSivml_v |
| 5737 | UINT64_C(15969905016144134144), // VFDIVSrv |
| 5738 | UINT64_C(15969905016144134144), // VFDIVSrvL |
| 5739 | UINT64_C(15969905016144134144), // VFDIVSrvL_v |
| 5740 | UINT64_C(15969905016144134144), // VFDIVSrv_v |
| 5741 | UINT64_C(15969905016144134144), // VFDIVSrvl |
| 5742 | UINT64_C(15969905016144134144), // VFDIVSrvl_v |
| 5743 | UINT64_C(15969905016144134144), // VFDIVSrvm |
| 5744 | UINT64_C(15969905016144134144), // VFDIVSrvmL |
| 5745 | UINT64_C(15969905016144134144), // VFDIVSrvmL_v |
| 5746 | UINT64_C(15969905016144134144), // VFDIVSrvm_v |
| 5747 | UINT64_C(15969905016144134144), // VFDIVSrvml |
| 5748 | UINT64_C(15969905016144134144), // VFDIVSrvml_v |
| 5749 | UINT64_C(15965260679028408320), // VFDIVSvi |
| 5750 | UINT64_C(15965260679028408320), // VFDIVSviL |
| 5751 | UINT64_C(15965260679028408320), // VFDIVSviL_v |
| 5752 | UINT64_C(15965260679028408320), // VFDIVSvi_v |
| 5753 | UINT64_C(15965260679028408320), // VFDIVSvil |
| 5754 | UINT64_C(15965260679028408320), // VFDIVSvil_v |
| 5755 | UINT64_C(15965260679028408320), // VFDIVSvim |
| 5756 | UINT64_C(15965260679028408320), // VFDIVSvimL |
| 5757 | UINT64_C(15965260679028408320), // VFDIVSvimL_v |
| 5758 | UINT64_C(15965260679028408320), // VFDIVSvim_v |
| 5759 | UINT64_C(15965260679028408320), // VFDIVSviml |
| 5760 | UINT64_C(15965260679028408320), // VFDIVSviml_v |
| 5761 | UINT64_C(15965401416516763648), // VFDIVSvr |
| 5762 | UINT64_C(15965401416516763648), // VFDIVSvrL |
| 5763 | UINT64_C(15965401416516763648), // VFDIVSvrL_v |
| 5764 | UINT64_C(15965401416516763648), // VFDIVSvr_v |
| 5765 | UINT64_C(15965401416516763648), // VFDIVSvrl |
| 5766 | UINT64_C(15965401416516763648), // VFDIVSvrl_v |
| 5767 | UINT64_C(15965401416516763648), // VFDIVSvrm |
| 5768 | UINT64_C(15965401416516763648), // VFDIVSvrmL |
| 5769 | UINT64_C(15965401416516763648), // VFDIVSvrmL_v |
| 5770 | UINT64_C(15965401416516763648), // VFDIVSvrm_v |
| 5771 | UINT64_C(15965401416516763648), // VFDIVSvrml |
| 5772 | UINT64_C(15965401416516763648), // VFDIVSvrml_v |
| 5773 | UINT64_C(15960757079401037824), // VFDIVSvv |
| 5774 | UINT64_C(15960757079401037824), // VFDIVSvvL |
| 5775 | UINT64_C(15960757079401037824), // VFDIVSvvL_v |
| 5776 | UINT64_C(15960757079401037824), // VFDIVSvv_v |
| 5777 | UINT64_C(15960757079401037824), // VFDIVSvvl |
| 5778 | UINT64_C(15960757079401037824), // VFDIVSvvl_v |
| 5779 | UINT64_C(15960757079401037824), // VFDIVSvvm |
| 5780 | UINT64_C(15960757079401037824), // VFDIVSvvmL |
| 5781 | UINT64_C(15960757079401037824), // VFDIVSvvmL_v |
| 5782 | UINT64_C(15960757079401037824), // VFDIVSvvm_v |
| 5783 | UINT64_C(15960757079401037824), // VFDIVSvvml |
| 5784 | UINT64_C(15960757079401037824), // VFDIVSvvml_v |
| 5785 | UINT64_C(14843864371813154816), // VFIADvi |
| 5786 | UINT64_C(14843864371813154816), // VFIADviL |
| 5787 | UINT64_C(14843864371813154816), // VFIADviL_v |
| 5788 | UINT64_C(14843864371813154816), // VFIADvi_v |
| 5789 | UINT64_C(14843864371813154816), // VFIADvil |
| 5790 | UINT64_C(14843864371813154816), // VFIADvil_v |
| 5791 | UINT64_C(14844005109301510144), // VFIADvr |
| 5792 | UINT64_C(14844005109301510144), // VFIADvrL |
| 5793 | UINT64_C(14844005109301510144), // VFIADvrL_v |
| 5794 | UINT64_C(14844005109301510144), // VFIADvr_v |
| 5795 | UINT64_C(14844005109301510144), // VFIADvrl |
| 5796 | UINT64_C(14844005109301510144), // VFIADvrl_v |
| 5797 | UINT64_C(17149707381026848768), // VFIAMDvvi |
| 5798 | UINT64_C(17149707381026848768), // VFIAMDvviL |
| 5799 | UINT64_C(17149707381026848768), // VFIAMDvviL_v |
| 5800 | UINT64_C(17149707381026848768), // VFIAMDvvi_v |
| 5801 | UINT64_C(17149707381026848768), // VFIAMDvvil |
| 5802 | UINT64_C(17149707381026848768), // VFIAMDvvil_v |
| 5803 | UINT64_C(17149848118515204096), // VFIAMDvvr |
| 5804 | UINT64_C(17149848118515204096), // VFIAMDvvrL |
| 5805 | UINT64_C(17149848118515204096), // VFIAMDvvrL_v |
| 5806 | UINT64_C(17149848118515204096), // VFIAMDvvr_v |
| 5807 | UINT64_C(17149848118515204096), // VFIAMDvvrl |
| 5808 | UINT64_C(17149848118515204096), // VFIAMDvvrl_v |
| 5809 | UINT64_C(17185736178045812736), // VFIAMSvvi |
| 5810 | UINT64_C(17185736178045812736), // VFIAMSvviL |
| 5811 | UINT64_C(17185736178045812736), // VFIAMSvviL_v |
| 5812 | UINT64_C(17185736178045812736), // VFIAMSvvi_v |
| 5813 | UINT64_C(17185736178045812736), // VFIAMSvvil |
| 5814 | UINT64_C(17185736178045812736), // VFIAMSvvil_v |
| 5815 | UINT64_C(17185876915534168064), // VFIAMSvvr |
| 5816 | UINT64_C(17185876915534168064), // VFIAMSvvrL |
| 5817 | UINT64_C(17185876915534168064), // VFIAMSvvrL_v |
| 5818 | UINT64_C(17185876915534168064), // VFIAMSvvr_v |
| 5819 | UINT64_C(17185876915534168064), // VFIAMSvvrl |
| 5820 | UINT64_C(17185876915534168064), // VFIAMSvvrl_v |
| 5821 | UINT64_C(14879893168832118784), // VFIASvi |
| 5822 | UINT64_C(14879893168832118784), // VFIASviL |
| 5823 | UINT64_C(14879893168832118784), // VFIASviL_v |
| 5824 | UINT64_C(14879893168832118784), // VFIASvi_v |
| 5825 | UINT64_C(14879893168832118784), // VFIASvil |
| 5826 | UINT64_C(14879893168832118784), // VFIASvil_v |
| 5827 | UINT64_C(14880033906320474112), // VFIASvr |
| 5828 | UINT64_C(14880033906320474112), // VFIASvrL |
| 5829 | UINT64_C(14880033906320474112), // VFIASvrL_v |
| 5830 | UINT64_C(14880033906320474112), // VFIASvr_v |
| 5831 | UINT64_C(14880033906320474112), // VFIASvrl |
| 5832 | UINT64_C(14880033906320474112), // VFIASvrl_v |
| 5833 | UINT64_C(17221764975064776704), // VFIMADvvi |
| 5834 | UINT64_C(17221764975064776704), // VFIMADvviL |
| 5835 | UINT64_C(17221764975064776704), // VFIMADvviL_v |
| 5836 | UINT64_C(17221764975064776704), // VFIMADvvi_v |
| 5837 | UINT64_C(17221764975064776704), // VFIMADvvil |
| 5838 | UINT64_C(17221764975064776704), // VFIMADvvil_v |
| 5839 | UINT64_C(17221905712553132032), // VFIMADvvr |
| 5840 | UINT64_C(17221905712553132032), // VFIMADvvrL |
| 5841 | UINT64_C(17221905712553132032), // VFIMADvvrL_v |
| 5842 | UINT64_C(17221905712553132032), // VFIMADvvr_v |
| 5843 | UINT64_C(17221905712553132032), // VFIMADvvrl |
| 5844 | UINT64_C(17221905712553132032), // VFIMADvvrl_v |
| 5845 | UINT64_C(17257793772083740672), // VFIMASvvi |
| 5846 | UINT64_C(17257793772083740672), // VFIMASvviL |
| 5847 | UINT64_C(17257793772083740672), // VFIMASvviL_v |
| 5848 | UINT64_C(17257793772083740672), // VFIMASvvi_v |
| 5849 | UINT64_C(17257793772083740672), // VFIMASvvil |
| 5850 | UINT64_C(17257793772083740672), // VFIMASvvil_v |
| 5851 | UINT64_C(17257934509572096000), // VFIMASvvr |
| 5852 | UINT64_C(17257934509572096000), // VFIMASvvrL |
| 5853 | UINT64_C(17257934509572096000), // VFIMASvvrL_v |
| 5854 | UINT64_C(17257934509572096000), // VFIMASvvr_v |
| 5855 | UINT64_C(17257934509572096000), // VFIMASvvrl |
| 5856 | UINT64_C(17257934509572096000), // VFIMASvvrl_v |
| 5857 | UINT64_C(14915921965851082752), // VFIMDvi |
| 5858 | UINT64_C(14915921965851082752), // VFIMDviL |
| 5859 | UINT64_C(14915921965851082752), // VFIMDviL_v |
| 5860 | UINT64_C(14915921965851082752), // VFIMDvi_v |
| 5861 | UINT64_C(14915921965851082752), // VFIMDvil |
| 5862 | UINT64_C(14915921965851082752), // VFIMDvil_v |
| 5863 | UINT64_C(14916062703339438080), // VFIMDvr |
| 5864 | UINT64_C(14916062703339438080), // VFIMDvrL |
| 5865 | UINT64_C(14916062703339438080), // VFIMDvrL_v |
| 5866 | UINT64_C(14916062703339438080), // VFIMDvr_v |
| 5867 | UINT64_C(14916062703339438080), // VFIMDvrl |
| 5868 | UINT64_C(14916062703339438080), // VFIMDvrl_v |
| 5869 | UINT64_C(18374686479671623680), // VFIMSDvvi |
| 5870 | UINT64_C(18374686479671623680), // VFIMSDvviL |
| 5871 | UINT64_C(18374686479671623680), // VFIMSDvviL_v |
| 5872 | UINT64_C(18374686479671623680), // VFIMSDvvi_v |
| 5873 | UINT64_C(18374686479671623680), // VFIMSDvvil |
| 5874 | UINT64_C(18374686479671623680), // VFIMSDvvil_v |
| 5875 | UINT64_C(18374827217159979008), // VFIMSDvvr |
| 5876 | UINT64_C(18374827217159979008), // VFIMSDvvrL |
| 5877 | UINT64_C(18374827217159979008), // VFIMSDvvrL_v |
| 5878 | UINT64_C(18374827217159979008), // VFIMSDvvr_v |
| 5879 | UINT64_C(18374827217159979008), // VFIMSDvvrl |
| 5880 | UINT64_C(18374827217159979008), // VFIMSDvvrl_v |
| 5881 | UINT64_C(18410715276690587648), // VFIMSSvvi |
| 5882 | UINT64_C(18410715276690587648), // VFIMSSvviL |
| 5883 | UINT64_C(18410715276690587648), // VFIMSSvviL_v |
| 5884 | UINT64_C(18410715276690587648), // VFIMSSvvi_v |
| 5885 | UINT64_C(18410715276690587648), // VFIMSSvvil |
| 5886 | UINT64_C(18410715276690587648), // VFIMSSvvil_v |
| 5887 | UINT64_C(18410856014178942976), // VFIMSSvvr |
| 5888 | UINT64_C(18410856014178942976), // VFIMSSvvrL |
| 5889 | UINT64_C(18410856014178942976), // VFIMSSvvrL_v |
| 5890 | UINT64_C(18410856014178942976), // VFIMSSvvr_v |
| 5891 | UINT64_C(18410856014178942976), // VFIMSSvvrl |
| 5892 | UINT64_C(18410856014178942976), // VFIMSSvvrl_v |
| 5893 | UINT64_C(14951950762870046720), // VFIMSvi |
| 5894 | UINT64_C(14951950762870046720), // VFIMSviL |
| 5895 | UINT64_C(14951950762870046720), // VFIMSviL_v |
| 5896 | UINT64_C(14951950762870046720), // VFIMSvi_v |
| 5897 | UINT64_C(14951950762870046720), // VFIMSvil |
| 5898 | UINT64_C(14951950762870046720), // VFIMSvil_v |
| 5899 | UINT64_C(14952091500358402048), // VFIMSvr |
| 5900 | UINT64_C(14952091500358402048), // VFIMSvrL |
| 5901 | UINT64_C(14952091500358402048), // VFIMSvrL_v |
| 5902 | UINT64_C(14952091500358402048), // VFIMSvr_v |
| 5903 | UINT64_C(14952091500358402048), // VFIMSvrl |
| 5904 | UINT64_C(14952091500358402048), // VFIMSvrl_v |
| 5905 | UINT64_C(15996785876420001792), // VFISDvi |
| 5906 | UINT64_C(15996785876420001792), // VFISDviL |
| 5907 | UINT64_C(15996785876420001792), // VFISDviL_v |
| 5908 | UINT64_C(15996785876420001792), // VFISDvi_v |
| 5909 | UINT64_C(15996785876420001792), // VFISDvil |
| 5910 | UINT64_C(15996785876420001792), // VFISDvil_v |
| 5911 | UINT64_C(15996926613908357120), // VFISDvr |
| 5912 | UINT64_C(15996926613908357120), // VFISDvrL |
| 5913 | UINT64_C(15996926613908357120), // VFISDvrL_v |
| 5914 | UINT64_C(15996926613908357120), // VFISDvr_v |
| 5915 | UINT64_C(15996926613908357120), // VFISDvrl |
| 5916 | UINT64_C(15996926613908357120), // VFISDvrl_v |
| 5917 | UINT64_C(18302628885633695744), // VFISMDvvi |
| 5918 | UINT64_C(18302628885633695744), // VFISMDvviL |
| 5919 | UINT64_C(18302628885633695744), // VFISMDvviL_v |
| 5920 | UINT64_C(18302628885633695744), // VFISMDvvi_v |
| 5921 | UINT64_C(18302628885633695744), // VFISMDvvil |
| 5922 | UINT64_C(18302628885633695744), // VFISMDvvil_v |
| 5923 | UINT64_C(18302769623122051072), // VFISMDvvr |
| 5924 | UINT64_C(18302769623122051072), // VFISMDvvrL |
| 5925 | UINT64_C(18302769623122051072), // VFISMDvvrL_v |
| 5926 | UINT64_C(18302769623122051072), // VFISMDvvr_v |
| 5927 | UINT64_C(18302769623122051072), // VFISMDvvrl |
| 5928 | UINT64_C(18302769623122051072), // VFISMDvvrl_v |
| 5929 | UINT64_C(18338657682652659712), // VFISMSvvi |
| 5930 | UINT64_C(18338657682652659712), // VFISMSvviL |
| 5931 | UINT64_C(18338657682652659712), // VFISMSvviL_v |
| 5932 | UINT64_C(18338657682652659712), // VFISMSvvi_v |
| 5933 | UINT64_C(18338657682652659712), // VFISMSvvil |
| 5934 | UINT64_C(18338657682652659712), // VFISMSvvil_v |
| 5935 | UINT64_C(18338798420141015040), // VFISMSvvr |
| 5936 | UINT64_C(18338798420141015040), // VFISMSvvrL |
| 5937 | UINT64_C(18338798420141015040), // VFISMSvvrL_v |
| 5938 | UINT64_C(18338798420141015040), // VFISMSvvr_v |
| 5939 | UINT64_C(18338798420141015040), // VFISMSvvrl |
| 5940 | UINT64_C(18338798420141015040), // VFISMSvvrl_v |
| 5941 | UINT64_C(16032814673438965760), // VFISSvi |
| 5942 | UINT64_C(16032814673438965760), // VFISSviL |
| 5943 | UINT64_C(16032814673438965760), // VFISSviL_v |
| 5944 | UINT64_C(16032814673438965760), // VFISSvi_v |
| 5945 | UINT64_C(16032814673438965760), // VFISSvil |
| 5946 | UINT64_C(16032814673438965760), // VFISSvil_v |
| 5947 | UINT64_C(16032955410927321088), // VFISSvr |
| 5948 | UINT64_C(16032955410927321088), // VFISSvrL |
| 5949 | UINT64_C(16032955410927321088), // VFISSvrL_v |
| 5950 | UINT64_C(16032955410927321088), // VFISSvr_v |
| 5951 | UINT64_C(16032955410927321088), // VFISSvrl |
| 5952 | UINT64_C(16032955410927321088), // VFISSvrl_v |
| 5953 | UINT64_C(16294023451826454528), // VFMADDivv |
| 5954 | UINT64_C(16294023451826454528), // VFMADDivvL |
| 5955 | UINT64_C(16294023451826454528), // VFMADDivvL_v |
| 5956 | UINT64_C(16294023451826454528), // VFMADDivv_v |
| 5957 | UINT64_C(16294023451826454528), // VFMADDivvl |
| 5958 | UINT64_C(16294023451826454528), // VFMADDivvl_v |
| 5959 | UINT64_C(16294023451826454528), // VFMADDivvm |
| 5960 | UINT64_C(16294023451826454528), // VFMADDivvmL |
| 5961 | UINT64_C(16294023451826454528), // VFMADDivvmL_v |
| 5962 | UINT64_C(16294023451826454528), // VFMADDivvm_v |
| 5963 | UINT64_C(16294023451826454528), // VFMADDivvml |
| 5964 | UINT64_C(16294023451826454528), // VFMADDivvml_v |
| 5965 | UINT64_C(16294164189314809856), // VFMADDrvv |
| 5966 | UINT64_C(16294164189314809856), // VFMADDrvvL |
| 5967 | UINT64_C(16294164189314809856), // VFMADDrvvL_v |
| 5968 | UINT64_C(16294164189314809856), // VFMADDrvv_v |
| 5969 | UINT64_C(16294164189314809856), // VFMADDrvvl |
| 5970 | UINT64_C(16294164189314809856), // VFMADDrvvl_v |
| 5971 | UINT64_C(16294164189314809856), // VFMADDrvvm |
| 5972 | UINT64_C(16294164189314809856), // VFMADDrvvmL |
| 5973 | UINT64_C(16294164189314809856), // VFMADDrvvmL_v |
| 5974 | UINT64_C(16294164189314809856), // VFMADDrvvm_v |
| 5975 | UINT64_C(16294164189314809856), // VFMADDrvvml |
| 5976 | UINT64_C(16294164189314809856), // VFMADDrvvml_v |
| 5977 | UINT64_C(16289519852199084032), // VFMADDviv |
| 5978 | UINT64_C(16289519852199084032), // VFMADDvivL |
| 5979 | UINT64_C(16289519852199084032), // VFMADDvivL_v |
| 5980 | UINT64_C(16289519852199084032), // VFMADDviv_v |
| 5981 | UINT64_C(16289519852199084032), // VFMADDvivl |
| 5982 | UINT64_C(16289519852199084032), // VFMADDvivl_v |
| 5983 | UINT64_C(16289519852199084032), // VFMADDvivm |
| 5984 | UINT64_C(16289519852199084032), // VFMADDvivmL |
| 5985 | UINT64_C(16289519852199084032), // VFMADDvivmL_v |
| 5986 | UINT64_C(16289519852199084032), // VFMADDvivm_v |
| 5987 | UINT64_C(16289519852199084032), // VFMADDvivml |
| 5988 | UINT64_C(16289519852199084032), // VFMADDvivml_v |
| 5989 | UINT64_C(16289660589687439360), // VFMADDvrv |
| 5990 | UINT64_C(16289660589687439360), // VFMADDvrvL |
| 5991 | UINT64_C(16289660589687439360), // VFMADDvrvL_v |
| 5992 | UINT64_C(16289660589687439360), // VFMADDvrv_v |
| 5993 | UINT64_C(16289660589687439360), // VFMADDvrvl |
| 5994 | UINT64_C(16289660589687439360), // VFMADDvrvl_v |
| 5995 | UINT64_C(16289660589687439360), // VFMADDvrvm |
| 5996 | UINT64_C(16289660589687439360), // VFMADDvrvmL |
| 5997 | UINT64_C(16289660589687439360), // VFMADDvrvmL_v |
| 5998 | UINT64_C(16289660589687439360), // VFMADDvrvm_v |
| 5999 | UINT64_C(16289660589687439360), // VFMADDvrvml |
| 6000 | UINT64_C(16289660589687439360), // VFMADDvrvml_v |
| 6001 | UINT64_C(16285016252571713536), // VFMADDvvv |
| 6002 | UINT64_C(16285016252571713536), // VFMADDvvvL |
| 6003 | UINT64_C(16285016252571713536), // VFMADDvvvL_v |
| 6004 | UINT64_C(16285016252571713536), // VFMADDvvv_v |
| 6005 | UINT64_C(16285016252571713536), // VFMADDvvvl |
| 6006 | UINT64_C(16285016252571713536), // VFMADDvvvl_v |
| 6007 | UINT64_C(16285016252571713536), // VFMADDvvvm |
| 6008 | UINT64_C(16285016252571713536), // VFMADDvvvmL |
| 6009 | UINT64_C(16285016252571713536), // VFMADDvvvmL_v |
| 6010 | UINT64_C(16285016252571713536), // VFMADDvvvm_v |
| 6011 | UINT64_C(16285016252571713536), // VFMADDvvvml |
| 6012 | UINT64_C(16285016252571713536), // VFMADDvvvml_v |
| 6013 | UINT64_C(16330052248845418496), // VFMADSivv |
| 6014 | UINT64_C(16330052248845418496), // VFMADSivvL |
| 6015 | UINT64_C(16330052248845418496), // VFMADSivvL_v |
| 6016 | UINT64_C(16330052248845418496), // VFMADSivv_v |
| 6017 | UINT64_C(16330052248845418496), // VFMADSivvl |
| 6018 | UINT64_C(16330052248845418496), // VFMADSivvl_v |
| 6019 | UINT64_C(16330052248845418496), // VFMADSivvm |
| 6020 | UINT64_C(16330052248845418496), // VFMADSivvmL |
| 6021 | UINT64_C(16330052248845418496), // VFMADSivvmL_v |
| 6022 | UINT64_C(16330052248845418496), // VFMADSivvm_v |
| 6023 | UINT64_C(16330052248845418496), // VFMADSivvml |
| 6024 | UINT64_C(16330052248845418496), // VFMADSivvml_v |
| 6025 | UINT64_C(16330192986333773824), // VFMADSrvv |
| 6026 | UINT64_C(16330192986333773824), // VFMADSrvvL |
| 6027 | UINT64_C(16330192986333773824), // VFMADSrvvL_v |
| 6028 | UINT64_C(16330192986333773824), // VFMADSrvv_v |
| 6029 | UINT64_C(16330192986333773824), // VFMADSrvvl |
| 6030 | UINT64_C(16330192986333773824), // VFMADSrvvl_v |
| 6031 | UINT64_C(16330192986333773824), // VFMADSrvvm |
| 6032 | UINT64_C(16330192986333773824), // VFMADSrvvmL |
| 6033 | UINT64_C(16330192986333773824), // VFMADSrvvmL_v |
| 6034 | UINT64_C(16330192986333773824), // VFMADSrvvm_v |
| 6035 | UINT64_C(16330192986333773824), // VFMADSrvvml |
| 6036 | UINT64_C(16330192986333773824), // VFMADSrvvml_v |
| 6037 | UINT64_C(16325548649218048000), // VFMADSviv |
| 6038 | UINT64_C(16325548649218048000), // VFMADSvivL |
| 6039 | UINT64_C(16325548649218048000), // VFMADSvivL_v |
| 6040 | UINT64_C(16325548649218048000), // VFMADSviv_v |
| 6041 | UINT64_C(16325548649218048000), // VFMADSvivl |
| 6042 | UINT64_C(16325548649218048000), // VFMADSvivl_v |
| 6043 | UINT64_C(16325548649218048000), // VFMADSvivm |
| 6044 | UINT64_C(16325548649218048000), // VFMADSvivmL |
| 6045 | UINT64_C(16325548649218048000), // VFMADSvivmL_v |
| 6046 | UINT64_C(16325548649218048000), // VFMADSvivm_v |
| 6047 | UINT64_C(16325548649218048000), // VFMADSvivml |
| 6048 | UINT64_C(16325548649218048000), // VFMADSvivml_v |
| 6049 | UINT64_C(16325689386706403328), // VFMADSvrv |
| 6050 | UINT64_C(16325689386706403328), // VFMADSvrvL |
| 6051 | UINT64_C(16325689386706403328), // VFMADSvrvL_v |
| 6052 | UINT64_C(16325689386706403328), // VFMADSvrv_v |
| 6053 | UINT64_C(16325689386706403328), // VFMADSvrvl |
| 6054 | UINT64_C(16325689386706403328), // VFMADSvrvl_v |
| 6055 | UINT64_C(16325689386706403328), // VFMADSvrvm |
| 6056 | UINT64_C(16325689386706403328), // VFMADSvrvmL |
| 6057 | UINT64_C(16325689386706403328), // VFMADSvrvmL_v |
| 6058 | UINT64_C(16325689386706403328), // VFMADSvrvm_v |
| 6059 | UINT64_C(16325689386706403328), // VFMADSvrvml |
| 6060 | UINT64_C(16325689386706403328), // VFMADSvrvml_v |
| 6061 | UINT64_C(16321045049590677504), // VFMADSvvv |
| 6062 | UINT64_C(16321045049590677504), // VFMADSvvvL |
| 6063 | UINT64_C(16321045049590677504), // VFMADSvvvL_v |
| 6064 | UINT64_C(16321045049590677504), // VFMADSvvv_v |
| 6065 | UINT64_C(16321045049590677504), // VFMADSvvvl |
| 6066 | UINT64_C(16321045049590677504), // VFMADSvvvl_v |
| 6067 | UINT64_C(16321045049590677504), // VFMADSvvvm |
| 6068 | UINT64_C(16321045049590677504), // VFMADSvvvmL |
| 6069 | UINT64_C(16321045049590677504), // VFMADSvvvmL_v |
| 6070 | UINT64_C(16321045049590677504), // VFMADSvvvm_v |
| 6071 | UINT64_C(16321045049590677504), // VFMADSvvvml |
| 6072 | UINT64_C(16321045049590677504), // VFMADSvvvml_v |
| 6073 | UINT64_C(13627892472423120896), // VFMAXDiv |
| 6074 | UINT64_C(13627892472423120896), // VFMAXDivL |
| 6075 | UINT64_C(13627892472423120896), // VFMAXDivL_v |
| 6076 | UINT64_C(13627892472423120896), // VFMAXDiv_v |
| 6077 | UINT64_C(13627892472423120896), // VFMAXDivl |
| 6078 | UINT64_C(13627892472423120896), // VFMAXDivl_v |
| 6079 | UINT64_C(13627892472423120896), // VFMAXDivm |
| 6080 | UINT64_C(13627892472423120896), // VFMAXDivmL |
| 6081 | UINT64_C(13627892472423120896), // VFMAXDivmL_v |
| 6082 | UINT64_C(13627892472423120896), // VFMAXDivm_v |
| 6083 | UINT64_C(13627892472423120896), // VFMAXDivml |
| 6084 | UINT64_C(13627892472423120896), // VFMAXDivml_v |
| 6085 | UINT64_C(13628033209911476224), // VFMAXDrv |
| 6086 | UINT64_C(13628033209911476224), // VFMAXDrvL |
| 6087 | UINT64_C(13628033209911476224), // VFMAXDrvL_v |
| 6088 | UINT64_C(13628033209911476224), // VFMAXDrv_v |
| 6089 | UINT64_C(13628033209911476224), // VFMAXDrvl |
| 6090 | UINT64_C(13628033209911476224), // VFMAXDrvl_v |
| 6091 | UINT64_C(13628033209911476224), // VFMAXDrvm |
| 6092 | UINT64_C(13628033209911476224), // VFMAXDrvmL |
| 6093 | UINT64_C(13628033209911476224), // VFMAXDrvmL_v |
| 6094 | UINT64_C(13628033209911476224), // VFMAXDrvm_v |
| 6095 | UINT64_C(13628033209911476224), // VFMAXDrvml |
| 6096 | UINT64_C(13628033209911476224), // VFMAXDrvml_v |
| 6097 | UINT64_C(13618885273168379904), // VFMAXDvv |
| 6098 | UINT64_C(13618885273168379904), // VFMAXDvvL |
| 6099 | UINT64_C(13618885273168379904), // VFMAXDvvL_v |
| 6100 | UINT64_C(13618885273168379904), // VFMAXDvv_v |
| 6101 | UINT64_C(13618885273168379904), // VFMAXDvvl |
| 6102 | UINT64_C(13618885273168379904), // VFMAXDvvl_v |
| 6103 | UINT64_C(13618885273168379904), // VFMAXDvvm |
| 6104 | UINT64_C(13618885273168379904), // VFMAXDvvmL |
| 6105 | UINT64_C(13618885273168379904), // VFMAXDvvmL_v |
| 6106 | UINT64_C(13618885273168379904), // VFMAXDvvm_v |
| 6107 | UINT64_C(13618885273168379904), // VFMAXDvvml |
| 6108 | UINT64_C(13618885273168379904), // VFMAXDvvml_v |
| 6109 | UINT64_C(13663921269442084864), // VFMAXSiv |
| 6110 | UINT64_C(13663921269442084864), // VFMAXSivL |
| 6111 | UINT64_C(13663921269442084864), // VFMAXSivL_v |
| 6112 | UINT64_C(13663921269442084864), // VFMAXSiv_v |
| 6113 | UINT64_C(13663921269442084864), // VFMAXSivl |
| 6114 | UINT64_C(13663921269442084864), // VFMAXSivl_v |
| 6115 | UINT64_C(13663921269442084864), // VFMAXSivm |
| 6116 | UINT64_C(13663921269442084864), // VFMAXSivmL |
| 6117 | UINT64_C(13663921269442084864), // VFMAXSivmL_v |
| 6118 | UINT64_C(13663921269442084864), // VFMAXSivm_v |
| 6119 | UINT64_C(13663921269442084864), // VFMAXSivml |
| 6120 | UINT64_C(13663921269442084864), // VFMAXSivml_v |
| 6121 | UINT64_C(13664062006930440192), // VFMAXSrv |
| 6122 | UINT64_C(13664062006930440192), // VFMAXSrvL |
| 6123 | UINT64_C(13664062006930440192), // VFMAXSrvL_v |
| 6124 | UINT64_C(13664062006930440192), // VFMAXSrv_v |
| 6125 | UINT64_C(13664062006930440192), // VFMAXSrvl |
| 6126 | UINT64_C(13664062006930440192), // VFMAXSrvl_v |
| 6127 | UINT64_C(13664062006930440192), // VFMAXSrvm |
| 6128 | UINT64_C(13664062006930440192), // VFMAXSrvmL |
| 6129 | UINT64_C(13664062006930440192), // VFMAXSrvmL_v |
| 6130 | UINT64_C(13664062006930440192), // VFMAXSrvm_v |
| 6131 | UINT64_C(13664062006930440192), // VFMAXSrvml |
| 6132 | UINT64_C(13664062006930440192), // VFMAXSrvml_v |
| 6133 | UINT64_C(13654914070187343872), // VFMAXSvv |
| 6134 | UINT64_C(13654914070187343872), // VFMAXSvvL |
| 6135 | UINT64_C(13654914070187343872), // VFMAXSvvL_v |
| 6136 | UINT64_C(13654914070187343872), // VFMAXSvv_v |
| 6137 | UINT64_C(13654914070187343872), // VFMAXSvvl |
| 6138 | UINT64_C(13654914070187343872), // VFMAXSvvl_v |
| 6139 | UINT64_C(13654914070187343872), // VFMAXSvvm |
| 6140 | UINT64_C(13654914070187343872), // VFMAXSvvmL |
| 6141 | UINT64_C(13654914070187343872), // VFMAXSvvmL_v |
| 6142 | UINT64_C(13654914070187343872), // VFMAXSvvm_v |
| 6143 | UINT64_C(13654914070187343872), // VFMAXSvvml |
| 6144 | UINT64_C(13654914070187343872), // VFMAXSvvml_v |
| 6145 | UINT64_C(13632396072050491392), // VFMINDiv |
| 6146 | UINT64_C(13632396072050491392), // VFMINDivL |
| 6147 | UINT64_C(13632396072050491392), // VFMINDivL_v |
| 6148 | UINT64_C(13632396072050491392), // VFMINDiv_v |
| 6149 | UINT64_C(13632396072050491392), // VFMINDivl |
| 6150 | UINT64_C(13632396072050491392), // VFMINDivl_v |
| 6151 | UINT64_C(13632396072050491392), // VFMINDivm |
| 6152 | UINT64_C(13632396072050491392), // VFMINDivmL |
| 6153 | UINT64_C(13632396072050491392), // VFMINDivmL_v |
| 6154 | UINT64_C(13632396072050491392), // VFMINDivm_v |
| 6155 | UINT64_C(13632396072050491392), // VFMINDivml |
| 6156 | UINT64_C(13632396072050491392), // VFMINDivml_v |
| 6157 | UINT64_C(13632536809538846720), // VFMINDrv |
| 6158 | UINT64_C(13632536809538846720), // VFMINDrvL |
| 6159 | UINT64_C(13632536809538846720), // VFMINDrvL_v |
| 6160 | UINT64_C(13632536809538846720), // VFMINDrv_v |
| 6161 | UINT64_C(13632536809538846720), // VFMINDrvl |
| 6162 | UINT64_C(13632536809538846720), // VFMINDrvl_v |
| 6163 | UINT64_C(13632536809538846720), // VFMINDrvm |
| 6164 | UINT64_C(13632536809538846720), // VFMINDrvmL |
| 6165 | UINT64_C(13632536809538846720), // VFMINDrvmL_v |
| 6166 | UINT64_C(13632536809538846720), // VFMINDrvm_v |
| 6167 | UINT64_C(13632536809538846720), // VFMINDrvml |
| 6168 | UINT64_C(13632536809538846720), // VFMINDrvml_v |
| 6169 | UINT64_C(13623388872795750400), // VFMINDvv |
| 6170 | UINT64_C(13623388872795750400), // VFMINDvvL |
| 6171 | UINT64_C(13623388872795750400), // VFMINDvvL_v |
| 6172 | UINT64_C(13623388872795750400), // VFMINDvv_v |
| 6173 | UINT64_C(13623388872795750400), // VFMINDvvl |
| 6174 | UINT64_C(13623388872795750400), // VFMINDvvl_v |
| 6175 | UINT64_C(13623388872795750400), // VFMINDvvm |
| 6176 | UINT64_C(13623388872795750400), // VFMINDvvmL |
| 6177 | UINT64_C(13623388872795750400), // VFMINDvvmL_v |
| 6178 | UINT64_C(13623388872795750400), // VFMINDvvm_v |
| 6179 | UINT64_C(13623388872795750400), // VFMINDvvml |
| 6180 | UINT64_C(13623388872795750400), // VFMINDvvml_v |
| 6181 | UINT64_C(13668424869069455360), // VFMINSiv |
| 6182 | UINT64_C(13668424869069455360), // VFMINSivL |
| 6183 | UINT64_C(13668424869069455360), // VFMINSivL_v |
| 6184 | UINT64_C(13668424869069455360), // VFMINSiv_v |
| 6185 | UINT64_C(13668424869069455360), // VFMINSivl |
| 6186 | UINT64_C(13668424869069455360), // VFMINSivl_v |
| 6187 | UINT64_C(13668424869069455360), // VFMINSivm |
| 6188 | UINT64_C(13668424869069455360), // VFMINSivmL |
| 6189 | UINT64_C(13668424869069455360), // VFMINSivmL_v |
| 6190 | UINT64_C(13668424869069455360), // VFMINSivm_v |
| 6191 | UINT64_C(13668424869069455360), // VFMINSivml |
| 6192 | UINT64_C(13668424869069455360), // VFMINSivml_v |
| 6193 | UINT64_C(13668565606557810688), // VFMINSrv |
| 6194 | UINT64_C(13668565606557810688), // VFMINSrvL |
| 6195 | UINT64_C(13668565606557810688), // VFMINSrvL_v |
| 6196 | UINT64_C(13668565606557810688), // VFMINSrv_v |
| 6197 | UINT64_C(13668565606557810688), // VFMINSrvl |
| 6198 | UINT64_C(13668565606557810688), // VFMINSrvl_v |
| 6199 | UINT64_C(13668565606557810688), // VFMINSrvm |
| 6200 | UINT64_C(13668565606557810688), // VFMINSrvmL |
| 6201 | UINT64_C(13668565606557810688), // VFMINSrvmL_v |
| 6202 | UINT64_C(13668565606557810688), // VFMINSrvm_v |
| 6203 | UINT64_C(13668565606557810688), // VFMINSrvml |
| 6204 | UINT64_C(13668565606557810688), // VFMINSrvml_v |
| 6205 | UINT64_C(13659417669814714368), // VFMINSvv |
| 6206 | UINT64_C(13659417669814714368), // VFMINSvvL |
| 6207 | UINT64_C(13659417669814714368), // VFMINSvvL_v |
| 6208 | UINT64_C(13659417669814714368), // VFMINSvv_v |
| 6209 | UINT64_C(13659417669814714368), // VFMINSvvl |
| 6210 | UINT64_C(13659417669814714368), // VFMINSvvl_v |
| 6211 | UINT64_C(13659417669814714368), // VFMINSvvm |
| 6212 | UINT64_C(13659417669814714368), // VFMINSvvmL |
| 6213 | UINT64_C(13659417669814714368), // VFMINSvvmL_v |
| 6214 | UINT64_C(13659417669814714368), // VFMINSvvm_v |
| 6215 | UINT64_C(13659417669814714368), // VFMINSvvml |
| 6216 | UINT64_C(13659417669814714368), // VFMINSvvml_v |
| 6217 | UINT64_C(13114482114903867392), // VFMKDa |
| 6218 | UINT64_C(13114482114903867392), // VFMKDaL |
| 6219 | UINT64_C(13114482114903867392), // VFMKDal |
| 6220 | UINT64_C(13114482114903867392), // VFMKDam |
| 6221 | UINT64_C(13114482114903867392), // VFMKDamL |
| 6222 | UINT64_C(13114482114903867392), // VFMKDaml |
| 6223 | UINT64_C(13114482114902884352), // VFMKDna |
| 6224 | UINT64_C(13114482114902884352), // VFMKDnaL |
| 6225 | UINT64_C(13114482114902884352), // VFMKDnal |
| 6226 | UINT64_C(13114482114902884352), // VFMKDnam |
| 6227 | UINT64_C(13114482114902884352), // VFMKDnamL |
| 6228 | UINT64_C(13114482114902884352), // VFMKDnaml |
| 6229 | UINT64_C(13114482114902884352), // VFMKDv |
| 6230 | UINT64_C(13114482114902884352), // VFMKDvL |
| 6231 | UINT64_C(13114482114902884352), // VFMKDvl |
| 6232 | UINT64_C(13114482114902884352), // VFMKDvm |
| 6233 | UINT64_C(13114482114902884352), // VFMKDvmL |
| 6234 | UINT64_C(13114482114902884352), // VFMKDvml |
| 6235 | UINT64_C(12970366926828011520), // VFMKLa |
| 6236 | UINT64_C(12970366926828011520), // VFMKLaL |
| 6237 | UINT64_C(12970366926828011520), // VFMKLal |
| 6238 | UINT64_C(12970366926828011520), // VFMKLam |
| 6239 | UINT64_C(12970366926828011520), // VFMKLamL |
| 6240 | UINT64_C(12970366926828011520), // VFMKLaml |
| 6241 | UINT64_C(12970366926827028480), // VFMKLna |
| 6242 | UINT64_C(12970366926827028480), // VFMKLnaL |
| 6243 | UINT64_C(12970366926827028480), // VFMKLnal |
| 6244 | UINT64_C(12970366926827028480), // VFMKLnam |
| 6245 | UINT64_C(12970366926827028480), // VFMKLnamL |
| 6246 | UINT64_C(12970366926827028480), // VFMKLnaml |
| 6247 | UINT64_C(12970366926827028480), // VFMKLv |
| 6248 | UINT64_C(12970366926827028480), // VFMKLvL |
| 6249 | UINT64_C(12970366926827028480), // VFMKLvl |
| 6250 | UINT64_C(12970366926827028480), // VFMKLvm |
| 6251 | UINT64_C(12970366926827028480), // VFMKLvmL |
| 6252 | UINT64_C(12970366926827028480), // VFMKLvml |
| 6253 | UINT64_C(13150510911922831360), // VFMKSa |
| 6254 | UINT64_C(13150510911922831360), // VFMKSaL |
| 6255 | UINT64_C(13150510911922831360), // VFMKSal |
| 6256 | UINT64_C(13150510911922831360), // VFMKSam |
| 6257 | UINT64_C(13150510911922831360), // VFMKSamL |
| 6258 | UINT64_C(13150510911922831360), // VFMKSaml |
| 6259 | UINT64_C(13150510911921848320), // VFMKSna |
| 6260 | UINT64_C(13150510911921848320), // VFMKSnaL |
| 6261 | UINT64_C(13150510911921848320), // VFMKSnal |
| 6262 | UINT64_C(13150510911921848320), // VFMKSnam |
| 6263 | UINT64_C(13150510911921848320), // VFMKSnamL |
| 6264 | UINT64_C(13150510911921848320), // VFMKSnaml |
| 6265 | UINT64_C(13150510911921848320), // VFMKSv |
| 6266 | UINT64_C(13150510911921848320), // VFMKSvL |
| 6267 | UINT64_C(13150510911921848320), // VFMKSvl |
| 6268 | UINT64_C(13150510911921848320), // VFMKSvm |
| 6269 | UINT64_C(13150510911921848320), // VFMKSvmL |
| 6270 | UINT64_C(13150510911921848320), // VFMKSvml |
| 6271 | UINT64_C(13042424520865939456), // VFMKWa |
| 6272 | UINT64_C(13042424520865939456), // VFMKWaL |
| 6273 | UINT64_C(13042424520865939456), // VFMKWal |
| 6274 | UINT64_C(13042424520865939456), // VFMKWam |
| 6275 | UINT64_C(13042424520865939456), // VFMKWamL |
| 6276 | UINT64_C(13042424520865939456), // VFMKWaml |
| 6277 | UINT64_C(13042424520864956416), // VFMKWna |
| 6278 | UINT64_C(13042424520864956416), // VFMKWnaL |
| 6279 | UINT64_C(13042424520864956416), // VFMKWnal |
| 6280 | UINT64_C(13042424520864956416), // VFMKWnam |
| 6281 | UINT64_C(13042424520864956416), // VFMKWnamL |
| 6282 | UINT64_C(13042424520864956416), // VFMKWnaml |
| 6283 | UINT64_C(13042424520864956416), // VFMKWv |
| 6284 | UINT64_C(13042424520864956416), // VFMKWvL |
| 6285 | UINT64_C(13042424520864956416), // VFMKWvl |
| 6286 | UINT64_C(13042424520864956416), // VFMKWvm |
| 6287 | UINT64_C(13042424520864956416), // VFMKWvmL |
| 6288 | UINT64_C(13042424520864956416), // VFMKWvml |
| 6289 | UINT64_C(17446944956433301504), // VFMSBDivv |
| 6290 | UINT64_C(17446944956433301504), // VFMSBDivvL |
| 6291 | UINT64_C(17446944956433301504), // VFMSBDivvL_v |
| 6292 | UINT64_C(17446944956433301504), // VFMSBDivv_v |
| 6293 | UINT64_C(17446944956433301504), // VFMSBDivvl |
| 6294 | UINT64_C(17446944956433301504), // VFMSBDivvl_v |
| 6295 | UINT64_C(17446944956433301504), // VFMSBDivvm |
| 6296 | UINT64_C(17446944956433301504), // VFMSBDivvmL |
| 6297 | UINT64_C(17446944956433301504), // VFMSBDivvmL_v |
| 6298 | UINT64_C(17446944956433301504), // VFMSBDivvm_v |
| 6299 | UINT64_C(17446944956433301504), // VFMSBDivvml |
| 6300 | UINT64_C(17446944956433301504), // VFMSBDivvml_v |
| 6301 | UINT64_C(17447085693921656832), // VFMSBDrvv |
| 6302 | UINT64_C(17447085693921656832), // VFMSBDrvvL |
| 6303 | UINT64_C(17447085693921656832), // VFMSBDrvvL_v |
| 6304 | UINT64_C(17447085693921656832), // VFMSBDrvv_v |
| 6305 | UINT64_C(17447085693921656832), // VFMSBDrvvl |
| 6306 | UINT64_C(17447085693921656832), // VFMSBDrvvl_v |
| 6307 | UINT64_C(17447085693921656832), // VFMSBDrvvm |
| 6308 | UINT64_C(17447085693921656832), // VFMSBDrvvmL |
| 6309 | UINT64_C(17447085693921656832), // VFMSBDrvvmL_v |
| 6310 | UINT64_C(17447085693921656832), // VFMSBDrvvm_v |
| 6311 | UINT64_C(17447085693921656832), // VFMSBDrvvml |
| 6312 | UINT64_C(17447085693921656832), // VFMSBDrvvml_v |
| 6313 | UINT64_C(17442441356805931008), // VFMSBDviv |
| 6314 | UINT64_C(17442441356805931008), // VFMSBDvivL |
| 6315 | UINT64_C(17442441356805931008), // VFMSBDvivL_v |
| 6316 | UINT64_C(17442441356805931008), // VFMSBDviv_v |
| 6317 | UINT64_C(17442441356805931008), // VFMSBDvivl |
| 6318 | UINT64_C(17442441356805931008), // VFMSBDvivl_v |
| 6319 | UINT64_C(17442441356805931008), // VFMSBDvivm |
| 6320 | UINT64_C(17442441356805931008), // VFMSBDvivmL |
| 6321 | UINT64_C(17442441356805931008), // VFMSBDvivmL_v |
| 6322 | UINT64_C(17442441356805931008), // VFMSBDvivm_v |
| 6323 | UINT64_C(17442441356805931008), // VFMSBDvivml |
| 6324 | UINT64_C(17442441356805931008), // VFMSBDvivml_v |
| 6325 | UINT64_C(17442582094294286336), // VFMSBDvrv |
| 6326 | UINT64_C(17442582094294286336), // VFMSBDvrvL |
| 6327 | UINT64_C(17442582094294286336), // VFMSBDvrvL_v |
| 6328 | UINT64_C(17442582094294286336), // VFMSBDvrv_v |
| 6329 | UINT64_C(17442582094294286336), // VFMSBDvrvl |
| 6330 | UINT64_C(17442582094294286336), // VFMSBDvrvl_v |
| 6331 | UINT64_C(17442582094294286336), // VFMSBDvrvm |
| 6332 | UINT64_C(17442582094294286336), // VFMSBDvrvmL |
| 6333 | UINT64_C(17442582094294286336), // VFMSBDvrvmL_v |
| 6334 | UINT64_C(17442582094294286336), // VFMSBDvrvm_v |
| 6335 | UINT64_C(17442582094294286336), // VFMSBDvrvml |
| 6336 | UINT64_C(17442582094294286336), // VFMSBDvrvml_v |
| 6337 | UINT64_C(17437937757178560512), // VFMSBDvvv |
| 6338 | UINT64_C(17437937757178560512), // VFMSBDvvvL |
| 6339 | UINT64_C(17437937757178560512), // VFMSBDvvvL_v |
| 6340 | UINT64_C(17437937757178560512), // VFMSBDvvv_v |
| 6341 | UINT64_C(17437937757178560512), // VFMSBDvvvl |
| 6342 | UINT64_C(17437937757178560512), // VFMSBDvvvl_v |
| 6343 | UINT64_C(17437937757178560512), // VFMSBDvvvm |
| 6344 | UINT64_C(17437937757178560512), // VFMSBDvvvmL |
| 6345 | UINT64_C(17437937757178560512), // VFMSBDvvvmL_v |
| 6346 | UINT64_C(17437937757178560512), // VFMSBDvvvm_v |
| 6347 | UINT64_C(17437937757178560512), // VFMSBDvvvml |
| 6348 | UINT64_C(17437937757178560512), // VFMSBDvvvml_v |
| 6349 | UINT64_C(17482973753452265472), // VFMSBSivv |
| 6350 | UINT64_C(17482973753452265472), // VFMSBSivvL |
| 6351 | UINT64_C(17482973753452265472), // VFMSBSivvL_v |
| 6352 | UINT64_C(17482973753452265472), // VFMSBSivv_v |
| 6353 | UINT64_C(17482973753452265472), // VFMSBSivvl |
| 6354 | UINT64_C(17482973753452265472), // VFMSBSivvl_v |
| 6355 | UINT64_C(17482973753452265472), // VFMSBSivvm |
| 6356 | UINT64_C(17482973753452265472), // VFMSBSivvmL |
| 6357 | UINT64_C(17482973753452265472), // VFMSBSivvmL_v |
| 6358 | UINT64_C(17482973753452265472), // VFMSBSivvm_v |
| 6359 | UINT64_C(17482973753452265472), // VFMSBSivvml |
| 6360 | UINT64_C(17482973753452265472), // VFMSBSivvml_v |
| 6361 | UINT64_C(17483114490940620800), // VFMSBSrvv |
| 6362 | UINT64_C(17483114490940620800), // VFMSBSrvvL |
| 6363 | UINT64_C(17483114490940620800), // VFMSBSrvvL_v |
| 6364 | UINT64_C(17483114490940620800), // VFMSBSrvv_v |
| 6365 | UINT64_C(17483114490940620800), // VFMSBSrvvl |
| 6366 | UINT64_C(17483114490940620800), // VFMSBSrvvl_v |
| 6367 | UINT64_C(17483114490940620800), // VFMSBSrvvm |
| 6368 | UINT64_C(17483114490940620800), // VFMSBSrvvmL |
| 6369 | UINT64_C(17483114490940620800), // VFMSBSrvvmL_v |
| 6370 | UINT64_C(17483114490940620800), // VFMSBSrvvm_v |
| 6371 | UINT64_C(17483114490940620800), // VFMSBSrvvml |
| 6372 | UINT64_C(17483114490940620800), // VFMSBSrvvml_v |
| 6373 | UINT64_C(17478470153824894976), // VFMSBSviv |
| 6374 | UINT64_C(17478470153824894976), // VFMSBSvivL |
| 6375 | UINT64_C(17478470153824894976), // VFMSBSvivL_v |
| 6376 | UINT64_C(17478470153824894976), // VFMSBSviv_v |
| 6377 | UINT64_C(17478470153824894976), // VFMSBSvivl |
| 6378 | UINT64_C(17478470153824894976), // VFMSBSvivl_v |
| 6379 | UINT64_C(17478470153824894976), // VFMSBSvivm |
| 6380 | UINT64_C(17478470153824894976), // VFMSBSvivmL |
| 6381 | UINT64_C(17478470153824894976), // VFMSBSvivmL_v |
| 6382 | UINT64_C(17478470153824894976), // VFMSBSvivm_v |
| 6383 | UINT64_C(17478470153824894976), // VFMSBSvivml |
| 6384 | UINT64_C(17478470153824894976), // VFMSBSvivml_v |
| 6385 | UINT64_C(17478610891313250304), // VFMSBSvrv |
| 6386 | UINT64_C(17478610891313250304), // VFMSBSvrvL |
| 6387 | UINT64_C(17478610891313250304), // VFMSBSvrvL_v |
| 6388 | UINT64_C(17478610891313250304), // VFMSBSvrv_v |
| 6389 | UINT64_C(17478610891313250304), // VFMSBSvrvl |
| 6390 | UINT64_C(17478610891313250304), // VFMSBSvrvl_v |
| 6391 | UINT64_C(17478610891313250304), // VFMSBSvrvm |
| 6392 | UINT64_C(17478610891313250304), // VFMSBSvrvmL |
| 6393 | UINT64_C(17478610891313250304), // VFMSBSvrvmL_v |
| 6394 | UINT64_C(17478610891313250304), // VFMSBSvrvm_v |
| 6395 | UINT64_C(17478610891313250304), // VFMSBSvrvml |
| 6396 | UINT64_C(17478610891313250304), // VFMSBSvrvml_v |
| 6397 | UINT64_C(17473966554197524480), // VFMSBSvvv |
| 6398 | UINT64_C(17473966554197524480), // VFMSBSvvvL |
| 6399 | UINT64_C(17473966554197524480), // VFMSBSvvvL_v |
| 6400 | UINT64_C(17473966554197524480), // VFMSBSvvv_v |
| 6401 | UINT64_C(17473966554197524480), // VFMSBSvvvl |
| 6402 | UINT64_C(17473966554197524480), // VFMSBSvvvl_v |
| 6403 | UINT64_C(17473966554197524480), // VFMSBSvvvm |
| 6404 | UINT64_C(17473966554197524480), // VFMSBSvvvmL |
| 6405 | UINT64_C(17473966554197524480), // VFMSBSvvvmL_v |
| 6406 | UINT64_C(17473966554197524480), // VFMSBSvvvm_v |
| 6407 | UINT64_C(17473966554197524480), // VFMSBSvvvml |
| 6408 | UINT64_C(17473966554197524480), // VFMSBSvvvml_v |
| 6409 | UINT64_C(14780813977029967872), // VFMULDiv |
| 6410 | UINT64_C(14780813977029967872), // VFMULDivL |
| 6411 | UINT64_C(14780813977029967872), // VFMULDivL_v |
| 6412 | UINT64_C(14780813977029967872), // VFMULDiv_v |
| 6413 | UINT64_C(14780813977029967872), // VFMULDivl |
| 6414 | UINT64_C(14780813977029967872), // VFMULDivl_v |
| 6415 | UINT64_C(14780813977029967872), // VFMULDivm |
| 6416 | UINT64_C(14780813977029967872), // VFMULDivmL |
| 6417 | UINT64_C(14780813977029967872), // VFMULDivmL_v |
| 6418 | UINT64_C(14780813977029967872), // VFMULDivm_v |
| 6419 | UINT64_C(14780813977029967872), // VFMULDivml |
| 6420 | UINT64_C(14780813977029967872), // VFMULDivml_v |
| 6421 | UINT64_C(14780954714518323200), // VFMULDrv |
| 6422 | UINT64_C(14780954714518323200), // VFMULDrvL |
| 6423 | UINT64_C(14780954714518323200), // VFMULDrvL_v |
| 6424 | UINT64_C(14780954714518323200), // VFMULDrv_v |
| 6425 | UINT64_C(14780954714518323200), // VFMULDrvl |
| 6426 | UINT64_C(14780954714518323200), // VFMULDrvl_v |
| 6427 | UINT64_C(14780954714518323200), // VFMULDrvm |
| 6428 | UINT64_C(14780954714518323200), // VFMULDrvmL |
| 6429 | UINT64_C(14780954714518323200), // VFMULDrvmL_v |
| 6430 | UINT64_C(14780954714518323200), // VFMULDrvm_v |
| 6431 | UINT64_C(14780954714518323200), // VFMULDrvml |
| 6432 | UINT64_C(14780954714518323200), // VFMULDrvml_v |
| 6433 | UINT64_C(14771806777775226880), // VFMULDvv |
| 6434 | UINT64_C(14771806777775226880), // VFMULDvvL |
| 6435 | UINT64_C(14771806777775226880), // VFMULDvvL_v |
| 6436 | UINT64_C(14771806777775226880), // VFMULDvv_v |
| 6437 | UINT64_C(14771806777775226880), // VFMULDvvl |
| 6438 | UINT64_C(14771806777775226880), // VFMULDvvl_v |
| 6439 | UINT64_C(14771806777775226880), // VFMULDvvm |
| 6440 | UINT64_C(14771806777775226880), // VFMULDvvmL |
| 6441 | UINT64_C(14771806777775226880), // VFMULDvvmL_v |
| 6442 | UINT64_C(14771806777775226880), // VFMULDvvm_v |
| 6443 | UINT64_C(14771806777775226880), // VFMULDvvml |
| 6444 | UINT64_C(14771806777775226880), // VFMULDvvml_v |
| 6445 | UINT64_C(14816842774048931840), // VFMULSiv |
| 6446 | UINT64_C(14816842774048931840), // VFMULSivL |
| 6447 | UINT64_C(14816842774048931840), // VFMULSivL_v |
| 6448 | UINT64_C(14816842774048931840), // VFMULSiv_v |
| 6449 | UINT64_C(14816842774048931840), // VFMULSivl |
| 6450 | UINT64_C(14816842774048931840), // VFMULSivl_v |
| 6451 | UINT64_C(14816842774048931840), // VFMULSivm |
| 6452 | UINT64_C(14816842774048931840), // VFMULSivmL |
| 6453 | UINT64_C(14816842774048931840), // VFMULSivmL_v |
| 6454 | UINT64_C(14816842774048931840), // VFMULSivm_v |
| 6455 | UINT64_C(14816842774048931840), // VFMULSivml |
| 6456 | UINT64_C(14816842774048931840), // VFMULSivml_v |
| 6457 | UINT64_C(14816983511537287168), // VFMULSrv |
| 6458 | UINT64_C(14816983511537287168), // VFMULSrvL |
| 6459 | UINT64_C(14816983511537287168), // VFMULSrvL_v |
| 6460 | UINT64_C(14816983511537287168), // VFMULSrv_v |
| 6461 | UINT64_C(14816983511537287168), // VFMULSrvl |
| 6462 | UINT64_C(14816983511537287168), // VFMULSrvl_v |
| 6463 | UINT64_C(14816983511537287168), // VFMULSrvm |
| 6464 | UINT64_C(14816983511537287168), // VFMULSrvmL |
| 6465 | UINT64_C(14816983511537287168), // VFMULSrvmL_v |
| 6466 | UINT64_C(14816983511537287168), // VFMULSrvm_v |
| 6467 | UINT64_C(14816983511537287168), // VFMULSrvml |
| 6468 | UINT64_C(14816983511537287168), // VFMULSrvml_v |
| 6469 | UINT64_C(14807835574794190848), // VFMULSvv |
| 6470 | UINT64_C(14807835574794190848), // VFMULSvvL |
| 6471 | UINT64_C(14807835574794190848), // VFMULSvvL_v |
| 6472 | UINT64_C(14807835574794190848), // VFMULSvv_v |
| 6473 | UINT64_C(14807835574794190848), // VFMULSvvl |
| 6474 | UINT64_C(14807835574794190848), // VFMULSvvl_v |
| 6475 | UINT64_C(14807835574794190848), // VFMULSvvm |
| 6476 | UINT64_C(14807835574794190848), // VFMULSvvmL |
| 6477 | UINT64_C(14807835574794190848), // VFMULSvvmL_v |
| 6478 | UINT64_C(14807835574794190848), // VFMULSvvm_v |
| 6479 | UINT64_C(14807835574794190848), // VFMULSvvml |
| 6480 | UINT64_C(14807835574794190848), // VFMULSvvml_v |
| 6481 | UINT64_C(16366081045864382464), // VFNMADDivv |
| 6482 | UINT64_C(16366081045864382464), // VFNMADDivvL |
| 6483 | UINT64_C(16366081045864382464), // VFNMADDivvL_v |
| 6484 | UINT64_C(16366081045864382464), // VFNMADDivv_v |
| 6485 | UINT64_C(16366081045864382464), // VFNMADDivvl |
| 6486 | UINT64_C(16366081045864382464), // VFNMADDivvl_v |
| 6487 | UINT64_C(16366081045864382464), // VFNMADDivvm |
| 6488 | UINT64_C(16366081045864382464), // VFNMADDivvmL |
| 6489 | UINT64_C(16366081045864382464), // VFNMADDivvmL_v |
| 6490 | UINT64_C(16366081045864382464), // VFNMADDivvm_v |
| 6491 | UINT64_C(16366081045864382464), // VFNMADDivvml |
| 6492 | UINT64_C(16366081045864382464), // VFNMADDivvml_v |
| 6493 | UINT64_C(16366221783352737792), // VFNMADDrvv |
| 6494 | UINT64_C(16366221783352737792), // VFNMADDrvvL |
| 6495 | UINT64_C(16366221783352737792), // VFNMADDrvvL_v |
| 6496 | UINT64_C(16366221783352737792), // VFNMADDrvv_v |
| 6497 | UINT64_C(16366221783352737792), // VFNMADDrvvl |
| 6498 | UINT64_C(16366221783352737792), // VFNMADDrvvl_v |
| 6499 | UINT64_C(16366221783352737792), // VFNMADDrvvm |
| 6500 | UINT64_C(16366221783352737792), // VFNMADDrvvmL |
| 6501 | UINT64_C(16366221783352737792), // VFNMADDrvvmL_v |
| 6502 | UINT64_C(16366221783352737792), // VFNMADDrvvm_v |
| 6503 | UINT64_C(16366221783352737792), // VFNMADDrvvml |
| 6504 | UINT64_C(16366221783352737792), // VFNMADDrvvml_v |
| 6505 | UINT64_C(16361577446237011968), // VFNMADDviv |
| 6506 | UINT64_C(16361577446237011968), // VFNMADDvivL |
| 6507 | UINT64_C(16361577446237011968), // VFNMADDvivL_v |
| 6508 | UINT64_C(16361577446237011968), // VFNMADDviv_v |
| 6509 | UINT64_C(16361577446237011968), // VFNMADDvivl |
| 6510 | UINT64_C(16361577446237011968), // VFNMADDvivl_v |
| 6511 | UINT64_C(16361577446237011968), // VFNMADDvivm |
| 6512 | UINT64_C(16361577446237011968), // VFNMADDvivmL |
| 6513 | UINT64_C(16361577446237011968), // VFNMADDvivmL_v |
| 6514 | UINT64_C(16361577446237011968), // VFNMADDvivm_v |
| 6515 | UINT64_C(16361577446237011968), // VFNMADDvivml |
| 6516 | UINT64_C(16361577446237011968), // VFNMADDvivml_v |
| 6517 | UINT64_C(16361718183725367296), // VFNMADDvrv |
| 6518 | UINT64_C(16361718183725367296), // VFNMADDvrvL |
| 6519 | UINT64_C(16361718183725367296), // VFNMADDvrvL_v |
| 6520 | UINT64_C(16361718183725367296), // VFNMADDvrv_v |
| 6521 | UINT64_C(16361718183725367296), // VFNMADDvrvl |
| 6522 | UINT64_C(16361718183725367296), // VFNMADDvrvl_v |
| 6523 | UINT64_C(16361718183725367296), // VFNMADDvrvm |
| 6524 | UINT64_C(16361718183725367296), // VFNMADDvrvmL |
| 6525 | UINT64_C(16361718183725367296), // VFNMADDvrvmL_v |
| 6526 | UINT64_C(16361718183725367296), // VFNMADDvrvm_v |
| 6527 | UINT64_C(16361718183725367296), // VFNMADDvrvml |
| 6528 | UINT64_C(16361718183725367296), // VFNMADDvrvml_v |
| 6529 | UINT64_C(16357073846609641472), // VFNMADDvvv |
| 6530 | UINT64_C(16357073846609641472), // VFNMADDvvvL |
| 6531 | UINT64_C(16357073846609641472), // VFNMADDvvvL_v |
| 6532 | UINT64_C(16357073846609641472), // VFNMADDvvv_v |
| 6533 | UINT64_C(16357073846609641472), // VFNMADDvvvl |
| 6534 | UINT64_C(16357073846609641472), // VFNMADDvvvl_v |
| 6535 | UINT64_C(16357073846609641472), // VFNMADDvvvm |
| 6536 | UINT64_C(16357073846609641472), // VFNMADDvvvmL |
| 6537 | UINT64_C(16357073846609641472), // VFNMADDvvvmL_v |
| 6538 | UINT64_C(16357073846609641472), // VFNMADDvvvm_v |
| 6539 | UINT64_C(16357073846609641472), // VFNMADDvvvml |
| 6540 | UINT64_C(16357073846609641472), // VFNMADDvvvml_v |
| 6541 | UINT64_C(16402109842883346432), // VFNMADSivv |
| 6542 | UINT64_C(16402109842883346432), // VFNMADSivvL |
| 6543 | UINT64_C(16402109842883346432), // VFNMADSivvL_v |
| 6544 | UINT64_C(16402109842883346432), // VFNMADSivv_v |
| 6545 | UINT64_C(16402109842883346432), // VFNMADSivvl |
| 6546 | UINT64_C(16402109842883346432), // VFNMADSivvl_v |
| 6547 | UINT64_C(16402109842883346432), // VFNMADSivvm |
| 6548 | UINT64_C(16402109842883346432), // VFNMADSivvmL |
| 6549 | UINT64_C(16402109842883346432), // VFNMADSivvmL_v |
| 6550 | UINT64_C(16402109842883346432), // VFNMADSivvm_v |
| 6551 | UINT64_C(16402109842883346432), // VFNMADSivvml |
| 6552 | UINT64_C(16402109842883346432), // VFNMADSivvml_v |
| 6553 | UINT64_C(16402250580371701760), // VFNMADSrvv |
| 6554 | UINT64_C(16402250580371701760), // VFNMADSrvvL |
| 6555 | UINT64_C(16402250580371701760), // VFNMADSrvvL_v |
| 6556 | UINT64_C(16402250580371701760), // VFNMADSrvv_v |
| 6557 | UINT64_C(16402250580371701760), // VFNMADSrvvl |
| 6558 | UINT64_C(16402250580371701760), // VFNMADSrvvl_v |
| 6559 | UINT64_C(16402250580371701760), // VFNMADSrvvm |
| 6560 | UINT64_C(16402250580371701760), // VFNMADSrvvmL |
| 6561 | UINT64_C(16402250580371701760), // VFNMADSrvvmL_v |
| 6562 | UINT64_C(16402250580371701760), // VFNMADSrvvm_v |
| 6563 | UINT64_C(16402250580371701760), // VFNMADSrvvml |
| 6564 | UINT64_C(16402250580371701760), // VFNMADSrvvml_v |
| 6565 | UINT64_C(16397606243255975936), // VFNMADSviv |
| 6566 | UINT64_C(16397606243255975936), // VFNMADSvivL |
| 6567 | UINT64_C(16397606243255975936), // VFNMADSvivL_v |
| 6568 | UINT64_C(16397606243255975936), // VFNMADSviv_v |
| 6569 | UINT64_C(16397606243255975936), // VFNMADSvivl |
| 6570 | UINT64_C(16397606243255975936), // VFNMADSvivl_v |
| 6571 | UINT64_C(16397606243255975936), // VFNMADSvivm |
| 6572 | UINT64_C(16397606243255975936), // VFNMADSvivmL |
| 6573 | UINT64_C(16397606243255975936), // VFNMADSvivmL_v |
| 6574 | UINT64_C(16397606243255975936), // VFNMADSvivm_v |
| 6575 | UINT64_C(16397606243255975936), // VFNMADSvivml |
| 6576 | UINT64_C(16397606243255975936), // VFNMADSvivml_v |
| 6577 | UINT64_C(16397746980744331264), // VFNMADSvrv |
| 6578 | UINT64_C(16397746980744331264), // VFNMADSvrvL |
| 6579 | UINT64_C(16397746980744331264), // VFNMADSvrvL_v |
| 6580 | UINT64_C(16397746980744331264), // VFNMADSvrv_v |
| 6581 | UINT64_C(16397746980744331264), // VFNMADSvrvl |
| 6582 | UINT64_C(16397746980744331264), // VFNMADSvrvl_v |
| 6583 | UINT64_C(16397746980744331264), // VFNMADSvrvm |
| 6584 | UINT64_C(16397746980744331264), // VFNMADSvrvmL |
| 6585 | UINT64_C(16397746980744331264), // VFNMADSvrvmL_v |
| 6586 | UINT64_C(16397746980744331264), // VFNMADSvrvm_v |
| 6587 | UINT64_C(16397746980744331264), // VFNMADSvrvml |
| 6588 | UINT64_C(16397746980744331264), // VFNMADSvrvml_v |
| 6589 | UINT64_C(16393102643628605440), // VFNMADSvvv |
| 6590 | UINT64_C(16393102643628605440), // VFNMADSvvvL |
| 6591 | UINT64_C(16393102643628605440), // VFNMADSvvvL_v |
| 6592 | UINT64_C(16393102643628605440), // VFNMADSvvv_v |
| 6593 | UINT64_C(16393102643628605440), // VFNMADSvvvl |
| 6594 | UINT64_C(16393102643628605440), // VFNMADSvvvl_v |
| 6595 | UINT64_C(16393102643628605440), // VFNMADSvvvm |
| 6596 | UINT64_C(16393102643628605440), // VFNMADSvvvmL |
| 6597 | UINT64_C(16393102643628605440), // VFNMADSvvvmL_v |
| 6598 | UINT64_C(16393102643628605440), // VFNMADSvvvm_v |
| 6599 | UINT64_C(16393102643628605440), // VFNMADSvvvml |
| 6600 | UINT64_C(16393102643628605440), // VFNMADSvvvml_v |
| 6601 | UINT64_C(17519002550471229440), // VFNMSBDivv |
| 6602 | UINT64_C(17519002550471229440), // VFNMSBDivvL |
| 6603 | UINT64_C(17519002550471229440), // VFNMSBDivvL_v |
| 6604 | UINT64_C(17519002550471229440), // VFNMSBDivv_v |
| 6605 | UINT64_C(17519002550471229440), // VFNMSBDivvl |
| 6606 | UINT64_C(17519002550471229440), // VFNMSBDivvl_v |
| 6607 | UINT64_C(17519002550471229440), // VFNMSBDivvm |
| 6608 | UINT64_C(17519002550471229440), // VFNMSBDivvmL |
| 6609 | UINT64_C(17519002550471229440), // VFNMSBDivvmL_v |
| 6610 | UINT64_C(17519002550471229440), // VFNMSBDivvm_v |
| 6611 | UINT64_C(17519002550471229440), // VFNMSBDivvml |
| 6612 | UINT64_C(17519002550471229440), // VFNMSBDivvml_v |
| 6613 | UINT64_C(17519143287959584768), // VFNMSBDrvv |
| 6614 | UINT64_C(17519143287959584768), // VFNMSBDrvvL |
| 6615 | UINT64_C(17519143287959584768), // VFNMSBDrvvL_v |
| 6616 | UINT64_C(17519143287959584768), // VFNMSBDrvv_v |
| 6617 | UINT64_C(17519143287959584768), // VFNMSBDrvvl |
| 6618 | UINT64_C(17519143287959584768), // VFNMSBDrvvl_v |
| 6619 | UINT64_C(17519143287959584768), // VFNMSBDrvvm |
| 6620 | UINT64_C(17519143287959584768), // VFNMSBDrvvmL |
| 6621 | UINT64_C(17519143287959584768), // VFNMSBDrvvmL_v |
| 6622 | UINT64_C(17519143287959584768), // VFNMSBDrvvm_v |
| 6623 | UINT64_C(17519143287959584768), // VFNMSBDrvvml |
| 6624 | UINT64_C(17519143287959584768), // VFNMSBDrvvml_v |
| 6625 | UINT64_C(17514498950843858944), // VFNMSBDviv |
| 6626 | UINT64_C(17514498950843858944), // VFNMSBDvivL |
| 6627 | UINT64_C(17514498950843858944), // VFNMSBDvivL_v |
| 6628 | UINT64_C(17514498950843858944), // VFNMSBDviv_v |
| 6629 | UINT64_C(17514498950843858944), // VFNMSBDvivl |
| 6630 | UINT64_C(17514498950843858944), // VFNMSBDvivl_v |
| 6631 | UINT64_C(17514498950843858944), // VFNMSBDvivm |
| 6632 | UINT64_C(17514498950843858944), // VFNMSBDvivmL |
| 6633 | UINT64_C(17514498950843858944), // VFNMSBDvivmL_v |
| 6634 | UINT64_C(17514498950843858944), // VFNMSBDvivm_v |
| 6635 | UINT64_C(17514498950843858944), // VFNMSBDvivml |
| 6636 | UINT64_C(17514498950843858944), // VFNMSBDvivml_v |
| 6637 | UINT64_C(17514639688332214272), // VFNMSBDvrv |
| 6638 | UINT64_C(17514639688332214272), // VFNMSBDvrvL |
| 6639 | UINT64_C(17514639688332214272), // VFNMSBDvrvL_v |
| 6640 | UINT64_C(17514639688332214272), // VFNMSBDvrv_v |
| 6641 | UINT64_C(17514639688332214272), // VFNMSBDvrvl |
| 6642 | UINT64_C(17514639688332214272), // VFNMSBDvrvl_v |
| 6643 | UINT64_C(17514639688332214272), // VFNMSBDvrvm |
| 6644 | UINT64_C(17514639688332214272), // VFNMSBDvrvmL |
| 6645 | UINT64_C(17514639688332214272), // VFNMSBDvrvmL_v |
| 6646 | UINT64_C(17514639688332214272), // VFNMSBDvrvm_v |
| 6647 | UINT64_C(17514639688332214272), // VFNMSBDvrvml |
| 6648 | UINT64_C(17514639688332214272), // VFNMSBDvrvml_v |
| 6649 | UINT64_C(17509995351216488448), // VFNMSBDvvv |
| 6650 | UINT64_C(17509995351216488448), // VFNMSBDvvvL |
| 6651 | UINT64_C(17509995351216488448), // VFNMSBDvvvL_v |
| 6652 | UINT64_C(17509995351216488448), // VFNMSBDvvv_v |
| 6653 | UINT64_C(17509995351216488448), // VFNMSBDvvvl |
| 6654 | UINT64_C(17509995351216488448), // VFNMSBDvvvl_v |
| 6655 | UINT64_C(17509995351216488448), // VFNMSBDvvvm |
| 6656 | UINT64_C(17509995351216488448), // VFNMSBDvvvmL |
| 6657 | UINT64_C(17509995351216488448), // VFNMSBDvvvmL_v |
| 6658 | UINT64_C(17509995351216488448), // VFNMSBDvvvm_v |
| 6659 | UINT64_C(17509995351216488448), // VFNMSBDvvvml |
| 6660 | UINT64_C(17509995351216488448), // VFNMSBDvvvml_v |
| 6661 | UINT64_C(17555031347490193408), // VFNMSBSivv |
| 6662 | UINT64_C(17555031347490193408), // VFNMSBSivvL |
| 6663 | UINT64_C(17555031347490193408), // VFNMSBSivvL_v |
| 6664 | UINT64_C(17555031347490193408), // VFNMSBSivv_v |
| 6665 | UINT64_C(17555031347490193408), // VFNMSBSivvl |
| 6666 | UINT64_C(17555031347490193408), // VFNMSBSivvl_v |
| 6667 | UINT64_C(17555031347490193408), // VFNMSBSivvm |
| 6668 | UINT64_C(17555031347490193408), // VFNMSBSivvmL |
| 6669 | UINT64_C(17555031347490193408), // VFNMSBSivvmL_v |
| 6670 | UINT64_C(17555031347490193408), // VFNMSBSivvm_v |
| 6671 | UINT64_C(17555031347490193408), // VFNMSBSivvml |
| 6672 | UINT64_C(17555031347490193408), // VFNMSBSivvml_v |
| 6673 | UINT64_C(17555172084978548736), // VFNMSBSrvv |
| 6674 | UINT64_C(17555172084978548736), // VFNMSBSrvvL |
| 6675 | UINT64_C(17555172084978548736), // VFNMSBSrvvL_v |
| 6676 | UINT64_C(17555172084978548736), // VFNMSBSrvv_v |
| 6677 | UINT64_C(17555172084978548736), // VFNMSBSrvvl |
| 6678 | UINT64_C(17555172084978548736), // VFNMSBSrvvl_v |
| 6679 | UINT64_C(17555172084978548736), // VFNMSBSrvvm |
| 6680 | UINT64_C(17555172084978548736), // VFNMSBSrvvmL |
| 6681 | UINT64_C(17555172084978548736), // VFNMSBSrvvmL_v |
| 6682 | UINT64_C(17555172084978548736), // VFNMSBSrvvm_v |
| 6683 | UINT64_C(17555172084978548736), // VFNMSBSrvvml |
| 6684 | UINT64_C(17555172084978548736), // VFNMSBSrvvml_v |
| 6685 | UINT64_C(17550527747862822912), // VFNMSBSviv |
| 6686 | UINT64_C(17550527747862822912), // VFNMSBSvivL |
| 6687 | UINT64_C(17550527747862822912), // VFNMSBSvivL_v |
| 6688 | UINT64_C(17550527747862822912), // VFNMSBSviv_v |
| 6689 | UINT64_C(17550527747862822912), // VFNMSBSvivl |
| 6690 | UINT64_C(17550527747862822912), // VFNMSBSvivl_v |
| 6691 | UINT64_C(17550527747862822912), // VFNMSBSvivm |
| 6692 | UINT64_C(17550527747862822912), // VFNMSBSvivmL |
| 6693 | UINT64_C(17550527747862822912), // VFNMSBSvivmL_v |
| 6694 | UINT64_C(17550527747862822912), // VFNMSBSvivm_v |
| 6695 | UINT64_C(17550527747862822912), // VFNMSBSvivml |
| 6696 | UINT64_C(17550527747862822912), // VFNMSBSvivml_v |
| 6697 | UINT64_C(17550668485351178240), // VFNMSBSvrv |
| 6698 | UINT64_C(17550668485351178240), // VFNMSBSvrvL |
| 6699 | UINT64_C(17550668485351178240), // VFNMSBSvrvL_v |
| 6700 | UINT64_C(17550668485351178240), // VFNMSBSvrv_v |
| 6701 | UINT64_C(17550668485351178240), // VFNMSBSvrvl |
| 6702 | UINT64_C(17550668485351178240), // VFNMSBSvrvl_v |
| 6703 | UINT64_C(17550668485351178240), // VFNMSBSvrvm |
| 6704 | UINT64_C(17550668485351178240), // VFNMSBSvrvmL |
| 6705 | UINT64_C(17550668485351178240), // VFNMSBSvrvmL_v |
| 6706 | UINT64_C(17550668485351178240), // VFNMSBSvrvm_v |
| 6707 | UINT64_C(17550668485351178240), // VFNMSBSvrvml |
| 6708 | UINT64_C(17550668485351178240), // VFNMSBSvrvml_v |
| 6709 | UINT64_C(17546024148235452416), // VFNMSBSvvv |
| 6710 | UINT64_C(17546024148235452416), // VFNMSBSvvvL |
| 6711 | UINT64_C(17546024148235452416), // VFNMSBSvvvL_v |
| 6712 | UINT64_C(17546024148235452416), // VFNMSBSvvv_v |
| 6713 | UINT64_C(17546024148235452416), // VFNMSBSvvvl |
| 6714 | UINT64_C(17546024148235452416), // VFNMSBSvvvl_v |
| 6715 | UINT64_C(17546024148235452416), // VFNMSBSvvvm |
| 6716 | UINT64_C(17546024148235452416), // VFNMSBSvvvmL |
| 6717 | UINT64_C(17546024148235452416), // VFNMSBSvvvmL_v |
| 6718 | UINT64_C(17546024148235452416), // VFNMSBSvvvm_v |
| 6719 | UINT64_C(17546024148235452416), // VFNMSBSvvvml |
| 6720 | UINT64_C(17546024148235452416), // VFNMSBSvvvml_v |
| 6721 | UINT64_C(12465963768561532928), // VFRMAXDFSTv |
| 6722 | UINT64_C(12465963768561532928), // VFRMAXDFSTvL |
| 6723 | UINT64_C(12465963768561532928), // VFRMAXDFSTvL_v |
| 6724 | UINT64_C(12465963768561532928), // VFRMAXDFSTv_v |
| 6725 | UINT64_C(12465963768561532928), // VFRMAXDFSTvl |
| 6726 | UINT64_C(12465963768561532928), // VFRMAXDFSTvl_v |
| 6727 | UINT64_C(12465963768561532928), // VFRMAXDFSTvm |
| 6728 | UINT64_C(12465963768561532928), // VFRMAXDFSTvmL |
| 6729 | UINT64_C(12465963768561532928), // VFRMAXDFSTvmL_v |
| 6730 | UINT64_C(12465963768561532928), // VFRMAXDFSTvm_v |
| 6731 | UINT64_C(12465963768561532928), // VFRMAXDFSTvml |
| 6732 | UINT64_C(12465963768561532928), // VFRMAXDFSTvml_v |
| 6733 | UINT64_C(12474970967816273920), // VFRMAXDLSTv |
| 6734 | UINT64_C(12474970967816273920), // VFRMAXDLSTvL |
| 6735 | UINT64_C(12474970967816273920), // VFRMAXDLSTvL_v |
| 6736 | UINT64_C(12474970967816273920), // VFRMAXDLSTv_v |
| 6737 | UINT64_C(12474970967816273920), // VFRMAXDLSTvl |
| 6738 | UINT64_C(12474970967816273920), // VFRMAXDLSTvl_v |
| 6739 | UINT64_C(12474970967816273920), // VFRMAXDLSTvm |
| 6740 | UINT64_C(12474970967816273920), // VFRMAXDLSTvmL |
| 6741 | UINT64_C(12474970967816273920), // VFRMAXDLSTvmL_v |
| 6742 | UINT64_C(12474970967816273920), // VFRMAXDLSTvm_v |
| 6743 | UINT64_C(12474970967816273920), // VFRMAXDLSTvml |
| 6744 | UINT64_C(12474970967816273920), // VFRMAXDLSTvml_v |
| 6745 | UINT64_C(12501992565580496896), // VFRMAXSFSTv |
| 6746 | UINT64_C(12501992565580496896), // VFRMAXSFSTvL |
| 6747 | UINT64_C(12501992565580496896), // VFRMAXSFSTvL_v |
| 6748 | UINT64_C(12501992565580496896), // VFRMAXSFSTv_v |
| 6749 | UINT64_C(12501992565580496896), // VFRMAXSFSTvl |
| 6750 | UINT64_C(12501992565580496896), // VFRMAXSFSTvl_v |
| 6751 | UINT64_C(12501992565580496896), // VFRMAXSFSTvm |
| 6752 | UINT64_C(12501992565580496896), // VFRMAXSFSTvmL |
| 6753 | UINT64_C(12501992565580496896), // VFRMAXSFSTvmL_v |
| 6754 | UINT64_C(12501992565580496896), // VFRMAXSFSTvm_v |
| 6755 | UINT64_C(12501992565580496896), // VFRMAXSFSTvml |
| 6756 | UINT64_C(12501992565580496896), // VFRMAXSFSTvml_v |
| 6757 | UINT64_C(12510999764835237888), // VFRMAXSLSTv |
| 6758 | UINT64_C(12510999764835237888), // VFRMAXSLSTvL |
| 6759 | UINT64_C(12510999764835237888), // VFRMAXSLSTvL_v |
| 6760 | UINT64_C(12510999764835237888), // VFRMAXSLSTv_v |
| 6761 | UINT64_C(12510999764835237888), // VFRMAXSLSTvl |
| 6762 | UINT64_C(12510999764835237888), // VFRMAXSLSTvl_v |
| 6763 | UINT64_C(12510999764835237888), // VFRMAXSLSTvm |
| 6764 | UINT64_C(12510999764835237888), // VFRMAXSLSTvmL |
| 6765 | UINT64_C(12510999764835237888), // VFRMAXSLSTvmL_v |
| 6766 | UINT64_C(12510999764835237888), // VFRMAXSLSTvm_v |
| 6767 | UINT64_C(12510999764835237888), // VFRMAXSLSTvml |
| 6768 | UINT64_C(12510999764835237888), // VFRMAXSLSTvml_v |
| 6769 | UINT64_C(12470467368188903424), // VFRMINDFSTv |
| 6770 | UINT64_C(12470467368188903424), // VFRMINDFSTvL |
| 6771 | UINT64_C(12470467368188903424), // VFRMINDFSTvL_v |
| 6772 | UINT64_C(12470467368188903424), // VFRMINDFSTv_v |
| 6773 | UINT64_C(12470467368188903424), // VFRMINDFSTvl |
| 6774 | UINT64_C(12470467368188903424), // VFRMINDFSTvl_v |
| 6775 | UINT64_C(12470467368188903424), // VFRMINDFSTvm |
| 6776 | UINT64_C(12470467368188903424), // VFRMINDFSTvmL |
| 6777 | UINT64_C(12470467368188903424), // VFRMINDFSTvmL_v |
| 6778 | UINT64_C(12470467368188903424), // VFRMINDFSTvm_v |
| 6779 | UINT64_C(12470467368188903424), // VFRMINDFSTvml |
| 6780 | UINT64_C(12470467368188903424), // VFRMINDFSTvml_v |
| 6781 | UINT64_C(12479474567443644416), // VFRMINDLSTv |
| 6782 | UINT64_C(12479474567443644416), // VFRMINDLSTvL |
| 6783 | UINT64_C(12479474567443644416), // VFRMINDLSTvL_v |
| 6784 | UINT64_C(12479474567443644416), // VFRMINDLSTv_v |
| 6785 | UINT64_C(12479474567443644416), // VFRMINDLSTvl |
| 6786 | UINT64_C(12479474567443644416), // VFRMINDLSTvl_v |
| 6787 | UINT64_C(12479474567443644416), // VFRMINDLSTvm |
| 6788 | UINT64_C(12479474567443644416), // VFRMINDLSTvmL |
| 6789 | UINT64_C(12479474567443644416), // VFRMINDLSTvmL_v |
| 6790 | UINT64_C(12479474567443644416), // VFRMINDLSTvm_v |
| 6791 | UINT64_C(12479474567443644416), // VFRMINDLSTvml |
| 6792 | UINT64_C(12479474567443644416), // VFRMINDLSTvml_v |
| 6793 | UINT64_C(12506496165207867392), // VFRMINSFSTv |
| 6794 | UINT64_C(12506496165207867392), // VFRMINSFSTvL |
| 6795 | UINT64_C(12506496165207867392), // VFRMINSFSTvL_v |
| 6796 | UINT64_C(12506496165207867392), // VFRMINSFSTv_v |
| 6797 | UINT64_C(12506496165207867392), // VFRMINSFSTvl |
| 6798 | UINT64_C(12506496165207867392), // VFRMINSFSTvl_v |
| 6799 | UINT64_C(12506496165207867392), // VFRMINSFSTvm |
| 6800 | UINT64_C(12506496165207867392), // VFRMINSFSTvmL |
| 6801 | UINT64_C(12506496165207867392), // VFRMINSFSTvmL_v |
| 6802 | UINT64_C(12506496165207867392), // VFRMINSFSTvm_v |
| 6803 | UINT64_C(12506496165207867392), // VFRMINSFSTvml |
| 6804 | UINT64_C(12506496165207867392), // VFRMINSFSTvml_v |
| 6805 | UINT64_C(12515503364462608384), // VFRMINSLSTv |
| 6806 | UINT64_C(12515503364462608384), // VFRMINSLSTvL |
| 6807 | UINT64_C(12515503364462608384), // VFRMINSLSTvL_v |
| 6808 | UINT64_C(12515503364462608384), // VFRMINSLSTv_v |
| 6809 | UINT64_C(12515503364462608384), // VFRMINSLSTvl |
| 6810 | UINT64_C(12515503364462608384), // VFRMINSLSTvl_v |
| 6811 | UINT64_C(12515503364462608384), // VFRMINSLSTvm |
| 6812 | UINT64_C(12515503364462608384), // VFRMINSLSTvmL |
| 6813 | UINT64_C(12515503364462608384), // VFRMINSLSTvmL_v |
| 6814 | UINT64_C(12515503364462608384), // VFRMINSLSTvm_v |
| 6815 | UINT64_C(12515503364462608384), // VFRMINSLSTvml |
| 6816 | UINT64_C(12515503364462608384), // VFRMINSLSTvml_v |
| 6817 | UINT64_C(17077649786988920832), // VFSQRTDv |
| 6818 | UINT64_C(17077649786988920832), // VFSQRTDvL |
| 6819 | UINT64_C(17077649786988920832), // VFSQRTDvL_v |
| 6820 | UINT64_C(17077649786988920832), // VFSQRTDv_v |
| 6821 | UINT64_C(17077649786988920832), // VFSQRTDvl |
| 6822 | UINT64_C(17077649786988920832), // VFSQRTDvl_v |
| 6823 | UINT64_C(17077649786988920832), // VFSQRTDvm |
| 6824 | UINT64_C(17077649786988920832), // VFSQRTDvmL |
| 6825 | UINT64_C(17077649786988920832), // VFSQRTDvmL_v |
| 6826 | UINT64_C(17077649786988920832), // VFSQRTDvm_v |
| 6827 | UINT64_C(17077649786988920832), // VFSQRTDvml |
| 6828 | UINT64_C(17077649786988920832), // VFSQRTDvml_v |
| 6829 | UINT64_C(17113678584007884800), // VFSQRTSv |
| 6830 | UINT64_C(17113678584007884800), // VFSQRTSvL |
| 6831 | UINT64_C(17113678584007884800), // VFSQRTSvL_v |
| 6832 | UINT64_C(17113678584007884800), // VFSQRTSv_v |
| 6833 | UINT64_C(17113678584007884800), // VFSQRTSvl |
| 6834 | UINT64_C(17113678584007884800), // VFSQRTSvl_v |
| 6835 | UINT64_C(17113678584007884800), // VFSQRTSvm |
| 6836 | UINT64_C(17113678584007884800), // VFSQRTSvmL |
| 6837 | UINT64_C(17113678584007884800), // VFSQRTSvmL_v |
| 6838 | UINT64_C(17113678584007884800), // VFSQRTSvm_v |
| 6839 | UINT64_C(17113678584007884800), // VFSQRTSvml |
| 6840 | UINT64_C(17113678584007884800), // VFSQRTSvml_v |
| 6841 | UINT64_C(15861677887598886912), // VFSUBDiv |
| 6842 | UINT64_C(15861677887598886912), // VFSUBDivL |
| 6843 | UINT64_C(15861677887598886912), // VFSUBDivL_v |
| 6844 | UINT64_C(15861677887598886912), // VFSUBDiv_v |
| 6845 | UINT64_C(15861677887598886912), // VFSUBDivl |
| 6846 | UINT64_C(15861677887598886912), // VFSUBDivl_v |
| 6847 | UINT64_C(15861677887598886912), // VFSUBDivm |
| 6848 | UINT64_C(15861677887598886912), // VFSUBDivmL |
| 6849 | UINT64_C(15861677887598886912), // VFSUBDivmL_v |
| 6850 | UINT64_C(15861677887598886912), // VFSUBDivm_v |
| 6851 | UINT64_C(15861677887598886912), // VFSUBDivml |
| 6852 | UINT64_C(15861677887598886912), // VFSUBDivml_v |
| 6853 | UINT64_C(15861818625087242240), // VFSUBDrv |
| 6854 | UINT64_C(15861818625087242240), // VFSUBDrvL |
| 6855 | UINT64_C(15861818625087242240), // VFSUBDrvL_v |
| 6856 | UINT64_C(15861818625087242240), // VFSUBDrv_v |
| 6857 | UINT64_C(15861818625087242240), // VFSUBDrvl |
| 6858 | UINT64_C(15861818625087242240), // VFSUBDrvl_v |
| 6859 | UINT64_C(15861818625087242240), // VFSUBDrvm |
| 6860 | UINT64_C(15861818625087242240), // VFSUBDrvmL |
| 6861 | UINT64_C(15861818625087242240), // VFSUBDrvmL_v |
| 6862 | UINT64_C(15861818625087242240), // VFSUBDrvm_v |
| 6863 | UINT64_C(15861818625087242240), // VFSUBDrvml |
| 6864 | UINT64_C(15861818625087242240), // VFSUBDrvml_v |
| 6865 | UINT64_C(15852670688344145920), // VFSUBDvv |
| 6866 | UINT64_C(15852670688344145920), // VFSUBDvvL |
| 6867 | UINT64_C(15852670688344145920), // VFSUBDvvL_v |
| 6868 | UINT64_C(15852670688344145920), // VFSUBDvv_v |
| 6869 | UINT64_C(15852670688344145920), // VFSUBDvvl |
| 6870 | UINT64_C(15852670688344145920), // VFSUBDvvl_v |
| 6871 | UINT64_C(15852670688344145920), // VFSUBDvvm |
| 6872 | UINT64_C(15852670688344145920), // VFSUBDvvmL |
| 6873 | UINT64_C(15852670688344145920), // VFSUBDvvmL_v |
| 6874 | UINT64_C(15852670688344145920), // VFSUBDvvm_v |
| 6875 | UINT64_C(15852670688344145920), // VFSUBDvvml |
| 6876 | UINT64_C(15852670688344145920), // VFSUBDvvml_v |
| 6877 | UINT64_C(15897706684617850880), // VFSUBSiv |
| 6878 | UINT64_C(15897706684617850880), // VFSUBSivL |
| 6879 | UINT64_C(15897706684617850880), // VFSUBSivL_v |
| 6880 | UINT64_C(15897706684617850880), // VFSUBSiv_v |
| 6881 | UINT64_C(15897706684617850880), // VFSUBSivl |
| 6882 | UINT64_C(15897706684617850880), // VFSUBSivl_v |
| 6883 | UINT64_C(15897706684617850880), // VFSUBSivm |
| 6884 | UINT64_C(15897706684617850880), // VFSUBSivmL |
| 6885 | UINT64_C(15897706684617850880), // VFSUBSivmL_v |
| 6886 | UINT64_C(15897706684617850880), // VFSUBSivm_v |
| 6887 | UINT64_C(15897706684617850880), // VFSUBSivml |
| 6888 | UINT64_C(15897706684617850880), // VFSUBSivml_v |
| 6889 | UINT64_C(15897847422106206208), // VFSUBSrv |
| 6890 | UINT64_C(15897847422106206208), // VFSUBSrvL |
| 6891 | UINT64_C(15897847422106206208), // VFSUBSrvL_v |
| 6892 | UINT64_C(15897847422106206208), // VFSUBSrv_v |
| 6893 | UINT64_C(15897847422106206208), // VFSUBSrvl |
| 6894 | UINT64_C(15897847422106206208), // VFSUBSrvl_v |
| 6895 | UINT64_C(15897847422106206208), // VFSUBSrvm |
| 6896 | UINT64_C(15897847422106206208), // VFSUBSrvmL |
| 6897 | UINT64_C(15897847422106206208), // VFSUBSrvmL_v |
| 6898 | UINT64_C(15897847422106206208), // VFSUBSrvm_v |
| 6899 | UINT64_C(15897847422106206208), // VFSUBSrvml |
| 6900 | UINT64_C(15897847422106206208), // VFSUBSrvml_v |
| 6901 | UINT64_C(15888699485363109888), // VFSUBSvv |
| 6902 | UINT64_C(15888699485363109888), // VFSUBSvvL |
| 6903 | UINT64_C(15888699485363109888), // VFSUBSvvL_v |
| 6904 | UINT64_C(15888699485363109888), // VFSUBSvv_v |
| 6905 | UINT64_C(15888699485363109888), // VFSUBSvvl |
| 6906 | UINT64_C(15888699485363109888), // VFSUBSvvl_v |
| 6907 | UINT64_C(15888699485363109888), // VFSUBSvvm |
| 6908 | UINT64_C(15888699485363109888), // VFSUBSvvmL |
| 6909 | UINT64_C(15888699485363109888), // VFSUBSvvmL_v |
| 6910 | UINT64_C(15888699485363109888), // VFSUBSvvm_v |
| 6911 | UINT64_C(15888699485363109888), // VFSUBSvvml |
| 6912 | UINT64_C(15888699485363109888), // VFSUBSvvml_v |
| 6913 | UINT64_C(17005592192950992896), // VFSUMDv |
| 6914 | UINT64_C(17005592192950992896), // VFSUMDvL |
| 6915 | UINT64_C(17005592192950992896), // VFSUMDvL_v |
| 6916 | UINT64_C(17005592192950992896), // VFSUMDv_v |
| 6917 | UINT64_C(17005592192950992896), // VFSUMDvl |
| 6918 | UINT64_C(17005592192950992896), // VFSUMDvl_v |
| 6919 | UINT64_C(17005592192950992896), // VFSUMDvm |
| 6920 | UINT64_C(17005592192950992896), // VFSUMDvmL |
| 6921 | UINT64_C(17005592192950992896), // VFSUMDvmL_v |
| 6922 | UINT64_C(17005592192950992896), // VFSUMDvm_v |
| 6923 | UINT64_C(17005592192950992896), // VFSUMDvml |
| 6924 | UINT64_C(17005592192950992896), // VFSUMDvml_v |
| 6925 | UINT64_C(17041620989969956864), // VFSUMSv |
| 6926 | UINT64_C(17041620989969956864), // VFSUMSvL |
| 6927 | UINT64_C(17041620989969956864), // VFSUMSvL_v |
| 6928 | UINT64_C(17041620989969956864), // VFSUMSv_v |
| 6929 | UINT64_C(17041620989969956864), // VFSUMSvl |
| 6930 | UINT64_C(17041620989969956864), // VFSUMSvl_v |
| 6931 | UINT64_C(17041620989969956864), // VFSUMSvm |
| 6932 | UINT64_C(17041620989969956864), // VFSUMSvmL |
| 6933 | UINT64_C(17041620989969956864), // VFSUMSvmL_v |
| 6934 | UINT64_C(17041620989969956864), // VFSUMSvm_v |
| 6935 | UINT64_C(17041620989969956864), // VFSUMSvml |
| 6936 | UINT64_C(17041620989969956864), // VFSUMSvml_v |
| 6937 | UINT64_C(11754395577192808448), // VGTLSXNCsir |
| 6938 | UINT64_C(11754395577192808448), // VGTLSXNCsirL |
| 6939 | UINT64_C(11754395577192808448), // VGTLSXNCsirL_v |
| 6940 | UINT64_C(11754395577192808448), // VGTLSXNCsir_v |
| 6941 | UINT64_C(11754395577192808448), // VGTLSXNCsirl |
| 6942 | UINT64_C(11754395577192808448), // VGTLSXNCsirl_v |
| 6943 | UINT64_C(11754395577192808448), // VGTLSXNCsirm |
| 6944 | UINT64_C(11754395577192808448), // VGTLSXNCsirmL |
| 6945 | UINT64_C(11754395577192808448), // VGTLSXNCsirmL_v |
| 6946 | UINT64_C(11754395577192808448), // VGTLSXNCsirm_v |
| 6947 | UINT64_C(11754395577192808448), // VGTLSXNCsirml |
| 6948 | UINT64_C(11754395577192808448), // VGTLSXNCsirml_v |
| 6949 | UINT64_C(11754395027436994560), // VGTLSXNCsiz |
| 6950 | UINT64_C(11754395027436994560), // VGTLSXNCsizL |
| 6951 | UINT64_C(11754395027436994560), // VGTLSXNCsizL_v |
| 6952 | UINT64_C(11754395027436994560), // VGTLSXNCsiz_v |
| 6953 | UINT64_C(11754395027436994560), // VGTLSXNCsizl |
| 6954 | UINT64_C(11754395027436994560), // VGTLSXNCsizl_v |
| 6955 | UINT64_C(11754395027436994560), // VGTLSXNCsizm |
| 6956 | UINT64_C(11754395027436994560), // VGTLSXNCsizmL |
| 6957 | UINT64_C(11754395027436994560), // VGTLSXNCsizmL_v |
| 6958 | UINT64_C(11754395027436994560), // VGTLSXNCsizm_v |
| 6959 | UINT64_C(11754395027436994560), // VGTLSXNCsizml |
| 6960 | UINT64_C(11754395027436994560), // VGTLSXNCsizml_v |
| 6961 | UINT64_C(11754536314681163776), // VGTLSXNCsrr |
| 6962 | UINT64_C(11754536314681163776), // VGTLSXNCsrrL |
| 6963 | UINT64_C(11754536314681163776), // VGTLSXNCsrrL_v |
| 6964 | UINT64_C(11754536314681163776), // VGTLSXNCsrr_v |
| 6965 | UINT64_C(11754536314681163776), // VGTLSXNCsrrl |
| 6966 | UINT64_C(11754536314681163776), // VGTLSXNCsrrl_v |
| 6967 | UINT64_C(11754536314681163776), // VGTLSXNCsrrm |
| 6968 | UINT64_C(11754536314681163776), // VGTLSXNCsrrmL |
| 6969 | UINT64_C(11754536314681163776), // VGTLSXNCsrrmL_v |
| 6970 | UINT64_C(11754536314681163776), // VGTLSXNCsrrm_v |
| 6971 | UINT64_C(11754536314681163776), // VGTLSXNCsrrml |
| 6972 | UINT64_C(11754536314681163776), // VGTLSXNCsrrml_v |
| 6973 | UINT64_C(11754535764925349888), // VGTLSXNCsrz |
| 6974 | UINT64_C(11754535764925349888), // VGTLSXNCsrzL |
| 6975 | UINT64_C(11754535764925349888), // VGTLSXNCsrzL_v |
| 6976 | UINT64_C(11754535764925349888), // VGTLSXNCsrz_v |
| 6977 | UINT64_C(11754535764925349888), // VGTLSXNCsrzl |
| 6978 | UINT64_C(11754535764925349888), // VGTLSXNCsrzl_v |
| 6979 | UINT64_C(11754535764925349888), // VGTLSXNCsrzm |
| 6980 | UINT64_C(11754535764925349888), // VGTLSXNCsrzmL |
| 6981 | UINT64_C(11754535764925349888), // VGTLSXNCsrzmL_v |
| 6982 | UINT64_C(11754535764925349888), // VGTLSXNCsrzm_v |
| 6983 | UINT64_C(11754535764925349888), // VGTLSXNCsrzml |
| 6984 | UINT64_C(11754535764925349888), // VGTLSXNCsrzml_v |
| 6985 | UINT64_C(11745388377938067456), // VGTLSXNCvir |
| 6986 | UINT64_C(11745388377938067456), // VGTLSXNCvirL |
| 6987 | UINT64_C(11745388377938067456), // VGTLSXNCvirL_v |
| 6988 | UINT64_C(11745388377938067456), // VGTLSXNCvir_v |
| 6989 | UINT64_C(11745388377938067456), // VGTLSXNCvirl |
| 6990 | UINT64_C(11745388377938067456), // VGTLSXNCvirl_v |
| 6991 | UINT64_C(11745388377938067456), // VGTLSXNCvirm |
| 6992 | UINT64_C(11745388377938067456), // VGTLSXNCvirmL |
| 6993 | UINT64_C(11745388377938067456), // VGTLSXNCvirmL_v |
| 6994 | UINT64_C(11745388377938067456), // VGTLSXNCvirm_v |
| 6995 | UINT64_C(11745388377938067456), // VGTLSXNCvirml |
| 6996 | UINT64_C(11745388377938067456), // VGTLSXNCvirml_v |
| 6997 | UINT64_C(11745387828182253568), // VGTLSXNCviz |
| 6998 | UINT64_C(11745387828182253568), // VGTLSXNCvizL |
| 6999 | UINT64_C(11745387828182253568), // VGTLSXNCvizL_v |
| 7000 | UINT64_C(11745387828182253568), // VGTLSXNCviz_v |
| 7001 | UINT64_C(11745387828182253568), // VGTLSXNCvizl |
| 7002 | UINT64_C(11745387828182253568), // VGTLSXNCvizl_v |
| 7003 | UINT64_C(11745387828182253568), // VGTLSXNCvizm |
| 7004 | UINT64_C(11745387828182253568), // VGTLSXNCvizmL |
| 7005 | UINT64_C(11745387828182253568), // VGTLSXNCvizmL_v |
| 7006 | UINT64_C(11745387828182253568), // VGTLSXNCvizm_v |
| 7007 | UINT64_C(11745387828182253568), // VGTLSXNCvizml |
| 7008 | UINT64_C(11745387828182253568), // VGTLSXNCvizml_v |
| 7009 | UINT64_C(11745529115426422784), // VGTLSXNCvrr |
| 7010 | UINT64_C(11745529115426422784), // VGTLSXNCvrrL |
| 7011 | UINT64_C(11745529115426422784), // VGTLSXNCvrrL_v |
| 7012 | UINT64_C(11745529115426422784), // VGTLSXNCvrr_v |
| 7013 | UINT64_C(11745529115426422784), // VGTLSXNCvrrl |
| 7014 | UINT64_C(11745529115426422784), // VGTLSXNCvrrl_v |
| 7015 | UINT64_C(11745529115426422784), // VGTLSXNCvrrm |
| 7016 | UINT64_C(11745529115426422784), // VGTLSXNCvrrmL |
| 7017 | UINT64_C(11745529115426422784), // VGTLSXNCvrrmL_v |
| 7018 | UINT64_C(11745529115426422784), // VGTLSXNCvrrm_v |
| 7019 | UINT64_C(11745529115426422784), // VGTLSXNCvrrml |
| 7020 | UINT64_C(11745529115426422784), // VGTLSXNCvrrml_v |
| 7021 | UINT64_C(11745528565670608896), // VGTLSXNCvrz |
| 7022 | UINT64_C(11745528565670608896), // VGTLSXNCvrzL |
| 7023 | UINT64_C(11745528565670608896), // VGTLSXNCvrzL_v |
| 7024 | UINT64_C(11745528565670608896), // VGTLSXNCvrz_v |
| 7025 | UINT64_C(11745528565670608896), // VGTLSXNCvrzl |
| 7026 | UINT64_C(11745528565670608896), // VGTLSXNCvrzl_v |
| 7027 | UINT64_C(11745528565670608896), // VGTLSXNCvrzm |
| 7028 | UINT64_C(11745528565670608896), // VGTLSXNCvrzmL |
| 7029 | UINT64_C(11745528565670608896), // VGTLSXNCvrzmL_v |
| 7030 | UINT64_C(11745528565670608896), // VGTLSXNCvrzm_v |
| 7031 | UINT64_C(11745528565670608896), // VGTLSXNCvrzml |
| 7032 | UINT64_C(11745528565670608896), // VGTLSXNCvrzml_v |
| 7033 | UINT64_C(11772409975702290432), // VGTLSXsir |
| 7034 | UINT64_C(11772409975702290432), // VGTLSXsirL |
| 7035 | UINT64_C(11772409975702290432), // VGTLSXsirL_v |
| 7036 | UINT64_C(11772409975702290432), // VGTLSXsir_v |
| 7037 | UINT64_C(11772409975702290432), // VGTLSXsirl |
| 7038 | UINT64_C(11772409975702290432), // VGTLSXsirl_v |
| 7039 | UINT64_C(11772409975702290432), // VGTLSXsirm |
| 7040 | UINT64_C(11772409975702290432), // VGTLSXsirmL |
| 7041 | UINT64_C(11772409975702290432), // VGTLSXsirmL_v |
| 7042 | UINT64_C(11772409975702290432), // VGTLSXsirm_v |
| 7043 | UINT64_C(11772409975702290432), // VGTLSXsirml |
| 7044 | UINT64_C(11772409975702290432), // VGTLSXsirml_v |
| 7045 | UINT64_C(11772409425946476544), // VGTLSXsiz |
| 7046 | UINT64_C(11772409425946476544), // VGTLSXsizL |
| 7047 | UINT64_C(11772409425946476544), // VGTLSXsizL_v |
| 7048 | UINT64_C(11772409425946476544), // VGTLSXsiz_v |
| 7049 | UINT64_C(11772409425946476544), // VGTLSXsizl |
| 7050 | UINT64_C(11772409425946476544), // VGTLSXsizl_v |
| 7051 | UINT64_C(11772409425946476544), // VGTLSXsizm |
| 7052 | UINT64_C(11772409425946476544), // VGTLSXsizmL |
| 7053 | UINT64_C(11772409425946476544), // VGTLSXsizmL_v |
| 7054 | UINT64_C(11772409425946476544), // VGTLSXsizm_v |
| 7055 | UINT64_C(11772409425946476544), // VGTLSXsizml |
| 7056 | UINT64_C(11772409425946476544), // VGTLSXsizml_v |
| 7057 | UINT64_C(11772550713190645760), // VGTLSXsrr |
| 7058 | UINT64_C(11772550713190645760), // VGTLSXsrrL |
| 7059 | UINT64_C(11772550713190645760), // VGTLSXsrrL_v |
| 7060 | UINT64_C(11772550713190645760), // VGTLSXsrr_v |
| 7061 | UINT64_C(11772550713190645760), // VGTLSXsrrl |
| 7062 | UINT64_C(11772550713190645760), // VGTLSXsrrl_v |
| 7063 | UINT64_C(11772550713190645760), // VGTLSXsrrm |
| 7064 | UINT64_C(11772550713190645760), // VGTLSXsrrmL |
| 7065 | UINT64_C(11772550713190645760), // VGTLSXsrrmL_v |
| 7066 | UINT64_C(11772550713190645760), // VGTLSXsrrm_v |
| 7067 | UINT64_C(11772550713190645760), // VGTLSXsrrml |
| 7068 | UINT64_C(11772550713190645760), // VGTLSXsrrml_v |
| 7069 | UINT64_C(11772550163434831872), // VGTLSXsrz |
| 7070 | UINT64_C(11772550163434831872), // VGTLSXsrzL |
| 7071 | UINT64_C(11772550163434831872), // VGTLSXsrzL_v |
| 7072 | UINT64_C(11772550163434831872), // VGTLSXsrz_v |
| 7073 | UINT64_C(11772550163434831872), // VGTLSXsrzl |
| 7074 | UINT64_C(11772550163434831872), // VGTLSXsrzl_v |
| 7075 | UINT64_C(11772550163434831872), // VGTLSXsrzm |
| 7076 | UINT64_C(11772550163434831872), // VGTLSXsrzmL |
| 7077 | UINT64_C(11772550163434831872), // VGTLSXsrzmL_v |
| 7078 | UINT64_C(11772550163434831872), // VGTLSXsrzm_v |
| 7079 | UINT64_C(11772550163434831872), // VGTLSXsrzml |
| 7080 | UINT64_C(11772550163434831872), // VGTLSXsrzml_v |
| 7081 | UINT64_C(11763402776447549440), // VGTLSXvir |
| 7082 | UINT64_C(11763402776447549440), // VGTLSXvirL |
| 7083 | UINT64_C(11763402776447549440), // VGTLSXvirL_v |
| 7084 | UINT64_C(11763402776447549440), // VGTLSXvir_v |
| 7085 | UINT64_C(11763402776447549440), // VGTLSXvirl |
| 7086 | UINT64_C(11763402776447549440), // VGTLSXvirl_v |
| 7087 | UINT64_C(11763402776447549440), // VGTLSXvirm |
| 7088 | UINT64_C(11763402776447549440), // VGTLSXvirmL |
| 7089 | UINT64_C(11763402776447549440), // VGTLSXvirmL_v |
| 7090 | UINT64_C(11763402776447549440), // VGTLSXvirm_v |
| 7091 | UINT64_C(11763402776447549440), // VGTLSXvirml |
| 7092 | UINT64_C(11763402776447549440), // VGTLSXvirml_v |
| 7093 | UINT64_C(11763402226691735552), // VGTLSXviz |
| 7094 | UINT64_C(11763402226691735552), // VGTLSXvizL |
| 7095 | UINT64_C(11763402226691735552), // VGTLSXvizL_v |
| 7096 | UINT64_C(11763402226691735552), // VGTLSXviz_v |
| 7097 | UINT64_C(11763402226691735552), // VGTLSXvizl |
| 7098 | UINT64_C(11763402226691735552), // VGTLSXvizl_v |
| 7099 | UINT64_C(11763402226691735552), // VGTLSXvizm |
| 7100 | UINT64_C(11763402226691735552), // VGTLSXvizmL |
| 7101 | UINT64_C(11763402226691735552), // VGTLSXvizmL_v |
| 7102 | UINT64_C(11763402226691735552), // VGTLSXvizm_v |
| 7103 | UINT64_C(11763402226691735552), // VGTLSXvizml |
| 7104 | UINT64_C(11763402226691735552), // VGTLSXvizml_v |
| 7105 | UINT64_C(11763543513935904768), // VGTLSXvrr |
| 7106 | UINT64_C(11763543513935904768), // VGTLSXvrrL |
| 7107 | UINT64_C(11763543513935904768), // VGTLSXvrrL_v |
| 7108 | UINT64_C(11763543513935904768), // VGTLSXvrr_v |
| 7109 | UINT64_C(11763543513935904768), // VGTLSXvrrl |
| 7110 | UINT64_C(11763543513935904768), // VGTLSXvrrl_v |
| 7111 | UINT64_C(11763543513935904768), // VGTLSXvrrm |
| 7112 | UINT64_C(11763543513935904768), // VGTLSXvrrmL |
| 7113 | UINT64_C(11763543513935904768), // VGTLSXvrrmL_v |
| 7114 | UINT64_C(11763543513935904768), // VGTLSXvrrm_v |
| 7115 | UINT64_C(11763543513935904768), // VGTLSXvrrml |
| 7116 | UINT64_C(11763543513935904768), // VGTLSXvrrml_v |
| 7117 | UINT64_C(11763542964180090880), // VGTLSXvrz |
| 7118 | UINT64_C(11763542964180090880), // VGTLSXvrzL |
| 7119 | UINT64_C(11763542964180090880), // VGTLSXvrzL_v |
| 7120 | UINT64_C(11763542964180090880), // VGTLSXvrz_v |
| 7121 | UINT64_C(11763542964180090880), // VGTLSXvrzl |
| 7122 | UINT64_C(11763542964180090880), // VGTLSXvrzl_v |
| 7123 | UINT64_C(11763542964180090880), // VGTLSXvrzm |
| 7124 | UINT64_C(11763542964180090880), // VGTLSXvrzmL |
| 7125 | UINT64_C(11763542964180090880), // VGTLSXvrzmL_v |
| 7126 | UINT64_C(11763542964180090880), // VGTLSXvrzm_v |
| 7127 | UINT64_C(11763542964180090880), // VGTLSXvrzml |
| 7128 | UINT64_C(11763542964180090880), // VGTLSXvrzml_v |
| 7129 | UINT64_C(11790424374211772416), // VGTLZXNCsir |
| 7130 | UINT64_C(11790424374211772416), // VGTLZXNCsirL |
| 7131 | UINT64_C(11790424374211772416), // VGTLZXNCsirL_v |
| 7132 | UINT64_C(11790424374211772416), // VGTLZXNCsir_v |
| 7133 | UINT64_C(11790424374211772416), // VGTLZXNCsirl |
| 7134 | UINT64_C(11790424374211772416), // VGTLZXNCsirl_v |
| 7135 | UINT64_C(11790424374211772416), // VGTLZXNCsirm |
| 7136 | UINT64_C(11790424374211772416), // VGTLZXNCsirmL |
| 7137 | UINT64_C(11790424374211772416), // VGTLZXNCsirmL_v |
| 7138 | UINT64_C(11790424374211772416), // VGTLZXNCsirm_v |
| 7139 | UINT64_C(11790424374211772416), // VGTLZXNCsirml |
| 7140 | UINT64_C(11790424374211772416), // VGTLZXNCsirml_v |
| 7141 | UINT64_C(11790423824455958528), // VGTLZXNCsiz |
| 7142 | UINT64_C(11790423824455958528), // VGTLZXNCsizL |
| 7143 | UINT64_C(11790423824455958528), // VGTLZXNCsizL_v |
| 7144 | UINT64_C(11790423824455958528), // VGTLZXNCsiz_v |
| 7145 | UINT64_C(11790423824455958528), // VGTLZXNCsizl |
| 7146 | UINT64_C(11790423824455958528), // VGTLZXNCsizl_v |
| 7147 | UINT64_C(11790423824455958528), // VGTLZXNCsizm |
| 7148 | UINT64_C(11790423824455958528), // VGTLZXNCsizmL |
| 7149 | UINT64_C(11790423824455958528), // VGTLZXNCsizmL_v |
| 7150 | UINT64_C(11790423824455958528), // VGTLZXNCsizm_v |
| 7151 | UINT64_C(11790423824455958528), // VGTLZXNCsizml |
| 7152 | UINT64_C(11790423824455958528), // VGTLZXNCsizml_v |
| 7153 | UINT64_C(11790565111700127744), // VGTLZXNCsrr |
| 7154 | UINT64_C(11790565111700127744), // VGTLZXNCsrrL |
| 7155 | UINT64_C(11790565111700127744), // VGTLZXNCsrrL_v |
| 7156 | UINT64_C(11790565111700127744), // VGTLZXNCsrr_v |
| 7157 | UINT64_C(11790565111700127744), // VGTLZXNCsrrl |
| 7158 | UINT64_C(11790565111700127744), // VGTLZXNCsrrl_v |
| 7159 | UINT64_C(11790565111700127744), // VGTLZXNCsrrm |
| 7160 | UINT64_C(11790565111700127744), // VGTLZXNCsrrmL |
| 7161 | UINT64_C(11790565111700127744), // VGTLZXNCsrrmL_v |
| 7162 | UINT64_C(11790565111700127744), // VGTLZXNCsrrm_v |
| 7163 | UINT64_C(11790565111700127744), // VGTLZXNCsrrml |
| 7164 | UINT64_C(11790565111700127744), // VGTLZXNCsrrml_v |
| 7165 | UINT64_C(11790564561944313856), // VGTLZXNCsrz |
| 7166 | UINT64_C(11790564561944313856), // VGTLZXNCsrzL |
| 7167 | UINT64_C(11790564561944313856), // VGTLZXNCsrzL_v |
| 7168 | UINT64_C(11790564561944313856), // VGTLZXNCsrz_v |
| 7169 | UINT64_C(11790564561944313856), // VGTLZXNCsrzl |
| 7170 | UINT64_C(11790564561944313856), // VGTLZXNCsrzl_v |
| 7171 | UINT64_C(11790564561944313856), // VGTLZXNCsrzm |
| 7172 | UINT64_C(11790564561944313856), // VGTLZXNCsrzmL |
| 7173 | UINT64_C(11790564561944313856), // VGTLZXNCsrzmL_v |
| 7174 | UINT64_C(11790564561944313856), // VGTLZXNCsrzm_v |
| 7175 | UINT64_C(11790564561944313856), // VGTLZXNCsrzml |
| 7176 | UINT64_C(11790564561944313856), // VGTLZXNCsrzml_v |
| 7177 | UINT64_C(11781417174957031424), // VGTLZXNCvir |
| 7178 | UINT64_C(11781417174957031424), // VGTLZXNCvirL |
| 7179 | UINT64_C(11781417174957031424), // VGTLZXNCvirL_v |
| 7180 | UINT64_C(11781417174957031424), // VGTLZXNCvir_v |
| 7181 | UINT64_C(11781417174957031424), // VGTLZXNCvirl |
| 7182 | UINT64_C(11781417174957031424), // VGTLZXNCvirl_v |
| 7183 | UINT64_C(11781417174957031424), // VGTLZXNCvirm |
| 7184 | UINT64_C(11781417174957031424), // VGTLZXNCvirmL |
| 7185 | UINT64_C(11781417174957031424), // VGTLZXNCvirmL_v |
| 7186 | UINT64_C(11781417174957031424), // VGTLZXNCvirm_v |
| 7187 | UINT64_C(11781417174957031424), // VGTLZXNCvirml |
| 7188 | UINT64_C(11781417174957031424), // VGTLZXNCvirml_v |
| 7189 | UINT64_C(11781416625201217536), // VGTLZXNCviz |
| 7190 | UINT64_C(11781416625201217536), // VGTLZXNCvizL |
| 7191 | UINT64_C(11781416625201217536), // VGTLZXNCvizL_v |
| 7192 | UINT64_C(11781416625201217536), // VGTLZXNCviz_v |
| 7193 | UINT64_C(11781416625201217536), // VGTLZXNCvizl |
| 7194 | UINT64_C(11781416625201217536), // VGTLZXNCvizl_v |
| 7195 | UINT64_C(11781416625201217536), // VGTLZXNCvizm |
| 7196 | UINT64_C(11781416625201217536), // VGTLZXNCvizmL |
| 7197 | UINT64_C(11781416625201217536), // VGTLZXNCvizmL_v |
| 7198 | UINT64_C(11781416625201217536), // VGTLZXNCvizm_v |
| 7199 | UINT64_C(11781416625201217536), // VGTLZXNCvizml |
| 7200 | UINT64_C(11781416625201217536), // VGTLZXNCvizml_v |
| 7201 | UINT64_C(11781557912445386752), // VGTLZXNCvrr |
| 7202 | UINT64_C(11781557912445386752), // VGTLZXNCvrrL |
| 7203 | UINT64_C(11781557912445386752), // VGTLZXNCvrrL_v |
| 7204 | UINT64_C(11781557912445386752), // VGTLZXNCvrr_v |
| 7205 | UINT64_C(11781557912445386752), // VGTLZXNCvrrl |
| 7206 | UINT64_C(11781557912445386752), // VGTLZXNCvrrl_v |
| 7207 | UINT64_C(11781557912445386752), // VGTLZXNCvrrm |
| 7208 | UINT64_C(11781557912445386752), // VGTLZXNCvrrmL |
| 7209 | UINT64_C(11781557912445386752), // VGTLZXNCvrrmL_v |
| 7210 | UINT64_C(11781557912445386752), // VGTLZXNCvrrm_v |
| 7211 | UINT64_C(11781557912445386752), // VGTLZXNCvrrml |
| 7212 | UINT64_C(11781557912445386752), // VGTLZXNCvrrml_v |
| 7213 | UINT64_C(11781557362689572864), // VGTLZXNCvrz |
| 7214 | UINT64_C(11781557362689572864), // VGTLZXNCvrzL |
| 7215 | UINT64_C(11781557362689572864), // VGTLZXNCvrzL_v |
| 7216 | UINT64_C(11781557362689572864), // VGTLZXNCvrz_v |
| 7217 | UINT64_C(11781557362689572864), // VGTLZXNCvrzl |
| 7218 | UINT64_C(11781557362689572864), // VGTLZXNCvrzl_v |
| 7219 | UINT64_C(11781557362689572864), // VGTLZXNCvrzm |
| 7220 | UINT64_C(11781557362689572864), // VGTLZXNCvrzmL |
| 7221 | UINT64_C(11781557362689572864), // VGTLZXNCvrzmL_v |
| 7222 | UINT64_C(11781557362689572864), // VGTLZXNCvrzm_v |
| 7223 | UINT64_C(11781557362689572864), // VGTLZXNCvrzml |
| 7224 | UINT64_C(11781557362689572864), // VGTLZXNCvrzml_v |
| 7225 | UINT64_C(11808438772721254400), // VGTLZXsir |
| 7226 | UINT64_C(11808438772721254400), // VGTLZXsirL |
| 7227 | UINT64_C(11808438772721254400), // VGTLZXsirL_v |
| 7228 | UINT64_C(11808438772721254400), // VGTLZXsir_v |
| 7229 | UINT64_C(11808438772721254400), // VGTLZXsirl |
| 7230 | UINT64_C(11808438772721254400), // VGTLZXsirl_v |
| 7231 | UINT64_C(11808438772721254400), // VGTLZXsirm |
| 7232 | UINT64_C(11808438772721254400), // VGTLZXsirmL |
| 7233 | UINT64_C(11808438772721254400), // VGTLZXsirmL_v |
| 7234 | UINT64_C(11808438772721254400), // VGTLZXsirm_v |
| 7235 | UINT64_C(11808438772721254400), // VGTLZXsirml |
| 7236 | UINT64_C(11808438772721254400), // VGTLZXsirml_v |
| 7237 | UINT64_C(11808438222965440512), // VGTLZXsiz |
| 7238 | UINT64_C(11808438222965440512), // VGTLZXsizL |
| 7239 | UINT64_C(11808438222965440512), // VGTLZXsizL_v |
| 7240 | UINT64_C(11808438222965440512), // VGTLZXsiz_v |
| 7241 | UINT64_C(11808438222965440512), // VGTLZXsizl |
| 7242 | UINT64_C(11808438222965440512), // VGTLZXsizl_v |
| 7243 | UINT64_C(11808438222965440512), // VGTLZXsizm |
| 7244 | UINT64_C(11808438222965440512), // VGTLZXsizmL |
| 7245 | UINT64_C(11808438222965440512), // VGTLZXsizmL_v |
| 7246 | UINT64_C(11808438222965440512), // VGTLZXsizm_v |
| 7247 | UINT64_C(11808438222965440512), // VGTLZXsizml |
| 7248 | UINT64_C(11808438222965440512), // VGTLZXsizml_v |
| 7249 | UINT64_C(11808579510209609728), // VGTLZXsrr |
| 7250 | UINT64_C(11808579510209609728), // VGTLZXsrrL |
| 7251 | UINT64_C(11808579510209609728), // VGTLZXsrrL_v |
| 7252 | UINT64_C(11808579510209609728), // VGTLZXsrr_v |
| 7253 | UINT64_C(11808579510209609728), // VGTLZXsrrl |
| 7254 | UINT64_C(11808579510209609728), // VGTLZXsrrl_v |
| 7255 | UINT64_C(11808579510209609728), // VGTLZXsrrm |
| 7256 | UINT64_C(11808579510209609728), // VGTLZXsrrmL |
| 7257 | UINT64_C(11808579510209609728), // VGTLZXsrrmL_v |
| 7258 | UINT64_C(11808579510209609728), // VGTLZXsrrm_v |
| 7259 | UINT64_C(11808579510209609728), // VGTLZXsrrml |
| 7260 | UINT64_C(11808579510209609728), // VGTLZXsrrml_v |
| 7261 | UINT64_C(11808578960453795840), // VGTLZXsrz |
| 7262 | UINT64_C(11808578960453795840), // VGTLZXsrzL |
| 7263 | UINT64_C(11808578960453795840), // VGTLZXsrzL_v |
| 7264 | UINT64_C(11808578960453795840), // VGTLZXsrz_v |
| 7265 | UINT64_C(11808578960453795840), // VGTLZXsrzl |
| 7266 | UINT64_C(11808578960453795840), // VGTLZXsrzl_v |
| 7267 | UINT64_C(11808578960453795840), // VGTLZXsrzm |
| 7268 | UINT64_C(11808578960453795840), // VGTLZXsrzmL |
| 7269 | UINT64_C(11808578960453795840), // VGTLZXsrzmL_v |
| 7270 | UINT64_C(11808578960453795840), // VGTLZXsrzm_v |
| 7271 | UINT64_C(11808578960453795840), // VGTLZXsrzml |
| 7272 | UINT64_C(11808578960453795840), // VGTLZXsrzml_v |
| 7273 | UINT64_C(11799431573466513408), // VGTLZXvir |
| 7274 | UINT64_C(11799431573466513408), // VGTLZXvirL |
| 7275 | UINT64_C(11799431573466513408), // VGTLZXvirL_v |
| 7276 | UINT64_C(11799431573466513408), // VGTLZXvir_v |
| 7277 | UINT64_C(11799431573466513408), // VGTLZXvirl |
| 7278 | UINT64_C(11799431573466513408), // VGTLZXvirl_v |
| 7279 | UINT64_C(11799431573466513408), // VGTLZXvirm |
| 7280 | UINT64_C(11799431573466513408), // VGTLZXvirmL |
| 7281 | UINT64_C(11799431573466513408), // VGTLZXvirmL_v |
| 7282 | UINT64_C(11799431573466513408), // VGTLZXvirm_v |
| 7283 | UINT64_C(11799431573466513408), // VGTLZXvirml |
| 7284 | UINT64_C(11799431573466513408), // VGTLZXvirml_v |
| 7285 | UINT64_C(11799431023710699520), // VGTLZXviz |
| 7286 | UINT64_C(11799431023710699520), // VGTLZXvizL |
| 7287 | UINT64_C(11799431023710699520), // VGTLZXvizL_v |
| 7288 | UINT64_C(11799431023710699520), // VGTLZXviz_v |
| 7289 | UINT64_C(11799431023710699520), // VGTLZXvizl |
| 7290 | UINT64_C(11799431023710699520), // VGTLZXvizl_v |
| 7291 | UINT64_C(11799431023710699520), // VGTLZXvizm |
| 7292 | UINT64_C(11799431023710699520), // VGTLZXvizmL |
| 7293 | UINT64_C(11799431023710699520), // VGTLZXvizmL_v |
| 7294 | UINT64_C(11799431023710699520), // VGTLZXvizm_v |
| 7295 | UINT64_C(11799431023710699520), // VGTLZXvizml |
| 7296 | UINT64_C(11799431023710699520), // VGTLZXvizml_v |
| 7297 | UINT64_C(11799572310954868736), // VGTLZXvrr |
| 7298 | UINT64_C(11799572310954868736), // VGTLZXvrrL |
| 7299 | UINT64_C(11799572310954868736), // VGTLZXvrrL_v |
| 7300 | UINT64_C(11799572310954868736), // VGTLZXvrr_v |
| 7301 | UINT64_C(11799572310954868736), // VGTLZXvrrl |
| 7302 | UINT64_C(11799572310954868736), // VGTLZXvrrl_v |
| 7303 | UINT64_C(11799572310954868736), // VGTLZXvrrm |
| 7304 | UINT64_C(11799572310954868736), // VGTLZXvrrmL |
| 7305 | UINT64_C(11799572310954868736), // VGTLZXvrrmL_v |
| 7306 | UINT64_C(11799572310954868736), // VGTLZXvrrm_v |
| 7307 | UINT64_C(11799572310954868736), // VGTLZXvrrml |
| 7308 | UINT64_C(11799572310954868736), // VGTLZXvrrml_v |
| 7309 | UINT64_C(11799571761199054848), // VGTLZXvrz |
| 7310 | UINT64_C(11799571761199054848), // VGTLZXvrzL |
| 7311 | UINT64_C(11799571761199054848), // VGTLZXvrzL_v |
| 7312 | UINT64_C(11799571761199054848), // VGTLZXvrz_v |
| 7313 | UINT64_C(11799571761199054848), // VGTLZXvrzl |
| 7314 | UINT64_C(11799571761199054848), // VGTLZXvrzl_v |
| 7315 | UINT64_C(11799571761199054848), // VGTLZXvrzm |
| 7316 | UINT64_C(11799571761199054848), // VGTLZXvrzmL |
| 7317 | UINT64_C(11799571761199054848), // VGTLZXvrzmL_v |
| 7318 | UINT64_C(11799571761199054848), // VGTLZXvrzm_v |
| 7319 | UINT64_C(11799571761199054848), // VGTLZXvrzml |
| 7320 | UINT64_C(11799571761199054848), // VGTLZXvrzml_v |
| 7321 | UINT64_C(11610280389116952576), // VGTNCsir |
| 7322 | UINT64_C(11610280389116952576), // VGTNCsirL |
| 7323 | UINT64_C(11610280389116952576), // VGTNCsirL_v |
| 7324 | UINT64_C(11610280389116952576), // VGTNCsir_v |
| 7325 | UINT64_C(11610280389116952576), // VGTNCsirl |
| 7326 | UINT64_C(11610280389116952576), // VGTNCsirl_v |
| 7327 | UINT64_C(11610280389116952576), // VGTNCsirm |
| 7328 | UINT64_C(11610280389116952576), // VGTNCsirmL |
| 7329 | UINT64_C(11610280389116952576), // VGTNCsirmL_v |
| 7330 | UINT64_C(11610280389116952576), // VGTNCsirm_v |
| 7331 | UINT64_C(11610280389116952576), // VGTNCsirml |
| 7332 | UINT64_C(11610280389116952576), // VGTNCsirml_v |
| 7333 | UINT64_C(11610279839361138688), // VGTNCsiz |
| 7334 | UINT64_C(11610279839361138688), // VGTNCsizL |
| 7335 | UINT64_C(11610279839361138688), // VGTNCsizL_v |
| 7336 | UINT64_C(11610279839361138688), // VGTNCsiz_v |
| 7337 | UINT64_C(11610279839361138688), // VGTNCsizl |
| 7338 | UINT64_C(11610279839361138688), // VGTNCsizl_v |
| 7339 | UINT64_C(11610279839361138688), // VGTNCsizm |
| 7340 | UINT64_C(11610279839361138688), // VGTNCsizmL |
| 7341 | UINT64_C(11610279839361138688), // VGTNCsizmL_v |
| 7342 | UINT64_C(11610279839361138688), // VGTNCsizm_v |
| 7343 | UINT64_C(11610279839361138688), // VGTNCsizml |
| 7344 | UINT64_C(11610279839361138688), // VGTNCsizml_v |
| 7345 | UINT64_C(11610421126605307904), // VGTNCsrr |
| 7346 | UINT64_C(11610421126605307904), // VGTNCsrrL |
| 7347 | UINT64_C(11610421126605307904), // VGTNCsrrL_v |
| 7348 | UINT64_C(11610421126605307904), // VGTNCsrr_v |
| 7349 | UINT64_C(11610421126605307904), // VGTNCsrrl |
| 7350 | UINT64_C(11610421126605307904), // VGTNCsrrl_v |
| 7351 | UINT64_C(11610421126605307904), // VGTNCsrrm |
| 7352 | UINT64_C(11610421126605307904), // VGTNCsrrmL |
| 7353 | UINT64_C(11610421126605307904), // VGTNCsrrmL_v |
| 7354 | UINT64_C(11610421126605307904), // VGTNCsrrm_v |
| 7355 | UINT64_C(11610421126605307904), // VGTNCsrrml |
| 7356 | UINT64_C(11610421126605307904), // VGTNCsrrml_v |
| 7357 | UINT64_C(11610420576849494016), // VGTNCsrz |
| 7358 | UINT64_C(11610420576849494016), // VGTNCsrzL |
| 7359 | UINT64_C(11610420576849494016), // VGTNCsrzL_v |
| 7360 | UINT64_C(11610420576849494016), // VGTNCsrz_v |
| 7361 | UINT64_C(11610420576849494016), // VGTNCsrzl |
| 7362 | UINT64_C(11610420576849494016), // VGTNCsrzl_v |
| 7363 | UINT64_C(11610420576849494016), // VGTNCsrzm |
| 7364 | UINT64_C(11610420576849494016), // VGTNCsrzmL |
| 7365 | UINT64_C(11610420576849494016), // VGTNCsrzmL_v |
| 7366 | UINT64_C(11610420576849494016), // VGTNCsrzm_v |
| 7367 | UINT64_C(11610420576849494016), // VGTNCsrzml |
| 7368 | UINT64_C(11610420576849494016), // VGTNCsrzml_v |
| 7369 | UINT64_C(11601273189862211584), // VGTNCvir |
| 7370 | UINT64_C(11601273189862211584), // VGTNCvirL |
| 7371 | UINT64_C(11601273189862211584), // VGTNCvirL_v |
| 7372 | UINT64_C(11601273189862211584), // VGTNCvir_v |
| 7373 | UINT64_C(11601273189862211584), // VGTNCvirl |
| 7374 | UINT64_C(11601273189862211584), // VGTNCvirl_v |
| 7375 | UINT64_C(11601273189862211584), // VGTNCvirm |
| 7376 | UINT64_C(11601273189862211584), // VGTNCvirmL |
| 7377 | UINT64_C(11601273189862211584), // VGTNCvirmL_v |
| 7378 | UINT64_C(11601273189862211584), // VGTNCvirm_v |
| 7379 | UINT64_C(11601273189862211584), // VGTNCvirml |
| 7380 | UINT64_C(11601273189862211584), // VGTNCvirml_v |
| 7381 | UINT64_C(11601272640106397696), // VGTNCviz |
| 7382 | UINT64_C(11601272640106397696), // VGTNCvizL |
| 7383 | UINT64_C(11601272640106397696), // VGTNCvizL_v |
| 7384 | UINT64_C(11601272640106397696), // VGTNCviz_v |
| 7385 | UINT64_C(11601272640106397696), // VGTNCvizl |
| 7386 | UINT64_C(11601272640106397696), // VGTNCvizl_v |
| 7387 | UINT64_C(11601272640106397696), // VGTNCvizm |
| 7388 | UINT64_C(11601272640106397696), // VGTNCvizmL |
| 7389 | UINT64_C(11601272640106397696), // VGTNCvizmL_v |
| 7390 | UINT64_C(11601272640106397696), // VGTNCvizm_v |
| 7391 | UINT64_C(11601272640106397696), // VGTNCvizml |
| 7392 | UINT64_C(11601272640106397696), // VGTNCvizml_v |
| 7393 | UINT64_C(11601413927350566912), // VGTNCvrr |
| 7394 | UINT64_C(11601413927350566912), // VGTNCvrrL |
| 7395 | UINT64_C(11601413927350566912), // VGTNCvrrL_v |
| 7396 | UINT64_C(11601413927350566912), // VGTNCvrr_v |
| 7397 | UINT64_C(11601413927350566912), // VGTNCvrrl |
| 7398 | UINT64_C(11601413927350566912), // VGTNCvrrl_v |
| 7399 | UINT64_C(11601413927350566912), // VGTNCvrrm |
| 7400 | UINT64_C(11601413927350566912), // VGTNCvrrmL |
| 7401 | UINT64_C(11601413927350566912), // VGTNCvrrmL_v |
| 7402 | UINT64_C(11601413927350566912), // VGTNCvrrm_v |
| 7403 | UINT64_C(11601413927350566912), // VGTNCvrrml |
| 7404 | UINT64_C(11601413927350566912), // VGTNCvrrml_v |
| 7405 | UINT64_C(11601413377594753024), // VGTNCvrz |
| 7406 | UINT64_C(11601413377594753024), // VGTNCvrzL |
| 7407 | UINT64_C(11601413377594753024), // VGTNCvrzL_v |
| 7408 | UINT64_C(11601413377594753024), // VGTNCvrz_v |
| 7409 | UINT64_C(11601413377594753024), // VGTNCvrzl |
| 7410 | UINT64_C(11601413377594753024), // VGTNCvrzl_v |
| 7411 | UINT64_C(11601413377594753024), // VGTNCvrzm |
| 7412 | UINT64_C(11601413377594753024), // VGTNCvrzmL |
| 7413 | UINT64_C(11601413377594753024), // VGTNCvrzmL_v |
| 7414 | UINT64_C(11601413377594753024), // VGTNCvrzm_v |
| 7415 | UINT64_C(11601413377594753024), // VGTNCvrzml |
| 7416 | UINT64_C(11601413377594753024), // VGTNCvrzml_v |
| 7417 | UINT64_C(11682337983154880512), // VGTUNCsir |
| 7418 | UINT64_C(11682337983154880512), // VGTUNCsirL |
| 7419 | UINT64_C(11682337983154880512), // VGTUNCsirL_v |
| 7420 | UINT64_C(11682337983154880512), // VGTUNCsir_v |
| 7421 | UINT64_C(11682337983154880512), // VGTUNCsirl |
| 7422 | UINT64_C(11682337983154880512), // VGTUNCsirl_v |
| 7423 | UINT64_C(11682337983154880512), // VGTUNCsirm |
| 7424 | UINT64_C(11682337983154880512), // VGTUNCsirmL |
| 7425 | UINT64_C(11682337983154880512), // VGTUNCsirmL_v |
| 7426 | UINT64_C(11682337983154880512), // VGTUNCsirm_v |
| 7427 | UINT64_C(11682337983154880512), // VGTUNCsirml |
| 7428 | UINT64_C(11682337983154880512), // VGTUNCsirml_v |
| 7429 | UINT64_C(11682337433399066624), // VGTUNCsiz |
| 7430 | UINT64_C(11682337433399066624), // VGTUNCsizL |
| 7431 | UINT64_C(11682337433399066624), // VGTUNCsizL_v |
| 7432 | UINT64_C(11682337433399066624), // VGTUNCsiz_v |
| 7433 | UINT64_C(11682337433399066624), // VGTUNCsizl |
| 7434 | UINT64_C(11682337433399066624), // VGTUNCsizl_v |
| 7435 | UINT64_C(11682337433399066624), // VGTUNCsizm |
| 7436 | UINT64_C(11682337433399066624), // VGTUNCsizmL |
| 7437 | UINT64_C(11682337433399066624), // VGTUNCsizmL_v |
| 7438 | UINT64_C(11682337433399066624), // VGTUNCsizm_v |
| 7439 | UINT64_C(11682337433399066624), // VGTUNCsizml |
| 7440 | UINT64_C(11682337433399066624), // VGTUNCsizml_v |
| 7441 | UINT64_C(11682478720643235840), // VGTUNCsrr |
| 7442 | UINT64_C(11682478720643235840), // VGTUNCsrrL |
| 7443 | UINT64_C(11682478720643235840), // VGTUNCsrrL_v |
| 7444 | UINT64_C(11682478720643235840), // VGTUNCsrr_v |
| 7445 | UINT64_C(11682478720643235840), // VGTUNCsrrl |
| 7446 | UINT64_C(11682478720643235840), // VGTUNCsrrl_v |
| 7447 | UINT64_C(11682478720643235840), // VGTUNCsrrm |
| 7448 | UINT64_C(11682478720643235840), // VGTUNCsrrmL |
| 7449 | UINT64_C(11682478720643235840), // VGTUNCsrrmL_v |
| 7450 | UINT64_C(11682478720643235840), // VGTUNCsrrm_v |
| 7451 | UINT64_C(11682478720643235840), // VGTUNCsrrml |
| 7452 | UINT64_C(11682478720643235840), // VGTUNCsrrml_v |
| 7453 | UINT64_C(11682478170887421952), // VGTUNCsrz |
| 7454 | UINT64_C(11682478170887421952), // VGTUNCsrzL |
| 7455 | UINT64_C(11682478170887421952), // VGTUNCsrzL_v |
| 7456 | UINT64_C(11682478170887421952), // VGTUNCsrz_v |
| 7457 | UINT64_C(11682478170887421952), // VGTUNCsrzl |
| 7458 | UINT64_C(11682478170887421952), // VGTUNCsrzl_v |
| 7459 | UINT64_C(11682478170887421952), // VGTUNCsrzm |
| 7460 | UINT64_C(11682478170887421952), // VGTUNCsrzmL |
| 7461 | UINT64_C(11682478170887421952), // VGTUNCsrzmL_v |
| 7462 | UINT64_C(11682478170887421952), // VGTUNCsrzm_v |
| 7463 | UINT64_C(11682478170887421952), // VGTUNCsrzml |
| 7464 | UINT64_C(11682478170887421952), // VGTUNCsrzml_v |
| 7465 | UINT64_C(11673330783900139520), // VGTUNCvir |
| 7466 | UINT64_C(11673330783900139520), // VGTUNCvirL |
| 7467 | UINT64_C(11673330783900139520), // VGTUNCvirL_v |
| 7468 | UINT64_C(11673330783900139520), // VGTUNCvir_v |
| 7469 | UINT64_C(11673330783900139520), // VGTUNCvirl |
| 7470 | UINT64_C(11673330783900139520), // VGTUNCvirl_v |
| 7471 | UINT64_C(11673330783900139520), // VGTUNCvirm |
| 7472 | UINT64_C(11673330783900139520), // VGTUNCvirmL |
| 7473 | UINT64_C(11673330783900139520), // VGTUNCvirmL_v |
| 7474 | UINT64_C(11673330783900139520), // VGTUNCvirm_v |
| 7475 | UINT64_C(11673330783900139520), // VGTUNCvirml |
| 7476 | UINT64_C(11673330783900139520), // VGTUNCvirml_v |
| 7477 | UINT64_C(11673330234144325632), // VGTUNCviz |
| 7478 | UINT64_C(11673330234144325632), // VGTUNCvizL |
| 7479 | UINT64_C(11673330234144325632), // VGTUNCvizL_v |
| 7480 | UINT64_C(11673330234144325632), // VGTUNCviz_v |
| 7481 | UINT64_C(11673330234144325632), // VGTUNCvizl |
| 7482 | UINT64_C(11673330234144325632), // VGTUNCvizl_v |
| 7483 | UINT64_C(11673330234144325632), // VGTUNCvizm |
| 7484 | UINT64_C(11673330234144325632), // VGTUNCvizmL |
| 7485 | UINT64_C(11673330234144325632), // VGTUNCvizmL_v |
| 7486 | UINT64_C(11673330234144325632), // VGTUNCvizm_v |
| 7487 | UINT64_C(11673330234144325632), // VGTUNCvizml |
| 7488 | UINT64_C(11673330234144325632), // VGTUNCvizml_v |
| 7489 | UINT64_C(11673471521388494848), // VGTUNCvrr |
| 7490 | UINT64_C(11673471521388494848), // VGTUNCvrrL |
| 7491 | UINT64_C(11673471521388494848), // VGTUNCvrrL_v |
| 7492 | UINT64_C(11673471521388494848), // VGTUNCvrr_v |
| 7493 | UINT64_C(11673471521388494848), // VGTUNCvrrl |
| 7494 | UINT64_C(11673471521388494848), // VGTUNCvrrl_v |
| 7495 | UINT64_C(11673471521388494848), // VGTUNCvrrm |
| 7496 | UINT64_C(11673471521388494848), // VGTUNCvrrmL |
| 7497 | UINT64_C(11673471521388494848), // VGTUNCvrrmL_v |
| 7498 | UINT64_C(11673471521388494848), // VGTUNCvrrm_v |
| 7499 | UINT64_C(11673471521388494848), // VGTUNCvrrml |
| 7500 | UINT64_C(11673471521388494848), // VGTUNCvrrml_v |
| 7501 | UINT64_C(11673470971632680960), // VGTUNCvrz |
| 7502 | UINT64_C(11673470971632680960), // VGTUNCvrzL |
| 7503 | UINT64_C(11673470971632680960), // VGTUNCvrzL_v |
| 7504 | UINT64_C(11673470971632680960), // VGTUNCvrz_v |
| 7505 | UINT64_C(11673470971632680960), // VGTUNCvrzl |
| 7506 | UINT64_C(11673470971632680960), // VGTUNCvrzl_v |
| 7507 | UINT64_C(11673470971632680960), // VGTUNCvrzm |
| 7508 | UINT64_C(11673470971632680960), // VGTUNCvrzmL |
| 7509 | UINT64_C(11673470971632680960), // VGTUNCvrzmL_v |
| 7510 | UINT64_C(11673470971632680960), // VGTUNCvrzm_v |
| 7511 | UINT64_C(11673470971632680960), // VGTUNCvrzml |
| 7512 | UINT64_C(11673470971632680960), // VGTUNCvrzml_v |
| 7513 | UINT64_C(11700352381664362496), // VGTUsir |
| 7514 | UINT64_C(11700352381664362496), // VGTUsirL |
| 7515 | UINT64_C(11700352381664362496), // VGTUsirL_v |
| 7516 | UINT64_C(11700352381664362496), // VGTUsir_v |
| 7517 | UINT64_C(11700352381664362496), // VGTUsirl |
| 7518 | UINT64_C(11700352381664362496), // VGTUsirl_v |
| 7519 | UINT64_C(11700352381664362496), // VGTUsirm |
| 7520 | UINT64_C(11700352381664362496), // VGTUsirmL |
| 7521 | UINT64_C(11700352381664362496), // VGTUsirmL_v |
| 7522 | UINT64_C(11700352381664362496), // VGTUsirm_v |
| 7523 | UINT64_C(11700352381664362496), // VGTUsirml |
| 7524 | UINT64_C(11700352381664362496), // VGTUsirml_v |
| 7525 | UINT64_C(11700351831908548608), // VGTUsiz |
| 7526 | UINT64_C(11700351831908548608), // VGTUsizL |
| 7527 | UINT64_C(11700351831908548608), // VGTUsizL_v |
| 7528 | UINT64_C(11700351831908548608), // VGTUsiz_v |
| 7529 | UINT64_C(11700351831908548608), // VGTUsizl |
| 7530 | UINT64_C(11700351831908548608), // VGTUsizl_v |
| 7531 | UINT64_C(11700351831908548608), // VGTUsizm |
| 7532 | UINT64_C(11700351831908548608), // VGTUsizmL |
| 7533 | UINT64_C(11700351831908548608), // VGTUsizmL_v |
| 7534 | UINT64_C(11700351831908548608), // VGTUsizm_v |
| 7535 | UINT64_C(11700351831908548608), // VGTUsizml |
| 7536 | UINT64_C(11700351831908548608), // VGTUsizml_v |
| 7537 | UINT64_C(11700493119152717824), // VGTUsrr |
| 7538 | UINT64_C(11700493119152717824), // VGTUsrrL |
| 7539 | UINT64_C(11700493119152717824), // VGTUsrrL_v |
| 7540 | UINT64_C(11700493119152717824), // VGTUsrr_v |
| 7541 | UINT64_C(11700493119152717824), // VGTUsrrl |
| 7542 | UINT64_C(11700493119152717824), // VGTUsrrl_v |
| 7543 | UINT64_C(11700493119152717824), // VGTUsrrm |
| 7544 | UINT64_C(11700493119152717824), // VGTUsrrmL |
| 7545 | UINT64_C(11700493119152717824), // VGTUsrrmL_v |
| 7546 | UINT64_C(11700493119152717824), // VGTUsrrm_v |
| 7547 | UINT64_C(11700493119152717824), // VGTUsrrml |
| 7548 | UINT64_C(11700493119152717824), // VGTUsrrml_v |
| 7549 | UINT64_C(11700492569396903936), // VGTUsrz |
| 7550 | UINT64_C(11700492569396903936), // VGTUsrzL |
| 7551 | UINT64_C(11700492569396903936), // VGTUsrzL_v |
| 7552 | UINT64_C(11700492569396903936), // VGTUsrz_v |
| 7553 | UINT64_C(11700492569396903936), // VGTUsrzl |
| 7554 | UINT64_C(11700492569396903936), // VGTUsrzl_v |
| 7555 | UINT64_C(11700492569396903936), // VGTUsrzm |
| 7556 | UINT64_C(11700492569396903936), // VGTUsrzmL |
| 7557 | UINT64_C(11700492569396903936), // VGTUsrzmL_v |
| 7558 | UINT64_C(11700492569396903936), // VGTUsrzm_v |
| 7559 | UINT64_C(11700492569396903936), // VGTUsrzml |
| 7560 | UINT64_C(11700492569396903936), // VGTUsrzml_v |
| 7561 | UINT64_C(11691345182409621504), // VGTUvir |
| 7562 | UINT64_C(11691345182409621504), // VGTUvirL |
| 7563 | UINT64_C(11691345182409621504), // VGTUvirL_v |
| 7564 | UINT64_C(11691345182409621504), // VGTUvir_v |
| 7565 | UINT64_C(11691345182409621504), // VGTUvirl |
| 7566 | UINT64_C(11691345182409621504), // VGTUvirl_v |
| 7567 | UINT64_C(11691345182409621504), // VGTUvirm |
| 7568 | UINT64_C(11691345182409621504), // VGTUvirmL |
| 7569 | UINT64_C(11691345182409621504), // VGTUvirmL_v |
| 7570 | UINT64_C(11691345182409621504), // VGTUvirm_v |
| 7571 | UINT64_C(11691345182409621504), // VGTUvirml |
| 7572 | UINT64_C(11691345182409621504), // VGTUvirml_v |
| 7573 | UINT64_C(11691344632653807616), // VGTUviz |
| 7574 | UINT64_C(11691344632653807616), // VGTUvizL |
| 7575 | UINT64_C(11691344632653807616), // VGTUvizL_v |
| 7576 | UINT64_C(11691344632653807616), // VGTUviz_v |
| 7577 | UINT64_C(11691344632653807616), // VGTUvizl |
| 7578 | UINT64_C(11691344632653807616), // VGTUvizl_v |
| 7579 | UINT64_C(11691344632653807616), // VGTUvizm |
| 7580 | UINT64_C(11691344632653807616), // VGTUvizmL |
| 7581 | UINT64_C(11691344632653807616), // VGTUvizmL_v |
| 7582 | UINT64_C(11691344632653807616), // VGTUvizm_v |
| 7583 | UINT64_C(11691344632653807616), // VGTUvizml |
| 7584 | UINT64_C(11691344632653807616), // VGTUvizml_v |
| 7585 | UINT64_C(11691485919897976832), // VGTUvrr |
| 7586 | UINT64_C(11691485919897976832), // VGTUvrrL |
| 7587 | UINT64_C(11691485919897976832), // VGTUvrrL_v |
| 7588 | UINT64_C(11691485919897976832), // VGTUvrr_v |
| 7589 | UINT64_C(11691485919897976832), // VGTUvrrl |
| 7590 | UINT64_C(11691485919897976832), // VGTUvrrl_v |
| 7591 | UINT64_C(11691485919897976832), // VGTUvrrm |
| 7592 | UINT64_C(11691485919897976832), // VGTUvrrmL |
| 7593 | UINT64_C(11691485919897976832), // VGTUvrrmL_v |
| 7594 | UINT64_C(11691485919897976832), // VGTUvrrm_v |
| 7595 | UINT64_C(11691485919897976832), // VGTUvrrml |
| 7596 | UINT64_C(11691485919897976832), // VGTUvrrml_v |
| 7597 | UINT64_C(11691485370142162944), // VGTUvrz |
| 7598 | UINT64_C(11691485370142162944), // VGTUvrzL |
| 7599 | UINT64_C(11691485370142162944), // VGTUvrzL_v |
| 7600 | UINT64_C(11691485370142162944), // VGTUvrz_v |
| 7601 | UINT64_C(11691485370142162944), // VGTUvrzl |
| 7602 | UINT64_C(11691485370142162944), // VGTUvrzl_v |
| 7603 | UINT64_C(11691485370142162944), // VGTUvrzm |
| 7604 | UINT64_C(11691485370142162944), // VGTUvrzmL |
| 7605 | UINT64_C(11691485370142162944), // VGTUvrzmL_v |
| 7606 | UINT64_C(11691485370142162944), // VGTUvrzm_v |
| 7607 | UINT64_C(11691485370142162944), // VGTUvrzml |
| 7608 | UINT64_C(11691485370142162944), // VGTUvrzml_v |
| 7609 | UINT64_C(11628294787626434560), // VGTsir |
| 7610 | UINT64_C(11628294787626434560), // VGTsirL |
| 7611 | UINT64_C(11628294787626434560), // VGTsirL_v |
| 7612 | UINT64_C(11628294787626434560), // VGTsir_v |
| 7613 | UINT64_C(11628294787626434560), // VGTsirl |
| 7614 | UINT64_C(11628294787626434560), // VGTsirl_v |
| 7615 | UINT64_C(11628294787626434560), // VGTsirm |
| 7616 | UINT64_C(11628294787626434560), // VGTsirmL |
| 7617 | UINT64_C(11628294787626434560), // VGTsirmL_v |
| 7618 | UINT64_C(11628294787626434560), // VGTsirm_v |
| 7619 | UINT64_C(11628294787626434560), // VGTsirml |
| 7620 | UINT64_C(11628294787626434560), // VGTsirml_v |
| 7621 | UINT64_C(11628294237870620672), // VGTsiz |
| 7622 | UINT64_C(11628294237870620672), // VGTsizL |
| 7623 | UINT64_C(11628294237870620672), // VGTsizL_v |
| 7624 | UINT64_C(11628294237870620672), // VGTsiz_v |
| 7625 | UINT64_C(11628294237870620672), // VGTsizl |
| 7626 | UINT64_C(11628294237870620672), // VGTsizl_v |
| 7627 | UINT64_C(11628294237870620672), // VGTsizm |
| 7628 | UINT64_C(11628294237870620672), // VGTsizmL |
| 7629 | UINT64_C(11628294237870620672), // VGTsizmL_v |
| 7630 | UINT64_C(11628294237870620672), // VGTsizm_v |
| 7631 | UINT64_C(11628294237870620672), // VGTsizml |
| 7632 | UINT64_C(11628294237870620672), // VGTsizml_v |
| 7633 | UINT64_C(11628435525114789888), // VGTsrr |
| 7634 | UINT64_C(11628435525114789888), // VGTsrrL |
| 7635 | UINT64_C(11628435525114789888), // VGTsrrL_v |
| 7636 | UINT64_C(11628435525114789888), // VGTsrr_v |
| 7637 | UINT64_C(11628435525114789888), // VGTsrrl |
| 7638 | UINT64_C(11628435525114789888), // VGTsrrl_v |
| 7639 | UINT64_C(11628435525114789888), // VGTsrrm |
| 7640 | UINT64_C(11628435525114789888), // VGTsrrmL |
| 7641 | UINT64_C(11628435525114789888), // VGTsrrmL_v |
| 7642 | UINT64_C(11628435525114789888), // VGTsrrm_v |
| 7643 | UINT64_C(11628435525114789888), // VGTsrrml |
| 7644 | UINT64_C(11628435525114789888), // VGTsrrml_v |
| 7645 | UINT64_C(11628434975358976000), // VGTsrz |
| 7646 | UINT64_C(11628434975358976000), // VGTsrzL |
| 7647 | UINT64_C(11628434975358976000), // VGTsrzL_v |
| 7648 | UINT64_C(11628434975358976000), // VGTsrz_v |
| 7649 | UINT64_C(11628434975358976000), // VGTsrzl |
| 7650 | UINT64_C(11628434975358976000), // VGTsrzl_v |
| 7651 | UINT64_C(11628434975358976000), // VGTsrzm |
| 7652 | UINT64_C(11628434975358976000), // VGTsrzmL |
| 7653 | UINT64_C(11628434975358976000), // VGTsrzmL_v |
| 7654 | UINT64_C(11628434975358976000), // VGTsrzm_v |
| 7655 | UINT64_C(11628434975358976000), // VGTsrzml |
| 7656 | UINT64_C(11628434975358976000), // VGTsrzml_v |
| 7657 | UINT64_C(11619287588371693568), // VGTvir |
| 7658 | UINT64_C(11619287588371693568), // VGTvirL |
| 7659 | UINT64_C(11619287588371693568), // VGTvirL_v |
| 7660 | UINT64_C(11619287588371693568), // VGTvir_v |
| 7661 | UINT64_C(11619287588371693568), // VGTvirl |
| 7662 | UINT64_C(11619287588371693568), // VGTvirl_v |
| 7663 | UINT64_C(11619287588371693568), // VGTvirm |
| 7664 | UINT64_C(11619287588371693568), // VGTvirmL |
| 7665 | UINT64_C(11619287588371693568), // VGTvirmL_v |
| 7666 | UINT64_C(11619287588371693568), // VGTvirm_v |
| 7667 | UINT64_C(11619287588371693568), // VGTvirml |
| 7668 | UINT64_C(11619287588371693568), // VGTvirml_v |
| 7669 | UINT64_C(11619287038615879680), // VGTviz |
| 7670 | UINT64_C(11619287038615879680), // VGTvizL |
| 7671 | UINT64_C(11619287038615879680), // VGTvizL_v |
| 7672 | UINT64_C(11619287038615879680), // VGTviz_v |
| 7673 | UINT64_C(11619287038615879680), // VGTvizl |
| 7674 | UINT64_C(11619287038615879680), // VGTvizl_v |
| 7675 | UINT64_C(11619287038615879680), // VGTvizm |
| 7676 | UINT64_C(11619287038615879680), // VGTvizmL |
| 7677 | UINT64_C(11619287038615879680), // VGTvizmL_v |
| 7678 | UINT64_C(11619287038615879680), // VGTvizm_v |
| 7679 | UINT64_C(11619287038615879680), // VGTvizml |
| 7680 | UINT64_C(11619287038615879680), // VGTvizml_v |
| 7681 | UINT64_C(11619428325860048896), // VGTvrr |
| 7682 | UINT64_C(11619428325860048896), // VGTvrrL |
| 7683 | UINT64_C(11619428325860048896), // VGTvrrL_v |
| 7684 | UINT64_C(11619428325860048896), // VGTvrr_v |
| 7685 | UINT64_C(11619428325860048896), // VGTvrrl |
| 7686 | UINT64_C(11619428325860048896), // VGTvrrl_v |
| 7687 | UINT64_C(11619428325860048896), // VGTvrrm |
| 7688 | UINT64_C(11619428325860048896), // VGTvrrmL |
| 7689 | UINT64_C(11619428325860048896), // VGTvrrmL_v |
| 7690 | UINT64_C(11619428325860048896), // VGTvrrm_v |
| 7691 | UINT64_C(11619428325860048896), // VGTvrrml |
| 7692 | UINT64_C(11619428325860048896), // VGTvrrml_v |
| 7693 | UINT64_C(11619427776104235008), // VGTvrz |
| 7694 | UINT64_C(11619427776104235008), // VGTvrzL |
| 7695 | UINT64_C(11619427776104235008), // VGTvrzL_v |
| 7696 | UINT64_C(11619427776104235008), // VGTvrz_v |
| 7697 | UINT64_C(11619427776104235008), // VGTvrzl |
| 7698 | UINT64_C(11619427776104235008), // VGTvrzl_v |
| 7699 | UINT64_C(11619427776104235008), // VGTvrzm |
| 7700 | UINT64_C(11619427776104235008), // VGTvrzmL |
| 7701 | UINT64_C(11619427776104235008), // VGTvrzmL_v |
| 7702 | UINT64_C(11619427776104235008), // VGTvrzm_v |
| 7703 | UINT64_C(11619427776104235008), // VGTvrzml |
| 7704 | UINT64_C(11619427776104235008), // VGTvrzml_v |
| 7705 | UINT64_C(13907116199075905536), // VLD2DNCir |
| 7706 | UINT64_C(13907116199075905536), // VLD2DNCirL |
| 7707 | UINT64_C(13907116199075905536), // VLD2DNCirL_v |
| 7708 | UINT64_C(13907116199075905536), // VLD2DNCir_v |
| 7709 | UINT64_C(13907116199075905536), // VLD2DNCirl |
| 7710 | UINT64_C(13907116199075905536), // VLD2DNCirl_v |
| 7711 | UINT64_C(13907115649320091648), // VLD2DNCiz |
| 7712 | UINT64_C(13907115649320091648), // VLD2DNCizL |
| 7713 | UINT64_C(13907115649320091648), // VLD2DNCizL_v |
| 7714 | UINT64_C(13907115649320091648), // VLD2DNCiz_v |
| 7715 | UINT64_C(13907115649320091648), // VLD2DNCizl |
| 7716 | UINT64_C(13907115649320091648), // VLD2DNCizl_v |
| 7717 | UINT64_C(13907256936564260864), // VLD2DNCrr |
| 7718 | UINT64_C(13907256936564260864), // VLD2DNCrrL |
| 7719 | UINT64_C(13907256936564260864), // VLD2DNCrrL_v |
| 7720 | UINT64_C(13907256936564260864), // VLD2DNCrr_v |
| 7721 | UINT64_C(13907256936564260864), // VLD2DNCrrl |
| 7722 | UINT64_C(13907256936564260864), // VLD2DNCrrl_v |
| 7723 | UINT64_C(13907256386808446976), // VLD2DNCrz |
| 7724 | UINT64_C(13907256386808446976), // VLD2DNCrzL |
| 7725 | UINT64_C(13907256386808446976), // VLD2DNCrzL_v |
| 7726 | UINT64_C(13907256386808446976), // VLD2DNCrz_v |
| 7727 | UINT64_C(13907256386808446976), // VLD2DNCrzl |
| 7728 | UINT64_C(13907256386808446976), // VLD2DNCrzl_v |
| 7729 | UINT64_C(13925130597585387520), // VLD2Dir |
| 7730 | UINT64_C(13925130597585387520), // VLD2DirL |
| 7731 | UINT64_C(13925130597585387520), // VLD2DirL_v |
| 7732 | UINT64_C(13925130597585387520), // VLD2Dir_v |
| 7733 | UINT64_C(13925130597585387520), // VLD2Dirl |
| 7734 | UINT64_C(13925130597585387520), // VLD2Dirl_v |
| 7735 | UINT64_C(13925130047829573632), // VLD2Diz |
| 7736 | UINT64_C(13925130047829573632), // VLD2DizL |
| 7737 | UINT64_C(13925130047829573632), // VLD2DizL_v |
| 7738 | UINT64_C(13925130047829573632), // VLD2Diz_v |
| 7739 | UINT64_C(13925130047829573632), // VLD2Dizl |
| 7740 | UINT64_C(13925130047829573632), // VLD2Dizl_v |
| 7741 | UINT64_C(13925271335073742848), // VLD2Drr |
| 7742 | UINT64_C(13925271335073742848), // VLD2DrrL |
| 7743 | UINT64_C(13925271335073742848), // VLD2DrrL_v |
| 7744 | UINT64_C(13925271335073742848), // VLD2Drr_v |
| 7745 | UINT64_C(13925271335073742848), // VLD2Drrl |
| 7746 | UINT64_C(13925271335073742848), // VLD2Drrl_v |
| 7747 | UINT64_C(13925270785317928960), // VLD2Drz |
| 7748 | UINT64_C(13925270785317928960), // VLD2DrzL |
| 7749 | UINT64_C(13925270785317928960), // VLD2DrzL_v |
| 7750 | UINT64_C(13925270785317928960), // VLD2Drz_v |
| 7751 | UINT64_C(13925270785317928960), // VLD2Drzl |
| 7752 | UINT64_C(13925270785317928960), // VLD2Drzl_v |
| 7753 | UINT64_C(14051231387151761408), // VLDL2DSXNCir |
| 7754 | UINT64_C(14051231387151761408), // VLDL2DSXNCirL |
| 7755 | UINT64_C(14051231387151761408), // VLDL2DSXNCirL_v |
| 7756 | UINT64_C(14051231387151761408), // VLDL2DSXNCir_v |
| 7757 | UINT64_C(14051231387151761408), // VLDL2DSXNCirl |
| 7758 | UINT64_C(14051231387151761408), // VLDL2DSXNCirl_v |
| 7759 | UINT64_C(14051230837395947520), // VLDL2DSXNCiz |
| 7760 | UINT64_C(14051230837395947520), // VLDL2DSXNCizL |
| 7761 | UINT64_C(14051230837395947520), // VLDL2DSXNCizL_v |
| 7762 | UINT64_C(14051230837395947520), // VLDL2DSXNCiz_v |
| 7763 | UINT64_C(14051230837395947520), // VLDL2DSXNCizl |
| 7764 | UINT64_C(14051230837395947520), // VLDL2DSXNCizl_v |
| 7765 | UINT64_C(14051372124640116736), // VLDL2DSXNCrr |
| 7766 | UINT64_C(14051372124640116736), // VLDL2DSXNCrrL |
| 7767 | UINT64_C(14051372124640116736), // VLDL2DSXNCrrL_v |
| 7768 | UINT64_C(14051372124640116736), // VLDL2DSXNCrr_v |
| 7769 | UINT64_C(14051372124640116736), // VLDL2DSXNCrrl |
| 7770 | UINT64_C(14051372124640116736), // VLDL2DSXNCrrl_v |
| 7771 | UINT64_C(14051371574884302848), // VLDL2DSXNCrz |
| 7772 | UINT64_C(14051371574884302848), // VLDL2DSXNCrzL |
| 7773 | UINT64_C(14051371574884302848), // VLDL2DSXNCrzL_v |
| 7774 | UINT64_C(14051371574884302848), // VLDL2DSXNCrz_v |
| 7775 | UINT64_C(14051371574884302848), // VLDL2DSXNCrzl |
| 7776 | UINT64_C(14051371574884302848), // VLDL2DSXNCrzl_v |
| 7777 | UINT64_C(14069245785661243392), // VLDL2DSXir |
| 7778 | UINT64_C(14069245785661243392), // VLDL2DSXirL |
| 7779 | UINT64_C(14069245785661243392), // VLDL2DSXirL_v |
| 7780 | UINT64_C(14069245785661243392), // VLDL2DSXir_v |
| 7781 | UINT64_C(14069245785661243392), // VLDL2DSXirl |
| 7782 | UINT64_C(14069245785661243392), // VLDL2DSXirl_v |
| 7783 | UINT64_C(14069245235905429504), // VLDL2DSXiz |
| 7784 | UINT64_C(14069245235905429504), // VLDL2DSXizL |
| 7785 | UINT64_C(14069245235905429504), // VLDL2DSXizL_v |
| 7786 | UINT64_C(14069245235905429504), // VLDL2DSXiz_v |
| 7787 | UINT64_C(14069245235905429504), // VLDL2DSXizl |
| 7788 | UINT64_C(14069245235905429504), // VLDL2DSXizl_v |
| 7789 | UINT64_C(14069386523149598720), // VLDL2DSXrr |
| 7790 | UINT64_C(14069386523149598720), // VLDL2DSXrrL |
| 7791 | UINT64_C(14069386523149598720), // VLDL2DSXrrL_v |
| 7792 | UINT64_C(14069386523149598720), // VLDL2DSXrr_v |
| 7793 | UINT64_C(14069386523149598720), // VLDL2DSXrrl |
| 7794 | UINT64_C(14069386523149598720), // VLDL2DSXrrl_v |
| 7795 | UINT64_C(14069385973393784832), // VLDL2DSXrz |
| 7796 | UINT64_C(14069385973393784832), // VLDL2DSXrzL |
| 7797 | UINT64_C(14069385973393784832), // VLDL2DSXrzL_v |
| 7798 | UINT64_C(14069385973393784832), // VLDL2DSXrz_v |
| 7799 | UINT64_C(14069385973393784832), // VLDL2DSXrzl |
| 7800 | UINT64_C(14069385973393784832), // VLDL2DSXrzl_v |
| 7801 | UINT64_C(14087260184170725376), // VLDL2DZXNCir |
| 7802 | UINT64_C(14087260184170725376), // VLDL2DZXNCirL |
| 7803 | UINT64_C(14087260184170725376), // VLDL2DZXNCirL_v |
| 7804 | UINT64_C(14087260184170725376), // VLDL2DZXNCir_v |
| 7805 | UINT64_C(14087260184170725376), // VLDL2DZXNCirl |
| 7806 | UINT64_C(14087260184170725376), // VLDL2DZXNCirl_v |
| 7807 | UINT64_C(14087259634414911488), // VLDL2DZXNCiz |
| 7808 | UINT64_C(14087259634414911488), // VLDL2DZXNCizL |
| 7809 | UINT64_C(14087259634414911488), // VLDL2DZXNCizL_v |
| 7810 | UINT64_C(14087259634414911488), // VLDL2DZXNCiz_v |
| 7811 | UINT64_C(14087259634414911488), // VLDL2DZXNCizl |
| 7812 | UINT64_C(14087259634414911488), // VLDL2DZXNCizl_v |
| 7813 | UINT64_C(14087400921659080704), // VLDL2DZXNCrr |
| 7814 | UINT64_C(14087400921659080704), // VLDL2DZXNCrrL |
| 7815 | UINT64_C(14087400921659080704), // VLDL2DZXNCrrL_v |
| 7816 | UINT64_C(14087400921659080704), // VLDL2DZXNCrr_v |
| 7817 | UINT64_C(14087400921659080704), // VLDL2DZXNCrrl |
| 7818 | UINT64_C(14087400921659080704), // VLDL2DZXNCrrl_v |
| 7819 | UINT64_C(14087400371903266816), // VLDL2DZXNCrz |
| 7820 | UINT64_C(14087400371903266816), // VLDL2DZXNCrzL |
| 7821 | UINT64_C(14087400371903266816), // VLDL2DZXNCrzL_v |
| 7822 | UINT64_C(14087400371903266816), // VLDL2DZXNCrz_v |
| 7823 | UINT64_C(14087400371903266816), // VLDL2DZXNCrzl |
| 7824 | UINT64_C(14087400371903266816), // VLDL2DZXNCrzl_v |
| 7825 | UINT64_C(14105274582680207360), // VLDL2DZXir |
| 7826 | UINT64_C(14105274582680207360), // VLDL2DZXirL |
| 7827 | UINT64_C(14105274582680207360), // VLDL2DZXirL_v |
| 7828 | UINT64_C(14105274582680207360), // VLDL2DZXir_v |
| 7829 | UINT64_C(14105274582680207360), // VLDL2DZXirl |
| 7830 | UINT64_C(14105274582680207360), // VLDL2DZXirl_v |
| 7831 | UINT64_C(14105274032924393472), // VLDL2DZXiz |
| 7832 | UINT64_C(14105274032924393472), // VLDL2DZXizL |
| 7833 | UINT64_C(14105274032924393472), // VLDL2DZXizL_v |
| 7834 | UINT64_C(14105274032924393472), // VLDL2DZXiz_v |
| 7835 | UINT64_C(14105274032924393472), // VLDL2DZXizl |
| 7836 | UINT64_C(14105274032924393472), // VLDL2DZXizl_v |
| 7837 | UINT64_C(14105415320168562688), // VLDL2DZXrr |
| 7838 | UINT64_C(14105415320168562688), // VLDL2DZXrrL |
| 7839 | UINT64_C(14105415320168562688), // VLDL2DZXrrL_v |
| 7840 | UINT64_C(14105415320168562688), // VLDL2DZXrr_v |
| 7841 | UINT64_C(14105415320168562688), // VLDL2DZXrrl |
| 7842 | UINT64_C(14105415320168562688), // VLDL2DZXrrl_v |
| 7843 | UINT64_C(14105414770412748800), // VLDL2DZXrz |
| 7844 | UINT64_C(14105414770412748800), // VLDL2DZXrzL |
| 7845 | UINT64_C(14105414770412748800), // VLDL2DZXrzL_v |
| 7846 | UINT64_C(14105414770412748800), // VLDL2DZXrz_v |
| 7847 | UINT64_C(14105414770412748800), // VLDL2DZXrzl |
| 7848 | UINT64_C(14105414770412748800), // VLDL2DZXrzl_v |
| 7849 | UINT64_C(9439545368724373504), // VLDLSXNCir |
| 7850 | UINT64_C(9439545368724373504), // VLDLSXNCirL |
| 7851 | UINT64_C(9439545368724373504), // VLDLSXNCirL_v |
| 7852 | UINT64_C(9439545368724373504), // VLDLSXNCir_v |
| 7853 | UINT64_C(9439545368724373504), // VLDLSXNCirl |
| 7854 | UINT64_C(9439545368724373504), // VLDLSXNCirl_v |
| 7855 | UINT64_C(9439544818968559616), // VLDLSXNCiz |
| 7856 | UINT64_C(9439544818968559616), // VLDLSXNCizL |
| 7857 | UINT64_C(9439544818968559616), // VLDLSXNCizL_v |
| 7858 | UINT64_C(9439544818968559616), // VLDLSXNCiz_v |
| 7859 | UINT64_C(9439544818968559616), // VLDLSXNCizl |
| 7860 | UINT64_C(9439544818968559616), // VLDLSXNCizl_v |
| 7861 | UINT64_C(9439686106212728832), // VLDLSXNCrr |
| 7862 | UINT64_C(9439686106212728832), // VLDLSXNCrrL |
| 7863 | UINT64_C(9439686106212728832), // VLDLSXNCrrL_v |
| 7864 | UINT64_C(9439686106212728832), // VLDLSXNCrr_v |
| 7865 | UINT64_C(9439686106212728832), // VLDLSXNCrrl |
| 7866 | UINT64_C(9439686106212728832), // VLDLSXNCrrl_v |
| 7867 | UINT64_C(9439685556456914944), // VLDLSXNCrz |
| 7868 | UINT64_C(9439685556456914944), // VLDLSXNCrzL |
| 7869 | UINT64_C(9439685556456914944), // VLDLSXNCrzL_v |
| 7870 | UINT64_C(9439685556456914944), // VLDLSXNCrz_v |
| 7871 | UINT64_C(9439685556456914944), // VLDLSXNCrzl |
| 7872 | UINT64_C(9439685556456914944), // VLDLSXNCrzl_v |
| 7873 | UINT64_C(9457559767233855488), // VLDLSXir |
| 7874 | UINT64_C(9457559767233855488), // VLDLSXirL |
| 7875 | UINT64_C(9457559767233855488), // VLDLSXirL_v |
| 7876 | UINT64_C(9457559767233855488), // VLDLSXir_v |
| 7877 | UINT64_C(9457559767233855488), // VLDLSXirl |
| 7878 | UINT64_C(9457559767233855488), // VLDLSXirl_v |
| 7879 | UINT64_C(9457559217478041600), // VLDLSXiz |
| 7880 | UINT64_C(9457559217478041600), // VLDLSXizL |
| 7881 | UINT64_C(9457559217478041600), // VLDLSXizL_v |
| 7882 | UINT64_C(9457559217478041600), // VLDLSXiz_v |
| 7883 | UINT64_C(9457559217478041600), // VLDLSXizl |
| 7884 | UINT64_C(9457559217478041600), // VLDLSXizl_v |
| 7885 | UINT64_C(9457700504722210816), // VLDLSXrr |
| 7886 | UINT64_C(9457700504722210816), // VLDLSXrrL |
| 7887 | UINT64_C(9457700504722210816), // VLDLSXrrL_v |
| 7888 | UINT64_C(9457700504722210816), // VLDLSXrr_v |
| 7889 | UINT64_C(9457700504722210816), // VLDLSXrrl |
| 7890 | UINT64_C(9457700504722210816), // VLDLSXrrl_v |
| 7891 | UINT64_C(9457699954966396928), // VLDLSXrz |
| 7892 | UINT64_C(9457699954966396928), // VLDLSXrzL |
| 7893 | UINT64_C(9457699954966396928), // VLDLSXrzL_v |
| 7894 | UINT64_C(9457699954966396928), // VLDLSXrz_v |
| 7895 | UINT64_C(9457699954966396928), // VLDLSXrzl |
| 7896 | UINT64_C(9457699954966396928), // VLDLSXrzl_v |
| 7897 | UINT64_C(9475574165743337472), // VLDLZXNCir |
| 7898 | UINT64_C(9475574165743337472), // VLDLZXNCirL |
| 7899 | UINT64_C(9475574165743337472), // VLDLZXNCirL_v |
| 7900 | UINT64_C(9475574165743337472), // VLDLZXNCir_v |
| 7901 | UINT64_C(9475574165743337472), // VLDLZXNCirl |
| 7902 | UINT64_C(9475574165743337472), // VLDLZXNCirl_v |
| 7903 | UINT64_C(9475573615987523584), // VLDLZXNCiz |
| 7904 | UINT64_C(9475573615987523584), // VLDLZXNCizL |
| 7905 | UINT64_C(9475573615987523584), // VLDLZXNCizL_v |
| 7906 | UINT64_C(9475573615987523584), // VLDLZXNCiz_v |
| 7907 | UINT64_C(9475573615987523584), // VLDLZXNCizl |
| 7908 | UINT64_C(9475573615987523584), // VLDLZXNCizl_v |
| 7909 | UINT64_C(9475714903231692800), // VLDLZXNCrr |
| 7910 | UINT64_C(9475714903231692800), // VLDLZXNCrrL |
| 7911 | UINT64_C(9475714903231692800), // VLDLZXNCrrL_v |
| 7912 | UINT64_C(9475714903231692800), // VLDLZXNCrr_v |
| 7913 | UINT64_C(9475714903231692800), // VLDLZXNCrrl |
| 7914 | UINT64_C(9475714903231692800), // VLDLZXNCrrl_v |
| 7915 | UINT64_C(9475714353475878912), // VLDLZXNCrz |
| 7916 | UINT64_C(9475714353475878912), // VLDLZXNCrzL |
| 7917 | UINT64_C(9475714353475878912), // VLDLZXNCrzL_v |
| 7918 | UINT64_C(9475714353475878912), // VLDLZXNCrz_v |
| 7919 | UINT64_C(9475714353475878912), // VLDLZXNCrzl |
| 7920 | UINT64_C(9475714353475878912), // VLDLZXNCrzl_v |
| 7921 | UINT64_C(9493588564252819456), // VLDLZXir |
| 7922 | UINT64_C(9493588564252819456), // VLDLZXirL |
| 7923 | UINT64_C(9493588564252819456), // VLDLZXirL_v |
| 7924 | UINT64_C(9493588564252819456), // VLDLZXir_v |
| 7925 | UINT64_C(9493588564252819456), // VLDLZXirl |
| 7926 | UINT64_C(9493588564252819456), // VLDLZXirl_v |
| 7927 | UINT64_C(9493588014497005568), // VLDLZXiz |
| 7928 | UINT64_C(9493588014497005568), // VLDLZXizL |
| 7929 | UINT64_C(9493588014497005568), // VLDLZXizL_v |
| 7930 | UINT64_C(9493588014497005568), // VLDLZXiz_v |
| 7931 | UINT64_C(9493588014497005568), // VLDLZXizl |
| 7932 | UINT64_C(9493588014497005568), // VLDLZXizl_v |
| 7933 | UINT64_C(9493729301741174784), // VLDLZXrr |
| 7934 | UINT64_C(9493729301741174784), // VLDLZXrrL |
| 7935 | UINT64_C(9493729301741174784), // VLDLZXrrL_v |
| 7936 | UINT64_C(9493729301741174784), // VLDLZXrr_v |
| 7937 | UINT64_C(9493729301741174784), // VLDLZXrrl |
| 7938 | UINT64_C(9493729301741174784), // VLDLZXrrl_v |
| 7939 | UINT64_C(9493728751985360896), // VLDLZXrz |
| 7940 | UINT64_C(9493728751985360896), // VLDLZXrzL |
| 7941 | UINT64_C(9493728751985360896), // VLDLZXrzL_v |
| 7942 | UINT64_C(9493728751985360896), // VLDLZXrz_v |
| 7943 | UINT64_C(9493728751985360896), // VLDLZXrzl |
| 7944 | UINT64_C(9493728751985360896), // VLDLZXrzl_v |
| 7945 | UINT64_C(9295430180648517632), // VLDNCir |
| 7946 | UINT64_C(9295430180648517632), // VLDNCirL |
| 7947 | UINT64_C(9295430180648517632), // VLDNCirL_v |
| 7948 | UINT64_C(9295430180648517632), // VLDNCir_v |
| 7949 | UINT64_C(9295430180648517632), // VLDNCirl |
| 7950 | UINT64_C(9295430180648517632), // VLDNCirl_v |
| 7951 | UINT64_C(9295429630892703744), // VLDNCiz |
| 7952 | UINT64_C(9295429630892703744), // VLDNCizL |
| 7953 | UINT64_C(9295429630892703744), // VLDNCizL_v |
| 7954 | UINT64_C(9295429630892703744), // VLDNCiz_v |
| 7955 | UINT64_C(9295429630892703744), // VLDNCizl |
| 7956 | UINT64_C(9295429630892703744), // VLDNCizl_v |
| 7957 | UINT64_C(9295570918136872960), // VLDNCrr |
| 7958 | UINT64_C(9295570918136872960), // VLDNCrrL |
| 7959 | UINT64_C(9295570918136872960), // VLDNCrrL_v |
| 7960 | UINT64_C(9295570918136872960), // VLDNCrr_v |
| 7961 | UINT64_C(9295570918136872960), // VLDNCrrl |
| 7962 | UINT64_C(9295570918136872960), // VLDNCrrl_v |
| 7963 | UINT64_C(9295570368381059072), // VLDNCrz |
| 7964 | UINT64_C(9295570368381059072), // VLDNCrzL |
| 7965 | UINT64_C(9295570368381059072), // VLDNCrzL_v |
| 7966 | UINT64_C(9295570368381059072), // VLDNCrz_v |
| 7967 | UINT64_C(9295570368381059072), // VLDNCrzl |
| 7968 | UINT64_C(9295570368381059072), // VLDNCrzl_v |
| 7969 | UINT64_C(13979173793113833472), // VLDU2DNCir |
| 7970 | UINT64_C(13979173793113833472), // VLDU2DNCirL |
| 7971 | UINT64_C(13979173793113833472), // VLDU2DNCirL_v |
| 7972 | UINT64_C(13979173793113833472), // VLDU2DNCir_v |
| 7973 | UINT64_C(13979173793113833472), // VLDU2DNCirl |
| 7974 | UINT64_C(13979173793113833472), // VLDU2DNCirl_v |
| 7975 | UINT64_C(13979173243358019584), // VLDU2DNCiz |
| 7976 | UINT64_C(13979173243358019584), // VLDU2DNCizL |
| 7977 | UINT64_C(13979173243358019584), // VLDU2DNCizL_v |
| 7978 | UINT64_C(13979173243358019584), // VLDU2DNCiz_v |
| 7979 | UINT64_C(13979173243358019584), // VLDU2DNCizl |
| 7980 | UINT64_C(13979173243358019584), // VLDU2DNCizl_v |
| 7981 | UINT64_C(13979314530602188800), // VLDU2DNCrr |
| 7982 | UINT64_C(13979314530602188800), // VLDU2DNCrrL |
| 7983 | UINT64_C(13979314530602188800), // VLDU2DNCrrL_v |
| 7984 | UINT64_C(13979314530602188800), // VLDU2DNCrr_v |
| 7985 | UINT64_C(13979314530602188800), // VLDU2DNCrrl |
| 7986 | UINT64_C(13979314530602188800), // VLDU2DNCrrl_v |
| 7987 | UINT64_C(13979313980846374912), // VLDU2DNCrz |
| 7988 | UINT64_C(13979313980846374912), // VLDU2DNCrzL |
| 7989 | UINT64_C(13979313980846374912), // VLDU2DNCrzL_v |
| 7990 | UINT64_C(13979313980846374912), // VLDU2DNCrz_v |
| 7991 | UINT64_C(13979313980846374912), // VLDU2DNCrzl |
| 7992 | UINT64_C(13979313980846374912), // VLDU2DNCrzl_v |
| 7993 | UINT64_C(13997188191623315456), // VLDU2Dir |
| 7994 | UINT64_C(13997188191623315456), // VLDU2DirL |
| 7995 | UINT64_C(13997188191623315456), // VLDU2DirL_v |
| 7996 | UINT64_C(13997188191623315456), // VLDU2Dir_v |
| 7997 | UINT64_C(13997188191623315456), // VLDU2Dirl |
| 7998 | UINT64_C(13997188191623315456), // VLDU2Dirl_v |
| 7999 | UINT64_C(13997187641867501568), // VLDU2Diz |
| 8000 | UINT64_C(13997187641867501568), // VLDU2DizL |
| 8001 | UINT64_C(13997187641867501568), // VLDU2DizL_v |
| 8002 | UINT64_C(13997187641867501568), // VLDU2Diz_v |
| 8003 | UINT64_C(13997187641867501568), // VLDU2Dizl |
| 8004 | UINT64_C(13997187641867501568), // VLDU2Dizl_v |
| 8005 | UINT64_C(13997328929111670784), // VLDU2Drr |
| 8006 | UINT64_C(13997328929111670784), // VLDU2DrrL |
| 8007 | UINT64_C(13997328929111670784), // VLDU2DrrL_v |
| 8008 | UINT64_C(13997328929111670784), // VLDU2Drr_v |
| 8009 | UINT64_C(13997328929111670784), // VLDU2Drrl |
| 8010 | UINT64_C(13997328929111670784), // VLDU2Drrl_v |
| 8011 | UINT64_C(13997328379355856896), // VLDU2Drz |
| 8012 | UINT64_C(13997328379355856896), // VLDU2DrzL |
| 8013 | UINT64_C(13997328379355856896), // VLDU2DrzL_v |
| 8014 | UINT64_C(13997328379355856896), // VLDU2Drz_v |
| 8015 | UINT64_C(13997328379355856896), // VLDU2Drzl |
| 8016 | UINT64_C(13997328379355856896), // VLDU2Drzl_v |
| 8017 | UINT64_C(9367487774686445568), // VLDUNCir |
| 8018 | UINT64_C(9367487774686445568), // VLDUNCirL |
| 8019 | UINT64_C(9367487774686445568), // VLDUNCirL_v |
| 8020 | UINT64_C(9367487774686445568), // VLDUNCir_v |
| 8021 | UINT64_C(9367487774686445568), // VLDUNCirl |
| 8022 | UINT64_C(9367487774686445568), // VLDUNCirl_v |
| 8023 | UINT64_C(9367487224930631680), // VLDUNCiz |
| 8024 | UINT64_C(9367487224930631680), // VLDUNCizL |
| 8025 | UINT64_C(9367487224930631680), // VLDUNCizL_v |
| 8026 | UINT64_C(9367487224930631680), // VLDUNCiz_v |
| 8027 | UINT64_C(9367487224930631680), // VLDUNCizl |
| 8028 | UINT64_C(9367487224930631680), // VLDUNCizl_v |
| 8029 | UINT64_C(9367628512174800896), // VLDUNCrr |
| 8030 | UINT64_C(9367628512174800896), // VLDUNCrrL |
| 8031 | UINT64_C(9367628512174800896), // VLDUNCrrL_v |
| 8032 | UINT64_C(9367628512174800896), // VLDUNCrr_v |
| 8033 | UINT64_C(9367628512174800896), // VLDUNCrrl |
| 8034 | UINT64_C(9367628512174800896), // VLDUNCrrl_v |
| 8035 | UINT64_C(9367627962418987008), // VLDUNCrz |
| 8036 | UINT64_C(9367627962418987008), // VLDUNCrzL |
| 8037 | UINT64_C(9367627962418987008), // VLDUNCrzL_v |
| 8038 | UINT64_C(9367627962418987008), // VLDUNCrz_v |
| 8039 | UINT64_C(9367627962418987008), // VLDUNCrzl |
| 8040 | UINT64_C(9367627962418987008), // VLDUNCrzl_v |
| 8041 | UINT64_C(9385502173195927552), // VLDUir |
| 8042 | UINT64_C(9385502173195927552), // VLDUirL |
| 8043 | UINT64_C(9385502173195927552), // VLDUirL_v |
| 8044 | UINT64_C(9385502173195927552), // VLDUir_v |
| 8045 | UINT64_C(9385502173195927552), // VLDUirl |
| 8046 | UINT64_C(9385502173195927552), // VLDUirl_v |
| 8047 | UINT64_C(9385501623440113664), // VLDUiz |
| 8048 | UINT64_C(9385501623440113664), // VLDUizL |
| 8049 | UINT64_C(9385501623440113664), // VLDUizL_v |
| 8050 | UINT64_C(9385501623440113664), // VLDUiz_v |
| 8051 | UINT64_C(9385501623440113664), // VLDUizl |
| 8052 | UINT64_C(9385501623440113664), // VLDUizl_v |
| 8053 | UINT64_C(9385642910684282880), // VLDUrr |
| 8054 | UINT64_C(9385642910684282880), // VLDUrrL |
| 8055 | UINT64_C(9385642910684282880), // VLDUrrL_v |
| 8056 | UINT64_C(9385642910684282880), // VLDUrr_v |
| 8057 | UINT64_C(9385642910684282880), // VLDUrrl |
| 8058 | UINT64_C(9385642910684282880), // VLDUrrl_v |
| 8059 | UINT64_C(9385642360928468992), // VLDUrz |
| 8060 | UINT64_C(9385642360928468992), // VLDUrzL |
| 8061 | UINT64_C(9385642360928468992), // VLDUrzL_v |
| 8062 | UINT64_C(9385642360928468992), // VLDUrz_v |
| 8063 | UINT64_C(9385642360928468992), // VLDUrzl |
| 8064 | UINT64_C(9385642360928468992), // VLDUrzl_v |
| 8065 | UINT64_C(16645304222761353216), // VLDZv |
| 8066 | UINT64_C(16645304222761353216), // VLDZvL |
| 8067 | UINT64_C(16645304222761353216), // VLDZvL_v |
| 8068 | UINT64_C(16645304222761353216), // VLDZv_v |
| 8069 | UINT64_C(16645304222761353216), // VLDZvl |
| 8070 | UINT64_C(16645304222761353216), // VLDZvl_v |
| 8071 | UINT64_C(16645304222761353216), // VLDZvm |
| 8072 | UINT64_C(16645304222761353216), // VLDZvmL |
| 8073 | UINT64_C(16645304222761353216), // VLDZvmL_v |
| 8074 | UINT64_C(16645304222761353216), // VLDZvm_v |
| 8075 | UINT64_C(16645304222761353216), // VLDZvml |
| 8076 | UINT64_C(16645304222761353216), // VLDZvml_v |
| 8077 | UINT64_C(9313444579157999616), // VLDir |
| 8078 | UINT64_C(9313444579157999616), // VLDirL |
| 8079 | UINT64_C(9313444579157999616), // VLDirL_v |
| 8080 | UINT64_C(9313444579157999616), // VLDir_v |
| 8081 | UINT64_C(9313444579157999616), // VLDirl |
| 8082 | UINT64_C(9313444579157999616), // VLDirl_v |
| 8083 | UINT64_C(9313444029402185728), // VLDiz |
| 8084 | UINT64_C(9313444029402185728), // VLDizL |
| 8085 | UINT64_C(9313444029402185728), // VLDizL_v |
| 8086 | UINT64_C(9313444029402185728), // VLDiz_v |
| 8087 | UINT64_C(9313444029402185728), // VLDizl |
| 8088 | UINT64_C(9313444029402185728), // VLDizl_v |
| 8089 | UINT64_C(9313585316646354944), // VLDrr |
| 8090 | UINT64_C(9313585316646354944), // VLDrrL |
| 8091 | UINT64_C(9313585316646354944), // VLDrrL_v |
| 8092 | UINT64_C(9313585316646354944), // VLDrr_v |
| 8093 | UINT64_C(9313585316646354944), // VLDrrl |
| 8094 | UINT64_C(9313585316646354944), // VLDrrl_v |
| 8095 | UINT64_C(9313584766890541056), // VLDrz |
| 8096 | UINT64_C(9313584766890541056), // VLDrzL |
| 8097 | UINT64_C(9313584766890541056), // VLDrzL_v |
| 8098 | UINT64_C(9313584766890541056), // VLDrz_v |
| 8099 | UINT64_C(9313584766890541056), // VLDrzl |
| 8100 | UINT64_C(9313584766890541056), // VLDrzl_v |
| 8101 | UINT64_C(11105876681095643136), // VMAXSLiv |
| 8102 | UINT64_C(11105876681095643136), // VMAXSLivL |
| 8103 | UINT64_C(11105876681095643136), // VMAXSLivL_v |
| 8104 | UINT64_C(11105876681095643136), // VMAXSLiv_v |
| 8105 | UINT64_C(11105876681095643136), // VMAXSLivl |
| 8106 | UINT64_C(11105876681095643136), // VMAXSLivl_v |
| 8107 | UINT64_C(11105876681095643136), // VMAXSLivm |
| 8108 | UINT64_C(11105876681095643136), // VMAXSLivmL |
| 8109 | UINT64_C(11105876681095643136), // VMAXSLivmL_v |
| 8110 | UINT64_C(11105876681095643136), // VMAXSLivm_v |
| 8111 | UINT64_C(11105876681095643136), // VMAXSLivml |
| 8112 | UINT64_C(11105876681095643136), // VMAXSLivml_v |
| 8113 | UINT64_C(11106017418583998464), // VMAXSLrv |
| 8114 | UINT64_C(11106017418583998464), // VMAXSLrvL |
| 8115 | UINT64_C(11106017418583998464), // VMAXSLrvL_v |
| 8116 | UINT64_C(11106017418583998464), // VMAXSLrv_v |
| 8117 | UINT64_C(11106017418583998464), // VMAXSLrvl |
| 8118 | UINT64_C(11106017418583998464), // VMAXSLrvl_v |
| 8119 | UINT64_C(11106017418583998464), // VMAXSLrvm |
| 8120 | UINT64_C(11106017418583998464), // VMAXSLrvmL |
| 8121 | UINT64_C(11106017418583998464), // VMAXSLrvmL_v |
| 8122 | UINT64_C(11106017418583998464), // VMAXSLrvm_v |
| 8123 | UINT64_C(11106017418583998464), // VMAXSLrvml |
| 8124 | UINT64_C(11106017418583998464), // VMAXSLrvml_v |
| 8125 | UINT64_C(11096869481840902144), // VMAXSLvv |
| 8126 | UINT64_C(11096869481840902144), // VMAXSLvvL |
| 8127 | UINT64_C(11096869481840902144), // VMAXSLvvL_v |
| 8128 | UINT64_C(11096869481840902144), // VMAXSLvv_v |
| 8129 | UINT64_C(11096869481840902144), // VMAXSLvvl |
| 8130 | UINT64_C(11096869481840902144), // VMAXSLvvl_v |
| 8131 | UINT64_C(11096869481840902144), // VMAXSLvvm |
| 8132 | UINT64_C(11096869481840902144), // VMAXSLvvmL |
| 8133 | UINT64_C(11096869481840902144), // VMAXSLvvmL_v |
| 8134 | UINT64_C(11096869481840902144), // VMAXSLvvm_v |
| 8135 | UINT64_C(11096869481840902144), // VMAXSLvvml |
| 8136 | UINT64_C(11096869481840902144), // VMAXSLvvml_v |
| 8137 | UINT64_C(9952955176488796160), // VMAXSWSXiv |
| 8138 | UINT64_C(9952955176488796160), // VMAXSWSXivL |
| 8139 | UINT64_C(9952955176488796160), // VMAXSWSXivL_v |
| 8140 | UINT64_C(9952955176488796160), // VMAXSWSXiv_v |
| 8141 | UINT64_C(9952955176488796160), // VMAXSWSXivl |
| 8142 | UINT64_C(9952955176488796160), // VMAXSWSXivl_v |
| 8143 | UINT64_C(9952955176488796160), // VMAXSWSXivm |
| 8144 | UINT64_C(9952955176488796160), // VMAXSWSXivmL |
| 8145 | UINT64_C(9952955176488796160), // VMAXSWSXivmL_v |
| 8146 | UINT64_C(9952955176488796160), // VMAXSWSXivm_v |
| 8147 | UINT64_C(9952955176488796160), // VMAXSWSXivml |
| 8148 | UINT64_C(9952955176488796160), // VMAXSWSXivml_v |
| 8149 | UINT64_C(9953095913977151488), // VMAXSWSXrv |
| 8150 | UINT64_C(9953095913977151488), // VMAXSWSXrvL |
| 8151 | UINT64_C(9953095913977151488), // VMAXSWSXrvL_v |
| 8152 | UINT64_C(9953095913977151488), // VMAXSWSXrv_v |
| 8153 | UINT64_C(9953095913977151488), // VMAXSWSXrvl |
| 8154 | UINT64_C(9953095913977151488), // VMAXSWSXrvl_v |
| 8155 | UINT64_C(9953095913977151488), // VMAXSWSXrvm |
| 8156 | UINT64_C(9953095913977151488), // VMAXSWSXrvmL |
| 8157 | UINT64_C(9953095913977151488), // VMAXSWSXrvmL_v |
| 8158 | UINT64_C(9953095913977151488), // VMAXSWSXrvm_v |
| 8159 | UINT64_C(9953095913977151488), // VMAXSWSXrvml |
| 8160 | UINT64_C(9953095913977151488), // VMAXSWSXrvml_v |
| 8161 | UINT64_C(9943947977234055168), // VMAXSWSXvv |
| 8162 | UINT64_C(9943947977234055168), // VMAXSWSXvvL |
| 8163 | UINT64_C(9943947977234055168), // VMAXSWSXvvL_v |
| 8164 | UINT64_C(9943947977234055168), // VMAXSWSXvv_v |
| 8165 | UINT64_C(9943947977234055168), // VMAXSWSXvvl |
| 8166 | UINT64_C(9943947977234055168), // VMAXSWSXvvl_v |
| 8167 | UINT64_C(9943947977234055168), // VMAXSWSXvvm |
| 8168 | UINT64_C(9943947977234055168), // VMAXSWSXvvmL |
| 8169 | UINT64_C(9943947977234055168), // VMAXSWSXvvmL_v |
| 8170 | UINT64_C(9943947977234055168), // VMAXSWSXvvm_v |
| 8171 | UINT64_C(9943947977234055168), // VMAXSWSXvvml |
| 8172 | UINT64_C(9943947977234055168), // VMAXSWSXvvml_v |
| 8173 | UINT64_C(9970969574998278144), // VMAXSWZXiv |
| 8174 | UINT64_C(9970969574998278144), // VMAXSWZXivL |
| 8175 | UINT64_C(9970969574998278144), // VMAXSWZXivL_v |
| 8176 | UINT64_C(9970969574998278144), // VMAXSWZXiv_v |
| 8177 | UINT64_C(9970969574998278144), // VMAXSWZXivl |
| 8178 | UINT64_C(9970969574998278144), // VMAXSWZXivl_v |
| 8179 | UINT64_C(9970969574998278144), // VMAXSWZXivm |
| 8180 | UINT64_C(9970969574998278144), // VMAXSWZXivmL |
| 8181 | UINT64_C(9970969574998278144), // VMAXSWZXivmL_v |
| 8182 | UINT64_C(9970969574998278144), // VMAXSWZXivm_v |
| 8183 | UINT64_C(9970969574998278144), // VMAXSWZXivml |
| 8184 | UINT64_C(9970969574998278144), // VMAXSWZXivml_v |
| 8185 | UINT64_C(9971110312486633472), // VMAXSWZXrv |
| 8186 | UINT64_C(9971110312486633472), // VMAXSWZXrvL |
| 8187 | UINT64_C(9971110312486633472), // VMAXSWZXrvL_v |
| 8188 | UINT64_C(9971110312486633472), // VMAXSWZXrv_v |
| 8189 | UINT64_C(9971110312486633472), // VMAXSWZXrvl |
| 8190 | UINT64_C(9971110312486633472), // VMAXSWZXrvl_v |
| 8191 | UINT64_C(9971110312486633472), // VMAXSWZXrvm |
| 8192 | UINT64_C(9971110312486633472), // VMAXSWZXrvmL |
| 8193 | UINT64_C(9971110312486633472), // VMAXSWZXrvmL_v |
| 8194 | UINT64_C(9971110312486633472), // VMAXSWZXrvm_v |
| 8195 | UINT64_C(9971110312486633472), // VMAXSWZXrvml |
| 8196 | UINT64_C(9971110312486633472), // VMAXSWZXrvml_v |
| 8197 | UINT64_C(9961962375743537152), // VMAXSWZXvv |
| 8198 | UINT64_C(9961962375743537152), // VMAXSWZXvvL |
| 8199 | UINT64_C(9961962375743537152), // VMAXSWZXvvL_v |
| 8200 | UINT64_C(9961962375743537152), // VMAXSWZXvv_v |
| 8201 | UINT64_C(9961962375743537152), // VMAXSWZXvvl |
| 8202 | UINT64_C(9961962375743537152), // VMAXSWZXvvl_v |
| 8203 | UINT64_C(9961962375743537152), // VMAXSWZXvvm |
| 8204 | UINT64_C(9961962375743537152), // VMAXSWZXvvmL |
| 8205 | UINT64_C(9961962375743537152), // VMAXSWZXvvmL_v |
| 8206 | UINT64_C(9961962375743537152), // VMAXSWZXvvm_v |
| 8207 | UINT64_C(9961962375743537152), // VMAXSWZXvvml |
| 8208 | UINT64_C(9961962375743537152), // VMAXSWZXvvml_v |
| 8209 | UINT64_C(11110380280723013632), // VMINSLiv |
| 8210 | UINT64_C(11110380280723013632), // VMINSLivL |
| 8211 | UINT64_C(11110380280723013632), // VMINSLivL_v |
| 8212 | UINT64_C(11110380280723013632), // VMINSLiv_v |
| 8213 | UINT64_C(11110380280723013632), // VMINSLivl |
| 8214 | UINT64_C(11110380280723013632), // VMINSLivl_v |
| 8215 | UINT64_C(11110380280723013632), // VMINSLivm |
| 8216 | UINT64_C(11110380280723013632), // VMINSLivmL |
| 8217 | UINT64_C(11110380280723013632), // VMINSLivmL_v |
| 8218 | UINT64_C(11110380280723013632), // VMINSLivm_v |
| 8219 | UINT64_C(11110380280723013632), // VMINSLivml |
| 8220 | UINT64_C(11110380280723013632), // VMINSLivml_v |
| 8221 | UINT64_C(11110521018211368960), // VMINSLrv |
| 8222 | UINT64_C(11110521018211368960), // VMINSLrvL |
| 8223 | UINT64_C(11110521018211368960), // VMINSLrvL_v |
| 8224 | UINT64_C(11110521018211368960), // VMINSLrv_v |
| 8225 | UINT64_C(11110521018211368960), // VMINSLrvl |
| 8226 | UINT64_C(11110521018211368960), // VMINSLrvl_v |
| 8227 | UINT64_C(11110521018211368960), // VMINSLrvm |
| 8228 | UINT64_C(11110521018211368960), // VMINSLrvmL |
| 8229 | UINT64_C(11110521018211368960), // VMINSLrvmL_v |
| 8230 | UINT64_C(11110521018211368960), // VMINSLrvm_v |
| 8231 | UINT64_C(11110521018211368960), // VMINSLrvml |
| 8232 | UINT64_C(11110521018211368960), // VMINSLrvml_v |
| 8233 | UINT64_C(11101373081468272640), // VMINSLvv |
| 8234 | UINT64_C(11101373081468272640), // VMINSLvvL |
| 8235 | UINT64_C(11101373081468272640), // VMINSLvvL_v |
| 8236 | UINT64_C(11101373081468272640), // VMINSLvv_v |
| 8237 | UINT64_C(11101373081468272640), // VMINSLvvl |
| 8238 | UINT64_C(11101373081468272640), // VMINSLvvl_v |
| 8239 | UINT64_C(11101373081468272640), // VMINSLvvm |
| 8240 | UINT64_C(11101373081468272640), // VMINSLvvmL |
| 8241 | UINT64_C(11101373081468272640), // VMINSLvvmL_v |
| 8242 | UINT64_C(11101373081468272640), // VMINSLvvm_v |
| 8243 | UINT64_C(11101373081468272640), // VMINSLvvml |
| 8244 | UINT64_C(11101373081468272640), // VMINSLvvml_v |
| 8245 | UINT64_C(9957458776116166656), // VMINSWSXiv |
| 8246 | UINT64_C(9957458776116166656), // VMINSWSXivL |
| 8247 | UINT64_C(9957458776116166656), // VMINSWSXivL_v |
| 8248 | UINT64_C(9957458776116166656), // VMINSWSXiv_v |
| 8249 | UINT64_C(9957458776116166656), // VMINSWSXivl |
| 8250 | UINT64_C(9957458776116166656), // VMINSWSXivl_v |
| 8251 | UINT64_C(9957458776116166656), // VMINSWSXivm |
| 8252 | UINT64_C(9957458776116166656), // VMINSWSXivmL |
| 8253 | UINT64_C(9957458776116166656), // VMINSWSXivmL_v |
| 8254 | UINT64_C(9957458776116166656), // VMINSWSXivm_v |
| 8255 | UINT64_C(9957458776116166656), // VMINSWSXivml |
| 8256 | UINT64_C(9957458776116166656), // VMINSWSXivml_v |
| 8257 | UINT64_C(9957599513604521984), // VMINSWSXrv |
| 8258 | UINT64_C(9957599513604521984), // VMINSWSXrvL |
| 8259 | UINT64_C(9957599513604521984), // VMINSWSXrvL_v |
| 8260 | UINT64_C(9957599513604521984), // VMINSWSXrv_v |
| 8261 | UINT64_C(9957599513604521984), // VMINSWSXrvl |
| 8262 | UINT64_C(9957599513604521984), // VMINSWSXrvl_v |
| 8263 | UINT64_C(9957599513604521984), // VMINSWSXrvm |
| 8264 | UINT64_C(9957599513604521984), // VMINSWSXrvmL |
| 8265 | UINT64_C(9957599513604521984), // VMINSWSXrvmL_v |
| 8266 | UINT64_C(9957599513604521984), // VMINSWSXrvm_v |
| 8267 | UINT64_C(9957599513604521984), // VMINSWSXrvml |
| 8268 | UINT64_C(9957599513604521984), // VMINSWSXrvml_v |
| 8269 | UINT64_C(9948451576861425664), // VMINSWSXvv |
| 8270 | UINT64_C(9948451576861425664), // VMINSWSXvvL |
| 8271 | UINT64_C(9948451576861425664), // VMINSWSXvvL_v |
| 8272 | UINT64_C(9948451576861425664), // VMINSWSXvv_v |
| 8273 | UINT64_C(9948451576861425664), // VMINSWSXvvl |
| 8274 | UINT64_C(9948451576861425664), // VMINSWSXvvl_v |
| 8275 | UINT64_C(9948451576861425664), // VMINSWSXvvm |
| 8276 | UINT64_C(9948451576861425664), // VMINSWSXvvmL |
| 8277 | UINT64_C(9948451576861425664), // VMINSWSXvvmL_v |
| 8278 | UINT64_C(9948451576861425664), // VMINSWSXvvm_v |
| 8279 | UINT64_C(9948451576861425664), // VMINSWSXvvml |
| 8280 | UINT64_C(9948451576861425664), // VMINSWSXvvml_v |
| 8281 | UINT64_C(9975473174625648640), // VMINSWZXiv |
| 8282 | UINT64_C(9975473174625648640), // VMINSWZXivL |
| 8283 | UINT64_C(9975473174625648640), // VMINSWZXivL_v |
| 8284 | UINT64_C(9975473174625648640), // VMINSWZXiv_v |
| 8285 | UINT64_C(9975473174625648640), // VMINSWZXivl |
| 8286 | UINT64_C(9975473174625648640), // VMINSWZXivl_v |
| 8287 | UINT64_C(9975473174625648640), // VMINSWZXivm |
| 8288 | UINT64_C(9975473174625648640), // VMINSWZXivmL |
| 8289 | UINT64_C(9975473174625648640), // VMINSWZXivmL_v |
| 8290 | UINT64_C(9975473174625648640), // VMINSWZXivm_v |
| 8291 | UINT64_C(9975473174625648640), // VMINSWZXivml |
| 8292 | UINT64_C(9975473174625648640), // VMINSWZXivml_v |
| 8293 | UINT64_C(9975613912114003968), // VMINSWZXrv |
| 8294 | UINT64_C(9975613912114003968), // VMINSWZXrvL |
| 8295 | UINT64_C(9975613912114003968), // VMINSWZXrvL_v |
| 8296 | UINT64_C(9975613912114003968), // VMINSWZXrv_v |
| 8297 | UINT64_C(9975613912114003968), // VMINSWZXrvl |
| 8298 | UINT64_C(9975613912114003968), // VMINSWZXrvl_v |
| 8299 | UINT64_C(9975613912114003968), // VMINSWZXrvm |
| 8300 | UINT64_C(9975613912114003968), // VMINSWZXrvmL |
| 8301 | UINT64_C(9975613912114003968), // VMINSWZXrvmL_v |
| 8302 | UINT64_C(9975613912114003968), // VMINSWZXrvm_v |
| 8303 | UINT64_C(9975613912114003968), // VMINSWZXrvml |
| 8304 | UINT64_C(9975613912114003968), // VMINSWZXrvml_v |
| 8305 | UINT64_C(9966465975370907648), // VMINSWZXvv |
| 8306 | UINT64_C(9966465975370907648), // VMINSWZXvvL |
| 8307 | UINT64_C(9966465975370907648), // VMINSWZXvvL_v |
| 8308 | UINT64_C(9966465975370907648), // VMINSWZXvv_v |
| 8309 | UINT64_C(9966465975370907648), // VMINSWZXvvl |
| 8310 | UINT64_C(9966465975370907648), // VMINSWZXvvl_v |
| 8311 | UINT64_C(9966465975370907648), // VMINSWZXvvm |
| 8312 | UINT64_C(9966465975370907648), // VMINSWZXvvmL |
| 8313 | UINT64_C(9966465975370907648), // VMINSWZXvvmL_v |
| 8314 | UINT64_C(9966465975370907648), // VMINSWZXvvm_v |
| 8315 | UINT64_C(9966465975370907648), // VMINSWZXvvml |
| 8316 | UINT64_C(9966465975370907648), // VMINSWZXvvml_v |
| 8317 | UINT64_C(15465361120390283264), // VMRGWiv |
| 8318 | UINT64_C(15465361120390283264), // VMRGWivL |
| 8319 | UINT64_C(15465361120390283264), // VMRGWivL_v |
| 8320 | UINT64_C(15465361120390283264), // VMRGWiv_v |
| 8321 | UINT64_C(15465361120390283264), // VMRGWivl |
| 8322 | UINT64_C(15465361120390283264), // VMRGWivl_v |
| 8323 | UINT64_C(15465361120390283264), // VMRGWivm |
| 8324 | UINT64_C(15465361120390283264), // VMRGWivmL |
| 8325 | UINT64_C(15465361120390283264), // VMRGWivmL_v |
| 8326 | UINT64_C(15465361120390283264), // VMRGWivm_v |
| 8327 | UINT64_C(15465361120390283264), // VMRGWivml |
| 8328 | UINT64_C(15465361120390283264), // VMRGWivml_v |
| 8329 | UINT64_C(15465501857878638592), // VMRGWrv |
| 8330 | UINT64_C(15465501857878638592), // VMRGWrvL |
| 8331 | UINT64_C(15465501857878638592), // VMRGWrvL_v |
| 8332 | UINT64_C(15465501857878638592), // VMRGWrv_v |
| 8333 | UINT64_C(15465501857878638592), // VMRGWrvl |
| 8334 | UINT64_C(15465501857878638592), // VMRGWrvl_v |
| 8335 | UINT64_C(15465501857878638592), // VMRGWrvm |
| 8336 | UINT64_C(15465501857878638592), // VMRGWrvmL |
| 8337 | UINT64_C(15465501857878638592), // VMRGWrvmL_v |
| 8338 | UINT64_C(15465501857878638592), // VMRGWrvm_v |
| 8339 | UINT64_C(15465501857878638592), // VMRGWrvml |
| 8340 | UINT64_C(15465501857878638592), // VMRGWrvml_v |
| 8341 | UINT64_C(15456353921135542272), // VMRGWvv |
| 8342 | UINT64_C(15456353921135542272), // VMRGWvvL |
| 8343 | UINT64_C(15456353921135542272), // VMRGWvvL_v |
| 8344 | UINT64_C(15456353921135542272), // VMRGWvv_v |
| 8345 | UINT64_C(15456353921135542272), // VMRGWvvl |
| 8346 | UINT64_C(15456353921135542272), // VMRGWvvl_v |
| 8347 | UINT64_C(15456353921135542272), // VMRGWvvm |
| 8348 | UINT64_C(15456353921135542272), // VMRGWvvmL |
| 8349 | UINT64_C(15456353921135542272), // VMRGWvvmL_v |
| 8350 | UINT64_C(15456353921135542272), // VMRGWvvm_v |
| 8351 | UINT64_C(15456353921135542272), // VMRGWvvml |
| 8352 | UINT64_C(15456353921135542272), // VMRGWvvml_v |
| 8353 | UINT64_C(15429332323371319296), // VMRGiv |
| 8354 | UINT64_C(15429332323371319296), // VMRGivL |
| 8355 | UINT64_C(15429332323371319296), // VMRGivL_v |
| 8356 | UINT64_C(15429332323371319296), // VMRGiv_v |
| 8357 | UINT64_C(15429332323371319296), // VMRGivl |
| 8358 | UINT64_C(15429332323371319296), // VMRGivl_v |
| 8359 | UINT64_C(15429332323371319296), // VMRGivm |
| 8360 | UINT64_C(15429332323371319296), // VMRGivmL |
| 8361 | UINT64_C(15429332323371319296), // VMRGivmL_v |
| 8362 | UINT64_C(15429332323371319296), // VMRGivm_v |
| 8363 | UINT64_C(15429332323371319296), // VMRGivml |
| 8364 | UINT64_C(15429332323371319296), // VMRGivml_v |
| 8365 | UINT64_C(15429473060859674624), // VMRGrv |
| 8366 | UINT64_C(15429473060859674624), // VMRGrvL |
| 8367 | UINT64_C(15429473060859674624), // VMRGrvL_v |
| 8368 | UINT64_C(15429473060859674624), // VMRGrv_v |
| 8369 | UINT64_C(15429473060859674624), // VMRGrvl |
| 8370 | UINT64_C(15429473060859674624), // VMRGrvl_v |
| 8371 | UINT64_C(15429473060859674624), // VMRGrvm |
| 8372 | UINT64_C(15429473060859674624), // VMRGrvmL |
| 8373 | UINT64_C(15429473060859674624), // VMRGrvmL_v |
| 8374 | UINT64_C(15429473060859674624), // VMRGrvm_v |
| 8375 | UINT64_C(15429473060859674624), // VMRGrvml |
| 8376 | UINT64_C(15429473060859674624), // VMRGrvml_v |
| 8377 | UINT64_C(15420325124116578304), // VMRGvv |
| 8378 | UINT64_C(15420325124116578304), // VMRGvvL |
| 8379 | UINT64_C(15420325124116578304), // VMRGvvL_v |
| 8380 | UINT64_C(15420325124116578304), // VMRGvv_v |
| 8381 | UINT64_C(15420325124116578304), // VMRGvvl |
| 8382 | UINT64_C(15420325124116578304), // VMRGvvl_v |
| 8383 | UINT64_C(15420325124116578304), // VMRGvvm |
| 8384 | UINT64_C(15420325124116578304), // VMRGvvmL |
| 8385 | UINT64_C(15420325124116578304), // VMRGvvmL_v |
| 8386 | UINT64_C(15420325124116578304), // VMRGvvm_v |
| 8387 | UINT64_C(15420325124116578304), // VMRGvvml |
| 8388 | UINT64_C(15420325124116578304), // VMRGvvml_v |
| 8389 | UINT64_C(15645505105485103104), // VMULSLWiv |
| 8390 | UINT64_C(15645505105485103104), // VMULSLWivL |
| 8391 | UINT64_C(15645505105485103104), // VMULSLWivL_v |
| 8392 | UINT64_C(15645505105485103104), // VMULSLWiv_v |
| 8393 | UINT64_C(15645505105485103104), // VMULSLWivl |
| 8394 | UINT64_C(15645505105485103104), // VMULSLWivl_v |
| 8395 | UINT64_C(15645505105485103104), // VMULSLWivm |
| 8396 | UINT64_C(15645505105485103104), // VMULSLWivmL |
| 8397 | UINT64_C(15645505105485103104), // VMULSLWivmL_v |
| 8398 | UINT64_C(15645505105485103104), // VMULSLWivm_v |
| 8399 | UINT64_C(15645505105485103104), // VMULSLWivml |
| 8400 | UINT64_C(15645505105485103104), // VMULSLWivml_v |
| 8401 | UINT64_C(15645645842973458432), // VMULSLWrv |
| 8402 | UINT64_C(15645645842973458432), // VMULSLWrvL |
| 8403 | UINT64_C(15645645842973458432), // VMULSLWrvL_v |
| 8404 | UINT64_C(15645645842973458432), // VMULSLWrv_v |
| 8405 | UINT64_C(15645645842973458432), // VMULSLWrvl |
| 8406 | UINT64_C(15645645842973458432), // VMULSLWrvl_v |
| 8407 | UINT64_C(15645645842973458432), // VMULSLWrvm |
| 8408 | UINT64_C(15645645842973458432), // VMULSLWrvmL |
| 8409 | UINT64_C(15645645842973458432), // VMULSLWrvmL_v |
| 8410 | UINT64_C(15645645842973458432), // VMULSLWrvm_v |
| 8411 | UINT64_C(15645645842973458432), // VMULSLWrvml |
| 8412 | UINT64_C(15645645842973458432), // VMULSLWrvml_v |
| 8413 | UINT64_C(15636497906230362112), // VMULSLWvv |
| 8414 | UINT64_C(15636497906230362112), // VMULSLWvvL |
| 8415 | UINT64_C(15636497906230362112), // VMULSLWvvL_v |
| 8416 | UINT64_C(15636497906230362112), // VMULSLWvv_v |
| 8417 | UINT64_C(15636497906230362112), // VMULSLWvvl |
| 8418 | UINT64_C(15636497906230362112), // VMULSLWvvl_v |
| 8419 | UINT64_C(15636497906230362112), // VMULSLWvvm |
| 8420 | UINT64_C(15636497906230362112), // VMULSLWvvmL |
| 8421 | UINT64_C(15636497906230362112), // VMULSLWvvmL_v |
| 8422 | UINT64_C(15636497906230362112), // VMULSLWvvm_v |
| 8423 | UINT64_C(15636497906230362112), // VMULSLWvvml |
| 8424 | UINT64_C(15636497906230362112), // VMULSLWvvml_v |
| 8425 | UINT64_C(15789620293560958976), // VMULSLiv |
| 8426 | UINT64_C(15789620293560958976), // VMULSLivL |
| 8427 | UINT64_C(15789620293560958976), // VMULSLivL_v |
| 8428 | UINT64_C(15789620293560958976), // VMULSLiv_v |
| 8429 | UINT64_C(15789620293560958976), // VMULSLivl |
| 8430 | UINT64_C(15789620293560958976), // VMULSLivl_v |
| 8431 | UINT64_C(15789620293560958976), // VMULSLivm |
| 8432 | UINT64_C(15789620293560958976), // VMULSLivmL |
| 8433 | UINT64_C(15789620293560958976), // VMULSLivmL_v |
| 8434 | UINT64_C(15789620293560958976), // VMULSLivm_v |
| 8435 | UINT64_C(15789620293560958976), // VMULSLivml |
| 8436 | UINT64_C(15789620293560958976), // VMULSLivml_v |
| 8437 | UINT64_C(15789761031049314304), // VMULSLrv |
| 8438 | UINT64_C(15789761031049314304), // VMULSLrvL |
| 8439 | UINT64_C(15789761031049314304), // VMULSLrvL_v |
| 8440 | UINT64_C(15789761031049314304), // VMULSLrv_v |
| 8441 | UINT64_C(15789761031049314304), // VMULSLrvl |
| 8442 | UINT64_C(15789761031049314304), // VMULSLrvl_v |
| 8443 | UINT64_C(15789761031049314304), // VMULSLrvm |
| 8444 | UINT64_C(15789761031049314304), // VMULSLrvmL |
| 8445 | UINT64_C(15789761031049314304), // VMULSLrvmL_v |
| 8446 | UINT64_C(15789761031049314304), // VMULSLrvm_v |
| 8447 | UINT64_C(15789761031049314304), // VMULSLrvml |
| 8448 | UINT64_C(15789761031049314304), // VMULSLrvml_v |
| 8449 | UINT64_C(15780613094306217984), // VMULSLvv |
| 8450 | UINT64_C(15780613094306217984), // VMULSLvvL |
| 8451 | UINT64_C(15780613094306217984), // VMULSLvvL_v |
| 8452 | UINT64_C(15780613094306217984), // VMULSLvv_v |
| 8453 | UINT64_C(15780613094306217984), // VMULSLvvl |
| 8454 | UINT64_C(15780613094306217984), // VMULSLvvl_v |
| 8455 | UINT64_C(15780613094306217984), // VMULSLvvm |
| 8456 | UINT64_C(15780613094306217984), // VMULSLvvmL |
| 8457 | UINT64_C(15780613094306217984), // VMULSLvvmL_v |
| 8458 | UINT64_C(15780613094306217984), // VMULSLvvm_v |
| 8459 | UINT64_C(15780613094306217984), // VMULSLvvml |
| 8460 | UINT64_C(15780613094306217984), // VMULSLvvml_v |
| 8461 | UINT64_C(14636698788954112000), // VMULSWSXiv |
| 8462 | UINT64_C(14636698788954112000), // VMULSWSXivL |
| 8463 | UINT64_C(14636698788954112000), // VMULSWSXivL_v |
| 8464 | UINT64_C(14636698788954112000), // VMULSWSXiv_v |
| 8465 | UINT64_C(14636698788954112000), // VMULSWSXivl |
| 8466 | UINT64_C(14636698788954112000), // VMULSWSXivl_v |
| 8467 | UINT64_C(14636698788954112000), // VMULSWSXivm |
| 8468 | UINT64_C(14636698788954112000), // VMULSWSXivmL |
| 8469 | UINT64_C(14636698788954112000), // VMULSWSXivmL_v |
| 8470 | UINT64_C(14636698788954112000), // VMULSWSXivm_v |
| 8471 | UINT64_C(14636698788954112000), // VMULSWSXivml |
| 8472 | UINT64_C(14636698788954112000), // VMULSWSXivml_v |
| 8473 | UINT64_C(14636839526442467328), // VMULSWSXrv |
| 8474 | UINT64_C(14636839526442467328), // VMULSWSXrvL |
| 8475 | UINT64_C(14636839526442467328), // VMULSWSXrvL_v |
| 8476 | UINT64_C(14636839526442467328), // VMULSWSXrv_v |
| 8477 | UINT64_C(14636839526442467328), // VMULSWSXrvl |
| 8478 | UINT64_C(14636839526442467328), // VMULSWSXrvl_v |
| 8479 | UINT64_C(14636839526442467328), // VMULSWSXrvm |
| 8480 | UINT64_C(14636839526442467328), // VMULSWSXrvmL |
| 8481 | UINT64_C(14636839526442467328), // VMULSWSXrvmL_v |
| 8482 | UINT64_C(14636839526442467328), // VMULSWSXrvm_v |
| 8483 | UINT64_C(14636839526442467328), // VMULSWSXrvml |
| 8484 | UINT64_C(14636839526442467328), // VMULSWSXrvml_v |
| 8485 | UINT64_C(14627691589699371008), // VMULSWSXvv |
| 8486 | UINT64_C(14627691589699371008), // VMULSWSXvvL |
| 8487 | UINT64_C(14627691589699371008), // VMULSWSXvvL_v |
| 8488 | UINT64_C(14627691589699371008), // VMULSWSXvv_v |
| 8489 | UINT64_C(14627691589699371008), // VMULSWSXvvl |
| 8490 | UINT64_C(14627691589699371008), // VMULSWSXvvl_v |
| 8491 | UINT64_C(14627691589699371008), // VMULSWSXvvm |
| 8492 | UINT64_C(14627691589699371008), // VMULSWSXvvmL |
| 8493 | UINT64_C(14627691589699371008), // VMULSWSXvvmL_v |
| 8494 | UINT64_C(14627691589699371008), // VMULSWSXvvm_v |
| 8495 | UINT64_C(14627691589699371008), // VMULSWSXvvml |
| 8496 | UINT64_C(14627691589699371008), // VMULSWSXvvml_v |
| 8497 | UINT64_C(14654713187463593984), // VMULSWZXiv |
| 8498 | UINT64_C(14654713187463593984), // VMULSWZXivL |
| 8499 | UINT64_C(14654713187463593984), // VMULSWZXivL_v |
| 8500 | UINT64_C(14654713187463593984), // VMULSWZXiv_v |
| 8501 | UINT64_C(14654713187463593984), // VMULSWZXivl |
| 8502 | UINT64_C(14654713187463593984), // VMULSWZXivl_v |
| 8503 | UINT64_C(14654713187463593984), // VMULSWZXivm |
| 8504 | UINT64_C(14654713187463593984), // VMULSWZXivmL |
| 8505 | UINT64_C(14654713187463593984), // VMULSWZXivmL_v |
| 8506 | UINT64_C(14654713187463593984), // VMULSWZXivm_v |
| 8507 | UINT64_C(14654713187463593984), // VMULSWZXivml |
| 8508 | UINT64_C(14654713187463593984), // VMULSWZXivml_v |
| 8509 | UINT64_C(14654853924951949312), // VMULSWZXrv |
| 8510 | UINT64_C(14654853924951949312), // VMULSWZXrvL |
| 8511 | UINT64_C(14654853924951949312), // VMULSWZXrvL_v |
| 8512 | UINT64_C(14654853924951949312), // VMULSWZXrv_v |
| 8513 | UINT64_C(14654853924951949312), // VMULSWZXrvl |
| 8514 | UINT64_C(14654853924951949312), // VMULSWZXrvl_v |
| 8515 | UINT64_C(14654853924951949312), // VMULSWZXrvm |
| 8516 | UINT64_C(14654853924951949312), // VMULSWZXrvmL |
| 8517 | UINT64_C(14654853924951949312), // VMULSWZXrvmL_v |
| 8518 | UINT64_C(14654853924951949312), // VMULSWZXrvm_v |
| 8519 | UINT64_C(14654853924951949312), // VMULSWZXrvml |
| 8520 | UINT64_C(14654853924951949312), // VMULSWZXrvml_v |
| 8521 | UINT64_C(14645705988208852992), // VMULSWZXvv |
| 8522 | UINT64_C(14645705988208852992), // VMULSWZXvvL |
| 8523 | UINT64_C(14645705988208852992), // VMULSWZXvvL_v |
| 8524 | UINT64_C(14645705988208852992), // VMULSWZXvv_v |
| 8525 | UINT64_C(14645705988208852992), // VMULSWZXvvl |
| 8526 | UINT64_C(14645705988208852992), // VMULSWZXvvl_v |
| 8527 | UINT64_C(14645705988208852992), // VMULSWZXvvm |
| 8528 | UINT64_C(14645705988208852992), // VMULSWZXvvmL |
| 8529 | UINT64_C(14645705988208852992), // VMULSWZXvvmL_v |
| 8530 | UINT64_C(14645705988208852992), // VMULSWZXvvm_v |
| 8531 | UINT64_C(14645705988208852992), // VMULSWZXvvml |
| 8532 | UINT64_C(14645705988208852992), // VMULSWZXvvml_v |
| 8533 | UINT64_C(14492583600878256128), // VMULULiv |
| 8534 | UINT64_C(14492583600878256128), // VMULULivL |
| 8535 | UINT64_C(14492583600878256128), // VMULULivL_v |
| 8536 | UINT64_C(14492583600878256128), // VMULULiv_v |
| 8537 | UINT64_C(14492583600878256128), // VMULULivl |
| 8538 | UINT64_C(14492583600878256128), // VMULULivl_v |
| 8539 | UINT64_C(14492583600878256128), // VMULULivm |
| 8540 | UINT64_C(14492583600878256128), // VMULULivmL |
| 8541 | UINT64_C(14492583600878256128), // VMULULivmL_v |
| 8542 | UINT64_C(14492583600878256128), // VMULULivm_v |
| 8543 | UINT64_C(14492583600878256128), // VMULULivml |
| 8544 | UINT64_C(14492583600878256128), // VMULULivml_v |
| 8545 | UINT64_C(14492724338366611456), // VMULULrv |
| 8546 | UINT64_C(14492724338366611456), // VMULULrvL |
| 8547 | UINT64_C(14492724338366611456), // VMULULrvL_v |
| 8548 | UINT64_C(14492724338366611456), // VMULULrv_v |
| 8549 | UINT64_C(14492724338366611456), // VMULULrvl |
| 8550 | UINT64_C(14492724338366611456), // VMULULrvl_v |
| 8551 | UINT64_C(14492724338366611456), // VMULULrvm |
| 8552 | UINT64_C(14492724338366611456), // VMULULrvmL |
| 8553 | UINT64_C(14492724338366611456), // VMULULrvmL_v |
| 8554 | UINT64_C(14492724338366611456), // VMULULrvm_v |
| 8555 | UINT64_C(14492724338366611456), // VMULULrvml |
| 8556 | UINT64_C(14492724338366611456), // VMULULrvml_v |
| 8557 | UINT64_C(14483576401623515136), // VMULULvv |
| 8558 | UINT64_C(14483576401623515136), // VMULULvvL |
| 8559 | UINT64_C(14483576401623515136), // VMULULvvL_v |
| 8560 | UINT64_C(14483576401623515136), // VMULULvv_v |
| 8561 | UINT64_C(14483576401623515136), // VMULULvvl |
| 8562 | UINT64_C(14483576401623515136), // VMULULvvl_v |
| 8563 | UINT64_C(14483576401623515136), // VMULULvvm |
| 8564 | UINT64_C(14483576401623515136), // VMULULvvmL |
| 8565 | UINT64_C(14483576401623515136), // VMULULvvmL_v |
| 8566 | UINT64_C(14483576401623515136), // VMULULvvm_v |
| 8567 | UINT64_C(14483576401623515136), // VMULULvvml |
| 8568 | UINT64_C(14483576401623515136), // VMULULvvml_v |
| 8569 | UINT64_C(14510597999387738112), // VMULUWiv |
| 8570 | UINT64_C(14510597999387738112), // VMULUWivL |
| 8571 | UINT64_C(14510597999387738112), // VMULUWivL_v |
| 8572 | UINT64_C(14510597999387738112), // VMULUWiv_v |
| 8573 | UINT64_C(14510597999387738112), // VMULUWivl |
| 8574 | UINT64_C(14510597999387738112), // VMULUWivl_v |
| 8575 | UINT64_C(14510597999387738112), // VMULUWivm |
| 8576 | UINT64_C(14510597999387738112), // VMULUWivmL |
| 8577 | UINT64_C(14510597999387738112), // VMULUWivmL_v |
| 8578 | UINT64_C(14510597999387738112), // VMULUWivm_v |
| 8579 | UINT64_C(14510597999387738112), // VMULUWivml |
| 8580 | UINT64_C(14510597999387738112), // VMULUWivml_v |
| 8581 | UINT64_C(14510738736876093440), // VMULUWrv |
| 8582 | UINT64_C(14510738736876093440), // VMULUWrvL |
| 8583 | UINT64_C(14510738736876093440), // VMULUWrvL_v |
| 8584 | UINT64_C(14510738736876093440), // VMULUWrv_v |
| 8585 | UINT64_C(14510738736876093440), // VMULUWrvl |
| 8586 | UINT64_C(14510738736876093440), // VMULUWrvl_v |
| 8587 | UINT64_C(14510738736876093440), // VMULUWrvm |
| 8588 | UINT64_C(14510738736876093440), // VMULUWrvmL |
| 8589 | UINT64_C(14510738736876093440), // VMULUWrvmL_v |
| 8590 | UINT64_C(14510738736876093440), // VMULUWrvm_v |
| 8591 | UINT64_C(14510738736876093440), // VMULUWrvml |
| 8592 | UINT64_C(14510738736876093440), // VMULUWrvml_v |
| 8593 | UINT64_C(14501590800132997120), // VMULUWvv |
| 8594 | UINT64_C(14501590800132997120), // VMULUWvvL |
| 8595 | UINT64_C(14501590800132997120), // VMULUWvvL_v |
| 8596 | UINT64_C(14501590800132997120), // VMULUWvv_v |
| 8597 | UINT64_C(14501590800132997120), // VMULUWvvl |
| 8598 | UINT64_C(14501590800132997120), // VMULUWvvl_v |
| 8599 | UINT64_C(14501590800132997120), // VMULUWvvm |
| 8600 | UINT64_C(14501590800132997120), // VMULUWvvmL |
| 8601 | UINT64_C(14501590800132997120), // VMULUWvvmL_v |
| 8602 | UINT64_C(14501590800132997120), // VMULUWvvm_v |
| 8603 | UINT64_C(14501590800132997120), // VMULUWvvml |
| 8604 | UINT64_C(14501590800132997120), // VMULUWvvml_v |
| 8605 | UINT64_C(11240984669916758016), // VMViv |
| 8606 | UINT64_C(11240984669916758016), // VMVivL |
| 8607 | UINT64_C(11240984669916758016), // VMVivL_v |
| 8608 | UINT64_C(11240984669916758016), // VMViv_v |
| 8609 | UINT64_C(11240984669916758016), // VMVivl |
| 8610 | UINT64_C(11240984669916758016), // VMVivl_v |
| 8611 | UINT64_C(11240984669916758016), // VMVivm |
| 8612 | UINT64_C(11240984669916758016), // VMVivmL |
| 8613 | UINT64_C(11240984669916758016), // VMVivmL_v |
| 8614 | UINT64_C(11240984669916758016), // VMVivm_v |
| 8615 | UINT64_C(11240984669916758016), // VMVivml |
| 8616 | UINT64_C(11240984669916758016), // VMVivml_v |
| 8617 | UINT64_C(11241125407405113344), // VMVrv |
| 8618 | UINT64_C(11241125407405113344), // VMVrvL |
| 8619 | UINT64_C(11241125407405113344), // VMVrvL_v |
| 8620 | UINT64_C(11241125407405113344), // VMVrv_v |
| 8621 | UINT64_C(11241125407405113344), // VMVrvl |
| 8622 | UINT64_C(11241125407405113344), // VMVrvl_v |
| 8623 | UINT64_C(11241125407405113344), // VMVrvm |
| 8624 | UINT64_C(11241125407405113344), // VMVrvmL |
| 8625 | UINT64_C(11241125407405113344), // VMVrvmL_v |
| 8626 | UINT64_C(11241125407405113344), // VMVrvm_v |
| 8627 | UINT64_C(11241125407405113344), // VMVrvml |
| 8628 | UINT64_C(11241125407405113344), // VMVrvml_v |
| 8629 | UINT64_C(14204353224726544384), // VORmv |
| 8630 | UINT64_C(14204353224726544384), // VORmvL |
| 8631 | UINT64_C(14204353224726544384), // VORmvL_v |
| 8632 | UINT64_C(14204353224726544384), // VORmv_v |
| 8633 | UINT64_C(14204353224726544384), // VORmvl |
| 8634 | UINT64_C(14204353224726544384), // VORmvl_v |
| 8635 | UINT64_C(14204353224726544384), // VORmvm |
| 8636 | UINT64_C(14204353224726544384), // VORmvmL |
| 8637 | UINT64_C(14204353224726544384), // VORmvmL_v |
| 8638 | UINT64_C(14204353224726544384), // VORmvm_v |
| 8639 | UINT64_C(14204353224726544384), // VORmvml |
| 8640 | UINT64_C(14204353224726544384), // VORmvml_v |
| 8641 | UINT64_C(14204493962214899712), // VORrv |
| 8642 | UINT64_C(14204493962214899712), // VORrvL |
| 8643 | UINT64_C(14204493962214899712), // VORrvL_v |
| 8644 | UINT64_C(14204493962214899712), // VORrv_v |
| 8645 | UINT64_C(14204493962214899712), // VORrvl |
| 8646 | UINT64_C(14204493962214899712), // VORrvl_v |
| 8647 | UINT64_C(14204493962214899712), // VORrvm |
| 8648 | UINT64_C(14204493962214899712), // VORrvmL |
| 8649 | UINT64_C(14204493962214899712), // VORrvmL_v |
| 8650 | UINT64_C(14204493962214899712), // VORrvm_v |
| 8651 | UINT64_C(14204493962214899712), // VORrvml |
| 8652 | UINT64_C(14204493962214899712), // VORrvml_v |
| 8653 | UINT64_C(14195346025471803392), // VORvv |
| 8654 | UINT64_C(14195346025471803392), // VORvvL |
| 8655 | UINT64_C(14195346025471803392), // VORvvL_v |
| 8656 | UINT64_C(14195346025471803392), // VORvv_v |
| 8657 | UINT64_C(14195346025471803392), // VORvvl |
| 8658 | UINT64_C(14195346025471803392), // VORvvl_v |
| 8659 | UINT64_C(14195346025471803392), // VORvvm |
| 8660 | UINT64_C(14195346025471803392), // VORvvmL |
| 8661 | UINT64_C(14195346025471803392), // VORvvmL_v |
| 8662 | UINT64_C(14195346025471803392), // VORvvm_v |
| 8663 | UINT64_C(14195346025471803392), // VORvvml |
| 8664 | UINT64_C(14195346025471803392), // VORvvml_v |
| 8665 | UINT64_C(12393906174523604992), // VPCNTv |
| 8666 | UINT64_C(12393906174523604992), // VPCNTvL |
| 8667 | UINT64_C(12393906174523604992), // VPCNTvL_v |
| 8668 | UINT64_C(12393906174523604992), // VPCNTv_v |
| 8669 | UINT64_C(12393906174523604992), // VPCNTvl |
| 8670 | UINT64_C(12393906174523604992), // VPCNTvl_v |
| 8671 | UINT64_C(12393906174523604992), // VPCNTvm |
| 8672 | UINT64_C(12393906174523604992), // VPCNTvmL |
| 8673 | UINT64_C(12393906174523604992), // VPCNTvmL_v |
| 8674 | UINT64_C(12393906174523604992), // VPCNTvm_v |
| 8675 | UINT64_C(12393906174523604992), // VPCNTvml |
| 8676 | UINT64_C(12393906174523604992), // VPCNTvml_v |
| 8677 | UINT64_C(9799832789158199296), // VRANDv |
| 8678 | UINT64_C(9799832789158199296), // VRANDvL |
| 8679 | UINT64_C(9799832789158199296), // VRANDvL_v |
| 8680 | UINT64_C(9799832789158199296), // VRANDv_v |
| 8681 | UINT64_C(9799832789158199296), // VRANDvl |
| 8682 | UINT64_C(9799832789158199296), // VRANDvl_v |
| 8683 | UINT64_C(9799832789158199296), // VRANDvm |
| 8684 | UINT64_C(9799832789158199296), // VRANDvmL |
| 8685 | UINT64_C(9799832789158199296), // VRANDvmL_v |
| 8686 | UINT64_C(9799832789158199296), // VRANDvm_v |
| 8687 | UINT64_C(9799832789158199296), // VRANDvml |
| 8688 | UINT64_C(9799832789158199296), // VRANDvml_v |
| 8689 | UINT64_C(16212958658533785600), // VRCPDv |
| 8690 | UINT64_C(16212958658533785600), // VRCPDvL |
| 8691 | UINT64_C(16212958658533785600), // VRCPDvL_v |
| 8692 | UINT64_C(16212958658533785600), // VRCPDv_v |
| 8693 | UINT64_C(16212958658533785600), // VRCPDvl |
| 8694 | UINT64_C(16212958658533785600), // VRCPDvl_v |
| 8695 | UINT64_C(16212958658533785600), // VRCPDvm |
| 8696 | UINT64_C(16212958658533785600), // VRCPDvmL |
| 8697 | UINT64_C(16212958658533785600), // VRCPDvmL_v |
| 8698 | UINT64_C(16212958658533785600), // VRCPDvm_v |
| 8699 | UINT64_C(16212958658533785600), // VRCPDvml |
| 8700 | UINT64_C(16212958658533785600), // VRCPDvml_v |
| 8701 | UINT64_C(16248987455552749568), // VRCPSv |
| 8702 | UINT64_C(16248987455552749568), // VRCPSvL |
| 8703 | UINT64_C(16248987455552749568), // VRCPSvL_v |
| 8704 | UINT64_C(16248987455552749568), // VRCPSv_v |
| 8705 | UINT64_C(16248987455552749568), // VRCPSvl |
| 8706 | UINT64_C(16248987455552749568), // VRCPSvl_v |
| 8707 | UINT64_C(16248987455552749568), // VRCPSvm |
| 8708 | UINT64_C(16248987455552749568), // VRCPSvmL |
| 8709 | UINT64_C(16248987455552749568), // VRCPSvmL_v |
| 8710 | UINT64_C(16248987455552749568), // VRCPSvm_v |
| 8711 | UINT64_C(16248987455552749568), // VRCPSvml |
| 8712 | UINT64_C(16248987455552749568), // VRCPSvml_v |
| 8713 | UINT64_C(12321848580485677056), // VRMAXSLFSTv |
| 8714 | UINT64_C(12321848580485677056), // VRMAXSLFSTvL |
| 8715 | UINT64_C(12321848580485677056), // VRMAXSLFSTvL_v |
| 8716 | UINT64_C(12321848580485677056), // VRMAXSLFSTv_v |
| 8717 | UINT64_C(12321848580485677056), // VRMAXSLFSTvl |
| 8718 | UINT64_C(12321848580485677056), // VRMAXSLFSTvl_v |
| 8719 | UINT64_C(12321848580485677056), // VRMAXSLFSTvm |
| 8720 | UINT64_C(12321848580485677056), // VRMAXSLFSTvmL |
| 8721 | UINT64_C(12321848580485677056), // VRMAXSLFSTvmL_v |
| 8722 | UINT64_C(12321848580485677056), // VRMAXSLFSTvm_v |
| 8723 | UINT64_C(12321848580485677056), // VRMAXSLFSTvml |
| 8724 | UINT64_C(12321848580485677056), // VRMAXSLFSTvml_v |
| 8725 | UINT64_C(12330855779740418048), // VRMAXSLLSTv |
| 8726 | UINT64_C(12330855779740418048), // VRMAXSLLSTvL |
| 8727 | UINT64_C(12330855779740418048), // VRMAXSLLSTvL_v |
| 8728 | UINT64_C(12330855779740418048), // VRMAXSLLSTv_v |
| 8729 | UINT64_C(12330855779740418048), // VRMAXSLLSTvl |
| 8730 | UINT64_C(12330855779740418048), // VRMAXSLLSTvl_v |
| 8731 | UINT64_C(12330855779740418048), // VRMAXSLLSTvm |
| 8732 | UINT64_C(12330855779740418048), // VRMAXSLLSTvmL |
| 8733 | UINT64_C(12330855779740418048), // VRMAXSLLSTvmL_v |
| 8734 | UINT64_C(12330855779740418048), // VRMAXSLLSTvm_v |
| 8735 | UINT64_C(12330855779740418048), // VRMAXSLLSTvml |
| 8736 | UINT64_C(12330855779740418048), // VRMAXSLLSTvml_v |
| 8737 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXv |
| 8738 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvL |
| 8739 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvL_v |
| 8740 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXv_v |
| 8741 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvl |
| 8742 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvl_v |
| 8743 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvm |
| 8744 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvmL |
| 8745 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvmL_v |
| 8746 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvm_v |
| 8747 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvml |
| 8748 | UINT64_C(13474770085092524032), // VRMAXSWFSTSXvml_v |
| 8749 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXv |
| 8750 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvL |
| 8751 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvL_v |
| 8752 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXv_v |
| 8753 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvl |
| 8754 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvl_v |
| 8755 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvm |
| 8756 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvmL |
| 8757 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvmL_v |
| 8758 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvm_v |
| 8759 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvml |
| 8760 | UINT64_C(13492784483602006016), // VRMAXSWFSTZXvml_v |
| 8761 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXv |
| 8762 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvL |
| 8763 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvL_v |
| 8764 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXv_v |
| 8765 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvl |
| 8766 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvl_v |
| 8767 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvm |
| 8768 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvmL |
| 8769 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvmL_v |
| 8770 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvm_v |
| 8771 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvml |
| 8772 | UINT64_C(13483777284347265024), // VRMAXSWLSTSXvml_v |
| 8773 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXv |
| 8774 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvL |
| 8775 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvL_v |
| 8776 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXv_v |
| 8777 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvl |
| 8778 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvl_v |
| 8779 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvm |
| 8780 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvmL |
| 8781 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvmL_v |
| 8782 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvm_v |
| 8783 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvml |
| 8784 | UINT64_C(13501791682856747008), // VRMAXSWLSTZXvml_v |
| 8785 | UINT64_C(12326352180113047552), // VRMINSLFSTv |
| 8786 | UINT64_C(12326352180113047552), // VRMINSLFSTvL |
| 8787 | UINT64_C(12326352180113047552), // VRMINSLFSTvL_v |
| 8788 | UINT64_C(12326352180113047552), // VRMINSLFSTv_v |
| 8789 | UINT64_C(12326352180113047552), // VRMINSLFSTvl |
| 8790 | UINT64_C(12326352180113047552), // VRMINSLFSTvl_v |
| 8791 | UINT64_C(12326352180113047552), // VRMINSLFSTvm |
| 8792 | UINT64_C(12326352180113047552), // VRMINSLFSTvmL |
| 8793 | UINT64_C(12326352180113047552), // VRMINSLFSTvmL_v |
| 8794 | UINT64_C(12326352180113047552), // VRMINSLFSTvm_v |
| 8795 | UINT64_C(12326352180113047552), // VRMINSLFSTvml |
| 8796 | UINT64_C(12326352180113047552), // VRMINSLFSTvml_v |
| 8797 | UINT64_C(12335359379367788544), // VRMINSLLSTv |
| 8798 | UINT64_C(12335359379367788544), // VRMINSLLSTvL |
| 8799 | UINT64_C(12335359379367788544), // VRMINSLLSTvL_v |
| 8800 | UINT64_C(12335359379367788544), // VRMINSLLSTv_v |
| 8801 | UINT64_C(12335359379367788544), // VRMINSLLSTvl |
| 8802 | UINT64_C(12335359379367788544), // VRMINSLLSTvl_v |
| 8803 | UINT64_C(12335359379367788544), // VRMINSLLSTvm |
| 8804 | UINT64_C(12335359379367788544), // VRMINSLLSTvmL |
| 8805 | UINT64_C(12335359379367788544), // VRMINSLLSTvmL_v |
| 8806 | UINT64_C(12335359379367788544), // VRMINSLLSTvm_v |
| 8807 | UINT64_C(12335359379367788544), // VRMINSLLSTvml |
| 8808 | UINT64_C(12335359379367788544), // VRMINSLLSTvml_v |
| 8809 | UINT64_C(13479273684719894528), // VRMINSWFSTSXv |
| 8810 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvL |
| 8811 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvL_v |
| 8812 | UINT64_C(13479273684719894528), // VRMINSWFSTSXv_v |
| 8813 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvl |
| 8814 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvl_v |
| 8815 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvm |
| 8816 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvmL |
| 8817 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvmL_v |
| 8818 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvm_v |
| 8819 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvml |
| 8820 | UINT64_C(13479273684719894528), // VRMINSWFSTSXvml_v |
| 8821 | UINT64_C(13497288083229376512), // VRMINSWFSTZXv |
| 8822 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvL |
| 8823 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvL_v |
| 8824 | UINT64_C(13497288083229376512), // VRMINSWFSTZXv_v |
| 8825 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvl |
| 8826 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvl_v |
| 8827 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvm |
| 8828 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvmL |
| 8829 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvmL_v |
| 8830 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvm_v |
| 8831 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvml |
| 8832 | UINT64_C(13497288083229376512), // VRMINSWFSTZXvml_v |
| 8833 | UINT64_C(13488280883974635520), // VRMINSWLSTSXv |
| 8834 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvL |
| 8835 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvL_v |
| 8836 | UINT64_C(13488280883974635520), // VRMINSWLSTSXv_v |
| 8837 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvl |
| 8838 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvl_v |
| 8839 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvm |
| 8840 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvmL |
| 8841 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvmL_v |
| 8842 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvm_v |
| 8843 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvml |
| 8844 | UINT64_C(13488280883974635520), // VRMINSWLSTSXvml_v |
| 8845 | UINT64_C(13506295282484117504), // VRMINSWLSTZXv |
| 8846 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvL |
| 8847 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvL_v |
| 8848 | UINT64_C(13506295282484117504), // VRMINSWLSTZXv_v |
| 8849 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvl |
| 8850 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvl_v |
| 8851 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvm |
| 8852 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvmL |
| 8853 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvmL_v |
| 8854 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvm_v |
| 8855 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvml |
| 8856 | UINT64_C(13506295282484117504), // VRMINSWLSTZXvml_v |
| 8857 | UINT64_C(10952754293765046272), // VRORv |
| 8858 | UINT64_C(10952754293765046272), // VRORvL |
| 8859 | UINT64_C(10952754293765046272), // VRORvL_v |
| 8860 | UINT64_C(10952754293765046272), // VRORv_v |
| 8861 | UINT64_C(10952754293765046272), // VRORvl |
| 8862 | UINT64_C(10952754293765046272), // VRORvl_v |
| 8863 | UINT64_C(10952754293765046272), // VRORvm |
| 8864 | UINT64_C(10952754293765046272), // VRORvmL |
| 8865 | UINT64_C(10952754293765046272), // VRORvmL_v |
| 8866 | UINT64_C(10952754293765046272), // VRORvm_v |
| 8867 | UINT64_C(10952754293765046272), // VRORvml |
| 8868 | UINT64_C(10952754293765046272), // VRORvml_v |
| 8869 | UINT64_C(17370383762768003072), // VRSQRTDNEXv |
| 8870 | UINT64_C(17370383762768003072), // VRSQRTDNEXvL |
| 8871 | UINT64_C(17370383762768003072), // VRSQRTDNEXvL_v |
| 8872 | UINT64_C(17370383762768003072), // VRSQRTDNEXv_v |
| 8873 | UINT64_C(17370383762768003072), // VRSQRTDNEXvl |
| 8874 | UINT64_C(17370383762768003072), // VRSQRTDNEXvl_v |
| 8875 | UINT64_C(17370383762768003072), // VRSQRTDNEXvm |
| 8876 | UINT64_C(17370383762768003072), // VRSQRTDNEXvmL |
| 8877 | UINT64_C(17370383762768003072), // VRSQRTDNEXvmL_v |
| 8878 | UINT64_C(17370383762768003072), // VRSQRTDNEXvm_v |
| 8879 | UINT64_C(17370383762768003072), // VRSQRTDNEXvml |
| 8880 | UINT64_C(17370383762768003072), // VRSQRTDNEXvml_v |
| 8881 | UINT64_C(17365880163140632576), // VRSQRTDv |
| 8882 | UINT64_C(17365880163140632576), // VRSQRTDvL |
| 8883 | UINT64_C(17365880163140632576), // VRSQRTDvL_v |
| 8884 | UINT64_C(17365880163140632576), // VRSQRTDv_v |
| 8885 | UINT64_C(17365880163140632576), // VRSQRTDvl |
| 8886 | UINT64_C(17365880163140632576), // VRSQRTDvl_v |
| 8887 | UINT64_C(17365880163140632576), // VRSQRTDvm |
| 8888 | UINT64_C(17365880163140632576), // VRSQRTDvmL |
| 8889 | UINT64_C(17365880163140632576), // VRSQRTDvmL_v |
| 8890 | UINT64_C(17365880163140632576), // VRSQRTDvm_v |
| 8891 | UINT64_C(17365880163140632576), // VRSQRTDvml |
| 8892 | UINT64_C(17365880163140632576), // VRSQRTDvml_v |
| 8893 | UINT64_C(17406412559786967040), // VRSQRTSNEXv |
| 8894 | UINT64_C(17406412559786967040), // VRSQRTSNEXvL |
| 8895 | UINT64_C(17406412559786967040), // VRSQRTSNEXvL_v |
| 8896 | UINT64_C(17406412559786967040), // VRSQRTSNEXv_v |
| 8897 | UINT64_C(17406412559786967040), // VRSQRTSNEXvl |
| 8898 | UINT64_C(17406412559786967040), // VRSQRTSNEXvl_v |
| 8899 | UINT64_C(17406412559786967040), // VRSQRTSNEXvm |
| 8900 | UINT64_C(17406412559786967040), // VRSQRTSNEXvmL |
| 8901 | UINT64_C(17406412559786967040), // VRSQRTSNEXvmL_v |
| 8902 | UINT64_C(17406412559786967040), // VRSQRTSNEXvm_v |
| 8903 | UINT64_C(17406412559786967040), // VRSQRTSNEXvml |
| 8904 | UINT64_C(17406412559786967040), // VRSQRTSNEXvml_v |
| 8905 | UINT64_C(17401908960159596544), // VRSQRTSv |
| 8906 | UINT64_C(17401908960159596544), // VRSQRTSvL |
| 8907 | UINT64_C(17401908960159596544), // VRSQRTSvL_v |
| 8908 | UINT64_C(17401908960159596544), // VRSQRTSv_v |
| 8909 | UINT64_C(17401908960159596544), // VRSQRTSvl |
| 8910 | UINT64_C(17401908960159596544), // VRSQRTSvl_v |
| 8911 | UINT64_C(17401908960159596544), // VRSQRTSvm |
| 8912 | UINT64_C(17401908960159596544), // VRSQRTSvmL |
| 8913 | UINT64_C(17401908960159596544), // VRSQRTSvmL_v |
| 8914 | UINT64_C(17401908960159596544), // VRSQRTSvm_v |
| 8915 | UINT64_C(17401908960159596544), // VRSQRTSvml |
| 8916 | UINT64_C(17401908960159596544), // VRSQRTSvml_v |
| 8917 | UINT64_C(9871890383196127232), // VRXORv |
| 8918 | UINT64_C(9871890383196127232), // VRXORvL |
| 8919 | UINT64_C(9871890383196127232), // VRXORvL_v |
| 8920 | UINT64_C(9871890383196127232), // VRXORv_v |
| 8921 | UINT64_C(9871890383196127232), // VRXORvl |
| 8922 | UINT64_C(9871890383196127232), // VRXORvl_v |
| 8923 | UINT64_C(9871890383196127232), // VRXORvm |
| 8924 | UINT64_C(9871890383196127232), // VRXORvmL |
| 8925 | UINT64_C(9871890383196127232), // VRXORvmL_v |
| 8926 | UINT64_C(9871890383196127232), // VRXORvm_v |
| 8927 | UINT64_C(9871890383196127232), // VRXORvml |
| 8928 | UINT64_C(9871890383196127232), // VRXORvml_v |
| 8929 | UINT64_C(12943345878818619392), // VSCLNCOTsirv |
| 8930 | UINT64_C(12943345878818619392), // VSCLNCOTsirvL |
| 8931 | UINT64_C(12943345878818619392), // VSCLNCOTsirvl |
| 8932 | UINT64_C(12943345878818619392), // VSCLNCOTsirvm |
| 8933 | UINT64_C(12943345878818619392), // VSCLNCOTsirvmL |
| 8934 | UINT64_C(12943345878818619392), // VSCLNCOTsirvml |
| 8935 | UINT64_C(12943345329062805504), // VSCLNCOTsizv |
| 8936 | UINT64_C(12943345329062805504), // VSCLNCOTsizvL |
| 8937 | UINT64_C(12943345329062805504), // VSCLNCOTsizvl |
| 8938 | UINT64_C(12943345329062805504), // VSCLNCOTsizvm |
| 8939 | UINT64_C(12943345329062805504), // VSCLNCOTsizvmL |
| 8940 | UINT64_C(12943345329062805504), // VSCLNCOTsizvml |
| 8941 | UINT64_C(12943486616306974720), // VSCLNCOTsrrv |
| 8942 | UINT64_C(12943486616306974720), // VSCLNCOTsrrvL |
| 8943 | UINT64_C(12943486616306974720), // VSCLNCOTsrrvl |
| 8944 | UINT64_C(12943486616306974720), // VSCLNCOTsrrvm |
| 8945 | UINT64_C(12943486616306974720), // VSCLNCOTsrrvmL |
| 8946 | UINT64_C(12943486616306974720), // VSCLNCOTsrrvml |
| 8947 | UINT64_C(12943486066551160832), // VSCLNCOTsrzv |
| 8948 | UINT64_C(12943486066551160832), // VSCLNCOTsrzvL |
| 8949 | UINT64_C(12943486066551160832), // VSCLNCOTsrzvl |
| 8950 | UINT64_C(12943486066551160832), // VSCLNCOTsrzvm |
| 8951 | UINT64_C(12943486066551160832), // VSCLNCOTsrzvmL |
| 8952 | UINT64_C(12943486066551160832), // VSCLNCOTsrzvml |
| 8953 | UINT64_C(12934338679563878400), // VSCLNCOTvirv |
| 8954 | UINT64_C(12934338679563878400), // VSCLNCOTvirvL |
| 8955 | UINT64_C(12934338679563878400), // VSCLNCOTvirvl |
| 8956 | UINT64_C(12934338679563878400), // VSCLNCOTvirvm |
| 8957 | UINT64_C(12934338679563878400), // VSCLNCOTvirvmL |
| 8958 | UINT64_C(12934338679563878400), // VSCLNCOTvirvml |
| 8959 | UINT64_C(12934338129808064512), // VSCLNCOTvizv |
| 8960 | UINT64_C(12934338129808064512), // VSCLNCOTvizvL |
| 8961 | UINT64_C(12934338129808064512), // VSCLNCOTvizvl |
| 8962 | UINT64_C(12934338129808064512), // VSCLNCOTvizvm |
| 8963 | UINT64_C(12934338129808064512), // VSCLNCOTvizvmL |
| 8964 | UINT64_C(12934338129808064512), // VSCLNCOTvizvml |
| 8965 | UINT64_C(12934479417052233728), // VSCLNCOTvrrv |
| 8966 | UINT64_C(12934479417052233728), // VSCLNCOTvrrvL |
| 8967 | UINT64_C(12934479417052233728), // VSCLNCOTvrrvl |
| 8968 | UINT64_C(12934479417052233728), // VSCLNCOTvrrvm |
| 8969 | UINT64_C(12934479417052233728), // VSCLNCOTvrrvmL |
| 8970 | UINT64_C(12934479417052233728), // VSCLNCOTvrrvml |
| 8971 | UINT64_C(12934478867296419840), // VSCLNCOTvrzv |
| 8972 | UINT64_C(12934478867296419840), // VSCLNCOTvrzvL |
| 8973 | UINT64_C(12934478867296419840), // VSCLNCOTvrzvl |
| 8974 | UINT64_C(12934478867296419840), // VSCLNCOTvrzvm |
| 8975 | UINT64_C(12934478867296419840), // VSCLNCOTvrzvmL |
| 8976 | UINT64_C(12934478867296419840), // VSCLNCOTvrzvml |
| 8977 | UINT64_C(12907317081799655424), // VSCLNCsirv |
| 8978 | UINT64_C(12907317081799655424), // VSCLNCsirvL |
| 8979 | UINT64_C(12907317081799655424), // VSCLNCsirvl |
| 8980 | UINT64_C(12907317081799655424), // VSCLNCsirvm |
| 8981 | UINT64_C(12907317081799655424), // VSCLNCsirvmL |
| 8982 | UINT64_C(12907317081799655424), // VSCLNCsirvml |
| 8983 | UINT64_C(12907316532043841536), // VSCLNCsizv |
| 8984 | UINT64_C(12907316532043841536), // VSCLNCsizvL |
| 8985 | UINT64_C(12907316532043841536), // VSCLNCsizvl |
| 8986 | UINT64_C(12907316532043841536), // VSCLNCsizvm |
| 8987 | UINT64_C(12907316532043841536), // VSCLNCsizvmL |
| 8988 | UINT64_C(12907316532043841536), // VSCLNCsizvml |
| 8989 | UINT64_C(12907457819288010752), // VSCLNCsrrv |
| 8990 | UINT64_C(12907457819288010752), // VSCLNCsrrvL |
| 8991 | UINT64_C(12907457819288010752), // VSCLNCsrrvl |
| 8992 | UINT64_C(12907457819288010752), // VSCLNCsrrvm |
| 8993 | UINT64_C(12907457819288010752), // VSCLNCsrrvmL |
| 8994 | UINT64_C(12907457819288010752), // VSCLNCsrrvml |
| 8995 | UINT64_C(12907457269532196864), // VSCLNCsrzv |
| 8996 | UINT64_C(12907457269532196864), // VSCLNCsrzvL |
| 8997 | UINT64_C(12907457269532196864), // VSCLNCsrzvl |
| 8998 | UINT64_C(12907457269532196864), // VSCLNCsrzvm |
| 8999 | UINT64_C(12907457269532196864), // VSCLNCsrzvmL |
| 9000 | UINT64_C(12907457269532196864), // VSCLNCsrzvml |
| 9001 | UINT64_C(12898309882544914432), // VSCLNCvirv |
| 9002 | UINT64_C(12898309882544914432), // VSCLNCvirvL |
| 9003 | UINT64_C(12898309882544914432), // VSCLNCvirvl |
| 9004 | UINT64_C(12898309882544914432), // VSCLNCvirvm |
| 9005 | UINT64_C(12898309882544914432), // VSCLNCvirvmL |
| 9006 | UINT64_C(12898309882544914432), // VSCLNCvirvml |
| 9007 | UINT64_C(12898309332789100544), // VSCLNCvizv |
| 9008 | UINT64_C(12898309332789100544), // VSCLNCvizvL |
| 9009 | UINT64_C(12898309332789100544), // VSCLNCvizvl |
| 9010 | UINT64_C(12898309332789100544), // VSCLNCvizvm |
| 9011 | UINT64_C(12898309332789100544), // VSCLNCvizvmL |
| 9012 | UINT64_C(12898309332789100544), // VSCLNCvizvml |
| 9013 | UINT64_C(12898450620033269760), // VSCLNCvrrv |
| 9014 | UINT64_C(12898450620033269760), // VSCLNCvrrvL |
| 9015 | UINT64_C(12898450620033269760), // VSCLNCvrrvl |
| 9016 | UINT64_C(12898450620033269760), // VSCLNCvrrvm |
| 9017 | UINT64_C(12898450620033269760), // VSCLNCvrrvmL |
| 9018 | UINT64_C(12898450620033269760), // VSCLNCvrrvml |
| 9019 | UINT64_C(12898450070277455872), // VSCLNCvrzv |
| 9020 | UINT64_C(12898450070277455872), // VSCLNCvrzvL |
| 9021 | UINT64_C(12898450070277455872), // VSCLNCvrzvl |
| 9022 | UINT64_C(12898450070277455872), // VSCLNCvrzvm |
| 9023 | UINT64_C(12898450070277455872), // VSCLNCvrzvmL |
| 9024 | UINT64_C(12898450070277455872), // VSCLNCvrzvml |
| 9025 | UINT64_C(12961360277328101376), // VSCLOTsirv |
| 9026 | UINT64_C(12961360277328101376), // VSCLOTsirvL |
| 9027 | UINT64_C(12961360277328101376), // VSCLOTsirvl |
| 9028 | UINT64_C(12961360277328101376), // VSCLOTsirvm |
| 9029 | UINT64_C(12961360277328101376), // VSCLOTsirvmL |
| 9030 | UINT64_C(12961360277328101376), // VSCLOTsirvml |
| 9031 | UINT64_C(12961359727572287488), // VSCLOTsizv |
| 9032 | UINT64_C(12961359727572287488), // VSCLOTsizvL |
| 9033 | UINT64_C(12961359727572287488), // VSCLOTsizvl |
| 9034 | UINT64_C(12961359727572287488), // VSCLOTsizvm |
| 9035 | UINT64_C(12961359727572287488), // VSCLOTsizvmL |
| 9036 | UINT64_C(12961359727572287488), // VSCLOTsizvml |
| 9037 | UINT64_C(12961501014816456704), // VSCLOTsrrv |
| 9038 | UINT64_C(12961501014816456704), // VSCLOTsrrvL |
| 9039 | UINT64_C(12961501014816456704), // VSCLOTsrrvl |
| 9040 | UINT64_C(12961501014816456704), // VSCLOTsrrvm |
| 9041 | UINT64_C(12961501014816456704), // VSCLOTsrrvmL |
| 9042 | UINT64_C(12961501014816456704), // VSCLOTsrrvml |
| 9043 | UINT64_C(12961500465060642816), // VSCLOTsrzv |
| 9044 | UINT64_C(12961500465060642816), // VSCLOTsrzvL |
| 9045 | UINT64_C(12961500465060642816), // VSCLOTsrzvl |
| 9046 | UINT64_C(12961500465060642816), // VSCLOTsrzvm |
| 9047 | UINT64_C(12961500465060642816), // VSCLOTsrzvmL |
| 9048 | UINT64_C(12961500465060642816), // VSCLOTsrzvml |
| 9049 | UINT64_C(12952353078073360384), // VSCLOTvirv |
| 9050 | UINT64_C(12952353078073360384), // VSCLOTvirvL |
| 9051 | UINT64_C(12952353078073360384), // VSCLOTvirvl |
| 9052 | UINT64_C(12952353078073360384), // VSCLOTvirvm |
| 9053 | UINT64_C(12952353078073360384), // VSCLOTvirvmL |
| 9054 | UINT64_C(12952353078073360384), // VSCLOTvirvml |
| 9055 | UINT64_C(12952352528317546496), // VSCLOTvizv |
| 9056 | UINT64_C(12952352528317546496), // VSCLOTvizvL |
| 9057 | UINT64_C(12952352528317546496), // VSCLOTvizvl |
| 9058 | UINT64_C(12952352528317546496), // VSCLOTvizvm |
| 9059 | UINT64_C(12952352528317546496), // VSCLOTvizvmL |
| 9060 | UINT64_C(12952352528317546496), // VSCLOTvizvml |
| 9061 | UINT64_C(12952493815561715712), // VSCLOTvrrv |
| 9062 | UINT64_C(12952493815561715712), // VSCLOTvrrvL |
| 9063 | UINT64_C(12952493815561715712), // VSCLOTvrrvl |
| 9064 | UINT64_C(12952493815561715712), // VSCLOTvrrvm |
| 9065 | UINT64_C(12952493815561715712), // VSCLOTvrrvmL |
| 9066 | UINT64_C(12952493815561715712), // VSCLOTvrrvml |
| 9067 | UINT64_C(12952493265805901824), // VSCLOTvrzv |
| 9068 | UINT64_C(12952493265805901824), // VSCLOTvrzvL |
| 9069 | UINT64_C(12952493265805901824), // VSCLOTvrzvl |
| 9070 | UINT64_C(12952493265805901824), // VSCLOTvrzvm |
| 9071 | UINT64_C(12952493265805901824), // VSCLOTvrzvmL |
| 9072 | UINT64_C(12952493265805901824), // VSCLOTvrzvml |
| 9073 | UINT64_C(12925331480309137408), // VSCLsirv |
| 9074 | UINT64_C(12925331480309137408), // VSCLsirvL |
| 9075 | UINT64_C(12925331480309137408), // VSCLsirvl |
| 9076 | UINT64_C(12925331480309137408), // VSCLsirvm |
| 9077 | UINT64_C(12925331480309137408), // VSCLsirvmL |
| 9078 | UINT64_C(12925331480309137408), // VSCLsirvml |
| 9079 | UINT64_C(12925330930553323520), // VSCLsizv |
| 9080 | UINT64_C(12925330930553323520), // VSCLsizvL |
| 9081 | UINT64_C(12925330930553323520), // VSCLsizvl |
| 9082 | UINT64_C(12925330930553323520), // VSCLsizvm |
| 9083 | UINT64_C(12925330930553323520), // VSCLsizvmL |
| 9084 | UINT64_C(12925330930553323520), // VSCLsizvml |
| 9085 | UINT64_C(12925472217797492736), // VSCLsrrv |
| 9086 | UINT64_C(12925472217797492736), // VSCLsrrvL |
| 9087 | UINT64_C(12925472217797492736), // VSCLsrrvl |
| 9088 | UINT64_C(12925472217797492736), // VSCLsrrvm |
| 9089 | UINT64_C(12925472217797492736), // VSCLsrrvmL |
| 9090 | UINT64_C(12925472217797492736), // VSCLsrrvml |
| 9091 | UINT64_C(12925471668041678848), // VSCLsrzv |
| 9092 | UINT64_C(12925471668041678848), // VSCLsrzvL |
| 9093 | UINT64_C(12925471668041678848), // VSCLsrzvl |
| 9094 | UINT64_C(12925471668041678848), // VSCLsrzvm |
| 9095 | UINT64_C(12925471668041678848), // VSCLsrzvmL |
| 9096 | UINT64_C(12925471668041678848), // VSCLsrzvml |
| 9097 | UINT64_C(12916324281054396416), // VSCLvirv |
| 9098 | UINT64_C(12916324281054396416), // VSCLvirvL |
| 9099 | UINT64_C(12916324281054396416), // VSCLvirvl |
| 9100 | UINT64_C(12916324281054396416), // VSCLvirvm |
| 9101 | UINT64_C(12916324281054396416), // VSCLvirvmL |
| 9102 | UINT64_C(12916324281054396416), // VSCLvirvml |
| 9103 | UINT64_C(12916323731298582528), // VSCLvizv |
| 9104 | UINT64_C(12916323731298582528), // VSCLvizvL |
| 9105 | UINT64_C(12916323731298582528), // VSCLvizvl |
| 9106 | UINT64_C(12916323731298582528), // VSCLvizvm |
| 9107 | UINT64_C(12916323731298582528), // VSCLvizvmL |
| 9108 | UINT64_C(12916323731298582528), // VSCLvizvml |
| 9109 | UINT64_C(12916465018542751744), // VSCLvrrv |
| 9110 | UINT64_C(12916465018542751744), // VSCLvrrvL |
| 9111 | UINT64_C(12916465018542751744), // VSCLvrrvl |
| 9112 | UINT64_C(12916465018542751744), // VSCLvrrvm |
| 9113 | UINT64_C(12916465018542751744), // VSCLvrrvmL |
| 9114 | UINT64_C(12916465018542751744), // VSCLvrrvml |
| 9115 | UINT64_C(12916464468786937856), // VSCLvrzv |
| 9116 | UINT64_C(12916464468786937856), // VSCLvrzvL |
| 9117 | UINT64_C(12916464468786937856), // VSCLvrzvl |
| 9118 | UINT64_C(12916464468786937856), // VSCLvrzvm |
| 9119 | UINT64_C(12916464468786937856), // VSCLvrzvmL |
| 9120 | UINT64_C(12916464468786937856), // VSCLvrzvml |
| 9121 | UINT64_C(12799230690742763520), // VSCNCOTsirv |
| 9122 | UINT64_C(12799230690742763520), // VSCNCOTsirvL |
| 9123 | UINT64_C(12799230690742763520), // VSCNCOTsirvl |
| 9124 | UINT64_C(12799230690742763520), // VSCNCOTsirvm |
| 9125 | UINT64_C(12799230690742763520), // VSCNCOTsirvmL |
| 9126 | UINT64_C(12799230690742763520), // VSCNCOTsirvml |
| 9127 | UINT64_C(12799230140986949632), // VSCNCOTsizv |
| 9128 | UINT64_C(12799230140986949632), // VSCNCOTsizvL |
| 9129 | UINT64_C(12799230140986949632), // VSCNCOTsizvl |
| 9130 | UINT64_C(12799230140986949632), // VSCNCOTsizvm |
| 9131 | UINT64_C(12799230140986949632), // VSCNCOTsizvmL |
| 9132 | UINT64_C(12799230140986949632), // VSCNCOTsizvml |
| 9133 | UINT64_C(12799371428231118848), // VSCNCOTsrrv |
| 9134 | UINT64_C(12799371428231118848), // VSCNCOTsrrvL |
| 9135 | UINT64_C(12799371428231118848), // VSCNCOTsrrvl |
| 9136 | UINT64_C(12799371428231118848), // VSCNCOTsrrvm |
| 9137 | UINT64_C(12799371428231118848), // VSCNCOTsrrvmL |
| 9138 | UINT64_C(12799371428231118848), // VSCNCOTsrrvml |
| 9139 | UINT64_C(12799370878475304960), // VSCNCOTsrzv |
| 9140 | UINT64_C(12799370878475304960), // VSCNCOTsrzvL |
| 9141 | UINT64_C(12799370878475304960), // VSCNCOTsrzvl |
| 9142 | UINT64_C(12799370878475304960), // VSCNCOTsrzvm |
| 9143 | UINT64_C(12799370878475304960), // VSCNCOTsrzvmL |
| 9144 | UINT64_C(12799370878475304960), // VSCNCOTsrzvml |
| 9145 | UINT64_C(12790223491488022528), // VSCNCOTvirv |
| 9146 | UINT64_C(12790223491488022528), // VSCNCOTvirvL |
| 9147 | UINT64_C(12790223491488022528), // VSCNCOTvirvl |
| 9148 | UINT64_C(12790223491488022528), // VSCNCOTvirvm |
| 9149 | UINT64_C(12790223491488022528), // VSCNCOTvirvmL |
| 9150 | UINT64_C(12790223491488022528), // VSCNCOTvirvml |
| 9151 | UINT64_C(12790222941732208640), // VSCNCOTvizv |
| 9152 | UINT64_C(12790222941732208640), // VSCNCOTvizvL |
| 9153 | UINT64_C(12790222941732208640), // VSCNCOTvizvl |
| 9154 | UINT64_C(12790222941732208640), // VSCNCOTvizvm |
| 9155 | UINT64_C(12790222941732208640), // VSCNCOTvizvmL |
| 9156 | UINT64_C(12790222941732208640), // VSCNCOTvizvml |
| 9157 | UINT64_C(12790364228976377856), // VSCNCOTvrrv |
| 9158 | UINT64_C(12790364228976377856), // VSCNCOTvrrvL |
| 9159 | UINT64_C(12790364228976377856), // VSCNCOTvrrvl |
| 9160 | UINT64_C(12790364228976377856), // VSCNCOTvrrvm |
| 9161 | UINT64_C(12790364228976377856), // VSCNCOTvrrvmL |
| 9162 | UINT64_C(12790364228976377856), // VSCNCOTvrrvml |
| 9163 | UINT64_C(12790363679220563968), // VSCNCOTvrzv |
| 9164 | UINT64_C(12790363679220563968), // VSCNCOTvrzvL |
| 9165 | UINT64_C(12790363679220563968), // VSCNCOTvrzvl |
| 9166 | UINT64_C(12790363679220563968), // VSCNCOTvrzvm |
| 9167 | UINT64_C(12790363679220563968), // VSCNCOTvrzvmL |
| 9168 | UINT64_C(12790363679220563968), // VSCNCOTvrzvml |
| 9169 | UINT64_C(12763201893723799552), // VSCNCsirv |
| 9170 | UINT64_C(12763201893723799552), // VSCNCsirvL |
| 9171 | UINT64_C(12763201893723799552), // VSCNCsirvl |
| 9172 | UINT64_C(12763201893723799552), // VSCNCsirvm |
| 9173 | UINT64_C(12763201893723799552), // VSCNCsirvmL |
| 9174 | UINT64_C(12763201893723799552), // VSCNCsirvml |
| 9175 | UINT64_C(12763201343967985664), // VSCNCsizv |
| 9176 | UINT64_C(12763201343967985664), // VSCNCsizvL |
| 9177 | UINT64_C(12763201343967985664), // VSCNCsizvl |
| 9178 | UINT64_C(12763201343967985664), // VSCNCsizvm |
| 9179 | UINT64_C(12763201343967985664), // VSCNCsizvmL |
| 9180 | UINT64_C(12763201343967985664), // VSCNCsizvml |
| 9181 | UINT64_C(12763342631212154880), // VSCNCsrrv |
| 9182 | UINT64_C(12763342631212154880), // VSCNCsrrvL |
| 9183 | UINT64_C(12763342631212154880), // VSCNCsrrvl |
| 9184 | UINT64_C(12763342631212154880), // VSCNCsrrvm |
| 9185 | UINT64_C(12763342631212154880), // VSCNCsrrvmL |
| 9186 | UINT64_C(12763342631212154880), // VSCNCsrrvml |
| 9187 | UINT64_C(12763342081456340992), // VSCNCsrzv |
| 9188 | UINT64_C(12763342081456340992), // VSCNCsrzvL |
| 9189 | UINT64_C(12763342081456340992), // VSCNCsrzvl |
| 9190 | UINT64_C(12763342081456340992), // VSCNCsrzvm |
| 9191 | UINT64_C(12763342081456340992), // VSCNCsrzvmL |
| 9192 | UINT64_C(12763342081456340992), // VSCNCsrzvml |
| 9193 | UINT64_C(12754194694469058560), // VSCNCvirv |
| 9194 | UINT64_C(12754194694469058560), // VSCNCvirvL |
| 9195 | UINT64_C(12754194694469058560), // VSCNCvirvl |
| 9196 | UINT64_C(12754194694469058560), // VSCNCvirvm |
| 9197 | UINT64_C(12754194694469058560), // VSCNCvirvmL |
| 9198 | UINT64_C(12754194694469058560), // VSCNCvirvml |
| 9199 | UINT64_C(12754194144713244672), // VSCNCvizv |
| 9200 | UINT64_C(12754194144713244672), // VSCNCvizvL |
| 9201 | UINT64_C(12754194144713244672), // VSCNCvizvl |
| 9202 | UINT64_C(12754194144713244672), // VSCNCvizvm |
| 9203 | UINT64_C(12754194144713244672), // VSCNCvizvmL |
| 9204 | UINT64_C(12754194144713244672), // VSCNCvizvml |
| 9205 | UINT64_C(12754335431957413888), // VSCNCvrrv |
| 9206 | UINT64_C(12754335431957413888), // VSCNCvrrvL |
| 9207 | UINT64_C(12754335431957413888), // VSCNCvrrvl |
| 9208 | UINT64_C(12754335431957413888), // VSCNCvrrvm |
| 9209 | UINT64_C(12754335431957413888), // VSCNCvrrvmL |
| 9210 | UINT64_C(12754335431957413888), // VSCNCvrrvml |
| 9211 | UINT64_C(12754334882201600000), // VSCNCvrzv |
| 9212 | UINT64_C(12754334882201600000), // VSCNCvrzvL |
| 9213 | UINT64_C(12754334882201600000), // VSCNCvrzvl |
| 9214 | UINT64_C(12754334882201600000), // VSCNCvrzvm |
| 9215 | UINT64_C(12754334882201600000), // VSCNCvrzvmL |
| 9216 | UINT64_C(12754334882201600000), // VSCNCvrzvml |
| 9217 | UINT64_C(12817245089252245504), // VSCOTsirv |
| 9218 | UINT64_C(12817245089252245504), // VSCOTsirvL |
| 9219 | UINT64_C(12817245089252245504), // VSCOTsirvl |
| 9220 | UINT64_C(12817245089252245504), // VSCOTsirvm |
| 9221 | UINT64_C(12817245089252245504), // VSCOTsirvmL |
| 9222 | UINT64_C(12817245089252245504), // VSCOTsirvml |
| 9223 | UINT64_C(12817244539496431616), // VSCOTsizv |
| 9224 | UINT64_C(12817244539496431616), // VSCOTsizvL |
| 9225 | UINT64_C(12817244539496431616), // VSCOTsizvl |
| 9226 | UINT64_C(12817244539496431616), // VSCOTsizvm |
| 9227 | UINT64_C(12817244539496431616), // VSCOTsizvmL |
| 9228 | UINT64_C(12817244539496431616), // VSCOTsizvml |
| 9229 | UINT64_C(12817385826740600832), // VSCOTsrrv |
| 9230 | UINT64_C(12817385826740600832), // VSCOTsrrvL |
| 9231 | UINT64_C(12817385826740600832), // VSCOTsrrvl |
| 9232 | UINT64_C(12817385826740600832), // VSCOTsrrvm |
| 9233 | UINT64_C(12817385826740600832), // VSCOTsrrvmL |
| 9234 | UINT64_C(12817385826740600832), // VSCOTsrrvml |
| 9235 | UINT64_C(12817385276984786944), // VSCOTsrzv |
| 9236 | UINT64_C(12817385276984786944), // VSCOTsrzvL |
| 9237 | UINT64_C(12817385276984786944), // VSCOTsrzvl |
| 9238 | UINT64_C(12817385276984786944), // VSCOTsrzvm |
| 9239 | UINT64_C(12817385276984786944), // VSCOTsrzvmL |
| 9240 | UINT64_C(12817385276984786944), // VSCOTsrzvml |
| 9241 | UINT64_C(12808237889997504512), // VSCOTvirv |
| 9242 | UINT64_C(12808237889997504512), // VSCOTvirvL |
| 9243 | UINT64_C(12808237889997504512), // VSCOTvirvl |
| 9244 | UINT64_C(12808237889997504512), // VSCOTvirvm |
| 9245 | UINT64_C(12808237889997504512), // VSCOTvirvmL |
| 9246 | UINT64_C(12808237889997504512), // VSCOTvirvml |
| 9247 | UINT64_C(12808237340241690624), // VSCOTvizv |
| 9248 | UINT64_C(12808237340241690624), // VSCOTvizvL |
| 9249 | UINT64_C(12808237340241690624), // VSCOTvizvl |
| 9250 | UINT64_C(12808237340241690624), // VSCOTvizvm |
| 9251 | UINT64_C(12808237340241690624), // VSCOTvizvmL |
| 9252 | UINT64_C(12808237340241690624), // VSCOTvizvml |
| 9253 | UINT64_C(12808378627485859840), // VSCOTvrrv |
| 9254 | UINT64_C(12808378627485859840), // VSCOTvrrvL |
| 9255 | UINT64_C(12808378627485859840), // VSCOTvrrvl |
| 9256 | UINT64_C(12808378627485859840), // VSCOTvrrvm |
| 9257 | UINT64_C(12808378627485859840), // VSCOTvrrvmL |
| 9258 | UINT64_C(12808378627485859840), // VSCOTvrrvml |
| 9259 | UINT64_C(12808378077730045952), // VSCOTvrzv |
| 9260 | UINT64_C(12808378077730045952), // VSCOTvrzvL |
| 9261 | UINT64_C(12808378077730045952), // VSCOTvrzvl |
| 9262 | UINT64_C(12808378077730045952), // VSCOTvrzvm |
| 9263 | UINT64_C(12808378077730045952), // VSCOTvrzvmL |
| 9264 | UINT64_C(12808378077730045952), // VSCOTvrzvml |
| 9265 | UINT64_C(12871288284780691456), // VSCUNCOTsirv |
| 9266 | UINT64_C(12871288284780691456), // VSCUNCOTsirvL |
| 9267 | UINT64_C(12871288284780691456), // VSCUNCOTsirvl |
| 9268 | UINT64_C(12871288284780691456), // VSCUNCOTsirvm |
| 9269 | UINT64_C(12871288284780691456), // VSCUNCOTsirvmL |
| 9270 | UINT64_C(12871288284780691456), // VSCUNCOTsirvml |
| 9271 | UINT64_C(12871287735024877568), // VSCUNCOTsizv |
| 9272 | UINT64_C(12871287735024877568), // VSCUNCOTsizvL |
| 9273 | UINT64_C(12871287735024877568), // VSCUNCOTsizvl |
| 9274 | UINT64_C(12871287735024877568), // VSCUNCOTsizvm |
| 9275 | UINT64_C(12871287735024877568), // VSCUNCOTsizvmL |
| 9276 | UINT64_C(12871287735024877568), // VSCUNCOTsizvml |
| 9277 | UINT64_C(12871429022269046784), // VSCUNCOTsrrv |
| 9278 | UINT64_C(12871429022269046784), // VSCUNCOTsrrvL |
| 9279 | UINT64_C(12871429022269046784), // VSCUNCOTsrrvl |
| 9280 | UINT64_C(12871429022269046784), // VSCUNCOTsrrvm |
| 9281 | UINT64_C(12871429022269046784), // VSCUNCOTsrrvmL |
| 9282 | UINT64_C(12871429022269046784), // VSCUNCOTsrrvml |
| 9283 | UINT64_C(12871428472513232896), // VSCUNCOTsrzv |
| 9284 | UINT64_C(12871428472513232896), // VSCUNCOTsrzvL |
| 9285 | UINT64_C(12871428472513232896), // VSCUNCOTsrzvl |
| 9286 | UINT64_C(12871428472513232896), // VSCUNCOTsrzvm |
| 9287 | UINT64_C(12871428472513232896), // VSCUNCOTsrzvmL |
| 9288 | UINT64_C(12871428472513232896), // VSCUNCOTsrzvml |
| 9289 | UINT64_C(12862281085525950464), // VSCUNCOTvirv |
| 9290 | UINT64_C(12862281085525950464), // VSCUNCOTvirvL |
| 9291 | UINT64_C(12862281085525950464), // VSCUNCOTvirvl |
| 9292 | UINT64_C(12862281085525950464), // VSCUNCOTvirvm |
| 9293 | UINT64_C(12862281085525950464), // VSCUNCOTvirvmL |
| 9294 | UINT64_C(12862281085525950464), // VSCUNCOTvirvml |
| 9295 | UINT64_C(12862280535770136576), // VSCUNCOTvizv |
| 9296 | UINT64_C(12862280535770136576), // VSCUNCOTvizvL |
| 9297 | UINT64_C(12862280535770136576), // VSCUNCOTvizvl |
| 9298 | UINT64_C(12862280535770136576), // VSCUNCOTvizvm |
| 9299 | UINT64_C(12862280535770136576), // VSCUNCOTvizvmL |
| 9300 | UINT64_C(12862280535770136576), // VSCUNCOTvizvml |
| 9301 | UINT64_C(12862421823014305792), // VSCUNCOTvrrv |
| 9302 | UINT64_C(12862421823014305792), // VSCUNCOTvrrvL |
| 9303 | UINT64_C(12862421823014305792), // VSCUNCOTvrrvl |
| 9304 | UINT64_C(12862421823014305792), // VSCUNCOTvrrvm |
| 9305 | UINT64_C(12862421823014305792), // VSCUNCOTvrrvmL |
| 9306 | UINT64_C(12862421823014305792), // VSCUNCOTvrrvml |
| 9307 | UINT64_C(12862421273258491904), // VSCUNCOTvrzv |
| 9308 | UINT64_C(12862421273258491904), // VSCUNCOTvrzvL |
| 9309 | UINT64_C(12862421273258491904), // VSCUNCOTvrzvl |
| 9310 | UINT64_C(12862421273258491904), // VSCUNCOTvrzvm |
| 9311 | UINT64_C(12862421273258491904), // VSCUNCOTvrzvmL |
| 9312 | UINT64_C(12862421273258491904), // VSCUNCOTvrzvml |
| 9313 | UINT64_C(12835259487761727488), // VSCUNCsirv |
| 9314 | UINT64_C(12835259487761727488), // VSCUNCsirvL |
| 9315 | UINT64_C(12835259487761727488), // VSCUNCsirvl |
| 9316 | UINT64_C(12835259487761727488), // VSCUNCsirvm |
| 9317 | UINT64_C(12835259487761727488), // VSCUNCsirvmL |
| 9318 | UINT64_C(12835259487761727488), // VSCUNCsirvml |
| 9319 | UINT64_C(12835258938005913600), // VSCUNCsizv |
| 9320 | UINT64_C(12835258938005913600), // VSCUNCsizvL |
| 9321 | UINT64_C(12835258938005913600), // VSCUNCsizvl |
| 9322 | UINT64_C(12835258938005913600), // VSCUNCsizvm |
| 9323 | UINT64_C(12835258938005913600), // VSCUNCsizvmL |
| 9324 | UINT64_C(12835258938005913600), // VSCUNCsizvml |
| 9325 | UINT64_C(12835400225250082816), // VSCUNCsrrv |
| 9326 | UINT64_C(12835400225250082816), // VSCUNCsrrvL |
| 9327 | UINT64_C(12835400225250082816), // VSCUNCsrrvl |
| 9328 | UINT64_C(12835400225250082816), // VSCUNCsrrvm |
| 9329 | UINT64_C(12835400225250082816), // VSCUNCsrrvmL |
| 9330 | UINT64_C(12835400225250082816), // VSCUNCsrrvml |
| 9331 | UINT64_C(12835399675494268928), // VSCUNCsrzv |
| 9332 | UINT64_C(12835399675494268928), // VSCUNCsrzvL |
| 9333 | UINT64_C(12835399675494268928), // VSCUNCsrzvl |
| 9334 | UINT64_C(12835399675494268928), // VSCUNCsrzvm |
| 9335 | UINT64_C(12835399675494268928), // VSCUNCsrzvmL |
| 9336 | UINT64_C(12835399675494268928), // VSCUNCsrzvml |
| 9337 | UINT64_C(12826252288506986496), // VSCUNCvirv |
| 9338 | UINT64_C(12826252288506986496), // VSCUNCvirvL |
| 9339 | UINT64_C(12826252288506986496), // VSCUNCvirvl |
| 9340 | UINT64_C(12826252288506986496), // VSCUNCvirvm |
| 9341 | UINT64_C(12826252288506986496), // VSCUNCvirvmL |
| 9342 | UINT64_C(12826252288506986496), // VSCUNCvirvml |
| 9343 | UINT64_C(12826251738751172608), // VSCUNCvizv |
| 9344 | UINT64_C(12826251738751172608), // VSCUNCvizvL |
| 9345 | UINT64_C(12826251738751172608), // VSCUNCvizvl |
| 9346 | UINT64_C(12826251738751172608), // VSCUNCvizvm |
| 9347 | UINT64_C(12826251738751172608), // VSCUNCvizvmL |
| 9348 | UINT64_C(12826251738751172608), // VSCUNCvizvml |
| 9349 | UINT64_C(12826393025995341824), // VSCUNCvrrv |
| 9350 | UINT64_C(12826393025995341824), // VSCUNCvrrvL |
| 9351 | UINT64_C(12826393025995341824), // VSCUNCvrrvl |
| 9352 | UINT64_C(12826393025995341824), // VSCUNCvrrvm |
| 9353 | UINT64_C(12826393025995341824), // VSCUNCvrrvmL |
| 9354 | UINT64_C(12826393025995341824), // VSCUNCvrrvml |
| 9355 | UINT64_C(12826392476239527936), // VSCUNCvrzv |
| 9356 | UINT64_C(12826392476239527936), // VSCUNCvrzvL |
| 9357 | UINT64_C(12826392476239527936), // VSCUNCvrzvl |
| 9358 | UINT64_C(12826392476239527936), // VSCUNCvrzvm |
| 9359 | UINT64_C(12826392476239527936), // VSCUNCvrzvmL |
| 9360 | UINT64_C(12826392476239527936), // VSCUNCvrzvml |
| 9361 | UINT64_C(12889302683290173440), // VSCUOTsirv |
| 9362 | UINT64_C(12889302683290173440), // VSCUOTsirvL |
| 9363 | UINT64_C(12889302683290173440), // VSCUOTsirvl |
| 9364 | UINT64_C(12889302683290173440), // VSCUOTsirvm |
| 9365 | UINT64_C(12889302683290173440), // VSCUOTsirvmL |
| 9366 | UINT64_C(12889302683290173440), // VSCUOTsirvml |
| 9367 | UINT64_C(12889302133534359552), // VSCUOTsizv |
| 9368 | UINT64_C(12889302133534359552), // VSCUOTsizvL |
| 9369 | UINT64_C(12889302133534359552), // VSCUOTsizvl |
| 9370 | UINT64_C(12889302133534359552), // VSCUOTsizvm |
| 9371 | UINT64_C(12889302133534359552), // VSCUOTsizvmL |
| 9372 | UINT64_C(12889302133534359552), // VSCUOTsizvml |
| 9373 | UINT64_C(12889443420778528768), // VSCUOTsrrv |
| 9374 | UINT64_C(12889443420778528768), // VSCUOTsrrvL |
| 9375 | UINT64_C(12889443420778528768), // VSCUOTsrrvl |
| 9376 | UINT64_C(12889443420778528768), // VSCUOTsrrvm |
| 9377 | UINT64_C(12889443420778528768), // VSCUOTsrrvmL |
| 9378 | UINT64_C(12889443420778528768), // VSCUOTsrrvml |
| 9379 | UINT64_C(12889442871022714880), // VSCUOTsrzv |
| 9380 | UINT64_C(12889442871022714880), // VSCUOTsrzvL |
| 9381 | UINT64_C(12889442871022714880), // VSCUOTsrzvl |
| 9382 | UINT64_C(12889442871022714880), // VSCUOTsrzvm |
| 9383 | UINT64_C(12889442871022714880), // VSCUOTsrzvmL |
| 9384 | UINT64_C(12889442871022714880), // VSCUOTsrzvml |
| 9385 | UINT64_C(12880295484035432448), // VSCUOTvirv |
| 9386 | UINT64_C(12880295484035432448), // VSCUOTvirvL |
| 9387 | UINT64_C(12880295484035432448), // VSCUOTvirvl |
| 9388 | UINT64_C(12880295484035432448), // VSCUOTvirvm |
| 9389 | UINT64_C(12880295484035432448), // VSCUOTvirvmL |
| 9390 | UINT64_C(12880295484035432448), // VSCUOTvirvml |
| 9391 | UINT64_C(12880294934279618560), // VSCUOTvizv |
| 9392 | UINT64_C(12880294934279618560), // VSCUOTvizvL |
| 9393 | UINT64_C(12880294934279618560), // VSCUOTvizvl |
| 9394 | UINT64_C(12880294934279618560), // VSCUOTvizvm |
| 9395 | UINT64_C(12880294934279618560), // VSCUOTvizvmL |
| 9396 | UINT64_C(12880294934279618560), // VSCUOTvizvml |
| 9397 | UINT64_C(12880436221523787776), // VSCUOTvrrv |
| 9398 | UINT64_C(12880436221523787776), // VSCUOTvrrvL |
| 9399 | UINT64_C(12880436221523787776), // VSCUOTvrrvl |
| 9400 | UINT64_C(12880436221523787776), // VSCUOTvrrvm |
| 9401 | UINT64_C(12880436221523787776), // VSCUOTvrrvmL |
| 9402 | UINT64_C(12880436221523787776), // VSCUOTvrrvml |
| 9403 | UINT64_C(12880435671767973888), // VSCUOTvrzv |
| 9404 | UINT64_C(12880435671767973888), // VSCUOTvrzvL |
| 9405 | UINT64_C(12880435671767973888), // VSCUOTvrzvl |
| 9406 | UINT64_C(12880435671767973888), // VSCUOTvrzvm |
| 9407 | UINT64_C(12880435671767973888), // VSCUOTvrzvmL |
| 9408 | UINT64_C(12880435671767973888), // VSCUOTvrzvml |
| 9409 | UINT64_C(12853273886271209472), // VSCUsirv |
| 9410 | UINT64_C(12853273886271209472), // VSCUsirvL |
| 9411 | UINT64_C(12853273886271209472), // VSCUsirvl |
| 9412 | UINT64_C(12853273886271209472), // VSCUsirvm |
| 9413 | UINT64_C(12853273886271209472), // VSCUsirvmL |
| 9414 | UINT64_C(12853273886271209472), // VSCUsirvml |
| 9415 | UINT64_C(12853273336515395584), // VSCUsizv |
| 9416 | UINT64_C(12853273336515395584), // VSCUsizvL |
| 9417 | UINT64_C(12853273336515395584), // VSCUsizvl |
| 9418 | UINT64_C(12853273336515395584), // VSCUsizvm |
| 9419 | UINT64_C(12853273336515395584), // VSCUsizvmL |
| 9420 | UINT64_C(12853273336515395584), // VSCUsizvml |
| 9421 | UINT64_C(12853414623759564800), // VSCUsrrv |
| 9422 | UINT64_C(12853414623759564800), // VSCUsrrvL |
| 9423 | UINT64_C(12853414623759564800), // VSCUsrrvl |
| 9424 | UINT64_C(12853414623759564800), // VSCUsrrvm |
| 9425 | UINT64_C(12853414623759564800), // VSCUsrrvmL |
| 9426 | UINT64_C(12853414623759564800), // VSCUsrrvml |
| 9427 | UINT64_C(12853414074003750912), // VSCUsrzv |
| 9428 | UINT64_C(12853414074003750912), // VSCUsrzvL |
| 9429 | UINT64_C(12853414074003750912), // VSCUsrzvl |
| 9430 | UINT64_C(12853414074003750912), // VSCUsrzvm |
| 9431 | UINT64_C(12853414074003750912), // VSCUsrzvmL |
| 9432 | UINT64_C(12853414074003750912), // VSCUsrzvml |
| 9433 | UINT64_C(12844266687016468480), // VSCUvirv |
| 9434 | UINT64_C(12844266687016468480), // VSCUvirvL |
| 9435 | UINT64_C(12844266687016468480), // VSCUvirvl |
| 9436 | UINT64_C(12844266687016468480), // VSCUvirvm |
| 9437 | UINT64_C(12844266687016468480), // VSCUvirvmL |
| 9438 | UINT64_C(12844266687016468480), // VSCUvirvml |
| 9439 | UINT64_C(12844266137260654592), // VSCUvizv |
| 9440 | UINT64_C(12844266137260654592), // VSCUvizvL |
| 9441 | UINT64_C(12844266137260654592), // VSCUvizvl |
| 9442 | UINT64_C(12844266137260654592), // VSCUvizvm |
| 9443 | UINT64_C(12844266137260654592), // VSCUvizvmL |
| 9444 | UINT64_C(12844266137260654592), // VSCUvizvml |
| 9445 | UINT64_C(12844407424504823808), // VSCUvrrv |
| 9446 | UINT64_C(12844407424504823808), // VSCUvrrvL |
| 9447 | UINT64_C(12844407424504823808), // VSCUvrrvl |
| 9448 | UINT64_C(12844407424504823808), // VSCUvrrvm |
| 9449 | UINT64_C(12844407424504823808), // VSCUvrrvmL |
| 9450 | UINT64_C(12844407424504823808), // VSCUvrrvml |
| 9451 | UINT64_C(12844406874749009920), // VSCUvrzv |
| 9452 | UINT64_C(12844406874749009920), // VSCUvrzvL |
| 9453 | UINT64_C(12844406874749009920), // VSCUvrzvl |
| 9454 | UINT64_C(12844406874749009920), // VSCUvrzvm |
| 9455 | UINT64_C(12844406874749009920), // VSCUvrzvmL |
| 9456 | UINT64_C(12844406874749009920), // VSCUvrzvml |
| 9457 | UINT64_C(12781216292233281536), // VSCsirv |
| 9458 | UINT64_C(12781216292233281536), // VSCsirvL |
| 9459 | UINT64_C(12781216292233281536), // VSCsirvl |
| 9460 | UINT64_C(12781216292233281536), // VSCsirvm |
| 9461 | UINT64_C(12781216292233281536), // VSCsirvmL |
| 9462 | UINT64_C(12781216292233281536), // VSCsirvml |
| 9463 | UINT64_C(12781215742477467648), // VSCsizv |
| 9464 | UINT64_C(12781215742477467648), // VSCsizvL |
| 9465 | UINT64_C(12781215742477467648), // VSCsizvl |
| 9466 | UINT64_C(12781215742477467648), // VSCsizvm |
| 9467 | UINT64_C(12781215742477467648), // VSCsizvmL |
| 9468 | UINT64_C(12781215742477467648), // VSCsizvml |
| 9469 | UINT64_C(12781357029721636864), // VSCsrrv |
| 9470 | UINT64_C(12781357029721636864), // VSCsrrvL |
| 9471 | UINT64_C(12781357029721636864), // VSCsrrvl |
| 9472 | UINT64_C(12781357029721636864), // VSCsrrvm |
| 9473 | UINT64_C(12781357029721636864), // VSCsrrvmL |
| 9474 | UINT64_C(12781357029721636864), // VSCsrrvml |
| 9475 | UINT64_C(12781356479965822976), // VSCsrzv |
| 9476 | UINT64_C(12781356479965822976), // VSCsrzvL |
| 9477 | UINT64_C(12781356479965822976), // VSCsrzvl |
| 9478 | UINT64_C(12781356479965822976), // VSCsrzvm |
| 9479 | UINT64_C(12781356479965822976), // VSCsrzvmL |
| 9480 | UINT64_C(12781356479965822976), // VSCsrzvml |
| 9481 | UINT64_C(12772209092978540544), // VSCvirv |
| 9482 | UINT64_C(12772209092978540544), // VSCvirvL |
| 9483 | UINT64_C(12772209092978540544), // VSCvirvl |
| 9484 | UINT64_C(12772209092978540544), // VSCvirvm |
| 9485 | UINT64_C(12772209092978540544), // VSCvirvmL |
| 9486 | UINT64_C(12772209092978540544), // VSCvirvml |
| 9487 | UINT64_C(12772208543222726656), // VSCvizv |
| 9488 | UINT64_C(12772208543222726656), // VSCvizvL |
| 9489 | UINT64_C(12772208543222726656), // VSCvizvl |
| 9490 | UINT64_C(12772208543222726656), // VSCvizvm |
| 9491 | UINT64_C(12772208543222726656), // VSCvizvmL |
| 9492 | UINT64_C(12772208543222726656), // VSCvizvml |
| 9493 | UINT64_C(12772349830466895872), // VSCvrrv |
| 9494 | UINT64_C(12772349830466895872), // VSCvrrvL |
| 9495 | UINT64_C(12772349830466895872), // VSCvrrvl |
| 9496 | UINT64_C(12772349830466895872), // VSCvrrvm |
| 9497 | UINT64_C(12772349830466895872), // VSCvrrvmL |
| 9498 | UINT64_C(12772349830466895872), // VSCvrrvml |
| 9499 | UINT64_C(12772349280711081984), // VSCvrzv |
| 9500 | UINT64_C(12772349280711081984), // VSCvrzvL |
| 9501 | UINT64_C(12772349280711081984), // VSCvrzvl |
| 9502 | UINT64_C(12772349280711081984), // VSCvrzvm |
| 9503 | UINT64_C(12772349280711081984), // VSCvrzvmL |
| 9504 | UINT64_C(12772349280711081984), // VSCvrzvml |
| 9505 | UINT64_C(11024811887802974208), // VSEQ |
| 9506 | UINT64_C(11024811887802974208), // VSEQL |
| 9507 | UINT64_C(11024811887802974208), // VSEQL_v |
| 9508 | UINT64_C(11024811887802974208), // VSEQ_v |
| 9509 | UINT64_C(11024811887802974208), // VSEQl |
| 9510 | UINT64_C(11024811887802974208), // VSEQl_v |
| 9511 | UINT64_C(11024811887802974208), // VSEQm |
| 9512 | UINT64_C(11024811887802974208), // VSEQmL |
| 9513 | UINT64_C(11024811887802974208), // VSEQmL_v |
| 9514 | UINT64_C(11024811887802974208), // VSEQm_v |
| 9515 | UINT64_C(11024811887802974208), // VSEQml |
| 9516 | UINT64_C(11024811887802974208), // VSEQml_v |
| 9517 | UINT64_C(15492382718154506240), // VSFAvim |
| 9518 | UINT64_C(15492382718154506240), // VSFAvimL |
| 9519 | UINT64_C(15492382718154506240), // VSFAvimL_v |
| 9520 | UINT64_C(15492382718154506240), // VSFAvim_v |
| 9521 | UINT64_C(15492382718154506240), // VSFAviml |
| 9522 | UINT64_C(15492382718154506240), // VSFAviml_v |
| 9523 | UINT64_C(15492382718154506240), // VSFAvimm |
| 9524 | UINT64_C(15492382718154506240), // VSFAvimmL |
| 9525 | UINT64_C(15492382718154506240), // VSFAvimmL_v |
| 9526 | UINT64_C(15492382718154506240), // VSFAvimm_v |
| 9527 | UINT64_C(15492382718154506240), // VSFAvimml |
| 9528 | UINT64_C(15492382718154506240), // VSFAvimml_v |
| 9529 | UINT64_C(15492383267910320128), // VSFAvir |
| 9530 | UINT64_C(15492383267910320128), // VSFAvirL |
| 9531 | UINT64_C(15492383267910320128), // VSFAvirL_v |
| 9532 | UINT64_C(15492383267910320128), // VSFAvir_v |
| 9533 | UINT64_C(15492383267910320128), // VSFAvirl |
| 9534 | UINT64_C(15492383267910320128), // VSFAvirl_v |
| 9535 | UINT64_C(15492383267910320128), // VSFAvirm |
| 9536 | UINT64_C(15492383267910320128), // VSFAvirmL |
| 9537 | UINT64_C(15492383267910320128), // VSFAvirmL_v |
| 9538 | UINT64_C(15492383267910320128), // VSFAvirm_v |
| 9539 | UINT64_C(15492383267910320128), // VSFAvirml |
| 9540 | UINT64_C(15492383267910320128), // VSFAvirml_v |
| 9541 | UINT64_C(15492523455642861568), // VSFAvrm |
| 9542 | UINT64_C(15492523455642861568), // VSFAvrmL |
| 9543 | UINT64_C(15492523455642861568), // VSFAvrmL_v |
| 9544 | UINT64_C(15492523455642861568), // VSFAvrm_v |
| 9545 | UINT64_C(15492523455642861568), // VSFAvrml |
| 9546 | UINT64_C(15492523455642861568), // VSFAvrml_v |
| 9547 | UINT64_C(15492523455642861568), // VSFAvrmm |
| 9548 | UINT64_C(15492523455642861568), // VSFAvrmmL |
| 9549 | UINT64_C(15492523455642861568), // VSFAvrmmL_v |
| 9550 | UINT64_C(15492523455642861568), // VSFAvrmm_v |
| 9551 | UINT64_C(15492523455642861568), // VSFAvrmml |
| 9552 | UINT64_C(15492523455642861568), // VSFAvrmml_v |
| 9553 | UINT64_C(15492524005398675456), // VSFAvrr |
| 9554 | UINT64_C(15492524005398675456), // VSFAvrrL |
| 9555 | UINT64_C(15492524005398675456), // VSFAvrrL_v |
| 9556 | UINT64_C(15492524005398675456), // VSFAvrr_v |
| 9557 | UINT64_C(15492524005398675456), // VSFAvrrl |
| 9558 | UINT64_C(15492524005398675456), // VSFAvrrl_v |
| 9559 | UINT64_C(15492524005398675456), // VSFAvrrm |
| 9560 | UINT64_C(15492524005398675456), // VSFAvrrmL |
| 9561 | UINT64_C(15492524005398675456), // VSFAvrrmL_v |
| 9562 | UINT64_C(15492524005398675456), // VSFAvrrm_v |
| 9563 | UINT64_C(15492524005398675456), // VSFAvrrml |
| 9564 | UINT64_C(15492524005398675456), // VSFAvrrml_v |
| 9565 | UINT64_C(13546827679130451968), // VSHFvvi |
| 9566 | UINT64_C(13546827679130451968), // VSHFvviL |
| 9567 | UINT64_C(13546827679130451968), // VSHFvviL_v |
| 9568 | UINT64_C(13546827679130451968), // VSHFvvi_v |
| 9569 | UINT64_C(13546827679130451968), // VSHFvvil |
| 9570 | UINT64_C(13546827679130451968), // VSHFvvil_v |
| 9571 | UINT64_C(13546968416618807296), // VSHFvvr |
| 9572 | UINT64_C(13546968416618807296), // VSHFvvrL |
| 9573 | UINT64_C(13546968416618807296), // VSHFvvrL_v |
| 9574 | UINT64_C(13546968416618807296), // VSHFvvr_v |
| 9575 | UINT64_C(13546968416618807296), // VSHFvvrl |
| 9576 | UINT64_C(13546968416618807296), // VSHFvvrl_v |
| 9577 | UINT64_C(15285217135295463424), // VSLALvi |
| 9578 | UINT64_C(15285217135295463424), // VSLALviL |
| 9579 | UINT64_C(15285217135295463424), // VSLALviL_v |
| 9580 | UINT64_C(15285217135295463424), // VSLALvi_v |
| 9581 | UINT64_C(15285217135295463424), // VSLALvil |
| 9582 | UINT64_C(15285217135295463424), // VSLALvil_v |
| 9583 | UINT64_C(15285217135295463424), // VSLALvim |
| 9584 | UINT64_C(15285217135295463424), // VSLALvimL |
| 9585 | UINT64_C(15285217135295463424), // VSLALvimL_v |
| 9586 | UINT64_C(15285217135295463424), // VSLALvim_v |
| 9587 | UINT64_C(15285217135295463424), // VSLALviml |
| 9588 | UINT64_C(15285217135295463424), // VSLALviml_v |
| 9589 | UINT64_C(15285357872783818752), // VSLALvr |
| 9590 | UINT64_C(15285357872783818752), // VSLALvrL |
| 9591 | UINT64_C(15285357872783818752), // VSLALvrL_v |
| 9592 | UINT64_C(15285357872783818752), // VSLALvr_v |
| 9593 | UINT64_C(15285357872783818752), // VSLALvrl |
| 9594 | UINT64_C(15285357872783818752), // VSLALvrl_v |
| 9595 | UINT64_C(15285357872783818752), // VSLALvrm |
| 9596 | UINT64_C(15285357872783818752), // VSLALvrmL |
| 9597 | UINT64_C(15285357872783818752), // VSLALvrmL_v |
| 9598 | UINT64_C(15285357872783818752), // VSLALvrm_v |
| 9599 | UINT64_C(15285357872783818752), // VSLALvrml |
| 9600 | UINT64_C(15285357872783818752), // VSLALvrml_v |
| 9601 | UINT64_C(15276209936040722432), // VSLALvv |
| 9602 | UINT64_C(15276209936040722432), // VSLALvvL |
| 9603 | UINT64_C(15276209936040722432), // VSLALvvL_v |
| 9604 | UINT64_C(15276209936040722432), // VSLALvv_v |
| 9605 | UINT64_C(15276209936040722432), // VSLALvvl |
| 9606 | UINT64_C(15276209936040722432), // VSLALvvl_v |
| 9607 | UINT64_C(15276209936040722432), // VSLALvvm |
| 9608 | UINT64_C(15276209936040722432), // VSLALvvmL |
| 9609 | UINT64_C(15276209936040722432), // VSLALvvmL_v |
| 9610 | UINT64_C(15276209936040722432), // VSLALvvm_v |
| 9611 | UINT64_C(15276209936040722432), // VSLALvvml |
| 9612 | UINT64_C(15276209936040722432), // VSLALvvml_v |
| 9613 | UINT64_C(16582253827978166272), // VSLAWSXvi |
| 9614 | UINT64_C(16582253827978166272), // VSLAWSXviL |
| 9615 | UINT64_C(16582253827978166272), // VSLAWSXviL_v |
| 9616 | UINT64_C(16582253827978166272), // VSLAWSXvi_v |
| 9617 | UINT64_C(16582253827978166272), // VSLAWSXvil |
| 9618 | UINT64_C(16582253827978166272), // VSLAWSXvil_v |
| 9619 | UINT64_C(16582253827978166272), // VSLAWSXvim |
| 9620 | UINT64_C(16582253827978166272), // VSLAWSXvimL |
| 9621 | UINT64_C(16582253827978166272), // VSLAWSXvimL_v |
| 9622 | UINT64_C(16582253827978166272), // VSLAWSXvim_v |
| 9623 | UINT64_C(16582253827978166272), // VSLAWSXviml |
| 9624 | UINT64_C(16582253827978166272), // VSLAWSXviml_v |
| 9625 | UINT64_C(16582394565466521600), // VSLAWSXvr |
| 9626 | UINT64_C(16582394565466521600), // VSLAWSXvrL |
| 9627 | UINT64_C(16582394565466521600), // VSLAWSXvrL_v |
| 9628 | UINT64_C(16582394565466521600), // VSLAWSXvr_v |
| 9629 | UINT64_C(16582394565466521600), // VSLAWSXvrl |
| 9630 | UINT64_C(16582394565466521600), // VSLAWSXvrl_v |
| 9631 | UINT64_C(16582394565466521600), // VSLAWSXvrm |
| 9632 | UINT64_C(16582394565466521600), // VSLAWSXvrmL |
| 9633 | UINT64_C(16582394565466521600), // VSLAWSXvrmL_v |
| 9634 | UINT64_C(16582394565466521600), // VSLAWSXvrm_v |
| 9635 | UINT64_C(16582394565466521600), // VSLAWSXvrml |
| 9636 | UINT64_C(16582394565466521600), // VSLAWSXvrml_v |
| 9637 | UINT64_C(16573246628723425280), // VSLAWSXvv |
| 9638 | UINT64_C(16573246628723425280), // VSLAWSXvvL |
| 9639 | UINT64_C(16573246628723425280), // VSLAWSXvvL_v |
| 9640 | UINT64_C(16573246628723425280), // VSLAWSXvv_v |
| 9641 | UINT64_C(16573246628723425280), // VSLAWSXvvl |
| 9642 | UINT64_C(16573246628723425280), // VSLAWSXvvl_v |
| 9643 | UINT64_C(16573246628723425280), // VSLAWSXvvm |
| 9644 | UINT64_C(16573246628723425280), // VSLAWSXvvmL |
| 9645 | UINT64_C(16573246628723425280), // VSLAWSXvvmL_v |
| 9646 | UINT64_C(16573246628723425280), // VSLAWSXvvm_v |
| 9647 | UINT64_C(16573246628723425280), // VSLAWSXvvml |
| 9648 | UINT64_C(16573246628723425280), // VSLAWSXvvml_v |
| 9649 | UINT64_C(16600268226487648256), // VSLAWZXvi |
| 9650 | UINT64_C(16600268226487648256), // VSLAWZXviL |
| 9651 | UINT64_C(16600268226487648256), // VSLAWZXviL_v |
| 9652 | UINT64_C(16600268226487648256), // VSLAWZXvi_v |
| 9653 | UINT64_C(16600268226487648256), // VSLAWZXvil |
| 9654 | UINT64_C(16600268226487648256), // VSLAWZXvil_v |
| 9655 | UINT64_C(16600268226487648256), // VSLAWZXvim |
| 9656 | UINT64_C(16600268226487648256), // VSLAWZXvimL |
| 9657 | UINT64_C(16600268226487648256), // VSLAWZXvimL_v |
| 9658 | UINT64_C(16600268226487648256), // VSLAWZXvim_v |
| 9659 | UINT64_C(16600268226487648256), // VSLAWZXviml |
| 9660 | UINT64_C(16600268226487648256), // VSLAWZXviml_v |
| 9661 | UINT64_C(16600408963976003584), // VSLAWZXvr |
| 9662 | UINT64_C(16600408963976003584), // VSLAWZXvrL |
| 9663 | UINT64_C(16600408963976003584), // VSLAWZXvrL_v |
| 9664 | UINT64_C(16600408963976003584), // VSLAWZXvr_v |
| 9665 | UINT64_C(16600408963976003584), // VSLAWZXvrl |
| 9666 | UINT64_C(16600408963976003584), // VSLAWZXvrl_v |
| 9667 | UINT64_C(16600408963976003584), // VSLAWZXvrm |
| 9668 | UINT64_C(16600408963976003584), // VSLAWZXvrmL |
| 9669 | UINT64_C(16600408963976003584), // VSLAWZXvrmL_v |
| 9670 | UINT64_C(16600408963976003584), // VSLAWZXvrm_v |
| 9671 | UINT64_C(16600408963976003584), // VSLAWZXvrml |
| 9672 | UINT64_C(16600408963976003584), // VSLAWZXvrml_v |
| 9673 | UINT64_C(16591261027232907264), // VSLAWZXvv |
| 9674 | UINT64_C(16591261027232907264), // VSLAWZXvvL |
| 9675 | UINT64_C(16591261027232907264), // VSLAWZXvvL_v |
| 9676 | UINT64_C(16591261027232907264), // VSLAWZXvv_v |
| 9677 | UINT64_C(16591261027232907264), // VSLAWZXvvl |
| 9678 | UINT64_C(16591261027232907264), // VSLAWZXvvl_v |
| 9679 | UINT64_C(16591261027232907264), // VSLAWZXvvm |
| 9680 | UINT64_C(16591261027232907264), // VSLAWZXvvmL |
| 9681 | UINT64_C(16591261027232907264), // VSLAWZXvvmL_v |
| 9682 | UINT64_C(16591261027232907264), // VSLAWZXvvm_v |
| 9683 | UINT64_C(16591261027232907264), // VSLAWZXvvml |
| 9684 | UINT64_C(16591261027232907264), // VSLAWZXvvml_v |
| 9685 | UINT64_C(16429131440647569408), // VSLDvvi |
| 9686 | UINT64_C(16429131440647569408), // VSLDvviL |
| 9687 | UINT64_C(16429131440647569408), // VSLDvviL_v |
| 9688 | UINT64_C(16429131440647569408), // VSLDvvi_v |
| 9689 | UINT64_C(16429131440647569408), // VSLDvvil |
| 9690 | UINT64_C(16429131440647569408), // VSLDvvil_v |
| 9691 | UINT64_C(16429131440647569408), // VSLDvvim |
| 9692 | UINT64_C(16429131440647569408), // VSLDvvimL |
| 9693 | UINT64_C(16429131440647569408), // VSLDvvimL_v |
| 9694 | UINT64_C(16429131440647569408), // VSLDvvim_v |
| 9695 | UINT64_C(16429131440647569408), // VSLDvviml |
| 9696 | UINT64_C(16429131440647569408), // VSLDvviml_v |
| 9697 | UINT64_C(16429272178135924736), // VSLDvvr |
| 9698 | UINT64_C(16429272178135924736), // VSLDvvrL |
| 9699 | UINT64_C(16429272178135924736), // VSLDvvrL_v |
| 9700 | UINT64_C(16429272178135924736), // VSLDvvr_v |
| 9701 | UINT64_C(16429272178135924736), // VSLDvvrl |
| 9702 | UINT64_C(16429272178135924736), // VSLDvvrl_v |
| 9703 | UINT64_C(16429272178135924736), // VSLDvvrm |
| 9704 | UINT64_C(16429272178135924736), // VSLDvvrmL |
| 9705 | UINT64_C(16429272178135924736), // VSLDvvrmL_v |
| 9706 | UINT64_C(16429272178135924736), // VSLDvvrm_v |
| 9707 | UINT64_C(16429272178135924736), // VSLDvvrml |
| 9708 | UINT64_C(16429272178135924736), // VSLDvvrml_v |
| 9709 | UINT64_C(16510196233940238336), // VSLLvi |
| 9710 | UINT64_C(16510196233940238336), // VSLLviL |
| 9711 | UINT64_C(16510196233940238336), // VSLLviL_v |
| 9712 | UINT64_C(16510196233940238336), // VSLLvi_v |
| 9713 | UINT64_C(16510196233940238336), // VSLLvil |
| 9714 | UINT64_C(16510196233940238336), // VSLLvil_v |
| 9715 | UINT64_C(16510196233940238336), // VSLLvim |
| 9716 | UINT64_C(16510196233940238336), // VSLLvimL |
| 9717 | UINT64_C(16510196233940238336), // VSLLvimL_v |
| 9718 | UINT64_C(16510196233940238336), // VSLLvim_v |
| 9719 | UINT64_C(16510196233940238336), // VSLLviml |
| 9720 | UINT64_C(16510196233940238336), // VSLLviml_v |
| 9721 | UINT64_C(16510336971428593664), // VSLLvr |
| 9722 | UINT64_C(16510336971428593664), // VSLLvrL |
| 9723 | UINT64_C(16510336971428593664), // VSLLvrL_v |
| 9724 | UINT64_C(16510336971428593664), // VSLLvr_v |
| 9725 | UINT64_C(16510336971428593664), // VSLLvrl |
| 9726 | UINT64_C(16510336971428593664), // VSLLvrl_v |
| 9727 | UINT64_C(16510336971428593664), // VSLLvrm |
| 9728 | UINT64_C(16510336971428593664), // VSLLvrmL |
| 9729 | UINT64_C(16510336971428593664), // VSLLvrmL_v |
| 9730 | UINT64_C(16510336971428593664), // VSLLvrm_v |
| 9731 | UINT64_C(16510336971428593664), // VSLLvrml |
| 9732 | UINT64_C(16510336971428593664), // VSLLvrml_v |
| 9733 | UINT64_C(16501189034685497344), // VSLLvv |
| 9734 | UINT64_C(16501189034685497344), // VSLLvvL |
| 9735 | UINT64_C(16501189034685497344), // VSLLvvL_v |
| 9736 | UINT64_C(16501189034685497344), // VSLLvv_v |
| 9737 | UINT64_C(16501189034685497344), // VSLLvvl |
| 9738 | UINT64_C(16501189034685497344), // VSLLvvl_v |
| 9739 | UINT64_C(16501189034685497344), // VSLLvvm |
| 9740 | UINT64_C(16501189034685497344), // VSLLvvmL |
| 9741 | UINT64_C(16501189034685497344), // VSLLvvmL_v |
| 9742 | UINT64_C(16501189034685497344), // VSLLvvm_v |
| 9743 | UINT64_C(16501189034685497344), // VSLLvvml |
| 9744 | UINT64_C(16501189034685497344), // VSLLvvml_v |
| 9745 | UINT64_C(15357274729333391360), // VSRALvi |
| 9746 | UINT64_C(15357274729333391360), // VSRALviL |
| 9747 | UINT64_C(15357274729333391360), // VSRALviL_v |
| 9748 | UINT64_C(15357274729333391360), // VSRALvi_v |
| 9749 | UINT64_C(15357274729333391360), // VSRALvil |
| 9750 | UINT64_C(15357274729333391360), // VSRALvil_v |
| 9751 | UINT64_C(15357274729333391360), // VSRALvim |
| 9752 | UINT64_C(15357274729333391360), // VSRALvimL |
| 9753 | UINT64_C(15357274729333391360), // VSRALvimL_v |
| 9754 | UINT64_C(15357274729333391360), // VSRALvim_v |
| 9755 | UINT64_C(15357274729333391360), // VSRALviml |
| 9756 | UINT64_C(15357274729333391360), // VSRALviml_v |
| 9757 | UINT64_C(15357415466821746688), // VSRALvr |
| 9758 | UINT64_C(15357415466821746688), // VSRALvrL |
| 9759 | UINT64_C(15357415466821746688), // VSRALvrL_v |
| 9760 | UINT64_C(15357415466821746688), // VSRALvr_v |
| 9761 | UINT64_C(15357415466821746688), // VSRALvrl |
| 9762 | UINT64_C(15357415466821746688), // VSRALvrl_v |
| 9763 | UINT64_C(15357415466821746688), // VSRALvrm |
| 9764 | UINT64_C(15357415466821746688), // VSRALvrmL |
| 9765 | UINT64_C(15357415466821746688), // VSRALvrmL_v |
| 9766 | UINT64_C(15357415466821746688), // VSRALvrm_v |
| 9767 | UINT64_C(15357415466821746688), // VSRALvrml |
| 9768 | UINT64_C(15357415466821746688), // VSRALvrml_v |
| 9769 | UINT64_C(15348267530078650368), // VSRALvv |
| 9770 | UINT64_C(15348267530078650368), // VSRALvvL |
| 9771 | UINT64_C(15348267530078650368), // VSRALvvL_v |
| 9772 | UINT64_C(15348267530078650368), // VSRALvv_v |
| 9773 | UINT64_C(15348267530078650368), // VSRALvvl |
| 9774 | UINT64_C(15348267530078650368), // VSRALvvl_v |
| 9775 | UINT64_C(15348267530078650368), // VSRALvvm |
| 9776 | UINT64_C(15348267530078650368), // VSRALvvmL |
| 9777 | UINT64_C(15348267530078650368), // VSRALvvmL_v |
| 9778 | UINT64_C(15348267530078650368), // VSRALvvm_v |
| 9779 | UINT64_C(15348267530078650368), // VSRALvvml |
| 9780 | UINT64_C(15348267530078650368), // VSRALvvml_v |
| 9781 | UINT64_C(17735175332585013248), // VSRAWSXvi |
| 9782 | UINT64_C(17735175332585013248), // VSRAWSXviL |
| 9783 | UINT64_C(17735175332585013248), // VSRAWSXviL_v |
| 9784 | UINT64_C(17735175332585013248), // VSRAWSXvi_v |
| 9785 | UINT64_C(17735175332585013248), // VSRAWSXvil |
| 9786 | UINT64_C(17735175332585013248), // VSRAWSXvil_v |
| 9787 | UINT64_C(17735175332585013248), // VSRAWSXvim |
| 9788 | UINT64_C(17735175332585013248), // VSRAWSXvimL |
| 9789 | UINT64_C(17735175332585013248), // VSRAWSXvimL_v |
| 9790 | UINT64_C(17735175332585013248), // VSRAWSXvim_v |
| 9791 | UINT64_C(17735175332585013248), // VSRAWSXviml |
| 9792 | UINT64_C(17735175332585013248), // VSRAWSXviml_v |
| 9793 | UINT64_C(17735316070073368576), // VSRAWSXvr |
| 9794 | UINT64_C(17735316070073368576), // VSRAWSXvrL |
| 9795 | UINT64_C(17735316070073368576), // VSRAWSXvrL_v |
| 9796 | UINT64_C(17735316070073368576), // VSRAWSXvr_v |
| 9797 | UINT64_C(17735316070073368576), // VSRAWSXvrl |
| 9798 | UINT64_C(17735316070073368576), // VSRAWSXvrl_v |
| 9799 | UINT64_C(17735316070073368576), // VSRAWSXvrm |
| 9800 | UINT64_C(17735316070073368576), // VSRAWSXvrmL |
| 9801 | UINT64_C(17735316070073368576), // VSRAWSXvrmL_v |
| 9802 | UINT64_C(17735316070073368576), // VSRAWSXvrm_v |
| 9803 | UINT64_C(17735316070073368576), // VSRAWSXvrml |
| 9804 | UINT64_C(17735316070073368576), // VSRAWSXvrml_v |
| 9805 | UINT64_C(17726168133330272256), // VSRAWSXvv |
| 9806 | UINT64_C(17726168133330272256), // VSRAWSXvvL |
| 9807 | UINT64_C(17726168133330272256), // VSRAWSXvvL_v |
| 9808 | UINT64_C(17726168133330272256), // VSRAWSXvv_v |
| 9809 | UINT64_C(17726168133330272256), // VSRAWSXvvl |
| 9810 | UINT64_C(17726168133330272256), // VSRAWSXvvl_v |
| 9811 | UINT64_C(17726168133330272256), // VSRAWSXvvm |
| 9812 | UINT64_C(17726168133330272256), // VSRAWSXvvmL |
| 9813 | UINT64_C(17726168133330272256), // VSRAWSXvvmL_v |
| 9814 | UINT64_C(17726168133330272256), // VSRAWSXvvm_v |
| 9815 | UINT64_C(17726168133330272256), // VSRAWSXvvml |
| 9816 | UINT64_C(17726168133330272256), // VSRAWSXvvml_v |
| 9817 | UINT64_C(17753189731094495232), // VSRAWZXvi |
| 9818 | UINT64_C(17753189731094495232), // VSRAWZXviL |
| 9819 | UINT64_C(17753189731094495232), // VSRAWZXviL_v |
| 9820 | UINT64_C(17753189731094495232), // VSRAWZXvi_v |
| 9821 | UINT64_C(17753189731094495232), // VSRAWZXvil |
| 9822 | UINT64_C(17753189731094495232), // VSRAWZXvil_v |
| 9823 | UINT64_C(17753189731094495232), // VSRAWZXvim |
| 9824 | UINT64_C(17753189731094495232), // VSRAWZXvimL |
| 9825 | UINT64_C(17753189731094495232), // VSRAWZXvimL_v |
| 9826 | UINT64_C(17753189731094495232), // VSRAWZXvim_v |
| 9827 | UINT64_C(17753189731094495232), // VSRAWZXviml |
| 9828 | UINT64_C(17753189731094495232), // VSRAWZXviml_v |
| 9829 | UINT64_C(17753330468582850560), // VSRAWZXvr |
| 9830 | UINT64_C(17753330468582850560), // VSRAWZXvrL |
| 9831 | UINT64_C(17753330468582850560), // VSRAWZXvrL_v |
| 9832 | UINT64_C(17753330468582850560), // VSRAWZXvr_v |
| 9833 | UINT64_C(17753330468582850560), // VSRAWZXvrl |
| 9834 | UINT64_C(17753330468582850560), // VSRAWZXvrl_v |
| 9835 | UINT64_C(17753330468582850560), // VSRAWZXvrm |
| 9836 | UINT64_C(17753330468582850560), // VSRAWZXvrmL |
| 9837 | UINT64_C(17753330468582850560), // VSRAWZXvrmL_v |
| 9838 | UINT64_C(17753330468582850560), // VSRAWZXvrm_v |
| 9839 | UINT64_C(17753330468582850560), // VSRAWZXvrml |
| 9840 | UINT64_C(17753330468582850560), // VSRAWZXvrml_v |
| 9841 | UINT64_C(17744182531839754240), // VSRAWZXvv |
| 9842 | UINT64_C(17744182531839754240), // VSRAWZXvvL |
| 9843 | UINT64_C(17744182531839754240), // VSRAWZXvvL_v |
| 9844 | UINT64_C(17744182531839754240), // VSRAWZXvv_v |
| 9845 | UINT64_C(17744182531839754240), // VSRAWZXvvl |
| 9846 | UINT64_C(17744182531839754240), // VSRAWZXvvl_v |
| 9847 | UINT64_C(17744182531839754240), // VSRAWZXvvm |
| 9848 | UINT64_C(17744182531839754240), // VSRAWZXvvmL |
| 9849 | UINT64_C(17744182531839754240), // VSRAWZXvvmL_v |
| 9850 | UINT64_C(17744182531839754240), // VSRAWZXvvm_v |
| 9851 | UINT64_C(17744182531839754240), // VSRAWZXvvml |
| 9852 | UINT64_C(17744182531839754240), // VSRAWZXvvml_v |
| 9853 | UINT64_C(17582052945254416384), // VSRDvvi |
| 9854 | UINT64_C(17582052945254416384), // VSRDvviL |
| 9855 | UINT64_C(17582052945254416384), // VSRDvviL_v |
| 9856 | UINT64_C(17582052945254416384), // VSRDvvi_v |
| 9857 | UINT64_C(17582052945254416384), // VSRDvvil |
| 9858 | UINT64_C(17582052945254416384), // VSRDvvil_v |
| 9859 | UINT64_C(17582052945254416384), // VSRDvvim |
| 9860 | UINT64_C(17582052945254416384), // VSRDvvimL |
| 9861 | UINT64_C(17582052945254416384), // VSRDvvimL_v |
| 9862 | UINT64_C(17582052945254416384), // VSRDvvim_v |
| 9863 | UINT64_C(17582052945254416384), // VSRDvviml |
| 9864 | UINT64_C(17582052945254416384), // VSRDvviml_v |
| 9865 | UINT64_C(17582193682742771712), // VSRDvvr |
| 9866 | UINT64_C(17582193682742771712), // VSRDvvrL |
| 9867 | UINT64_C(17582193682742771712), // VSRDvvrL_v |
| 9868 | UINT64_C(17582193682742771712), // VSRDvvr_v |
| 9869 | UINT64_C(17582193682742771712), // VSRDvvrl |
| 9870 | UINT64_C(17582193682742771712), // VSRDvvrl_v |
| 9871 | UINT64_C(17582193682742771712), // VSRDvvrm |
| 9872 | UINT64_C(17582193682742771712), // VSRDvvrmL |
| 9873 | UINT64_C(17582193682742771712), // VSRDvvrmL_v |
| 9874 | UINT64_C(17582193682742771712), // VSRDvvrm_v |
| 9875 | UINT64_C(17582193682742771712), // VSRDvvrml |
| 9876 | UINT64_C(17582193682742771712), // VSRDvvrml_v |
| 9877 | UINT64_C(17663117738547085312), // VSRLvi |
| 9878 | UINT64_C(17663117738547085312), // VSRLviL |
| 9879 | UINT64_C(17663117738547085312), // VSRLviL_v |
| 9880 | UINT64_C(17663117738547085312), // VSRLvi_v |
| 9881 | UINT64_C(17663117738547085312), // VSRLvil |
| 9882 | UINT64_C(17663117738547085312), // VSRLvil_v |
| 9883 | UINT64_C(17663117738547085312), // VSRLvim |
| 9884 | UINT64_C(17663117738547085312), // VSRLvimL |
| 9885 | UINT64_C(17663117738547085312), // VSRLvimL_v |
| 9886 | UINT64_C(17663117738547085312), // VSRLvim_v |
| 9887 | UINT64_C(17663117738547085312), // VSRLviml |
| 9888 | UINT64_C(17663117738547085312), // VSRLviml_v |
| 9889 | UINT64_C(17663258476035440640), // VSRLvr |
| 9890 | UINT64_C(17663258476035440640), // VSRLvrL |
| 9891 | UINT64_C(17663258476035440640), // VSRLvrL_v |
| 9892 | UINT64_C(17663258476035440640), // VSRLvr_v |
| 9893 | UINT64_C(17663258476035440640), // VSRLvrl |
| 9894 | UINT64_C(17663258476035440640), // VSRLvrl_v |
| 9895 | UINT64_C(17663258476035440640), // VSRLvrm |
| 9896 | UINT64_C(17663258476035440640), // VSRLvrmL |
| 9897 | UINT64_C(17663258476035440640), // VSRLvrmL_v |
| 9898 | UINT64_C(17663258476035440640), // VSRLvrm_v |
| 9899 | UINT64_C(17663258476035440640), // VSRLvrml |
| 9900 | UINT64_C(17663258476035440640), // VSRLvrml_v |
| 9901 | UINT64_C(17654110539292344320), // VSRLvv |
| 9902 | UINT64_C(17654110539292344320), // VSRLvvL |
| 9903 | UINT64_C(17654110539292344320), // VSRLvvL_v |
| 9904 | UINT64_C(17654110539292344320), // VSRLvv_v |
| 9905 | UINT64_C(17654110539292344320), // VSRLvvl |
| 9906 | UINT64_C(17654110539292344320), // VSRLvvl_v |
| 9907 | UINT64_C(17654110539292344320), // VSRLvvm |
| 9908 | UINT64_C(17654110539292344320), // VSRLvvmL |
| 9909 | UINT64_C(17654110539292344320), // VSRLvvmL_v |
| 9910 | UINT64_C(17654110539292344320), // VSRLvvm_v |
| 9911 | UINT64_C(17654110539292344320), // VSRLvvml |
| 9912 | UINT64_C(17654110539292344320), // VSRLvvml_v |
| 9913 | UINT64_C(15096066500701716480), // VST2DNCOTirv |
| 9914 | UINT64_C(15096066500701716480), // VST2DNCOTirvL |
| 9915 | UINT64_C(15096066500701716480), // VST2DNCOTirvl |
| 9916 | UINT64_C(15096066500701716480), // VST2DNCOTirvm |
| 9917 | UINT64_C(15096066500701716480), // VST2DNCOTirvmL |
| 9918 | UINT64_C(15096066500701716480), // VST2DNCOTirvml |
| 9919 | UINT64_C(15096065950945902592), // VST2DNCOTizv |
| 9920 | UINT64_C(15096065950945902592), // VST2DNCOTizvL |
| 9921 | UINT64_C(15096065950945902592), // VST2DNCOTizvl |
| 9922 | UINT64_C(15096065950945902592), // VST2DNCOTizvm |
| 9923 | UINT64_C(15096065950945902592), // VST2DNCOTizvmL |
| 9924 | UINT64_C(15096065950945902592), // VST2DNCOTizvml |
| 9925 | UINT64_C(15096207238190071808), // VST2DNCOTrrv |
| 9926 | UINT64_C(15096207238190071808), // VST2DNCOTrrvL |
| 9927 | UINT64_C(15096207238190071808), // VST2DNCOTrrvl |
| 9928 | UINT64_C(15096207238190071808), // VST2DNCOTrrvm |
| 9929 | UINT64_C(15096207238190071808), // VST2DNCOTrrvmL |
| 9930 | UINT64_C(15096207238190071808), // VST2DNCOTrrvml |
| 9931 | UINT64_C(15096206688434257920), // VST2DNCOTrzv |
| 9932 | UINT64_C(15096206688434257920), // VST2DNCOTrzvL |
| 9933 | UINT64_C(15096206688434257920), // VST2DNCOTrzvl |
| 9934 | UINT64_C(15096206688434257920), // VST2DNCOTrzvm |
| 9935 | UINT64_C(15096206688434257920), // VST2DNCOTrzvmL |
| 9936 | UINT64_C(15096206688434257920), // VST2DNCOTrzvml |
| 9937 | UINT64_C(15060037703682752512), // VST2DNCirv |
| 9938 | UINT64_C(15060037703682752512), // VST2DNCirvL |
| 9939 | UINT64_C(15060037703682752512), // VST2DNCirvl |
| 9940 | UINT64_C(15060037703682752512), // VST2DNCirvm |
| 9941 | UINT64_C(15060037703682752512), // VST2DNCirvmL |
| 9942 | UINT64_C(15060037703682752512), // VST2DNCirvml |
| 9943 | UINT64_C(15060037153926938624), // VST2DNCizv |
| 9944 | UINT64_C(15060037153926938624), // VST2DNCizvL |
| 9945 | UINT64_C(15060037153926938624), // VST2DNCizvl |
| 9946 | UINT64_C(15060037153926938624), // VST2DNCizvm |
| 9947 | UINT64_C(15060037153926938624), // VST2DNCizvmL |
| 9948 | UINT64_C(15060037153926938624), // VST2DNCizvml |
| 9949 | UINT64_C(15060178441171107840), // VST2DNCrrv |
| 9950 | UINT64_C(15060178441171107840), // VST2DNCrrvL |
| 9951 | UINT64_C(15060178441171107840), // VST2DNCrrvl |
| 9952 | UINT64_C(15060178441171107840), // VST2DNCrrvm |
| 9953 | UINT64_C(15060178441171107840), // VST2DNCrrvmL |
| 9954 | UINT64_C(15060178441171107840), // VST2DNCrrvml |
| 9955 | UINT64_C(15060177891415293952), // VST2DNCrzv |
| 9956 | UINT64_C(15060177891415293952), // VST2DNCrzvL |
| 9957 | UINT64_C(15060177891415293952), // VST2DNCrzvl |
| 9958 | UINT64_C(15060177891415293952), // VST2DNCrzvm |
| 9959 | UINT64_C(15060177891415293952), // VST2DNCrzvmL |
| 9960 | UINT64_C(15060177891415293952), // VST2DNCrzvml |
| 9961 | UINT64_C(15114080899211198464), // VST2DOTirv |
| 9962 | UINT64_C(15114080899211198464), // VST2DOTirvL |
| 9963 | UINT64_C(15114080899211198464), // VST2DOTirvl |
| 9964 | UINT64_C(15114080899211198464), // VST2DOTirvm |
| 9965 | UINT64_C(15114080899211198464), // VST2DOTirvmL |
| 9966 | UINT64_C(15114080899211198464), // VST2DOTirvml |
| 9967 | UINT64_C(15114080349455384576), // VST2DOTizv |
| 9968 | UINT64_C(15114080349455384576), // VST2DOTizvL |
| 9969 | UINT64_C(15114080349455384576), // VST2DOTizvl |
| 9970 | UINT64_C(15114080349455384576), // VST2DOTizvm |
| 9971 | UINT64_C(15114080349455384576), // VST2DOTizvmL |
| 9972 | UINT64_C(15114080349455384576), // VST2DOTizvml |
| 9973 | UINT64_C(15114221636699553792), // VST2DOTrrv |
| 9974 | UINT64_C(15114221636699553792), // VST2DOTrrvL |
| 9975 | UINT64_C(15114221636699553792), // VST2DOTrrvl |
| 9976 | UINT64_C(15114221636699553792), // VST2DOTrrvm |
| 9977 | UINT64_C(15114221636699553792), // VST2DOTrrvmL |
| 9978 | UINT64_C(15114221636699553792), // VST2DOTrrvml |
| 9979 | UINT64_C(15114221086943739904), // VST2DOTrzv |
| 9980 | UINT64_C(15114221086943739904), // VST2DOTrzvL |
| 9981 | UINT64_C(15114221086943739904), // VST2DOTrzvl |
| 9982 | UINT64_C(15114221086943739904), // VST2DOTrzvm |
| 9983 | UINT64_C(15114221086943739904), // VST2DOTrzvmL |
| 9984 | UINT64_C(15114221086943739904), // VST2DOTrzvml |
| 9985 | UINT64_C(15078052102192234496), // VST2Dirv |
| 9986 | UINT64_C(15078052102192234496), // VST2DirvL |
| 9987 | UINT64_C(15078052102192234496), // VST2Dirvl |
| 9988 | UINT64_C(15078052102192234496), // VST2Dirvm |
| 9989 | UINT64_C(15078052102192234496), // VST2DirvmL |
| 9990 | UINT64_C(15078052102192234496), // VST2Dirvml |
| 9991 | UINT64_C(15078051552436420608), // VST2Dizv |
| 9992 | UINT64_C(15078051552436420608), // VST2DizvL |
| 9993 | UINT64_C(15078051552436420608), // VST2Dizvl |
| 9994 | UINT64_C(15078051552436420608), // VST2Dizvm |
| 9995 | UINT64_C(15078051552436420608), // VST2DizvmL |
| 9996 | UINT64_C(15078051552436420608), // VST2Dizvml |
| 9997 | UINT64_C(15078192839680589824), // VST2Drrv |
| 9998 | UINT64_C(15078192839680589824), // VST2DrrvL |
| 9999 | UINT64_C(15078192839680589824), // VST2Drrvl |
| 10000 | UINT64_C(15078192839680589824), // VST2Drrvm |
| 10001 | UINT64_C(15078192839680589824), // VST2DrrvmL |
| 10002 | UINT64_C(15078192839680589824), // VST2Drrvml |
| 10003 | UINT64_C(15078192289924775936), // VST2Drzv |
| 10004 | UINT64_C(15078192289924775936), // VST2DrzvL |
| 10005 | UINT64_C(15078192289924775936), // VST2Drzvl |
| 10006 | UINT64_C(15078192289924775936), // VST2Drzvm |
| 10007 | UINT64_C(15078192289924775936), // VST2DrzvmL |
| 10008 | UINT64_C(15078192289924775936), // VST2Drzvml |
| 10009 | UINT64_C(15240181688777572352), // VSTL2DNCOTirv |
| 10010 | UINT64_C(15240181688777572352), // VSTL2DNCOTirvL |
| 10011 | UINT64_C(15240181688777572352), // VSTL2DNCOTirvl |
| 10012 | UINT64_C(15240181688777572352), // VSTL2DNCOTirvm |
| 10013 | UINT64_C(15240181688777572352), // VSTL2DNCOTirvmL |
| 10014 | UINT64_C(15240181688777572352), // VSTL2DNCOTirvml |
| 10015 | UINT64_C(15240181139021758464), // VSTL2DNCOTizv |
| 10016 | UINT64_C(15240181139021758464), // VSTL2DNCOTizvL |
| 10017 | UINT64_C(15240181139021758464), // VSTL2DNCOTizvl |
| 10018 | UINT64_C(15240181139021758464), // VSTL2DNCOTizvm |
| 10019 | UINT64_C(15240181139021758464), // VSTL2DNCOTizvmL |
| 10020 | UINT64_C(15240181139021758464), // VSTL2DNCOTizvml |
| 10021 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrv |
| 10022 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrvL |
| 10023 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrvl |
| 10024 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrvm |
| 10025 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrvmL |
| 10026 | UINT64_C(15240322426265927680), // VSTL2DNCOTrrvml |
| 10027 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzv |
| 10028 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzvL |
| 10029 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzvl |
| 10030 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzvm |
| 10031 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzvmL |
| 10032 | UINT64_C(15240321876510113792), // VSTL2DNCOTrzvml |
| 10033 | UINT64_C(15204152891758608384), // VSTL2DNCirv |
| 10034 | UINT64_C(15204152891758608384), // VSTL2DNCirvL |
| 10035 | UINT64_C(15204152891758608384), // VSTL2DNCirvl |
| 10036 | UINT64_C(15204152891758608384), // VSTL2DNCirvm |
| 10037 | UINT64_C(15204152891758608384), // VSTL2DNCirvmL |
| 10038 | UINT64_C(15204152891758608384), // VSTL2DNCirvml |
| 10039 | UINT64_C(15204152342002794496), // VSTL2DNCizv |
| 10040 | UINT64_C(15204152342002794496), // VSTL2DNCizvL |
| 10041 | UINT64_C(15204152342002794496), // VSTL2DNCizvl |
| 10042 | UINT64_C(15204152342002794496), // VSTL2DNCizvm |
| 10043 | UINT64_C(15204152342002794496), // VSTL2DNCizvmL |
| 10044 | UINT64_C(15204152342002794496), // VSTL2DNCizvml |
| 10045 | UINT64_C(15204293629246963712), // VSTL2DNCrrv |
| 10046 | UINT64_C(15204293629246963712), // VSTL2DNCrrvL |
| 10047 | UINT64_C(15204293629246963712), // VSTL2DNCrrvl |
| 10048 | UINT64_C(15204293629246963712), // VSTL2DNCrrvm |
| 10049 | UINT64_C(15204293629246963712), // VSTL2DNCrrvmL |
| 10050 | UINT64_C(15204293629246963712), // VSTL2DNCrrvml |
| 10051 | UINT64_C(15204293079491149824), // VSTL2DNCrzv |
| 10052 | UINT64_C(15204293079491149824), // VSTL2DNCrzvL |
| 10053 | UINT64_C(15204293079491149824), // VSTL2DNCrzvl |
| 10054 | UINT64_C(15204293079491149824), // VSTL2DNCrzvm |
| 10055 | UINT64_C(15204293079491149824), // VSTL2DNCrzvmL |
| 10056 | UINT64_C(15204293079491149824), // VSTL2DNCrzvml |
| 10057 | UINT64_C(15258196087287054336), // VSTL2DOTirv |
| 10058 | UINT64_C(15258196087287054336), // VSTL2DOTirvL |
| 10059 | UINT64_C(15258196087287054336), // VSTL2DOTirvl |
| 10060 | UINT64_C(15258196087287054336), // VSTL2DOTirvm |
| 10061 | UINT64_C(15258196087287054336), // VSTL2DOTirvmL |
| 10062 | UINT64_C(15258196087287054336), // VSTL2DOTirvml |
| 10063 | UINT64_C(15258195537531240448), // VSTL2DOTizv |
| 10064 | UINT64_C(15258195537531240448), // VSTL2DOTizvL |
| 10065 | UINT64_C(15258195537531240448), // VSTL2DOTizvl |
| 10066 | UINT64_C(15258195537531240448), // VSTL2DOTizvm |
| 10067 | UINT64_C(15258195537531240448), // VSTL2DOTizvmL |
| 10068 | UINT64_C(15258195537531240448), // VSTL2DOTizvml |
| 10069 | UINT64_C(15258336824775409664), // VSTL2DOTrrv |
| 10070 | UINT64_C(15258336824775409664), // VSTL2DOTrrvL |
| 10071 | UINT64_C(15258336824775409664), // VSTL2DOTrrvl |
| 10072 | UINT64_C(15258336824775409664), // VSTL2DOTrrvm |
| 10073 | UINT64_C(15258336824775409664), // VSTL2DOTrrvmL |
| 10074 | UINT64_C(15258336824775409664), // VSTL2DOTrrvml |
| 10075 | UINT64_C(15258336275019595776), // VSTL2DOTrzv |
| 10076 | UINT64_C(15258336275019595776), // VSTL2DOTrzvL |
| 10077 | UINT64_C(15258336275019595776), // VSTL2DOTrzvl |
| 10078 | UINT64_C(15258336275019595776), // VSTL2DOTrzvm |
| 10079 | UINT64_C(15258336275019595776), // VSTL2DOTrzvmL |
| 10080 | UINT64_C(15258336275019595776), // VSTL2DOTrzvml |
| 10081 | UINT64_C(15222167290268090368), // VSTL2Dirv |
| 10082 | UINT64_C(15222167290268090368), // VSTL2DirvL |
| 10083 | UINT64_C(15222167290268090368), // VSTL2Dirvl |
| 10084 | UINT64_C(15222167290268090368), // VSTL2Dirvm |
| 10085 | UINT64_C(15222167290268090368), // VSTL2DirvmL |
| 10086 | UINT64_C(15222167290268090368), // VSTL2Dirvml |
| 10087 | UINT64_C(15222166740512276480), // VSTL2Dizv |
| 10088 | UINT64_C(15222166740512276480), // VSTL2DizvL |
| 10089 | UINT64_C(15222166740512276480), // VSTL2Dizvl |
| 10090 | UINT64_C(15222166740512276480), // VSTL2Dizvm |
| 10091 | UINT64_C(15222166740512276480), // VSTL2DizvmL |
| 10092 | UINT64_C(15222166740512276480), // VSTL2Dizvml |
| 10093 | UINT64_C(15222308027756445696), // VSTL2Drrv |
| 10094 | UINT64_C(15222308027756445696), // VSTL2DrrvL |
| 10095 | UINT64_C(15222308027756445696), // VSTL2Drrvl |
| 10096 | UINT64_C(15222308027756445696), // VSTL2Drrvm |
| 10097 | UINT64_C(15222308027756445696), // VSTL2DrrvmL |
| 10098 | UINT64_C(15222308027756445696), // VSTL2Drrvml |
| 10099 | UINT64_C(15222307478000631808), // VSTL2Drzv |
| 10100 | UINT64_C(15222307478000631808), // VSTL2DrzvL |
| 10101 | UINT64_C(15222307478000631808), // VSTL2Drzvl |
| 10102 | UINT64_C(15222307478000631808), // VSTL2Drzvm |
| 10103 | UINT64_C(15222307478000631808), // VSTL2DrzvmL |
| 10104 | UINT64_C(15222307478000631808), // VSTL2Drzvml |
| 10105 | UINT64_C(10628495670350184448), // VSTLNCOTirv |
| 10106 | UINT64_C(10628495670350184448), // VSTLNCOTirvL |
| 10107 | UINT64_C(10628495670350184448), // VSTLNCOTirvl |
| 10108 | UINT64_C(10628495670350184448), // VSTLNCOTirvm |
| 10109 | UINT64_C(10628495670350184448), // VSTLNCOTirvmL |
| 10110 | UINT64_C(10628495670350184448), // VSTLNCOTirvml |
| 10111 | UINT64_C(10628495120594370560), // VSTLNCOTizv |
| 10112 | UINT64_C(10628495120594370560), // VSTLNCOTizvL |
| 10113 | UINT64_C(10628495120594370560), // VSTLNCOTizvl |
| 10114 | UINT64_C(10628495120594370560), // VSTLNCOTizvm |
| 10115 | UINT64_C(10628495120594370560), // VSTLNCOTizvmL |
| 10116 | UINT64_C(10628495120594370560), // VSTLNCOTizvml |
| 10117 | UINT64_C(10628636407838539776), // VSTLNCOTrrv |
| 10118 | UINT64_C(10628636407838539776), // VSTLNCOTrrvL |
| 10119 | UINT64_C(10628636407838539776), // VSTLNCOTrrvl |
| 10120 | UINT64_C(10628636407838539776), // VSTLNCOTrrvm |
| 10121 | UINT64_C(10628636407838539776), // VSTLNCOTrrvmL |
| 10122 | UINT64_C(10628636407838539776), // VSTLNCOTrrvml |
| 10123 | UINT64_C(10628635858082725888), // VSTLNCOTrzv |
| 10124 | UINT64_C(10628635858082725888), // VSTLNCOTrzvL |
| 10125 | UINT64_C(10628635858082725888), // VSTLNCOTrzvl |
| 10126 | UINT64_C(10628635858082725888), // VSTLNCOTrzvm |
| 10127 | UINT64_C(10628635858082725888), // VSTLNCOTrzvmL |
| 10128 | UINT64_C(10628635858082725888), // VSTLNCOTrzvml |
| 10129 | UINT64_C(10592466873331220480), // VSTLNCirv |
| 10130 | UINT64_C(10592466873331220480), // VSTLNCirvL |
| 10131 | UINT64_C(10592466873331220480), // VSTLNCirvl |
| 10132 | UINT64_C(10592466873331220480), // VSTLNCirvm |
| 10133 | UINT64_C(10592466873331220480), // VSTLNCirvmL |
| 10134 | UINT64_C(10592466873331220480), // VSTLNCirvml |
| 10135 | UINT64_C(10592466323575406592), // VSTLNCizv |
| 10136 | UINT64_C(10592466323575406592), // VSTLNCizvL |
| 10137 | UINT64_C(10592466323575406592), // VSTLNCizvl |
| 10138 | UINT64_C(10592466323575406592), // VSTLNCizvm |
| 10139 | UINT64_C(10592466323575406592), // VSTLNCizvmL |
| 10140 | UINT64_C(10592466323575406592), // VSTLNCizvml |
| 10141 | UINT64_C(10592607610819575808), // VSTLNCrrv |
| 10142 | UINT64_C(10592607610819575808), // VSTLNCrrvL |
| 10143 | UINT64_C(10592607610819575808), // VSTLNCrrvl |
| 10144 | UINT64_C(10592607610819575808), // VSTLNCrrvm |
| 10145 | UINT64_C(10592607610819575808), // VSTLNCrrvmL |
| 10146 | UINT64_C(10592607610819575808), // VSTLNCrrvml |
| 10147 | UINT64_C(10592607061063761920), // VSTLNCrzv |
| 10148 | UINT64_C(10592607061063761920), // VSTLNCrzvL |
| 10149 | UINT64_C(10592607061063761920), // VSTLNCrzvl |
| 10150 | UINT64_C(10592607061063761920), // VSTLNCrzvm |
| 10151 | UINT64_C(10592607061063761920), // VSTLNCrzvmL |
| 10152 | UINT64_C(10592607061063761920), // VSTLNCrzvml |
| 10153 | UINT64_C(10646510068859666432), // VSTLOTirv |
| 10154 | UINT64_C(10646510068859666432), // VSTLOTirvL |
| 10155 | UINT64_C(10646510068859666432), // VSTLOTirvl |
| 10156 | UINT64_C(10646510068859666432), // VSTLOTirvm |
| 10157 | UINT64_C(10646510068859666432), // VSTLOTirvmL |
| 10158 | UINT64_C(10646510068859666432), // VSTLOTirvml |
| 10159 | UINT64_C(10646509519103852544), // VSTLOTizv |
| 10160 | UINT64_C(10646509519103852544), // VSTLOTizvL |
| 10161 | UINT64_C(10646509519103852544), // VSTLOTizvl |
| 10162 | UINT64_C(10646509519103852544), // VSTLOTizvm |
| 10163 | UINT64_C(10646509519103852544), // VSTLOTizvmL |
| 10164 | UINT64_C(10646509519103852544), // VSTLOTizvml |
| 10165 | UINT64_C(10646650806348021760), // VSTLOTrrv |
| 10166 | UINT64_C(10646650806348021760), // VSTLOTrrvL |
| 10167 | UINT64_C(10646650806348021760), // VSTLOTrrvl |
| 10168 | UINT64_C(10646650806348021760), // VSTLOTrrvm |
| 10169 | UINT64_C(10646650806348021760), // VSTLOTrrvmL |
| 10170 | UINT64_C(10646650806348021760), // VSTLOTrrvml |
| 10171 | UINT64_C(10646650256592207872), // VSTLOTrzv |
| 10172 | UINT64_C(10646650256592207872), // VSTLOTrzvL |
| 10173 | UINT64_C(10646650256592207872), // VSTLOTrzvl |
| 10174 | UINT64_C(10646650256592207872), // VSTLOTrzvm |
| 10175 | UINT64_C(10646650256592207872), // VSTLOTrzvmL |
| 10176 | UINT64_C(10646650256592207872), // VSTLOTrzvml |
| 10177 | UINT64_C(10610481271840702464), // VSTLirv |
| 10178 | UINT64_C(10610481271840702464), // VSTLirvL |
| 10179 | UINT64_C(10610481271840702464), // VSTLirvl |
| 10180 | UINT64_C(10610481271840702464), // VSTLirvm |
| 10181 | UINT64_C(10610481271840702464), // VSTLirvmL |
| 10182 | UINT64_C(10610481271840702464), // VSTLirvml |
| 10183 | UINT64_C(10610480722084888576), // VSTLizv |
| 10184 | UINT64_C(10610480722084888576), // VSTLizvL |
| 10185 | UINT64_C(10610480722084888576), // VSTLizvl |
| 10186 | UINT64_C(10610480722084888576), // VSTLizvm |
| 10187 | UINT64_C(10610480722084888576), // VSTLizvmL |
| 10188 | UINT64_C(10610480722084888576), // VSTLizvml |
| 10189 | UINT64_C(10610622009329057792), // VSTLrrv |
| 10190 | UINT64_C(10610622009329057792), // VSTLrrvL |
| 10191 | UINT64_C(10610622009329057792), // VSTLrrvl |
| 10192 | UINT64_C(10610622009329057792), // VSTLrrvm |
| 10193 | UINT64_C(10610622009329057792), // VSTLrrvmL |
| 10194 | UINT64_C(10610622009329057792), // VSTLrrvml |
| 10195 | UINT64_C(10610621459573243904), // VSTLrzv |
| 10196 | UINT64_C(10610621459573243904), // VSTLrzvL |
| 10197 | UINT64_C(10610621459573243904), // VSTLrzvl |
| 10198 | UINT64_C(10610621459573243904), // VSTLrzvm |
| 10199 | UINT64_C(10610621459573243904), // VSTLrzvmL |
| 10200 | UINT64_C(10610621459573243904), // VSTLrzvml |
| 10201 | UINT64_C(10484380482274328576), // VSTNCOTirv |
| 10202 | UINT64_C(10484380482274328576), // VSTNCOTirvL |
| 10203 | UINT64_C(10484380482274328576), // VSTNCOTirvl |
| 10204 | UINT64_C(10484380482274328576), // VSTNCOTirvm |
| 10205 | UINT64_C(10484380482274328576), // VSTNCOTirvmL |
| 10206 | UINT64_C(10484380482274328576), // VSTNCOTirvml |
| 10207 | UINT64_C(10484379932518514688), // VSTNCOTizv |
| 10208 | UINT64_C(10484379932518514688), // VSTNCOTizvL |
| 10209 | UINT64_C(10484379932518514688), // VSTNCOTizvl |
| 10210 | UINT64_C(10484379932518514688), // VSTNCOTizvm |
| 10211 | UINT64_C(10484379932518514688), // VSTNCOTizvmL |
| 10212 | UINT64_C(10484379932518514688), // VSTNCOTizvml |
| 10213 | UINT64_C(10484521219762683904), // VSTNCOTrrv |
| 10214 | UINT64_C(10484521219762683904), // VSTNCOTrrvL |
| 10215 | UINT64_C(10484521219762683904), // VSTNCOTrrvl |
| 10216 | UINT64_C(10484521219762683904), // VSTNCOTrrvm |
| 10217 | UINT64_C(10484521219762683904), // VSTNCOTrrvmL |
| 10218 | UINT64_C(10484521219762683904), // VSTNCOTrrvml |
| 10219 | UINT64_C(10484520670006870016), // VSTNCOTrzv |
| 10220 | UINT64_C(10484520670006870016), // VSTNCOTrzvL |
| 10221 | UINT64_C(10484520670006870016), // VSTNCOTrzvl |
| 10222 | UINT64_C(10484520670006870016), // VSTNCOTrzvm |
| 10223 | UINT64_C(10484520670006870016), // VSTNCOTrzvmL |
| 10224 | UINT64_C(10484520670006870016), // VSTNCOTrzvml |
| 10225 | UINT64_C(10448351685255364608), // VSTNCirv |
| 10226 | UINT64_C(10448351685255364608), // VSTNCirvL |
| 10227 | UINT64_C(10448351685255364608), // VSTNCirvl |
| 10228 | UINT64_C(10448351685255364608), // VSTNCirvm |
| 10229 | UINT64_C(10448351685255364608), // VSTNCirvmL |
| 10230 | UINT64_C(10448351685255364608), // VSTNCirvml |
| 10231 | UINT64_C(10448351135499550720), // VSTNCizv |
| 10232 | UINT64_C(10448351135499550720), // VSTNCizvL |
| 10233 | UINT64_C(10448351135499550720), // VSTNCizvl |
| 10234 | UINT64_C(10448351135499550720), // VSTNCizvm |
| 10235 | UINT64_C(10448351135499550720), // VSTNCizvmL |
| 10236 | UINT64_C(10448351135499550720), // VSTNCizvml |
| 10237 | UINT64_C(10448492422743719936), // VSTNCrrv |
| 10238 | UINT64_C(10448492422743719936), // VSTNCrrvL |
| 10239 | UINT64_C(10448492422743719936), // VSTNCrrvl |
| 10240 | UINT64_C(10448492422743719936), // VSTNCrrvm |
| 10241 | UINT64_C(10448492422743719936), // VSTNCrrvmL |
| 10242 | UINT64_C(10448492422743719936), // VSTNCrrvml |
| 10243 | UINT64_C(10448491872987906048), // VSTNCrzv |
| 10244 | UINT64_C(10448491872987906048), // VSTNCrzvL |
| 10245 | UINT64_C(10448491872987906048), // VSTNCrzvl |
| 10246 | UINT64_C(10448491872987906048), // VSTNCrzvm |
| 10247 | UINT64_C(10448491872987906048), // VSTNCrzvmL |
| 10248 | UINT64_C(10448491872987906048), // VSTNCrzvml |
| 10249 | UINT64_C(10502394880783810560), // VSTOTirv |
| 10250 | UINT64_C(10502394880783810560), // VSTOTirvL |
| 10251 | UINT64_C(10502394880783810560), // VSTOTirvl |
| 10252 | UINT64_C(10502394880783810560), // VSTOTirvm |
| 10253 | UINT64_C(10502394880783810560), // VSTOTirvmL |
| 10254 | UINT64_C(10502394880783810560), // VSTOTirvml |
| 10255 | UINT64_C(10502394331027996672), // VSTOTizv |
| 10256 | UINT64_C(10502394331027996672), // VSTOTizvL |
| 10257 | UINT64_C(10502394331027996672), // VSTOTizvl |
| 10258 | UINT64_C(10502394331027996672), // VSTOTizvm |
| 10259 | UINT64_C(10502394331027996672), // VSTOTizvmL |
| 10260 | UINT64_C(10502394331027996672), // VSTOTizvml |
| 10261 | UINT64_C(10502535618272165888), // VSTOTrrv |
| 10262 | UINT64_C(10502535618272165888), // VSTOTrrvL |
| 10263 | UINT64_C(10502535618272165888), // VSTOTrrvl |
| 10264 | UINT64_C(10502535618272165888), // VSTOTrrvm |
| 10265 | UINT64_C(10502535618272165888), // VSTOTrrvmL |
| 10266 | UINT64_C(10502535618272165888), // VSTOTrrvml |
| 10267 | UINT64_C(10502535068516352000), // VSTOTrzv |
| 10268 | UINT64_C(10502535068516352000), // VSTOTrzvL |
| 10269 | UINT64_C(10502535068516352000), // VSTOTrzvl |
| 10270 | UINT64_C(10502535068516352000), // VSTOTrzvm |
| 10271 | UINT64_C(10502535068516352000), // VSTOTrzvmL |
| 10272 | UINT64_C(10502535068516352000), // VSTOTrzvml |
| 10273 | UINT64_C(15168124094739644416), // VSTU2DNCOTirv |
| 10274 | UINT64_C(15168124094739644416), // VSTU2DNCOTirvL |
| 10275 | UINT64_C(15168124094739644416), // VSTU2DNCOTirvl |
| 10276 | UINT64_C(15168124094739644416), // VSTU2DNCOTirvm |
| 10277 | UINT64_C(15168124094739644416), // VSTU2DNCOTirvmL |
| 10278 | UINT64_C(15168124094739644416), // VSTU2DNCOTirvml |
| 10279 | UINT64_C(15168123544983830528), // VSTU2DNCOTizv |
| 10280 | UINT64_C(15168123544983830528), // VSTU2DNCOTizvL |
| 10281 | UINT64_C(15168123544983830528), // VSTU2DNCOTizvl |
| 10282 | UINT64_C(15168123544983830528), // VSTU2DNCOTizvm |
| 10283 | UINT64_C(15168123544983830528), // VSTU2DNCOTizvmL |
| 10284 | UINT64_C(15168123544983830528), // VSTU2DNCOTizvml |
| 10285 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrv |
| 10286 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrvL |
| 10287 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrvl |
| 10288 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrvm |
| 10289 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrvmL |
| 10290 | UINT64_C(15168264832227999744), // VSTU2DNCOTrrvml |
| 10291 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzv |
| 10292 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzvL |
| 10293 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzvl |
| 10294 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzvm |
| 10295 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzvmL |
| 10296 | UINT64_C(15168264282472185856), // VSTU2DNCOTrzvml |
| 10297 | UINT64_C(15132095297720680448), // VSTU2DNCirv |
| 10298 | UINT64_C(15132095297720680448), // VSTU2DNCirvL |
| 10299 | UINT64_C(15132095297720680448), // VSTU2DNCirvl |
| 10300 | UINT64_C(15132095297720680448), // VSTU2DNCirvm |
| 10301 | UINT64_C(15132095297720680448), // VSTU2DNCirvmL |
| 10302 | UINT64_C(15132095297720680448), // VSTU2DNCirvml |
| 10303 | UINT64_C(15132094747964866560), // VSTU2DNCizv |
| 10304 | UINT64_C(15132094747964866560), // VSTU2DNCizvL |
| 10305 | UINT64_C(15132094747964866560), // VSTU2DNCizvl |
| 10306 | UINT64_C(15132094747964866560), // VSTU2DNCizvm |
| 10307 | UINT64_C(15132094747964866560), // VSTU2DNCizvmL |
| 10308 | UINT64_C(15132094747964866560), // VSTU2DNCizvml |
| 10309 | UINT64_C(15132236035209035776), // VSTU2DNCrrv |
| 10310 | UINT64_C(15132236035209035776), // VSTU2DNCrrvL |
| 10311 | UINT64_C(15132236035209035776), // VSTU2DNCrrvl |
| 10312 | UINT64_C(15132236035209035776), // VSTU2DNCrrvm |
| 10313 | UINT64_C(15132236035209035776), // VSTU2DNCrrvmL |
| 10314 | UINT64_C(15132236035209035776), // VSTU2DNCrrvml |
| 10315 | UINT64_C(15132235485453221888), // VSTU2DNCrzv |
| 10316 | UINT64_C(15132235485453221888), // VSTU2DNCrzvL |
| 10317 | UINT64_C(15132235485453221888), // VSTU2DNCrzvl |
| 10318 | UINT64_C(15132235485453221888), // VSTU2DNCrzvm |
| 10319 | UINT64_C(15132235485453221888), // VSTU2DNCrzvmL |
| 10320 | UINT64_C(15132235485453221888), // VSTU2DNCrzvml |
| 10321 | UINT64_C(15186138493249126400), // VSTU2DOTirv |
| 10322 | UINT64_C(15186138493249126400), // VSTU2DOTirvL |
| 10323 | UINT64_C(15186138493249126400), // VSTU2DOTirvl |
| 10324 | UINT64_C(15186138493249126400), // VSTU2DOTirvm |
| 10325 | UINT64_C(15186138493249126400), // VSTU2DOTirvmL |
| 10326 | UINT64_C(15186138493249126400), // VSTU2DOTirvml |
| 10327 | UINT64_C(15186137943493312512), // VSTU2DOTizv |
| 10328 | UINT64_C(15186137943493312512), // VSTU2DOTizvL |
| 10329 | UINT64_C(15186137943493312512), // VSTU2DOTizvl |
| 10330 | UINT64_C(15186137943493312512), // VSTU2DOTizvm |
| 10331 | UINT64_C(15186137943493312512), // VSTU2DOTizvmL |
| 10332 | UINT64_C(15186137943493312512), // VSTU2DOTizvml |
| 10333 | UINT64_C(15186279230737481728), // VSTU2DOTrrv |
| 10334 | UINT64_C(15186279230737481728), // VSTU2DOTrrvL |
| 10335 | UINT64_C(15186279230737481728), // VSTU2DOTrrvl |
| 10336 | UINT64_C(15186279230737481728), // VSTU2DOTrrvm |
| 10337 | UINT64_C(15186279230737481728), // VSTU2DOTrrvmL |
| 10338 | UINT64_C(15186279230737481728), // VSTU2DOTrrvml |
| 10339 | UINT64_C(15186278680981667840), // VSTU2DOTrzv |
| 10340 | UINT64_C(15186278680981667840), // VSTU2DOTrzvL |
| 10341 | UINT64_C(15186278680981667840), // VSTU2DOTrzvl |
| 10342 | UINT64_C(15186278680981667840), // VSTU2DOTrzvm |
| 10343 | UINT64_C(15186278680981667840), // VSTU2DOTrzvmL |
| 10344 | UINT64_C(15186278680981667840), // VSTU2DOTrzvml |
| 10345 | UINT64_C(15150109696230162432), // VSTU2Dirv |
| 10346 | UINT64_C(15150109696230162432), // VSTU2DirvL |
| 10347 | UINT64_C(15150109696230162432), // VSTU2Dirvl |
| 10348 | UINT64_C(15150109696230162432), // VSTU2Dirvm |
| 10349 | UINT64_C(15150109696230162432), // VSTU2DirvmL |
| 10350 | UINT64_C(15150109696230162432), // VSTU2Dirvml |
| 10351 | UINT64_C(15150109146474348544), // VSTU2Dizv |
| 10352 | UINT64_C(15150109146474348544), // VSTU2DizvL |
| 10353 | UINT64_C(15150109146474348544), // VSTU2Dizvl |
| 10354 | UINT64_C(15150109146474348544), // VSTU2Dizvm |
| 10355 | UINT64_C(15150109146474348544), // VSTU2DizvmL |
| 10356 | UINT64_C(15150109146474348544), // VSTU2Dizvml |
| 10357 | UINT64_C(15150250433718517760), // VSTU2Drrv |
| 10358 | UINT64_C(15150250433718517760), // VSTU2DrrvL |
| 10359 | UINT64_C(15150250433718517760), // VSTU2Drrvl |
| 10360 | UINT64_C(15150250433718517760), // VSTU2Drrvm |
| 10361 | UINT64_C(15150250433718517760), // VSTU2DrrvmL |
| 10362 | UINT64_C(15150250433718517760), // VSTU2Drrvml |
| 10363 | UINT64_C(15150249883962703872), // VSTU2Drzv |
| 10364 | UINT64_C(15150249883962703872), // VSTU2DrzvL |
| 10365 | UINT64_C(15150249883962703872), // VSTU2Drzvl |
| 10366 | UINT64_C(15150249883962703872), // VSTU2Drzvm |
| 10367 | UINT64_C(15150249883962703872), // VSTU2DrzvmL |
| 10368 | UINT64_C(15150249883962703872), // VSTU2Drzvml |
| 10369 | UINT64_C(10556438076312256512), // VSTUNCOTirv |
| 10370 | UINT64_C(10556438076312256512), // VSTUNCOTirvL |
| 10371 | UINT64_C(10556438076312256512), // VSTUNCOTirvl |
| 10372 | UINT64_C(10556438076312256512), // VSTUNCOTirvm |
| 10373 | UINT64_C(10556438076312256512), // VSTUNCOTirvmL |
| 10374 | UINT64_C(10556438076312256512), // VSTUNCOTirvml |
| 10375 | UINT64_C(10556437526556442624), // VSTUNCOTizv |
| 10376 | UINT64_C(10556437526556442624), // VSTUNCOTizvL |
| 10377 | UINT64_C(10556437526556442624), // VSTUNCOTizvl |
| 10378 | UINT64_C(10556437526556442624), // VSTUNCOTizvm |
| 10379 | UINT64_C(10556437526556442624), // VSTUNCOTizvmL |
| 10380 | UINT64_C(10556437526556442624), // VSTUNCOTizvml |
| 10381 | UINT64_C(10556578813800611840), // VSTUNCOTrrv |
| 10382 | UINT64_C(10556578813800611840), // VSTUNCOTrrvL |
| 10383 | UINT64_C(10556578813800611840), // VSTUNCOTrrvl |
| 10384 | UINT64_C(10556578813800611840), // VSTUNCOTrrvm |
| 10385 | UINT64_C(10556578813800611840), // VSTUNCOTrrvmL |
| 10386 | UINT64_C(10556578813800611840), // VSTUNCOTrrvml |
| 10387 | UINT64_C(10556578264044797952), // VSTUNCOTrzv |
| 10388 | UINT64_C(10556578264044797952), // VSTUNCOTrzvL |
| 10389 | UINT64_C(10556578264044797952), // VSTUNCOTrzvl |
| 10390 | UINT64_C(10556578264044797952), // VSTUNCOTrzvm |
| 10391 | UINT64_C(10556578264044797952), // VSTUNCOTrzvmL |
| 10392 | UINT64_C(10556578264044797952), // VSTUNCOTrzvml |
| 10393 | UINT64_C(10520409279293292544), // VSTUNCirv |
| 10394 | UINT64_C(10520409279293292544), // VSTUNCirvL |
| 10395 | UINT64_C(10520409279293292544), // VSTUNCirvl |
| 10396 | UINT64_C(10520409279293292544), // VSTUNCirvm |
| 10397 | UINT64_C(10520409279293292544), // VSTUNCirvmL |
| 10398 | UINT64_C(10520409279293292544), // VSTUNCirvml |
| 10399 | UINT64_C(10520408729537478656), // VSTUNCizv |
| 10400 | UINT64_C(10520408729537478656), // VSTUNCizvL |
| 10401 | UINT64_C(10520408729537478656), // VSTUNCizvl |
| 10402 | UINT64_C(10520408729537478656), // VSTUNCizvm |
| 10403 | UINT64_C(10520408729537478656), // VSTUNCizvmL |
| 10404 | UINT64_C(10520408729537478656), // VSTUNCizvml |
| 10405 | UINT64_C(10520550016781647872), // VSTUNCrrv |
| 10406 | UINT64_C(10520550016781647872), // VSTUNCrrvL |
| 10407 | UINT64_C(10520550016781647872), // VSTUNCrrvl |
| 10408 | UINT64_C(10520550016781647872), // VSTUNCrrvm |
| 10409 | UINT64_C(10520550016781647872), // VSTUNCrrvmL |
| 10410 | UINT64_C(10520550016781647872), // VSTUNCrrvml |
| 10411 | UINT64_C(10520549467025833984), // VSTUNCrzv |
| 10412 | UINT64_C(10520549467025833984), // VSTUNCrzvL |
| 10413 | UINT64_C(10520549467025833984), // VSTUNCrzvl |
| 10414 | UINT64_C(10520549467025833984), // VSTUNCrzvm |
| 10415 | UINT64_C(10520549467025833984), // VSTUNCrzvmL |
| 10416 | UINT64_C(10520549467025833984), // VSTUNCrzvml |
| 10417 | UINT64_C(10574452474821738496), // VSTUOTirv |
| 10418 | UINT64_C(10574452474821738496), // VSTUOTirvL |
| 10419 | UINT64_C(10574452474821738496), // VSTUOTirvl |
| 10420 | UINT64_C(10574452474821738496), // VSTUOTirvm |
| 10421 | UINT64_C(10574452474821738496), // VSTUOTirvmL |
| 10422 | UINT64_C(10574452474821738496), // VSTUOTirvml |
| 10423 | UINT64_C(10574451925065924608), // VSTUOTizv |
| 10424 | UINT64_C(10574451925065924608), // VSTUOTizvL |
| 10425 | UINT64_C(10574451925065924608), // VSTUOTizvl |
| 10426 | UINT64_C(10574451925065924608), // VSTUOTizvm |
| 10427 | UINT64_C(10574451925065924608), // VSTUOTizvmL |
| 10428 | UINT64_C(10574451925065924608), // VSTUOTizvml |
| 10429 | UINT64_C(10574593212310093824), // VSTUOTrrv |
| 10430 | UINT64_C(10574593212310093824), // VSTUOTrrvL |
| 10431 | UINT64_C(10574593212310093824), // VSTUOTrrvl |
| 10432 | UINT64_C(10574593212310093824), // VSTUOTrrvm |
| 10433 | UINT64_C(10574593212310093824), // VSTUOTrrvmL |
| 10434 | UINT64_C(10574593212310093824), // VSTUOTrrvml |
| 10435 | UINT64_C(10574592662554279936), // VSTUOTrzv |
| 10436 | UINT64_C(10574592662554279936), // VSTUOTrzvL |
| 10437 | UINT64_C(10574592662554279936), // VSTUOTrzvl |
| 10438 | UINT64_C(10574592662554279936), // VSTUOTrzvm |
| 10439 | UINT64_C(10574592662554279936), // VSTUOTrzvmL |
| 10440 | UINT64_C(10574592662554279936), // VSTUOTrzvml |
| 10441 | UINT64_C(10538423677802774528), // VSTUirv |
| 10442 | UINT64_C(10538423677802774528), // VSTUirvL |
| 10443 | UINT64_C(10538423677802774528), // VSTUirvl |
| 10444 | UINT64_C(10538423677802774528), // VSTUirvm |
| 10445 | UINT64_C(10538423677802774528), // VSTUirvmL |
| 10446 | UINT64_C(10538423677802774528), // VSTUirvml |
| 10447 | UINT64_C(10538423128046960640), // VSTUizv |
| 10448 | UINT64_C(10538423128046960640), // VSTUizvL |
| 10449 | UINT64_C(10538423128046960640), // VSTUizvl |
| 10450 | UINT64_C(10538423128046960640), // VSTUizvm |
| 10451 | UINT64_C(10538423128046960640), // VSTUizvmL |
| 10452 | UINT64_C(10538423128046960640), // VSTUizvml |
| 10453 | UINT64_C(10538564415291129856), // VSTUrrv |
| 10454 | UINT64_C(10538564415291129856), // VSTUrrvL |
| 10455 | UINT64_C(10538564415291129856), // VSTUrrvl |
| 10456 | UINT64_C(10538564415291129856), // VSTUrrvm |
| 10457 | UINT64_C(10538564415291129856), // VSTUrrvmL |
| 10458 | UINT64_C(10538564415291129856), // VSTUrrvml |
| 10459 | UINT64_C(10538563865535315968), // VSTUrzv |
| 10460 | UINT64_C(10538563865535315968), // VSTUrzvL |
| 10461 | UINT64_C(10538563865535315968), // VSTUrzvl |
| 10462 | UINT64_C(10538563865535315968), // VSTUrzvm |
| 10463 | UINT64_C(10538563865535315968), // VSTUrzvmL |
| 10464 | UINT64_C(10538563865535315968), // VSTUrzvml |
| 10465 | UINT64_C(10466366083764846592), // VSTirv |
| 10466 | UINT64_C(10466366083764846592), // VSTirvL |
| 10467 | UINT64_C(10466366083764846592), // VSTirvl |
| 10468 | UINT64_C(10466366083764846592), // VSTirvm |
| 10469 | UINT64_C(10466366083764846592), // VSTirvmL |
| 10470 | UINT64_C(10466366083764846592), // VSTirvml |
| 10471 | UINT64_C(10466365534009032704), // VSTizv |
| 10472 | UINT64_C(10466365534009032704), // VSTizvL |
| 10473 | UINT64_C(10466365534009032704), // VSTizvl |
| 10474 | UINT64_C(10466365534009032704), // VSTizvm |
| 10475 | UINT64_C(10466365534009032704), // VSTizvmL |
| 10476 | UINT64_C(10466365534009032704), // VSTizvml |
| 10477 | UINT64_C(10466506821253201920), // VSTrrv |
| 10478 | UINT64_C(10466506821253201920), // VSTrrvL |
| 10479 | UINT64_C(10466506821253201920), // VSTrrvl |
| 10480 | UINT64_C(10466506821253201920), // VSTrrvm |
| 10481 | UINT64_C(10466506821253201920), // VSTrrvmL |
| 10482 | UINT64_C(10466506821253201920), // VSTrrvml |
| 10483 | UINT64_C(10466506271497388032), // VSTrzv |
| 10484 | UINT64_C(10466506271497388032), // VSTrzvL |
| 10485 | UINT64_C(10466506271497388032), // VSTrzvl |
| 10486 | UINT64_C(10466506271497388032), // VSTrzvm |
| 10487 | UINT64_C(10466506271497388032), // VSTrzvmL |
| 10488 | UINT64_C(10466506271497388032), // VSTrzvml |
| 10489 | UINT64_C(11177934275133571072), // VSUBSLiv |
| 10490 | UINT64_C(11177934275133571072), // VSUBSLivL |
| 10491 | UINT64_C(11177934275133571072), // VSUBSLivL_v |
| 10492 | UINT64_C(11177934275133571072), // VSUBSLiv_v |
| 10493 | UINT64_C(11177934275133571072), // VSUBSLivl |
| 10494 | UINT64_C(11177934275133571072), // VSUBSLivl_v |
| 10495 | UINT64_C(11177934275133571072), // VSUBSLivm |
| 10496 | UINT64_C(11177934275133571072), // VSUBSLivmL |
| 10497 | UINT64_C(11177934275133571072), // VSUBSLivmL_v |
| 10498 | UINT64_C(11177934275133571072), // VSUBSLivm_v |
| 10499 | UINT64_C(11177934275133571072), // VSUBSLivml |
| 10500 | UINT64_C(11177934275133571072), // VSUBSLivml_v |
| 10501 | UINT64_C(11178075012621926400), // VSUBSLrv |
| 10502 | UINT64_C(11178075012621926400), // VSUBSLrvL |
| 10503 | UINT64_C(11178075012621926400), // VSUBSLrvL_v |
| 10504 | UINT64_C(11178075012621926400), // VSUBSLrv_v |
| 10505 | UINT64_C(11178075012621926400), // VSUBSLrvl |
| 10506 | UINT64_C(11178075012621926400), // VSUBSLrvl_v |
| 10507 | UINT64_C(11178075012621926400), // VSUBSLrvm |
| 10508 | UINT64_C(11178075012621926400), // VSUBSLrvmL |
| 10509 | UINT64_C(11178075012621926400), // VSUBSLrvmL_v |
| 10510 | UINT64_C(11178075012621926400), // VSUBSLrvm_v |
| 10511 | UINT64_C(11178075012621926400), // VSUBSLrvml |
| 10512 | UINT64_C(11178075012621926400), // VSUBSLrvml_v |
| 10513 | UINT64_C(11168927075878830080), // VSUBSLvv |
| 10514 | UINT64_C(11168927075878830080), // VSUBSLvvL |
| 10515 | UINT64_C(11168927075878830080), // VSUBSLvvL_v |
| 10516 | UINT64_C(11168927075878830080), // VSUBSLvv_v |
| 10517 | UINT64_C(11168927075878830080), // VSUBSLvvl |
| 10518 | UINT64_C(11168927075878830080), // VSUBSLvvl_v |
| 10519 | UINT64_C(11168927075878830080), // VSUBSLvvm |
| 10520 | UINT64_C(11168927075878830080), // VSUBSLvvmL |
| 10521 | UINT64_C(11168927075878830080), // VSUBSLvvmL_v |
| 10522 | UINT64_C(11168927075878830080), // VSUBSLvvm_v |
| 10523 | UINT64_C(11168927075878830080), // VSUBSLvvml |
| 10524 | UINT64_C(11168927075878830080), // VSUBSLvvml_v |
| 10525 | UINT64_C(15717562699523031040), // VSUBSWSXiv |
| 10526 | UINT64_C(15717562699523031040), // VSUBSWSXivL |
| 10527 | UINT64_C(15717562699523031040), // VSUBSWSXivL_v |
| 10528 | UINT64_C(15717562699523031040), // VSUBSWSXiv_v |
| 10529 | UINT64_C(15717562699523031040), // VSUBSWSXivl |
| 10530 | UINT64_C(15717562699523031040), // VSUBSWSXivl_v |
| 10531 | UINT64_C(15717562699523031040), // VSUBSWSXivm |
| 10532 | UINT64_C(15717562699523031040), // VSUBSWSXivmL |
| 10533 | UINT64_C(15717562699523031040), // VSUBSWSXivmL_v |
| 10534 | UINT64_C(15717562699523031040), // VSUBSWSXivm_v |
| 10535 | UINT64_C(15717562699523031040), // VSUBSWSXivml |
| 10536 | UINT64_C(15717562699523031040), // VSUBSWSXivml_v |
| 10537 | UINT64_C(15717703437011386368), // VSUBSWSXrv |
| 10538 | UINT64_C(15717703437011386368), // VSUBSWSXrvL |
| 10539 | UINT64_C(15717703437011386368), // VSUBSWSXrvL_v |
| 10540 | UINT64_C(15717703437011386368), // VSUBSWSXrv_v |
| 10541 | UINT64_C(15717703437011386368), // VSUBSWSXrvl |
| 10542 | UINT64_C(15717703437011386368), // VSUBSWSXrvl_v |
| 10543 | UINT64_C(15717703437011386368), // VSUBSWSXrvm |
| 10544 | UINT64_C(15717703437011386368), // VSUBSWSXrvmL |
| 10545 | UINT64_C(15717703437011386368), // VSUBSWSXrvmL_v |
| 10546 | UINT64_C(15717703437011386368), // VSUBSWSXrvm_v |
| 10547 | UINT64_C(15717703437011386368), // VSUBSWSXrvml |
| 10548 | UINT64_C(15717703437011386368), // VSUBSWSXrvml_v |
| 10549 | UINT64_C(15708555500268290048), // VSUBSWSXvv |
| 10550 | UINT64_C(15708555500268290048), // VSUBSWSXvvL |
| 10551 | UINT64_C(15708555500268290048), // VSUBSWSXvvL_v |
| 10552 | UINT64_C(15708555500268290048), // VSUBSWSXvv_v |
| 10553 | UINT64_C(15708555500268290048), // VSUBSWSXvvl |
| 10554 | UINT64_C(15708555500268290048), // VSUBSWSXvvl_v |
| 10555 | UINT64_C(15708555500268290048), // VSUBSWSXvvm |
| 10556 | UINT64_C(15708555500268290048), // VSUBSWSXvvmL |
| 10557 | UINT64_C(15708555500268290048), // VSUBSWSXvvmL_v |
| 10558 | UINT64_C(15708555500268290048), // VSUBSWSXvvm_v |
| 10559 | UINT64_C(15708555500268290048), // VSUBSWSXvvml |
| 10560 | UINT64_C(15708555500268290048), // VSUBSWSXvvml_v |
| 10561 | UINT64_C(15735577098032513024), // VSUBSWZXiv |
| 10562 | UINT64_C(15735577098032513024), // VSUBSWZXivL |
| 10563 | UINT64_C(15735577098032513024), // VSUBSWZXivL_v |
| 10564 | UINT64_C(15735577098032513024), // VSUBSWZXiv_v |
| 10565 | UINT64_C(15735577098032513024), // VSUBSWZXivl |
| 10566 | UINT64_C(15735577098032513024), // VSUBSWZXivl_v |
| 10567 | UINT64_C(15735577098032513024), // VSUBSWZXivm |
| 10568 | UINT64_C(15735577098032513024), // VSUBSWZXivmL |
| 10569 | UINT64_C(15735577098032513024), // VSUBSWZXivmL_v |
| 10570 | UINT64_C(15735577098032513024), // VSUBSWZXivm_v |
| 10571 | UINT64_C(15735577098032513024), // VSUBSWZXivml |
| 10572 | UINT64_C(15735577098032513024), // VSUBSWZXivml_v |
| 10573 | UINT64_C(15735717835520868352), // VSUBSWZXrv |
| 10574 | UINT64_C(15735717835520868352), // VSUBSWZXrvL |
| 10575 | UINT64_C(15735717835520868352), // VSUBSWZXrvL_v |
| 10576 | UINT64_C(15735717835520868352), // VSUBSWZXrv_v |
| 10577 | UINT64_C(15735717835520868352), // VSUBSWZXrvl |
| 10578 | UINT64_C(15735717835520868352), // VSUBSWZXrvl_v |
| 10579 | UINT64_C(15735717835520868352), // VSUBSWZXrvm |
| 10580 | UINT64_C(15735717835520868352), // VSUBSWZXrvmL |
| 10581 | UINT64_C(15735717835520868352), // VSUBSWZXrvmL_v |
| 10582 | UINT64_C(15735717835520868352), // VSUBSWZXrvm_v |
| 10583 | UINT64_C(15735717835520868352), // VSUBSWZXrvml |
| 10584 | UINT64_C(15735717835520868352), // VSUBSWZXrvml_v |
| 10585 | UINT64_C(15726569898777772032), // VSUBSWZXvv |
| 10586 | UINT64_C(15726569898777772032), // VSUBSWZXvvL |
| 10587 | UINT64_C(15726569898777772032), // VSUBSWZXvvL_v |
| 10588 | UINT64_C(15726569898777772032), // VSUBSWZXvv_v |
| 10589 | UINT64_C(15726569898777772032), // VSUBSWZXvvl |
| 10590 | UINT64_C(15726569898777772032), // VSUBSWZXvvl_v |
| 10591 | UINT64_C(15726569898777772032), // VSUBSWZXvvm |
| 10592 | UINT64_C(15726569898777772032), // VSUBSWZXvvmL |
| 10593 | UINT64_C(15726569898777772032), // VSUBSWZXvvmL_v |
| 10594 | UINT64_C(15726569898777772032), // VSUBSWZXvvm_v |
| 10595 | UINT64_C(15726569898777772032), // VSUBSWZXvvml |
| 10596 | UINT64_C(15726569898777772032), // VSUBSWZXvvml_v |
| 10597 | UINT64_C(15573447511447175168), // VSUBULiv |
| 10598 | UINT64_C(15573447511447175168), // VSUBULivL |
| 10599 | UINT64_C(15573447511447175168), // VSUBULivL_v |
| 10600 | UINT64_C(15573447511447175168), // VSUBULiv_v |
| 10601 | UINT64_C(15573447511447175168), // VSUBULivl |
| 10602 | UINT64_C(15573447511447175168), // VSUBULivl_v |
| 10603 | UINT64_C(15573447511447175168), // VSUBULivm |
| 10604 | UINT64_C(15573447511447175168), // VSUBULivmL |
| 10605 | UINT64_C(15573447511447175168), // VSUBULivmL_v |
| 10606 | UINT64_C(15573447511447175168), // VSUBULivm_v |
| 10607 | UINT64_C(15573447511447175168), // VSUBULivml |
| 10608 | UINT64_C(15573447511447175168), // VSUBULivml_v |
| 10609 | UINT64_C(15573588248935530496), // VSUBULrv |
| 10610 | UINT64_C(15573588248935530496), // VSUBULrvL |
| 10611 | UINT64_C(15573588248935530496), // VSUBULrvL_v |
| 10612 | UINT64_C(15573588248935530496), // VSUBULrv_v |
| 10613 | UINT64_C(15573588248935530496), // VSUBULrvl |
| 10614 | UINT64_C(15573588248935530496), // VSUBULrvl_v |
| 10615 | UINT64_C(15573588248935530496), // VSUBULrvm |
| 10616 | UINT64_C(15573588248935530496), // VSUBULrvmL |
| 10617 | UINT64_C(15573588248935530496), // VSUBULrvmL_v |
| 10618 | UINT64_C(15573588248935530496), // VSUBULrvm_v |
| 10619 | UINT64_C(15573588248935530496), // VSUBULrvml |
| 10620 | UINT64_C(15573588248935530496), // VSUBULrvml_v |
| 10621 | UINT64_C(15564440312192434176), // VSUBULvv |
| 10622 | UINT64_C(15564440312192434176), // VSUBULvvL |
| 10623 | UINT64_C(15564440312192434176), // VSUBULvvL_v |
| 10624 | UINT64_C(15564440312192434176), // VSUBULvv_v |
| 10625 | UINT64_C(15564440312192434176), // VSUBULvvl |
| 10626 | UINT64_C(15564440312192434176), // VSUBULvvl_v |
| 10627 | UINT64_C(15564440312192434176), // VSUBULvvm |
| 10628 | UINT64_C(15564440312192434176), // VSUBULvvmL |
| 10629 | UINT64_C(15564440312192434176), // VSUBULvvmL_v |
| 10630 | UINT64_C(15564440312192434176), // VSUBULvvm_v |
| 10631 | UINT64_C(15564440312192434176), // VSUBULvvml |
| 10632 | UINT64_C(15564440312192434176), // VSUBULvvml_v |
| 10633 | UINT64_C(15591461909956657152), // VSUBUWiv |
| 10634 | UINT64_C(15591461909956657152), // VSUBUWivL |
| 10635 | UINT64_C(15591461909956657152), // VSUBUWivL_v |
| 10636 | UINT64_C(15591461909956657152), // VSUBUWiv_v |
| 10637 | UINT64_C(15591461909956657152), // VSUBUWivl |
| 10638 | UINT64_C(15591461909956657152), // VSUBUWivl_v |
| 10639 | UINT64_C(15591461909956657152), // VSUBUWivm |
| 10640 | UINT64_C(15591461909956657152), // VSUBUWivmL |
| 10641 | UINT64_C(15591461909956657152), // VSUBUWivmL_v |
| 10642 | UINT64_C(15591461909956657152), // VSUBUWivm_v |
| 10643 | UINT64_C(15591461909956657152), // VSUBUWivml |
| 10644 | UINT64_C(15591461909956657152), // VSUBUWivml_v |
| 10645 | UINT64_C(15591602647445012480), // VSUBUWrv |
| 10646 | UINT64_C(15591602647445012480), // VSUBUWrvL |
| 10647 | UINT64_C(15591602647445012480), // VSUBUWrvL_v |
| 10648 | UINT64_C(15591602647445012480), // VSUBUWrv_v |
| 10649 | UINT64_C(15591602647445012480), // VSUBUWrvl |
| 10650 | UINT64_C(15591602647445012480), // VSUBUWrvl_v |
| 10651 | UINT64_C(15591602647445012480), // VSUBUWrvm |
| 10652 | UINT64_C(15591602647445012480), // VSUBUWrvmL |
| 10653 | UINT64_C(15591602647445012480), // VSUBUWrvmL_v |
| 10654 | UINT64_C(15591602647445012480), // VSUBUWrvm_v |
| 10655 | UINT64_C(15591602647445012480), // VSUBUWrvml |
| 10656 | UINT64_C(15591602647445012480), // VSUBUWrvml_v |
| 10657 | UINT64_C(15582454710701916160), // VSUBUWvv |
| 10658 | UINT64_C(15582454710701916160), // VSUBUWvvL |
| 10659 | UINT64_C(15582454710701916160), // VSUBUWvvL_v |
| 10660 | UINT64_C(15582454710701916160), // VSUBUWvv_v |
| 10661 | UINT64_C(15582454710701916160), // VSUBUWvvl |
| 10662 | UINT64_C(15582454710701916160), // VSUBUWvvl_v |
| 10663 | UINT64_C(15582454710701916160), // VSUBUWvvm |
| 10664 | UINT64_C(15582454710701916160), // VSUBUWvvmL |
| 10665 | UINT64_C(15582454710701916160), // VSUBUWvvmL_v |
| 10666 | UINT64_C(15582454710701916160), // VSUBUWvvm_v |
| 10667 | UINT64_C(15582454710701916160), // VSUBUWvvml |
| 10668 | UINT64_C(15582454710701916160), // VSUBUWvvml_v |
| 10669 | UINT64_C(12249790986447749120), // VSUMLv |
| 10670 | UINT64_C(12249790986447749120), // VSUMLvL |
| 10671 | UINT64_C(12249790986447749120), // VSUMLvL_v |
| 10672 | UINT64_C(12249790986447749120), // VSUMLv_v |
| 10673 | UINT64_C(12249790986447749120), // VSUMLvl |
| 10674 | UINT64_C(12249790986447749120), // VSUMLvl_v |
| 10675 | UINT64_C(12249790986447749120), // VSUMLvm |
| 10676 | UINT64_C(12249790986447749120), // VSUMLvmL |
| 10677 | UINT64_C(12249790986447749120), // VSUMLvmL_v |
| 10678 | UINT64_C(12249790986447749120), // VSUMLvm_v |
| 10679 | UINT64_C(12249790986447749120), // VSUMLvml |
| 10680 | UINT64_C(12249790986447749120), // VSUMLvml_v |
| 10681 | UINT64_C(16861477004875137024), // VSUMWSXv |
| 10682 | UINT64_C(16861477004875137024), // VSUMWSXvL |
| 10683 | UINT64_C(16861477004875137024), // VSUMWSXvL_v |
| 10684 | UINT64_C(16861477004875137024), // VSUMWSXv_v |
| 10685 | UINT64_C(16861477004875137024), // VSUMWSXvl |
| 10686 | UINT64_C(16861477004875137024), // VSUMWSXvl_v |
| 10687 | UINT64_C(16861477004875137024), // VSUMWSXvm |
| 10688 | UINT64_C(16861477004875137024), // VSUMWSXvmL |
| 10689 | UINT64_C(16861477004875137024), // VSUMWSXvmL_v |
| 10690 | UINT64_C(16861477004875137024), // VSUMWSXvm_v |
| 10691 | UINT64_C(16861477004875137024), // VSUMWSXvml |
| 10692 | UINT64_C(16861477004875137024), // VSUMWSXvml_v |
| 10693 | UINT64_C(16879491403384619008), // VSUMWZXv |
| 10694 | UINT64_C(16879491403384619008), // VSUMWZXvL |
| 10695 | UINT64_C(16879491403384619008), // VSUMWZXvL_v |
| 10696 | UINT64_C(16879491403384619008), // VSUMWZXv_v |
| 10697 | UINT64_C(16879491403384619008), // VSUMWZXvl |
| 10698 | UINT64_C(16879491403384619008), // VSUMWZXvl_v |
| 10699 | UINT64_C(16879491403384619008), // VSUMWZXvm |
| 10700 | UINT64_C(16879491403384619008), // VSUMWZXvmL |
| 10701 | UINT64_C(16879491403384619008), // VSUMWZXvmL_v |
| 10702 | UINT64_C(16879491403384619008), // VSUMWZXvm_v |
| 10703 | UINT64_C(16879491403384619008), // VSUMWZXvml |
| 10704 | UINT64_C(16879491403384619008), // VSUMWZXvml_v |
| 10705 | UINT64_C(14276410818764472320), // VXORmv |
| 10706 | UINT64_C(14276410818764472320), // VXORmvL |
| 10707 | UINT64_C(14276410818764472320), // VXORmvL_v |
| 10708 | UINT64_C(14276410818764472320), // VXORmv_v |
| 10709 | UINT64_C(14276410818764472320), // VXORmvl |
| 10710 | UINT64_C(14276410818764472320), // VXORmvl_v |
| 10711 | UINT64_C(14276410818764472320), // VXORmvm |
| 10712 | UINT64_C(14276410818764472320), // VXORmvmL |
| 10713 | UINT64_C(14276410818764472320), // VXORmvmL_v |
| 10714 | UINT64_C(14276410818764472320), // VXORmvm_v |
| 10715 | UINT64_C(14276410818764472320), // VXORmvml |
| 10716 | UINT64_C(14276410818764472320), // VXORmvml_v |
| 10717 | UINT64_C(14276551556252827648), // VXORrv |
| 10718 | UINT64_C(14276551556252827648), // VXORrvL |
| 10719 | UINT64_C(14276551556252827648), // VXORrvL_v |
| 10720 | UINT64_C(14276551556252827648), // VXORrv_v |
| 10721 | UINT64_C(14276551556252827648), // VXORrvl |
| 10722 | UINT64_C(14276551556252827648), // VXORrvl_v |
| 10723 | UINT64_C(14276551556252827648), // VXORrvm |
| 10724 | UINT64_C(14276551556252827648), // VXORrvmL |
| 10725 | UINT64_C(14276551556252827648), // VXORrvmL_v |
| 10726 | UINT64_C(14276551556252827648), // VXORrvm_v |
| 10727 | UINT64_C(14276551556252827648), // VXORrvml |
| 10728 | UINT64_C(14276551556252827648), // VXORrvml_v |
| 10729 | UINT64_C(14267403619509731328), // VXORvv |
| 10730 | UINT64_C(14267403619509731328), // VXORvvL |
| 10731 | UINT64_C(14267403619509731328), // VXORvvL_v |
| 10732 | UINT64_C(14267403619509731328), // VXORvv_v |
| 10733 | UINT64_C(14267403619509731328), // VXORvvl |
| 10734 | UINT64_C(14267403619509731328), // VXORvvl_v |
| 10735 | UINT64_C(14267403619509731328), // VXORvvm |
| 10736 | UINT64_C(14267403619509731328), // VXORvvmL |
| 10737 | UINT64_C(14267403619509731328), // VXORvvmL_v |
| 10738 | UINT64_C(14267403619509731328), // VXORvvm_v |
| 10739 | UINT64_C(14267403619509731328), // VXORvvml |
| 10740 | UINT64_C(14267403619509731328), // VXORvvml_v |
| 10741 | UINT64_C(9655717601082343424), // XORMmm |
| 10742 | UINT64_C(5044031582654955520), // XORim |
| 10743 | UINT64_C(5044032132410769408), // XORri |
| 10744 | UINT64_C(5044172320143310848), // XORrm |
| 10745 | UINT64_C(5044172869899124736), // XORrr |
| 10746 | UINT64_C(0) |
| 10747 | }; |
| 10748 | const unsigned opcode = MI.getOpcode(); |
| 10749 | uint64_t Value = InstBits[opcode]; |
| 10750 | uint64_t op = 0; |
| 10751 | (void)op; // suppress warning |
| 10752 | switch (opcode) { |
| 10753 | case VE::FENCEI: |
| 10754 | case VE::MONC: |
| 10755 | case VE::MONCHDB: |
| 10756 | case VE::NOP: |
| 10757 | case VE::RET: |
| 10758 | case VE::SVOB: { |
| 10759 | break; |
| 10760 | } |
| 10761 | case VE::BRCFDir: |
| 10762 | case VE::BRCFDir_nt: |
| 10763 | case VE::BRCFDir_t: |
| 10764 | case VE::BRCFDiz: |
| 10765 | case VE::BRCFDiz_nt: |
| 10766 | case VE::BRCFDiz_t: |
| 10767 | case VE::BRCFDrr: |
| 10768 | case VE::BRCFDrr_nt: |
| 10769 | case VE::BRCFDrr_t: |
| 10770 | case VE::BRCFDrz: |
| 10771 | case VE::BRCFDrz_nt: |
| 10772 | case VE::BRCFDrz_t: |
| 10773 | case VE::BRCFLir: |
| 10774 | case VE::BRCFLir_nt: |
| 10775 | case VE::BRCFLir_t: |
| 10776 | case VE::BRCFLiz: |
| 10777 | case VE::BRCFLiz_nt: |
| 10778 | case VE::BRCFLiz_t: |
| 10779 | case VE::BRCFLrr: |
| 10780 | case VE::BRCFLrr_nt: |
| 10781 | case VE::BRCFLrr_t: |
| 10782 | case VE::BRCFLrz: |
| 10783 | case VE::BRCFLrz_nt: |
| 10784 | case VE::BRCFLrz_t: |
| 10785 | case VE::BRCFSir: |
| 10786 | case VE::BRCFSir_nt: |
| 10787 | case VE::BRCFSir_t: |
| 10788 | case VE::BRCFSiz: |
| 10789 | case VE::BRCFSiz_nt: |
| 10790 | case VE::BRCFSiz_t: |
| 10791 | case VE::BRCFSrr: |
| 10792 | case VE::BRCFSrr_nt: |
| 10793 | case VE::BRCFSrr_t: |
| 10794 | case VE::BRCFSrz: |
| 10795 | case VE::BRCFSrz_nt: |
| 10796 | case VE::BRCFSrz_t: |
| 10797 | case VE::BRCFWir: |
| 10798 | case VE::BRCFWir_nt: |
| 10799 | case VE::BRCFWir_t: |
| 10800 | case VE::BRCFWiz: |
| 10801 | case VE::BRCFWiz_nt: |
| 10802 | case VE::BRCFWiz_t: |
| 10803 | case VE::BRCFWrr: |
| 10804 | case VE::BRCFWrr_nt: |
| 10805 | case VE::BRCFWrr_t: |
| 10806 | case VE::BRCFWrz: |
| 10807 | case VE::BRCFWrz_nt: |
| 10808 | case VE::BRCFWrz_t: { |
| 10809 | // op: cond |
| 10810 | op = getCCOpValue(MI, OpNo: 0, Fixups, STI); |
| 10811 | op &= UINT64_C(15); |
| 10812 | op <<= 48; |
| 10813 | Value |= op; |
| 10814 | // op: sy |
| 10815 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 10816 | op &= UINT64_C(127); |
| 10817 | op <<= 40; |
| 10818 | Value |= op; |
| 10819 | // op: sz |
| 10820 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 10821 | op &= UINT64_C(127); |
| 10822 | op <<= 32; |
| 10823 | Value |= op; |
| 10824 | // op: imm32 |
| 10825 | op = getBranchTargetOpValue(MI, OpNo: 3, Fixups, STI); |
| 10826 | op &= UINT64_C(4294967295); |
| 10827 | Value |= op; |
| 10828 | break; |
| 10829 | } |
| 10830 | case VE::BCFDiri: |
| 10831 | case VE::BCFDiri_nt: |
| 10832 | case VE::BCFDiri_t: |
| 10833 | case VE::BCFDizi: |
| 10834 | case VE::BCFDizi_nt: |
| 10835 | case VE::BCFDizi_t: |
| 10836 | case VE::BCFDrri: |
| 10837 | case VE::BCFDrri_nt: |
| 10838 | case VE::BCFDrri_t: |
| 10839 | case VE::BCFDrzi: |
| 10840 | case VE::BCFDrzi_nt: |
| 10841 | case VE::BCFDrzi_t: |
| 10842 | case VE::BCFLiri: |
| 10843 | case VE::BCFLiri_nt: |
| 10844 | case VE::BCFLiri_t: |
| 10845 | case VE::BCFLizi: |
| 10846 | case VE::BCFLizi_nt: |
| 10847 | case VE::BCFLizi_t: |
| 10848 | case VE::BCFLrri: |
| 10849 | case VE::BCFLrri_nt: |
| 10850 | case VE::BCFLrri_t: |
| 10851 | case VE::BCFLrzi: |
| 10852 | case VE::BCFLrzi_nt: |
| 10853 | case VE::BCFLrzi_t: |
| 10854 | case VE::BCFSiri: |
| 10855 | case VE::BCFSiri_nt: |
| 10856 | case VE::BCFSiri_t: |
| 10857 | case VE::BCFSizi: |
| 10858 | case VE::BCFSizi_nt: |
| 10859 | case VE::BCFSizi_t: |
| 10860 | case VE::BCFSrri: |
| 10861 | case VE::BCFSrri_nt: |
| 10862 | case VE::BCFSrri_t: |
| 10863 | case VE::BCFSrzi: |
| 10864 | case VE::BCFSrzi_nt: |
| 10865 | case VE::BCFSrzi_t: |
| 10866 | case VE::BCFWiri: |
| 10867 | case VE::BCFWiri_nt: |
| 10868 | case VE::BCFWiri_t: |
| 10869 | case VE::BCFWizi: |
| 10870 | case VE::BCFWizi_nt: |
| 10871 | case VE::BCFWizi_t: |
| 10872 | case VE::BCFWrri: |
| 10873 | case VE::BCFWrri_nt: |
| 10874 | case VE::BCFWrri_t: |
| 10875 | case VE::BCFWrzi: |
| 10876 | case VE::BCFWrzi_nt: |
| 10877 | case VE::BCFWrzi_t: { |
| 10878 | // op: cond |
| 10879 | op = getCCOpValue(MI, OpNo: 0, Fixups, STI); |
| 10880 | op &= UINT64_C(15); |
| 10881 | op <<= 48; |
| 10882 | Value |= op; |
| 10883 | // op: sy |
| 10884 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 10885 | op &= UINT64_C(127); |
| 10886 | op <<= 40; |
| 10887 | Value |= op; |
| 10888 | // op: sz |
| 10889 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 10890 | op &= UINT64_C(127); |
| 10891 | op <<= 32; |
| 10892 | Value |= op; |
| 10893 | // op: imm32 |
| 10894 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 10895 | op &= UINT64_C(4294967295); |
| 10896 | Value |= op; |
| 10897 | break; |
| 10898 | } |
| 10899 | case VE::BRCFDa: |
| 10900 | case VE::BRCFDa_nt: |
| 10901 | case VE::BRCFDa_t: |
| 10902 | case VE::BRCFDna: |
| 10903 | case VE::BRCFDna_nt: |
| 10904 | case VE::BRCFDna_t: |
| 10905 | case VE::BRCFLa: |
| 10906 | case VE::BRCFLa_nt: |
| 10907 | case VE::BRCFLa_t: |
| 10908 | case VE::BRCFLna: |
| 10909 | case VE::BRCFLna_nt: |
| 10910 | case VE::BRCFLna_t: |
| 10911 | case VE::BRCFSa: |
| 10912 | case VE::BRCFSa_nt: |
| 10913 | case VE::BRCFSa_t: |
| 10914 | case VE::BRCFSna: |
| 10915 | case VE::BRCFSna_nt: |
| 10916 | case VE::BRCFSna_t: |
| 10917 | case VE::BRCFWa: |
| 10918 | case VE::BRCFWa_nt: |
| 10919 | case VE::BRCFWa_t: |
| 10920 | case VE::BRCFWna: |
| 10921 | case VE::BRCFWna_nt: |
| 10922 | case VE::BRCFWna_t: { |
| 10923 | // op: imm32 |
| 10924 | op = getBranchTargetOpValue(MI, OpNo: 0, Fixups, STI); |
| 10925 | op &= UINT64_C(4294967295); |
| 10926 | Value |= op; |
| 10927 | break; |
| 10928 | } |
| 10929 | case VE::FENCEM: { |
| 10930 | // op: kind |
| 10931 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 10932 | op &= UINT64_C(3); |
| 10933 | op <<= 48; |
| 10934 | Value |= op; |
| 10935 | break; |
| 10936 | } |
| 10937 | case VE::FENCEC: { |
| 10938 | // op: kind |
| 10939 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 10940 | op &= UINT64_C(7); |
| 10941 | op <<= 40; |
| 10942 | Value |= op; |
| 10943 | break; |
| 10944 | } |
| 10945 | case VE::PVFMKSLOam: |
| 10946 | case VE::PVFMKSLOamL: |
| 10947 | case VE::PVFMKSLOaml: |
| 10948 | case VE::PVFMKSLOnam: |
| 10949 | case VE::PVFMKSLOnamL: |
| 10950 | case VE::PVFMKSLOnaml: |
| 10951 | case VE::PVFMKSUPam: |
| 10952 | case VE::PVFMKSUPamL: |
| 10953 | case VE::PVFMKSUPaml: |
| 10954 | case VE::PVFMKSUPnam: |
| 10955 | case VE::PVFMKSUPnamL: |
| 10956 | case VE::PVFMKSUPnaml: |
| 10957 | case VE::PVFMKWLOam: |
| 10958 | case VE::PVFMKWLOamL: |
| 10959 | case VE::PVFMKWLOaml: |
| 10960 | case VE::PVFMKWLOnam: |
| 10961 | case VE::PVFMKWLOnamL: |
| 10962 | case VE::PVFMKWLOnaml: |
| 10963 | case VE::PVFMKWUPam: |
| 10964 | case VE::PVFMKWUPamL: |
| 10965 | case VE::PVFMKWUPaml: |
| 10966 | case VE::PVFMKWUPnam: |
| 10967 | case VE::PVFMKWUPnamL: |
| 10968 | case VE::PVFMKWUPnaml: |
| 10969 | case VE::PVSEQLOm: |
| 10970 | case VE::PVSEQLOmL: |
| 10971 | case VE::PVSEQLOmL_v: |
| 10972 | case VE::PVSEQLOm_v: |
| 10973 | case VE::PVSEQLOml: |
| 10974 | case VE::PVSEQLOml_v: |
| 10975 | case VE::PVSEQUPm: |
| 10976 | case VE::PVSEQUPmL: |
| 10977 | case VE::PVSEQUPmL_v: |
| 10978 | case VE::PVSEQUPm_v: |
| 10979 | case VE::PVSEQUPml: |
| 10980 | case VE::PVSEQUPml_v: |
| 10981 | case VE::PVSEQm: |
| 10982 | case VE::PVSEQmL: |
| 10983 | case VE::PVSEQmL_v: |
| 10984 | case VE::PVSEQm_v: |
| 10985 | case VE::PVSEQml: |
| 10986 | case VE::PVSEQml_v: |
| 10987 | case VE::VFMKDam: |
| 10988 | case VE::VFMKDamL: |
| 10989 | case VE::VFMKDaml: |
| 10990 | case VE::VFMKDnam: |
| 10991 | case VE::VFMKDnamL: |
| 10992 | case VE::VFMKDnaml: |
| 10993 | case VE::VFMKLam: |
| 10994 | case VE::VFMKLamL: |
| 10995 | case VE::VFMKLaml: |
| 10996 | case VE::VFMKLnam: |
| 10997 | case VE::VFMKLnamL: |
| 10998 | case VE::VFMKLnaml: |
| 10999 | case VE::VFMKSam: |
| 11000 | case VE::VFMKSamL: |
| 11001 | case VE::VFMKSaml: |
| 11002 | case VE::VFMKSnam: |
| 11003 | case VE::VFMKSnamL: |
| 11004 | case VE::VFMKSnaml: |
| 11005 | case VE::VFMKWam: |
| 11006 | case VE::VFMKWamL: |
| 11007 | case VE::VFMKWaml: |
| 11008 | case VE::VFMKWnam: |
| 11009 | case VE::VFMKWnamL: |
| 11010 | case VE::VFMKWnaml: |
| 11011 | case VE::VSEQm: |
| 11012 | case VE::VSEQmL: |
| 11013 | case VE::VSEQmL_v: |
| 11014 | case VE::VSEQm_v: |
| 11015 | case VE::VSEQml: |
| 11016 | case VE::VSEQml_v: { |
| 11017 | // op: m |
| 11018 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 11019 | op &= UINT64_C(15); |
| 11020 | op <<= 48; |
| 11021 | Value |= op; |
| 11022 | // op: vx |
| 11023 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 11024 | op &= UINT64_C(255); |
| 11025 | op <<= 24; |
| 11026 | Value |= op; |
| 11027 | break; |
| 11028 | } |
| 11029 | case VE::PVBRDim: |
| 11030 | case VE::PVBRDimL: |
| 11031 | case VE::PVBRDimL_v: |
| 11032 | case VE::PVBRDim_v: |
| 11033 | case VE::PVBRDiml: |
| 11034 | case VE::PVBRDiml_v: |
| 11035 | case VE::PVBRDrm: |
| 11036 | case VE::PVBRDrmL: |
| 11037 | case VE::PVBRDrmL_v: |
| 11038 | case VE::PVBRDrm_v: |
| 11039 | case VE::PVBRDrml: |
| 11040 | case VE::PVBRDrml_v: |
| 11041 | case VE::VBRDLim: |
| 11042 | case VE::VBRDLimL: |
| 11043 | case VE::VBRDLimL_v: |
| 11044 | case VE::VBRDLim_v: |
| 11045 | case VE::VBRDLiml: |
| 11046 | case VE::VBRDLiml_v: |
| 11047 | case VE::VBRDLrm: |
| 11048 | case VE::VBRDLrmL: |
| 11049 | case VE::VBRDLrmL_v: |
| 11050 | case VE::VBRDLrm_v: |
| 11051 | case VE::VBRDLrml: |
| 11052 | case VE::VBRDLrml_v: |
| 11053 | case VE::VBRDUim: |
| 11054 | case VE::VBRDUimL: |
| 11055 | case VE::VBRDUimL_v: |
| 11056 | case VE::VBRDUim_v: |
| 11057 | case VE::VBRDUiml: |
| 11058 | case VE::VBRDUiml_v: |
| 11059 | case VE::VBRDUrm: |
| 11060 | case VE::VBRDUrmL: |
| 11061 | case VE::VBRDUrmL_v: |
| 11062 | case VE::VBRDUrm_v: |
| 11063 | case VE::VBRDUrml: |
| 11064 | case VE::VBRDUrml_v: |
| 11065 | case VE::VBRDim: |
| 11066 | case VE::VBRDimL: |
| 11067 | case VE::VBRDimL_v: |
| 11068 | case VE::VBRDim_v: |
| 11069 | case VE::VBRDiml: |
| 11070 | case VE::VBRDiml_v: |
| 11071 | case VE::VBRDrm: |
| 11072 | case VE::VBRDrmL: |
| 11073 | case VE::VBRDrmL_v: |
| 11074 | case VE::VBRDrm_v: |
| 11075 | case VE::VBRDrml: |
| 11076 | case VE::VBRDrml_v: { |
| 11077 | // op: m |
| 11078 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 11079 | op &= UINT64_C(15); |
| 11080 | op <<= 48; |
| 11081 | Value |= op; |
| 11082 | // op: sy |
| 11083 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 11084 | op &= UINT64_C(127); |
| 11085 | op <<= 40; |
| 11086 | Value |= op; |
| 11087 | // op: vx |
| 11088 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 11089 | op &= UINT64_C(255); |
| 11090 | op <<= 24; |
| 11091 | Value |= op; |
| 11092 | break; |
| 11093 | } |
| 11094 | case VE::PVCVTSWLOvm: |
| 11095 | case VE::PVCVTSWLOvmL: |
| 11096 | case VE::PVCVTSWLOvmL_v: |
| 11097 | case VE::PVCVTSWLOvm_v: |
| 11098 | case VE::PVCVTSWLOvml: |
| 11099 | case VE::PVCVTSWLOvml_v: |
| 11100 | case VE::PVCVTSWUPvm: |
| 11101 | case VE::PVCVTSWUPvmL: |
| 11102 | case VE::PVCVTSWUPvmL_v: |
| 11103 | case VE::PVCVTSWUPvm_v: |
| 11104 | case VE::PVCVTSWUPvml: |
| 11105 | case VE::PVCVTSWUPvml_v: |
| 11106 | case VE::PVCVTSWvm: |
| 11107 | case VE::PVCVTSWvmL: |
| 11108 | case VE::PVCVTSWvmL_v: |
| 11109 | case VE::PVCVTSWvm_v: |
| 11110 | case VE::PVCVTSWvml: |
| 11111 | case VE::PVCVTSWvml_v: |
| 11112 | case VE::PVRCPLOvm: |
| 11113 | case VE::PVRCPLOvmL: |
| 11114 | case VE::PVRCPLOvmL_v: |
| 11115 | case VE::PVRCPLOvm_v: |
| 11116 | case VE::PVRCPLOvml: |
| 11117 | case VE::PVRCPLOvml_v: |
| 11118 | case VE::PVRCPUPvm: |
| 11119 | case VE::PVRCPUPvmL: |
| 11120 | case VE::PVRCPUPvmL_v: |
| 11121 | case VE::PVRCPUPvm_v: |
| 11122 | case VE::PVRCPUPvml: |
| 11123 | case VE::PVRCPUPvml_v: |
| 11124 | case VE::PVRCPvm: |
| 11125 | case VE::PVRCPvmL: |
| 11126 | case VE::PVRCPvmL_v: |
| 11127 | case VE::PVRCPvm_v: |
| 11128 | case VE::PVRCPvml: |
| 11129 | case VE::PVRCPvml_v: |
| 11130 | case VE::PVRSQRTLONEXvm: |
| 11131 | case VE::PVRSQRTLONEXvmL: |
| 11132 | case VE::PVRSQRTLONEXvmL_v: |
| 11133 | case VE::PVRSQRTLONEXvm_v: |
| 11134 | case VE::PVRSQRTLONEXvml: |
| 11135 | case VE::PVRSQRTLONEXvml_v: |
| 11136 | case VE::PVRSQRTLOvm: |
| 11137 | case VE::PVRSQRTLOvmL: |
| 11138 | case VE::PVRSQRTLOvmL_v: |
| 11139 | case VE::PVRSQRTLOvm_v: |
| 11140 | case VE::PVRSQRTLOvml: |
| 11141 | case VE::PVRSQRTLOvml_v: |
| 11142 | case VE::PVRSQRTNEXvm: |
| 11143 | case VE::PVRSQRTNEXvmL: |
| 11144 | case VE::PVRSQRTNEXvmL_v: |
| 11145 | case VE::PVRSQRTNEXvm_v: |
| 11146 | case VE::PVRSQRTNEXvml: |
| 11147 | case VE::PVRSQRTNEXvml_v: |
| 11148 | case VE::PVRSQRTUPNEXvm: |
| 11149 | case VE::PVRSQRTUPNEXvmL: |
| 11150 | case VE::PVRSQRTUPNEXvmL_v: |
| 11151 | case VE::PVRSQRTUPNEXvm_v: |
| 11152 | case VE::PVRSQRTUPNEXvml: |
| 11153 | case VE::PVRSQRTUPNEXvml_v: |
| 11154 | case VE::PVRSQRTUPvm: |
| 11155 | case VE::PVRSQRTUPvmL: |
| 11156 | case VE::PVRSQRTUPvmL_v: |
| 11157 | case VE::PVRSQRTUPvm_v: |
| 11158 | case VE::PVRSQRTUPvml: |
| 11159 | case VE::PVRSQRTUPvml_v: |
| 11160 | case VE::PVRSQRTvm: |
| 11161 | case VE::PVRSQRTvmL: |
| 11162 | case VE::PVRSQRTvmL_v: |
| 11163 | case VE::PVRSQRTvm_v: |
| 11164 | case VE::PVRSQRTvml: |
| 11165 | case VE::PVRSQRTvml_v: |
| 11166 | case VE::VCVTDLvm: |
| 11167 | case VE::VCVTDLvmL: |
| 11168 | case VE::VCVTDLvmL_v: |
| 11169 | case VE::VCVTDLvm_v: |
| 11170 | case VE::VCVTDLvml: |
| 11171 | case VE::VCVTDLvml_v: |
| 11172 | case VE::VCVTDSvm: |
| 11173 | case VE::VCVTDSvmL: |
| 11174 | case VE::VCVTDSvmL_v: |
| 11175 | case VE::VCVTDSvm_v: |
| 11176 | case VE::VCVTDSvml: |
| 11177 | case VE::VCVTDSvml_v: |
| 11178 | case VE::VCVTDWvm: |
| 11179 | case VE::VCVTDWvmL: |
| 11180 | case VE::VCVTDWvmL_v: |
| 11181 | case VE::VCVTDWvm_v: |
| 11182 | case VE::VCVTDWvml: |
| 11183 | case VE::VCVTDWvml_v: |
| 11184 | case VE::VCVTSDvm: |
| 11185 | case VE::VCVTSDvmL: |
| 11186 | case VE::VCVTSDvmL_v: |
| 11187 | case VE::VCVTSDvm_v: |
| 11188 | case VE::VCVTSDvml: |
| 11189 | case VE::VCVTSDvml_v: |
| 11190 | case VE::VCVTSWvm: |
| 11191 | case VE::VCVTSWvmL: |
| 11192 | case VE::VCVTSWvmL_v: |
| 11193 | case VE::VCVTSWvm_v: |
| 11194 | case VE::VCVTSWvml: |
| 11195 | case VE::VCVTSWvml_v: |
| 11196 | case VE::VFRMAXDFSTvm: |
| 11197 | case VE::VFRMAXDFSTvmL: |
| 11198 | case VE::VFRMAXDFSTvmL_v: |
| 11199 | case VE::VFRMAXDFSTvm_v: |
| 11200 | case VE::VFRMAXDFSTvml: |
| 11201 | case VE::VFRMAXDFSTvml_v: |
| 11202 | case VE::VFRMAXDLSTvm: |
| 11203 | case VE::VFRMAXDLSTvmL: |
| 11204 | case VE::VFRMAXDLSTvmL_v: |
| 11205 | case VE::VFRMAXDLSTvm_v: |
| 11206 | case VE::VFRMAXDLSTvml: |
| 11207 | case VE::VFRMAXDLSTvml_v: |
| 11208 | case VE::VFRMAXSFSTvm: |
| 11209 | case VE::VFRMAXSFSTvmL: |
| 11210 | case VE::VFRMAXSFSTvmL_v: |
| 11211 | case VE::VFRMAXSFSTvm_v: |
| 11212 | case VE::VFRMAXSFSTvml: |
| 11213 | case VE::VFRMAXSFSTvml_v: |
| 11214 | case VE::VFRMAXSLSTvm: |
| 11215 | case VE::VFRMAXSLSTvmL: |
| 11216 | case VE::VFRMAXSLSTvmL_v: |
| 11217 | case VE::VFRMAXSLSTvm_v: |
| 11218 | case VE::VFRMAXSLSTvml: |
| 11219 | case VE::VFRMAXSLSTvml_v: |
| 11220 | case VE::VFRMINDFSTvm: |
| 11221 | case VE::VFRMINDFSTvmL: |
| 11222 | case VE::VFRMINDFSTvmL_v: |
| 11223 | case VE::VFRMINDFSTvm_v: |
| 11224 | case VE::VFRMINDFSTvml: |
| 11225 | case VE::VFRMINDFSTvml_v: |
| 11226 | case VE::VFRMINDLSTvm: |
| 11227 | case VE::VFRMINDLSTvmL: |
| 11228 | case VE::VFRMINDLSTvmL_v: |
| 11229 | case VE::VFRMINDLSTvm_v: |
| 11230 | case VE::VFRMINDLSTvml: |
| 11231 | case VE::VFRMINDLSTvml_v: |
| 11232 | case VE::VFRMINSFSTvm: |
| 11233 | case VE::VFRMINSFSTvmL: |
| 11234 | case VE::VFRMINSFSTvmL_v: |
| 11235 | case VE::VFRMINSFSTvm_v: |
| 11236 | case VE::VFRMINSFSTvml: |
| 11237 | case VE::VFRMINSFSTvml_v: |
| 11238 | case VE::VFRMINSLSTvm: |
| 11239 | case VE::VFRMINSLSTvmL: |
| 11240 | case VE::VFRMINSLSTvmL_v: |
| 11241 | case VE::VFRMINSLSTvm_v: |
| 11242 | case VE::VFRMINSLSTvml: |
| 11243 | case VE::VFRMINSLSTvml_v: |
| 11244 | case VE::VFSQRTDvm: |
| 11245 | case VE::VFSQRTDvmL: |
| 11246 | case VE::VFSQRTDvmL_v: |
| 11247 | case VE::VFSQRTDvm_v: |
| 11248 | case VE::VFSQRTDvml: |
| 11249 | case VE::VFSQRTDvml_v: |
| 11250 | case VE::VFSQRTSvm: |
| 11251 | case VE::VFSQRTSvmL: |
| 11252 | case VE::VFSQRTSvmL_v: |
| 11253 | case VE::VFSQRTSvm_v: |
| 11254 | case VE::VFSQRTSvml: |
| 11255 | case VE::VFSQRTSvml_v: |
| 11256 | case VE::VFSUMDvm: |
| 11257 | case VE::VFSUMDvmL: |
| 11258 | case VE::VFSUMDvmL_v: |
| 11259 | case VE::VFSUMDvm_v: |
| 11260 | case VE::VFSUMDvml: |
| 11261 | case VE::VFSUMDvml_v: |
| 11262 | case VE::VFSUMSvm: |
| 11263 | case VE::VFSUMSvmL: |
| 11264 | case VE::VFSUMSvmL_v: |
| 11265 | case VE::VFSUMSvm_v: |
| 11266 | case VE::VFSUMSvml: |
| 11267 | case VE::VFSUMSvml_v: |
| 11268 | case VE::VRANDvm: |
| 11269 | case VE::VRANDvmL: |
| 11270 | case VE::VRANDvmL_v: |
| 11271 | case VE::VRANDvm_v: |
| 11272 | case VE::VRANDvml: |
| 11273 | case VE::VRANDvml_v: |
| 11274 | case VE::VRCPDvm: |
| 11275 | case VE::VRCPDvmL: |
| 11276 | case VE::VRCPDvmL_v: |
| 11277 | case VE::VRCPDvm_v: |
| 11278 | case VE::VRCPDvml: |
| 11279 | case VE::VRCPDvml_v: |
| 11280 | case VE::VRCPSvm: |
| 11281 | case VE::VRCPSvmL: |
| 11282 | case VE::VRCPSvmL_v: |
| 11283 | case VE::VRCPSvm_v: |
| 11284 | case VE::VRCPSvml: |
| 11285 | case VE::VRCPSvml_v: |
| 11286 | case VE::VRMAXSLFSTvm: |
| 11287 | case VE::VRMAXSLFSTvmL: |
| 11288 | case VE::VRMAXSLFSTvmL_v: |
| 11289 | case VE::VRMAXSLFSTvm_v: |
| 11290 | case VE::VRMAXSLFSTvml: |
| 11291 | case VE::VRMAXSLFSTvml_v: |
| 11292 | case VE::VRMAXSLLSTvm: |
| 11293 | case VE::VRMAXSLLSTvmL: |
| 11294 | case VE::VRMAXSLLSTvmL_v: |
| 11295 | case VE::VRMAXSLLSTvm_v: |
| 11296 | case VE::VRMAXSLLSTvml: |
| 11297 | case VE::VRMAXSLLSTvml_v: |
| 11298 | case VE::VRMAXSWFSTSXvm: |
| 11299 | case VE::VRMAXSWFSTSXvmL: |
| 11300 | case VE::VRMAXSWFSTSXvmL_v: |
| 11301 | case VE::VRMAXSWFSTSXvm_v: |
| 11302 | case VE::VRMAXSWFSTSXvml: |
| 11303 | case VE::VRMAXSWFSTSXvml_v: |
| 11304 | case VE::VRMAXSWFSTZXvm: |
| 11305 | case VE::VRMAXSWFSTZXvmL: |
| 11306 | case VE::VRMAXSWFSTZXvmL_v: |
| 11307 | case VE::VRMAXSWFSTZXvm_v: |
| 11308 | case VE::VRMAXSWFSTZXvml: |
| 11309 | case VE::VRMAXSWFSTZXvml_v: |
| 11310 | case VE::VRMAXSWLSTSXvm: |
| 11311 | case VE::VRMAXSWLSTSXvmL: |
| 11312 | case VE::VRMAXSWLSTSXvmL_v: |
| 11313 | case VE::VRMAXSWLSTSXvm_v: |
| 11314 | case VE::VRMAXSWLSTSXvml: |
| 11315 | case VE::VRMAXSWLSTSXvml_v: |
| 11316 | case VE::VRMAXSWLSTZXvm: |
| 11317 | case VE::VRMAXSWLSTZXvmL: |
| 11318 | case VE::VRMAXSWLSTZXvmL_v: |
| 11319 | case VE::VRMAXSWLSTZXvm_v: |
| 11320 | case VE::VRMAXSWLSTZXvml: |
| 11321 | case VE::VRMAXSWLSTZXvml_v: |
| 11322 | case VE::VRMINSLFSTvm: |
| 11323 | case VE::VRMINSLFSTvmL: |
| 11324 | case VE::VRMINSLFSTvmL_v: |
| 11325 | case VE::VRMINSLFSTvm_v: |
| 11326 | case VE::VRMINSLFSTvml: |
| 11327 | case VE::VRMINSLFSTvml_v: |
| 11328 | case VE::VRMINSLLSTvm: |
| 11329 | case VE::VRMINSLLSTvmL: |
| 11330 | case VE::VRMINSLLSTvmL_v: |
| 11331 | case VE::VRMINSLLSTvm_v: |
| 11332 | case VE::VRMINSLLSTvml: |
| 11333 | case VE::VRMINSLLSTvml_v: |
| 11334 | case VE::VRMINSWFSTSXvm: |
| 11335 | case VE::VRMINSWFSTSXvmL: |
| 11336 | case VE::VRMINSWFSTSXvmL_v: |
| 11337 | case VE::VRMINSWFSTSXvm_v: |
| 11338 | case VE::VRMINSWFSTSXvml: |
| 11339 | case VE::VRMINSWFSTSXvml_v: |
| 11340 | case VE::VRMINSWFSTZXvm: |
| 11341 | case VE::VRMINSWFSTZXvmL: |
| 11342 | case VE::VRMINSWFSTZXvmL_v: |
| 11343 | case VE::VRMINSWFSTZXvm_v: |
| 11344 | case VE::VRMINSWFSTZXvml: |
| 11345 | case VE::VRMINSWFSTZXvml_v: |
| 11346 | case VE::VRMINSWLSTSXvm: |
| 11347 | case VE::VRMINSWLSTSXvmL: |
| 11348 | case VE::VRMINSWLSTSXvmL_v: |
| 11349 | case VE::VRMINSWLSTSXvm_v: |
| 11350 | case VE::VRMINSWLSTSXvml: |
| 11351 | case VE::VRMINSWLSTSXvml_v: |
| 11352 | case VE::VRMINSWLSTZXvm: |
| 11353 | case VE::VRMINSWLSTZXvmL: |
| 11354 | case VE::VRMINSWLSTZXvmL_v: |
| 11355 | case VE::VRMINSWLSTZXvm_v: |
| 11356 | case VE::VRMINSWLSTZXvml: |
| 11357 | case VE::VRMINSWLSTZXvml_v: |
| 11358 | case VE::VRORvm: |
| 11359 | case VE::VRORvmL: |
| 11360 | case VE::VRORvmL_v: |
| 11361 | case VE::VRORvm_v: |
| 11362 | case VE::VRORvml: |
| 11363 | case VE::VRORvml_v: |
| 11364 | case VE::VRSQRTDNEXvm: |
| 11365 | case VE::VRSQRTDNEXvmL: |
| 11366 | case VE::VRSQRTDNEXvmL_v: |
| 11367 | case VE::VRSQRTDNEXvm_v: |
| 11368 | case VE::VRSQRTDNEXvml: |
| 11369 | case VE::VRSQRTDNEXvml_v: |
| 11370 | case VE::VRSQRTDvm: |
| 11371 | case VE::VRSQRTDvmL: |
| 11372 | case VE::VRSQRTDvmL_v: |
| 11373 | case VE::VRSQRTDvm_v: |
| 11374 | case VE::VRSQRTDvml: |
| 11375 | case VE::VRSQRTDvml_v: |
| 11376 | case VE::VRSQRTSNEXvm: |
| 11377 | case VE::VRSQRTSNEXvmL: |
| 11378 | case VE::VRSQRTSNEXvmL_v: |
| 11379 | case VE::VRSQRTSNEXvm_v: |
| 11380 | case VE::VRSQRTSNEXvml: |
| 11381 | case VE::VRSQRTSNEXvml_v: |
| 11382 | case VE::VRSQRTSvm: |
| 11383 | case VE::VRSQRTSvmL: |
| 11384 | case VE::VRSQRTSvmL_v: |
| 11385 | case VE::VRSQRTSvm_v: |
| 11386 | case VE::VRSQRTSvml: |
| 11387 | case VE::VRSQRTSvml_v: |
| 11388 | case VE::VRXORvm: |
| 11389 | case VE::VRXORvmL: |
| 11390 | case VE::VRXORvmL_v: |
| 11391 | case VE::VRXORvm_v: |
| 11392 | case VE::VRXORvml: |
| 11393 | case VE::VRXORvml_v: |
| 11394 | case VE::VSUMLvm: |
| 11395 | case VE::VSUMLvmL: |
| 11396 | case VE::VSUMLvmL_v: |
| 11397 | case VE::VSUMLvm_v: |
| 11398 | case VE::VSUMLvml: |
| 11399 | case VE::VSUMLvml_v: |
| 11400 | case VE::VSUMWSXvm: |
| 11401 | case VE::VSUMWSXvmL: |
| 11402 | case VE::VSUMWSXvmL_v: |
| 11403 | case VE::VSUMWSXvm_v: |
| 11404 | case VE::VSUMWSXvml: |
| 11405 | case VE::VSUMWSXvml_v: |
| 11406 | case VE::VSUMWZXvm: |
| 11407 | case VE::VSUMWZXvmL: |
| 11408 | case VE::VSUMWZXvmL_v: |
| 11409 | case VE::VSUMWZXvm_v: |
| 11410 | case VE::VSUMWZXvml: |
| 11411 | case VE::VSUMWZXvml_v: { |
| 11412 | // op: m |
| 11413 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 11414 | op &= UINT64_C(15); |
| 11415 | op <<= 48; |
| 11416 | Value |= op; |
| 11417 | // op: vx |
| 11418 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 11419 | op &= UINT64_C(255); |
| 11420 | op <<= 24; |
| 11421 | Value |= op; |
| 11422 | // op: vy |
| 11423 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 11424 | op &= UINT64_C(255); |
| 11425 | op <<= 16; |
| 11426 | Value |= op; |
| 11427 | break; |
| 11428 | } |
| 11429 | case VE::PVBRVLOvm: |
| 11430 | case VE::PVBRVLOvmL: |
| 11431 | case VE::PVBRVLOvmL_v: |
| 11432 | case VE::PVBRVLOvm_v: |
| 11433 | case VE::PVBRVLOvml: |
| 11434 | case VE::PVBRVLOvml_v: |
| 11435 | case VE::PVBRVUPvm: |
| 11436 | case VE::PVBRVUPvmL: |
| 11437 | case VE::PVBRVUPvmL_v: |
| 11438 | case VE::PVBRVUPvm_v: |
| 11439 | case VE::PVBRVUPvml: |
| 11440 | case VE::PVBRVUPvml_v: |
| 11441 | case VE::PVBRVvm: |
| 11442 | case VE::PVBRVvmL: |
| 11443 | case VE::PVBRVvmL_v: |
| 11444 | case VE::PVBRVvm_v: |
| 11445 | case VE::PVBRVvml: |
| 11446 | case VE::PVBRVvml_v: |
| 11447 | case VE::PVLDZLOvm: |
| 11448 | case VE::PVLDZLOvmL: |
| 11449 | case VE::PVLDZLOvmL_v: |
| 11450 | case VE::PVLDZLOvm_v: |
| 11451 | case VE::PVLDZLOvml: |
| 11452 | case VE::PVLDZLOvml_v: |
| 11453 | case VE::PVLDZUPvm: |
| 11454 | case VE::PVLDZUPvmL: |
| 11455 | case VE::PVLDZUPvmL_v: |
| 11456 | case VE::PVLDZUPvm_v: |
| 11457 | case VE::PVLDZUPvml: |
| 11458 | case VE::PVLDZUPvml_v: |
| 11459 | case VE::PVLDZvm: |
| 11460 | case VE::PVLDZvmL: |
| 11461 | case VE::PVLDZvmL_v: |
| 11462 | case VE::PVLDZvm_v: |
| 11463 | case VE::PVLDZvml: |
| 11464 | case VE::PVLDZvml_v: |
| 11465 | case VE::PVPCNTLOvm: |
| 11466 | case VE::PVPCNTLOvmL: |
| 11467 | case VE::PVPCNTLOvmL_v: |
| 11468 | case VE::PVPCNTLOvm_v: |
| 11469 | case VE::PVPCNTLOvml: |
| 11470 | case VE::PVPCNTLOvml_v: |
| 11471 | case VE::PVPCNTUPvm: |
| 11472 | case VE::PVPCNTUPvmL: |
| 11473 | case VE::PVPCNTUPvmL_v: |
| 11474 | case VE::PVPCNTUPvm_v: |
| 11475 | case VE::PVPCNTUPvml: |
| 11476 | case VE::PVPCNTUPvml_v: |
| 11477 | case VE::PVPCNTvm: |
| 11478 | case VE::PVPCNTvmL: |
| 11479 | case VE::PVPCNTvmL_v: |
| 11480 | case VE::PVPCNTvm_v: |
| 11481 | case VE::PVPCNTvml: |
| 11482 | case VE::PVPCNTvml_v: |
| 11483 | case VE::VBRVvm: |
| 11484 | case VE::VBRVvmL: |
| 11485 | case VE::VBRVvmL_v: |
| 11486 | case VE::VBRVvm_v: |
| 11487 | case VE::VBRVvml: |
| 11488 | case VE::VBRVvml_v: |
| 11489 | case VE::VCPvm: |
| 11490 | case VE::VCPvmL: |
| 11491 | case VE::VCPvmL_v: |
| 11492 | case VE::VCPvm_v: |
| 11493 | case VE::VCPvml: |
| 11494 | case VE::VCPvml_v: |
| 11495 | case VE::VEXvm: |
| 11496 | case VE::VEXvmL: |
| 11497 | case VE::VEXvmL_v: |
| 11498 | case VE::VEXvm_v: |
| 11499 | case VE::VEXvml: |
| 11500 | case VE::VEXvml_v: |
| 11501 | case VE::VLDZvm: |
| 11502 | case VE::VLDZvmL: |
| 11503 | case VE::VLDZvmL_v: |
| 11504 | case VE::VLDZvm_v: |
| 11505 | case VE::VLDZvml: |
| 11506 | case VE::VLDZvml_v: |
| 11507 | case VE::VPCNTvm: |
| 11508 | case VE::VPCNTvmL: |
| 11509 | case VE::VPCNTvmL_v: |
| 11510 | case VE::VPCNTvm_v: |
| 11511 | case VE::VPCNTvml: |
| 11512 | case VE::VPCNTvml_v: { |
| 11513 | // op: m |
| 11514 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 11515 | op &= UINT64_C(15); |
| 11516 | op <<= 48; |
| 11517 | Value |= op; |
| 11518 | // op: vx |
| 11519 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 11520 | op &= UINT64_C(255); |
| 11521 | op <<= 24; |
| 11522 | Value |= op; |
| 11523 | // op: vz |
| 11524 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 11525 | op &= UINT64_C(255); |
| 11526 | op <<= 8; |
| 11527 | Value |= op; |
| 11528 | break; |
| 11529 | } |
| 11530 | case VE::VST2DNCOTirvm: |
| 11531 | case VE::VST2DNCOTirvmL: |
| 11532 | case VE::VST2DNCOTirvml: |
| 11533 | case VE::VST2DNCOTizvm: |
| 11534 | case VE::VST2DNCOTizvmL: |
| 11535 | case VE::VST2DNCOTizvml: |
| 11536 | case VE::VST2DNCOTrrvm: |
| 11537 | case VE::VST2DNCOTrrvmL: |
| 11538 | case VE::VST2DNCOTrrvml: |
| 11539 | case VE::VST2DNCOTrzvm: |
| 11540 | case VE::VST2DNCOTrzvmL: |
| 11541 | case VE::VST2DNCOTrzvml: |
| 11542 | case VE::VST2DNCirvm: |
| 11543 | case VE::VST2DNCirvmL: |
| 11544 | case VE::VST2DNCirvml: |
| 11545 | case VE::VST2DNCizvm: |
| 11546 | case VE::VST2DNCizvmL: |
| 11547 | case VE::VST2DNCizvml: |
| 11548 | case VE::VST2DNCrrvm: |
| 11549 | case VE::VST2DNCrrvmL: |
| 11550 | case VE::VST2DNCrrvml: |
| 11551 | case VE::VST2DNCrzvm: |
| 11552 | case VE::VST2DNCrzvmL: |
| 11553 | case VE::VST2DNCrzvml: |
| 11554 | case VE::VST2DOTirvm: |
| 11555 | case VE::VST2DOTirvmL: |
| 11556 | case VE::VST2DOTirvml: |
| 11557 | case VE::VST2DOTizvm: |
| 11558 | case VE::VST2DOTizvmL: |
| 11559 | case VE::VST2DOTizvml: |
| 11560 | case VE::VST2DOTrrvm: |
| 11561 | case VE::VST2DOTrrvmL: |
| 11562 | case VE::VST2DOTrrvml: |
| 11563 | case VE::VST2DOTrzvm: |
| 11564 | case VE::VST2DOTrzvmL: |
| 11565 | case VE::VST2DOTrzvml: |
| 11566 | case VE::VST2Dirvm: |
| 11567 | case VE::VST2DirvmL: |
| 11568 | case VE::VST2Dirvml: |
| 11569 | case VE::VST2Dizvm: |
| 11570 | case VE::VST2DizvmL: |
| 11571 | case VE::VST2Dizvml: |
| 11572 | case VE::VST2Drrvm: |
| 11573 | case VE::VST2DrrvmL: |
| 11574 | case VE::VST2Drrvml: |
| 11575 | case VE::VST2Drzvm: |
| 11576 | case VE::VST2DrzvmL: |
| 11577 | case VE::VST2Drzvml: |
| 11578 | case VE::VSTL2DNCOTirvm: |
| 11579 | case VE::VSTL2DNCOTirvmL: |
| 11580 | case VE::VSTL2DNCOTirvml: |
| 11581 | case VE::VSTL2DNCOTizvm: |
| 11582 | case VE::VSTL2DNCOTizvmL: |
| 11583 | case VE::VSTL2DNCOTizvml: |
| 11584 | case VE::VSTL2DNCOTrrvm: |
| 11585 | case VE::VSTL2DNCOTrrvmL: |
| 11586 | case VE::VSTL2DNCOTrrvml: |
| 11587 | case VE::VSTL2DNCOTrzvm: |
| 11588 | case VE::VSTL2DNCOTrzvmL: |
| 11589 | case VE::VSTL2DNCOTrzvml: |
| 11590 | case VE::VSTL2DNCirvm: |
| 11591 | case VE::VSTL2DNCirvmL: |
| 11592 | case VE::VSTL2DNCirvml: |
| 11593 | case VE::VSTL2DNCizvm: |
| 11594 | case VE::VSTL2DNCizvmL: |
| 11595 | case VE::VSTL2DNCizvml: |
| 11596 | case VE::VSTL2DNCrrvm: |
| 11597 | case VE::VSTL2DNCrrvmL: |
| 11598 | case VE::VSTL2DNCrrvml: |
| 11599 | case VE::VSTL2DNCrzvm: |
| 11600 | case VE::VSTL2DNCrzvmL: |
| 11601 | case VE::VSTL2DNCrzvml: |
| 11602 | case VE::VSTL2DOTirvm: |
| 11603 | case VE::VSTL2DOTirvmL: |
| 11604 | case VE::VSTL2DOTirvml: |
| 11605 | case VE::VSTL2DOTizvm: |
| 11606 | case VE::VSTL2DOTizvmL: |
| 11607 | case VE::VSTL2DOTizvml: |
| 11608 | case VE::VSTL2DOTrrvm: |
| 11609 | case VE::VSTL2DOTrrvmL: |
| 11610 | case VE::VSTL2DOTrrvml: |
| 11611 | case VE::VSTL2DOTrzvm: |
| 11612 | case VE::VSTL2DOTrzvmL: |
| 11613 | case VE::VSTL2DOTrzvml: |
| 11614 | case VE::VSTL2Dirvm: |
| 11615 | case VE::VSTL2DirvmL: |
| 11616 | case VE::VSTL2Dirvml: |
| 11617 | case VE::VSTL2Dizvm: |
| 11618 | case VE::VSTL2DizvmL: |
| 11619 | case VE::VSTL2Dizvml: |
| 11620 | case VE::VSTL2Drrvm: |
| 11621 | case VE::VSTL2DrrvmL: |
| 11622 | case VE::VSTL2Drrvml: |
| 11623 | case VE::VSTL2Drzvm: |
| 11624 | case VE::VSTL2DrzvmL: |
| 11625 | case VE::VSTL2Drzvml: |
| 11626 | case VE::VSTLNCOTirvm: |
| 11627 | case VE::VSTLNCOTirvmL: |
| 11628 | case VE::VSTLNCOTirvml: |
| 11629 | case VE::VSTLNCOTizvm: |
| 11630 | case VE::VSTLNCOTizvmL: |
| 11631 | case VE::VSTLNCOTizvml: |
| 11632 | case VE::VSTLNCOTrrvm: |
| 11633 | case VE::VSTLNCOTrrvmL: |
| 11634 | case VE::VSTLNCOTrrvml: |
| 11635 | case VE::VSTLNCOTrzvm: |
| 11636 | case VE::VSTLNCOTrzvmL: |
| 11637 | case VE::VSTLNCOTrzvml: |
| 11638 | case VE::VSTLNCirvm: |
| 11639 | case VE::VSTLNCirvmL: |
| 11640 | case VE::VSTLNCirvml: |
| 11641 | case VE::VSTLNCizvm: |
| 11642 | case VE::VSTLNCizvmL: |
| 11643 | case VE::VSTLNCizvml: |
| 11644 | case VE::VSTLNCrrvm: |
| 11645 | case VE::VSTLNCrrvmL: |
| 11646 | case VE::VSTLNCrrvml: |
| 11647 | case VE::VSTLNCrzvm: |
| 11648 | case VE::VSTLNCrzvmL: |
| 11649 | case VE::VSTLNCrzvml: |
| 11650 | case VE::VSTLOTirvm: |
| 11651 | case VE::VSTLOTirvmL: |
| 11652 | case VE::VSTLOTirvml: |
| 11653 | case VE::VSTLOTizvm: |
| 11654 | case VE::VSTLOTizvmL: |
| 11655 | case VE::VSTLOTizvml: |
| 11656 | case VE::VSTLOTrrvm: |
| 11657 | case VE::VSTLOTrrvmL: |
| 11658 | case VE::VSTLOTrrvml: |
| 11659 | case VE::VSTLOTrzvm: |
| 11660 | case VE::VSTLOTrzvmL: |
| 11661 | case VE::VSTLOTrzvml: |
| 11662 | case VE::VSTLirvm: |
| 11663 | case VE::VSTLirvmL: |
| 11664 | case VE::VSTLirvml: |
| 11665 | case VE::VSTLizvm: |
| 11666 | case VE::VSTLizvmL: |
| 11667 | case VE::VSTLizvml: |
| 11668 | case VE::VSTLrrvm: |
| 11669 | case VE::VSTLrrvmL: |
| 11670 | case VE::VSTLrrvml: |
| 11671 | case VE::VSTLrzvm: |
| 11672 | case VE::VSTLrzvmL: |
| 11673 | case VE::VSTLrzvml: |
| 11674 | case VE::VSTNCOTirvm: |
| 11675 | case VE::VSTNCOTirvmL: |
| 11676 | case VE::VSTNCOTirvml: |
| 11677 | case VE::VSTNCOTizvm: |
| 11678 | case VE::VSTNCOTizvmL: |
| 11679 | case VE::VSTNCOTizvml: |
| 11680 | case VE::VSTNCOTrrvm: |
| 11681 | case VE::VSTNCOTrrvmL: |
| 11682 | case VE::VSTNCOTrrvml: |
| 11683 | case VE::VSTNCOTrzvm: |
| 11684 | case VE::VSTNCOTrzvmL: |
| 11685 | case VE::VSTNCOTrzvml: |
| 11686 | case VE::VSTNCirvm: |
| 11687 | case VE::VSTNCirvmL: |
| 11688 | case VE::VSTNCirvml: |
| 11689 | case VE::VSTNCizvm: |
| 11690 | case VE::VSTNCizvmL: |
| 11691 | case VE::VSTNCizvml: |
| 11692 | case VE::VSTNCrrvm: |
| 11693 | case VE::VSTNCrrvmL: |
| 11694 | case VE::VSTNCrrvml: |
| 11695 | case VE::VSTNCrzvm: |
| 11696 | case VE::VSTNCrzvmL: |
| 11697 | case VE::VSTNCrzvml: |
| 11698 | case VE::VSTOTirvm: |
| 11699 | case VE::VSTOTirvmL: |
| 11700 | case VE::VSTOTirvml: |
| 11701 | case VE::VSTOTizvm: |
| 11702 | case VE::VSTOTizvmL: |
| 11703 | case VE::VSTOTizvml: |
| 11704 | case VE::VSTOTrrvm: |
| 11705 | case VE::VSTOTrrvmL: |
| 11706 | case VE::VSTOTrrvml: |
| 11707 | case VE::VSTOTrzvm: |
| 11708 | case VE::VSTOTrzvmL: |
| 11709 | case VE::VSTOTrzvml: |
| 11710 | case VE::VSTU2DNCOTirvm: |
| 11711 | case VE::VSTU2DNCOTirvmL: |
| 11712 | case VE::VSTU2DNCOTirvml: |
| 11713 | case VE::VSTU2DNCOTizvm: |
| 11714 | case VE::VSTU2DNCOTizvmL: |
| 11715 | case VE::VSTU2DNCOTizvml: |
| 11716 | case VE::VSTU2DNCOTrrvm: |
| 11717 | case VE::VSTU2DNCOTrrvmL: |
| 11718 | case VE::VSTU2DNCOTrrvml: |
| 11719 | case VE::VSTU2DNCOTrzvm: |
| 11720 | case VE::VSTU2DNCOTrzvmL: |
| 11721 | case VE::VSTU2DNCOTrzvml: |
| 11722 | case VE::VSTU2DNCirvm: |
| 11723 | case VE::VSTU2DNCirvmL: |
| 11724 | case VE::VSTU2DNCirvml: |
| 11725 | case VE::VSTU2DNCizvm: |
| 11726 | case VE::VSTU2DNCizvmL: |
| 11727 | case VE::VSTU2DNCizvml: |
| 11728 | case VE::VSTU2DNCrrvm: |
| 11729 | case VE::VSTU2DNCrrvmL: |
| 11730 | case VE::VSTU2DNCrrvml: |
| 11731 | case VE::VSTU2DNCrzvm: |
| 11732 | case VE::VSTU2DNCrzvmL: |
| 11733 | case VE::VSTU2DNCrzvml: |
| 11734 | case VE::VSTU2DOTirvm: |
| 11735 | case VE::VSTU2DOTirvmL: |
| 11736 | case VE::VSTU2DOTirvml: |
| 11737 | case VE::VSTU2DOTizvm: |
| 11738 | case VE::VSTU2DOTizvmL: |
| 11739 | case VE::VSTU2DOTizvml: |
| 11740 | case VE::VSTU2DOTrrvm: |
| 11741 | case VE::VSTU2DOTrrvmL: |
| 11742 | case VE::VSTU2DOTrrvml: |
| 11743 | case VE::VSTU2DOTrzvm: |
| 11744 | case VE::VSTU2DOTrzvmL: |
| 11745 | case VE::VSTU2DOTrzvml: |
| 11746 | case VE::VSTU2Dirvm: |
| 11747 | case VE::VSTU2DirvmL: |
| 11748 | case VE::VSTU2Dirvml: |
| 11749 | case VE::VSTU2Dizvm: |
| 11750 | case VE::VSTU2DizvmL: |
| 11751 | case VE::VSTU2Dizvml: |
| 11752 | case VE::VSTU2Drrvm: |
| 11753 | case VE::VSTU2DrrvmL: |
| 11754 | case VE::VSTU2Drrvml: |
| 11755 | case VE::VSTU2Drzvm: |
| 11756 | case VE::VSTU2DrzvmL: |
| 11757 | case VE::VSTU2Drzvml: |
| 11758 | case VE::VSTUNCOTirvm: |
| 11759 | case VE::VSTUNCOTirvmL: |
| 11760 | case VE::VSTUNCOTirvml: |
| 11761 | case VE::VSTUNCOTizvm: |
| 11762 | case VE::VSTUNCOTizvmL: |
| 11763 | case VE::VSTUNCOTizvml: |
| 11764 | case VE::VSTUNCOTrrvm: |
| 11765 | case VE::VSTUNCOTrrvmL: |
| 11766 | case VE::VSTUNCOTrrvml: |
| 11767 | case VE::VSTUNCOTrzvm: |
| 11768 | case VE::VSTUNCOTrzvmL: |
| 11769 | case VE::VSTUNCOTrzvml: |
| 11770 | case VE::VSTUNCirvm: |
| 11771 | case VE::VSTUNCirvmL: |
| 11772 | case VE::VSTUNCirvml: |
| 11773 | case VE::VSTUNCizvm: |
| 11774 | case VE::VSTUNCizvmL: |
| 11775 | case VE::VSTUNCizvml: |
| 11776 | case VE::VSTUNCrrvm: |
| 11777 | case VE::VSTUNCrrvmL: |
| 11778 | case VE::VSTUNCrrvml: |
| 11779 | case VE::VSTUNCrzvm: |
| 11780 | case VE::VSTUNCrzvmL: |
| 11781 | case VE::VSTUNCrzvml: |
| 11782 | case VE::VSTUOTirvm: |
| 11783 | case VE::VSTUOTirvmL: |
| 11784 | case VE::VSTUOTirvml: |
| 11785 | case VE::VSTUOTizvm: |
| 11786 | case VE::VSTUOTizvmL: |
| 11787 | case VE::VSTUOTizvml: |
| 11788 | case VE::VSTUOTrrvm: |
| 11789 | case VE::VSTUOTrrvmL: |
| 11790 | case VE::VSTUOTrrvml: |
| 11791 | case VE::VSTUOTrzvm: |
| 11792 | case VE::VSTUOTrzvmL: |
| 11793 | case VE::VSTUOTrzvml: |
| 11794 | case VE::VSTUirvm: |
| 11795 | case VE::VSTUirvmL: |
| 11796 | case VE::VSTUirvml: |
| 11797 | case VE::VSTUizvm: |
| 11798 | case VE::VSTUizvmL: |
| 11799 | case VE::VSTUizvml: |
| 11800 | case VE::VSTUrrvm: |
| 11801 | case VE::VSTUrrvmL: |
| 11802 | case VE::VSTUrrvml: |
| 11803 | case VE::VSTUrzvm: |
| 11804 | case VE::VSTUrzvmL: |
| 11805 | case VE::VSTUrzvml: |
| 11806 | case VE::VSTirvm: |
| 11807 | case VE::VSTirvmL: |
| 11808 | case VE::VSTirvml: |
| 11809 | case VE::VSTizvm: |
| 11810 | case VE::VSTizvmL: |
| 11811 | case VE::VSTizvml: |
| 11812 | case VE::VSTrrvm: |
| 11813 | case VE::VSTrrvmL: |
| 11814 | case VE::VSTrrvml: |
| 11815 | case VE::VSTrzvm: |
| 11816 | case VE::VSTrzvmL: |
| 11817 | case VE::VSTrzvml: { |
| 11818 | // op: m |
| 11819 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 11820 | op &= UINT64_C(15); |
| 11821 | op <<= 48; |
| 11822 | Value |= op; |
| 11823 | // op: sy |
| 11824 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 11825 | op &= UINT64_C(127); |
| 11826 | op <<= 40; |
| 11827 | Value |= op; |
| 11828 | // op: sz |
| 11829 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 11830 | op &= UINT64_C(127); |
| 11831 | op <<= 32; |
| 11832 | Value |= op; |
| 11833 | // op: vx |
| 11834 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 11835 | op &= UINT64_C(255); |
| 11836 | op <<= 24; |
| 11837 | Value |= op; |
| 11838 | break; |
| 11839 | } |
| 11840 | case VE::PVADDSLOivm: |
| 11841 | case VE::PVADDSLOivmL: |
| 11842 | case VE::PVADDSLOivmL_v: |
| 11843 | case VE::PVADDSLOivm_v: |
| 11844 | case VE::PVADDSLOivml: |
| 11845 | case VE::PVADDSLOivml_v: |
| 11846 | case VE::PVADDSLOrvm: |
| 11847 | case VE::PVADDSLOrvmL: |
| 11848 | case VE::PVADDSLOrvmL_v: |
| 11849 | case VE::PVADDSLOrvm_v: |
| 11850 | case VE::PVADDSLOrvml: |
| 11851 | case VE::PVADDSLOrvml_v: |
| 11852 | case VE::PVADDSUPivm: |
| 11853 | case VE::PVADDSUPivmL: |
| 11854 | case VE::PVADDSUPivmL_v: |
| 11855 | case VE::PVADDSUPivm_v: |
| 11856 | case VE::PVADDSUPivml: |
| 11857 | case VE::PVADDSUPivml_v: |
| 11858 | case VE::PVADDSUPrvm: |
| 11859 | case VE::PVADDSUPrvmL: |
| 11860 | case VE::PVADDSUPrvmL_v: |
| 11861 | case VE::PVADDSUPrvm_v: |
| 11862 | case VE::PVADDSUPrvml: |
| 11863 | case VE::PVADDSUPrvml_v: |
| 11864 | case VE::PVADDSivm: |
| 11865 | case VE::PVADDSivmL: |
| 11866 | case VE::PVADDSivmL_v: |
| 11867 | case VE::PVADDSivm_v: |
| 11868 | case VE::PVADDSivml: |
| 11869 | case VE::PVADDSivml_v: |
| 11870 | case VE::PVADDSrvm: |
| 11871 | case VE::PVADDSrvmL: |
| 11872 | case VE::PVADDSrvmL_v: |
| 11873 | case VE::PVADDSrvm_v: |
| 11874 | case VE::PVADDSrvml: |
| 11875 | case VE::PVADDSrvml_v: |
| 11876 | case VE::PVADDULOivm: |
| 11877 | case VE::PVADDULOivmL: |
| 11878 | case VE::PVADDULOivmL_v: |
| 11879 | case VE::PVADDULOivm_v: |
| 11880 | case VE::PVADDULOivml: |
| 11881 | case VE::PVADDULOivml_v: |
| 11882 | case VE::PVADDULOrvm: |
| 11883 | case VE::PVADDULOrvmL: |
| 11884 | case VE::PVADDULOrvmL_v: |
| 11885 | case VE::PVADDULOrvm_v: |
| 11886 | case VE::PVADDULOrvml: |
| 11887 | case VE::PVADDULOrvml_v: |
| 11888 | case VE::PVADDUUPivm: |
| 11889 | case VE::PVADDUUPivmL: |
| 11890 | case VE::PVADDUUPivmL_v: |
| 11891 | case VE::PVADDUUPivm_v: |
| 11892 | case VE::PVADDUUPivml: |
| 11893 | case VE::PVADDUUPivml_v: |
| 11894 | case VE::PVADDUUPrvm: |
| 11895 | case VE::PVADDUUPrvmL: |
| 11896 | case VE::PVADDUUPrvmL_v: |
| 11897 | case VE::PVADDUUPrvm_v: |
| 11898 | case VE::PVADDUUPrvml: |
| 11899 | case VE::PVADDUUPrvml_v: |
| 11900 | case VE::PVADDUivm: |
| 11901 | case VE::PVADDUivmL: |
| 11902 | case VE::PVADDUivmL_v: |
| 11903 | case VE::PVADDUivm_v: |
| 11904 | case VE::PVADDUivml: |
| 11905 | case VE::PVADDUivml_v: |
| 11906 | case VE::PVADDUrvm: |
| 11907 | case VE::PVADDUrvmL: |
| 11908 | case VE::PVADDUrvmL_v: |
| 11909 | case VE::PVADDUrvm_v: |
| 11910 | case VE::PVADDUrvml: |
| 11911 | case VE::PVADDUrvml_v: |
| 11912 | case VE::PVANDLOmvm: |
| 11913 | case VE::PVANDLOmvmL: |
| 11914 | case VE::PVANDLOmvmL_v: |
| 11915 | case VE::PVANDLOmvm_v: |
| 11916 | case VE::PVANDLOmvml: |
| 11917 | case VE::PVANDLOmvml_v: |
| 11918 | case VE::PVANDLOrvm: |
| 11919 | case VE::PVANDLOrvmL: |
| 11920 | case VE::PVANDLOrvmL_v: |
| 11921 | case VE::PVANDLOrvm_v: |
| 11922 | case VE::PVANDLOrvml: |
| 11923 | case VE::PVANDLOrvml_v: |
| 11924 | case VE::PVANDUPmvm: |
| 11925 | case VE::PVANDUPmvmL: |
| 11926 | case VE::PVANDUPmvmL_v: |
| 11927 | case VE::PVANDUPmvm_v: |
| 11928 | case VE::PVANDUPmvml: |
| 11929 | case VE::PVANDUPmvml_v: |
| 11930 | case VE::PVANDUPrvm: |
| 11931 | case VE::PVANDUPrvmL: |
| 11932 | case VE::PVANDUPrvmL_v: |
| 11933 | case VE::PVANDUPrvm_v: |
| 11934 | case VE::PVANDUPrvml: |
| 11935 | case VE::PVANDUPrvml_v: |
| 11936 | case VE::PVANDmvm: |
| 11937 | case VE::PVANDmvmL: |
| 11938 | case VE::PVANDmvmL_v: |
| 11939 | case VE::PVANDmvm_v: |
| 11940 | case VE::PVANDmvml: |
| 11941 | case VE::PVANDmvml_v: |
| 11942 | case VE::PVANDrvm: |
| 11943 | case VE::PVANDrvmL: |
| 11944 | case VE::PVANDrvmL_v: |
| 11945 | case VE::PVANDrvm_v: |
| 11946 | case VE::PVANDrvml: |
| 11947 | case VE::PVANDrvml_v: |
| 11948 | case VE::PVCMPSLOivm: |
| 11949 | case VE::PVCMPSLOivmL: |
| 11950 | case VE::PVCMPSLOivmL_v: |
| 11951 | case VE::PVCMPSLOivm_v: |
| 11952 | case VE::PVCMPSLOivml: |
| 11953 | case VE::PVCMPSLOivml_v: |
| 11954 | case VE::PVCMPSLOrvm: |
| 11955 | case VE::PVCMPSLOrvmL: |
| 11956 | case VE::PVCMPSLOrvmL_v: |
| 11957 | case VE::PVCMPSLOrvm_v: |
| 11958 | case VE::PVCMPSLOrvml: |
| 11959 | case VE::PVCMPSLOrvml_v: |
| 11960 | case VE::PVCMPSUPivm: |
| 11961 | case VE::PVCMPSUPivmL: |
| 11962 | case VE::PVCMPSUPivmL_v: |
| 11963 | case VE::PVCMPSUPivm_v: |
| 11964 | case VE::PVCMPSUPivml: |
| 11965 | case VE::PVCMPSUPivml_v: |
| 11966 | case VE::PVCMPSUPrvm: |
| 11967 | case VE::PVCMPSUPrvmL: |
| 11968 | case VE::PVCMPSUPrvmL_v: |
| 11969 | case VE::PVCMPSUPrvm_v: |
| 11970 | case VE::PVCMPSUPrvml: |
| 11971 | case VE::PVCMPSUPrvml_v: |
| 11972 | case VE::PVCMPSivm: |
| 11973 | case VE::PVCMPSivmL: |
| 11974 | case VE::PVCMPSivmL_v: |
| 11975 | case VE::PVCMPSivm_v: |
| 11976 | case VE::PVCMPSivml: |
| 11977 | case VE::PVCMPSivml_v: |
| 11978 | case VE::PVCMPSrvm: |
| 11979 | case VE::PVCMPSrvmL: |
| 11980 | case VE::PVCMPSrvmL_v: |
| 11981 | case VE::PVCMPSrvm_v: |
| 11982 | case VE::PVCMPSrvml: |
| 11983 | case VE::PVCMPSrvml_v: |
| 11984 | case VE::PVCMPULOivm: |
| 11985 | case VE::PVCMPULOivmL: |
| 11986 | case VE::PVCMPULOivmL_v: |
| 11987 | case VE::PVCMPULOivm_v: |
| 11988 | case VE::PVCMPULOivml: |
| 11989 | case VE::PVCMPULOivml_v: |
| 11990 | case VE::PVCMPULOrvm: |
| 11991 | case VE::PVCMPULOrvmL: |
| 11992 | case VE::PVCMPULOrvmL_v: |
| 11993 | case VE::PVCMPULOrvm_v: |
| 11994 | case VE::PVCMPULOrvml: |
| 11995 | case VE::PVCMPULOrvml_v: |
| 11996 | case VE::PVCMPUUPivm: |
| 11997 | case VE::PVCMPUUPivmL: |
| 11998 | case VE::PVCMPUUPivmL_v: |
| 11999 | case VE::PVCMPUUPivm_v: |
| 12000 | case VE::PVCMPUUPivml: |
| 12001 | case VE::PVCMPUUPivml_v: |
| 12002 | case VE::PVCMPUUPrvm: |
| 12003 | case VE::PVCMPUUPrvmL: |
| 12004 | case VE::PVCMPUUPrvmL_v: |
| 12005 | case VE::PVCMPUUPrvm_v: |
| 12006 | case VE::PVCMPUUPrvml: |
| 12007 | case VE::PVCMPUUPrvml_v: |
| 12008 | case VE::PVCMPUivm: |
| 12009 | case VE::PVCMPUivmL: |
| 12010 | case VE::PVCMPUivmL_v: |
| 12011 | case VE::PVCMPUivm_v: |
| 12012 | case VE::PVCMPUivml: |
| 12013 | case VE::PVCMPUivml_v: |
| 12014 | case VE::PVCMPUrvm: |
| 12015 | case VE::PVCMPUrvmL: |
| 12016 | case VE::PVCMPUrvmL_v: |
| 12017 | case VE::PVCMPUrvm_v: |
| 12018 | case VE::PVCMPUrvml: |
| 12019 | case VE::PVCMPUrvml_v: |
| 12020 | case VE::PVEQVLOmvm: |
| 12021 | case VE::PVEQVLOmvmL: |
| 12022 | case VE::PVEQVLOmvmL_v: |
| 12023 | case VE::PVEQVLOmvm_v: |
| 12024 | case VE::PVEQVLOmvml: |
| 12025 | case VE::PVEQVLOmvml_v: |
| 12026 | case VE::PVEQVLOrvm: |
| 12027 | case VE::PVEQVLOrvmL: |
| 12028 | case VE::PVEQVLOrvmL_v: |
| 12029 | case VE::PVEQVLOrvm_v: |
| 12030 | case VE::PVEQVLOrvml: |
| 12031 | case VE::PVEQVLOrvml_v: |
| 12032 | case VE::PVEQVUPmvm: |
| 12033 | case VE::PVEQVUPmvmL: |
| 12034 | case VE::PVEQVUPmvmL_v: |
| 12035 | case VE::PVEQVUPmvm_v: |
| 12036 | case VE::PVEQVUPmvml: |
| 12037 | case VE::PVEQVUPmvml_v: |
| 12038 | case VE::PVEQVUPrvm: |
| 12039 | case VE::PVEQVUPrvmL: |
| 12040 | case VE::PVEQVUPrvmL_v: |
| 12041 | case VE::PVEQVUPrvm_v: |
| 12042 | case VE::PVEQVUPrvml: |
| 12043 | case VE::PVEQVUPrvml_v: |
| 12044 | case VE::PVEQVmvm: |
| 12045 | case VE::PVEQVmvmL: |
| 12046 | case VE::PVEQVmvmL_v: |
| 12047 | case VE::PVEQVmvm_v: |
| 12048 | case VE::PVEQVmvml: |
| 12049 | case VE::PVEQVmvml_v: |
| 12050 | case VE::PVEQVrvm: |
| 12051 | case VE::PVEQVrvmL: |
| 12052 | case VE::PVEQVrvmL_v: |
| 12053 | case VE::PVEQVrvm_v: |
| 12054 | case VE::PVEQVrvml: |
| 12055 | case VE::PVEQVrvml_v: |
| 12056 | case VE::PVFADDLOivm: |
| 12057 | case VE::PVFADDLOivmL: |
| 12058 | case VE::PVFADDLOivmL_v: |
| 12059 | case VE::PVFADDLOivm_v: |
| 12060 | case VE::PVFADDLOivml: |
| 12061 | case VE::PVFADDLOivml_v: |
| 12062 | case VE::PVFADDLOrvm: |
| 12063 | case VE::PVFADDLOrvmL: |
| 12064 | case VE::PVFADDLOrvmL_v: |
| 12065 | case VE::PVFADDLOrvm_v: |
| 12066 | case VE::PVFADDLOrvml: |
| 12067 | case VE::PVFADDLOrvml_v: |
| 12068 | case VE::PVFADDUPivm: |
| 12069 | case VE::PVFADDUPivmL: |
| 12070 | case VE::PVFADDUPivmL_v: |
| 12071 | case VE::PVFADDUPivm_v: |
| 12072 | case VE::PVFADDUPivml: |
| 12073 | case VE::PVFADDUPivml_v: |
| 12074 | case VE::PVFADDUPrvm: |
| 12075 | case VE::PVFADDUPrvmL: |
| 12076 | case VE::PVFADDUPrvmL_v: |
| 12077 | case VE::PVFADDUPrvm_v: |
| 12078 | case VE::PVFADDUPrvml: |
| 12079 | case VE::PVFADDUPrvml_v: |
| 12080 | case VE::PVFADDivm: |
| 12081 | case VE::PVFADDivmL: |
| 12082 | case VE::PVFADDivmL_v: |
| 12083 | case VE::PVFADDivm_v: |
| 12084 | case VE::PVFADDivml: |
| 12085 | case VE::PVFADDivml_v: |
| 12086 | case VE::PVFADDrvm: |
| 12087 | case VE::PVFADDrvmL: |
| 12088 | case VE::PVFADDrvmL_v: |
| 12089 | case VE::PVFADDrvm_v: |
| 12090 | case VE::PVFADDrvml: |
| 12091 | case VE::PVFADDrvml_v: |
| 12092 | case VE::PVFCMPLOivm: |
| 12093 | case VE::PVFCMPLOivmL: |
| 12094 | case VE::PVFCMPLOivmL_v: |
| 12095 | case VE::PVFCMPLOivm_v: |
| 12096 | case VE::PVFCMPLOivml: |
| 12097 | case VE::PVFCMPLOivml_v: |
| 12098 | case VE::PVFCMPLOrvm: |
| 12099 | case VE::PVFCMPLOrvmL: |
| 12100 | case VE::PVFCMPLOrvmL_v: |
| 12101 | case VE::PVFCMPLOrvm_v: |
| 12102 | case VE::PVFCMPLOrvml: |
| 12103 | case VE::PVFCMPLOrvml_v: |
| 12104 | case VE::PVFCMPUPivm: |
| 12105 | case VE::PVFCMPUPivmL: |
| 12106 | case VE::PVFCMPUPivmL_v: |
| 12107 | case VE::PVFCMPUPivm_v: |
| 12108 | case VE::PVFCMPUPivml: |
| 12109 | case VE::PVFCMPUPivml_v: |
| 12110 | case VE::PVFCMPUPrvm: |
| 12111 | case VE::PVFCMPUPrvmL: |
| 12112 | case VE::PVFCMPUPrvmL_v: |
| 12113 | case VE::PVFCMPUPrvm_v: |
| 12114 | case VE::PVFCMPUPrvml: |
| 12115 | case VE::PVFCMPUPrvml_v: |
| 12116 | case VE::PVFCMPivm: |
| 12117 | case VE::PVFCMPivmL: |
| 12118 | case VE::PVFCMPivmL_v: |
| 12119 | case VE::PVFCMPivm_v: |
| 12120 | case VE::PVFCMPivml: |
| 12121 | case VE::PVFCMPivml_v: |
| 12122 | case VE::PVFCMPrvm: |
| 12123 | case VE::PVFCMPrvmL: |
| 12124 | case VE::PVFCMPrvmL_v: |
| 12125 | case VE::PVFCMPrvm_v: |
| 12126 | case VE::PVFCMPrvml: |
| 12127 | case VE::PVFCMPrvml_v: |
| 12128 | case VE::PVFMAXLOivm: |
| 12129 | case VE::PVFMAXLOivmL: |
| 12130 | case VE::PVFMAXLOivmL_v: |
| 12131 | case VE::PVFMAXLOivm_v: |
| 12132 | case VE::PVFMAXLOivml: |
| 12133 | case VE::PVFMAXLOivml_v: |
| 12134 | case VE::PVFMAXLOrvm: |
| 12135 | case VE::PVFMAXLOrvmL: |
| 12136 | case VE::PVFMAXLOrvmL_v: |
| 12137 | case VE::PVFMAXLOrvm_v: |
| 12138 | case VE::PVFMAXLOrvml: |
| 12139 | case VE::PVFMAXLOrvml_v: |
| 12140 | case VE::PVFMAXUPivm: |
| 12141 | case VE::PVFMAXUPivmL: |
| 12142 | case VE::PVFMAXUPivmL_v: |
| 12143 | case VE::PVFMAXUPivm_v: |
| 12144 | case VE::PVFMAXUPivml: |
| 12145 | case VE::PVFMAXUPivml_v: |
| 12146 | case VE::PVFMAXUPrvm: |
| 12147 | case VE::PVFMAXUPrvmL: |
| 12148 | case VE::PVFMAXUPrvmL_v: |
| 12149 | case VE::PVFMAXUPrvm_v: |
| 12150 | case VE::PVFMAXUPrvml: |
| 12151 | case VE::PVFMAXUPrvml_v: |
| 12152 | case VE::PVFMAXivm: |
| 12153 | case VE::PVFMAXivmL: |
| 12154 | case VE::PVFMAXivmL_v: |
| 12155 | case VE::PVFMAXivm_v: |
| 12156 | case VE::PVFMAXivml: |
| 12157 | case VE::PVFMAXivml_v: |
| 12158 | case VE::PVFMAXrvm: |
| 12159 | case VE::PVFMAXrvmL: |
| 12160 | case VE::PVFMAXrvmL_v: |
| 12161 | case VE::PVFMAXrvm_v: |
| 12162 | case VE::PVFMAXrvml: |
| 12163 | case VE::PVFMAXrvml_v: |
| 12164 | case VE::PVFMINLOivm: |
| 12165 | case VE::PVFMINLOivmL: |
| 12166 | case VE::PVFMINLOivmL_v: |
| 12167 | case VE::PVFMINLOivm_v: |
| 12168 | case VE::PVFMINLOivml: |
| 12169 | case VE::PVFMINLOivml_v: |
| 12170 | case VE::PVFMINLOrvm: |
| 12171 | case VE::PVFMINLOrvmL: |
| 12172 | case VE::PVFMINLOrvmL_v: |
| 12173 | case VE::PVFMINLOrvm_v: |
| 12174 | case VE::PVFMINLOrvml: |
| 12175 | case VE::PVFMINLOrvml_v: |
| 12176 | case VE::PVFMINUPivm: |
| 12177 | case VE::PVFMINUPivmL: |
| 12178 | case VE::PVFMINUPivmL_v: |
| 12179 | case VE::PVFMINUPivm_v: |
| 12180 | case VE::PVFMINUPivml: |
| 12181 | case VE::PVFMINUPivml_v: |
| 12182 | case VE::PVFMINUPrvm: |
| 12183 | case VE::PVFMINUPrvmL: |
| 12184 | case VE::PVFMINUPrvmL_v: |
| 12185 | case VE::PVFMINUPrvm_v: |
| 12186 | case VE::PVFMINUPrvml: |
| 12187 | case VE::PVFMINUPrvml_v: |
| 12188 | case VE::PVFMINivm: |
| 12189 | case VE::PVFMINivmL: |
| 12190 | case VE::PVFMINivmL_v: |
| 12191 | case VE::PVFMINivm_v: |
| 12192 | case VE::PVFMINivml: |
| 12193 | case VE::PVFMINivml_v: |
| 12194 | case VE::PVFMINrvm: |
| 12195 | case VE::PVFMINrvmL: |
| 12196 | case VE::PVFMINrvmL_v: |
| 12197 | case VE::PVFMINrvm_v: |
| 12198 | case VE::PVFMINrvml: |
| 12199 | case VE::PVFMINrvml_v: |
| 12200 | case VE::PVFMULLOivm: |
| 12201 | case VE::PVFMULLOivmL: |
| 12202 | case VE::PVFMULLOivmL_v: |
| 12203 | case VE::PVFMULLOivm_v: |
| 12204 | case VE::PVFMULLOivml: |
| 12205 | case VE::PVFMULLOivml_v: |
| 12206 | case VE::PVFMULLOrvm: |
| 12207 | case VE::PVFMULLOrvmL: |
| 12208 | case VE::PVFMULLOrvmL_v: |
| 12209 | case VE::PVFMULLOrvm_v: |
| 12210 | case VE::PVFMULLOrvml: |
| 12211 | case VE::PVFMULLOrvml_v: |
| 12212 | case VE::PVFMULUPivm: |
| 12213 | case VE::PVFMULUPivmL: |
| 12214 | case VE::PVFMULUPivmL_v: |
| 12215 | case VE::PVFMULUPivm_v: |
| 12216 | case VE::PVFMULUPivml: |
| 12217 | case VE::PVFMULUPivml_v: |
| 12218 | case VE::PVFMULUPrvm: |
| 12219 | case VE::PVFMULUPrvmL: |
| 12220 | case VE::PVFMULUPrvmL_v: |
| 12221 | case VE::PVFMULUPrvm_v: |
| 12222 | case VE::PVFMULUPrvml: |
| 12223 | case VE::PVFMULUPrvml_v: |
| 12224 | case VE::PVFMULivm: |
| 12225 | case VE::PVFMULivmL: |
| 12226 | case VE::PVFMULivmL_v: |
| 12227 | case VE::PVFMULivm_v: |
| 12228 | case VE::PVFMULivml: |
| 12229 | case VE::PVFMULivml_v: |
| 12230 | case VE::PVFMULrvm: |
| 12231 | case VE::PVFMULrvmL: |
| 12232 | case VE::PVFMULrvmL_v: |
| 12233 | case VE::PVFMULrvm_v: |
| 12234 | case VE::PVFMULrvml: |
| 12235 | case VE::PVFMULrvml_v: |
| 12236 | case VE::PVFSUBLOivm: |
| 12237 | case VE::PVFSUBLOivmL: |
| 12238 | case VE::PVFSUBLOivmL_v: |
| 12239 | case VE::PVFSUBLOivm_v: |
| 12240 | case VE::PVFSUBLOivml: |
| 12241 | case VE::PVFSUBLOivml_v: |
| 12242 | case VE::PVFSUBLOrvm: |
| 12243 | case VE::PVFSUBLOrvmL: |
| 12244 | case VE::PVFSUBLOrvmL_v: |
| 12245 | case VE::PVFSUBLOrvm_v: |
| 12246 | case VE::PVFSUBLOrvml: |
| 12247 | case VE::PVFSUBLOrvml_v: |
| 12248 | case VE::PVFSUBUPivm: |
| 12249 | case VE::PVFSUBUPivmL: |
| 12250 | case VE::PVFSUBUPivmL_v: |
| 12251 | case VE::PVFSUBUPivm_v: |
| 12252 | case VE::PVFSUBUPivml: |
| 12253 | case VE::PVFSUBUPivml_v: |
| 12254 | case VE::PVFSUBUPrvm: |
| 12255 | case VE::PVFSUBUPrvmL: |
| 12256 | case VE::PVFSUBUPrvmL_v: |
| 12257 | case VE::PVFSUBUPrvm_v: |
| 12258 | case VE::PVFSUBUPrvml: |
| 12259 | case VE::PVFSUBUPrvml_v: |
| 12260 | case VE::PVFSUBivm: |
| 12261 | case VE::PVFSUBivmL: |
| 12262 | case VE::PVFSUBivmL_v: |
| 12263 | case VE::PVFSUBivm_v: |
| 12264 | case VE::PVFSUBivml: |
| 12265 | case VE::PVFSUBivml_v: |
| 12266 | case VE::PVFSUBrvm: |
| 12267 | case VE::PVFSUBrvmL: |
| 12268 | case VE::PVFSUBrvmL_v: |
| 12269 | case VE::PVFSUBrvm_v: |
| 12270 | case VE::PVFSUBrvml: |
| 12271 | case VE::PVFSUBrvml_v: |
| 12272 | case VE::PVMAXSLOivm: |
| 12273 | case VE::PVMAXSLOivmL: |
| 12274 | case VE::PVMAXSLOivmL_v: |
| 12275 | case VE::PVMAXSLOivm_v: |
| 12276 | case VE::PVMAXSLOivml: |
| 12277 | case VE::PVMAXSLOivml_v: |
| 12278 | case VE::PVMAXSLOrvm: |
| 12279 | case VE::PVMAXSLOrvmL: |
| 12280 | case VE::PVMAXSLOrvmL_v: |
| 12281 | case VE::PVMAXSLOrvm_v: |
| 12282 | case VE::PVMAXSLOrvml: |
| 12283 | case VE::PVMAXSLOrvml_v: |
| 12284 | case VE::PVMAXSUPivm: |
| 12285 | case VE::PVMAXSUPivmL: |
| 12286 | case VE::PVMAXSUPivmL_v: |
| 12287 | case VE::PVMAXSUPivm_v: |
| 12288 | case VE::PVMAXSUPivml: |
| 12289 | case VE::PVMAXSUPivml_v: |
| 12290 | case VE::PVMAXSUPrvm: |
| 12291 | case VE::PVMAXSUPrvmL: |
| 12292 | case VE::PVMAXSUPrvmL_v: |
| 12293 | case VE::PVMAXSUPrvm_v: |
| 12294 | case VE::PVMAXSUPrvml: |
| 12295 | case VE::PVMAXSUPrvml_v: |
| 12296 | case VE::PVMAXSivm: |
| 12297 | case VE::PVMAXSivmL: |
| 12298 | case VE::PVMAXSivmL_v: |
| 12299 | case VE::PVMAXSivm_v: |
| 12300 | case VE::PVMAXSivml: |
| 12301 | case VE::PVMAXSivml_v: |
| 12302 | case VE::PVMAXSrvm: |
| 12303 | case VE::PVMAXSrvmL: |
| 12304 | case VE::PVMAXSrvmL_v: |
| 12305 | case VE::PVMAXSrvm_v: |
| 12306 | case VE::PVMAXSrvml: |
| 12307 | case VE::PVMAXSrvml_v: |
| 12308 | case VE::PVMINSLOivm: |
| 12309 | case VE::PVMINSLOivmL: |
| 12310 | case VE::PVMINSLOivmL_v: |
| 12311 | case VE::PVMINSLOivm_v: |
| 12312 | case VE::PVMINSLOivml: |
| 12313 | case VE::PVMINSLOivml_v: |
| 12314 | case VE::PVMINSLOrvm: |
| 12315 | case VE::PVMINSLOrvmL: |
| 12316 | case VE::PVMINSLOrvmL_v: |
| 12317 | case VE::PVMINSLOrvm_v: |
| 12318 | case VE::PVMINSLOrvml: |
| 12319 | case VE::PVMINSLOrvml_v: |
| 12320 | case VE::PVMINSUPivm: |
| 12321 | case VE::PVMINSUPivmL: |
| 12322 | case VE::PVMINSUPivmL_v: |
| 12323 | case VE::PVMINSUPivm_v: |
| 12324 | case VE::PVMINSUPivml: |
| 12325 | case VE::PVMINSUPivml_v: |
| 12326 | case VE::PVMINSUPrvm: |
| 12327 | case VE::PVMINSUPrvmL: |
| 12328 | case VE::PVMINSUPrvmL_v: |
| 12329 | case VE::PVMINSUPrvm_v: |
| 12330 | case VE::PVMINSUPrvml: |
| 12331 | case VE::PVMINSUPrvml_v: |
| 12332 | case VE::PVMINSivm: |
| 12333 | case VE::PVMINSivmL: |
| 12334 | case VE::PVMINSivmL_v: |
| 12335 | case VE::PVMINSivm_v: |
| 12336 | case VE::PVMINSivml: |
| 12337 | case VE::PVMINSivml_v: |
| 12338 | case VE::PVMINSrvm: |
| 12339 | case VE::PVMINSrvmL: |
| 12340 | case VE::PVMINSrvmL_v: |
| 12341 | case VE::PVMINSrvm_v: |
| 12342 | case VE::PVMINSrvml: |
| 12343 | case VE::PVMINSrvml_v: |
| 12344 | case VE::PVORLOmvm: |
| 12345 | case VE::PVORLOmvmL: |
| 12346 | case VE::PVORLOmvmL_v: |
| 12347 | case VE::PVORLOmvm_v: |
| 12348 | case VE::PVORLOmvml: |
| 12349 | case VE::PVORLOmvml_v: |
| 12350 | case VE::PVORLOrvm: |
| 12351 | case VE::PVORLOrvmL: |
| 12352 | case VE::PVORLOrvmL_v: |
| 12353 | case VE::PVORLOrvm_v: |
| 12354 | case VE::PVORLOrvml: |
| 12355 | case VE::PVORLOrvml_v: |
| 12356 | case VE::PVORUPmvm: |
| 12357 | case VE::PVORUPmvmL: |
| 12358 | case VE::PVORUPmvmL_v: |
| 12359 | case VE::PVORUPmvm_v: |
| 12360 | case VE::PVORUPmvml: |
| 12361 | case VE::PVORUPmvml_v: |
| 12362 | case VE::PVORUPrvm: |
| 12363 | case VE::PVORUPrvmL: |
| 12364 | case VE::PVORUPrvmL_v: |
| 12365 | case VE::PVORUPrvm_v: |
| 12366 | case VE::PVORUPrvml: |
| 12367 | case VE::PVORUPrvml_v: |
| 12368 | case VE::PVORmvm: |
| 12369 | case VE::PVORmvmL: |
| 12370 | case VE::PVORmvmL_v: |
| 12371 | case VE::PVORmvm_v: |
| 12372 | case VE::PVORmvml: |
| 12373 | case VE::PVORmvml_v: |
| 12374 | case VE::PVORrvm: |
| 12375 | case VE::PVORrvmL: |
| 12376 | case VE::PVORrvmL_v: |
| 12377 | case VE::PVORrvm_v: |
| 12378 | case VE::PVORrvml: |
| 12379 | case VE::PVORrvml_v: |
| 12380 | case VE::PVSUBSLOivm: |
| 12381 | case VE::PVSUBSLOivmL: |
| 12382 | case VE::PVSUBSLOivmL_v: |
| 12383 | case VE::PVSUBSLOivm_v: |
| 12384 | case VE::PVSUBSLOivml: |
| 12385 | case VE::PVSUBSLOivml_v: |
| 12386 | case VE::PVSUBSLOrvm: |
| 12387 | case VE::PVSUBSLOrvmL: |
| 12388 | case VE::PVSUBSLOrvmL_v: |
| 12389 | case VE::PVSUBSLOrvm_v: |
| 12390 | case VE::PVSUBSLOrvml: |
| 12391 | case VE::PVSUBSLOrvml_v: |
| 12392 | case VE::PVSUBSUPivm: |
| 12393 | case VE::PVSUBSUPivmL: |
| 12394 | case VE::PVSUBSUPivmL_v: |
| 12395 | case VE::PVSUBSUPivm_v: |
| 12396 | case VE::PVSUBSUPivml: |
| 12397 | case VE::PVSUBSUPivml_v: |
| 12398 | case VE::PVSUBSUPrvm: |
| 12399 | case VE::PVSUBSUPrvmL: |
| 12400 | case VE::PVSUBSUPrvmL_v: |
| 12401 | case VE::PVSUBSUPrvm_v: |
| 12402 | case VE::PVSUBSUPrvml: |
| 12403 | case VE::PVSUBSUPrvml_v: |
| 12404 | case VE::PVSUBSivm: |
| 12405 | case VE::PVSUBSivmL: |
| 12406 | case VE::PVSUBSivmL_v: |
| 12407 | case VE::PVSUBSivm_v: |
| 12408 | case VE::PVSUBSivml: |
| 12409 | case VE::PVSUBSivml_v: |
| 12410 | case VE::PVSUBSrvm: |
| 12411 | case VE::PVSUBSrvmL: |
| 12412 | case VE::PVSUBSrvmL_v: |
| 12413 | case VE::PVSUBSrvm_v: |
| 12414 | case VE::PVSUBSrvml: |
| 12415 | case VE::PVSUBSrvml_v: |
| 12416 | case VE::PVSUBULOivm: |
| 12417 | case VE::PVSUBULOivmL: |
| 12418 | case VE::PVSUBULOivmL_v: |
| 12419 | case VE::PVSUBULOivm_v: |
| 12420 | case VE::PVSUBULOivml: |
| 12421 | case VE::PVSUBULOivml_v: |
| 12422 | case VE::PVSUBULOrvm: |
| 12423 | case VE::PVSUBULOrvmL: |
| 12424 | case VE::PVSUBULOrvmL_v: |
| 12425 | case VE::PVSUBULOrvm_v: |
| 12426 | case VE::PVSUBULOrvml: |
| 12427 | case VE::PVSUBULOrvml_v: |
| 12428 | case VE::PVSUBUUPivm: |
| 12429 | case VE::PVSUBUUPivmL: |
| 12430 | case VE::PVSUBUUPivmL_v: |
| 12431 | case VE::PVSUBUUPivm_v: |
| 12432 | case VE::PVSUBUUPivml: |
| 12433 | case VE::PVSUBUUPivml_v: |
| 12434 | case VE::PVSUBUUPrvm: |
| 12435 | case VE::PVSUBUUPrvmL: |
| 12436 | case VE::PVSUBUUPrvmL_v: |
| 12437 | case VE::PVSUBUUPrvm_v: |
| 12438 | case VE::PVSUBUUPrvml: |
| 12439 | case VE::PVSUBUUPrvml_v: |
| 12440 | case VE::PVSUBUivm: |
| 12441 | case VE::PVSUBUivmL: |
| 12442 | case VE::PVSUBUivmL_v: |
| 12443 | case VE::PVSUBUivm_v: |
| 12444 | case VE::PVSUBUivml: |
| 12445 | case VE::PVSUBUivml_v: |
| 12446 | case VE::PVSUBUrvm: |
| 12447 | case VE::PVSUBUrvmL: |
| 12448 | case VE::PVSUBUrvmL_v: |
| 12449 | case VE::PVSUBUrvm_v: |
| 12450 | case VE::PVSUBUrvml: |
| 12451 | case VE::PVSUBUrvml_v: |
| 12452 | case VE::PVXORLOmvm: |
| 12453 | case VE::PVXORLOmvmL: |
| 12454 | case VE::PVXORLOmvmL_v: |
| 12455 | case VE::PVXORLOmvm_v: |
| 12456 | case VE::PVXORLOmvml: |
| 12457 | case VE::PVXORLOmvml_v: |
| 12458 | case VE::PVXORLOrvm: |
| 12459 | case VE::PVXORLOrvmL: |
| 12460 | case VE::PVXORLOrvmL_v: |
| 12461 | case VE::PVXORLOrvm_v: |
| 12462 | case VE::PVXORLOrvml: |
| 12463 | case VE::PVXORLOrvml_v: |
| 12464 | case VE::PVXORUPmvm: |
| 12465 | case VE::PVXORUPmvmL: |
| 12466 | case VE::PVXORUPmvmL_v: |
| 12467 | case VE::PVXORUPmvm_v: |
| 12468 | case VE::PVXORUPmvml: |
| 12469 | case VE::PVXORUPmvml_v: |
| 12470 | case VE::PVXORUPrvm: |
| 12471 | case VE::PVXORUPrvmL: |
| 12472 | case VE::PVXORUPrvmL_v: |
| 12473 | case VE::PVXORUPrvm_v: |
| 12474 | case VE::PVXORUPrvml: |
| 12475 | case VE::PVXORUPrvml_v: |
| 12476 | case VE::PVXORmvm: |
| 12477 | case VE::PVXORmvmL: |
| 12478 | case VE::PVXORmvmL_v: |
| 12479 | case VE::PVXORmvm_v: |
| 12480 | case VE::PVXORmvml: |
| 12481 | case VE::PVXORmvml_v: |
| 12482 | case VE::PVXORrvm: |
| 12483 | case VE::PVXORrvmL: |
| 12484 | case VE::PVXORrvmL_v: |
| 12485 | case VE::PVXORrvm_v: |
| 12486 | case VE::PVXORrvml: |
| 12487 | case VE::PVXORrvml_v: |
| 12488 | case VE::VADDSLivm: |
| 12489 | case VE::VADDSLivmL: |
| 12490 | case VE::VADDSLivmL_v: |
| 12491 | case VE::VADDSLivm_v: |
| 12492 | case VE::VADDSLivml: |
| 12493 | case VE::VADDSLivml_v: |
| 12494 | case VE::VADDSLrvm: |
| 12495 | case VE::VADDSLrvmL: |
| 12496 | case VE::VADDSLrvmL_v: |
| 12497 | case VE::VADDSLrvm_v: |
| 12498 | case VE::VADDSLrvml: |
| 12499 | case VE::VADDSLrvml_v: |
| 12500 | case VE::VADDSWSXivm: |
| 12501 | case VE::VADDSWSXivmL: |
| 12502 | case VE::VADDSWSXivmL_v: |
| 12503 | case VE::VADDSWSXivm_v: |
| 12504 | case VE::VADDSWSXivml: |
| 12505 | case VE::VADDSWSXivml_v: |
| 12506 | case VE::VADDSWSXrvm: |
| 12507 | case VE::VADDSWSXrvmL: |
| 12508 | case VE::VADDSWSXrvmL_v: |
| 12509 | case VE::VADDSWSXrvm_v: |
| 12510 | case VE::VADDSWSXrvml: |
| 12511 | case VE::VADDSWSXrvml_v: |
| 12512 | case VE::VADDSWZXivm: |
| 12513 | case VE::VADDSWZXivmL: |
| 12514 | case VE::VADDSWZXivmL_v: |
| 12515 | case VE::VADDSWZXivm_v: |
| 12516 | case VE::VADDSWZXivml: |
| 12517 | case VE::VADDSWZXivml_v: |
| 12518 | case VE::VADDSWZXrvm: |
| 12519 | case VE::VADDSWZXrvmL: |
| 12520 | case VE::VADDSWZXrvmL_v: |
| 12521 | case VE::VADDSWZXrvm_v: |
| 12522 | case VE::VADDSWZXrvml: |
| 12523 | case VE::VADDSWZXrvml_v: |
| 12524 | case VE::VADDULivm: |
| 12525 | case VE::VADDULivmL: |
| 12526 | case VE::VADDULivmL_v: |
| 12527 | case VE::VADDULivm_v: |
| 12528 | case VE::VADDULivml: |
| 12529 | case VE::VADDULivml_v: |
| 12530 | case VE::VADDULrvm: |
| 12531 | case VE::VADDULrvmL: |
| 12532 | case VE::VADDULrvmL_v: |
| 12533 | case VE::VADDULrvm_v: |
| 12534 | case VE::VADDULrvml: |
| 12535 | case VE::VADDULrvml_v: |
| 12536 | case VE::VADDUWivm: |
| 12537 | case VE::VADDUWivmL: |
| 12538 | case VE::VADDUWivmL_v: |
| 12539 | case VE::VADDUWivm_v: |
| 12540 | case VE::VADDUWivml: |
| 12541 | case VE::VADDUWivml_v: |
| 12542 | case VE::VADDUWrvm: |
| 12543 | case VE::VADDUWrvmL: |
| 12544 | case VE::VADDUWrvmL_v: |
| 12545 | case VE::VADDUWrvm_v: |
| 12546 | case VE::VADDUWrvml: |
| 12547 | case VE::VADDUWrvml_v: |
| 12548 | case VE::VANDmvm: |
| 12549 | case VE::VANDmvmL: |
| 12550 | case VE::VANDmvmL_v: |
| 12551 | case VE::VANDmvm_v: |
| 12552 | case VE::VANDmvml: |
| 12553 | case VE::VANDmvml_v: |
| 12554 | case VE::VANDrvm: |
| 12555 | case VE::VANDrvmL: |
| 12556 | case VE::VANDrvmL_v: |
| 12557 | case VE::VANDrvm_v: |
| 12558 | case VE::VANDrvml: |
| 12559 | case VE::VANDrvml_v: |
| 12560 | case VE::VCMPSLivm: |
| 12561 | case VE::VCMPSLivmL: |
| 12562 | case VE::VCMPSLivmL_v: |
| 12563 | case VE::VCMPSLivm_v: |
| 12564 | case VE::VCMPSLivml: |
| 12565 | case VE::VCMPSLivml_v: |
| 12566 | case VE::VCMPSLrvm: |
| 12567 | case VE::VCMPSLrvmL: |
| 12568 | case VE::VCMPSLrvmL_v: |
| 12569 | case VE::VCMPSLrvm_v: |
| 12570 | case VE::VCMPSLrvml: |
| 12571 | case VE::VCMPSLrvml_v: |
| 12572 | case VE::VCMPSWSXivm: |
| 12573 | case VE::VCMPSWSXivmL: |
| 12574 | case VE::VCMPSWSXivmL_v: |
| 12575 | case VE::VCMPSWSXivm_v: |
| 12576 | case VE::VCMPSWSXivml: |
| 12577 | case VE::VCMPSWSXivml_v: |
| 12578 | case VE::VCMPSWSXrvm: |
| 12579 | case VE::VCMPSWSXrvmL: |
| 12580 | case VE::VCMPSWSXrvmL_v: |
| 12581 | case VE::VCMPSWSXrvm_v: |
| 12582 | case VE::VCMPSWSXrvml: |
| 12583 | case VE::VCMPSWSXrvml_v: |
| 12584 | case VE::VCMPSWZXivm: |
| 12585 | case VE::VCMPSWZXivmL: |
| 12586 | case VE::VCMPSWZXivmL_v: |
| 12587 | case VE::VCMPSWZXivm_v: |
| 12588 | case VE::VCMPSWZXivml: |
| 12589 | case VE::VCMPSWZXivml_v: |
| 12590 | case VE::VCMPSWZXrvm: |
| 12591 | case VE::VCMPSWZXrvmL: |
| 12592 | case VE::VCMPSWZXrvmL_v: |
| 12593 | case VE::VCMPSWZXrvm_v: |
| 12594 | case VE::VCMPSWZXrvml: |
| 12595 | case VE::VCMPSWZXrvml_v: |
| 12596 | case VE::VCMPULivm: |
| 12597 | case VE::VCMPULivmL: |
| 12598 | case VE::VCMPULivmL_v: |
| 12599 | case VE::VCMPULivm_v: |
| 12600 | case VE::VCMPULivml: |
| 12601 | case VE::VCMPULivml_v: |
| 12602 | case VE::VCMPULrvm: |
| 12603 | case VE::VCMPULrvmL: |
| 12604 | case VE::VCMPULrvmL_v: |
| 12605 | case VE::VCMPULrvm_v: |
| 12606 | case VE::VCMPULrvml: |
| 12607 | case VE::VCMPULrvml_v: |
| 12608 | case VE::VCMPUWivm: |
| 12609 | case VE::VCMPUWivmL: |
| 12610 | case VE::VCMPUWivmL_v: |
| 12611 | case VE::VCMPUWivm_v: |
| 12612 | case VE::VCMPUWivml: |
| 12613 | case VE::VCMPUWivml_v: |
| 12614 | case VE::VCMPUWrvm: |
| 12615 | case VE::VCMPUWrvmL: |
| 12616 | case VE::VCMPUWrvmL_v: |
| 12617 | case VE::VCMPUWrvm_v: |
| 12618 | case VE::VCMPUWrvml: |
| 12619 | case VE::VCMPUWrvml_v: |
| 12620 | case VE::VDIVSLivm: |
| 12621 | case VE::VDIVSLivmL: |
| 12622 | case VE::VDIVSLivmL_v: |
| 12623 | case VE::VDIVSLivm_v: |
| 12624 | case VE::VDIVSLivml: |
| 12625 | case VE::VDIVSLivml_v: |
| 12626 | case VE::VDIVSLrvm: |
| 12627 | case VE::VDIVSLrvmL: |
| 12628 | case VE::VDIVSLrvmL_v: |
| 12629 | case VE::VDIVSLrvm_v: |
| 12630 | case VE::VDIVSLrvml: |
| 12631 | case VE::VDIVSLrvml_v: |
| 12632 | case VE::VDIVSWSXivm: |
| 12633 | case VE::VDIVSWSXivmL: |
| 12634 | case VE::VDIVSWSXivmL_v: |
| 12635 | case VE::VDIVSWSXivm_v: |
| 12636 | case VE::VDIVSWSXivml: |
| 12637 | case VE::VDIVSWSXivml_v: |
| 12638 | case VE::VDIVSWSXrvm: |
| 12639 | case VE::VDIVSWSXrvmL: |
| 12640 | case VE::VDIVSWSXrvmL_v: |
| 12641 | case VE::VDIVSWSXrvm_v: |
| 12642 | case VE::VDIVSWSXrvml: |
| 12643 | case VE::VDIVSWSXrvml_v: |
| 12644 | case VE::VDIVSWZXivm: |
| 12645 | case VE::VDIVSWZXivmL: |
| 12646 | case VE::VDIVSWZXivmL_v: |
| 12647 | case VE::VDIVSWZXivm_v: |
| 12648 | case VE::VDIVSWZXivml: |
| 12649 | case VE::VDIVSWZXivml_v: |
| 12650 | case VE::VDIVSWZXrvm: |
| 12651 | case VE::VDIVSWZXrvmL: |
| 12652 | case VE::VDIVSWZXrvmL_v: |
| 12653 | case VE::VDIVSWZXrvm_v: |
| 12654 | case VE::VDIVSWZXrvml: |
| 12655 | case VE::VDIVSWZXrvml_v: |
| 12656 | case VE::VDIVULivm: |
| 12657 | case VE::VDIVULivmL: |
| 12658 | case VE::VDIVULivmL_v: |
| 12659 | case VE::VDIVULivm_v: |
| 12660 | case VE::VDIVULivml: |
| 12661 | case VE::VDIVULivml_v: |
| 12662 | case VE::VDIVULrvm: |
| 12663 | case VE::VDIVULrvmL: |
| 12664 | case VE::VDIVULrvmL_v: |
| 12665 | case VE::VDIVULrvm_v: |
| 12666 | case VE::VDIVULrvml: |
| 12667 | case VE::VDIVULrvml_v: |
| 12668 | case VE::VDIVUWivm: |
| 12669 | case VE::VDIVUWivmL: |
| 12670 | case VE::VDIVUWivmL_v: |
| 12671 | case VE::VDIVUWivm_v: |
| 12672 | case VE::VDIVUWivml: |
| 12673 | case VE::VDIVUWivml_v: |
| 12674 | case VE::VDIVUWrvm: |
| 12675 | case VE::VDIVUWrvmL: |
| 12676 | case VE::VDIVUWrvmL_v: |
| 12677 | case VE::VDIVUWrvm_v: |
| 12678 | case VE::VDIVUWrvml: |
| 12679 | case VE::VDIVUWrvml_v: |
| 12680 | case VE::VEQVmvm: |
| 12681 | case VE::VEQVmvmL: |
| 12682 | case VE::VEQVmvmL_v: |
| 12683 | case VE::VEQVmvm_v: |
| 12684 | case VE::VEQVmvml: |
| 12685 | case VE::VEQVmvml_v: |
| 12686 | case VE::VEQVrvm: |
| 12687 | case VE::VEQVrvmL: |
| 12688 | case VE::VEQVrvmL_v: |
| 12689 | case VE::VEQVrvm_v: |
| 12690 | case VE::VEQVrvml: |
| 12691 | case VE::VEQVrvml_v: |
| 12692 | case VE::VFADDDivm: |
| 12693 | case VE::VFADDDivmL: |
| 12694 | case VE::VFADDDivmL_v: |
| 12695 | case VE::VFADDDivm_v: |
| 12696 | case VE::VFADDDivml: |
| 12697 | case VE::VFADDDivml_v: |
| 12698 | case VE::VFADDDrvm: |
| 12699 | case VE::VFADDDrvmL: |
| 12700 | case VE::VFADDDrvmL_v: |
| 12701 | case VE::VFADDDrvm_v: |
| 12702 | case VE::VFADDDrvml: |
| 12703 | case VE::VFADDDrvml_v: |
| 12704 | case VE::VFADDSivm: |
| 12705 | case VE::VFADDSivmL: |
| 12706 | case VE::VFADDSivmL_v: |
| 12707 | case VE::VFADDSivm_v: |
| 12708 | case VE::VFADDSivml: |
| 12709 | case VE::VFADDSivml_v: |
| 12710 | case VE::VFADDSrvm: |
| 12711 | case VE::VFADDSrvmL: |
| 12712 | case VE::VFADDSrvmL_v: |
| 12713 | case VE::VFADDSrvm_v: |
| 12714 | case VE::VFADDSrvml: |
| 12715 | case VE::VFADDSrvml_v: |
| 12716 | case VE::VFCMPDivm: |
| 12717 | case VE::VFCMPDivmL: |
| 12718 | case VE::VFCMPDivmL_v: |
| 12719 | case VE::VFCMPDivm_v: |
| 12720 | case VE::VFCMPDivml: |
| 12721 | case VE::VFCMPDivml_v: |
| 12722 | case VE::VFCMPDrvm: |
| 12723 | case VE::VFCMPDrvmL: |
| 12724 | case VE::VFCMPDrvmL_v: |
| 12725 | case VE::VFCMPDrvm_v: |
| 12726 | case VE::VFCMPDrvml: |
| 12727 | case VE::VFCMPDrvml_v: |
| 12728 | case VE::VFCMPSivm: |
| 12729 | case VE::VFCMPSivmL: |
| 12730 | case VE::VFCMPSivmL_v: |
| 12731 | case VE::VFCMPSivm_v: |
| 12732 | case VE::VFCMPSivml: |
| 12733 | case VE::VFCMPSivml_v: |
| 12734 | case VE::VFCMPSrvm: |
| 12735 | case VE::VFCMPSrvmL: |
| 12736 | case VE::VFCMPSrvmL_v: |
| 12737 | case VE::VFCMPSrvm_v: |
| 12738 | case VE::VFCMPSrvml: |
| 12739 | case VE::VFCMPSrvml_v: |
| 12740 | case VE::VFDIVDivm: |
| 12741 | case VE::VFDIVDivmL: |
| 12742 | case VE::VFDIVDivmL_v: |
| 12743 | case VE::VFDIVDivm_v: |
| 12744 | case VE::VFDIVDivml: |
| 12745 | case VE::VFDIVDivml_v: |
| 12746 | case VE::VFDIVDrvm: |
| 12747 | case VE::VFDIVDrvmL: |
| 12748 | case VE::VFDIVDrvmL_v: |
| 12749 | case VE::VFDIVDrvm_v: |
| 12750 | case VE::VFDIVDrvml: |
| 12751 | case VE::VFDIVDrvml_v: |
| 12752 | case VE::VFDIVSivm: |
| 12753 | case VE::VFDIVSivmL: |
| 12754 | case VE::VFDIVSivmL_v: |
| 12755 | case VE::VFDIVSivm_v: |
| 12756 | case VE::VFDIVSivml: |
| 12757 | case VE::VFDIVSivml_v: |
| 12758 | case VE::VFDIVSrvm: |
| 12759 | case VE::VFDIVSrvmL: |
| 12760 | case VE::VFDIVSrvmL_v: |
| 12761 | case VE::VFDIVSrvm_v: |
| 12762 | case VE::VFDIVSrvml: |
| 12763 | case VE::VFDIVSrvml_v: |
| 12764 | case VE::VFMAXDivm: |
| 12765 | case VE::VFMAXDivmL: |
| 12766 | case VE::VFMAXDivmL_v: |
| 12767 | case VE::VFMAXDivm_v: |
| 12768 | case VE::VFMAXDivml: |
| 12769 | case VE::VFMAXDivml_v: |
| 12770 | case VE::VFMAXDrvm: |
| 12771 | case VE::VFMAXDrvmL: |
| 12772 | case VE::VFMAXDrvmL_v: |
| 12773 | case VE::VFMAXDrvm_v: |
| 12774 | case VE::VFMAXDrvml: |
| 12775 | case VE::VFMAXDrvml_v: |
| 12776 | case VE::VFMAXSivm: |
| 12777 | case VE::VFMAXSivmL: |
| 12778 | case VE::VFMAXSivmL_v: |
| 12779 | case VE::VFMAXSivm_v: |
| 12780 | case VE::VFMAXSivml: |
| 12781 | case VE::VFMAXSivml_v: |
| 12782 | case VE::VFMAXSrvm: |
| 12783 | case VE::VFMAXSrvmL: |
| 12784 | case VE::VFMAXSrvmL_v: |
| 12785 | case VE::VFMAXSrvm_v: |
| 12786 | case VE::VFMAXSrvml: |
| 12787 | case VE::VFMAXSrvml_v: |
| 12788 | case VE::VFMINDivm: |
| 12789 | case VE::VFMINDivmL: |
| 12790 | case VE::VFMINDivmL_v: |
| 12791 | case VE::VFMINDivm_v: |
| 12792 | case VE::VFMINDivml: |
| 12793 | case VE::VFMINDivml_v: |
| 12794 | case VE::VFMINDrvm: |
| 12795 | case VE::VFMINDrvmL: |
| 12796 | case VE::VFMINDrvmL_v: |
| 12797 | case VE::VFMINDrvm_v: |
| 12798 | case VE::VFMINDrvml: |
| 12799 | case VE::VFMINDrvml_v: |
| 12800 | case VE::VFMINSivm: |
| 12801 | case VE::VFMINSivmL: |
| 12802 | case VE::VFMINSivmL_v: |
| 12803 | case VE::VFMINSivm_v: |
| 12804 | case VE::VFMINSivml: |
| 12805 | case VE::VFMINSivml_v: |
| 12806 | case VE::VFMINSrvm: |
| 12807 | case VE::VFMINSrvmL: |
| 12808 | case VE::VFMINSrvmL_v: |
| 12809 | case VE::VFMINSrvm_v: |
| 12810 | case VE::VFMINSrvml: |
| 12811 | case VE::VFMINSrvml_v: |
| 12812 | case VE::VFMULDivm: |
| 12813 | case VE::VFMULDivmL: |
| 12814 | case VE::VFMULDivmL_v: |
| 12815 | case VE::VFMULDivm_v: |
| 12816 | case VE::VFMULDivml: |
| 12817 | case VE::VFMULDivml_v: |
| 12818 | case VE::VFMULDrvm: |
| 12819 | case VE::VFMULDrvmL: |
| 12820 | case VE::VFMULDrvmL_v: |
| 12821 | case VE::VFMULDrvm_v: |
| 12822 | case VE::VFMULDrvml: |
| 12823 | case VE::VFMULDrvml_v: |
| 12824 | case VE::VFMULSivm: |
| 12825 | case VE::VFMULSivmL: |
| 12826 | case VE::VFMULSivmL_v: |
| 12827 | case VE::VFMULSivm_v: |
| 12828 | case VE::VFMULSivml: |
| 12829 | case VE::VFMULSivml_v: |
| 12830 | case VE::VFMULSrvm: |
| 12831 | case VE::VFMULSrvmL: |
| 12832 | case VE::VFMULSrvmL_v: |
| 12833 | case VE::VFMULSrvm_v: |
| 12834 | case VE::VFMULSrvml: |
| 12835 | case VE::VFMULSrvml_v: |
| 12836 | case VE::VFSUBDivm: |
| 12837 | case VE::VFSUBDivmL: |
| 12838 | case VE::VFSUBDivmL_v: |
| 12839 | case VE::VFSUBDivm_v: |
| 12840 | case VE::VFSUBDivml: |
| 12841 | case VE::VFSUBDivml_v: |
| 12842 | case VE::VFSUBDrvm: |
| 12843 | case VE::VFSUBDrvmL: |
| 12844 | case VE::VFSUBDrvmL_v: |
| 12845 | case VE::VFSUBDrvm_v: |
| 12846 | case VE::VFSUBDrvml: |
| 12847 | case VE::VFSUBDrvml_v: |
| 12848 | case VE::VFSUBSivm: |
| 12849 | case VE::VFSUBSivmL: |
| 12850 | case VE::VFSUBSivmL_v: |
| 12851 | case VE::VFSUBSivm_v: |
| 12852 | case VE::VFSUBSivml: |
| 12853 | case VE::VFSUBSivml_v: |
| 12854 | case VE::VFSUBSrvm: |
| 12855 | case VE::VFSUBSrvmL: |
| 12856 | case VE::VFSUBSrvmL_v: |
| 12857 | case VE::VFSUBSrvm_v: |
| 12858 | case VE::VFSUBSrvml: |
| 12859 | case VE::VFSUBSrvml_v: |
| 12860 | case VE::VMAXSLivm: |
| 12861 | case VE::VMAXSLivmL: |
| 12862 | case VE::VMAXSLivmL_v: |
| 12863 | case VE::VMAXSLivm_v: |
| 12864 | case VE::VMAXSLivml: |
| 12865 | case VE::VMAXSLivml_v: |
| 12866 | case VE::VMAXSLrvm: |
| 12867 | case VE::VMAXSLrvmL: |
| 12868 | case VE::VMAXSLrvmL_v: |
| 12869 | case VE::VMAXSLrvm_v: |
| 12870 | case VE::VMAXSLrvml: |
| 12871 | case VE::VMAXSLrvml_v: |
| 12872 | case VE::VMAXSWSXivm: |
| 12873 | case VE::VMAXSWSXivmL: |
| 12874 | case VE::VMAXSWSXivmL_v: |
| 12875 | case VE::VMAXSWSXivm_v: |
| 12876 | case VE::VMAXSWSXivml: |
| 12877 | case VE::VMAXSWSXivml_v: |
| 12878 | case VE::VMAXSWSXrvm: |
| 12879 | case VE::VMAXSWSXrvmL: |
| 12880 | case VE::VMAXSWSXrvmL_v: |
| 12881 | case VE::VMAXSWSXrvm_v: |
| 12882 | case VE::VMAXSWSXrvml: |
| 12883 | case VE::VMAXSWSXrvml_v: |
| 12884 | case VE::VMAXSWZXivm: |
| 12885 | case VE::VMAXSWZXivmL: |
| 12886 | case VE::VMAXSWZXivmL_v: |
| 12887 | case VE::VMAXSWZXivm_v: |
| 12888 | case VE::VMAXSWZXivml: |
| 12889 | case VE::VMAXSWZXivml_v: |
| 12890 | case VE::VMAXSWZXrvm: |
| 12891 | case VE::VMAXSWZXrvmL: |
| 12892 | case VE::VMAXSWZXrvmL_v: |
| 12893 | case VE::VMAXSWZXrvm_v: |
| 12894 | case VE::VMAXSWZXrvml: |
| 12895 | case VE::VMAXSWZXrvml_v: |
| 12896 | case VE::VMINSLivm: |
| 12897 | case VE::VMINSLivmL: |
| 12898 | case VE::VMINSLivmL_v: |
| 12899 | case VE::VMINSLivm_v: |
| 12900 | case VE::VMINSLivml: |
| 12901 | case VE::VMINSLivml_v: |
| 12902 | case VE::VMINSLrvm: |
| 12903 | case VE::VMINSLrvmL: |
| 12904 | case VE::VMINSLrvmL_v: |
| 12905 | case VE::VMINSLrvm_v: |
| 12906 | case VE::VMINSLrvml: |
| 12907 | case VE::VMINSLrvml_v: |
| 12908 | case VE::VMINSWSXivm: |
| 12909 | case VE::VMINSWSXivmL: |
| 12910 | case VE::VMINSWSXivmL_v: |
| 12911 | case VE::VMINSWSXivm_v: |
| 12912 | case VE::VMINSWSXivml: |
| 12913 | case VE::VMINSWSXivml_v: |
| 12914 | case VE::VMINSWSXrvm: |
| 12915 | case VE::VMINSWSXrvmL: |
| 12916 | case VE::VMINSWSXrvmL_v: |
| 12917 | case VE::VMINSWSXrvm_v: |
| 12918 | case VE::VMINSWSXrvml: |
| 12919 | case VE::VMINSWSXrvml_v: |
| 12920 | case VE::VMINSWZXivm: |
| 12921 | case VE::VMINSWZXivmL: |
| 12922 | case VE::VMINSWZXivmL_v: |
| 12923 | case VE::VMINSWZXivm_v: |
| 12924 | case VE::VMINSWZXivml: |
| 12925 | case VE::VMINSWZXivml_v: |
| 12926 | case VE::VMINSWZXrvm: |
| 12927 | case VE::VMINSWZXrvmL: |
| 12928 | case VE::VMINSWZXrvmL_v: |
| 12929 | case VE::VMINSWZXrvm_v: |
| 12930 | case VE::VMINSWZXrvml: |
| 12931 | case VE::VMINSWZXrvml_v: |
| 12932 | case VE::VMRGWivm: |
| 12933 | case VE::VMRGWivmL: |
| 12934 | case VE::VMRGWivmL_v: |
| 12935 | case VE::VMRGWivm_v: |
| 12936 | case VE::VMRGWivml: |
| 12937 | case VE::VMRGWivml_v: |
| 12938 | case VE::VMRGWrvm: |
| 12939 | case VE::VMRGWrvmL: |
| 12940 | case VE::VMRGWrvmL_v: |
| 12941 | case VE::VMRGWrvm_v: |
| 12942 | case VE::VMRGWrvml: |
| 12943 | case VE::VMRGWrvml_v: |
| 12944 | case VE::VMRGivm: |
| 12945 | case VE::VMRGivmL: |
| 12946 | case VE::VMRGivmL_v: |
| 12947 | case VE::VMRGivm_v: |
| 12948 | case VE::VMRGivml: |
| 12949 | case VE::VMRGivml_v: |
| 12950 | case VE::VMRGrvm: |
| 12951 | case VE::VMRGrvmL: |
| 12952 | case VE::VMRGrvmL_v: |
| 12953 | case VE::VMRGrvm_v: |
| 12954 | case VE::VMRGrvml: |
| 12955 | case VE::VMRGrvml_v: |
| 12956 | case VE::VMULSLWivm: |
| 12957 | case VE::VMULSLWivmL: |
| 12958 | case VE::VMULSLWivmL_v: |
| 12959 | case VE::VMULSLWivm_v: |
| 12960 | case VE::VMULSLWivml: |
| 12961 | case VE::VMULSLWivml_v: |
| 12962 | case VE::VMULSLWrvm: |
| 12963 | case VE::VMULSLWrvmL: |
| 12964 | case VE::VMULSLWrvmL_v: |
| 12965 | case VE::VMULSLWrvm_v: |
| 12966 | case VE::VMULSLWrvml: |
| 12967 | case VE::VMULSLWrvml_v: |
| 12968 | case VE::VMULSLivm: |
| 12969 | case VE::VMULSLivmL: |
| 12970 | case VE::VMULSLivmL_v: |
| 12971 | case VE::VMULSLivm_v: |
| 12972 | case VE::VMULSLivml: |
| 12973 | case VE::VMULSLivml_v: |
| 12974 | case VE::VMULSLrvm: |
| 12975 | case VE::VMULSLrvmL: |
| 12976 | case VE::VMULSLrvmL_v: |
| 12977 | case VE::VMULSLrvm_v: |
| 12978 | case VE::VMULSLrvml: |
| 12979 | case VE::VMULSLrvml_v: |
| 12980 | case VE::VMULSWSXivm: |
| 12981 | case VE::VMULSWSXivmL: |
| 12982 | case VE::VMULSWSXivmL_v: |
| 12983 | case VE::VMULSWSXivm_v: |
| 12984 | case VE::VMULSWSXivml: |
| 12985 | case VE::VMULSWSXivml_v: |
| 12986 | case VE::VMULSWSXrvm: |
| 12987 | case VE::VMULSWSXrvmL: |
| 12988 | case VE::VMULSWSXrvmL_v: |
| 12989 | case VE::VMULSWSXrvm_v: |
| 12990 | case VE::VMULSWSXrvml: |
| 12991 | case VE::VMULSWSXrvml_v: |
| 12992 | case VE::VMULSWZXivm: |
| 12993 | case VE::VMULSWZXivmL: |
| 12994 | case VE::VMULSWZXivmL_v: |
| 12995 | case VE::VMULSWZXivm_v: |
| 12996 | case VE::VMULSWZXivml: |
| 12997 | case VE::VMULSWZXivml_v: |
| 12998 | case VE::VMULSWZXrvm: |
| 12999 | case VE::VMULSWZXrvmL: |
| 13000 | case VE::VMULSWZXrvmL_v: |
| 13001 | case VE::VMULSWZXrvm_v: |
| 13002 | case VE::VMULSWZXrvml: |
| 13003 | case VE::VMULSWZXrvml_v: |
| 13004 | case VE::VMULULivm: |
| 13005 | case VE::VMULULivmL: |
| 13006 | case VE::VMULULivmL_v: |
| 13007 | case VE::VMULULivm_v: |
| 13008 | case VE::VMULULivml: |
| 13009 | case VE::VMULULivml_v: |
| 13010 | case VE::VMULULrvm: |
| 13011 | case VE::VMULULrvmL: |
| 13012 | case VE::VMULULrvmL_v: |
| 13013 | case VE::VMULULrvm_v: |
| 13014 | case VE::VMULULrvml: |
| 13015 | case VE::VMULULrvml_v: |
| 13016 | case VE::VMULUWivm: |
| 13017 | case VE::VMULUWivmL: |
| 13018 | case VE::VMULUWivmL_v: |
| 13019 | case VE::VMULUWivm_v: |
| 13020 | case VE::VMULUWivml: |
| 13021 | case VE::VMULUWivml_v: |
| 13022 | case VE::VMULUWrvm: |
| 13023 | case VE::VMULUWrvmL: |
| 13024 | case VE::VMULUWrvmL_v: |
| 13025 | case VE::VMULUWrvm_v: |
| 13026 | case VE::VMULUWrvml: |
| 13027 | case VE::VMULUWrvml_v: |
| 13028 | case VE::VMVivm: |
| 13029 | case VE::VMVivmL: |
| 13030 | case VE::VMVivmL_v: |
| 13031 | case VE::VMVivm_v: |
| 13032 | case VE::VMVivml: |
| 13033 | case VE::VMVivml_v: |
| 13034 | case VE::VMVrvm: |
| 13035 | case VE::VMVrvmL: |
| 13036 | case VE::VMVrvmL_v: |
| 13037 | case VE::VMVrvm_v: |
| 13038 | case VE::VMVrvml: |
| 13039 | case VE::VMVrvml_v: |
| 13040 | case VE::VORmvm: |
| 13041 | case VE::VORmvmL: |
| 13042 | case VE::VORmvmL_v: |
| 13043 | case VE::VORmvm_v: |
| 13044 | case VE::VORmvml: |
| 13045 | case VE::VORmvml_v: |
| 13046 | case VE::VORrvm: |
| 13047 | case VE::VORrvmL: |
| 13048 | case VE::VORrvmL_v: |
| 13049 | case VE::VORrvm_v: |
| 13050 | case VE::VORrvml: |
| 13051 | case VE::VORrvml_v: |
| 13052 | case VE::VSUBSLivm: |
| 13053 | case VE::VSUBSLivmL: |
| 13054 | case VE::VSUBSLivmL_v: |
| 13055 | case VE::VSUBSLivm_v: |
| 13056 | case VE::VSUBSLivml: |
| 13057 | case VE::VSUBSLivml_v: |
| 13058 | case VE::VSUBSLrvm: |
| 13059 | case VE::VSUBSLrvmL: |
| 13060 | case VE::VSUBSLrvmL_v: |
| 13061 | case VE::VSUBSLrvm_v: |
| 13062 | case VE::VSUBSLrvml: |
| 13063 | case VE::VSUBSLrvml_v: |
| 13064 | case VE::VSUBSWSXivm: |
| 13065 | case VE::VSUBSWSXivmL: |
| 13066 | case VE::VSUBSWSXivmL_v: |
| 13067 | case VE::VSUBSWSXivm_v: |
| 13068 | case VE::VSUBSWSXivml: |
| 13069 | case VE::VSUBSWSXivml_v: |
| 13070 | case VE::VSUBSWSXrvm: |
| 13071 | case VE::VSUBSWSXrvmL: |
| 13072 | case VE::VSUBSWSXrvmL_v: |
| 13073 | case VE::VSUBSWSXrvm_v: |
| 13074 | case VE::VSUBSWSXrvml: |
| 13075 | case VE::VSUBSWSXrvml_v: |
| 13076 | case VE::VSUBSWZXivm: |
| 13077 | case VE::VSUBSWZXivmL: |
| 13078 | case VE::VSUBSWZXivmL_v: |
| 13079 | case VE::VSUBSWZXivm_v: |
| 13080 | case VE::VSUBSWZXivml: |
| 13081 | case VE::VSUBSWZXivml_v: |
| 13082 | case VE::VSUBSWZXrvm: |
| 13083 | case VE::VSUBSWZXrvmL: |
| 13084 | case VE::VSUBSWZXrvmL_v: |
| 13085 | case VE::VSUBSWZXrvm_v: |
| 13086 | case VE::VSUBSWZXrvml: |
| 13087 | case VE::VSUBSWZXrvml_v: |
| 13088 | case VE::VSUBULivm: |
| 13089 | case VE::VSUBULivmL: |
| 13090 | case VE::VSUBULivmL_v: |
| 13091 | case VE::VSUBULivm_v: |
| 13092 | case VE::VSUBULivml: |
| 13093 | case VE::VSUBULivml_v: |
| 13094 | case VE::VSUBULrvm: |
| 13095 | case VE::VSUBULrvmL: |
| 13096 | case VE::VSUBULrvmL_v: |
| 13097 | case VE::VSUBULrvm_v: |
| 13098 | case VE::VSUBULrvml: |
| 13099 | case VE::VSUBULrvml_v: |
| 13100 | case VE::VSUBUWivm: |
| 13101 | case VE::VSUBUWivmL: |
| 13102 | case VE::VSUBUWivmL_v: |
| 13103 | case VE::VSUBUWivm_v: |
| 13104 | case VE::VSUBUWivml: |
| 13105 | case VE::VSUBUWivml_v: |
| 13106 | case VE::VSUBUWrvm: |
| 13107 | case VE::VSUBUWrvmL: |
| 13108 | case VE::VSUBUWrvmL_v: |
| 13109 | case VE::VSUBUWrvm_v: |
| 13110 | case VE::VSUBUWrvml: |
| 13111 | case VE::VSUBUWrvml_v: |
| 13112 | case VE::VXORmvm: |
| 13113 | case VE::VXORmvmL: |
| 13114 | case VE::VXORmvmL_v: |
| 13115 | case VE::VXORmvm_v: |
| 13116 | case VE::VXORmvml: |
| 13117 | case VE::VXORmvml_v: |
| 13118 | case VE::VXORrvm: |
| 13119 | case VE::VXORrvmL: |
| 13120 | case VE::VXORrvmL_v: |
| 13121 | case VE::VXORrvm_v: |
| 13122 | case VE::VXORrvml: |
| 13123 | case VE::VXORrvml_v: { |
| 13124 | // op: m |
| 13125 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 13126 | op &= UINT64_C(15); |
| 13127 | op <<= 48; |
| 13128 | Value |= op; |
| 13129 | // op: sy |
| 13130 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 13131 | op &= UINT64_C(127); |
| 13132 | op <<= 40; |
| 13133 | Value |= op; |
| 13134 | // op: vx |
| 13135 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 13136 | op &= UINT64_C(255); |
| 13137 | op <<= 24; |
| 13138 | Value |= op; |
| 13139 | // op: vz |
| 13140 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 13141 | op &= UINT64_C(255); |
| 13142 | op <<= 8; |
| 13143 | Value |= op; |
| 13144 | break; |
| 13145 | } |
| 13146 | case VE::VDIVSLvim: |
| 13147 | case VE::VDIVSLvimL: |
| 13148 | case VE::VDIVSLvimL_v: |
| 13149 | case VE::VDIVSLvim_v: |
| 13150 | case VE::VDIVSLviml: |
| 13151 | case VE::VDIVSLviml_v: |
| 13152 | case VE::VDIVSLvrm: |
| 13153 | case VE::VDIVSLvrmL: |
| 13154 | case VE::VDIVSLvrmL_v: |
| 13155 | case VE::VDIVSLvrm_v: |
| 13156 | case VE::VDIVSLvrml: |
| 13157 | case VE::VDIVSLvrml_v: |
| 13158 | case VE::VDIVSWSXvim: |
| 13159 | case VE::VDIVSWSXvimL: |
| 13160 | case VE::VDIVSWSXvimL_v: |
| 13161 | case VE::VDIVSWSXvim_v: |
| 13162 | case VE::VDIVSWSXviml: |
| 13163 | case VE::VDIVSWSXviml_v: |
| 13164 | case VE::VDIVSWSXvrm: |
| 13165 | case VE::VDIVSWSXvrmL: |
| 13166 | case VE::VDIVSWSXvrmL_v: |
| 13167 | case VE::VDIVSWSXvrm_v: |
| 13168 | case VE::VDIVSWSXvrml: |
| 13169 | case VE::VDIVSWSXvrml_v: |
| 13170 | case VE::VDIVSWZXvim: |
| 13171 | case VE::VDIVSWZXvimL: |
| 13172 | case VE::VDIVSWZXvimL_v: |
| 13173 | case VE::VDIVSWZXvim_v: |
| 13174 | case VE::VDIVSWZXviml: |
| 13175 | case VE::VDIVSWZXviml_v: |
| 13176 | case VE::VDIVSWZXvrm: |
| 13177 | case VE::VDIVSWZXvrmL: |
| 13178 | case VE::VDIVSWZXvrmL_v: |
| 13179 | case VE::VDIVSWZXvrm_v: |
| 13180 | case VE::VDIVSWZXvrml: |
| 13181 | case VE::VDIVSWZXvrml_v: |
| 13182 | case VE::VDIVULvim: |
| 13183 | case VE::VDIVULvimL: |
| 13184 | case VE::VDIVULvimL_v: |
| 13185 | case VE::VDIVULvim_v: |
| 13186 | case VE::VDIVULviml: |
| 13187 | case VE::VDIVULviml_v: |
| 13188 | case VE::VDIVULvrm: |
| 13189 | case VE::VDIVULvrmL: |
| 13190 | case VE::VDIVULvrmL_v: |
| 13191 | case VE::VDIVULvrm_v: |
| 13192 | case VE::VDIVULvrml: |
| 13193 | case VE::VDIVULvrml_v: |
| 13194 | case VE::VDIVUWvim: |
| 13195 | case VE::VDIVUWvimL: |
| 13196 | case VE::VDIVUWvimL_v: |
| 13197 | case VE::VDIVUWvim_v: |
| 13198 | case VE::VDIVUWviml: |
| 13199 | case VE::VDIVUWviml_v: |
| 13200 | case VE::VDIVUWvrm: |
| 13201 | case VE::VDIVUWvrmL: |
| 13202 | case VE::VDIVUWvrmL_v: |
| 13203 | case VE::VDIVUWvrm_v: |
| 13204 | case VE::VDIVUWvrml: |
| 13205 | case VE::VDIVUWvrml_v: |
| 13206 | case VE::VFDIVDvim: |
| 13207 | case VE::VFDIVDvimL: |
| 13208 | case VE::VFDIVDvimL_v: |
| 13209 | case VE::VFDIVDvim_v: |
| 13210 | case VE::VFDIVDviml: |
| 13211 | case VE::VFDIVDviml_v: |
| 13212 | case VE::VFDIVDvrm: |
| 13213 | case VE::VFDIVDvrmL: |
| 13214 | case VE::VFDIVDvrmL_v: |
| 13215 | case VE::VFDIVDvrm_v: |
| 13216 | case VE::VFDIVDvrml: |
| 13217 | case VE::VFDIVDvrml_v: |
| 13218 | case VE::VFDIVSvim: |
| 13219 | case VE::VFDIVSvimL: |
| 13220 | case VE::VFDIVSvimL_v: |
| 13221 | case VE::VFDIVSvim_v: |
| 13222 | case VE::VFDIVSviml: |
| 13223 | case VE::VFDIVSviml_v: |
| 13224 | case VE::VFDIVSvrm: |
| 13225 | case VE::VFDIVSvrmL: |
| 13226 | case VE::VFDIVSvrmL_v: |
| 13227 | case VE::VFDIVSvrm_v: |
| 13228 | case VE::VFDIVSvrml: |
| 13229 | case VE::VFDIVSvrml_v: { |
| 13230 | // op: m |
| 13231 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 13232 | op &= UINT64_C(15); |
| 13233 | op <<= 48; |
| 13234 | Value |= op; |
| 13235 | // op: sy |
| 13236 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 13237 | op &= UINT64_C(127); |
| 13238 | op <<= 40; |
| 13239 | Value |= op; |
| 13240 | // op: vx |
| 13241 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 13242 | op &= UINT64_C(255); |
| 13243 | op <<= 24; |
| 13244 | Value |= op; |
| 13245 | // op: vy |
| 13246 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 13247 | op &= UINT64_C(255); |
| 13248 | op <<= 16; |
| 13249 | Value |= op; |
| 13250 | break; |
| 13251 | } |
| 13252 | case VE::PVSLALOvim: |
| 13253 | case VE::PVSLALOvimL: |
| 13254 | case VE::PVSLALOvimL_v: |
| 13255 | case VE::PVSLALOvim_v: |
| 13256 | case VE::PVSLALOviml: |
| 13257 | case VE::PVSLALOviml_v: |
| 13258 | case VE::PVSLALOvrm: |
| 13259 | case VE::PVSLALOvrmL: |
| 13260 | case VE::PVSLALOvrmL_v: |
| 13261 | case VE::PVSLALOvrm_v: |
| 13262 | case VE::PVSLALOvrml: |
| 13263 | case VE::PVSLALOvrml_v: |
| 13264 | case VE::PVSLAUPvim: |
| 13265 | case VE::PVSLAUPvimL: |
| 13266 | case VE::PVSLAUPvimL_v: |
| 13267 | case VE::PVSLAUPvim_v: |
| 13268 | case VE::PVSLAUPviml: |
| 13269 | case VE::PVSLAUPviml_v: |
| 13270 | case VE::PVSLAUPvrm: |
| 13271 | case VE::PVSLAUPvrmL: |
| 13272 | case VE::PVSLAUPvrmL_v: |
| 13273 | case VE::PVSLAUPvrm_v: |
| 13274 | case VE::PVSLAUPvrml: |
| 13275 | case VE::PVSLAUPvrml_v: |
| 13276 | case VE::PVSLAvim: |
| 13277 | case VE::PVSLAvimL: |
| 13278 | case VE::PVSLAvimL_v: |
| 13279 | case VE::PVSLAvim_v: |
| 13280 | case VE::PVSLAviml: |
| 13281 | case VE::PVSLAviml_v: |
| 13282 | case VE::PVSLAvrm: |
| 13283 | case VE::PVSLAvrmL: |
| 13284 | case VE::PVSLAvrmL_v: |
| 13285 | case VE::PVSLAvrm_v: |
| 13286 | case VE::PVSLAvrml: |
| 13287 | case VE::PVSLAvrml_v: |
| 13288 | case VE::PVSLLLOvim: |
| 13289 | case VE::PVSLLLOvimL: |
| 13290 | case VE::PVSLLLOvimL_v: |
| 13291 | case VE::PVSLLLOvim_v: |
| 13292 | case VE::PVSLLLOviml: |
| 13293 | case VE::PVSLLLOviml_v: |
| 13294 | case VE::PVSLLLOvrm: |
| 13295 | case VE::PVSLLLOvrmL: |
| 13296 | case VE::PVSLLLOvrmL_v: |
| 13297 | case VE::PVSLLLOvrm_v: |
| 13298 | case VE::PVSLLLOvrml: |
| 13299 | case VE::PVSLLLOvrml_v: |
| 13300 | case VE::PVSLLUPvim: |
| 13301 | case VE::PVSLLUPvimL: |
| 13302 | case VE::PVSLLUPvimL_v: |
| 13303 | case VE::PVSLLUPvim_v: |
| 13304 | case VE::PVSLLUPviml: |
| 13305 | case VE::PVSLLUPviml_v: |
| 13306 | case VE::PVSLLUPvrm: |
| 13307 | case VE::PVSLLUPvrmL: |
| 13308 | case VE::PVSLLUPvrmL_v: |
| 13309 | case VE::PVSLLUPvrm_v: |
| 13310 | case VE::PVSLLUPvrml: |
| 13311 | case VE::PVSLLUPvrml_v: |
| 13312 | case VE::PVSLLvim: |
| 13313 | case VE::PVSLLvimL: |
| 13314 | case VE::PVSLLvimL_v: |
| 13315 | case VE::PVSLLvim_v: |
| 13316 | case VE::PVSLLviml: |
| 13317 | case VE::PVSLLviml_v: |
| 13318 | case VE::PVSLLvrm: |
| 13319 | case VE::PVSLLvrmL: |
| 13320 | case VE::PVSLLvrmL_v: |
| 13321 | case VE::PVSLLvrm_v: |
| 13322 | case VE::PVSLLvrml: |
| 13323 | case VE::PVSLLvrml_v: |
| 13324 | case VE::PVSRALOvim: |
| 13325 | case VE::PVSRALOvimL: |
| 13326 | case VE::PVSRALOvimL_v: |
| 13327 | case VE::PVSRALOvim_v: |
| 13328 | case VE::PVSRALOviml: |
| 13329 | case VE::PVSRALOviml_v: |
| 13330 | case VE::PVSRALOvrm: |
| 13331 | case VE::PVSRALOvrmL: |
| 13332 | case VE::PVSRALOvrmL_v: |
| 13333 | case VE::PVSRALOvrm_v: |
| 13334 | case VE::PVSRALOvrml: |
| 13335 | case VE::PVSRALOvrml_v: |
| 13336 | case VE::PVSRAUPvim: |
| 13337 | case VE::PVSRAUPvimL: |
| 13338 | case VE::PVSRAUPvimL_v: |
| 13339 | case VE::PVSRAUPvim_v: |
| 13340 | case VE::PVSRAUPviml: |
| 13341 | case VE::PVSRAUPviml_v: |
| 13342 | case VE::PVSRAUPvrm: |
| 13343 | case VE::PVSRAUPvrmL: |
| 13344 | case VE::PVSRAUPvrmL_v: |
| 13345 | case VE::PVSRAUPvrm_v: |
| 13346 | case VE::PVSRAUPvrml: |
| 13347 | case VE::PVSRAUPvrml_v: |
| 13348 | case VE::PVSRAvim: |
| 13349 | case VE::PVSRAvimL: |
| 13350 | case VE::PVSRAvimL_v: |
| 13351 | case VE::PVSRAvim_v: |
| 13352 | case VE::PVSRAviml: |
| 13353 | case VE::PVSRAviml_v: |
| 13354 | case VE::PVSRAvrm: |
| 13355 | case VE::PVSRAvrmL: |
| 13356 | case VE::PVSRAvrmL_v: |
| 13357 | case VE::PVSRAvrm_v: |
| 13358 | case VE::PVSRAvrml: |
| 13359 | case VE::PVSRAvrml_v: |
| 13360 | case VE::PVSRLLOvim: |
| 13361 | case VE::PVSRLLOvimL: |
| 13362 | case VE::PVSRLLOvimL_v: |
| 13363 | case VE::PVSRLLOvim_v: |
| 13364 | case VE::PVSRLLOviml: |
| 13365 | case VE::PVSRLLOviml_v: |
| 13366 | case VE::PVSRLLOvrm: |
| 13367 | case VE::PVSRLLOvrmL: |
| 13368 | case VE::PVSRLLOvrmL_v: |
| 13369 | case VE::PVSRLLOvrm_v: |
| 13370 | case VE::PVSRLLOvrml: |
| 13371 | case VE::PVSRLLOvrml_v: |
| 13372 | case VE::PVSRLUPvim: |
| 13373 | case VE::PVSRLUPvimL: |
| 13374 | case VE::PVSRLUPvimL_v: |
| 13375 | case VE::PVSRLUPvim_v: |
| 13376 | case VE::PVSRLUPviml: |
| 13377 | case VE::PVSRLUPviml_v: |
| 13378 | case VE::PVSRLUPvrm: |
| 13379 | case VE::PVSRLUPvrmL: |
| 13380 | case VE::PVSRLUPvrmL_v: |
| 13381 | case VE::PVSRLUPvrm_v: |
| 13382 | case VE::PVSRLUPvrml: |
| 13383 | case VE::PVSRLUPvrml_v: |
| 13384 | case VE::PVSRLvim: |
| 13385 | case VE::PVSRLvimL: |
| 13386 | case VE::PVSRLvimL_v: |
| 13387 | case VE::PVSRLvim_v: |
| 13388 | case VE::PVSRLviml: |
| 13389 | case VE::PVSRLviml_v: |
| 13390 | case VE::PVSRLvrm: |
| 13391 | case VE::PVSRLvrmL: |
| 13392 | case VE::PVSRLvrmL_v: |
| 13393 | case VE::PVSRLvrm_v: |
| 13394 | case VE::PVSRLvrml: |
| 13395 | case VE::PVSRLvrml_v: |
| 13396 | case VE::VSLALvim: |
| 13397 | case VE::VSLALvimL: |
| 13398 | case VE::VSLALvimL_v: |
| 13399 | case VE::VSLALvim_v: |
| 13400 | case VE::VSLALviml: |
| 13401 | case VE::VSLALviml_v: |
| 13402 | case VE::VSLALvrm: |
| 13403 | case VE::VSLALvrmL: |
| 13404 | case VE::VSLALvrmL_v: |
| 13405 | case VE::VSLALvrm_v: |
| 13406 | case VE::VSLALvrml: |
| 13407 | case VE::VSLALvrml_v: |
| 13408 | case VE::VSLAWSXvim: |
| 13409 | case VE::VSLAWSXvimL: |
| 13410 | case VE::VSLAWSXvimL_v: |
| 13411 | case VE::VSLAWSXvim_v: |
| 13412 | case VE::VSLAWSXviml: |
| 13413 | case VE::VSLAWSXviml_v: |
| 13414 | case VE::VSLAWSXvrm: |
| 13415 | case VE::VSLAWSXvrmL: |
| 13416 | case VE::VSLAWSXvrmL_v: |
| 13417 | case VE::VSLAWSXvrm_v: |
| 13418 | case VE::VSLAWSXvrml: |
| 13419 | case VE::VSLAWSXvrml_v: |
| 13420 | case VE::VSLAWZXvim: |
| 13421 | case VE::VSLAWZXvimL: |
| 13422 | case VE::VSLAWZXvimL_v: |
| 13423 | case VE::VSLAWZXvim_v: |
| 13424 | case VE::VSLAWZXviml: |
| 13425 | case VE::VSLAWZXviml_v: |
| 13426 | case VE::VSLAWZXvrm: |
| 13427 | case VE::VSLAWZXvrmL: |
| 13428 | case VE::VSLAWZXvrmL_v: |
| 13429 | case VE::VSLAWZXvrm_v: |
| 13430 | case VE::VSLAWZXvrml: |
| 13431 | case VE::VSLAWZXvrml_v: |
| 13432 | case VE::VSLLvim: |
| 13433 | case VE::VSLLvimL: |
| 13434 | case VE::VSLLvimL_v: |
| 13435 | case VE::VSLLvim_v: |
| 13436 | case VE::VSLLviml: |
| 13437 | case VE::VSLLviml_v: |
| 13438 | case VE::VSLLvrm: |
| 13439 | case VE::VSLLvrmL: |
| 13440 | case VE::VSLLvrmL_v: |
| 13441 | case VE::VSLLvrm_v: |
| 13442 | case VE::VSLLvrml: |
| 13443 | case VE::VSLLvrml_v: |
| 13444 | case VE::VSRALvim: |
| 13445 | case VE::VSRALvimL: |
| 13446 | case VE::VSRALvimL_v: |
| 13447 | case VE::VSRALvim_v: |
| 13448 | case VE::VSRALviml: |
| 13449 | case VE::VSRALviml_v: |
| 13450 | case VE::VSRALvrm: |
| 13451 | case VE::VSRALvrmL: |
| 13452 | case VE::VSRALvrmL_v: |
| 13453 | case VE::VSRALvrm_v: |
| 13454 | case VE::VSRALvrml: |
| 13455 | case VE::VSRALvrml_v: |
| 13456 | case VE::VSRAWSXvim: |
| 13457 | case VE::VSRAWSXvimL: |
| 13458 | case VE::VSRAWSXvimL_v: |
| 13459 | case VE::VSRAWSXvim_v: |
| 13460 | case VE::VSRAWSXviml: |
| 13461 | case VE::VSRAWSXviml_v: |
| 13462 | case VE::VSRAWSXvrm: |
| 13463 | case VE::VSRAWSXvrmL: |
| 13464 | case VE::VSRAWSXvrmL_v: |
| 13465 | case VE::VSRAWSXvrm_v: |
| 13466 | case VE::VSRAWSXvrml: |
| 13467 | case VE::VSRAWSXvrml_v: |
| 13468 | case VE::VSRAWZXvim: |
| 13469 | case VE::VSRAWZXvimL: |
| 13470 | case VE::VSRAWZXvimL_v: |
| 13471 | case VE::VSRAWZXvim_v: |
| 13472 | case VE::VSRAWZXviml: |
| 13473 | case VE::VSRAWZXviml_v: |
| 13474 | case VE::VSRAWZXvrm: |
| 13475 | case VE::VSRAWZXvrmL: |
| 13476 | case VE::VSRAWZXvrmL_v: |
| 13477 | case VE::VSRAWZXvrm_v: |
| 13478 | case VE::VSRAWZXvrml: |
| 13479 | case VE::VSRAWZXvrml_v: |
| 13480 | case VE::VSRLvim: |
| 13481 | case VE::VSRLvimL: |
| 13482 | case VE::VSRLvimL_v: |
| 13483 | case VE::VSRLvim_v: |
| 13484 | case VE::VSRLviml: |
| 13485 | case VE::VSRLviml_v: |
| 13486 | case VE::VSRLvrm: |
| 13487 | case VE::VSRLvrmL: |
| 13488 | case VE::VSRLvrmL_v: |
| 13489 | case VE::VSRLvrm_v: |
| 13490 | case VE::VSRLvrml: |
| 13491 | case VE::VSRLvrml_v: { |
| 13492 | // op: m |
| 13493 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 13494 | op &= UINT64_C(15); |
| 13495 | op <<= 48; |
| 13496 | Value |= op; |
| 13497 | // op: sy |
| 13498 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 13499 | op &= UINT64_C(127); |
| 13500 | op <<= 40; |
| 13501 | Value |= op; |
| 13502 | // op: vx |
| 13503 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 13504 | op &= UINT64_C(255); |
| 13505 | op <<= 24; |
| 13506 | Value |= op; |
| 13507 | // op: vz |
| 13508 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 13509 | op &= UINT64_C(255); |
| 13510 | op <<= 8; |
| 13511 | Value |= op; |
| 13512 | break; |
| 13513 | } |
| 13514 | case VE::PVFMKSLOvm: |
| 13515 | case VE::PVFMKSLOvmL: |
| 13516 | case VE::PVFMKSLOvml: |
| 13517 | case VE::PVFMKSUPvm: |
| 13518 | case VE::PVFMKSUPvmL: |
| 13519 | case VE::PVFMKSUPvml: |
| 13520 | case VE::PVFMKWLOvm: |
| 13521 | case VE::PVFMKWLOvmL: |
| 13522 | case VE::PVFMKWLOvml: |
| 13523 | case VE::PVFMKWUPvm: |
| 13524 | case VE::PVFMKWUPvmL: |
| 13525 | case VE::PVFMKWUPvml: |
| 13526 | case VE::VFMKDvm: |
| 13527 | case VE::VFMKDvmL: |
| 13528 | case VE::VFMKDvml: |
| 13529 | case VE::VFMKLvm: |
| 13530 | case VE::VFMKLvmL: |
| 13531 | case VE::VFMKLvml: |
| 13532 | case VE::VFMKSvm: |
| 13533 | case VE::VFMKSvmL: |
| 13534 | case VE::VFMKSvml: |
| 13535 | case VE::VFMKWvm: |
| 13536 | case VE::VFMKWvmL: |
| 13537 | case VE::VFMKWvml: { |
| 13538 | // op: m |
| 13539 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 13540 | op &= UINT64_C(15); |
| 13541 | op <<= 48; |
| 13542 | Value |= op; |
| 13543 | // op: vx |
| 13544 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 13545 | op &= UINT64_C(255); |
| 13546 | op <<= 24; |
| 13547 | Value |= op; |
| 13548 | // op: vy |
| 13549 | op = getCCOpValue(MI, OpNo: 1, Fixups, STI); |
| 13550 | op &= UINT64_C(255); |
| 13551 | op <<= 16; |
| 13552 | Value |= op; |
| 13553 | // op: vz |
| 13554 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 13555 | op &= UINT64_C(255); |
| 13556 | op <<= 8; |
| 13557 | Value |= op; |
| 13558 | break; |
| 13559 | } |
| 13560 | case VE::PVADDSLOvvm: |
| 13561 | case VE::PVADDSLOvvmL: |
| 13562 | case VE::PVADDSLOvvmL_v: |
| 13563 | case VE::PVADDSLOvvm_v: |
| 13564 | case VE::PVADDSLOvvml: |
| 13565 | case VE::PVADDSLOvvml_v: |
| 13566 | case VE::PVADDSUPvvm: |
| 13567 | case VE::PVADDSUPvvmL: |
| 13568 | case VE::PVADDSUPvvmL_v: |
| 13569 | case VE::PVADDSUPvvm_v: |
| 13570 | case VE::PVADDSUPvvml: |
| 13571 | case VE::PVADDSUPvvml_v: |
| 13572 | case VE::PVADDSvvm: |
| 13573 | case VE::PVADDSvvmL: |
| 13574 | case VE::PVADDSvvmL_v: |
| 13575 | case VE::PVADDSvvm_v: |
| 13576 | case VE::PVADDSvvml: |
| 13577 | case VE::PVADDSvvml_v: |
| 13578 | case VE::PVADDULOvvm: |
| 13579 | case VE::PVADDULOvvmL: |
| 13580 | case VE::PVADDULOvvmL_v: |
| 13581 | case VE::PVADDULOvvm_v: |
| 13582 | case VE::PVADDULOvvml: |
| 13583 | case VE::PVADDULOvvml_v: |
| 13584 | case VE::PVADDUUPvvm: |
| 13585 | case VE::PVADDUUPvvmL: |
| 13586 | case VE::PVADDUUPvvmL_v: |
| 13587 | case VE::PVADDUUPvvm_v: |
| 13588 | case VE::PVADDUUPvvml: |
| 13589 | case VE::PVADDUUPvvml_v: |
| 13590 | case VE::PVADDUvvm: |
| 13591 | case VE::PVADDUvvmL: |
| 13592 | case VE::PVADDUvvmL_v: |
| 13593 | case VE::PVADDUvvm_v: |
| 13594 | case VE::PVADDUvvml: |
| 13595 | case VE::PVADDUvvml_v: |
| 13596 | case VE::PVANDLOvvm: |
| 13597 | case VE::PVANDLOvvmL: |
| 13598 | case VE::PVANDLOvvmL_v: |
| 13599 | case VE::PVANDLOvvm_v: |
| 13600 | case VE::PVANDLOvvml: |
| 13601 | case VE::PVANDLOvvml_v: |
| 13602 | case VE::PVANDUPvvm: |
| 13603 | case VE::PVANDUPvvmL: |
| 13604 | case VE::PVANDUPvvmL_v: |
| 13605 | case VE::PVANDUPvvm_v: |
| 13606 | case VE::PVANDUPvvml: |
| 13607 | case VE::PVANDUPvvml_v: |
| 13608 | case VE::PVANDvvm: |
| 13609 | case VE::PVANDvvmL: |
| 13610 | case VE::PVANDvvmL_v: |
| 13611 | case VE::PVANDvvm_v: |
| 13612 | case VE::PVANDvvml: |
| 13613 | case VE::PVANDvvml_v: |
| 13614 | case VE::PVCMPSLOvvm: |
| 13615 | case VE::PVCMPSLOvvmL: |
| 13616 | case VE::PVCMPSLOvvmL_v: |
| 13617 | case VE::PVCMPSLOvvm_v: |
| 13618 | case VE::PVCMPSLOvvml: |
| 13619 | case VE::PVCMPSLOvvml_v: |
| 13620 | case VE::PVCMPSUPvvm: |
| 13621 | case VE::PVCMPSUPvvmL: |
| 13622 | case VE::PVCMPSUPvvmL_v: |
| 13623 | case VE::PVCMPSUPvvm_v: |
| 13624 | case VE::PVCMPSUPvvml: |
| 13625 | case VE::PVCMPSUPvvml_v: |
| 13626 | case VE::PVCMPSvvm: |
| 13627 | case VE::PVCMPSvvmL: |
| 13628 | case VE::PVCMPSvvmL_v: |
| 13629 | case VE::PVCMPSvvm_v: |
| 13630 | case VE::PVCMPSvvml: |
| 13631 | case VE::PVCMPSvvml_v: |
| 13632 | case VE::PVCMPULOvvm: |
| 13633 | case VE::PVCMPULOvvmL: |
| 13634 | case VE::PVCMPULOvvmL_v: |
| 13635 | case VE::PVCMPULOvvm_v: |
| 13636 | case VE::PVCMPULOvvml: |
| 13637 | case VE::PVCMPULOvvml_v: |
| 13638 | case VE::PVCMPUUPvvm: |
| 13639 | case VE::PVCMPUUPvvmL: |
| 13640 | case VE::PVCMPUUPvvmL_v: |
| 13641 | case VE::PVCMPUUPvvm_v: |
| 13642 | case VE::PVCMPUUPvvml: |
| 13643 | case VE::PVCMPUUPvvml_v: |
| 13644 | case VE::PVCMPUvvm: |
| 13645 | case VE::PVCMPUvvmL: |
| 13646 | case VE::PVCMPUvvmL_v: |
| 13647 | case VE::PVCMPUvvm_v: |
| 13648 | case VE::PVCMPUvvml: |
| 13649 | case VE::PVCMPUvvml_v: |
| 13650 | case VE::PVEQVLOvvm: |
| 13651 | case VE::PVEQVLOvvmL: |
| 13652 | case VE::PVEQVLOvvmL_v: |
| 13653 | case VE::PVEQVLOvvm_v: |
| 13654 | case VE::PVEQVLOvvml: |
| 13655 | case VE::PVEQVLOvvml_v: |
| 13656 | case VE::PVEQVUPvvm: |
| 13657 | case VE::PVEQVUPvvmL: |
| 13658 | case VE::PVEQVUPvvmL_v: |
| 13659 | case VE::PVEQVUPvvm_v: |
| 13660 | case VE::PVEQVUPvvml: |
| 13661 | case VE::PVEQVUPvvml_v: |
| 13662 | case VE::PVEQVvvm: |
| 13663 | case VE::PVEQVvvmL: |
| 13664 | case VE::PVEQVvvmL_v: |
| 13665 | case VE::PVEQVvvm_v: |
| 13666 | case VE::PVEQVvvml: |
| 13667 | case VE::PVEQVvvml_v: |
| 13668 | case VE::PVFADDLOvvm: |
| 13669 | case VE::PVFADDLOvvmL: |
| 13670 | case VE::PVFADDLOvvmL_v: |
| 13671 | case VE::PVFADDLOvvm_v: |
| 13672 | case VE::PVFADDLOvvml: |
| 13673 | case VE::PVFADDLOvvml_v: |
| 13674 | case VE::PVFADDUPvvm: |
| 13675 | case VE::PVFADDUPvvmL: |
| 13676 | case VE::PVFADDUPvvmL_v: |
| 13677 | case VE::PVFADDUPvvm_v: |
| 13678 | case VE::PVFADDUPvvml: |
| 13679 | case VE::PVFADDUPvvml_v: |
| 13680 | case VE::PVFADDvvm: |
| 13681 | case VE::PVFADDvvmL: |
| 13682 | case VE::PVFADDvvmL_v: |
| 13683 | case VE::PVFADDvvm_v: |
| 13684 | case VE::PVFADDvvml: |
| 13685 | case VE::PVFADDvvml_v: |
| 13686 | case VE::PVFCMPLOvvm: |
| 13687 | case VE::PVFCMPLOvvmL: |
| 13688 | case VE::PVFCMPLOvvmL_v: |
| 13689 | case VE::PVFCMPLOvvm_v: |
| 13690 | case VE::PVFCMPLOvvml: |
| 13691 | case VE::PVFCMPLOvvml_v: |
| 13692 | case VE::PVFCMPUPvvm: |
| 13693 | case VE::PVFCMPUPvvmL: |
| 13694 | case VE::PVFCMPUPvvmL_v: |
| 13695 | case VE::PVFCMPUPvvm_v: |
| 13696 | case VE::PVFCMPUPvvml: |
| 13697 | case VE::PVFCMPUPvvml_v: |
| 13698 | case VE::PVFCMPvvm: |
| 13699 | case VE::PVFCMPvvmL: |
| 13700 | case VE::PVFCMPvvmL_v: |
| 13701 | case VE::PVFCMPvvm_v: |
| 13702 | case VE::PVFCMPvvml: |
| 13703 | case VE::PVFCMPvvml_v: |
| 13704 | case VE::PVFMAXLOvvm: |
| 13705 | case VE::PVFMAXLOvvmL: |
| 13706 | case VE::PVFMAXLOvvmL_v: |
| 13707 | case VE::PVFMAXLOvvm_v: |
| 13708 | case VE::PVFMAXLOvvml: |
| 13709 | case VE::PVFMAXLOvvml_v: |
| 13710 | case VE::PVFMAXUPvvm: |
| 13711 | case VE::PVFMAXUPvvmL: |
| 13712 | case VE::PVFMAXUPvvmL_v: |
| 13713 | case VE::PVFMAXUPvvm_v: |
| 13714 | case VE::PVFMAXUPvvml: |
| 13715 | case VE::PVFMAXUPvvml_v: |
| 13716 | case VE::PVFMAXvvm: |
| 13717 | case VE::PVFMAXvvmL: |
| 13718 | case VE::PVFMAXvvmL_v: |
| 13719 | case VE::PVFMAXvvm_v: |
| 13720 | case VE::PVFMAXvvml: |
| 13721 | case VE::PVFMAXvvml_v: |
| 13722 | case VE::PVFMINLOvvm: |
| 13723 | case VE::PVFMINLOvvmL: |
| 13724 | case VE::PVFMINLOvvmL_v: |
| 13725 | case VE::PVFMINLOvvm_v: |
| 13726 | case VE::PVFMINLOvvml: |
| 13727 | case VE::PVFMINLOvvml_v: |
| 13728 | case VE::PVFMINUPvvm: |
| 13729 | case VE::PVFMINUPvvmL: |
| 13730 | case VE::PVFMINUPvvmL_v: |
| 13731 | case VE::PVFMINUPvvm_v: |
| 13732 | case VE::PVFMINUPvvml: |
| 13733 | case VE::PVFMINUPvvml_v: |
| 13734 | case VE::PVFMINvvm: |
| 13735 | case VE::PVFMINvvmL: |
| 13736 | case VE::PVFMINvvmL_v: |
| 13737 | case VE::PVFMINvvm_v: |
| 13738 | case VE::PVFMINvvml: |
| 13739 | case VE::PVFMINvvml_v: |
| 13740 | case VE::PVFMULLOvvm: |
| 13741 | case VE::PVFMULLOvvmL: |
| 13742 | case VE::PVFMULLOvvmL_v: |
| 13743 | case VE::PVFMULLOvvm_v: |
| 13744 | case VE::PVFMULLOvvml: |
| 13745 | case VE::PVFMULLOvvml_v: |
| 13746 | case VE::PVFMULUPvvm: |
| 13747 | case VE::PVFMULUPvvmL: |
| 13748 | case VE::PVFMULUPvvmL_v: |
| 13749 | case VE::PVFMULUPvvm_v: |
| 13750 | case VE::PVFMULUPvvml: |
| 13751 | case VE::PVFMULUPvvml_v: |
| 13752 | case VE::PVFMULvvm: |
| 13753 | case VE::PVFMULvvmL: |
| 13754 | case VE::PVFMULvvmL_v: |
| 13755 | case VE::PVFMULvvm_v: |
| 13756 | case VE::PVFMULvvml: |
| 13757 | case VE::PVFMULvvml_v: |
| 13758 | case VE::PVFSUBLOvvm: |
| 13759 | case VE::PVFSUBLOvvmL: |
| 13760 | case VE::PVFSUBLOvvmL_v: |
| 13761 | case VE::PVFSUBLOvvm_v: |
| 13762 | case VE::PVFSUBLOvvml: |
| 13763 | case VE::PVFSUBLOvvml_v: |
| 13764 | case VE::PVFSUBUPvvm: |
| 13765 | case VE::PVFSUBUPvvmL: |
| 13766 | case VE::PVFSUBUPvvmL_v: |
| 13767 | case VE::PVFSUBUPvvm_v: |
| 13768 | case VE::PVFSUBUPvvml: |
| 13769 | case VE::PVFSUBUPvvml_v: |
| 13770 | case VE::PVFSUBvvm: |
| 13771 | case VE::PVFSUBvvmL: |
| 13772 | case VE::PVFSUBvvmL_v: |
| 13773 | case VE::PVFSUBvvm_v: |
| 13774 | case VE::PVFSUBvvml: |
| 13775 | case VE::PVFSUBvvml_v: |
| 13776 | case VE::PVMAXSLOvvm: |
| 13777 | case VE::PVMAXSLOvvmL: |
| 13778 | case VE::PVMAXSLOvvmL_v: |
| 13779 | case VE::PVMAXSLOvvm_v: |
| 13780 | case VE::PVMAXSLOvvml: |
| 13781 | case VE::PVMAXSLOvvml_v: |
| 13782 | case VE::PVMAXSUPvvm: |
| 13783 | case VE::PVMAXSUPvvmL: |
| 13784 | case VE::PVMAXSUPvvmL_v: |
| 13785 | case VE::PVMAXSUPvvm_v: |
| 13786 | case VE::PVMAXSUPvvml: |
| 13787 | case VE::PVMAXSUPvvml_v: |
| 13788 | case VE::PVMAXSvvm: |
| 13789 | case VE::PVMAXSvvmL: |
| 13790 | case VE::PVMAXSvvmL_v: |
| 13791 | case VE::PVMAXSvvm_v: |
| 13792 | case VE::PVMAXSvvml: |
| 13793 | case VE::PVMAXSvvml_v: |
| 13794 | case VE::PVMINSLOvvm: |
| 13795 | case VE::PVMINSLOvvmL: |
| 13796 | case VE::PVMINSLOvvmL_v: |
| 13797 | case VE::PVMINSLOvvm_v: |
| 13798 | case VE::PVMINSLOvvml: |
| 13799 | case VE::PVMINSLOvvml_v: |
| 13800 | case VE::PVMINSUPvvm: |
| 13801 | case VE::PVMINSUPvvmL: |
| 13802 | case VE::PVMINSUPvvmL_v: |
| 13803 | case VE::PVMINSUPvvm_v: |
| 13804 | case VE::PVMINSUPvvml: |
| 13805 | case VE::PVMINSUPvvml_v: |
| 13806 | case VE::PVMINSvvm: |
| 13807 | case VE::PVMINSvvmL: |
| 13808 | case VE::PVMINSvvmL_v: |
| 13809 | case VE::PVMINSvvm_v: |
| 13810 | case VE::PVMINSvvml: |
| 13811 | case VE::PVMINSvvml_v: |
| 13812 | case VE::PVORLOvvm: |
| 13813 | case VE::PVORLOvvmL: |
| 13814 | case VE::PVORLOvvmL_v: |
| 13815 | case VE::PVORLOvvm_v: |
| 13816 | case VE::PVORLOvvml: |
| 13817 | case VE::PVORLOvvml_v: |
| 13818 | case VE::PVORUPvvm: |
| 13819 | case VE::PVORUPvvmL: |
| 13820 | case VE::PVORUPvvmL_v: |
| 13821 | case VE::PVORUPvvm_v: |
| 13822 | case VE::PVORUPvvml: |
| 13823 | case VE::PVORUPvvml_v: |
| 13824 | case VE::PVORvvm: |
| 13825 | case VE::PVORvvmL: |
| 13826 | case VE::PVORvvmL_v: |
| 13827 | case VE::PVORvvm_v: |
| 13828 | case VE::PVORvvml: |
| 13829 | case VE::PVORvvml_v: |
| 13830 | case VE::PVSUBSLOvvm: |
| 13831 | case VE::PVSUBSLOvvmL: |
| 13832 | case VE::PVSUBSLOvvmL_v: |
| 13833 | case VE::PVSUBSLOvvm_v: |
| 13834 | case VE::PVSUBSLOvvml: |
| 13835 | case VE::PVSUBSLOvvml_v: |
| 13836 | case VE::PVSUBSUPvvm: |
| 13837 | case VE::PVSUBSUPvvmL: |
| 13838 | case VE::PVSUBSUPvvmL_v: |
| 13839 | case VE::PVSUBSUPvvm_v: |
| 13840 | case VE::PVSUBSUPvvml: |
| 13841 | case VE::PVSUBSUPvvml_v: |
| 13842 | case VE::PVSUBSvvm: |
| 13843 | case VE::PVSUBSvvmL: |
| 13844 | case VE::PVSUBSvvmL_v: |
| 13845 | case VE::PVSUBSvvm_v: |
| 13846 | case VE::PVSUBSvvml: |
| 13847 | case VE::PVSUBSvvml_v: |
| 13848 | case VE::PVSUBULOvvm: |
| 13849 | case VE::PVSUBULOvvmL: |
| 13850 | case VE::PVSUBULOvvmL_v: |
| 13851 | case VE::PVSUBULOvvm_v: |
| 13852 | case VE::PVSUBULOvvml: |
| 13853 | case VE::PVSUBULOvvml_v: |
| 13854 | case VE::PVSUBUUPvvm: |
| 13855 | case VE::PVSUBUUPvvmL: |
| 13856 | case VE::PVSUBUUPvvmL_v: |
| 13857 | case VE::PVSUBUUPvvm_v: |
| 13858 | case VE::PVSUBUUPvvml: |
| 13859 | case VE::PVSUBUUPvvml_v: |
| 13860 | case VE::PVSUBUvvm: |
| 13861 | case VE::PVSUBUvvmL: |
| 13862 | case VE::PVSUBUvvmL_v: |
| 13863 | case VE::PVSUBUvvm_v: |
| 13864 | case VE::PVSUBUvvml: |
| 13865 | case VE::PVSUBUvvml_v: |
| 13866 | case VE::PVXORLOvvm: |
| 13867 | case VE::PVXORLOvvmL: |
| 13868 | case VE::PVXORLOvvmL_v: |
| 13869 | case VE::PVXORLOvvm_v: |
| 13870 | case VE::PVXORLOvvml: |
| 13871 | case VE::PVXORLOvvml_v: |
| 13872 | case VE::PVXORUPvvm: |
| 13873 | case VE::PVXORUPvvmL: |
| 13874 | case VE::PVXORUPvvmL_v: |
| 13875 | case VE::PVXORUPvvm_v: |
| 13876 | case VE::PVXORUPvvml: |
| 13877 | case VE::PVXORUPvvml_v: |
| 13878 | case VE::PVXORvvm: |
| 13879 | case VE::PVXORvvmL: |
| 13880 | case VE::PVXORvvmL_v: |
| 13881 | case VE::PVXORvvm_v: |
| 13882 | case VE::PVXORvvml: |
| 13883 | case VE::PVXORvvml_v: |
| 13884 | case VE::VADDSLvvm: |
| 13885 | case VE::VADDSLvvmL: |
| 13886 | case VE::VADDSLvvmL_v: |
| 13887 | case VE::VADDSLvvm_v: |
| 13888 | case VE::VADDSLvvml: |
| 13889 | case VE::VADDSLvvml_v: |
| 13890 | case VE::VADDSWSXvvm: |
| 13891 | case VE::VADDSWSXvvmL: |
| 13892 | case VE::VADDSWSXvvmL_v: |
| 13893 | case VE::VADDSWSXvvm_v: |
| 13894 | case VE::VADDSWSXvvml: |
| 13895 | case VE::VADDSWSXvvml_v: |
| 13896 | case VE::VADDSWZXvvm: |
| 13897 | case VE::VADDSWZXvvmL: |
| 13898 | case VE::VADDSWZXvvmL_v: |
| 13899 | case VE::VADDSWZXvvm_v: |
| 13900 | case VE::VADDSWZXvvml: |
| 13901 | case VE::VADDSWZXvvml_v: |
| 13902 | case VE::VADDULvvm: |
| 13903 | case VE::VADDULvvmL: |
| 13904 | case VE::VADDULvvmL_v: |
| 13905 | case VE::VADDULvvm_v: |
| 13906 | case VE::VADDULvvml: |
| 13907 | case VE::VADDULvvml_v: |
| 13908 | case VE::VADDUWvvm: |
| 13909 | case VE::VADDUWvvmL: |
| 13910 | case VE::VADDUWvvmL_v: |
| 13911 | case VE::VADDUWvvm_v: |
| 13912 | case VE::VADDUWvvml: |
| 13913 | case VE::VADDUWvvml_v: |
| 13914 | case VE::VANDvvm: |
| 13915 | case VE::VANDvvmL: |
| 13916 | case VE::VANDvvmL_v: |
| 13917 | case VE::VANDvvm_v: |
| 13918 | case VE::VANDvvml: |
| 13919 | case VE::VANDvvml_v: |
| 13920 | case VE::VCMPSLvvm: |
| 13921 | case VE::VCMPSLvvmL: |
| 13922 | case VE::VCMPSLvvmL_v: |
| 13923 | case VE::VCMPSLvvm_v: |
| 13924 | case VE::VCMPSLvvml: |
| 13925 | case VE::VCMPSLvvml_v: |
| 13926 | case VE::VCMPSWSXvvm: |
| 13927 | case VE::VCMPSWSXvvmL: |
| 13928 | case VE::VCMPSWSXvvmL_v: |
| 13929 | case VE::VCMPSWSXvvm_v: |
| 13930 | case VE::VCMPSWSXvvml: |
| 13931 | case VE::VCMPSWSXvvml_v: |
| 13932 | case VE::VCMPSWZXvvm: |
| 13933 | case VE::VCMPSWZXvvmL: |
| 13934 | case VE::VCMPSWZXvvmL_v: |
| 13935 | case VE::VCMPSWZXvvm_v: |
| 13936 | case VE::VCMPSWZXvvml: |
| 13937 | case VE::VCMPSWZXvvml_v: |
| 13938 | case VE::VCMPULvvm: |
| 13939 | case VE::VCMPULvvmL: |
| 13940 | case VE::VCMPULvvmL_v: |
| 13941 | case VE::VCMPULvvm_v: |
| 13942 | case VE::VCMPULvvml: |
| 13943 | case VE::VCMPULvvml_v: |
| 13944 | case VE::VCMPUWvvm: |
| 13945 | case VE::VCMPUWvvmL: |
| 13946 | case VE::VCMPUWvvmL_v: |
| 13947 | case VE::VCMPUWvvm_v: |
| 13948 | case VE::VCMPUWvvml: |
| 13949 | case VE::VCMPUWvvml_v: |
| 13950 | case VE::VDIVSLvvm: |
| 13951 | case VE::VDIVSLvvmL: |
| 13952 | case VE::VDIVSLvvmL_v: |
| 13953 | case VE::VDIVSLvvm_v: |
| 13954 | case VE::VDIVSLvvml: |
| 13955 | case VE::VDIVSLvvml_v: |
| 13956 | case VE::VDIVSWSXvvm: |
| 13957 | case VE::VDIVSWSXvvmL: |
| 13958 | case VE::VDIVSWSXvvmL_v: |
| 13959 | case VE::VDIVSWSXvvm_v: |
| 13960 | case VE::VDIVSWSXvvml: |
| 13961 | case VE::VDIVSWSXvvml_v: |
| 13962 | case VE::VDIVSWZXvvm: |
| 13963 | case VE::VDIVSWZXvvmL: |
| 13964 | case VE::VDIVSWZXvvmL_v: |
| 13965 | case VE::VDIVSWZXvvm_v: |
| 13966 | case VE::VDIVSWZXvvml: |
| 13967 | case VE::VDIVSWZXvvml_v: |
| 13968 | case VE::VDIVULvvm: |
| 13969 | case VE::VDIVULvvmL: |
| 13970 | case VE::VDIVULvvmL_v: |
| 13971 | case VE::VDIVULvvm_v: |
| 13972 | case VE::VDIVULvvml: |
| 13973 | case VE::VDIVULvvml_v: |
| 13974 | case VE::VDIVUWvvm: |
| 13975 | case VE::VDIVUWvvmL: |
| 13976 | case VE::VDIVUWvvmL_v: |
| 13977 | case VE::VDIVUWvvm_v: |
| 13978 | case VE::VDIVUWvvml: |
| 13979 | case VE::VDIVUWvvml_v: |
| 13980 | case VE::VEQVvvm: |
| 13981 | case VE::VEQVvvmL: |
| 13982 | case VE::VEQVvvmL_v: |
| 13983 | case VE::VEQVvvm_v: |
| 13984 | case VE::VEQVvvml: |
| 13985 | case VE::VEQVvvml_v: |
| 13986 | case VE::VFADDDvvm: |
| 13987 | case VE::VFADDDvvmL: |
| 13988 | case VE::VFADDDvvmL_v: |
| 13989 | case VE::VFADDDvvm_v: |
| 13990 | case VE::VFADDDvvml: |
| 13991 | case VE::VFADDDvvml_v: |
| 13992 | case VE::VFADDSvvm: |
| 13993 | case VE::VFADDSvvmL: |
| 13994 | case VE::VFADDSvvmL_v: |
| 13995 | case VE::VFADDSvvm_v: |
| 13996 | case VE::VFADDSvvml: |
| 13997 | case VE::VFADDSvvml_v: |
| 13998 | case VE::VFCMPDvvm: |
| 13999 | case VE::VFCMPDvvmL: |
| 14000 | case VE::VFCMPDvvmL_v: |
| 14001 | case VE::VFCMPDvvm_v: |
| 14002 | case VE::VFCMPDvvml: |
| 14003 | case VE::VFCMPDvvml_v: |
| 14004 | case VE::VFCMPSvvm: |
| 14005 | case VE::VFCMPSvvmL: |
| 14006 | case VE::VFCMPSvvmL_v: |
| 14007 | case VE::VFCMPSvvm_v: |
| 14008 | case VE::VFCMPSvvml: |
| 14009 | case VE::VFCMPSvvml_v: |
| 14010 | case VE::VFDIVDvvm: |
| 14011 | case VE::VFDIVDvvmL: |
| 14012 | case VE::VFDIVDvvmL_v: |
| 14013 | case VE::VFDIVDvvm_v: |
| 14014 | case VE::VFDIVDvvml: |
| 14015 | case VE::VFDIVDvvml_v: |
| 14016 | case VE::VFDIVSvvm: |
| 14017 | case VE::VFDIVSvvmL: |
| 14018 | case VE::VFDIVSvvmL_v: |
| 14019 | case VE::VFDIVSvvm_v: |
| 14020 | case VE::VFDIVSvvml: |
| 14021 | case VE::VFDIVSvvml_v: |
| 14022 | case VE::VFMAXDvvm: |
| 14023 | case VE::VFMAXDvvmL: |
| 14024 | case VE::VFMAXDvvmL_v: |
| 14025 | case VE::VFMAXDvvm_v: |
| 14026 | case VE::VFMAXDvvml: |
| 14027 | case VE::VFMAXDvvml_v: |
| 14028 | case VE::VFMAXSvvm: |
| 14029 | case VE::VFMAXSvvmL: |
| 14030 | case VE::VFMAXSvvmL_v: |
| 14031 | case VE::VFMAXSvvm_v: |
| 14032 | case VE::VFMAXSvvml: |
| 14033 | case VE::VFMAXSvvml_v: |
| 14034 | case VE::VFMINDvvm: |
| 14035 | case VE::VFMINDvvmL: |
| 14036 | case VE::VFMINDvvmL_v: |
| 14037 | case VE::VFMINDvvm_v: |
| 14038 | case VE::VFMINDvvml: |
| 14039 | case VE::VFMINDvvml_v: |
| 14040 | case VE::VFMINSvvm: |
| 14041 | case VE::VFMINSvvmL: |
| 14042 | case VE::VFMINSvvmL_v: |
| 14043 | case VE::VFMINSvvm_v: |
| 14044 | case VE::VFMINSvvml: |
| 14045 | case VE::VFMINSvvml_v: |
| 14046 | case VE::VFMULDvvm: |
| 14047 | case VE::VFMULDvvmL: |
| 14048 | case VE::VFMULDvvmL_v: |
| 14049 | case VE::VFMULDvvm_v: |
| 14050 | case VE::VFMULDvvml: |
| 14051 | case VE::VFMULDvvml_v: |
| 14052 | case VE::VFMULSvvm: |
| 14053 | case VE::VFMULSvvmL: |
| 14054 | case VE::VFMULSvvmL_v: |
| 14055 | case VE::VFMULSvvm_v: |
| 14056 | case VE::VFMULSvvml: |
| 14057 | case VE::VFMULSvvml_v: |
| 14058 | case VE::VFSUBDvvm: |
| 14059 | case VE::VFSUBDvvmL: |
| 14060 | case VE::VFSUBDvvmL_v: |
| 14061 | case VE::VFSUBDvvm_v: |
| 14062 | case VE::VFSUBDvvml: |
| 14063 | case VE::VFSUBDvvml_v: |
| 14064 | case VE::VFSUBSvvm: |
| 14065 | case VE::VFSUBSvvmL: |
| 14066 | case VE::VFSUBSvvmL_v: |
| 14067 | case VE::VFSUBSvvm_v: |
| 14068 | case VE::VFSUBSvvml: |
| 14069 | case VE::VFSUBSvvml_v: |
| 14070 | case VE::VMAXSLvvm: |
| 14071 | case VE::VMAXSLvvmL: |
| 14072 | case VE::VMAXSLvvmL_v: |
| 14073 | case VE::VMAXSLvvm_v: |
| 14074 | case VE::VMAXSLvvml: |
| 14075 | case VE::VMAXSLvvml_v: |
| 14076 | case VE::VMAXSWSXvvm: |
| 14077 | case VE::VMAXSWSXvvmL: |
| 14078 | case VE::VMAXSWSXvvmL_v: |
| 14079 | case VE::VMAXSWSXvvm_v: |
| 14080 | case VE::VMAXSWSXvvml: |
| 14081 | case VE::VMAXSWSXvvml_v: |
| 14082 | case VE::VMAXSWZXvvm: |
| 14083 | case VE::VMAXSWZXvvmL: |
| 14084 | case VE::VMAXSWZXvvmL_v: |
| 14085 | case VE::VMAXSWZXvvm_v: |
| 14086 | case VE::VMAXSWZXvvml: |
| 14087 | case VE::VMAXSWZXvvml_v: |
| 14088 | case VE::VMINSLvvm: |
| 14089 | case VE::VMINSLvvmL: |
| 14090 | case VE::VMINSLvvmL_v: |
| 14091 | case VE::VMINSLvvm_v: |
| 14092 | case VE::VMINSLvvml: |
| 14093 | case VE::VMINSLvvml_v: |
| 14094 | case VE::VMINSWSXvvm: |
| 14095 | case VE::VMINSWSXvvmL: |
| 14096 | case VE::VMINSWSXvvmL_v: |
| 14097 | case VE::VMINSWSXvvm_v: |
| 14098 | case VE::VMINSWSXvvml: |
| 14099 | case VE::VMINSWSXvvml_v: |
| 14100 | case VE::VMINSWZXvvm: |
| 14101 | case VE::VMINSWZXvvmL: |
| 14102 | case VE::VMINSWZXvvmL_v: |
| 14103 | case VE::VMINSWZXvvm_v: |
| 14104 | case VE::VMINSWZXvvml: |
| 14105 | case VE::VMINSWZXvvml_v: |
| 14106 | case VE::VMRGWvvm: |
| 14107 | case VE::VMRGWvvmL: |
| 14108 | case VE::VMRGWvvmL_v: |
| 14109 | case VE::VMRGWvvm_v: |
| 14110 | case VE::VMRGWvvml: |
| 14111 | case VE::VMRGWvvml_v: |
| 14112 | case VE::VMRGvvm: |
| 14113 | case VE::VMRGvvmL: |
| 14114 | case VE::VMRGvvmL_v: |
| 14115 | case VE::VMRGvvm_v: |
| 14116 | case VE::VMRGvvml: |
| 14117 | case VE::VMRGvvml_v: |
| 14118 | case VE::VMULSLWvvm: |
| 14119 | case VE::VMULSLWvvmL: |
| 14120 | case VE::VMULSLWvvmL_v: |
| 14121 | case VE::VMULSLWvvm_v: |
| 14122 | case VE::VMULSLWvvml: |
| 14123 | case VE::VMULSLWvvml_v: |
| 14124 | case VE::VMULSLvvm: |
| 14125 | case VE::VMULSLvvmL: |
| 14126 | case VE::VMULSLvvmL_v: |
| 14127 | case VE::VMULSLvvm_v: |
| 14128 | case VE::VMULSLvvml: |
| 14129 | case VE::VMULSLvvml_v: |
| 14130 | case VE::VMULSWSXvvm: |
| 14131 | case VE::VMULSWSXvvmL: |
| 14132 | case VE::VMULSWSXvvmL_v: |
| 14133 | case VE::VMULSWSXvvm_v: |
| 14134 | case VE::VMULSWSXvvml: |
| 14135 | case VE::VMULSWSXvvml_v: |
| 14136 | case VE::VMULSWZXvvm: |
| 14137 | case VE::VMULSWZXvvmL: |
| 14138 | case VE::VMULSWZXvvmL_v: |
| 14139 | case VE::VMULSWZXvvm_v: |
| 14140 | case VE::VMULSWZXvvml: |
| 14141 | case VE::VMULSWZXvvml_v: |
| 14142 | case VE::VMULULvvm: |
| 14143 | case VE::VMULULvvmL: |
| 14144 | case VE::VMULULvvmL_v: |
| 14145 | case VE::VMULULvvm_v: |
| 14146 | case VE::VMULULvvml: |
| 14147 | case VE::VMULULvvml_v: |
| 14148 | case VE::VMULUWvvm: |
| 14149 | case VE::VMULUWvvmL: |
| 14150 | case VE::VMULUWvvmL_v: |
| 14151 | case VE::VMULUWvvm_v: |
| 14152 | case VE::VMULUWvvml: |
| 14153 | case VE::VMULUWvvml_v: |
| 14154 | case VE::VORvvm: |
| 14155 | case VE::VORvvmL: |
| 14156 | case VE::VORvvmL_v: |
| 14157 | case VE::VORvvm_v: |
| 14158 | case VE::VORvvml: |
| 14159 | case VE::VORvvml_v: |
| 14160 | case VE::VSUBSLvvm: |
| 14161 | case VE::VSUBSLvvmL: |
| 14162 | case VE::VSUBSLvvmL_v: |
| 14163 | case VE::VSUBSLvvm_v: |
| 14164 | case VE::VSUBSLvvml: |
| 14165 | case VE::VSUBSLvvml_v: |
| 14166 | case VE::VSUBSWSXvvm: |
| 14167 | case VE::VSUBSWSXvvmL: |
| 14168 | case VE::VSUBSWSXvvmL_v: |
| 14169 | case VE::VSUBSWSXvvm_v: |
| 14170 | case VE::VSUBSWSXvvml: |
| 14171 | case VE::VSUBSWSXvvml_v: |
| 14172 | case VE::VSUBSWZXvvm: |
| 14173 | case VE::VSUBSWZXvvmL: |
| 14174 | case VE::VSUBSWZXvvmL_v: |
| 14175 | case VE::VSUBSWZXvvm_v: |
| 14176 | case VE::VSUBSWZXvvml: |
| 14177 | case VE::VSUBSWZXvvml_v: |
| 14178 | case VE::VSUBULvvm: |
| 14179 | case VE::VSUBULvvmL: |
| 14180 | case VE::VSUBULvvmL_v: |
| 14181 | case VE::VSUBULvvm_v: |
| 14182 | case VE::VSUBULvvml: |
| 14183 | case VE::VSUBULvvml_v: |
| 14184 | case VE::VSUBUWvvm: |
| 14185 | case VE::VSUBUWvvmL: |
| 14186 | case VE::VSUBUWvvmL_v: |
| 14187 | case VE::VSUBUWvvm_v: |
| 14188 | case VE::VSUBUWvvml: |
| 14189 | case VE::VSUBUWvvml_v: |
| 14190 | case VE::VXORvvm: |
| 14191 | case VE::VXORvvmL: |
| 14192 | case VE::VXORvvmL_v: |
| 14193 | case VE::VXORvvm_v: |
| 14194 | case VE::VXORvvml: |
| 14195 | case VE::VXORvvml_v: { |
| 14196 | // op: m |
| 14197 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 14198 | op &= UINT64_C(15); |
| 14199 | op <<= 48; |
| 14200 | Value |= op; |
| 14201 | // op: vx |
| 14202 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 14203 | op &= UINT64_C(255); |
| 14204 | op <<= 24; |
| 14205 | Value |= op; |
| 14206 | // op: vy |
| 14207 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 14208 | op &= UINT64_C(255); |
| 14209 | op <<= 16; |
| 14210 | Value |= op; |
| 14211 | // op: vz |
| 14212 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 14213 | op &= UINT64_C(255); |
| 14214 | op <<= 8; |
| 14215 | Value |= op; |
| 14216 | break; |
| 14217 | } |
| 14218 | case VE::PVSLALOvvm: |
| 14219 | case VE::PVSLALOvvmL: |
| 14220 | case VE::PVSLALOvvmL_v: |
| 14221 | case VE::PVSLALOvvm_v: |
| 14222 | case VE::PVSLALOvvml: |
| 14223 | case VE::PVSLALOvvml_v: |
| 14224 | case VE::PVSLAUPvvm: |
| 14225 | case VE::PVSLAUPvvmL: |
| 14226 | case VE::PVSLAUPvvmL_v: |
| 14227 | case VE::PVSLAUPvvm_v: |
| 14228 | case VE::PVSLAUPvvml: |
| 14229 | case VE::PVSLAUPvvml_v: |
| 14230 | case VE::PVSLAvvm: |
| 14231 | case VE::PVSLAvvmL: |
| 14232 | case VE::PVSLAvvmL_v: |
| 14233 | case VE::PVSLAvvm_v: |
| 14234 | case VE::PVSLAvvml: |
| 14235 | case VE::PVSLAvvml_v: |
| 14236 | case VE::PVSLLLOvvm: |
| 14237 | case VE::PVSLLLOvvmL: |
| 14238 | case VE::PVSLLLOvvmL_v: |
| 14239 | case VE::PVSLLLOvvm_v: |
| 14240 | case VE::PVSLLLOvvml: |
| 14241 | case VE::PVSLLLOvvml_v: |
| 14242 | case VE::PVSLLUPvvm: |
| 14243 | case VE::PVSLLUPvvmL: |
| 14244 | case VE::PVSLLUPvvmL_v: |
| 14245 | case VE::PVSLLUPvvm_v: |
| 14246 | case VE::PVSLLUPvvml: |
| 14247 | case VE::PVSLLUPvvml_v: |
| 14248 | case VE::PVSLLvvm: |
| 14249 | case VE::PVSLLvvmL: |
| 14250 | case VE::PVSLLvvmL_v: |
| 14251 | case VE::PVSLLvvm_v: |
| 14252 | case VE::PVSLLvvml: |
| 14253 | case VE::PVSLLvvml_v: |
| 14254 | case VE::PVSRALOvvm: |
| 14255 | case VE::PVSRALOvvmL: |
| 14256 | case VE::PVSRALOvvmL_v: |
| 14257 | case VE::PVSRALOvvm_v: |
| 14258 | case VE::PVSRALOvvml: |
| 14259 | case VE::PVSRALOvvml_v: |
| 14260 | case VE::PVSRAUPvvm: |
| 14261 | case VE::PVSRAUPvvmL: |
| 14262 | case VE::PVSRAUPvvmL_v: |
| 14263 | case VE::PVSRAUPvvm_v: |
| 14264 | case VE::PVSRAUPvvml: |
| 14265 | case VE::PVSRAUPvvml_v: |
| 14266 | case VE::PVSRAvvm: |
| 14267 | case VE::PVSRAvvmL: |
| 14268 | case VE::PVSRAvvmL_v: |
| 14269 | case VE::PVSRAvvm_v: |
| 14270 | case VE::PVSRAvvml: |
| 14271 | case VE::PVSRAvvml_v: |
| 14272 | case VE::PVSRLLOvvm: |
| 14273 | case VE::PVSRLLOvvmL: |
| 14274 | case VE::PVSRLLOvvmL_v: |
| 14275 | case VE::PVSRLLOvvm_v: |
| 14276 | case VE::PVSRLLOvvml: |
| 14277 | case VE::PVSRLLOvvml_v: |
| 14278 | case VE::PVSRLUPvvm: |
| 14279 | case VE::PVSRLUPvvmL: |
| 14280 | case VE::PVSRLUPvvmL_v: |
| 14281 | case VE::PVSRLUPvvm_v: |
| 14282 | case VE::PVSRLUPvvml: |
| 14283 | case VE::PVSRLUPvvml_v: |
| 14284 | case VE::PVSRLvvm: |
| 14285 | case VE::PVSRLvvmL: |
| 14286 | case VE::PVSRLvvmL_v: |
| 14287 | case VE::PVSRLvvm_v: |
| 14288 | case VE::PVSRLvvml: |
| 14289 | case VE::PVSRLvvml_v: |
| 14290 | case VE::VSLALvvm: |
| 14291 | case VE::VSLALvvmL: |
| 14292 | case VE::VSLALvvmL_v: |
| 14293 | case VE::VSLALvvm_v: |
| 14294 | case VE::VSLALvvml: |
| 14295 | case VE::VSLALvvml_v: |
| 14296 | case VE::VSLAWSXvvm: |
| 14297 | case VE::VSLAWSXvvmL: |
| 14298 | case VE::VSLAWSXvvmL_v: |
| 14299 | case VE::VSLAWSXvvm_v: |
| 14300 | case VE::VSLAWSXvvml: |
| 14301 | case VE::VSLAWSXvvml_v: |
| 14302 | case VE::VSLAWZXvvm: |
| 14303 | case VE::VSLAWZXvvmL: |
| 14304 | case VE::VSLAWZXvvmL_v: |
| 14305 | case VE::VSLAWZXvvm_v: |
| 14306 | case VE::VSLAWZXvvml: |
| 14307 | case VE::VSLAWZXvvml_v: |
| 14308 | case VE::VSLLvvm: |
| 14309 | case VE::VSLLvvmL: |
| 14310 | case VE::VSLLvvmL_v: |
| 14311 | case VE::VSLLvvm_v: |
| 14312 | case VE::VSLLvvml: |
| 14313 | case VE::VSLLvvml_v: |
| 14314 | case VE::VSRALvvm: |
| 14315 | case VE::VSRALvvmL: |
| 14316 | case VE::VSRALvvmL_v: |
| 14317 | case VE::VSRALvvm_v: |
| 14318 | case VE::VSRALvvml: |
| 14319 | case VE::VSRALvvml_v: |
| 14320 | case VE::VSRAWSXvvm: |
| 14321 | case VE::VSRAWSXvvmL: |
| 14322 | case VE::VSRAWSXvvmL_v: |
| 14323 | case VE::VSRAWSXvvm_v: |
| 14324 | case VE::VSRAWSXvvml: |
| 14325 | case VE::VSRAWSXvvml_v: |
| 14326 | case VE::VSRAWZXvvm: |
| 14327 | case VE::VSRAWZXvvmL: |
| 14328 | case VE::VSRAWZXvvmL_v: |
| 14329 | case VE::VSRAWZXvvm_v: |
| 14330 | case VE::VSRAWZXvvml: |
| 14331 | case VE::VSRAWZXvvml_v: |
| 14332 | case VE::VSRLvvm: |
| 14333 | case VE::VSRLvvmL: |
| 14334 | case VE::VSRLvvmL_v: |
| 14335 | case VE::VSRLvvm_v: |
| 14336 | case VE::VSRLvvml: |
| 14337 | case VE::VSRLvvml_v: { |
| 14338 | // op: m |
| 14339 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 14340 | op &= UINT64_C(15); |
| 14341 | op <<= 48; |
| 14342 | Value |= op; |
| 14343 | // op: vx |
| 14344 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 14345 | op &= UINT64_C(255); |
| 14346 | op <<= 24; |
| 14347 | Value |= op; |
| 14348 | // op: vy |
| 14349 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 14350 | op &= UINT64_C(255); |
| 14351 | op <<= 16; |
| 14352 | Value |= op; |
| 14353 | // op: vz |
| 14354 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 14355 | op &= UINT64_C(255); |
| 14356 | op <<= 8; |
| 14357 | Value |= op; |
| 14358 | break; |
| 14359 | } |
| 14360 | case VE::PVCVTWSLOvm: |
| 14361 | case VE::PVCVTWSLOvmL: |
| 14362 | case VE::PVCVTWSLOvmL_v: |
| 14363 | case VE::PVCVTWSLOvm_v: |
| 14364 | case VE::PVCVTWSLOvml: |
| 14365 | case VE::PVCVTWSLOvml_v: |
| 14366 | case VE::PVCVTWSUPvm: |
| 14367 | case VE::PVCVTWSUPvmL: |
| 14368 | case VE::PVCVTWSUPvmL_v: |
| 14369 | case VE::PVCVTWSUPvm_v: |
| 14370 | case VE::PVCVTWSUPvml: |
| 14371 | case VE::PVCVTWSUPvml_v: |
| 14372 | case VE::PVCVTWSvm: |
| 14373 | case VE::PVCVTWSvmL: |
| 14374 | case VE::PVCVTWSvmL_v: |
| 14375 | case VE::PVCVTWSvm_v: |
| 14376 | case VE::PVCVTWSvml: |
| 14377 | case VE::PVCVTWSvml_v: |
| 14378 | case VE::VCVTLDvm: |
| 14379 | case VE::VCVTLDvmL: |
| 14380 | case VE::VCVTLDvmL_v: |
| 14381 | case VE::VCVTLDvm_v: |
| 14382 | case VE::VCVTLDvml: |
| 14383 | case VE::VCVTLDvml_v: |
| 14384 | case VE::VCVTWDSXvm: |
| 14385 | case VE::VCVTWDSXvmL: |
| 14386 | case VE::VCVTWDSXvmL_v: |
| 14387 | case VE::VCVTWDSXvm_v: |
| 14388 | case VE::VCVTWDSXvml: |
| 14389 | case VE::VCVTWDSXvml_v: |
| 14390 | case VE::VCVTWDZXvm: |
| 14391 | case VE::VCVTWDZXvmL: |
| 14392 | case VE::VCVTWDZXvmL_v: |
| 14393 | case VE::VCVTWDZXvm_v: |
| 14394 | case VE::VCVTWDZXvml: |
| 14395 | case VE::VCVTWDZXvml_v: |
| 14396 | case VE::VCVTWSSXvm: |
| 14397 | case VE::VCVTWSSXvmL: |
| 14398 | case VE::VCVTWSSXvmL_v: |
| 14399 | case VE::VCVTWSSXvm_v: |
| 14400 | case VE::VCVTWSSXvml: |
| 14401 | case VE::VCVTWSSXvml_v: |
| 14402 | case VE::VCVTWSZXvm: |
| 14403 | case VE::VCVTWSZXvmL: |
| 14404 | case VE::VCVTWSZXvmL_v: |
| 14405 | case VE::VCVTWSZXvm_v: |
| 14406 | case VE::VCVTWSZXvml: |
| 14407 | case VE::VCVTWSZXvml_v: { |
| 14408 | // op: m |
| 14409 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 14410 | op &= UINT64_C(15); |
| 14411 | op <<= 48; |
| 14412 | Value |= op; |
| 14413 | // op: vx |
| 14414 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 14415 | op &= UINT64_C(255); |
| 14416 | op <<= 24; |
| 14417 | Value |= op; |
| 14418 | // op: vy |
| 14419 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 14420 | op &= UINT64_C(255); |
| 14421 | op <<= 16; |
| 14422 | Value |= op; |
| 14423 | // op: vz |
| 14424 | op = getRDOpValue(MI, OpNo: 1, Fixups, STI); |
| 14425 | op &= UINT64_C(255); |
| 14426 | op <<= 8; |
| 14427 | Value |= op; |
| 14428 | break; |
| 14429 | } |
| 14430 | case VE::VSCLNCOTsirvm: |
| 14431 | case VE::VSCLNCOTsirvmL: |
| 14432 | case VE::VSCLNCOTsirvml: |
| 14433 | case VE::VSCLNCOTsizvm: |
| 14434 | case VE::VSCLNCOTsizvmL: |
| 14435 | case VE::VSCLNCOTsizvml: |
| 14436 | case VE::VSCLNCOTsrrvm: |
| 14437 | case VE::VSCLNCOTsrrvmL: |
| 14438 | case VE::VSCLNCOTsrrvml: |
| 14439 | case VE::VSCLNCOTsrzvm: |
| 14440 | case VE::VSCLNCOTsrzvmL: |
| 14441 | case VE::VSCLNCOTsrzvml: |
| 14442 | case VE::VSCLNCsirvm: |
| 14443 | case VE::VSCLNCsirvmL: |
| 14444 | case VE::VSCLNCsirvml: |
| 14445 | case VE::VSCLNCsizvm: |
| 14446 | case VE::VSCLNCsizvmL: |
| 14447 | case VE::VSCLNCsizvml: |
| 14448 | case VE::VSCLNCsrrvm: |
| 14449 | case VE::VSCLNCsrrvmL: |
| 14450 | case VE::VSCLNCsrrvml: |
| 14451 | case VE::VSCLNCsrzvm: |
| 14452 | case VE::VSCLNCsrzvmL: |
| 14453 | case VE::VSCLNCsrzvml: |
| 14454 | case VE::VSCLOTsirvm: |
| 14455 | case VE::VSCLOTsirvmL: |
| 14456 | case VE::VSCLOTsirvml: |
| 14457 | case VE::VSCLOTsizvm: |
| 14458 | case VE::VSCLOTsizvmL: |
| 14459 | case VE::VSCLOTsizvml: |
| 14460 | case VE::VSCLOTsrrvm: |
| 14461 | case VE::VSCLOTsrrvmL: |
| 14462 | case VE::VSCLOTsrrvml: |
| 14463 | case VE::VSCLOTsrzvm: |
| 14464 | case VE::VSCLOTsrzvmL: |
| 14465 | case VE::VSCLOTsrzvml: |
| 14466 | case VE::VSCLsirvm: |
| 14467 | case VE::VSCLsirvmL: |
| 14468 | case VE::VSCLsirvml: |
| 14469 | case VE::VSCLsizvm: |
| 14470 | case VE::VSCLsizvmL: |
| 14471 | case VE::VSCLsizvml: |
| 14472 | case VE::VSCLsrrvm: |
| 14473 | case VE::VSCLsrrvmL: |
| 14474 | case VE::VSCLsrrvml: |
| 14475 | case VE::VSCLsrzvm: |
| 14476 | case VE::VSCLsrzvmL: |
| 14477 | case VE::VSCLsrzvml: |
| 14478 | case VE::VSCNCOTsirvm: |
| 14479 | case VE::VSCNCOTsirvmL: |
| 14480 | case VE::VSCNCOTsirvml: |
| 14481 | case VE::VSCNCOTsizvm: |
| 14482 | case VE::VSCNCOTsizvmL: |
| 14483 | case VE::VSCNCOTsizvml: |
| 14484 | case VE::VSCNCOTsrrvm: |
| 14485 | case VE::VSCNCOTsrrvmL: |
| 14486 | case VE::VSCNCOTsrrvml: |
| 14487 | case VE::VSCNCOTsrzvm: |
| 14488 | case VE::VSCNCOTsrzvmL: |
| 14489 | case VE::VSCNCOTsrzvml: |
| 14490 | case VE::VSCNCsirvm: |
| 14491 | case VE::VSCNCsirvmL: |
| 14492 | case VE::VSCNCsirvml: |
| 14493 | case VE::VSCNCsizvm: |
| 14494 | case VE::VSCNCsizvmL: |
| 14495 | case VE::VSCNCsizvml: |
| 14496 | case VE::VSCNCsrrvm: |
| 14497 | case VE::VSCNCsrrvmL: |
| 14498 | case VE::VSCNCsrrvml: |
| 14499 | case VE::VSCNCsrzvm: |
| 14500 | case VE::VSCNCsrzvmL: |
| 14501 | case VE::VSCNCsrzvml: |
| 14502 | case VE::VSCOTsirvm: |
| 14503 | case VE::VSCOTsirvmL: |
| 14504 | case VE::VSCOTsirvml: |
| 14505 | case VE::VSCOTsizvm: |
| 14506 | case VE::VSCOTsizvmL: |
| 14507 | case VE::VSCOTsizvml: |
| 14508 | case VE::VSCOTsrrvm: |
| 14509 | case VE::VSCOTsrrvmL: |
| 14510 | case VE::VSCOTsrrvml: |
| 14511 | case VE::VSCOTsrzvm: |
| 14512 | case VE::VSCOTsrzvmL: |
| 14513 | case VE::VSCOTsrzvml: |
| 14514 | case VE::VSCUNCOTsirvm: |
| 14515 | case VE::VSCUNCOTsirvmL: |
| 14516 | case VE::VSCUNCOTsirvml: |
| 14517 | case VE::VSCUNCOTsizvm: |
| 14518 | case VE::VSCUNCOTsizvmL: |
| 14519 | case VE::VSCUNCOTsizvml: |
| 14520 | case VE::VSCUNCOTsrrvm: |
| 14521 | case VE::VSCUNCOTsrrvmL: |
| 14522 | case VE::VSCUNCOTsrrvml: |
| 14523 | case VE::VSCUNCOTsrzvm: |
| 14524 | case VE::VSCUNCOTsrzvmL: |
| 14525 | case VE::VSCUNCOTsrzvml: |
| 14526 | case VE::VSCUNCsirvm: |
| 14527 | case VE::VSCUNCsirvmL: |
| 14528 | case VE::VSCUNCsirvml: |
| 14529 | case VE::VSCUNCsizvm: |
| 14530 | case VE::VSCUNCsizvmL: |
| 14531 | case VE::VSCUNCsizvml: |
| 14532 | case VE::VSCUNCsrrvm: |
| 14533 | case VE::VSCUNCsrrvmL: |
| 14534 | case VE::VSCUNCsrrvml: |
| 14535 | case VE::VSCUNCsrzvm: |
| 14536 | case VE::VSCUNCsrzvmL: |
| 14537 | case VE::VSCUNCsrzvml: |
| 14538 | case VE::VSCUOTsirvm: |
| 14539 | case VE::VSCUOTsirvmL: |
| 14540 | case VE::VSCUOTsirvml: |
| 14541 | case VE::VSCUOTsizvm: |
| 14542 | case VE::VSCUOTsizvmL: |
| 14543 | case VE::VSCUOTsizvml: |
| 14544 | case VE::VSCUOTsrrvm: |
| 14545 | case VE::VSCUOTsrrvmL: |
| 14546 | case VE::VSCUOTsrrvml: |
| 14547 | case VE::VSCUOTsrzvm: |
| 14548 | case VE::VSCUOTsrzvmL: |
| 14549 | case VE::VSCUOTsrzvml: |
| 14550 | case VE::VSCUsirvm: |
| 14551 | case VE::VSCUsirvmL: |
| 14552 | case VE::VSCUsirvml: |
| 14553 | case VE::VSCUsizvm: |
| 14554 | case VE::VSCUsizvmL: |
| 14555 | case VE::VSCUsizvml: |
| 14556 | case VE::VSCUsrrvm: |
| 14557 | case VE::VSCUsrrvmL: |
| 14558 | case VE::VSCUsrrvml: |
| 14559 | case VE::VSCUsrzvm: |
| 14560 | case VE::VSCUsrzvmL: |
| 14561 | case VE::VSCUsrzvml: |
| 14562 | case VE::VSCsirvm: |
| 14563 | case VE::VSCsirvmL: |
| 14564 | case VE::VSCsirvml: |
| 14565 | case VE::VSCsizvm: |
| 14566 | case VE::VSCsizvmL: |
| 14567 | case VE::VSCsizvml: |
| 14568 | case VE::VSCsrrvm: |
| 14569 | case VE::VSCsrrvmL: |
| 14570 | case VE::VSCsrrvml: |
| 14571 | case VE::VSCsrzvm: |
| 14572 | case VE::VSCsrzvmL: |
| 14573 | case VE::VSCsrzvml: { |
| 14574 | // op: m |
| 14575 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 14576 | op &= UINT64_C(15); |
| 14577 | op <<= 48; |
| 14578 | Value |= op; |
| 14579 | // op: sy |
| 14580 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 14581 | op &= UINT64_C(127); |
| 14582 | op <<= 40; |
| 14583 | Value |= op; |
| 14584 | // op: sz |
| 14585 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 14586 | op &= UINT64_C(127); |
| 14587 | op <<= 32; |
| 14588 | Value |= op; |
| 14589 | // op: vx |
| 14590 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 14591 | op &= UINT64_C(255); |
| 14592 | op <<= 24; |
| 14593 | Value |= op; |
| 14594 | // op: sw |
| 14595 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 14596 | op &= UINT64_C(127); |
| 14597 | Value |= op; |
| 14598 | break; |
| 14599 | } |
| 14600 | case VE::VSCLNCOTvirvm: |
| 14601 | case VE::VSCLNCOTvirvmL: |
| 14602 | case VE::VSCLNCOTvirvml: |
| 14603 | case VE::VSCLNCOTvizvm: |
| 14604 | case VE::VSCLNCOTvizvmL: |
| 14605 | case VE::VSCLNCOTvizvml: |
| 14606 | case VE::VSCLNCOTvrrvm: |
| 14607 | case VE::VSCLNCOTvrrvmL: |
| 14608 | case VE::VSCLNCOTvrrvml: |
| 14609 | case VE::VSCLNCOTvrzvm: |
| 14610 | case VE::VSCLNCOTvrzvmL: |
| 14611 | case VE::VSCLNCOTvrzvml: |
| 14612 | case VE::VSCLNCvirvm: |
| 14613 | case VE::VSCLNCvirvmL: |
| 14614 | case VE::VSCLNCvirvml: |
| 14615 | case VE::VSCLNCvizvm: |
| 14616 | case VE::VSCLNCvizvmL: |
| 14617 | case VE::VSCLNCvizvml: |
| 14618 | case VE::VSCLNCvrrvm: |
| 14619 | case VE::VSCLNCvrrvmL: |
| 14620 | case VE::VSCLNCvrrvml: |
| 14621 | case VE::VSCLNCvrzvm: |
| 14622 | case VE::VSCLNCvrzvmL: |
| 14623 | case VE::VSCLNCvrzvml: |
| 14624 | case VE::VSCLOTvirvm: |
| 14625 | case VE::VSCLOTvirvmL: |
| 14626 | case VE::VSCLOTvirvml: |
| 14627 | case VE::VSCLOTvizvm: |
| 14628 | case VE::VSCLOTvizvmL: |
| 14629 | case VE::VSCLOTvizvml: |
| 14630 | case VE::VSCLOTvrrvm: |
| 14631 | case VE::VSCLOTvrrvmL: |
| 14632 | case VE::VSCLOTvrrvml: |
| 14633 | case VE::VSCLOTvrzvm: |
| 14634 | case VE::VSCLOTvrzvmL: |
| 14635 | case VE::VSCLOTvrzvml: |
| 14636 | case VE::VSCLvirvm: |
| 14637 | case VE::VSCLvirvmL: |
| 14638 | case VE::VSCLvirvml: |
| 14639 | case VE::VSCLvizvm: |
| 14640 | case VE::VSCLvizvmL: |
| 14641 | case VE::VSCLvizvml: |
| 14642 | case VE::VSCLvrrvm: |
| 14643 | case VE::VSCLvrrvmL: |
| 14644 | case VE::VSCLvrrvml: |
| 14645 | case VE::VSCLvrzvm: |
| 14646 | case VE::VSCLvrzvmL: |
| 14647 | case VE::VSCLvrzvml: |
| 14648 | case VE::VSCNCOTvirvm: |
| 14649 | case VE::VSCNCOTvirvmL: |
| 14650 | case VE::VSCNCOTvirvml: |
| 14651 | case VE::VSCNCOTvizvm: |
| 14652 | case VE::VSCNCOTvizvmL: |
| 14653 | case VE::VSCNCOTvizvml: |
| 14654 | case VE::VSCNCOTvrrvm: |
| 14655 | case VE::VSCNCOTvrrvmL: |
| 14656 | case VE::VSCNCOTvrrvml: |
| 14657 | case VE::VSCNCOTvrzvm: |
| 14658 | case VE::VSCNCOTvrzvmL: |
| 14659 | case VE::VSCNCOTvrzvml: |
| 14660 | case VE::VSCNCvirvm: |
| 14661 | case VE::VSCNCvirvmL: |
| 14662 | case VE::VSCNCvirvml: |
| 14663 | case VE::VSCNCvizvm: |
| 14664 | case VE::VSCNCvizvmL: |
| 14665 | case VE::VSCNCvizvml: |
| 14666 | case VE::VSCNCvrrvm: |
| 14667 | case VE::VSCNCvrrvmL: |
| 14668 | case VE::VSCNCvrrvml: |
| 14669 | case VE::VSCNCvrzvm: |
| 14670 | case VE::VSCNCvrzvmL: |
| 14671 | case VE::VSCNCvrzvml: |
| 14672 | case VE::VSCOTvirvm: |
| 14673 | case VE::VSCOTvirvmL: |
| 14674 | case VE::VSCOTvirvml: |
| 14675 | case VE::VSCOTvizvm: |
| 14676 | case VE::VSCOTvizvmL: |
| 14677 | case VE::VSCOTvizvml: |
| 14678 | case VE::VSCOTvrrvm: |
| 14679 | case VE::VSCOTvrrvmL: |
| 14680 | case VE::VSCOTvrrvml: |
| 14681 | case VE::VSCOTvrzvm: |
| 14682 | case VE::VSCOTvrzvmL: |
| 14683 | case VE::VSCOTvrzvml: |
| 14684 | case VE::VSCUNCOTvirvm: |
| 14685 | case VE::VSCUNCOTvirvmL: |
| 14686 | case VE::VSCUNCOTvirvml: |
| 14687 | case VE::VSCUNCOTvizvm: |
| 14688 | case VE::VSCUNCOTvizvmL: |
| 14689 | case VE::VSCUNCOTvizvml: |
| 14690 | case VE::VSCUNCOTvrrvm: |
| 14691 | case VE::VSCUNCOTvrrvmL: |
| 14692 | case VE::VSCUNCOTvrrvml: |
| 14693 | case VE::VSCUNCOTvrzvm: |
| 14694 | case VE::VSCUNCOTvrzvmL: |
| 14695 | case VE::VSCUNCOTvrzvml: |
| 14696 | case VE::VSCUNCvirvm: |
| 14697 | case VE::VSCUNCvirvmL: |
| 14698 | case VE::VSCUNCvirvml: |
| 14699 | case VE::VSCUNCvizvm: |
| 14700 | case VE::VSCUNCvizvmL: |
| 14701 | case VE::VSCUNCvizvml: |
| 14702 | case VE::VSCUNCvrrvm: |
| 14703 | case VE::VSCUNCvrrvmL: |
| 14704 | case VE::VSCUNCvrrvml: |
| 14705 | case VE::VSCUNCvrzvm: |
| 14706 | case VE::VSCUNCvrzvmL: |
| 14707 | case VE::VSCUNCvrzvml: |
| 14708 | case VE::VSCUOTvirvm: |
| 14709 | case VE::VSCUOTvirvmL: |
| 14710 | case VE::VSCUOTvirvml: |
| 14711 | case VE::VSCUOTvizvm: |
| 14712 | case VE::VSCUOTvizvmL: |
| 14713 | case VE::VSCUOTvizvml: |
| 14714 | case VE::VSCUOTvrrvm: |
| 14715 | case VE::VSCUOTvrrvmL: |
| 14716 | case VE::VSCUOTvrrvml: |
| 14717 | case VE::VSCUOTvrzvm: |
| 14718 | case VE::VSCUOTvrzvmL: |
| 14719 | case VE::VSCUOTvrzvml: |
| 14720 | case VE::VSCUvirvm: |
| 14721 | case VE::VSCUvirvmL: |
| 14722 | case VE::VSCUvirvml: |
| 14723 | case VE::VSCUvizvm: |
| 14724 | case VE::VSCUvizvmL: |
| 14725 | case VE::VSCUvizvml: |
| 14726 | case VE::VSCUvrrvm: |
| 14727 | case VE::VSCUvrrvmL: |
| 14728 | case VE::VSCUvrrvml: |
| 14729 | case VE::VSCUvrzvm: |
| 14730 | case VE::VSCUvrzvmL: |
| 14731 | case VE::VSCUvrzvml: |
| 14732 | case VE::VSCvirvm: |
| 14733 | case VE::VSCvirvmL: |
| 14734 | case VE::VSCvirvml: |
| 14735 | case VE::VSCvizvm: |
| 14736 | case VE::VSCvizvmL: |
| 14737 | case VE::VSCvizvml: |
| 14738 | case VE::VSCvrrvm: |
| 14739 | case VE::VSCvrrvmL: |
| 14740 | case VE::VSCvrrvml: |
| 14741 | case VE::VSCvrzvm: |
| 14742 | case VE::VSCvrzvmL: |
| 14743 | case VE::VSCvrzvml: { |
| 14744 | // op: m |
| 14745 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 14746 | op &= UINT64_C(15); |
| 14747 | op <<= 48; |
| 14748 | Value |= op; |
| 14749 | // op: sy |
| 14750 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 14751 | op &= UINT64_C(127); |
| 14752 | op <<= 40; |
| 14753 | Value |= op; |
| 14754 | // op: sz |
| 14755 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 14756 | op &= UINT64_C(127); |
| 14757 | op <<= 32; |
| 14758 | Value |= op; |
| 14759 | // op: vx |
| 14760 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 14761 | op &= UINT64_C(255); |
| 14762 | op <<= 24; |
| 14763 | Value |= op; |
| 14764 | // op: vy |
| 14765 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 14766 | op &= UINT64_C(255); |
| 14767 | op <<= 16; |
| 14768 | Value |= op; |
| 14769 | break; |
| 14770 | } |
| 14771 | case VE::PVFMADLOivvm: |
| 14772 | case VE::PVFMADLOivvmL: |
| 14773 | case VE::PVFMADLOivvmL_v: |
| 14774 | case VE::PVFMADLOivvm_v: |
| 14775 | case VE::PVFMADLOivvml: |
| 14776 | case VE::PVFMADLOivvml_v: |
| 14777 | case VE::PVFMADLOrvvm: |
| 14778 | case VE::PVFMADLOrvvmL: |
| 14779 | case VE::PVFMADLOrvvmL_v: |
| 14780 | case VE::PVFMADLOrvvm_v: |
| 14781 | case VE::PVFMADLOrvvml: |
| 14782 | case VE::PVFMADLOrvvml_v: |
| 14783 | case VE::PVFMADUPivvm: |
| 14784 | case VE::PVFMADUPivvmL: |
| 14785 | case VE::PVFMADUPivvmL_v: |
| 14786 | case VE::PVFMADUPivvm_v: |
| 14787 | case VE::PVFMADUPivvml: |
| 14788 | case VE::PVFMADUPivvml_v: |
| 14789 | case VE::PVFMADUPrvvm: |
| 14790 | case VE::PVFMADUPrvvmL: |
| 14791 | case VE::PVFMADUPrvvmL_v: |
| 14792 | case VE::PVFMADUPrvvm_v: |
| 14793 | case VE::PVFMADUPrvvml: |
| 14794 | case VE::PVFMADUPrvvml_v: |
| 14795 | case VE::PVFMADivvm: |
| 14796 | case VE::PVFMADivvmL: |
| 14797 | case VE::PVFMADivvmL_v: |
| 14798 | case VE::PVFMADivvm_v: |
| 14799 | case VE::PVFMADivvml: |
| 14800 | case VE::PVFMADivvml_v: |
| 14801 | case VE::PVFMADrvvm: |
| 14802 | case VE::PVFMADrvvmL: |
| 14803 | case VE::PVFMADrvvmL_v: |
| 14804 | case VE::PVFMADrvvm_v: |
| 14805 | case VE::PVFMADrvvml: |
| 14806 | case VE::PVFMADrvvml_v: |
| 14807 | case VE::PVFMSBLOivvm: |
| 14808 | case VE::PVFMSBLOivvmL: |
| 14809 | case VE::PVFMSBLOivvmL_v: |
| 14810 | case VE::PVFMSBLOivvm_v: |
| 14811 | case VE::PVFMSBLOivvml: |
| 14812 | case VE::PVFMSBLOivvml_v: |
| 14813 | case VE::PVFMSBLOrvvm: |
| 14814 | case VE::PVFMSBLOrvvmL: |
| 14815 | case VE::PVFMSBLOrvvmL_v: |
| 14816 | case VE::PVFMSBLOrvvm_v: |
| 14817 | case VE::PVFMSBLOrvvml: |
| 14818 | case VE::PVFMSBLOrvvml_v: |
| 14819 | case VE::PVFMSBUPivvm: |
| 14820 | case VE::PVFMSBUPivvmL: |
| 14821 | case VE::PVFMSBUPivvmL_v: |
| 14822 | case VE::PVFMSBUPivvm_v: |
| 14823 | case VE::PVFMSBUPivvml: |
| 14824 | case VE::PVFMSBUPivvml_v: |
| 14825 | case VE::PVFMSBUPrvvm: |
| 14826 | case VE::PVFMSBUPrvvmL: |
| 14827 | case VE::PVFMSBUPrvvmL_v: |
| 14828 | case VE::PVFMSBUPrvvm_v: |
| 14829 | case VE::PVFMSBUPrvvml: |
| 14830 | case VE::PVFMSBUPrvvml_v: |
| 14831 | case VE::PVFMSBivvm: |
| 14832 | case VE::PVFMSBivvmL: |
| 14833 | case VE::PVFMSBivvmL_v: |
| 14834 | case VE::PVFMSBivvm_v: |
| 14835 | case VE::PVFMSBivvml: |
| 14836 | case VE::PVFMSBivvml_v: |
| 14837 | case VE::PVFMSBrvvm: |
| 14838 | case VE::PVFMSBrvvmL: |
| 14839 | case VE::PVFMSBrvvmL_v: |
| 14840 | case VE::PVFMSBrvvm_v: |
| 14841 | case VE::PVFMSBrvvml: |
| 14842 | case VE::PVFMSBrvvml_v: |
| 14843 | case VE::PVFNMADLOivvm: |
| 14844 | case VE::PVFNMADLOivvmL: |
| 14845 | case VE::PVFNMADLOivvmL_v: |
| 14846 | case VE::PVFNMADLOivvm_v: |
| 14847 | case VE::PVFNMADLOivvml: |
| 14848 | case VE::PVFNMADLOivvml_v: |
| 14849 | case VE::PVFNMADLOrvvm: |
| 14850 | case VE::PVFNMADLOrvvmL: |
| 14851 | case VE::PVFNMADLOrvvmL_v: |
| 14852 | case VE::PVFNMADLOrvvm_v: |
| 14853 | case VE::PVFNMADLOrvvml: |
| 14854 | case VE::PVFNMADLOrvvml_v: |
| 14855 | case VE::PVFNMADUPivvm: |
| 14856 | case VE::PVFNMADUPivvmL: |
| 14857 | case VE::PVFNMADUPivvmL_v: |
| 14858 | case VE::PVFNMADUPivvm_v: |
| 14859 | case VE::PVFNMADUPivvml: |
| 14860 | case VE::PVFNMADUPivvml_v: |
| 14861 | case VE::PVFNMADUPrvvm: |
| 14862 | case VE::PVFNMADUPrvvmL: |
| 14863 | case VE::PVFNMADUPrvvmL_v: |
| 14864 | case VE::PVFNMADUPrvvm_v: |
| 14865 | case VE::PVFNMADUPrvvml: |
| 14866 | case VE::PVFNMADUPrvvml_v: |
| 14867 | case VE::PVFNMADivvm: |
| 14868 | case VE::PVFNMADivvmL: |
| 14869 | case VE::PVFNMADivvmL_v: |
| 14870 | case VE::PVFNMADivvm_v: |
| 14871 | case VE::PVFNMADivvml: |
| 14872 | case VE::PVFNMADivvml_v: |
| 14873 | case VE::PVFNMADrvvm: |
| 14874 | case VE::PVFNMADrvvmL: |
| 14875 | case VE::PVFNMADrvvmL_v: |
| 14876 | case VE::PVFNMADrvvm_v: |
| 14877 | case VE::PVFNMADrvvml: |
| 14878 | case VE::PVFNMADrvvml_v: |
| 14879 | case VE::PVFNMSBLOivvm: |
| 14880 | case VE::PVFNMSBLOivvmL: |
| 14881 | case VE::PVFNMSBLOivvmL_v: |
| 14882 | case VE::PVFNMSBLOivvm_v: |
| 14883 | case VE::PVFNMSBLOivvml: |
| 14884 | case VE::PVFNMSBLOivvml_v: |
| 14885 | case VE::PVFNMSBLOrvvm: |
| 14886 | case VE::PVFNMSBLOrvvmL: |
| 14887 | case VE::PVFNMSBLOrvvmL_v: |
| 14888 | case VE::PVFNMSBLOrvvm_v: |
| 14889 | case VE::PVFNMSBLOrvvml: |
| 14890 | case VE::PVFNMSBLOrvvml_v: |
| 14891 | case VE::PVFNMSBUPivvm: |
| 14892 | case VE::PVFNMSBUPivvmL: |
| 14893 | case VE::PVFNMSBUPivvmL_v: |
| 14894 | case VE::PVFNMSBUPivvm_v: |
| 14895 | case VE::PVFNMSBUPivvml: |
| 14896 | case VE::PVFNMSBUPivvml_v: |
| 14897 | case VE::PVFNMSBUPrvvm: |
| 14898 | case VE::PVFNMSBUPrvvmL: |
| 14899 | case VE::PVFNMSBUPrvvmL_v: |
| 14900 | case VE::PVFNMSBUPrvvm_v: |
| 14901 | case VE::PVFNMSBUPrvvml: |
| 14902 | case VE::PVFNMSBUPrvvml_v: |
| 14903 | case VE::PVFNMSBivvm: |
| 14904 | case VE::PVFNMSBivvmL: |
| 14905 | case VE::PVFNMSBivvmL_v: |
| 14906 | case VE::PVFNMSBivvm_v: |
| 14907 | case VE::PVFNMSBivvml: |
| 14908 | case VE::PVFNMSBivvml_v: |
| 14909 | case VE::PVFNMSBrvvm: |
| 14910 | case VE::PVFNMSBrvvmL: |
| 14911 | case VE::PVFNMSBrvvmL_v: |
| 14912 | case VE::PVFNMSBrvvm_v: |
| 14913 | case VE::PVFNMSBrvvml: |
| 14914 | case VE::PVFNMSBrvvml_v: |
| 14915 | case VE::VFMADDivvm: |
| 14916 | case VE::VFMADDivvmL: |
| 14917 | case VE::VFMADDivvmL_v: |
| 14918 | case VE::VFMADDivvm_v: |
| 14919 | case VE::VFMADDivvml: |
| 14920 | case VE::VFMADDivvml_v: |
| 14921 | case VE::VFMADDrvvm: |
| 14922 | case VE::VFMADDrvvmL: |
| 14923 | case VE::VFMADDrvvmL_v: |
| 14924 | case VE::VFMADDrvvm_v: |
| 14925 | case VE::VFMADDrvvml: |
| 14926 | case VE::VFMADDrvvml_v: |
| 14927 | case VE::VFMADSivvm: |
| 14928 | case VE::VFMADSivvmL: |
| 14929 | case VE::VFMADSivvmL_v: |
| 14930 | case VE::VFMADSivvm_v: |
| 14931 | case VE::VFMADSivvml: |
| 14932 | case VE::VFMADSivvml_v: |
| 14933 | case VE::VFMADSrvvm: |
| 14934 | case VE::VFMADSrvvmL: |
| 14935 | case VE::VFMADSrvvmL_v: |
| 14936 | case VE::VFMADSrvvm_v: |
| 14937 | case VE::VFMADSrvvml: |
| 14938 | case VE::VFMADSrvvml_v: |
| 14939 | case VE::VFMSBDivvm: |
| 14940 | case VE::VFMSBDivvmL: |
| 14941 | case VE::VFMSBDivvmL_v: |
| 14942 | case VE::VFMSBDivvm_v: |
| 14943 | case VE::VFMSBDivvml: |
| 14944 | case VE::VFMSBDivvml_v: |
| 14945 | case VE::VFMSBDrvvm: |
| 14946 | case VE::VFMSBDrvvmL: |
| 14947 | case VE::VFMSBDrvvmL_v: |
| 14948 | case VE::VFMSBDrvvm_v: |
| 14949 | case VE::VFMSBDrvvml: |
| 14950 | case VE::VFMSBDrvvml_v: |
| 14951 | case VE::VFMSBSivvm: |
| 14952 | case VE::VFMSBSivvmL: |
| 14953 | case VE::VFMSBSivvmL_v: |
| 14954 | case VE::VFMSBSivvm_v: |
| 14955 | case VE::VFMSBSivvml: |
| 14956 | case VE::VFMSBSivvml_v: |
| 14957 | case VE::VFMSBSrvvm: |
| 14958 | case VE::VFMSBSrvvmL: |
| 14959 | case VE::VFMSBSrvvmL_v: |
| 14960 | case VE::VFMSBSrvvm_v: |
| 14961 | case VE::VFMSBSrvvml: |
| 14962 | case VE::VFMSBSrvvml_v: |
| 14963 | case VE::VFNMADDivvm: |
| 14964 | case VE::VFNMADDivvmL: |
| 14965 | case VE::VFNMADDivvmL_v: |
| 14966 | case VE::VFNMADDivvm_v: |
| 14967 | case VE::VFNMADDivvml: |
| 14968 | case VE::VFNMADDivvml_v: |
| 14969 | case VE::VFNMADDrvvm: |
| 14970 | case VE::VFNMADDrvvmL: |
| 14971 | case VE::VFNMADDrvvmL_v: |
| 14972 | case VE::VFNMADDrvvm_v: |
| 14973 | case VE::VFNMADDrvvml: |
| 14974 | case VE::VFNMADDrvvml_v: |
| 14975 | case VE::VFNMADSivvm: |
| 14976 | case VE::VFNMADSivvmL: |
| 14977 | case VE::VFNMADSivvmL_v: |
| 14978 | case VE::VFNMADSivvm_v: |
| 14979 | case VE::VFNMADSivvml: |
| 14980 | case VE::VFNMADSivvml_v: |
| 14981 | case VE::VFNMADSrvvm: |
| 14982 | case VE::VFNMADSrvvmL: |
| 14983 | case VE::VFNMADSrvvmL_v: |
| 14984 | case VE::VFNMADSrvvm_v: |
| 14985 | case VE::VFNMADSrvvml: |
| 14986 | case VE::VFNMADSrvvml_v: |
| 14987 | case VE::VFNMSBDivvm: |
| 14988 | case VE::VFNMSBDivvmL: |
| 14989 | case VE::VFNMSBDivvmL_v: |
| 14990 | case VE::VFNMSBDivvm_v: |
| 14991 | case VE::VFNMSBDivvml: |
| 14992 | case VE::VFNMSBDivvml_v: |
| 14993 | case VE::VFNMSBDrvvm: |
| 14994 | case VE::VFNMSBDrvvmL: |
| 14995 | case VE::VFNMSBDrvvmL_v: |
| 14996 | case VE::VFNMSBDrvvm_v: |
| 14997 | case VE::VFNMSBDrvvml: |
| 14998 | case VE::VFNMSBDrvvml_v: |
| 14999 | case VE::VFNMSBSivvm: |
| 15000 | case VE::VFNMSBSivvmL: |
| 15001 | case VE::VFNMSBSivvmL_v: |
| 15002 | case VE::VFNMSBSivvm_v: |
| 15003 | case VE::VFNMSBSivvml: |
| 15004 | case VE::VFNMSBSivvml_v: |
| 15005 | case VE::VFNMSBSrvvm: |
| 15006 | case VE::VFNMSBSrvvmL: |
| 15007 | case VE::VFNMSBSrvvmL_v: |
| 15008 | case VE::VFNMSBSrvvm_v: |
| 15009 | case VE::VFNMSBSrvvml: |
| 15010 | case VE::VFNMSBSrvvml_v: { |
| 15011 | // op: m |
| 15012 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15013 | op &= UINT64_C(15); |
| 15014 | op <<= 48; |
| 15015 | Value |= op; |
| 15016 | // op: sy |
| 15017 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15018 | op &= UINT64_C(127); |
| 15019 | op <<= 40; |
| 15020 | Value |= op; |
| 15021 | // op: vx |
| 15022 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15023 | op &= UINT64_C(255); |
| 15024 | op <<= 24; |
| 15025 | Value |= op; |
| 15026 | // op: vz |
| 15027 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15028 | op &= UINT64_C(255); |
| 15029 | op <<= 8; |
| 15030 | Value |= op; |
| 15031 | // op: vw |
| 15032 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15033 | op &= UINT64_C(255); |
| 15034 | Value |= op; |
| 15035 | break; |
| 15036 | } |
| 15037 | case VE::VGTLSXNCsirm: |
| 15038 | case VE::VGTLSXNCsirmL: |
| 15039 | case VE::VGTLSXNCsirmL_v: |
| 15040 | case VE::VGTLSXNCsirm_v: |
| 15041 | case VE::VGTLSXNCsirml: |
| 15042 | case VE::VGTLSXNCsirml_v: |
| 15043 | case VE::VGTLSXNCsizm: |
| 15044 | case VE::VGTLSXNCsizmL: |
| 15045 | case VE::VGTLSXNCsizmL_v: |
| 15046 | case VE::VGTLSXNCsizm_v: |
| 15047 | case VE::VGTLSXNCsizml: |
| 15048 | case VE::VGTLSXNCsizml_v: |
| 15049 | case VE::VGTLSXNCsrrm: |
| 15050 | case VE::VGTLSXNCsrrmL: |
| 15051 | case VE::VGTLSXNCsrrmL_v: |
| 15052 | case VE::VGTLSXNCsrrm_v: |
| 15053 | case VE::VGTLSXNCsrrml: |
| 15054 | case VE::VGTLSXNCsrrml_v: |
| 15055 | case VE::VGTLSXNCsrzm: |
| 15056 | case VE::VGTLSXNCsrzmL: |
| 15057 | case VE::VGTLSXNCsrzmL_v: |
| 15058 | case VE::VGTLSXNCsrzm_v: |
| 15059 | case VE::VGTLSXNCsrzml: |
| 15060 | case VE::VGTLSXNCsrzml_v: |
| 15061 | case VE::VGTLSXsirm: |
| 15062 | case VE::VGTLSXsirmL: |
| 15063 | case VE::VGTLSXsirmL_v: |
| 15064 | case VE::VGTLSXsirm_v: |
| 15065 | case VE::VGTLSXsirml: |
| 15066 | case VE::VGTLSXsirml_v: |
| 15067 | case VE::VGTLSXsizm: |
| 15068 | case VE::VGTLSXsizmL: |
| 15069 | case VE::VGTLSXsizmL_v: |
| 15070 | case VE::VGTLSXsizm_v: |
| 15071 | case VE::VGTLSXsizml: |
| 15072 | case VE::VGTLSXsizml_v: |
| 15073 | case VE::VGTLSXsrrm: |
| 15074 | case VE::VGTLSXsrrmL: |
| 15075 | case VE::VGTLSXsrrmL_v: |
| 15076 | case VE::VGTLSXsrrm_v: |
| 15077 | case VE::VGTLSXsrrml: |
| 15078 | case VE::VGTLSXsrrml_v: |
| 15079 | case VE::VGTLSXsrzm: |
| 15080 | case VE::VGTLSXsrzmL: |
| 15081 | case VE::VGTLSXsrzmL_v: |
| 15082 | case VE::VGTLSXsrzm_v: |
| 15083 | case VE::VGTLSXsrzml: |
| 15084 | case VE::VGTLSXsrzml_v: |
| 15085 | case VE::VGTLZXNCsirm: |
| 15086 | case VE::VGTLZXNCsirmL: |
| 15087 | case VE::VGTLZXNCsirmL_v: |
| 15088 | case VE::VGTLZXNCsirm_v: |
| 15089 | case VE::VGTLZXNCsirml: |
| 15090 | case VE::VGTLZXNCsirml_v: |
| 15091 | case VE::VGTLZXNCsizm: |
| 15092 | case VE::VGTLZXNCsizmL: |
| 15093 | case VE::VGTLZXNCsizmL_v: |
| 15094 | case VE::VGTLZXNCsizm_v: |
| 15095 | case VE::VGTLZXNCsizml: |
| 15096 | case VE::VGTLZXNCsizml_v: |
| 15097 | case VE::VGTLZXNCsrrm: |
| 15098 | case VE::VGTLZXNCsrrmL: |
| 15099 | case VE::VGTLZXNCsrrmL_v: |
| 15100 | case VE::VGTLZXNCsrrm_v: |
| 15101 | case VE::VGTLZXNCsrrml: |
| 15102 | case VE::VGTLZXNCsrrml_v: |
| 15103 | case VE::VGTLZXNCsrzm: |
| 15104 | case VE::VGTLZXNCsrzmL: |
| 15105 | case VE::VGTLZXNCsrzmL_v: |
| 15106 | case VE::VGTLZXNCsrzm_v: |
| 15107 | case VE::VGTLZXNCsrzml: |
| 15108 | case VE::VGTLZXNCsrzml_v: |
| 15109 | case VE::VGTLZXsirm: |
| 15110 | case VE::VGTLZXsirmL: |
| 15111 | case VE::VGTLZXsirmL_v: |
| 15112 | case VE::VGTLZXsirm_v: |
| 15113 | case VE::VGTLZXsirml: |
| 15114 | case VE::VGTLZXsirml_v: |
| 15115 | case VE::VGTLZXsizm: |
| 15116 | case VE::VGTLZXsizmL: |
| 15117 | case VE::VGTLZXsizmL_v: |
| 15118 | case VE::VGTLZXsizm_v: |
| 15119 | case VE::VGTLZXsizml: |
| 15120 | case VE::VGTLZXsizml_v: |
| 15121 | case VE::VGTLZXsrrm: |
| 15122 | case VE::VGTLZXsrrmL: |
| 15123 | case VE::VGTLZXsrrmL_v: |
| 15124 | case VE::VGTLZXsrrm_v: |
| 15125 | case VE::VGTLZXsrrml: |
| 15126 | case VE::VGTLZXsrrml_v: |
| 15127 | case VE::VGTLZXsrzm: |
| 15128 | case VE::VGTLZXsrzmL: |
| 15129 | case VE::VGTLZXsrzmL_v: |
| 15130 | case VE::VGTLZXsrzm_v: |
| 15131 | case VE::VGTLZXsrzml: |
| 15132 | case VE::VGTLZXsrzml_v: |
| 15133 | case VE::VGTNCsirm: |
| 15134 | case VE::VGTNCsirmL: |
| 15135 | case VE::VGTNCsirmL_v: |
| 15136 | case VE::VGTNCsirm_v: |
| 15137 | case VE::VGTNCsirml: |
| 15138 | case VE::VGTNCsirml_v: |
| 15139 | case VE::VGTNCsizm: |
| 15140 | case VE::VGTNCsizmL: |
| 15141 | case VE::VGTNCsizmL_v: |
| 15142 | case VE::VGTNCsizm_v: |
| 15143 | case VE::VGTNCsizml: |
| 15144 | case VE::VGTNCsizml_v: |
| 15145 | case VE::VGTNCsrrm: |
| 15146 | case VE::VGTNCsrrmL: |
| 15147 | case VE::VGTNCsrrmL_v: |
| 15148 | case VE::VGTNCsrrm_v: |
| 15149 | case VE::VGTNCsrrml: |
| 15150 | case VE::VGTNCsrrml_v: |
| 15151 | case VE::VGTNCsrzm: |
| 15152 | case VE::VGTNCsrzmL: |
| 15153 | case VE::VGTNCsrzmL_v: |
| 15154 | case VE::VGTNCsrzm_v: |
| 15155 | case VE::VGTNCsrzml: |
| 15156 | case VE::VGTNCsrzml_v: |
| 15157 | case VE::VGTUNCsirm: |
| 15158 | case VE::VGTUNCsirmL: |
| 15159 | case VE::VGTUNCsirmL_v: |
| 15160 | case VE::VGTUNCsirm_v: |
| 15161 | case VE::VGTUNCsirml: |
| 15162 | case VE::VGTUNCsirml_v: |
| 15163 | case VE::VGTUNCsizm: |
| 15164 | case VE::VGTUNCsizmL: |
| 15165 | case VE::VGTUNCsizmL_v: |
| 15166 | case VE::VGTUNCsizm_v: |
| 15167 | case VE::VGTUNCsizml: |
| 15168 | case VE::VGTUNCsizml_v: |
| 15169 | case VE::VGTUNCsrrm: |
| 15170 | case VE::VGTUNCsrrmL: |
| 15171 | case VE::VGTUNCsrrmL_v: |
| 15172 | case VE::VGTUNCsrrm_v: |
| 15173 | case VE::VGTUNCsrrml: |
| 15174 | case VE::VGTUNCsrrml_v: |
| 15175 | case VE::VGTUNCsrzm: |
| 15176 | case VE::VGTUNCsrzmL: |
| 15177 | case VE::VGTUNCsrzmL_v: |
| 15178 | case VE::VGTUNCsrzm_v: |
| 15179 | case VE::VGTUNCsrzml: |
| 15180 | case VE::VGTUNCsrzml_v: |
| 15181 | case VE::VGTUsirm: |
| 15182 | case VE::VGTUsirmL: |
| 15183 | case VE::VGTUsirmL_v: |
| 15184 | case VE::VGTUsirm_v: |
| 15185 | case VE::VGTUsirml: |
| 15186 | case VE::VGTUsirml_v: |
| 15187 | case VE::VGTUsizm: |
| 15188 | case VE::VGTUsizmL: |
| 15189 | case VE::VGTUsizmL_v: |
| 15190 | case VE::VGTUsizm_v: |
| 15191 | case VE::VGTUsizml: |
| 15192 | case VE::VGTUsizml_v: |
| 15193 | case VE::VGTUsrrm: |
| 15194 | case VE::VGTUsrrmL: |
| 15195 | case VE::VGTUsrrmL_v: |
| 15196 | case VE::VGTUsrrm_v: |
| 15197 | case VE::VGTUsrrml: |
| 15198 | case VE::VGTUsrrml_v: |
| 15199 | case VE::VGTUsrzm: |
| 15200 | case VE::VGTUsrzmL: |
| 15201 | case VE::VGTUsrzmL_v: |
| 15202 | case VE::VGTUsrzm_v: |
| 15203 | case VE::VGTUsrzml: |
| 15204 | case VE::VGTUsrzml_v: |
| 15205 | case VE::VGTsirm: |
| 15206 | case VE::VGTsirmL: |
| 15207 | case VE::VGTsirmL_v: |
| 15208 | case VE::VGTsirm_v: |
| 15209 | case VE::VGTsirml: |
| 15210 | case VE::VGTsirml_v: |
| 15211 | case VE::VGTsizm: |
| 15212 | case VE::VGTsizmL: |
| 15213 | case VE::VGTsizmL_v: |
| 15214 | case VE::VGTsizm_v: |
| 15215 | case VE::VGTsizml: |
| 15216 | case VE::VGTsizml_v: |
| 15217 | case VE::VGTsrrm: |
| 15218 | case VE::VGTsrrmL: |
| 15219 | case VE::VGTsrrmL_v: |
| 15220 | case VE::VGTsrrm_v: |
| 15221 | case VE::VGTsrrml: |
| 15222 | case VE::VGTsrrml_v: |
| 15223 | case VE::VGTsrzm: |
| 15224 | case VE::VGTsrzmL: |
| 15225 | case VE::VGTsrzmL_v: |
| 15226 | case VE::VGTsrzm_v: |
| 15227 | case VE::VGTsrzml: |
| 15228 | case VE::VGTsrzml_v: { |
| 15229 | // op: m |
| 15230 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15231 | op &= UINT64_C(15); |
| 15232 | op <<= 48; |
| 15233 | Value |= op; |
| 15234 | // op: sy |
| 15235 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15236 | op &= UINT64_C(127); |
| 15237 | op <<= 40; |
| 15238 | Value |= op; |
| 15239 | // op: sz |
| 15240 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15241 | op &= UINT64_C(127); |
| 15242 | op <<= 32; |
| 15243 | Value |= op; |
| 15244 | // op: vx |
| 15245 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15246 | op &= UINT64_C(255); |
| 15247 | op <<= 24; |
| 15248 | Value |= op; |
| 15249 | // op: sw |
| 15250 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15251 | op &= UINT64_C(127); |
| 15252 | Value |= op; |
| 15253 | break; |
| 15254 | } |
| 15255 | case VE::VGTLSXNCvirm: |
| 15256 | case VE::VGTLSXNCvirmL: |
| 15257 | case VE::VGTLSXNCvirmL_v: |
| 15258 | case VE::VGTLSXNCvirm_v: |
| 15259 | case VE::VGTLSXNCvirml: |
| 15260 | case VE::VGTLSXNCvirml_v: |
| 15261 | case VE::VGTLSXNCvizm: |
| 15262 | case VE::VGTLSXNCvizmL: |
| 15263 | case VE::VGTLSXNCvizmL_v: |
| 15264 | case VE::VGTLSXNCvizm_v: |
| 15265 | case VE::VGTLSXNCvizml: |
| 15266 | case VE::VGTLSXNCvizml_v: |
| 15267 | case VE::VGTLSXNCvrrm: |
| 15268 | case VE::VGTLSXNCvrrmL: |
| 15269 | case VE::VGTLSXNCvrrmL_v: |
| 15270 | case VE::VGTLSXNCvrrm_v: |
| 15271 | case VE::VGTLSXNCvrrml: |
| 15272 | case VE::VGTLSXNCvrrml_v: |
| 15273 | case VE::VGTLSXNCvrzm: |
| 15274 | case VE::VGTLSXNCvrzmL: |
| 15275 | case VE::VGTLSXNCvrzmL_v: |
| 15276 | case VE::VGTLSXNCvrzm_v: |
| 15277 | case VE::VGTLSXNCvrzml: |
| 15278 | case VE::VGTLSXNCvrzml_v: |
| 15279 | case VE::VGTLSXvirm: |
| 15280 | case VE::VGTLSXvirmL: |
| 15281 | case VE::VGTLSXvirmL_v: |
| 15282 | case VE::VGTLSXvirm_v: |
| 15283 | case VE::VGTLSXvirml: |
| 15284 | case VE::VGTLSXvirml_v: |
| 15285 | case VE::VGTLSXvizm: |
| 15286 | case VE::VGTLSXvizmL: |
| 15287 | case VE::VGTLSXvizmL_v: |
| 15288 | case VE::VGTLSXvizm_v: |
| 15289 | case VE::VGTLSXvizml: |
| 15290 | case VE::VGTLSXvizml_v: |
| 15291 | case VE::VGTLSXvrrm: |
| 15292 | case VE::VGTLSXvrrmL: |
| 15293 | case VE::VGTLSXvrrmL_v: |
| 15294 | case VE::VGTLSXvrrm_v: |
| 15295 | case VE::VGTLSXvrrml: |
| 15296 | case VE::VGTLSXvrrml_v: |
| 15297 | case VE::VGTLSXvrzm: |
| 15298 | case VE::VGTLSXvrzmL: |
| 15299 | case VE::VGTLSXvrzmL_v: |
| 15300 | case VE::VGTLSXvrzm_v: |
| 15301 | case VE::VGTLSXvrzml: |
| 15302 | case VE::VGTLSXvrzml_v: |
| 15303 | case VE::VGTLZXNCvirm: |
| 15304 | case VE::VGTLZXNCvirmL: |
| 15305 | case VE::VGTLZXNCvirmL_v: |
| 15306 | case VE::VGTLZXNCvirm_v: |
| 15307 | case VE::VGTLZXNCvirml: |
| 15308 | case VE::VGTLZXNCvirml_v: |
| 15309 | case VE::VGTLZXNCvizm: |
| 15310 | case VE::VGTLZXNCvizmL: |
| 15311 | case VE::VGTLZXNCvizmL_v: |
| 15312 | case VE::VGTLZXNCvizm_v: |
| 15313 | case VE::VGTLZXNCvizml: |
| 15314 | case VE::VGTLZXNCvizml_v: |
| 15315 | case VE::VGTLZXNCvrrm: |
| 15316 | case VE::VGTLZXNCvrrmL: |
| 15317 | case VE::VGTLZXNCvrrmL_v: |
| 15318 | case VE::VGTLZXNCvrrm_v: |
| 15319 | case VE::VGTLZXNCvrrml: |
| 15320 | case VE::VGTLZXNCvrrml_v: |
| 15321 | case VE::VGTLZXNCvrzm: |
| 15322 | case VE::VGTLZXNCvrzmL: |
| 15323 | case VE::VGTLZXNCvrzmL_v: |
| 15324 | case VE::VGTLZXNCvrzm_v: |
| 15325 | case VE::VGTLZXNCvrzml: |
| 15326 | case VE::VGTLZXNCvrzml_v: |
| 15327 | case VE::VGTLZXvirm: |
| 15328 | case VE::VGTLZXvirmL: |
| 15329 | case VE::VGTLZXvirmL_v: |
| 15330 | case VE::VGTLZXvirm_v: |
| 15331 | case VE::VGTLZXvirml: |
| 15332 | case VE::VGTLZXvirml_v: |
| 15333 | case VE::VGTLZXvizm: |
| 15334 | case VE::VGTLZXvizmL: |
| 15335 | case VE::VGTLZXvizmL_v: |
| 15336 | case VE::VGTLZXvizm_v: |
| 15337 | case VE::VGTLZXvizml: |
| 15338 | case VE::VGTLZXvizml_v: |
| 15339 | case VE::VGTLZXvrrm: |
| 15340 | case VE::VGTLZXvrrmL: |
| 15341 | case VE::VGTLZXvrrmL_v: |
| 15342 | case VE::VGTLZXvrrm_v: |
| 15343 | case VE::VGTLZXvrrml: |
| 15344 | case VE::VGTLZXvrrml_v: |
| 15345 | case VE::VGTLZXvrzm: |
| 15346 | case VE::VGTLZXvrzmL: |
| 15347 | case VE::VGTLZXvrzmL_v: |
| 15348 | case VE::VGTLZXvrzm_v: |
| 15349 | case VE::VGTLZXvrzml: |
| 15350 | case VE::VGTLZXvrzml_v: |
| 15351 | case VE::VGTNCvirm: |
| 15352 | case VE::VGTNCvirmL: |
| 15353 | case VE::VGTNCvirmL_v: |
| 15354 | case VE::VGTNCvirm_v: |
| 15355 | case VE::VGTNCvirml: |
| 15356 | case VE::VGTNCvirml_v: |
| 15357 | case VE::VGTNCvizm: |
| 15358 | case VE::VGTNCvizmL: |
| 15359 | case VE::VGTNCvizmL_v: |
| 15360 | case VE::VGTNCvizm_v: |
| 15361 | case VE::VGTNCvizml: |
| 15362 | case VE::VGTNCvizml_v: |
| 15363 | case VE::VGTNCvrrm: |
| 15364 | case VE::VGTNCvrrmL: |
| 15365 | case VE::VGTNCvrrmL_v: |
| 15366 | case VE::VGTNCvrrm_v: |
| 15367 | case VE::VGTNCvrrml: |
| 15368 | case VE::VGTNCvrrml_v: |
| 15369 | case VE::VGTNCvrzm: |
| 15370 | case VE::VGTNCvrzmL: |
| 15371 | case VE::VGTNCvrzmL_v: |
| 15372 | case VE::VGTNCvrzm_v: |
| 15373 | case VE::VGTNCvrzml: |
| 15374 | case VE::VGTNCvrzml_v: |
| 15375 | case VE::VGTUNCvirm: |
| 15376 | case VE::VGTUNCvirmL: |
| 15377 | case VE::VGTUNCvirmL_v: |
| 15378 | case VE::VGTUNCvirm_v: |
| 15379 | case VE::VGTUNCvirml: |
| 15380 | case VE::VGTUNCvirml_v: |
| 15381 | case VE::VGTUNCvizm: |
| 15382 | case VE::VGTUNCvizmL: |
| 15383 | case VE::VGTUNCvizmL_v: |
| 15384 | case VE::VGTUNCvizm_v: |
| 15385 | case VE::VGTUNCvizml: |
| 15386 | case VE::VGTUNCvizml_v: |
| 15387 | case VE::VGTUNCvrrm: |
| 15388 | case VE::VGTUNCvrrmL: |
| 15389 | case VE::VGTUNCvrrmL_v: |
| 15390 | case VE::VGTUNCvrrm_v: |
| 15391 | case VE::VGTUNCvrrml: |
| 15392 | case VE::VGTUNCvrrml_v: |
| 15393 | case VE::VGTUNCvrzm: |
| 15394 | case VE::VGTUNCvrzmL: |
| 15395 | case VE::VGTUNCvrzmL_v: |
| 15396 | case VE::VGTUNCvrzm_v: |
| 15397 | case VE::VGTUNCvrzml: |
| 15398 | case VE::VGTUNCvrzml_v: |
| 15399 | case VE::VGTUvirm: |
| 15400 | case VE::VGTUvirmL: |
| 15401 | case VE::VGTUvirmL_v: |
| 15402 | case VE::VGTUvirm_v: |
| 15403 | case VE::VGTUvirml: |
| 15404 | case VE::VGTUvirml_v: |
| 15405 | case VE::VGTUvizm: |
| 15406 | case VE::VGTUvizmL: |
| 15407 | case VE::VGTUvizmL_v: |
| 15408 | case VE::VGTUvizm_v: |
| 15409 | case VE::VGTUvizml: |
| 15410 | case VE::VGTUvizml_v: |
| 15411 | case VE::VGTUvrrm: |
| 15412 | case VE::VGTUvrrmL: |
| 15413 | case VE::VGTUvrrmL_v: |
| 15414 | case VE::VGTUvrrm_v: |
| 15415 | case VE::VGTUvrrml: |
| 15416 | case VE::VGTUvrrml_v: |
| 15417 | case VE::VGTUvrzm: |
| 15418 | case VE::VGTUvrzmL: |
| 15419 | case VE::VGTUvrzmL_v: |
| 15420 | case VE::VGTUvrzm_v: |
| 15421 | case VE::VGTUvrzml: |
| 15422 | case VE::VGTUvrzml_v: |
| 15423 | case VE::VGTvirm: |
| 15424 | case VE::VGTvirmL: |
| 15425 | case VE::VGTvirmL_v: |
| 15426 | case VE::VGTvirm_v: |
| 15427 | case VE::VGTvirml: |
| 15428 | case VE::VGTvirml_v: |
| 15429 | case VE::VGTvizm: |
| 15430 | case VE::VGTvizmL: |
| 15431 | case VE::VGTvizmL_v: |
| 15432 | case VE::VGTvizm_v: |
| 15433 | case VE::VGTvizml: |
| 15434 | case VE::VGTvizml_v: |
| 15435 | case VE::VGTvrrm: |
| 15436 | case VE::VGTvrrmL: |
| 15437 | case VE::VGTvrrmL_v: |
| 15438 | case VE::VGTvrrm_v: |
| 15439 | case VE::VGTvrrml: |
| 15440 | case VE::VGTvrrml_v: |
| 15441 | case VE::VGTvrzm: |
| 15442 | case VE::VGTvrzmL: |
| 15443 | case VE::VGTvrzmL_v: |
| 15444 | case VE::VGTvrzm_v: |
| 15445 | case VE::VGTvrzml: |
| 15446 | case VE::VGTvrzml_v: { |
| 15447 | // op: m |
| 15448 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15449 | op &= UINT64_C(15); |
| 15450 | op <<= 48; |
| 15451 | Value |= op; |
| 15452 | // op: sy |
| 15453 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15454 | op &= UINT64_C(127); |
| 15455 | op <<= 40; |
| 15456 | Value |= op; |
| 15457 | // op: sz |
| 15458 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15459 | op &= UINT64_C(127); |
| 15460 | op <<= 32; |
| 15461 | Value |= op; |
| 15462 | // op: vx |
| 15463 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15464 | op &= UINT64_C(255); |
| 15465 | op <<= 24; |
| 15466 | Value |= op; |
| 15467 | // op: vy |
| 15468 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15469 | op &= UINT64_C(255); |
| 15470 | op <<= 16; |
| 15471 | Value |= op; |
| 15472 | break; |
| 15473 | } |
| 15474 | case VE::VSFAvimm: |
| 15475 | case VE::VSFAvimmL: |
| 15476 | case VE::VSFAvimmL_v: |
| 15477 | case VE::VSFAvimm_v: |
| 15478 | case VE::VSFAvimml: |
| 15479 | case VE::VSFAvimml_v: |
| 15480 | case VE::VSFAvirm: |
| 15481 | case VE::VSFAvirmL: |
| 15482 | case VE::VSFAvirmL_v: |
| 15483 | case VE::VSFAvirm_v: |
| 15484 | case VE::VSFAvirml: |
| 15485 | case VE::VSFAvirml_v: |
| 15486 | case VE::VSFAvrmm: |
| 15487 | case VE::VSFAvrmmL: |
| 15488 | case VE::VSFAvrmmL_v: |
| 15489 | case VE::VSFAvrmm_v: |
| 15490 | case VE::VSFAvrmml: |
| 15491 | case VE::VSFAvrmml_v: |
| 15492 | case VE::VSFAvrrm: |
| 15493 | case VE::VSFAvrrmL: |
| 15494 | case VE::VSFAvrrmL_v: |
| 15495 | case VE::VSFAvrrm_v: |
| 15496 | case VE::VSFAvrrml: |
| 15497 | case VE::VSFAvrrml_v: { |
| 15498 | // op: m |
| 15499 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15500 | op &= UINT64_C(15); |
| 15501 | op <<= 48; |
| 15502 | Value |= op; |
| 15503 | // op: sy |
| 15504 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15505 | op &= UINT64_C(127); |
| 15506 | op <<= 40; |
| 15507 | Value |= op; |
| 15508 | // op: sz |
| 15509 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15510 | op &= UINT64_C(127); |
| 15511 | op <<= 32; |
| 15512 | Value |= op; |
| 15513 | // op: vx |
| 15514 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15515 | op &= UINT64_C(255); |
| 15516 | op <<= 24; |
| 15517 | Value |= op; |
| 15518 | // op: vz |
| 15519 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15520 | op &= UINT64_C(255); |
| 15521 | op <<= 8; |
| 15522 | Value |= op; |
| 15523 | break; |
| 15524 | } |
| 15525 | case VE::PVFMADLOvivm: |
| 15526 | case VE::PVFMADLOvivmL: |
| 15527 | case VE::PVFMADLOvivmL_v: |
| 15528 | case VE::PVFMADLOvivm_v: |
| 15529 | case VE::PVFMADLOvivml: |
| 15530 | case VE::PVFMADLOvivml_v: |
| 15531 | case VE::PVFMADLOvrvm: |
| 15532 | case VE::PVFMADLOvrvmL: |
| 15533 | case VE::PVFMADLOvrvmL_v: |
| 15534 | case VE::PVFMADLOvrvm_v: |
| 15535 | case VE::PVFMADLOvrvml: |
| 15536 | case VE::PVFMADLOvrvml_v: |
| 15537 | case VE::PVFMADUPvivm: |
| 15538 | case VE::PVFMADUPvivmL: |
| 15539 | case VE::PVFMADUPvivmL_v: |
| 15540 | case VE::PVFMADUPvivm_v: |
| 15541 | case VE::PVFMADUPvivml: |
| 15542 | case VE::PVFMADUPvivml_v: |
| 15543 | case VE::PVFMADUPvrvm: |
| 15544 | case VE::PVFMADUPvrvmL: |
| 15545 | case VE::PVFMADUPvrvmL_v: |
| 15546 | case VE::PVFMADUPvrvm_v: |
| 15547 | case VE::PVFMADUPvrvml: |
| 15548 | case VE::PVFMADUPvrvml_v: |
| 15549 | case VE::PVFMADvivm: |
| 15550 | case VE::PVFMADvivmL: |
| 15551 | case VE::PVFMADvivmL_v: |
| 15552 | case VE::PVFMADvivm_v: |
| 15553 | case VE::PVFMADvivml: |
| 15554 | case VE::PVFMADvivml_v: |
| 15555 | case VE::PVFMADvrvm: |
| 15556 | case VE::PVFMADvrvmL: |
| 15557 | case VE::PVFMADvrvmL_v: |
| 15558 | case VE::PVFMADvrvm_v: |
| 15559 | case VE::PVFMADvrvml: |
| 15560 | case VE::PVFMADvrvml_v: |
| 15561 | case VE::PVFMSBLOvivm: |
| 15562 | case VE::PVFMSBLOvivmL: |
| 15563 | case VE::PVFMSBLOvivmL_v: |
| 15564 | case VE::PVFMSBLOvivm_v: |
| 15565 | case VE::PVFMSBLOvivml: |
| 15566 | case VE::PVFMSBLOvivml_v: |
| 15567 | case VE::PVFMSBLOvrvm: |
| 15568 | case VE::PVFMSBLOvrvmL: |
| 15569 | case VE::PVFMSBLOvrvmL_v: |
| 15570 | case VE::PVFMSBLOvrvm_v: |
| 15571 | case VE::PVFMSBLOvrvml: |
| 15572 | case VE::PVFMSBLOvrvml_v: |
| 15573 | case VE::PVFMSBUPvivm: |
| 15574 | case VE::PVFMSBUPvivmL: |
| 15575 | case VE::PVFMSBUPvivmL_v: |
| 15576 | case VE::PVFMSBUPvivm_v: |
| 15577 | case VE::PVFMSBUPvivml: |
| 15578 | case VE::PVFMSBUPvivml_v: |
| 15579 | case VE::PVFMSBUPvrvm: |
| 15580 | case VE::PVFMSBUPvrvmL: |
| 15581 | case VE::PVFMSBUPvrvmL_v: |
| 15582 | case VE::PVFMSBUPvrvm_v: |
| 15583 | case VE::PVFMSBUPvrvml: |
| 15584 | case VE::PVFMSBUPvrvml_v: |
| 15585 | case VE::PVFMSBvivm: |
| 15586 | case VE::PVFMSBvivmL: |
| 15587 | case VE::PVFMSBvivmL_v: |
| 15588 | case VE::PVFMSBvivm_v: |
| 15589 | case VE::PVFMSBvivml: |
| 15590 | case VE::PVFMSBvivml_v: |
| 15591 | case VE::PVFMSBvrvm: |
| 15592 | case VE::PVFMSBvrvmL: |
| 15593 | case VE::PVFMSBvrvmL_v: |
| 15594 | case VE::PVFMSBvrvm_v: |
| 15595 | case VE::PVFMSBvrvml: |
| 15596 | case VE::PVFMSBvrvml_v: |
| 15597 | case VE::PVFNMADLOvivm: |
| 15598 | case VE::PVFNMADLOvivmL: |
| 15599 | case VE::PVFNMADLOvivmL_v: |
| 15600 | case VE::PVFNMADLOvivm_v: |
| 15601 | case VE::PVFNMADLOvivml: |
| 15602 | case VE::PVFNMADLOvivml_v: |
| 15603 | case VE::PVFNMADLOvrvm: |
| 15604 | case VE::PVFNMADLOvrvmL: |
| 15605 | case VE::PVFNMADLOvrvmL_v: |
| 15606 | case VE::PVFNMADLOvrvm_v: |
| 15607 | case VE::PVFNMADLOvrvml: |
| 15608 | case VE::PVFNMADLOvrvml_v: |
| 15609 | case VE::PVFNMADUPvivm: |
| 15610 | case VE::PVFNMADUPvivmL: |
| 15611 | case VE::PVFNMADUPvivmL_v: |
| 15612 | case VE::PVFNMADUPvivm_v: |
| 15613 | case VE::PVFNMADUPvivml: |
| 15614 | case VE::PVFNMADUPvivml_v: |
| 15615 | case VE::PVFNMADUPvrvm: |
| 15616 | case VE::PVFNMADUPvrvmL: |
| 15617 | case VE::PVFNMADUPvrvmL_v: |
| 15618 | case VE::PVFNMADUPvrvm_v: |
| 15619 | case VE::PVFNMADUPvrvml: |
| 15620 | case VE::PVFNMADUPvrvml_v: |
| 15621 | case VE::PVFNMADvivm: |
| 15622 | case VE::PVFNMADvivmL: |
| 15623 | case VE::PVFNMADvivmL_v: |
| 15624 | case VE::PVFNMADvivm_v: |
| 15625 | case VE::PVFNMADvivml: |
| 15626 | case VE::PVFNMADvivml_v: |
| 15627 | case VE::PVFNMADvrvm: |
| 15628 | case VE::PVFNMADvrvmL: |
| 15629 | case VE::PVFNMADvrvmL_v: |
| 15630 | case VE::PVFNMADvrvm_v: |
| 15631 | case VE::PVFNMADvrvml: |
| 15632 | case VE::PVFNMADvrvml_v: |
| 15633 | case VE::PVFNMSBLOvivm: |
| 15634 | case VE::PVFNMSBLOvivmL: |
| 15635 | case VE::PVFNMSBLOvivmL_v: |
| 15636 | case VE::PVFNMSBLOvivm_v: |
| 15637 | case VE::PVFNMSBLOvivml: |
| 15638 | case VE::PVFNMSBLOvivml_v: |
| 15639 | case VE::PVFNMSBLOvrvm: |
| 15640 | case VE::PVFNMSBLOvrvmL: |
| 15641 | case VE::PVFNMSBLOvrvmL_v: |
| 15642 | case VE::PVFNMSBLOvrvm_v: |
| 15643 | case VE::PVFNMSBLOvrvml: |
| 15644 | case VE::PVFNMSBLOvrvml_v: |
| 15645 | case VE::PVFNMSBUPvivm: |
| 15646 | case VE::PVFNMSBUPvivmL: |
| 15647 | case VE::PVFNMSBUPvivmL_v: |
| 15648 | case VE::PVFNMSBUPvivm_v: |
| 15649 | case VE::PVFNMSBUPvivml: |
| 15650 | case VE::PVFNMSBUPvivml_v: |
| 15651 | case VE::PVFNMSBUPvrvm: |
| 15652 | case VE::PVFNMSBUPvrvmL: |
| 15653 | case VE::PVFNMSBUPvrvmL_v: |
| 15654 | case VE::PVFNMSBUPvrvm_v: |
| 15655 | case VE::PVFNMSBUPvrvml: |
| 15656 | case VE::PVFNMSBUPvrvml_v: |
| 15657 | case VE::PVFNMSBvivm: |
| 15658 | case VE::PVFNMSBvivmL: |
| 15659 | case VE::PVFNMSBvivmL_v: |
| 15660 | case VE::PVFNMSBvivm_v: |
| 15661 | case VE::PVFNMSBvivml: |
| 15662 | case VE::PVFNMSBvivml_v: |
| 15663 | case VE::PVFNMSBvrvm: |
| 15664 | case VE::PVFNMSBvrvmL: |
| 15665 | case VE::PVFNMSBvrvmL_v: |
| 15666 | case VE::PVFNMSBvrvm_v: |
| 15667 | case VE::PVFNMSBvrvml: |
| 15668 | case VE::PVFNMSBvrvml_v: |
| 15669 | case VE::VFMADDvivm: |
| 15670 | case VE::VFMADDvivmL: |
| 15671 | case VE::VFMADDvivmL_v: |
| 15672 | case VE::VFMADDvivm_v: |
| 15673 | case VE::VFMADDvivml: |
| 15674 | case VE::VFMADDvivml_v: |
| 15675 | case VE::VFMADDvrvm: |
| 15676 | case VE::VFMADDvrvmL: |
| 15677 | case VE::VFMADDvrvmL_v: |
| 15678 | case VE::VFMADDvrvm_v: |
| 15679 | case VE::VFMADDvrvml: |
| 15680 | case VE::VFMADDvrvml_v: |
| 15681 | case VE::VFMADSvivm: |
| 15682 | case VE::VFMADSvivmL: |
| 15683 | case VE::VFMADSvivmL_v: |
| 15684 | case VE::VFMADSvivm_v: |
| 15685 | case VE::VFMADSvivml: |
| 15686 | case VE::VFMADSvivml_v: |
| 15687 | case VE::VFMADSvrvm: |
| 15688 | case VE::VFMADSvrvmL: |
| 15689 | case VE::VFMADSvrvmL_v: |
| 15690 | case VE::VFMADSvrvm_v: |
| 15691 | case VE::VFMADSvrvml: |
| 15692 | case VE::VFMADSvrvml_v: |
| 15693 | case VE::VFMSBDvivm: |
| 15694 | case VE::VFMSBDvivmL: |
| 15695 | case VE::VFMSBDvivmL_v: |
| 15696 | case VE::VFMSBDvivm_v: |
| 15697 | case VE::VFMSBDvivml: |
| 15698 | case VE::VFMSBDvivml_v: |
| 15699 | case VE::VFMSBDvrvm: |
| 15700 | case VE::VFMSBDvrvmL: |
| 15701 | case VE::VFMSBDvrvmL_v: |
| 15702 | case VE::VFMSBDvrvm_v: |
| 15703 | case VE::VFMSBDvrvml: |
| 15704 | case VE::VFMSBDvrvml_v: |
| 15705 | case VE::VFMSBSvivm: |
| 15706 | case VE::VFMSBSvivmL: |
| 15707 | case VE::VFMSBSvivmL_v: |
| 15708 | case VE::VFMSBSvivm_v: |
| 15709 | case VE::VFMSBSvivml: |
| 15710 | case VE::VFMSBSvivml_v: |
| 15711 | case VE::VFMSBSvrvm: |
| 15712 | case VE::VFMSBSvrvmL: |
| 15713 | case VE::VFMSBSvrvmL_v: |
| 15714 | case VE::VFMSBSvrvm_v: |
| 15715 | case VE::VFMSBSvrvml: |
| 15716 | case VE::VFMSBSvrvml_v: |
| 15717 | case VE::VFNMADDvivm: |
| 15718 | case VE::VFNMADDvivmL: |
| 15719 | case VE::VFNMADDvivmL_v: |
| 15720 | case VE::VFNMADDvivm_v: |
| 15721 | case VE::VFNMADDvivml: |
| 15722 | case VE::VFNMADDvivml_v: |
| 15723 | case VE::VFNMADDvrvm: |
| 15724 | case VE::VFNMADDvrvmL: |
| 15725 | case VE::VFNMADDvrvmL_v: |
| 15726 | case VE::VFNMADDvrvm_v: |
| 15727 | case VE::VFNMADDvrvml: |
| 15728 | case VE::VFNMADDvrvml_v: |
| 15729 | case VE::VFNMADSvivm: |
| 15730 | case VE::VFNMADSvivmL: |
| 15731 | case VE::VFNMADSvivmL_v: |
| 15732 | case VE::VFNMADSvivm_v: |
| 15733 | case VE::VFNMADSvivml: |
| 15734 | case VE::VFNMADSvivml_v: |
| 15735 | case VE::VFNMADSvrvm: |
| 15736 | case VE::VFNMADSvrvmL: |
| 15737 | case VE::VFNMADSvrvmL_v: |
| 15738 | case VE::VFNMADSvrvm_v: |
| 15739 | case VE::VFNMADSvrvml: |
| 15740 | case VE::VFNMADSvrvml_v: |
| 15741 | case VE::VFNMSBDvivm: |
| 15742 | case VE::VFNMSBDvivmL: |
| 15743 | case VE::VFNMSBDvivmL_v: |
| 15744 | case VE::VFNMSBDvivm_v: |
| 15745 | case VE::VFNMSBDvivml: |
| 15746 | case VE::VFNMSBDvivml_v: |
| 15747 | case VE::VFNMSBDvrvm: |
| 15748 | case VE::VFNMSBDvrvmL: |
| 15749 | case VE::VFNMSBDvrvmL_v: |
| 15750 | case VE::VFNMSBDvrvm_v: |
| 15751 | case VE::VFNMSBDvrvml: |
| 15752 | case VE::VFNMSBDvrvml_v: |
| 15753 | case VE::VFNMSBSvivm: |
| 15754 | case VE::VFNMSBSvivmL: |
| 15755 | case VE::VFNMSBSvivmL_v: |
| 15756 | case VE::VFNMSBSvivm_v: |
| 15757 | case VE::VFNMSBSvivml: |
| 15758 | case VE::VFNMSBSvivml_v: |
| 15759 | case VE::VFNMSBSvrvm: |
| 15760 | case VE::VFNMSBSvrvmL: |
| 15761 | case VE::VFNMSBSvrvmL_v: |
| 15762 | case VE::VFNMSBSvrvm_v: |
| 15763 | case VE::VFNMSBSvrvml: |
| 15764 | case VE::VFNMSBSvrvml_v: { |
| 15765 | // op: m |
| 15766 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15767 | op &= UINT64_C(15); |
| 15768 | op <<= 48; |
| 15769 | Value |= op; |
| 15770 | // op: sy |
| 15771 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15772 | op &= UINT64_C(127); |
| 15773 | op <<= 40; |
| 15774 | Value |= op; |
| 15775 | // op: vx |
| 15776 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15777 | op &= UINT64_C(255); |
| 15778 | op <<= 24; |
| 15779 | Value |= op; |
| 15780 | // op: vy |
| 15781 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15782 | op &= UINT64_C(255); |
| 15783 | op <<= 16; |
| 15784 | Value |= op; |
| 15785 | // op: vw |
| 15786 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15787 | op &= UINT64_C(255); |
| 15788 | Value |= op; |
| 15789 | break; |
| 15790 | } |
| 15791 | case VE::VSLDvvim: |
| 15792 | case VE::VSLDvvimL: |
| 15793 | case VE::VSLDvvimL_v: |
| 15794 | case VE::VSLDvvim_v: |
| 15795 | case VE::VSLDvviml: |
| 15796 | case VE::VSLDvviml_v: |
| 15797 | case VE::VSLDvvrm: |
| 15798 | case VE::VSLDvvrmL: |
| 15799 | case VE::VSLDvvrmL_v: |
| 15800 | case VE::VSLDvvrm_v: |
| 15801 | case VE::VSLDvvrml: |
| 15802 | case VE::VSLDvvrml_v: |
| 15803 | case VE::VSRDvvim: |
| 15804 | case VE::VSRDvvimL: |
| 15805 | case VE::VSRDvvimL_v: |
| 15806 | case VE::VSRDvvim_v: |
| 15807 | case VE::VSRDvviml: |
| 15808 | case VE::VSRDvviml_v: |
| 15809 | case VE::VSRDvvrm: |
| 15810 | case VE::VSRDvvrmL: |
| 15811 | case VE::VSRDvvrmL_v: |
| 15812 | case VE::VSRDvvrm_v: |
| 15813 | case VE::VSRDvvrml: |
| 15814 | case VE::VSRDvvrml_v: { |
| 15815 | // op: m |
| 15816 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15817 | op &= UINT64_C(15); |
| 15818 | op <<= 48; |
| 15819 | Value |= op; |
| 15820 | // op: sy |
| 15821 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15822 | op &= UINT64_C(127); |
| 15823 | op <<= 40; |
| 15824 | Value |= op; |
| 15825 | // op: vx |
| 15826 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15827 | op &= UINT64_C(255); |
| 15828 | op <<= 24; |
| 15829 | Value |= op; |
| 15830 | // op: vy |
| 15831 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15832 | op &= UINT64_C(255); |
| 15833 | op <<= 16; |
| 15834 | Value |= op; |
| 15835 | // op: vz |
| 15836 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15837 | op &= UINT64_C(255); |
| 15838 | op <<= 8; |
| 15839 | Value |= op; |
| 15840 | break; |
| 15841 | } |
| 15842 | case VE::PVFMADLOvvvm: |
| 15843 | case VE::PVFMADLOvvvmL: |
| 15844 | case VE::PVFMADLOvvvmL_v: |
| 15845 | case VE::PVFMADLOvvvm_v: |
| 15846 | case VE::PVFMADLOvvvml: |
| 15847 | case VE::PVFMADLOvvvml_v: |
| 15848 | case VE::PVFMADUPvvvm: |
| 15849 | case VE::PVFMADUPvvvmL: |
| 15850 | case VE::PVFMADUPvvvmL_v: |
| 15851 | case VE::PVFMADUPvvvm_v: |
| 15852 | case VE::PVFMADUPvvvml: |
| 15853 | case VE::PVFMADUPvvvml_v: |
| 15854 | case VE::PVFMADvvvm: |
| 15855 | case VE::PVFMADvvvmL: |
| 15856 | case VE::PVFMADvvvmL_v: |
| 15857 | case VE::PVFMADvvvm_v: |
| 15858 | case VE::PVFMADvvvml: |
| 15859 | case VE::PVFMADvvvml_v: |
| 15860 | case VE::PVFMSBLOvvvm: |
| 15861 | case VE::PVFMSBLOvvvmL: |
| 15862 | case VE::PVFMSBLOvvvmL_v: |
| 15863 | case VE::PVFMSBLOvvvm_v: |
| 15864 | case VE::PVFMSBLOvvvml: |
| 15865 | case VE::PVFMSBLOvvvml_v: |
| 15866 | case VE::PVFMSBUPvvvm: |
| 15867 | case VE::PVFMSBUPvvvmL: |
| 15868 | case VE::PVFMSBUPvvvmL_v: |
| 15869 | case VE::PVFMSBUPvvvm_v: |
| 15870 | case VE::PVFMSBUPvvvml: |
| 15871 | case VE::PVFMSBUPvvvml_v: |
| 15872 | case VE::PVFMSBvvvm: |
| 15873 | case VE::PVFMSBvvvmL: |
| 15874 | case VE::PVFMSBvvvmL_v: |
| 15875 | case VE::PVFMSBvvvm_v: |
| 15876 | case VE::PVFMSBvvvml: |
| 15877 | case VE::PVFMSBvvvml_v: |
| 15878 | case VE::PVFNMADLOvvvm: |
| 15879 | case VE::PVFNMADLOvvvmL: |
| 15880 | case VE::PVFNMADLOvvvmL_v: |
| 15881 | case VE::PVFNMADLOvvvm_v: |
| 15882 | case VE::PVFNMADLOvvvml: |
| 15883 | case VE::PVFNMADLOvvvml_v: |
| 15884 | case VE::PVFNMADUPvvvm: |
| 15885 | case VE::PVFNMADUPvvvmL: |
| 15886 | case VE::PVFNMADUPvvvmL_v: |
| 15887 | case VE::PVFNMADUPvvvm_v: |
| 15888 | case VE::PVFNMADUPvvvml: |
| 15889 | case VE::PVFNMADUPvvvml_v: |
| 15890 | case VE::PVFNMADvvvm: |
| 15891 | case VE::PVFNMADvvvmL: |
| 15892 | case VE::PVFNMADvvvmL_v: |
| 15893 | case VE::PVFNMADvvvm_v: |
| 15894 | case VE::PVFNMADvvvml: |
| 15895 | case VE::PVFNMADvvvml_v: |
| 15896 | case VE::PVFNMSBLOvvvm: |
| 15897 | case VE::PVFNMSBLOvvvmL: |
| 15898 | case VE::PVFNMSBLOvvvmL_v: |
| 15899 | case VE::PVFNMSBLOvvvm_v: |
| 15900 | case VE::PVFNMSBLOvvvml: |
| 15901 | case VE::PVFNMSBLOvvvml_v: |
| 15902 | case VE::PVFNMSBUPvvvm: |
| 15903 | case VE::PVFNMSBUPvvvmL: |
| 15904 | case VE::PVFNMSBUPvvvmL_v: |
| 15905 | case VE::PVFNMSBUPvvvm_v: |
| 15906 | case VE::PVFNMSBUPvvvml: |
| 15907 | case VE::PVFNMSBUPvvvml_v: |
| 15908 | case VE::PVFNMSBvvvm: |
| 15909 | case VE::PVFNMSBvvvmL: |
| 15910 | case VE::PVFNMSBvvvmL_v: |
| 15911 | case VE::PVFNMSBvvvm_v: |
| 15912 | case VE::PVFNMSBvvvml: |
| 15913 | case VE::PVFNMSBvvvml_v: |
| 15914 | case VE::VFMADDvvvm: |
| 15915 | case VE::VFMADDvvvmL: |
| 15916 | case VE::VFMADDvvvmL_v: |
| 15917 | case VE::VFMADDvvvm_v: |
| 15918 | case VE::VFMADDvvvml: |
| 15919 | case VE::VFMADDvvvml_v: |
| 15920 | case VE::VFMADSvvvm: |
| 15921 | case VE::VFMADSvvvmL: |
| 15922 | case VE::VFMADSvvvmL_v: |
| 15923 | case VE::VFMADSvvvm_v: |
| 15924 | case VE::VFMADSvvvml: |
| 15925 | case VE::VFMADSvvvml_v: |
| 15926 | case VE::VFMSBDvvvm: |
| 15927 | case VE::VFMSBDvvvmL: |
| 15928 | case VE::VFMSBDvvvmL_v: |
| 15929 | case VE::VFMSBDvvvm_v: |
| 15930 | case VE::VFMSBDvvvml: |
| 15931 | case VE::VFMSBDvvvml_v: |
| 15932 | case VE::VFMSBSvvvm: |
| 15933 | case VE::VFMSBSvvvmL: |
| 15934 | case VE::VFMSBSvvvmL_v: |
| 15935 | case VE::VFMSBSvvvm_v: |
| 15936 | case VE::VFMSBSvvvml: |
| 15937 | case VE::VFMSBSvvvml_v: |
| 15938 | case VE::VFNMADDvvvm: |
| 15939 | case VE::VFNMADDvvvmL: |
| 15940 | case VE::VFNMADDvvvmL_v: |
| 15941 | case VE::VFNMADDvvvm_v: |
| 15942 | case VE::VFNMADDvvvml: |
| 15943 | case VE::VFNMADDvvvml_v: |
| 15944 | case VE::VFNMADSvvvm: |
| 15945 | case VE::VFNMADSvvvmL: |
| 15946 | case VE::VFNMADSvvvmL_v: |
| 15947 | case VE::VFNMADSvvvm_v: |
| 15948 | case VE::VFNMADSvvvml: |
| 15949 | case VE::VFNMADSvvvml_v: |
| 15950 | case VE::VFNMSBDvvvm: |
| 15951 | case VE::VFNMSBDvvvmL: |
| 15952 | case VE::VFNMSBDvvvmL_v: |
| 15953 | case VE::VFNMSBDvvvm_v: |
| 15954 | case VE::VFNMSBDvvvml: |
| 15955 | case VE::VFNMSBDvvvml_v: |
| 15956 | case VE::VFNMSBSvvvm: |
| 15957 | case VE::VFNMSBSvvvmL: |
| 15958 | case VE::VFNMSBSvvvmL_v: |
| 15959 | case VE::VFNMSBSvvvm_v: |
| 15960 | case VE::VFNMSBSvvvml: |
| 15961 | case VE::VFNMSBSvvvml_v: { |
| 15962 | // op: m |
| 15963 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 4), Fixups, STI); |
| 15964 | op &= UINT64_C(15); |
| 15965 | op <<= 48; |
| 15966 | Value |= op; |
| 15967 | // op: vx |
| 15968 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15969 | op &= UINT64_C(255); |
| 15970 | op <<= 24; |
| 15971 | Value |= op; |
| 15972 | // op: vy |
| 15973 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 15974 | op &= UINT64_C(255); |
| 15975 | op <<= 16; |
| 15976 | Value |= op; |
| 15977 | // op: vz |
| 15978 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 15979 | op &= UINT64_C(255); |
| 15980 | op <<= 8; |
| 15981 | Value |= op; |
| 15982 | // op: vw |
| 15983 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 15984 | op &= UINT64_C(255); |
| 15985 | Value |= op; |
| 15986 | break; |
| 15987 | } |
| 15988 | case VE::SFR: |
| 15989 | case VE::SIC: |
| 15990 | case VE::SMVL: |
| 15991 | case VE::SPM: |
| 15992 | case VE::SVL: { |
| 15993 | // op: sx |
| 15994 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 15995 | op &= UINT64_C(127); |
| 15996 | op <<= 48; |
| 15997 | Value |= op; |
| 15998 | break; |
| 15999 | } |
| 16000 | case VE::CVTDLi: |
| 16001 | case VE::CVTDLr: |
| 16002 | case VE::CVTDQi: |
| 16003 | case VE::CVTDQr: |
| 16004 | case VE::CVTDSi: |
| 16005 | case VE::CVTDSr: |
| 16006 | case VE::CVTDWi: |
| 16007 | case VE::CVTDWr: |
| 16008 | case VE::CVTQDi: |
| 16009 | case VE::CVTQDr: |
| 16010 | case VE::CVTQSi: |
| 16011 | case VE::CVTQSr: |
| 16012 | case VE::CVTSDi: |
| 16013 | case VE::CVTSDr: |
| 16014 | case VE::CVTSQi: |
| 16015 | case VE::CVTSQr: |
| 16016 | case VE::CVTSWi: |
| 16017 | case VE::CVTSWr: |
| 16018 | case VE::SMIR: { |
| 16019 | // op: sx |
| 16020 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16021 | op &= UINT64_C(127); |
| 16022 | op <<= 48; |
| 16023 | Value |= op; |
| 16024 | // op: sy |
| 16025 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16026 | op &= UINT64_C(127); |
| 16027 | op <<= 40; |
| 16028 | Value |= op; |
| 16029 | break; |
| 16030 | } |
| 16031 | case VE::ADDSLim: |
| 16032 | case VE::ADDSLrm: |
| 16033 | case VE::ADDSLrr: |
| 16034 | case VE::ADDSWSXim: |
| 16035 | case VE::ADDSWSXrm: |
| 16036 | case VE::ADDSWSXrr: |
| 16037 | case VE::ADDSWZXim: |
| 16038 | case VE::ADDSWZXrm: |
| 16039 | case VE::ADDSWZXrr: |
| 16040 | case VE::ADDULim: |
| 16041 | case VE::ADDULrm: |
| 16042 | case VE::ADDULrr: |
| 16043 | case VE::ADDUWim: |
| 16044 | case VE::ADDUWrm: |
| 16045 | case VE::ADDUWrr: |
| 16046 | case VE::ANDim: |
| 16047 | case VE::ANDrm: |
| 16048 | case VE::ANDrr: |
| 16049 | case VE::CMPSLim: |
| 16050 | case VE::CMPSLir: |
| 16051 | case VE::CMPSLrm: |
| 16052 | case VE::CMPSLrr: |
| 16053 | case VE::CMPSWSXim: |
| 16054 | case VE::CMPSWSXir: |
| 16055 | case VE::CMPSWSXrm: |
| 16056 | case VE::CMPSWSXrr: |
| 16057 | case VE::CMPSWZXim: |
| 16058 | case VE::CMPSWZXir: |
| 16059 | case VE::CMPSWZXrm: |
| 16060 | case VE::CMPSWZXrr: |
| 16061 | case VE::CMPULim: |
| 16062 | case VE::CMPULir: |
| 16063 | case VE::CMPULrm: |
| 16064 | case VE::CMPULrr: |
| 16065 | case VE::CMPUWim: |
| 16066 | case VE::CMPUWir: |
| 16067 | case VE::CMPUWrm: |
| 16068 | case VE::CMPUWrr: |
| 16069 | case VE::DIVSLim: |
| 16070 | case VE::DIVSLir: |
| 16071 | case VE::DIVSLrm: |
| 16072 | case VE::DIVSLrr: |
| 16073 | case VE::DIVSWSXim: |
| 16074 | case VE::DIVSWSXir: |
| 16075 | case VE::DIVSWSXrm: |
| 16076 | case VE::DIVSWSXrr: |
| 16077 | case VE::DIVSWZXim: |
| 16078 | case VE::DIVSWZXir: |
| 16079 | case VE::DIVSWZXrm: |
| 16080 | case VE::DIVSWZXrr: |
| 16081 | case VE::DIVULim: |
| 16082 | case VE::DIVULir: |
| 16083 | case VE::DIVULrm: |
| 16084 | case VE::DIVULrr: |
| 16085 | case VE::DIVUWim: |
| 16086 | case VE::DIVUWir: |
| 16087 | case VE::DIVUWrm: |
| 16088 | case VE::DIVUWrr: |
| 16089 | case VE::EQVim: |
| 16090 | case VE::EQVrm: |
| 16091 | case VE::EQVrr: |
| 16092 | case VE::FADDDim: |
| 16093 | case VE::FADDDir: |
| 16094 | case VE::FADDDrm: |
| 16095 | case VE::FADDDrr: |
| 16096 | case VE::FADDQim: |
| 16097 | case VE::FADDQir: |
| 16098 | case VE::FADDQrm: |
| 16099 | case VE::FADDQrr: |
| 16100 | case VE::FADDSim: |
| 16101 | case VE::FADDSir: |
| 16102 | case VE::FADDSrm: |
| 16103 | case VE::FADDSrr: |
| 16104 | case VE::FCMPDim: |
| 16105 | case VE::FCMPDir: |
| 16106 | case VE::FCMPDrm: |
| 16107 | case VE::FCMPDrr: |
| 16108 | case VE::FCMPQim: |
| 16109 | case VE::FCMPQir: |
| 16110 | case VE::FCMPQrm: |
| 16111 | case VE::FCMPQrr: |
| 16112 | case VE::FCMPSim: |
| 16113 | case VE::FCMPSir: |
| 16114 | case VE::FCMPSrm: |
| 16115 | case VE::FCMPSrr: |
| 16116 | case VE::FDIVDim: |
| 16117 | case VE::FDIVDir: |
| 16118 | case VE::FDIVDrm: |
| 16119 | case VE::FDIVDrr: |
| 16120 | case VE::FDIVSim: |
| 16121 | case VE::FDIVSir: |
| 16122 | case VE::FDIVSrm: |
| 16123 | case VE::FDIVSrr: |
| 16124 | case VE::FIDCRii: |
| 16125 | case VE::FIDCRri: |
| 16126 | case VE::FMAXDim: |
| 16127 | case VE::FMAXDir: |
| 16128 | case VE::FMAXDrm: |
| 16129 | case VE::FMAXDrr: |
| 16130 | case VE::FMAXSim: |
| 16131 | case VE::FMAXSir: |
| 16132 | case VE::FMAXSrm: |
| 16133 | case VE::FMAXSrr: |
| 16134 | case VE::FMINDim: |
| 16135 | case VE::FMINDir: |
| 16136 | case VE::FMINDrm: |
| 16137 | case VE::FMINDrr: |
| 16138 | case VE::FMINSim: |
| 16139 | case VE::FMINSir: |
| 16140 | case VE::FMINSrm: |
| 16141 | case VE::FMINSrr: |
| 16142 | case VE::FMULDim: |
| 16143 | case VE::FMULDir: |
| 16144 | case VE::FMULDrm: |
| 16145 | case VE::FMULDrr: |
| 16146 | case VE::FMULQim: |
| 16147 | case VE::FMULQir: |
| 16148 | case VE::FMULQrm: |
| 16149 | case VE::FMULQrr: |
| 16150 | case VE::FMULSim: |
| 16151 | case VE::FMULSir: |
| 16152 | case VE::FMULSrm: |
| 16153 | case VE::FMULSrr: |
| 16154 | case VE::FSUBDim: |
| 16155 | case VE::FSUBDir: |
| 16156 | case VE::FSUBDrm: |
| 16157 | case VE::FSUBDrr: |
| 16158 | case VE::FSUBQim: |
| 16159 | case VE::FSUBQir: |
| 16160 | case VE::FSUBQrm: |
| 16161 | case VE::FSUBQrr: |
| 16162 | case VE::FSUBSim: |
| 16163 | case VE::FSUBSir: |
| 16164 | case VE::FSUBSrm: |
| 16165 | case VE::FSUBSrr: |
| 16166 | case VE::LCRir: |
| 16167 | case VE::LCRiz: |
| 16168 | case VE::LCRrr: |
| 16169 | case VE::LCRrz: |
| 16170 | case VE::MAXSLim: |
| 16171 | case VE::MAXSLrm: |
| 16172 | case VE::MAXSLrr: |
| 16173 | case VE::MAXSWSXim: |
| 16174 | case VE::MAXSWSXrm: |
| 16175 | case VE::MAXSWSXrr: |
| 16176 | case VE::MAXSWZXim: |
| 16177 | case VE::MAXSWZXrm: |
| 16178 | case VE::MAXSWZXrr: |
| 16179 | case VE::MINSLim: |
| 16180 | case VE::MINSLrm: |
| 16181 | case VE::MINSLrr: |
| 16182 | case VE::MINSWSXim: |
| 16183 | case VE::MINSWSXrm: |
| 16184 | case VE::MINSWSXrr: |
| 16185 | case VE::MINSWZXim: |
| 16186 | case VE::MINSWZXrm: |
| 16187 | case VE::MINSWZXrr: |
| 16188 | case VE::MRGim: |
| 16189 | case VE::MRGir: |
| 16190 | case VE::MRGrm: |
| 16191 | case VE::MRGrr: |
| 16192 | case VE::MULSLWim: |
| 16193 | case VE::MULSLWrm: |
| 16194 | case VE::MULSLWrr: |
| 16195 | case VE::MULSLim: |
| 16196 | case VE::MULSLrm: |
| 16197 | case VE::MULSLrr: |
| 16198 | case VE::MULSWSXim: |
| 16199 | case VE::MULSWSXrm: |
| 16200 | case VE::MULSWSXrr: |
| 16201 | case VE::MULSWZXim: |
| 16202 | case VE::MULSWZXrm: |
| 16203 | case VE::MULSWZXrr: |
| 16204 | case VE::MULULim: |
| 16205 | case VE::MULULrm: |
| 16206 | case VE::MULULrr: |
| 16207 | case VE::MULUWim: |
| 16208 | case VE::MULUWrm: |
| 16209 | case VE::MULUWrr: |
| 16210 | case VE::NNDim: |
| 16211 | case VE::NNDir: |
| 16212 | case VE::NNDrm: |
| 16213 | case VE::NNDrr: |
| 16214 | case VE::ORim: |
| 16215 | case VE::ORrm: |
| 16216 | case VE::ORrr: |
| 16217 | case VE::SUBSLim: |
| 16218 | case VE::SUBSLir: |
| 16219 | case VE::SUBSLrm: |
| 16220 | case VE::SUBSLrr: |
| 16221 | case VE::SUBSWSXim: |
| 16222 | case VE::SUBSWSXir: |
| 16223 | case VE::SUBSWSXrm: |
| 16224 | case VE::SUBSWSXrr: |
| 16225 | case VE::SUBSWZXim: |
| 16226 | case VE::SUBSWZXir: |
| 16227 | case VE::SUBSWZXrm: |
| 16228 | case VE::SUBSWZXrr: |
| 16229 | case VE::SUBULim: |
| 16230 | case VE::SUBULir: |
| 16231 | case VE::SUBULrm: |
| 16232 | case VE::SUBULrr: |
| 16233 | case VE::SUBUWim: |
| 16234 | case VE::SUBUWir: |
| 16235 | case VE::SUBUWrm: |
| 16236 | case VE::SUBUWrr: |
| 16237 | case VE::TSCRirr: |
| 16238 | case VE::TSCRizr: |
| 16239 | case VE::TSCRrrr: |
| 16240 | case VE::TSCRrzr: |
| 16241 | case VE::XORim: |
| 16242 | case VE::XORrm: |
| 16243 | case VE::XORrr: { |
| 16244 | // op: sx |
| 16245 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16246 | op &= UINT64_C(127); |
| 16247 | op <<= 48; |
| 16248 | Value |= op; |
| 16249 | // op: sy |
| 16250 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16251 | op &= UINT64_C(127); |
| 16252 | op <<= 40; |
| 16253 | Value |= op; |
| 16254 | // op: sz |
| 16255 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16256 | op &= UINT64_C(127); |
| 16257 | op <<= 32; |
| 16258 | Value |= op; |
| 16259 | break; |
| 16260 | } |
| 16261 | case VE::CVTLDi: |
| 16262 | case VE::CVTLDr: |
| 16263 | case VE::CVTWDSXi: |
| 16264 | case VE::CVTWDSXr: |
| 16265 | case VE::CVTWDZXi: |
| 16266 | case VE::CVTWDZXr: |
| 16267 | case VE::CVTWSSXi: |
| 16268 | case VE::CVTWSSXr: |
| 16269 | case VE::CVTWSZXi: |
| 16270 | case VE::CVTWSZXr: { |
| 16271 | // op: sx |
| 16272 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16273 | op &= UINT64_C(127); |
| 16274 | op <<= 48; |
| 16275 | Value |= op; |
| 16276 | // op: sy |
| 16277 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16278 | op &= UINT64_C(127); |
| 16279 | op <<= 40; |
| 16280 | Value |= op; |
| 16281 | // op: rd |
| 16282 | op = getRDOpValue(MI, OpNo: 1, Fixups, STI); |
| 16283 | op &= UINT64_C(15); |
| 16284 | op <<= 32; |
| 16285 | Value |= op; |
| 16286 | break; |
| 16287 | } |
| 16288 | case VE::ADDSLri: |
| 16289 | case VE::ADDSWSXri: |
| 16290 | case VE::ADDSWZXri: |
| 16291 | case VE::ADDULri: |
| 16292 | case VE::ADDUWri: |
| 16293 | case VE::ANDri: |
| 16294 | case VE::BSWPmi: |
| 16295 | case VE::BSWPri: |
| 16296 | case VE::EQVri: |
| 16297 | case VE::MAXSLri: |
| 16298 | case VE::MAXSWSXri: |
| 16299 | case VE::MAXSWZXri: |
| 16300 | case VE::MINSLri: |
| 16301 | case VE::MINSWSXri: |
| 16302 | case VE::MINSWZXri: |
| 16303 | case VE::MULSLWri: |
| 16304 | case VE::MULSLri: |
| 16305 | case VE::MULSWSXri: |
| 16306 | case VE::MULSWZXri: |
| 16307 | case VE::MULULri: |
| 16308 | case VE::MULUWri: |
| 16309 | case VE::ORri: |
| 16310 | case VE::SLALmi: |
| 16311 | case VE::SLALmr: |
| 16312 | case VE::SLALri: |
| 16313 | case VE::SLALrr: |
| 16314 | case VE::SLAWSXmi: |
| 16315 | case VE::SLAWSXmr: |
| 16316 | case VE::SLAWSXri: |
| 16317 | case VE::SLAWSXrr: |
| 16318 | case VE::SLAWZXmi: |
| 16319 | case VE::SLAWZXmr: |
| 16320 | case VE::SLAWZXri: |
| 16321 | case VE::SLAWZXrr: |
| 16322 | case VE::SLLmi: |
| 16323 | case VE::SLLmr: |
| 16324 | case VE::SLLri: |
| 16325 | case VE::SLLrr: |
| 16326 | case VE::SRALmi: |
| 16327 | case VE::SRALmr: |
| 16328 | case VE::SRALri: |
| 16329 | case VE::SRALrr: |
| 16330 | case VE::SRAWSXmi: |
| 16331 | case VE::SRAWSXmr: |
| 16332 | case VE::SRAWSXri: |
| 16333 | case VE::SRAWSXrr: |
| 16334 | case VE::SRAWZXmi: |
| 16335 | case VE::SRAWZXmr: |
| 16336 | case VE::SRAWZXri: |
| 16337 | case VE::SRAWZXrr: |
| 16338 | case VE::SRLmi: |
| 16339 | case VE::SRLmr: |
| 16340 | case VE::SRLri: |
| 16341 | case VE::SRLrr: |
| 16342 | case VE::XORri: { |
| 16343 | // op: sx |
| 16344 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16345 | op &= UINT64_C(127); |
| 16346 | op <<= 48; |
| 16347 | Value |= op; |
| 16348 | // op: sy |
| 16349 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16350 | op &= UINT64_C(127); |
| 16351 | op <<= 40; |
| 16352 | Value |= op; |
| 16353 | // op: sz |
| 16354 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16355 | op &= UINT64_C(127); |
| 16356 | op <<= 32; |
| 16357 | Value |= op; |
| 16358 | break; |
| 16359 | } |
| 16360 | case VE::CMOVDim: |
| 16361 | case VE::CMOVDir: |
| 16362 | case VE::CMOVDrm: |
| 16363 | case VE::CMOVDrr: |
| 16364 | case VE::CMOVLim: |
| 16365 | case VE::CMOVLir: |
| 16366 | case VE::CMOVLrm: |
| 16367 | case VE::CMOVLrr: |
| 16368 | case VE::CMOVSim: |
| 16369 | case VE::CMOVSir: |
| 16370 | case VE::CMOVSrm: |
| 16371 | case VE::CMOVSrr: |
| 16372 | case VE::CMOVWim: |
| 16373 | case VE::CMOVWir: |
| 16374 | case VE::CMOVWrm: |
| 16375 | case VE::CMOVWrr: { |
| 16376 | // op: sx |
| 16377 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16378 | op &= UINT64_C(127); |
| 16379 | op <<= 48; |
| 16380 | Value |= op; |
| 16381 | // op: sy |
| 16382 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16383 | op &= UINT64_C(127); |
| 16384 | op <<= 40; |
| 16385 | Value |= op; |
| 16386 | // op: sz |
| 16387 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16388 | op &= UINT64_C(127); |
| 16389 | op <<= 32; |
| 16390 | Value |= op; |
| 16391 | // op: cfw |
| 16392 | op = getCCOpValue(MI, OpNo: 1, Fixups, STI); |
| 16393 | op &= UINT64_C(15); |
| 16394 | Value |= op; |
| 16395 | break; |
| 16396 | } |
| 16397 | case VE::LVSvi: |
| 16398 | case VE::LVSvr: { |
| 16399 | // op: sx |
| 16400 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16401 | op &= UINT64_C(127); |
| 16402 | op <<= 48; |
| 16403 | Value |= op; |
| 16404 | // op: sy |
| 16405 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16406 | op &= UINT64_C(127); |
| 16407 | op <<= 40; |
| 16408 | Value |= op; |
| 16409 | // op: vx |
| 16410 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16411 | op &= UINT64_C(255); |
| 16412 | op <<= 24; |
| 16413 | Value |= op; |
| 16414 | break; |
| 16415 | } |
| 16416 | case VE::SVMmi: |
| 16417 | case VE::SVMmr: { |
| 16418 | // op: sx |
| 16419 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16420 | op &= UINT64_C(127); |
| 16421 | op <<= 48; |
| 16422 | Value |= op; |
| 16423 | // op: sy |
| 16424 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16425 | op &= UINT64_C(127); |
| 16426 | op <<= 40; |
| 16427 | Value |= op; |
| 16428 | // op: vz |
| 16429 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16430 | op &= UINT64_C(255); |
| 16431 | op <<= 8; |
| 16432 | Value |= op; |
| 16433 | break; |
| 16434 | } |
| 16435 | case VE::SRDmri: |
| 16436 | case VE::SRDmrr: |
| 16437 | case VE::SRDrri: |
| 16438 | case VE::SRDrrr: { |
| 16439 | // op: sx |
| 16440 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16441 | op &= UINT64_C(127); |
| 16442 | op <<= 48; |
| 16443 | Value |= op; |
| 16444 | // op: sy |
| 16445 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16446 | op &= UINT64_C(127); |
| 16447 | op <<= 40; |
| 16448 | Value |= op; |
| 16449 | // op: sz |
| 16450 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16451 | op &= UINT64_C(127); |
| 16452 | op <<= 32; |
| 16453 | Value |= op; |
| 16454 | break; |
| 16455 | } |
| 16456 | case VE::SLDrmi: |
| 16457 | case VE::SLDrmr: |
| 16458 | case VE::SLDrri: |
| 16459 | case VE::SLDrrr: { |
| 16460 | // op: sx |
| 16461 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16462 | op &= UINT64_C(127); |
| 16463 | op <<= 48; |
| 16464 | Value |= op; |
| 16465 | // op: sy |
| 16466 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16467 | op &= UINT64_C(127); |
| 16468 | op <<= 40; |
| 16469 | Value |= op; |
| 16470 | // op: sz |
| 16471 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16472 | op &= UINT64_C(127); |
| 16473 | op <<= 32; |
| 16474 | Value |= op; |
| 16475 | break; |
| 16476 | } |
| 16477 | case VE::BRVm: |
| 16478 | case VE::BRVr: |
| 16479 | case VE::LDZm: |
| 16480 | case VE::LDZr: |
| 16481 | case VE::PCNTm: |
| 16482 | case VE::PCNTr: { |
| 16483 | // op: sx |
| 16484 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16485 | op &= UINT64_C(127); |
| 16486 | op <<= 48; |
| 16487 | Value |= op; |
| 16488 | // op: sz |
| 16489 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16490 | op &= UINT64_C(127); |
| 16491 | op <<= 32; |
| 16492 | Value |= op; |
| 16493 | break; |
| 16494 | } |
| 16495 | case VE::LHMBri: |
| 16496 | case VE::LHMBzi: |
| 16497 | case VE::LHMHri: |
| 16498 | case VE::LHMHzi: |
| 16499 | case VE::LHMLri: |
| 16500 | case VE::LHMLzi: |
| 16501 | case VE::LHMWri: |
| 16502 | case VE::LHMWzi: { |
| 16503 | // op: sx |
| 16504 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16505 | op &= UINT64_C(127); |
| 16506 | op <<= 48; |
| 16507 | Value |= op; |
| 16508 | // op: sz |
| 16509 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16510 | op &= UINT64_C(127); |
| 16511 | op <<= 32; |
| 16512 | Value |= op; |
| 16513 | // op: imm32 |
| 16514 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16515 | op &= UINT64_C(4294967295); |
| 16516 | Value |= op; |
| 16517 | break; |
| 16518 | } |
| 16519 | case VE::BSICrii: |
| 16520 | case VE::BSICrri: |
| 16521 | case VE::BSICzii: |
| 16522 | case VE::BSICzri: |
| 16523 | case VE::DLDLSXrii: |
| 16524 | case VE::DLDLSXrri: |
| 16525 | case VE::DLDLSXzii: |
| 16526 | case VE::DLDLSXzri: |
| 16527 | case VE::DLDLZXrii: |
| 16528 | case VE::DLDLZXrri: |
| 16529 | case VE::DLDLZXzii: |
| 16530 | case VE::DLDLZXzri: |
| 16531 | case VE::DLDUrii: |
| 16532 | case VE::DLDUrri: |
| 16533 | case VE::DLDUzii: |
| 16534 | case VE::DLDUzri: |
| 16535 | case VE::DLDrii: |
| 16536 | case VE::DLDrri: |
| 16537 | case VE::DLDzii: |
| 16538 | case VE::DLDzri: |
| 16539 | case VE::LD1BSXrii: |
| 16540 | case VE::LD1BSXrri: |
| 16541 | case VE::LD1BSXzii: |
| 16542 | case VE::LD1BSXzri: |
| 16543 | case VE::LD1BZXrii: |
| 16544 | case VE::LD1BZXrri: |
| 16545 | case VE::LD1BZXzii: |
| 16546 | case VE::LD1BZXzri: |
| 16547 | case VE::LD2BSXrii: |
| 16548 | case VE::LD2BSXrri: |
| 16549 | case VE::LD2BSXzii: |
| 16550 | case VE::LD2BSXzri: |
| 16551 | case VE::LD2BZXrii: |
| 16552 | case VE::LD2BZXrri: |
| 16553 | case VE::LD2BZXzii: |
| 16554 | case VE::LD2BZXzri: |
| 16555 | case VE::LDLSXrii: |
| 16556 | case VE::LDLSXrri: |
| 16557 | case VE::LDLSXzii: |
| 16558 | case VE::LDLSXzri: |
| 16559 | case VE::LDLZXrii: |
| 16560 | case VE::LDLZXrri: |
| 16561 | case VE::LDLZXzii: |
| 16562 | case VE::LDLZXzri: |
| 16563 | case VE::LDUrii: |
| 16564 | case VE::LDUrri: |
| 16565 | case VE::LDUzii: |
| 16566 | case VE::LDUzri: |
| 16567 | case VE::LDrii: |
| 16568 | case VE::LDrri: |
| 16569 | case VE::LDzii: |
| 16570 | case VE::LDzri: |
| 16571 | case VE::LEASLrii: |
| 16572 | case VE::LEASLrri: |
| 16573 | case VE::LEASLzii: |
| 16574 | case VE::LEASLzri: |
| 16575 | case VE::LEArii: |
| 16576 | case VE::LEArri: |
| 16577 | case VE::LEAzii: |
| 16578 | case VE::LEAzri: { |
| 16579 | // op: sx |
| 16580 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16581 | op &= UINT64_C(127); |
| 16582 | op <<= 48; |
| 16583 | Value |= op; |
| 16584 | // op: sz |
| 16585 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16586 | op &= UINT64_C(127); |
| 16587 | op <<= 32; |
| 16588 | Value |= op; |
| 16589 | // op: sy |
| 16590 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16591 | op &= UINT64_C(127); |
| 16592 | op <<= 40; |
| 16593 | Value |= op; |
| 16594 | // op: imm32 |
| 16595 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16596 | op &= UINT64_C(4294967295); |
| 16597 | Value |= op; |
| 16598 | break; |
| 16599 | } |
| 16600 | case VE::ATMAMrii: |
| 16601 | case VE::ATMAMrir: |
| 16602 | case VE::ATMAMzii: |
| 16603 | case VE::ATMAMzir: |
| 16604 | case VE::CASLrii: |
| 16605 | case VE::CASLrir: |
| 16606 | case VE::CASLzii: |
| 16607 | case VE::CASLzir: |
| 16608 | case VE::CASWrii: |
| 16609 | case VE::CASWrir: |
| 16610 | case VE::CASWzii: |
| 16611 | case VE::CASWzir: |
| 16612 | case VE::TS1AMLrii: |
| 16613 | case VE::TS1AMLrir: |
| 16614 | case VE::TS1AMLzii: |
| 16615 | case VE::TS1AMLzir: |
| 16616 | case VE::TS1AMWrii: |
| 16617 | case VE::TS1AMWrir: |
| 16618 | case VE::TS1AMWzii: |
| 16619 | case VE::TS1AMWzir: |
| 16620 | case VE::TS2AMrii: |
| 16621 | case VE::TS2AMrir: |
| 16622 | case VE::TS2AMzii: |
| 16623 | case VE::TS2AMzir: |
| 16624 | case VE::TS3AMrii: |
| 16625 | case VE::TS3AMrir: |
| 16626 | case VE::TS3AMzii: |
| 16627 | case VE::TS3AMzir: { |
| 16628 | // op: sx |
| 16629 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16630 | op &= UINT64_C(127); |
| 16631 | op <<= 48; |
| 16632 | Value |= op; |
| 16633 | // op: sz |
| 16634 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16635 | op &= UINT64_C(127); |
| 16636 | op <<= 32; |
| 16637 | Value |= op; |
| 16638 | // op: sy |
| 16639 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16640 | op &= UINT64_C(127); |
| 16641 | op <<= 40; |
| 16642 | Value |= op; |
| 16643 | // op: imm32 |
| 16644 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16645 | op &= UINT64_C(4294967295); |
| 16646 | Value |= op; |
| 16647 | break; |
| 16648 | } |
| 16649 | case VE::SCRirr: |
| 16650 | case VE::SCRizr: |
| 16651 | case VE::SCRrrr: |
| 16652 | case VE::SCRrzr: { |
| 16653 | // op: sx |
| 16654 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16655 | op &= UINT64_C(127); |
| 16656 | op <<= 48; |
| 16657 | Value |= op; |
| 16658 | // op: sy |
| 16659 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16660 | op &= UINT64_C(127); |
| 16661 | op <<= 40; |
| 16662 | Value |= op; |
| 16663 | // op: sz |
| 16664 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16665 | op &= UINT64_C(127); |
| 16666 | op <<= 32; |
| 16667 | Value |= op; |
| 16668 | break; |
| 16669 | } |
| 16670 | case VE::SHMBri: |
| 16671 | case VE::SHMBzi: |
| 16672 | case VE::SHMHri: |
| 16673 | case VE::SHMHzi: |
| 16674 | case VE::SHMLri: |
| 16675 | case VE::SHMLzi: |
| 16676 | case VE::SHMWri: |
| 16677 | case VE::SHMWzi: { |
| 16678 | // op: sx |
| 16679 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16680 | op &= UINT64_C(127); |
| 16681 | op <<= 48; |
| 16682 | Value |= op; |
| 16683 | // op: sz |
| 16684 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16685 | op &= UINT64_C(127); |
| 16686 | op <<= 32; |
| 16687 | Value |= op; |
| 16688 | // op: imm32 |
| 16689 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16690 | op &= UINT64_C(4294967295); |
| 16691 | Value |= op; |
| 16692 | break; |
| 16693 | } |
| 16694 | case VE::ST1Brii: |
| 16695 | case VE::ST1Brri: |
| 16696 | case VE::ST1Bzii: |
| 16697 | case VE::ST1Bzri: |
| 16698 | case VE::ST2Brii: |
| 16699 | case VE::ST2Brri: |
| 16700 | case VE::ST2Bzii: |
| 16701 | case VE::ST2Bzri: |
| 16702 | case VE::STLrii: |
| 16703 | case VE::STLrri: |
| 16704 | case VE::STLzii: |
| 16705 | case VE::STLzri: |
| 16706 | case VE::STUrii: |
| 16707 | case VE::STUrri: |
| 16708 | case VE::STUzii: |
| 16709 | case VE::STUzri: |
| 16710 | case VE::STrii: |
| 16711 | case VE::STrri: |
| 16712 | case VE::STzii: |
| 16713 | case VE::STzri: { |
| 16714 | // op: sx |
| 16715 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 16716 | op &= UINT64_C(127); |
| 16717 | op <<= 48; |
| 16718 | Value |= op; |
| 16719 | // op: sz |
| 16720 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16721 | op &= UINT64_C(127); |
| 16722 | op <<= 32; |
| 16723 | Value |= op; |
| 16724 | // op: sy |
| 16725 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16726 | op &= UINT64_C(127); |
| 16727 | op <<= 40; |
| 16728 | Value |= op; |
| 16729 | // op: imm32 |
| 16730 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 16731 | op &= UINT64_C(4294967295); |
| 16732 | Value |= op; |
| 16733 | break; |
| 16734 | } |
| 16735 | case VE::LFRi: |
| 16736 | case VE::LFRr: |
| 16737 | case VE::LPM: |
| 16738 | case VE::LVIXi: |
| 16739 | case VE::LVIXr: |
| 16740 | case VE::LVLi: |
| 16741 | case VE::LVLr: { |
| 16742 | // op: sy |
| 16743 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16744 | op &= UINT64_C(127); |
| 16745 | op <<= 40; |
| 16746 | Value |= op; |
| 16747 | break; |
| 16748 | } |
| 16749 | case VE::PFCHVNCir: |
| 16750 | case VE::PFCHVNCirL: |
| 16751 | case VE::PFCHVNCirl: |
| 16752 | case VE::PFCHVNCiz: |
| 16753 | case VE::PFCHVNCizL: |
| 16754 | case VE::PFCHVNCizl: |
| 16755 | case VE::PFCHVNCrr: |
| 16756 | case VE::PFCHVNCrrL: |
| 16757 | case VE::PFCHVNCrrl: |
| 16758 | case VE::PFCHVNCrz: |
| 16759 | case VE::PFCHVNCrzL: |
| 16760 | case VE::PFCHVNCrzl: |
| 16761 | case VE::PFCHVir: |
| 16762 | case VE::PFCHVirL: |
| 16763 | case VE::PFCHVirl: |
| 16764 | case VE::PFCHViz: |
| 16765 | case VE::PFCHVizL: |
| 16766 | case VE::PFCHVizl: |
| 16767 | case VE::PFCHVrr: |
| 16768 | case VE::PFCHVrrL: |
| 16769 | case VE::PFCHVrrl: |
| 16770 | case VE::PFCHVrz: |
| 16771 | case VE::PFCHVrzL: |
| 16772 | case VE::PFCHVrzl: { |
| 16773 | // op: sy |
| 16774 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 16775 | op &= UINT64_C(127); |
| 16776 | op <<= 40; |
| 16777 | Value |= op; |
| 16778 | // op: sz |
| 16779 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 16780 | op &= UINT64_C(127); |
| 16781 | op <<= 32; |
| 16782 | Value |= op; |
| 16783 | break; |
| 16784 | } |
| 16785 | case VE::VST2DNCOTirv: |
| 16786 | case VE::VST2DNCOTirvL: |
| 16787 | case VE::VST2DNCOTirvl: |
| 16788 | case VE::VST2DNCOTizv: |
| 16789 | case VE::VST2DNCOTizvL: |
| 16790 | case VE::VST2DNCOTizvl: |
| 16791 | case VE::VST2DNCOTrrv: |
| 16792 | case VE::VST2DNCOTrrvL: |
| 16793 | case VE::VST2DNCOTrrvl: |
| 16794 | case VE::VST2DNCOTrzv: |
| 16795 | case VE::VST2DNCOTrzvL: |
| 16796 | case VE::VST2DNCOTrzvl: |
| 16797 | case VE::VST2DNCirv: |
| 16798 | case VE::VST2DNCirvL: |
| 16799 | case VE::VST2DNCirvl: |
| 16800 | case VE::VST2DNCizv: |
| 16801 | case VE::VST2DNCizvL: |
| 16802 | case VE::VST2DNCizvl: |
| 16803 | case VE::VST2DNCrrv: |
| 16804 | case VE::VST2DNCrrvL: |
| 16805 | case VE::VST2DNCrrvl: |
| 16806 | case VE::VST2DNCrzv: |
| 16807 | case VE::VST2DNCrzvL: |
| 16808 | case VE::VST2DNCrzvl: |
| 16809 | case VE::VST2DOTirv: |
| 16810 | case VE::VST2DOTirvL: |
| 16811 | case VE::VST2DOTirvl: |
| 16812 | case VE::VST2DOTizv: |
| 16813 | case VE::VST2DOTizvL: |
| 16814 | case VE::VST2DOTizvl: |
| 16815 | case VE::VST2DOTrrv: |
| 16816 | case VE::VST2DOTrrvL: |
| 16817 | case VE::VST2DOTrrvl: |
| 16818 | case VE::VST2DOTrzv: |
| 16819 | case VE::VST2DOTrzvL: |
| 16820 | case VE::VST2DOTrzvl: |
| 16821 | case VE::VST2Dirv: |
| 16822 | case VE::VST2DirvL: |
| 16823 | case VE::VST2Dirvl: |
| 16824 | case VE::VST2Dizv: |
| 16825 | case VE::VST2DizvL: |
| 16826 | case VE::VST2Dizvl: |
| 16827 | case VE::VST2Drrv: |
| 16828 | case VE::VST2DrrvL: |
| 16829 | case VE::VST2Drrvl: |
| 16830 | case VE::VST2Drzv: |
| 16831 | case VE::VST2DrzvL: |
| 16832 | case VE::VST2Drzvl: |
| 16833 | case VE::VSTL2DNCOTirv: |
| 16834 | case VE::VSTL2DNCOTirvL: |
| 16835 | case VE::VSTL2DNCOTirvl: |
| 16836 | case VE::VSTL2DNCOTizv: |
| 16837 | case VE::VSTL2DNCOTizvL: |
| 16838 | case VE::VSTL2DNCOTizvl: |
| 16839 | case VE::VSTL2DNCOTrrv: |
| 16840 | case VE::VSTL2DNCOTrrvL: |
| 16841 | case VE::VSTL2DNCOTrrvl: |
| 16842 | case VE::VSTL2DNCOTrzv: |
| 16843 | case VE::VSTL2DNCOTrzvL: |
| 16844 | case VE::VSTL2DNCOTrzvl: |
| 16845 | case VE::VSTL2DNCirv: |
| 16846 | case VE::VSTL2DNCirvL: |
| 16847 | case VE::VSTL2DNCirvl: |
| 16848 | case VE::VSTL2DNCizv: |
| 16849 | case VE::VSTL2DNCizvL: |
| 16850 | case VE::VSTL2DNCizvl: |
| 16851 | case VE::VSTL2DNCrrv: |
| 16852 | case VE::VSTL2DNCrrvL: |
| 16853 | case VE::VSTL2DNCrrvl: |
| 16854 | case VE::VSTL2DNCrzv: |
| 16855 | case VE::VSTL2DNCrzvL: |
| 16856 | case VE::VSTL2DNCrzvl: |
| 16857 | case VE::VSTL2DOTirv: |
| 16858 | case VE::VSTL2DOTirvL: |
| 16859 | case VE::VSTL2DOTirvl: |
| 16860 | case VE::VSTL2DOTizv: |
| 16861 | case VE::VSTL2DOTizvL: |
| 16862 | case VE::VSTL2DOTizvl: |
| 16863 | case VE::VSTL2DOTrrv: |
| 16864 | case VE::VSTL2DOTrrvL: |
| 16865 | case VE::VSTL2DOTrrvl: |
| 16866 | case VE::VSTL2DOTrzv: |
| 16867 | case VE::VSTL2DOTrzvL: |
| 16868 | case VE::VSTL2DOTrzvl: |
| 16869 | case VE::VSTL2Dirv: |
| 16870 | case VE::VSTL2DirvL: |
| 16871 | case VE::VSTL2Dirvl: |
| 16872 | case VE::VSTL2Dizv: |
| 16873 | case VE::VSTL2DizvL: |
| 16874 | case VE::VSTL2Dizvl: |
| 16875 | case VE::VSTL2Drrv: |
| 16876 | case VE::VSTL2DrrvL: |
| 16877 | case VE::VSTL2Drrvl: |
| 16878 | case VE::VSTL2Drzv: |
| 16879 | case VE::VSTL2DrzvL: |
| 16880 | case VE::VSTL2Drzvl: |
| 16881 | case VE::VSTLNCOTirv: |
| 16882 | case VE::VSTLNCOTirvL: |
| 16883 | case VE::VSTLNCOTirvl: |
| 16884 | case VE::VSTLNCOTizv: |
| 16885 | case VE::VSTLNCOTizvL: |
| 16886 | case VE::VSTLNCOTizvl: |
| 16887 | case VE::VSTLNCOTrrv: |
| 16888 | case VE::VSTLNCOTrrvL: |
| 16889 | case VE::VSTLNCOTrrvl: |
| 16890 | case VE::VSTLNCOTrzv: |
| 16891 | case VE::VSTLNCOTrzvL: |
| 16892 | case VE::VSTLNCOTrzvl: |
| 16893 | case VE::VSTLNCirv: |
| 16894 | case VE::VSTLNCirvL: |
| 16895 | case VE::VSTLNCirvl: |
| 16896 | case VE::VSTLNCizv: |
| 16897 | case VE::VSTLNCizvL: |
| 16898 | case VE::VSTLNCizvl: |
| 16899 | case VE::VSTLNCrrv: |
| 16900 | case VE::VSTLNCrrvL: |
| 16901 | case VE::VSTLNCrrvl: |
| 16902 | case VE::VSTLNCrzv: |
| 16903 | case VE::VSTLNCrzvL: |
| 16904 | case VE::VSTLNCrzvl: |
| 16905 | case VE::VSTLOTirv: |
| 16906 | case VE::VSTLOTirvL: |
| 16907 | case VE::VSTLOTirvl: |
| 16908 | case VE::VSTLOTizv: |
| 16909 | case VE::VSTLOTizvL: |
| 16910 | case VE::VSTLOTizvl: |
| 16911 | case VE::VSTLOTrrv: |
| 16912 | case VE::VSTLOTrrvL: |
| 16913 | case VE::VSTLOTrrvl: |
| 16914 | case VE::VSTLOTrzv: |
| 16915 | case VE::VSTLOTrzvL: |
| 16916 | case VE::VSTLOTrzvl: |
| 16917 | case VE::VSTLirv: |
| 16918 | case VE::VSTLirvL: |
| 16919 | case VE::VSTLirvl: |
| 16920 | case VE::VSTLizv: |
| 16921 | case VE::VSTLizvL: |
| 16922 | case VE::VSTLizvl: |
| 16923 | case VE::VSTLrrv: |
| 16924 | case VE::VSTLrrvL: |
| 16925 | case VE::VSTLrrvl: |
| 16926 | case VE::VSTLrzv: |
| 16927 | case VE::VSTLrzvL: |
| 16928 | case VE::VSTLrzvl: |
| 16929 | case VE::VSTNCOTirv: |
| 16930 | case VE::VSTNCOTirvL: |
| 16931 | case VE::VSTNCOTirvl: |
| 16932 | case VE::VSTNCOTizv: |
| 16933 | case VE::VSTNCOTizvL: |
| 16934 | case VE::VSTNCOTizvl: |
| 16935 | case VE::VSTNCOTrrv: |
| 16936 | case VE::VSTNCOTrrvL: |
| 16937 | case VE::VSTNCOTrrvl: |
| 16938 | case VE::VSTNCOTrzv: |
| 16939 | case VE::VSTNCOTrzvL: |
| 16940 | case VE::VSTNCOTrzvl: |
| 16941 | case VE::VSTNCirv: |
| 16942 | case VE::VSTNCirvL: |
| 16943 | case VE::VSTNCirvl: |
| 16944 | case VE::VSTNCizv: |
| 16945 | case VE::VSTNCizvL: |
| 16946 | case VE::VSTNCizvl: |
| 16947 | case VE::VSTNCrrv: |
| 16948 | case VE::VSTNCrrvL: |
| 16949 | case VE::VSTNCrrvl: |
| 16950 | case VE::VSTNCrzv: |
| 16951 | case VE::VSTNCrzvL: |
| 16952 | case VE::VSTNCrzvl: |
| 16953 | case VE::VSTOTirv: |
| 16954 | case VE::VSTOTirvL: |
| 16955 | case VE::VSTOTirvl: |
| 16956 | case VE::VSTOTizv: |
| 16957 | case VE::VSTOTizvL: |
| 16958 | case VE::VSTOTizvl: |
| 16959 | case VE::VSTOTrrv: |
| 16960 | case VE::VSTOTrrvL: |
| 16961 | case VE::VSTOTrrvl: |
| 16962 | case VE::VSTOTrzv: |
| 16963 | case VE::VSTOTrzvL: |
| 16964 | case VE::VSTOTrzvl: |
| 16965 | case VE::VSTU2DNCOTirv: |
| 16966 | case VE::VSTU2DNCOTirvL: |
| 16967 | case VE::VSTU2DNCOTirvl: |
| 16968 | case VE::VSTU2DNCOTizv: |
| 16969 | case VE::VSTU2DNCOTizvL: |
| 16970 | case VE::VSTU2DNCOTizvl: |
| 16971 | case VE::VSTU2DNCOTrrv: |
| 16972 | case VE::VSTU2DNCOTrrvL: |
| 16973 | case VE::VSTU2DNCOTrrvl: |
| 16974 | case VE::VSTU2DNCOTrzv: |
| 16975 | case VE::VSTU2DNCOTrzvL: |
| 16976 | case VE::VSTU2DNCOTrzvl: |
| 16977 | case VE::VSTU2DNCirv: |
| 16978 | case VE::VSTU2DNCirvL: |
| 16979 | case VE::VSTU2DNCirvl: |
| 16980 | case VE::VSTU2DNCizv: |
| 16981 | case VE::VSTU2DNCizvL: |
| 16982 | case VE::VSTU2DNCizvl: |
| 16983 | case VE::VSTU2DNCrrv: |
| 16984 | case VE::VSTU2DNCrrvL: |
| 16985 | case VE::VSTU2DNCrrvl: |
| 16986 | case VE::VSTU2DNCrzv: |
| 16987 | case VE::VSTU2DNCrzvL: |
| 16988 | case VE::VSTU2DNCrzvl: |
| 16989 | case VE::VSTU2DOTirv: |
| 16990 | case VE::VSTU2DOTirvL: |
| 16991 | case VE::VSTU2DOTirvl: |
| 16992 | case VE::VSTU2DOTizv: |
| 16993 | case VE::VSTU2DOTizvL: |
| 16994 | case VE::VSTU2DOTizvl: |
| 16995 | case VE::VSTU2DOTrrv: |
| 16996 | case VE::VSTU2DOTrrvL: |
| 16997 | case VE::VSTU2DOTrrvl: |
| 16998 | case VE::VSTU2DOTrzv: |
| 16999 | case VE::VSTU2DOTrzvL: |
| 17000 | case VE::VSTU2DOTrzvl: |
| 17001 | case VE::VSTU2Dirv: |
| 17002 | case VE::VSTU2DirvL: |
| 17003 | case VE::VSTU2Dirvl: |
| 17004 | case VE::VSTU2Dizv: |
| 17005 | case VE::VSTU2DizvL: |
| 17006 | case VE::VSTU2Dizvl: |
| 17007 | case VE::VSTU2Drrv: |
| 17008 | case VE::VSTU2DrrvL: |
| 17009 | case VE::VSTU2Drrvl: |
| 17010 | case VE::VSTU2Drzv: |
| 17011 | case VE::VSTU2DrzvL: |
| 17012 | case VE::VSTU2Drzvl: |
| 17013 | case VE::VSTUNCOTirv: |
| 17014 | case VE::VSTUNCOTirvL: |
| 17015 | case VE::VSTUNCOTirvl: |
| 17016 | case VE::VSTUNCOTizv: |
| 17017 | case VE::VSTUNCOTizvL: |
| 17018 | case VE::VSTUNCOTizvl: |
| 17019 | case VE::VSTUNCOTrrv: |
| 17020 | case VE::VSTUNCOTrrvL: |
| 17021 | case VE::VSTUNCOTrrvl: |
| 17022 | case VE::VSTUNCOTrzv: |
| 17023 | case VE::VSTUNCOTrzvL: |
| 17024 | case VE::VSTUNCOTrzvl: |
| 17025 | case VE::VSTUNCirv: |
| 17026 | case VE::VSTUNCirvL: |
| 17027 | case VE::VSTUNCirvl: |
| 17028 | case VE::VSTUNCizv: |
| 17029 | case VE::VSTUNCizvL: |
| 17030 | case VE::VSTUNCizvl: |
| 17031 | case VE::VSTUNCrrv: |
| 17032 | case VE::VSTUNCrrvL: |
| 17033 | case VE::VSTUNCrrvl: |
| 17034 | case VE::VSTUNCrzv: |
| 17035 | case VE::VSTUNCrzvL: |
| 17036 | case VE::VSTUNCrzvl: |
| 17037 | case VE::VSTUOTirv: |
| 17038 | case VE::VSTUOTirvL: |
| 17039 | case VE::VSTUOTirvl: |
| 17040 | case VE::VSTUOTizv: |
| 17041 | case VE::VSTUOTizvL: |
| 17042 | case VE::VSTUOTizvl: |
| 17043 | case VE::VSTUOTrrv: |
| 17044 | case VE::VSTUOTrrvL: |
| 17045 | case VE::VSTUOTrrvl: |
| 17046 | case VE::VSTUOTrzv: |
| 17047 | case VE::VSTUOTrzvL: |
| 17048 | case VE::VSTUOTrzvl: |
| 17049 | case VE::VSTUirv: |
| 17050 | case VE::VSTUirvL: |
| 17051 | case VE::VSTUirvl: |
| 17052 | case VE::VSTUizv: |
| 17053 | case VE::VSTUizvL: |
| 17054 | case VE::VSTUizvl: |
| 17055 | case VE::VSTUrrv: |
| 17056 | case VE::VSTUrrvL: |
| 17057 | case VE::VSTUrrvl: |
| 17058 | case VE::VSTUrzv: |
| 17059 | case VE::VSTUrzvL: |
| 17060 | case VE::VSTUrzvl: |
| 17061 | case VE::VSTirv: |
| 17062 | case VE::VSTirvL: |
| 17063 | case VE::VSTirvl: |
| 17064 | case VE::VSTizv: |
| 17065 | case VE::VSTizvL: |
| 17066 | case VE::VSTizvl: |
| 17067 | case VE::VSTrrv: |
| 17068 | case VE::VSTrrvL: |
| 17069 | case VE::VSTrrvl: |
| 17070 | case VE::VSTrzv: |
| 17071 | case VE::VSTrzvL: |
| 17072 | case VE::VSTrzvl: { |
| 17073 | // op: sy |
| 17074 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 17075 | op &= UINT64_C(127); |
| 17076 | op <<= 40; |
| 17077 | Value |= op; |
| 17078 | // op: sz |
| 17079 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 17080 | op &= UINT64_C(127); |
| 17081 | op <<= 32; |
| 17082 | Value |= op; |
| 17083 | // op: vx |
| 17084 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 17085 | op &= UINT64_C(255); |
| 17086 | op <<= 24; |
| 17087 | Value |= op; |
| 17088 | break; |
| 17089 | } |
| 17090 | case VE::LSVim: |
| 17091 | case VE::LSVim_v: |
| 17092 | case VE::LSVir: |
| 17093 | case VE::LSVir_v: |
| 17094 | case VE::LSVrm: |
| 17095 | case VE::LSVrm_v: |
| 17096 | case VE::LSVrr: |
| 17097 | case VE::LSVrr_v: |
| 17098 | case VE::LVMim: |
| 17099 | case VE::LVMim_m: |
| 17100 | case VE::LVMir: |
| 17101 | case VE::LVMir_m: |
| 17102 | case VE::LVMrm: |
| 17103 | case VE::LVMrm_m: |
| 17104 | case VE::LVMrr: |
| 17105 | case VE::LVMrr_m: |
| 17106 | case VE::VLD2DNCir: |
| 17107 | case VE::VLD2DNCirL: |
| 17108 | case VE::VLD2DNCirL_v: |
| 17109 | case VE::VLD2DNCir_v: |
| 17110 | case VE::VLD2DNCirl: |
| 17111 | case VE::VLD2DNCirl_v: |
| 17112 | case VE::VLD2DNCiz: |
| 17113 | case VE::VLD2DNCizL: |
| 17114 | case VE::VLD2DNCizL_v: |
| 17115 | case VE::VLD2DNCiz_v: |
| 17116 | case VE::VLD2DNCizl: |
| 17117 | case VE::VLD2DNCizl_v: |
| 17118 | case VE::VLD2DNCrr: |
| 17119 | case VE::VLD2DNCrrL: |
| 17120 | case VE::VLD2DNCrrL_v: |
| 17121 | case VE::VLD2DNCrr_v: |
| 17122 | case VE::VLD2DNCrrl: |
| 17123 | case VE::VLD2DNCrrl_v: |
| 17124 | case VE::VLD2DNCrz: |
| 17125 | case VE::VLD2DNCrzL: |
| 17126 | case VE::VLD2DNCrzL_v: |
| 17127 | case VE::VLD2DNCrz_v: |
| 17128 | case VE::VLD2DNCrzl: |
| 17129 | case VE::VLD2DNCrzl_v: |
| 17130 | case VE::VLD2Dir: |
| 17131 | case VE::VLD2DirL: |
| 17132 | case VE::VLD2DirL_v: |
| 17133 | case VE::VLD2Dir_v: |
| 17134 | case VE::VLD2Dirl: |
| 17135 | case VE::VLD2Dirl_v: |
| 17136 | case VE::VLD2Diz: |
| 17137 | case VE::VLD2DizL: |
| 17138 | case VE::VLD2DizL_v: |
| 17139 | case VE::VLD2Diz_v: |
| 17140 | case VE::VLD2Dizl: |
| 17141 | case VE::VLD2Dizl_v: |
| 17142 | case VE::VLD2Drr: |
| 17143 | case VE::VLD2DrrL: |
| 17144 | case VE::VLD2DrrL_v: |
| 17145 | case VE::VLD2Drr_v: |
| 17146 | case VE::VLD2Drrl: |
| 17147 | case VE::VLD2Drrl_v: |
| 17148 | case VE::VLD2Drz: |
| 17149 | case VE::VLD2DrzL: |
| 17150 | case VE::VLD2DrzL_v: |
| 17151 | case VE::VLD2Drz_v: |
| 17152 | case VE::VLD2Drzl: |
| 17153 | case VE::VLD2Drzl_v: |
| 17154 | case VE::VLDL2DSXNCir: |
| 17155 | case VE::VLDL2DSXNCirL: |
| 17156 | case VE::VLDL2DSXNCirL_v: |
| 17157 | case VE::VLDL2DSXNCir_v: |
| 17158 | case VE::VLDL2DSXNCirl: |
| 17159 | case VE::VLDL2DSXNCirl_v: |
| 17160 | case VE::VLDL2DSXNCiz: |
| 17161 | case VE::VLDL2DSXNCizL: |
| 17162 | case VE::VLDL2DSXNCizL_v: |
| 17163 | case VE::VLDL2DSXNCiz_v: |
| 17164 | case VE::VLDL2DSXNCizl: |
| 17165 | case VE::VLDL2DSXNCizl_v: |
| 17166 | case VE::VLDL2DSXNCrr: |
| 17167 | case VE::VLDL2DSXNCrrL: |
| 17168 | case VE::VLDL2DSXNCrrL_v: |
| 17169 | case VE::VLDL2DSXNCrr_v: |
| 17170 | case VE::VLDL2DSXNCrrl: |
| 17171 | case VE::VLDL2DSXNCrrl_v: |
| 17172 | case VE::VLDL2DSXNCrz: |
| 17173 | case VE::VLDL2DSXNCrzL: |
| 17174 | case VE::VLDL2DSXNCrzL_v: |
| 17175 | case VE::VLDL2DSXNCrz_v: |
| 17176 | case VE::VLDL2DSXNCrzl: |
| 17177 | case VE::VLDL2DSXNCrzl_v: |
| 17178 | case VE::VLDL2DSXir: |
| 17179 | case VE::VLDL2DSXirL: |
| 17180 | case VE::VLDL2DSXirL_v: |
| 17181 | case VE::VLDL2DSXir_v: |
| 17182 | case VE::VLDL2DSXirl: |
| 17183 | case VE::VLDL2DSXirl_v: |
| 17184 | case VE::VLDL2DSXiz: |
| 17185 | case VE::VLDL2DSXizL: |
| 17186 | case VE::VLDL2DSXizL_v: |
| 17187 | case VE::VLDL2DSXiz_v: |
| 17188 | case VE::VLDL2DSXizl: |
| 17189 | case VE::VLDL2DSXizl_v: |
| 17190 | case VE::VLDL2DSXrr: |
| 17191 | case VE::VLDL2DSXrrL: |
| 17192 | case VE::VLDL2DSXrrL_v: |
| 17193 | case VE::VLDL2DSXrr_v: |
| 17194 | case VE::VLDL2DSXrrl: |
| 17195 | case VE::VLDL2DSXrrl_v: |
| 17196 | case VE::VLDL2DSXrz: |
| 17197 | case VE::VLDL2DSXrzL: |
| 17198 | case VE::VLDL2DSXrzL_v: |
| 17199 | case VE::VLDL2DSXrz_v: |
| 17200 | case VE::VLDL2DSXrzl: |
| 17201 | case VE::VLDL2DSXrzl_v: |
| 17202 | case VE::VLDL2DZXNCir: |
| 17203 | case VE::VLDL2DZXNCirL: |
| 17204 | case VE::VLDL2DZXNCirL_v: |
| 17205 | case VE::VLDL2DZXNCir_v: |
| 17206 | case VE::VLDL2DZXNCirl: |
| 17207 | case VE::VLDL2DZXNCirl_v: |
| 17208 | case VE::VLDL2DZXNCiz: |
| 17209 | case VE::VLDL2DZXNCizL: |
| 17210 | case VE::VLDL2DZXNCizL_v: |
| 17211 | case VE::VLDL2DZXNCiz_v: |
| 17212 | case VE::VLDL2DZXNCizl: |
| 17213 | case VE::VLDL2DZXNCizl_v: |
| 17214 | case VE::VLDL2DZXNCrr: |
| 17215 | case VE::VLDL2DZXNCrrL: |
| 17216 | case VE::VLDL2DZXNCrrL_v: |
| 17217 | case VE::VLDL2DZXNCrr_v: |
| 17218 | case VE::VLDL2DZXNCrrl: |
| 17219 | case VE::VLDL2DZXNCrrl_v: |
| 17220 | case VE::VLDL2DZXNCrz: |
| 17221 | case VE::VLDL2DZXNCrzL: |
| 17222 | case VE::VLDL2DZXNCrzL_v: |
| 17223 | case VE::VLDL2DZXNCrz_v: |
| 17224 | case VE::VLDL2DZXNCrzl: |
| 17225 | case VE::VLDL2DZXNCrzl_v: |
| 17226 | case VE::VLDL2DZXir: |
| 17227 | case VE::VLDL2DZXirL: |
| 17228 | case VE::VLDL2DZXirL_v: |
| 17229 | case VE::VLDL2DZXir_v: |
| 17230 | case VE::VLDL2DZXirl: |
| 17231 | case VE::VLDL2DZXirl_v: |
| 17232 | case VE::VLDL2DZXiz: |
| 17233 | case VE::VLDL2DZXizL: |
| 17234 | case VE::VLDL2DZXizL_v: |
| 17235 | case VE::VLDL2DZXiz_v: |
| 17236 | case VE::VLDL2DZXizl: |
| 17237 | case VE::VLDL2DZXizl_v: |
| 17238 | case VE::VLDL2DZXrr: |
| 17239 | case VE::VLDL2DZXrrL: |
| 17240 | case VE::VLDL2DZXrrL_v: |
| 17241 | case VE::VLDL2DZXrr_v: |
| 17242 | case VE::VLDL2DZXrrl: |
| 17243 | case VE::VLDL2DZXrrl_v: |
| 17244 | case VE::VLDL2DZXrz: |
| 17245 | case VE::VLDL2DZXrzL: |
| 17246 | case VE::VLDL2DZXrzL_v: |
| 17247 | case VE::VLDL2DZXrz_v: |
| 17248 | case VE::VLDL2DZXrzl: |
| 17249 | case VE::VLDL2DZXrzl_v: |
| 17250 | case VE::VLDLSXNCir: |
| 17251 | case VE::VLDLSXNCirL: |
| 17252 | case VE::VLDLSXNCirL_v: |
| 17253 | case VE::VLDLSXNCir_v: |
| 17254 | case VE::VLDLSXNCirl: |
| 17255 | case VE::VLDLSXNCirl_v: |
| 17256 | case VE::VLDLSXNCiz: |
| 17257 | case VE::VLDLSXNCizL: |
| 17258 | case VE::VLDLSXNCizL_v: |
| 17259 | case VE::VLDLSXNCiz_v: |
| 17260 | case VE::VLDLSXNCizl: |
| 17261 | case VE::VLDLSXNCizl_v: |
| 17262 | case VE::VLDLSXNCrr: |
| 17263 | case VE::VLDLSXNCrrL: |
| 17264 | case VE::VLDLSXNCrrL_v: |
| 17265 | case VE::VLDLSXNCrr_v: |
| 17266 | case VE::VLDLSXNCrrl: |
| 17267 | case VE::VLDLSXNCrrl_v: |
| 17268 | case VE::VLDLSXNCrz: |
| 17269 | case VE::VLDLSXNCrzL: |
| 17270 | case VE::VLDLSXNCrzL_v: |
| 17271 | case VE::VLDLSXNCrz_v: |
| 17272 | case VE::VLDLSXNCrzl: |
| 17273 | case VE::VLDLSXNCrzl_v: |
| 17274 | case VE::VLDLSXir: |
| 17275 | case VE::VLDLSXirL: |
| 17276 | case VE::VLDLSXirL_v: |
| 17277 | case VE::VLDLSXir_v: |
| 17278 | case VE::VLDLSXirl: |
| 17279 | case VE::VLDLSXirl_v: |
| 17280 | case VE::VLDLSXiz: |
| 17281 | case VE::VLDLSXizL: |
| 17282 | case VE::VLDLSXizL_v: |
| 17283 | case VE::VLDLSXiz_v: |
| 17284 | case VE::VLDLSXizl: |
| 17285 | case VE::VLDLSXizl_v: |
| 17286 | case VE::VLDLSXrr: |
| 17287 | case VE::VLDLSXrrL: |
| 17288 | case VE::VLDLSXrrL_v: |
| 17289 | case VE::VLDLSXrr_v: |
| 17290 | case VE::VLDLSXrrl: |
| 17291 | case VE::VLDLSXrrl_v: |
| 17292 | case VE::VLDLSXrz: |
| 17293 | case VE::VLDLSXrzL: |
| 17294 | case VE::VLDLSXrzL_v: |
| 17295 | case VE::VLDLSXrz_v: |
| 17296 | case VE::VLDLSXrzl: |
| 17297 | case VE::VLDLSXrzl_v: |
| 17298 | case VE::VLDLZXNCir: |
| 17299 | case VE::VLDLZXNCirL: |
| 17300 | case VE::VLDLZXNCirL_v: |
| 17301 | case VE::VLDLZXNCir_v: |
| 17302 | case VE::VLDLZXNCirl: |
| 17303 | case VE::VLDLZXNCirl_v: |
| 17304 | case VE::VLDLZXNCiz: |
| 17305 | case VE::VLDLZXNCizL: |
| 17306 | case VE::VLDLZXNCizL_v: |
| 17307 | case VE::VLDLZXNCiz_v: |
| 17308 | case VE::VLDLZXNCizl: |
| 17309 | case VE::VLDLZXNCizl_v: |
| 17310 | case VE::VLDLZXNCrr: |
| 17311 | case VE::VLDLZXNCrrL: |
| 17312 | case VE::VLDLZXNCrrL_v: |
| 17313 | case VE::VLDLZXNCrr_v: |
| 17314 | case VE::VLDLZXNCrrl: |
| 17315 | case VE::VLDLZXNCrrl_v: |
| 17316 | case VE::VLDLZXNCrz: |
| 17317 | case VE::VLDLZXNCrzL: |
| 17318 | case VE::VLDLZXNCrzL_v: |
| 17319 | case VE::VLDLZXNCrz_v: |
| 17320 | case VE::VLDLZXNCrzl: |
| 17321 | case VE::VLDLZXNCrzl_v: |
| 17322 | case VE::VLDLZXir: |
| 17323 | case VE::VLDLZXirL: |
| 17324 | case VE::VLDLZXirL_v: |
| 17325 | case VE::VLDLZXir_v: |
| 17326 | case VE::VLDLZXirl: |
| 17327 | case VE::VLDLZXirl_v: |
| 17328 | case VE::VLDLZXiz: |
| 17329 | case VE::VLDLZXizL: |
| 17330 | case VE::VLDLZXizL_v: |
| 17331 | case VE::VLDLZXiz_v: |
| 17332 | case VE::VLDLZXizl: |
| 17333 | case VE::VLDLZXizl_v: |
| 17334 | case VE::VLDLZXrr: |
| 17335 | case VE::VLDLZXrrL: |
| 17336 | case VE::VLDLZXrrL_v: |
| 17337 | case VE::VLDLZXrr_v: |
| 17338 | case VE::VLDLZXrrl: |
| 17339 | case VE::VLDLZXrrl_v: |
| 17340 | case VE::VLDLZXrz: |
| 17341 | case VE::VLDLZXrzL: |
| 17342 | case VE::VLDLZXrzL_v: |
| 17343 | case VE::VLDLZXrz_v: |
| 17344 | case VE::VLDLZXrzl: |
| 17345 | case VE::VLDLZXrzl_v: |
| 17346 | case VE::VLDNCir: |
| 17347 | case VE::VLDNCirL: |
| 17348 | case VE::VLDNCirL_v: |
| 17349 | case VE::VLDNCir_v: |
| 17350 | case VE::VLDNCirl: |
| 17351 | case VE::VLDNCirl_v: |
| 17352 | case VE::VLDNCiz: |
| 17353 | case VE::VLDNCizL: |
| 17354 | case VE::VLDNCizL_v: |
| 17355 | case VE::VLDNCiz_v: |
| 17356 | case VE::VLDNCizl: |
| 17357 | case VE::VLDNCizl_v: |
| 17358 | case VE::VLDNCrr: |
| 17359 | case VE::VLDNCrrL: |
| 17360 | case VE::VLDNCrrL_v: |
| 17361 | case VE::VLDNCrr_v: |
| 17362 | case VE::VLDNCrrl: |
| 17363 | case VE::VLDNCrrl_v: |
| 17364 | case VE::VLDNCrz: |
| 17365 | case VE::VLDNCrzL: |
| 17366 | case VE::VLDNCrzL_v: |
| 17367 | case VE::VLDNCrz_v: |
| 17368 | case VE::VLDNCrzl: |
| 17369 | case VE::VLDNCrzl_v: |
| 17370 | case VE::VLDU2DNCir: |
| 17371 | case VE::VLDU2DNCirL: |
| 17372 | case VE::VLDU2DNCirL_v: |
| 17373 | case VE::VLDU2DNCir_v: |
| 17374 | case VE::VLDU2DNCirl: |
| 17375 | case VE::VLDU2DNCirl_v: |
| 17376 | case VE::VLDU2DNCiz: |
| 17377 | case VE::VLDU2DNCizL: |
| 17378 | case VE::VLDU2DNCizL_v: |
| 17379 | case VE::VLDU2DNCiz_v: |
| 17380 | case VE::VLDU2DNCizl: |
| 17381 | case VE::VLDU2DNCizl_v: |
| 17382 | case VE::VLDU2DNCrr: |
| 17383 | case VE::VLDU2DNCrrL: |
| 17384 | case VE::VLDU2DNCrrL_v: |
| 17385 | case VE::VLDU2DNCrr_v: |
| 17386 | case VE::VLDU2DNCrrl: |
| 17387 | case VE::VLDU2DNCrrl_v: |
| 17388 | case VE::VLDU2DNCrz: |
| 17389 | case VE::VLDU2DNCrzL: |
| 17390 | case VE::VLDU2DNCrzL_v: |
| 17391 | case VE::VLDU2DNCrz_v: |
| 17392 | case VE::VLDU2DNCrzl: |
| 17393 | case VE::VLDU2DNCrzl_v: |
| 17394 | case VE::VLDU2Dir: |
| 17395 | case VE::VLDU2DirL: |
| 17396 | case VE::VLDU2DirL_v: |
| 17397 | case VE::VLDU2Dir_v: |
| 17398 | case VE::VLDU2Dirl: |
| 17399 | case VE::VLDU2Dirl_v: |
| 17400 | case VE::VLDU2Diz: |
| 17401 | case VE::VLDU2DizL: |
| 17402 | case VE::VLDU2DizL_v: |
| 17403 | case VE::VLDU2Diz_v: |
| 17404 | case VE::VLDU2Dizl: |
| 17405 | case VE::VLDU2Dizl_v: |
| 17406 | case VE::VLDU2Drr: |
| 17407 | case VE::VLDU2DrrL: |
| 17408 | case VE::VLDU2DrrL_v: |
| 17409 | case VE::VLDU2Drr_v: |
| 17410 | case VE::VLDU2Drrl: |
| 17411 | case VE::VLDU2Drrl_v: |
| 17412 | case VE::VLDU2Drz: |
| 17413 | case VE::VLDU2DrzL: |
| 17414 | case VE::VLDU2DrzL_v: |
| 17415 | case VE::VLDU2Drz_v: |
| 17416 | case VE::VLDU2Drzl: |
| 17417 | case VE::VLDU2Drzl_v: |
| 17418 | case VE::VLDUNCir: |
| 17419 | case VE::VLDUNCirL: |
| 17420 | case VE::VLDUNCirL_v: |
| 17421 | case VE::VLDUNCir_v: |
| 17422 | case VE::VLDUNCirl: |
| 17423 | case VE::VLDUNCirl_v: |
| 17424 | case VE::VLDUNCiz: |
| 17425 | case VE::VLDUNCizL: |
| 17426 | case VE::VLDUNCizL_v: |
| 17427 | case VE::VLDUNCiz_v: |
| 17428 | case VE::VLDUNCizl: |
| 17429 | case VE::VLDUNCizl_v: |
| 17430 | case VE::VLDUNCrr: |
| 17431 | case VE::VLDUNCrrL: |
| 17432 | case VE::VLDUNCrrL_v: |
| 17433 | case VE::VLDUNCrr_v: |
| 17434 | case VE::VLDUNCrrl: |
| 17435 | case VE::VLDUNCrrl_v: |
| 17436 | case VE::VLDUNCrz: |
| 17437 | case VE::VLDUNCrzL: |
| 17438 | case VE::VLDUNCrzL_v: |
| 17439 | case VE::VLDUNCrz_v: |
| 17440 | case VE::VLDUNCrzl: |
| 17441 | case VE::VLDUNCrzl_v: |
| 17442 | case VE::VLDUir: |
| 17443 | case VE::VLDUirL: |
| 17444 | case VE::VLDUirL_v: |
| 17445 | case VE::VLDUir_v: |
| 17446 | case VE::VLDUirl: |
| 17447 | case VE::VLDUirl_v: |
| 17448 | case VE::VLDUiz: |
| 17449 | case VE::VLDUizL: |
| 17450 | case VE::VLDUizL_v: |
| 17451 | case VE::VLDUiz_v: |
| 17452 | case VE::VLDUizl: |
| 17453 | case VE::VLDUizl_v: |
| 17454 | case VE::VLDUrr: |
| 17455 | case VE::VLDUrrL: |
| 17456 | case VE::VLDUrrL_v: |
| 17457 | case VE::VLDUrr_v: |
| 17458 | case VE::VLDUrrl: |
| 17459 | case VE::VLDUrrl_v: |
| 17460 | case VE::VLDUrz: |
| 17461 | case VE::VLDUrzL: |
| 17462 | case VE::VLDUrzL_v: |
| 17463 | case VE::VLDUrz_v: |
| 17464 | case VE::VLDUrzl: |
| 17465 | case VE::VLDUrzl_v: |
| 17466 | case VE::VLDir: |
| 17467 | case VE::VLDirL: |
| 17468 | case VE::VLDirL_v: |
| 17469 | case VE::VLDir_v: |
| 17470 | case VE::VLDirl: |
| 17471 | case VE::VLDirl_v: |
| 17472 | case VE::VLDiz: |
| 17473 | case VE::VLDizL: |
| 17474 | case VE::VLDizL_v: |
| 17475 | case VE::VLDiz_v: |
| 17476 | case VE::VLDizl: |
| 17477 | case VE::VLDizl_v: |
| 17478 | case VE::VLDrr: |
| 17479 | case VE::VLDrrL: |
| 17480 | case VE::VLDrrL_v: |
| 17481 | case VE::VLDrr_v: |
| 17482 | case VE::VLDrrl: |
| 17483 | case VE::VLDrrl_v: |
| 17484 | case VE::VLDrz: |
| 17485 | case VE::VLDrzL: |
| 17486 | case VE::VLDrzL_v: |
| 17487 | case VE::VLDrz_v: |
| 17488 | case VE::VLDrzl: |
| 17489 | case VE::VLDrzl_v: { |
| 17490 | // op: sy |
| 17491 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 17492 | op &= UINT64_C(127); |
| 17493 | op <<= 40; |
| 17494 | Value |= op; |
| 17495 | // op: sz |
| 17496 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 17497 | op &= UINT64_C(127); |
| 17498 | op <<= 32; |
| 17499 | Value |= op; |
| 17500 | // op: vx |
| 17501 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 17502 | op &= UINT64_C(255); |
| 17503 | op <<= 24; |
| 17504 | Value |= op; |
| 17505 | break; |
| 17506 | } |
| 17507 | case VE::VSCLNCOTsirv: |
| 17508 | case VE::VSCLNCOTsirvL: |
| 17509 | case VE::VSCLNCOTsirvl: |
| 17510 | case VE::VSCLNCOTsizv: |
| 17511 | case VE::VSCLNCOTsizvL: |
| 17512 | case VE::VSCLNCOTsizvl: |
| 17513 | case VE::VSCLNCOTsrrv: |
| 17514 | case VE::VSCLNCOTsrrvL: |
| 17515 | case VE::VSCLNCOTsrrvl: |
| 17516 | case VE::VSCLNCOTsrzv: |
| 17517 | case VE::VSCLNCOTsrzvL: |
| 17518 | case VE::VSCLNCOTsrzvl: |
| 17519 | case VE::VSCLNCsirv: |
| 17520 | case VE::VSCLNCsirvL: |
| 17521 | case VE::VSCLNCsirvl: |
| 17522 | case VE::VSCLNCsizv: |
| 17523 | case VE::VSCLNCsizvL: |
| 17524 | case VE::VSCLNCsizvl: |
| 17525 | case VE::VSCLNCsrrv: |
| 17526 | case VE::VSCLNCsrrvL: |
| 17527 | case VE::VSCLNCsrrvl: |
| 17528 | case VE::VSCLNCsrzv: |
| 17529 | case VE::VSCLNCsrzvL: |
| 17530 | case VE::VSCLNCsrzvl: |
| 17531 | case VE::VSCLOTsirv: |
| 17532 | case VE::VSCLOTsirvL: |
| 17533 | case VE::VSCLOTsirvl: |
| 17534 | case VE::VSCLOTsizv: |
| 17535 | case VE::VSCLOTsizvL: |
| 17536 | case VE::VSCLOTsizvl: |
| 17537 | case VE::VSCLOTsrrv: |
| 17538 | case VE::VSCLOTsrrvL: |
| 17539 | case VE::VSCLOTsrrvl: |
| 17540 | case VE::VSCLOTsrzv: |
| 17541 | case VE::VSCLOTsrzvL: |
| 17542 | case VE::VSCLOTsrzvl: |
| 17543 | case VE::VSCLsirv: |
| 17544 | case VE::VSCLsirvL: |
| 17545 | case VE::VSCLsirvl: |
| 17546 | case VE::VSCLsizv: |
| 17547 | case VE::VSCLsizvL: |
| 17548 | case VE::VSCLsizvl: |
| 17549 | case VE::VSCLsrrv: |
| 17550 | case VE::VSCLsrrvL: |
| 17551 | case VE::VSCLsrrvl: |
| 17552 | case VE::VSCLsrzv: |
| 17553 | case VE::VSCLsrzvL: |
| 17554 | case VE::VSCLsrzvl: |
| 17555 | case VE::VSCNCOTsirv: |
| 17556 | case VE::VSCNCOTsirvL: |
| 17557 | case VE::VSCNCOTsirvl: |
| 17558 | case VE::VSCNCOTsizv: |
| 17559 | case VE::VSCNCOTsizvL: |
| 17560 | case VE::VSCNCOTsizvl: |
| 17561 | case VE::VSCNCOTsrrv: |
| 17562 | case VE::VSCNCOTsrrvL: |
| 17563 | case VE::VSCNCOTsrrvl: |
| 17564 | case VE::VSCNCOTsrzv: |
| 17565 | case VE::VSCNCOTsrzvL: |
| 17566 | case VE::VSCNCOTsrzvl: |
| 17567 | case VE::VSCNCsirv: |
| 17568 | case VE::VSCNCsirvL: |
| 17569 | case VE::VSCNCsirvl: |
| 17570 | case VE::VSCNCsizv: |
| 17571 | case VE::VSCNCsizvL: |
| 17572 | case VE::VSCNCsizvl: |
| 17573 | case VE::VSCNCsrrv: |
| 17574 | case VE::VSCNCsrrvL: |
| 17575 | case VE::VSCNCsrrvl: |
| 17576 | case VE::VSCNCsrzv: |
| 17577 | case VE::VSCNCsrzvL: |
| 17578 | case VE::VSCNCsrzvl: |
| 17579 | case VE::VSCOTsirv: |
| 17580 | case VE::VSCOTsirvL: |
| 17581 | case VE::VSCOTsirvl: |
| 17582 | case VE::VSCOTsizv: |
| 17583 | case VE::VSCOTsizvL: |
| 17584 | case VE::VSCOTsizvl: |
| 17585 | case VE::VSCOTsrrv: |
| 17586 | case VE::VSCOTsrrvL: |
| 17587 | case VE::VSCOTsrrvl: |
| 17588 | case VE::VSCOTsrzv: |
| 17589 | case VE::VSCOTsrzvL: |
| 17590 | case VE::VSCOTsrzvl: |
| 17591 | case VE::VSCUNCOTsirv: |
| 17592 | case VE::VSCUNCOTsirvL: |
| 17593 | case VE::VSCUNCOTsirvl: |
| 17594 | case VE::VSCUNCOTsizv: |
| 17595 | case VE::VSCUNCOTsizvL: |
| 17596 | case VE::VSCUNCOTsizvl: |
| 17597 | case VE::VSCUNCOTsrrv: |
| 17598 | case VE::VSCUNCOTsrrvL: |
| 17599 | case VE::VSCUNCOTsrrvl: |
| 17600 | case VE::VSCUNCOTsrzv: |
| 17601 | case VE::VSCUNCOTsrzvL: |
| 17602 | case VE::VSCUNCOTsrzvl: |
| 17603 | case VE::VSCUNCsirv: |
| 17604 | case VE::VSCUNCsirvL: |
| 17605 | case VE::VSCUNCsirvl: |
| 17606 | case VE::VSCUNCsizv: |
| 17607 | case VE::VSCUNCsizvL: |
| 17608 | case VE::VSCUNCsizvl: |
| 17609 | case VE::VSCUNCsrrv: |
| 17610 | case VE::VSCUNCsrrvL: |
| 17611 | case VE::VSCUNCsrrvl: |
| 17612 | case VE::VSCUNCsrzv: |
| 17613 | case VE::VSCUNCsrzvL: |
| 17614 | case VE::VSCUNCsrzvl: |
| 17615 | case VE::VSCUOTsirv: |
| 17616 | case VE::VSCUOTsirvL: |
| 17617 | case VE::VSCUOTsirvl: |
| 17618 | case VE::VSCUOTsizv: |
| 17619 | case VE::VSCUOTsizvL: |
| 17620 | case VE::VSCUOTsizvl: |
| 17621 | case VE::VSCUOTsrrv: |
| 17622 | case VE::VSCUOTsrrvL: |
| 17623 | case VE::VSCUOTsrrvl: |
| 17624 | case VE::VSCUOTsrzv: |
| 17625 | case VE::VSCUOTsrzvL: |
| 17626 | case VE::VSCUOTsrzvl: |
| 17627 | case VE::VSCUsirv: |
| 17628 | case VE::VSCUsirvL: |
| 17629 | case VE::VSCUsirvl: |
| 17630 | case VE::VSCUsizv: |
| 17631 | case VE::VSCUsizvL: |
| 17632 | case VE::VSCUsizvl: |
| 17633 | case VE::VSCUsrrv: |
| 17634 | case VE::VSCUsrrvL: |
| 17635 | case VE::VSCUsrrvl: |
| 17636 | case VE::VSCUsrzv: |
| 17637 | case VE::VSCUsrzvL: |
| 17638 | case VE::VSCUsrzvl: |
| 17639 | case VE::VSCsirv: |
| 17640 | case VE::VSCsirvL: |
| 17641 | case VE::VSCsirvl: |
| 17642 | case VE::VSCsizv: |
| 17643 | case VE::VSCsizvL: |
| 17644 | case VE::VSCsizvl: |
| 17645 | case VE::VSCsrrv: |
| 17646 | case VE::VSCsrrvL: |
| 17647 | case VE::VSCsrrvl: |
| 17648 | case VE::VSCsrzv: |
| 17649 | case VE::VSCsrzvL: |
| 17650 | case VE::VSCsrzvl: { |
| 17651 | // op: sy |
| 17652 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 17653 | op &= UINT64_C(127); |
| 17654 | op <<= 40; |
| 17655 | Value |= op; |
| 17656 | // op: sz |
| 17657 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 17658 | op &= UINT64_C(127); |
| 17659 | op <<= 32; |
| 17660 | Value |= op; |
| 17661 | // op: vx |
| 17662 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 17663 | op &= UINT64_C(255); |
| 17664 | op <<= 24; |
| 17665 | Value |= op; |
| 17666 | // op: sw |
| 17667 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 17668 | op &= UINT64_C(127); |
| 17669 | Value |= op; |
| 17670 | break; |
| 17671 | } |
| 17672 | case VE::VSCLNCOTvirv: |
| 17673 | case VE::VSCLNCOTvirvL: |
| 17674 | case VE::VSCLNCOTvirvl: |
| 17675 | case VE::VSCLNCOTvizv: |
| 17676 | case VE::VSCLNCOTvizvL: |
| 17677 | case VE::VSCLNCOTvizvl: |
| 17678 | case VE::VSCLNCOTvrrv: |
| 17679 | case VE::VSCLNCOTvrrvL: |
| 17680 | case VE::VSCLNCOTvrrvl: |
| 17681 | case VE::VSCLNCOTvrzv: |
| 17682 | case VE::VSCLNCOTvrzvL: |
| 17683 | case VE::VSCLNCOTvrzvl: |
| 17684 | case VE::VSCLNCvirv: |
| 17685 | case VE::VSCLNCvirvL: |
| 17686 | case VE::VSCLNCvirvl: |
| 17687 | case VE::VSCLNCvizv: |
| 17688 | case VE::VSCLNCvizvL: |
| 17689 | case VE::VSCLNCvizvl: |
| 17690 | case VE::VSCLNCvrrv: |
| 17691 | case VE::VSCLNCvrrvL: |
| 17692 | case VE::VSCLNCvrrvl: |
| 17693 | case VE::VSCLNCvrzv: |
| 17694 | case VE::VSCLNCvrzvL: |
| 17695 | case VE::VSCLNCvrzvl: |
| 17696 | case VE::VSCLOTvirv: |
| 17697 | case VE::VSCLOTvirvL: |
| 17698 | case VE::VSCLOTvirvl: |
| 17699 | case VE::VSCLOTvizv: |
| 17700 | case VE::VSCLOTvizvL: |
| 17701 | case VE::VSCLOTvizvl: |
| 17702 | case VE::VSCLOTvrrv: |
| 17703 | case VE::VSCLOTvrrvL: |
| 17704 | case VE::VSCLOTvrrvl: |
| 17705 | case VE::VSCLOTvrzv: |
| 17706 | case VE::VSCLOTvrzvL: |
| 17707 | case VE::VSCLOTvrzvl: |
| 17708 | case VE::VSCLvirv: |
| 17709 | case VE::VSCLvirvL: |
| 17710 | case VE::VSCLvirvl: |
| 17711 | case VE::VSCLvizv: |
| 17712 | case VE::VSCLvizvL: |
| 17713 | case VE::VSCLvizvl: |
| 17714 | case VE::VSCLvrrv: |
| 17715 | case VE::VSCLvrrvL: |
| 17716 | case VE::VSCLvrrvl: |
| 17717 | case VE::VSCLvrzv: |
| 17718 | case VE::VSCLvrzvL: |
| 17719 | case VE::VSCLvrzvl: |
| 17720 | case VE::VSCNCOTvirv: |
| 17721 | case VE::VSCNCOTvirvL: |
| 17722 | case VE::VSCNCOTvirvl: |
| 17723 | case VE::VSCNCOTvizv: |
| 17724 | case VE::VSCNCOTvizvL: |
| 17725 | case VE::VSCNCOTvizvl: |
| 17726 | case VE::VSCNCOTvrrv: |
| 17727 | case VE::VSCNCOTvrrvL: |
| 17728 | case VE::VSCNCOTvrrvl: |
| 17729 | case VE::VSCNCOTvrzv: |
| 17730 | case VE::VSCNCOTvrzvL: |
| 17731 | case VE::VSCNCOTvrzvl: |
| 17732 | case VE::VSCNCvirv: |
| 17733 | case VE::VSCNCvirvL: |
| 17734 | case VE::VSCNCvirvl: |
| 17735 | case VE::VSCNCvizv: |
| 17736 | case VE::VSCNCvizvL: |
| 17737 | case VE::VSCNCvizvl: |
| 17738 | case VE::VSCNCvrrv: |
| 17739 | case VE::VSCNCvrrvL: |
| 17740 | case VE::VSCNCvrrvl: |
| 17741 | case VE::VSCNCvrzv: |
| 17742 | case VE::VSCNCvrzvL: |
| 17743 | case VE::VSCNCvrzvl: |
| 17744 | case VE::VSCOTvirv: |
| 17745 | case VE::VSCOTvirvL: |
| 17746 | case VE::VSCOTvirvl: |
| 17747 | case VE::VSCOTvizv: |
| 17748 | case VE::VSCOTvizvL: |
| 17749 | case VE::VSCOTvizvl: |
| 17750 | case VE::VSCOTvrrv: |
| 17751 | case VE::VSCOTvrrvL: |
| 17752 | case VE::VSCOTvrrvl: |
| 17753 | case VE::VSCOTvrzv: |
| 17754 | case VE::VSCOTvrzvL: |
| 17755 | case VE::VSCOTvrzvl: |
| 17756 | case VE::VSCUNCOTvirv: |
| 17757 | case VE::VSCUNCOTvirvL: |
| 17758 | case VE::VSCUNCOTvirvl: |
| 17759 | case VE::VSCUNCOTvizv: |
| 17760 | case VE::VSCUNCOTvizvL: |
| 17761 | case VE::VSCUNCOTvizvl: |
| 17762 | case VE::VSCUNCOTvrrv: |
| 17763 | case VE::VSCUNCOTvrrvL: |
| 17764 | case VE::VSCUNCOTvrrvl: |
| 17765 | case VE::VSCUNCOTvrzv: |
| 17766 | case VE::VSCUNCOTvrzvL: |
| 17767 | case VE::VSCUNCOTvrzvl: |
| 17768 | case VE::VSCUNCvirv: |
| 17769 | case VE::VSCUNCvirvL: |
| 17770 | case VE::VSCUNCvirvl: |
| 17771 | case VE::VSCUNCvizv: |
| 17772 | case VE::VSCUNCvizvL: |
| 17773 | case VE::VSCUNCvizvl: |
| 17774 | case VE::VSCUNCvrrv: |
| 17775 | case VE::VSCUNCvrrvL: |
| 17776 | case VE::VSCUNCvrrvl: |
| 17777 | case VE::VSCUNCvrzv: |
| 17778 | case VE::VSCUNCvrzvL: |
| 17779 | case VE::VSCUNCvrzvl: |
| 17780 | case VE::VSCUOTvirv: |
| 17781 | case VE::VSCUOTvirvL: |
| 17782 | case VE::VSCUOTvirvl: |
| 17783 | case VE::VSCUOTvizv: |
| 17784 | case VE::VSCUOTvizvL: |
| 17785 | case VE::VSCUOTvizvl: |
| 17786 | case VE::VSCUOTvrrv: |
| 17787 | case VE::VSCUOTvrrvL: |
| 17788 | case VE::VSCUOTvrrvl: |
| 17789 | case VE::VSCUOTvrzv: |
| 17790 | case VE::VSCUOTvrzvL: |
| 17791 | case VE::VSCUOTvrzvl: |
| 17792 | case VE::VSCUvirv: |
| 17793 | case VE::VSCUvirvL: |
| 17794 | case VE::VSCUvirvl: |
| 17795 | case VE::VSCUvizv: |
| 17796 | case VE::VSCUvizvL: |
| 17797 | case VE::VSCUvizvl: |
| 17798 | case VE::VSCUvrrv: |
| 17799 | case VE::VSCUvrrvL: |
| 17800 | case VE::VSCUvrrvl: |
| 17801 | case VE::VSCUvrzv: |
| 17802 | case VE::VSCUvrzvL: |
| 17803 | case VE::VSCUvrzvl: |
| 17804 | case VE::VSCvirv: |
| 17805 | case VE::VSCvirvL: |
| 17806 | case VE::VSCvirvl: |
| 17807 | case VE::VSCvizv: |
| 17808 | case VE::VSCvizvL: |
| 17809 | case VE::VSCvizvl: |
| 17810 | case VE::VSCvrrv: |
| 17811 | case VE::VSCvrrvL: |
| 17812 | case VE::VSCvrrvl: |
| 17813 | case VE::VSCvrzv: |
| 17814 | case VE::VSCvrzvL: |
| 17815 | case VE::VSCvrzvl: { |
| 17816 | // op: sy |
| 17817 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 17818 | op &= UINT64_C(127); |
| 17819 | op <<= 40; |
| 17820 | Value |= op; |
| 17821 | // op: sz |
| 17822 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 17823 | op &= UINT64_C(127); |
| 17824 | op <<= 32; |
| 17825 | Value |= op; |
| 17826 | // op: vx |
| 17827 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 17828 | op &= UINT64_C(255); |
| 17829 | op <<= 24; |
| 17830 | Value |= op; |
| 17831 | // op: vy |
| 17832 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 17833 | op &= UINT64_C(255); |
| 17834 | op <<= 16; |
| 17835 | Value |= op; |
| 17836 | break; |
| 17837 | } |
| 17838 | case VE::PVBRDi: |
| 17839 | case VE::PVBRDiL: |
| 17840 | case VE::PVBRDiL_v: |
| 17841 | case VE::PVBRDi_v: |
| 17842 | case VE::PVBRDil: |
| 17843 | case VE::PVBRDil_v: |
| 17844 | case VE::PVBRDr: |
| 17845 | case VE::PVBRDrL: |
| 17846 | case VE::PVBRDrL_v: |
| 17847 | case VE::PVBRDr_v: |
| 17848 | case VE::PVBRDrl: |
| 17849 | case VE::PVBRDrl_v: |
| 17850 | case VE::VBRDLi: |
| 17851 | case VE::VBRDLiL: |
| 17852 | case VE::VBRDLiL_v: |
| 17853 | case VE::VBRDLi_v: |
| 17854 | case VE::VBRDLil: |
| 17855 | case VE::VBRDLil_v: |
| 17856 | case VE::VBRDLr: |
| 17857 | case VE::VBRDLrL: |
| 17858 | case VE::VBRDLrL_v: |
| 17859 | case VE::VBRDLr_v: |
| 17860 | case VE::VBRDLrl: |
| 17861 | case VE::VBRDLrl_v: |
| 17862 | case VE::VBRDUi: |
| 17863 | case VE::VBRDUiL: |
| 17864 | case VE::VBRDUiL_v: |
| 17865 | case VE::VBRDUi_v: |
| 17866 | case VE::VBRDUil: |
| 17867 | case VE::VBRDUil_v: |
| 17868 | case VE::VBRDUr: |
| 17869 | case VE::VBRDUrL: |
| 17870 | case VE::VBRDUrL_v: |
| 17871 | case VE::VBRDUr_v: |
| 17872 | case VE::VBRDUrl: |
| 17873 | case VE::VBRDUrl_v: |
| 17874 | case VE::VBRDi: |
| 17875 | case VE::VBRDiL: |
| 17876 | case VE::VBRDiL_v: |
| 17877 | case VE::VBRDi_v: |
| 17878 | case VE::VBRDil: |
| 17879 | case VE::VBRDil_v: |
| 17880 | case VE::VBRDr: |
| 17881 | case VE::VBRDrL: |
| 17882 | case VE::VBRDrL_v: |
| 17883 | case VE::VBRDr_v: |
| 17884 | case VE::VBRDrl: |
| 17885 | case VE::VBRDrl_v: { |
| 17886 | // op: sy |
| 17887 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 17888 | op &= UINT64_C(127); |
| 17889 | op <<= 40; |
| 17890 | Value |= op; |
| 17891 | // op: vx |
| 17892 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 17893 | op &= UINT64_C(255); |
| 17894 | op <<= 24; |
| 17895 | Value |= op; |
| 17896 | break; |
| 17897 | } |
| 17898 | case VE::PVADDSLOiv: |
| 17899 | case VE::PVADDSLOivL: |
| 17900 | case VE::PVADDSLOivL_v: |
| 17901 | case VE::PVADDSLOiv_v: |
| 17902 | case VE::PVADDSLOivl: |
| 17903 | case VE::PVADDSLOivl_v: |
| 17904 | case VE::PVADDSLOrv: |
| 17905 | case VE::PVADDSLOrvL: |
| 17906 | case VE::PVADDSLOrvL_v: |
| 17907 | case VE::PVADDSLOrv_v: |
| 17908 | case VE::PVADDSLOrvl: |
| 17909 | case VE::PVADDSLOrvl_v: |
| 17910 | case VE::PVADDSUPiv: |
| 17911 | case VE::PVADDSUPivL: |
| 17912 | case VE::PVADDSUPivL_v: |
| 17913 | case VE::PVADDSUPiv_v: |
| 17914 | case VE::PVADDSUPivl: |
| 17915 | case VE::PVADDSUPivl_v: |
| 17916 | case VE::PVADDSUPrv: |
| 17917 | case VE::PVADDSUPrvL: |
| 17918 | case VE::PVADDSUPrvL_v: |
| 17919 | case VE::PVADDSUPrv_v: |
| 17920 | case VE::PVADDSUPrvl: |
| 17921 | case VE::PVADDSUPrvl_v: |
| 17922 | case VE::PVADDSiv: |
| 17923 | case VE::PVADDSivL: |
| 17924 | case VE::PVADDSivL_v: |
| 17925 | case VE::PVADDSiv_v: |
| 17926 | case VE::PVADDSivl: |
| 17927 | case VE::PVADDSivl_v: |
| 17928 | case VE::PVADDSrv: |
| 17929 | case VE::PVADDSrvL: |
| 17930 | case VE::PVADDSrvL_v: |
| 17931 | case VE::PVADDSrv_v: |
| 17932 | case VE::PVADDSrvl: |
| 17933 | case VE::PVADDSrvl_v: |
| 17934 | case VE::PVADDULOiv: |
| 17935 | case VE::PVADDULOivL: |
| 17936 | case VE::PVADDULOivL_v: |
| 17937 | case VE::PVADDULOiv_v: |
| 17938 | case VE::PVADDULOivl: |
| 17939 | case VE::PVADDULOivl_v: |
| 17940 | case VE::PVADDULOrv: |
| 17941 | case VE::PVADDULOrvL: |
| 17942 | case VE::PVADDULOrvL_v: |
| 17943 | case VE::PVADDULOrv_v: |
| 17944 | case VE::PVADDULOrvl: |
| 17945 | case VE::PVADDULOrvl_v: |
| 17946 | case VE::PVADDUUPiv: |
| 17947 | case VE::PVADDUUPivL: |
| 17948 | case VE::PVADDUUPivL_v: |
| 17949 | case VE::PVADDUUPiv_v: |
| 17950 | case VE::PVADDUUPivl: |
| 17951 | case VE::PVADDUUPivl_v: |
| 17952 | case VE::PVADDUUPrv: |
| 17953 | case VE::PVADDUUPrvL: |
| 17954 | case VE::PVADDUUPrvL_v: |
| 17955 | case VE::PVADDUUPrv_v: |
| 17956 | case VE::PVADDUUPrvl: |
| 17957 | case VE::PVADDUUPrvl_v: |
| 17958 | case VE::PVADDUiv: |
| 17959 | case VE::PVADDUivL: |
| 17960 | case VE::PVADDUivL_v: |
| 17961 | case VE::PVADDUiv_v: |
| 17962 | case VE::PVADDUivl: |
| 17963 | case VE::PVADDUivl_v: |
| 17964 | case VE::PVADDUrv: |
| 17965 | case VE::PVADDUrvL: |
| 17966 | case VE::PVADDUrvL_v: |
| 17967 | case VE::PVADDUrv_v: |
| 17968 | case VE::PVADDUrvl: |
| 17969 | case VE::PVADDUrvl_v: |
| 17970 | case VE::PVANDLOmv: |
| 17971 | case VE::PVANDLOmvL: |
| 17972 | case VE::PVANDLOmvL_v: |
| 17973 | case VE::PVANDLOmv_v: |
| 17974 | case VE::PVANDLOmvl: |
| 17975 | case VE::PVANDLOmvl_v: |
| 17976 | case VE::PVANDLOrv: |
| 17977 | case VE::PVANDLOrvL: |
| 17978 | case VE::PVANDLOrvL_v: |
| 17979 | case VE::PVANDLOrv_v: |
| 17980 | case VE::PVANDLOrvl: |
| 17981 | case VE::PVANDLOrvl_v: |
| 17982 | case VE::PVANDUPmv: |
| 17983 | case VE::PVANDUPmvL: |
| 17984 | case VE::PVANDUPmvL_v: |
| 17985 | case VE::PVANDUPmv_v: |
| 17986 | case VE::PVANDUPmvl: |
| 17987 | case VE::PVANDUPmvl_v: |
| 17988 | case VE::PVANDUPrv: |
| 17989 | case VE::PVANDUPrvL: |
| 17990 | case VE::PVANDUPrvL_v: |
| 17991 | case VE::PVANDUPrv_v: |
| 17992 | case VE::PVANDUPrvl: |
| 17993 | case VE::PVANDUPrvl_v: |
| 17994 | case VE::PVANDmv: |
| 17995 | case VE::PVANDmvL: |
| 17996 | case VE::PVANDmvL_v: |
| 17997 | case VE::PVANDmv_v: |
| 17998 | case VE::PVANDmvl: |
| 17999 | case VE::PVANDmvl_v: |
| 18000 | case VE::PVANDrv: |
| 18001 | case VE::PVANDrvL: |
| 18002 | case VE::PVANDrvL_v: |
| 18003 | case VE::PVANDrv_v: |
| 18004 | case VE::PVANDrvl: |
| 18005 | case VE::PVANDrvl_v: |
| 18006 | case VE::PVCMPSLOiv: |
| 18007 | case VE::PVCMPSLOivL: |
| 18008 | case VE::PVCMPSLOivL_v: |
| 18009 | case VE::PVCMPSLOiv_v: |
| 18010 | case VE::PVCMPSLOivl: |
| 18011 | case VE::PVCMPSLOivl_v: |
| 18012 | case VE::PVCMPSLOrv: |
| 18013 | case VE::PVCMPSLOrvL: |
| 18014 | case VE::PVCMPSLOrvL_v: |
| 18015 | case VE::PVCMPSLOrv_v: |
| 18016 | case VE::PVCMPSLOrvl: |
| 18017 | case VE::PVCMPSLOrvl_v: |
| 18018 | case VE::PVCMPSUPiv: |
| 18019 | case VE::PVCMPSUPivL: |
| 18020 | case VE::PVCMPSUPivL_v: |
| 18021 | case VE::PVCMPSUPiv_v: |
| 18022 | case VE::PVCMPSUPivl: |
| 18023 | case VE::PVCMPSUPivl_v: |
| 18024 | case VE::PVCMPSUPrv: |
| 18025 | case VE::PVCMPSUPrvL: |
| 18026 | case VE::PVCMPSUPrvL_v: |
| 18027 | case VE::PVCMPSUPrv_v: |
| 18028 | case VE::PVCMPSUPrvl: |
| 18029 | case VE::PVCMPSUPrvl_v: |
| 18030 | case VE::PVCMPSiv: |
| 18031 | case VE::PVCMPSivL: |
| 18032 | case VE::PVCMPSivL_v: |
| 18033 | case VE::PVCMPSiv_v: |
| 18034 | case VE::PVCMPSivl: |
| 18035 | case VE::PVCMPSivl_v: |
| 18036 | case VE::PVCMPSrv: |
| 18037 | case VE::PVCMPSrvL: |
| 18038 | case VE::PVCMPSrvL_v: |
| 18039 | case VE::PVCMPSrv_v: |
| 18040 | case VE::PVCMPSrvl: |
| 18041 | case VE::PVCMPSrvl_v: |
| 18042 | case VE::PVCMPULOiv: |
| 18043 | case VE::PVCMPULOivL: |
| 18044 | case VE::PVCMPULOivL_v: |
| 18045 | case VE::PVCMPULOiv_v: |
| 18046 | case VE::PVCMPULOivl: |
| 18047 | case VE::PVCMPULOivl_v: |
| 18048 | case VE::PVCMPULOrv: |
| 18049 | case VE::PVCMPULOrvL: |
| 18050 | case VE::PVCMPULOrvL_v: |
| 18051 | case VE::PVCMPULOrv_v: |
| 18052 | case VE::PVCMPULOrvl: |
| 18053 | case VE::PVCMPULOrvl_v: |
| 18054 | case VE::PVCMPUUPiv: |
| 18055 | case VE::PVCMPUUPivL: |
| 18056 | case VE::PVCMPUUPivL_v: |
| 18057 | case VE::PVCMPUUPiv_v: |
| 18058 | case VE::PVCMPUUPivl: |
| 18059 | case VE::PVCMPUUPivl_v: |
| 18060 | case VE::PVCMPUUPrv: |
| 18061 | case VE::PVCMPUUPrvL: |
| 18062 | case VE::PVCMPUUPrvL_v: |
| 18063 | case VE::PVCMPUUPrv_v: |
| 18064 | case VE::PVCMPUUPrvl: |
| 18065 | case VE::PVCMPUUPrvl_v: |
| 18066 | case VE::PVCMPUiv: |
| 18067 | case VE::PVCMPUivL: |
| 18068 | case VE::PVCMPUivL_v: |
| 18069 | case VE::PVCMPUiv_v: |
| 18070 | case VE::PVCMPUivl: |
| 18071 | case VE::PVCMPUivl_v: |
| 18072 | case VE::PVCMPUrv: |
| 18073 | case VE::PVCMPUrvL: |
| 18074 | case VE::PVCMPUrvL_v: |
| 18075 | case VE::PVCMPUrv_v: |
| 18076 | case VE::PVCMPUrvl: |
| 18077 | case VE::PVCMPUrvl_v: |
| 18078 | case VE::PVEQVLOmv: |
| 18079 | case VE::PVEQVLOmvL: |
| 18080 | case VE::PVEQVLOmvL_v: |
| 18081 | case VE::PVEQVLOmv_v: |
| 18082 | case VE::PVEQVLOmvl: |
| 18083 | case VE::PVEQVLOmvl_v: |
| 18084 | case VE::PVEQVLOrv: |
| 18085 | case VE::PVEQVLOrvL: |
| 18086 | case VE::PVEQVLOrvL_v: |
| 18087 | case VE::PVEQVLOrv_v: |
| 18088 | case VE::PVEQVLOrvl: |
| 18089 | case VE::PVEQVLOrvl_v: |
| 18090 | case VE::PVEQVUPmv: |
| 18091 | case VE::PVEQVUPmvL: |
| 18092 | case VE::PVEQVUPmvL_v: |
| 18093 | case VE::PVEQVUPmv_v: |
| 18094 | case VE::PVEQVUPmvl: |
| 18095 | case VE::PVEQVUPmvl_v: |
| 18096 | case VE::PVEQVUPrv: |
| 18097 | case VE::PVEQVUPrvL: |
| 18098 | case VE::PVEQVUPrvL_v: |
| 18099 | case VE::PVEQVUPrv_v: |
| 18100 | case VE::PVEQVUPrvl: |
| 18101 | case VE::PVEQVUPrvl_v: |
| 18102 | case VE::PVEQVmv: |
| 18103 | case VE::PVEQVmvL: |
| 18104 | case VE::PVEQVmvL_v: |
| 18105 | case VE::PVEQVmv_v: |
| 18106 | case VE::PVEQVmvl: |
| 18107 | case VE::PVEQVmvl_v: |
| 18108 | case VE::PVEQVrv: |
| 18109 | case VE::PVEQVrvL: |
| 18110 | case VE::PVEQVrvL_v: |
| 18111 | case VE::PVEQVrv_v: |
| 18112 | case VE::PVEQVrvl: |
| 18113 | case VE::PVEQVrvl_v: |
| 18114 | case VE::PVFADDLOiv: |
| 18115 | case VE::PVFADDLOivL: |
| 18116 | case VE::PVFADDLOivL_v: |
| 18117 | case VE::PVFADDLOiv_v: |
| 18118 | case VE::PVFADDLOivl: |
| 18119 | case VE::PVFADDLOivl_v: |
| 18120 | case VE::PVFADDLOrv: |
| 18121 | case VE::PVFADDLOrvL: |
| 18122 | case VE::PVFADDLOrvL_v: |
| 18123 | case VE::PVFADDLOrv_v: |
| 18124 | case VE::PVFADDLOrvl: |
| 18125 | case VE::PVFADDLOrvl_v: |
| 18126 | case VE::PVFADDUPiv: |
| 18127 | case VE::PVFADDUPivL: |
| 18128 | case VE::PVFADDUPivL_v: |
| 18129 | case VE::PVFADDUPiv_v: |
| 18130 | case VE::PVFADDUPivl: |
| 18131 | case VE::PVFADDUPivl_v: |
| 18132 | case VE::PVFADDUPrv: |
| 18133 | case VE::PVFADDUPrvL: |
| 18134 | case VE::PVFADDUPrvL_v: |
| 18135 | case VE::PVFADDUPrv_v: |
| 18136 | case VE::PVFADDUPrvl: |
| 18137 | case VE::PVFADDUPrvl_v: |
| 18138 | case VE::PVFADDiv: |
| 18139 | case VE::PVFADDivL: |
| 18140 | case VE::PVFADDivL_v: |
| 18141 | case VE::PVFADDiv_v: |
| 18142 | case VE::PVFADDivl: |
| 18143 | case VE::PVFADDivl_v: |
| 18144 | case VE::PVFADDrv: |
| 18145 | case VE::PVFADDrvL: |
| 18146 | case VE::PVFADDrvL_v: |
| 18147 | case VE::PVFADDrv_v: |
| 18148 | case VE::PVFADDrvl: |
| 18149 | case VE::PVFADDrvl_v: |
| 18150 | case VE::PVFCMPLOiv: |
| 18151 | case VE::PVFCMPLOivL: |
| 18152 | case VE::PVFCMPLOivL_v: |
| 18153 | case VE::PVFCMPLOiv_v: |
| 18154 | case VE::PVFCMPLOivl: |
| 18155 | case VE::PVFCMPLOivl_v: |
| 18156 | case VE::PVFCMPLOrv: |
| 18157 | case VE::PVFCMPLOrvL: |
| 18158 | case VE::PVFCMPLOrvL_v: |
| 18159 | case VE::PVFCMPLOrv_v: |
| 18160 | case VE::PVFCMPLOrvl: |
| 18161 | case VE::PVFCMPLOrvl_v: |
| 18162 | case VE::PVFCMPUPiv: |
| 18163 | case VE::PVFCMPUPivL: |
| 18164 | case VE::PVFCMPUPivL_v: |
| 18165 | case VE::PVFCMPUPiv_v: |
| 18166 | case VE::PVFCMPUPivl: |
| 18167 | case VE::PVFCMPUPivl_v: |
| 18168 | case VE::PVFCMPUPrv: |
| 18169 | case VE::PVFCMPUPrvL: |
| 18170 | case VE::PVFCMPUPrvL_v: |
| 18171 | case VE::PVFCMPUPrv_v: |
| 18172 | case VE::PVFCMPUPrvl: |
| 18173 | case VE::PVFCMPUPrvl_v: |
| 18174 | case VE::PVFCMPiv: |
| 18175 | case VE::PVFCMPivL: |
| 18176 | case VE::PVFCMPivL_v: |
| 18177 | case VE::PVFCMPiv_v: |
| 18178 | case VE::PVFCMPivl: |
| 18179 | case VE::PVFCMPivl_v: |
| 18180 | case VE::PVFCMPrv: |
| 18181 | case VE::PVFCMPrvL: |
| 18182 | case VE::PVFCMPrvL_v: |
| 18183 | case VE::PVFCMPrv_v: |
| 18184 | case VE::PVFCMPrvl: |
| 18185 | case VE::PVFCMPrvl_v: |
| 18186 | case VE::PVFMAXLOiv: |
| 18187 | case VE::PVFMAXLOivL: |
| 18188 | case VE::PVFMAXLOivL_v: |
| 18189 | case VE::PVFMAXLOiv_v: |
| 18190 | case VE::PVFMAXLOivl: |
| 18191 | case VE::PVFMAXLOivl_v: |
| 18192 | case VE::PVFMAXLOrv: |
| 18193 | case VE::PVFMAXLOrvL: |
| 18194 | case VE::PVFMAXLOrvL_v: |
| 18195 | case VE::PVFMAXLOrv_v: |
| 18196 | case VE::PVFMAXLOrvl: |
| 18197 | case VE::PVFMAXLOrvl_v: |
| 18198 | case VE::PVFMAXUPiv: |
| 18199 | case VE::PVFMAXUPivL: |
| 18200 | case VE::PVFMAXUPivL_v: |
| 18201 | case VE::PVFMAXUPiv_v: |
| 18202 | case VE::PVFMAXUPivl: |
| 18203 | case VE::PVFMAXUPivl_v: |
| 18204 | case VE::PVFMAXUPrv: |
| 18205 | case VE::PVFMAXUPrvL: |
| 18206 | case VE::PVFMAXUPrvL_v: |
| 18207 | case VE::PVFMAXUPrv_v: |
| 18208 | case VE::PVFMAXUPrvl: |
| 18209 | case VE::PVFMAXUPrvl_v: |
| 18210 | case VE::PVFMAXiv: |
| 18211 | case VE::PVFMAXivL: |
| 18212 | case VE::PVFMAXivL_v: |
| 18213 | case VE::PVFMAXiv_v: |
| 18214 | case VE::PVFMAXivl: |
| 18215 | case VE::PVFMAXivl_v: |
| 18216 | case VE::PVFMAXrv: |
| 18217 | case VE::PVFMAXrvL: |
| 18218 | case VE::PVFMAXrvL_v: |
| 18219 | case VE::PVFMAXrv_v: |
| 18220 | case VE::PVFMAXrvl: |
| 18221 | case VE::PVFMAXrvl_v: |
| 18222 | case VE::PVFMINLOiv: |
| 18223 | case VE::PVFMINLOivL: |
| 18224 | case VE::PVFMINLOivL_v: |
| 18225 | case VE::PVFMINLOiv_v: |
| 18226 | case VE::PVFMINLOivl: |
| 18227 | case VE::PVFMINLOivl_v: |
| 18228 | case VE::PVFMINLOrv: |
| 18229 | case VE::PVFMINLOrvL: |
| 18230 | case VE::PVFMINLOrvL_v: |
| 18231 | case VE::PVFMINLOrv_v: |
| 18232 | case VE::PVFMINLOrvl: |
| 18233 | case VE::PVFMINLOrvl_v: |
| 18234 | case VE::PVFMINUPiv: |
| 18235 | case VE::PVFMINUPivL: |
| 18236 | case VE::PVFMINUPivL_v: |
| 18237 | case VE::PVFMINUPiv_v: |
| 18238 | case VE::PVFMINUPivl: |
| 18239 | case VE::PVFMINUPivl_v: |
| 18240 | case VE::PVFMINUPrv: |
| 18241 | case VE::PVFMINUPrvL: |
| 18242 | case VE::PVFMINUPrvL_v: |
| 18243 | case VE::PVFMINUPrv_v: |
| 18244 | case VE::PVFMINUPrvl: |
| 18245 | case VE::PVFMINUPrvl_v: |
| 18246 | case VE::PVFMINiv: |
| 18247 | case VE::PVFMINivL: |
| 18248 | case VE::PVFMINivL_v: |
| 18249 | case VE::PVFMINiv_v: |
| 18250 | case VE::PVFMINivl: |
| 18251 | case VE::PVFMINivl_v: |
| 18252 | case VE::PVFMINrv: |
| 18253 | case VE::PVFMINrvL: |
| 18254 | case VE::PVFMINrvL_v: |
| 18255 | case VE::PVFMINrv_v: |
| 18256 | case VE::PVFMINrvl: |
| 18257 | case VE::PVFMINrvl_v: |
| 18258 | case VE::PVFMULLOiv: |
| 18259 | case VE::PVFMULLOivL: |
| 18260 | case VE::PVFMULLOivL_v: |
| 18261 | case VE::PVFMULLOiv_v: |
| 18262 | case VE::PVFMULLOivl: |
| 18263 | case VE::PVFMULLOivl_v: |
| 18264 | case VE::PVFMULLOrv: |
| 18265 | case VE::PVFMULLOrvL: |
| 18266 | case VE::PVFMULLOrvL_v: |
| 18267 | case VE::PVFMULLOrv_v: |
| 18268 | case VE::PVFMULLOrvl: |
| 18269 | case VE::PVFMULLOrvl_v: |
| 18270 | case VE::PVFMULUPiv: |
| 18271 | case VE::PVFMULUPivL: |
| 18272 | case VE::PVFMULUPivL_v: |
| 18273 | case VE::PVFMULUPiv_v: |
| 18274 | case VE::PVFMULUPivl: |
| 18275 | case VE::PVFMULUPivl_v: |
| 18276 | case VE::PVFMULUPrv: |
| 18277 | case VE::PVFMULUPrvL: |
| 18278 | case VE::PVFMULUPrvL_v: |
| 18279 | case VE::PVFMULUPrv_v: |
| 18280 | case VE::PVFMULUPrvl: |
| 18281 | case VE::PVFMULUPrvl_v: |
| 18282 | case VE::PVFMULiv: |
| 18283 | case VE::PVFMULivL: |
| 18284 | case VE::PVFMULivL_v: |
| 18285 | case VE::PVFMULiv_v: |
| 18286 | case VE::PVFMULivl: |
| 18287 | case VE::PVFMULivl_v: |
| 18288 | case VE::PVFMULrv: |
| 18289 | case VE::PVFMULrvL: |
| 18290 | case VE::PVFMULrvL_v: |
| 18291 | case VE::PVFMULrv_v: |
| 18292 | case VE::PVFMULrvl: |
| 18293 | case VE::PVFMULrvl_v: |
| 18294 | case VE::PVFSUBLOiv: |
| 18295 | case VE::PVFSUBLOivL: |
| 18296 | case VE::PVFSUBLOivL_v: |
| 18297 | case VE::PVFSUBLOiv_v: |
| 18298 | case VE::PVFSUBLOivl: |
| 18299 | case VE::PVFSUBLOivl_v: |
| 18300 | case VE::PVFSUBLOrv: |
| 18301 | case VE::PVFSUBLOrvL: |
| 18302 | case VE::PVFSUBLOrvL_v: |
| 18303 | case VE::PVFSUBLOrv_v: |
| 18304 | case VE::PVFSUBLOrvl: |
| 18305 | case VE::PVFSUBLOrvl_v: |
| 18306 | case VE::PVFSUBUPiv: |
| 18307 | case VE::PVFSUBUPivL: |
| 18308 | case VE::PVFSUBUPivL_v: |
| 18309 | case VE::PVFSUBUPiv_v: |
| 18310 | case VE::PVFSUBUPivl: |
| 18311 | case VE::PVFSUBUPivl_v: |
| 18312 | case VE::PVFSUBUPrv: |
| 18313 | case VE::PVFSUBUPrvL: |
| 18314 | case VE::PVFSUBUPrvL_v: |
| 18315 | case VE::PVFSUBUPrv_v: |
| 18316 | case VE::PVFSUBUPrvl: |
| 18317 | case VE::PVFSUBUPrvl_v: |
| 18318 | case VE::PVFSUBiv: |
| 18319 | case VE::PVFSUBivL: |
| 18320 | case VE::PVFSUBivL_v: |
| 18321 | case VE::PVFSUBiv_v: |
| 18322 | case VE::PVFSUBivl: |
| 18323 | case VE::PVFSUBivl_v: |
| 18324 | case VE::PVFSUBrv: |
| 18325 | case VE::PVFSUBrvL: |
| 18326 | case VE::PVFSUBrvL_v: |
| 18327 | case VE::PVFSUBrv_v: |
| 18328 | case VE::PVFSUBrvl: |
| 18329 | case VE::PVFSUBrvl_v: |
| 18330 | case VE::PVMAXSLOiv: |
| 18331 | case VE::PVMAXSLOivL: |
| 18332 | case VE::PVMAXSLOivL_v: |
| 18333 | case VE::PVMAXSLOiv_v: |
| 18334 | case VE::PVMAXSLOivl: |
| 18335 | case VE::PVMAXSLOivl_v: |
| 18336 | case VE::PVMAXSLOrv: |
| 18337 | case VE::PVMAXSLOrvL: |
| 18338 | case VE::PVMAXSLOrvL_v: |
| 18339 | case VE::PVMAXSLOrv_v: |
| 18340 | case VE::PVMAXSLOrvl: |
| 18341 | case VE::PVMAXSLOrvl_v: |
| 18342 | case VE::PVMAXSUPiv: |
| 18343 | case VE::PVMAXSUPivL: |
| 18344 | case VE::PVMAXSUPivL_v: |
| 18345 | case VE::PVMAXSUPiv_v: |
| 18346 | case VE::PVMAXSUPivl: |
| 18347 | case VE::PVMAXSUPivl_v: |
| 18348 | case VE::PVMAXSUPrv: |
| 18349 | case VE::PVMAXSUPrvL: |
| 18350 | case VE::PVMAXSUPrvL_v: |
| 18351 | case VE::PVMAXSUPrv_v: |
| 18352 | case VE::PVMAXSUPrvl: |
| 18353 | case VE::PVMAXSUPrvl_v: |
| 18354 | case VE::PVMAXSiv: |
| 18355 | case VE::PVMAXSivL: |
| 18356 | case VE::PVMAXSivL_v: |
| 18357 | case VE::PVMAXSiv_v: |
| 18358 | case VE::PVMAXSivl: |
| 18359 | case VE::PVMAXSivl_v: |
| 18360 | case VE::PVMAXSrv: |
| 18361 | case VE::PVMAXSrvL: |
| 18362 | case VE::PVMAXSrvL_v: |
| 18363 | case VE::PVMAXSrv_v: |
| 18364 | case VE::PVMAXSrvl: |
| 18365 | case VE::PVMAXSrvl_v: |
| 18366 | case VE::PVMINSLOiv: |
| 18367 | case VE::PVMINSLOivL: |
| 18368 | case VE::PVMINSLOivL_v: |
| 18369 | case VE::PVMINSLOiv_v: |
| 18370 | case VE::PVMINSLOivl: |
| 18371 | case VE::PVMINSLOivl_v: |
| 18372 | case VE::PVMINSLOrv: |
| 18373 | case VE::PVMINSLOrvL: |
| 18374 | case VE::PVMINSLOrvL_v: |
| 18375 | case VE::PVMINSLOrv_v: |
| 18376 | case VE::PVMINSLOrvl: |
| 18377 | case VE::PVMINSLOrvl_v: |
| 18378 | case VE::PVMINSUPiv: |
| 18379 | case VE::PVMINSUPivL: |
| 18380 | case VE::PVMINSUPivL_v: |
| 18381 | case VE::PVMINSUPiv_v: |
| 18382 | case VE::PVMINSUPivl: |
| 18383 | case VE::PVMINSUPivl_v: |
| 18384 | case VE::PVMINSUPrv: |
| 18385 | case VE::PVMINSUPrvL: |
| 18386 | case VE::PVMINSUPrvL_v: |
| 18387 | case VE::PVMINSUPrv_v: |
| 18388 | case VE::PVMINSUPrvl: |
| 18389 | case VE::PVMINSUPrvl_v: |
| 18390 | case VE::PVMINSiv: |
| 18391 | case VE::PVMINSivL: |
| 18392 | case VE::PVMINSivL_v: |
| 18393 | case VE::PVMINSiv_v: |
| 18394 | case VE::PVMINSivl: |
| 18395 | case VE::PVMINSivl_v: |
| 18396 | case VE::PVMINSrv: |
| 18397 | case VE::PVMINSrvL: |
| 18398 | case VE::PVMINSrvL_v: |
| 18399 | case VE::PVMINSrv_v: |
| 18400 | case VE::PVMINSrvl: |
| 18401 | case VE::PVMINSrvl_v: |
| 18402 | case VE::PVORLOmv: |
| 18403 | case VE::PVORLOmvL: |
| 18404 | case VE::PVORLOmvL_v: |
| 18405 | case VE::PVORLOmv_v: |
| 18406 | case VE::PVORLOmvl: |
| 18407 | case VE::PVORLOmvl_v: |
| 18408 | case VE::PVORLOrv: |
| 18409 | case VE::PVORLOrvL: |
| 18410 | case VE::PVORLOrvL_v: |
| 18411 | case VE::PVORLOrv_v: |
| 18412 | case VE::PVORLOrvl: |
| 18413 | case VE::PVORLOrvl_v: |
| 18414 | case VE::PVORUPmv: |
| 18415 | case VE::PVORUPmvL: |
| 18416 | case VE::PVORUPmvL_v: |
| 18417 | case VE::PVORUPmv_v: |
| 18418 | case VE::PVORUPmvl: |
| 18419 | case VE::PVORUPmvl_v: |
| 18420 | case VE::PVORUPrv: |
| 18421 | case VE::PVORUPrvL: |
| 18422 | case VE::PVORUPrvL_v: |
| 18423 | case VE::PVORUPrv_v: |
| 18424 | case VE::PVORUPrvl: |
| 18425 | case VE::PVORUPrvl_v: |
| 18426 | case VE::PVORmv: |
| 18427 | case VE::PVORmvL: |
| 18428 | case VE::PVORmvL_v: |
| 18429 | case VE::PVORmv_v: |
| 18430 | case VE::PVORmvl: |
| 18431 | case VE::PVORmvl_v: |
| 18432 | case VE::PVORrv: |
| 18433 | case VE::PVORrvL: |
| 18434 | case VE::PVORrvL_v: |
| 18435 | case VE::PVORrv_v: |
| 18436 | case VE::PVORrvl: |
| 18437 | case VE::PVORrvl_v: |
| 18438 | case VE::PVSUBSLOiv: |
| 18439 | case VE::PVSUBSLOivL: |
| 18440 | case VE::PVSUBSLOivL_v: |
| 18441 | case VE::PVSUBSLOiv_v: |
| 18442 | case VE::PVSUBSLOivl: |
| 18443 | case VE::PVSUBSLOivl_v: |
| 18444 | case VE::PVSUBSLOrv: |
| 18445 | case VE::PVSUBSLOrvL: |
| 18446 | case VE::PVSUBSLOrvL_v: |
| 18447 | case VE::PVSUBSLOrv_v: |
| 18448 | case VE::PVSUBSLOrvl: |
| 18449 | case VE::PVSUBSLOrvl_v: |
| 18450 | case VE::PVSUBSUPiv: |
| 18451 | case VE::PVSUBSUPivL: |
| 18452 | case VE::PVSUBSUPivL_v: |
| 18453 | case VE::PVSUBSUPiv_v: |
| 18454 | case VE::PVSUBSUPivl: |
| 18455 | case VE::PVSUBSUPivl_v: |
| 18456 | case VE::PVSUBSUPrv: |
| 18457 | case VE::PVSUBSUPrvL: |
| 18458 | case VE::PVSUBSUPrvL_v: |
| 18459 | case VE::PVSUBSUPrv_v: |
| 18460 | case VE::PVSUBSUPrvl: |
| 18461 | case VE::PVSUBSUPrvl_v: |
| 18462 | case VE::PVSUBSiv: |
| 18463 | case VE::PVSUBSivL: |
| 18464 | case VE::PVSUBSivL_v: |
| 18465 | case VE::PVSUBSiv_v: |
| 18466 | case VE::PVSUBSivl: |
| 18467 | case VE::PVSUBSivl_v: |
| 18468 | case VE::PVSUBSrv: |
| 18469 | case VE::PVSUBSrvL: |
| 18470 | case VE::PVSUBSrvL_v: |
| 18471 | case VE::PVSUBSrv_v: |
| 18472 | case VE::PVSUBSrvl: |
| 18473 | case VE::PVSUBSrvl_v: |
| 18474 | case VE::PVSUBULOiv: |
| 18475 | case VE::PVSUBULOivL: |
| 18476 | case VE::PVSUBULOivL_v: |
| 18477 | case VE::PVSUBULOiv_v: |
| 18478 | case VE::PVSUBULOivl: |
| 18479 | case VE::PVSUBULOivl_v: |
| 18480 | case VE::PVSUBULOrv: |
| 18481 | case VE::PVSUBULOrvL: |
| 18482 | case VE::PVSUBULOrvL_v: |
| 18483 | case VE::PVSUBULOrv_v: |
| 18484 | case VE::PVSUBULOrvl: |
| 18485 | case VE::PVSUBULOrvl_v: |
| 18486 | case VE::PVSUBUUPiv: |
| 18487 | case VE::PVSUBUUPivL: |
| 18488 | case VE::PVSUBUUPivL_v: |
| 18489 | case VE::PVSUBUUPiv_v: |
| 18490 | case VE::PVSUBUUPivl: |
| 18491 | case VE::PVSUBUUPivl_v: |
| 18492 | case VE::PVSUBUUPrv: |
| 18493 | case VE::PVSUBUUPrvL: |
| 18494 | case VE::PVSUBUUPrvL_v: |
| 18495 | case VE::PVSUBUUPrv_v: |
| 18496 | case VE::PVSUBUUPrvl: |
| 18497 | case VE::PVSUBUUPrvl_v: |
| 18498 | case VE::PVSUBUiv: |
| 18499 | case VE::PVSUBUivL: |
| 18500 | case VE::PVSUBUivL_v: |
| 18501 | case VE::PVSUBUiv_v: |
| 18502 | case VE::PVSUBUivl: |
| 18503 | case VE::PVSUBUivl_v: |
| 18504 | case VE::PVSUBUrv: |
| 18505 | case VE::PVSUBUrvL: |
| 18506 | case VE::PVSUBUrvL_v: |
| 18507 | case VE::PVSUBUrv_v: |
| 18508 | case VE::PVSUBUrvl: |
| 18509 | case VE::PVSUBUrvl_v: |
| 18510 | case VE::PVXORLOmv: |
| 18511 | case VE::PVXORLOmvL: |
| 18512 | case VE::PVXORLOmvL_v: |
| 18513 | case VE::PVXORLOmv_v: |
| 18514 | case VE::PVXORLOmvl: |
| 18515 | case VE::PVXORLOmvl_v: |
| 18516 | case VE::PVXORLOrv: |
| 18517 | case VE::PVXORLOrvL: |
| 18518 | case VE::PVXORLOrvL_v: |
| 18519 | case VE::PVXORLOrv_v: |
| 18520 | case VE::PVXORLOrvl: |
| 18521 | case VE::PVXORLOrvl_v: |
| 18522 | case VE::PVXORUPmv: |
| 18523 | case VE::PVXORUPmvL: |
| 18524 | case VE::PVXORUPmvL_v: |
| 18525 | case VE::PVXORUPmv_v: |
| 18526 | case VE::PVXORUPmvl: |
| 18527 | case VE::PVXORUPmvl_v: |
| 18528 | case VE::PVXORUPrv: |
| 18529 | case VE::PVXORUPrvL: |
| 18530 | case VE::PVXORUPrvL_v: |
| 18531 | case VE::PVXORUPrv_v: |
| 18532 | case VE::PVXORUPrvl: |
| 18533 | case VE::PVXORUPrvl_v: |
| 18534 | case VE::PVXORmv: |
| 18535 | case VE::PVXORmvL: |
| 18536 | case VE::PVXORmvL_v: |
| 18537 | case VE::PVXORmv_v: |
| 18538 | case VE::PVXORmvl: |
| 18539 | case VE::PVXORmvl_v: |
| 18540 | case VE::PVXORrv: |
| 18541 | case VE::PVXORrvL: |
| 18542 | case VE::PVXORrvL_v: |
| 18543 | case VE::PVXORrv_v: |
| 18544 | case VE::PVXORrvl: |
| 18545 | case VE::PVXORrvl_v: |
| 18546 | case VE::VADDSLiv: |
| 18547 | case VE::VADDSLivL: |
| 18548 | case VE::VADDSLivL_v: |
| 18549 | case VE::VADDSLiv_v: |
| 18550 | case VE::VADDSLivl: |
| 18551 | case VE::VADDSLivl_v: |
| 18552 | case VE::VADDSLrv: |
| 18553 | case VE::VADDSLrvL: |
| 18554 | case VE::VADDSLrvL_v: |
| 18555 | case VE::VADDSLrv_v: |
| 18556 | case VE::VADDSLrvl: |
| 18557 | case VE::VADDSLrvl_v: |
| 18558 | case VE::VADDSWSXiv: |
| 18559 | case VE::VADDSWSXivL: |
| 18560 | case VE::VADDSWSXivL_v: |
| 18561 | case VE::VADDSWSXiv_v: |
| 18562 | case VE::VADDSWSXivl: |
| 18563 | case VE::VADDSWSXivl_v: |
| 18564 | case VE::VADDSWSXrv: |
| 18565 | case VE::VADDSWSXrvL: |
| 18566 | case VE::VADDSWSXrvL_v: |
| 18567 | case VE::VADDSWSXrv_v: |
| 18568 | case VE::VADDSWSXrvl: |
| 18569 | case VE::VADDSWSXrvl_v: |
| 18570 | case VE::VADDSWZXiv: |
| 18571 | case VE::VADDSWZXivL: |
| 18572 | case VE::VADDSWZXivL_v: |
| 18573 | case VE::VADDSWZXiv_v: |
| 18574 | case VE::VADDSWZXivl: |
| 18575 | case VE::VADDSWZXivl_v: |
| 18576 | case VE::VADDSWZXrv: |
| 18577 | case VE::VADDSWZXrvL: |
| 18578 | case VE::VADDSWZXrvL_v: |
| 18579 | case VE::VADDSWZXrv_v: |
| 18580 | case VE::VADDSWZXrvl: |
| 18581 | case VE::VADDSWZXrvl_v: |
| 18582 | case VE::VADDULiv: |
| 18583 | case VE::VADDULivL: |
| 18584 | case VE::VADDULivL_v: |
| 18585 | case VE::VADDULiv_v: |
| 18586 | case VE::VADDULivl: |
| 18587 | case VE::VADDULivl_v: |
| 18588 | case VE::VADDULrv: |
| 18589 | case VE::VADDULrvL: |
| 18590 | case VE::VADDULrvL_v: |
| 18591 | case VE::VADDULrv_v: |
| 18592 | case VE::VADDULrvl: |
| 18593 | case VE::VADDULrvl_v: |
| 18594 | case VE::VADDUWiv: |
| 18595 | case VE::VADDUWivL: |
| 18596 | case VE::VADDUWivL_v: |
| 18597 | case VE::VADDUWiv_v: |
| 18598 | case VE::VADDUWivl: |
| 18599 | case VE::VADDUWivl_v: |
| 18600 | case VE::VADDUWrv: |
| 18601 | case VE::VADDUWrvL: |
| 18602 | case VE::VADDUWrvL_v: |
| 18603 | case VE::VADDUWrv_v: |
| 18604 | case VE::VADDUWrvl: |
| 18605 | case VE::VADDUWrvl_v: |
| 18606 | case VE::VANDmv: |
| 18607 | case VE::VANDmvL: |
| 18608 | case VE::VANDmvL_v: |
| 18609 | case VE::VANDmv_v: |
| 18610 | case VE::VANDmvl: |
| 18611 | case VE::VANDmvl_v: |
| 18612 | case VE::VANDrv: |
| 18613 | case VE::VANDrvL: |
| 18614 | case VE::VANDrvL_v: |
| 18615 | case VE::VANDrv_v: |
| 18616 | case VE::VANDrvl: |
| 18617 | case VE::VANDrvl_v: |
| 18618 | case VE::VCMPSLiv: |
| 18619 | case VE::VCMPSLivL: |
| 18620 | case VE::VCMPSLivL_v: |
| 18621 | case VE::VCMPSLiv_v: |
| 18622 | case VE::VCMPSLivl: |
| 18623 | case VE::VCMPSLivl_v: |
| 18624 | case VE::VCMPSLrv: |
| 18625 | case VE::VCMPSLrvL: |
| 18626 | case VE::VCMPSLrvL_v: |
| 18627 | case VE::VCMPSLrv_v: |
| 18628 | case VE::VCMPSLrvl: |
| 18629 | case VE::VCMPSLrvl_v: |
| 18630 | case VE::VCMPSWSXiv: |
| 18631 | case VE::VCMPSWSXivL: |
| 18632 | case VE::VCMPSWSXivL_v: |
| 18633 | case VE::VCMPSWSXiv_v: |
| 18634 | case VE::VCMPSWSXivl: |
| 18635 | case VE::VCMPSWSXivl_v: |
| 18636 | case VE::VCMPSWSXrv: |
| 18637 | case VE::VCMPSWSXrvL: |
| 18638 | case VE::VCMPSWSXrvL_v: |
| 18639 | case VE::VCMPSWSXrv_v: |
| 18640 | case VE::VCMPSWSXrvl: |
| 18641 | case VE::VCMPSWSXrvl_v: |
| 18642 | case VE::VCMPSWZXiv: |
| 18643 | case VE::VCMPSWZXivL: |
| 18644 | case VE::VCMPSWZXivL_v: |
| 18645 | case VE::VCMPSWZXiv_v: |
| 18646 | case VE::VCMPSWZXivl: |
| 18647 | case VE::VCMPSWZXivl_v: |
| 18648 | case VE::VCMPSWZXrv: |
| 18649 | case VE::VCMPSWZXrvL: |
| 18650 | case VE::VCMPSWZXrvL_v: |
| 18651 | case VE::VCMPSWZXrv_v: |
| 18652 | case VE::VCMPSWZXrvl: |
| 18653 | case VE::VCMPSWZXrvl_v: |
| 18654 | case VE::VCMPULiv: |
| 18655 | case VE::VCMPULivL: |
| 18656 | case VE::VCMPULivL_v: |
| 18657 | case VE::VCMPULiv_v: |
| 18658 | case VE::VCMPULivl: |
| 18659 | case VE::VCMPULivl_v: |
| 18660 | case VE::VCMPULrv: |
| 18661 | case VE::VCMPULrvL: |
| 18662 | case VE::VCMPULrvL_v: |
| 18663 | case VE::VCMPULrv_v: |
| 18664 | case VE::VCMPULrvl: |
| 18665 | case VE::VCMPULrvl_v: |
| 18666 | case VE::VCMPUWiv: |
| 18667 | case VE::VCMPUWivL: |
| 18668 | case VE::VCMPUWivL_v: |
| 18669 | case VE::VCMPUWiv_v: |
| 18670 | case VE::VCMPUWivl: |
| 18671 | case VE::VCMPUWivl_v: |
| 18672 | case VE::VCMPUWrv: |
| 18673 | case VE::VCMPUWrvL: |
| 18674 | case VE::VCMPUWrvL_v: |
| 18675 | case VE::VCMPUWrv_v: |
| 18676 | case VE::VCMPUWrvl: |
| 18677 | case VE::VCMPUWrvl_v: |
| 18678 | case VE::VDIVSLiv: |
| 18679 | case VE::VDIVSLivL: |
| 18680 | case VE::VDIVSLivL_v: |
| 18681 | case VE::VDIVSLiv_v: |
| 18682 | case VE::VDIVSLivl: |
| 18683 | case VE::VDIVSLivl_v: |
| 18684 | case VE::VDIVSLrv: |
| 18685 | case VE::VDIVSLrvL: |
| 18686 | case VE::VDIVSLrvL_v: |
| 18687 | case VE::VDIVSLrv_v: |
| 18688 | case VE::VDIVSLrvl: |
| 18689 | case VE::VDIVSLrvl_v: |
| 18690 | case VE::VDIVSWSXiv: |
| 18691 | case VE::VDIVSWSXivL: |
| 18692 | case VE::VDIVSWSXivL_v: |
| 18693 | case VE::VDIVSWSXiv_v: |
| 18694 | case VE::VDIVSWSXivl: |
| 18695 | case VE::VDIVSWSXivl_v: |
| 18696 | case VE::VDIVSWSXrv: |
| 18697 | case VE::VDIVSWSXrvL: |
| 18698 | case VE::VDIVSWSXrvL_v: |
| 18699 | case VE::VDIVSWSXrv_v: |
| 18700 | case VE::VDIVSWSXrvl: |
| 18701 | case VE::VDIVSWSXrvl_v: |
| 18702 | case VE::VDIVSWZXiv: |
| 18703 | case VE::VDIVSWZXivL: |
| 18704 | case VE::VDIVSWZXivL_v: |
| 18705 | case VE::VDIVSWZXiv_v: |
| 18706 | case VE::VDIVSWZXivl: |
| 18707 | case VE::VDIVSWZXivl_v: |
| 18708 | case VE::VDIVSWZXrv: |
| 18709 | case VE::VDIVSWZXrvL: |
| 18710 | case VE::VDIVSWZXrvL_v: |
| 18711 | case VE::VDIVSWZXrv_v: |
| 18712 | case VE::VDIVSWZXrvl: |
| 18713 | case VE::VDIVSWZXrvl_v: |
| 18714 | case VE::VDIVULiv: |
| 18715 | case VE::VDIVULivL: |
| 18716 | case VE::VDIVULivL_v: |
| 18717 | case VE::VDIVULiv_v: |
| 18718 | case VE::VDIVULivl: |
| 18719 | case VE::VDIVULivl_v: |
| 18720 | case VE::VDIVULrv: |
| 18721 | case VE::VDIVULrvL: |
| 18722 | case VE::VDIVULrvL_v: |
| 18723 | case VE::VDIVULrv_v: |
| 18724 | case VE::VDIVULrvl: |
| 18725 | case VE::VDIVULrvl_v: |
| 18726 | case VE::VDIVUWiv: |
| 18727 | case VE::VDIVUWivL: |
| 18728 | case VE::VDIVUWivL_v: |
| 18729 | case VE::VDIVUWiv_v: |
| 18730 | case VE::VDIVUWivl: |
| 18731 | case VE::VDIVUWivl_v: |
| 18732 | case VE::VDIVUWrv: |
| 18733 | case VE::VDIVUWrvL: |
| 18734 | case VE::VDIVUWrvL_v: |
| 18735 | case VE::VDIVUWrv_v: |
| 18736 | case VE::VDIVUWrvl: |
| 18737 | case VE::VDIVUWrvl_v: |
| 18738 | case VE::VEQVmv: |
| 18739 | case VE::VEQVmvL: |
| 18740 | case VE::VEQVmvL_v: |
| 18741 | case VE::VEQVmv_v: |
| 18742 | case VE::VEQVmvl: |
| 18743 | case VE::VEQVmvl_v: |
| 18744 | case VE::VEQVrv: |
| 18745 | case VE::VEQVrvL: |
| 18746 | case VE::VEQVrvL_v: |
| 18747 | case VE::VEQVrv_v: |
| 18748 | case VE::VEQVrvl: |
| 18749 | case VE::VEQVrvl_v: |
| 18750 | case VE::VFADDDiv: |
| 18751 | case VE::VFADDDivL: |
| 18752 | case VE::VFADDDivL_v: |
| 18753 | case VE::VFADDDiv_v: |
| 18754 | case VE::VFADDDivl: |
| 18755 | case VE::VFADDDivl_v: |
| 18756 | case VE::VFADDDrv: |
| 18757 | case VE::VFADDDrvL: |
| 18758 | case VE::VFADDDrvL_v: |
| 18759 | case VE::VFADDDrv_v: |
| 18760 | case VE::VFADDDrvl: |
| 18761 | case VE::VFADDDrvl_v: |
| 18762 | case VE::VFADDSiv: |
| 18763 | case VE::VFADDSivL: |
| 18764 | case VE::VFADDSivL_v: |
| 18765 | case VE::VFADDSiv_v: |
| 18766 | case VE::VFADDSivl: |
| 18767 | case VE::VFADDSivl_v: |
| 18768 | case VE::VFADDSrv: |
| 18769 | case VE::VFADDSrvL: |
| 18770 | case VE::VFADDSrvL_v: |
| 18771 | case VE::VFADDSrv_v: |
| 18772 | case VE::VFADDSrvl: |
| 18773 | case VE::VFADDSrvl_v: |
| 18774 | case VE::VFCMPDiv: |
| 18775 | case VE::VFCMPDivL: |
| 18776 | case VE::VFCMPDivL_v: |
| 18777 | case VE::VFCMPDiv_v: |
| 18778 | case VE::VFCMPDivl: |
| 18779 | case VE::VFCMPDivl_v: |
| 18780 | case VE::VFCMPDrv: |
| 18781 | case VE::VFCMPDrvL: |
| 18782 | case VE::VFCMPDrvL_v: |
| 18783 | case VE::VFCMPDrv_v: |
| 18784 | case VE::VFCMPDrvl: |
| 18785 | case VE::VFCMPDrvl_v: |
| 18786 | case VE::VFCMPSiv: |
| 18787 | case VE::VFCMPSivL: |
| 18788 | case VE::VFCMPSivL_v: |
| 18789 | case VE::VFCMPSiv_v: |
| 18790 | case VE::VFCMPSivl: |
| 18791 | case VE::VFCMPSivl_v: |
| 18792 | case VE::VFCMPSrv: |
| 18793 | case VE::VFCMPSrvL: |
| 18794 | case VE::VFCMPSrvL_v: |
| 18795 | case VE::VFCMPSrv_v: |
| 18796 | case VE::VFCMPSrvl: |
| 18797 | case VE::VFCMPSrvl_v: |
| 18798 | case VE::VFDIVDiv: |
| 18799 | case VE::VFDIVDivL: |
| 18800 | case VE::VFDIVDivL_v: |
| 18801 | case VE::VFDIVDiv_v: |
| 18802 | case VE::VFDIVDivl: |
| 18803 | case VE::VFDIVDivl_v: |
| 18804 | case VE::VFDIVDrv: |
| 18805 | case VE::VFDIVDrvL: |
| 18806 | case VE::VFDIVDrvL_v: |
| 18807 | case VE::VFDIVDrv_v: |
| 18808 | case VE::VFDIVDrvl: |
| 18809 | case VE::VFDIVDrvl_v: |
| 18810 | case VE::VFDIVSiv: |
| 18811 | case VE::VFDIVSivL: |
| 18812 | case VE::VFDIVSivL_v: |
| 18813 | case VE::VFDIVSiv_v: |
| 18814 | case VE::VFDIVSivl: |
| 18815 | case VE::VFDIVSivl_v: |
| 18816 | case VE::VFDIVSrv: |
| 18817 | case VE::VFDIVSrvL: |
| 18818 | case VE::VFDIVSrvL_v: |
| 18819 | case VE::VFDIVSrv_v: |
| 18820 | case VE::VFDIVSrvl: |
| 18821 | case VE::VFDIVSrvl_v: |
| 18822 | case VE::VFMAXDiv: |
| 18823 | case VE::VFMAXDivL: |
| 18824 | case VE::VFMAXDivL_v: |
| 18825 | case VE::VFMAXDiv_v: |
| 18826 | case VE::VFMAXDivl: |
| 18827 | case VE::VFMAXDivl_v: |
| 18828 | case VE::VFMAXDrv: |
| 18829 | case VE::VFMAXDrvL: |
| 18830 | case VE::VFMAXDrvL_v: |
| 18831 | case VE::VFMAXDrv_v: |
| 18832 | case VE::VFMAXDrvl: |
| 18833 | case VE::VFMAXDrvl_v: |
| 18834 | case VE::VFMAXSiv: |
| 18835 | case VE::VFMAXSivL: |
| 18836 | case VE::VFMAXSivL_v: |
| 18837 | case VE::VFMAXSiv_v: |
| 18838 | case VE::VFMAXSivl: |
| 18839 | case VE::VFMAXSivl_v: |
| 18840 | case VE::VFMAXSrv: |
| 18841 | case VE::VFMAXSrvL: |
| 18842 | case VE::VFMAXSrvL_v: |
| 18843 | case VE::VFMAXSrv_v: |
| 18844 | case VE::VFMAXSrvl: |
| 18845 | case VE::VFMAXSrvl_v: |
| 18846 | case VE::VFMINDiv: |
| 18847 | case VE::VFMINDivL: |
| 18848 | case VE::VFMINDivL_v: |
| 18849 | case VE::VFMINDiv_v: |
| 18850 | case VE::VFMINDivl: |
| 18851 | case VE::VFMINDivl_v: |
| 18852 | case VE::VFMINDrv: |
| 18853 | case VE::VFMINDrvL: |
| 18854 | case VE::VFMINDrvL_v: |
| 18855 | case VE::VFMINDrv_v: |
| 18856 | case VE::VFMINDrvl: |
| 18857 | case VE::VFMINDrvl_v: |
| 18858 | case VE::VFMINSiv: |
| 18859 | case VE::VFMINSivL: |
| 18860 | case VE::VFMINSivL_v: |
| 18861 | case VE::VFMINSiv_v: |
| 18862 | case VE::VFMINSivl: |
| 18863 | case VE::VFMINSivl_v: |
| 18864 | case VE::VFMINSrv: |
| 18865 | case VE::VFMINSrvL: |
| 18866 | case VE::VFMINSrvL_v: |
| 18867 | case VE::VFMINSrv_v: |
| 18868 | case VE::VFMINSrvl: |
| 18869 | case VE::VFMINSrvl_v: |
| 18870 | case VE::VFMULDiv: |
| 18871 | case VE::VFMULDivL: |
| 18872 | case VE::VFMULDivL_v: |
| 18873 | case VE::VFMULDiv_v: |
| 18874 | case VE::VFMULDivl: |
| 18875 | case VE::VFMULDivl_v: |
| 18876 | case VE::VFMULDrv: |
| 18877 | case VE::VFMULDrvL: |
| 18878 | case VE::VFMULDrvL_v: |
| 18879 | case VE::VFMULDrv_v: |
| 18880 | case VE::VFMULDrvl: |
| 18881 | case VE::VFMULDrvl_v: |
| 18882 | case VE::VFMULSiv: |
| 18883 | case VE::VFMULSivL: |
| 18884 | case VE::VFMULSivL_v: |
| 18885 | case VE::VFMULSiv_v: |
| 18886 | case VE::VFMULSivl: |
| 18887 | case VE::VFMULSivl_v: |
| 18888 | case VE::VFMULSrv: |
| 18889 | case VE::VFMULSrvL: |
| 18890 | case VE::VFMULSrvL_v: |
| 18891 | case VE::VFMULSrv_v: |
| 18892 | case VE::VFMULSrvl: |
| 18893 | case VE::VFMULSrvl_v: |
| 18894 | case VE::VFSUBDiv: |
| 18895 | case VE::VFSUBDivL: |
| 18896 | case VE::VFSUBDivL_v: |
| 18897 | case VE::VFSUBDiv_v: |
| 18898 | case VE::VFSUBDivl: |
| 18899 | case VE::VFSUBDivl_v: |
| 18900 | case VE::VFSUBDrv: |
| 18901 | case VE::VFSUBDrvL: |
| 18902 | case VE::VFSUBDrvL_v: |
| 18903 | case VE::VFSUBDrv_v: |
| 18904 | case VE::VFSUBDrvl: |
| 18905 | case VE::VFSUBDrvl_v: |
| 18906 | case VE::VFSUBSiv: |
| 18907 | case VE::VFSUBSivL: |
| 18908 | case VE::VFSUBSivL_v: |
| 18909 | case VE::VFSUBSiv_v: |
| 18910 | case VE::VFSUBSivl: |
| 18911 | case VE::VFSUBSivl_v: |
| 18912 | case VE::VFSUBSrv: |
| 18913 | case VE::VFSUBSrvL: |
| 18914 | case VE::VFSUBSrvL_v: |
| 18915 | case VE::VFSUBSrv_v: |
| 18916 | case VE::VFSUBSrvl: |
| 18917 | case VE::VFSUBSrvl_v: |
| 18918 | case VE::VMAXSLiv: |
| 18919 | case VE::VMAXSLivL: |
| 18920 | case VE::VMAXSLivL_v: |
| 18921 | case VE::VMAXSLiv_v: |
| 18922 | case VE::VMAXSLivl: |
| 18923 | case VE::VMAXSLivl_v: |
| 18924 | case VE::VMAXSLrv: |
| 18925 | case VE::VMAXSLrvL: |
| 18926 | case VE::VMAXSLrvL_v: |
| 18927 | case VE::VMAXSLrv_v: |
| 18928 | case VE::VMAXSLrvl: |
| 18929 | case VE::VMAXSLrvl_v: |
| 18930 | case VE::VMAXSWSXiv: |
| 18931 | case VE::VMAXSWSXivL: |
| 18932 | case VE::VMAXSWSXivL_v: |
| 18933 | case VE::VMAXSWSXiv_v: |
| 18934 | case VE::VMAXSWSXivl: |
| 18935 | case VE::VMAXSWSXivl_v: |
| 18936 | case VE::VMAXSWSXrv: |
| 18937 | case VE::VMAXSWSXrvL: |
| 18938 | case VE::VMAXSWSXrvL_v: |
| 18939 | case VE::VMAXSWSXrv_v: |
| 18940 | case VE::VMAXSWSXrvl: |
| 18941 | case VE::VMAXSWSXrvl_v: |
| 18942 | case VE::VMAXSWZXiv: |
| 18943 | case VE::VMAXSWZXivL: |
| 18944 | case VE::VMAXSWZXivL_v: |
| 18945 | case VE::VMAXSWZXiv_v: |
| 18946 | case VE::VMAXSWZXivl: |
| 18947 | case VE::VMAXSWZXivl_v: |
| 18948 | case VE::VMAXSWZXrv: |
| 18949 | case VE::VMAXSWZXrvL: |
| 18950 | case VE::VMAXSWZXrvL_v: |
| 18951 | case VE::VMAXSWZXrv_v: |
| 18952 | case VE::VMAXSWZXrvl: |
| 18953 | case VE::VMAXSWZXrvl_v: |
| 18954 | case VE::VMINSLiv: |
| 18955 | case VE::VMINSLivL: |
| 18956 | case VE::VMINSLivL_v: |
| 18957 | case VE::VMINSLiv_v: |
| 18958 | case VE::VMINSLivl: |
| 18959 | case VE::VMINSLivl_v: |
| 18960 | case VE::VMINSLrv: |
| 18961 | case VE::VMINSLrvL: |
| 18962 | case VE::VMINSLrvL_v: |
| 18963 | case VE::VMINSLrv_v: |
| 18964 | case VE::VMINSLrvl: |
| 18965 | case VE::VMINSLrvl_v: |
| 18966 | case VE::VMINSWSXiv: |
| 18967 | case VE::VMINSWSXivL: |
| 18968 | case VE::VMINSWSXivL_v: |
| 18969 | case VE::VMINSWSXiv_v: |
| 18970 | case VE::VMINSWSXivl: |
| 18971 | case VE::VMINSWSXivl_v: |
| 18972 | case VE::VMINSWSXrv: |
| 18973 | case VE::VMINSWSXrvL: |
| 18974 | case VE::VMINSWSXrvL_v: |
| 18975 | case VE::VMINSWSXrv_v: |
| 18976 | case VE::VMINSWSXrvl: |
| 18977 | case VE::VMINSWSXrvl_v: |
| 18978 | case VE::VMINSWZXiv: |
| 18979 | case VE::VMINSWZXivL: |
| 18980 | case VE::VMINSWZXivL_v: |
| 18981 | case VE::VMINSWZXiv_v: |
| 18982 | case VE::VMINSWZXivl: |
| 18983 | case VE::VMINSWZXivl_v: |
| 18984 | case VE::VMINSWZXrv: |
| 18985 | case VE::VMINSWZXrvL: |
| 18986 | case VE::VMINSWZXrvL_v: |
| 18987 | case VE::VMINSWZXrv_v: |
| 18988 | case VE::VMINSWZXrvl: |
| 18989 | case VE::VMINSWZXrvl_v: |
| 18990 | case VE::VMRGWiv: |
| 18991 | case VE::VMRGWivL: |
| 18992 | case VE::VMRGWivL_v: |
| 18993 | case VE::VMRGWiv_v: |
| 18994 | case VE::VMRGWivl: |
| 18995 | case VE::VMRGWivl_v: |
| 18996 | case VE::VMRGWrv: |
| 18997 | case VE::VMRGWrvL: |
| 18998 | case VE::VMRGWrvL_v: |
| 18999 | case VE::VMRGWrv_v: |
| 19000 | case VE::VMRGWrvl: |
| 19001 | case VE::VMRGWrvl_v: |
| 19002 | case VE::VMRGiv: |
| 19003 | case VE::VMRGivL: |
| 19004 | case VE::VMRGivL_v: |
| 19005 | case VE::VMRGiv_v: |
| 19006 | case VE::VMRGivl: |
| 19007 | case VE::VMRGivl_v: |
| 19008 | case VE::VMRGrv: |
| 19009 | case VE::VMRGrvL: |
| 19010 | case VE::VMRGrvL_v: |
| 19011 | case VE::VMRGrv_v: |
| 19012 | case VE::VMRGrvl: |
| 19013 | case VE::VMRGrvl_v: |
| 19014 | case VE::VMULSLWiv: |
| 19015 | case VE::VMULSLWivL: |
| 19016 | case VE::VMULSLWivL_v: |
| 19017 | case VE::VMULSLWiv_v: |
| 19018 | case VE::VMULSLWivl: |
| 19019 | case VE::VMULSLWivl_v: |
| 19020 | case VE::VMULSLWrv: |
| 19021 | case VE::VMULSLWrvL: |
| 19022 | case VE::VMULSLWrvL_v: |
| 19023 | case VE::VMULSLWrv_v: |
| 19024 | case VE::VMULSLWrvl: |
| 19025 | case VE::VMULSLWrvl_v: |
| 19026 | case VE::VMULSLiv: |
| 19027 | case VE::VMULSLivL: |
| 19028 | case VE::VMULSLivL_v: |
| 19029 | case VE::VMULSLiv_v: |
| 19030 | case VE::VMULSLivl: |
| 19031 | case VE::VMULSLivl_v: |
| 19032 | case VE::VMULSLrv: |
| 19033 | case VE::VMULSLrvL: |
| 19034 | case VE::VMULSLrvL_v: |
| 19035 | case VE::VMULSLrv_v: |
| 19036 | case VE::VMULSLrvl: |
| 19037 | case VE::VMULSLrvl_v: |
| 19038 | case VE::VMULSWSXiv: |
| 19039 | case VE::VMULSWSXivL: |
| 19040 | case VE::VMULSWSXivL_v: |
| 19041 | case VE::VMULSWSXiv_v: |
| 19042 | case VE::VMULSWSXivl: |
| 19043 | case VE::VMULSWSXivl_v: |
| 19044 | case VE::VMULSWSXrv: |
| 19045 | case VE::VMULSWSXrvL: |
| 19046 | case VE::VMULSWSXrvL_v: |
| 19047 | case VE::VMULSWSXrv_v: |
| 19048 | case VE::VMULSWSXrvl: |
| 19049 | case VE::VMULSWSXrvl_v: |
| 19050 | case VE::VMULSWZXiv: |
| 19051 | case VE::VMULSWZXivL: |
| 19052 | case VE::VMULSWZXivL_v: |
| 19053 | case VE::VMULSWZXiv_v: |
| 19054 | case VE::VMULSWZXivl: |
| 19055 | case VE::VMULSWZXivl_v: |
| 19056 | case VE::VMULSWZXrv: |
| 19057 | case VE::VMULSWZXrvL: |
| 19058 | case VE::VMULSWZXrvL_v: |
| 19059 | case VE::VMULSWZXrv_v: |
| 19060 | case VE::VMULSWZXrvl: |
| 19061 | case VE::VMULSWZXrvl_v: |
| 19062 | case VE::VMULULiv: |
| 19063 | case VE::VMULULivL: |
| 19064 | case VE::VMULULivL_v: |
| 19065 | case VE::VMULULiv_v: |
| 19066 | case VE::VMULULivl: |
| 19067 | case VE::VMULULivl_v: |
| 19068 | case VE::VMULULrv: |
| 19069 | case VE::VMULULrvL: |
| 19070 | case VE::VMULULrvL_v: |
| 19071 | case VE::VMULULrv_v: |
| 19072 | case VE::VMULULrvl: |
| 19073 | case VE::VMULULrvl_v: |
| 19074 | case VE::VMULUWiv: |
| 19075 | case VE::VMULUWivL: |
| 19076 | case VE::VMULUWivL_v: |
| 19077 | case VE::VMULUWiv_v: |
| 19078 | case VE::VMULUWivl: |
| 19079 | case VE::VMULUWivl_v: |
| 19080 | case VE::VMULUWrv: |
| 19081 | case VE::VMULUWrvL: |
| 19082 | case VE::VMULUWrvL_v: |
| 19083 | case VE::VMULUWrv_v: |
| 19084 | case VE::VMULUWrvl: |
| 19085 | case VE::VMULUWrvl_v: |
| 19086 | case VE::VMViv: |
| 19087 | case VE::VMVivL: |
| 19088 | case VE::VMVivL_v: |
| 19089 | case VE::VMViv_v: |
| 19090 | case VE::VMVivl: |
| 19091 | case VE::VMVivl_v: |
| 19092 | case VE::VMVrv: |
| 19093 | case VE::VMVrvL: |
| 19094 | case VE::VMVrvL_v: |
| 19095 | case VE::VMVrv_v: |
| 19096 | case VE::VMVrvl: |
| 19097 | case VE::VMVrvl_v: |
| 19098 | case VE::VORmv: |
| 19099 | case VE::VORmvL: |
| 19100 | case VE::VORmvL_v: |
| 19101 | case VE::VORmv_v: |
| 19102 | case VE::VORmvl: |
| 19103 | case VE::VORmvl_v: |
| 19104 | case VE::VORrv: |
| 19105 | case VE::VORrvL: |
| 19106 | case VE::VORrvL_v: |
| 19107 | case VE::VORrv_v: |
| 19108 | case VE::VORrvl: |
| 19109 | case VE::VORrvl_v: |
| 19110 | case VE::VSUBSLiv: |
| 19111 | case VE::VSUBSLivL: |
| 19112 | case VE::VSUBSLivL_v: |
| 19113 | case VE::VSUBSLiv_v: |
| 19114 | case VE::VSUBSLivl: |
| 19115 | case VE::VSUBSLivl_v: |
| 19116 | case VE::VSUBSLrv: |
| 19117 | case VE::VSUBSLrvL: |
| 19118 | case VE::VSUBSLrvL_v: |
| 19119 | case VE::VSUBSLrv_v: |
| 19120 | case VE::VSUBSLrvl: |
| 19121 | case VE::VSUBSLrvl_v: |
| 19122 | case VE::VSUBSWSXiv: |
| 19123 | case VE::VSUBSWSXivL: |
| 19124 | case VE::VSUBSWSXivL_v: |
| 19125 | case VE::VSUBSWSXiv_v: |
| 19126 | case VE::VSUBSWSXivl: |
| 19127 | case VE::VSUBSWSXivl_v: |
| 19128 | case VE::VSUBSWSXrv: |
| 19129 | case VE::VSUBSWSXrvL: |
| 19130 | case VE::VSUBSWSXrvL_v: |
| 19131 | case VE::VSUBSWSXrv_v: |
| 19132 | case VE::VSUBSWSXrvl: |
| 19133 | case VE::VSUBSWSXrvl_v: |
| 19134 | case VE::VSUBSWZXiv: |
| 19135 | case VE::VSUBSWZXivL: |
| 19136 | case VE::VSUBSWZXivL_v: |
| 19137 | case VE::VSUBSWZXiv_v: |
| 19138 | case VE::VSUBSWZXivl: |
| 19139 | case VE::VSUBSWZXivl_v: |
| 19140 | case VE::VSUBSWZXrv: |
| 19141 | case VE::VSUBSWZXrvL: |
| 19142 | case VE::VSUBSWZXrvL_v: |
| 19143 | case VE::VSUBSWZXrv_v: |
| 19144 | case VE::VSUBSWZXrvl: |
| 19145 | case VE::VSUBSWZXrvl_v: |
| 19146 | case VE::VSUBULiv: |
| 19147 | case VE::VSUBULivL: |
| 19148 | case VE::VSUBULivL_v: |
| 19149 | case VE::VSUBULiv_v: |
| 19150 | case VE::VSUBULivl: |
| 19151 | case VE::VSUBULivl_v: |
| 19152 | case VE::VSUBULrv: |
| 19153 | case VE::VSUBULrvL: |
| 19154 | case VE::VSUBULrvL_v: |
| 19155 | case VE::VSUBULrv_v: |
| 19156 | case VE::VSUBULrvl: |
| 19157 | case VE::VSUBULrvl_v: |
| 19158 | case VE::VSUBUWiv: |
| 19159 | case VE::VSUBUWivL: |
| 19160 | case VE::VSUBUWivL_v: |
| 19161 | case VE::VSUBUWiv_v: |
| 19162 | case VE::VSUBUWivl: |
| 19163 | case VE::VSUBUWivl_v: |
| 19164 | case VE::VSUBUWrv: |
| 19165 | case VE::VSUBUWrvL: |
| 19166 | case VE::VSUBUWrvL_v: |
| 19167 | case VE::VSUBUWrv_v: |
| 19168 | case VE::VSUBUWrvl: |
| 19169 | case VE::VSUBUWrvl_v: |
| 19170 | case VE::VXORmv: |
| 19171 | case VE::VXORmvL: |
| 19172 | case VE::VXORmvL_v: |
| 19173 | case VE::VXORmv_v: |
| 19174 | case VE::VXORmvl: |
| 19175 | case VE::VXORmvl_v: |
| 19176 | case VE::VXORrv: |
| 19177 | case VE::VXORrvL: |
| 19178 | case VE::VXORrvL_v: |
| 19179 | case VE::VXORrv_v: |
| 19180 | case VE::VXORrvl: |
| 19181 | case VE::VXORrvl_v: { |
| 19182 | // op: sy |
| 19183 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 19184 | op &= UINT64_C(127); |
| 19185 | op <<= 40; |
| 19186 | Value |= op; |
| 19187 | // op: vx |
| 19188 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 19189 | op &= UINT64_C(255); |
| 19190 | op <<= 24; |
| 19191 | Value |= op; |
| 19192 | // op: vz |
| 19193 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 19194 | op &= UINT64_C(255); |
| 19195 | op <<= 8; |
| 19196 | Value |= op; |
| 19197 | break; |
| 19198 | } |
| 19199 | case VE::PVFMADLOivv: |
| 19200 | case VE::PVFMADLOivvL: |
| 19201 | case VE::PVFMADLOivvL_v: |
| 19202 | case VE::PVFMADLOivv_v: |
| 19203 | case VE::PVFMADLOivvl: |
| 19204 | case VE::PVFMADLOivvl_v: |
| 19205 | case VE::PVFMADLOrvv: |
| 19206 | case VE::PVFMADLOrvvL: |
| 19207 | case VE::PVFMADLOrvvL_v: |
| 19208 | case VE::PVFMADLOrvv_v: |
| 19209 | case VE::PVFMADLOrvvl: |
| 19210 | case VE::PVFMADLOrvvl_v: |
| 19211 | case VE::PVFMADUPivv: |
| 19212 | case VE::PVFMADUPivvL: |
| 19213 | case VE::PVFMADUPivvL_v: |
| 19214 | case VE::PVFMADUPivv_v: |
| 19215 | case VE::PVFMADUPivvl: |
| 19216 | case VE::PVFMADUPivvl_v: |
| 19217 | case VE::PVFMADUPrvv: |
| 19218 | case VE::PVFMADUPrvvL: |
| 19219 | case VE::PVFMADUPrvvL_v: |
| 19220 | case VE::PVFMADUPrvv_v: |
| 19221 | case VE::PVFMADUPrvvl: |
| 19222 | case VE::PVFMADUPrvvl_v: |
| 19223 | case VE::PVFMADivv: |
| 19224 | case VE::PVFMADivvL: |
| 19225 | case VE::PVFMADivvL_v: |
| 19226 | case VE::PVFMADivv_v: |
| 19227 | case VE::PVFMADivvl: |
| 19228 | case VE::PVFMADivvl_v: |
| 19229 | case VE::PVFMADrvv: |
| 19230 | case VE::PVFMADrvvL: |
| 19231 | case VE::PVFMADrvvL_v: |
| 19232 | case VE::PVFMADrvv_v: |
| 19233 | case VE::PVFMADrvvl: |
| 19234 | case VE::PVFMADrvvl_v: |
| 19235 | case VE::PVFMSBLOivv: |
| 19236 | case VE::PVFMSBLOivvL: |
| 19237 | case VE::PVFMSBLOivvL_v: |
| 19238 | case VE::PVFMSBLOivv_v: |
| 19239 | case VE::PVFMSBLOivvl: |
| 19240 | case VE::PVFMSBLOivvl_v: |
| 19241 | case VE::PVFMSBLOrvv: |
| 19242 | case VE::PVFMSBLOrvvL: |
| 19243 | case VE::PVFMSBLOrvvL_v: |
| 19244 | case VE::PVFMSBLOrvv_v: |
| 19245 | case VE::PVFMSBLOrvvl: |
| 19246 | case VE::PVFMSBLOrvvl_v: |
| 19247 | case VE::PVFMSBUPivv: |
| 19248 | case VE::PVFMSBUPivvL: |
| 19249 | case VE::PVFMSBUPivvL_v: |
| 19250 | case VE::PVFMSBUPivv_v: |
| 19251 | case VE::PVFMSBUPivvl: |
| 19252 | case VE::PVFMSBUPivvl_v: |
| 19253 | case VE::PVFMSBUPrvv: |
| 19254 | case VE::PVFMSBUPrvvL: |
| 19255 | case VE::PVFMSBUPrvvL_v: |
| 19256 | case VE::PVFMSBUPrvv_v: |
| 19257 | case VE::PVFMSBUPrvvl: |
| 19258 | case VE::PVFMSBUPrvvl_v: |
| 19259 | case VE::PVFMSBivv: |
| 19260 | case VE::PVFMSBivvL: |
| 19261 | case VE::PVFMSBivvL_v: |
| 19262 | case VE::PVFMSBivv_v: |
| 19263 | case VE::PVFMSBivvl: |
| 19264 | case VE::PVFMSBivvl_v: |
| 19265 | case VE::PVFMSBrvv: |
| 19266 | case VE::PVFMSBrvvL: |
| 19267 | case VE::PVFMSBrvvL_v: |
| 19268 | case VE::PVFMSBrvv_v: |
| 19269 | case VE::PVFMSBrvvl: |
| 19270 | case VE::PVFMSBrvvl_v: |
| 19271 | case VE::PVFNMADLOivv: |
| 19272 | case VE::PVFNMADLOivvL: |
| 19273 | case VE::PVFNMADLOivvL_v: |
| 19274 | case VE::PVFNMADLOivv_v: |
| 19275 | case VE::PVFNMADLOivvl: |
| 19276 | case VE::PVFNMADLOivvl_v: |
| 19277 | case VE::PVFNMADLOrvv: |
| 19278 | case VE::PVFNMADLOrvvL: |
| 19279 | case VE::PVFNMADLOrvvL_v: |
| 19280 | case VE::PVFNMADLOrvv_v: |
| 19281 | case VE::PVFNMADLOrvvl: |
| 19282 | case VE::PVFNMADLOrvvl_v: |
| 19283 | case VE::PVFNMADUPivv: |
| 19284 | case VE::PVFNMADUPivvL: |
| 19285 | case VE::PVFNMADUPivvL_v: |
| 19286 | case VE::PVFNMADUPivv_v: |
| 19287 | case VE::PVFNMADUPivvl: |
| 19288 | case VE::PVFNMADUPivvl_v: |
| 19289 | case VE::PVFNMADUPrvv: |
| 19290 | case VE::PVFNMADUPrvvL: |
| 19291 | case VE::PVFNMADUPrvvL_v: |
| 19292 | case VE::PVFNMADUPrvv_v: |
| 19293 | case VE::PVFNMADUPrvvl: |
| 19294 | case VE::PVFNMADUPrvvl_v: |
| 19295 | case VE::PVFNMADivv: |
| 19296 | case VE::PVFNMADivvL: |
| 19297 | case VE::PVFNMADivvL_v: |
| 19298 | case VE::PVFNMADivv_v: |
| 19299 | case VE::PVFNMADivvl: |
| 19300 | case VE::PVFNMADivvl_v: |
| 19301 | case VE::PVFNMADrvv: |
| 19302 | case VE::PVFNMADrvvL: |
| 19303 | case VE::PVFNMADrvvL_v: |
| 19304 | case VE::PVFNMADrvv_v: |
| 19305 | case VE::PVFNMADrvvl: |
| 19306 | case VE::PVFNMADrvvl_v: |
| 19307 | case VE::PVFNMSBLOivv: |
| 19308 | case VE::PVFNMSBLOivvL: |
| 19309 | case VE::PVFNMSBLOivvL_v: |
| 19310 | case VE::PVFNMSBLOivv_v: |
| 19311 | case VE::PVFNMSBLOivvl: |
| 19312 | case VE::PVFNMSBLOivvl_v: |
| 19313 | case VE::PVFNMSBLOrvv: |
| 19314 | case VE::PVFNMSBLOrvvL: |
| 19315 | case VE::PVFNMSBLOrvvL_v: |
| 19316 | case VE::PVFNMSBLOrvv_v: |
| 19317 | case VE::PVFNMSBLOrvvl: |
| 19318 | case VE::PVFNMSBLOrvvl_v: |
| 19319 | case VE::PVFNMSBUPivv: |
| 19320 | case VE::PVFNMSBUPivvL: |
| 19321 | case VE::PVFNMSBUPivvL_v: |
| 19322 | case VE::PVFNMSBUPivv_v: |
| 19323 | case VE::PVFNMSBUPivvl: |
| 19324 | case VE::PVFNMSBUPivvl_v: |
| 19325 | case VE::PVFNMSBUPrvv: |
| 19326 | case VE::PVFNMSBUPrvvL: |
| 19327 | case VE::PVFNMSBUPrvvL_v: |
| 19328 | case VE::PVFNMSBUPrvv_v: |
| 19329 | case VE::PVFNMSBUPrvvl: |
| 19330 | case VE::PVFNMSBUPrvvl_v: |
| 19331 | case VE::PVFNMSBivv: |
| 19332 | case VE::PVFNMSBivvL: |
| 19333 | case VE::PVFNMSBivvL_v: |
| 19334 | case VE::PVFNMSBivv_v: |
| 19335 | case VE::PVFNMSBivvl: |
| 19336 | case VE::PVFNMSBivvl_v: |
| 19337 | case VE::PVFNMSBrvv: |
| 19338 | case VE::PVFNMSBrvvL: |
| 19339 | case VE::PVFNMSBrvvL_v: |
| 19340 | case VE::PVFNMSBrvv_v: |
| 19341 | case VE::PVFNMSBrvvl: |
| 19342 | case VE::PVFNMSBrvvl_v: |
| 19343 | case VE::VFMADDivv: |
| 19344 | case VE::VFMADDivvL: |
| 19345 | case VE::VFMADDivvL_v: |
| 19346 | case VE::VFMADDivv_v: |
| 19347 | case VE::VFMADDivvl: |
| 19348 | case VE::VFMADDivvl_v: |
| 19349 | case VE::VFMADDrvv: |
| 19350 | case VE::VFMADDrvvL: |
| 19351 | case VE::VFMADDrvvL_v: |
| 19352 | case VE::VFMADDrvv_v: |
| 19353 | case VE::VFMADDrvvl: |
| 19354 | case VE::VFMADDrvvl_v: |
| 19355 | case VE::VFMADSivv: |
| 19356 | case VE::VFMADSivvL: |
| 19357 | case VE::VFMADSivvL_v: |
| 19358 | case VE::VFMADSivv_v: |
| 19359 | case VE::VFMADSivvl: |
| 19360 | case VE::VFMADSivvl_v: |
| 19361 | case VE::VFMADSrvv: |
| 19362 | case VE::VFMADSrvvL: |
| 19363 | case VE::VFMADSrvvL_v: |
| 19364 | case VE::VFMADSrvv_v: |
| 19365 | case VE::VFMADSrvvl: |
| 19366 | case VE::VFMADSrvvl_v: |
| 19367 | case VE::VFMSBDivv: |
| 19368 | case VE::VFMSBDivvL: |
| 19369 | case VE::VFMSBDivvL_v: |
| 19370 | case VE::VFMSBDivv_v: |
| 19371 | case VE::VFMSBDivvl: |
| 19372 | case VE::VFMSBDivvl_v: |
| 19373 | case VE::VFMSBDrvv: |
| 19374 | case VE::VFMSBDrvvL: |
| 19375 | case VE::VFMSBDrvvL_v: |
| 19376 | case VE::VFMSBDrvv_v: |
| 19377 | case VE::VFMSBDrvvl: |
| 19378 | case VE::VFMSBDrvvl_v: |
| 19379 | case VE::VFMSBSivv: |
| 19380 | case VE::VFMSBSivvL: |
| 19381 | case VE::VFMSBSivvL_v: |
| 19382 | case VE::VFMSBSivv_v: |
| 19383 | case VE::VFMSBSivvl: |
| 19384 | case VE::VFMSBSivvl_v: |
| 19385 | case VE::VFMSBSrvv: |
| 19386 | case VE::VFMSBSrvvL: |
| 19387 | case VE::VFMSBSrvvL_v: |
| 19388 | case VE::VFMSBSrvv_v: |
| 19389 | case VE::VFMSBSrvvl: |
| 19390 | case VE::VFMSBSrvvl_v: |
| 19391 | case VE::VFNMADDivv: |
| 19392 | case VE::VFNMADDivvL: |
| 19393 | case VE::VFNMADDivvL_v: |
| 19394 | case VE::VFNMADDivv_v: |
| 19395 | case VE::VFNMADDivvl: |
| 19396 | case VE::VFNMADDivvl_v: |
| 19397 | case VE::VFNMADDrvv: |
| 19398 | case VE::VFNMADDrvvL: |
| 19399 | case VE::VFNMADDrvvL_v: |
| 19400 | case VE::VFNMADDrvv_v: |
| 19401 | case VE::VFNMADDrvvl: |
| 19402 | case VE::VFNMADDrvvl_v: |
| 19403 | case VE::VFNMADSivv: |
| 19404 | case VE::VFNMADSivvL: |
| 19405 | case VE::VFNMADSivvL_v: |
| 19406 | case VE::VFNMADSivv_v: |
| 19407 | case VE::VFNMADSivvl: |
| 19408 | case VE::VFNMADSivvl_v: |
| 19409 | case VE::VFNMADSrvv: |
| 19410 | case VE::VFNMADSrvvL: |
| 19411 | case VE::VFNMADSrvvL_v: |
| 19412 | case VE::VFNMADSrvv_v: |
| 19413 | case VE::VFNMADSrvvl: |
| 19414 | case VE::VFNMADSrvvl_v: |
| 19415 | case VE::VFNMSBDivv: |
| 19416 | case VE::VFNMSBDivvL: |
| 19417 | case VE::VFNMSBDivvL_v: |
| 19418 | case VE::VFNMSBDivv_v: |
| 19419 | case VE::VFNMSBDivvl: |
| 19420 | case VE::VFNMSBDivvl_v: |
| 19421 | case VE::VFNMSBDrvv: |
| 19422 | case VE::VFNMSBDrvvL: |
| 19423 | case VE::VFNMSBDrvvL_v: |
| 19424 | case VE::VFNMSBDrvv_v: |
| 19425 | case VE::VFNMSBDrvvl: |
| 19426 | case VE::VFNMSBDrvvl_v: |
| 19427 | case VE::VFNMSBSivv: |
| 19428 | case VE::VFNMSBSivvL: |
| 19429 | case VE::VFNMSBSivvL_v: |
| 19430 | case VE::VFNMSBSivv_v: |
| 19431 | case VE::VFNMSBSivvl: |
| 19432 | case VE::VFNMSBSivvl_v: |
| 19433 | case VE::VFNMSBSrvv: |
| 19434 | case VE::VFNMSBSrvvL: |
| 19435 | case VE::VFNMSBSrvvL_v: |
| 19436 | case VE::VFNMSBSrvv_v: |
| 19437 | case VE::VFNMSBSrvvl: |
| 19438 | case VE::VFNMSBSrvvl_v: { |
| 19439 | // op: sy |
| 19440 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 19441 | op &= UINT64_C(127); |
| 19442 | op <<= 40; |
| 19443 | Value |= op; |
| 19444 | // op: vx |
| 19445 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 19446 | op &= UINT64_C(255); |
| 19447 | op <<= 24; |
| 19448 | Value |= op; |
| 19449 | // op: vz |
| 19450 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 19451 | op &= UINT64_C(255); |
| 19452 | op <<= 8; |
| 19453 | Value |= op; |
| 19454 | // op: vw |
| 19455 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 19456 | op &= UINT64_C(255); |
| 19457 | Value |= op; |
| 19458 | break; |
| 19459 | } |
| 19460 | case VE::VGTLSXNCsir: |
| 19461 | case VE::VGTLSXNCsirL: |
| 19462 | case VE::VGTLSXNCsirL_v: |
| 19463 | case VE::VGTLSXNCsir_v: |
| 19464 | case VE::VGTLSXNCsirl: |
| 19465 | case VE::VGTLSXNCsirl_v: |
| 19466 | case VE::VGTLSXNCsiz: |
| 19467 | case VE::VGTLSXNCsizL: |
| 19468 | case VE::VGTLSXNCsizL_v: |
| 19469 | case VE::VGTLSXNCsiz_v: |
| 19470 | case VE::VGTLSXNCsizl: |
| 19471 | case VE::VGTLSXNCsizl_v: |
| 19472 | case VE::VGTLSXNCsrr: |
| 19473 | case VE::VGTLSXNCsrrL: |
| 19474 | case VE::VGTLSXNCsrrL_v: |
| 19475 | case VE::VGTLSXNCsrr_v: |
| 19476 | case VE::VGTLSXNCsrrl: |
| 19477 | case VE::VGTLSXNCsrrl_v: |
| 19478 | case VE::VGTLSXNCsrz: |
| 19479 | case VE::VGTLSXNCsrzL: |
| 19480 | case VE::VGTLSXNCsrzL_v: |
| 19481 | case VE::VGTLSXNCsrz_v: |
| 19482 | case VE::VGTLSXNCsrzl: |
| 19483 | case VE::VGTLSXNCsrzl_v: |
| 19484 | case VE::VGTLSXsir: |
| 19485 | case VE::VGTLSXsirL: |
| 19486 | case VE::VGTLSXsirL_v: |
| 19487 | case VE::VGTLSXsir_v: |
| 19488 | case VE::VGTLSXsirl: |
| 19489 | case VE::VGTLSXsirl_v: |
| 19490 | case VE::VGTLSXsiz: |
| 19491 | case VE::VGTLSXsizL: |
| 19492 | case VE::VGTLSXsizL_v: |
| 19493 | case VE::VGTLSXsiz_v: |
| 19494 | case VE::VGTLSXsizl: |
| 19495 | case VE::VGTLSXsizl_v: |
| 19496 | case VE::VGTLSXsrr: |
| 19497 | case VE::VGTLSXsrrL: |
| 19498 | case VE::VGTLSXsrrL_v: |
| 19499 | case VE::VGTLSXsrr_v: |
| 19500 | case VE::VGTLSXsrrl: |
| 19501 | case VE::VGTLSXsrrl_v: |
| 19502 | case VE::VGTLSXsrz: |
| 19503 | case VE::VGTLSXsrzL: |
| 19504 | case VE::VGTLSXsrzL_v: |
| 19505 | case VE::VGTLSXsrz_v: |
| 19506 | case VE::VGTLSXsrzl: |
| 19507 | case VE::VGTLSXsrzl_v: |
| 19508 | case VE::VGTLZXNCsir: |
| 19509 | case VE::VGTLZXNCsirL: |
| 19510 | case VE::VGTLZXNCsirL_v: |
| 19511 | case VE::VGTLZXNCsir_v: |
| 19512 | case VE::VGTLZXNCsirl: |
| 19513 | case VE::VGTLZXNCsirl_v: |
| 19514 | case VE::VGTLZXNCsiz: |
| 19515 | case VE::VGTLZXNCsizL: |
| 19516 | case VE::VGTLZXNCsizL_v: |
| 19517 | case VE::VGTLZXNCsiz_v: |
| 19518 | case VE::VGTLZXNCsizl: |
| 19519 | case VE::VGTLZXNCsizl_v: |
| 19520 | case VE::VGTLZXNCsrr: |
| 19521 | case VE::VGTLZXNCsrrL: |
| 19522 | case VE::VGTLZXNCsrrL_v: |
| 19523 | case VE::VGTLZXNCsrr_v: |
| 19524 | case VE::VGTLZXNCsrrl: |
| 19525 | case VE::VGTLZXNCsrrl_v: |
| 19526 | case VE::VGTLZXNCsrz: |
| 19527 | case VE::VGTLZXNCsrzL: |
| 19528 | case VE::VGTLZXNCsrzL_v: |
| 19529 | case VE::VGTLZXNCsrz_v: |
| 19530 | case VE::VGTLZXNCsrzl: |
| 19531 | case VE::VGTLZXNCsrzl_v: |
| 19532 | case VE::VGTLZXsir: |
| 19533 | case VE::VGTLZXsirL: |
| 19534 | case VE::VGTLZXsirL_v: |
| 19535 | case VE::VGTLZXsir_v: |
| 19536 | case VE::VGTLZXsirl: |
| 19537 | case VE::VGTLZXsirl_v: |
| 19538 | case VE::VGTLZXsiz: |
| 19539 | case VE::VGTLZXsizL: |
| 19540 | case VE::VGTLZXsizL_v: |
| 19541 | case VE::VGTLZXsiz_v: |
| 19542 | case VE::VGTLZXsizl: |
| 19543 | case VE::VGTLZXsizl_v: |
| 19544 | case VE::VGTLZXsrr: |
| 19545 | case VE::VGTLZXsrrL: |
| 19546 | case VE::VGTLZXsrrL_v: |
| 19547 | case VE::VGTLZXsrr_v: |
| 19548 | case VE::VGTLZXsrrl: |
| 19549 | case VE::VGTLZXsrrl_v: |
| 19550 | case VE::VGTLZXsrz: |
| 19551 | case VE::VGTLZXsrzL: |
| 19552 | case VE::VGTLZXsrzL_v: |
| 19553 | case VE::VGTLZXsrz_v: |
| 19554 | case VE::VGTLZXsrzl: |
| 19555 | case VE::VGTLZXsrzl_v: |
| 19556 | case VE::VGTNCsir: |
| 19557 | case VE::VGTNCsirL: |
| 19558 | case VE::VGTNCsirL_v: |
| 19559 | case VE::VGTNCsir_v: |
| 19560 | case VE::VGTNCsirl: |
| 19561 | case VE::VGTNCsirl_v: |
| 19562 | case VE::VGTNCsiz: |
| 19563 | case VE::VGTNCsizL: |
| 19564 | case VE::VGTNCsizL_v: |
| 19565 | case VE::VGTNCsiz_v: |
| 19566 | case VE::VGTNCsizl: |
| 19567 | case VE::VGTNCsizl_v: |
| 19568 | case VE::VGTNCsrr: |
| 19569 | case VE::VGTNCsrrL: |
| 19570 | case VE::VGTNCsrrL_v: |
| 19571 | case VE::VGTNCsrr_v: |
| 19572 | case VE::VGTNCsrrl: |
| 19573 | case VE::VGTNCsrrl_v: |
| 19574 | case VE::VGTNCsrz: |
| 19575 | case VE::VGTNCsrzL: |
| 19576 | case VE::VGTNCsrzL_v: |
| 19577 | case VE::VGTNCsrz_v: |
| 19578 | case VE::VGTNCsrzl: |
| 19579 | case VE::VGTNCsrzl_v: |
| 19580 | case VE::VGTUNCsir: |
| 19581 | case VE::VGTUNCsirL: |
| 19582 | case VE::VGTUNCsirL_v: |
| 19583 | case VE::VGTUNCsir_v: |
| 19584 | case VE::VGTUNCsirl: |
| 19585 | case VE::VGTUNCsirl_v: |
| 19586 | case VE::VGTUNCsiz: |
| 19587 | case VE::VGTUNCsizL: |
| 19588 | case VE::VGTUNCsizL_v: |
| 19589 | case VE::VGTUNCsiz_v: |
| 19590 | case VE::VGTUNCsizl: |
| 19591 | case VE::VGTUNCsizl_v: |
| 19592 | case VE::VGTUNCsrr: |
| 19593 | case VE::VGTUNCsrrL: |
| 19594 | case VE::VGTUNCsrrL_v: |
| 19595 | case VE::VGTUNCsrr_v: |
| 19596 | case VE::VGTUNCsrrl: |
| 19597 | case VE::VGTUNCsrrl_v: |
| 19598 | case VE::VGTUNCsrz: |
| 19599 | case VE::VGTUNCsrzL: |
| 19600 | case VE::VGTUNCsrzL_v: |
| 19601 | case VE::VGTUNCsrz_v: |
| 19602 | case VE::VGTUNCsrzl: |
| 19603 | case VE::VGTUNCsrzl_v: |
| 19604 | case VE::VGTUsir: |
| 19605 | case VE::VGTUsirL: |
| 19606 | case VE::VGTUsirL_v: |
| 19607 | case VE::VGTUsir_v: |
| 19608 | case VE::VGTUsirl: |
| 19609 | case VE::VGTUsirl_v: |
| 19610 | case VE::VGTUsiz: |
| 19611 | case VE::VGTUsizL: |
| 19612 | case VE::VGTUsizL_v: |
| 19613 | case VE::VGTUsiz_v: |
| 19614 | case VE::VGTUsizl: |
| 19615 | case VE::VGTUsizl_v: |
| 19616 | case VE::VGTUsrr: |
| 19617 | case VE::VGTUsrrL: |
| 19618 | case VE::VGTUsrrL_v: |
| 19619 | case VE::VGTUsrr_v: |
| 19620 | case VE::VGTUsrrl: |
| 19621 | case VE::VGTUsrrl_v: |
| 19622 | case VE::VGTUsrz: |
| 19623 | case VE::VGTUsrzL: |
| 19624 | case VE::VGTUsrzL_v: |
| 19625 | case VE::VGTUsrz_v: |
| 19626 | case VE::VGTUsrzl: |
| 19627 | case VE::VGTUsrzl_v: |
| 19628 | case VE::VGTsir: |
| 19629 | case VE::VGTsirL: |
| 19630 | case VE::VGTsirL_v: |
| 19631 | case VE::VGTsir_v: |
| 19632 | case VE::VGTsirl: |
| 19633 | case VE::VGTsirl_v: |
| 19634 | case VE::VGTsiz: |
| 19635 | case VE::VGTsizL: |
| 19636 | case VE::VGTsizL_v: |
| 19637 | case VE::VGTsiz_v: |
| 19638 | case VE::VGTsizl: |
| 19639 | case VE::VGTsizl_v: |
| 19640 | case VE::VGTsrr: |
| 19641 | case VE::VGTsrrL: |
| 19642 | case VE::VGTsrrL_v: |
| 19643 | case VE::VGTsrr_v: |
| 19644 | case VE::VGTsrrl: |
| 19645 | case VE::VGTsrrl_v: |
| 19646 | case VE::VGTsrz: |
| 19647 | case VE::VGTsrzL: |
| 19648 | case VE::VGTsrzL_v: |
| 19649 | case VE::VGTsrz_v: |
| 19650 | case VE::VGTsrzl: |
| 19651 | case VE::VGTsrzl_v: { |
| 19652 | // op: sy |
| 19653 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 19654 | op &= UINT64_C(127); |
| 19655 | op <<= 40; |
| 19656 | Value |= op; |
| 19657 | // op: sz |
| 19658 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 19659 | op &= UINT64_C(127); |
| 19660 | op <<= 32; |
| 19661 | Value |= op; |
| 19662 | // op: vx |
| 19663 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 19664 | op &= UINT64_C(255); |
| 19665 | op <<= 24; |
| 19666 | Value |= op; |
| 19667 | // op: sw |
| 19668 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 19669 | op &= UINT64_C(127); |
| 19670 | Value |= op; |
| 19671 | break; |
| 19672 | } |
| 19673 | case VE::VGTLSXNCvir: |
| 19674 | case VE::VGTLSXNCvirL: |
| 19675 | case VE::VGTLSXNCvirL_v: |
| 19676 | case VE::VGTLSXNCvir_v: |
| 19677 | case VE::VGTLSXNCvirl: |
| 19678 | case VE::VGTLSXNCvirl_v: |
| 19679 | case VE::VGTLSXNCviz: |
| 19680 | case VE::VGTLSXNCvizL: |
| 19681 | case VE::VGTLSXNCvizL_v: |
| 19682 | case VE::VGTLSXNCviz_v: |
| 19683 | case VE::VGTLSXNCvizl: |
| 19684 | case VE::VGTLSXNCvizl_v: |
| 19685 | case VE::VGTLSXNCvrr: |
| 19686 | case VE::VGTLSXNCvrrL: |
| 19687 | case VE::VGTLSXNCvrrL_v: |
| 19688 | case VE::VGTLSXNCvrr_v: |
| 19689 | case VE::VGTLSXNCvrrl: |
| 19690 | case VE::VGTLSXNCvrrl_v: |
| 19691 | case VE::VGTLSXNCvrz: |
| 19692 | case VE::VGTLSXNCvrzL: |
| 19693 | case VE::VGTLSXNCvrzL_v: |
| 19694 | case VE::VGTLSXNCvrz_v: |
| 19695 | case VE::VGTLSXNCvrzl: |
| 19696 | case VE::VGTLSXNCvrzl_v: |
| 19697 | case VE::VGTLSXvir: |
| 19698 | case VE::VGTLSXvirL: |
| 19699 | case VE::VGTLSXvirL_v: |
| 19700 | case VE::VGTLSXvir_v: |
| 19701 | case VE::VGTLSXvirl: |
| 19702 | case VE::VGTLSXvirl_v: |
| 19703 | case VE::VGTLSXviz: |
| 19704 | case VE::VGTLSXvizL: |
| 19705 | case VE::VGTLSXvizL_v: |
| 19706 | case VE::VGTLSXviz_v: |
| 19707 | case VE::VGTLSXvizl: |
| 19708 | case VE::VGTLSXvizl_v: |
| 19709 | case VE::VGTLSXvrr: |
| 19710 | case VE::VGTLSXvrrL: |
| 19711 | case VE::VGTLSXvrrL_v: |
| 19712 | case VE::VGTLSXvrr_v: |
| 19713 | case VE::VGTLSXvrrl: |
| 19714 | case VE::VGTLSXvrrl_v: |
| 19715 | case VE::VGTLSXvrz: |
| 19716 | case VE::VGTLSXvrzL: |
| 19717 | case VE::VGTLSXvrzL_v: |
| 19718 | case VE::VGTLSXvrz_v: |
| 19719 | case VE::VGTLSXvrzl: |
| 19720 | case VE::VGTLSXvrzl_v: |
| 19721 | case VE::VGTLZXNCvir: |
| 19722 | case VE::VGTLZXNCvirL: |
| 19723 | case VE::VGTLZXNCvirL_v: |
| 19724 | case VE::VGTLZXNCvir_v: |
| 19725 | case VE::VGTLZXNCvirl: |
| 19726 | case VE::VGTLZXNCvirl_v: |
| 19727 | case VE::VGTLZXNCviz: |
| 19728 | case VE::VGTLZXNCvizL: |
| 19729 | case VE::VGTLZXNCvizL_v: |
| 19730 | case VE::VGTLZXNCviz_v: |
| 19731 | case VE::VGTLZXNCvizl: |
| 19732 | case VE::VGTLZXNCvizl_v: |
| 19733 | case VE::VGTLZXNCvrr: |
| 19734 | case VE::VGTLZXNCvrrL: |
| 19735 | case VE::VGTLZXNCvrrL_v: |
| 19736 | case VE::VGTLZXNCvrr_v: |
| 19737 | case VE::VGTLZXNCvrrl: |
| 19738 | case VE::VGTLZXNCvrrl_v: |
| 19739 | case VE::VGTLZXNCvrz: |
| 19740 | case VE::VGTLZXNCvrzL: |
| 19741 | case VE::VGTLZXNCvrzL_v: |
| 19742 | case VE::VGTLZXNCvrz_v: |
| 19743 | case VE::VGTLZXNCvrzl: |
| 19744 | case VE::VGTLZXNCvrzl_v: |
| 19745 | case VE::VGTLZXvir: |
| 19746 | case VE::VGTLZXvirL: |
| 19747 | case VE::VGTLZXvirL_v: |
| 19748 | case VE::VGTLZXvir_v: |
| 19749 | case VE::VGTLZXvirl: |
| 19750 | case VE::VGTLZXvirl_v: |
| 19751 | case VE::VGTLZXviz: |
| 19752 | case VE::VGTLZXvizL: |
| 19753 | case VE::VGTLZXvizL_v: |
| 19754 | case VE::VGTLZXviz_v: |
| 19755 | case VE::VGTLZXvizl: |
| 19756 | case VE::VGTLZXvizl_v: |
| 19757 | case VE::VGTLZXvrr: |
| 19758 | case VE::VGTLZXvrrL: |
| 19759 | case VE::VGTLZXvrrL_v: |
| 19760 | case VE::VGTLZXvrr_v: |
| 19761 | case VE::VGTLZXvrrl: |
| 19762 | case VE::VGTLZXvrrl_v: |
| 19763 | case VE::VGTLZXvrz: |
| 19764 | case VE::VGTLZXvrzL: |
| 19765 | case VE::VGTLZXvrzL_v: |
| 19766 | case VE::VGTLZXvrz_v: |
| 19767 | case VE::VGTLZXvrzl: |
| 19768 | case VE::VGTLZXvrzl_v: |
| 19769 | case VE::VGTNCvir: |
| 19770 | case VE::VGTNCvirL: |
| 19771 | case VE::VGTNCvirL_v: |
| 19772 | case VE::VGTNCvir_v: |
| 19773 | case VE::VGTNCvirl: |
| 19774 | case VE::VGTNCvirl_v: |
| 19775 | case VE::VGTNCviz: |
| 19776 | case VE::VGTNCvizL: |
| 19777 | case VE::VGTNCvizL_v: |
| 19778 | case VE::VGTNCviz_v: |
| 19779 | case VE::VGTNCvizl: |
| 19780 | case VE::VGTNCvizl_v: |
| 19781 | case VE::VGTNCvrr: |
| 19782 | case VE::VGTNCvrrL: |
| 19783 | case VE::VGTNCvrrL_v: |
| 19784 | case VE::VGTNCvrr_v: |
| 19785 | case VE::VGTNCvrrl: |
| 19786 | case VE::VGTNCvrrl_v: |
| 19787 | case VE::VGTNCvrz: |
| 19788 | case VE::VGTNCvrzL: |
| 19789 | case VE::VGTNCvrzL_v: |
| 19790 | case VE::VGTNCvrz_v: |
| 19791 | case VE::VGTNCvrzl: |
| 19792 | case VE::VGTNCvrzl_v: |
| 19793 | case VE::VGTUNCvir: |
| 19794 | case VE::VGTUNCvirL: |
| 19795 | case VE::VGTUNCvirL_v: |
| 19796 | case VE::VGTUNCvir_v: |
| 19797 | case VE::VGTUNCvirl: |
| 19798 | case VE::VGTUNCvirl_v: |
| 19799 | case VE::VGTUNCviz: |
| 19800 | case VE::VGTUNCvizL: |
| 19801 | case VE::VGTUNCvizL_v: |
| 19802 | case VE::VGTUNCviz_v: |
| 19803 | case VE::VGTUNCvizl: |
| 19804 | case VE::VGTUNCvizl_v: |
| 19805 | case VE::VGTUNCvrr: |
| 19806 | case VE::VGTUNCvrrL: |
| 19807 | case VE::VGTUNCvrrL_v: |
| 19808 | case VE::VGTUNCvrr_v: |
| 19809 | case VE::VGTUNCvrrl: |
| 19810 | case VE::VGTUNCvrrl_v: |
| 19811 | case VE::VGTUNCvrz: |
| 19812 | case VE::VGTUNCvrzL: |
| 19813 | case VE::VGTUNCvrzL_v: |
| 19814 | case VE::VGTUNCvrz_v: |
| 19815 | case VE::VGTUNCvrzl: |
| 19816 | case VE::VGTUNCvrzl_v: |
| 19817 | case VE::VGTUvir: |
| 19818 | case VE::VGTUvirL: |
| 19819 | case VE::VGTUvirL_v: |
| 19820 | case VE::VGTUvir_v: |
| 19821 | case VE::VGTUvirl: |
| 19822 | case VE::VGTUvirl_v: |
| 19823 | case VE::VGTUviz: |
| 19824 | case VE::VGTUvizL: |
| 19825 | case VE::VGTUvizL_v: |
| 19826 | case VE::VGTUviz_v: |
| 19827 | case VE::VGTUvizl: |
| 19828 | case VE::VGTUvizl_v: |
| 19829 | case VE::VGTUvrr: |
| 19830 | case VE::VGTUvrrL: |
| 19831 | case VE::VGTUvrrL_v: |
| 19832 | case VE::VGTUvrr_v: |
| 19833 | case VE::VGTUvrrl: |
| 19834 | case VE::VGTUvrrl_v: |
| 19835 | case VE::VGTUvrz: |
| 19836 | case VE::VGTUvrzL: |
| 19837 | case VE::VGTUvrzL_v: |
| 19838 | case VE::VGTUvrz_v: |
| 19839 | case VE::VGTUvrzl: |
| 19840 | case VE::VGTUvrzl_v: |
| 19841 | case VE::VGTvir: |
| 19842 | case VE::VGTvirL: |
| 19843 | case VE::VGTvirL_v: |
| 19844 | case VE::VGTvir_v: |
| 19845 | case VE::VGTvirl: |
| 19846 | case VE::VGTvirl_v: |
| 19847 | case VE::VGTviz: |
| 19848 | case VE::VGTvizL: |
| 19849 | case VE::VGTvizL_v: |
| 19850 | case VE::VGTviz_v: |
| 19851 | case VE::VGTvizl: |
| 19852 | case VE::VGTvizl_v: |
| 19853 | case VE::VGTvrr: |
| 19854 | case VE::VGTvrrL: |
| 19855 | case VE::VGTvrrL_v: |
| 19856 | case VE::VGTvrr_v: |
| 19857 | case VE::VGTvrrl: |
| 19858 | case VE::VGTvrrl_v: |
| 19859 | case VE::VGTvrz: |
| 19860 | case VE::VGTvrzL: |
| 19861 | case VE::VGTvrzL_v: |
| 19862 | case VE::VGTvrz_v: |
| 19863 | case VE::VGTvrzl: |
| 19864 | case VE::VGTvrzl_v: { |
| 19865 | // op: sy |
| 19866 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 19867 | op &= UINT64_C(127); |
| 19868 | op <<= 40; |
| 19869 | Value |= op; |
| 19870 | // op: sz |
| 19871 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 19872 | op &= UINT64_C(127); |
| 19873 | op <<= 32; |
| 19874 | Value |= op; |
| 19875 | // op: vx |
| 19876 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 19877 | op &= UINT64_C(255); |
| 19878 | op <<= 24; |
| 19879 | Value |= op; |
| 19880 | // op: vy |
| 19881 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 19882 | op &= UINT64_C(255); |
| 19883 | op <<= 16; |
| 19884 | Value |= op; |
| 19885 | break; |
| 19886 | } |
| 19887 | case VE::VSFAvim: |
| 19888 | case VE::VSFAvimL: |
| 19889 | case VE::VSFAvimL_v: |
| 19890 | case VE::VSFAvim_v: |
| 19891 | case VE::VSFAviml: |
| 19892 | case VE::VSFAviml_v: |
| 19893 | case VE::VSFAvir: |
| 19894 | case VE::VSFAvirL: |
| 19895 | case VE::VSFAvirL_v: |
| 19896 | case VE::VSFAvir_v: |
| 19897 | case VE::VSFAvirl: |
| 19898 | case VE::VSFAvirl_v: |
| 19899 | case VE::VSFAvrm: |
| 19900 | case VE::VSFAvrmL: |
| 19901 | case VE::VSFAvrmL_v: |
| 19902 | case VE::VSFAvrm_v: |
| 19903 | case VE::VSFAvrml: |
| 19904 | case VE::VSFAvrml_v: |
| 19905 | case VE::VSFAvrr: |
| 19906 | case VE::VSFAvrrL: |
| 19907 | case VE::VSFAvrrL_v: |
| 19908 | case VE::VSFAvrr_v: |
| 19909 | case VE::VSFAvrrl: |
| 19910 | case VE::VSFAvrrl_v: { |
| 19911 | // op: sy |
| 19912 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 19913 | op &= UINT64_C(127); |
| 19914 | op <<= 40; |
| 19915 | Value |= op; |
| 19916 | // op: sz |
| 19917 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 19918 | op &= UINT64_C(127); |
| 19919 | op <<= 32; |
| 19920 | Value |= op; |
| 19921 | // op: vx |
| 19922 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 19923 | op &= UINT64_C(255); |
| 19924 | op <<= 24; |
| 19925 | Value |= op; |
| 19926 | // op: vz |
| 19927 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 19928 | op &= UINT64_C(255); |
| 19929 | op <<= 8; |
| 19930 | Value |= op; |
| 19931 | break; |
| 19932 | } |
| 19933 | case VE::VDIVSLvi: |
| 19934 | case VE::VDIVSLviL: |
| 19935 | case VE::VDIVSLviL_v: |
| 19936 | case VE::VDIVSLvi_v: |
| 19937 | case VE::VDIVSLvil: |
| 19938 | case VE::VDIVSLvil_v: |
| 19939 | case VE::VDIVSLvr: |
| 19940 | case VE::VDIVSLvrL: |
| 19941 | case VE::VDIVSLvrL_v: |
| 19942 | case VE::VDIVSLvr_v: |
| 19943 | case VE::VDIVSLvrl: |
| 19944 | case VE::VDIVSLvrl_v: |
| 19945 | case VE::VDIVSWSXvi: |
| 19946 | case VE::VDIVSWSXviL: |
| 19947 | case VE::VDIVSWSXviL_v: |
| 19948 | case VE::VDIVSWSXvi_v: |
| 19949 | case VE::VDIVSWSXvil: |
| 19950 | case VE::VDIVSWSXvil_v: |
| 19951 | case VE::VDIVSWSXvr: |
| 19952 | case VE::VDIVSWSXvrL: |
| 19953 | case VE::VDIVSWSXvrL_v: |
| 19954 | case VE::VDIVSWSXvr_v: |
| 19955 | case VE::VDIVSWSXvrl: |
| 19956 | case VE::VDIVSWSXvrl_v: |
| 19957 | case VE::VDIVSWZXvi: |
| 19958 | case VE::VDIVSWZXviL: |
| 19959 | case VE::VDIVSWZXviL_v: |
| 19960 | case VE::VDIVSWZXvi_v: |
| 19961 | case VE::VDIVSWZXvil: |
| 19962 | case VE::VDIVSWZXvil_v: |
| 19963 | case VE::VDIVSWZXvr: |
| 19964 | case VE::VDIVSWZXvrL: |
| 19965 | case VE::VDIVSWZXvrL_v: |
| 19966 | case VE::VDIVSWZXvr_v: |
| 19967 | case VE::VDIVSWZXvrl: |
| 19968 | case VE::VDIVSWZXvrl_v: |
| 19969 | case VE::VDIVULvi: |
| 19970 | case VE::VDIVULviL: |
| 19971 | case VE::VDIVULviL_v: |
| 19972 | case VE::VDIVULvi_v: |
| 19973 | case VE::VDIVULvil: |
| 19974 | case VE::VDIVULvil_v: |
| 19975 | case VE::VDIVULvr: |
| 19976 | case VE::VDIVULvrL: |
| 19977 | case VE::VDIVULvrL_v: |
| 19978 | case VE::VDIVULvr_v: |
| 19979 | case VE::VDIVULvrl: |
| 19980 | case VE::VDIVULvrl_v: |
| 19981 | case VE::VDIVUWvi: |
| 19982 | case VE::VDIVUWviL: |
| 19983 | case VE::VDIVUWviL_v: |
| 19984 | case VE::VDIVUWvi_v: |
| 19985 | case VE::VDIVUWvil: |
| 19986 | case VE::VDIVUWvil_v: |
| 19987 | case VE::VDIVUWvr: |
| 19988 | case VE::VDIVUWvrL: |
| 19989 | case VE::VDIVUWvrL_v: |
| 19990 | case VE::VDIVUWvr_v: |
| 19991 | case VE::VDIVUWvrl: |
| 19992 | case VE::VDIVUWvrl_v: |
| 19993 | case VE::VFDIVDvi: |
| 19994 | case VE::VFDIVDviL: |
| 19995 | case VE::VFDIVDviL_v: |
| 19996 | case VE::VFDIVDvi_v: |
| 19997 | case VE::VFDIVDvil: |
| 19998 | case VE::VFDIVDvil_v: |
| 19999 | case VE::VFDIVDvr: |
| 20000 | case VE::VFDIVDvrL: |
| 20001 | case VE::VFDIVDvrL_v: |
| 20002 | case VE::VFDIVDvr_v: |
| 20003 | case VE::VFDIVDvrl: |
| 20004 | case VE::VFDIVDvrl_v: |
| 20005 | case VE::VFDIVSvi: |
| 20006 | case VE::VFDIVSviL: |
| 20007 | case VE::VFDIVSviL_v: |
| 20008 | case VE::VFDIVSvi_v: |
| 20009 | case VE::VFDIVSvil: |
| 20010 | case VE::VFDIVSvil_v: |
| 20011 | case VE::VFDIVSvr: |
| 20012 | case VE::VFDIVSvrL: |
| 20013 | case VE::VFDIVSvrL_v: |
| 20014 | case VE::VFDIVSvr_v: |
| 20015 | case VE::VFDIVSvrl: |
| 20016 | case VE::VFDIVSvrl_v: |
| 20017 | case VE::VFIADvi: |
| 20018 | case VE::VFIADviL: |
| 20019 | case VE::VFIADviL_v: |
| 20020 | case VE::VFIADvi_v: |
| 20021 | case VE::VFIADvil: |
| 20022 | case VE::VFIADvil_v: |
| 20023 | case VE::VFIADvr: |
| 20024 | case VE::VFIADvrL: |
| 20025 | case VE::VFIADvrL_v: |
| 20026 | case VE::VFIADvr_v: |
| 20027 | case VE::VFIADvrl: |
| 20028 | case VE::VFIADvrl_v: |
| 20029 | case VE::VFIASvi: |
| 20030 | case VE::VFIASviL: |
| 20031 | case VE::VFIASviL_v: |
| 20032 | case VE::VFIASvi_v: |
| 20033 | case VE::VFIASvil: |
| 20034 | case VE::VFIASvil_v: |
| 20035 | case VE::VFIASvr: |
| 20036 | case VE::VFIASvrL: |
| 20037 | case VE::VFIASvrL_v: |
| 20038 | case VE::VFIASvr_v: |
| 20039 | case VE::VFIASvrl: |
| 20040 | case VE::VFIASvrl_v: |
| 20041 | case VE::VFIMDvi: |
| 20042 | case VE::VFIMDviL: |
| 20043 | case VE::VFIMDviL_v: |
| 20044 | case VE::VFIMDvi_v: |
| 20045 | case VE::VFIMDvil: |
| 20046 | case VE::VFIMDvil_v: |
| 20047 | case VE::VFIMDvr: |
| 20048 | case VE::VFIMDvrL: |
| 20049 | case VE::VFIMDvrL_v: |
| 20050 | case VE::VFIMDvr_v: |
| 20051 | case VE::VFIMDvrl: |
| 20052 | case VE::VFIMDvrl_v: |
| 20053 | case VE::VFIMSvi: |
| 20054 | case VE::VFIMSviL: |
| 20055 | case VE::VFIMSviL_v: |
| 20056 | case VE::VFIMSvi_v: |
| 20057 | case VE::VFIMSvil: |
| 20058 | case VE::VFIMSvil_v: |
| 20059 | case VE::VFIMSvr: |
| 20060 | case VE::VFIMSvrL: |
| 20061 | case VE::VFIMSvrL_v: |
| 20062 | case VE::VFIMSvr_v: |
| 20063 | case VE::VFIMSvrl: |
| 20064 | case VE::VFIMSvrl_v: |
| 20065 | case VE::VFISDvi: |
| 20066 | case VE::VFISDviL: |
| 20067 | case VE::VFISDviL_v: |
| 20068 | case VE::VFISDvi_v: |
| 20069 | case VE::VFISDvil: |
| 20070 | case VE::VFISDvil_v: |
| 20071 | case VE::VFISDvr: |
| 20072 | case VE::VFISDvrL: |
| 20073 | case VE::VFISDvrL_v: |
| 20074 | case VE::VFISDvr_v: |
| 20075 | case VE::VFISDvrl: |
| 20076 | case VE::VFISDvrl_v: |
| 20077 | case VE::VFISSvi: |
| 20078 | case VE::VFISSviL: |
| 20079 | case VE::VFISSviL_v: |
| 20080 | case VE::VFISSvi_v: |
| 20081 | case VE::VFISSvil: |
| 20082 | case VE::VFISSvil_v: |
| 20083 | case VE::VFISSvr: |
| 20084 | case VE::VFISSvrL: |
| 20085 | case VE::VFISSvrL_v: |
| 20086 | case VE::VFISSvr_v: |
| 20087 | case VE::VFISSvrl: |
| 20088 | case VE::VFISSvrl_v: { |
| 20089 | // op: sy |
| 20090 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20091 | op &= UINT64_C(127); |
| 20092 | op <<= 40; |
| 20093 | Value |= op; |
| 20094 | // op: vx |
| 20095 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20096 | op &= UINT64_C(255); |
| 20097 | op <<= 24; |
| 20098 | Value |= op; |
| 20099 | // op: vy |
| 20100 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20101 | op &= UINT64_C(255); |
| 20102 | op <<= 16; |
| 20103 | Value |= op; |
| 20104 | break; |
| 20105 | } |
| 20106 | case VE::PVFMADLOviv: |
| 20107 | case VE::PVFMADLOvivL: |
| 20108 | case VE::PVFMADLOvivL_v: |
| 20109 | case VE::PVFMADLOviv_v: |
| 20110 | case VE::PVFMADLOvivl: |
| 20111 | case VE::PVFMADLOvivl_v: |
| 20112 | case VE::PVFMADLOvrv: |
| 20113 | case VE::PVFMADLOvrvL: |
| 20114 | case VE::PVFMADLOvrvL_v: |
| 20115 | case VE::PVFMADLOvrv_v: |
| 20116 | case VE::PVFMADLOvrvl: |
| 20117 | case VE::PVFMADLOvrvl_v: |
| 20118 | case VE::PVFMADUPviv: |
| 20119 | case VE::PVFMADUPvivL: |
| 20120 | case VE::PVFMADUPvivL_v: |
| 20121 | case VE::PVFMADUPviv_v: |
| 20122 | case VE::PVFMADUPvivl: |
| 20123 | case VE::PVFMADUPvivl_v: |
| 20124 | case VE::PVFMADUPvrv: |
| 20125 | case VE::PVFMADUPvrvL: |
| 20126 | case VE::PVFMADUPvrvL_v: |
| 20127 | case VE::PVFMADUPvrv_v: |
| 20128 | case VE::PVFMADUPvrvl: |
| 20129 | case VE::PVFMADUPvrvl_v: |
| 20130 | case VE::PVFMADviv: |
| 20131 | case VE::PVFMADvivL: |
| 20132 | case VE::PVFMADvivL_v: |
| 20133 | case VE::PVFMADviv_v: |
| 20134 | case VE::PVFMADvivl: |
| 20135 | case VE::PVFMADvivl_v: |
| 20136 | case VE::PVFMADvrv: |
| 20137 | case VE::PVFMADvrvL: |
| 20138 | case VE::PVFMADvrvL_v: |
| 20139 | case VE::PVFMADvrv_v: |
| 20140 | case VE::PVFMADvrvl: |
| 20141 | case VE::PVFMADvrvl_v: |
| 20142 | case VE::PVFMSBLOviv: |
| 20143 | case VE::PVFMSBLOvivL: |
| 20144 | case VE::PVFMSBLOvivL_v: |
| 20145 | case VE::PVFMSBLOviv_v: |
| 20146 | case VE::PVFMSBLOvivl: |
| 20147 | case VE::PVFMSBLOvivl_v: |
| 20148 | case VE::PVFMSBLOvrv: |
| 20149 | case VE::PVFMSBLOvrvL: |
| 20150 | case VE::PVFMSBLOvrvL_v: |
| 20151 | case VE::PVFMSBLOvrv_v: |
| 20152 | case VE::PVFMSBLOvrvl: |
| 20153 | case VE::PVFMSBLOvrvl_v: |
| 20154 | case VE::PVFMSBUPviv: |
| 20155 | case VE::PVFMSBUPvivL: |
| 20156 | case VE::PVFMSBUPvivL_v: |
| 20157 | case VE::PVFMSBUPviv_v: |
| 20158 | case VE::PVFMSBUPvivl: |
| 20159 | case VE::PVFMSBUPvivl_v: |
| 20160 | case VE::PVFMSBUPvrv: |
| 20161 | case VE::PVFMSBUPvrvL: |
| 20162 | case VE::PVFMSBUPvrvL_v: |
| 20163 | case VE::PVFMSBUPvrv_v: |
| 20164 | case VE::PVFMSBUPvrvl: |
| 20165 | case VE::PVFMSBUPvrvl_v: |
| 20166 | case VE::PVFMSBviv: |
| 20167 | case VE::PVFMSBvivL: |
| 20168 | case VE::PVFMSBvivL_v: |
| 20169 | case VE::PVFMSBviv_v: |
| 20170 | case VE::PVFMSBvivl: |
| 20171 | case VE::PVFMSBvivl_v: |
| 20172 | case VE::PVFMSBvrv: |
| 20173 | case VE::PVFMSBvrvL: |
| 20174 | case VE::PVFMSBvrvL_v: |
| 20175 | case VE::PVFMSBvrv_v: |
| 20176 | case VE::PVFMSBvrvl: |
| 20177 | case VE::PVFMSBvrvl_v: |
| 20178 | case VE::PVFNMADLOviv: |
| 20179 | case VE::PVFNMADLOvivL: |
| 20180 | case VE::PVFNMADLOvivL_v: |
| 20181 | case VE::PVFNMADLOviv_v: |
| 20182 | case VE::PVFNMADLOvivl: |
| 20183 | case VE::PVFNMADLOvivl_v: |
| 20184 | case VE::PVFNMADLOvrv: |
| 20185 | case VE::PVFNMADLOvrvL: |
| 20186 | case VE::PVFNMADLOvrvL_v: |
| 20187 | case VE::PVFNMADLOvrv_v: |
| 20188 | case VE::PVFNMADLOvrvl: |
| 20189 | case VE::PVFNMADLOvrvl_v: |
| 20190 | case VE::PVFNMADUPviv: |
| 20191 | case VE::PVFNMADUPvivL: |
| 20192 | case VE::PVFNMADUPvivL_v: |
| 20193 | case VE::PVFNMADUPviv_v: |
| 20194 | case VE::PVFNMADUPvivl: |
| 20195 | case VE::PVFNMADUPvivl_v: |
| 20196 | case VE::PVFNMADUPvrv: |
| 20197 | case VE::PVFNMADUPvrvL: |
| 20198 | case VE::PVFNMADUPvrvL_v: |
| 20199 | case VE::PVFNMADUPvrv_v: |
| 20200 | case VE::PVFNMADUPvrvl: |
| 20201 | case VE::PVFNMADUPvrvl_v: |
| 20202 | case VE::PVFNMADviv: |
| 20203 | case VE::PVFNMADvivL: |
| 20204 | case VE::PVFNMADvivL_v: |
| 20205 | case VE::PVFNMADviv_v: |
| 20206 | case VE::PVFNMADvivl: |
| 20207 | case VE::PVFNMADvivl_v: |
| 20208 | case VE::PVFNMADvrv: |
| 20209 | case VE::PVFNMADvrvL: |
| 20210 | case VE::PVFNMADvrvL_v: |
| 20211 | case VE::PVFNMADvrv_v: |
| 20212 | case VE::PVFNMADvrvl: |
| 20213 | case VE::PVFNMADvrvl_v: |
| 20214 | case VE::PVFNMSBLOviv: |
| 20215 | case VE::PVFNMSBLOvivL: |
| 20216 | case VE::PVFNMSBLOvivL_v: |
| 20217 | case VE::PVFNMSBLOviv_v: |
| 20218 | case VE::PVFNMSBLOvivl: |
| 20219 | case VE::PVFNMSBLOvivl_v: |
| 20220 | case VE::PVFNMSBLOvrv: |
| 20221 | case VE::PVFNMSBLOvrvL: |
| 20222 | case VE::PVFNMSBLOvrvL_v: |
| 20223 | case VE::PVFNMSBLOvrv_v: |
| 20224 | case VE::PVFNMSBLOvrvl: |
| 20225 | case VE::PVFNMSBLOvrvl_v: |
| 20226 | case VE::PVFNMSBUPviv: |
| 20227 | case VE::PVFNMSBUPvivL: |
| 20228 | case VE::PVFNMSBUPvivL_v: |
| 20229 | case VE::PVFNMSBUPviv_v: |
| 20230 | case VE::PVFNMSBUPvivl: |
| 20231 | case VE::PVFNMSBUPvivl_v: |
| 20232 | case VE::PVFNMSBUPvrv: |
| 20233 | case VE::PVFNMSBUPvrvL: |
| 20234 | case VE::PVFNMSBUPvrvL_v: |
| 20235 | case VE::PVFNMSBUPvrv_v: |
| 20236 | case VE::PVFNMSBUPvrvl: |
| 20237 | case VE::PVFNMSBUPvrvl_v: |
| 20238 | case VE::PVFNMSBviv: |
| 20239 | case VE::PVFNMSBvivL: |
| 20240 | case VE::PVFNMSBvivL_v: |
| 20241 | case VE::PVFNMSBviv_v: |
| 20242 | case VE::PVFNMSBvivl: |
| 20243 | case VE::PVFNMSBvivl_v: |
| 20244 | case VE::PVFNMSBvrv: |
| 20245 | case VE::PVFNMSBvrvL: |
| 20246 | case VE::PVFNMSBvrvL_v: |
| 20247 | case VE::PVFNMSBvrv_v: |
| 20248 | case VE::PVFNMSBvrvl: |
| 20249 | case VE::PVFNMSBvrvl_v: |
| 20250 | case VE::VFMADDviv: |
| 20251 | case VE::VFMADDvivL: |
| 20252 | case VE::VFMADDvivL_v: |
| 20253 | case VE::VFMADDviv_v: |
| 20254 | case VE::VFMADDvivl: |
| 20255 | case VE::VFMADDvivl_v: |
| 20256 | case VE::VFMADDvrv: |
| 20257 | case VE::VFMADDvrvL: |
| 20258 | case VE::VFMADDvrvL_v: |
| 20259 | case VE::VFMADDvrv_v: |
| 20260 | case VE::VFMADDvrvl: |
| 20261 | case VE::VFMADDvrvl_v: |
| 20262 | case VE::VFMADSviv: |
| 20263 | case VE::VFMADSvivL: |
| 20264 | case VE::VFMADSvivL_v: |
| 20265 | case VE::VFMADSviv_v: |
| 20266 | case VE::VFMADSvivl: |
| 20267 | case VE::VFMADSvivl_v: |
| 20268 | case VE::VFMADSvrv: |
| 20269 | case VE::VFMADSvrvL: |
| 20270 | case VE::VFMADSvrvL_v: |
| 20271 | case VE::VFMADSvrv_v: |
| 20272 | case VE::VFMADSvrvl: |
| 20273 | case VE::VFMADSvrvl_v: |
| 20274 | case VE::VFMSBDviv: |
| 20275 | case VE::VFMSBDvivL: |
| 20276 | case VE::VFMSBDvivL_v: |
| 20277 | case VE::VFMSBDviv_v: |
| 20278 | case VE::VFMSBDvivl: |
| 20279 | case VE::VFMSBDvivl_v: |
| 20280 | case VE::VFMSBDvrv: |
| 20281 | case VE::VFMSBDvrvL: |
| 20282 | case VE::VFMSBDvrvL_v: |
| 20283 | case VE::VFMSBDvrv_v: |
| 20284 | case VE::VFMSBDvrvl: |
| 20285 | case VE::VFMSBDvrvl_v: |
| 20286 | case VE::VFMSBSviv: |
| 20287 | case VE::VFMSBSvivL: |
| 20288 | case VE::VFMSBSvivL_v: |
| 20289 | case VE::VFMSBSviv_v: |
| 20290 | case VE::VFMSBSvivl: |
| 20291 | case VE::VFMSBSvivl_v: |
| 20292 | case VE::VFMSBSvrv: |
| 20293 | case VE::VFMSBSvrvL: |
| 20294 | case VE::VFMSBSvrvL_v: |
| 20295 | case VE::VFMSBSvrv_v: |
| 20296 | case VE::VFMSBSvrvl: |
| 20297 | case VE::VFMSBSvrvl_v: |
| 20298 | case VE::VFNMADDviv: |
| 20299 | case VE::VFNMADDvivL: |
| 20300 | case VE::VFNMADDvivL_v: |
| 20301 | case VE::VFNMADDviv_v: |
| 20302 | case VE::VFNMADDvivl: |
| 20303 | case VE::VFNMADDvivl_v: |
| 20304 | case VE::VFNMADDvrv: |
| 20305 | case VE::VFNMADDvrvL: |
| 20306 | case VE::VFNMADDvrvL_v: |
| 20307 | case VE::VFNMADDvrv_v: |
| 20308 | case VE::VFNMADDvrvl: |
| 20309 | case VE::VFNMADDvrvl_v: |
| 20310 | case VE::VFNMADSviv: |
| 20311 | case VE::VFNMADSvivL: |
| 20312 | case VE::VFNMADSvivL_v: |
| 20313 | case VE::VFNMADSviv_v: |
| 20314 | case VE::VFNMADSvivl: |
| 20315 | case VE::VFNMADSvivl_v: |
| 20316 | case VE::VFNMADSvrv: |
| 20317 | case VE::VFNMADSvrvL: |
| 20318 | case VE::VFNMADSvrvL_v: |
| 20319 | case VE::VFNMADSvrv_v: |
| 20320 | case VE::VFNMADSvrvl: |
| 20321 | case VE::VFNMADSvrvl_v: |
| 20322 | case VE::VFNMSBDviv: |
| 20323 | case VE::VFNMSBDvivL: |
| 20324 | case VE::VFNMSBDvivL_v: |
| 20325 | case VE::VFNMSBDviv_v: |
| 20326 | case VE::VFNMSBDvivl: |
| 20327 | case VE::VFNMSBDvivl_v: |
| 20328 | case VE::VFNMSBDvrv: |
| 20329 | case VE::VFNMSBDvrvL: |
| 20330 | case VE::VFNMSBDvrvL_v: |
| 20331 | case VE::VFNMSBDvrv_v: |
| 20332 | case VE::VFNMSBDvrvl: |
| 20333 | case VE::VFNMSBDvrvl_v: |
| 20334 | case VE::VFNMSBSviv: |
| 20335 | case VE::VFNMSBSvivL: |
| 20336 | case VE::VFNMSBSvivL_v: |
| 20337 | case VE::VFNMSBSviv_v: |
| 20338 | case VE::VFNMSBSvivl: |
| 20339 | case VE::VFNMSBSvivl_v: |
| 20340 | case VE::VFNMSBSvrv: |
| 20341 | case VE::VFNMSBSvrvL: |
| 20342 | case VE::VFNMSBSvrvL_v: |
| 20343 | case VE::VFNMSBSvrv_v: |
| 20344 | case VE::VFNMSBSvrvl: |
| 20345 | case VE::VFNMSBSvrvl_v: { |
| 20346 | // op: sy |
| 20347 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20348 | op &= UINT64_C(127); |
| 20349 | op <<= 40; |
| 20350 | Value |= op; |
| 20351 | // op: vx |
| 20352 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20353 | op &= UINT64_C(255); |
| 20354 | op <<= 24; |
| 20355 | Value |= op; |
| 20356 | // op: vy |
| 20357 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20358 | op &= UINT64_C(255); |
| 20359 | op <<= 16; |
| 20360 | Value |= op; |
| 20361 | // op: vw |
| 20362 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 20363 | op &= UINT64_C(255); |
| 20364 | Value |= op; |
| 20365 | break; |
| 20366 | } |
| 20367 | case VE::PVSLALOvi: |
| 20368 | case VE::PVSLALOviL: |
| 20369 | case VE::PVSLALOviL_v: |
| 20370 | case VE::PVSLALOvi_v: |
| 20371 | case VE::PVSLALOvil: |
| 20372 | case VE::PVSLALOvil_v: |
| 20373 | case VE::PVSLALOvr: |
| 20374 | case VE::PVSLALOvrL: |
| 20375 | case VE::PVSLALOvrL_v: |
| 20376 | case VE::PVSLALOvr_v: |
| 20377 | case VE::PVSLALOvrl: |
| 20378 | case VE::PVSLALOvrl_v: |
| 20379 | case VE::PVSLAUPvi: |
| 20380 | case VE::PVSLAUPviL: |
| 20381 | case VE::PVSLAUPviL_v: |
| 20382 | case VE::PVSLAUPvi_v: |
| 20383 | case VE::PVSLAUPvil: |
| 20384 | case VE::PVSLAUPvil_v: |
| 20385 | case VE::PVSLAUPvr: |
| 20386 | case VE::PVSLAUPvrL: |
| 20387 | case VE::PVSLAUPvrL_v: |
| 20388 | case VE::PVSLAUPvr_v: |
| 20389 | case VE::PVSLAUPvrl: |
| 20390 | case VE::PVSLAUPvrl_v: |
| 20391 | case VE::PVSLAvi: |
| 20392 | case VE::PVSLAviL: |
| 20393 | case VE::PVSLAviL_v: |
| 20394 | case VE::PVSLAvi_v: |
| 20395 | case VE::PVSLAvil: |
| 20396 | case VE::PVSLAvil_v: |
| 20397 | case VE::PVSLAvr: |
| 20398 | case VE::PVSLAvrL: |
| 20399 | case VE::PVSLAvrL_v: |
| 20400 | case VE::PVSLAvr_v: |
| 20401 | case VE::PVSLAvrl: |
| 20402 | case VE::PVSLAvrl_v: |
| 20403 | case VE::PVSLLLOvi: |
| 20404 | case VE::PVSLLLOviL: |
| 20405 | case VE::PVSLLLOviL_v: |
| 20406 | case VE::PVSLLLOvi_v: |
| 20407 | case VE::PVSLLLOvil: |
| 20408 | case VE::PVSLLLOvil_v: |
| 20409 | case VE::PVSLLLOvr: |
| 20410 | case VE::PVSLLLOvrL: |
| 20411 | case VE::PVSLLLOvrL_v: |
| 20412 | case VE::PVSLLLOvr_v: |
| 20413 | case VE::PVSLLLOvrl: |
| 20414 | case VE::PVSLLLOvrl_v: |
| 20415 | case VE::PVSLLUPvi: |
| 20416 | case VE::PVSLLUPviL: |
| 20417 | case VE::PVSLLUPviL_v: |
| 20418 | case VE::PVSLLUPvi_v: |
| 20419 | case VE::PVSLLUPvil: |
| 20420 | case VE::PVSLLUPvil_v: |
| 20421 | case VE::PVSLLUPvr: |
| 20422 | case VE::PVSLLUPvrL: |
| 20423 | case VE::PVSLLUPvrL_v: |
| 20424 | case VE::PVSLLUPvr_v: |
| 20425 | case VE::PVSLLUPvrl: |
| 20426 | case VE::PVSLLUPvrl_v: |
| 20427 | case VE::PVSLLvi: |
| 20428 | case VE::PVSLLviL: |
| 20429 | case VE::PVSLLviL_v: |
| 20430 | case VE::PVSLLvi_v: |
| 20431 | case VE::PVSLLvil: |
| 20432 | case VE::PVSLLvil_v: |
| 20433 | case VE::PVSLLvr: |
| 20434 | case VE::PVSLLvrL: |
| 20435 | case VE::PVSLLvrL_v: |
| 20436 | case VE::PVSLLvr_v: |
| 20437 | case VE::PVSLLvrl: |
| 20438 | case VE::PVSLLvrl_v: |
| 20439 | case VE::PVSRALOvi: |
| 20440 | case VE::PVSRALOviL: |
| 20441 | case VE::PVSRALOviL_v: |
| 20442 | case VE::PVSRALOvi_v: |
| 20443 | case VE::PVSRALOvil: |
| 20444 | case VE::PVSRALOvil_v: |
| 20445 | case VE::PVSRALOvr: |
| 20446 | case VE::PVSRALOvrL: |
| 20447 | case VE::PVSRALOvrL_v: |
| 20448 | case VE::PVSRALOvr_v: |
| 20449 | case VE::PVSRALOvrl: |
| 20450 | case VE::PVSRALOvrl_v: |
| 20451 | case VE::PVSRAUPvi: |
| 20452 | case VE::PVSRAUPviL: |
| 20453 | case VE::PVSRAUPviL_v: |
| 20454 | case VE::PVSRAUPvi_v: |
| 20455 | case VE::PVSRAUPvil: |
| 20456 | case VE::PVSRAUPvil_v: |
| 20457 | case VE::PVSRAUPvr: |
| 20458 | case VE::PVSRAUPvrL: |
| 20459 | case VE::PVSRAUPvrL_v: |
| 20460 | case VE::PVSRAUPvr_v: |
| 20461 | case VE::PVSRAUPvrl: |
| 20462 | case VE::PVSRAUPvrl_v: |
| 20463 | case VE::PVSRAvi: |
| 20464 | case VE::PVSRAviL: |
| 20465 | case VE::PVSRAviL_v: |
| 20466 | case VE::PVSRAvi_v: |
| 20467 | case VE::PVSRAvil: |
| 20468 | case VE::PVSRAvil_v: |
| 20469 | case VE::PVSRAvr: |
| 20470 | case VE::PVSRAvrL: |
| 20471 | case VE::PVSRAvrL_v: |
| 20472 | case VE::PVSRAvr_v: |
| 20473 | case VE::PVSRAvrl: |
| 20474 | case VE::PVSRAvrl_v: |
| 20475 | case VE::PVSRLLOvi: |
| 20476 | case VE::PVSRLLOviL: |
| 20477 | case VE::PVSRLLOviL_v: |
| 20478 | case VE::PVSRLLOvi_v: |
| 20479 | case VE::PVSRLLOvil: |
| 20480 | case VE::PVSRLLOvil_v: |
| 20481 | case VE::PVSRLLOvr: |
| 20482 | case VE::PVSRLLOvrL: |
| 20483 | case VE::PVSRLLOvrL_v: |
| 20484 | case VE::PVSRLLOvr_v: |
| 20485 | case VE::PVSRLLOvrl: |
| 20486 | case VE::PVSRLLOvrl_v: |
| 20487 | case VE::PVSRLUPvi: |
| 20488 | case VE::PVSRLUPviL: |
| 20489 | case VE::PVSRLUPviL_v: |
| 20490 | case VE::PVSRLUPvi_v: |
| 20491 | case VE::PVSRLUPvil: |
| 20492 | case VE::PVSRLUPvil_v: |
| 20493 | case VE::PVSRLUPvr: |
| 20494 | case VE::PVSRLUPvrL: |
| 20495 | case VE::PVSRLUPvrL_v: |
| 20496 | case VE::PVSRLUPvr_v: |
| 20497 | case VE::PVSRLUPvrl: |
| 20498 | case VE::PVSRLUPvrl_v: |
| 20499 | case VE::PVSRLvi: |
| 20500 | case VE::PVSRLviL: |
| 20501 | case VE::PVSRLviL_v: |
| 20502 | case VE::PVSRLvi_v: |
| 20503 | case VE::PVSRLvil: |
| 20504 | case VE::PVSRLvil_v: |
| 20505 | case VE::PVSRLvr: |
| 20506 | case VE::PVSRLvrL: |
| 20507 | case VE::PVSRLvrL_v: |
| 20508 | case VE::PVSRLvr_v: |
| 20509 | case VE::PVSRLvrl: |
| 20510 | case VE::PVSRLvrl_v: |
| 20511 | case VE::VSLALvi: |
| 20512 | case VE::VSLALviL: |
| 20513 | case VE::VSLALviL_v: |
| 20514 | case VE::VSLALvi_v: |
| 20515 | case VE::VSLALvil: |
| 20516 | case VE::VSLALvil_v: |
| 20517 | case VE::VSLALvr: |
| 20518 | case VE::VSLALvrL: |
| 20519 | case VE::VSLALvrL_v: |
| 20520 | case VE::VSLALvr_v: |
| 20521 | case VE::VSLALvrl: |
| 20522 | case VE::VSLALvrl_v: |
| 20523 | case VE::VSLAWSXvi: |
| 20524 | case VE::VSLAWSXviL: |
| 20525 | case VE::VSLAWSXviL_v: |
| 20526 | case VE::VSLAWSXvi_v: |
| 20527 | case VE::VSLAWSXvil: |
| 20528 | case VE::VSLAWSXvil_v: |
| 20529 | case VE::VSLAWSXvr: |
| 20530 | case VE::VSLAWSXvrL: |
| 20531 | case VE::VSLAWSXvrL_v: |
| 20532 | case VE::VSLAWSXvr_v: |
| 20533 | case VE::VSLAWSXvrl: |
| 20534 | case VE::VSLAWSXvrl_v: |
| 20535 | case VE::VSLAWZXvi: |
| 20536 | case VE::VSLAWZXviL: |
| 20537 | case VE::VSLAWZXviL_v: |
| 20538 | case VE::VSLAWZXvi_v: |
| 20539 | case VE::VSLAWZXvil: |
| 20540 | case VE::VSLAWZXvil_v: |
| 20541 | case VE::VSLAWZXvr: |
| 20542 | case VE::VSLAWZXvrL: |
| 20543 | case VE::VSLAWZXvrL_v: |
| 20544 | case VE::VSLAWZXvr_v: |
| 20545 | case VE::VSLAWZXvrl: |
| 20546 | case VE::VSLAWZXvrl_v: |
| 20547 | case VE::VSLLvi: |
| 20548 | case VE::VSLLviL: |
| 20549 | case VE::VSLLviL_v: |
| 20550 | case VE::VSLLvi_v: |
| 20551 | case VE::VSLLvil: |
| 20552 | case VE::VSLLvil_v: |
| 20553 | case VE::VSLLvr: |
| 20554 | case VE::VSLLvrL: |
| 20555 | case VE::VSLLvrL_v: |
| 20556 | case VE::VSLLvr_v: |
| 20557 | case VE::VSLLvrl: |
| 20558 | case VE::VSLLvrl_v: |
| 20559 | case VE::VSRALvi: |
| 20560 | case VE::VSRALviL: |
| 20561 | case VE::VSRALviL_v: |
| 20562 | case VE::VSRALvi_v: |
| 20563 | case VE::VSRALvil: |
| 20564 | case VE::VSRALvil_v: |
| 20565 | case VE::VSRALvr: |
| 20566 | case VE::VSRALvrL: |
| 20567 | case VE::VSRALvrL_v: |
| 20568 | case VE::VSRALvr_v: |
| 20569 | case VE::VSRALvrl: |
| 20570 | case VE::VSRALvrl_v: |
| 20571 | case VE::VSRAWSXvi: |
| 20572 | case VE::VSRAWSXviL: |
| 20573 | case VE::VSRAWSXviL_v: |
| 20574 | case VE::VSRAWSXvi_v: |
| 20575 | case VE::VSRAWSXvil: |
| 20576 | case VE::VSRAWSXvil_v: |
| 20577 | case VE::VSRAWSXvr: |
| 20578 | case VE::VSRAWSXvrL: |
| 20579 | case VE::VSRAWSXvrL_v: |
| 20580 | case VE::VSRAWSXvr_v: |
| 20581 | case VE::VSRAWSXvrl: |
| 20582 | case VE::VSRAWSXvrl_v: |
| 20583 | case VE::VSRAWZXvi: |
| 20584 | case VE::VSRAWZXviL: |
| 20585 | case VE::VSRAWZXviL_v: |
| 20586 | case VE::VSRAWZXvi_v: |
| 20587 | case VE::VSRAWZXvil: |
| 20588 | case VE::VSRAWZXvil_v: |
| 20589 | case VE::VSRAWZXvr: |
| 20590 | case VE::VSRAWZXvrL: |
| 20591 | case VE::VSRAWZXvrL_v: |
| 20592 | case VE::VSRAWZXvr_v: |
| 20593 | case VE::VSRAWZXvrl: |
| 20594 | case VE::VSRAWZXvrl_v: |
| 20595 | case VE::VSRLvi: |
| 20596 | case VE::VSRLviL: |
| 20597 | case VE::VSRLviL_v: |
| 20598 | case VE::VSRLvi_v: |
| 20599 | case VE::VSRLvil: |
| 20600 | case VE::VSRLvil_v: |
| 20601 | case VE::VSRLvr: |
| 20602 | case VE::VSRLvrL: |
| 20603 | case VE::VSRLvrL_v: |
| 20604 | case VE::VSRLvr_v: |
| 20605 | case VE::VSRLvrl: |
| 20606 | case VE::VSRLvrl_v: { |
| 20607 | // op: sy |
| 20608 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20609 | op &= UINT64_C(127); |
| 20610 | op <<= 40; |
| 20611 | Value |= op; |
| 20612 | // op: vx |
| 20613 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20614 | op &= UINT64_C(255); |
| 20615 | op <<= 24; |
| 20616 | Value |= op; |
| 20617 | // op: vz |
| 20618 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20619 | op &= UINT64_C(255); |
| 20620 | op <<= 8; |
| 20621 | Value |= op; |
| 20622 | break; |
| 20623 | } |
| 20624 | case VE::VFIAMDvvi: |
| 20625 | case VE::VFIAMDvviL: |
| 20626 | case VE::VFIAMDvviL_v: |
| 20627 | case VE::VFIAMDvvi_v: |
| 20628 | case VE::VFIAMDvvil: |
| 20629 | case VE::VFIAMDvvil_v: |
| 20630 | case VE::VFIAMDvvr: |
| 20631 | case VE::VFIAMDvvrL: |
| 20632 | case VE::VFIAMDvvrL_v: |
| 20633 | case VE::VFIAMDvvr_v: |
| 20634 | case VE::VFIAMDvvrl: |
| 20635 | case VE::VFIAMDvvrl_v: |
| 20636 | case VE::VFIAMSvvi: |
| 20637 | case VE::VFIAMSvviL: |
| 20638 | case VE::VFIAMSvviL_v: |
| 20639 | case VE::VFIAMSvvi_v: |
| 20640 | case VE::VFIAMSvvil: |
| 20641 | case VE::VFIAMSvvil_v: |
| 20642 | case VE::VFIAMSvvr: |
| 20643 | case VE::VFIAMSvvrL: |
| 20644 | case VE::VFIAMSvvrL_v: |
| 20645 | case VE::VFIAMSvvr_v: |
| 20646 | case VE::VFIAMSvvrl: |
| 20647 | case VE::VFIAMSvvrl_v: |
| 20648 | case VE::VFIMADvvi: |
| 20649 | case VE::VFIMADvviL: |
| 20650 | case VE::VFIMADvviL_v: |
| 20651 | case VE::VFIMADvvi_v: |
| 20652 | case VE::VFIMADvvil: |
| 20653 | case VE::VFIMADvvil_v: |
| 20654 | case VE::VFIMADvvr: |
| 20655 | case VE::VFIMADvvrL: |
| 20656 | case VE::VFIMADvvrL_v: |
| 20657 | case VE::VFIMADvvr_v: |
| 20658 | case VE::VFIMADvvrl: |
| 20659 | case VE::VFIMADvvrl_v: |
| 20660 | case VE::VFIMASvvi: |
| 20661 | case VE::VFIMASvviL: |
| 20662 | case VE::VFIMASvviL_v: |
| 20663 | case VE::VFIMASvvi_v: |
| 20664 | case VE::VFIMASvvil: |
| 20665 | case VE::VFIMASvvil_v: |
| 20666 | case VE::VFIMASvvr: |
| 20667 | case VE::VFIMASvvrL: |
| 20668 | case VE::VFIMASvvrL_v: |
| 20669 | case VE::VFIMASvvr_v: |
| 20670 | case VE::VFIMASvvrl: |
| 20671 | case VE::VFIMASvvrl_v: |
| 20672 | case VE::VFIMSDvvi: |
| 20673 | case VE::VFIMSDvviL: |
| 20674 | case VE::VFIMSDvviL_v: |
| 20675 | case VE::VFIMSDvvi_v: |
| 20676 | case VE::VFIMSDvvil: |
| 20677 | case VE::VFIMSDvvil_v: |
| 20678 | case VE::VFIMSDvvr: |
| 20679 | case VE::VFIMSDvvrL: |
| 20680 | case VE::VFIMSDvvrL_v: |
| 20681 | case VE::VFIMSDvvr_v: |
| 20682 | case VE::VFIMSDvvrl: |
| 20683 | case VE::VFIMSDvvrl_v: |
| 20684 | case VE::VFIMSSvvi: |
| 20685 | case VE::VFIMSSvviL: |
| 20686 | case VE::VFIMSSvviL_v: |
| 20687 | case VE::VFIMSSvvi_v: |
| 20688 | case VE::VFIMSSvvil: |
| 20689 | case VE::VFIMSSvvil_v: |
| 20690 | case VE::VFIMSSvvr: |
| 20691 | case VE::VFIMSSvvrL: |
| 20692 | case VE::VFIMSSvvrL_v: |
| 20693 | case VE::VFIMSSvvr_v: |
| 20694 | case VE::VFIMSSvvrl: |
| 20695 | case VE::VFIMSSvvrl_v: |
| 20696 | case VE::VFISMDvvi: |
| 20697 | case VE::VFISMDvviL: |
| 20698 | case VE::VFISMDvviL_v: |
| 20699 | case VE::VFISMDvvi_v: |
| 20700 | case VE::VFISMDvvil: |
| 20701 | case VE::VFISMDvvil_v: |
| 20702 | case VE::VFISMDvvr: |
| 20703 | case VE::VFISMDvvrL: |
| 20704 | case VE::VFISMDvvrL_v: |
| 20705 | case VE::VFISMDvvr_v: |
| 20706 | case VE::VFISMDvvrl: |
| 20707 | case VE::VFISMDvvrl_v: |
| 20708 | case VE::VFISMSvvi: |
| 20709 | case VE::VFISMSvviL: |
| 20710 | case VE::VFISMSvviL_v: |
| 20711 | case VE::VFISMSvvi_v: |
| 20712 | case VE::VFISMSvvil: |
| 20713 | case VE::VFISMSvvil_v: |
| 20714 | case VE::VFISMSvvr: |
| 20715 | case VE::VFISMSvvrL: |
| 20716 | case VE::VFISMSvvrL_v: |
| 20717 | case VE::VFISMSvvr_v: |
| 20718 | case VE::VFISMSvvrl: |
| 20719 | case VE::VFISMSvvrl_v: |
| 20720 | case VE::VSHFvvi: |
| 20721 | case VE::VSHFvviL: |
| 20722 | case VE::VSHFvviL_v: |
| 20723 | case VE::VSHFvvi_v: |
| 20724 | case VE::VSHFvvil: |
| 20725 | case VE::VSHFvvil_v: |
| 20726 | case VE::VSHFvvr: |
| 20727 | case VE::VSHFvvrL: |
| 20728 | case VE::VSHFvvrL_v: |
| 20729 | case VE::VSHFvvr_v: |
| 20730 | case VE::VSHFvvrl: |
| 20731 | case VE::VSHFvvrl_v: |
| 20732 | case VE::VSLDvvi: |
| 20733 | case VE::VSLDvviL: |
| 20734 | case VE::VSLDvviL_v: |
| 20735 | case VE::VSLDvvi_v: |
| 20736 | case VE::VSLDvvil: |
| 20737 | case VE::VSLDvvil_v: |
| 20738 | case VE::VSLDvvr: |
| 20739 | case VE::VSLDvvrL: |
| 20740 | case VE::VSLDvvrL_v: |
| 20741 | case VE::VSLDvvr_v: |
| 20742 | case VE::VSLDvvrl: |
| 20743 | case VE::VSLDvvrl_v: |
| 20744 | case VE::VSRDvvi: |
| 20745 | case VE::VSRDvviL: |
| 20746 | case VE::VSRDvviL_v: |
| 20747 | case VE::VSRDvvi_v: |
| 20748 | case VE::VSRDvvil: |
| 20749 | case VE::VSRDvvil_v: |
| 20750 | case VE::VSRDvvr: |
| 20751 | case VE::VSRDvvrL: |
| 20752 | case VE::VSRDvvrL_v: |
| 20753 | case VE::VSRDvvr_v: |
| 20754 | case VE::VSRDvvrl: |
| 20755 | case VE::VSRDvvrl_v: { |
| 20756 | // op: sy |
| 20757 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 20758 | op &= UINT64_C(127); |
| 20759 | op <<= 40; |
| 20760 | Value |= op; |
| 20761 | // op: vx |
| 20762 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20763 | op &= UINT64_C(255); |
| 20764 | op <<= 24; |
| 20765 | Value |= op; |
| 20766 | // op: vy |
| 20767 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20768 | op &= UINT64_C(255); |
| 20769 | op <<= 16; |
| 20770 | Value |= op; |
| 20771 | // op: vz |
| 20772 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20773 | op &= UINT64_C(255); |
| 20774 | op <<= 8; |
| 20775 | Value |= op; |
| 20776 | break; |
| 20777 | } |
| 20778 | case VE::CALLr: { |
| 20779 | // op: sz |
| 20780 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20781 | op &= UINT64_C(127); |
| 20782 | op <<= 32; |
| 20783 | Value |= op; |
| 20784 | break; |
| 20785 | } |
| 20786 | case VE::BCFDari: |
| 20787 | case VE::BCFDari_nt: |
| 20788 | case VE::BCFDari_t: |
| 20789 | case VE::BCFDazi: |
| 20790 | case VE::BCFDazi_nt: |
| 20791 | case VE::BCFDazi_t: |
| 20792 | case VE::BCFDnari: |
| 20793 | case VE::BCFDnari_nt: |
| 20794 | case VE::BCFDnari_t: |
| 20795 | case VE::BCFDnazi: |
| 20796 | case VE::BCFDnazi_nt: |
| 20797 | case VE::BCFDnazi_t: |
| 20798 | case VE::BCFLari: |
| 20799 | case VE::BCFLari_nt: |
| 20800 | case VE::BCFLari_t: |
| 20801 | case VE::BCFLazi: |
| 20802 | case VE::BCFLazi_nt: |
| 20803 | case VE::BCFLazi_t: |
| 20804 | case VE::BCFLnari: |
| 20805 | case VE::BCFLnari_nt: |
| 20806 | case VE::BCFLnari_t: |
| 20807 | case VE::BCFLnazi: |
| 20808 | case VE::BCFLnazi_nt: |
| 20809 | case VE::BCFLnazi_t: |
| 20810 | case VE::BCFSari: |
| 20811 | case VE::BCFSari_nt: |
| 20812 | case VE::BCFSari_t: |
| 20813 | case VE::BCFSazi: |
| 20814 | case VE::BCFSazi_nt: |
| 20815 | case VE::BCFSazi_t: |
| 20816 | case VE::BCFSnari: |
| 20817 | case VE::BCFSnari_nt: |
| 20818 | case VE::BCFSnari_t: |
| 20819 | case VE::BCFSnazi: |
| 20820 | case VE::BCFSnazi_nt: |
| 20821 | case VE::BCFSnazi_t: |
| 20822 | case VE::BCFWari: |
| 20823 | case VE::BCFWari_nt: |
| 20824 | case VE::BCFWari_t: |
| 20825 | case VE::BCFWazi: |
| 20826 | case VE::BCFWazi_nt: |
| 20827 | case VE::BCFWazi_t: |
| 20828 | case VE::BCFWnari: |
| 20829 | case VE::BCFWnari_nt: |
| 20830 | case VE::BCFWnari_t: |
| 20831 | case VE::BCFWnazi: |
| 20832 | case VE::BCFWnazi_nt: |
| 20833 | case VE::BCFWnazi_t: { |
| 20834 | // op: sz |
| 20835 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20836 | op &= UINT64_C(127); |
| 20837 | op <<= 32; |
| 20838 | Value |= op; |
| 20839 | // op: imm32 |
| 20840 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20841 | op &= UINT64_C(4294967295); |
| 20842 | Value |= op; |
| 20843 | break; |
| 20844 | } |
| 20845 | case VE::PFCHrii: |
| 20846 | case VE::PFCHrri: |
| 20847 | case VE::PFCHzii: |
| 20848 | case VE::PFCHzri: { |
| 20849 | // op: sz |
| 20850 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20851 | op &= UINT64_C(127); |
| 20852 | op <<= 32; |
| 20853 | Value |= op; |
| 20854 | // op: sy |
| 20855 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 20856 | op &= UINT64_C(127); |
| 20857 | op <<= 40; |
| 20858 | Value |= op; |
| 20859 | // op: imm32 |
| 20860 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20861 | op &= UINT64_C(4294967295); |
| 20862 | Value |= op; |
| 20863 | break; |
| 20864 | } |
| 20865 | case VE::PVFMKSLOa: |
| 20866 | case VE::PVFMKSLOaL: |
| 20867 | case VE::PVFMKSLOal: |
| 20868 | case VE::PVFMKSLOna: |
| 20869 | case VE::PVFMKSLOnaL: |
| 20870 | case VE::PVFMKSLOnal: |
| 20871 | case VE::PVFMKSUPa: |
| 20872 | case VE::PVFMKSUPaL: |
| 20873 | case VE::PVFMKSUPal: |
| 20874 | case VE::PVFMKSUPna: |
| 20875 | case VE::PVFMKSUPnaL: |
| 20876 | case VE::PVFMKSUPnal: |
| 20877 | case VE::PVFMKWLOa: |
| 20878 | case VE::PVFMKWLOaL: |
| 20879 | case VE::PVFMKWLOal: |
| 20880 | case VE::PVFMKWLOna: |
| 20881 | case VE::PVFMKWLOnaL: |
| 20882 | case VE::PVFMKWLOnal: |
| 20883 | case VE::PVFMKWUPa: |
| 20884 | case VE::PVFMKWUPaL: |
| 20885 | case VE::PVFMKWUPal: |
| 20886 | case VE::PVFMKWUPna: |
| 20887 | case VE::PVFMKWUPnaL: |
| 20888 | case VE::PVFMKWUPnal: |
| 20889 | case VE::PVSEQ: |
| 20890 | case VE::PVSEQL: |
| 20891 | case VE::PVSEQLO: |
| 20892 | case VE::PVSEQLOL: |
| 20893 | case VE::PVSEQLOL_v: |
| 20894 | case VE::PVSEQLO_v: |
| 20895 | case VE::PVSEQLOl: |
| 20896 | case VE::PVSEQLOl_v: |
| 20897 | case VE::PVSEQL_v: |
| 20898 | case VE::PVSEQUP: |
| 20899 | case VE::PVSEQUPL: |
| 20900 | case VE::PVSEQUPL_v: |
| 20901 | case VE::PVSEQUP_v: |
| 20902 | case VE::PVSEQUPl: |
| 20903 | case VE::PVSEQUPl_v: |
| 20904 | case VE::PVSEQ_v: |
| 20905 | case VE::PVSEQl: |
| 20906 | case VE::PVSEQl_v: |
| 20907 | case VE::VFMKDa: |
| 20908 | case VE::VFMKDaL: |
| 20909 | case VE::VFMKDal: |
| 20910 | case VE::VFMKDna: |
| 20911 | case VE::VFMKDnaL: |
| 20912 | case VE::VFMKDnal: |
| 20913 | case VE::VFMKLa: |
| 20914 | case VE::VFMKLaL: |
| 20915 | case VE::VFMKLal: |
| 20916 | case VE::VFMKLna: |
| 20917 | case VE::VFMKLnaL: |
| 20918 | case VE::VFMKLnal: |
| 20919 | case VE::VFMKSa: |
| 20920 | case VE::VFMKSaL: |
| 20921 | case VE::VFMKSal: |
| 20922 | case VE::VFMKSna: |
| 20923 | case VE::VFMKSnaL: |
| 20924 | case VE::VFMKSnal: |
| 20925 | case VE::VFMKWa: |
| 20926 | case VE::VFMKWaL: |
| 20927 | case VE::VFMKWal: |
| 20928 | case VE::VFMKWna: |
| 20929 | case VE::VFMKWnaL: |
| 20930 | case VE::VFMKWnal: |
| 20931 | case VE::VSEQ: |
| 20932 | case VE::VSEQL: |
| 20933 | case VE::VSEQL_v: |
| 20934 | case VE::VSEQ_v: |
| 20935 | case VE::VSEQl: |
| 20936 | case VE::VSEQl_v: { |
| 20937 | // op: vx |
| 20938 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20939 | op &= UINT64_C(255); |
| 20940 | op <<= 24; |
| 20941 | Value |= op; |
| 20942 | break; |
| 20943 | } |
| 20944 | case VE::PVFMKSLOv: |
| 20945 | case VE::PVFMKSLOvL: |
| 20946 | case VE::PVFMKSLOvl: |
| 20947 | case VE::PVFMKSUPv: |
| 20948 | case VE::PVFMKSUPvL: |
| 20949 | case VE::PVFMKSUPvl: |
| 20950 | case VE::PVFMKWLOv: |
| 20951 | case VE::PVFMKWLOvL: |
| 20952 | case VE::PVFMKWLOvl: |
| 20953 | case VE::PVFMKWUPv: |
| 20954 | case VE::PVFMKWUPvL: |
| 20955 | case VE::PVFMKWUPvl: |
| 20956 | case VE::VFMKDv: |
| 20957 | case VE::VFMKDvL: |
| 20958 | case VE::VFMKDvl: |
| 20959 | case VE::VFMKLv: |
| 20960 | case VE::VFMKLvL: |
| 20961 | case VE::VFMKLvl: |
| 20962 | case VE::VFMKSv: |
| 20963 | case VE::VFMKSvL: |
| 20964 | case VE::VFMKSvl: |
| 20965 | case VE::VFMKWv: |
| 20966 | case VE::VFMKWvL: |
| 20967 | case VE::VFMKWvl: { |
| 20968 | // op: vx |
| 20969 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 20970 | op &= UINT64_C(255); |
| 20971 | op <<= 24; |
| 20972 | Value |= op; |
| 20973 | // op: vy |
| 20974 | op = getCCOpValue(MI, OpNo: 1, Fixups, STI); |
| 20975 | op &= UINT64_C(255); |
| 20976 | op <<= 16; |
| 20977 | Value |= op; |
| 20978 | // op: vz |
| 20979 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 20980 | op &= UINT64_C(255); |
| 20981 | op <<= 8; |
| 20982 | Value |= op; |
| 20983 | break; |
| 20984 | } |
| 20985 | case VE::NEGMm: |
| 20986 | case VE::PVCVTSWLOv: |
| 20987 | case VE::PVCVTSWLOvL: |
| 20988 | case VE::PVCVTSWLOvL_v: |
| 20989 | case VE::PVCVTSWLOv_v: |
| 20990 | case VE::PVCVTSWLOvl: |
| 20991 | case VE::PVCVTSWLOvl_v: |
| 20992 | case VE::PVCVTSWUPv: |
| 20993 | case VE::PVCVTSWUPvL: |
| 20994 | case VE::PVCVTSWUPvL_v: |
| 20995 | case VE::PVCVTSWUPv_v: |
| 20996 | case VE::PVCVTSWUPvl: |
| 20997 | case VE::PVCVTSWUPvl_v: |
| 20998 | case VE::PVCVTSWv: |
| 20999 | case VE::PVCVTSWvL: |
| 21000 | case VE::PVCVTSWvL_v: |
| 21001 | case VE::PVCVTSWv_v: |
| 21002 | case VE::PVCVTSWvl: |
| 21003 | case VE::PVCVTSWvl_v: |
| 21004 | case VE::PVRCPLOv: |
| 21005 | case VE::PVRCPLOvL: |
| 21006 | case VE::PVRCPLOvL_v: |
| 21007 | case VE::PVRCPLOv_v: |
| 21008 | case VE::PVRCPLOvl: |
| 21009 | case VE::PVRCPLOvl_v: |
| 21010 | case VE::PVRCPUPv: |
| 21011 | case VE::PVRCPUPvL: |
| 21012 | case VE::PVRCPUPvL_v: |
| 21013 | case VE::PVRCPUPv_v: |
| 21014 | case VE::PVRCPUPvl: |
| 21015 | case VE::PVRCPUPvl_v: |
| 21016 | case VE::PVRCPv: |
| 21017 | case VE::PVRCPvL: |
| 21018 | case VE::PVRCPvL_v: |
| 21019 | case VE::PVRCPv_v: |
| 21020 | case VE::PVRCPvl: |
| 21021 | case VE::PVRCPvl_v: |
| 21022 | case VE::PVRSQRTLONEXv: |
| 21023 | case VE::PVRSQRTLONEXvL: |
| 21024 | case VE::PVRSQRTLONEXvL_v: |
| 21025 | case VE::PVRSQRTLONEXv_v: |
| 21026 | case VE::PVRSQRTLONEXvl: |
| 21027 | case VE::PVRSQRTLONEXvl_v: |
| 21028 | case VE::PVRSQRTLOv: |
| 21029 | case VE::PVRSQRTLOvL: |
| 21030 | case VE::PVRSQRTLOvL_v: |
| 21031 | case VE::PVRSQRTLOv_v: |
| 21032 | case VE::PVRSQRTLOvl: |
| 21033 | case VE::PVRSQRTLOvl_v: |
| 21034 | case VE::PVRSQRTNEXv: |
| 21035 | case VE::PVRSQRTNEXvL: |
| 21036 | case VE::PVRSQRTNEXvL_v: |
| 21037 | case VE::PVRSQRTNEXv_v: |
| 21038 | case VE::PVRSQRTNEXvl: |
| 21039 | case VE::PVRSQRTNEXvl_v: |
| 21040 | case VE::PVRSQRTUPNEXv: |
| 21041 | case VE::PVRSQRTUPNEXvL: |
| 21042 | case VE::PVRSQRTUPNEXvL_v: |
| 21043 | case VE::PVRSQRTUPNEXv_v: |
| 21044 | case VE::PVRSQRTUPNEXvl: |
| 21045 | case VE::PVRSQRTUPNEXvl_v: |
| 21046 | case VE::PVRSQRTUPv: |
| 21047 | case VE::PVRSQRTUPvL: |
| 21048 | case VE::PVRSQRTUPvL_v: |
| 21049 | case VE::PVRSQRTUPv_v: |
| 21050 | case VE::PVRSQRTUPvl: |
| 21051 | case VE::PVRSQRTUPvl_v: |
| 21052 | case VE::PVRSQRTv: |
| 21053 | case VE::PVRSQRTvL: |
| 21054 | case VE::PVRSQRTvL_v: |
| 21055 | case VE::PVRSQRTv_v: |
| 21056 | case VE::PVRSQRTvl: |
| 21057 | case VE::PVRSQRTvl_v: |
| 21058 | case VE::VCVTDLv: |
| 21059 | case VE::VCVTDLvL: |
| 21060 | case VE::VCVTDLvL_v: |
| 21061 | case VE::VCVTDLv_v: |
| 21062 | case VE::VCVTDLvl: |
| 21063 | case VE::VCVTDLvl_v: |
| 21064 | case VE::VCVTDSv: |
| 21065 | case VE::VCVTDSvL: |
| 21066 | case VE::VCVTDSvL_v: |
| 21067 | case VE::VCVTDSv_v: |
| 21068 | case VE::VCVTDSvl: |
| 21069 | case VE::VCVTDSvl_v: |
| 21070 | case VE::VCVTDWv: |
| 21071 | case VE::VCVTDWvL: |
| 21072 | case VE::VCVTDWvL_v: |
| 21073 | case VE::VCVTDWv_v: |
| 21074 | case VE::VCVTDWvl: |
| 21075 | case VE::VCVTDWvl_v: |
| 21076 | case VE::VCVTSDv: |
| 21077 | case VE::VCVTSDvL: |
| 21078 | case VE::VCVTSDvL_v: |
| 21079 | case VE::VCVTSDv_v: |
| 21080 | case VE::VCVTSDvl: |
| 21081 | case VE::VCVTSDvl_v: |
| 21082 | case VE::VCVTSWv: |
| 21083 | case VE::VCVTSWvL: |
| 21084 | case VE::VCVTSWvL_v: |
| 21085 | case VE::VCVTSWv_v: |
| 21086 | case VE::VCVTSWvl: |
| 21087 | case VE::VCVTSWvl_v: |
| 21088 | case VE::VFRMAXDFSTv: |
| 21089 | case VE::VFRMAXDFSTvL: |
| 21090 | case VE::VFRMAXDFSTvL_v: |
| 21091 | case VE::VFRMAXDFSTv_v: |
| 21092 | case VE::VFRMAXDFSTvl: |
| 21093 | case VE::VFRMAXDFSTvl_v: |
| 21094 | case VE::VFRMAXDLSTv: |
| 21095 | case VE::VFRMAXDLSTvL: |
| 21096 | case VE::VFRMAXDLSTvL_v: |
| 21097 | case VE::VFRMAXDLSTv_v: |
| 21098 | case VE::VFRMAXDLSTvl: |
| 21099 | case VE::VFRMAXDLSTvl_v: |
| 21100 | case VE::VFRMAXSFSTv: |
| 21101 | case VE::VFRMAXSFSTvL: |
| 21102 | case VE::VFRMAXSFSTvL_v: |
| 21103 | case VE::VFRMAXSFSTv_v: |
| 21104 | case VE::VFRMAXSFSTvl: |
| 21105 | case VE::VFRMAXSFSTvl_v: |
| 21106 | case VE::VFRMAXSLSTv: |
| 21107 | case VE::VFRMAXSLSTvL: |
| 21108 | case VE::VFRMAXSLSTvL_v: |
| 21109 | case VE::VFRMAXSLSTv_v: |
| 21110 | case VE::VFRMAXSLSTvl: |
| 21111 | case VE::VFRMAXSLSTvl_v: |
| 21112 | case VE::VFRMINDFSTv: |
| 21113 | case VE::VFRMINDFSTvL: |
| 21114 | case VE::VFRMINDFSTvL_v: |
| 21115 | case VE::VFRMINDFSTv_v: |
| 21116 | case VE::VFRMINDFSTvl: |
| 21117 | case VE::VFRMINDFSTvl_v: |
| 21118 | case VE::VFRMINDLSTv: |
| 21119 | case VE::VFRMINDLSTvL: |
| 21120 | case VE::VFRMINDLSTvL_v: |
| 21121 | case VE::VFRMINDLSTv_v: |
| 21122 | case VE::VFRMINDLSTvl: |
| 21123 | case VE::VFRMINDLSTvl_v: |
| 21124 | case VE::VFRMINSFSTv: |
| 21125 | case VE::VFRMINSFSTvL: |
| 21126 | case VE::VFRMINSFSTvL_v: |
| 21127 | case VE::VFRMINSFSTv_v: |
| 21128 | case VE::VFRMINSFSTvl: |
| 21129 | case VE::VFRMINSFSTvl_v: |
| 21130 | case VE::VFRMINSLSTv: |
| 21131 | case VE::VFRMINSLSTvL: |
| 21132 | case VE::VFRMINSLSTvL_v: |
| 21133 | case VE::VFRMINSLSTv_v: |
| 21134 | case VE::VFRMINSLSTvl: |
| 21135 | case VE::VFRMINSLSTvl_v: |
| 21136 | case VE::VFSQRTDv: |
| 21137 | case VE::VFSQRTDvL: |
| 21138 | case VE::VFSQRTDvL_v: |
| 21139 | case VE::VFSQRTDv_v: |
| 21140 | case VE::VFSQRTDvl: |
| 21141 | case VE::VFSQRTDvl_v: |
| 21142 | case VE::VFSQRTSv: |
| 21143 | case VE::VFSQRTSvL: |
| 21144 | case VE::VFSQRTSvL_v: |
| 21145 | case VE::VFSQRTSv_v: |
| 21146 | case VE::VFSQRTSvl: |
| 21147 | case VE::VFSQRTSvl_v: |
| 21148 | case VE::VFSUMDv: |
| 21149 | case VE::VFSUMDvL: |
| 21150 | case VE::VFSUMDvL_v: |
| 21151 | case VE::VFSUMDv_v: |
| 21152 | case VE::VFSUMDvl: |
| 21153 | case VE::VFSUMDvl_v: |
| 21154 | case VE::VFSUMSv: |
| 21155 | case VE::VFSUMSvL: |
| 21156 | case VE::VFSUMSvL_v: |
| 21157 | case VE::VFSUMSv_v: |
| 21158 | case VE::VFSUMSvl: |
| 21159 | case VE::VFSUMSvl_v: |
| 21160 | case VE::VRANDv: |
| 21161 | case VE::VRANDvL: |
| 21162 | case VE::VRANDvL_v: |
| 21163 | case VE::VRANDv_v: |
| 21164 | case VE::VRANDvl: |
| 21165 | case VE::VRANDvl_v: |
| 21166 | case VE::VRCPDv: |
| 21167 | case VE::VRCPDvL: |
| 21168 | case VE::VRCPDvL_v: |
| 21169 | case VE::VRCPDv_v: |
| 21170 | case VE::VRCPDvl: |
| 21171 | case VE::VRCPDvl_v: |
| 21172 | case VE::VRCPSv: |
| 21173 | case VE::VRCPSvL: |
| 21174 | case VE::VRCPSvL_v: |
| 21175 | case VE::VRCPSv_v: |
| 21176 | case VE::VRCPSvl: |
| 21177 | case VE::VRCPSvl_v: |
| 21178 | case VE::VRMAXSLFSTv: |
| 21179 | case VE::VRMAXSLFSTvL: |
| 21180 | case VE::VRMAXSLFSTvL_v: |
| 21181 | case VE::VRMAXSLFSTv_v: |
| 21182 | case VE::VRMAXSLFSTvl: |
| 21183 | case VE::VRMAXSLFSTvl_v: |
| 21184 | case VE::VRMAXSLLSTv: |
| 21185 | case VE::VRMAXSLLSTvL: |
| 21186 | case VE::VRMAXSLLSTvL_v: |
| 21187 | case VE::VRMAXSLLSTv_v: |
| 21188 | case VE::VRMAXSLLSTvl: |
| 21189 | case VE::VRMAXSLLSTvl_v: |
| 21190 | case VE::VRMAXSWFSTSXv: |
| 21191 | case VE::VRMAXSWFSTSXvL: |
| 21192 | case VE::VRMAXSWFSTSXvL_v: |
| 21193 | case VE::VRMAXSWFSTSXv_v: |
| 21194 | case VE::VRMAXSWFSTSXvl: |
| 21195 | case VE::VRMAXSWFSTSXvl_v: |
| 21196 | case VE::VRMAXSWFSTZXv: |
| 21197 | case VE::VRMAXSWFSTZXvL: |
| 21198 | case VE::VRMAXSWFSTZXvL_v: |
| 21199 | case VE::VRMAXSWFSTZXv_v: |
| 21200 | case VE::VRMAXSWFSTZXvl: |
| 21201 | case VE::VRMAXSWFSTZXvl_v: |
| 21202 | case VE::VRMAXSWLSTSXv: |
| 21203 | case VE::VRMAXSWLSTSXvL: |
| 21204 | case VE::VRMAXSWLSTSXvL_v: |
| 21205 | case VE::VRMAXSWLSTSXv_v: |
| 21206 | case VE::VRMAXSWLSTSXvl: |
| 21207 | case VE::VRMAXSWLSTSXvl_v: |
| 21208 | case VE::VRMAXSWLSTZXv: |
| 21209 | case VE::VRMAXSWLSTZXvL: |
| 21210 | case VE::VRMAXSWLSTZXvL_v: |
| 21211 | case VE::VRMAXSWLSTZXv_v: |
| 21212 | case VE::VRMAXSWLSTZXvl: |
| 21213 | case VE::VRMAXSWLSTZXvl_v: |
| 21214 | case VE::VRMINSLFSTv: |
| 21215 | case VE::VRMINSLFSTvL: |
| 21216 | case VE::VRMINSLFSTvL_v: |
| 21217 | case VE::VRMINSLFSTv_v: |
| 21218 | case VE::VRMINSLFSTvl: |
| 21219 | case VE::VRMINSLFSTvl_v: |
| 21220 | case VE::VRMINSLLSTv: |
| 21221 | case VE::VRMINSLLSTvL: |
| 21222 | case VE::VRMINSLLSTvL_v: |
| 21223 | case VE::VRMINSLLSTv_v: |
| 21224 | case VE::VRMINSLLSTvl: |
| 21225 | case VE::VRMINSLLSTvl_v: |
| 21226 | case VE::VRMINSWFSTSXv: |
| 21227 | case VE::VRMINSWFSTSXvL: |
| 21228 | case VE::VRMINSWFSTSXvL_v: |
| 21229 | case VE::VRMINSWFSTSXv_v: |
| 21230 | case VE::VRMINSWFSTSXvl: |
| 21231 | case VE::VRMINSWFSTSXvl_v: |
| 21232 | case VE::VRMINSWFSTZXv: |
| 21233 | case VE::VRMINSWFSTZXvL: |
| 21234 | case VE::VRMINSWFSTZXvL_v: |
| 21235 | case VE::VRMINSWFSTZXv_v: |
| 21236 | case VE::VRMINSWFSTZXvl: |
| 21237 | case VE::VRMINSWFSTZXvl_v: |
| 21238 | case VE::VRMINSWLSTSXv: |
| 21239 | case VE::VRMINSWLSTSXvL: |
| 21240 | case VE::VRMINSWLSTSXvL_v: |
| 21241 | case VE::VRMINSWLSTSXv_v: |
| 21242 | case VE::VRMINSWLSTSXvl: |
| 21243 | case VE::VRMINSWLSTSXvl_v: |
| 21244 | case VE::VRMINSWLSTZXv: |
| 21245 | case VE::VRMINSWLSTZXvL: |
| 21246 | case VE::VRMINSWLSTZXvL_v: |
| 21247 | case VE::VRMINSWLSTZXv_v: |
| 21248 | case VE::VRMINSWLSTZXvl: |
| 21249 | case VE::VRMINSWLSTZXvl_v: |
| 21250 | case VE::VRORv: |
| 21251 | case VE::VRORvL: |
| 21252 | case VE::VRORvL_v: |
| 21253 | case VE::VRORv_v: |
| 21254 | case VE::VRORvl: |
| 21255 | case VE::VRORvl_v: |
| 21256 | case VE::VRSQRTDNEXv: |
| 21257 | case VE::VRSQRTDNEXvL: |
| 21258 | case VE::VRSQRTDNEXvL_v: |
| 21259 | case VE::VRSQRTDNEXv_v: |
| 21260 | case VE::VRSQRTDNEXvl: |
| 21261 | case VE::VRSQRTDNEXvl_v: |
| 21262 | case VE::VRSQRTDv: |
| 21263 | case VE::VRSQRTDvL: |
| 21264 | case VE::VRSQRTDvL_v: |
| 21265 | case VE::VRSQRTDv_v: |
| 21266 | case VE::VRSQRTDvl: |
| 21267 | case VE::VRSQRTDvl_v: |
| 21268 | case VE::VRSQRTSNEXv: |
| 21269 | case VE::VRSQRTSNEXvL: |
| 21270 | case VE::VRSQRTSNEXvL_v: |
| 21271 | case VE::VRSQRTSNEXv_v: |
| 21272 | case VE::VRSQRTSNEXvl: |
| 21273 | case VE::VRSQRTSNEXvl_v: |
| 21274 | case VE::VRSQRTSv: |
| 21275 | case VE::VRSQRTSvL: |
| 21276 | case VE::VRSQRTSvL_v: |
| 21277 | case VE::VRSQRTSv_v: |
| 21278 | case VE::VRSQRTSvl: |
| 21279 | case VE::VRSQRTSvl_v: |
| 21280 | case VE::VRXORv: |
| 21281 | case VE::VRXORvL: |
| 21282 | case VE::VRXORvL_v: |
| 21283 | case VE::VRXORv_v: |
| 21284 | case VE::VRXORvl: |
| 21285 | case VE::VRXORvl_v: |
| 21286 | case VE::VSUMLv: |
| 21287 | case VE::VSUMLvL: |
| 21288 | case VE::VSUMLvL_v: |
| 21289 | case VE::VSUMLv_v: |
| 21290 | case VE::VSUMLvl: |
| 21291 | case VE::VSUMLvl_v: |
| 21292 | case VE::VSUMWSXv: |
| 21293 | case VE::VSUMWSXvL: |
| 21294 | case VE::VSUMWSXvL_v: |
| 21295 | case VE::VSUMWSXv_v: |
| 21296 | case VE::VSUMWSXvl: |
| 21297 | case VE::VSUMWSXvl_v: |
| 21298 | case VE::VSUMWZXv: |
| 21299 | case VE::VSUMWZXvL: |
| 21300 | case VE::VSUMWZXvL_v: |
| 21301 | case VE::VSUMWZXv_v: |
| 21302 | case VE::VSUMWZXvl: |
| 21303 | case VE::VSUMWZXvl_v: { |
| 21304 | // op: vx |
| 21305 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 21306 | op &= UINT64_C(255); |
| 21307 | op <<= 24; |
| 21308 | Value |= op; |
| 21309 | // op: vy |
| 21310 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 21311 | op &= UINT64_C(255); |
| 21312 | op <<= 16; |
| 21313 | Value |= op; |
| 21314 | break; |
| 21315 | } |
| 21316 | case VE::ANDMmm: |
| 21317 | case VE::EQVMmm: |
| 21318 | case VE::NNDMmm: |
| 21319 | case VE::ORMmm: |
| 21320 | case VE::PVADDSLOvv: |
| 21321 | case VE::PVADDSLOvvL: |
| 21322 | case VE::PVADDSLOvvL_v: |
| 21323 | case VE::PVADDSLOvv_v: |
| 21324 | case VE::PVADDSLOvvl: |
| 21325 | case VE::PVADDSLOvvl_v: |
| 21326 | case VE::PVADDSUPvv: |
| 21327 | case VE::PVADDSUPvvL: |
| 21328 | case VE::PVADDSUPvvL_v: |
| 21329 | case VE::PVADDSUPvv_v: |
| 21330 | case VE::PVADDSUPvvl: |
| 21331 | case VE::PVADDSUPvvl_v: |
| 21332 | case VE::PVADDSvv: |
| 21333 | case VE::PVADDSvvL: |
| 21334 | case VE::PVADDSvvL_v: |
| 21335 | case VE::PVADDSvv_v: |
| 21336 | case VE::PVADDSvvl: |
| 21337 | case VE::PVADDSvvl_v: |
| 21338 | case VE::PVADDULOvv: |
| 21339 | case VE::PVADDULOvvL: |
| 21340 | case VE::PVADDULOvvL_v: |
| 21341 | case VE::PVADDULOvv_v: |
| 21342 | case VE::PVADDULOvvl: |
| 21343 | case VE::PVADDULOvvl_v: |
| 21344 | case VE::PVADDUUPvv: |
| 21345 | case VE::PVADDUUPvvL: |
| 21346 | case VE::PVADDUUPvvL_v: |
| 21347 | case VE::PVADDUUPvv_v: |
| 21348 | case VE::PVADDUUPvvl: |
| 21349 | case VE::PVADDUUPvvl_v: |
| 21350 | case VE::PVADDUvv: |
| 21351 | case VE::PVADDUvvL: |
| 21352 | case VE::PVADDUvvL_v: |
| 21353 | case VE::PVADDUvv_v: |
| 21354 | case VE::PVADDUvvl: |
| 21355 | case VE::PVADDUvvl_v: |
| 21356 | case VE::PVANDLOvv: |
| 21357 | case VE::PVANDLOvvL: |
| 21358 | case VE::PVANDLOvvL_v: |
| 21359 | case VE::PVANDLOvv_v: |
| 21360 | case VE::PVANDLOvvl: |
| 21361 | case VE::PVANDLOvvl_v: |
| 21362 | case VE::PVANDUPvv: |
| 21363 | case VE::PVANDUPvvL: |
| 21364 | case VE::PVANDUPvvL_v: |
| 21365 | case VE::PVANDUPvv_v: |
| 21366 | case VE::PVANDUPvvl: |
| 21367 | case VE::PVANDUPvvl_v: |
| 21368 | case VE::PVANDvv: |
| 21369 | case VE::PVANDvvL: |
| 21370 | case VE::PVANDvvL_v: |
| 21371 | case VE::PVANDvv_v: |
| 21372 | case VE::PVANDvvl: |
| 21373 | case VE::PVANDvvl_v: |
| 21374 | case VE::PVCMPSLOvv: |
| 21375 | case VE::PVCMPSLOvvL: |
| 21376 | case VE::PVCMPSLOvvL_v: |
| 21377 | case VE::PVCMPSLOvv_v: |
| 21378 | case VE::PVCMPSLOvvl: |
| 21379 | case VE::PVCMPSLOvvl_v: |
| 21380 | case VE::PVCMPSUPvv: |
| 21381 | case VE::PVCMPSUPvvL: |
| 21382 | case VE::PVCMPSUPvvL_v: |
| 21383 | case VE::PVCMPSUPvv_v: |
| 21384 | case VE::PVCMPSUPvvl: |
| 21385 | case VE::PVCMPSUPvvl_v: |
| 21386 | case VE::PVCMPSvv: |
| 21387 | case VE::PVCMPSvvL: |
| 21388 | case VE::PVCMPSvvL_v: |
| 21389 | case VE::PVCMPSvv_v: |
| 21390 | case VE::PVCMPSvvl: |
| 21391 | case VE::PVCMPSvvl_v: |
| 21392 | case VE::PVCMPULOvv: |
| 21393 | case VE::PVCMPULOvvL: |
| 21394 | case VE::PVCMPULOvvL_v: |
| 21395 | case VE::PVCMPULOvv_v: |
| 21396 | case VE::PVCMPULOvvl: |
| 21397 | case VE::PVCMPULOvvl_v: |
| 21398 | case VE::PVCMPUUPvv: |
| 21399 | case VE::PVCMPUUPvvL: |
| 21400 | case VE::PVCMPUUPvvL_v: |
| 21401 | case VE::PVCMPUUPvv_v: |
| 21402 | case VE::PVCMPUUPvvl: |
| 21403 | case VE::PVCMPUUPvvl_v: |
| 21404 | case VE::PVCMPUvv: |
| 21405 | case VE::PVCMPUvvL: |
| 21406 | case VE::PVCMPUvvL_v: |
| 21407 | case VE::PVCMPUvv_v: |
| 21408 | case VE::PVCMPUvvl: |
| 21409 | case VE::PVCMPUvvl_v: |
| 21410 | case VE::PVEQVLOvv: |
| 21411 | case VE::PVEQVLOvvL: |
| 21412 | case VE::PVEQVLOvvL_v: |
| 21413 | case VE::PVEQVLOvv_v: |
| 21414 | case VE::PVEQVLOvvl: |
| 21415 | case VE::PVEQVLOvvl_v: |
| 21416 | case VE::PVEQVUPvv: |
| 21417 | case VE::PVEQVUPvvL: |
| 21418 | case VE::PVEQVUPvvL_v: |
| 21419 | case VE::PVEQVUPvv_v: |
| 21420 | case VE::PVEQVUPvvl: |
| 21421 | case VE::PVEQVUPvvl_v: |
| 21422 | case VE::PVEQVvv: |
| 21423 | case VE::PVEQVvvL: |
| 21424 | case VE::PVEQVvvL_v: |
| 21425 | case VE::PVEQVvv_v: |
| 21426 | case VE::PVEQVvvl: |
| 21427 | case VE::PVEQVvvl_v: |
| 21428 | case VE::PVFADDLOvv: |
| 21429 | case VE::PVFADDLOvvL: |
| 21430 | case VE::PVFADDLOvvL_v: |
| 21431 | case VE::PVFADDLOvv_v: |
| 21432 | case VE::PVFADDLOvvl: |
| 21433 | case VE::PVFADDLOvvl_v: |
| 21434 | case VE::PVFADDUPvv: |
| 21435 | case VE::PVFADDUPvvL: |
| 21436 | case VE::PVFADDUPvvL_v: |
| 21437 | case VE::PVFADDUPvv_v: |
| 21438 | case VE::PVFADDUPvvl: |
| 21439 | case VE::PVFADDUPvvl_v: |
| 21440 | case VE::PVFADDvv: |
| 21441 | case VE::PVFADDvvL: |
| 21442 | case VE::PVFADDvvL_v: |
| 21443 | case VE::PVFADDvv_v: |
| 21444 | case VE::PVFADDvvl: |
| 21445 | case VE::PVFADDvvl_v: |
| 21446 | case VE::PVFCMPLOvv: |
| 21447 | case VE::PVFCMPLOvvL: |
| 21448 | case VE::PVFCMPLOvvL_v: |
| 21449 | case VE::PVFCMPLOvv_v: |
| 21450 | case VE::PVFCMPLOvvl: |
| 21451 | case VE::PVFCMPLOvvl_v: |
| 21452 | case VE::PVFCMPUPvv: |
| 21453 | case VE::PVFCMPUPvvL: |
| 21454 | case VE::PVFCMPUPvvL_v: |
| 21455 | case VE::PVFCMPUPvv_v: |
| 21456 | case VE::PVFCMPUPvvl: |
| 21457 | case VE::PVFCMPUPvvl_v: |
| 21458 | case VE::PVFCMPvv: |
| 21459 | case VE::PVFCMPvvL: |
| 21460 | case VE::PVFCMPvvL_v: |
| 21461 | case VE::PVFCMPvv_v: |
| 21462 | case VE::PVFCMPvvl: |
| 21463 | case VE::PVFCMPvvl_v: |
| 21464 | case VE::PVFMAXLOvv: |
| 21465 | case VE::PVFMAXLOvvL: |
| 21466 | case VE::PVFMAXLOvvL_v: |
| 21467 | case VE::PVFMAXLOvv_v: |
| 21468 | case VE::PVFMAXLOvvl: |
| 21469 | case VE::PVFMAXLOvvl_v: |
| 21470 | case VE::PVFMAXUPvv: |
| 21471 | case VE::PVFMAXUPvvL: |
| 21472 | case VE::PVFMAXUPvvL_v: |
| 21473 | case VE::PVFMAXUPvv_v: |
| 21474 | case VE::PVFMAXUPvvl: |
| 21475 | case VE::PVFMAXUPvvl_v: |
| 21476 | case VE::PVFMAXvv: |
| 21477 | case VE::PVFMAXvvL: |
| 21478 | case VE::PVFMAXvvL_v: |
| 21479 | case VE::PVFMAXvv_v: |
| 21480 | case VE::PVFMAXvvl: |
| 21481 | case VE::PVFMAXvvl_v: |
| 21482 | case VE::PVFMINLOvv: |
| 21483 | case VE::PVFMINLOvvL: |
| 21484 | case VE::PVFMINLOvvL_v: |
| 21485 | case VE::PVFMINLOvv_v: |
| 21486 | case VE::PVFMINLOvvl: |
| 21487 | case VE::PVFMINLOvvl_v: |
| 21488 | case VE::PVFMINUPvv: |
| 21489 | case VE::PVFMINUPvvL: |
| 21490 | case VE::PVFMINUPvvL_v: |
| 21491 | case VE::PVFMINUPvv_v: |
| 21492 | case VE::PVFMINUPvvl: |
| 21493 | case VE::PVFMINUPvvl_v: |
| 21494 | case VE::PVFMINvv: |
| 21495 | case VE::PVFMINvvL: |
| 21496 | case VE::PVFMINvvL_v: |
| 21497 | case VE::PVFMINvv_v: |
| 21498 | case VE::PVFMINvvl: |
| 21499 | case VE::PVFMINvvl_v: |
| 21500 | case VE::PVFMULLOvv: |
| 21501 | case VE::PVFMULLOvvL: |
| 21502 | case VE::PVFMULLOvvL_v: |
| 21503 | case VE::PVFMULLOvv_v: |
| 21504 | case VE::PVFMULLOvvl: |
| 21505 | case VE::PVFMULLOvvl_v: |
| 21506 | case VE::PVFMULUPvv: |
| 21507 | case VE::PVFMULUPvvL: |
| 21508 | case VE::PVFMULUPvvL_v: |
| 21509 | case VE::PVFMULUPvv_v: |
| 21510 | case VE::PVFMULUPvvl: |
| 21511 | case VE::PVFMULUPvvl_v: |
| 21512 | case VE::PVFMULvv: |
| 21513 | case VE::PVFMULvvL: |
| 21514 | case VE::PVFMULvvL_v: |
| 21515 | case VE::PVFMULvv_v: |
| 21516 | case VE::PVFMULvvl: |
| 21517 | case VE::PVFMULvvl_v: |
| 21518 | case VE::PVFSUBLOvv: |
| 21519 | case VE::PVFSUBLOvvL: |
| 21520 | case VE::PVFSUBLOvvL_v: |
| 21521 | case VE::PVFSUBLOvv_v: |
| 21522 | case VE::PVFSUBLOvvl: |
| 21523 | case VE::PVFSUBLOvvl_v: |
| 21524 | case VE::PVFSUBUPvv: |
| 21525 | case VE::PVFSUBUPvvL: |
| 21526 | case VE::PVFSUBUPvvL_v: |
| 21527 | case VE::PVFSUBUPvv_v: |
| 21528 | case VE::PVFSUBUPvvl: |
| 21529 | case VE::PVFSUBUPvvl_v: |
| 21530 | case VE::PVFSUBvv: |
| 21531 | case VE::PVFSUBvvL: |
| 21532 | case VE::PVFSUBvvL_v: |
| 21533 | case VE::PVFSUBvv_v: |
| 21534 | case VE::PVFSUBvvl: |
| 21535 | case VE::PVFSUBvvl_v: |
| 21536 | case VE::PVMAXSLOvv: |
| 21537 | case VE::PVMAXSLOvvL: |
| 21538 | case VE::PVMAXSLOvvL_v: |
| 21539 | case VE::PVMAXSLOvv_v: |
| 21540 | case VE::PVMAXSLOvvl: |
| 21541 | case VE::PVMAXSLOvvl_v: |
| 21542 | case VE::PVMAXSUPvv: |
| 21543 | case VE::PVMAXSUPvvL: |
| 21544 | case VE::PVMAXSUPvvL_v: |
| 21545 | case VE::PVMAXSUPvv_v: |
| 21546 | case VE::PVMAXSUPvvl: |
| 21547 | case VE::PVMAXSUPvvl_v: |
| 21548 | case VE::PVMAXSvv: |
| 21549 | case VE::PVMAXSvvL: |
| 21550 | case VE::PVMAXSvvL_v: |
| 21551 | case VE::PVMAXSvv_v: |
| 21552 | case VE::PVMAXSvvl: |
| 21553 | case VE::PVMAXSvvl_v: |
| 21554 | case VE::PVMINSLOvv: |
| 21555 | case VE::PVMINSLOvvL: |
| 21556 | case VE::PVMINSLOvvL_v: |
| 21557 | case VE::PVMINSLOvv_v: |
| 21558 | case VE::PVMINSLOvvl: |
| 21559 | case VE::PVMINSLOvvl_v: |
| 21560 | case VE::PVMINSUPvv: |
| 21561 | case VE::PVMINSUPvvL: |
| 21562 | case VE::PVMINSUPvvL_v: |
| 21563 | case VE::PVMINSUPvv_v: |
| 21564 | case VE::PVMINSUPvvl: |
| 21565 | case VE::PVMINSUPvvl_v: |
| 21566 | case VE::PVMINSvv: |
| 21567 | case VE::PVMINSvvL: |
| 21568 | case VE::PVMINSvvL_v: |
| 21569 | case VE::PVMINSvv_v: |
| 21570 | case VE::PVMINSvvl: |
| 21571 | case VE::PVMINSvvl_v: |
| 21572 | case VE::PVORLOvv: |
| 21573 | case VE::PVORLOvvL: |
| 21574 | case VE::PVORLOvvL_v: |
| 21575 | case VE::PVORLOvv_v: |
| 21576 | case VE::PVORLOvvl: |
| 21577 | case VE::PVORLOvvl_v: |
| 21578 | case VE::PVORUPvv: |
| 21579 | case VE::PVORUPvvL: |
| 21580 | case VE::PVORUPvvL_v: |
| 21581 | case VE::PVORUPvv_v: |
| 21582 | case VE::PVORUPvvl: |
| 21583 | case VE::PVORUPvvl_v: |
| 21584 | case VE::PVORvv: |
| 21585 | case VE::PVORvvL: |
| 21586 | case VE::PVORvvL_v: |
| 21587 | case VE::PVORvv_v: |
| 21588 | case VE::PVORvvl: |
| 21589 | case VE::PVORvvl_v: |
| 21590 | case VE::PVSUBSLOvv: |
| 21591 | case VE::PVSUBSLOvvL: |
| 21592 | case VE::PVSUBSLOvvL_v: |
| 21593 | case VE::PVSUBSLOvv_v: |
| 21594 | case VE::PVSUBSLOvvl: |
| 21595 | case VE::PVSUBSLOvvl_v: |
| 21596 | case VE::PVSUBSUPvv: |
| 21597 | case VE::PVSUBSUPvvL: |
| 21598 | case VE::PVSUBSUPvvL_v: |
| 21599 | case VE::PVSUBSUPvv_v: |
| 21600 | case VE::PVSUBSUPvvl: |
| 21601 | case VE::PVSUBSUPvvl_v: |
| 21602 | case VE::PVSUBSvv: |
| 21603 | case VE::PVSUBSvvL: |
| 21604 | case VE::PVSUBSvvL_v: |
| 21605 | case VE::PVSUBSvv_v: |
| 21606 | case VE::PVSUBSvvl: |
| 21607 | case VE::PVSUBSvvl_v: |
| 21608 | case VE::PVSUBULOvv: |
| 21609 | case VE::PVSUBULOvvL: |
| 21610 | case VE::PVSUBULOvvL_v: |
| 21611 | case VE::PVSUBULOvv_v: |
| 21612 | case VE::PVSUBULOvvl: |
| 21613 | case VE::PVSUBULOvvl_v: |
| 21614 | case VE::PVSUBUUPvv: |
| 21615 | case VE::PVSUBUUPvvL: |
| 21616 | case VE::PVSUBUUPvvL_v: |
| 21617 | case VE::PVSUBUUPvv_v: |
| 21618 | case VE::PVSUBUUPvvl: |
| 21619 | case VE::PVSUBUUPvvl_v: |
| 21620 | case VE::PVSUBUvv: |
| 21621 | case VE::PVSUBUvvL: |
| 21622 | case VE::PVSUBUvvL_v: |
| 21623 | case VE::PVSUBUvv_v: |
| 21624 | case VE::PVSUBUvvl: |
| 21625 | case VE::PVSUBUvvl_v: |
| 21626 | case VE::PVXORLOvv: |
| 21627 | case VE::PVXORLOvvL: |
| 21628 | case VE::PVXORLOvvL_v: |
| 21629 | case VE::PVXORLOvv_v: |
| 21630 | case VE::PVXORLOvvl: |
| 21631 | case VE::PVXORLOvvl_v: |
| 21632 | case VE::PVXORUPvv: |
| 21633 | case VE::PVXORUPvvL: |
| 21634 | case VE::PVXORUPvvL_v: |
| 21635 | case VE::PVXORUPvv_v: |
| 21636 | case VE::PVXORUPvvl: |
| 21637 | case VE::PVXORUPvvl_v: |
| 21638 | case VE::PVXORvv: |
| 21639 | case VE::PVXORvvL: |
| 21640 | case VE::PVXORvvL_v: |
| 21641 | case VE::PVXORvv_v: |
| 21642 | case VE::PVXORvvl: |
| 21643 | case VE::PVXORvvl_v: |
| 21644 | case VE::VADDSLvv: |
| 21645 | case VE::VADDSLvvL: |
| 21646 | case VE::VADDSLvvL_v: |
| 21647 | case VE::VADDSLvv_v: |
| 21648 | case VE::VADDSLvvl: |
| 21649 | case VE::VADDSLvvl_v: |
| 21650 | case VE::VADDSWSXvv: |
| 21651 | case VE::VADDSWSXvvL: |
| 21652 | case VE::VADDSWSXvvL_v: |
| 21653 | case VE::VADDSWSXvv_v: |
| 21654 | case VE::VADDSWSXvvl: |
| 21655 | case VE::VADDSWSXvvl_v: |
| 21656 | case VE::VADDSWZXvv: |
| 21657 | case VE::VADDSWZXvvL: |
| 21658 | case VE::VADDSWZXvvL_v: |
| 21659 | case VE::VADDSWZXvv_v: |
| 21660 | case VE::VADDSWZXvvl: |
| 21661 | case VE::VADDSWZXvvl_v: |
| 21662 | case VE::VADDULvv: |
| 21663 | case VE::VADDULvvL: |
| 21664 | case VE::VADDULvvL_v: |
| 21665 | case VE::VADDULvv_v: |
| 21666 | case VE::VADDULvvl: |
| 21667 | case VE::VADDULvvl_v: |
| 21668 | case VE::VADDUWvv: |
| 21669 | case VE::VADDUWvvL: |
| 21670 | case VE::VADDUWvvL_v: |
| 21671 | case VE::VADDUWvv_v: |
| 21672 | case VE::VADDUWvvl: |
| 21673 | case VE::VADDUWvvl_v: |
| 21674 | case VE::VANDvv: |
| 21675 | case VE::VANDvvL: |
| 21676 | case VE::VANDvvL_v: |
| 21677 | case VE::VANDvv_v: |
| 21678 | case VE::VANDvvl: |
| 21679 | case VE::VANDvvl_v: |
| 21680 | case VE::VCMPSLvv: |
| 21681 | case VE::VCMPSLvvL: |
| 21682 | case VE::VCMPSLvvL_v: |
| 21683 | case VE::VCMPSLvv_v: |
| 21684 | case VE::VCMPSLvvl: |
| 21685 | case VE::VCMPSLvvl_v: |
| 21686 | case VE::VCMPSWSXvv: |
| 21687 | case VE::VCMPSWSXvvL: |
| 21688 | case VE::VCMPSWSXvvL_v: |
| 21689 | case VE::VCMPSWSXvv_v: |
| 21690 | case VE::VCMPSWSXvvl: |
| 21691 | case VE::VCMPSWSXvvl_v: |
| 21692 | case VE::VCMPSWZXvv: |
| 21693 | case VE::VCMPSWZXvvL: |
| 21694 | case VE::VCMPSWZXvvL_v: |
| 21695 | case VE::VCMPSWZXvv_v: |
| 21696 | case VE::VCMPSWZXvvl: |
| 21697 | case VE::VCMPSWZXvvl_v: |
| 21698 | case VE::VCMPULvv: |
| 21699 | case VE::VCMPULvvL: |
| 21700 | case VE::VCMPULvvL_v: |
| 21701 | case VE::VCMPULvv_v: |
| 21702 | case VE::VCMPULvvl: |
| 21703 | case VE::VCMPULvvl_v: |
| 21704 | case VE::VCMPUWvv: |
| 21705 | case VE::VCMPUWvvL: |
| 21706 | case VE::VCMPUWvvL_v: |
| 21707 | case VE::VCMPUWvv_v: |
| 21708 | case VE::VCMPUWvvl: |
| 21709 | case VE::VCMPUWvvl_v: |
| 21710 | case VE::VDIVSLvv: |
| 21711 | case VE::VDIVSLvvL: |
| 21712 | case VE::VDIVSLvvL_v: |
| 21713 | case VE::VDIVSLvv_v: |
| 21714 | case VE::VDIVSLvvl: |
| 21715 | case VE::VDIVSLvvl_v: |
| 21716 | case VE::VDIVSWSXvv: |
| 21717 | case VE::VDIVSWSXvvL: |
| 21718 | case VE::VDIVSWSXvvL_v: |
| 21719 | case VE::VDIVSWSXvv_v: |
| 21720 | case VE::VDIVSWSXvvl: |
| 21721 | case VE::VDIVSWSXvvl_v: |
| 21722 | case VE::VDIVSWZXvv: |
| 21723 | case VE::VDIVSWZXvvL: |
| 21724 | case VE::VDIVSWZXvvL_v: |
| 21725 | case VE::VDIVSWZXvv_v: |
| 21726 | case VE::VDIVSWZXvvl: |
| 21727 | case VE::VDIVSWZXvvl_v: |
| 21728 | case VE::VDIVULvv: |
| 21729 | case VE::VDIVULvvL: |
| 21730 | case VE::VDIVULvvL_v: |
| 21731 | case VE::VDIVULvv_v: |
| 21732 | case VE::VDIVULvvl: |
| 21733 | case VE::VDIVULvvl_v: |
| 21734 | case VE::VDIVUWvv: |
| 21735 | case VE::VDIVUWvvL: |
| 21736 | case VE::VDIVUWvvL_v: |
| 21737 | case VE::VDIVUWvv_v: |
| 21738 | case VE::VDIVUWvvl: |
| 21739 | case VE::VDIVUWvvl_v: |
| 21740 | case VE::VEQVvv: |
| 21741 | case VE::VEQVvvL: |
| 21742 | case VE::VEQVvvL_v: |
| 21743 | case VE::VEQVvv_v: |
| 21744 | case VE::VEQVvvl: |
| 21745 | case VE::VEQVvvl_v: |
| 21746 | case VE::VFADDDvv: |
| 21747 | case VE::VFADDDvvL: |
| 21748 | case VE::VFADDDvvL_v: |
| 21749 | case VE::VFADDDvv_v: |
| 21750 | case VE::VFADDDvvl: |
| 21751 | case VE::VFADDDvvl_v: |
| 21752 | case VE::VFADDSvv: |
| 21753 | case VE::VFADDSvvL: |
| 21754 | case VE::VFADDSvvL_v: |
| 21755 | case VE::VFADDSvv_v: |
| 21756 | case VE::VFADDSvvl: |
| 21757 | case VE::VFADDSvvl_v: |
| 21758 | case VE::VFCMPDvv: |
| 21759 | case VE::VFCMPDvvL: |
| 21760 | case VE::VFCMPDvvL_v: |
| 21761 | case VE::VFCMPDvv_v: |
| 21762 | case VE::VFCMPDvvl: |
| 21763 | case VE::VFCMPDvvl_v: |
| 21764 | case VE::VFCMPSvv: |
| 21765 | case VE::VFCMPSvvL: |
| 21766 | case VE::VFCMPSvvL_v: |
| 21767 | case VE::VFCMPSvv_v: |
| 21768 | case VE::VFCMPSvvl: |
| 21769 | case VE::VFCMPSvvl_v: |
| 21770 | case VE::VFDIVDvv: |
| 21771 | case VE::VFDIVDvvL: |
| 21772 | case VE::VFDIVDvvL_v: |
| 21773 | case VE::VFDIVDvv_v: |
| 21774 | case VE::VFDIVDvvl: |
| 21775 | case VE::VFDIVDvvl_v: |
| 21776 | case VE::VFDIVSvv: |
| 21777 | case VE::VFDIVSvvL: |
| 21778 | case VE::VFDIVSvvL_v: |
| 21779 | case VE::VFDIVSvv_v: |
| 21780 | case VE::VFDIVSvvl: |
| 21781 | case VE::VFDIVSvvl_v: |
| 21782 | case VE::VFMAXDvv: |
| 21783 | case VE::VFMAXDvvL: |
| 21784 | case VE::VFMAXDvvL_v: |
| 21785 | case VE::VFMAXDvv_v: |
| 21786 | case VE::VFMAXDvvl: |
| 21787 | case VE::VFMAXDvvl_v: |
| 21788 | case VE::VFMAXSvv: |
| 21789 | case VE::VFMAXSvvL: |
| 21790 | case VE::VFMAXSvvL_v: |
| 21791 | case VE::VFMAXSvv_v: |
| 21792 | case VE::VFMAXSvvl: |
| 21793 | case VE::VFMAXSvvl_v: |
| 21794 | case VE::VFMINDvv: |
| 21795 | case VE::VFMINDvvL: |
| 21796 | case VE::VFMINDvvL_v: |
| 21797 | case VE::VFMINDvv_v: |
| 21798 | case VE::VFMINDvvl: |
| 21799 | case VE::VFMINDvvl_v: |
| 21800 | case VE::VFMINSvv: |
| 21801 | case VE::VFMINSvvL: |
| 21802 | case VE::VFMINSvvL_v: |
| 21803 | case VE::VFMINSvv_v: |
| 21804 | case VE::VFMINSvvl: |
| 21805 | case VE::VFMINSvvl_v: |
| 21806 | case VE::VFMULDvv: |
| 21807 | case VE::VFMULDvvL: |
| 21808 | case VE::VFMULDvvL_v: |
| 21809 | case VE::VFMULDvv_v: |
| 21810 | case VE::VFMULDvvl: |
| 21811 | case VE::VFMULDvvl_v: |
| 21812 | case VE::VFMULSvv: |
| 21813 | case VE::VFMULSvvL: |
| 21814 | case VE::VFMULSvvL_v: |
| 21815 | case VE::VFMULSvv_v: |
| 21816 | case VE::VFMULSvvl: |
| 21817 | case VE::VFMULSvvl_v: |
| 21818 | case VE::VFSUBDvv: |
| 21819 | case VE::VFSUBDvvL: |
| 21820 | case VE::VFSUBDvvL_v: |
| 21821 | case VE::VFSUBDvv_v: |
| 21822 | case VE::VFSUBDvvl: |
| 21823 | case VE::VFSUBDvvl_v: |
| 21824 | case VE::VFSUBSvv: |
| 21825 | case VE::VFSUBSvvL: |
| 21826 | case VE::VFSUBSvvL_v: |
| 21827 | case VE::VFSUBSvv_v: |
| 21828 | case VE::VFSUBSvvl: |
| 21829 | case VE::VFSUBSvvl_v: |
| 21830 | case VE::VMAXSLvv: |
| 21831 | case VE::VMAXSLvvL: |
| 21832 | case VE::VMAXSLvvL_v: |
| 21833 | case VE::VMAXSLvv_v: |
| 21834 | case VE::VMAXSLvvl: |
| 21835 | case VE::VMAXSLvvl_v: |
| 21836 | case VE::VMAXSWSXvv: |
| 21837 | case VE::VMAXSWSXvvL: |
| 21838 | case VE::VMAXSWSXvvL_v: |
| 21839 | case VE::VMAXSWSXvv_v: |
| 21840 | case VE::VMAXSWSXvvl: |
| 21841 | case VE::VMAXSWSXvvl_v: |
| 21842 | case VE::VMAXSWZXvv: |
| 21843 | case VE::VMAXSWZXvvL: |
| 21844 | case VE::VMAXSWZXvvL_v: |
| 21845 | case VE::VMAXSWZXvv_v: |
| 21846 | case VE::VMAXSWZXvvl: |
| 21847 | case VE::VMAXSWZXvvl_v: |
| 21848 | case VE::VMINSLvv: |
| 21849 | case VE::VMINSLvvL: |
| 21850 | case VE::VMINSLvvL_v: |
| 21851 | case VE::VMINSLvv_v: |
| 21852 | case VE::VMINSLvvl: |
| 21853 | case VE::VMINSLvvl_v: |
| 21854 | case VE::VMINSWSXvv: |
| 21855 | case VE::VMINSWSXvvL: |
| 21856 | case VE::VMINSWSXvvL_v: |
| 21857 | case VE::VMINSWSXvv_v: |
| 21858 | case VE::VMINSWSXvvl: |
| 21859 | case VE::VMINSWSXvvl_v: |
| 21860 | case VE::VMINSWZXvv: |
| 21861 | case VE::VMINSWZXvvL: |
| 21862 | case VE::VMINSWZXvvL_v: |
| 21863 | case VE::VMINSWZXvv_v: |
| 21864 | case VE::VMINSWZXvvl: |
| 21865 | case VE::VMINSWZXvvl_v: |
| 21866 | case VE::VMRGWvv: |
| 21867 | case VE::VMRGWvvL: |
| 21868 | case VE::VMRGWvvL_v: |
| 21869 | case VE::VMRGWvv_v: |
| 21870 | case VE::VMRGWvvl: |
| 21871 | case VE::VMRGWvvl_v: |
| 21872 | case VE::VMRGvv: |
| 21873 | case VE::VMRGvvL: |
| 21874 | case VE::VMRGvvL_v: |
| 21875 | case VE::VMRGvv_v: |
| 21876 | case VE::VMRGvvl: |
| 21877 | case VE::VMRGvvl_v: |
| 21878 | case VE::VMULSLWvv: |
| 21879 | case VE::VMULSLWvvL: |
| 21880 | case VE::VMULSLWvvL_v: |
| 21881 | case VE::VMULSLWvv_v: |
| 21882 | case VE::VMULSLWvvl: |
| 21883 | case VE::VMULSLWvvl_v: |
| 21884 | case VE::VMULSLvv: |
| 21885 | case VE::VMULSLvvL: |
| 21886 | case VE::VMULSLvvL_v: |
| 21887 | case VE::VMULSLvv_v: |
| 21888 | case VE::VMULSLvvl: |
| 21889 | case VE::VMULSLvvl_v: |
| 21890 | case VE::VMULSWSXvv: |
| 21891 | case VE::VMULSWSXvvL: |
| 21892 | case VE::VMULSWSXvvL_v: |
| 21893 | case VE::VMULSWSXvv_v: |
| 21894 | case VE::VMULSWSXvvl: |
| 21895 | case VE::VMULSWSXvvl_v: |
| 21896 | case VE::VMULSWZXvv: |
| 21897 | case VE::VMULSWZXvvL: |
| 21898 | case VE::VMULSWZXvvL_v: |
| 21899 | case VE::VMULSWZXvv_v: |
| 21900 | case VE::VMULSWZXvvl: |
| 21901 | case VE::VMULSWZXvvl_v: |
| 21902 | case VE::VMULULvv: |
| 21903 | case VE::VMULULvvL: |
| 21904 | case VE::VMULULvvL_v: |
| 21905 | case VE::VMULULvv_v: |
| 21906 | case VE::VMULULvvl: |
| 21907 | case VE::VMULULvvl_v: |
| 21908 | case VE::VMULUWvv: |
| 21909 | case VE::VMULUWvvL: |
| 21910 | case VE::VMULUWvvL_v: |
| 21911 | case VE::VMULUWvv_v: |
| 21912 | case VE::VMULUWvvl: |
| 21913 | case VE::VMULUWvvl_v: |
| 21914 | case VE::VORvv: |
| 21915 | case VE::VORvvL: |
| 21916 | case VE::VORvvL_v: |
| 21917 | case VE::VORvv_v: |
| 21918 | case VE::VORvvl: |
| 21919 | case VE::VORvvl_v: |
| 21920 | case VE::VSUBSLvv: |
| 21921 | case VE::VSUBSLvvL: |
| 21922 | case VE::VSUBSLvvL_v: |
| 21923 | case VE::VSUBSLvv_v: |
| 21924 | case VE::VSUBSLvvl: |
| 21925 | case VE::VSUBSLvvl_v: |
| 21926 | case VE::VSUBSWSXvv: |
| 21927 | case VE::VSUBSWSXvvL: |
| 21928 | case VE::VSUBSWSXvvL_v: |
| 21929 | case VE::VSUBSWSXvv_v: |
| 21930 | case VE::VSUBSWSXvvl: |
| 21931 | case VE::VSUBSWSXvvl_v: |
| 21932 | case VE::VSUBSWZXvv: |
| 21933 | case VE::VSUBSWZXvvL: |
| 21934 | case VE::VSUBSWZXvvL_v: |
| 21935 | case VE::VSUBSWZXvv_v: |
| 21936 | case VE::VSUBSWZXvvl: |
| 21937 | case VE::VSUBSWZXvvl_v: |
| 21938 | case VE::VSUBULvv: |
| 21939 | case VE::VSUBULvvL: |
| 21940 | case VE::VSUBULvvL_v: |
| 21941 | case VE::VSUBULvv_v: |
| 21942 | case VE::VSUBULvvl: |
| 21943 | case VE::VSUBULvvl_v: |
| 21944 | case VE::VSUBUWvv: |
| 21945 | case VE::VSUBUWvvL: |
| 21946 | case VE::VSUBUWvvL_v: |
| 21947 | case VE::VSUBUWvv_v: |
| 21948 | case VE::VSUBUWvvl: |
| 21949 | case VE::VSUBUWvvl_v: |
| 21950 | case VE::VXORvv: |
| 21951 | case VE::VXORvvL: |
| 21952 | case VE::VXORvvL_v: |
| 21953 | case VE::VXORvv_v: |
| 21954 | case VE::VXORvvl: |
| 21955 | case VE::VXORvvl_v: |
| 21956 | case VE::XORMmm: { |
| 21957 | // op: vx |
| 21958 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 21959 | op &= UINT64_C(255); |
| 21960 | op <<= 24; |
| 21961 | Value |= op; |
| 21962 | // op: vy |
| 21963 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 21964 | op &= UINT64_C(255); |
| 21965 | op <<= 16; |
| 21966 | Value |= op; |
| 21967 | // op: vz |
| 21968 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 21969 | op &= UINT64_C(255); |
| 21970 | op <<= 8; |
| 21971 | Value |= op; |
| 21972 | break; |
| 21973 | } |
| 21974 | case VE::PVFMADLOvvv: |
| 21975 | case VE::PVFMADLOvvvL: |
| 21976 | case VE::PVFMADLOvvvL_v: |
| 21977 | case VE::PVFMADLOvvv_v: |
| 21978 | case VE::PVFMADLOvvvl: |
| 21979 | case VE::PVFMADLOvvvl_v: |
| 21980 | case VE::PVFMADUPvvv: |
| 21981 | case VE::PVFMADUPvvvL: |
| 21982 | case VE::PVFMADUPvvvL_v: |
| 21983 | case VE::PVFMADUPvvv_v: |
| 21984 | case VE::PVFMADUPvvvl: |
| 21985 | case VE::PVFMADUPvvvl_v: |
| 21986 | case VE::PVFMADvvv: |
| 21987 | case VE::PVFMADvvvL: |
| 21988 | case VE::PVFMADvvvL_v: |
| 21989 | case VE::PVFMADvvv_v: |
| 21990 | case VE::PVFMADvvvl: |
| 21991 | case VE::PVFMADvvvl_v: |
| 21992 | case VE::PVFMSBLOvvv: |
| 21993 | case VE::PVFMSBLOvvvL: |
| 21994 | case VE::PVFMSBLOvvvL_v: |
| 21995 | case VE::PVFMSBLOvvv_v: |
| 21996 | case VE::PVFMSBLOvvvl: |
| 21997 | case VE::PVFMSBLOvvvl_v: |
| 21998 | case VE::PVFMSBUPvvv: |
| 21999 | case VE::PVFMSBUPvvvL: |
| 22000 | case VE::PVFMSBUPvvvL_v: |
| 22001 | case VE::PVFMSBUPvvv_v: |
| 22002 | case VE::PVFMSBUPvvvl: |
| 22003 | case VE::PVFMSBUPvvvl_v: |
| 22004 | case VE::PVFMSBvvv: |
| 22005 | case VE::PVFMSBvvvL: |
| 22006 | case VE::PVFMSBvvvL_v: |
| 22007 | case VE::PVFMSBvvv_v: |
| 22008 | case VE::PVFMSBvvvl: |
| 22009 | case VE::PVFMSBvvvl_v: |
| 22010 | case VE::PVFNMADLOvvv: |
| 22011 | case VE::PVFNMADLOvvvL: |
| 22012 | case VE::PVFNMADLOvvvL_v: |
| 22013 | case VE::PVFNMADLOvvv_v: |
| 22014 | case VE::PVFNMADLOvvvl: |
| 22015 | case VE::PVFNMADLOvvvl_v: |
| 22016 | case VE::PVFNMADUPvvv: |
| 22017 | case VE::PVFNMADUPvvvL: |
| 22018 | case VE::PVFNMADUPvvvL_v: |
| 22019 | case VE::PVFNMADUPvvv_v: |
| 22020 | case VE::PVFNMADUPvvvl: |
| 22021 | case VE::PVFNMADUPvvvl_v: |
| 22022 | case VE::PVFNMADvvv: |
| 22023 | case VE::PVFNMADvvvL: |
| 22024 | case VE::PVFNMADvvvL_v: |
| 22025 | case VE::PVFNMADvvv_v: |
| 22026 | case VE::PVFNMADvvvl: |
| 22027 | case VE::PVFNMADvvvl_v: |
| 22028 | case VE::PVFNMSBLOvvv: |
| 22029 | case VE::PVFNMSBLOvvvL: |
| 22030 | case VE::PVFNMSBLOvvvL_v: |
| 22031 | case VE::PVFNMSBLOvvv_v: |
| 22032 | case VE::PVFNMSBLOvvvl: |
| 22033 | case VE::PVFNMSBLOvvvl_v: |
| 22034 | case VE::PVFNMSBUPvvv: |
| 22035 | case VE::PVFNMSBUPvvvL: |
| 22036 | case VE::PVFNMSBUPvvvL_v: |
| 22037 | case VE::PVFNMSBUPvvv_v: |
| 22038 | case VE::PVFNMSBUPvvvl: |
| 22039 | case VE::PVFNMSBUPvvvl_v: |
| 22040 | case VE::PVFNMSBvvv: |
| 22041 | case VE::PVFNMSBvvvL: |
| 22042 | case VE::PVFNMSBvvvL_v: |
| 22043 | case VE::PVFNMSBvvv_v: |
| 22044 | case VE::PVFNMSBvvvl: |
| 22045 | case VE::PVFNMSBvvvl_v: |
| 22046 | case VE::VFMADDvvv: |
| 22047 | case VE::VFMADDvvvL: |
| 22048 | case VE::VFMADDvvvL_v: |
| 22049 | case VE::VFMADDvvv_v: |
| 22050 | case VE::VFMADDvvvl: |
| 22051 | case VE::VFMADDvvvl_v: |
| 22052 | case VE::VFMADSvvv: |
| 22053 | case VE::VFMADSvvvL: |
| 22054 | case VE::VFMADSvvvL_v: |
| 22055 | case VE::VFMADSvvv_v: |
| 22056 | case VE::VFMADSvvvl: |
| 22057 | case VE::VFMADSvvvl_v: |
| 22058 | case VE::VFMSBDvvv: |
| 22059 | case VE::VFMSBDvvvL: |
| 22060 | case VE::VFMSBDvvvL_v: |
| 22061 | case VE::VFMSBDvvv_v: |
| 22062 | case VE::VFMSBDvvvl: |
| 22063 | case VE::VFMSBDvvvl_v: |
| 22064 | case VE::VFMSBSvvv: |
| 22065 | case VE::VFMSBSvvvL: |
| 22066 | case VE::VFMSBSvvvL_v: |
| 22067 | case VE::VFMSBSvvv_v: |
| 22068 | case VE::VFMSBSvvvl: |
| 22069 | case VE::VFMSBSvvvl_v: |
| 22070 | case VE::VFNMADDvvv: |
| 22071 | case VE::VFNMADDvvvL: |
| 22072 | case VE::VFNMADDvvvL_v: |
| 22073 | case VE::VFNMADDvvv_v: |
| 22074 | case VE::VFNMADDvvvl: |
| 22075 | case VE::VFNMADDvvvl_v: |
| 22076 | case VE::VFNMADSvvv: |
| 22077 | case VE::VFNMADSvvvL: |
| 22078 | case VE::VFNMADSvvvL_v: |
| 22079 | case VE::VFNMADSvvv_v: |
| 22080 | case VE::VFNMADSvvvl: |
| 22081 | case VE::VFNMADSvvvl_v: |
| 22082 | case VE::VFNMSBDvvv: |
| 22083 | case VE::VFNMSBDvvvL: |
| 22084 | case VE::VFNMSBDvvvL_v: |
| 22085 | case VE::VFNMSBDvvv_v: |
| 22086 | case VE::VFNMSBDvvvl: |
| 22087 | case VE::VFNMSBDvvvl_v: |
| 22088 | case VE::VFNMSBSvvv: |
| 22089 | case VE::VFNMSBSvvvL: |
| 22090 | case VE::VFNMSBSvvvL_v: |
| 22091 | case VE::VFNMSBSvvv_v: |
| 22092 | case VE::VFNMSBSvvvl: |
| 22093 | case VE::VFNMSBSvvvl_v: { |
| 22094 | // op: vx |
| 22095 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 22096 | op &= UINT64_C(255); |
| 22097 | op <<= 24; |
| 22098 | Value |= op; |
| 22099 | // op: vy |
| 22100 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 22101 | op &= UINT64_C(255); |
| 22102 | op <<= 16; |
| 22103 | Value |= op; |
| 22104 | // op: vz |
| 22105 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 22106 | op &= UINT64_C(255); |
| 22107 | op <<= 8; |
| 22108 | Value |= op; |
| 22109 | // op: vw |
| 22110 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
| 22111 | op &= UINT64_C(255); |
| 22112 | Value |= op; |
| 22113 | break; |
| 22114 | } |
| 22115 | case VE::PVSLALOvv: |
| 22116 | case VE::PVSLALOvvL: |
| 22117 | case VE::PVSLALOvvL_v: |
| 22118 | case VE::PVSLALOvv_v: |
| 22119 | case VE::PVSLALOvvl: |
| 22120 | case VE::PVSLALOvvl_v: |
| 22121 | case VE::PVSLAUPvv: |
| 22122 | case VE::PVSLAUPvvL: |
| 22123 | case VE::PVSLAUPvvL_v: |
| 22124 | case VE::PVSLAUPvv_v: |
| 22125 | case VE::PVSLAUPvvl: |
| 22126 | case VE::PVSLAUPvvl_v: |
| 22127 | case VE::PVSLAvv: |
| 22128 | case VE::PVSLAvvL: |
| 22129 | case VE::PVSLAvvL_v: |
| 22130 | case VE::PVSLAvv_v: |
| 22131 | case VE::PVSLAvvl: |
| 22132 | case VE::PVSLAvvl_v: |
| 22133 | case VE::PVSLLLOvv: |
| 22134 | case VE::PVSLLLOvvL: |
| 22135 | case VE::PVSLLLOvvL_v: |
| 22136 | case VE::PVSLLLOvv_v: |
| 22137 | case VE::PVSLLLOvvl: |
| 22138 | case VE::PVSLLLOvvl_v: |
| 22139 | case VE::PVSLLUPvv: |
| 22140 | case VE::PVSLLUPvvL: |
| 22141 | case VE::PVSLLUPvvL_v: |
| 22142 | case VE::PVSLLUPvv_v: |
| 22143 | case VE::PVSLLUPvvl: |
| 22144 | case VE::PVSLLUPvvl_v: |
| 22145 | case VE::PVSLLvv: |
| 22146 | case VE::PVSLLvvL: |
| 22147 | case VE::PVSLLvvL_v: |
| 22148 | case VE::PVSLLvv_v: |
| 22149 | case VE::PVSLLvvl: |
| 22150 | case VE::PVSLLvvl_v: |
| 22151 | case VE::PVSRALOvv: |
| 22152 | case VE::PVSRALOvvL: |
| 22153 | case VE::PVSRALOvvL_v: |
| 22154 | case VE::PVSRALOvv_v: |
| 22155 | case VE::PVSRALOvvl: |
| 22156 | case VE::PVSRALOvvl_v: |
| 22157 | case VE::PVSRAUPvv: |
| 22158 | case VE::PVSRAUPvvL: |
| 22159 | case VE::PVSRAUPvvL_v: |
| 22160 | case VE::PVSRAUPvv_v: |
| 22161 | case VE::PVSRAUPvvl: |
| 22162 | case VE::PVSRAUPvvl_v: |
| 22163 | case VE::PVSRAvv: |
| 22164 | case VE::PVSRAvvL: |
| 22165 | case VE::PVSRAvvL_v: |
| 22166 | case VE::PVSRAvv_v: |
| 22167 | case VE::PVSRAvvl: |
| 22168 | case VE::PVSRAvvl_v: |
| 22169 | case VE::PVSRLLOvv: |
| 22170 | case VE::PVSRLLOvvL: |
| 22171 | case VE::PVSRLLOvvL_v: |
| 22172 | case VE::PVSRLLOvv_v: |
| 22173 | case VE::PVSRLLOvvl: |
| 22174 | case VE::PVSRLLOvvl_v: |
| 22175 | case VE::PVSRLUPvv: |
| 22176 | case VE::PVSRLUPvvL: |
| 22177 | case VE::PVSRLUPvvL_v: |
| 22178 | case VE::PVSRLUPvv_v: |
| 22179 | case VE::PVSRLUPvvl: |
| 22180 | case VE::PVSRLUPvvl_v: |
| 22181 | case VE::PVSRLvv: |
| 22182 | case VE::PVSRLvvL: |
| 22183 | case VE::PVSRLvvL_v: |
| 22184 | case VE::PVSRLvv_v: |
| 22185 | case VE::PVSRLvvl: |
| 22186 | case VE::PVSRLvvl_v: |
| 22187 | case VE::VSLALvv: |
| 22188 | case VE::VSLALvvL: |
| 22189 | case VE::VSLALvvL_v: |
| 22190 | case VE::VSLALvv_v: |
| 22191 | case VE::VSLALvvl: |
| 22192 | case VE::VSLALvvl_v: |
| 22193 | case VE::VSLAWSXvv: |
| 22194 | case VE::VSLAWSXvvL: |
| 22195 | case VE::VSLAWSXvvL_v: |
| 22196 | case VE::VSLAWSXvv_v: |
| 22197 | case VE::VSLAWSXvvl: |
| 22198 | case VE::VSLAWSXvvl_v: |
| 22199 | case VE::VSLAWZXvv: |
| 22200 | case VE::VSLAWZXvvL: |
| 22201 | case VE::VSLAWZXvvL_v: |
| 22202 | case VE::VSLAWZXvv_v: |
| 22203 | case VE::VSLAWZXvvl: |
| 22204 | case VE::VSLAWZXvvl_v: |
| 22205 | case VE::VSLLvv: |
| 22206 | case VE::VSLLvvL: |
| 22207 | case VE::VSLLvvL_v: |
| 22208 | case VE::VSLLvv_v: |
| 22209 | case VE::VSLLvvl: |
| 22210 | case VE::VSLLvvl_v: |
| 22211 | case VE::VSRALvv: |
| 22212 | case VE::VSRALvvL: |
| 22213 | case VE::VSRALvvL_v: |
| 22214 | case VE::VSRALvv_v: |
| 22215 | case VE::VSRALvvl: |
| 22216 | case VE::VSRALvvl_v: |
| 22217 | case VE::VSRAWSXvv: |
| 22218 | case VE::VSRAWSXvvL: |
| 22219 | case VE::VSRAWSXvvL_v: |
| 22220 | case VE::VSRAWSXvv_v: |
| 22221 | case VE::VSRAWSXvvl: |
| 22222 | case VE::VSRAWSXvvl_v: |
| 22223 | case VE::VSRAWZXvv: |
| 22224 | case VE::VSRAWZXvvL: |
| 22225 | case VE::VSRAWZXvvL_v: |
| 22226 | case VE::VSRAWZXvv_v: |
| 22227 | case VE::VSRAWZXvvl: |
| 22228 | case VE::VSRAWZXvvl_v: |
| 22229 | case VE::VSRLvv: |
| 22230 | case VE::VSRLvvL: |
| 22231 | case VE::VSRLvvL_v: |
| 22232 | case VE::VSRLvv_v: |
| 22233 | case VE::VSRLvvl: |
| 22234 | case VE::VSRLvvl_v: { |
| 22235 | // op: vx |
| 22236 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 22237 | op &= UINT64_C(255); |
| 22238 | op <<= 24; |
| 22239 | Value |= op; |
| 22240 | // op: vy |
| 22241 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 22242 | op &= UINT64_C(255); |
| 22243 | op <<= 16; |
| 22244 | Value |= op; |
| 22245 | // op: vz |
| 22246 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 22247 | op &= UINT64_C(255); |
| 22248 | op <<= 8; |
| 22249 | Value |= op; |
| 22250 | break; |
| 22251 | } |
| 22252 | case VE::PVCVTWSLOv: |
| 22253 | case VE::PVCVTWSLOvL: |
| 22254 | case VE::PVCVTWSLOvL_v: |
| 22255 | case VE::PVCVTWSLOv_v: |
| 22256 | case VE::PVCVTWSLOvl: |
| 22257 | case VE::PVCVTWSLOvl_v: |
| 22258 | case VE::PVCVTWSUPv: |
| 22259 | case VE::PVCVTWSUPvL: |
| 22260 | case VE::PVCVTWSUPvL_v: |
| 22261 | case VE::PVCVTWSUPv_v: |
| 22262 | case VE::PVCVTWSUPvl: |
| 22263 | case VE::PVCVTWSUPvl_v: |
| 22264 | case VE::PVCVTWSv: |
| 22265 | case VE::PVCVTWSvL: |
| 22266 | case VE::PVCVTWSvL_v: |
| 22267 | case VE::PVCVTWSv_v: |
| 22268 | case VE::PVCVTWSvl: |
| 22269 | case VE::PVCVTWSvl_v: |
| 22270 | case VE::VCVTLDv: |
| 22271 | case VE::VCVTLDvL: |
| 22272 | case VE::VCVTLDvL_v: |
| 22273 | case VE::VCVTLDv_v: |
| 22274 | case VE::VCVTLDvl: |
| 22275 | case VE::VCVTLDvl_v: |
| 22276 | case VE::VCVTWDSXv: |
| 22277 | case VE::VCVTWDSXvL: |
| 22278 | case VE::VCVTWDSXvL_v: |
| 22279 | case VE::VCVTWDSXv_v: |
| 22280 | case VE::VCVTWDSXvl: |
| 22281 | case VE::VCVTWDSXvl_v: |
| 22282 | case VE::VCVTWDZXv: |
| 22283 | case VE::VCVTWDZXvL: |
| 22284 | case VE::VCVTWDZXvL_v: |
| 22285 | case VE::VCVTWDZXv_v: |
| 22286 | case VE::VCVTWDZXvl: |
| 22287 | case VE::VCVTWDZXvl_v: |
| 22288 | case VE::VCVTWSSXv: |
| 22289 | case VE::VCVTWSSXvL: |
| 22290 | case VE::VCVTWSSXvL_v: |
| 22291 | case VE::VCVTWSSXv_v: |
| 22292 | case VE::VCVTWSSXvl: |
| 22293 | case VE::VCVTWSSXvl_v: |
| 22294 | case VE::VCVTWSZXv: |
| 22295 | case VE::VCVTWSZXvL: |
| 22296 | case VE::VCVTWSZXvL_v: |
| 22297 | case VE::VCVTWSZXv_v: |
| 22298 | case VE::VCVTWSZXvl: |
| 22299 | case VE::VCVTWSZXvl_v: { |
| 22300 | // op: vx |
| 22301 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 22302 | op &= UINT64_C(255); |
| 22303 | op <<= 24; |
| 22304 | Value |= op; |
| 22305 | // op: vy |
| 22306 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
| 22307 | op &= UINT64_C(255); |
| 22308 | op <<= 16; |
| 22309 | Value |= op; |
| 22310 | // op: vz |
| 22311 | op = getRDOpValue(MI, OpNo: 1, Fixups, STI); |
| 22312 | op &= UINT64_C(255); |
| 22313 | op <<= 8; |
| 22314 | Value |= op; |
| 22315 | break; |
| 22316 | } |
| 22317 | case VE::PVBRVLOv: |
| 22318 | case VE::PVBRVLOvL: |
| 22319 | case VE::PVBRVLOvL_v: |
| 22320 | case VE::PVBRVLOv_v: |
| 22321 | case VE::PVBRVLOvl: |
| 22322 | case VE::PVBRVLOvl_v: |
| 22323 | case VE::PVBRVUPv: |
| 22324 | case VE::PVBRVUPvL: |
| 22325 | case VE::PVBRVUPvL_v: |
| 22326 | case VE::PVBRVUPv_v: |
| 22327 | case VE::PVBRVUPvl: |
| 22328 | case VE::PVBRVUPvl_v: |
| 22329 | case VE::PVBRVv: |
| 22330 | case VE::PVBRVvL: |
| 22331 | case VE::PVBRVvL_v: |
| 22332 | case VE::PVBRVv_v: |
| 22333 | case VE::PVBRVvl: |
| 22334 | case VE::PVBRVvl_v: |
| 22335 | case VE::PVLDZLOv: |
| 22336 | case VE::PVLDZLOvL: |
| 22337 | case VE::PVLDZLOvL_v: |
| 22338 | case VE::PVLDZLOv_v: |
| 22339 | case VE::PVLDZLOvl: |
| 22340 | case VE::PVLDZLOvl_v: |
| 22341 | case VE::PVLDZUPv: |
| 22342 | case VE::PVLDZUPvL: |
| 22343 | case VE::PVLDZUPvL_v: |
| 22344 | case VE::PVLDZUPv_v: |
| 22345 | case VE::PVLDZUPvl: |
| 22346 | case VE::PVLDZUPvl_v: |
| 22347 | case VE::PVLDZv: |
| 22348 | case VE::PVLDZvL: |
| 22349 | case VE::PVLDZvL_v: |
| 22350 | case VE::PVLDZv_v: |
| 22351 | case VE::PVLDZvl: |
| 22352 | case VE::PVLDZvl_v: |
| 22353 | case VE::PVPCNTLOv: |
| 22354 | case VE::PVPCNTLOvL: |
| 22355 | case VE::PVPCNTLOvL_v: |
| 22356 | case VE::PVPCNTLOv_v: |
| 22357 | case VE::PVPCNTLOvl: |
| 22358 | case VE::PVPCNTLOvl_v: |
| 22359 | case VE::PVPCNTUPv: |
| 22360 | case VE::PVPCNTUPvL: |
| 22361 | case VE::PVPCNTUPvL_v: |
| 22362 | case VE::PVPCNTUPv_v: |
| 22363 | case VE::PVPCNTUPvl: |
| 22364 | case VE::PVPCNTUPvl_v: |
| 22365 | case VE::PVPCNTv: |
| 22366 | case VE::PVPCNTvL: |
| 22367 | case VE::PVPCNTvL_v: |
| 22368 | case VE::PVPCNTv_v: |
| 22369 | case VE::PVPCNTvl: |
| 22370 | case VE::PVPCNTvl_v: |
| 22371 | case VE::VBRVv: |
| 22372 | case VE::VBRVvL: |
| 22373 | case VE::VBRVvL_v: |
| 22374 | case VE::VBRVv_v: |
| 22375 | case VE::VBRVvl: |
| 22376 | case VE::VBRVvl_v: |
| 22377 | case VE::VCPv: |
| 22378 | case VE::VCPvL: |
| 22379 | case VE::VCPvL_v: |
| 22380 | case VE::VCPv_v: |
| 22381 | case VE::VCPvl: |
| 22382 | case VE::VCPvl_v: |
| 22383 | case VE::VEXv: |
| 22384 | case VE::VEXvL: |
| 22385 | case VE::VEXvL_v: |
| 22386 | case VE::VEXv_v: |
| 22387 | case VE::VEXvl: |
| 22388 | case VE::VEXvl_v: |
| 22389 | case VE::VLDZv: |
| 22390 | case VE::VLDZvL: |
| 22391 | case VE::VLDZvL_v: |
| 22392 | case VE::VLDZv_v: |
| 22393 | case VE::VLDZvl: |
| 22394 | case VE::VLDZvl_v: |
| 22395 | case VE::VPCNTv: |
| 22396 | case VE::VPCNTvL: |
| 22397 | case VE::VPCNTvL_v: |
| 22398 | case VE::VPCNTv_v: |
| 22399 | case VE::VPCNTvl: |
| 22400 | case VE::VPCNTvl_v: { |
| 22401 | // op: vx |
| 22402 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 22403 | op &= UINT64_C(255); |
| 22404 | op <<= 24; |
| 22405 | Value |= op; |
| 22406 | // op: vz |
| 22407 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 22408 | op &= UINT64_C(255); |
| 22409 | op <<= 8; |
| 22410 | Value |= op; |
| 22411 | break; |
| 22412 | } |
| 22413 | case VE::LZVMm: |
| 22414 | case VE::LZVMmL: |
| 22415 | case VE::LZVMml: |
| 22416 | case VE::PCVMm: |
| 22417 | case VE::PCVMmL: |
| 22418 | case VE::PCVMml: |
| 22419 | case VE::TOVMm: |
| 22420 | case VE::TOVMmL: |
| 22421 | case VE::TOVMml: { |
| 22422 | // op: vy |
| 22423 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
| 22424 | op &= UINT64_C(255); |
| 22425 | op <<= 16; |
| 22426 | Value |= op; |
| 22427 | // op: sx |
| 22428 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
| 22429 | op &= UINT64_C(127); |
| 22430 | op <<= 48; |
| 22431 | Value |= op; |
| 22432 | break; |
| 22433 | } |
| 22434 | default: |
| 22435 | std::string msg; |
| 22436 | raw_string_ostream Msg(msg); |
| 22437 | Msg << "Not supported instr: "<< MI; |
| 22438 | report_fatal_error(reason: Msg.str().c_str()); |
| 22439 | } |
| 22440 | return Value; |
| 22441 | } |
| 22442 | |
| 22443 | #ifdef GET_OPERAND_BIT_OFFSET |
| 22444 | #undef GET_OPERAND_BIT_OFFSET |
| 22445 | |
| 22446 | uint32_t VEMCCodeEmitter::getOperandBitOffset(const MCInst &MI, |
| 22447 | unsigned OpNum, |
| 22448 | const MCSubtargetInfo &STI) const { |
| 22449 | switch (MI.getOpcode()) { |
| 22450 | case VE::FENCEI: |
| 22451 | case VE::MONC: |
| 22452 | case VE::MONCHDB: |
| 22453 | case VE::NOP: |
| 22454 | case VE::RET: |
| 22455 | case VE::SVOB: { |
| 22456 | break; |
| 22457 | } |
| 22458 | case VE::BCFDiri: |
| 22459 | case VE::BCFDiri_nt: |
| 22460 | case VE::BCFDiri_t: |
| 22461 | case VE::BCFDizi: |
| 22462 | case VE::BCFDizi_nt: |
| 22463 | case VE::BCFDizi_t: |
| 22464 | case VE::BCFDrri: |
| 22465 | case VE::BCFDrri_nt: |
| 22466 | case VE::BCFDrri_t: |
| 22467 | case VE::BCFDrzi: |
| 22468 | case VE::BCFDrzi_nt: |
| 22469 | case VE::BCFDrzi_t: |
| 22470 | case VE::BCFLiri: |
| 22471 | case VE::BCFLiri_nt: |
| 22472 | case VE::BCFLiri_t: |
| 22473 | case VE::BCFLizi: |
| 22474 | case VE::BCFLizi_nt: |
| 22475 | case VE::BCFLizi_t: |
| 22476 | case VE::BCFLrri: |
| 22477 | case VE::BCFLrri_nt: |
| 22478 | case VE::BCFLrri_t: |
| 22479 | case VE::BCFLrzi: |
| 22480 | case VE::BCFLrzi_nt: |
| 22481 | case VE::BCFLrzi_t: |
| 22482 | case VE::BCFSiri: |
| 22483 | case VE::BCFSiri_nt: |
| 22484 | case VE::BCFSiri_t: |
| 22485 | case VE::BCFSizi: |
| 22486 | case VE::BCFSizi_nt: |
| 22487 | case VE::BCFSizi_t: |
| 22488 | case VE::BCFSrri: |
| 22489 | case VE::BCFSrri_nt: |
| 22490 | case VE::BCFSrri_t: |
| 22491 | case VE::BCFSrzi: |
| 22492 | case VE::BCFSrzi_nt: |
| 22493 | case VE::BCFSrzi_t: |
| 22494 | case VE::BCFWiri: |
| 22495 | case VE::BCFWiri_nt: |
| 22496 | case VE::BCFWiri_t: |
| 22497 | case VE::BCFWizi: |
| 22498 | case VE::BCFWizi_nt: |
| 22499 | case VE::BCFWizi_t: |
| 22500 | case VE::BCFWrri: |
| 22501 | case VE::BCFWrri_nt: |
| 22502 | case VE::BCFWrri_t: |
| 22503 | case VE::BCFWrzi: |
| 22504 | case VE::BCFWrzi_nt: |
| 22505 | case VE::BCFWrzi_t: |
| 22506 | case VE::BRCFDir: |
| 22507 | case VE::BRCFDir_nt: |
| 22508 | case VE::BRCFDir_t: |
| 22509 | case VE::BRCFDiz: |
| 22510 | case VE::BRCFDiz_nt: |
| 22511 | case VE::BRCFDiz_t: |
| 22512 | case VE::BRCFDrr: |
| 22513 | case VE::BRCFDrr_nt: |
| 22514 | case VE::BRCFDrr_t: |
| 22515 | case VE::BRCFDrz: |
| 22516 | case VE::BRCFDrz_nt: |
| 22517 | case VE::BRCFDrz_t: |
| 22518 | case VE::BRCFLir: |
| 22519 | case VE::BRCFLir_nt: |
| 22520 | case VE::BRCFLir_t: |
| 22521 | case VE::BRCFLiz: |
| 22522 | case VE::BRCFLiz_nt: |
| 22523 | case VE::BRCFLiz_t: |
| 22524 | case VE::BRCFLrr: |
| 22525 | case VE::BRCFLrr_nt: |
| 22526 | case VE::BRCFLrr_t: |
| 22527 | case VE::BRCFLrz: |
| 22528 | case VE::BRCFLrz_nt: |
| 22529 | case VE::BRCFLrz_t: |
| 22530 | case VE::BRCFSir: |
| 22531 | case VE::BRCFSir_nt: |
| 22532 | case VE::BRCFSir_t: |
| 22533 | case VE::BRCFSiz: |
| 22534 | case VE::BRCFSiz_nt: |
| 22535 | case VE::BRCFSiz_t: |
| 22536 | case VE::BRCFSrr: |
| 22537 | case VE::BRCFSrr_nt: |
| 22538 | case VE::BRCFSrr_t: |
| 22539 | case VE::BRCFSrz: |
| 22540 | case VE::BRCFSrz_nt: |
| 22541 | case VE::BRCFSrz_t: |
| 22542 | case VE::BRCFWir: |
| 22543 | case VE::BRCFWir_nt: |
| 22544 | case VE::BRCFWir_t: |
| 22545 | case VE::BRCFWiz: |
| 22546 | case VE::BRCFWiz_nt: |
| 22547 | case VE::BRCFWiz_t: |
| 22548 | case VE::BRCFWrr: |
| 22549 | case VE::BRCFWrr_nt: |
| 22550 | case VE::BRCFWrr_t: |
| 22551 | case VE::BRCFWrz: |
| 22552 | case VE::BRCFWrz_nt: |
| 22553 | case VE::BRCFWrz_t: { |
| 22554 | switch (OpNum) { |
| 22555 | case 0: |
| 22556 | // op: cond |
| 22557 | return 48; |
| 22558 | case 1: |
| 22559 | // op: sy |
| 22560 | return 40; |
| 22561 | case 2: |
| 22562 | // op: sz |
| 22563 | return 32; |
| 22564 | case 3: |
| 22565 | // op: imm32 |
| 22566 | return 0; |
| 22567 | } |
| 22568 | break; |
| 22569 | } |
| 22570 | case VE::BRCFDa: |
| 22571 | case VE::BRCFDa_nt: |
| 22572 | case VE::BRCFDa_t: |
| 22573 | case VE::BRCFDna: |
| 22574 | case VE::BRCFDna_nt: |
| 22575 | case VE::BRCFDna_t: |
| 22576 | case VE::BRCFLa: |
| 22577 | case VE::BRCFLa_nt: |
| 22578 | case VE::BRCFLa_t: |
| 22579 | case VE::BRCFLna: |
| 22580 | case VE::BRCFLna_nt: |
| 22581 | case VE::BRCFLna_t: |
| 22582 | case VE::BRCFSa: |
| 22583 | case VE::BRCFSa_nt: |
| 22584 | case VE::BRCFSa_t: |
| 22585 | case VE::BRCFSna: |
| 22586 | case VE::BRCFSna_nt: |
| 22587 | case VE::BRCFSna_t: |
| 22588 | case VE::BRCFWa: |
| 22589 | case VE::BRCFWa_nt: |
| 22590 | case VE::BRCFWa_t: |
| 22591 | case VE::BRCFWna: |
| 22592 | case VE::BRCFWna_nt: |
| 22593 | case VE::BRCFWna_t: { |
| 22594 | switch (OpNum) { |
| 22595 | case 0: |
| 22596 | // op: imm32 |
| 22597 | return 0; |
| 22598 | } |
| 22599 | break; |
| 22600 | } |
| 22601 | case VE::FENCEC: { |
| 22602 | switch (OpNum) { |
| 22603 | case 0: |
| 22604 | // op: kind |
| 22605 | return 40; |
| 22606 | } |
| 22607 | break; |
| 22608 | } |
| 22609 | case VE::FENCEM: { |
| 22610 | switch (OpNum) { |
| 22611 | case 0: |
| 22612 | // op: kind |
| 22613 | return 48; |
| 22614 | } |
| 22615 | break; |
| 22616 | } |
| 22617 | case VE::ADDSLim: |
| 22618 | case VE::ADDSLrm: |
| 22619 | case VE::ADDSLrr: |
| 22620 | case VE::ADDSWSXim: |
| 22621 | case VE::ADDSWSXrm: |
| 22622 | case VE::ADDSWSXrr: |
| 22623 | case VE::ADDSWZXim: |
| 22624 | case VE::ADDSWZXrm: |
| 22625 | case VE::ADDSWZXrr: |
| 22626 | case VE::ADDULim: |
| 22627 | case VE::ADDULrm: |
| 22628 | case VE::ADDULrr: |
| 22629 | case VE::ADDUWim: |
| 22630 | case VE::ADDUWrm: |
| 22631 | case VE::ADDUWrr: |
| 22632 | case VE::ANDim: |
| 22633 | case VE::ANDrm: |
| 22634 | case VE::ANDrr: |
| 22635 | case VE::CMPSLim: |
| 22636 | case VE::CMPSLir: |
| 22637 | case VE::CMPSLrm: |
| 22638 | case VE::CMPSLrr: |
| 22639 | case VE::CMPSWSXim: |
| 22640 | case VE::CMPSWSXir: |
| 22641 | case VE::CMPSWSXrm: |
| 22642 | case VE::CMPSWSXrr: |
| 22643 | case VE::CMPSWZXim: |
| 22644 | case VE::CMPSWZXir: |
| 22645 | case VE::CMPSWZXrm: |
| 22646 | case VE::CMPSWZXrr: |
| 22647 | case VE::CMPULim: |
| 22648 | case VE::CMPULir: |
| 22649 | case VE::CMPULrm: |
| 22650 | case VE::CMPULrr: |
| 22651 | case VE::CMPUWim: |
| 22652 | case VE::CMPUWir: |
| 22653 | case VE::CMPUWrm: |
| 22654 | case VE::CMPUWrr: |
| 22655 | case VE::DIVSLim: |
| 22656 | case VE::DIVSLir: |
| 22657 | case VE::DIVSLrm: |
| 22658 | case VE::DIVSLrr: |
| 22659 | case VE::DIVSWSXim: |
| 22660 | case VE::DIVSWSXir: |
| 22661 | case VE::DIVSWSXrm: |
| 22662 | case VE::DIVSWSXrr: |
| 22663 | case VE::DIVSWZXim: |
| 22664 | case VE::DIVSWZXir: |
| 22665 | case VE::DIVSWZXrm: |
| 22666 | case VE::DIVSWZXrr: |
| 22667 | case VE::DIVULim: |
| 22668 | case VE::DIVULir: |
| 22669 | case VE::DIVULrm: |
| 22670 | case VE::DIVULrr: |
| 22671 | case VE::DIVUWim: |
| 22672 | case VE::DIVUWir: |
| 22673 | case VE::DIVUWrm: |
| 22674 | case VE::DIVUWrr: |
| 22675 | case VE::EQVim: |
| 22676 | case VE::EQVrm: |
| 22677 | case VE::EQVrr: |
| 22678 | case VE::FADDDim: |
| 22679 | case VE::FADDDir: |
| 22680 | case VE::FADDDrm: |
| 22681 | case VE::FADDDrr: |
| 22682 | case VE::FADDQim: |
| 22683 | case VE::FADDQir: |
| 22684 | case VE::FADDQrm: |
| 22685 | case VE::FADDQrr: |
| 22686 | case VE::FADDSim: |
| 22687 | case VE::FADDSir: |
| 22688 | case VE::FADDSrm: |
| 22689 | case VE::FADDSrr: |
| 22690 | case VE::FCMPDim: |
| 22691 | case VE::FCMPDir: |
| 22692 | case VE::FCMPDrm: |
| 22693 | case VE::FCMPDrr: |
| 22694 | case VE::FCMPQim: |
| 22695 | case VE::FCMPQir: |
| 22696 | case VE::FCMPQrm: |
| 22697 | case VE::FCMPQrr: |
| 22698 | case VE::FCMPSim: |
| 22699 | case VE::FCMPSir: |
| 22700 | case VE::FCMPSrm: |
| 22701 | case VE::FCMPSrr: |
| 22702 | case VE::FDIVDim: |
| 22703 | case VE::FDIVDir: |
| 22704 | case VE::FDIVDrm: |
| 22705 | case VE::FDIVDrr: |
| 22706 | case VE::FDIVSim: |
| 22707 | case VE::FDIVSir: |
| 22708 | case VE::FDIVSrm: |
| 22709 | case VE::FDIVSrr: |
| 22710 | case VE::FIDCRii: |
| 22711 | case VE::FIDCRri: |
| 22712 | case VE::FMAXDim: |
| 22713 | case VE::FMAXDir: |
| 22714 | case VE::FMAXDrm: |
| 22715 | case VE::FMAXDrr: |
| 22716 | case VE::FMAXSim: |
| 22717 | case VE::FMAXSir: |
| 22718 | case VE::FMAXSrm: |
| 22719 | case VE::FMAXSrr: |
| 22720 | case VE::FMINDim: |
| 22721 | case VE::FMINDir: |
| 22722 | case VE::FMINDrm: |
| 22723 | case VE::FMINDrr: |
| 22724 | case VE::FMINSim: |
| 22725 | case VE::FMINSir: |
| 22726 | case VE::FMINSrm: |
| 22727 | case VE::FMINSrr: |
| 22728 | case VE::FMULDim: |
| 22729 | case VE::FMULDir: |
| 22730 | case VE::FMULDrm: |
| 22731 | case VE::FMULDrr: |
| 22732 | case VE::FMULQim: |
| 22733 | case VE::FMULQir: |
| 22734 | case VE::FMULQrm: |
| 22735 | case VE::FMULQrr: |
| 22736 | case VE::FMULSim: |
| 22737 | case VE::FMULSir: |
| 22738 | case VE::FMULSrm: |
| 22739 | case VE::FMULSrr: |
| 22740 | case VE::FSUBDim: |
| 22741 | case VE::FSUBDir: |
| 22742 | case VE::FSUBDrm: |
| 22743 | case VE::FSUBDrr: |
| 22744 | case VE::FSUBQim: |
| 22745 | case VE::FSUBQir: |
| 22746 | case VE::FSUBQrm: |
| 22747 | case VE::FSUBQrr: |
| 22748 | case VE::FSUBSim: |
| 22749 | case VE::FSUBSir: |
| 22750 | case VE::FSUBSrm: |
| 22751 | case VE::FSUBSrr: |
| 22752 | case VE::LCRir: |
| 22753 | case VE::LCRiz: |
| 22754 | case VE::LCRrr: |
| 22755 | case VE::LCRrz: |
| 22756 | case VE::MAXSLim: |
| 22757 | case VE::MAXSLrm: |
| 22758 | case VE::MAXSLrr: |
| 22759 | case VE::MAXSWSXim: |
| 22760 | case VE::MAXSWSXrm: |
| 22761 | case VE::MAXSWSXrr: |
| 22762 | case VE::MAXSWZXim: |
| 22763 | case VE::MAXSWZXrm: |
| 22764 | case VE::MAXSWZXrr: |
| 22765 | case VE::MINSLim: |
| 22766 | case VE::MINSLrm: |
| 22767 | case VE::MINSLrr: |
| 22768 | case VE::MINSWSXim: |
| 22769 | case VE::MINSWSXrm: |
| 22770 | case VE::MINSWSXrr: |
| 22771 | case VE::MINSWZXim: |
| 22772 | case VE::MINSWZXrm: |
| 22773 | case VE::MINSWZXrr: |
| 22774 | case VE::MRGim: |
| 22775 | case VE::MRGir: |
| 22776 | case VE::MRGrm: |
| 22777 | case VE::MRGrr: |
| 22778 | case VE::MULSLWim: |
| 22779 | case VE::MULSLWrm: |
| 22780 | case VE::MULSLWrr: |
| 22781 | case VE::MULSLim: |
| 22782 | case VE::MULSLrm: |
| 22783 | case VE::MULSLrr: |
| 22784 | case VE::MULSWSXim: |
| 22785 | case VE::MULSWSXrm: |
| 22786 | case VE::MULSWSXrr: |
| 22787 | case VE::MULSWZXim: |
| 22788 | case VE::MULSWZXrm: |
| 22789 | case VE::MULSWZXrr: |
| 22790 | case VE::MULULim: |
| 22791 | case VE::MULULrm: |
| 22792 | case VE::MULULrr: |
| 22793 | case VE::MULUWim: |
| 22794 | case VE::MULUWrm: |
| 22795 | case VE::MULUWrr: |
| 22796 | case VE::NNDim: |
| 22797 | case VE::NNDir: |
| 22798 | case VE::NNDrm: |
| 22799 | case VE::NNDrr: |
| 22800 | case VE::ORim: |
| 22801 | case VE::ORrm: |
| 22802 | case VE::ORrr: |
| 22803 | case VE::SUBSLim: |
| 22804 | case VE::SUBSLir: |
| 22805 | case VE::SUBSLrm: |
| 22806 | case VE::SUBSLrr: |
| 22807 | case VE::SUBSWSXim: |
| 22808 | case VE::SUBSWSXir: |
| 22809 | case VE::SUBSWSXrm: |
| 22810 | case VE::SUBSWSXrr: |
| 22811 | case VE::SUBSWZXim: |
| 22812 | case VE::SUBSWZXir: |
| 22813 | case VE::SUBSWZXrm: |
| 22814 | case VE::SUBSWZXrr: |
| 22815 | case VE::SUBULim: |
| 22816 | case VE::SUBULir: |
| 22817 | case VE::SUBULrm: |
| 22818 | case VE::SUBULrr: |
| 22819 | case VE::SUBUWim: |
| 22820 | case VE::SUBUWir: |
| 22821 | case VE::SUBUWrm: |
| 22822 | case VE::SUBUWrr: |
| 22823 | case VE::TSCRirr: |
| 22824 | case VE::TSCRizr: |
| 22825 | case VE::TSCRrrr: |
| 22826 | case VE::TSCRrzr: |
| 22827 | case VE::XORim: |
| 22828 | case VE::XORrm: |
| 22829 | case VE::XORrr: { |
| 22830 | switch (OpNum) { |
| 22831 | case 0: |
| 22832 | // op: sx |
| 22833 | return 48; |
| 22834 | case 1: |
| 22835 | // op: sy |
| 22836 | return 40; |
| 22837 | case 2: |
| 22838 | // op: sz |
| 22839 | return 32; |
| 22840 | } |
| 22841 | break; |
| 22842 | } |
| 22843 | case VE::CVTDLi: |
| 22844 | case VE::CVTDLr: |
| 22845 | case VE::CVTDQi: |
| 22846 | case VE::CVTDQr: |
| 22847 | case VE::CVTDSi: |
| 22848 | case VE::CVTDSr: |
| 22849 | case VE::CVTDWi: |
| 22850 | case VE::CVTDWr: |
| 22851 | case VE::CVTQDi: |
| 22852 | case VE::CVTQDr: |
| 22853 | case VE::CVTQSi: |
| 22854 | case VE::CVTQSr: |
| 22855 | case VE::CVTSDi: |
| 22856 | case VE::CVTSDr: |
| 22857 | case VE::CVTSQi: |
| 22858 | case VE::CVTSQr: |
| 22859 | case VE::CVTSWi: |
| 22860 | case VE::CVTSWr: |
| 22861 | case VE::SMIR: { |
| 22862 | switch (OpNum) { |
| 22863 | case 0: |
| 22864 | // op: sx |
| 22865 | return 48; |
| 22866 | case 1: |
| 22867 | // op: sy |
| 22868 | return 40; |
| 22869 | } |
| 22870 | break; |
| 22871 | } |
| 22872 | case VE::LHMBri: |
| 22873 | case VE::LHMBzi: |
| 22874 | case VE::LHMHri: |
| 22875 | case VE::LHMHzi: |
| 22876 | case VE::LHMLri: |
| 22877 | case VE::LHMLzi: |
| 22878 | case VE::LHMWri: |
| 22879 | case VE::LHMWzi: { |
| 22880 | switch (OpNum) { |
| 22881 | case 0: |
| 22882 | // op: sx |
| 22883 | return 48; |
| 22884 | case 1: |
| 22885 | // op: sz |
| 22886 | return 32; |
| 22887 | case 2: |
| 22888 | // op: imm32 |
| 22889 | return 0; |
| 22890 | } |
| 22891 | break; |
| 22892 | } |
| 22893 | case VE::BSICrii: |
| 22894 | case VE::BSICrri: |
| 22895 | case VE::BSICzii: |
| 22896 | case VE::BSICzri: |
| 22897 | case VE::DLDLSXrii: |
| 22898 | case VE::DLDLSXrri: |
| 22899 | case VE::DLDLSXzii: |
| 22900 | case VE::DLDLSXzri: |
| 22901 | case VE::DLDLZXrii: |
| 22902 | case VE::DLDLZXrri: |
| 22903 | case VE::DLDLZXzii: |
| 22904 | case VE::DLDLZXzri: |
| 22905 | case VE::DLDUrii: |
| 22906 | case VE::DLDUrri: |
| 22907 | case VE::DLDUzii: |
| 22908 | case VE::DLDUzri: |
| 22909 | case VE::DLDrii: |
| 22910 | case VE::DLDrri: |
| 22911 | case VE::DLDzii: |
| 22912 | case VE::DLDzri: |
| 22913 | case VE::LD1BSXrii: |
| 22914 | case VE::LD1BSXrri: |
| 22915 | case VE::LD1BSXzii: |
| 22916 | case VE::LD1BSXzri: |
| 22917 | case VE::LD1BZXrii: |
| 22918 | case VE::LD1BZXrri: |
| 22919 | case VE::LD1BZXzii: |
| 22920 | case VE::LD1BZXzri: |
| 22921 | case VE::LD2BSXrii: |
| 22922 | case VE::LD2BSXrri: |
| 22923 | case VE::LD2BSXzii: |
| 22924 | case VE::LD2BSXzri: |
| 22925 | case VE::LD2BZXrii: |
| 22926 | case VE::LD2BZXrri: |
| 22927 | case VE::LD2BZXzii: |
| 22928 | case VE::LD2BZXzri: |
| 22929 | case VE::LDLSXrii: |
| 22930 | case VE::LDLSXrri: |
| 22931 | case VE::LDLSXzii: |
| 22932 | case VE::LDLSXzri: |
| 22933 | case VE::LDLZXrii: |
| 22934 | case VE::LDLZXrri: |
| 22935 | case VE::LDLZXzii: |
| 22936 | case VE::LDLZXzri: |
| 22937 | case VE::LDUrii: |
| 22938 | case VE::LDUrri: |
| 22939 | case VE::LDUzii: |
| 22940 | case VE::LDUzri: |
| 22941 | case VE::LDrii: |
| 22942 | case VE::LDrri: |
| 22943 | case VE::LDzii: |
| 22944 | case VE::LDzri: |
| 22945 | case VE::LEASLrii: |
| 22946 | case VE::LEASLrri: |
| 22947 | case VE::LEASLzii: |
| 22948 | case VE::LEASLzri: |
| 22949 | case VE::LEArii: |
| 22950 | case VE::LEArri: |
| 22951 | case VE::LEAzii: |
| 22952 | case VE::LEAzri: { |
| 22953 | switch (OpNum) { |
| 22954 | case 0: |
| 22955 | // op: sx |
| 22956 | return 48; |
| 22957 | case 1: |
| 22958 | // op: sz |
| 22959 | return 32; |
| 22960 | case 2: |
| 22961 | // op: sy |
| 22962 | return 40; |
| 22963 | case 3: |
| 22964 | // op: imm32 |
| 22965 | return 0; |
| 22966 | } |
| 22967 | break; |
| 22968 | } |
| 22969 | case VE::ATMAMrii: |
| 22970 | case VE::ATMAMrir: |
| 22971 | case VE::ATMAMzii: |
| 22972 | case VE::ATMAMzir: |
| 22973 | case VE::CASLrii: |
| 22974 | case VE::CASLrir: |
| 22975 | case VE::CASLzii: |
| 22976 | case VE::CASLzir: |
| 22977 | case VE::CASWrii: |
| 22978 | case VE::CASWrir: |
| 22979 | case VE::CASWzii: |
| 22980 | case VE::CASWzir: |
| 22981 | case VE::TS1AMLrii: |
| 22982 | case VE::TS1AMLrir: |
| 22983 | case VE::TS1AMLzii: |
| 22984 | case VE::TS1AMLzir: |
| 22985 | case VE::TS1AMWrii: |
| 22986 | case VE::TS1AMWrir: |
| 22987 | case VE::TS1AMWzii: |
| 22988 | case VE::TS1AMWzir: |
| 22989 | case VE::TS2AMrii: |
| 22990 | case VE::TS2AMrir: |
| 22991 | case VE::TS2AMzii: |
| 22992 | case VE::TS2AMzir: |
| 22993 | case VE::TS3AMrii: |
| 22994 | case VE::TS3AMrir: |
| 22995 | case VE::TS3AMzii: |
| 22996 | case VE::TS3AMzir: { |
| 22997 | switch (OpNum) { |
| 22998 | case 0: |
| 22999 | // op: sx |
| 23000 | return 48; |
| 23001 | case 1: |
| 23002 | // op: sz |
| 23003 | return 32; |
| 23004 | case 3: |
| 23005 | // op: sy |
| 23006 | return 40; |
| 23007 | case 2: |
| 23008 | // op: imm32 |
| 23009 | return 0; |
| 23010 | } |
| 23011 | break; |
| 23012 | } |
| 23013 | case VE::BRVm: |
| 23014 | case VE::BRVr: |
| 23015 | case VE::LDZm: |
| 23016 | case VE::LDZr: |
| 23017 | case VE::PCNTm: |
| 23018 | case VE::PCNTr: { |
| 23019 | switch (OpNum) { |
| 23020 | case 0: |
| 23021 | // op: sx |
| 23022 | return 48; |
| 23023 | case 1: |
| 23024 | // op: sz |
| 23025 | return 32; |
| 23026 | } |
| 23027 | break; |
| 23028 | } |
| 23029 | case VE::CVTLDi: |
| 23030 | case VE::CVTLDr: |
| 23031 | case VE::CVTWDSXi: |
| 23032 | case VE::CVTWDSXr: |
| 23033 | case VE::CVTWDZXi: |
| 23034 | case VE::CVTWDZXr: |
| 23035 | case VE::CVTWSSXi: |
| 23036 | case VE::CVTWSSXr: |
| 23037 | case VE::CVTWSZXi: |
| 23038 | case VE::CVTWSZXr: { |
| 23039 | switch (OpNum) { |
| 23040 | case 0: |
| 23041 | // op: sx |
| 23042 | return 48; |
| 23043 | case 2: |
| 23044 | // op: sy |
| 23045 | return 40; |
| 23046 | case 1: |
| 23047 | // op: rd |
| 23048 | return 32; |
| 23049 | } |
| 23050 | break; |
| 23051 | } |
| 23052 | case VE::ADDSLri: |
| 23053 | case VE::ADDSWSXri: |
| 23054 | case VE::ADDSWZXri: |
| 23055 | case VE::ADDULri: |
| 23056 | case VE::ADDUWri: |
| 23057 | case VE::ANDri: |
| 23058 | case VE::BSWPmi: |
| 23059 | case VE::BSWPri: |
| 23060 | case VE::EQVri: |
| 23061 | case VE::MAXSLri: |
| 23062 | case VE::MAXSWSXri: |
| 23063 | case VE::MAXSWZXri: |
| 23064 | case VE::MINSLri: |
| 23065 | case VE::MINSWSXri: |
| 23066 | case VE::MINSWZXri: |
| 23067 | case VE::MULSLWri: |
| 23068 | case VE::MULSLri: |
| 23069 | case VE::MULSWSXri: |
| 23070 | case VE::MULSWZXri: |
| 23071 | case VE::MULULri: |
| 23072 | case VE::MULUWri: |
| 23073 | case VE::ORri: |
| 23074 | case VE::SLALmi: |
| 23075 | case VE::SLALmr: |
| 23076 | case VE::SLALri: |
| 23077 | case VE::SLALrr: |
| 23078 | case VE::SLAWSXmi: |
| 23079 | case VE::SLAWSXmr: |
| 23080 | case VE::SLAWSXri: |
| 23081 | case VE::SLAWSXrr: |
| 23082 | case VE::SLAWZXmi: |
| 23083 | case VE::SLAWZXmr: |
| 23084 | case VE::SLAWZXri: |
| 23085 | case VE::SLAWZXrr: |
| 23086 | case VE::SLLmi: |
| 23087 | case VE::SLLmr: |
| 23088 | case VE::SLLri: |
| 23089 | case VE::SLLrr: |
| 23090 | case VE::SRALmi: |
| 23091 | case VE::SRALmr: |
| 23092 | case VE::SRALri: |
| 23093 | case VE::SRALrr: |
| 23094 | case VE::SRAWSXmi: |
| 23095 | case VE::SRAWSXmr: |
| 23096 | case VE::SRAWSXri: |
| 23097 | case VE::SRAWSXrr: |
| 23098 | case VE::SRAWZXmi: |
| 23099 | case VE::SRAWZXmr: |
| 23100 | case VE::SRAWZXri: |
| 23101 | case VE::SRAWZXrr: |
| 23102 | case VE::SRLmi: |
| 23103 | case VE::SRLmr: |
| 23104 | case VE::SRLri: |
| 23105 | case VE::SRLrr: |
| 23106 | case VE::XORri: { |
| 23107 | switch (OpNum) { |
| 23108 | case 0: |
| 23109 | // op: sx |
| 23110 | return 48; |
| 23111 | case 2: |
| 23112 | // op: sy |
| 23113 | return 40; |
| 23114 | case 1: |
| 23115 | // op: sz |
| 23116 | return 32; |
| 23117 | } |
| 23118 | break; |
| 23119 | } |
| 23120 | case VE::LVSvi: |
| 23121 | case VE::LVSvr: { |
| 23122 | switch (OpNum) { |
| 23123 | case 0: |
| 23124 | // op: sx |
| 23125 | return 48; |
| 23126 | case 2: |
| 23127 | // op: sy |
| 23128 | return 40; |
| 23129 | case 1: |
| 23130 | // op: vx |
| 23131 | return 24; |
| 23132 | } |
| 23133 | break; |
| 23134 | } |
| 23135 | case VE::SVMmi: |
| 23136 | case VE::SVMmr: { |
| 23137 | switch (OpNum) { |
| 23138 | case 0: |
| 23139 | // op: sx |
| 23140 | return 48; |
| 23141 | case 2: |
| 23142 | // op: sy |
| 23143 | return 40; |
| 23144 | case 1: |
| 23145 | // op: vz |
| 23146 | return 8; |
| 23147 | } |
| 23148 | break; |
| 23149 | } |
| 23150 | case VE::CMOVDim: |
| 23151 | case VE::CMOVDir: |
| 23152 | case VE::CMOVDrm: |
| 23153 | case VE::CMOVDrr: |
| 23154 | case VE::CMOVLim: |
| 23155 | case VE::CMOVLir: |
| 23156 | case VE::CMOVLrm: |
| 23157 | case VE::CMOVLrr: |
| 23158 | case VE::CMOVSim: |
| 23159 | case VE::CMOVSir: |
| 23160 | case VE::CMOVSrm: |
| 23161 | case VE::CMOVSrr: |
| 23162 | case VE::CMOVWim: |
| 23163 | case VE::CMOVWir: |
| 23164 | case VE::CMOVWrm: |
| 23165 | case VE::CMOVWrr: { |
| 23166 | switch (OpNum) { |
| 23167 | case 0: |
| 23168 | // op: sx |
| 23169 | return 48; |
| 23170 | case 2: |
| 23171 | // op: sy |
| 23172 | return 40; |
| 23173 | case 3: |
| 23174 | // op: sz |
| 23175 | return 32; |
| 23176 | case 1: |
| 23177 | // op: cfw |
| 23178 | return 0; |
| 23179 | } |
| 23180 | break; |
| 23181 | } |
| 23182 | case VE::SRDmri: |
| 23183 | case VE::SRDmrr: |
| 23184 | case VE::SRDrri: |
| 23185 | case VE::SRDrrr: { |
| 23186 | switch (OpNum) { |
| 23187 | case 0: |
| 23188 | // op: sx |
| 23189 | return 48; |
| 23190 | case 3: |
| 23191 | // op: sy |
| 23192 | return 40; |
| 23193 | case 1: |
| 23194 | // op: sz |
| 23195 | return 32; |
| 23196 | } |
| 23197 | break; |
| 23198 | } |
| 23199 | case VE::SLDrmi: |
| 23200 | case VE::SLDrmr: |
| 23201 | case VE::SLDrri: |
| 23202 | case VE::SLDrrr: { |
| 23203 | switch (OpNum) { |
| 23204 | case 0: |
| 23205 | // op: sx |
| 23206 | return 48; |
| 23207 | case 3: |
| 23208 | // op: sy |
| 23209 | return 40; |
| 23210 | case 2: |
| 23211 | // op: sz |
| 23212 | return 32; |
| 23213 | } |
| 23214 | break; |
| 23215 | } |
| 23216 | case VE::SFR: |
| 23217 | case VE::SIC: |
| 23218 | case VE::SMVL: |
| 23219 | case VE::SPM: |
| 23220 | case VE::SVL: { |
| 23221 | switch (OpNum) { |
| 23222 | case 0: |
| 23223 | // op: sx |
| 23224 | return 48; |
| 23225 | } |
| 23226 | break; |
| 23227 | } |
| 23228 | case VE::VST2DNCOTirv: |
| 23229 | case VE::VST2DNCOTirvL: |
| 23230 | case VE::VST2DNCOTirvl: |
| 23231 | case VE::VST2DNCOTizv: |
| 23232 | case VE::VST2DNCOTizvL: |
| 23233 | case VE::VST2DNCOTizvl: |
| 23234 | case VE::VST2DNCOTrrv: |
| 23235 | case VE::VST2DNCOTrrvL: |
| 23236 | case VE::VST2DNCOTrrvl: |
| 23237 | case VE::VST2DNCOTrzv: |
| 23238 | case VE::VST2DNCOTrzvL: |
| 23239 | case VE::VST2DNCOTrzvl: |
| 23240 | case VE::VST2DNCirv: |
| 23241 | case VE::VST2DNCirvL: |
| 23242 | case VE::VST2DNCirvl: |
| 23243 | case VE::VST2DNCizv: |
| 23244 | case VE::VST2DNCizvL: |
| 23245 | case VE::VST2DNCizvl: |
| 23246 | case VE::VST2DNCrrv: |
| 23247 | case VE::VST2DNCrrvL: |
| 23248 | case VE::VST2DNCrrvl: |
| 23249 | case VE::VST2DNCrzv: |
| 23250 | case VE::VST2DNCrzvL: |
| 23251 | case VE::VST2DNCrzvl: |
| 23252 | case VE::VST2DOTirv: |
| 23253 | case VE::VST2DOTirvL: |
| 23254 | case VE::VST2DOTirvl: |
| 23255 | case VE::VST2DOTizv: |
| 23256 | case VE::VST2DOTizvL: |
| 23257 | case VE::VST2DOTizvl: |
| 23258 | case VE::VST2DOTrrv: |
| 23259 | case VE::VST2DOTrrvL: |
| 23260 | case VE::VST2DOTrrvl: |
| 23261 | case VE::VST2DOTrzv: |
| 23262 | case VE::VST2DOTrzvL: |
| 23263 | case VE::VST2DOTrzvl: |
| 23264 | case VE::VST2Dirv: |
| 23265 | case VE::VST2DirvL: |
| 23266 | case VE::VST2Dirvl: |
| 23267 | case VE::VST2Dizv: |
| 23268 | case VE::VST2DizvL: |
| 23269 | case VE::VST2Dizvl: |
| 23270 | case VE::VST2Drrv: |
| 23271 | case VE::VST2DrrvL: |
| 23272 | case VE::VST2Drrvl: |
| 23273 | case VE::VST2Drzv: |
| 23274 | case VE::VST2DrzvL: |
| 23275 | case VE::VST2Drzvl: |
| 23276 | case VE::VSTL2DNCOTirv: |
| 23277 | case VE::VSTL2DNCOTirvL: |
| 23278 | case VE::VSTL2DNCOTirvl: |
| 23279 | case VE::VSTL2DNCOTizv: |
| 23280 | case VE::VSTL2DNCOTizvL: |
| 23281 | case VE::VSTL2DNCOTizvl: |
| 23282 | case VE::VSTL2DNCOTrrv: |
| 23283 | case VE::VSTL2DNCOTrrvL: |
| 23284 | case VE::VSTL2DNCOTrrvl: |
| 23285 | case VE::VSTL2DNCOTrzv: |
| 23286 | case VE::VSTL2DNCOTrzvL: |
| 23287 | case VE::VSTL2DNCOTrzvl: |
| 23288 | case VE::VSTL2DNCirv: |
| 23289 | case VE::VSTL2DNCirvL: |
| 23290 | case VE::VSTL2DNCirvl: |
| 23291 | case VE::VSTL2DNCizv: |
| 23292 | case VE::VSTL2DNCizvL: |
| 23293 | case VE::VSTL2DNCizvl: |
| 23294 | case VE::VSTL2DNCrrv: |
| 23295 | case VE::VSTL2DNCrrvL: |
| 23296 | case VE::VSTL2DNCrrvl: |
| 23297 | case VE::VSTL2DNCrzv: |
| 23298 | case VE::VSTL2DNCrzvL: |
| 23299 | case VE::VSTL2DNCrzvl: |
| 23300 | case VE::VSTL2DOTirv: |
| 23301 | case VE::VSTL2DOTirvL: |
| 23302 | case VE::VSTL2DOTirvl: |
| 23303 | case VE::VSTL2DOTizv: |
| 23304 | case VE::VSTL2DOTizvL: |
| 23305 | case VE::VSTL2DOTizvl: |
| 23306 | case VE::VSTL2DOTrrv: |
| 23307 | case VE::VSTL2DOTrrvL: |
| 23308 | case VE::VSTL2DOTrrvl: |
| 23309 | case VE::VSTL2DOTrzv: |
| 23310 | case VE::VSTL2DOTrzvL: |
| 23311 | case VE::VSTL2DOTrzvl: |
| 23312 | case VE::VSTL2Dirv: |
| 23313 | case VE::VSTL2DirvL: |
| 23314 | case VE::VSTL2Dirvl: |
| 23315 | case VE::VSTL2Dizv: |
| 23316 | case VE::VSTL2DizvL: |
| 23317 | case VE::VSTL2Dizvl: |
| 23318 | case VE::VSTL2Drrv: |
| 23319 | case VE::VSTL2DrrvL: |
| 23320 | case VE::VSTL2Drrvl: |
| 23321 | case VE::VSTL2Drzv: |
| 23322 | case VE::VSTL2DrzvL: |
| 23323 | case VE::VSTL2Drzvl: |
| 23324 | case VE::VSTLNCOTirv: |
| 23325 | case VE::VSTLNCOTirvL: |
| 23326 | case VE::VSTLNCOTirvl: |
| 23327 | case VE::VSTLNCOTizv: |
| 23328 | case VE::VSTLNCOTizvL: |
| 23329 | case VE::VSTLNCOTizvl: |
| 23330 | case VE::VSTLNCOTrrv: |
| 23331 | case VE::VSTLNCOTrrvL: |
| 23332 | case VE::VSTLNCOTrrvl: |
| 23333 | case VE::VSTLNCOTrzv: |
| 23334 | case VE::VSTLNCOTrzvL: |
| 23335 | case VE::VSTLNCOTrzvl: |
| 23336 | case VE::VSTLNCirv: |
| 23337 | case VE::VSTLNCirvL: |
| 23338 | case VE::VSTLNCirvl: |
| 23339 | case VE::VSTLNCizv: |
| 23340 | case VE::VSTLNCizvL: |
| 23341 | case VE::VSTLNCizvl: |
| 23342 | case VE::VSTLNCrrv: |
| 23343 | case VE::VSTLNCrrvL: |
| 23344 | case VE::VSTLNCrrvl: |
| 23345 | case VE::VSTLNCrzv: |
| 23346 | case VE::VSTLNCrzvL: |
| 23347 | case VE::VSTLNCrzvl: |
| 23348 | case VE::VSTLOTirv: |
| 23349 | case VE::VSTLOTirvL: |
| 23350 | case VE::VSTLOTirvl: |
| 23351 | case VE::VSTLOTizv: |
| 23352 | case VE::VSTLOTizvL: |
| 23353 | case VE::VSTLOTizvl: |
| 23354 | case VE::VSTLOTrrv: |
| 23355 | case VE::VSTLOTrrvL: |
| 23356 | case VE::VSTLOTrrvl: |
| 23357 | case VE::VSTLOTrzv: |
| 23358 | case VE::VSTLOTrzvL: |
| 23359 | case VE::VSTLOTrzvl: |
| 23360 | case VE::VSTLirv: |
| 23361 | case VE::VSTLirvL: |
| 23362 | case VE::VSTLirvl: |
| 23363 | case VE::VSTLizv: |
| 23364 | case VE::VSTLizvL: |
| 23365 | case VE::VSTLizvl: |
| 23366 | case VE::VSTLrrv: |
| 23367 | case VE::VSTLrrvL: |
| 23368 | case VE::VSTLrrvl: |
| 23369 | case VE::VSTLrzv: |
| 23370 | case VE::VSTLrzvL: |
| 23371 | case VE::VSTLrzvl: |
| 23372 | case VE::VSTNCOTirv: |
| 23373 | case VE::VSTNCOTirvL: |
| 23374 | case VE::VSTNCOTirvl: |
| 23375 | case VE::VSTNCOTizv: |
| 23376 | case VE::VSTNCOTizvL: |
| 23377 | case VE::VSTNCOTizvl: |
| 23378 | case VE::VSTNCOTrrv: |
| 23379 | case VE::VSTNCOTrrvL: |
| 23380 | case VE::VSTNCOTrrvl: |
| 23381 | case VE::VSTNCOTrzv: |
| 23382 | case VE::VSTNCOTrzvL: |
| 23383 | case VE::VSTNCOTrzvl: |
| 23384 | case VE::VSTNCirv: |
| 23385 | case VE::VSTNCirvL: |
| 23386 | case VE::VSTNCirvl: |
| 23387 | case VE::VSTNCizv: |
| 23388 | case VE::VSTNCizvL: |
| 23389 | case VE::VSTNCizvl: |
| 23390 | case VE::VSTNCrrv: |
| 23391 | case VE::VSTNCrrvL: |
| 23392 | case VE::VSTNCrrvl: |
| 23393 | case VE::VSTNCrzv: |
| 23394 | case VE::VSTNCrzvL: |
| 23395 | case VE::VSTNCrzvl: |
| 23396 | case VE::VSTOTirv: |
| 23397 | case VE::VSTOTirvL: |
| 23398 | case VE::VSTOTirvl: |
| 23399 | case VE::VSTOTizv: |
| 23400 | case VE::VSTOTizvL: |
| 23401 | case VE::VSTOTizvl: |
| 23402 | case VE::VSTOTrrv: |
| 23403 | case VE::VSTOTrrvL: |
| 23404 | case VE::VSTOTrrvl: |
| 23405 | case VE::VSTOTrzv: |
| 23406 | case VE::VSTOTrzvL: |
| 23407 | case VE::VSTOTrzvl: |
| 23408 | case VE::VSTU2DNCOTirv: |
| 23409 | case VE::VSTU2DNCOTirvL: |
| 23410 | case VE::VSTU2DNCOTirvl: |
| 23411 | case VE::VSTU2DNCOTizv: |
| 23412 | case VE::VSTU2DNCOTizvL: |
| 23413 | case VE::VSTU2DNCOTizvl: |
| 23414 | case VE::VSTU2DNCOTrrv: |
| 23415 | case VE::VSTU2DNCOTrrvL: |
| 23416 | case VE::VSTU2DNCOTrrvl: |
| 23417 | case VE::VSTU2DNCOTrzv: |
| 23418 | case VE::VSTU2DNCOTrzvL: |
| 23419 | case VE::VSTU2DNCOTrzvl: |
| 23420 | case VE::VSTU2DNCirv: |
| 23421 | case VE::VSTU2DNCirvL: |
| 23422 | case VE::VSTU2DNCirvl: |
| 23423 | case VE::VSTU2DNCizv: |
| 23424 | case VE::VSTU2DNCizvL: |
| 23425 | case VE::VSTU2DNCizvl: |
| 23426 | case VE::VSTU2DNCrrv: |
| 23427 | case VE::VSTU2DNCrrvL: |
| 23428 | case VE::VSTU2DNCrrvl: |
| 23429 | case VE::VSTU2DNCrzv: |
| 23430 | case VE::VSTU2DNCrzvL: |
| 23431 | case VE::VSTU2DNCrzvl: |
| 23432 | case VE::VSTU2DOTirv: |
| 23433 | case VE::VSTU2DOTirvL: |
| 23434 | case VE::VSTU2DOTirvl: |
| 23435 | case VE::VSTU2DOTizv: |
| 23436 | case VE::VSTU2DOTizvL: |
| 23437 | case VE::VSTU2DOTizvl: |
| 23438 | case VE::VSTU2DOTrrv: |
| 23439 | case VE::VSTU2DOTrrvL: |
| 23440 | case VE::VSTU2DOTrrvl: |
| 23441 | case VE::VSTU2DOTrzv: |
| 23442 | case VE::VSTU2DOTrzvL: |
| 23443 | case VE::VSTU2DOTrzvl: |
| 23444 | case VE::VSTU2Dirv: |
| 23445 | case VE::VSTU2DirvL: |
| 23446 | case VE::VSTU2Dirvl: |
| 23447 | case VE::VSTU2Dizv: |
| 23448 | case VE::VSTU2DizvL: |
| 23449 | case VE::VSTU2Dizvl: |
| 23450 | case VE::VSTU2Drrv: |
| 23451 | case VE::VSTU2DrrvL: |
| 23452 | case VE::VSTU2Drrvl: |
| 23453 | case VE::VSTU2Drzv: |
| 23454 | case VE::VSTU2DrzvL: |
| 23455 | case VE::VSTU2Drzvl: |
| 23456 | case VE::VSTUNCOTirv: |
| 23457 | case VE::VSTUNCOTirvL: |
| 23458 | case VE::VSTUNCOTirvl: |
| 23459 | case VE::VSTUNCOTizv: |
| 23460 | case VE::VSTUNCOTizvL: |
| 23461 | case VE::VSTUNCOTizvl: |
| 23462 | case VE::VSTUNCOTrrv: |
| 23463 | case VE::VSTUNCOTrrvL: |
| 23464 | case VE::VSTUNCOTrrvl: |
| 23465 | case VE::VSTUNCOTrzv: |
| 23466 | case VE::VSTUNCOTrzvL: |
| 23467 | case VE::VSTUNCOTrzvl: |
| 23468 | case VE::VSTUNCirv: |
| 23469 | case VE::VSTUNCirvL: |
| 23470 | case VE::VSTUNCirvl: |
| 23471 | case VE::VSTUNCizv: |
| 23472 | case VE::VSTUNCizvL: |
| 23473 | case VE::VSTUNCizvl: |
| 23474 | case VE::VSTUNCrrv: |
| 23475 | case VE::VSTUNCrrvL: |
| 23476 | case VE::VSTUNCrrvl: |
| 23477 | case VE::VSTUNCrzv: |
| 23478 | case VE::VSTUNCrzvL: |
| 23479 | case VE::VSTUNCrzvl: |
| 23480 | case VE::VSTUOTirv: |
| 23481 | case VE::VSTUOTirvL: |
| 23482 | case VE::VSTUOTirvl: |
| 23483 | case VE::VSTUOTizv: |
| 23484 | case VE::VSTUOTizvL: |
| 23485 | case VE::VSTUOTizvl: |
| 23486 | case VE::VSTUOTrrv: |
| 23487 | case VE::VSTUOTrrvL: |
| 23488 | case VE::VSTUOTrrvl: |
| 23489 | case VE::VSTUOTrzv: |
| 23490 | case VE::VSTUOTrzvL: |
| 23491 | case VE::VSTUOTrzvl: |
| 23492 | case VE::VSTUirv: |
| 23493 | case VE::VSTUirvL: |
| 23494 | case VE::VSTUirvl: |
| 23495 | case VE::VSTUizv: |
| 23496 | case VE::VSTUizvL: |
| 23497 | case VE::VSTUizvl: |
| 23498 | case VE::VSTUrrv: |
| 23499 | case VE::VSTUrrvL: |
| 23500 | case VE::VSTUrrvl: |
| 23501 | case VE::VSTUrzv: |
| 23502 | case VE::VSTUrzvL: |
| 23503 | case VE::VSTUrzvl: |
| 23504 | case VE::VSTirv: |
| 23505 | case VE::VSTirvL: |
| 23506 | case VE::VSTirvl: |
| 23507 | case VE::VSTizv: |
| 23508 | case VE::VSTizvL: |
| 23509 | case VE::VSTizvl: |
| 23510 | case VE::VSTrrv: |
| 23511 | case VE::VSTrrvL: |
| 23512 | case VE::VSTrrvl: |
| 23513 | case VE::VSTrzv: |
| 23514 | case VE::VSTrzvL: |
| 23515 | case VE::VSTrzvl: { |
| 23516 | switch (OpNum) { |
| 23517 | case 0: |
| 23518 | // op: sy |
| 23519 | return 40; |
| 23520 | case 1: |
| 23521 | // op: sz |
| 23522 | return 32; |
| 23523 | case 2: |
| 23524 | // op: vx |
| 23525 | return 24; |
| 23526 | } |
| 23527 | break; |
| 23528 | } |
| 23529 | case VE::PFCHVNCir: |
| 23530 | case VE::PFCHVNCirL: |
| 23531 | case VE::PFCHVNCirl: |
| 23532 | case VE::PFCHVNCiz: |
| 23533 | case VE::PFCHVNCizL: |
| 23534 | case VE::PFCHVNCizl: |
| 23535 | case VE::PFCHVNCrr: |
| 23536 | case VE::PFCHVNCrrL: |
| 23537 | case VE::PFCHVNCrrl: |
| 23538 | case VE::PFCHVNCrz: |
| 23539 | case VE::PFCHVNCrzL: |
| 23540 | case VE::PFCHVNCrzl: |
| 23541 | case VE::PFCHVir: |
| 23542 | case VE::PFCHVirL: |
| 23543 | case VE::PFCHVirl: |
| 23544 | case VE::PFCHViz: |
| 23545 | case VE::PFCHVizL: |
| 23546 | case VE::PFCHVizl: |
| 23547 | case VE::PFCHVrr: |
| 23548 | case VE::PFCHVrrL: |
| 23549 | case VE::PFCHVrrl: |
| 23550 | case VE::PFCHVrz: |
| 23551 | case VE::PFCHVrzL: |
| 23552 | case VE::PFCHVrzl: { |
| 23553 | switch (OpNum) { |
| 23554 | case 0: |
| 23555 | // op: sy |
| 23556 | return 40; |
| 23557 | case 1: |
| 23558 | // op: sz |
| 23559 | return 32; |
| 23560 | } |
| 23561 | break; |
| 23562 | } |
| 23563 | case VE::LFRi: |
| 23564 | case VE::LFRr: |
| 23565 | case VE::LPM: |
| 23566 | case VE::LVIXi: |
| 23567 | case VE::LVIXr: |
| 23568 | case VE::LVLi: |
| 23569 | case VE::LVLr: { |
| 23570 | switch (OpNum) { |
| 23571 | case 0: |
| 23572 | // op: sy |
| 23573 | return 40; |
| 23574 | } |
| 23575 | break; |
| 23576 | } |
| 23577 | case VE::BCFDari: |
| 23578 | case VE::BCFDari_nt: |
| 23579 | case VE::BCFDari_t: |
| 23580 | case VE::BCFDazi: |
| 23581 | case VE::BCFDazi_nt: |
| 23582 | case VE::BCFDazi_t: |
| 23583 | case VE::BCFDnari: |
| 23584 | case VE::BCFDnari_nt: |
| 23585 | case VE::BCFDnari_t: |
| 23586 | case VE::BCFDnazi: |
| 23587 | case VE::BCFDnazi_nt: |
| 23588 | case VE::BCFDnazi_t: |
| 23589 | case VE::BCFLari: |
| 23590 | case VE::BCFLari_nt: |
| 23591 | case VE::BCFLari_t: |
| 23592 | case VE::BCFLazi: |
| 23593 | case VE::BCFLazi_nt: |
| 23594 | case VE::BCFLazi_t: |
| 23595 | case VE::BCFLnari: |
| 23596 | case VE::BCFLnari_nt: |
| 23597 | case VE::BCFLnari_t: |
| 23598 | case VE::BCFLnazi: |
| 23599 | case VE::BCFLnazi_nt: |
| 23600 | case VE::BCFLnazi_t: |
| 23601 | case VE::BCFSari: |
| 23602 | case VE::BCFSari_nt: |
| 23603 | case VE::BCFSari_t: |
| 23604 | case VE::BCFSazi: |
| 23605 | case VE::BCFSazi_nt: |
| 23606 | case VE::BCFSazi_t: |
| 23607 | case VE::BCFSnari: |
| 23608 | case VE::BCFSnari_nt: |
| 23609 | case VE::BCFSnari_t: |
| 23610 | case VE::BCFSnazi: |
| 23611 | case VE::BCFSnazi_nt: |
| 23612 | case VE::BCFSnazi_t: |
| 23613 | case VE::BCFWari: |
| 23614 | case VE::BCFWari_nt: |
| 23615 | case VE::BCFWari_t: |
| 23616 | case VE::BCFWazi: |
| 23617 | case VE::BCFWazi_nt: |
| 23618 | case VE::BCFWazi_t: |
| 23619 | case VE::BCFWnari: |
| 23620 | case VE::BCFWnari_nt: |
| 23621 | case VE::BCFWnari_t: |
| 23622 | case VE::BCFWnazi: |
| 23623 | case VE::BCFWnazi_nt: |
| 23624 | case VE::BCFWnazi_t: { |
| 23625 | switch (OpNum) { |
| 23626 | case 0: |
| 23627 | // op: sz |
| 23628 | return 32; |
| 23629 | case 1: |
| 23630 | // op: imm32 |
| 23631 | return 0; |
| 23632 | } |
| 23633 | break; |
| 23634 | } |
| 23635 | case VE::PFCHrii: |
| 23636 | case VE::PFCHrri: |
| 23637 | case VE::PFCHzii: |
| 23638 | case VE::PFCHzri: { |
| 23639 | switch (OpNum) { |
| 23640 | case 0: |
| 23641 | // op: sz |
| 23642 | return 32; |
| 23643 | case 1: |
| 23644 | // op: sy |
| 23645 | return 40; |
| 23646 | case 2: |
| 23647 | // op: imm32 |
| 23648 | return 0; |
| 23649 | } |
| 23650 | break; |
| 23651 | } |
| 23652 | case VE::CALLr: { |
| 23653 | switch (OpNum) { |
| 23654 | case 0: |
| 23655 | // op: sz |
| 23656 | return 32; |
| 23657 | } |
| 23658 | break; |
| 23659 | } |
| 23660 | case VE::PVFMADLOvvv: |
| 23661 | case VE::PVFMADLOvvvL: |
| 23662 | case VE::PVFMADLOvvvL_v: |
| 23663 | case VE::PVFMADLOvvv_v: |
| 23664 | case VE::PVFMADLOvvvl: |
| 23665 | case VE::PVFMADLOvvvl_v: |
| 23666 | case VE::PVFMADUPvvv: |
| 23667 | case VE::PVFMADUPvvvL: |
| 23668 | case VE::PVFMADUPvvvL_v: |
| 23669 | case VE::PVFMADUPvvv_v: |
| 23670 | case VE::PVFMADUPvvvl: |
| 23671 | case VE::PVFMADUPvvvl_v: |
| 23672 | case VE::PVFMADvvv: |
| 23673 | case VE::PVFMADvvvL: |
| 23674 | case VE::PVFMADvvvL_v: |
| 23675 | case VE::PVFMADvvv_v: |
| 23676 | case VE::PVFMADvvvl: |
| 23677 | case VE::PVFMADvvvl_v: |
| 23678 | case VE::PVFMSBLOvvv: |
| 23679 | case VE::PVFMSBLOvvvL: |
| 23680 | case VE::PVFMSBLOvvvL_v: |
| 23681 | case VE::PVFMSBLOvvv_v: |
| 23682 | case VE::PVFMSBLOvvvl: |
| 23683 | case VE::PVFMSBLOvvvl_v: |
| 23684 | case VE::PVFMSBUPvvv: |
| 23685 | case VE::PVFMSBUPvvvL: |
| 23686 | case VE::PVFMSBUPvvvL_v: |
| 23687 | case VE::PVFMSBUPvvv_v: |
| 23688 | case VE::PVFMSBUPvvvl: |
| 23689 | case VE::PVFMSBUPvvvl_v: |
| 23690 | case VE::PVFMSBvvv: |
| 23691 | case VE::PVFMSBvvvL: |
| 23692 | case VE::PVFMSBvvvL_v: |
| 23693 | case VE::PVFMSBvvv_v: |
| 23694 | case VE::PVFMSBvvvl: |
| 23695 | case VE::PVFMSBvvvl_v: |
| 23696 | case VE::PVFNMADLOvvv: |
| 23697 | case VE::PVFNMADLOvvvL: |
| 23698 | case VE::PVFNMADLOvvvL_v: |
| 23699 | case VE::PVFNMADLOvvv_v: |
| 23700 | case VE::PVFNMADLOvvvl: |
| 23701 | case VE::PVFNMADLOvvvl_v: |
| 23702 | case VE::PVFNMADUPvvv: |
| 23703 | case VE::PVFNMADUPvvvL: |
| 23704 | case VE::PVFNMADUPvvvL_v: |
| 23705 | case VE::PVFNMADUPvvv_v: |
| 23706 | case VE::PVFNMADUPvvvl: |
| 23707 | case VE::PVFNMADUPvvvl_v: |
| 23708 | case VE::PVFNMADvvv: |
| 23709 | case VE::PVFNMADvvvL: |
| 23710 | case VE::PVFNMADvvvL_v: |
| 23711 | case VE::PVFNMADvvv_v: |
| 23712 | case VE::PVFNMADvvvl: |
| 23713 | case VE::PVFNMADvvvl_v: |
| 23714 | case VE::PVFNMSBLOvvv: |
| 23715 | case VE::PVFNMSBLOvvvL: |
| 23716 | case VE::PVFNMSBLOvvvL_v: |
| 23717 | case VE::PVFNMSBLOvvv_v: |
| 23718 | case VE::PVFNMSBLOvvvl: |
| 23719 | case VE::PVFNMSBLOvvvl_v: |
| 23720 | case VE::PVFNMSBUPvvv: |
| 23721 | case VE::PVFNMSBUPvvvL: |
| 23722 | case VE::PVFNMSBUPvvvL_v: |
| 23723 | case VE::PVFNMSBUPvvv_v: |
| 23724 | case VE::PVFNMSBUPvvvl: |
| 23725 | case VE::PVFNMSBUPvvvl_v: |
| 23726 | case VE::PVFNMSBvvv: |
| 23727 | case VE::PVFNMSBvvvL: |
| 23728 | case VE::PVFNMSBvvvL_v: |
| 23729 | case VE::PVFNMSBvvv_v: |
| 23730 | case VE::PVFNMSBvvvl: |
| 23731 | case VE::PVFNMSBvvvl_v: |
| 23732 | case VE::VFMADDvvv: |
| 23733 | case VE::VFMADDvvvL: |
| 23734 | case VE::VFMADDvvvL_v: |
| 23735 | case VE::VFMADDvvv_v: |
| 23736 | case VE::VFMADDvvvl: |
| 23737 | case VE::VFMADDvvvl_v: |
| 23738 | case VE::VFMADSvvv: |
| 23739 | case VE::VFMADSvvvL: |
| 23740 | case VE::VFMADSvvvL_v: |
| 23741 | case VE::VFMADSvvv_v: |
| 23742 | case VE::VFMADSvvvl: |
| 23743 | case VE::VFMADSvvvl_v: |
| 23744 | case VE::VFMSBDvvv: |
| 23745 | case VE::VFMSBDvvvL: |
| 23746 | case VE::VFMSBDvvvL_v: |
| 23747 | case VE::VFMSBDvvv_v: |
| 23748 | case VE::VFMSBDvvvl: |
| 23749 | case VE::VFMSBDvvvl_v: |
| 23750 | case VE::VFMSBSvvv: |
| 23751 | case VE::VFMSBSvvvL: |
| 23752 | case VE::VFMSBSvvvL_v: |
| 23753 | case VE::VFMSBSvvv_v: |
| 23754 | case VE::VFMSBSvvvl: |
| 23755 | case VE::VFMSBSvvvl_v: |
| 23756 | case VE::VFNMADDvvv: |
| 23757 | case VE::VFNMADDvvvL: |
| 23758 | case VE::VFNMADDvvvL_v: |
| 23759 | case VE::VFNMADDvvv_v: |
| 23760 | case VE::VFNMADDvvvl: |
| 23761 | case VE::VFNMADDvvvl_v: |
| 23762 | case VE::VFNMADSvvv: |
| 23763 | case VE::VFNMADSvvvL: |
| 23764 | case VE::VFNMADSvvvL_v: |
| 23765 | case VE::VFNMADSvvv_v: |
| 23766 | case VE::VFNMADSvvvl: |
| 23767 | case VE::VFNMADSvvvl_v: |
| 23768 | case VE::VFNMSBDvvv: |
| 23769 | case VE::VFNMSBDvvvL: |
| 23770 | case VE::VFNMSBDvvvL_v: |
| 23771 | case VE::VFNMSBDvvv_v: |
| 23772 | case VE::VFNMSBDvvvl: |
| 23773 | case VE::VFNMSBDvvvl_v: |
| 23774 | case VE::VFNMSBSvvv: |
| 23775 | case VE::VFNMSBSvvvL: |
| 23776 | case VE::VFNMSBSvvvL_v: |
| 23777 | case VE::VFNMSBSvvv_v: |
| 23778 | case VE::VFNMSBSvvvl: |
| 23779 | case VE::VFNMSBSvvvl_v: { |
| 23780 | switch (OpNum) { |
| 23781 | case 0: |
| 23782 | // op: vx |
| 23783 | return 24; |
| 23784 | case 1: |
| 23785 | // op: vy |
| 23786 | return 16; |
| 23787 | case 2: |
| 23788 | // op: vz |
| 23789 | return 8; |
| 23790 | case 3: |
| 23791 | // op: vw |
| 23792 | return 0; |
| 23793 | } |
| 23794 | break; |
| 23795 | } |
| 23796 | case VE::ANDMmm: |
| 23797 | case VE::EQVMmm: |
| 23798 | case VE::NNDMmm: |
| 23799 | case VE::ORMmm: |
| 23800 | case VE::PVADDSLOvv: |
| 23801 | case VE::PVADDSLOvvL: |
| 23802 | case VE::PVADDSLOvvL_v: |
| 23803 | case VE::PVADDSLOvv_v: |
| 23804 | case VE::PVADDSLOvvl: |
| 23805 | case VE::PVADDSLOvvl_v: |
| 23806 | case VE::PVADDSUPvv: |
| 23807 | case VE::PVADDSUPvvL: |
| 23808 | case VE::PVADDSUPvvL_v: |
| 23809 | case VE::PVADDSUPvv_v: |
| 23810 | case VE::PVADDSUPvvl: |
| 23811 | case VE::PVADDSUPvvl_v: |
| 23812 | case VE::PVADDSvv: |
| 23813 | case VE::PVADDSvvL: |
| 23814 | case VE::PVADDSvvL_v: |
| 23815 | case VE::PVADDSvv_v: |
| 23816 | case VE::PVADDSvvl: |
| 23817 | case VE::PVADDSvvl_v: |
| 23818 | case VE::PVADDULOvv: |
| 23819 | case VE::PVADDULOvvL: |
| 23820 | case VE::PVADDULOvvL_v: |
| 23821 | case VE::PVADDULOvv_v: |
| 23822 | case VE::PVADDULOvvl: |
| 23823 | case VE::PVADDULOvvl_v: |
| 23824 | case VE::PVADDUUPvv: |
| 23825 | case VE::PVADDUUPvvL: |
| 23826 | case VE::PVADDUUPvvL_v: |
| 23827 | case VE::PVADDUUPvv_v: |
| 23828 | case VE::PVADDUUPvvl: |
| 23829 | case VE::PVADDUUPvvl_v: |
| 23830 | case VE::PVADDUvv: |
| 23831 | case VE::PVADDUvvL: |
| 23832 | case VE::PVADDUvvL_v: |
| 23833 | case VE::PVADDUvv_v: |
| 23834 | case VE::PVADDUvvl: |
| 23835 | case VE::PVADDUvvl_v: |
| 23836 | case VE::PVANDLOvv: |
| 23837 | case VE::PVANDLOvvL: |
| 23838 | case VE::PVANDLOvvL_v: |
| 23839 | case VE::PVANDLOvv_v: |
| 23840 | case VE::PVANDLOvvl: |
| 23841 | case VE::PVANDLOvvl_v: |
| 23842 | case VE::PVANDUPvv: |
| 23843 | case VE::PVANDUPvvL: |
| 23844 | case VE::PVANDUPvvL_v: |
| 23845 | case VE::PVANDUPvv_v: |
| 23846 | case VE::PVANDUPvvl: |
| 23847 | case VE::PVANDUPvvl_v: |
| 23848 | case VE::PVANDvv: |
| 23849 | case VE::PVANDvvL: |
| 23850 | case VE::PVANDvvL_v: |
| 23851 | case VE::PVANDvv_v: |
| 23852 | case VE::PVANDvvl: |
| 23853 | case VE::PVANDvvl_v: |
| 23854 | case VE::PVCMPSLOvv: |
| 23855 | case VE::PVCMPSLOvvL: |
| 23856 | case VE::PVCMPSLOvvL_v: |
| 23857 | case VE::PVCMPSLOvv_v: |
| 23858 | case VE::PVCMPSLOvvl: |
| 23859 | case VE::PVCMPSLOvvl_v: |
| 23860 | case VE::PVCMPSUPvv: |
| 23861 | case VE::PVCMPSUPvvL: |
| 23862 | case VE::PVCMPSUPvvL_v: |
| 23863 | case VE::PVCMPSUPvv_v: |
| 23864 | case VE::PVCMPSUPvvl: |
| 23865 | case VE::PVCMPSUPvvl_v: |
| 23866 | case VE::PVCMPSvv: |
| 23867 | case VE::PVCMPSvvL: |
| 23868 | case VE::PVCMPSvvL_v: |
| 23869 | case VE::PVCMPSvv_v: |
| 23870 | case VE::PVCMPSvvl: |
| 23871 | case VE::PVCMPSvvl_v: |
| 23872 | case VE::PVCMPULOvv: |
| 23873 | case VE::PVCMPULOvvL: |
| 23874 | case VE::PVCMPULOvvL_v: |
| 23875 | case VE::PVCMPULOvv_v: |
| 23876 | case VE::PVCMPULOvvl: |
| 23877 | case VE::PVCMPULOvvl_v: |
| 23878 | case VE::PVCMPUUPvv: |
| 23879 | case VE::PVCMPUUPvvL: |
| 23880 | case VE::PVCMPUUPvvL_v: |
| 23881 | case VE::PVCMPUUPvv_v: |
| 23882 | case VE::PVCMPUUPvvl: |
| 23883 | case VE::PVCMPUUPvvl_v: |
| 23884 | case VE::PVCMPUvv: |
| 23885 | case VE::PVCMPUvvL: |
| 23886 | case VE::PVCMPUvvL_v: |
| 23887 | case VE::PVCMPUvv_v: |
| 23888 | case VE::PVCMPUvvl: |
| 23889 | case VE::PVCMPUvvl_v: |
| 23890 | case VE::PVEQVLOvv: |
| 23891 | case VE::PVEQVLOvvL: |
| 23892 | case VE::PVEQVLOvvL_v: |
| 23893 | case VE::PVEQVLOvv_v: |
| 23894 | case VE::PVEQVLOvvl: |
| 23895 | case VE::PVEQVLOvvl_v: |
| 23896 | case VE::PVEQVUPvv: |
| 23897 | case VE::PVEQVUPvvL: |
| 23898 | case VE::PVEQVUPvvL_v: |
| 23899 | case VE::PVEQVUPvv_v: |
| 23900 | case VE::PVEQVUPvvl: |
| 23901 | case VE::PVEQVUPvvl_v: |
| 23902 | case VE::PVEQVvv: |
| 23903 | case VE::PVEQVvvL: |
| 23904 | case VE::PVEQVvvL_v: |
| 23905 | case VE::PVEQVvv_v: |
| 23906 | case VE::PVEQVvvl: |
| 23907 | case VE::PVEQVvvl_v: |
| 23908 | case VE::PVFADDLOvv: |
| 23909 | case VE::PVFADDLOvvL: |
| 23910 | case VE::PVFADDLOvvL_v: |
| 23911 | case VE::PVFADDLOvv_v: |
| 23912 | case VE::PVFADDLOvvl: |
| 23913 | case VE::PVFADDLOvvl_v: |
| 23914 | case VE::PVFADDUPvv: |
| 23915 | case VE::PVFADDUPvvL: |
| 23916 | case VE::PVFADDUPvvL_v: |
| 23917 | case VE::PVFADDUPvv_v: |
| 23918 | case VE::PVFADDUPvvl: |
| 23919 | case VE::PVFADDUPvvl_v: |
| 23920 | case VE::PVFADDvv: |
| 23921 | case VE::PVFADDvvL: |
| 23922 | case VE::PVFADDvvL_v: |
| 23923 | case VE::PVFADDvv_v: |
| 23924 | case VE::PVFADDvvl: |
| 23925 | case VE::PVFADDvvl_v: |
| 23926 | case VE::PVFCMPLOvv: |
| 23927 | case VE::PVFCMPLOvvL: |
| 23928 | case VE::PVFCMPLOvvL_v: |
| 23929 | case VE::PVFCMPLOvv_v: |
| 23930 | case VE::PVFCMPLOvvl: |
| 23931 | case VE::PVFCMPLOvvl_v: |
| 23932 | case VE::PVFCMPUPvv: |
| 23933 | case VE::PVFCMPUPvvL: |
| 23934 | case VE::PVFCMPUPvvL_v: |
| 23935 | case VE::PVFCMPUPvv_v: |
| 23936 | case VE::PVFCMPUPvvl: |
| 23937 | case VE::PVFCMPUPvvl_v: |
| 23938 | case VE::PVFCMPvv: |
| 23939 | case VE::PVFCMPvvL: |
| 23940 | case VE::PVFCMPvvL_v: |
| 23941 | case VE::PVFCMPvv_v: |
| 23942 | case VE::PVFCMPvvl: |
| 23943 | case VE::PVFCMPvvl_v: |
| 23944 | case VE::PVFMAXLOvv: |
| 23945 | case VE::PVFMAXLOvvL: |
| 23946 | case VE::PVFMAXLOvvL_v: |
| 23947 | case VE::PVFMAXLOvv_v: |
| 23948 | case VE::PVFMAXLOvvl: |
| 23949 | case VE::PVFMAXLOvvl_v: |
| 23950 | case VE::PVFMAXUPvv: |
| 23951 | case VE::PVFMAXUPvvL: |
| 23952 | case VE::PVFMAXUPvvL_v: |
| 23953 | case VE::PVFMAXUPvv_v: |
| 23954 | case VE::PVFMAXUPvvl: |
| 23955 | case VE::PVFMAXUPvvl_v: |
| 23956 | case VE::PVFMAXvv: |
| 23957 | case VE::PVFMAXvvL: |
| 23958 | case VE::PVFMAXvvL_v: |
| 23959 | case VE::PVFMAXvv_v: |
| 23960 | case VE::PVFMAXvvl: |
| 23961 | case VE::PVFMAXvvl_v: |
| 23962 | case VE::PVFMINLOvv: |
| 23963 | case VE::PVFMINLOvvL: |
| 23964 | case VE::PVFMINLOvvL_v: |
| 23965 | case VE::PVFMINLOvv_v: |
| 23966 | case VE::PVFMINLOvvl: |
| 23967 | case VE::PVFMINLOvvl_v: |
| 23968 | case VE::PVFMINUPvv: |
| 23969 | case VE::PVFMINUPvvL: |
| 23970 | case VE::PVFMINUPvvL_v: |
| 23971 | case VE::PVFMINUPvv_v: |
| 23972 | case VE::PVFMINUPvvl: |
| 23973 | case VE::PVFMINUPvvl_v: |
| 23974 | case VE::PVFMINvv: |
| 23975 | case VE::PVFMINvvL: |
| 23976 | case VE::PVFMINvvL_v: |
| 23977 | case VE::PVFMINvv_v: |
| 23978 | case VE::PVFMINvvl: |
| 23979 | case VE::PVFMINvvl_v: |
| 23980 | case VE::PVFMKSLOv: |
| 23981 | case VE::PVFMKSLOvL: |
| 23982 | case VE::PVFMKSLOvl: |
| 23983 | case VE::PVFMKSUPv: |
| 23984 | case VE::PVFMKSUPvL: |
| 23985 | case VE::PVFMKSUPvl: |
| 23986 | case VE::PVFMKWLOv: |
| 23987 | case VE::PVFMKWLOvL: |
| 23988 | case VE::PVFMKWLOvl: |
| 23989 | case VE::PVFMKWUPv: |
| 23990 | case VE::PVFMKWUPvL: |
| 23991 | case VE::PVFMKWUPvl: |
| 23992 | case VE::PVFMULLOvv: |
| 23993 | case VE::PVFMULLOvvL: |
| 23994 | case VE::PVFMULLOvvL_v: |
| 23995 | case VE::PVFMULLOvv_v: |
| 23996 | case VE::PVFMULLOvvl: |
| 23997 | case VE::PVFMULLOvvl_v: |
| 23998 | case VE::PVFMULUPvv: |
| 23999 | case VE::PVFMULUPvvL: |
| 24000 | case VE::PVFMULUPvvL_v: |
| 24001 | case VE::PVFMULUPvv_v: |
| 24002 | case VE::PVFMULUPvvl: |
| 24003 | case VE::PVFMULUPvvl_v: |
| 24004 | case VE::PVFMULvv: |
| 24005 | case VE::PVFMULvvL: |
| 24006 | case VE::PVFMULvvL_v: |
| 24007 | case VE::PVFMULvv_v: |
| 24008 | case VE::PVFMULvvl: |
| 24009 | case VE::PVFMULvvl_v: |
| 24010 | case VE::PVFSUBLOvv: |
| 24011 | case VE::PVFSUBLOvvL: |
| 24012 | case VE::PVFSUBLOvvL_v: |
| 24013 | case VE::PVFSUBLOvv_v: |
| 24014 | case VE::PVFSUBLOvvl: |
| 24015 | case VE::PVFSUBLOvvl_v: |
| 24016 | case VE::PVFSUBUPvv: |
| 24017 | case VE::PVFSUBUPvvL: |
| 24018 | case VE::PVFSUBUPvvL_v: |
| 24019 | case VE::PVFSUBUPvv_v: |
| 24020 | case VE::PVFSUBUPvvl: |
| 24021 | case VE::PVFSUBUPvvl_v: |
| 24022 | case VE::PVFSUBvv: |
| 24023 | case VE::PVFSUBvvL: |
| 24024 | case VE::PVFSUBvvL_v: |
| 24025 | case VE::PVFSUBvv_v: |
| 24026 | case VE::PVFSUBvvl: |
| 24027 | case VE::PVFSUBvvl_v: |
| 24028 | case VE::PVMAXSLOvv: |
| 24029 | case VE::PVMAXSLOvvL: |
| 24030 | case VE::PVMAXSLOvvL_v: |
| 24031 | case VE::PVMAXSLOvv_v: |
| 24032 | case VE::PVMAXSLOvvl: |
| 24033 | case VE::PVMAXSLOvvl_v: |
| 24034 | case VE::PVMAXSUPvv: |
| 24035 | case VE::PVMAXSUPvvL: |
| 24036 | case VE::PVMAXSUPvvL_v: |
| 24037 | case VE::PVMAXSUPvv_v: |
| 24038 | case VE::PVMAXSUPvvl: |
| 24039 | case VE::PVMAXSUPvvl_v: |
| 24040 | case VE::PVMAXSvv: |
| 24041 | case VE::PVMAXSvvL: |
| 24042 | case VE::PVMAXSvvL_v: |
| 24043 | case VE::PVMAXSvv_v: |
| 24044 | case VE::PVMAXSvvl: |
| 24045 | case VE::PVMAXSvvl_v: |
| 24046 | case VE::PVMINSLOvv: |
| 24047 | case VE::PVMINSLOvvL: |
| 24048 | case VE::PVMINSLOvvL_v: |
| 24049 | case VE::PVMINSLOvv_v: |
| 24050 | case VE::PVMINSLOvvl: |
| 24051 | case VE::PVMINSLOvvl_v: |
| 24052 | case VE::PVMINSUPvv: |
| 24053 | case VE::PVMINSUPvvL: |
| 24054 | case VE::PVMINSUPvvL_v: |
| 24055 | case VE::PVMINSUPvv_v: |
| 24056 | case VE::PVMINSUPvvl: |
| 24057 | case VE::PVMINSUPvvl_v: |
| 24058 | case VE::PVMINSvv: |
| 24059 | case VE::PVMINSvvL: |
| 24060 | case VE::PVMINSvvL_v: |
| 24061 | case VE::PVMINSvv_v: |
| 24062 | case VE::PVMINSvvl: |
| 24063 | case VE::PVMINSvvl_v: |
| 24064 | case VE::PVORLOvv: |
| 24065 | case VE::PVORLOvvL: |
| 24066 | case VE::PVORLOvvL_v: |
| 24067 | case VE::PVORLOvv_v: |
| 24068 | case VE::PVORLOvvl: |
| 24069 | case VE::PVORLOvvl_v: |
| 24070 | case VE::PVORUPvv: |
| 24071 | case VE::PVORUPvvL: |
| 24072 | case VE::PVORUPvvL_v: |
| 24073 | case VE::PVORUPvv_v: |
| 24074 | case VE::PVORUPvvl: |
| 24075 | case VE::PVORUPvvl_v: |
| 24076 | case VE::PVORvv: |
| 24077 | case VE::PVORvvL: |
| 24078 | case VE::PVORvvL_v: |
| 24079 | case VE::PVORvv_v: |
| 24080 | case VE::PVORvvl: |
| 24081 | case VE::PVORvvl_v: |
| 24082 | case VE::PVSUBSLOvv: |
| 24083 | case VE::PVSUBSLOvvL: |
| 24084 | case VE::PVSUBSLOvvL_v: |
| 24085 | case VE::PVSUBSLOvv_v: |
| 24086 | case VE::PVSUBSLOvvl: |
| 24087 | case VE::PVSUBSLOvvl_v: |
| 24088 | case VE::PVSUBSUPvv: |
| 24089 | case VE::PVSUBSUPvvL: |
| 24090 | case VE::PVSUBSUPvvL_v: |
| 24091 | case VE::PVSUBSUPvv_v: |
| 24092 | case VE::PVSUBSUPvvl: |
| 24093 | case VE::PVSUBSUPvvl_v: |
| 24094 | case VE::PVSUBSvv: |
| 24095 | case VE::PVSUBSvvL: |
| 24096 | case VE::PVSUBSvvL_v: |
| 24097 | case VE::PVSUBSvv_v: |
| 24098 | case VE::PVSUBSvvl: |
| 24099 | case VE::PVSUBSvvl_v: |
| 24100 | case VE::PVSUBULOvv: |
| 24101 | case VE::PVSUBULOvvL: |
| 24102 | case VE::PVSUBULOvvL_v: |
| 24103 | case VE::PVSUBULOvv_v: |
| 24104 | case VE::PVSUBULOvvl: |
| 24105 | case VE::PVSUBULOvvl_v: |
| 24106 | case VE::PVSUBUUPvv: |
| 24107 | case VE::PVSUBUUPvvL: |
| 24108 | case VE::PVSUBUUPvvL_v: |
| 24109 | case VE::PVSUBUUPvv_v: |
| 24110 | case VE::PVSUBUUPvvl: |
| 24111 | case VE::PVSUBUUPvvl_v: |
| 24112 | case VE::PVSUBUvv: |
| 24113 | case VE::PVSUBUvvL: |
| 24114 | case VE::PVSUBUvvL_v: |
| 24115 | case VE::PVSUBUvv_v: |
| 24116 | case VE::PVSUBUvvl: |
| 24117 | case VE::PVSUBUvvl_v: |
| 24118 | case VE::PVXORLOvv: |
| 24119 | case VE::PVXORLOvvL: |
| 24120 | case VE::PVXORLOvvL_v: |
| 24121 | case VE::PVXORLOvv_v: |
| 24122 | case VE::PVXORLOvvl: |
| 24123 | case VE::PVXORLOvvl_v: |
| 24124 | case VE::PVXORUPvv: |
| 24125 | case VE::PVXORUPvvL: |
| 24126 | case VE::PVXORUPvvL_v: |
| 24127 | case VE::PVXORUPvv_v: |
| 24128 | case VE::PVXORUPvvl: |
| 24129 | case VE::PVXORUPvvl_v: |
| 24130 | case VE::PVXORvv: |
| 24131 | case VE::PVXORvvL: |
| 24132 | case VE::PVXORvvL_v: |
| 24133 | case VE::PVXORvv_v: |
| 24134 | case VE::PVXORvvl: |
| 24135 | case VE::PVXORvvl_v: |
| 24136 | case VE::VADDSLvv: |
| 24137 | case VE::VADDSLvvL: |
| 24138 | case VE::VADDSLvvL_v: |
| 24139 | case VE::VADDSLvv_v: |
| 24140 | case VE::VADDSLvvl: |
| 24141 | case VE::VADDSLvvl_v: |
| 24142 | case VE::VADDSWSXvv: |
| 24143 | case VE::VADDSWSXvvL: |
| 24144 | case VE::VADDSWSXvvL_v: |
| 24145 | case VE::VADDSWSXvv_v: |
| 24146 | case VE::VADDSWSXvvl: |
| 24147 | case VE::VADDSWSXvvl_v: |
| 24148 | case VE::VADDSWZXvv: |
| 24149 | case VE::VADDSWZXvvL: |
| 24150 | case VE::VADDSWZXvvL_v: |
| 24151 | case VE::VADDSWZXvv_v: |
| 24152 | case VE::VADDSWZXvvl: |
| 24153 | case VE::VADDSWZXvvl_v: |
| 24154 | case VE::VADDULvv: |
| 24155 | case VE::VADDULvvL: |
| 24156 | case VE::VADDULvvL_v: |
| 24157 | case VE::VADDULvv_v: |
| 24158 | case VE::VADDULvvl: |
| 24159 | case VE::VADDULvvl_v: |
| 24160 | case VE::VADDUWvv: |
| 24161 | case VE::VADDUWvvL: |
| 24162 | case VE::VADDUWvvL_v: |
| 24163 | case VE::VADDUWvv_v: |
| 24164 | case VE::VADDUWvvl: |
| 24165 | case VE::VADDUWvvl_v: |
| 24166 | case VE::VANDvv: |
| 24167 | case VE::VANDvvL: |
| 24168 | case VE::VANDvvL_v: |
| 24169 | case VE::VANDvv_v: |
| 24170 | case VE::VANDvvl: |
| 24171 | case VE::VANDvvl_v: |
| 24172 | case VE::VCMPSLvv: |
| 24173 | case VE::VCMPSLvvL: |
| 24174 | case VE::VCMPSLvvL_v: |
| 24175 | case VE::VCMPSLvv_v: |
| 24176 | case VE::VCMPSLvvl: |
| 24177 | case VE::VCMPSLvvl_v: |
| 24178 | case VE::VCMPSWSXvv: |
| 24179 | case VE::VCMPSWSXvvL: |
| 24180 | case VE::VCMPSWSXvvL_v: |
| 24181 | case VE::VCMPSWSXvv_v: |
| 24182 | case VE::VCMPSWSXvvl: |
| 24183 | case VE::VCMPSWSXvvl_v: |
| 24184 | case VE::VCMPSWZXvv: |
| 24185 | case VE::VCMPSWZXvvL: |
| 24186 | case VE::VCMPSWZXvvL_v: |
| 24187 | case VE::VCMPSWZXvv_v: |
| 24188 | case VE::VCMPSWZXvvl: |
| 24189 | case VE::VCMPSWZXvvl_v: |
| 24190 | case VE::VCMPULvv: |
| 24191 | case VE::VCMPULvvL: |
| 24192 | case VE::VCMPULvvL_v: |
| 24193 | case VE::VCMPULvv_v: |
| 24194 | case VE::VCMPULvvl: |
| 24195 | case VE::VCMPULvvl_v: |
| 24196 | case VE::VCMPUWvv: |
| 24197 | case VE::VCMPUWvvL: |
| 24198 | case VE::VCMPUWvvL_v: |
| 24199 | case VE::VCMPUWvv_v: |
| 24200 | case VE::VCMPUWvvl: |
| 24201 | case VE::VCMPUWvvl_v: |
| 24202 | case VE::VDIVSLvv: |
| 24203 | case VE::VDIVSLvvL: |
| 24204 | case VE::VDIVSLvvL_v: |
| 24205 | case VE::VDIVSLvv_v: |
| 24206 | case VE::VDIVSLvvl: |
| 24207 | case VE::VDIVSLvvl_v: |
| 24208 | case VE::VDIVSWSXvv: |
| 24209 | case VE::VDIVSWSXvvL: |
| 24210 | case VE::VDIVSWSXvvL_v: |
| 24211 | case VE::VDIVSWSXvv_v: |
| 24212 | case VE::VDIVSWSXvvl: |
| 24213 | case VE::VDIVSWSXvvl_v: |
| 24214 | case VE::VDIVSWZXvv: |
| 24215 | case VE::VDIVSWZXvvL: |
| 24216 | case VE::VDIVSWZXvvL_v: |
| 24217 | case VE::VDIVSWZXvv_v: |
| 24218 | case VE::VDIVSWZXvvl: |
| 24219 | case VE::VDIVSWZXvvl_v: |
| 24220 | case VE::VDIVULvv: |
| 24221 | case VE::VDIVULvvL: |
| 24222 | case VE::VDIVULvvL_v: |
| 24223 | case VE::VDIVULvv_v: |
| 24224 | case VE::VDIVULvvl: |
| 24225 | case VE::VDIVULvvl_v: |
| 24226 | case VE::VDIVUWvv: |
| 24227 | case VE::VDIVUWvvL: |
| 24228 | case VE::VDIVUWvvL_v: |
| 24229 | case VE::VDIVUWvv_v: |
| 24230 | case VE::VDIVUWvvl: |
| 24231 | case VE::VDIVUWvvl_v: |
| 24232 | case VE::VEQVvv: |
| 24233 | case VE::VEQVvvL: |
| 24234 | case VE::VEQVvvL_v: |
| 24235 | case VE::VEQVvv_v: |
| 24236 | case VE::VEQVvvl: |
| 24237 | case VE::VEQVvvl_v: |
| 24238 | case VE::VFADDDvv: |
| 24239 | case VE::VFADDDvvL: |
| 24240 | case VE::VFADDDvvL_v: |
| 24241 | case VE::VFADDDvv_v: |
| 24242 | case VE::VFADDDvvl: |
| 24243 | case VE::VFADDDvvl_v: |
| 24244 | case VE::VFADDSvv: |
| 24245 | case VE::VFADDSvvL: |
| 24246 | case VE::VFADDSvvL_v: |
| 24247 | case VE::VFADDSvv_v: |
| 24248 | case VE::VFADDSvvl: |
| 24249 | case VE::VFADDSvvl_v: |
| 24250 | case VE::VFCMPDvv: |
| 24251 | case VE::VFCMPDvvL: |
| 24252 | case VE::VFCMPDvvL_v: |
| 24253 | case VE::VFCMPDvv_v: |
| 24254 | case VE::VFCMPDvvl: |
| 24255 | case VE::VFCMPDvvl_v: |
| 24256 | case VE::VFCMPSvv: |
| 24257 | case VE::VFCMPSvvL: |
| 24258 | case VE::VFCMPSvvL_v: |
| 24259 | case VE::VFCMPSvv_v: |
| 24260 | case VE::VFCMPSvvl: |
| 24261 | case VE::VFCMPSvvl_v: |
| 24262 | case VE::VFDIVDvv: |
| 24263 | case VE::VFDIVDvvL: |
| 24264 | case VE::VFDIVDvvL_v: |
| 24265 | case VE::VFDIVDvv_v: |
| 24266 | case VE::VFDIVDvvl: |
| 24267 | case VE::VFDIVDvvl_v: |
| 24268 | case VE::VFDIVSvv: |
| 24269 | case VE::VFDIVSvvL: |
| 24270 | case VE::VFDIVSvvL_v: |
| 24271 | case VE::VFDIVSvv_v: |
| 24272 | case VE::VFDIVSvvl: |
| 24273 | case VE::VFDIVSvvl_v: |
| 24274 | case VE::VFMAXDvv: |
| 24275 | case VE::VFMAXDvvL: |
| 24276 | case VE::VFMAXDvvL_v: |
| 24277 | case VE::VFMAXDvv_v: |
| 24278 | case VE::VFMAXDvvl: |
| 24279 | case VE::VFMAXDvvl_v: |
| 24280 | case VE::VFMAXSvv: |
| 24281 | case VE::VFMAXSvvL: |
| 24282 | case VE::VFMAXSvvL_v: |
| 24283 | case VE::VFMAXSvv_v: |
| 24284 | case VE::VFMAXSvvl: |
| 24285 | case VE::VFMAXSvvl_v: |
| 24286 | case VE::VFMINDvv: |
| 24287 | case VE::VFMINDvvL: |
| 24288 | case VE::VFMINDvvL_v: |
| 24289 | case VE::VFMINDvv_v: |
| 24290 | case VE::VFMINDvvl: |
| 24291 | case VE::VFMINDvvl_v: |
| 24292 | case VE::VFMINSvv: |
| 24293 | case VE::VFMINSvvL: |
| 24294 | case VE::VFMINSvvL_v: |
| 24295 | case VE::VFMINSvv_v: |
| 24296 | case VE::VFMINSvvl: |
| 24297 | case VE::VFMINSvvl_v: |
| 24298 | case VE::VFMKDv: |
| 24299 | case VE::VFMKDvL: |
| 24300 | case VE::VFMKDvl: |
| 24301 | case VE::VFMKLv: |
| 24302 | case VE::VFMKLvL: |
| 24303 | case VE::VFMKLvl: |
| 24304 | case VE::VFMKSv: |
| 24305 | case VE::VFMKSvL: |
| 24306 | case VE::VFMKSvl: |
| 24307 | case VE::VFMKWv: |
| 24308 | case VE::VFMKWvL: |
| 24309 | case VE::VFMKWvl: |
| 24310 | case VE::VFMULDvv: |
| 24311 | case VE::VFMULDvvL: |
| 24312 | case VE::VFMULDvvL_v: |
| 24313 | case VE::VFMULDvv_v: |
| 24314 | case VE::VFMULDvvl: |
| 24315 | case VE::VFMULDvvl_v: |
| 24316 | case VE::VFMULSvv: |
| 24317 | case VE::VFMULSvvL: |
| 24318 | case VE::VFMULSvvL_v: |
| 24319 | case VE::VFMULSvv_v: |
| 24320 | case VE::VFMULSvvl: |
| 24321 | case VE::VFMULSvvl_v: |
| 24322 | case VE::VFSUBDvv: |
| 24323 | case VE::VFSUBDvvL: |
| 24324 | case VE::VFSUBDvvL_v: |
| 24325 | case VE::VFSUBDvv_v: |
| 24326 | case VE::VFSUBDvvl: |
| 24327 | case VE::VFSUBDvvl_v: |
| 24328 | case VE::VFSUBSvv: |
| 24329 | case VE::VFSUBSvvL: |
| 24330 | case VE::VFSUBSvvL_v: |
| 24331 | case VE::VFSUBSvv_v: |
| 24332 | case VE::VFSUBSvvl: |
| 24333 | case VE::VFSUBSvvl_v: |
| 24334 | case VE::VMAXSLvv: |
| 24335 | case VE::VMAXSLvvL: |
| 24336 | case VE::VMAXSLvvL_v: |
| 24337 | case VE::VMAXSLvv_v: |
| 24338 | case VE::VMAXSLvvl: |
| 24339 | case VE::VMAXSLvvl_v: |
| 24340 | case VE::VMAXSWSXvv: |
| 24341 | case VE::VMAXSWSXvvL: |
| 24342 | case VE::VMAXSWSXvvL_v: |
| 24343 | case VE::VMAXSWSXvv_v: |
| 24344 | case VE::VMAXSWSXvvl: |
| 24345 | case VE::VMAXSWSXvvl_v: |
| 24346 | case VE::VMAXSWZXvv: |
| 24347 | case VE::VMAXSWZXvvL: |
| 24348 | case VE::VMAXSWZXvvL_v: |
| 24349 | case VE::VMAXSWZXvv_v: |
| 24350 | case VE::VMAXSWZXvvl: |
| 24351 | case VE::VMAXSWZXvvl_v: |
| 24352 | case VE::VMINSLvv: |
| 24353 | case VE::VMINSLvvL: |
| 24354 | case VE::VMINSLvvL_v: |
| 24355 | case VE::VMINSLvv_v: |
| 24356 | case VE::VMINSLvvl: |
| 24357 | case VE::VMINSLvvl_v: |
| 24358 | case VE::VMINSWSXvv: |
| 24359 | case VE::VMINSWSXvvL: |
| 24360 | case VE::VMINSWSXvvL_v: |
| 24361 | case VE::VMINSWSXvv_v: |
| 24362 | case VE::VMINSWSXvvl: |
| 24363 | case VE::VMINSWSXvvl_v: |
| 24364 | case VE::VMINSWZXvv: |
| 24365 | case VE::VMINSWZXvvL: |
| 24366 | case VE::VMINSWZXvvL_v: |
| 24367 | case VE::VMINSWZXvv_v: |
| 24368 | case VE::VMINSWZXvvl: |
| 24369 | case VE::VMINSWZXvvl_v: |
| 24370 | case VE::VMRGWvv: |
| 24371 | case VE::VMRGWvvL: |
| 24372 | case VE::VMRGWvvL_v: |
| 24373 | case VE::VMRGWvv_v: |
| 24374 | case VE::VMRGWvvl: |
| 24375 | case VE::VMRGWvvl_v: |
| 24376 | case VE::VMRGvv: |
| 24377 | case VE::VMRGvvL: |
| 24378 | case VE::VMRGvvL_v: |
| 24379 | case VE::VMRGvv_v: |
| 24380 | case VE::VMRGvvl: |
| 24381 | case VE::VMRGvvl_v: |
| 24382 | case VE::VMULSLWvv: |
| 24383 | case VE::VMULSLWvvL: |
| 24384 | case VE::VMULSLWvvL_v: |
| 24385 | case VE::VMULSLWvv_v: |
| 24386 | case VE::VMULSLWvvl: |
| 24387 | case VE::VMULSLWvvl_v: |
| 24388 | case VE::VMULSLvv: |
| 24389 | case VE::VMULSLvvL: |
| 24390 | case VE::VMULSLvvL_v: |
| 24391 | case VE::VMULSLvv_v: |
| 24392 | case VE::VMULSLvvl: |
| 24393 | case VE::VMULSLvvl_v: |
| 24394 | case VE::VMULSWSXvv: |
| 24395 | case VE::VMULSWSXvvL: |
| 24396 | case VE::VMULSWSXvvL_v: |
| 24397 | case VE::VMULSWSXvv_v: |
| 24398 | case VE::VMULSWSXvvl: |
| 24399 | case VE::VMULSWSXvvl_v: |
| 24400 | case VE::VMULSWZXvv: |
| 24401 | case VE::VMULSWZXvvL: |
| 24402 | case VE::VMULSWZXvvL_v: |
| 24403 | case VE::VMULSWZXvv_v: |
| 24404 | case VE::VMULSWZXvvl: |
| 24405 | case VE::VMULSWZXvvl_v: |
| 24406 | case VE::VMULULvv: |
| 24407 | case VE::VMULULvvL: |
| 24408 | case VE::VMULULvvL_v: |
| 24409 | case VE::VMULULvv_v: |
| 24410 | case VE::VMULULvvl: |
| 24411 | case VE::VMULULvvl_v: |
| 24412 | case VE::VMULUWvv: |
| 24413 | case VE::VMULUWvvL: |
| 24414 | case VE::VMULUWvvL_v: |
| 24415 | case VE::VMULUWvv_v: |
| 24416 | case VE::VMULUWvvl: |
| 24417 | case VE::VMULUWvvl_v: |
| 24418 | case VE::VORvv: |
| 24419 | case VE::VORvvL: |
| 24420 | case VE::VORvvL_v: |
| 24421 | case VE::VORvv_v: |
| 24422 | case VE::VORvvl: |
| 24423 | case VE::VORvvl_v: |
| 24424 | case VE::VSUBSLvv: |
| 24425 | case VE::VSUBSLvvL: |
| 24426 | case VE::VSUBSLvvL_v: |
| 24427 | case VE::VSUBSLvv_v: |
| 24428 | case VE::VSUBSLvvl: |
| 24429 | case VE::VSUBSLvvl_v: |
| 24430 | case VE::VSUBSWSXvv: |
| 24431 | case VE::VSUBSWSXvvL: |
| 24432 | case VE::VSUBSWSXvvL_v: |
| 24433 | case VE::VSUBSWSXvv_v: |
| 24434 | case VE::VSUBSWSXvvl: |
| 24435 | case VE::VSUBSWSXvvl_v: |
| 24436 | case VE::VSUBSWZXvv: |
| 24437 | case VE::VSUBSWZXvvL: |
| 24438 | case VE::VSUBSWZXvvL_v: |
| 24439 | case VE::VSUBSWZXvv_v: |
| 24440 | case VE::VSUBSWZXvvl: |
| 24441 | case VE::VSUBSWZXvvl_v: |
| 24442 | case VE::VSUBULvv: |
| 24443 | case VE::VSUBULvvL: |
| 24444 | case VE::VSUBULvvL_v: |
| 24445 | case VE::VSUBULvv_v: |
| 24446 | case VE::VSUBULvvl: |
| 24447 | case VE::VSUBULvvl_v: |
| 24448 | case VE::VSUBUWvv: |
| 24449 | case VE::VSUBUWvvL: |
| 24450 | case VE::VSUBUWvvL_v: |
| 24451 | case VE::VSUBUWvv_v: |
| 24452 | case VE::VSUBUWvvl: |
| 24453 | case VE::VSUBUWvvl_v: |
| 24454 | case VE::VXORvv: |
| 24455 | case VE::VXORvvL: |
| 24456 | case VE::VXORvvL_v: |
| 24457 | case VE::VXORvv_v: |
| 24458 | case VE::VXORvvl: |
| 24459 | case VE::VXORvvl_v: |
| 24460 | case VE::XORMmm: { |
| 24461 | switch (OpNum) { |
| 24462 | case 0: |
| 24463 | // op: vx |
| 24464 | return 24; |
| 24465 | case 1: |
| 24466 | // op: vy |
| 24467 | return 16; |
| 24468 | case 2: |
| 24469 | // op: vz |
| 24470 | return 8; |
| 24471 | } |
| 24472 | break; |
| 24473 | } |
| 24474 | case VE::NEGMm: |
| 24475 | case VE::PVCVTSWLOv: |
| 24476 | case VE::PVCVTSWLOvL: |
| 24477 | case VE::PVCVTSWLOvL_v: |
| 24478 | case VE::PVCVTSWLOv_v: |
| 24479 | case VE::PVCVTSWLOvl: |
| 24480 | case VE::PVCVTSWLOvl_v: |
| 24481 | case VE::PVCVTSWUPv: |
| 24482 | case VE::PVCVTSWUPvL: |
| 24483 | case VE::PVCVTSWUPvL_v: |
| 24484 | case VE::PVCVTSWUPv_v: |
| 24485 | case VE::PVCVTSWUPvl: |
| 24486 | case VE::PVCVTSWUPvl_v: |
| 24487 | case VE::PVCVTSWv: |
| 24488 | case VE::PVCVTSWvL: |
| 24489 | case VE::PVCVTSWvL_v: |
| 24490 | case VE::PVCVTSWv_v: |
| 24491 | case VE::PVCVTSWvl: |
| 24492 | case VE::PVCVTSWvl_v: |
| 24493 | case VE::PVRCPLOv: |
| 24494 | case VE::PVRCPLOvL: |
| 24495 | case VE::PVRCPLOvL_v: |
| 24496 | case VE::PVRCPLOv_v: |
| 24497 | case VE::PVRCPLOvl: |
| 24498 | case VE::PVRCPLOvl_v: |
| 24499 | case VE::PVRCPUPv: |
| 24500 | case VE::PVRCPUPvL: |
| 24501 | case VE::PVRCPUPvL_v: |
| 24502 | case VE::PVRCPUPv_v: |
| 24503 | case VE::PVRCPUPvl: |
| 24504 | case VE::PVRCPUPvl_v: |
| 24505 | case VE::PVRCPv: |
| 24506 | case VE::PVRCPvL: |
| 24507 | case VE::PVRCPvL_v: |
| 24508 | case VE::PVRCPv_v: |
| 24509 | case VE::PVRCPvl: |
| 24510 | case VE::PVRCPvl_v: |
| 24511 | case VE::PVRSQRTLONEXv: |
| 24512 | case VE::PVRSQRTLONEXvL: |
| 24513 | case VE::PVRSQRTLONEXvL_v: |
| 24514 | case VE::PVRSQRTLONEXv_v: |
| 24515 | case VE::PVRSQRTLONEXvl: |
| 24516 | case VE::PVRSQRTLONEXvl_v: |
| 24517 | case VE::PVRSQRTLOv: |
| 24518 | case VE::PVRSQRTLOvL: |
| 24519 | case VE::PVRSQRTLOvL_v: |
| 24520 | case VE::PVRSQRTLOv_v: |
| 24521 | case VE::PVRSQRTLOvl: |
| 24522 | case VE::PVRSQRTLOvl_v: |
| 24523 | case VE::PVRSQRTNEXv: |
| 24524 | case VE::PVRSQRTNEXvL: |
| 24525 | case VE::PVRSQRTNEXvL_v: |
| 24526 | case VE::PVRSQRTNEXv_v: |
| 24527 | case VE::PVRSQRTNEXvl: |
| 24528 | case VE::PVRSQRTNEXvl_v: |
| 24529 | case VE::PVRSQRTUPNEXv: |
| 24530 | case VE::PVRSQRTUPNEXvL: |
| 24531 | case VE::PVRSQRTUPNEXvL_v: |
| 24532 | case VE::PVRSQRTUPNEXv_v: |
| 24533 | case VE::PVRSQRTUPNEXvl: |
| 24534 | case VE::PVRSQRTUPNEXvl_v: |
| 24535 | case VE::PVRSQRTUPv: |
| 24536 | case VE::PVRSQRTUPvL: |
| 24537 | case VE::PVRSQRTUPvL_v: |
| 24538 | case VE::PVRSQRTUPv_v: |
| 24539 | case VE::PVRSQRTUPvl: |
| 24540 | case VE::PVRSQRTUPvl_v: |
| 24541 | case VE::PVRSQRTv: |
| 24542 | case VE::PVRSQRTvL: |
| 24543 | case VE::PVRSQRTvL_v: |
| 24544 | case VE::PVRSQRTv_v: |
| 24545 | case VE::PVRSQRTvl: |
| 24546 | case VE::PVRSQRTvl_v: |
| 24547 | case VE::VCVTDLv: |
| 24548 | case VE::VCVTDLvL: |
| 24549 | case VE::VCVTDLvL_v: |
| 24550 | case VE::VCVTDLv_v: |
| 24551 | case VE::VCVTDLvl: |
| 24552 | case VE::VCVTDLvl_v: |
| 24553 | case VE::VCVTDSv: |
| 24554 | case VE::VCVTDSvL: |
| 24555 | case VE::VCVTDSvL_v: |
| 24556 | case VE::VCVTDSv_v: |
| 24557 | case VE::VCVTDSvl: |
| 24558 | case VE::VCVTDSvl_v: |
| 24559 | case VE::VCVTDWv: |
| 24560 | case VE::VCVTDWvL: |
| 24561 | case VE::VCVTDWvL_v: |
| 24562 | case VE::VCVTDWv_v: |
| 24563 | case VE::VCVTDWvl: |
| 24564 | case VE::VCVTDWvl_v: |
| 24565 | case VE::VCVTSDv: |
| 24566 | case VE::VCVTSDvL: |
| 24567 | case VE::VCVTSDvL_v: |
| 24568 | case VE::VCVTSDv_v: |
| 24569 | case VE::VCVTSDvl: |
| 24570 | case VE::VCVTSDvl_v: |
| 24571 | case VE::VCVTSWv: |
| 24572 | case VE::VCVTSWvL: |
| 24573 | case VE::VCVTSWvL_v: |
| 24574 | case VE::VCVTSWv_v: |
| 24575 | case VE::VCVTSWvl: |
| 24576 | case VE::VCVTSWvl_v: |
| 24577 | case VE::VFRMAXDFSTv: |
| 24578 | case VE::VFRMAXDFSTvL: |
| 24579 | case VE::VFRMAXDFSTvL_v: |
| 24580 | case VE::VFRMAXDFSTv_v: |
| 24581 | case VE::VFRMAXDFSTvl: |
| 24582 | case VE::VFRMAXDFSTvl_v: |
| 24583 | case VE::VFRMAXDLSTv: |
| 24584 | case VE::VFRMAXDLSTvL: |
| 24585 | case VE::VFRMAXDLSTvL_v: |
| 24586 | case VE::VFRMAXDLSTv_v: |
| 24587 | case VE::VFRMAXDLSTvl: |
| 24588 | case VE::VFRMAXDLSTvl_v: |
| 24589 | case VE::VFRMAXSFSTv: |
| 24590 | case VE::VFRMAXSFSTvL: |
| 24591 | case VE::VFRMAXSFSTvL_v: |
| 24592 | case VE::VFRMAXSFSTv_v: |
| 24593 | case VE::VFRMAXSFSTvl: |
| 24594 | case VE::VFRMAXSFSTvl_v: |
| 24595 | case VE::VFRMAXSLSTv: |
| 24596 | case VE::VFRMAXSLSTvL: |
| 24597 | case VE::VFRMAXSLSTvL_v: |
| 24598 | case VE::VFRMAXSLSTv_v: |
| 24599 | case VE::VFRMAXSLSTvl: |
| 24600 | case VE::VFRMAXSLSTvl_v: |
| 24601 | case VE::VFRMINDFSTv: |
| 24602 | case VE::VFRMINDFSTvL: |
| 24603 | case VE::VFRMINDFSTvL_v: |
| 24604 | case VE::VFRMINDFSTv_v: |
| 24605 | case VE::VFRMINDFSTvl: |
| 24606 | case VE::VFRMINDFSTvl_v: |
| 24607 | case VE::VFRMINDLSTv: |
| 24608 | case VE::VFRMINDLSTvL: |
| 24609 | case VE::VFRMINDLSTvL_v: |
| 24610 | case VE::VFRMINDLSTv_v: |
| 24611 | case VE::VFRMINDLSTvl: |
| 24612 | case VE::VFRMINDLSTvl_v: |
| 24613 | case VE::VFRMINSFSTv: |
| 24614 | case VE::VFRMINSFSTvL: |
| 24615 | case VE::VFRMINSFSTvL_v: |
| 24616 | case VE::VFRMINSFSTv_v: |
| 24617 | case VE::VFRMINSFSTvl: |
| 24618 | case VE::VFRMINSFSTvl_v: |
| 24619 | case VE::VFRMINSLSTv: |
| 24620 | case VE::VFRMINSLSTvL: |
| 24621 | case VE::VFRMINSLSTvL_v: |
| 24622 | case VE::VFRMINSLSTv_v: |
| 24623 | case VE::VFRMINSLSTvl: |
| 24624 | case VE::VFRMINSLSTvl_v: |
| 24625 | case VE::VFSQRTDv: |
| 24626 | case VE::VFSQRTDvL: |
| 24627 | case VE::VFSQRTDvL_v: |
| 24628 | case VE::VFSQRTDv_v: |
| 24629 | case VE::VFSQRTDvl: |
| 24630 | case VE::VFSQRTDvl_v: |
| 24631 | case VE::VFSQRTSv: |
| 24632 | case VE::VFSQRTSvL: |
| 24633 | case VE::VFSQRTSvL_v: |
| 24634 | case VE::VFSQRTSv_v: |
| 24635 | case VE::VFSQRTSvl: |
| 24636 | case VE::VFSQRTSvl_v: |
| 24637 | case VE::VFSUMDv: |
| 24638 | case VE::VFSUMDvL: |
| 24639 | case VE::VFSUMDvL_v: |
| 24640 | case VE::VFSUMDv_v: |
| 24641 | case VE::VFSUMDvl: |
| 24642 | case VE::VFSUMDvl_v: |
| 24643 | case VE::VFSUMSv: |
| 24644 | case VE::VFSUMSvL: |
| 24645 | case VE::VFSUMSvL_v: |
| 24646 | case VE::VFSUMSv_v: |
| 24647 | case VE::VFSUMSvl: |
| 24648 | case VE::VFSUMSvl_v: |
| 24649 | case VE::VRANDv: |
| 24650 | case VE::VRANDvL: |
| 24651 | case VE::VRANDvL_v: |
| 24652 | case VE::VRANDv_v: |
| 24653 | case VE::VRANDvl: |
| 24654 | case VE::VRANDvl_v: |
| 24655 | case VE::VRCPDv: |
| 24656 | case VE::VRCPDvL: |
| 24657 | case VE::VRCPDvL_v: |
| 24658 | case VE::VRCPDv_v: |
| 24659 | case VE::VRCPDvl: |
| 24660 | case VE::VRCPDvl_v: |
| 24661 | case VE::VRCPSv: |
| 24662 | case VE::VRCPSvL: |
| 24663 | case VE::VRCPSvL_v: |
| 24664 | case VE::VRCPSv_v: |
| 24665 | case VE::VRCPSvl: |
| 24666 | case VE::VRCPSvl_v: |
| 24667 | case VE::VRMAXSLFSTv: |
| 24668 | case VE::VRMAXSLFSTvL: |
| 24669 | case VE::VRMAXSLFSTvL_v: |
| 24670 | case VE::VRMAXSLFSTv_v: |
| 24671 | case VE::VRMAXSLFSTvl: |
| 24672 | case VE::VRMAXSLFSTvl_v: |
| 24673 | case VE::VRMAXSLLSTv: |
| 24674 | case VE::VRMAXSLLSTvL: |
| 24675 | case VE::VRMAXSLLSTvL_v: |
| 24676 | case VE::VRMAXSLLSTv_v: |
| 24677 | case VE::VRMAXSLLSTvl: |
| 24678 | case VE::VRMAXSLLSTvl_v: |
| 24679 | case VE::VRMAXSWFSTSXv: |
| 24680 | case VE::VRMAXSWFSTSXvL: |
| 24681 | case VE::VRMAXSWFSTSXvL_v: |
| 24682 | case VE::VRMAXSWFSTSXv_v: |
| 24683 | case VE::VRMAXSWFSTSXvl: |
| 24684 | case VE::VRMAXSWFSTSXvl_v: |
| 24685 | case VE::VRMAXSWFSTZXv: |
| 24686 | case VE::VRMAXSWFSTZXvL: |
| 24687 | case VE::VRMAXSWFSTZXvL_v: |
| 24688 | case VE::VRMAXSWFSTZXv_v: |
| 24689 | case VE::VRMAXSWFSTZXvl: |
| 24690 | case VE::VRMAXSWFSTZXvl_v: |
| 24691 | case VE::VRMAXSWLSTSXv: |
| 24692 | case VE::VRMAXSWLSTSXvL: |
| 24693 | case VE::VRMAXSWLSTSXvL_v: |
| 24694 | case VE::VRMAXSWLSTSXv_v: |
| 24695 | case VE::VRMAXSWLSTSXvl: |
| 24696 | case VE::VRMAXSWLSTSXvl_v: |
| 24697 | case VE::VRMAXSWLSTZXv: |
| 24698 | case VE::VRMAXSWLSTZXvL: |
| 24699 | case VE::VRMAXSWLSTZXvL_v: |
| 24700 | case VE::VRMAXSWLSTZXv_v: |
| 24701 | case VE::VRMAXSWLSTZXvl: |
| 24702 | case VE::VRMAXSWLSTZXvl_v: |
| 24703 | case VE::VRMINSLFSTv: |
| 24704 | case VE::VRMINSLFSTvL: |
| 24705 | case VE::VRMINSLFSTvL_v: |
| 24706 | case VE::VRMINSLFSTv_v: |
| 24707 | case VE::VRMINSLFSTvl: |
| 24708 | case VE::VRMINSLFSTvl_v: |
| 24709 | case VE::VRMINSLLSTv: |
| 24710 | case VE::VRMINSLLSTvL: |
| 24711 | case VE::VRMINSLLSTvL_v: |
| 24712 | case VE::VRMINSLLSTv_v: |
| 24713 | case VE::VRMINSLLSTvl: |
| 24714 | case VE::VRMINSLLSTvl_v: |
| 24715 | case VE::VRMINSWFSTSXv: |
| 24716 | case VE::VRMINSWFSTSXvL: |
| 24717 | case VE::VRMINSWFSTSXvL_v: |
| 24718 | case VE::VRMINSWFSTSXv_v: |
| 24719 | case VE::VRMINSWFSTSXvl: |
| 24720 | case VE::VRMINSWFSTSXvl_v: |
| 24721 | case VE::VRMINSWFSTZXv: |
| 24722 | case VE::VRMINSWFSTZXvL: |
| 24723 | case VE::VRMINSWFSTZXvL_v: |
| 24724 | case VE::VRMINSWFSTZXv_v: |
| 24725 | case VE::VRMINSWFSTZXvl: |
| 24726 | case VE::VRMINSWFSTZXvl_v: |
| 24727 | case VE::VRMINSWLSTSXv: |
| 24728 | case VE::VRMINSWLSTSXvL: |
| 24729 | case VE::VRMINSWLSTSXvL_v: |
| 24730 | case VE::VRMINSWLSTSXv_v: |
| 24731 | case VE::VRMINSWLSTSXvl: |
| 24732 | case VE::VRMINSWLSTSXvl_v: |
| 24733 | case VE::VRMINSWLSTZXv: |
| 24734 | case VE::VRMINSWLSTZXvL: |
| 24735 | case VE::VRMINSWLSTZXvL_v: |
| 24736 | case VE::VRMINSWLSTZXv_v: |
| 24737 | case VE::VRMINSWLSTZXvl: |
| 24738 | case VE::VRMINSWLSTZXvl_v: |
| 24739 | case VE::VRORv: |
| 24740 | case VE::VRORvL: |
| 24741 | case VE::VRORvL_v: |
| 24742 | case VE::VRORv_v: |
| 24743 | case VE::VRORvl: |
| 24744 | case VE::VRORvl_v: |
| 24745 | case VE::VRSQRTDNEXv: |
| 24746 | case VE::VRSQRTDNEXvL: |
| 24747 | case VE::VRSQRTDNEXvL_v: |
| 24748 | case VE::VRSQRTDNEXv_v: |
| 24749 | case VE::VRSQRTDNEXvl: |
| 24750 | case VE::VRSQRTDNEXvl_v: |
| 24751 | case VE::VRSQRTDv: |
| 24752 | case VE::VRSQRTDvL: |
| 24753 | case VE::VRSQRTDvL_v: |
| 24754 | case VE::VRSQRTDv_v: |
| 24755 | case VE::VRSQRTDvl: |
| 24756 | case VE::VRSQRTDvl_v: |
| 24757 | case VE::VRSQRTSNEXv: |
| 24758 | case VE::VRSQRTSNEXvL: |
| 24759 | case VE::VRSQRTSNEXvL_v: |
| 24760 | case VE::VRSQRTSNEXv_v: |
| 24761 | case VE::VRSQRTSNEXvl: |
| 24762 | case VE::VRSQRTSNEXvl_v: |
| 24763 | case VE::VRSQRTSv: |
| 24764 | case VE::VRSQRTSvL: |
| 24765 | case VE::VRSQRTSvL_v: |
| 24766 | case VE::VRSQRTSv_v: |
| 24767 | case VE::VRSQRTSvl: |
| 24768 | case VE::VRSQRTSvl_v: |
| 24769 | case VE::VRXORv: |
| 24770 | case VE::VRXORvL: |
| 24771 | case VE::VRXORvL_v: |
| 24772 | case VE::VRXORv_v: |
| 24773 | case VE::VRXORvl: |
| 24774 | case VE::VRXORvl_v: |
| 24775 | case VE::VSUMLv: |
| 24776 | case VE::VSUMLvL: |
| 24777 | case VE::VSUMLvL_v: |
| 24778 | case VE::VSUMLv_v: |
| 24779 | case VE::VSUMLvl: |
| 24780 | case VE::VSUMLvl_v: |
| 24781 | case VE::VSUMWSXv: |
| 24782 | case VE::VSUMWSXvL: |
| 24783 | case VE::VSUMWSXvL_v: |
| 24784 | case VE::VSUMWSXv_v: |
| 24785 | case VE::VSUMWSXvl: |
| 24786 | case VE::VSUMWSXvl_v: |
| 24787 | case VE::VSUMWZXv: |
| 24788 | case VE::VSUMWZXvL: |
| 24789 | case VE::VSUMWZXvL_v: |
| 24790 | case VE::VSUMWZXv_v: |
| 24791 | case VE::VSUMWZXvl: |
| 24792 | case VE::VSUMWZXvl_v: { |
| 24793 | switch (OpNum) { |
| 24794 | case 0: |
| 24795 | // op: vx |
| 24796 | return 24; |
| 24797 | case 1: |
| 24798 | // op: vy |
| 24799 | return 16; |
| 24800 | } |
| 24801 | break; |
| 24802 | } |
| 24803 | case VE::PVBRVLOv: |
| 24804 | case VE::PVBRVLOvL: |
| 24805 | case VE::PVBRVLOvL_v: |
| 24806 | case VE::PVBRVLOv_v: |
| 24807 | case VE::PVBRVLOvl: |
| 24808 | case VE::PVBRVLOvl_v: |
| 24809 | case VE::PVBRVUPv: |
| 24810 | case VE::PVBRVUPvL: |
| 24811 | case VE::PVBRVUPvL_v: |
| 24812 | case VE::PVBRVUPv_v: |
| 24813 | case VE::PVBRVUPvl: |
| 24814 | case VE::PVBRVUPvl_v: |
| 24815 | case VE::PVBRVv: |
| 24816 | case VE::PVBRVvL: |
| 24817 | case VE::PVBRVvL_v: |
| 24818 | case VE::PVBRVv_v: |
| 24819 | case VE::PVBRVvl: |
| 24820 | case VE::PVBRVvl_v: |
| 24821 | case VE::PVLDZLOv: |
| 24822 | case VE::PVLDZLOvL: |
| 24823 | case VE::PVLDZLOvL_v: |
| 24824 | case VE::PVLDZLOv_v: |
| 24825 | case VE::PVLDZLOvl: |
| 24826 | case VE::PVLDZLOvl_v: |
| 24827 | case VE::PVLDZUPv: |
| 24828 | case VE::PVLDZUPvL: |
| 24829 | case VE::PVLDZUPvL_v: |
| 24830 | case VE::PVLDZUPv_v: |
| 24831 | case VE::PVLDZUPvl: |
| 24832 | case VE::PVLDZUPvl_v: |
| 24833 | case VE::PVLDZv: |
| 24834 | case VE::PVLDZvL: |
| 24835 | case VE::PVLDZvL_v: |
| 24836 | case VE::PVLDZv_v: |
| 24837 | case VE::PVLDZvl: |
| 24838 | case VE::PVLDZvl_v: |
| 24839 | case VE::PVPCNTLOv: |
| 24840 | case VE::PVPCNTLOvL: |
| 24841 | case VE::PVPCNTLOvL_v: |
| 24842 | case VE::PVPCNTLOv_v: |
| 24843 | case VE::PVPCNTLOvl: |
| 24844 | case VE::PVPCNTLOvl_v: |
| 24845 | case VE::PVPCNTUPv: |
| 24846 | case VE::PVPCNTUPvL: |
| 24847 | case VE::PVPCNTUPvL_v: |
| 24848 | case VE::PVPCNTUPv_v: |
| 24849 | case VE::PVPCNTUPvl: |
| 24850 | case VE::PVPCNTUPvl_v: |
| 24851 | case VE::PVPCNTv: |
| 24852 | case VE::PVPCNTvL: |
| 24853 | case VE::PVPCNTvL_v: |
| 24854 | case VE::PVPCNTv_v: |
| 24855 | case VE::PVPCNTvl: |
| 24856 | case VE::PVPCNTvl_v: |
| 24857 | case VE::VBRVv: |
| 24858 | case VE::VBRVvL: |
| 24859 | case VE::VBRVvL_v: |
| 24860 | case VE::VBRVv_v: |
| 24861 | case VE::VBRVvl: |
| 24862 | case VE::VBRVvl_v: |
| 24863 | case VE::VCPv: |
| 24864 | case VE::VCPvL: |
| 24865 | case VE::VCPvL_v: |
| 24866 | case VE::VCPv_v: |
| 24867 | case VE::VCPvl: |
| 24868 | case VE::VCPvl_v: |
| 24869 | case VE::VEXv: |
| 24870 | case VE::VEXvL: |
| 24871 | case VE::VEXvL_v: |
| 24872 | case VE::VEXv_v: |
| 24873 | case VE::VEXvl: |
| 24874 | case VE::VEXvl_v: |
| 24875 | case VE::VLDZv: |
| 24876 | case VE::VLDZvL: |
| 24877 | case VE::VLDZvL_v: |
| 24878 | case VE::VLDZv_v: |
| 24879 | case VE::VLDZvl: |
| 24880 | case VE::VLDZvl_v: |
| 24881 | case VE::VPCNTv: |
| 24882 | case VE::VPCNTvL: |
| 24883 | case VE::VPCNTvL_v: |
| 24884 | case VE::VPCNTv_v: |
| 24885 | case VE::VPCNTvl: |
| 24886 | case VE::VPCNTvl_v: { |
| 24887 | switch (OpNum) { |
| 24888 | case 0: |
| 24889 | // op: vx |
| 24890 | return 24; |
| 24891 | case 1: |
| 24892 | // op: vz |
| 24893 | return 8; |
| 24894 | } |
| 24895 | break; |
| 24896 | } |
| 24897 | case VE::PVCVTWSLOv: |
| 24898 | case VE::PVCVTWSLOvL: |
| 24899 | case VE::PVCVTWSLOvL_v: |
| 24900 | case VE::PVCVTWSLOv_v: |
| 24901 | case VE::PVCVTWSLOvl: |
| 24902 | case VE::PVCVTWSLOvl_v: |
| 24903 | case VE::PVCVTWSUPv: |
| 24904 | case VE::PVCVTWSUPvL: |
| 24905 | case VE::PVCVTWSUPvL_v: |
| 24906 | case VE::PVCVTWSUPv_v: |
| 24907 | case VE::PVCVTWSUPvl: |
| 24908 | case VE::PVCVTWSUPvl_v: |
| 24909 | case VE::PVCVTWSv: |
| 24910 | case VE::PVCVTWSvL: |
| 24911 | case VE::PVCVTWSvL_v: |
| 24912 | case VE::PVCVTWSv_v: |
| 24913 | case VE::PVCVTWSvl: |
| 24914 | case VE::PVCVTWSvl_v: |
| 24915 | case VE::PVSLALOvv: |
| 24916 | case VE::PVSLALOvvL: |
| 24917 | case VE::PVSLALOvvL_v: |
| 24918 | case VE::PVSLALOvv_v: |
| 24919 | case VE::PVSLALOvvl: |
| 24920 | case VE::PVSLALOvvl_v: |
| 24921 | case VE::PVSLAUPvv: |
| 24922 | case VE::PVSLAUPvvL: |
| 24923 | case VE::PVSLAUPvvL_v: |
| 24924 | case VE::PVSLAUPvv_v: |
| 24925 | case VE::PVSLAUPvvl: |
| 24926 | case VE::PVSLAUPvvl_v: |
| 24927 | case VE::PVSLAvv: |
| 24928 | case VE::PVSLAvvL: |
| 24929 | case VE::PVSLAvvL_v: |
| 24930 | case VE::PVSLAvv_v: |
| 24931 | case VE::PVSLAvvl: |
| 24932 | case VE::PVSLAvvl_v: |
| 24933 | case VE::PVSLLLOvv: |
| 24934 | case VE::PVSLLLOvvL: |
| 24935 | case VE::PVSLLLOvvL_v: |
| 24936 | case VE::PVSLLLOvv_v: |
| 24937 | case VE::PVSLLLOvvl: |
| 24938 | case VE::PVSLLLOvvl_v: |
| 24939 | case VE::PVSLLUPvv: |
| 24940 | case VE::PVSLLUPvvL: |
| 24941 | case VE::PVSLLUPvvL_v: |
| 24942 | case VE::PVSLLUPvv_v: |
| 24943 | case VE::PVSLLUPvvl: |
| 24944 | case VE::PVSLLUPvvl_v: |
| 24945 | case VE::PVSLLvv: |
| 24946 | case VE::PVSLLvvL: |
| 24947 | case VE::PVSLLvvL_v: |
| 24948 | case VE::PVSLLvv_v: |
| 24949 | case VE::PVSLLvvl: |
| 24950 | case VE::PVSLLvvl_v: |
| 24951 | case VE::PVSRALOvv: |
| 24952 | case VE::PVSRALOvvL: |
| 24953 | case VE::PVSRALOvvL_v: |
| 24954 | case VE::PVSRALOvv_v: |
| 24955 | case VE::PVSRALOvvl: |
| 24956 | case VE::PVSRALOvvl_v: |
| 24957 | case VE::PVSRAUPvv: |
| 24958 | case VE::PVSRAUPvvL: |
| 24959 | case VE::PVSRAUPvvL_v: |
| 24960 | case VE::PVSRAUPvv_v: |
| 24961 | case VE::PVSRAUPvvl: |
| 24962 | case VE::PVSRAUPvvl_v: |
| 24963 | case VE::PVSRAvv: |
| 24964 | case VE::PVSRAvvL: |
| 24965 | case VE::PVSRAvvL_v: |
| 24966 | case VE::PVSRAvv_v: |
| 24967 | case VE::PVSRAvvl: |
| 24968 | case VE::PVSRAvvl_v: |
| 24969 | case VE::PVSRLLOvv: |
| 24970 | case VE::PVSRLLOvvL: |
| 24971 | case VE::PVSRLLOvvL_v: |
| 24972 | case VE::PVSRLLOvv_v: |
| 24973 | case VE::PVSRLLOvvl: |
| 24974 | case VE::PVSRLLOvvl_v: |
| 24975 | case VE::PVSRLUPvv: |
| 24976 | case VE::PVSRLUPvvL: |
| 24977 | case VE::PVSRLUPvvL_v: |
| 24978 | case VE::PVSRLUPvv_v: |
| 24979 | case VE::PVSRLUPvvl: |
| 24980 | case VE::PVSRLUPvvl_v: |
| 24981 | case VE::PVSRLvv: |
| 24982 | case VE::PVSRLvvL: |
| 24983 | case VE::PVSRLvvL_v: |
| 24984 | case VE::PVSRLvv_v: |
| 24985 | case VE::PVSRLvvl: |
| 24986 | case VE::PVSRLvvl_v: |
| 24987 | case VE::VCVTLDv: |
| 24988 | case VE::VCVTLDvL: |
| 24989 | case VE::VCVTLDvL_v: |
| 24990 | case VE::VCVTLDv_v: |
| 24991 | case VE::VCVTLDvl: |
| 24992 | case VE::VCVTLDvl_v: |
| 24993 | case VE::VCVTWDSXv: |
| 24994 | case VE::VCVTWDSXvL: |
| 24995 | case VE::VCVTWDSXvL_v: |
| 24996 | case VE::VCVTWDSXv_v: |
| 24997 | case VE::VCVTWDSXvl: |
| 24998 | case VE::VCVTWDSXvl_v: |
| 24999 | case VE::VCVTWDZXv: |
| 25000 | case VE::VCVTWDZXvL: |
| 25001 | case VE::VCVTWDZXvL_v: |
| 25002 | case VE::VCVTWDZXv_v: |
| 25003 | case VE::VCVTWDZXvl: |
| 25004 | case VE::VCVTWDZXvl_v: |
| 25005 | case VE::VCVTWSSXv: |
| 25006 | case VE::VCVTWSSXvL: |
| 25007 | case VE::VCVTWSSXvL_v: |
| 25008 | case VE::VCVTWSSXv_v: |
| 25009 | case VE::VCVTWSSXvl: |
| 25010 | case VE::VCVTWSSXvl_v: |
| 25011 | case VE::VCVTWSZXv: |
| 25012 | case VE::VCVTWSZXvL: |
| 25013 | case VE::VCVTWSZXvL_v: |
| 25014 | case VE::VCVTWSZXv_v: |
| 25015 | case VE::VCVTWSZXvl: |
| 25016 | case VE::VCVTWSZXvl_v: |
| 25017 | case VE::VSLALvv: |
| 25018 | case VE::VSLALvvL: |
| 25019 | case VE::VSLALvvL_v: |
| 25020 | case VE::VSLALvv_v: |
| 25021 | case VE::VSLALvvl: |
| 25022 | case VE::VSLALvvl_v: |
| 25023 | case VE::VSLAWSXvv: |
| 25024 | case VE::VSLAWSXvvL: |
| 25025 | case VE::VSLAWSXvvL_v: |
| 25026 | case VE::VSLAWSXvv_v: |
| 25027 | case VE::VSLAWSXvvl: |
| 25028 | case VE::VSLAWSXvvl_v: |
| 25029 | case VE::VSLAWZXvv: |
| 25030 | case VE::VSLAWZXvvL: |
| 25031 | case VE::VSLAWZXvvL_v: |
| 25032 | case VE::VSLAWZXvv_v: |
| 25033 | case VE::VSLAWZXvvl: |
| 25034 | case VE::VSLAWZXvvl_v: |
| 25035 | case VE::VSLLvv: |
| 25036 | case VE::VSLLvvL: |
| 25037 | case VE::VSLLvvL_v: |
| 25038 | case VE::VSLLvv_v: |
| 25039 | case VE::VSLLvvl: |
| 25040 | case VE::VSLLvvl_v: |
| 25041 | case VE::VSRALvv: |
| 25042 | case VE::VSRALvvL: |
| 25043 | case VE::VSRALvvL_v: |
| 25044 | case VE::VSRALvv_v: |
| 25045 | case VE::VSRALvvl: |
| 25046 | case VE::VSRALvvl_v: |
| 25047 | case VE::VSRAWSXvv: |
| 25048 | case VE::VSRAWSXvvL: |
| 25049 | case VE::VSRAWSXvvL_v: |
| 25050 | case VE::VSRAWSXvv_v: |
| 25051 | case VE::VSRAWSXvvl: |
| 25052 | case VE::VSRAWSXvvl_v: |
| 25053 | case VE::VSRAWZXvv: |
| 25054 | case VE::VSRAWZXvvL: |
| 25055 | case VE::VSRAWZXvvL_v: |
| 25056 | case VE::VSRAWZXvv_v: |
| 25057 | case VE::VSRAWZXvvl: |
| 25058 | case VE::VSRAWZXvvl_v: |
| 25059 | case VE::VSRLvv: |
| 25060 | case VE::VSRLvvL: |
| 25061 | case VE::VSRLvvL_v: |
| 25062 | case VE::VSRLvv_v: |
| 25063 | case VE::VSRLvvl: |
| 25064 | case VE::VSRLvvl_v: { |
| 25065 | switch (OpNum) { |
| 25066 | case 0: |
| 25067 | // op: vx |
| 25068 | return 24; |
| 25069 | case 2: |
| 25070 | // op: vy |
| 25071 | return 16; |
| 25072 | case 1: |
| 25073 | // op: vz |
| 25074 | return 8; |
| 25075 | } |
| 25076 | break; |
| 25077 | } |
| 25078 | case VE::PVFMKSLOa: |
| 25079 | case VE::PVFMKSLOaL: |
| 25080 | case VE::PVFMKSLOal: |
| 25081 | case VE::PVFMKSLOna: |
| 25082 | case VE::PVFMKSLOnaL: |
| 25083 | case VE::PVFMKSLOnal: |
| 25084 | case VE::PVFMKSUPa: |
| 25085 | case VE::PVFMKSUPaL: |
| 25086 | case VE::PVFMKSUPal: |
| 25087 | case VE::PVFMKSUPna: |
| 25088 | case VE::PVFMKSUPnaL: |
| 25089 | case VE::PVFMKSUPnal: |
| 25090 | case VE::PVFMKWLOa: |
| 25091 | case VE::PVFMKWLOaL: |
| 25092 | case VE::PVFMKWLOal: |
| 25093 | case VE::PVFMKWLOna: |
| 25094 | case VE::PVFMKWLOnaL: |
| 25095 | case VE::PVFMKWLOnal: |
| 25096 | case VE::PVFMKWUPa: |
| 25097 | case VE::PVFMKWUPaL: |
| 25098 | case VE::PVFMKWUPal: |
| 25099 | case VE::PVFMKWUPna: |
| 25100 | case VE::PVFMKWUPnaL: |
| 25101 | case VE::PVFMKWUPnal: |
| 25102 | case VE::PVSEQ: |
| 25103 | case VE::PVSEQL: |
| 25104 | case VE::PVSEQLO: |
| 25105 | case VE::PVSEQLOL: |
| 25106 | case VE::PVSEQLOL_v: |
| 25107 | case VE::PVSEQLO_v: |
| 25108 | case VE::PVSEQLOl: |
| 25109 | case VE::PVSEQLOl_v: |
| 25110 | case VE::PVSEQL_v: |
| 25111 | case VE::PVSEQUP: |
| 25112 | case VE::PVSEQUPL: |
| 25113 | case VE::PVSEQUPL_v: |
| 25114 | case VE::PVSEQUP_v: |
| 25115 | case VE::PVSEQUPl: |
| 25116 | case VE::PVSEQUPl_v: |
| 25117 | case VE::PVSEQ_v: |
| 25118 | case VE::PVSEQl: |
| 25119 | case VE::PVSEQl_v: |
| 25120 | case VE::VFMKDa: |
| 25121 | case VE::VFMKDaL: |
| 25122 | case VE::VFMKDal: |
| 25123 | case VE::VFMKDna: |
| 25124 | case VE::VFMKDnaL: |
| 25125 | case VE::VFMKDnal: |
| 25126 | case VE::VFMKLa: |
| 25127 | case VE::VFMKLaL: |
| 25128 | case VE::VFMKLal: |
| 25129 | case VE::VFMKLna: |
| 25130 | case VE::VFMKLnaL: |
| 25131 | case VE::VFMKLnal: |
| 25132 | case VE::VFMKSa: |
| 25133 | case VE::VFMKSaL: |
| 25134 | case VE::VFMKSal: |
| 25135 | case VE::VFMKSna: |
| 25136 | case VE::VFMKSnaL: |
| 25137 | case VE::VFMKSnal: |
| 25138 | case VE::VFMKWa: |
| 25139 | case VE::VFMKWaL: |
| 25140 | case VE::VFMKWal: |
| 25141 | case VE::VFMKWna: |
| 25142 | case VE::VFMKWnaL: |
| 25143 | case VE::VFMKWnal: |
| 25144 | case VE::VSEQ: |
| 25145 | case VE::VSEQL: |
| 25146 | case VE::VSEQL_v: |
| 25147 | case VE::VSEQ_v: |
| 25148 | case VE::VSEQl: |
| 25149 | case VE::VSEQl_v: { |
| 25150 | switch (OpNum) { |
| 25151 | case 0: |
| 25152 | // op: vx |
| 25153 | return 24; |
| 25154 | } |
| 25155 | break; |
| 25156 | } |
| 25157 | case VE::PVFMKSLOam: |
| 25158 | case VE::PVFMKSLOamL: |
| 25159 | case VE::PVFMKSLOaml: |
| 25160 | case VE::PVFMKSLOnam: |
| 25161 | case VE::PVFMKSLOnamL: |
| 25162 | case VE::PVFMKSLOnaml: |
| 25163 | case VE::PVFMKSUPam: |
| 25164 | case VE::PVFMKSUPamL: |
| 25165 | case VE::PVFMKSUPaml: |
| 25166 | case VE::PVFMKSUPnam: |
| 25167 | case VE::PVFMKSUPnamL: |
| 25168 | case VE::PVFMKSUPnaml: |
| 25169 | case VE::PVFMKWLOam: |
| 25170 | case VE::PVFMKWLOamL: |
| 25171 | case VE::PVFMKWLOaml: |
| 25172 | case VE::PVFMKWLOnam: |
| 25173 | case VE::PVFMKWLOnamL: |
| 25174 | case VE::PVFMKWLOnaml: |
| 25175 | case VE::PVFMKWUPam: |
| 25176 | case VE::PVFMKWUPamL: |
| 25177 | case VE::PVFMKWUPaml: |
| 25178 | case VE::PVFMKWUPnam: |
| 25179 | case VE::PVFMKWUPnamL: |
| 25180 | case VE::PVFMKWUPnaml: |
| 25181 | case VE::PVSEQLOm: |
| 25182 | case VE::PVSEQLOmL: |
| 25183 | case VE::PVSEQLOmL_v: |
| 25184 | case VE::PVSEQLOm_v: |
| 25185 | case VE::PVSEQLOml: |
| 25186 | case VE::PVSEQLOml_v: |
| 25187 | case VE::PVSEQUPm: |
| 25188 | case VE::PVSEQUPmL: |
| 25189 | case VE::PVSEQUPmL_v: |
| 25190 | case VE::PVSEQUPm_v: |
| 25191 | case VE::PVSEQUPml: |
| 25192 | case VE::PVSEQUPml_v: |
| 25193 | case VE::PVSEQm: |
| 25194 | case VE::PVSEQmL: |
| 25195 | case VE::PVSEQmL_v: |
| 25196 | case VE::PVSEQm_v: |
| 25197 | case VE::PVSEQml: |
| 25198 | case VE::PVSEQml_v: |
| 25199 | case VE::VFMKDam: |
| 25200 | case VE::VFMKDamL: |
| 25201 | case VE::VFMKDaml: |
| 25202 | case VE::VFMKDnam: |
| 25203 | case VE::VFMKDnamL: |
| 25204 | case VE::VFMKDnaml: |
| 25205 | case VE::VFMKLam: |
| 25206 | case VE::VFMKLamL: |
| 25207 | case VE::VFMKLaml: |
| 25208 | case VE::VFMKLnam: |
| 25209 | case VE::VFMKLnamL: |
| 25210 | case VE::VFMKLnaml: |
| 25211 | case VE::VFMKSam: |
| 25212 | case VE::VFMKSamL: |
| 25213 | case VE::VFMKSaml: |
| 25214 | case VE::VFMKSnam: |
| 25215 | case VE::VFMKSnamL: |
| 25216 | case VE::VFMKSnaml: |
| 25217 | case VE::VFMKWam: |
| 25218 | case VE::VFMKWamL: |
| 25219 | case VE::VFMKWaml: |
| 25220 | case VE::VFMKWnam: |
| 25221 | case VE::VFMKWnamL: |
| 25222 | case VE::VFMKWnaml: |
| 25223 | case VE::VSEQm: |
| 25224 | case VE::VSEQmL: |
| 25225 | case VE::VSEQmL_v: |
| 25226 | case VE::VSEQm_v: |
| 25227 | case VE::VSEQml: |
| 25228 | case VE::VSEQml_v: { |
| 25229 | switch (OpNum) { |
| 25230 | case 1: |
| 25231 | // op: m |
| 25232 | return 48; |
| 25233 | case 0: |
| 25234 | // op: vx |
| 25235 | return 24; |
| 25236 | } |
| 25237 | break; |
| 25238 | } |
| 25239 | case VE::PVFMADLOivv: |
| 25240 | case VE::PVFMADLOivvL: |
| 25241 | case VE::PVFMADLOivvL_v: |
| 25242 | case VE::PVFMADLOivv_v: |
| 25243 | case VE::PVFMADLOivvl: |
| 25244 | case VE::PVFMADLOivvl_v: |
| 25245 | case VE::PVFMADLOrvv: |
| 25246 | case VE::PVFMADLOrvvL: |
| 25247 | case VE::PVFMADLOrvvL_v: |
| 25248 | case VE::PVFMADLOrvv_v: |
| 25249 | case VE::PVFMADLOrvvl: |
| 25250 | case VE::PVFMADLOrvvl_v: |
| 25251 | case VE::PVFMADUPivv: |
| 25252 | case VE::PVFMADUPivvL: |
| 25253 | case VE::PVFMADUPivvL_v: |
| 25254 | case VE::PVFMADUPivv_v: |
| 25255 | case VE::PVFMADUPivvl: |
| 25256 | case VE::PVFMADUPivvl_v: |
| 25257 | case VE::PVFMADUPrvv: |
| 25258 | case VE::PVFMADUPrvvL: |
| 25259 | case VE::PVFMADUPrvvL_v: |
| 25260 | case VE::PVFMADUPrvv_v: |
| 25261 | case VE::PVFMADUPrvvl: |
| 25262 | case VE::PVFMADUPrvvl_v: |
| 25263 | case VE::PVFMADivv: |
| 25264 | case VE::PVFMADivvL: |
| 25265 | case VE::PVFMADivvL_v: |
| 25266 | case VE::PVFMADivv_v: |
| 25267 | case VE::PVFMADivvl: |
| 25268 | case VE::PVFMADivvl_v: |
| 25269 | case VE::PVFMADrvv: |
| 25270 | case VE::PVFMADrvvL: |
| 25271 | case VE::PVFMADrvvL_v: |
| 25272 | case VE::PVFMADrvv_v: |
| 25273 | case VE::PVFMADrvvl: |
| 25274 | case VE::PVFMADrvvl_v: |
| 25275 | case VE::PVFMSBLOivv: |
| 25276 | case VE::PVFMSBLOivvL: |
| 25277 | case VE::PVFMSBLOivvL_v: |
| 25278 | case VE::PVFMSBLOivv_v: |
| 25279 | case VE::PVFMSBLOivvl: |
| 25280 | case VE::PVFMSBLOivvl_v: |
| 25281 | case VE::PVFMSBLOrvv: |
| 25282 | case VE::PVFMSBLOrvvL: |
| 25283 | case VE::PVFMSBLOrvvL_v: |
| 25284 | case VE::PVFMSBLOrvv_v: |
| 25285 | case VE::PVFMSBLOrvvl: |
| 25286 | case VE::PVFMSBLOrvvl_v: |
| 25287 | case VE::PVFMSBUPivv: |
| 25288 | case VE::PVFMSBUPivvL: |
| 25289 | case VE::PVFMSBUPivvL_v: |
| 25290 | case VE::PVFMSBUPivv_v: |
| 25291 | case VE::PVFMSBUPivvl: |
| 25292 | case VE::PVFMSBUPivvl_v: |
| 25293 | case VE::PVFMSBUPrvv: |
| 25294 | case VE::PVFMSBUPrvvL: |
| 25295 | case VE::PVFMSBUPrvvL_v: |
| 25296 | case VE::PVFMSBUPrvv_v: |
| 25297 | case VE::PVFMSBUPrvvl: |
| 25298 | case VE::PVFMSBUPrvvl_v: |
| 25299 | case VE::PVFMSBivv: |
| 25300 | case VE::PVFMSBivvL: |
| 25301 | case VE::PVFMSBivvL_v: |
| 25302 | case VE::PVFMSBivv_v: |
| 25303 | case VE::PVFMSBivvl: |
| 25304 | case VE::PVFMSBivvl_v: |
| 25305 | case VE::PVFMSBrvv: |
| 25306 | case VE::PVFMSBrvvL: |
| 25307 | case VE::PVFMSBrvvL_v: |
| 25308 | case VE::PVFMSBrvv_v: |
| 25309 | case VE::PVFMSBrvvl: |
| 25310 | case VE::PVFMSBrvvl_v: |
| 25311 | case VE::PVFNMADLOivv: |
| 25312 | case VE::PVFNMADLOivvL: |
| 25313 | case VE::PVFNMADLOivvL_v: |
| 25314 | case VE::PVFNMADLOivv_v: |
| 25315 | case VE::PVFNMADLOivvl: |
| 25316 | case VE::PVFNMADLOivvl_v: |
| 25317 | case VE::PVFNMADLOrvv: |
| 25318 | case VE::PVFNMADLOrvvL: |
| 25319 | case VE::PVFNMADLOrvvL_v: |
| 25320 | case VE::PVFNMADLOrvv_v: |
| 25321 | case VE::PVFNMADLOrvvl: |
| 25322 | case VE::PVFNMADLOrvvl_v: |
| 25323 | case VE::PVFNMADUPivv: |
| 25324 | case VE::PVFNMADUPivvL: |
| 25325 | case VE::PVFNMADUPivvL_v: |
| 25326 | case VE::PVFNMADUPivv_v: |
| 25327 | case VE::PVFNMADUPivvl: |
| 25328 | case VE::PVFNMADUPivvl_v: |
| 25329 | case VE::PVFNMADUPrvv: |
| 25330 | case VE::PVFNMADUPrvvL: |
| 25331 | case VE::PVFNMADUPrvvL_v: |
| 25332 | case VE::PVFNMADUPrvv_v: |
| 25333 | case VE::PVFNMADUPrvvl: |
| 25334 | case VE::PVFNMADUPrvvl_v: |
| 25335 | case VE::PVFNMADivv: |
| 25336 | case VE::PVFNMADivvL: |
| 25337 | case VE::PVFNMADivvL_v: |
| 25338 | case VE::PVFNMADivv_v: |
| 25339 | case VE::PVFNMADivvl: |
| 25340 | case VE::PVFNMADivvl_v: |
| 25341 | case VE::PVFNMADrvv: |
| 25342 | case VE::PVFNMADrvvL: |
| 25343 | case VE::PVFNMADrvvL_v: |
| 25344 | case VE::PVFNMADrvv_v: |
| 25345 | case VE::PVFNMADrvvl: |
| 25346 | case VE::PVFNMADrvvl_v: |
| 25347 | case VE::PVFNMSBLOivv: |
| 25348 | case VE::PVFNMSBLOivvL: |
| 25349 | case VE::PVFNMSBLOivvL_v: |
| 25350 | case VE::PVFNMSBLOivv_v: |
| 25351 | case VE::PVFNMSBLOivvl: |
| 25352 | case VE::PVFNMSBLOivvl_v: |
| 25353 | case VE::PVFNMSBLOrvv: |
| 25354 | case VE::PVFNMSBLOrvvL: |
| 25355 | case VE::PVFNMSBLOrvvL_v: |
| 25356 | case VE::PVFNMSBLOrvv_v: |
| 25357 | case VE::PVFNMSBLOrvvl: |
| 25358 | case VE::PVFNMSBLOrvvl_v: |
| 25359 | case VE::PVFNMSBUPivv: |
| 25360 | case VE::PVFNMSBUPivvL: |
| 25361 | case VE::PVFNMSBUPivvL_v: |
| 25362 | case VE::PVFNMSBUPivv_v: |
| 25363 | case VE::PVFNMSBUPivvl: |
| 25364 | case VE::PVFNMSBUPivvl_v: |
| 25365 | case VE::PVFNMSBUPrvv: |
| 25366 | case VE::PVFNMSBUPrvvL: |
| 25367 | case VE::PVFNMSBUPrvvL_v: |
| 25368 | case VE::PVFNMSBUPrvv_v: |
| 25369 | case VE::PVFNMSBUPrvvl: |
| 25370 | case VE::PVFNMSBUPrvvl_v: |
| 25371 | case VE::PVFNMSBivv: |
| 25372 | case VE::PVFNMSBivvL: |
| 25373 | case VE::PVFNMSBivvL_v: |
| 25374 | case VE::PVFNMSBivv_v: |
| 25375 | case VE::PVFNMSBivvl: |
| 25376 | case VE::PVFNMSBivvl_v: |
| 25377 | case VE::PVFNMSBrvv: |
| 25378 | case VE::PVFNMSBrvvL: |
| 25379 | case VE::PVFNMSBrvvL_v: |
| 25380 | case VE::PVFNMSBrvv_v: |
| 25381 | case VE::PVFNMSBrvvl: |
| 25382 | case VE::PVFNMSBrvvl_v: |
| 25383 | case VE::VFMADDivv: |
| 25384 | case VE::VFMADDivvL: |
| 25385 | case VE::VFMADDivvL_v: |
| 25386 | case VE::VFMADDivv_v: |
| 25387 | case VE::VFMADDivvl: |
| 25388 | case VE::VFMADDivvl_v: |
| 25389 | case VE::VFMADDrvv: |
| 25390 | case VE::VFMADDrvvL: |
| 25391 | case VE::VFMADDrvvL_v: |
| 25392 | case VE::VFMADDrvv_v: |
| 25393 | case VE::VFMADDrvvl: |
| 25394 | case VE::VFMADDrvvl_v: |
| 25395 | case VE::VFMADSivv: |
| 25396 | case VE::VFMADSivvL: |
| 25397 | case VE::VFMADSivvL_v: |
| 25398 | case VE::VFMADSivv_v: |
| 25399 | case VE::VFMADSivvl: |
| 25400 | case VE::VFMADSivvl_v: |
| 25401 | case VE::VFMADSrvv: |
| 25402 | case VE::VFMADSrvvL: |
| 25403 | case VE::VFMADSrvvL_v: |
| 25404 | case VE::VFMADSrvv_v: |
| 25405 | case VE::VFMADSrvvl: |
| 25406 | case VE::VFMADSrvvl_v: |
| 25407 | case VE::VFMSBDivv: |
| 25408 | case VE::VFMSBDivvL: |
| 25409 | case VE::VFMSBDivvL_v: |
| 25410 | case VE::VFMSBDivv_v: |
| 25411 | case VE::VFMSBDivvl: |
| 25412 | case VE::VFMSBDivvl_v: |
| 25413 | case VE::VFMSBDrvv: |
| 25414 | case VE::VFMSBDrvvL: |
| 25415 | case VE::VFMSBDrvvL_v: |
| 25416 | case VE::VFMSBDrvv_v: |
| 25417 | case VE::VFMSBDrvvl: |
| 25418 | case VE::VFMSBDrvvl_v: |
| 25419 | case VE::VFMSBSivv: |
| 25420 | case VE::VFMSBSivvL: |
| 25421 | case VE::VFMSBSivvL_v: |
| 25422 | case VE::VFMSBSivv_v: |
| 25423 | case VE::VFMSBSivvl: |
| 25424 | case VE::VFMSBSivvl_v: |
| 25425 | case VE::VFMSBSrvv: |
| 25426 | case VE::VFMSBSrvvL: |
| 25427 | case VE::VFMSBSrvvL_v: |
| 25428 | case VE::VFMSBSrvv_v: |
| 25429 | case VE::VFMSBSrvvl: |
| 25430 | case VE::VFMSBSrvvl_v: |
| 25431 | case VE::VFNMADDivv: |
| 25432 | case VE::VFNMADDivvL: |
| 25433 | case VE::VFNMADDivvL_v: |
| 25434 | case VE::VFNMADDivv_v: |
| 25435 | case VE::VFNMADDivvl: |
| 25436 | case VE::VFNMADDivvl_v: |
| 25437 | case VE::VFNMADDrvv: |
| 25438 | case VE::VFNMADDrvvL: |
| 25439 | case VE::VFNMADDrvvL_v: |
| 25440 | case VE::VFNMADDrvv_v: |
| 25441 | case VE::VFNMADDrvvl: |
| 25442 | case VE::VFNMADDrvvl_v: |
| 25443 | case VE::VFNMADSivv: |
| 25444 | case VE::VFNMADSivvL: |
| 25445 | case VE::VFNMADSivvL_v: |
| 25446 | case VE::VFNMADSivv_v: |
| 25447 | case VE::VFNMADSivvl: |
| 25448 | case VE::VFNMADSivvl_v: |
| 25449 | case VE::VFNMADSrvv: |
| 25450 | case VE::VFNMADSrvvL: |
| 25451 | case VE::VFNMADSrvvL_v: |
| 25452 | case VE::VFNMADSrvv_v: |
| 25453 | case VE::VFNMADSrvvl: |
| 25454 | case VE::VFNMADSrvvl_v: |
| 25455 | case VE::VFNMSBDivv: |
| 25456 | case VE::VFNMSBDivvL: |
| 25457 | case VE::VFNMSBDivvL_v: |
| 25458 | case VE::VFNMSBDivv_v: |
| 25459 | case VE::VFNMSBDivvl: |
| 25460 | case VE::VFNMSBDivvl_v: |
| 25461 | case VE::VFNMSBDrvv: |
| 25462 | case VE::VFNMSBDrvvL: |
| 25463 | case VE::VFNMSBDrvvL_v: |
| 25464 | case VE::VFNMSBDrvv_v: |
| 25465 | case VE::VFNMSBDrvvl: |
| 25466 | case VE::VFNMSBDrvvl_v: |
| 25467 | case VE::VFNMSBSivv: |
| 25468 | case VE::VFNMSBSivvL: |
| 25469 | case VE::VFNMSBSivvL_v: |
| 25470 | case VE::VFNMSBSivv_v: |
| 25471 | case VE::VFNMSBSivvl: |
| 25472 | case VE::VFNMSBSivvl_v: |
| 25473 | case VE::VFNMSBSrvv: |
| 25474 | case VE::VFNMSBSrvvL: |
| 25475 | case VE::VFNMSBSrvvL_v: |
| 25476 | case VE::VFNMSBSrvv_v: |
| 25477 | case VE::VFNMSBSrvvl: |
| 25478 | case VE::VFNMSBSrvvl_v: { |
| 25479 | switch (OpNum) { |
| 25480 | case 1: |
| 25481 | // op: sy |
| 25482 | return 40; |
| 25483 | case 0: |
| 25484 | // op: vx |
| 25485 | return 24; |
| 25486 | case 2: |
| 25487 | // op: vz |
| 25488 | return 8; |
| 25489 | case 3: |
| 25490 | // op: vw |
| 25491 | return 0; |
| 25492 | } |
| 25493 | break; |
| 25494 | } |
| 25495 | case VE::PVADDSLOiv: |
| 25496 | case VE::PVADDSLOivL: |
| 25497 | case VE::PVADDSLOivL_v: |
| 25498 | case VE::PVADDSLOiv_v: |
| 25499 | case VE::PVADDSLOivl: |
| 25500 | case VE::PVADDSLOivl_v: |
| 25501 | case VE::PVADDSLOrv: |
| 25502 | case VE::PVADDSLOrvL: |
| 25503 | case VE::PVADDSLOrvL_v: |
| 25504 | case VE::PVADDSLOrv_v: |
| 25505 | case VE::PVADDSLOrvl: |
| 25506 | case VE::PVADDSLOrvl_v: |
| 25507 | case VE::PVADDSUPiv: |
| 25508 | case VE::PVADDSUPivL: |
| 25509 | case VE::PVADDSUPivL_v: |
| 25510 | case VE::PVADDSUPiv_v: |
| 25511 | case VE::PVADDSUPivl: |
| 25512 | case VE::PVADDSUPivl_v: |
| 25513 | case VE::PVADDSUPrv: |
| 25514 | case VE::PVADDSUPrvL: |
| 25515 | case VE::PVADDSUPrvL_v: |
| 25516 | case VE::PVADDSUPrv_v: |
| 25517 | case VE::PVADDSUPrvl: |
| 25518 | case VE::PVADDSUPrvl_v: |
| 25519 | case VE::PVADDSiv: |
| 25520 | case VE::PVADDSivL: |
| 25521 | case VE::PVADDSivL_v: |
| 25522 | case VE::PVADDSiv_v: |
| 25523 | case VE::PVADDSivl: |
| 25524 | case VE::PVADDSivl_v: |
| 25525 | case VE::PVADDSrv: |
| 25526 | case VE::PVADDSrvL: |
| 25527 | case VE::PVADDSrvL_v: |
| 25528 | case VE::PVADDSrv_v: |
| 25529 | case VE::PVADDSrvl: |
| 25530 | case VE::PVADDSrvl_v: |
| 25531 | case VE::PVADDULOiv: |
| 25532 | case VE::PVADDULOivL: |
| 25533 | case VE::PVADDULOivL_v: |
| 25534 | case VE::PVADDULOiv_v: |
| 25535 | case VE::PVADDULOivl: |
| 25536 | case VE::PVADDULOivl_v: |
| 25537 | case VE::PVADDULOrv: |
| 25538 | case VE::PVADDULOrvL: |
| 25539 | case VE::PVADDULOrvL_v: |
| 25540 | case VE::PVADDULOrv_v: |
| 25541 | case VE::PVADDULOrvl: |
| 25542 | case VE::PVADDULOrvl_v: |
| 25543 | case VE::PVADDUUPiv: |
| 25544 | case VE::PVADDUUPivL: |
| 25545 | case VE::PVADDUUPivL_v: |
| 25546 | case VE::PVADDUUPiv_v: |
| 25547 | case VE::PVADDUUPivl: |
| 25548 | case VE::PVADDUUPivl_v: |
| 25549 | case VE::PVADDUUPrv: |
| 25550 | case VE::PVADDUUPrvL: |
| 25551 | case VE::PVADDUUPrvL_v: |
| 25552 | case VE::PVADDUUPrv_v: |
| 25553 | case VE::PVADDUUPrvl: |
| 25554 | case VE::PVADDUUPrvl_v: |
| 25555 | case VE::PVADDUiv: |
| 25556 | case VE::PVADDUivL: |
| 25557 | case VE::PVADDUivL_v: |
| 25558 | case VE::PVADDUiv_v: |
| 25559 | case VE::PVADDUivl: |
| 25560 | case VE::PVADDUivl_v: |
| 25561 | case VE::PVADDUrv: |
| 25562 | case VE::PVADDUrvL: |
| 25563 | case VE::PVADDUrvL_v: |
| 25564 | case VE::PVADDUrv_v: |
| 25565 | case VE::PVADDUrvl: |
| 25566 | case VE::PVADDUrvl_v: |
| 25567 | case VE::PVANDLOmv: |
| 25568 | case VE::PVANDLOmvL: |
| 25569 | case VE::PVANDLOmvL_v: |
| 25570 | case VE::PVANDLOmv_v: |
| 25571 | case VE::PVANDLOmvl: |
| 25572 | case VE::PVANDLOmvl_v: |
| 25573 | case VE::PVANDLOrv: |
| 25574 | case VE::PVANDLOrvL: |
| 25575 | case VE::PVANDLOrvL_v: |
| 25576 | case VE::PVANDLOrv_v: |
| 25577 | case VE::PVANDLOrvl: |
| 25578 | case VE::PVANDLOrvl_v: |
| 25579 | case VE::PVANDUPmv: |
| 25580 | case VE::PVANDUPmvL: |
| 25581 | case VE::PVANDUPmvL_v: |
| 25582 | case VE::PVANDUPmv_v: |
| 25583 | case VE::PVANDUPmvl: |
| 25584 | case VE::PVANDUPmvl_v: |
| 25585 | case VE::PVANDUPrv: |
| 25586 | case VE::PVANDUPrvL: |
| 25587 | case VE::PVANDUPrvL_v: |
| 25588 | case VE::PVANDUPrv_v: |
| 25589 | case VE::PVANDUPrvl: |
| 25590 | case VE::PVANDUPrvl_v: |
| 25591 | case VE::PVANDmv: |
| 25592 | case VE::PVANDmvL: |
| 25593 | case VE::PVANDmvL_v: |
| 25594 | case VE::PVANDmv_v: |
| 25595 | case VE::PVANDmvl: |
| 25596 | case VE::PVANDmvl_v: |
| 25597 | case VE::PVANDrv: |
| 25598 | case VE::PVANDrvL: |
| 25599 | case VE::PVANDrvL_v: |
| 25600 | case VE::PVANDrv_v: |
| 25601 | case VE::PVANDrvl: |
| 25602 | case VE::PVANDrvl_v: |
| 25603 | case VE::PVCMPSLOiv: |
| 25604 | case VE::PVCMPSLOivL: |
| 25605 | case VE::PVCMPSLOivL_v: |
| 25606 | case VE::PVCMPSLOiv_v: |
| 25607 | case VE::PVCMPSLOivl: |
| 25608 | case VE::PVCMPSLOivl_v: |
| 25609 | case VE::PVCMPSLOrv: |
| 25610 | case VE::PVCMPSLOrvL: |
| 25611 | case VE::PVCMPSLOrvL_v: |
| 25612 | case VE::PVCMPSLOrv_v: |
| 25613 | case VE::PVCMPSLOrvl: |
| 25614 | case VE::PVCMPSLOrvl_v: |
| 25615 | case VE::PVCMPSUPiv: |
| 25616 | case VE::PVCMPSUPivL: |
| 25617 | case VE::PVCMPSUPivL_v: |
| 25618 | case VE::PVCMPSUPiv_v: |
| 25619 | case VE::PVCMPSUPivl: |
| 25620 | case VE::PVCMPSUPivl_v: |
| 25621 | case VE::PVCMPSUPrv: |
| 25622 | case VE::PVCMPSUPrvL: |
| 25623 | case VE::PVCMPSUPrvL_v: |
| 25624 | case VE::PVCMPSUPrv_v: |
| 25625 | case VE::PVCMPSUPrvl: |
| 25626 | case VE::PVCMPSUPrvl_v: |
| 25627 | case VE::PVCMPSiv: |
| 25628 | case VE::PVCMPSivL: |
| 25629 | case VE::PVCMPSivL_v: |
| 25630 | case VE::PVCMPSiv_v: |
| 25631 | case VE::PVCMPSivl: |
| 25632 | case VE::PVCMPSivl_v: |
| 25633 | case VE::PVCMPSrv: |
| 25634 | case VE::PVCMPSrvL: |
| 25635 | case VE::PVCMPSrvL_v: |
| 25636 | case VE::PVCMPSrv_v: |
| 25637 | case VE::PVCMPSrvl: |
| 25638 | case VE::PVCMPSrvl_v: |
| 25639 | case VE::PVCMPULOiv: |
| 25640 | case VE::PVCMPULOivL: |
| 25641 | case VE::PVCMPULOivL_v: |
| 25642 | case VE::PVCMPULOiv_v: |
| 25643 | case VE::PVCMPULOivl: |
| 25644 | case VE::PVCMPULOivl_v: |
| 25645 | case VE::PVCMPULOrv: |
| 25646 | case VE::PVCMPULOrvL: |
| 25647 | case VE::PVCMPULOrvL_v: |
| 25648 | case VE::PVCMPULOrv_v: |
| 25649 | case VE::PVCMPULOrvl: |
| 25650 | case VE::PVCMPULOrvl_v: |
| 25651 | case VE::PVCMPUUPiv: |
| 25652 | case VE::PVCMPUUPivL: |
| 25653 | case VE::PVCMPUUPivL_v: |
| 25654 | case VE::PVCMPUUPiv_v: |
| 25655 | case VE::PVCMPUUPivl: |
| 25656 | case VE::PVCMPUUPivl_v: |
| 25657 | case VE::PVCMPUUPrv: |
| 25658 | case VE::PVCMPUUPrvL: |
| 25659 | case VE::PVCMPUUPrvL_v: |
| 25660 | case VE::PVCMPUUPrv_v: |
| 25661 | case VE::PVCMPUUPrvl: |
| 25662 | case VE::PVCMPUUPrvl_v: |
| 25663 | case VE::PVCMPUiv: |
| 25664 | case VE::PVCMPUivL: |
| 25665 | case VE::PVCMPUivL_v: |
| 25666 | case VE::PVCMPUiv_v: |
| 25667 | case VE::PVCMPUivl: |
| 25668 | case VE::PVCMPUivl_v: |
| 25669 | case VE::PVCMPUrv: |
| 25670 | case VE::PVCMPUrvL: |
| 25671 | case VE::PVCMPUrvL_v: |
| 25672 | case VE::PVCMPUrv_v: |
| 25673 | case VE::PVCMPUrvl: |
| 25674 | case VE::PVCMPUrvl_v: |
| 25675 | case VE::PVEQVLOmv: |
| 25676 | case VE::PVEQVLOmvL: |
| 25677 | case VE::PVEQVLOmvL_v: |
| 25678 | case VE::PVEQVLOmv_v: |
| 25679 | case VE::PVEQVLOmvl: |
| 25680 | case VE::PVEQVLOmvl_v: |
| 25681 | case VE::PVEQVLOrv: |
| 25682 | case VE::PVEQVLOrvL: |
| 25683 | case VE::PVEQVLOrvL_v: |
| 25684 | case VE::PVEQVLOrv_v: |
| 25685 | case VE::PVEQVLOrvl: |
| 25686 | case VE::PVEQVLOrvl_v: |
| 25687 | case VE::PVEQVUPmv: |
| 25688 | case VE::PVEQVUPmvL: |
| 25689 | case VE::PVEQVUPmvL_v: |
| 25690 | case VE::PVEQVUPmv_v: |
| 25691 | case VE::PVEQVUPmvl: |
| 25692 | case VE::PVEQVUPmvl_v: |
| 25693 | case VE::PVEQVUPrv: |
| 25694 | case VE::PVEQVUPrvL: |
| 25695 | case VE::PVEQVUPrvL_v: |
| 25696 | case VE::PVEQVUPrv_v: |
| 25697 | case VE::PVEQVUPrvl: |
| 25698 | case VE::PVEQVUPrvl_v: |
| 25699 | case VE::PVEQVmv: |
| 25700 | case VE::PVEQVmvL: |
| 25701 | case VE::PVEQVmvL_v: |
| 25702 | case VE::PVEQVmv_v: |
| 25703 | case VE::PVEQVmvl: |
| 25704 | case VE::PVEQVmvl_v: |
| 25705 | case VE::PVEQVrv: |
| 25706 | case VE::PVEQVrvL: |
| 25707 | case VE::PVEQVrvL_v: |
| 25708 | case VE::PVEQVrv_v: |
| 25709 | case VE::PVEQVrvl: |
| 25710 | case VE::PVEQVrvl_v: |
| 25711 | case VE::PVFADDLOiv: |
| 25712 | case VE::PVFADDLOivL: |
| 25713 | case VE::PVFADDLOivL_v: |
| 25714 | case VE::PVFADDLOiv_v: |
| 25715 | case VE::PVFADDLOivl: |
| 25716 | case VE::PVFADDLOivl_v: |
| 25717 | case VE::PVFADDLOrv: |
| 25718 | case VE::PVFADDLOrvL: |
| 25719 | case VE::PVFADDLOrvL_v: |
| 25720 | case VE::PVFADDLOrv_v: |
| 25721 | case VE::PVFADDLOrvl: |
| 25722 | case VE::PVFADDLOrvl_v: |
| 25723 | case VE::PVFADDUPiv: |
| 25724 | case VE::PVFADDUPivL: |
| 25725 | case VE::PVFADDUPivL_v: |
| 25726 | case VE::PVFADDUPiv_v: |
| 25727 | case VE::PVFADDUPivl: |
| 25728 | case VE::PVFADDUPivl_v: |
| 25729 | case VE::PVFADDUPrv: |
| 25730 | case VE::PVFADDUPrvL: |
| 25731 | case VE::PVFADDUPrvL_v: |
| 25732 | case VE::PVFADDUPrv_v: |
| 25733 | case VE::PVFADDUPrvl: |
| 25734 | case VE::PVFADDUPrvl_v: |
| 25735 | case VE::PVFADDiv: |
| 25736 | case VE::PVFADDivL: |
| 25737 | case VE::PVFADDivL_v: |
| 25738 | case VE::PVFADDiv_v: |
| 25739 | case VE::PVFADDivl: |
| 25740 | case VE::PVFADDivl_v: |
| 25741 | case VE::PVFADDrv: |
| 25742 | case VE::PVFADDrvL: |
| 25743 | case VE::PVFADDrvL_v: |
| 25744 | case VE::PVFADDrv_v: |
| 25745 | case VE::PVFADDrvl: |
| 25746 | case VE::PVFADDrvl_v: |
| 25747 | case VE::PVFCMPLOiv: |
| 25748 | case VE::PVFCMPLOivL: |
| 25749 | case VE::PVFCMPLOivL_v: |
| 25750 | case VE::PVFCMPLOiv_v: |
| 25751 | case VE::PVFCMPLOivl: |
| 25752 | case VE::PVFCMPLOivl_v: |
| 25753 | case VE::PVFCMPLOrv: |
| 25754 | case VE::PVFCMPLOrvL: |
| 25755 | case VE::PVFCMPLOrvL_v: |
| 25756 | case VE::PVFCMPLOrv_v: |
| 25757 | case VE::PVFCMPLOrvl: |
| 25758 | case VE::PVFCMPLOrvl_v: |
| 25759 | case VE::PVFCMPUPiv: |
| 25760 | case VE::PVFCMPUPivL: |
| 25761 | case VE::PVFCMPUPivL_v: |
| 25762 | case VE::PVFCMPUPiv_v: |
| 25763 | case VE::PVFCMPUPivl: |
| 25764 | case VE::PVFCMPUPivl_v: |
| 25765 | case VE::PVFCMPUPrv: |
| 25766 | case VE::PVFCMPUPrvL: |
| 25767 | case VE::PVFCMPUPrvL_v: |
| 25768 | case VE::PVFCMPUPrv_v: |
| 25769 | case VE::PVFCMPUPrvl: |
| 25770 | case VE::PVFCMPUPrvl_v: |
| 25771 | case VE::PVFCMPiv: |
| 25772 | case VE::PVFCMPivL: |
| 25773 | case VE::PVFCMPivL_v: |
| 25774 | case VE::PVFCMPiv_v: |
| 25775 | case VE::PVFCMPivl: |
| 25776 | case VE::PVFCMPivl_v: |
| 25777 | case VE::PVFCMPrv: |
| 25778 | case VE::PVFCMPrvL: |
| 25779 | case VE::PVFCMPrvL_v: |
| 25780 | case VE::PVFCMPrv_v: |
| 25781 | case VE::PVFCMPrvl: |
| 25782 | case VE::PVFCMPrvl_v: |
| 25783 | case VE::PVFMAXLOiv: |
| 25784 | case VE::PVFMAXLOivL: |
| 25785 | case VE::PVFMAXLOivL_v: |
| 25786 | case VE::PVFMAXLOiv_v: |
| 25787 | case VE::PVFMAXLOivl: |
| 25788 | case VE::PVFMAXLOivl_v: |
| 25789 | case VE::PVFMAXLOrv: |
| 25790 | case VE::PVFMAXLOrvL: |
| 25791 | case VE::PVFMAXLOrvL_v: |
| 25792 | case VE::PVFMAXLOrv_v: |
| 25793 | case VE::PVFMAXLOrvl: |
| 25794 | case VE::PVFMAXLOrvl_v: |
| 25795 | case VE::PVFMAXUPiv: |
| 25796 | case VE::PVFMAXUPivL: |
| 25797 | case VE::PVFMAXUPivL_v: |
| 25798 | case VE::PVFMAXUPiv_v: |
| 25799 | case VE::PVFMAXUPivl: |
| 25800 | case VE::PVFMAXUPivl_v: |
| 25801 | case VE::PVFMAXUPrv: |
| 25802 | case VE::PVFMAXUPrvL: |
| 25803 | case VE::PVFMAXUPrvL_v: |
| 25804 | case VE::PVFMAXUPrv_v: |
| 25805 | case VE::PVFMAXUPrvl: |
| 25806 | case VE::PVFMAXUPrvl_v: |
| 25807 | case VE::PVFMAXiv: |
| 25808 | case VE::PVFMAXivL: |
| 25809 | case VE::PVFMAXivL_v: |
| 25810 | case VE::PVFMAXiv_v: |
| 25811 | case VE::PVFMAXivl: |
| 25812 | case VE::PVFMAXivl_v: |
| 25813 | case VE::PVFMAXrv: |
| 25814 | case VE::PVFMAXrvL: |
| 25815 | case VE::PVFMAXrvL_v: |
| 25816 | case VE::PVFMAXrv_v: |
| 25817 | case VE::PVFMAXrvl: |
| 25818 | case VE::PVFMAXrvl_v: |
| 25819 | case VE::PVFMINLOiv: |
| 25820 | case VE::PVFMINLOivL: |
| 25821 | case VE::PVFMINLOivL_v: |
| 25822 | case VE::PVFMINLOiv_v: |
| 25823 | case VE::PVFMINLOivl: |
| 25824 | case VE::PVFMINLOivl_v: |
| 25825 | case VE::PVFMINLOrv: |
| 25826 | case VE::PVFMINLOrvL: |
| 25827 | case VE::PVFMINLOrvL_v: |
| 25828 | case VE::PVFMINLOrv_v: |
| 25829 | case VE::PVFMINLOrvl: |
| 25830 | case VE::PVFMINLOrvl_v: |
| 25831 | case VE::PVFMINUPiv: |
| 25832 | case VE::PVFMINUPivL: |
| 25833 | case VE::PVFMINUPivL_v: |
| 25834 | case VE::PVFMINUPiv_v: |
| 25835 | case VE::PVFMINUPivl: |
| 25836 | case VE::PVFMINUPivl_v: |
| 25837 | case VE::PVFMINUPrv: |
| 25838 | case VE::PVFMINUPrvL: |
| 25839 | case VE::PVFMINUPrvL_v: |
| 25840 | case VE::PVFMINUPrv_v: |
| 25841 | case VE::PVFMINUPrvl: |
| 25842 | case VE::PVFMINUPrvl_v: |
| 25843 | case VE::PVFMINiv: |
| 25844 | case VE::PVFMINivL: |
| 25845 | case VE::PVFMINivL_v: |
| 25846 | case VE::PVFMINiv_v: |
| 25847 | case VE::PVFMINivl: |
| 25848 | case VE::PVFMINivl_v: |
| 25849 | case VE::PVFMINrv: |
| 25850 | case VE::PVFMINrvL: |
| 25851 | case VE::PVFMINrvL_v: |
| 25852 | case VE::PVFMINrv_v: |
| 25853 | case VE::PVFMINrvl: |
| 25854 | case VE::PVFMINrvl_v: |
| 25855 | case VE::PVFMULLOiv: |
| 25856 | case VE::PVFMULLOivL: |
| 25857 | case VE::PVFMULLOivL_v: |
| 25858 | case VE::PVFMULLOiv_v: |
| 25859 | case VE::PVFMULLOivl: |
| 25860 | case VE::PVFMULLOivl_v: |
| 25861 | case VE::PVFMULLOrv: |
| 25862 | case VE::PVFMULLOrvL: |
| 25863 | case VE::PVFMULLOrvL_v: |
| 25864 | case VE::PVFMULLOrv_v: |
| 25865 | case VE::PVFMULLOrvl: |
| 25866 | case VE::PVFMULLOrvl_v: |
| 25867 | case VE::PVFMULUPiv: |
| 25868 | case VE::PVFMULUPivL: |
| 25869 | case VE::PVFMULUPivL_v: |
| 25870 | case VE::PVFMULUPiv_v: |
| 25871 | case VE::PVFMULUPivl: |
| 25872 | case VE::PVFMULUPivl_v: |
| 25873 | case VE::PVFMULUPrv: |
| 25874 | case VE::PVFMULUPrvL: |
| 25875 | case VE::PVFMULUPrvL_v: |
| 25876 | case VE::PVFMULUPrv_v: |
| 25877 | case VE::PVFMULUPrvl: |
| 25878 | case VE::PVFMULUPrvl_v: |
| 25879 | case VE::PVFMULiv: |
| 25880 | case VE::PVFMULivL: |
| 25881 | case VE::PVFMULivL_v: |
| 25882 | case VE::PVFMULiv_v: |
| 25883 | case VE::PVFMULivl: |
| 25884 | case VE::PVFMULivl_v: |
| 25885 | case VE::PVFMULrv: |
| 25886 | case VE::PVFMULrvL: |
| 25887 | case VE::PVFMULrvL_v: |
| 25888 | case VE::PVFMULrv_v: |
| 25889 | case VE::PVFMULrvl: |
| 25890 | case VE::PVFMULrvl_v: |
| 25891 | case VE::PVFSUBLOiv: |
| 25892 | case VE::PVFSUBLOivL: |
| 25893 | case VE::PVFSUBLOivL_v: |
| 25894 | case VE::PVFSUBLOiv_v: |
| 25895 | case VE::PVFSUBLOivl: |
| 25896 | case VE::PVFSUBLOivl_v: |
| 25897 | case VE::PVFSUBLOrv: |
| 25898 | case VE::PVFSUBLOrvL: |
| 25899 | case VE::PVFSUBLOrvL_v: |
| 25900 | case VE::PVFSUBLOrv_v: |
| 25901 | case VE::PVFSUBLOrvl: |
| 25902 | case VE::PVFSUBLOrvl_v: |
| 25903 | case VE::PVFSUBUPiv: |
| 25904 | case VE::PVFSUBUPivL: |
| 25905 | case VE::PVFSUBUPivL_v: |
| 25906 | case VE::PVFSUBUPiv_v: |
| 25907 | case VE::PVFSUBUPivl: |
| 25908 | case VE::PVFSUBUPivl_v: |
| 25909 | case VE::PVFSUBUPrv: |
| 25910 | case VE::PVFSUBUPrvL: |
| 25911 | case VE::PVFSUBUPrvL_v: |
| 25912 | case VE::PVFSUBUPrv_v: |
| 25913 | case VE::PVFSUBUPrvl: |
| 25914 | case VE::PVFSUBUPrvl_v: |
| 25915 | case VE::PVFSUBiv: |
| 25916 | case VE::PVFSUBivL: |
| 25917 | case VE::PVFSUBivL_v: |
| 25918 | case VE::PVFSUBiv_v: |
| 25919 | case VE::PVFSUBivl: |
| 25920 | case VE::PVFSUBivl_v: |
| 25921 | case VE::PVFSUBrv: |
| 25922 | case VE::PVFSUBrvL: |
| 25923 | case VE::PVFSUBrvL_v: |
| 25924 | case VE::PVFSUBrv_v: |
| 25925 | case VE::PVFSUBrvl: |
| 25926 | case VE::PVFSUBrvl_v: |
| 25927 | case VE::PVMAXSLOiv: |
| 25928 | case VE::PVMAXSLOivL: |
| 25929 | case VE::PVMAXSLOivL_v: |
| 25930 | case VE::PVMAXSLOiv_v: |
| 25931 | case VE::PVMAXSLOivl: |
| 25932 | case VE::PVMAXSLOivl_v: |
| 25933 | case VE::PVMAXSLOrv: |
| 25934 | case VE::PVMAXSLOrvL: |
| 25935 | case VE::PVMAXSLOrvL_v: |
| 25936 | case VE::PVMAXSLOrv_v: |
| 25937 | case VE::PVMAXSLOrvl: |
| 25938 | case VE::PVMAXSLOrvl_v: |
| 25939 | case VE::PVMAXSUPiv: |
| 25940 | case VE::PVMAXSUPivL: |
| 25941 | case VE::PVMAXSUPivL_v: |
| 25942 | case VE::PVMAXSUPiv_v: |
| 25943 | case VE::PVMAXSUPivl: |
| 25944 | case VE::PVMAXSUPivl_v: |
| 25945 | case VE::PVMAXSUPrv: |
| 25946 | case VE::PVMAXSUPrvL: |
| 25947 | case VE::PVMAXSUPrvL_v: |
| 25948 | case VE::PVMAXSUPrv_v: |
| 25949 | case VE::PVMAXSUPrvl: |
| 25950 | case VE::PVMAXSUPrvl_v: |
| 25951 | case VE::PVMAXSiv: |
| 25952 | case VE::PVMAXSivL: |
| 25953 | case VE::PVMAXSivL_v: |
| 25954 | case VE::PVMAXSiv_v: |
| 25955 | case VE::PVMAXSivl: |
| 25956 | case VE::PVMAXSivl_v: |
| 25957 | case VE::PVMAXSrv: |
| 25958 | case VE::PVMAXSrvL: |
| 25959 | case VE::PVMAXSrvL_v: |
| 25960 | case VE::PVMAXSrv_v: |
| 25961 | case VE::PVMAXSrvl: |
| 25962 | case VE::PVMAXSrvl_v: |
| 25963 | case VE::PVMINSLOiv: |
| 25964 | case VE::PVMINSLOivL: |
| 25965 | case VE::PVMINSLOivL_v: |
| 25966 | case VE::PVMINSLOiv_v: |
| 25967 | case VE::PVMINSLOivl: |
| 25968 | case VE::PVMINSLOivl_v: |
| 25969 | case VE::PVMINSLOrv: |
| 25970 | case VE::PVMINSLOrvL: |
| 25971 | case VE::PVMINSLOrvL_v: |
| 25972 | case VE::PVMINSLOrv_v: |
| 25973 | case VE::PVMINSLOrvl: |
| 25974 | case VE::PVMINSLOrvl_v: |
| 25975 | case VE::PVMINSUPiv: |
| 25976 | case VE::PVMINSUPivL: |
| 25977 | case VE::PVMINSUPivL_v: |
| 25978 | case VE::PVMINSUPiv_v: |
| 25979 | case VE::PVMINSUPivl: |
| 25980 | case VE::PVMINSUPivl_v: |
| 25981 | case VE::PVMINSUPrv: |
| 25982 | case VE::PVMINSUPrvL: |
| 25983 | case VE::PVMINSUPrvL_v: |
| 25984 | case VE::PVMINSUPrv_v: |
| 25985 | case VE::PVMINSUPrvl: |
| 25986 | case VE::PVMINSUPrvl_v: |
| 25987 | case VE::PVMINSiv: |
| 25988 | case VE::PVMINSivL: |
| 25989 | case VE::PVMINSivL_v: |
| 25990 | case VE::PVMINSiv_v: |
| 25991 | case VE::PVMINSivl: |
| 25992 | case VE::PVMINSivl_v: |
| 25993 | case VE::PVMINSrv: |
| 25994 | case VE::PVMINSrvL: |
| 25995 | case VE::PVMINSrvL_v: |
| 25996 | case VE::PVMINSrv_v: |
| 25997 | case VE::PVMINSrvl: |
| 25998 | case VE::PVMINSrvl_v: |
| 25999 | case VE::PVORLOmv: |
| 26000 | case VE::PVORLOmvL: |
| 26001 | case VE::PVORLOmvL_v: |
| 26002 | case VE::PVORLOmv_v: |
| 26003 | case VE::PVORLOmvl: |
| 26004 | case VE::PVORLOmvl_v: |
| 26005 | case VE::PVORLOrv: |
| 26006 | case VE::PVORLOrvL: |
| 26007 | case VE::PVORLOrvL_v: |
| 26008 | case VE::PVORLOrv_v: |
| 26009 | case VE::PVORLOrvl: |
| 26010 | case VE::PVORLOrvl_v: |
| 26011 | case VE::PVORUPmv: |
| 26012 | case VE::PVORUPmvL: |
| 26013 | case VE::PVORUPmvL_v: |
| 26014 | case VE::PVORUPmv_v: |
| 26015 | case VE::PVORUPmvl: |
| 26016 | case VE::PVORUPmvl_v: |
| 26017 | case VE::PVORUPrv: |
| 26018 | case VE::PVORUPrvL: |
| 26019 | case VE::PVORUPrvL_v: |
| 26020 | case VE::PVORUPrv_v: |
| 26021 | case VE::PVORUPrvl: |
| 26022 | case VE::PVORUPrvl_v: |
| 26023 | case VE::PVORmv: |
| 26024 | case VE::PVORmvL: |
| 26025 | case VE::PVORmvL_v: |
| 26026 | case VE::PVORmv_v: |
| 26027 | case VE::PVORmvl: |
| 26028 | case VE::PVORmvl_v: |
| 26029 | case VE::PVORrv: |
| 26030 | case VE::PVORrvL: |
| 26031 | case VE::PVORrvL_v: |
| 26032 | case VE::PVORrv_v: |
| 26033 | case VE::PVORrvl: |
| 26034 | case VE::PVORrvl_v: |
| 26035 | case VE::PVSUBSLOiv: |
| 26036 | case VE::PVSUBSLOivL: |
| 26037 | case VE::PVSUBSLOivL_v: |
| 26038 | case VE::PVSUBSLOiv_v: |
| 26039 | case VE::PVSUBSLOivl: |
| 26040 | case VE::PVSUBSLOivl_v: |
| 26041 | case VE::PVSUBSLOrv: |
| 26042 | case VE::PVSUBSLOrvL: |
| 26043 | case VE::PVSUBSLOrvL_v: |
| 26044 | case VE::PVSUBSLOrv_v: |
| 26045 | case VE::PVSUBSLOrvl: |
| 26046 | case VE::PVSUBSLOrvl_v: |
| 26047 | case VE::PVSUBSUPiv: |
| 26048 | case VE::PVSUBSUPivL: |
| 26049 | case VE::PVSUBSUPivL_v: |
| 26050 | case VE::PVSUBSUPiv_v: |
| 26051 | case VE::PVSUBSUPivl: |
| 26052 | case VE::PVSUBSUPivl_v: |
| 26053 | case VE::PVSUBSUPrv: |
| 26054 | case VE::PVSUBSUPrvL: |
| 26055 | case VE::PVSUBSUPrvL_v: |
| 26056 | case VE::PVSUBSUPrv_v: |
| 26057 | case VE::PVSUBSUPrvl: |
| 26058 | case VE::PVSUBSUPrvl_v: |
| 26059 | case VE::PVSUBSiv: |
| 26060 | case VE::PVSUBSivL: |
| 26061 | case VE::PVSUBSivL_v: |
| 26062 | case VE::PVSUBSiv_v: |
| 26063 | case VE::PVSUBSivl: |
| 26064 | case VE::PVSUBSivl_v: |
| 26065 | case VE::PVSUBSrv: |
| 26066 | case VE::PVSUBSrvL: |
| 26067 | case VE::PVSUBSrvL_v: |
| 26068 | case VE::PVSUBSrv_v: |
| 26069 | case VE::PVSUBSrvl: |
| 26070 | case VE::PVSUBSrvl_v: |
| 26071 | case VE::PVSUBULOiv: |
| 26072 | case VE::PVSUBULOivL: |
| 26073 | case VE::PVSUBULOivL_v: |
| 26074 | case VE::PVSUBULOiv_v: |
| 26075 | case VE::PVSUBULOivl: |
| 26076 | case VE::PVSUBULOivl_v: |
| 26077 | case VE::PVSUBULOrv: |
| 26078 | case VE::PVSUBULOrvL: |
| 26079 | case VE::PVSUBULOrvL_v: |
| 26080 | case VE::PVSUBULOrv_v: |
| 26081 | case VE::PVSUBULOrvl: |
| 26082 | case VE::PVSUBULOrvl_v: |
| 26083 | case VE::PVSUBUUPiv: |
| 26084 | case VE::PVSUBUUPivL: |
| 26085 | case VE::PVSUBUUPivL_v: |
| 26086 | case VE::PVSUBUUPiv_v: |
| 26087 | case VE::PVSUBUUPivl: |
| 26088 | case VE::PVSUBUUPivl_v: |
| 26089 | case VE::PVSUBUUPrv: |
| 26090 | case VE::PVSUBUUPrvL: |
| 26091 | case VE::PVSUBUUPrvL_v: |
| 26092 | case VE::PVSUBUUPrv_v: |
| 26093 | case VE::PVSUBUUPrvl: |
| 26094 | case VE::PVSUBUUPrvl_v: |
| 26095 | case VE::PVSUBUiv: |
| 26096 | case VE::PVSUBUivL: |
| 26097 | case VE::PVSUBUivL_v: |
| 26098 | case VE::PVSUBUiv_v: |
| 26099 | case VE::PVSUBUivl: |
| 26100 | case VE::PVSUBUivl_v: |
| 26101 | case VE::PVSUBUrv: |
| 26102 | case VE::PVSUBUrvL: |
| 26103 | case VE::PVSUBUrvL_v: |
| 26104 | case VE::PVSUBUrv_v: |
| 26105 | case VE::PVSUBUrvl: |
| 26106 | case VE::PVSUBUrvl_v: |
| 26107 | case VE::PVXORLOmv: |
| 26108 | case VE::PVXORLOmvL: |
| 26109 | case VE::PVXORLOmvL_v: |
| 26110 | case VE::PVXORLOmv_v: |
| 26111 | case VE::PVXORLOmvl: |
| 26112 | case VE::PVXORLOmvl_v: |
| 26113 | case VE::PVXORLOrv: |
| 26114 | case VE::PVXORLOrvL: |
| 26115 | case VE::PVXORLOrvL_v: |
| 26116 | case VE::PVXORLOrv_v: |
| 26117 | case VE::PVXORLOrvl: |
| 26118 | case VE::PVXORLOrvl_v: |
| 26119 | case VE::PVXORUPmv: |
| 26120 | case VE::PVXORUPmvL: |
| 26121 | case VE::PVXORUPmvL_v: |
| 26122 | case VE::PVXORUPmv_v: |
| 26123 | case VE::PVXORUPmvl: |
| 26124 | case VE::PVXORUPmvl_v: |
| 26125 | case VE::PVXORUPrv: |
| 26126 | case VE::PVXORUPrvL: |
| 26127 | case VE::PVXORUPrvL_v: |
| 26128 | case VE::PVXORUPrv_v: |
| 26129 | case VE::PVXORUPrvl: |
| 26130 | case VE::PVXORUPrvl_v: |
| 26131 | case VE::PVXORmv: |
| 26132 | case VE::PVXORmvL: |
| 26133 | case VE::PVXORmvL_v: |
| 26134 | case VE::PVXORmv_v: |
| 26135 | case VE::PVXORmvl: |
| 26136 | case VE::PVXORmvl_v: |
| 26137 | case VE::PVXORrv: |
| 26138 | case VE::PVXORrvL: |
| 26139 | case VE::PVXORrvL_v: |
| 26140 | case VE::PVXORrv_v: |
| 26141 | case VE::PVXORrvl: |
| 26142 | case VE::PVXORrvl_v: |
| 26143 | case VE::VADDSLiv: |
| 26144 | case VE::VADDSLivL: |
| 26145 | case VE::VADDSLivL_v: |
| 26146 | case VE::VADDSLiv_v: |
| 26147 | case VE::VADDSLivl: |
| 26148 | case VE::VADDSLivl_v: |
| 26149 | case VE::VADDSLrv: |
| 26150 | case VE::VADDSLrvL: |
| 26151 | case VE::VADDSLrvL_v: |
| 26152 | case VE::VADDSLrv_v: |
| 26153 | case VE::VADDSLrvl: |
| 26154 | case VE::VADDSLrvl_v: |
| 26155 | case VE::VADDSWSXiv: |
| 26156 | case VE::VADDSWSXivL: |
| 26157 | case VE::VADDSWSXivL_v: |
| 26158 | case VE::VADDSWSXiv_v: |
| 26159 | case VE::VADDSWSXivl: |
| 26160 | case VE::VADDSWSXivl_v: |
| 26161 | case VE::VADDSWSXrv: |
| 26162 | case VE::VADDSWSXrvL: |
| 26163 | case VE::VADDSWSXrvL_v: |
| 26164 | case VE::VADDSWSXrv_v: |
| 26165 | case VE::VADDSWSXrvl: |
| 26166 | case VE::VADDSWSXrvl_v: |
| 26167 | case VE::VADDSWZXiv: |
| 26168 | case VE::VADDSWZXivL: |
| 26169 | case VE::VADDSWZXivL_v: |
| 26170 | case VE::VADDSWZXiv_v: |
| 26171 | case VE::VADDSWZXivl: |
| 26172 | case VE::VADDSWZXivl_v: |
| 26173 | case VE::VADDSWZXrv: |
| 26174 | case VE::VADDSWZXrvL: |
| 26175 | case VE::VADDSWZXrvL_v: |
| 26176 | case VE::VADDSWZXrv_v: |
| 26177 | case VE::VADDSWZXrvl: |
| 26178 | case VE::VADDSWZXrvl_v: |
| 26179 | case VE::VADDULiv: |
| 26180 | case VE::VADDULivL: |
| 26181 | case VE::VADDULivL_v: |
| 26182 | case VE::VADDULiv_v: |
| 26183 | case VE::VADDULivl: |
| 26184 | case VE::VADDULivl_v: |
| 26185 | case VE::VADDULrv: |
| 26186 | case VE::VADDULrvL: |
| 26187 | case VE::VADDULrvL_v: |
| 26188 | case VE::VADDULrv_v: |
| 26189 | case VE::VADDULrvl: |
| 26190 | case VE::VADDULrvl_v: |
| 26191 | case VE::VADDUWiv: |
| 26192 | case VE::VADDUWivL: |
| 26193 | case VE::VADDUWivL_v: |
| 26194 | case VE::VADDUWiv_v: |
| 26195 | case VE::VADDUWivl: |
| 26196 | case VE::VADDUWivl_v: |
| 26197 | case VE::VADDUWrv: |
| 26198 | case VE::VADDUWrvL: |
| 26199 | case VE::VADDUWrvL_v: |
| 26200 | case VE::VADDUWrv_v: |
| 26201 | case VE::VADDUWrvl: |
| 26202 | case VE::VADDUWrvl_v: |
| 26203 | case VE::VANDmv: |
| 26204 | case VE::VANDmvL: |
| 26205 | case VE::VANDmvL_v: |
| 26206 | case VE::VANDmv_v: |
| 26207 | case VE::VANDmvl: |
| 26208 | case VE::VANDmvl_v: |
| 26209 | case VE::VANDrv: |
| 26210 | case VE::VANDrvL: |
| 26211 | case VE::VANDrvL_v: |
| 26212 | case VE::VANDrv_v: |
| 26213 | case VE::VANDrvl: |
| 26214 | case VE::VANDrvl_v: |
| 26215 | case VE::VCMPSLiv: |
| 26216 | case VE::VCMPSLivL: |
| 26217 | case VE::VCMPSLivL_v: |
| 26218 | case VE::VCMPSLiv_v: |
| 26219 | case VE::VCMPSLivl: |
| 26220 | case VE::VCMPSLivl_v: |
| 26221 | case VE::VCMPSLrv: |
| 26222 | case VE::VCMPSLrvL: |
| 26223 | case VE::VCMPSLrvL_v: |
| 26224 | case VE::VCMPSLrv_v: |
| 26225 | case VE::VCMPSLrvl: |
| 26226 | case VE::VCMPSLrvl_v: |
| 26227 | case VE::VCMPSWSXiv: |
| 26228 | case VE::VCMPSWSXivL: |
| 26229 | case VE::VCMPSWSXivL_v: |
| 26230 | case VE::VCMPSWSXiv_v: |
| 26231 | case VE::VCMPSWSXivl: |
| 26232 | case VE::VCMPSWSXivl_v: |
| 26233 | case VE::VCMPSWSXrv: |
| 26234 | case VE::VCMPSWSXrvL: |
| 26235 | case VE::VCMPSWSXrvL_v: |
| 26236 | case VE::VCMPSWSXrv_v: |
| 26237 | case VE::VCMPSWSXrvl: |
| 26238 | case VE::VCMPSWSXrvl_v: |
| 26239 | case VE::VCMPSWZXiv: |
| 26240 | case VE::VCMPSWZXivL: |
| 26241 | case VE::VCMPSWZXivL_v: |
| 26242 | case VE::VCMPSWZXiv_v: |
| 26243 | case VE::VCMPSWZXivl: |
| 26244 | case VE::VCMPSWZXivl_v: |
| 26245 | case VE::VCMPSWZXrv: |
| 26246 | case VE::VCMPSWZXrvL: |
| 26247 | case VE::VCMPSWZXrvL_v: |
| 26248 | case VE::VCMPSWZXrv_v: |
| 26249 | case VE::VCMPSWZXrvl: |
| 26250 | case VE::VCMPSWZXrvl_v: |
| 26251 | case VE::VCMPULiv: |
| 26252 | case VE::VCMPULivL: |
| 26253 | case VE::VCMPULivL_v: |
| 26254 | case VE::VCMPULiv_v: |
| 26255 | case VE::VCMPULivl: |
| 26256 | case VE::VCMPULivl_v: |
| 26257 | case VE::VCMPULrv: |
| 26258 | case VE::VCMPULrvL: |
| 26259 | case VE::VCMPULrvL_v: |
| 26260 | case VE::VCMPULrv_v: |
| 26261 | case VE::VCMPULrvl: |
| 26262 | case VE::VCMPULrvl_v: |
| 26263 | case VE::VCMPUWiv: |
| 26264 | case VE::VCMPUWivL: |
| 26265 | case VE::VCMPUWivL_v: |
| 26266 | case VE::VCMPUWiv_v: |
| 26267 | case VE::VCMPUWivl: |
| 26268 | case VE::VCMPUWivl_v: |
| 26269 | case VE::VCMPUWrv: |
| 26270 | case VE::VCMPUWrvL: |
| 26271 | case VE::VCMPUWrvL_v: |
| 26272 | case VE::VCMPUWrv_v: |
| 26273 | case VE::VCMPUWrvl: |
| 26274 | case VE::VCMPUWrvl_v: |
| 26275 | case VE::VDIVSLiv: |
| 26276 | case VE::VDIVSLivL: |
| 26277 | case VE::VDIVSLivL_v: |
| 26278 | case VE::VDIVSLiv_v: |
| 26279 | case VE::VDIVSLivl: |
| 26280 | case VE::VDIVSLivl_v: |
| 26281 | case VE::VDIVSLrv: |
| 26282 | case VE::VDIVSLrvL: |
| 26283 | case VE::VDIVSLrvL_v: |
| 26284 | case VE::VDIVSLrv_v: |
| 26285 | case VE::VDIVSLrvl: |
| 26286 | case VE::VDIVSLrvl_v: |
| 26287 | case VE::VDIVSWSXiv: |
| 26288 | case VE::VDIVSWSXivL: |
| 26289 | case VE::VDIVSWSXivL_v: |
| 26290 | case VE::VDIVSWSXiv_v: |
| 26291 | case VE::VDIVSWSXivl: |
| 26292 | case VE::VDIVSWSXivl_v: |
| 26293 | case VE::VDIVSWSXrv: |
| 26294 | case VE::VDIVSWSXrvL: |
| 26295 | case VE::VDIVSWSXrvL_v: |
| 26296 | case VE::VDIVSWSXrv_v: |
| 26297 | case VE::VDIVSWSXrvl: |
| 26298 | case VE::VDIVSWSXrvl_v: |
| 26299 | case VE::VDIVSWZXiv: |
| 26300 | case VE::VDIVSWZXivL: |
| 26301 | case VE::VDIVSWZXivL_v: |
| 26302 | case VE::VDIVSWZXiv_v: |
| 26303 | case VE::VDIVSWZXivl: |
| 26304 | case VE::VDIVSWZXivl_v: |
| 26305 | case VE::VDIVSWZXrv: |
| 26306 | case VE::VDIVSWZXrvL: |
| 26307 | case VE::VDIVSWZXrvL_v: |
| 26308 | case VE::VDIVSWZXrv_v: |
| 26309 | case VE::VDIVSWZXrvl: |
| 26310 | case VE::VDIVSWZXrvl_v: |
| 26311 | case VE::VDIVULiv: |
| 26312 | case VE::VDIVULivL: |
| 26313 | case VE::VDIVULivL_v: |
| 26314 | case VE::VDIVULiv_v: |
| 26315 | case VE::VDIVULivl: |
| 26316 | case VE::VDIVULivl_v: |
| 26317 | case VE::VDIVULrv: |
| 26318 | case VE::VDIVULrvL: |
| 26319 | case VE::VDIVULrvL_v: |
| 26320 | case VE::VDIVULrv_v: |
| 26321 | case VE::VDIVULrvl: |
| 26322 | case VE::VDIVULrvl_v: |
| 26323 | case VE::VDIVUWiv: |
| 26324 | case VE::VDIVUWivL: |
| 26325 | case VE::VDIVUWivL_v: |
| 26326 | case VE::VDIVUWiv_v: |
| 26327 | case VE::VDIVUWivl: |
| 26328 | case VE::VDIVUWivl_v: |
| 26329 | case VE::VDIVUWrv: |
| 26330 | case VE::VDIVUWrvL: |
| 26331 | case VE::VDIVUWrvL_v: |
| 26332 | case VE::VDIVUWrv_v: |
| 26333 | case VE::VDIVUWrvl: |
| 26334 | case VE::VDIVUWrvl_v: |
| 26335 | case VE::VEQVmv: |
| 26336 | case VE::VEQVmvL: |
| 26337 | case VE::VEQVmvL_v: |
| 26338 | case VE::VEQVmv_v: |
| 26339 | case VE::VEQVmvl: |
| 26340 | case VE::VEQVmvl_v: |
| 26341 | case VE::VEQVrv: |
| 26342 | case VE::VEQVrvL: |
| 26343 | case VE::VEQVrvL_v: |
| 26344 | case VE::VEQVrv_v: |
| 26345 | case VE::VEQVrvl: |
| 26346 | case VE::VEQVrvl_v: |
| 26347 | case VE::VFADDDiv: |
| 26348 | case VE::VFADDDivL: |
| 26349 | case VE::VFADDDivL_v: |
| 26350 | case VE::VFADDDiv_v: |
| 26351 | case VE::VFADDDivl: |
| 26352 | case VE::VFADDDivl_v: |
| 26353 | case VE::VFADDDrv: |
| 26354 | case VE::VFADDDrvL: |
| 26355 | case VE::VFADDDrvL_v: |
| 26356 | case VE::VFADDDrv_v: |
| 26357 | case VE::VFADDDrvl: |
| 26358 | case VE::VFADDDrvl_v: |
| 26359 | case VE::VFADDSiv: |
| 26360 | case VE::VFADDSivL: |
| 26361 | case VE::VFADDSivL_v: |
| 26362 | case VE::VFADDSiv_v: |
| 26363 | case VE::VFADDSivl: |
| 26364 | case VE::VFADDSivl_v: |
| 26365 | case VE::VFADDSrv: |
| 26366 | case VE::VFADDSrvL: |
| 26367 | case VE::VFADDSrvL_v: |
| 26368 | case VE::VFADDSrv_v: |
| 26369 | case VE::VFADDSrvl: |
| 26370 | case VE::VFADDSrvl_v: |
| 26371 | case VE::VFCMPDiv: |
| 26372 | case VE::VFCMPDivL: |
| 26373 | case VE::VFCMPDivL_v: |
| 26374 | case VE::VFCMPDiv_v: |
| 26375 | case VE::VFCMPDivl: |
| 26376 | case VE::VFCMPDivl_v: |
| 26377 | case VE::VFCMPDrv: |
| 26378 | case VE::VFCMPDrvL: |
| 26379 | case VE::VFCMPDrvL_v: |
| 26380 | case VE::VFCMPDrv_v: |
| 26381 | case VE::VFCMPDrvl: |
| 26382 | case VE::VFCMPDrvl_v: |
| 26383 | case VE::VFCMPSiv: |
| 26384 | case VE::VFCMPSivL: |
| 26385 | case VE::VFCMPSivL_v: |
| 26386 | case VE::VFCMPSiv_v: |
| 26387 | case VE::VFCMPSivl: |
| 26388 | case VE::VFCMPSivl_v: |
| 26389 | case VE::VFCMPSrv: |
| 26390 | case VE::VFCMPSrvL: |
| 26391 | case VE::VFCMPSrvL_v: |
| 26392 | case VE::VFCMPSrv_v: |
| 26393 | case VE::VFCMPSrvl: |
| 26394 | case VE::VFCMPSrvl_v: |
| 26395 | case VE::VFDIVDiv: |
| 26396 | case VE::VFDIVDivL: |
| 26397 | case VE::VFDIVDivL_v: |
| 26398 | case VE::VFDIVDiv_v: |
| 26399 | case VE::VFDIVDivl: |
| 26400 | case VE::VFDIVDivl_v: |
| 26401 | case VE::VFDIVDrv: |
| 26402 | case VE::VFDIVDrvL: |
| 26403 | case VE::VFDIVDrvL_v: |
| 26404 | case VE::VFDIVDrv_v: |
| 26405 | case VE::VFDIVDrvl: |
| 26406 | case VE::VFDIVDrvl_v: |
| 26407 | case VE::VFDIVSiv: |
| 26408 | case VE::VFDIVSivL: |
| 26409 | case VE::VFDIVSivL_v: |
| 26410 | case VE::VFDIVSiv_v: |
| 26411 | case VE::VFDIVSivl: |
| 26412 | case VE::VFDIVSivl_v: |
| 26413 | case VE::VFDIVSrv: |
| 26414 | case VE::VFDIVSrvL: |
| 26415 | case VE::VFDIVSrvL_v: |
| 26416 | case VE::VFDIVSrv_v: |
| 26417 | case VE::VFDIVSrvl: |
| 26418 | case VE::VFDIVSrvl_v: |
| 26419 | case VE::VFMAXDiv: |
| 26420 | case VE::VFMAXDivL: |
| 26421 | case VE::VFMAXDivL_v: |
| 26422 | case VE::VFMAXDiv_v: |
| 26423 | case VE::VFMAXDivl: |
| 26424 | case VE::VFMAXDivl_v: |
| 26425 | case VE::VFMAXDrv: |
| 26426 | case VE::VFMAXDrvL: |
| 26427 | case VE::VFMAXDrvL_v: |
| 26428 | case VE::VFMAXDrv_v: |
| 26429 | case VE::VFMAXDrvl: |
| 26430 | case VE::VFMAXDrvl_v: |
| 26431 | case VE::VFMAXSiv: |
| 26432 | case VE::VFMAXSivL: |
| 26433 | case VE::VFMAXSivL_v: |
| 26434 | case VE::VFMAXSiv_v: |
| 26435 | case VE::VFMAXSivl: |
| 26436 | case VE::VFMAXSivl_v: |
| 26437 | case VE::VFMAXSrv: |
| 26438 | case VE::VFMAXSrvL: |
| 26439 | case VE::VFMAXSrvL_v: |
| 26440 | case VE::VFMAXSrv_v: |
| 26441 | case VE::VFMAXSrvl: |
| 26442 | case VE::VFMAXSrvl_v: |
| 26443 | case VE::VFMINDiv: |
| 26444 | case VE::VFMINDivL: |
| 26445 | case VE::VFMINDivL_v: |
| 26446 | case VE::VFMINDiv_v: |
| 26447 | case VE::VFMINDivl: |
| 26448 | case VE::VFMINDivl_v: |
| 26449 | case VE::VFMINDrv: |
| 26450 | case VE::VFMINDrvL: |
| 26451 | case VE::VFMINDrvL_v: |
| 26452 | case VE::VFMINDrv_v: |
| 26453 | case VE::VFMINDrvl: |
| 26454 | case VE::VFMINDrvl_v: |
| 26455 | case VE::VFMINSiv: |
| 26456 | case VE::VFMINSivL: |
| 26457 | case VE::VFMINSivL_v: |
| 26458 | case VE::VFMINSiv_v: |
| 26459 | case VE::VFMINSivl: |
| 26460 | case VE::VFMINSivl_v: |
| 26461 | case VE::VFMINSrv: |
| 26462 | case VE::VFMINSrvL: |
| 26463 | case VE::VFMINSrvL_v: |
| 26464 | case VE::VFMINSrv_v: |
| 26465 | case VE::VFMINSrvl: |
| 26466 | case VE::VFMINSrvl_v: |
| 26467 | case VE::VFMULDiv: |
| 26468 | case VE::VFMULDivL: |
| 26469 | case VE::VFMULDivL_v: |
| 26470 | case VE::VFMULDiv_v: |
| 26471 | case VE::VFMULDivl: |
| 26472 | case VE::VFMULDivl_v: |
| 26473 | case VE::VFMULDrv: |
| 26474 | case VE::VFMULDrvL: |
| 26475 | case VE::VFMULDrvL_v: |
| 26476 | case VE::VFMULDrv_v: |
| 26477 | case VE::VFMULDrvl: |
| 26478 | case VE::VFMULDrvl_v: |
| 26479 | case VE::VFMULSiv: |
| 26480 | case VE::VFMULSivL: |
| 26481 | case VE::VFMULSivL_v: |
| 26482 | case VE::VFMULSiv_v: |
| 26483 | case VE::VFMULSivl: |
| 26484 | case VE::VFMULSivl_v: |
| 26485 | case VE::VFMULSrv: |
| 26486 | case VE::VFMULSrvL: |
| 26487 | case VE::VFMULSrvL_v: |
| 26488 | case VE::VFMULSrv_v: |
| 26489 | case VE::VFMULSrvl: |
| 26490 | case VE::VFMULSrvl_v: |
| 26491 | case VE::VFSUBDiv: |
| 26492 | case VE::VFSUBDivL: |
| 26493 | case VE::VFSUBDivL_v: |
| 26494 | case VE::VFSUBDiv_v: |
| 26495 | case VE::VFSUBDivl: |
| 26496 | case VE::VFSUBDivl_v: |
| 26497 | case VE::VFSUBDrv: |
| 26498 | case VE::VFSUBDrvL: |
| 26499 | case VE::VFSUBDrvL_v: |
| 26500 | case VE::VFSUBDrv_v: |
| 26501 | case VE::VFSUBDrvl: |
| 26502 | case VE::VFSUBDrvl_v: |
| 26503 | case VE::VFSUBSiv: |
| 26504 | case VE::VFSUBSivL: |
| 26505 | case VE::VFSUBSivL_v: |
| 26506 | case VE::VFSUBSiv_v: |
| 26507 | case VE::VFSUBSivl: |
| 26508 | case VE::VFSUBSivl_v: |
| 26509 | case VE::VFSUBSrv: |
| 26510 | case VE::VFSUBSrvL: |
| 26511 | case VE::VFSUBSrvL_v: |
| 26512 | case VE::VFSUBSrv_v: |
| 26513 | case VE::VFSUBSrvl: |
| 26514 | case VE::VFSUBSrvl_v: |
| 26515 | case VE::VMAXSLiv: |
| 26516 | case VE::VMAXSLivL: |
| 26517 | case VE::VMAXSLivL_v: |
| 26518 | case VE::VMAXSLiv_v: |
| 26519 | case VE::VMAXSLivl: |
| 26520 | case VE::VMAXSLivl_v: |
| 26521 | case VE::VMAXSLrv: |
| 26522 | case VE::VMAXSLrvL: |
| 26523 | case VE::VMAXSLrvL_v: |
| 26524 | case VE::VMAXSLrv_v: |
| 26525 | case VE::VMAXSLrvl: |
| 26526 | case VE::VMAXSLrvl_v: |
| 26527 | case VE::VMAXSWSXiv: |
| 26528 | case VE::VMAXSWSXivL: |
| 26529 | case VE::VMAXSWSXivL_v: |
| 26530 | case VE::VMAXSWSXiv_v: |
| 26531 | case VE::VMAXSWSXivl: |
| 26532 | case VE::VMAXSWSXivl_v: |
| 26533 | case VE::VMAXSWSXrv: |
| 26534 | case VE::VMAXSWSXrvL: |
| 26535 | case VE::VMAXSWSXrvL_v: |
| 26536 | case VE::VMAXSWSXrv_v: |
| 26537 | case VE::VMAXSWSXrvl: |
| 26538 | case VE::VMAXSWSXrvl_v: |
| 26539 | case VE::VMAXSWZXiv: |
| 26540 | case VE::VMAXSWZXivL: |
| 26541 | case VE::VMAXSWZXivL_v: |
| 26542 | case VE::VMAXSWZXiv_v: |
| 26543 | case VE::VMAXSWZXivl: |
| 26544 | case VE::VMAXSWZXivl_v: |
| 26545 | case VE::VMAXSWZXrv: |
| 26546 | case VE::VMAXSWZXrvL: |
| 26547 | case VE::VMAXSWZXrvL_v: |
| 26548 | case VE::VMAXSWZXrv_v: |
| 26549 | case VE::VMAXSWZXrvl: |
| 26550 | case VE::VMAXSWZXrvl_v: |
| 26551 | case VE::VMINSLiv: |
| 26552 | case VE::VMINSLivL: |
| 26553 | case VE::VMINSLivL_v: |
| 26554 | case VE::VMINSLiv_v: |
| 26555 | case VE::VMINSLivl: |
| 26556 | case VE::VMINSLivl_v: |
| 26557 | case VE::VMINSLrv: |
| 26558 | case VE::VMINSLrvL: |
| 26559 | case VE::VMINSLrvL_v: |
| 26560 | case VE::VMINSLrv_v: |
| 26561 | case VE::VMINSLrvl: |
| 26562 | case VE::VMINSLrvl_v: |
| 26563 | case VE::VMINSWSXiv: |
| 26564 | case VE::VMINSWSXivL: |
| 26565 | case VE::VMINSWSXivL_v: |
| 26566 | case VE::VMINSWSXiv_v: |
| 26567 | case VE::VMINSWSXivl: |
| 26568 | case VE::VMINSWSXivl_v: |
| 26569 | case VE::VMINSWSXrv: |
| 26570 | case VE::VMINSWSXrvL: |
| 26571 | case VE::VMINSWSXrvL_v: |
| 26572 | case VE::VMINSWSXrv_v: |
| 26573 | case VE::VMINSWSXrvl: |
| 26574 | case VE::VMINSWSXrvl_v: |
| 26575 | case VE::VMINSWZXiv: |
| 26576 | case VE::VMINSWZXivL: |
| 26577 | case VE::VMINSWZXivL_v: |
| 26578 | case VE::VMINSWZXiv_v: |
| 26579 | case VE::VMINSWZXivl: |
| 26580 | case VE::VMINSWZXivl_v: |
| 26581 | case VE::VMINSWZXrv: |
| 26582 | case VE::VMINSWZXrvL: |
| 26583 | case VE::VMINSWZXrvL_v: |
| 26584 | case VE::VMINSWZXrv_v: |
| 26585 | case VE::VMINSWZXrvl: |
| 26586 | case VE::VMINSWZXrvl_v: |
| 26587 | case VE::VMRGWiv: |
| 26588 | case VE::VMRGWivL: |
| 26589 | case VE::VMRGWivL_v: |
| 26590 | case VE::VMRGWiv_v: |
| 26591 | case VE::VMRGWivl: |
| 26592 | case VE::VMRGWivl_v: |
| 26593 | case VE::VMRGWrv: |
| 26594 | case VE::VMRGWrvL: |
| 26595 | case VE::VMRGWrvL_v: |
| 26596 | case VE::VMRGWrv_v: |
| 26597 | case VE::VMRGWrvl: |
| 26598 | case VE::VMRGWrvl_v: |
| 26599 | case VE::VMRGiv: |
| 26600 | case VE::VMRGivL: |
| 26601 | case VE::VMRGivL_v: |
| 26602 | case VE::VMRGiv_v: |
| 26603 | case VE::VMRGivl: |
| 26604 | case VE::VMRGivl_v: |
| 26605 | case VE::VMRGrv: |
| 26606 | case VE::VMRGrvL: |
| 26607 | case VE::VMRGrvL_v: |
| 26608 | case VE::VMRGrv_v: |
| 26609 | case VE::VMRGrvl: |
| 26610 | case VE::VMRGrvl_v: |
| 26611 | case VE::VMULSLWiv: |
| 26612 | case VE::VMULSLWivL: |
| 26613 | case VE::VMULSLWivL_v: |
| 26614 | case VE::VMULSLWiv_v: |
| 26615 | case VE::VMULSLWivl: |
| 26616 | case VE::VMULSLWivl_v: |
| 26617 | case VE::VMULSLWrv: |
| 26618 | case VE::VMULSLWrvL: |
| 26619 | case VE::VMULSLWrvL_v: |
| 26620 | case VE::VMULSLWrv_v: |
| 26621 | case VE::VMULSLWrvl: |
| 26622 | case VE::VMULSLWrvl_v: |
| 26623 | case VE::VMULSLiv: |
| 26624 | case VE::VMULSLivL: |
| 26625 | case VE::VMULSLivL_v: |
| 26626 | case VE::VMULSLiv_v: |
| 26627 | case VE::VMULSLivl: |
| 26628 | case VE::VMULSLivl_v: |
| 26629 | case VE::VMULSLrv: |
| 26630 | case VE::VMULSLrvL: |
| 26631 | case VE::VMULSLrvL_v: |
| 26632 | case VE::VMULSLrv_v: |
| 26633 | case VE::VMULSLrvl: |
| 26634 | case VE::VMULSLrvl_v: |
| 26635 | case VE::VMULSWSXiv: |
| 26636 | case VE::VMULSWSXivL: |
| 26637 | case VE::VMULSWSXivL_v: |
| 26638 | case VE::VMULSWSXiv_v: |
| 26639 | case VE::VMULSWSXivl: |
| 26640 | case VE::VMULSWSXivl_v: |
| 26641 | case VE::VMULSWSXrv: |
| 26642 | case VE::VMULSWSXrvL: |
| 26643 | case VE::VMULSWSXrvL_v: |
| 26644 | case VE::VMULSWSXrv_v: |
| 26645 | case VE::VMULSWSXrvl: |
| 26646 | case VE::VMULSWSXrvl_v: |
| 26647 | case VE::VMULSWZXiv: |
| 26648 | case VE::VMULSWZXivL: |
| 26649 | case VE::VMULSWZXivL_v: |
| 26650 | case VE::VMULSWZXiv_v: |
| 26651 | case VE::VMULSWZXivl: |
| 26652 | case VE::VMULSWZXivl_v: |
| 26653 | case VE::VMULSWZXrv: |
| 26654 | case VE::VMULSWZXrvL: |
| 26655 | case VE::VMULSWZXrvL_v: |
| 26656 | case VE::VMULSWZXrv_v: |
| 26657 | case VE::VMULSWZXrvl: |
| 26658 | case VE::VMULSWZXrvl_v: |
| 26659 | case VE::VMULULiv: |
| 26660 | case VE::VMULULivL: |
| 26661 | case VE::VMULULivL_v: |
| 26662 | case VE::VMULULiv_v: |
| 26663 | case VE::VMULULivl: |
| 26664 | case VE::VMULULivl_v: |
| 26665 | case VE::VMULULrv: |
| 26666 | case VE::VMULULrvL: |
| 26667 | case VE::VMULULrvL_v: |
| 26668 | case VE::VMULULrv_v: |
| 26669 | case VE::VMULULrvl: |
| 26670 | case VE::VMULULrvl_v: |
| 26671 | case VE::VMULUWiv: |
| 26672 | case VE::VMULUWivL: |
| 26673 | case VE::VMULUWivL_v: |
| 26674 | case VE::VMULUWiv_v: |
| 26675 | case VE::VMULUWivl: |
| 26676 | case VE::VMULUWivl_v: |
| 26677 | case VE::VMULUWrv: |
| 26678 | case VE::VMULUWrvL: |
| 26679 | case VE::VMULUWrvL_v: |
| 26680 | case VE::VMULUWrv_v: |
| 26681 | case VE::VMULUWrvl: |
| 26682 | case VE::VMULUWrvl_v: |
| 26683 | case VE::VMViv: |
| 26684 | case VE::VMVivL: |
| 26685 | case VE::VMVivL_v: |
| 26686 | case VE::VMViv_v: |
| 26687 | case VE::VMVivl: |
| 26688 | case VE::VMVivl_v: |
| 26689 | case VE::VMVrv: |
| 26690 | case VE::VMVrvL: |
| 26691 | case VE::VMVrvL_v: |
| 26692 | case VE::VMVrv_v: |
| 26693 | case VE::VMVrvl: |
| 26694 | case VE::VMVrvl_v: |
| 26695 | case VE::VORmv: |
| 26696 | case VE::VORmvL: |
| 26697 | case VE::VORmvL_v: |
| 26698 | case VE::VORmv_v: |
| 26699 | case VE::VORmvl: |
| 26700 | case VE::VORmvl_v: |
| 26701 | case VE::VORrv: |
| 26702 | case VE::VORrvL: |
| 26703 | case VE::VORrvL_v: |
| 26704 | case VE::VORrv_v: |
| 26705 | case VE::VORrvl: |
| 26706 | case VE::VORrvl_v: |
| 26707 | case VE::VSUBSLiv: |
| 26708 | case VE::VSUBSLivL: |
| 26709 | case VE::VSUBSLivL_v: |
| 26710 | case VE::VSUBSLiv_v: |
| 26711 | case VE::VSUBSLivl: |
| 26712 | case VE::VSUBSLivl_v: |
| 26713 | case VE::VSUBSLrv: |
| 26714 | case VE::VSUBSLrvL: |
| 26715 | case VE::VSUBSLrvL_v: |
| 26716 | case VE::VSUBSLrv_v: |
| 26717 | case VE::VSUBSLrvl: |
| 26718 | case VE::VSUBSLrvl_v: |
| 26719 | case VE::VSUBSWSXiv: |
| 26720 | case VE::VSUBSWSXivL: |
| 26721 | case VE::VSUBSWSXivL_v: |
| 26722 | case VE::VSUBSWSXiv_v: |
| 26723 | case VE::VSUBSWSXivl: |
| 26724 | case VE::VSUBSWSXivl_v: |
| 26725 | case VE::VSUBSWSXrv: |
| 26726 | case VE::VSUBSWSXrvL: |
| 26727 | case VE::VSUBSWSXrvL_v: |
| 26728 | case VE::VSUBSWSXrv_v: |
| 26729 | case VE::VSUBSWSXrvl: |
| 26730 | case VE::VSUBSWSXrvl_v: |
| 26731 | case VE::VSUBSWZXiv: |
| 26732 | case VE::VSUBSWZXivL: |
| 26733 | case VE::VSUBSWZXivL_v: |
| 26734 | case VE::VSUBSWZXiv_v: |
| 26735 | case VE::VSUBSWZXivl: |
| 26736 | case VE::VSUBSWZXivl_v: |
| 26737 | case VE::VSUBSWZXrv: |
| 26738 | case VE::VSUBSWZXrvL: |
| 26739 | case VE::VSUBSWZXrvL_v: |
| 26740 | case VE::VSUBSWZXrv_v: |
| 26741 | case VE::VSUBSWZXrvl: |
| 26742 | case VE::VSUBSWZXrvl_v: |
| 26743 | case VE::VSUBULiv: |
| 26744 | case VE::VSUBULivL: |
| 26745 | case VE::VSUBULivL_v: |
| 26746 | case VE::VSUBULiv_v: |
| 26747 | case VE::VSUBULivl: |
| 26748 | case VE::VSUBULivl_v: |
| 26749 | case VE::VSUBULrv: |
| 26750 | case VE::VSUBULrvL: |
| 26751 | case VE::VSUBULrvL_v: |
| 26752 | case VE::VSUBULrv_v: |
| 26753 | case VE::VSUBULrvl: |
| 26754 | case VE::VSUBULrvl_v: |
| 26755 | case VE::VSUBUWiv: |
| 26756 | case VE::VSUBUWivL: |
| 26757 | case VE::VSUBUWivL_v: |
| 26758 | case VE::VSUBUWiv_v: |
| 26759 | case VE::VSUBUWivl: |
| 26760 | case VE::VSUBUWivl_v: |
| 26761 | case VE::VSUBUWrv: |
| 26762 | case VE::VSUBUWrvL: |
| 26763 | case VE::VSUBUWrvL_v: |
| 26764 | case VE::VSUBUWrv_v: |
| 26765 | case VE::VSUBUWrvl: |
| 26766 | case VE::VSUBUWrvl_v: |
| 26767 | case VE::VXORmv: |
| 26768 | case VE::VXORmvL: |
| 26769 | case VE::VXORmvL_v: |
| 26770 | case VE::VXORmv_v: |
| 26771 | case VE::VXORmvl: |
| 26772 | case VE::VXORmvl_v: |
| 26773 | case VE::VXORrv: |
| 26774 | case VE::VXORrvL: |
| 26775 | case VE::VXORrvL_v: |
| 26776 | case VE::VXORrv_v: |
| 26777 | case VE::VXORrvl: |
| 26778 | case VE::VXORrvl_v: { |
| 26779 | switch (OpNum) { |
| 26780 | case 1: |
| 26781 | // op: sy |
| 26782 | return 40; |
| 26783 | case 0: |
| 26784 | // op: vx |
| 26785 | return 24; |
| 26786 | case 2: |
| 26787 | // op: vz |
| 26788 | return 8; |
| 26789 | } |
| 26790 | break; |
| 26791 | } |
| 26792 | case VE::PVBRDi: |
| 26793 | case VE::PVBRDiL: |
| 26794 | case VE::PVBRDiL_v: |
| 26795 | case VE::PVBRDi_v: |
| 26796 | case VE::PVBRDil: |
| 26797 | case VE::PVBRDil_v: |
| 26798 | case VE::PVBRDr: |
| 26799 | case VE::PVBRDrL: |
| 26800 | case VE::PVBRDrL_v: |
| 26801 | case VE::PVBRDr_v: |
| 26802 | case VE::PVBRDrl: |
| 26803 | case VE::PVBRDrl_v: |
| 26804 | case VE::VBRDLi: |
| 26805 | case VE::VBRDLiL: |
| 26806 | case VE::VBRDLiL_v: |
| 26807 | case VE::VBRDLi_v: |
| 26808 | case VE::VBRDLil: |
| 26809 | case VE::VBRDLil_v: |
| 26810 | case VE::VBRDLr: |
| 26811 | case VE::VBRDLrL: |
| 26812 | case VE::VBRDLrL_v: |
| 26813 | case VE::VBRDLr_v: |
| 26814 | case VE::VBRDLrl: |
| 26815 | case VE::VBRDLrl_v: |
| 26816 | case VE::VBRDUi: |
| 26817 | case VE::VBRDUiL: |
| 26818 | case VE::VBRDUiL_v: |
| 26819 | case VE::VBRDUi_v: |
| 26820 | case VE::VBRDUil: |
| 26821 | case VE::VBRDUil_v: |
| 26822 | case VE::VBRDUr: |
| 26823 | case VE::VBRDUrL: |
| 26824 | case VE::VBRDUrL_v: |
| 26825 | case VE::VBRDUr_v: |
| 26826 | case VE::VBRDUrl: |
| 26827 | case VE::VBRDUrl_v: |
| 26828 | case VE::VBRDi: |
| 26829 | case VE::VBRDiL: |
| 26830 | case VE::VBRDiL_v: |
| 26831 | case VE::VBRDi_v: |
| 26832 | case VE::VBRDil: |
| 26833 | case VE::VBRDil_v: |
| 26834 | case VE::VBRDr: |
| 26835 | case VE::VBRDrL: |
| 26836 | case VE::VBRDrL_v: |
| 26837 | case VE::VBRDr_v: |
| 26838 | case VE::VBRDrl: |
| 26839 | case VE::VBRDrl_v: { |
| 26840 | switch (OpNum) { |
| 26841 | case 1: |
| 26842 | // op: sy |
| 26843 | return 40; |
| 26844 | case 0: |
| 26845 | // op: vx |
| 26846 | return 24; |
| 26847 | } |
| 26848 | break; |
| 26849 | } |
| 26850 | case VE::LSVim: |
| 26851 | case VE::LSVim_v: |
| 26852 | case VE::LSVir: |
| 26853 | case VE::LSVir_v: |
| 26854 | case VE::LSVrm: |
| 26855 | case VE::LSVrm_v: |
| 26856 | case VE::LSVrr: |
| 26857 | case VE::LSVrr_v: |
| 26858 | case VE::LVMim: |
| 26859 | case VE::LVMim_m: |
| 26860 | case VE::LVMir: |
| 26861 | case VE::LVMir_m: |
| 26862 | case VE::LVMrm: |
| 26863 | case VE::LVMrm_m: |
| 26864 | case VE::LVMrr: |
| 26865 | case VE::LVMrr_m: |
| 26866 | case VE::VLD2DNCir: |
| 26867 | case VE::VLD2DNCirL: |
| 26868 | case VE::VLD2DNCirL_v: |
| 26869 | case VE::VLD2DNCir_v: |
| 26870 | case VE::VLD2DNCirl: |
| 26871 | case VE::VLD2DNCirl_v: |
| 26872 | case VE::VLD2DNCiz: |
| 26873 | case VE::VLD2DNCizL: |
| 26874 | case VE::VLD2DNCizL_v: |
| 26875 | case VE::VLD2DNCiz_v: |
| 26876 | case VE::VLD2DNCizl: |
| 26877 | case VE::VLD2DNCizl_v: |
| 26878 | case VE::VLD2DNCrr: |
| 26879 | case VE::VLD2DNCrrL: |
| 26880 | case VE::VLD2DNCrrL_v: |
| 26881 | case VE::VLD2DNCrr_v: |
| 26882 | case VE::VLD2DNCrrl: |
| 26883 | case VE::VLD2DNCrrl_v: |
| 26884 | case VE::VLD2DNCrz: |
| 26885 | case VE::VLD2DNCrzL: |
| 26886 | case VE::VLD2DNCrzL_v: |
| 26887 | case VE::VLD2DNCrz_v: |
| 26888 | case VE::VLD2DNCrzl: |
| 26889 | case VE::VLD2DNCrzl_v: |
| 26890 | case VE::VLD2Dir: |
| 26891 | case VE::VLD2DirL: |
| 26892 | case VE::VLD2DirL_v: |
| 26893 | case VE::VLD2Dir_v: |
| 26894 | case VE::VLD2Dirl: |
| 26895 | case VE::VLD2Dirl_v: |
| 26896 | case VE::VLD2Diz: |
| 26897 | case VE::VLD2DizL: |
| 26898 | case VE::VLD2DizL_v: |
| 26899 | case VE::VLD2Diz_v: |
| 26900 | case VE::VLD2Dizl: |
| 26901 | case VE::VLD2Dizl_v: |
| 26902 | case VE::VLD2Drr: |
| 26903 | case VE::VLD2DrrL: |
| 26904 | case VE::VLD2DrrL_v: |
| 26905 | case VE::VLD2Drr_v: |
| 26906 | case VE::VLD2Drrl: |
| 26907 | case VE::VLD2Drrl_v: |
| 26908 | case VE::VLD2Drz: |
| 26909 | case VE::VLD2DrzL: |
| 26910 | case VE::VLD2DrzL_v: |
| 26911 | case VE::VLD2Drz_v: |
| 26912 | case VE::VLD2Drzl: |
| 26913 | case VE::VLD2Drzl_v: |
| 26914 | case VE::VLDL2DSXNCir: |
| 26915 | case VE::VLDL2DSXNCirL: |
| 26916 | case VE::VLDL2DSXNCirL_v: |
| 26917 | case VE::VLDL2DSXNCir_v: |
| 26918 | case VE::VLDL2DSXNCirl: |
| 26919 | case VE::VLDL2DSXNCirl_v: |
| 26920 | case VE::VLDL2DSXNCiz: |
| 26921 | case VE::VLDL2DSXNCizL: |
| 26922 | case VE::VLDL2DSXNCizL_v: |
| 26923 | case VE::VLDL2DSXNCiz_v: |
| 26924 | case VE::VLDL2DSXNCizl: |
| 26925 | case VE::VLDL2DSXNCizl_v: |
| 26926 | case VE::VLDL2DSXNCrr: |
| 26927 | case VE::VLDL2DSXNCrrL: |
| 26928 | case VE::VLDL2DSXNCrrL_v: |
| 26929 | case VE::VLDL2DSXNCrr_v: |
| 26930 | case VE::VLDL2DSXNCrrl: |
| 26931 | case VE::VLDL2DSXNCrrl_v: |
| 26932 | case VE::VLDL2DSXNCrz: |
| 26933 | case VE::VLDL2DSXNCrzL: |
| 26934 | case VE::VLDL2DSXNCrzL_v: |
| 26935 | case VE::VLDL2DSXNCrz_v: |
| 26936 | case VE::VLDL2DSXNCrzl: |
| 26937 | case VE::VLDL2DSXNCrzl_v: |
| 26938 | case VE::VLDL2DSXir: |
| 26939 | case VE::VLDL2DSXirL: |
| 26940 | case VE::VLDL2DSXirL_v: |
| 26941 | case VE::VLDL2DSXir_v: |
| 26942 | case VE::VLDL2DSXirl: |
| 26943 | case VE::VLDL2DSXirl_v: |
| 26944 | case VE::VLDL2DSXiz: |
| 26945 | case VE::VLDL2DSXizL: |
| 26946 | case VE::VLDL2DSXizL_v: |
| 26947 | case VE::VLDL2DSXiz_v: |
| 26948 | case VE::VLDL2DSXizl: |
| 26949 | case VE::VLDL2DSXizl_v: |
| 26950 | case VE::VLDL2DSXrr: |
| 26951 | case VE::VLDL2DSXrrL: |
| 26952 | case VE::VLDL2DSXrrL_v: |
| 26953 | case VE::VLDL2DSXrr_v: |
| 26954 | case VE::VLDL2DSXrrl: |
| 26955 | case VE::VLDL2DSXrrl_v: |
| 26956 | case VE::VLDL2DSXrz: |
| 26957 | case VE::VLDL2DSXrzL: |
| 26958 | case VE::VLDL2DSXrzL_v: |
| 26959 | case VE::VLDL2DSXrz_v: |
| 26960 | case VE::VLDL2DSXrzl: |
| 26961 | case VE::VLDL2DSXrzl_v: |
| 26962 | case VE::VLDL2DZXNCir: |
| 26963 | case VE::VLDL2DZXNCirL: |
| 26964 | case VE::VLDL2DZXNCirL_v: |
| 26965 | case VE::VLDL2DZXNCir_v: |
| 26966 | case VE::VLDL2DZXNCirl: |
| 26967 | case VE::VLDL2DZXNCirl_v: |
| 26968 | case VE::VLDL2DZXNCiz: |
| 26969 | case VE::VLDL2DZXNCizL: |
| 26970 | case VE::VLDL2DZXNCizL_v: |
| 26971 | case VE::VLDL2DZXNCiz_v: |
| 26972 | case VE::VLDL2DZXNCizl: |
| 26973 | case VE::VLDL2DZXNCizl_v: |
| 26974 | case VE::VLDL2DZXNCrr: |
| 26975 | case VE::VLDL2DZXNCrrL: |
| 26976 | case VE::VLDL2DZXNCrrL_v: |
| 26977 | case VE::VLDL2DZXNCrr_v: |
| 26978 | case VE::VLDL2DZXNCrrl: |
| 26979 | case VE::VLDL2DZXNCrrl_v: |
| 26980 | case VE::VLDL2DZXNCrz: |
| 26981 | case VE::VLDL2DZXNCrzL: |
| 26982 | case VE::VLDL2DZXNCrzL_v: |
| 26983 | case VE::VLDL2DZXNCrz_v: |
| 26984 | case VE::VLDL2DZXNCrzl: |
| 26985 | case VE::VLDL2DZXNCrzl_v: |
| 26986 | case VE::VLDL2DZXir: |
| 26987 | case VE::VLDL2DZXirL: |
| 26988 | case VE::VLDL2DZXirL_v: |
| 26989 | case VE::VLDL2DZXir_v: |
| 26990 | case VE::VLDL2DZXirl: |
| 26991 | case VE::VLDL2DZXirl_v: |
| 26992 | case VE::VLDL2DZXiz: |
| 26993 | case VE::VLDL2DZXizL: |
| 26994 | case VE::VLDL2DZXizL_v: |
| 26995 | case VE::VLDL2DZXiz_v: |
| 26996 | case VE::VLDL2DZXizl: |
| 26997 | case VE::VLDL2DZXizl_v: |
| 26998 | case VE::VLDL2DZXrr: |
| 26999 | case VE::VLDL2DZXrrL: |
| 27000 | case VE::VLDL2DZXrrL_v: |
| 27001 | case VE::VLDL2DZXrr_v: |
| 27002 | case VE::VLDL2DZXrrl: |
| 27003 | case VE::VLDL2DZXrrl_v: |
| 27004 | case VE::VLDL2DZXrz: |
| 27005 | case VE::VLDL2DZXrzL: |
| 27006 | case VE::VLDL2DZXrzL_v: |
| 27007 | case VE::VLDL2DZXrz_v: |
| 27008 | case VE::VLDL2DZXrzl: |
| 27009 | case VE::VLDL2DZXrzl_v: |
| 27010 | case VE::VLDLSXNCir: |
| 27011 | case VE::VLDLSXNCirL: |
| 27012 | case VE::VLDLSXNCirL_v: |
| 27013 | case VE::VLDLSXNCir_v: |
| 27014 | case VE::VLDLSXNCirl: |
| 27015 | case VE::VLDLSXNCirl_v: |
| 27016 | case VE::VLDLSXNCiz: |
| 27017 | case VE::VLDLSXNCizL: |
| 27018 | case VE::VLDLSXNCizL_v: |
| 27019 | case VE::VLDLSXNCiz_v: |
| 27020 | case VE::VLDLSXNCizl: |
| 27021 | case VE::VLDLSXNCizl_v: |
| 27022 | case VE::VLDLSXNCrr: |
| 27023 | case VE::VLDLSXNCrrL: |
| 27024 | case VE::VLDLSXNCrrL_v: |
| 27025 | case VE::VLDLSXNCrr_v: |
| 27026 | case VE::VLDLSXNCrrl: |
| 27027 | case VE::VLDLSXNCrrl_v: |
| 27028 | case VE::VLDLSXNCrz: |
| 27029 | case VE::VLDLSXNCrzL: |
| 27030 | case VE::VLDLSXNCrzL_v: |
| 27031 | case VE::VLDLSXNCrz_v: |
| 27032 | case VE::VLDLSXNCrzl: |
| 27033 | case VE::VLDLSXNCrzl_v: |
| 27034 | case VE::VLDLSXir: |
| 27035 | case VE::VLDLSXirL: |
| 27036 | case VE::VLDLSXirL_v: |
| 27037 | case VE::VLDLSXir_v: |
| 27038 | case VE::VLDLSXirl: |
| 27039 | case VE::VLDLSXirl_v: |
| 27040 | case VE::VLDLSXiz: |
| 27041 | case VE::VLDLSXizL: |
| 27042 | case VE::VLDLSXizL_v: |
| 27043 | case VE::VLDLSXiz_v: |
| 27044 | case VE::VLDLSXizl: |
| 27045 | case VE::VLDLSXizl_v: |
| 27046 | case VE::VLDLSXrr: |
| 27047 | case VE::VLDLSXrrL: |
| 27048 | case VE::VLDLSXrrL_v: |
| 27049 | case VE::VLDLSXrr_v: |
| 27050 | case VE::VLDLSXrrl: |
| 27051 | case VE::VLDLSXrrl_v: |
| 27052 | case VE::VLDLSXrz: |
| 27053 | case VE::VLDLSXrzL: |
| 27054 | case VE::VLDLSXrzL_v: |
| 27055 | case VE::VLDLSXrz_v: |
| 27056 | case VE::VLDLSXrzl: |
| 27057 | case VE::VLDLSXrzl_v: |
| 27058 | case VE::VLDLZXNCir: |
| 27059 | case VE::VLDLZXNCirL: |
| 27060 | case VE::VLDLZXNCirL_v: |
| 27061 | case VE::VLDLZXNCir_v: |
| 27062 | case VE::VLDLZXNCirl: |
| 27063 | case VE::VLDLZXNCirl_v: |
| 27064 | case VE::VLDLZXNCiz: |
| 27065 | case VE::VLDLZXNCizL: |
| 27066 | case VE::VLDLZXNCizL_v: |
| 27067 | case VE::VLDLZXNCiz_v: |
| 27068 | case VE::VLDLZXNCizl: |
| 27069 | case VE::VLDLZXNCizl_v: |
| 27070 | case VE::VLDLZXNCrr: |
| 27071 | case VE::VLDLZXNCrrL: |
| 27072 | case VE::VLDLZXNCrrL_v: |
| 27073 | case VE::VLDLZXNCrr_v: |
| 27074 | case VE::VLDLZXNCrrl: |
| 27075 | case VE::VLDLZXNCrrl_v: |
| 27076 | case VE::VLDLZXNCrz: |
| 27077 | case VE::VLDLZXNCrzL: |
| 27078 | case VE::VLDLZXNCrzL_v: |
| 27079 | case VE::VLDLZXNCrz_v: |
| 27080 | case VE::VLDLZXNCrzl: |
| 27081 | case VE::VLDLZXNCrzl_v: |
| 27082 | case VE::VLDLZXir: |
| 27083 | case VE::VLDLZXirL: |
| 27084 | case VE::VLDLZXirL_v: |
| 27085 | case VE::VLDLZXir_v: |
| 27086 | case VE::VLDLZXirl: |
| 27087 | case VE::VLDLZXirl_v: |
| 27088 | case VE::VLDLZXiz: |
| 27089 | case VE::VLDLZXizL: |
| 27090 | case VE::VLDLZXizL_v: |
| 27091 | case VE::VLDLZXiz_v: |
| 27092 | case VE::VLDLZXizl: |
| 27093 | case VE::VLDLZXizl_v: |
| 27094 | case VE::VLDLZXrr: |
| 27095 | case VE::VLDLZXrrL: |
| 27096 | case VE::VLDLZXrrL_v: |
| 27097 | case VE::VLDLZXrr_v: |
| 27098 | case VE::VLDLZXrrl: |
| 27099 | case VE::VLDLZXrrl_v: |
| 27100 | case VE::VLDLZXrz: |
| 27101 | case VE::VLDLZXrzL: |
| 27102 | case VE::VLDLZXrzL_v: |
| 27103 | case VE::VLDLZXrz_v: |
| 27104 | case VE::VLDLZXrzl: |
| 27105 | case VE::VLDLZXrzl_v: |
| 27106 | case VE::VLDNCir: |
| 27107 | case VE::VLDNCirL: |
| 27108 | case VE::VLDNCirL_v: |
| 27109 | case VE::VLDNCir_v: |
| 27110 | case VE::VLDNCirl: |
| 27111 | case VE::VLDNCirl_v: |
| 27112 | case VE::VLDNCiz: |
| 27113 | case VE::VLDNCizL: |
| 27114 | case VE::VLDNCizL_v: |
| 27115 | case VE::VLDNCiz_v: |
| 27116 | case VE::VLDNCizl: |
| 27117 | case VE::VLDNCizl_v: |
| 27118 | case VE::VLDNCrr: |
| 27119 | case VE::VLDNCrrL: |
| 27120 | case VE::VLDNCrrL_v: |
| 27121 | case VE::VLDNCrr_v: |
| 27122 | case VE::VLDNCrrl: |
| 27123 | case VE::VLDNCrrl_v: |
| 27124 | case VE::VLDNCrz: |
| 27125 | case VE::VLDNCrzL: |
| 27126 | case VE::VLDNCrzL_v: |
| 27127 | case VE::VLDNCrz_v: |
| 27128 | case VE::VLDNCrzl: |
| 27129 | case VE::VLDNCrzl_v: |
| 27130 | case VE::VLDU2DNCir: |
| 27131 | case VE::VLDU2DNCirL: |
| 27132 | case VE::VLDU2DNCirL_v: |
| 27133 | case VE::VLDU2DNCir_v: |
| 27134 | case VE::VLDU2DNCirl: |
| 27135 | case VE::VLDU2DNCirl_v: |
| 27136 | case VE::VLDU2DNCiz: |
| 27137 | case VE::VLDU2DNCizL: |
| 27138 | case VE::VLDU2DNCizL_v: |
| 27139 | case VE::VLDU2DNCiz_v: |
| 27140 | case VE::VLDU2DNCizl: |
| 27141 | case VE::VLDU2DNCizl_v: |
| 27142 | case VE::VLDU2DNCrr: |
| 27143 | case VE::VLDU2DNCrrL: |
| 27144 | case VE::VLDU2DNCrrL_v: |
| 27145 | case VE::VLDU2DNCrr_v: |
| 27146 | case VE::VLDU2DNCrrl: |
| 27147 | case VE::VLDU2DNCrrl_v: |
| 27148 | case VE::VLDU2DNCrz: |
| 27149 | case VE::VLDU2DNCrzL: |
| 27150 | case VE::VLDU2DNCrzL_v: |
| 27151 | case VE::VLDU2DNCrz_v: |
| 27152 | case VE::VLDU2DNCrzl: |
| 27153 | case VE::VLDU2DNCrzl_v: |
| 27154 | case VE::VLDU2Dir: |
| 27155 | case VE::VLDU2DirL: |
| 27156 | case VE::VLDU2DirL_v: |
| 27157 | case VE::VLDU2Dir_v: |
| 27158 | case VE::VLDU2Dirl: |
| 27159 | case VE::VLDU2Dirl_v: |
| 27160 | case VE::VLDU2Diz: |
| 27161 | case VE::VLDU2DizL: |
| 27162 | case VE::VLDU2DizL_v: |
| 27163 | case VE::VLDU2Diz_v: |
| 27164 | case VE::VLDU2Dizl: |
| 27165 | case VE::VLDU2Dizl_v: |
| 27166 | case VE::VLDU2Drr: |
| 27167 | case VE::VLDU2DrrL: |
| 27168 | case VE::VLDU2DrrL_v: |
| 27169 | case VE::VLDU2Drr_v: |
| 27170 | case VE::VLDU2Drrl: |
| 27171 | case VE::VLDU2Drrl_v: |
| 27172 | case VE::VLDU2Drz: |
| 27173 | case VE::VLDU2DrzL: |
| 27174 | case VE::VLDU2DrzL_v: |
| 27175 | case VE::VLDU2Drz_v: |
| 27176 | case VE::VLDU2Drzl: |
| 27177 | case VE::VLDU2Drzl_v: |
| 27178 | case VE::VLDUNCir: |
| 27179 | case VE::VLDUNCirL: |
| 27180 | case VE::VLDUNCirL_v: |
| 27181 | case VE::VLDUNCir_v: |
| 27182 | case VE::VLDUNCirl: |
| 27183 | case VE::VLDUNCirl_v: |
| 27184 | case VE::VLDUNCiz: |
| 27185 | case VE::VLDUNCizL: |
| 27186 | case VE::VLDUNCizL_v: |
| 27187 | case VE::VLDUNCiz_v: |
| 27188 | case VE::VLDUNCizl: |
| 27189 | case VE::VLDUNCizl_v: |
| 27190 | case VE::VLDUNCrr: |
| 27191 | case VE::VLDUNCrrL: |
| 27192 | case VE::VLDUNCrrL_v: |
| 27193 | case VE::VLDUNCrr_v: |
| 27194 | case VE::VLDUNCrrl: |
| 27195 | case VE::VLDUNCrrl_v: |
| 27196 | case VE::VLDUNCrz: |
| 27197 | case VE::VLDUNCrzL: |
| 27198 | case VE::VLDUNCrzL_v: |
| 27199 | case VE::VLDUNCrz_v: |
| 27200 | case VE::VLDUNCrzl: |
| 27201 | case VE::VLDUNCrzl_v: |
| 27202 | case VE::VLDUir: |
| 27203 | case VE::VLDUirL: |
| 27204 | case VE::VLDUirL_v: |
| 27205 | case VE::VLDUir_v: |
| 27206 | case VE::VLDUirl: |
| 27207 | case VE::VLDUirl_v: |
| 27208 | case VE::VLDUiz: |
| 27209 | case VE::VLDUizL: |
| 27210 | case VE::VLDUizL_v: |
| 27211 | case VE::VLDUiz_v: |
| 27212 | case VE::VLDUizl: |
| 27213 | case VE::VLDUizl_v: |
| 27214 | case VE::VLDUrr: |
| 27215 | case VE::VLDUrrL: |
| 27216 | case VE::VLDUrrL_v: |
| 27217 | case VE::VLDUrr_v: |
| 27218 | case VE::VLDUrrl: |
| 27219 | case VE::VLDUrrl_v: |
| 27220 | case VE::VLDUrz: |
| 27221 | case VE::VLDUrzL: |
| 27222 | case VE::VLDUrzL_v: |
| 27223 | case VE::VLDUrz_v: |
| 27224 | case VE::VLDUrzl: |
| 27225 | case VE::VLDUrzl_v: |
| 27226 | case VE::VLDir: |
| 27227 | case VE::VLDirL: |
| 27228 | case VE::VLDirL_v: |
| 27229 | case VE::VLDir_v: |
| 27230 | case VE::VLDirl: |
| 27231 | case VE::VLDirl_v: |
| 27232 | case VE::VLDiz: |
| 27233 | case VE::VLDizL: |
| 27234 | case VE::VLDizL_v: |
| 27235 | case VE::VLDiz_v: |
| 27236 | case VE::VLDizl: |
| 27237 | case VE::VLDizl_v: |
| 27238 | case VE::VLDrr: |
| 27239 | case VE::VLDrrL: |
| 27240 | case VE::VLDrrL_v: |
| 27241 | case VE::VLDrr_v: |
| 27242 | case VE::VLDrrl: |
| 27243 | case VE::VLDrrl_v: |
| 27244 | case VE::VLDrz: |
| 27245 | case VE::VLDrzL: |
| 27246 | case VE::VLDrzL_v: |
| 27247 | case VE::VLDrz_v: |
| 27248 | case VE::VLDrzl: |
| 27249 | case VE::VLDrzl_v: { |
| 27250 | switch (OpNum) { |
| 27251 | case 1: |
| 27252 | // op: sy |
| 27253 | return 40; |
| 27254 | case 2: |
| 27255 | // op: sz |
| 27256 | return 32; |
| 27257 | case 0: |
| 27258 | // op: vx |
| 27259 | return 24; |
| 27260 | } |
| 27261 | break; |
| 27262 | } |
| 27263 | case VE::VSCLNCOTsirv: |
| 27264 | case VE::VSCLNCOTsirvL: |
| 27265 | case VE::VSCLNCOTsirvl: |
| 27266 | case VE::VSCLNCOTsizv: |
| 27267 | case VE::VSCLNCOTsizvL: |
| 27268 | case VE::VSCLNCOTsizvl: |
| 27269 | case VE::VSCLNCOTsrrv: |
| 27270 | case VE::VSCLNCOTsrrvL: |
| 27271 | case VE::VSCLNCOTsrrvl: |
| 27272 | case VE::VSCLNCOTsrzv: |
| 27273 | case VE::VSCLNCOTsrzvL: |
| 27274 | case VE::VSCLNCOTsrzvl: |
| 27275 | case VE::VSCLNCsirv: |
| 27276 | case VE::VSCLNCsirvL: |
| 27277 | case VE::VSCLNCsirvl: |
| 27278 | case VE::VSCLNCsizv: |
| 27279 | case VE::VSCLNCsizvL: |
| 27280 | case VE::VSCLNCsizvl: |
| 27281 | case VE::VSCLNCsrrv: |
| 27282 | case VE::VSCLNCsrrvL: |
| 27283 | case VE::VSCLNCsrrvl: |
| 27284 | case VE::VSCLNCsrzv: |
| 27285 | case VE::VSCLNCsrzvL: |
| 27286 | case VE::VSCLNCsrzvl: |
| 27287 | case VE::VSCLOTsirv: |
| 27288 | case VE::VSCLOTsirvL: |
| 27289 | case VE::VSCLOTsirvl: |
| 27290 | case VE::VSCLOTsizv: |
| 27291 | case VE::VSCLOTsizvL: |
| 27292 | case VE::VSCLOTsizvl: |
| 27293 | case VE::VSCLOTsrrv: |
| 27294 | case VE::VSCLOTsrrvL: |
| 27295 | case VE::VSCLOTsrrvl: |
| 27296 | case VE::VSCLOTsrzv: |
| 27297 | case VE::VSCLOTsrzvL: |
| 27298 | case VE::VSCLOTsrzvl: |
| 27299 | case VE::VSCLsirv: |
| 27300 | case VE::VSCLsirvL: |
| 27301 | case VE::VSCLsirvl: |
| 27302 | case VE::VSCLsizv: |
| 27303 | case VE::VSCLsizvL: |
| 27304 | case VE::VSCLsizvl: |
| 27305 | case VE::VSCLsrrv: |
| 27306 | case VE::VSCLsrrvL: |
| 27307 | case VE::VSCLsrrvl: |
| 27308 | case VE::VSCLsrzv: |
| 27309 | case VE::VSCLsrzvL: |
| 27310 | case VE::VSCLsrzvl: |
| 27311 | case VE::VSCNCOTsirv: |
| 27312 | case VE::VSCNCOTsirvL: |
| 27313 | case VE::VSCNCOTsirvl: |
| 27314 | case VE::VSCNCOTsizv: |
| 27315 | case VE::VSCNCOTsizvL: |
| 27316 | case VE::VSCNCOTsizvl: |
| 27317 | case VE::VSCNCOTsrrv: |
| 27318 | case VE::VSCNCOTsrrvL: |
| 27319 | case VE::VSCNCOTsrrvl: |
| 27320 | case VE::VSCNCOTsrzv: |
| 27321 | case VE::VSCNCOTsrzvL: |
| 27322 | case VE::VSCNCOTsrzvl: |
| 27323 | case VE::VSCNCsirv: |
| 27324 | case VE::VSCNCsirvL: |
| 27325 | case VE::VSCNCsirvl: |
| 27326 | case VE::VSCNCsizv: |
| 27327 | case VE::VSCNCsizvL: |
| 27328 | case VE::VSCNCsizvl: |
| 27329 | case VE::VSCNCsrrv: |
| 27330 | case VE::VSCNCsrrvL: |
| 27331 | case VE::VSCNCsrrvl: |
| 27332 | case VE::VSCNCsrzv: |
| 27333 | case VE::VSCNCsrzvL: |
| 27334 | case VE::VSCNCsrzvl: |
| 27335 | case VE::VSCOTsirv: |
| 27336 | case VE::VSCOTsirvL: |
| 27337 | case VE::VSCOTsirvl: |
| 27338 | case VE::VSCOTsizv: |
| 27339 | case VE::VSCOTsizvL: |
| 27340 | case VE::VSCOTsizvl: |
| 27341 | case VE::VSCOTsrrv: |
| 27342 | case VE::VSCOTsrrvL: |
| 27343 | case VE::VSCOTsrrvl: |
| 27344 | case VE::VSCOTsrzv: |
| 27345 | case VE::VSCOTsrzvL: |
| 27346 | case VE::VSCOTsrzvl: |
| 27347 | case VE::VSCUNCOTsirv: |
| 27348 | case VE::VSCUNCOTsirvL: |
| 27349 | case VE::VSCUNCOTsirvl: |
| 27350 | case VE::VSCUNCOTsizv: |
| 27351 | case VE::VSCUNCOTsizvL: |
| 27352 | case VE::VSCUNCOTsizvl: |
| 27353 | case VE::VSCUNCOTsrrv: |
| 27354 | case VE::VSCUNCOTsrrvL: |
| 27355 | case VE::VSCUNCOTsrrvl: |
| 27356 | case VE::VSCUNCOTsrzv: |
| 27357 | case VE::VSCUNCOTsrzvL: |
| 27358 | case VE::VSCUNCOTsrzvl: |
| 27359 | case VE::VSCUNCsirv: |
| 27360 | case VE::VSCUNCsirvL: |
| 27361 | case VE::VSCUNCsirvl: |
| 27362 | case VE::VSCUNCsizv: |
| 27363 | case VE::VSCUNCsizvL: |
| 27364 | case VE::VSCUNCsizvl: |
| 27365 | case VE::VSCUNCsrrv: |
| 27366 | case VE::VSCUNCsrrvL: |
| 27367 | case VE::VSCUNCsrrvl: |
| 27368 | case VE::VSCUNCsrzv: |
| 27369 | case VE::VSCUNCsrzvL: |
| 27370 | case VE::VSCUNCsrzvl: |
| 27371 | case VE::VSCUOTsirv: |
| 27372 | case VE::VSCUOTsirvL: |
| 27373 | case VE::VSCUOTsirvl: |
| 27374 | case VE::VSCUOTsizv: |
| 27375 | case VE::VSCUOTsizvL: |
| 27376 | case VE::VSCUOTsizvl: |
| 27377 | case VE::VSCUOTsrrv: |
| 27378 | case VE::VSCUOTsrrvL: |
| 27379 | case VE::VSCUOTsrrvl: |
| 27380 | case VE::VSCUOTsrzv: |
| 27381 | case VE::VSCUOTsrzvL: |
| 27382 | case VE::VSCUOTsrzvl: |
| 27383 | case VE::VSCUsirv: |
| 27384 | case VE::VSCUsirvL: |
| 27385 | case VE::VSCUsirvl: |
| 27386 | case VE::VSCUsizv: |
| 27387 | case VE::VSCUsizvL: |
| 27388 | case VE::VSCUsizvl: |
| 27389 | case VE::VSCUsrrv: |
| 27390 | case VE::VSCUsrrvL: |
| 27391 | case VE::VSCUsrrvl: |
| 27392 | case VE::VSCUsrzv: |
| 27393 | case VE::VSCUsrzvL: |
| 27394 | case VE::VSCUsrzvl: |
| 27395 | case VE::VSCsirv: |
| 27396 | case VE::VSCsirvL: |
| 27397 | case VE::VSCsirvl: |
| 27398 | case VE::VSCsizv: |
| 27399 | case VE::VSCsizvL: |
| 27400 | case VE::VSCsizvl: |
| 27401 | case VE::VSCsrrv: |
| 27402 | case VE::VSCsrrvL: |
| 27403 | case VE::VSCsrrvl: |
| 27404 | case VE::VSCsrzv: |
| 27405 | case VE::VSCsrzvL: |
| 27406 | case VE::VSCsrzvl: { |
| 27407 | switch (OpNum) { |
| 27408 | case 1: |
| 27409 | // op: sy |
| 27410 | return 40; |
| 27411 | case 2: |
| 27412 | // op: sz |
| 27413 | return 32; |
| 27414 | case 3: |
| 27415 | // op: vx |
| 27416 | return 24; |
| 27417 | case 0: |
| 27418 | // op: sw |
| 27419 | return 0; |
| 27420 | } |
| 27421 | break; |
| 27422 | } |
| 27423 | case VE::VSCLNCOTvirv: |
| 27424 | case VE::VSCLNCOTvirvL: |
| 27425 | case VE::VSCLNCOTvirvl: |
| 27426 | case VE::VSCLNCOTvizv: |
| 27427 | case VE::VSCLNCOTvizvL: |
| 27428 | case VE::VSCLNCOTvizvl: |
| 27429 | case VE::VSCLNCOTvrrv: |
| 27430 | case VE::VSCLNCOTvrrvL: |
| 27431 | case VE::VSCLNCOTvrrvl: |
| 27432 | case VE::VSCLNCOTvrzv: |
| 27433 | case VE::VSCLNCOTvrzvL: |
| 27434 | case VE::VSCLNCOTvrzvl: |
| 27435 | case VE::VSCLNCvirv: |
| 27436 | case VE::VSCLNCvirvL: |
| 27437 | case VE::VSCLNCvirvl: |
| 27438 | case VE::VSCLNCvizv: |
| 27439 | case VE::VSCLNCvizvL: |
| 27440 | case VE::VSCLNCvizvl: |
| 27441 | case VE::VSCLNCvrrv: |
| 27442 | case VE::VSCLNCvrrvL: |
| 27443 | case VE::VSCLNCvrrvl: |
| 27444 | case VE::VSCLNCvrzv: |
| 27445 | case VE::VSCLNCvrzvL: |
| 27446 | case VE::VSCLNCvrzvl: |
| 27447 | case VE::VSCLOTvirv: |
| 27448 | case VE::VSCLOTvirvL: |
| 27449 | case VE::VSCLOTvirvl: |
| 27450 | case VE::VSCLOTvizv: |
| 27451 | case VE::VSCLOTvizvL: |
| 27452 | case VE::VSCLOTvizvl: |
| 27453 | case VE::VSCLOTvrrv: |
| 27454 | case VE::VSCLOTvrrvL: |
| 27455 | case VE::VSCLOTvrrvl: |
| 27456 | case VE::VSCLOTvrzv: |
| 27457 | case VE::VSCLOTvrzvL: |
| 27458 | case VE::VSCLOTvrzvl: |
| 27459 | case VE::VSCLvirv: |
| 27460 | case VE::VSCLvirvL: |
| 27461 | case VE::VSCLvirvl: |
| 27462 | case VE::VSCLvizv: |
| 27463 | case VE::VSCLvizvL: |
| 27464 | case VE::VSCLvizvl: |
| 27465 | case VE::VSCLvrrv: |
| 27466 | case VE::VSCLvrrvL: |
| 27467 | case VE::VSCLvrrvl: |
| 27468 | case VE::VSCLvrzv: |
| 27469 | case VE::VSCLvrzvL: |
| 27470 | case VE::VSCLvrzvl: |
| 27471 | case VE::VSCNCOTvirv: |
| 27472 | case VE::VSCNCOTvirvL: |
| 27473 | case VE::VSCNCOTvirvl: |
| 27474 | case VE::VSCNCOTvizv: |
| 27475 | case VE::VSCNCOTvizvL: |
| 27476 | case VE::VSCNCOTvizvl: |
| 27477 | case VE::VSCNCOTvrrv: |
| 27478 | case VE::VSCNCOTvrrvL: |
| 27479 | case VE::VSCNCOTvrrvl: |
| 27480 | case VE::VSCNCOTvrzv: |
| 27481 | case VE::VSCNCOTvrzvL: |
| 27482 | case VE::VSCNCOTvrzvl: |
| 27483 | case VE::VSCNCvirv: |
| 27484 | case VE::VSCNCvirvL: |
| 27485 | case VE::VSCNCvirvl: |
| 27486 | case VE::VSCNCvizv: |
| 27487 | case VE::VSCNCvizvL: |
| 27488 | case VE::VSCNCvizvl: |
| 27489 | case VE::VSCNCvrrv: |
| 27490 | case VE::VSCNCvrrvL: |
| 27491 | case VE::VSCNCvrrvl: |
| 27492 | case VE::VSCNCvrzv: |
| 27493 | case VE::VSCNCvrzvL: |
| 27494 | case VE::VSCNCvrzvl: |
| 27495 | case VE::VSCOTvirv: |
| 27496 | case VE::VSCOTvirvL: |
| 27497 | case VE::VSCOTvirvl: |
| 27498 | case VE::VSCOTvizv: |
| 27499 | case VE::VSCOTvizvL: |
| 27500 | case VE::VSCOTvizvl: |
| 27501 | case VE::VSCOTvrrv: |
| 27502 | case VE::VSCOTvrrvL: |
| 27503 | case VE::VSCOTvrrvl: |
| 27504 | case VE::VSCOTvrzv: |
| 27505 | case VE::VSCOTvrzvL: |
| 27506 | case VE::VSCOTvrzvl: |
| 27507 | case VE::VSCUNCOTvirv: |
| 27508 | case VE::VSCUNCOTvirvL: |
| 27509 | case VE::VSCUNCOTvirvl: |
| 27510 | case VE::VSCUNCOTvizv: |
| 27511 | case VE::VSCUNCOTvizvL: |
| 27512 | case VE::VSCUNCOTvizvl: |
| 27513 | case VE::VSCUNCOTvrrv: |
| 27514 | case VE::VSCUNCOTvrrvL: |
| 27515 | case VE::VSCUNCOTvrrvl: |
| 27516 | case VE::VSCUNCOTvrzv: |
| 27517 | case VE::VSCUNCOTvrzvL: |
| 27518 | case VE::VSCUNCOTvrzvl: |
| 27519 | case VE::VSCUNCvirv: |
| 27520 | case VE::VSCUNCvirvL: |
| 27521 | case VE::VSCUNCvirvl: |
| 27522 | case VE::VSCUNCvizv: |
| 27523 | case VE::VSCUNCvizvL: |
| 27524 | case VE::VSCUNCvizvl: |
| 27525 | case VE::VSCUNCvrrv: |
| 27526 | case VE::VSCUNCvrrvL: |
| 27527 | case VE::VSCUNCvrrvl: |
| 27528 | case VE::VSCUNCvrzv: |
| 27529 | case VE::VSCUNCvrzvL: |
| 27530 | case VE::VSCUNCvrzvl: |
| 27531 | case VE::VSCUOTvirv: |
| 27532 | case VE::VSCUOTvirvL: |
| 27533 | case VE::VSCUOTvirvl: |
| 27534 | case VE::VSCUOTvizv: |
| 27535 | case VE::VSCUOTvizvL: |
| 27536 | case VE::VSCUOTvizvl: |
| 27537 | case VE::VSCUOTvrrv: |
| 27538 | case VE::VSCUOTvrrvL: |
| 27539 | case VE::VSCUOTvrrvl: |
| 27540 | case VE::VSCUOTvrzv: |
| 27541 | case VE::VSCUOTvrzvL: |
| 27542 | case VE::VSCUOTvrzvl: |
| 27543 | case VE::VSCUvirv: |
| 27544 | case VE::VSCUvirvL: |
| 27545 | case VE::VSCUvirvl: |
| 27546 | case VE::VSCUvizv: |
| 27547 | case VE::VSCUvizvL: |
| 27548 | case VE::VSCUvizvl: |
| 27549 | case VE::VSCUvrrv: |
| 27550 | case VE::VSCUvrrvL: |
| 27551 | case VE::VSCUvrrvl: |
| 27552 | case VE::VSCUvrzv: |
| 27553 | case VE::VSCUvrzvL: |
| 27554 | case VE::VSCUvrzvl: |
| 27555 | case VE::VSCvirv: |
| 27556 | case VE::VSCvirvL: |
| 27557 | case VE::VSCvirvl: |
| 27558 | case VE::VSCvizv: |
| 27559 | case VE::VSCvizvL: |
| 27560 | case VE::VSCvizvl: |
| 27561 | case VE::VSCvrrv: |
| 27562 | case VE::VSCvrrvL: |
| 27563 | case VE::VSCvrrvl: |
| 27564 | case VE::VSCvrzv: |
| 27565 | case VE::VSCvrzvL: |
| 27566 | case VE::VSCvrzvl: { |
| 27567 | switch (OpNum) { |
| 27568 | case 1: |
| 27569 | // op: sy |
| 27570 | return 40; |
| 27571 | case 2: |
| 27572 | // op: sz |
| 27573 | return 32; |
| 27574 | case 3: |
| 27575 | // op: vx |
| 27576 | return 24; |
| 27577 | case 0: |
| 27578 | // op: vy |
| 27579 | return 16; |
| 27580 | } |
| 27581 | break; |
| 27582 | } |
| 27583 | case VE::LZVMm: |
| 27584 | case VE::LZVMmL: |
| 27585 | case VE::LZVMml: |
| 27586 | case VE::PCVMm: |
| 27587 | case VE::PCVMmL: |
| 27588 | case VE::PCVMml: |
| 27589 | case VE::TOVMm: |
| 27590 | case VE::TOVMmL: |
| 27591 | case VE::TOVMml: { |
| 27592 | switch (OpNum) { |
| 27593 | case 1: |
| 27594 | // op: vy |
| 27595 | return 16; |
| 27596 | case 0: |
| 27597 | // op: sx |
| 27598 | return 48; |
| 27599 | } |
| 27600 | break; |
| 27601 | } |
| 27602 | case VE::PVCVTSWLOvm: |
| 27603 | case VE::PVCVTSWLOvmL: |
| 27604 | case VE::PVCVTSWLOvmL_v: |
| 27605 | case VE::PVCVTSWLOvm_v: |
| 27606 | case VE::PVCVTSWLOvml: |
| 27607 | case VE::PVCVTSWLOvml_v: |
| 27608 | case VE::PVCVTSWUPvm: |
| 27609 | case VE::PVCVTSWUPvmL: |
| 27610 | case VE::PVCVTSWUPvmL_v: |
| 27611 | case VE::PVCVTSWUPvm_v: |
| 27612 | case VE::PVCVTSWUPvml: |
| 27613 | case VE::PVCVTSWUPvml_v: |
| 27614 | case VE::PVCVTSWvm: |
| 27615 | case VE::PVCVTSWvmL: |
| 27616 | case VE::PVCVTSWvmL_v: |
| 27617 | case VE::PVCVTSWvm_v: |
| 27618 | case VE::PVCVTSWvml: |
| 27619 | case VE::PVCVTSWvml_v: |
| 27620 | case VE::PVRCPLOvm: |
| 27621 | case VE::PVRCPLOvmL: |
| 27622 | case VE::PVRCPLOvmL_v: |
| 27623 | case VE::PVRCPLOvm_v: |
| 27624 | case VE::PVRCPLOvml: |
| 27625 | case VE::PVRCPLOvml_v: |
| 27626 | case VE::PVRCPUPvm: |
| 27627 | case VE::PVRCPUPvmL: |
| 27628 | case VE::PVRCPUPvmL_v: |
| 27629 | case VE::PVRCPUPvm_v: |
| 27630 | case VE::PVRCPUPvml: |
| 27631 | case VE::PVRCPUPvml_v: |
| 27632 | case VE::PVRCPvm: |
| 27633 | case VE::PVRCPvmL: |
| 27634 | case VE::PVRCPvmL_v: |
| 27635 | case VE::PVRCPvm_v: |
| 27636 | case VE::PVRCPvml: |
| 27637 | case VE::PVRCPvml_v: |
| 27638 | case VE::PVRSQRTLONEXvm: |
| 27639 | case VE::PVRSQRTLONEXvmL: |
| 27640 | case VE::PVRSQRTLONEXvmL_v: |
| 27641 | case VE::PVRSQRTLONEXvm_v: |
| 27642 | case VE::PVRSQRTLONEXvml: |
| 27643 | case VE::PVRSQRTLONEXvml_v: |
| 27644 | case VE::PVRSQRTLOvm: |
| 27645 | case VE::PVRSQRTLOvmL: |
| 27646 | case VE::PVRSQRTLOvmL_v: |
| 27647 | case VE::PVRSQRTLOvm_v: |
| 27648 | case VE::PVRSQRTLOvml: |
| 27649 | case VE::PVRSQRTLOvml_v: |
| 27650 | case VE::PVRSQRTNEXvm: |
| 27651 | case VE::PVRSQRTNEXvmL: |
| 27652 | case VE::PVRSQRTNEXvmL_v: |
| 27653 | case VE::PVRSQRTNEXvm_v: |
| 27654 | case VE::PVRSQRTNEXvml: |
| 27655 | case VE::PVRSQRTNEXvml_v: |
| 27656 | case VE::PVRSQRTUPNEXvm: |
| 27657 | case VE::PVRSQRTUPNEXvmL: |
| 27658 | case VE::PVRSQRTUPNEXvmL_v: |
| 27659 | case VE::PVRSQRTUPNEXvm_v: |
| 27660 | case VE::PVRSQRTUPNEXvml: |
| 27661 | case VE::PVRSQRTUPNEXvml_v: |
| 27662 | case VE::PVRSQRTUPvm: |
| 27663 | case VE::PVRSQRTUPvmL: |
| 27664 | case VE::PVRSQRTUPvmL_v: |
| 27665 | case VE::PVRSQRTUPvm_v: |
| 27666 | case VE::PVRSQRTUPvml: |
| 27667 | case VE::PVRSQRTUPvml_v: |
| 27668 | case VE::PVRSQRTvm: |
| 27669 | case VE::PVRSQRTvmL: |
| 27670 | case VE::PVRSQRTvmL_v: |
| 27671 | case VE::PVRSQRTvm_v: |
| 27672 | case VE::PVRSQRTvml: |
| 27673 | case VE::PVRSQRTvml_v: |
| 27674 | case VE::VCVTDLvm: |
| 27675 | case VE::VCVTDLvmL: |
| 27676 | case VE::VCVTDLvmL_v: |
| 27677 | case VE::VCVTDLvm_v: |
| 27678 | case VE::VCVTDLvml: |
| 27679 | case VE::VCVTDLvml_v: |
| 27680 | case VE::VCVTDSvm: |
| 27681 | case VE::VCVTDSvmL: |
| 27682 | case VE::VCVTDSvmL_v: |
| 27683 | case VE::VCVTDSvm_v: |
| 27684 | case VE::VCVTDSvml: |
| 27685 | case VE::VCVTDSvml_v: |
| 27686 | case VE::VCVTDWvm: |
| 27687 | case VE::VCVTDWvmL: |
| 27688 | case VE::VCVTDWvmL_v: |
| 27689 | case VE::VCVTDWvm_v: |
| 27690 | case VE::VCVTDWvml: |
| 27691 | case VE::VCVTDWvml_v: |
| 27692 | case VE::VCVTSDvm: |
| 27693 | case VE::VCVTSDvmL: |
| 27694 | case VE::VCVTSDvmL_v: |
| 27695 | case VE::VCVTSDvm_v: |
| 27696 | case VE::VCVTSDvml: |
| 27697 | case VE::VCVTSDvml_v: |
| 27698 | case VE::VCVTSWvm: |
| 27699 | case VE::VCVTSWvmL: |
| 27700 | case VE::VCVTSWvmL_v: |
| 27701 | case VE::VCVTSWvm_v: |
| 27702 | case VE::VCVTSWvml: |
| 27703 | case VE::VCVTSWvml_v: |
| 27704 | case VE::VFRMAXDFSTvm: |
| 27705 | case VE::VFRMAXDFSTvmL: |
| 27706 | case VE::VFRMAXDFSTvmL_v: |
| 27707 | case VE::VFRMAXDFSTvm_v: |
| 27708 | case VE::VFRMAXDFSTvml: |
| 27709 | case VE::VFRMAXDFSTvml_v: |
| 27710 | case VE::VFRMAXDLSTvm: |
| 27711 | case VE::VFRMAXDLSTvmL: |
| 27712 | case VE::VFRMAXDLSTvmL_v: |
| 27713 | case VE::VFRMAXDLSTvm_v: |
| 27714 | case VE::VFRMAXDLSTvml: |
| 27715 | case VE::VFRMAXDLSTvml_v: |
| 27716 | case VE::VFRMAXSFSTvm: |
| 27717 | case VE::VFRMAXSFSTvmL: |
| 27718 | case VE::VFRMAXSFSTvmL_v: |
| 27719 | case VE::VFRMAXSFSTvm_v: |
| 27720 | case VE::VFRMAXSFSTvml: |
| 27721 | case VE::VFRMAXSFSTvml_v: |
| 27722 | case VE::VFRMAXSLSTvm: |
| 27723 | case VE::VFRMAXSLSTvmL: |
| 27724 | case VE::VFRMAXSLSTvmL_v: |
| 27725 | case VE::VFRMAXSLSTvm_v: |
| 27726 | case VE::VFRMAXSLSTvml: |
| 27727 | case VE::VFRMAXSLSTvml_v: |
| 27728 | case VE::VFRMINDFSTvm: |
| 27729 | case VE::VFRMINDFSTvmL: |
| 27730 | case VE::VFRMINDFSTvmL_v: |
| 27731 | case VE::VFRMINDFSTvm_v: |
| 27732 | case VE::VFRMINDFSTvml: |
| 27733 | case VE::VFRMINDFSTvml_v: |
| 27734 | case VE::VFRMINDLSTvm: |
| 27735 | case VE::VFRMINDLSTvmL: |
| 27736 | case VE::VFRMINDLSTvmL_v: |
| 27737 | case VE::VFRMINDLSTvm_v: |
| 27738 | case VE::VFRMINDLSTvml: |
| 27739 | case VE::VFRMINDLSTvml_v: |
| 27740 | case VE::VFRMINSFSTvm: |
| 27741 | case VE::VFRMINSFSTvmL: |
| 27742 | case VE::VFRMINSFSTvmL_v: |
| 27743 | case VE::VFRMINSFSTvm_v: |
| 27744 | case VE::VFRMINSFSTvml: |
| 27745 | case VE::VFRMINSFSTvml_v: |
| 27746 | case VE::VFRMINSLSTvm: |
| 27747 | case VE::VFRMINSLSTvmL: |
| 27748 | case VE::VFRMINSLSTvmL_v: |
| 27749 | case VE::VFRMINSLSTvm_v: |
| 27750 | case VE::VFRMINSLSTvml: |
| 27751 | case VE::VFRMINSLSTvml_v: |
| 27752 | case VE::VFSQRTDvm: |
| 27753 | case VE::VFSQRTDvmL: |
| 27754 | case VE::VFSQRTDvmL_v: |
| 27755 | case VE::VFSQRTDvm_v: |
| 27756 | case VE::VFSQRTDvml: |
| 27757 | case VE::VFSQRTDvml_v: |
| 27758 | case VE::VFSQRTSvm: |
| 27759 | case VE::VFSQRTSvmL: |
| 27760 | case VE::VFSQRTSvmL_v: |
| 27761 | case VE::VFSQRTSvm_v: |
| 27762 | case VE::VFSQRTSvml: |
| 27763 | case VE::VFSQRTSvml_v: |
| 27764 | case VE::VFSUMDvm: |
| 27765 | case VE::VFSUMDvmL: |
| 27766 | case VE::VFSUMDvmL_v: |
| 27767 | case VE::VFSUMDvm_v: |
| 27768 | case VE::VFSUMDvml: |
| 27769 | case VE::VFSUMDvml_v: |
| 27770 | case VE::VFSUMSvm: |
| 27771 | case VE::VFSUMSvmL: |
| 27772 | case VE::VFSUMSvmL_v: |
| 27773 | case VE::VFSUMSvm_v: |
| 27774 | case VE::VFSUMSvml: |
| 27775 | case VE::VFSUMSvml_v: |
| 27776 | case VE::VRANDvm: |
| 27777 | case VE::VRANDvmL: |
| 27778 | case VE::VRANDvmL_v: |
| 27779 | case VE::VRANDvm_v: |
| 27780 | case VE::VRANDvml: |
| 27781 | case VE::VRANDvml_v: |
| 27782 | case VE::VRCPDvm: |
| 27783 | case VE::VRCPDvmL: |
| 27784 | case VE::VRCPDvmL_v: |
| 27785 | case VE::VRCPDvm_v: |
| 27786 | case VE::VRCPDvml: |
| 27787 | case VE::VRCPDvml_v: |
| 27788 | case VE::VRCPSvm: |
| 27789 | case VE::VRCPSvmL: |
| 27790 | case VE::VRCPSvmL_v: |
| 27791 | case VE::VRCPSvm_v: |
| 27792 | case VE::VRCPSvml: |
| 27793 | case VE::VRCPSvml_v: |
| 27794 | case VE::VRMAXSLFSTvm: |
| 27795 | case VE::VRMAXSLFSTvmL: |
| 27796 | case VE::VRMAXSLFSTvmL_v: |
| 27797 | case VE::VRMAXSLFSTvm_v: |
| 27798 | case VE::VRMAXSLFSTvml: |
| 27799 | case VE::VRMAXSLFSTvml_v: |
| 27800 | case VE::VRMAXSLLSTvm: |
| 27801 | case VE::VRMAXSLLSTvmL: |
| 27802 | case VE::VRMAXSLLSTvmL_v: |
| 27803 | case VE::VRMAXSLLSTvm_v: |
| 27804 | case VE::VRMAXSLLSTvml: |
| 27805 | case VE::VRMAXSLLSTvml_v: |
| 27806 | case VE::VRMAXSWFSTSXvm: |
| 27807 | case VE::VRMAXSWFSTSXvmL: |
| 27808 | case VE::VRMAXSWFSTSXvmL_v: |
| 27809 | case VE::VRMAXSWFSTSXvm_v: |
| 27810 | case VE::VRMAXSWFSTSXvml: |
| 27811 | case VE::VRMAXSWFSTSXvml_v: |
| 27812 | case VE::VRMAXSWFSTZXvm: |
| 27813 | case VE::VRMAXSWFSTZXvmL: |
| 27814 | case VE::VRMAXSWFSTZXvmL_v: |
| 27815 | case VE::VRMAXSWFSTZXvm_v: |
| 27816 | case VE::VRMAXSWFSTZXvml: |
| 27817 | case VE::VRMAXSWFSTZXvml_v: |
| 27818 | case VE::VRMAXSWLSTSXvm: |
| 27819 | case VE::VRMAXSWLSTSXvmL: |
| 27820 | case VE::VRMAXSWLSTSXvmL_v: |
| 27821 | case VE::VRMAXSWLSTSXvm_v: |
| 27822 | case VE::VRMAXSWLSTSXvml: |
| 27823 | case VE::VRMAXSWLSTSXvml_v: |
| 27824 | case VE::VRMAXSWLSTZXvm: |
| 27825 | case VE::VRMAXSWLSTZXvmL: |
| 27826 | case VE::VRMAXSWLSTZXvmL_v: |
| 27827 | case VE::VRMAXSWLSTZXvm_v: |
| 27828 | case VE::VRMAXSWLSTZXvml: |
| 27829 | case VE::VRMAXSWLSTZXvml_v: |
| 27830 | case VE::VRMINSLFSTvm: |
| 27831 | case VE::VRMINSLFSTvmL: |
| 27832 | case VE::VRMINSLFSTvmL_v: |
| 27833 | case VE::VRMINSLFSTvm_v: |
| 27834 | case VE::VRMINSLFSTvml: |
| 27835 | case VE::VRMINSLFSTvml_v: |
| 27836 | case VE::VRMINSLLSTvm: |
| 27837 | case VE::VRMINSLLSTvmL: |
| 27838 | case VE::VRMINSLLSTvmL_v: |
| 27839 | case VE::VRMINSLLSTvm_v: |
| 27840 | case VE::VRMINSLLSTvml: |
| 27841 | case VE::VRMINSLLSTvml_v: |
| 27842 | case VE::VRMINSWFSTSXvm: |
| 27843 | case VE::VRMINSWFSTSXvmL: |
| 27844 | case VE::VRMINSWFSTSXvmL_v: |
| 27845 | case VE::VRMINSWFSTSXvm_v: |
| 27846 | case VE::VRMINSWFSTSXvml: |
| 27847 | case VE::VRMINSWFSTSXvml_v: |
| 27848 | case VE::VRMINSWFSTZXvm: |
| 27849 | case VE::VRMINSWFSTZXvmL: |
| 27850 | case VE::VRMINSWFSTZXvmL_v: |
| 27851 | case VE::VRMINSWFSTZXvm_v: |
| 27852 | case VE::VRMINSWFSTZXvml: |
| 27853 | case VE::VRMINSWFSTZXvml_v: |
| 27854 | case VE::VRMINSWLSTSXvm: |
| 27855 | case VE::VRMINSWLSTSXvmL: |
| 27856 | case VE::VRMINSWLSTSXvmL_v: |
| 27857 | case VE::VRMINSWLSTSXvm_v: |
| 27858 | case VE::VRMINSWLSTSXvml: |
| 27859 | case VE::VRMINSWLSTSXvml_v: |
| 27860 | case VE::VRMINSWLSTZXvm: |
| 27861 | case VE::VRMINSWLSTZXvmL: |
| 27862 | case VE::VRMINSWLSTZXvmL_v: |
| 27863 | case VE::VRMINSWLSTZXvm_v: |
| 27864 | case VE::VRMINSWLSTZXvml: |
| 27865 | case VE::VRMINSWLSTZXvml_v: |
| 27866 | case VE::VRORvm: |
| 27867 | case VE::VRORvmL: |
| 27868 | case VE::VRORvmL_v: |
| 27869 | case VE::VRORvm_v: |
| 27870 | case VE::VRORvml: |
| 27871 | case VE::VRORvml_v: |
| 27872 | case VE::VRSQRTDNEXvm: |
| 27873 | case VE::VRSQRTDNEXvmL: |
| 27874 | case VE::VRSQRTDNEXvmL_v: |
| 27875 | case VE::VRSQRTDNEXvm_v: |
| 27876 | case VE::VRSQRTDNEXvml: |
| 27877 | case VE::VRSQRTDNEXvml_v: |
| 27878 | case VE::VRSQRTDvm: |
| 27879 | case VE::VRSQRTDvmL: |
| 27880 | case VE::VRSQRTDvmL_v: |
| 27881 | case VE::VRSQRTDvm_v: |
| 27882 | case VE::VRSQRTDvml: |
| 27883 | case VE::VRSQRTDvml_v: |
| 27884 | case VE::VRSQRTSNEXvm: |
| 27885 | case VE::VRSQRTSNEXvmL: |
| 27886 | case VE::VRSQRTSNEXvmL_v: |
| 27887 | case VE::VRSQRTSNEXvm_v: |
| 27888 | case VE::VRSQRTSNEXvml: |
| 27889 | case VE::VRSQRTSNEXvml_v: |
| 27890 | case VE::VRSQRTSvm: |
| 27891 | case VE::VRSQRTSvmL: |
| 27892 | case VE::VRSQRTSvmL_v: |
| 27893 | case VE::VRSQRTSvm_v: |
| 27894 | case VE::VRSQRTSvml: |
| 27895 | case VE::VRSQRTSvml_v: |
| 27896 | case VE::VRXORvm: |
| 27897 | case VE::VRXORvmL: |
| 27898 | case VE::VRXORvmL_v: |
| 27899 | case VE::VRXORvm_v: |
| 27900 | case VE::VRXORvml: |
| 27901 | case VE::VRXORvml_v: |
| 27902 | case VE::VSUMLvm: |
| 27903 | case VE::VSUMLvmL: |
| 27904 | case VE::VSUMLvmL_v: |
| 27905 | case VE::VSUMLvm_v: |
| 27906 | case VE::VSUMLvml: |
| 27907 | case VE::VSUMLvml_v: |
| 27908 | case VE::VSUMWSXvm: |
| 27909 | case VE::VSUMWSXvmL: |
| 27910 | case VE::VSUMWSXvmL_v: |
| 27911 | case VE::VSUMWSXvm_v: |
| 27912 | case VE::VSUMWSXvml: |
| 27913 | case VE::VSUMWSXvml_v: |
| 27914 | case VE::VSUMWZXvm: |
| 27915 | case VE::VSUMWZXvmL: |
| 27916 | case VE::VSUMWZXvmL_v: |
| 27917 | case VE::VSUMWZXvm_v: |
| 27918 | case VE::VSUMWZXvml: |
| 27919 | case VE::VSUMWZXvml_v: { |
| 27920 | switch (OpNum) { |
| 27921 | case 2: |
| 27922 | // op: m |
| 27923 | return 48; |
| 27924 | case 0: |
| 27925 | // op: vx |
| 27926 | return 24; |
| 27927 | case 1: |
| 27928 | // op: vy |
| 27929 | return 16; |
| 27930 | } |
| 27931 | break; |
| 27932 | } |
| 27933 | case VE::PVBRVLOvm: |
| 27934 | case VE::PVBRVLOvmL: |
| 27935 | case VE::PVBRVLOvmL_v: |
| 27936 | case VE::PVBRVLOvm_v: |
| 27937 | case VE::PVBRVLOvml: |
| 27938 | case VE::PVBRVLOvml_v: |
| 27939 | case VE::PVBRVUPvm: |
| 27940 | case VE::PVBRVUPvmL: |
| 27941 | case VE::PVBRVUPvmL_v: |
| 27942 | case VE::PVBRVUPvm_v: |
| 27943 | case VE::PVBRVUPvml: |
| 27944 | case VE::PVBRVUPvml_v: |
| 27945 | case VE::PVBRVvm: |
| 27946 | case VE::PVBRVvmL: |
| 27947 | case VE::PVBRVvmL_v: |
| 27948 | case VE::PVBRVvm_v: |
| 27949 | case VE::PVBRVvml: |
| 27950 | case VE::PVBRVvml_v: |
| 27951 | case VE::PVLDZLOvm: |
| 27952 | case VE::PVLDZLOvmL: |
| 27953 | case VE::PVLDZLOvmL_v: |
| 27954 | case VE::PVLDZLOvm_v: |
| 27955 | case VE::PVLDZLOvml: |
| 27956 | case VE::PVLDZLOvml_v: |
| 27957 | case VE::PVLDZUPvm: |
| 27958 | case VE::PVLDZUPvmL: |
| 27959 | case VE::PVLDZUPvmL_v: |
| 27960 | case VE::PVLDZUPvm_v: |
| 27961 | case VE::PVLDZUPvml: |
| 27962 | case VE::PVLDZUPvml_v: |
| 27963 | case VE::PVLDZvm: |
| 27964 | case VE::PVLDZvmL: |
| 27965 | case VE::PVLDZvmL_v: |
| 27966 | case VE::PVLDZvm_v: |
| 27967 | case VE::PVLDZvml: |
| 27968 | case VE::PVLDZvml_v: |
| 27969 | case VE::PVPCNTLOvm: |
| 27970 | case VE::PVPCNTLOvmL: |
| 27971 | case VE::PVPCNTLOvmL_v: |
| 27972 | case VE::PVPCNTLOvm_v: |
| 27973 | case VE::PVPCNTLOvml: |
| 27974 | case VE::PVPCNTLOvml_v: |
| 27975 | case VE::PVPCNTUPvm: |
| 27976 | case VE::PVPCNTUPvmL: |
| 27977 | case VE::PVPCNTUPvmL_v: |
| 27978 | case VE::PVPCNTUPvm_v: |
| 27979 | case VE::PVPCNTUPvml: |
| 27980 | case VE::PVPCNTUPvml_v: |
| 27981 | case VE::PVPCNTvm: |
| 27982 | case VE::PVPCNTvmL: |
| 27983 | case VE::PVPCNTvmL_v: |
| 27984 | case VE::PVPCNTvm_v: |
| 27985 | case VE::PVPCNTvml: |
| 27986 | case VE::PVPCNTvml_v: |
| 27987 | case VE::VBRVvm: |
| 27988 | case VE::VBRVvmL: |
| 27989 | case VE::VBRVvmL_v: |
| 27990 | case VE::VBRVvm_v: |
| 27991 | case VE::VBRVvml: |
| 27992 | case VE::VBRVvml_v: |
| 27993 | case VE::VCPvm: |
| 27994 | case VE::VCPvmL: |
| 27995 | case VE::VCPvmL_v: |
| 27996 | case VE::VCPvm_v: |
| 27997 | case VE::VCPvml: |
| 27998 | case VE::VCPvml_v: |
| 27999 | case VE::VEXvm: |
| 28000 | case VE::VEXvmL: |
| 28001 | case VE::VEXvmL_v: |
| 28002 | case VE::VEXvm_v: |
| 28003 | case VE::VEXvml: |
| 28004 | case VE::VEXvml_v: |
| 28005 | case VE::VLDZvm: |
| 28006 | case VE::VLDZvmL: |
| 28007 | case VE::VLDZvmL_v: |
| 28008 | case VE::VLDZvm_v: |
| 28009 | case VE::VLDZvml: |
| 28010 | case VE::VLDZvml_v: |
| 28011 | case VE::VPCNTvm: |
| 28012 | case VE::VPCNTvmL: |
| 28013 | case VE::VPCNTvmL_v: |
| 28014 | case VE::VPCNTvm_v: |
| 28015 | case VE::VPCNTvml: |
| 28016 | case VE::VPCNTvml_v: { |
| 28017 | switch (OpNum) { |
| 28018 | case 2: |
| 28019 | // op: m |
| 28020 | return 48; |
| 28021 | case 0: |
| 28022 | // op: vx |
| 28023 | return 24; |
| 28024 | case 1: |
| 28025 | // op: vz |
| 28026 | return 8; |
| 28027 | } |
| 28028 | break; |
| 28029 | } |
| 28030 | case VE::PVBRDim: |
| 28031 | case VE::PVBRDimL: |
| 28032 | case VE::PVBRDimL_v: |
| 28033 | case VE::PVBRDim_v: |
| 28034 | case VE::PVBRDiml: |
| 28035 | case VE::PVBRDiml_v: |
| 28036 | case VE::PVBRDrm: |
| 28037 | case VE::PVBRDrmL: |
| 28038 | case VE::PVBRDrmL_v: |
| 28039 | case VE::PVBRDrm_v: |
| 28040 | case VE::PVBRDrml: |
| 28041 | case VE::PVBRDrml_v: |
| 28042 | case VE::VBRDLim: |
| 28043 | case VE::VBRDLimL: |
| 28044 | case VE::VBRDLimL_v: |
| 28045 | case VE::VBRDLim_v: |
| 28046 | case VE::VBRDLiml: |
| 28047 | case VE::VBRDLiml_v: |
| 28048 | case VE::VBRDLrm: |
| 28049 | case VE::VBRDLrmL: |
| 28050 | case VE::VBRDLrmL_v: |
| 28051 | case VE::VBRDLrm_v: |
| 28052 | case VE::VBRDLrml: |
| 28053 | case VE::VBRDLrml_v: |
| 28054 | case VE::VBRDUim: |
| 28055 | case VE::VBRDUimL: |
| 28056 | case VE::VBRDUimL_v: |
| 28057 | case VE::VBRDUim_v: |
| 28058 | case VE::VBRDUiml: |
| 28059 | case VE::VBRDUiml_v: |
| 28060 | case VE::VBRDUrm: |
| 28061 | case VE::VBRDUrmL: |
| 28062 | case VE::VBRDUrmL_v: |
| 28063 | case VE::VBRDUrm_v: |
| 28064 | case VE::VBRDUrml: |
| 28065 | case VE::VBRDUrml_v: |
| 28066 | case VE::VBRDim: |
| 28067 | case VE::VBRDimL: |
| 28068 | case VE::VBRDimL_v: |
| 28069 | case VE::VBRDim_v: |
| 28070 | case VE::VBRDiml: |
| 28071 | case VE::VBRDiml_v: |
| 28072 | case VE::VBRDrm: |
| 28073 | case VE::VBRDrmL: |
| 28074 | case VE::VBRDrmL_v: |
| 28075 | case VE::VBRDrm_v: |
| 28076 | case VE::VBRDrml: |
| 28077 | case VE::VBRDrml_v: { |
| 28078 | switch (OpNum) { |
| 28079 | case 2: |
| 28080 | // op: m |
| 28081 | return 48; |
| 28082 | case 1: |
| 28083 | // op: sy |
| 28084 | return 40; |
| 28085 | case 0: |
| 28086 | // op: vx |
| 28087 | return 24; |
| 28088 | } |
| 28089 | break; |
| 28090 | } |
| 28091 | case VE::SCRirr: |
| 28092 | case VE::SCRizr: |
| 28093 | case VE::SCRrrr: |
| 28094 | case VE::SCRrzr: { |
| 28095 | switch (OpNum) { |
| 28096 | case 2: |
| 28097 | // op: sx |
| 28098 | return 48; |
| 28099 | case 0: |
| 28100 | // op: sy |
| 28101 | return 40; |
| 28102 | case 1: |
| 28103 | // op: sz |
| 28104 | return 32; |
| 28105 | } |
| 28106 | break; |
| 28107 | } |
| 28108 | case VE::SHMBri: |
| 28109 | case VE::SHMBzi: |
| 28110 | case VE::SHMHri: |
| 28111 | case VE::SHMHzi: |
| 28112 | case VE::SHMLri: |
| 28113 | case VE::SHMLzi: |
| 28114 | case VE::SHMWri: |
| 28115 | case VE::SHMWzi: { |
| 28116 | switch (OpNum) { |
| 28117 | case 2: |
| 28118 | // op: sx |
| 28119 | return 48; |
| 28120 | case 0: |
| 28121 | // op: sz |
| 28122 | return 32; |
| 28123 | case 1: |
| 28124 | // op: imm32 |
| 28125 | return 0; |
| 28126 | } |
| 28127 | break; |
| 28128 | } |
| 28129 | case VE::PVFMADLOviv: |
| 28130 | case VE::PVFMADLOvivL: |
| 28131 | case VE::PVFMADLOvivL_v: |
| 28132 | case VE::PVFMADLOviv_v: |
| 28133 | case VE::PVFMADLOvivl: |
| 28134 | case VE::PVFMADLOvivl_v: |
| 28135 | case VE::PVFMADLOvrv: |
| 28136 | case VE::PVFMADLOvrvL: |
| 28137 | case VE::PVFMADLOvrvL_v: |
| 28138 | case VE::PVFMADLOvrv_v: |
| 28139 | case VE::PVFMADLOvrvl: |
| 28140 | case VE::PVFMADLOvrvl_v: |
| 28141 | case VE::PVFMADUPviv: |
| 28142 | case VE::PVFMADUPvivL: |
| 28143 | case VE::PVFMADUPvivL_v: |
| 28144 | case VE::PVFMADUPviv_v: |
| 28145 | case VE::PVFMADUPvivl: |
| 28146 | case VE::PVFMADUPvivl_v: |
| 28147 | case VE::PVFMADUPvrv: |
| 28148 | case VE::PVFMADUPvrvL: |
| 28149 | case VE::PVFMADUPvrvL_v: |
| 28150 | case VE::PVFMADUPvrv_v: |
| 28151 | case VE::PVFMADUPvrvl: |
| 28152 | case VE::PVFMADUPvrvl_v: |
| 28153 | case VE::PVFMADviv: |
| 28154 | case VE::PVFMADvivL: |
| 28155 | case VE::PVFMADvivL_v: |
| 28156 | case VE::PVFMADviv_v: |
| 28157 | case VE::PVFMADvivl: |
| 28158 | case VE::PVFMADvivl_v: |
| 28159 | case VE::PVFMADvrv: |
| 28160 | case VE::PVFMADvrvL: |
| 28161 | case VE::PVFMADvrvL_v: |
| 28162 | case VE::PVFMADvrv_v: |
| 28163 | case VE::PVFMADvrvl: |
| 28164 | case VE::PVFMADvrvl_v: |
| 28165 | case VE::PVFMSBLOviv: |
| 28166 | case VE::PVFMSBLOvivL: |
| 28167 | case VE::PVFMSBLOvivL_v: |
| 28168 | case VE::PVFMSBLOviv_v: |
| 28169 | case VE::PVFMSBLOvivl: |
| 28170 | case VE::PVFMSBLOvivl_v: |
| 28171 | case VE::PVFMSBLOvrv: |
| 28172 | case VE::PVFMSBLOvrvL: |
| 28173 | case VE::PVFMSBLOvrvL_v: |
| 28174 | case VE::PVFMSBLOvrv_v: |
| 28175 | case VE::PVFMSBLOvrvl: |
| 28176 | case VE::PVFMSBLOvrvl_v: |
| 28177 | case VE::PVFMSBUPviv: |
| 28178 | case VE::PVFMSBUPvivL: |
| 28179 | case VE::PVFMSBUPvivL_v: |
| 28180 | case VE::PVFMSBUPviv_v: |
| 28181 | case VE::PVFMSBUPvivl: |
| 28182 | case VE::PVFMSBUPvivl_v: |
| 28183 | case VE::PVFMSBUPvrv: |
| 28184 | case VE::PVFMSBUPvrvL: |
| 28185 | case VE::PVFMSBUPvrvL_v: |
| 28186 | case VE::PVFMSBUPvrv_v: |
| 28187 | case VE::PVFMSBUPvrvl: |
| 28188 | case VE::PVFMSBUPvrvl_v: |
| 28189 | case VE::PVFMSBviv: |
| 28190 | case VE::PVFMSBvivL: |
| 28191 | case VE::PVFMSBvivL_v: |
| 28192 | case VE::PVFMSBviv_v: |
| 28193 | case VE::PVFMSBvivl: |
| 28194 | case VE::PVFMSBvivl_v: |
| 28195 | case VE::PVFMSBvrv: |
| 28196 | case VE::PVFMSBvrvL: |
| 28197 | case VE::PVFMSBvrvL_v: |
| 28198 | case VE::PVFMSBvrv_v: |
| 28199 | case VE::PVFMSBvrvl: |
| 28200 | case VE::PVFMSBvrvl_v: |
| 28201 | case VE::PVFNMADLOviv: |
| 28202 | case VE::PVFNMADLOvivL: |
| 28203 | case VE::PVFNMADLOvivL_v: |
| 28204 | case VE::PVFNMADLOviv_v: |
| 28205 | case VE::PVFNMADLOvivl: |
| 28206 | case VE::PVFNMADLOvivl_v: |
| 28207 | case VE::PVFNMADLOvrv: |
| 28208 | case VE::PVFNMADLOvrvL: |
| 28209 | case VE::PVFNMADLOvrvL_v: |
| 28210 | case VE::PVFNMADLOvrv_v: |
| 28211 | case VE::PVFNMADLOvrvl: |
| 28212 | case VE::PVFNMADLOvrvl_v: |
| 28213 | case VE::PVFNMADUPviv: |
| 28214 | case VE::PVFNMADUPvivL: |
| 28215 | case VE::PVFNMADUPvivL_v: |
| 28216 | case VE::PVFNMADUPviv_v: |
| 28217 | case VE::PVFNMADUPvivl: |
| 28218 | case VE::PVFNMADUPvivl_v: |
| 28219 | case VE::PVFNMADUPvrv: |
| 28220 | case VE::PVFNMADUPvrvL: |
| 28221 | case VE::PVFNMADUPvrvL_v: |
| 28222 | case VE::PVFNMADUPvrv_v: |
| 28223 | case VE::PVFNMADUPvrvl: |
| 28224 | case VE::PVFNMADUPvrvl_v: |
| 28225 | case VE::PVFNMADviv: |
| 28226 | case VE::PVFNMADvivL: |
| 28227 | case VE::PVFNMADvivL_v: |
| 28228 | case VE::PVFNMADviv_v: |
| 28229 | case VE::PVFNMADvivl: |
| 28230 | case VE::PVFNMADvivl_v: |
| 28231 | case VE::PVFNMADvrv: |
| 28232 | case VE::PVFNMADvrvL: |
| 28233 | case VE::PVFNMADvrvL_v: |
| 28234 | case VE::PVFNMADvrv_v: |
| 28235 | case VE::PVFNMADvrvl: |
| 28236 | case VE::PVFNMADvrvl_v: |
| 28237 | case VE::PVFNMSBLOviv: |
| 28238 | case VE::PVFNMSBLOvivL: |
| 28239 | case VE::PVFNMSBLOvivL_v: |
| 28240 | case VE::PVFNMSBLOviv_v: |
| 28241 | case VE::PVFNMSBLOvivl: |
| 28242 | case VE::PVFNMSBLOvivl_v: |
| 28243 | case VE::PVFNMSBLOvrv: |
| 28244 | case VE::PVFNMSBLOvrvL: |
| 28245 | case VE::PVFNMSBLOvrvL_v: |
| 28246 | case VE::PVFNMSBLOvrv_v: |
| 28247 | case VE::PVFNMSBLOvrvl: |
| 28248 | case VE::PVFNMSBLOvrvl_v: |
| 28249 | case VE::PVFNMSBUPviv: |
| 28250 | case VE::PVFNMSBUPvivL: |
| 28251 | case VE::PVFNMSBUPvivL_v: |
| 28252 | case VE::PVFNMSBUPviv_v: |
| 28253 | case VE::PVFNMSBUPvivl: |
| 28254 | case VE::PVFNMSBUPvivl_v: |
| 28255 | case VE::PVFNMSBUPvrv: |
| 28256 | case VE::PVFNMSBUPvrvL: |
| 28257 | case VE::PVFNMSBUPvrvL_v: |
| 28258 | case VE::PVFNMSBUPvrv_v: |
| 28259 | case VE::PVFNMSBUPvrvl: |
| 28260 | case VE::PVFNMSBUPvrvl_v: |
| 28261 | case VE::PVFNMSBviv: |
| 28262 | case VE::PVFNMSBvivL: |
| 28263 | case VE::PVFNMSBvivL_v: |
| 28264 | case VE::PVFNMSBviv_v: |
| 28265 | case VE::PVFNMSBvivl: |
| 28266 | case VE::PVFNMSBvivl_v: |
| 28267 | case VE::PVFNMSBvrv: |
| 28268 | case VE::PVFNMSBvrvL: |
| 28269 | case VE::PVFNMSBvrvL_v: |
| 28270 | case VE::PVFNMSBvrv_v: |
| 28271 | case VE::PVFNMSBvrvl: |
| 28272 | case VE::PVFNMSBvrvl_v: |
| 28273 | case VE::VFMADDviv: |
| 28274 | case VE::VFMADDvivL: |
| 28275 | case VE::VFMADDvivL_v: |
| 28276 | case VE::VFMADDviv_v: |
| 28277 | case VE::VFMADDvivl: |
| 28278 | case VE::VFMADDvivl_v: |
| 28279 | case VE::VFMADDvrv: |
| 28280 | case VE::VFMADDvrvL: |
| 28281 | case VE::VFMADDvrvL_v: |
| 28282 | case VE::VFMADDvrv_v: |
| 28283 | case VE::VFMADDvrvl: |
| 28284 | case VE::VFMADDvrvl_v: |
| 28285 | case VE::VFMADSviv: |
| 28286 | case VE::VFMADSvivL: |
| 28287 | case VE::VFMADSvivL_v: |
| 28288 | case VE::VFMADSviv_v: |
| 28289 | case VE::VFMADSvivl: |
| 28290 | case VE::VFMADSvivl_v: |
| 28291 | case VE::VFMADSvrv: |
| 28292 | case VE::VFMADSvrvL: |
| 28293 | case VE::VFMADSvrvL_v: |
| 28294 | case VE::VFMADSvrv_v: |
| 28295 | case VE::VFMADSvrvl: |
| 28296 | case VE::VFMADSvrvl_v: |
| 28297 | case VE::VFMSBDviv: |
| 28298 | case VE::VFMSBDvivL: |
| 28299 | case VE::VFMSBDvivL_v: |
| 28300 | case VE::VFMSBDviv_v: |
| 28301 | case VE::VFMSBDvivl: |
| 28302 | case VE::VFMSBDvivl_v: |
| 28303 | case VE::VFMSBDvrv: |
| 28304 | case VE::VFMSBDvrvL: |
| 28305 | case VE::VFMSBDvrvL_v: |
| 28306 | case VE::VFMSBDvrv_v: |
| 28307 | case VE::VFMSBDvrvl: |
| 28308 | case VE::VFMSBDvrvl_v: |
| 28309 | case VE::VFMSBSviv: |
| 28310 | case VE::VFMSBSvivL: |
| 28311 | case VE::VFMSBSvivL_v: |
| 28312 | case VE::VFMSBSviv_v: |
| 28313 | case VE::VFMSBSvivl: |
| 28314 | case VE::VFMSBSvivl_v: |
| 28315 | case VE::VFMSBSvrv: |
| 28316 | case VE::VFMSBSvrvL: |
| 28317 | case VE::VFMSBSvrvL_v: |
| 28318 | case VE::VFMSBSvrv_v: |
| 28319 | case VE::VFMSBSvrvl: |
| 28320 | case VE::VFMSBSvrvl_v: |
| 28321 | case VE::VFNMADDviv: |
| 28322 | case VE::VFNMADDvivL: |
| 28323 | case VE::VFNMADDvivL_v: |
| 28324 | case VE::VFNMADDviv_v: |
| 28325 | case VE::VFNMADDvivl: |
| 28326 | case VE::VFNMADDvivl_v: |
| 28327 | case VE::VFNMADDvrv: |
| 28328 | case VE::VFNMADDvrvL: |
| 28329 | case VE::VFNMADDvrvL_v: |
| 28330 | case VE::VFNMADDvrv_v: |
| 28331 | case VE::VFNMADDvrvl: |
| 28332 | case VE::VFNMADDvrvl_v: |
| 28333 | case VE::VFNMADSviv: |
| 28334 | case VE::VFNMADSvivL: |
| 28335 | case VE::VFNMADSvivL_v: |
| 28336 | case VE::VFNMADSviv_v: |
| 28337 | case VE::VFNMADSvivl: |
| 28338 | case VE::VFNMADSvivl_v: |
| 28339 | case VE::VFNMADSvrv: |
| 28340 | case VE::VFNMADSvrvL: |
| 28341 | case VE::VFNMADSvrvL_v: |
| 28342 | case VE::VFNMADSvrv_v: |
| 28343 | case VE::VFNMADSvrvl: |
| 28344 | case VE::VFNMADSvrvl_v: |
| 28345 | case VE::VFNMSBDviv: |
| 28346 | case VE::VFNMSBDvivL: |
| 28347 | case VE::VFNMSBDvivL_v: |
| 28348 | case VE::VFNMSBDviv_v: |
| 28349 | case VE::VFNMSBDvivl: |
| 28350 | case VE::VFNMSBDvivl_v: |
| 28351 | case VE::VFNMSBDvrv: |
| 28352 | case VE::VFNMSBDvrvL: |
| 28353 | case VE::VFNMSBDvrvL_v: |
| 28354 | case VE::VFNMSBDvrv_v: |
| 28355 | case VE::VFNMSBDvrvl: |
| 28356 | case VE::VFNMSBDvrvl_v: |
| 28357 | case VE::VFNMSBSviv: |
| 28358 | case VE::VFNMSBSvivL: |
| 28359 | case VE::VFNMSBSvivL_v: |
| 28360 | case VE::VFNMSBSviv_v: |
| 28361 | case VE::VFNMSBSvivl: |
| 28362 | case VE::VFNMSBSvivl_v: |
| 28363 | case VE::VFNMSBSvrv: |
| 28364 | case VE::VFNMSBSvrvL: |
| 28365 | case VE::VFNMSBSvrvL_v: |
| 28366 | case VE::VFNMSBSvrv_v: |
| 28367 | case VE::VFNMSBSvrvl: |
| 28368 | case VE::VFNMSBSvrvl_v: { |
| 28369 | switch (OpNum) { |
| 28370 | case 2: |
| 28371 | // op: sy |
| 28372 | return 40; |
| 28373 | case 0: |
| 28374 | // op: vx |
| 28375 | return 24; |
| 28376 | case 1: |
| 28377 | // op: vy |
| 28378 | return 16; |
| 28379 | case 3: |
| 28380 | // op: vw |
| 28381 | return 0; |
| 28382 | } |
| 28383 | break; |
| 28384 | } |
| 28385 | case VE::VDIVSLvi: |
| 28386 | case VE::VDIVSLviL: |
| 28387 | case VE::VDIVSLviL_v: |
| 28388 | case VE::VDIVSLvi_v: |
| 28389 | case VE::VDIVSLvil: |
| 28390 | case VE::VDIVSLvil_v: |
| 28391 | case VE::VDIVSLvr: |
| 28392 | case VE::VDIVSLvrL: |
| 28393 | case VE::VDIVSLvrL_v: |
| 28394 | case VE::VDIVSLvr_v: |
| 28395 | case VE::VDIVSLvrl: |
| 28396 | case VE::VDIVSLvrl_v: |
| 28397 | case VE::VDIVSWSXvi: |
| 28398 | case VE::VDIVSWSXviL: |
| 28399 | case VE::VDIVSWSXviL_v: |
| 28400 | case VE::VDIVSWSXvi_v: |
| 28401 | case VE::VDIVSWSXvil: |
| 28402 | case VE::VDIVSWSXvil_v: |
| 28403 | case VE::VDIVSWSXvr: |
| 28404 | case VE::VDIVSWSXvrL: |
| 28405 | case VE::VDIVSWSXvrL_v: |
| 28406 | case VE::VDIVSWSXvr_v: |
| 28407 | case VE::VDIVSWSXvrl: |
| 28408 | case VE::VDIVSWSXvrl_v: |
| 28409 | case VE::VDIVSWZXvi: |
| 28410 | case VE::VDIVSWZXviL: |
| 28411 | case VE::VDIVSWZXviL_v: |
| 28412 | case VE::VDIVSWZXvi_v: |
| 28413 | case VE::VDIVSWZXvil: |
| 28414 | case VE::VDIVSWZXvil_v: |
| 28415 | case VE::VDIVSWZXvr: |
| 28416 | case VE::VDIVSWZXvrL: |
| 28417 | case VE::VDIVSWZXvrL_v: |
| 28418 | case VE::VDIVSWZXvr_v: |
| 28419 | case VE::VDIVSWZXvrl: |
| 28420 | case VE::VDIVSWZXvrl_v: |
| 28421 | case VE::VDIVULvi: |
| 28422 | case VE::VDIVULviL: |
| 28423 | case VE::VDIVULviL_v: |
| 28424 | case VE::VDIVULvi_v: |
| 28425 | case VE::VDIVULvil: |
| 28426 | case VE::VDIVULvil_v: |
| 28427 | case VE::VDIVULvr: |
| 28428 | case VE::VDIVULvrL: |
| 28429 | case VE::VDIVULvrL_v: |
| 28430 | case VE::VDIVULvr_v: |
| 28431 | case VE::VDIVULvrl: |
| 28432 | case VE::VDIVULvrl_v: |
| 28433 | case VE::VDIVUWvi: |
| 28434 | case VE::VDIVUWviL: |
| 28435 | case VE::VDIVUWviL_v: |
| 28436 | case VE::VDIVUWvi_v: |
| 28437 | case VE::VDIVUWvil: |
| 28438 | case VE::VDIVUWvil_v: |
| 28439 | case VE::VDIVUWvr: |
| 28440 | case VE::VDIVUWvrL: |
| 28441 | case VE::VDIVUWvrL_v: |
| 28442 | case VE::VDIVUWvr_v: |
| 28443 | case VE::VDIVUWvrl: |
| 28444 | case VE::VDIVUWvrl_v: |
| 28445 | case VE::VFDIVDvi: |
| 28446 | case VE::VFDIVDviL: |
| 28447 | case VE::VFDIVDviL_v: |
| 28448 | case VE::VFDIVDvi_v: |
| 28449 | case VE::VFDIVDvil: |
| 28450 | case VE::VFDIVDvil_v: |
| 28451 | case VE::VFDIVDvr: |
| 28452 | case VE::VFDIVDvrL: |
| 28453 | case VE::VFDIVDvrL_v: |
| 28454 | case VE::VFDIVDvr_v: |
| 28455 | case VE::VFDIVDvrl: |
| 28456 | case VE::VFDIVDvrl_v: |
| 28457 | case VE::VFDIVSvi: |
| 28458 | case VE::VFDIVSviL: |
| 28459 | case VE::VFDIVSviL_v: |
| 28460 | case VE::VFDIVSvi_v: |
| 28461 | case VE::VFDIVSvil: |
| 28462 | case VE::VFDIVSvil_v: |
| 28463 | case VE::VFDIVSvr: |
| 28464 | case VE::VFDIVSvrL: |
| 28465 | case VE::VFDIVSvrL_v: |
| 28466 | case VE::VFDIVSvr_v: |
| 28467 | case VE::VFDIVSvrl: |
| 28468 | case VE::VFDIVSvrl_v: |
| 28469 | case VE::VFIADvi: |
| 28470 | case VE::VFIADviL: |
| 28471 | case VE::VFIADviL_v: |
| 28472 | case VE::VFIADvi_v: |
| 28473 | case VE::VFIADvil: |
| 28474 | case VE::VFIADvil_v: |
| 28475 | case VE::VFIADvr: |
| 28476 | case VE::VFIADvrL: |
| 28477 | case VE::VFIADvrL_v: |
| 28478 | case VE::VFIADvr_v: |
| 28479 | case VE::VFIADvrl: |
| 28480 | case VE::VFIADvrl_v: |
| 28481 | case VE::VFIASvi: |
| 28482 | case VE::VFIASviL: |
| 28483 | case VE::VFIASviL_v: |
| 28484 | case VE::VFIASvi_v: |
| 28485 | case VE::VFIASvil: |
| 28486 | case VE::VFIASvil_v: |
| 28487 | case VE::VFIASvr: |
| 28488 | case VE::VFIASvrL: |
| 28489 | case VE::VFIASvrL_v: |
| 28490 | case VE::VFIASvr_v: |
| 28491 | case VE::VFIASvrl: |
| 28492 | case VE::VFIASvrl_v: |
| 28493 | case VE::VFIMDvi: |
| 28494 | case VE::VFIMDviL: |
| 28495 | case VE::VFIMDviL_v: |
| 28496 | case VE::VFIMDvi_v: |
| 28497 | case VE::VFIMDvil: |
| 28498 | case VE::VFIMDvil_v: |
| 28499 | case VE::VFIMDvr: |
| 28500 | case VE::VFIMDvrL: |
| 28501 | case VE::VFIMDvrL_v: |
| 28502 | case VE::VFIMDvr_v: |
| 28503 | case VE::VFIMDvrl: |
| 28504 | case VE::VFIMDvrl_v: |
| 28505 | case VE::VFIMSvi: |
| 28506 | case VE::VFIMSviL: |
| 28507 | case VE::VFIMSviL_v: |
| 28508 | case VE::VFIMSvi_v: |
| 28509 | case VE::VFIMSvil: |
| 28510 | case VE::VFIMSvil_v: |
| 28511 | case VE::VFIMSvr: |
| 28512 | case VE::VFIMSvrL: |
| 28513 | case VE::VFIMSvrL_v: |
| 28514 | case VE::VFIMSvr_v: |
| 28515 | case VE::VFIMSvrl: |
| 28516 | case VE::VFIMSvrl_v: |
| 28517 | case VE::VFISDvi: |
| 28518 | case VE::VFISDviL: |
| 28519 | case VE::VFISDviL_v: |
| 28520 | case VE::VFISDvi_v: |
| 28521 | case VE::VFISDvil: |
| 28522 | case VE::VFISDvil_v: |
| 28523 | case VE::VFISDvr: |
| 28524 | case VE::VFISDvrL: |
| 28525 | case VE::VFISDvrL_v: |
| 28526 | case VE::VFISDvr_v: |
| 28527 | case VE::VFISDvrl: |
| 28528 | case VE::VFISDvrl_v: |
| 28529 | case VE::VFISSvi: |
| 28530 | case VE::VFISSviL: |
| 28531 | case VE::VFISSviL_v: |
| 28532 | case VE::VFISSvi_v: |
| 28533 | case VE::VFISSvil: |
| 28534 | case VE::VFISSvil_v: |
| 28535 | case VE::VFISSvr: |
| 28536 | case VE::VFISSvrL: |
| 28537 | case VE::VFISSvrL_v: |
| 28538 | case VE::VFISSvr_v: |
| 28539 | case VE::VFISSvrl: |
| 28540 | case VE::VFISSvrl_v: { |
| 28541 | switch (OpNum) { |
| 28542 | case 2: |
| 28543 | // op: sy |
| 28544 | return 40; |
| 28545 | case 0: |
| 28546 | // op: vx |
| 28547 | return 24; |
| 28548 | case 1: |
| 28549 | // op: vy |
| 28550 | return 16; |
| 28551 | } |
| 28552 | break; |
| 28553 | } |
| 28554 | case VE::PVSLALOvi: |
| 28555 | case VE::PVSLALOviL: |
| 28556 | case VE::PVSLALOviL_v: |
| 28557 | case VE::PVSLALOvi_v: |
| 28558 | case VE::PVSLALOvil: |
| 28559 | case VE::PVSLALOvil_v: |
| 28560 | case VE::PVSLALOvr: |
| 28561 | case VE::PVSLALOvrL: |
| 28562 | case VE::PVSLALOvrL_v: |
| 28563 | case VE::PVSLALOvr_v: |
| 28564 | case VE::PVSLALOvrl: |
| 28565 | case VE::PVSLALOvrl_v: |
| 28566 | case VE::PVSLAUPvi: |
| 28567 | case VE::PVSLAUPviL: |
| 28568 | case VE::PVSLAUPviL_v: |
| 28569 | case VE::PVSLAUPvi_v: |
| 28570 | case VE::PVSLAUPvil: |
| 28571 | case VE::PVSLAUPvil_v: |
| 28572 | case VE::PVSLAUPvr: |
| 28573 | case VE::PVSLAUPvrL: |
| 28574 | case VE::PVSLAUPvrL_v: |
| 28575 | case VE::PVSLAUPvr_v: |
| 28576 | case VE::PVSLAUPvrl: |
| 28577 | case VE::PVSLAUPvrl_v: |
| 28578 | case VE::PVSLAvi: |
| 28579 | case VE::PVSLAviL: |
| 28580 | case VE::PVSLAviL_v: |
| 28581 | case VE::PVSLAvi_v: |
| 28582 | case VE::PVSLAvil: |
| 28583 | case VE::PVSLAvil_v: |
| 28584 | case VE::PVSLAvr: |
| 28585 | case VE::PVSLAvrL: |
| 28586 | case VE::PVSLAvrL_v: |
| 28587 | case VE::PVSLAvr_v: |
| 28588 | case VE::PVSLAvrl: |
| 28589 | case VE::PVSLAvrl_v: |
| 28590 | case VE::PVSLLLOvi: |
| 28591 | case VE::PVSLLLOviL: |
| 28592 | case VE::PVSLLLOviL_v: |
| 28593 | case VE::PVSLLLOvi_v: |
| 28594 | case VE::PVSLLLOvil: |
| 28595 | case VE::PVSLLLOvil_v: |
| 28596 | case VE::PVSLLLOvr: |
| 28597 | case VE::PVSLLLOvrL: |
| 28598 | case VE::PVSLLLOvrL_v: |
| 28599 | case VE::PVSLLLOvr_v: |
| 28600 | case VE::PVSLLLOvrl: |
| 28601 | case VE::PVSLLLOvrl_v: |
| 28602 | case VE::PVSLLUPvi: |
| 28603 | case VE::PVSLLUPviL: |
| 28604 | case VE::PVSLLUPviL_v: |
| 28605 | case VE::PVSLLUPvi_v: |
| 28606 | case VE::PVSLLUPvil: |
| 28607 | case VE::PVSLLUPvil_v: |
| 28608 | case VE::PVSLLUPvr: |
| 28609 | case VE::PVSLLUPvrL: |
| 28610 | case VE::PVSLLUPvrL_v: |
| 28611 | case VE::PVSLLUPvr_v: |
| 28612 | case VE::PVSLLUPvrl: |
| 28613 | case VE::PVSLLUPvrl_v: |
| 28614 | case VE::PVSLLvi: |
| 28615 | case VE::PVSLLviL: |
| 28616 | case VE::PVSLLviL_v: |
| 28617 | case VE::PVSLLvi_v: |
| 28618 | case VE::PVSLLvil: |
| 28619 | case VE::PVSLLvil_v: |
| 28620 | case VE::PVSLLvr: |
| 28621 | case VE::PVSLLvrL: |
| 28622 | case VE::PVSLLvrL_v: |
| 28623 | case VE::PVSLLvr_v: |
| 28624 | case VE::PVSLLvrl: |
| 28625 | case VE::PVSLLvrl_v: |
| 28626 | case VE::PVSRALOvi: |
| 28627 | case VE::PVSRALOviL: |
| 28628 | case VE::PVSRALOviL_v: |
| 28629 | case VE::PVSRALOvi_v: |
| 28630 | case VE::PVSRALOvil: |
| 28631 | case VE::PVSRALOvil_v: |
| 28632 | case VE::PVSRALOvr: |
| 28633 | case VE::PVSRALOvrL: |
| 28634 | case VE::PVSRALOvrL_v: |
| 28635 | case VE::PVSRALOvr_v: |
| 28636 | case VE::PVSRALOvrl: |
| 28637 | case VE::PVSRALOvrl_v: |
| 28638 | case VE::PVSRAUPvi: |
| 28639 | case VE::PVSRAUPviL: |
| 28640 | case VE::PVSRAUPviL_v: |
| 28641 | case VE::PVSRAUPvi_v: |
| 28642 | case VE::PVSRAUPvil: |
| 28643 | case VE::PVSRAUPvil_v: |
| 28644 | case VE::PVSRAUPvr: |
| 28645 | case VE::PVSRAUPvrL: |
| 28646 | case VE::PVSRAUPvrL_v: |
| 28647 | case VE::PVSRAUPvr_v: |
| 28648 | case VE::PVSRAUPvrl: |
| 28649 | case VE::PVSRAUPvrl_v: |
| 28650 | case VE::PVSRAvi: |
| 28651 | case VE::PVSRAviL: |
| 28652 | case VE::PVSRAviL_v: |
| 28653 | case VE::PVSRAvi_v: |
| 28654 | case VE::PVSRAvil: |
| 28655 | case VE::PVSRAvil_v: |
| 28656 | case VE::PVSRAvr: |
| 28657 | case VE::PVSRAvrL: |
| 28658 | case VE::PVSRAvrL_v: |
| 28659 | case VE::PVSRAvr_v: |
| 28660 | case VE::PVSRAvrl: |
| 28661 | case VE::PVSRAvrl_v: |
| 28662 | case VE::PVSRLLOvi: |
| 28663 | case VE::PVSRLLOviL: |
| 28664 | case VE::PVSRLLOviL_v: |
| 28665 | case VE::PVSRLLOvi_v: |
| 28666 | case VE::PVSRLLOvil: |
| 28667 | case VE::PVSRLLOvil_v: |
| 28668 | case VE::PVSRLLOvr: |
| 28669 | case VE::PVSRLLOvrL: |
| 28670 | case VE::PVSRLLOvrL_v: |
| 28671 | case VE::PVSRLLOvr_v: |
| 28672 | case VE::PVSRLLOvrl: |
| 28673 | case VE::PVSRLLOvrl_v: |
| 28674 | case VE::PVSRLUPvi: |
| 28675 | case VE::PVSRLUPviL: |
| 28676 | case VE::PVSRLUPviL_v: |
| 28677 | case VE::PVSRLUPvi_v: |
| 28678 | case VE::PVSRLUPvil: |
| 28679 | case VE::PVSRLUPvil_v: |
| 28680 | case VE::PVSRLUPvr: |
| 28681 | case VE::PVSRLUPvrL: |
| 28682 | case VE::PVSRLUPvrL_v: |
| 28683 | case VE::PVSRLUPvr_v: |
| 28684 | case VE::PVSRLUPvrl: |
| 28685 | case VE::PVSRLUPvrl_v: |
| 28686 | case VE::PVSRLvi: |
| 28687 | case VE::PVSRLviL: |
| 28688 | case VE::PVSRLviL_v: |
| 28689 | case VE::PVSRLvi_v: |
| 28690 | case VE::PVSRLvil: |
| 28691 | case VE::PVSRLvil_v: |
| 28692 | case VE::PVSRLvr: |
| 28693 | case VE::PVSRLvrL: |
| 28694 | case VE::PVSRLvrL_v: |
| 28695 | case VE::PVSRLvr_v: |
| 28696 | case VE::PVSRLvrl: |
| 28697 | case VE::PVSRLvrl_v: |
| 28698 | case VE::VSLALvi: |
| 28699 | case VE::VSLALviL: |
| 28700 | case VE::VSLALviL_v: |
| 28701 | case VE::VSLALvi_v: |
| 28702 | case VE::VSLALvil: |
| 28703 | case VE::VSLALvil_v: |
| 28704 | case VE::VSLALvr: |
| 28705 | case VE::VSLALvrL: |
| 28706 | case VE::VSLALvrL_v: |
| 28707 | case VE::VSLALvr_v: |
| 28708 | case VE::VSLALvrl: |
| 28709 | case VE::VSLALvrl_v: |
| 28710 | case VE::VSLAWSXvi: |
| 28711 | case VE::VSLAWSXviL: |
| 28712 | case VE::VSLAWSXviL_v: |
| 28713 | case VE::VSLAWSXvi_v: |
| 28714 | case VE::VSLAWSXvil: |
| 28715 | case VE::VSLAWSXvil_v: |
| 28716 | case VE::VSLAWSXvr: |
| 28717 | case VE::VSLAWSXvrL: |
| 28718 | case VE::VSLAWSXvrL_v: |
| 28719 | case VE::VSLAWSXvr_v: |
| 28720 | case VE::VSLAWSXvrl: |
| 28721 | case VE::VSLAWSXvrl_v: |
| 28722 | case VE::VSLAWZXvi: |
| 28723 | case VE::VSLAWZXviL: |
| 28724 | case VE::VSLAWZXviL_v: |
| 28725 | case VE::VSLAWZXvi_v: |
| 28726 | case VE::VSLAWZXvil: |
| 28727 | case VE::VSLAWZXvil_v: |
| 28728 | case VE::VSLAWZXvr: |
| 28729 | case VE::VSLAWZXvrL: |
| 28730 | case VE::VSLAWZXvrL_v: |
| 28731 | case VE::VSLAWZXvr_v: |
| 28732 | case VE::VSLAWZXvrl: |
| 28733 | case VE::VSLAWZXvrl_v: |
| 28734 | case VE::VSLLvi: |
| 28735 | case VE::VSLLviL: |
| 28736 | case VE::VSLLviL_v: |
| 28737 | case VE::VSLLvi_v: |
| 28738 | case VE::VSLLvil: |
| 28739 | case VE::VSLLvil_v: |
| 28740 | case VE::VSLLvr: |
| 28741 | case VE::VSLLvrL: |
| 28742 | case VE::VSLLvrL_v: |
| 28743 | case VE::VSLLvr_v: |
| 28744 | case VE::VSLLvrl: |
| 28745 | case VE::VSLLvrl_v: |
| 28746 | case VE::VSRALvi: |
| 28747 | case VE::VSRALviL: |
| 28748 | case VE::VSRALviL_v: |
| 28749 | case VE::VSRALvi_v: |
| 28750 | case VE::VSRALvil: |
| 28751 | case VE::VSRALvil_v: |
| 28752 | case VE::VSRALvr: |
| 28753 | case VE::VSRALvrL: |
| 28754 | case VE::VSRALvrL_v: |
| 28755 | case VE::VSRALvr_v: |
| 28756 | case VE::VSRALvrl: |
| 28757 | case VE::VSRALvrl_v: |
| 28758 | case VE::VSRAWSXvi: |
| 28759 | case VE::VSRAWSXviL: |
| 28760 | case VE::VSRAWSXviL_v: |
| 28761 | case VE::VSRAWSXvi_v: |
| 28762 | case VE::VSRAWSXvil: |
| 28763 | case VE::VSRAWSXvil_v: |
| 28764 | case VE::VSRAWSXvr: |
| 28765 | case VE::VSRAWSXvrL: |
| 28766 | case VE::VSRAWSXvrL_v: |
| 28767 | case VE::VSRAWSXvr_v: |
| 28768 | case VE::VSRAWSXvrl: |
| 28769 | case VE::VSRAWSXvrl_v: |
| 28770 | case VE::VSRAWZXvi: |
| 28771 | case VE::VSRAWZXviL: |
| 28772 | case VE::VSRAWZXviL_v: |
| 28773 | case VE::VSRAWZXvi_v: |
| 28774 | case VE::VSRAWZXvil: |
| 28775 | case VE::VSRAWZXvil_v: |
| 28776 | case VE::VSRAWZXvr: |
| 28777 | case VE::VSRAWZXvrL: |
| 28778 | case VE::VSRAWZXvrL_v: |
| 28779 | case VE::VSRAWZXvr_v: |
| 28780 | case VE::VSRAWZXvrl: |
| 28781 | case VE::VSRAWZXvrl_v: |
| 28782 | case VE::VSRLvi: |
| 28783 | case VE::VSRLviL: |
| 28784 | case VE::VSRLviL_v: |
| 28785 | case VE::VSRLvi_v: |
| 28786 | case VE::VSRLvil: |
| 28787 | case VE::VSRLvil_v: |
| 28788 | case VE::VSRLvr: |
| 28789 | case VE::VSRLvrL: |
| 28790 | case VE::VSRLvrL_v: |
| 28791 | case VE::VSRLvr_v: |
| 28792 | case VE::VSRLvrl: |
| 28793 | case VE::VSRLvrl_v: { |
| 28794 | switch (OpNum) { |
| 28795 | case 2: |
| 28796 | // op: sy |
| 28797 | return 40; |
| 28798 | case 0: |
| 28799 | // op: vx |
| 28800 | return 24; |
| 28801 | case 1: |
| 28802 | // op: vz |
| 28803 | return 8; |
| 28804 | } |
| 28805 | break; |
| 28806 | } |
| 28807 | case VE::VGTLSXNCsir: |
| 28808 | case VE::VGTLSXNCsirL: |
| 28809 | case VE::VGTLSXNCsirL_v: |
| 28810 | case VE::VGTLSXNCsir_v: |
| 28811 | case VE::VGTLSXNCsirl: |
| 28812 | case VE::VGTLSXNCsirl_v: |
| 28813 | case VE::VGTLSXNCsiz: |
| 28814 | case VE::VGTLSXNCsizL: |
| 28815 | case VE::VGTLSXNCsizL_v: |
| 28816 | case VE::VGTLSXNCsiz_v: |
| 28817 | case VE::VGTLSXNCsizl: |
| 28818 | case VE::VGTLSXNCsizl_v: |
| 28819 | case VE::VGTLSXNCsrr: |
| 28820 | case VE::VGTLSXNCsrrL: |
| 28821 | case VE::VGTLSXNCsrrL_v: |
| 28822 | case VE::VGTLSXNCsrr_v: |
| 28823 | case VE::VGTLSXNCsrrl: |
| 28824 | case VE::VGTLSXNCsrrl_v: |
| 28825 | case VE::VGTLSXNCsrz: |
| 28826 | case VE::VGTLSXNCsrzL: |
| 28827 | case VE::VGTLSXNCsrzL_v: |
| 28828 | case VE::VGTLSXNCsrz_v: |
| 28829 | case VE::VGTLSXNCsrzl: |
| 28830 | case VE::VGTLSXNCsrzl_v: |
| 28831 | case VE::VGTLSXsir: |
| 28832 | case VE::VGTLSXsirL: |
| 28833 | case VE::VGTLSXsirL_v: |
| 28834 | case VE::VGTLSXsir_v: |
| 28835 | case VE::VGTLSXsirl: |
| 28836 | case VE::VGTLSXsirl_v: |
| 28837 | case VE::VGTLSXsiz: |
| 28838 | case VE::VGTLSXsizL: |
| 28839 | case VE::VGTLSXsizL_v: |
| 28840 | case VE::VGTLSXsiz_v: |
| 28841 | case VE::VGTLSXsizl: |
| 28842 | case VE::VGTLSXsizl_v: |
| 28843 | case VE::VGTLSXsrr: |
| 28844 | case VE::VGTLSXsrrL: |
| 28845 | case VE::VGTLSXsrrL_v: |
| 28846 | case VE::VGTLSXsrr_v: |
| 28847 | case VE::VGTLSXsrrl: |
| 28848 | case VE::VGTLSXsrrl_v: |
| 28849 | case VE::VGTLSXsrz: |
| 28850 | case VE::VGTLSXsrzL: |
| 28851 | case VE::VGTLSXsrzL_v: |
| 28852 | case VE::VGTLSXsrz_v: |
| 28853 | case VE::VGTLSXsrzl: |
| 28854 | case VE::VGTLSXsrzl_v: |
| 28855 | case VE::VGTLZXNCsir: |
| 28856 | case VE::VGTLZXNCsirL: |
| 28857 | case VE::VGTLZXNCsirL_v: |
| 28858 | case VE::VGTLZXNCsir_v: |
| 28859 | case VE::VGTLZXNCsirl: |
| 28860 | case VE::VGTLZXNCsirl_v: |
| 28861 | case VE::VGTLZXNCsiz: |
| 28862 | case VE::VGTLZXNCsizL: |
| 28863 | case VE::VGTLZXNCsizL_v: |
| 28864 | case VE::VGTLZXNCsiz_v: |
| 28865 | case VE::VGTLZXNCsizl: |
| 28866 | case VE::VGTLZXNCsizl_v: |
| 28867 | case VE::VGTLZXNCsrr: |
| 28868 | case VE::VGTLZXNCsrrL: |
| 28869 | case VE::VGTLZXNCsrrL_v: |
| 28870 | case VE::VGTLZXNCsrr_v: |
| 28871 | case VE::VGTLZXNCsrrl: |
| 28872 | case VE::VGTLZXNCsrrl_v: |
| 28873 | case VE::VGTLZXNCsrz: |
| 28874 | case VE::VGTLZXNCsrzL: |
| 28875 | case VE::VGTLZXNCsrzL_v: |
| 28876 | case VE::VGTLZXNCsrz_v: |
| 28877 | case VE::VGTLZXNCsrzl: |
| 28878 | case VE::VGTLZXNCsrzl_v: |
| 28879 | case VE::VGTLZXsir: |
| 28880 | case VE::VGTLZXsirL: |
| 28881 | case VE::VGTLZXsirL_v: |
| 28882 | case VE::VGTLZXsir_v: |
| 28883 | case VE::VGTLZXsirl: |
| 28884 | case VE::VGTLZXsirl_v: |
| 28885 | case VE::VGTLZXsiz: |
| 28886 | case VE::VGTLZXsizL: |
| 28887 | case VE::VGTLZXsizL_v: |
| 28888 | case VE::VGTLZXsiz_v: |
| 28889 | case VE::VGTLZXsizl: |
| 28890 | case VE::VGTLZXsizl_v: |
| 28891 | case VE::VGTLZXsrr: |
| 28892 | case VE::VGTLZXsrrL: |
| 28893 | case VE::VGTLZXsrrL_v: |
| 28894 | case VE::VGTLZXsrr_v: |
| 28895 | case VE::VGTLZXsrrl: |
| 28896 | case VE::VGTLZXsrrl_v: |
| 28897 | case VE::VGTLZXsrz: |
| 28898 | case VE::VGTLZXsrzL: |
| 28899 | case VE::VGTLZXsrzL_v: |
| 28900 | case VE::VGTLZXsrz_v: |
| 28901 | case VE::VGTLZXsrzl: |
| 28902 | case VE::VGTLZXsrzl_v: |
| 28903 | case VE::VGTNCsir: |
| 28904 | case VE::VGTNCsirL: |
| 28905 | case VE::VGTNCsirL_v: |
| 28906 | case VE::VGTNCsir_v: |
| 28907 | case VE::VGTNCsirl: |
| 28908 | case VE::VGTNCsirl_v: |
| 28909 | case VE::VGTNCsiz: |
| 28910 | case VE::VGTNCsizL: |
| 28911 | case VE::VGTNCsizL_v: |
| 28912 | case VE::VGTNCsiz_v: |
| 28913 | case VE::VGTNCsizl: |
| 28914 | case VE::VGTNCsizl_v: |
| 28915 | case VE::VGTNCsrr: |
| 28916 | case VE::VGTNCsrrL: |
| 28917 | case VE::VGTNCsrrL_v: |
| 28918 | case VE::VGTNCsrr_v: |
| 28919 | case VE::VGTNCsrrl: |
| 28920 | case VE::VGTNCsrrl_v: |
| 28921 | case VE::VGTNCsrz: |
| 28922 | case VE::VGTNCsrzL: |
| 28923 | case VE::VGTNCsrzL_v: |
| 28924 | case VE::VGTNCsrz_v: |
| 28925 | case VE::VGTNCsrzl: |
| 28926 | case VE::VGTNCsrzl_v: |
| 28927 | case VE::VGTUNCsir: |
| 28928 | case VE::VGTUNCsirL: |
| 28929 | case VE::VGTUNCsirL_v: |
| 28930 | case VE::VGTUNCsir_v: |
| 28931 | case VE::VGTUNCsirl: |
| 28932 | case VE::VGTUNCsirl_v: |
| 28933 | case VE::VGTUNCsiz: |
| 28934 | case VE::VGTUNCsizL: |
| 28935 | case VE::VGTUNCsizL_v: |
| 28936 | case VE::VGTUNCsiz_v: |
| 28937 | case VE::VGTUNCsizl: |
| 28938 | case VE::VGTUNCsizl_v: |
| 28939 | case VE::VGTUNCsrr: |
| 28940 | case VE::VGTUNCsrrL: |
| 28941 | case VE::VGTUNCsrrL_v: |
| 28942 | case VE::VGTUNCsrr_v: |
| 28943 | case VE::VGTUNCsrrl: |
| 28944 | case VE::VGTUNCsrrl_v: |
| 28945 | case VE::VGTUNCsrz: |
| 28946 | case VE::VGTUNCsrzL: |
| 28947 | case VE::VGTUNCsrzL_v: |
| 28948 | case VE::VGTUNCsrz_v: |
| 28949 | case VE::VGTUNCsrzl: |
| 28950 | case VE::VGTUNCsrzl_v: |
| 28951 | case VE::VGTUsir: |
| 28952 | case VE::VGTUsirL: |
| 28953 | case VE::VGTUsirL_v: |
| 28954 | case VE::VGTUsir_v: |
| 28955 | case VE::VGTUsirl: |
| 28956 | case VE::VGTUsirl_v: |
| 28957 | case VE::VGTUsiz: |
| 28958 | case VE::VGTUsizL: |
| 28959 | case VE::VGTUsizL_v: |
| 28960 | case VE::VGTUsiz_v: |
| 28961 | case VE::VGTUsizl: |
| 28962 | case VE::VGTUsizl_v: |
| 28963 | case VE::VGTUsrr: |
| 28964 | case VE::VGTUsrrL: |
| 28965 | case VE::VGTUsrrL_v: |
| 28966 | case VE::VGTUsrr_v: |
| 28967 | case VE::VGTUsrrl: |
| 28968 | case VE::VGTUsrrl_v: |
| 28969 | case VE::VGTUsrz: |
| 28970 | case VE::VGTUsrzL: |
| 28971 | case VE::VGTUsrzL_v: |
| 28972 | case VE::VGTUsrz_v: |
| 28973 | case VE::VGTUsrzl: |
| 28974 | case VE::VGTUsrzl_v: |
| 28975 | case VE::VGTsir: |
| 28976 | case VE::VGTsirL: |
| 28977 | case VE::VGTsirL_v: |
| 28978 | case VE::VGTsir_v: |
| 28979 | case VE::VGTsirl: |
| 28980 | case VE::VGTsirl_v: |
| 28981 | case VE::VGTsiz: |
| 28982 | case VE::VGTsizL: |
| 28983 | case VE::VGTsizL_v: |
| 28984 | case VE::VGTsiz_v: |
| 28985 | case VE::VGTsizl: |
| 28986 | case VE::VGTsizl_v: |
| 28987 | case VE::VGTsrr: |
| 28988 | case VE::VGTsrrL: |
| 28989 | case VE::VGTsrrL_v: |
| 28990 | case VE::VGTsrr_v: |
| 28991 | case VE::VGTsrrl: |
| 28992 | case VE::VGTsrrl_v: |
| 28993 | case VE::VGTsrz: |
| 28994 | case VE::VGTsrzL: |
| 28995 | case VE::VGTsrzL_v: |
| 28996 | case VE::VGTsrz_v: |
| 28997 | case VE::VGTsrzl: |
| 28998 | case VE::VGTsrzl_v: { |
| 28999 | switch (OpNum) { |
| 29000 | case 2: |
| 29001 | // op: sy |
| 29002 | return 40; |
| 29003 | case 3: |
| 29004 | // op: sz |
| 29005 | return 32; |
| 29006 | case 0: |
| 29007 | // op: vx |
| 29008 | return 24; |
| 29009 | case 1: |
| 29010 | // op: sw |
| 29011 | return 0; |
| 29012 | } |
| 29013 | break; |
| 29014 | } |
| 29015 | case VE::VGTLSXNCvir: |
| 29016 | case VE::VGTLSXNCvirL: |
| 29017 | case VE::VGTLSXNCvirL_v: |
| 29018 | case VE::VGTLSXNCvir_v: |
| 29019 | case VE::VGTLSXNCvirl: |
| 29020 | case VE::VGTLSXNCvirl_v: |
| 29021 | case VE::VGTLSXNCviz: |
| 29022 | case VE::VGTLSXNCvizL: |
| 29023 | case VE::VGTLSXNCvizL_v: |
| 29024 | case VE::VGTLSXNCviz_v: |
| 29025 | case VE::VGTLSXNCvizl: |
| 29026 | case VE::VGTLSXNCvizl_v: |
| 29027 | case VE::VGTLSXNCvrr: |
| 29028 | case VE::VGTLSXNCvrrL: |
| 29029 | case VE::VGTLSXNCvrrL_v: |
| 29030 | case VE::VGTLSXNCvrr_v: |
| 29031 | case VE::VGTLSXNCvrrl: |
| 29032 | case VE::VGTLSXNCvrrl_v: |
| 29033 | case VE::VGTLSXNCvrz: |
| 29034 | case VE::VGTLSXNCvrzL: |
| 29035 | case VE::VGTLSXNCvrzL_v: |
| 29036 | case VE::VGTLSXNCvrz_v: |
| 29037 | case VE::VGTLSXNCvrzl: |
| 29038 | case VE::VGTLSXNCvrzl_v: |
| 29039 | case VE::VGTLSXvir: |
| 29040 | case VE::VGTLSXvirL: |
| 29041 | case VE::VGTLSXvirL_v: |
| 29042 | case VE::VGTLSXvir_v: |
| 29043 | case VE::VGTLSXvirl: |
| 29044 | case VE::VGTLSXvirl_v: |
| 29045 | case VE::VGTLSXviz: |
| 29046 | case VE::VGTLSXvizL: |
| 29047 | case VE::VGTLSXvizL_v: |
| 29048 | case VE::VGTLSXviz_v: |
| 29049 | case VE::VGTLSXvizl: |
| 29050 | case VE::VGTLSXvizl_v: |
| 29051 | case VE::VGTLSXvrr: |
| 29052 | case VE::VGTLSXvrrL: |
| 29053 | case VE::VGTLSXvrrL_v: |
| 29054 | case VE::VGTLSXvrr_v: |
| 29055 | case VE::VGTLSXvrrl: |
| 29056 | case VE::VGTLSXvrrl_v: |
| 29057 | case VE::VGTLSXvrz: |
| 29058 | case VE::VGTLSXvrzL: |
| 29059 | case VE::VGTLSXvrzL_v: |
| 29060 | case VE::VGTLSXvrz_v: |
| 29061 | case VE::VGTLSXvrzl: |
| 29062 | case VE::VGTLSXvrzl_v: |
| 29063 | case VE::VGTLZXNCvir: |
| 29064 | case VE::VGTLZXNCvirL: |
| 29065 | case VE::VGTLZXNCvirL_v: |
| 29066 | case VE::VGTLZXNCvir_v: |
| 29067 | case VE::VGTLZXNCvirl: |
| 29068 | case VE::VGTLZXNCvirl_v: |
| 29069 | case VE::VGTLZXNCviz: |
| 29070 | case VE::VGTLZXNCvizL: |
| 29071 | case VE::VGTLZXNCvizL_v: |
| 29072 | case VE::VGTLZXNCviz_v: |
| 29073 | case VE::VGTLZXNCvizl: |
| 29074 | case VE::VGTLZXNCvizl_v: |
| 29075 | case VE::VGTLZXNCvrr: |
| 29076 | case VE::VGTLZXNCvrrL: |
| 29077 | case VE::VGTLZXNCvrrL_v: |
| 29078 | case VE::VGTLZXNCvrr_v: |
| 29079 | case VE::VGTLZXNCvrrl: |
| 29080 | case VE::VGTLZXNCvrrl_v: |
| 29081 | case VE::VGTLZXNCvrz: |
| 29082 | case VE::VGTLZXNCvrzL: |
| 29083 | case VE::VGTLZXNCvrzL_v: |
| 29084 | case VE::VGTLZXNCvrz_v: |
| 29085 | case VE::VGTLZXNCvrzl: |
| 29086 | case VE::VGTLZXNCvrzl_v: |
| 29087 | case VE::VGTLZXvir: |
| 29088 | case VE::VGTLZXvirL: |
| 29089 | case VE::VGTLZXvirL_v: |
| 29090 | case VE::VGTLZXvir_v: |
| 29091 | case VE::VGTLZXvirl: |
| 29092 | case VE::VGTLZXvirl_v: |
| 29093 | case VE::VGTLZXviz: |
| 29094 | case VE::VGTLZXvizL: |
| 29095 | case VE::VGTLZXvizL_v: |
| 29096 | case VE::VGTLZXviz_v: |
| 29097 | case VE::VGTLZXvizl: |
| 29098 | case VE::VGTLZXvizl_v: |
| 29099 | case VE::VGTLZXvrr: |
| 29100 | case VE::VGTLZXvrrL: |
| 29101 | case VE::VGTLZXvrrL_v: |
| 29102 | case VE::VGTLZXvrr_v: |
| 29103 | case VE::VGTLZXvrrl: |
| 29104 | case VE::VGTLZXvrrl_v: |
| 29105 | case VE::VGTLZXvrz: |
| 29106 | case VE::VGTLZXvrzL: |
| 29107 | case VE::VGTLZXvrzL_v: |
| 29108 | case VE::VGTLZXvrz_v: |
| 29109 | case VE::VGTLZXvrzl: |
| 29110 | case VE::VGTLZXvrzl_v: |
| 29111 | case VE::VGTNCvir: |
| 29112 | case VE::VGTNCvirL: |
| 29113 | case VE::VGTNCvirL_v: |
| 29114 | case VE::VGTNCvir_v: |
| 29115 | case VE::VGTNCvirl: |
| 29116 | case VE::VGTNCvirl_v: |
| 29117 | case VE::VGTNCviz: |
| 29118 | case VE::VGTNCvizL: |
| 29119 | case VE::VGTNCvizL_v: |
| 29120 | case VE::VGTNCviz_v: |
| 29121 | case VE::VGTNCvizl: |
| 29122 | case VE::VGTNCvizl_v: |
| 29123 | case VE::VGTNCvrr: |
| 29124 | case VE::VGTNCvrrL: |
| 29125 | case VE::VGTNCvrrL_v: |
| 29126 | case VE::VGTNCvrr_v: |
| 29127 | case VE::VGTNCvrrl: |
| 29128 | case VE::VGTNCvrrl_v: |
| 29129 | case VE::VGTNCvrz: |
| 29130 | case VE::VGTNCvrzL: |
| 29131 | case VE::VGTNCvrzL_v: |
| 29132 | case VE::VGTNCvrz_v: |
| 29133 | case VE::VGTNCvrzl: |
| 29134 | case VE::VGTNCvrzl_v: |
| 29135 | case VE::VGTUNCvir: |
| 29136 | case VE::VGTUNCvirL: |
| 29137 | case VE::VGTUNCvirL_v: |
| 29138 | case VE::VGTUNCvir_v: |
| 29139 | case VE::VGTUNCvirl: |
| 29140 | case VE::VGTUNCvirl_v: |
| 29141 | case VE::VGTUNCviz: |
| 29142 | case VE::VGTUNCvizL: |
| 29143 | case VE::VGTUNCvizL_v: |
| 29144 | case VE::VGTUNCviz_v: |
| 29145 | case VE::VGTUNCvizl: |
| 29146 | case VE::VGTUNCvizl_v: |
| 29147 | case VE::VGTUNCvrr: |
| 29148 | case VE::VGTUNCvrrL: |
| 29149 | case VE::VGTUNCvrrL_v: |
| 29150 | case VE::VGTUNCvrr_v: |
| 29151 | case VE::VGTUNCvrrl: |
| 29152 | case VE::VGTUNCvrrl_v: |
| 29153 | case VE::VGTUNCvrz: |
| 29154 | case VE::VGTUNCvrzL: |
| 29155 | case VE::VGTUNCvrzL_v: |
| 29156 | case VE::VGTUNCvrz_v: |
| 29157 | case VE::VGTUNCvrzl: |
| 29158 | case VE::VGTUNCvrzl_v: |
| 29159 | case VE::VGTUvir: |
| 29160 | case VE::VGTUvirL: |
| 29161 | case VE::VGTUvirL_v: |
| 29162 | case VE::VGTUvir_v: |
| 29163 | case VE::VGTUvirl: |
| 29164 | case VE::VGTUvirl_v: |
| 29165 | case VE::VGTUviz: |
| 29166 | case VE::VGTUvizL: |
| 29167 | case VE::VGTUvizL_v: |
| 29168 | case VE::VGTUviz_v: |
| 29169 | case VE::VGTUvizl: |
| 29170 | case VE::VGTUvizl_v: |
| 29171 | case VE::VGTUvrr: |
| 29172 | case VE::VGTUvrrL: |
| 29173 | case VE::VGTUvrrL_v: |
| 29174 | case VE::VGTUvrr_v: |
| 29175 | case VE::VGTUvrrl: |
| 29176 | case VE::VGTUvrrl_v: |
| 29177 | case VE::VGTUvrz: |
| 29178 | case VE::VGTUvrzL: |
| 29179 | case VE::VGTUvrzL_v: |
| 29180 | case VE::VGTUvrz_v: |
| 29181 | case VE::VGTUvrzl: |
| 29182 | case VE::VGTUvrzl_v: |
| 29183 | case VE::VGTvir: |
| 29184 | case VE::VGTvirL: |
| 29185 | case VE::VGTvirL_v: |
| 29186 | case VE::VGTvir_v: |
| 29187 | case VE::VGTvirl: |
| 29188 | case VE::VGTvirl_v: |
| 29189 | case VE::VGTviz: |
| 29190 | case VE::VGTvizL: |
| 29191 | case VE::VGTvizL_v: |
| 29192 | case VE::VGTviz_v: |
| 29193 | case VE::VGTvizl: |
| 29194 | case VE::VGTvizl_v: |
| 29195 | case VE::VGTvrr: |
| 29196 | case VE::VGTvrrL: |
| 29197 | case VE::VGTvrrL_v: |
| 29198 | case VE::VGTvrr_v: |
| 29199 | case VE::VGTvrrl: |
| 29200 | case VE::VGTvrrl_v: |
| 29201 | case VE::VGTvrz: |
| 29202 | case VE::VGTvrzL: |
| 29203 | case VE::VGTvrzL_v: |
| 29204 | case VE::VGTvrz_v: |
| 29205 | case VE::VGTvrzl: |
| 29206 | case VE::VGTvrzl_v: { |
| 29207 | switch (OpNum) { |
| 29208 | case 2: |
| 29209 | // op: sy |
| 29210 | return 40; |
| 29211 | case 3: |
| 29212 | // op: sz |
| 29213 | return 32; |
| 29214 | case 0: |
| 29215 | // op: vx |
| 29216 | return 24; |
| 29217 | case 1: |
| 29218 | // op: vy |
| 29219 | return 16; |
| 29220 | } |
| 29221 | break; |
| 29222 | } |
| 29223 | case VE::VSFAvim: |
| 29224 | case VE::VSFAvimL: |
| 29225 | case VE::VSFAvimL_v: |
| 29226 | case VE::VSFAvim_v: |
| 29227 | case VE::VSFAviml: |
| 29228 | case VE::VSFAviml_v: |
| 29229 | case VE::VSFAvir: |
| 29230 | case VE::VSFAvirL: |
| 29231 | case VE::VSFAvirL_v: |
| 29232 | case VE::VSFAvir_v: |
| 29233 | case VE::VSFAvirl: |
| 29234 | case VE::VSFAvirl_v: |
| 29235 | case VE::VSFAvrm: |
| 29236 | case VE::VSFAvrmL: |
| 29237 | case VE::VSFAvrmL_v: |
| 29238 | case VE::VSFAvrm_v: |
| 29239 | case VE::VSFAvrml: |
| 29240 | case VE::VSFAvrml_v: |
| 29241 | case VE::VSFAvrr: |
| 29242 | case VE::VSFAvrrL: |
| 29243 | case VE::VSFAvrrL_v: |
| 29244 | case VE::VSFAvrr_v: |
| 29245 | case VE::VSFAvrrl: |
| 29246 | case VE::VSFAvrrl_v: { |
| 29247 | switch (OpNum) { |
| 29248 | case 2: |
| 29249 | // op: sy |
| 29250 | return 40; |
| 29251 | case 3: |
| 29252 | // op: sz |
| 29253 | return 32; |
| 29254 | case 0: |
| 29255 | // op: vx |
| 29256 | return 24; |
| 29257 | case 1: |
| 29258 | // op: vz |
| 29259 | return 8; |
| 29260 | } |
| 29261 | break; |
| 29262 | } |
| 29263 | case VE::VST2DNCOTirvm: |
| 29264 | case VE::VST2DNCOTirvmL: |
| 29265 | case VE::VST2DNCOTirvml: |
| 29266 | case VE::VST2DNCOTizvm: |
| 29267 | case VE::VST2DNCOTizvmL: |
| 29268 | case VE::VST2DNCOTizvml: |
| 29269 | case VE::VST2DNCOTrrvm: |
| 29270 | case VE::VST2DNCOTrrvmL: |
| 29271 | case VE::VST2DNCOTrrvml: |
| 29272 | case VE::VST2DNCOTrzvm: |
| 29273 | case VE::VST2DNCOTrzvmL: |
| 29274 | case VE::VST2DNCOTrzvml: |
| 29275 | case VE::VST2DNCirvm: |
| 29276 | case VE::VST2DNCirvmL: |
| 29277 | case VE::VST2DNCirvml: |
| 29278 | case VE::VST2DNCizvm: |
| 29279 | case VE::VST2DNCizvmL: |
| 29280 | case VE::VST2DNCizvml: |
| 29281 | case VE::VST2DNCrrvm: |
| 29282 | case VE::VST2DNCrrvmL: |
| 29283 | case VE::VST2DNCrrvml: |
| 29284 | case VE::VST2DNCrzvm: |
| 29285 | case VE::VST2DNCrzvmL: |
| 29286 | case VE::VST2DNCrzvml: |
| 29287 | case VE::VST2DOTirvm: |
| 29288 | case VE::VST2DOTirvmL: |
| 29289 | case VE::VST2DOTirvml: |
| 29290 | case VE::VST2DOTizvm: |
| 29291 | case VE::VST2DOTizvmL: |
| 29292 | case VE::VST2DOTizvml: |
| 29293 | case VE::VST2DOTrrvm: |
| 29294 | case VE::VST2DOTrrvmL: |
| 29295 | case VE::VST2DOTrrvml: |
| 29296 | case VE::VST2DOTrzvm: |
| 29297 | case VE::VST2DOTrzvmL: |
| 29298 | case VE::VST2DOTrzvml: |
| 29299 | case VE::VST2Dirvm: |
| 29300 | case VE::VST2DirvmL: |
| 29301 | case VE::VST2Dirvml: |
| 29302 | case VE::VST2Dizvm: |
| 29303 | case VE::VST2DizvmL: |
| 29304 | case VE::VST2Dizvml: |
| 29305 | case VE::VST2Drrvm: |
| 29306 | case VE::VST2DrrvmL: |
| 29307 | case VE::VST2Drrvml: |
| 29308 | case VE::VST2Drzvm: |
| 29309 | case VE::VST2DrzvmL: |
| 29310 | case VE::VST2Drzvml: |
| 29311 | case VE::VSTL2DNCOTirvm: |
| 29312 | case VE::VSTL2DNCOTirvmL: |
| 29313 | case VE::VSTL2DNCOTirvml: |
| 29314 | case VE::VSTL2DNCOTizvm: |
| 29315 | case VE::VSTL2DNCOTizvmL: |
| 29316 | case VE::VSTL2DNCOTizvml: |
| 29317 | case VE::VSTL2DNCOTrrvm: |
| 29318 | case VE::VSTL2DNCOTrrvmL: |
| 29319 | case VE::VSTL2DNCOTrrvml: |
| 29320 | case VE::VSTL2DNCOTrzvm: |
| 29321 | case VE::VSTL2DNCOTrzvmL: |
| 29322 | case VE::VSTL2DNCOTrzvml: |
| 29323 | case VE::VSTL2DNCirvm: |
| 29324 | case VE::VSTL2DNCirvmL: |
| 29325 | case VE::VSTL2DNCirvml: |
| 29326 | case VE::VSTL2DNCizvm: |
| 29327 | case VE::VSTL2DNCizvmL: |
| 29328 | case VE::VSTL2DNCizvml: |
| 29329 | case VE::VSTL2DNCrrvm: |
| 29330 | case VE::VSTL2DNCrrvmL: |
| 29331 | case VE::VSTL2DNCrrvml: |
| 29332 | case VE::VSTL2DNCrzvm: |
| 29333 | case VE::VSTL2DNCrzvmL: |
| 29334 | case VE::VSTL2DNCrzvml: |
| 29335 | case VE::VSTL2DOTirvm: |
| 29336 | case VE::VSTL2DOTirvmL: |
| 29337 | case VE::VSTL2DOTirvml: |
| 29338 | case VE::VSTL2DOTizvm: |
| 29339 | case VE::VSTL2DOTizvmL: |
| 29340 | case VE::VSTL2DOTizvml: |
| 29341 | case VE::VSTL2DOTrrvm: |
| 29342 | case VE::VSTL2DOTrrvmL: |
| 29343 | case VE::VSTL2DOTrrvml: |
| 29344 | case VE::VSTL2DOTrzvm: |
| 29345 | case VE::VSTL2DOTrzvmL: |
| 29346 | case VE::VSTL2DOTrzvml: |
| 29347 | case VE::VSTL2Dirvm: |
| 29348 | case VE::VSTL2DirvmL: |
| 29349 | case VE::VSTL2Dirvml: |
| 29350 | case VE::VSTL2Dizvm: |
| 29351 | case VE::VSTL2DizvmL: |
| 29352 | case VE::VSTL2Dizvml: |
| 29353 | case VE::VSTL2Drrvm: |
| 29354 | case VE::VSTL2DrrvmL: |
| 29355 | case VE::VSTL2Drrvml: |
| 29356 | case VE::VSTL2Drzvm: |
| 29357 | case VE::VSTL2DrzvmL: |
| 29358 | case VE::VSTL2Drzvml: |
| 29359 | case VE::VSTLNCOTirvm: |
| 29360 | case VE::VSTLNCOTirvmL: |
| 29361 | case VE::VSTLNCOTirvml: |
| 29362 | case VE::VSTLNCOTizvm: |
| 29363 | case VE::VSTLNCOTizvmL: |
| 29364 | case VE::VSTLNCOTizvml: |
| 29365 | case VE::VSTLNCOTrrvm: |
| 29366 | case VE::VSTLNCOTrrvmL: |
| 29367 | case VE::VSTLNCOTrrvml: |
| 29368 | case VE::VSTLNCOTrzvm: |
| 29369 | case VE::VSTLNCOTrzvmL: |
| 29370 | case VE::VSTLNCOTrzvml: |
| 29371 | case VE::VSTLNCirvm: |
| 29372 | case VE::VSTLNCirvmL: |
| 29373 | case VE::VSTLNCirvml: |
| 29374 | case VE::VSTLNCizvm: |
| 29375 | case VE::VSTLNCizvmL: |
| 29376 | case VE::VSTLNCizvml: |
| 29377 | case VE::VSTLNCrrvm: |
| 29378 | case VE::VSTLNCrrvmL: |
| 29379 | case VE::VSTLNCrrvml: |
| 29380 | case VE::VSTLNCrzvm: |
| 29381 | case VE::VSTLNCrzvmL: |
| 29382 | case VE::VSTLNCrzvml: |
| 29383 | case VE::VSTLOTirvm: |
| 29384 | case VE::VSTLOTirvmL: |
| 29385 | case VE::VSTLOTirvml: |
| 29386 | case VE::VSTLOTizvm: |
| 29387 | case VE::VSTLOTizvmL: |
| 29388 | case VE::VSTLOTizvml: |
| 29389 | case VE::VSTLOTrrvm: |
| 29390 | case VE::VSTLOTrrvmL: |
| 29391 | case VE::VSTLOTrrvml: |
| 29392 | case VE::VSTLOTrzvm: |
| 29393 | case VE::VSTLOTrzvmL: |
| 29394 | case VE::VSTLOTrzvml: |
| 29395 | case VE::VSTLirvm: |
| 29396 | case VE::VSTLirvmL: |
| 29397 | case VE::VSTLirvml: |
| 29398 | case VE::VSTLizvm: |
| 29399 | case VE::VSTLizvmL: |
| 29400 | case VE::VSTLizvml: |
| 29401 | case VE::VSTLrrvm: |
| 29402 | case VE::VSTLrrvmL: |
| 29403 | case VE::VSTLrrvml: |
| 29404 | case VE::VSTLrzvm: |
| 29405 | case VE::VSTLrzvmL: |
| 29406 | case VE::VSTLrzvml: |
| 29407 | case VE::VSTNCOTirvm: |
| 29408 | case VE::VSTNCOTirvmL: |
| 29409 | case VE::VSTNCOTirvml: |
| 29410 | case VE::VSTNCOTizvm: |
| 29411 | case VE::VSTNCOTizvmL: |
| 29412 | case VE::VSTNCOTizvml: |
| 29413 | case VE::VSTNCOTrrvm: |
| 29414 | case VE::VSTNCOTrrvmL: |
| 29415 | case VE::VSTNCOTrrvml: |
| 29416 | case VE::VSTNCOTrzvm: |
| 29417 | case VE::VSTNCOTrzvmL: |
| 29418 | case VE::VSTNCOTrzvml: |
| 29419 | case VE::VSTNCirvm: |
| 29420 | case VE::VSTNCirvmL: |
| 29421 | case VE::VSTNCirvml: |
| 29422 | case VE::VSTNCizvm: |
| 29423 | case VE::VSTNCizvmL: |
| 29424 | case VE::VSTNCizvml: |
| 29425 | case VE::VSTNCrrvm: |
| 29426 | case VE::VSTNCrrvmL: |
| 29427 | case VE::VSTNCrrvml: |
| 29428 | case VE::VSTNCrzvm: |
| 29429 | case VE::VSTNCrzvmL: |
| 29430 | case VE::VSTNCrzvml: |
| 29431 | case VE::VSTOTirvm: |
| 29432 | case VE::VSTOTirvmL: |
| 29433 | case VE::VSTOTirvml: |
| 29434 | case VE::VSTOTizvm: |
| 29435 | case VE::VSTOTizvmL: |
| 29436 | case VE::VSTOTizvml: |
| 29437 | case VE::VSTOTrrvm: |
| 29438 | case VE::VSTOTrrvmL: |
| 29439 | case VE::VSTOTrrvml: |
| 29440 | case VE::VSTOTrzvm: |
| 29441 | case VE::VSTOTrzvmL: |
| 29442 | case VE::VSTOTrzvml: |
| 29443 | case VE::VSTU2DNCOTirvm: |
| 29444 | case VE::VSTU2DNCOTirvmL: |
| 29445 | case VE::VSTU2DNCOTirvml: |
| 29446 | case VE::VSTU2DNCOTizvm: |
| 29447 | case VE::VSTU2DNCOTizvmL: |
| 29448 | case VE::VSTU2DNCOTizvml: |
| 29449 | case VE::VSTU2DNCOTrrvm: |
| 29450 | case VE::VSTU2DNCOTrrvmL: |
| 29451 | case VE::VSTU2DNCOTrrvml: |
| 29452 | case VE::VSTU2DNCOTrzvm: |
| 29453 | case VE::VSTU2DNCOTrzvmL: |
| 29454 | case VE::VSTU2DNCOTrzvml: |
| 29455 | case VE::VSTU2DNCirvm: |
| 29456 | case VE::VSTU2DNCirvmL: |
| 29457 | case VE::VSTU2DNCirvml: |
| 29458 | case VE::VSTU2DNCizvm: |
| 29459 | case VE::VSTU2DNCizvmL: |
| 29460 | case VE::VSTU2DNCizvml: |
| 29461 | case VE::VSTU2DNCrrvm: |
| 29462 | case VE::VSTU2DNCrrvmL: |
| 29463 | case VE::VSTU2DNCrrvml: |
| 29464 | case VE::VSTU2DNCrzvm: |
| 29465 | case VE::VSTU2DNCrzvmL: |
| 29466 | case VE::VSTU2DNCrzvml: |
| 29467 | case VE::VSTU2DOTirvm: |
| 29468 | case VE::VSTU2DOTirvmL: |
| 29469 | case VE::VSTU2DOTirvml: |
| 29470 | case VE::VSTU2DOTizvm: |
| 29471 | case VE::VSTU2DOTizvmL: |
| 29472 | case VE::VSTU2DOTizvml: |
| 29473 | case VE::VSTU2DOTrrvm: |
| 29474 | case VE::VSTU2DOTrrvmL: |
| 29475 | case VE::VSTU2DOTrrvml: |
| 29476 | case VE::VSTU2DOTrzvm: |
| 29477 | case VE::VSTU2DOTrzvmL: |
| 29478 | case VE::VSTU2DOTrzvml: |
| 29479 | case VE::VSTU2Dirvm: |
| 29480 | case VE::VSTU2DirvmL: |
| 29481 | case VE::VSTU2Dirvml: |
| 29482 | case VE::VSTU2Dizvm: |
| 29483 | case VE::VSTU2DizvmL: |
| 29484 | case VE::VSTU2Dizvml: |
| 29485 | case VE::VSTU2Drrvm: |
| 29486 | case VE::VSTU2DrrvmL: |
| 29487 | case VE::VSTU2Drrvml: |
| 29488 | case VE::VSTU2Drzvm: |
| 29489 | case VE::VSTU2DrzvmL: |
| 29490 | case VE::VSTU2Drzvml: |
| 29491 | case VE::VSTUNCOTirvm: |
| 29492 | case VE::VSTUNCOTirvmL: |
| 29493 | case VE::VSTUNCOTirvml: |
| 29494 | case VE::VSTUNCOTizvm: |
| 29495 | case VE::VSTUNCOTizvmL: |
| 29496 | case VE::VSTUNCOTizvml: |
| 29497 | case VE::VSTUNCOTrrvm: |
| 29498 | case VE::VSTUNCOTrrvmL: |
| 29499 | case VE::VSTUNCOTrrvml: |
| 29500 | case VE::VSTUNCOTrzvm: |
| 29501 | case VE::VSTUNCOTrzvmL: |
| 29502 | case VE::VSTUNCOTrzvml: |
| 29503 | case VE::VSTUNCirvm: |
| 29504 | case VE::VSTUNCirvmL: |
| 29505 | case VE::VSTUNCirvml: |
| 29506 | case VE::VSTUNCizvm: |
| 29507 | case VE::VSTUNCizvmL: |
| 29508 | case VE::VSTUNCizvml: |
| 29509 | case VE::VSTUNCrrvm: |
| 29510 | case VE::VSTUNCrrvmL: |
| 29511 | case VE::VSTUNCrrvml: |
| 29512 | case VE::VSTUNCrzvm: |
| 29513 | case VE::VSTUNCrzvmL: |
| 29514 | case VE::VSTUNCrzvml: |
| 29515 | case VE::VSTUOTirvm: |
| 29516 | case VE::VSTUOTirvmL: |
| 29517 | case VE::VSTUOTirvml: |
| 29518 | case VE::VSTUOTizvm: |
| 29519 | case VE::VSTUOTizvmL: |
| 29520 | case VE::VSTUOTizvml: |
| 29521 | case VE::VSTUOTrrvm: |
| 29522 | case VE::VSTUOTrrvmL: |
| 29523 | case VE::VSTUOTrrvml: |
| 29524 | case VE::VSTUOTrzvm: |
| 29525 | case VE::VSTUOTrzvmL: |
| 29526 | case VE::VSTUOTrzvml: |
| 29527 | case VE::VSTUirvm: |
| 29528 | case VE::VSTUirvmL: |
| 29529 | case VE::VSTUirvml: |
| 29530 | case VE::VSTUizvm: |
| 29531 | case VE::VSTUizvmL: |
| 29532 | case VE::VSTUizvml: |
| 29533 | case VE::VSTUrrvm: |
| 29534 | case VE::VSTUrrvmL: |
| 29535 | case VE::VSTUrrvml: |
| 29536 | case VE::VSTUrzvm: |
| 29537 | case VE::VSTUrzvmL: |
| 29538 | case VE::VSTUrzvml: |
| 29539 | case VE::VSTirvm: |
| 29540 | case VE::VSTirvmL: |
| 29541 | case VE::VSTirvml: |
| 29542 | case VE::VSTizvm: |
| 29543 | case VE::VSTizvmL: |
| 29544 | case VE::VSTizvml: |
| 29545 | case VE::VSTrrvm: |
| 29546 | case VE::VSTrrvmL: |
| 29547 | case VE::VSTrrvml: |
| 29548 | case VE::VSTrzvm: |
| 29549 | case VE::VSTrzvmL: |
| 29550 | case VE::VSTrzvml: { |
| 29551 | switch (OpNum) { |
| 29552 | case 3: |
| 29553 | // op: m |
| 29554 | return 48; |
| 29555 | case 0: |
| 29556 | // op: sy |
| 29557 | return 40; |
| 29558 | case 1: |
| 29559 | // op: sz |
| 29560 | return 32; |
| 29561 | case 2: |
| 29562 | // op: vx |
| 29563 | return 24; |
| 29564 | } |
| 29565 | break; |
| 29566 | } |
| 29567 | case VE::PVADDSLOvvm: |
| 29568 | case VE::PVADDSLOvvmL: |
| 29569 | case VE::PVADDSLOvvmL_v: |
| 29570 | case VE::PVADDSLOvvm_v: |
| 29571 | case VE::PVADDSLOvvml: |
| 29572 | case VE::PVADDSLOvvml_v: |
| 29573 | case VE::PVADDSUPvvm: |
| 29574 | case VE::PVADDSUPvvmL: |
| 29575 | case VE::PVADDSUPvvmL_v: |
| 29576 | case VE::PVADDSUPvvm_v: |
| 29577 | case VE::PVADDSUPvvml: |
| 29578 | case VE::PVADDSUPvvml_v: |
| 29579 | case VE::PVADDSvvm: |
| 29580 | case VE::PVADDSvvmL: |
| 29581 | case VE::PVADDSvvmL_v: |
| 29582 | case VE::PVADDSvvm_v: |
| 29583 | case VE::PVADDSvvml: |
| 29584 | case VE::PVADDSvvml_v: |
| 29585 | case VE::PVADDULOvvm: |
| 29586 | case VE::PVADDULOvvmL: |
| 29587 | case VE::PVADDULOvvmL_v: |
| 29588 | case VE::PVADDULOvvm_v: |
| 29589 | case VE::PVADDULOvvml: |
| 29590 | case VE::PVADDULOvvml_v: |
| 29591 | case VE::PVADDUUPvvm: |
| 29592 | case VE::PVADDUUPvvmL: |
| 29593 | case VE::PVADDUUPvvmL_v: |
| 29594 | case VE::PVADDUUPvvm_v: |
| 29595 | case VE::PVADDUUPvvml: |
| 29596 | case VE::PVADDUUPvvml_v: |
| 29597 | case VE::PVADDUvvm: |
| 29598 | case VE::PVADDUvvmL: |
| 29599 | case VE::PVADDUvvmL_v: |
| 29600 | case VE::PVADDUvvm_v: |
| 29601 | case VE::PVADDUvvml: |
| 29602 | case VE::PVADDUvvml_v: |
| 29603 | case VE::PVANDLOvvm: |
| 29604 | case VE::PVANDLOvvmL: |
| 29605 | case VE::PVANDLOvvmL_v: |
| 29606 | case VE::PVANDLOvvm_v: |
| 29607 | case VE::PVANDLOvvml: |
| 29608 | case VE::PVANDLOvvml_v: |
| 29609 | case VE::PVANDUPvvm: |
| 29610 | case VE::PVANDUPvvmL: |
| 29611 | case VE::PVANDUPvvmL_v: |
| 29612 | case VE::PVANDUPvvm_v: |
| 29613 | case VE::PVANDUPvvml: |
| 29614 | case VE::PVANDUPvvml_v: |
| 29615 | case VE::PVANDvvm: |
| 29616 | case VE::PVANDvvmL: |
| 29617 | case VE::PVANDvvmL_v: |
| 29618 | case VE::PVANDvvm_v: |
| 29619 | case VE::PVANDvvml: |
| 29620 | case VE::PVANDvvml_v: |
| 29621 | case VE::PVCMPSLOvvm: |
| 29622 | case VE::PVCMPSLOvvmL: |
| 29623 | case VE::PVCMPSLOvvmL_v: |
| 29624 | case VE::PVCMPSLOvvm_v: |
| 29625 | case VE::PVCMPSLOvvml: |
| 29626 | case VE::PVCMPSLOvvml_v: |
| 29627 | case VE::PVCMPSUPvvm: |
| 29628 | case VE::PVCMPSUPvvmL: |
| 29629 | case VE::PVCMPSUPvvmL_v: |
| 29630 | case VE::PVCMPSUPvvm_v: |
| 29631 | case VE::PVCMPSUPvvml: |
| 29632 | case VE::PVCMPSUPvvml_v: |
| 29633 | case VE::PVCMPSvvm: |
| 29634 | case VE::PVCMPSvvmL: |
| 29635 | case VE::PVCMPSvvmL_v: |
| 29636 | case VE::PVCMPSvvm_v: |
| 29637 | case VE::PVCMPSvvml: |
| 29638 | case VE::PVCMPSvvml_v: |
| 29639 | case VE::PVCMPULOvvm: |
| 29640 | case VE::PVCMPULOvvmL: |
| 29641 | case VE::PVCMPULOvvmL_v: |
| 29642 | case VE::PVCMPULOvvm_v: |
| 29643 | case VE::PVCMPULOvvml: |
| 29644 | case VE::PVCMPULOvvml_v: |
| 29645 | case VE::PVCMPUUPvvm: |
| 29646 | case VE::PVCMPUUPvvmL: |
| 29647 | case VE::PVCMPUUPvvmL_v: |
| 29648 | case VE::PVCMPUUPvvm_v: |
| 29649 | case VE::PVCMPUUPvvml: |
| 29650 | case VE::PVCMPUUPvvml_v: |
| 29651 | case VE::PVCMPUvvm: |
| 29652 | case VE::PVCMPUvvmL: |
| 29653 | case VE::PVCMPUvvmL_v: |
| 29654 | case VE::PVCMPUvvm_v: |
| 29655 | case VE::PVCMPUvvml: |
| 29656 | case VE::PVCMPUvvml_v: |
| 29657 | case VE::PVEQVLOvvm: |
| 29658 | case VE::PVEQVLOvvmL: |
| 29659 | case VE::PVEQVLOvvmL_v: |
| 29660 | case VE::PVEQVLOvvm_v: |
| 29661 | case VE::PVEQVLOvvml: |
| 29662 | case VE::PVEQVLOvvml_v: |
| 29663 | case VE::PVEQVUPvvm: |
| 29664 | case VE::PVEQVUPvvmL: |
| 29665 | case VE::PVEQVUPvvmL_v: |
| 29666 | case VE::PVEQVUPvvm_v: |
| 29667 | case VE::PVEQVUPvvml: |
| 29668 | case VE::PVEQVUPvvml_v: |
| 29669 | case VE::PVEQVvvm: |
| 29670 | case VE::PVEQVvvmL: |
| 29671 | case VE::PVEQVvvmL_v: |
| 29672 | case VE::PVEQVvvm_v: |
| 29673 | case VE::PVEQVvvml: |
| 29674 | case VE::PVEQVvvml_v: |
| 29675 | case VE::PVFADDLOvvm: |
| 29676 | case VE::PVFADDLOvvmL: |
| 29677 | case VE::PVFADDLOvvmL_v: |
| 29678 | case VE::PVFADDLOvvm_v: |
| 29679 | case VE::PVFADDLOvvml: |
| 29680 | case VE::PVFADDLOvvml_v: |
| 29681 | case VE::PVFADDUPvvm: |
| 29682 | case VE::PVFADDUPvvmL: |
| 29683 | case VE::PVFADDUPvvmL_v: |
| 29684 | case VE::PVFADDUPvvm_v: |
| 29685 | case VE::PVFADDUPvvml: |
| 29686 | case VE::PVFADDUPvvml_v: |
| 29687 | case VE::PVFADDvvm: |
| 29688 | case VE::PVFADDvvmL: |
| 29689 | case VE::PVFADDvvmL_v: |
| 29690 | case VE::PVFADDvvm_v: |
| 29691 | case VE::PVFADDvvml: |
| 29692 | case VE::PVFADDvvml_v: |
| 29693 | case VE::PVFCMPLOvvm: |
| 29694 | case VE::PVFCMPLOvvmL: |
| 29695 | case VE::PVFCMPLOvvmL_v: |
| 29696 | case VE::PVFCMPLOvvm_v: |
| 29697 | case VE::PVFCMPLOvvml: |
| 29698 | case VE::PVFCMPLOvvml_v: |
| 29699 | case VE::PVFCMPUPvvm: |
| 29700 | case VE::PVFCMPUPvvmL: |
| 29701 | case VE::PVFCMPUPvvmL_v: |
| 29702 | case VE::PVFCMPUPvvm_v: |
| 29703 | case VE::PVFCMPUPvvml: |
| 29704 | case VE::PVFCMPUPvvml_v: |
| 29705 | case VE::PVFCMPvvm: |
| 29706 | case VE::PVFCMPvvmL: |
| 29707 | case VE::PVFCMPvvmL_v: |
| 29708 | case VE::PVFCMPvvm_v: |
| 29709 | case VE::PVFCMPvvml: |
| 29710 | case VE::PVFCMPvvml_v: |
| 29711 | case VE::PVFMAXLOvvm: |
| 29712 | case VE::PVFMAXLOvvmL: |
| 29713 | case VE::PVFMAXLOvvmL_v: |
| 29714 | case VE::PVFMAXLOvvm_v: |
| 29715 | case VE::PVFMAXLOvvml: |
| 29716 | case VE::PVFMAXLOvvml_v: |
| 29717 | case VE::PVFMAXUPvvm: |
| 29718 | case VE::PVFMAXUPvvmL: |
| 29719 | case VE::PVFMAXUPvvmL_v: |
| 29720 | case VE::PVFMAXUPvvm_v: |
| 29721 | case VE::PVFMAXUPvvml: |
| 29722 | case VE::PVFMAXUPvvml_v: |
| 29723 | case VE::PVFMAXvvm: |
| 29724 | case VE::PVFMAXvvmL: |
| 29725 | case VE::PVFMAXvvmL_v: |
| 29726 | case VE::PVFMAXvvm_v: |
| 29727 | case VE::PVFMAXvvml: |
| 29728 | case VE::PVFMAXvvml_v: |
| 29729 | case VE::PVFMINLOvvm: |
| 29730 | case VE::PVFMINLOvvmL: |
| 29731 | case VE::PVFMINLOvvmL_v: |
| 29732 | case VE::PVFMINLOvvm_v: |
| 29733 | case VE::PVFMINLOvvml: |
| 29734 | case VE::PVFMINLOvvml_v: |
| 29735 | case VE::PVFMINUPvvm: |
| 29736 | case VE::PVFMINUPvvmL: |
| 29737 | case VE::PVFMINUPvvmL_v: |
| 29738 | case VE::PVFMINUPvvm_v: |
| 29739 | case VE::PVFMINUPvvml: |
| 29740 | case VE::PVFMINUPvvml_v: |
| 29741 | case VE::PVFMINvvm: |
| 29742 | case VE::PVFMINvvmL: |
| 29743 | case VE::PVFMINvvmL_v: |
| 29744 | case VE::PVFMINvvm_v: |
| 29745 | case VE::PVFMINvvml: |
| 29746 | case VE::PVFMINvvml_v: |
| 29747 | case VE::PVFMKSLOvm: |
| 29748 | case VE::PVFMKSLOvmL: |
| 29749 | case VE::PVFMKSLOvml: |
| 29750 | case VE::PVFMKSUPvm: |
| 29751 | case VE::PVFMKSUPvmL: |
| 29752 | case VE::PVFMKSUPvml: |
| 29753 | case VE::PVFMKWLOvm: |
| 29754 | case VE::PVFMKWLOvmL: |
| 29755 | case VE::PVFMKWLOvml: |
| 29756 | case VE::PVFMKWUPvm: |
| 29757 | case VE::PVFMKWUPvmL: |
| 29758 | case VE::PVFMKWUPvml: |
| 29759 | case VE::PVFMULLOvvm: |
| 29760 | case VE::PVFMULLOvvmL: |
| 29761 | case VE::PVFMULLOvvmL_v: |
| 29762 | case VE::PVFMULLOvvm_v: |
| 29763 | case VE::PVFMULLOvvml: |
| 29764 | case VE::PVFMULLOvvml_v: |
| 29765 | case VE::PVFMULUPvvm: |
| 29766 | case VE::PVFMULUPvvmL: |
| 29767 | case VE::PVFMULUPvvmL_v: |
| 29768 | case VE::PVFMULUPvvm_v: |
| 29769 | case VE::PVFMULUPvvml: |
| 29770 | case VE::PVFMULUPvvml_v: |
| 29771 | case VE::PVFMULvvm: |
| 29772 | case VE::PVFMULvvmL: |
| 29773 | case VE::PVFMULvvmL_v: |
| 29774 | case VE::PVFMULvvm_v: |
| 29775 | case VE::PVFMULvvml: |
| 29776 | case VE::PVFMULvvml_v: |
| 29777 | case VE::PVFSUBLOvvm: |
| 29778 | case VE::PVFSUBLOvvmL: |
| 29779 | case VE::PVFSUBLOvvmL_v: |
| 29780 | case VE::PVFSUBLOvvm_v: |
| 29781 | case VE::PVFSUBLOvvml: |
| 29782 | case VE::PVFSUBLOvvml_v: |
| 29783 | case VE::PVFSUBUPvvm: |
| 29784 | case VE::PVFSUBUPvvmL: |
| 29785 | case VE::PVFSUBUPvvmL_v: |
| 29786 | case VE::PVFSUBUPvvm_v: |
| 29787 | case VE::PVFSUBUPvvml: |
| 29788 | case VE::PVFSUBUPvvml_v: |
| 29789 | case VE::PVFSUBvvm: |
| 29790 | case VE::PVFSUBvvmL: |
| 29791 | case VE::PVFSUBvvmL_v: |
| 29792 | case VE::PVFSUBvvm_v: |
| 29793 | case VE::PVFSUBvvml: |
| 29794 | case VE::PVFSUBvvml_v: |
| 29795 | case VE::PVMAXSLOvvm: |
| 29796 | case VE::PVMAXSLOvvmL: |
| 29797 | case VE::PVMAXSLOvvmL_v: |
| 29798 | case VE::PVMAXSLOvvm_v: |
| 29799 | case VE::PVMAXSLOvvml: |
| 29800 | case VE::PVMAXSLOvvml_v: |
| 29801 | case VE::PVMAXSUPvvm: |
| 29802 | case VE::PVMAXSUPvvmL: |
| 29803 | case VE::PVMAXSUPvvmL_v: |
| 29804 | case VE::PVMAXSUPvvm_v: |
| 29805 | case VE::PVMAXSUPvvml: |
| 29806 | case VE::PVMAXSUPvvml_v: |
| 29807 | case VE::PVMAXSvvm: |
| 29808 | case VE::PVMAXSvvmL: |
| 29809 | case VE::PVMAXSvvmL_v: |
| 29810 | case VE::PVMAXSvvm_v: |
| 29811 | case VE::PVMAXSvvml: |
| 29812 | case VE::PVMAXSvvml_v: |
| 29813 | case VE::PVMINSLOvvm: |
| 29814 | case VE::PVMINSLOvvmL: |
| 29815 | case VE::PVMINSLOvvmL_v: |
| 29816 | case VE::PVMINSLOvvm_v: |
| 29817 | case VE::PVMINSLOvvml: |
| 29818 | case VE::PVMINSLOvvml_v: |
| 29819 | case VE::PVMINSUPvvm: |
| 29820 | case VE::PVMINSUPvvmL: |
| 29821 | case VE::PVMINSUPvvmL_v: |
| 29822 | case VE::PVMINSUPvvm_v: |
| 29823 | case VE::PVMINSUPvvml: |
| 29824 | case VE::PVMINSUPvvml_v: |
| 29825 | case VE::PVMINSvvm: |
| 29826 | case VE::PVMINSvvmL: |
| 29827 | case VE::PVMINSvvmL_v: |
| 29828 | case VE::PVMINSvvm_v: |
| 29829 | case VE::PVMINSvvml: |
| 29830 | case VE::PVMINSvvml_v: |
| 29831 | case VE::PVORLOvvm: |
| 29832 | case VE::PVORLOvvmL: |
| 29833 | case VE::PVORLOvvmL_v: |
| 29834 | case VE::PVORLOvvm_v: |
| 29835 | case VE::PVORLOvvml: |
| 29836 | case VE::PVORLOvvml_v: |
| 29837 | case VE::PVORUPvvm: |
| 29838 | case VE::PVORUPvvmL: |
| 29839 | case VE::PVORUPvvmL_v: |
| 29840 | case VE::PVORUPvvm_v: |
| 29841 | case VE::PVORUPvvml: |
| 29842 | case VE::PVORUPvvml_v: |
| 29843 | case VE::PVORvvm: |
| 29844 | case VE::PVORvvmL: |
| 29845 | case VE::PVORvvmL_v: |
| 29846 | case VE::PVORvvm_v: |
| 29847 | case VE::PVORvvml: |
| 29848 | case VE::PVORvvml_v: |
| 29849 | case VE::PVSUBSLOvvm: |
| 29850 | case VE::PVSUBSLOvvmL: |
| 29851 | case VE::PVSUBSLOvvmL_v: |
| 29852 | case VE::PVSUBSLOvvm_v: |
| 29853 | case VE::PVSUBSLOvvml: |
| 29854 | case VE::PVSUBSLOvvml_v: |
| 29855 | case VE::PVSUBSUPvvm: |
| 29856 | case VE::PVSUBSUPvvmL: |
| 29857 | case VE::PVSUBSUPvvmL_v: |
| 29858 | case VE::PVSUBSUPvvm_v: |
| 29859 | case VE::PVSUBSUPvvml: |
| 29860 | case VE::PVSUBSUPvvml_v: |
| 29861 | case VE::PVSUBSvvm: |
| 29862 | case VE::PVSUBSvvmL: |
| 29863 | case VE::PVSUBSvvmL_v: |
| 29864 | case VE::PVSUBSvvm_v: |
| 29865 | case VE::PVSUBSvvml: |
| 29866 | case VE::PVSUBSvvml_v: |
| 29867 | case VE::PVSUBULOvvm: |
| 29868 | case VE::PVSUBULOvvmL: |
| 29869 | case VE::PVSUBULOvvmL_v: |
| 29870 | case VE::PVSUBULOvvm_v: |
| 29871 | case VE::PVSUBULOvvml: |
| 29872 | case VE::PVSUBULOvvml_v: |
| 29873 | case VE::PVSUBUUPvvm: |
| 29874 | case VE::PVSUBUUPvvmL: |
| 29875 | case VE::PVSUBUUPvvmL_v: |
| 29876 | case VE::PVSUBUUPvvm_v: |
| 29877 | case VE::PVSUBUUPvvml: |
| 29878 | case VE::PVSUBUUPvvml_v: |
| 29879 | case VE::PVSUBUvvm: |
| 29880 | case VE::PVSUBUvvmL: |
| 29881 | case VE::PVSUBUvvmL_v: |
| 29882 | case VE::PVSUBUvvm_v: |
| 29883 | case VE::PVSUBUvvml: |
| 29884 | case VE::PVSUBUvvml_v: |
| 29885 | case VE::PVXORLOvvm: |
| 29886 | case VE::PVXORLOvvmL: |
| 29887 | case VE::PVXORLOvvmL_v: |
| 29888 | case VE::PVXORLOvvm_v: |
| 29889 | case VE::PVXORLOvvml: |
| 29890 | case VE::PVXORLOvvml_v: |
| 29891 | case VE::PVXORUPvvm: |
| 29892 | case VE::PVXORUPvvmL: |
| 29893 | case VE::PVXORUPvvmL_v: |
| 29894 | case VE::PVXORUPvvm_v: |
| 29895 | case VE::PVXORUPvvml: |
| 29896 | case VE::PVXORUPvvml_v: |
| 29897 | case VE::PVXORvvm: |
| 29898 | case VE::PVXORvvmL: |
| 29899 | case VE::PVXORvvmL_v: |
| 29900 | case VE::PVXORvvm_v: |
| 29901 | case VE::PVXORvvml: |
| 29902 | case VE::PVXORvvml_v: |
| 29903 | case VE::VADDSLvvm: |
| 29904 | case VE::VADDSLvvmL: |
| 29905 | case VE::VADDSLvvmL_v: |
| 29906 | case VE::VADDSLvvm_v: |
| 29907 | case VE::VADDSLvvml: |
| 29908 | case VE::VADDSLvvml_v: |
| 29909 | case VE::VADDSWSXvvm: |
| 29910 | case VE::VADDSWSXvvmL: |
| 29911 | case VE::VADDSWSXvvmL_v: |
| 29912 | case VE::VADDSWSXvvm_v: |
| 29913 | case VE::VADDSWSXvvml: |
| 29914 | case VE::VADDSWSXvvml_v: |
| 29915 | case VE::VADDSWZXvvm: |
| 29916 | case VE::VADDSWZXvvmL: |
| 29917 | case VE::VADDSWZXvvmL_v: |
| 29918 | case VE::VADDSWZXvvm_v: |
| 29919 | case VE::VADDSWZXvvml: |
| 29920 | case VE::VADDSWZXvvml_v: |
| 29921 | case VE::VADDULvvm: |
| 29922 | case VE::VADDULvvmL: |
| 29923 | case VE::VADDULvvmL_v: |
| 29924 | case VE::VADDULvvm_v: |
| 29925 | case VE::VADDULvvml: |
| 29926 | case VE::VADDULvvml_v: |
| 29927 | case VE::VADDUWvvm: |
| 29928 | case VE::VADDUWvvmL: |
| 29929 | case VE::VADDUWvvmL_v: |
| 29930 | case VE::VADDUWvvm_v: |
| 29931 | case VE::VADDUWvvml: |
| 29932 | case VE::VADDUWvvml_v: |
| 29933 | case VE::VANDvvm: |
| 29934 | case VE::VANDvvmL: |
| 29935 | case VE::VANDvvmL_v: |
| 29936 | case VE::VANDvvm_v: |
| 29937 | case VE::VANDvvml: |
| 29938 | case VE::VANDvvml_v: |
| 29939 | case VE::VCMPSLvvm: |
| 29940 | case VE::VCMPSLvvmL: |
| 29941 | case VE::VCMPSLvvmL_v: |
| 29942 | case VE::VCMPSLvvm_v: |
| 29943 | case VE::VCMPSLvvml: |
| 29944 | case VE::VCMPSLvvml_v: |
| 29945 | case VE::VCMPSWSXvvm: |
| 29946 | case VE::VCMPSWSXvvmL: |
| 29947 | case VE::VCMPSWSXvvmL_v: |
| 29948 | case VE::VCMPSWSXvvm_v: |
| 29949 | case VE::VCMPSWSXvvml: |
| 29950 | case VE::VCMPSWSXvvml_v: |
| 29951 | case VE::VCMPSWZXvvm: |
| 29952 | case VE::VCMPSWZXvvmL: |
| 29953 | case VE::VCMPSWZXvvmL_v: |
| 29954 | case VE::VCMPSWZXvvm_v: |
| 29955 | case VE::VCMPSWZXvvml: |
| 29956 | case VE::VCMPSWZXvvml_v: |
| 29957 | case VE::VCMPULvvm: |
| 29958 | case VE::VCMPULvvmL: |
| 29959 | case VE::VCMPULvvmL_v: |
| 29960 | case VE::VCMPULvvm_v: |
| 29961 | case VE::VCMPULvvml: |
| 29962 | case VE::VCMPULvvml_v: |
| 29963 | case VE::VCMPUWvvm: |
| 29964 | case VE::VCMPUWvvmL: |
| 29965 | case VE::VCMPUWvvmL_v: |
| 29966 | case VE::VCMPUWvvm_v: |
| 29967 | case VE::VCMPUWvvml: |
| 29968 | case VE::VCMPUWvvml_v: |
| 29969 | case VE::VDIVSLvvm: |
| 29970 | case VE::VDIVSLvvmL: |
| 29971 | case VE::VDIVSLvvmL_v: |
| 29972 | case VE::VDIVSLvvm_v: |
| 29973 | case VE::VDIVSLvvml: |
| 29974 | case VE::VDIVSLvvml_v: |
| 29975 | case VE::VDIVSWSXvvm: |
| 29976 | case VE::VDIVSWSXvvmL: |
| 29977 | case VE::VDIVSWSXvvmL_v: |
| 29978 | case VE::VDIVSWSXvvm_v: |
| 29979 | case VE::VDIVSWSXvvml: |
| 29980 | case VE::VDIVSWSXvvml_v: |
| 29981 | case VE::VDIVSWZXvvm: |
| 29982 | case VE::VDIVSWZXvvmL: |
| 29983 | case VE::VDIVSWZXvvmL_v: |
| 29984 | case VE::VDIVSWZXvvm_v: |
| 29985 | case VE::VDIVSWZXvvml: |
| 29986 | case VE::VDIVSWZXvvml_v: |
| 29987 | case VE::VDIVULvvm: |
| 29988 | case VE::VDIVULvvmL: |
| 29989 | case VE::VDIVULvvmL_v: |
| 29990 | case VE::VDIVULvvm_v: |
| 29991 | case VE::VDIVULvvml: |
| 29992 | case VE::VDIVULvvml_v: |
| 29993 | case VE::VDIVUWvvm: |
| 29994 | case VE::VDIVUWvvmL: |
| 29995 | case VE::VDIVUWvvmL_v: |
| 29996 | case VE::VDIVUWvvm_v: |
| 29997 | case VE::VDIVUWvvml: |
| 29998 | case VE::VDIVUWvvml_v: |
| 29999 | case VE::VEQVvvm: |
| 30000 | case VE::VEQVvvmL: |
| 30001 | case VE::VEQVvvmL_v: |
| 30002 | case VE::VEQVvvm_v: |
| 30003 | case VE::VEQVvvml: |
| 30004 | case VE::VEQVvvml_v: |
| 30005 | case VE::VFADDDvvm: |
| 30006 | case VE::VFADDDvvmL: |
| 30007 | case VE::VFADDDvvmL_v: |
| 30008 | case VE::VFADDDvvm_v: |
| 30009 | case VE::VFADDDvvml: |
| 30010 | case VE::VFADDDvvml_v: |
| 30011 | case VE::VFADDSvvm: |
| 30012 | case VE::VFADDSvvmL: |
| 30013 | case VE::VFADDSvvmL_v: |
| 30014 | case VE::VFADDSvvm_v: |
| 30015 | case VE::VFADDSvvml: |
| 30016 | case VE::VFADDSvvml_v: |
| 30017 | case VE::VFCMPDvvm: |
| 30018 | case VE::VFCMPDvvmL: |
| 30019 | case VE::VFCMPDvvmL_v: |
| 30020 | case VE::VFCMPDvvm_v: |
| 30021 | case VE::VFCMPDvvml: |
| 30022 | case VE::VFCMPDvvml_v: |
| 30023 | case VE::VFCMPSvvm: |
| 30024 | case VE::VFCMPSvvmL: |
| 30025 | case VE::VFCMPSvvmL_v: |
| 30026 | case VE::VFCMPSvvm_v: |
| 30027 | case VE::VFCMPSvvml: |
| 30028 | case VE::VFCMPSvvml_v: |
| 30029 | case VE::VFDIVDvvm: |
| 30030 | case VE::VFDIVDvvmL: |
| 30031 | case VE::VFDIVDvvmL_v: |
| 30032 | case VE::VFDIVDvvm_v: |
| 30033 | case VE::VFDIVDvvml: |
| 30034 | case VE::VFDIVDvvml_v: |
| 30035 | case VE::VFDIVSvvm: |
| 30036 | case VE::VFDIVSvvmL: |
| 30037 | case VE::VFDIVSvvmL_v: |
| 30038 | case VE::VFDIVSvvm_v: |
| 30039 | case VE::VFDIVSvvml: |
| 30040 | case VE::VFDIVSvvml_v: |
| 30041 | case VE::VFMAXDvvm: |
| 30042 | case VE::VFMAXDvvmL: |
| 30043 | case VE::VFMAXDvvmL_v: |
| 30044 | case VE::VFMAXDvvm_v: |
| 30045 | case VE::VFMAXDvvml: |
| 30046 | case VE::VFMAXDvvml_v: |
| 30047 | case VE::VFMAXSvvm: |
| 30048 | case VE::VFMAXSvvmL: |
| 30049 | case VE::VFMAXSvvmL_v: |
| 30050 | case VE::VFMAXSvvm_v: |
| 30051 | case VE::VFMAXSvvml: |
| 30052 | case VE::VFMAXSvvml_v: |
| 30053 | case VE::VFMINDvvm: |
| 30054 | case VE::VFMINDvvmL: |
| 30055 | case VE::VFMINDvvmL_v: |
| 30056 | case VE::VFMINDvvm_v: |
| 30057 | case VE::VFMINDvvml: |
| 30058 | case VE::VFMINDvvml_v: |
| 30059 | case VE::VFMINSvvm: |
| 30060 | case VE::VFMINSvvmL: |
| 30061 | case VE::VFMINSvvmL_v: |
| 30062 | case VE::VFMINSvvm_v: |
| 30063 | case VE::VFMINSvvml: |
| 30064 | case VE::VFMINSvvml_v: |
| 30065 | case VE::VFMKDvm: |
| 30066 | case VE::VFMKDvmL: |
| 30067 | case VE::VFMKDvml: |
| 30068 | case VE::VFMKLvm: |
| 30069 | case VE::VFMKLvmL: |
| 30070 | case VE::VFMKLvml: |
| 30071 | case VE::VFMKSvm: |
| 30072 | case VE::VFMKSvmL: |
| 30073 | case VE::VFMKSvml: |
| 30074 | case VE::VFMKWvm: |
| 30075 | case VE::VFMKWvmL: |
| 30076 | case VE::VFMKWvml: |
| 30077 | case VE::VFMULDvvm: |
| 30078 | case VE::VFMULDvvmL: |
| 30079 | case VE::VFMULDvvmL_v: |
| 30080 | case VE::VFMULDvvm_v: |
| 30081 | case VE::VFMULDvvml: |
| 30082 | case VE::VFMULDvvml_v: |
| 30083 | case VE::VFMULSvvm: |
| 30084 | case VE::VFMULSvvmL: |
| 30085 | case VE::VFMULSvvmL_v: |
| 30086 | case VE::VFMULSvvm_v: |
| 30087 | case VE::VFMULSvvml: |
| 30088 | case VE::VFMULSvvml_v: |
| 30089 | case VE::VFSUBDvvm: |
| 30090 | case VE::VFSUBDvvmL: |
| 30091 | case VE::VFSUBDvvmL_v: |
| 30092 | case VE::VFSUBDvvm_v: |
| 30093 | case VE::VFSUBDvvml: |
| 30094 | case VE::VFSUBDvvml_v: |
| 30095 | case VE::VFSUBSvvm: |
| 30096 | case VE::VFSUBSvvmL: |
| 30097 | case VE::VFSUBSvvmL_v: |
| 30098 | case VE::VFSUBSvvm_v: |
| 30099 | case VE::VFSUBSvvml: |
| 30100 | case VE::VFSUBSvvml_v: |
| 30101 | case VE::VMAXSLvvm: |
| 30102 | case VE::VMAXSLvvmL: |
| 30103 | case VE::VMAXSLvvmL_v: |
| 30104 | case VE::VMAXSLvvm_v: |
| 30105 | case VE::VMAXSLvvml: |
| 30106 | case VE::VMAXSLvvml_v: |
| 30107 | case VE::VMAXSWSXvvm: |
| 30108 | case VE::VMAXSWSXvvmL: |
| 30109 | case VE::VMAXSWSXvvmL_v: |
| 30110 | case VE::VMAXSWSXvvm_v: |
| 30111 | case VE::VMAXSWSXvvml: |
| 30112 | case VE::VMAXSWSXvvml_v: |
| 30113 | case VE::VMAXSWZXvvm: |
| 30114 | case VE::VMAXSWZXvvmL: |
| 30115 | case VE::VMAXSWZXvvmL_v: |
| 30116 | case VE::VMAXSWZXvvm_v: |
| 30117 | case VE::VMAXSWZXvvml: |
| 30118 | case VE::VMAXSWZXvvml_v: |
| 30119 | case VE::VMINSLvvm: |
| 30120 | case VE::VMINSLvvmL: |
| 30121 | case VE::VMINSLvvmL_v: |
| 30122 | case VE::VMINSLvvm_v: |
| 30123 | case VE::VMINSLvvml: |
| 30124 | case VE::VMINSLvvml_v: |
| 30125 | case VE::VMINSWSXvvm: |
| 30126 | case VE::VMINSWSXvvmL: |
| 30127 | case VE::VMINSWSXvvmL_v: |
| 30128 | case VE::VMINSWSXvvm_v: |
| 30129 | case VE::VMINSWSXvvml: |
| 30130 | case VE::VMINSWSXvvml_v: |
| 30131 | case VE::VMINSWZXvvm: |
| 30132 | case VE::VMINSWZXvvmL: |
| 30133 | case VE::VMINSWZXvvmL_v: |
| 30134 | case VE::VMINSWZXvvm_v: |
| 30135 | case VE::VMINSWZXvvml: |
| 30136 | case VE::VMINSWZXvvml_v: |
| 30137 | case VE::VMRGWvvm: |
| 30138 | case VE::VMRGWvvmL: |
| 30139 | case VE::VMRGWvvmL_v: |
| 30140 | case VE::VMRGWvvm_v: |
| 30141 | case VE::VMRGWvvml: |
| 30142 | case VE::VMRGWvvml_v: |
| 30143 | case VE::VMRGvvm: |
| 30144 | case VE::VMRGvvmL: |
| 30145 | case VE::VMRGvvmL_v: |
| 30146 | case VE::VMRGvvm_v: |
| 30147 | case VE::VMRGvvml: |
| 30148 | case VE::VMRGvvml_v: |
| 30149 | case VE::VMULSLWvvm: |
| 30150 | case VE::VMULSLWvvmL: |
| 30151 | case VE::VMULSLWvvmL_v: |
| 30152 | case VE::VMULSLWvvm_v: |
| 30153 | case VE::VMULSLWvvml: |
| 30154 | case VE::VMULSLWvvml_v: |
| 30155 | case VE::VMULSLvvm: |
| 30156 | case VE::VMULSLvvmL: |
| 30157 | case VE::VMULSLvvmL_v: |
| 30158 | case VE::VMULSLvvm_v: |
| 30159 | case VE::VMULSLvvml: |
| 30160 | case VE::VMULSLvvml_v: |
| 30161 | case VE::VMULSWSXvvm: |
| 30162 | case VE::VMULSWSXvvmL: |
| 30163 | case VE::VMULSWSXvvmL_v: |
| 30164 | case VE::VMULSWSXvvm_v: |
| 30165 | case VE::VMULSWSXvvml: |
| 30166 | case VE::VMULSWSXvvml_v: |
| 30167 | case VE::VMULSWZXvvm: |
| 30168 | case VE::VMULSWZXvvmL: |
| 30169 | case VE::VMULSWZXvvmL_v: |
| 30170 | case VE::VMULSWZXvvm_v: |
| 30171 | case VE::VMULSWZXvvml: |
| 30172 | case VE::VMULSWZXvvml_v: |
| 30173 | case VE::VMULULvvm: |
| 30174 | case VE::VMULULvvmL: |
| 30175 | case VE::VMULULvvmL_v: |
| 30176 | case VE::VMULULvvm_v: |
| 30177 | case VE::VMULULvvml: |
| 30178 | case VE::VMULULvvml_v: |
| 30179 | case VE::VMULUWvvm: |
| 30180 | case VE::VMULUWvvmL: |
| 30181 | case VE::VMULUWvvmL_v: |
| 30182 | case VE::VMULUWvvm_v: |
| 30183 | case VE::VMULUWvvml: |
| 30184 | case VE::VMULUWvvml_v: |
| 30185 | case VE::VORvvm: |
| 30186 | case VE::VORvvmL: |
| 30187 | case VE::VORvvmL_v: |
| 30188 | case VE::VORvvm_v: |
| 30189 | case VE::VORvvml: |
| 30190 | case VE::VORvvml_v: |
| 30191 | case VE::VSUBSLvvm: |
| 30192 | case VE::VSUBSLvvmL: |
| 30193 | case VE::VSUBSLvvmL_v: |
| 30194 | case VE::VSUBSLvvm_v: |
| 30195 | case VE::VSUBSLvvml: |
| 30196 | case VE::VSUBSLvvml_v: |
| 30197 | case VE::VSUBSWSXvvm: |
| 30198 | case VE::VSUBSWSXvvmL: |
| 30199 | case VE::VSUBSWSXvvmL_v: |
| 30200 | case VE::VSUBSWSXvvm_v: |
| 30201 | case VE::VSUBSWSXvvml: |
| 30202 | case VE::VSUBSWSXvvml_v: |
| 30203 | case VE::VSUBSWZXvvm: |
| 30204 | case VE::VSUBSWZXvvmL: |
| 30205 | case VE::VSUBSWZXvvmL_v: |
| 30206 | case VE::VSUBSWZXvvm_v: |
| 30207 | case VE::VSUBSWZXvvml: |
| 30208 | case VE::VSUBSWZXvvml_v: |
| 30209 | case VE::VSUBULvvm: |
| 30210 | case VE::VSUBULvvmL: |
| 30211 | case VE::VSUBULvvmL_v: |
| 30212 | case VE::VSUBULvvm_v: |
| 30213 | case VE::VSUBULvvml: |
| 30214 | case VE::VSUBULvvml_v: |
| 30215 | case VE::VSUBUWvvm: |
| 30216 | case VE::VSUBUWvvmL: |
| 30217 | case VE::VSUBUWvvmL_v: |
| 30218 | case VE::VSUBUWvvm_v: |
| 30219 | case VE::VSUBUWvvml: |
| 30220 | case VE::VSUBUWvvml_v: |
| 30221 | case VE::VXORvvm: |
| 30222 | case VE::VXORvvmL: |
| 30223 | case VE::VXORvvmL_v: |
| 30224 | case VE::VXORvvm_v: |
| 30225 | case VE::VXORvvml: |
| 30226 | case VE::VXORvvml_v: { |
| 30227 | switch (OpNum) { |
| 30228 | case 3: |
| 30229 | // op: m |
| 30230 | return 48; |
| 30231 | case 0: |
| 30232 | // op: vx |
| 30233 | return 24; |
| 30234 | case 1: |
| 30235 | // op: vy |
| 30236 | return 16; |
| 30237 | case 2: |
| 30238 | // op: vz |
| 30239 | return 8; |
| 30240 | } |
| 30241 | break; |
| 30242 | } |
| 30243 | case VE::PVCVTWSLOvm: |
| 30244 | case VE::PVCVTWSLOvmL: |
| 30245 | case VE::PVCVTWSLOvmL_v: |
| 30246 | case VE::PVCVTWSLOvm_v: |
| 30247 | case VE::PVCVTWSLOvml: |
| 30248 | case VE::PVCVTWSLOvml_v: |
| 30249 | case VE::PVCVTWSUPvm: |
| 30250 | case VE::PVCVTWSUPvmL: |
| 30251 | case VE::PVCVTWSUPvmL_v: |
| 30252 | case VE::PVCVTWSUPvm_v: |
| 30253 | case VE::PVCVTWSUPvml: |
| 30254 | case VE::PVCVTWSUPvml_v: |
| 30255 | case VE::PVCVTWSvm: |
| 30256 | case VE::PVCVTWSvmL: |
| 30257 | case VE::PVCVTWSvmL_v: |
| 30258 | case VE::PVCVTWSvm_v: |
| 30259 | case VE::PVCVTWSvml: |
| 30260 | case VE::PVCVTWSvml_v: |
| 30261 | case VE::PVSLALOvvm: |
| 30262 | case VE::PVSLALOvvmL: |
| 30263 | case VE::PVSLALOvvmL_v: |
| 30264 | case VE::PVSLALOvvm_v: |
| 30265 | case VE::PVSLALOvvml: |
| 30266 | case VE::PVSLALOvvml_v: |
| 30267 | case VE::PVSLAUPvvm: |
| 30268 | case VE::PVSLAUPvvmL: |
| 30269 | case VE::PVSLAUPvvmL_v: |
| 30270 | case VE::PVSLAUPvvm_v: |
| 30271 | case VE::PVSLAUPvvml: |
| 30272 | case VE::PVSLAUPvvml_v: |
| 30273 | case VE::PVSLAvvm: |
| 30274 | case VE::PVSLAvvmL: |
| 30275 | case VE::PVSLAvvmL_v: |
| 30276 | case VE::PVSLAvvm_v: |
| 30277 | case VE::PVSLAvvml: |
| 30278 | case VE::PVSLAvvml_v: |
| 30279 | case VE::PVSLLLOvvm: |
| 30280 | case VE::PVSLLLOvvmL: |
| 30281 | case VE::PVSLLLOvvmL_v: |
| 30282 | case VE::PVSLLLOvvm_v: |
| 30283 | case VE::PVSLLLOvvml: |
| 30284 | case VE::PVSLLLOvvml_v: |
| 30285 | case VE::PVSLLUPvvm: |
| 30286 | case VE::PVSLLUPvvmL: |
| 30287 | case VE::PVSLLUPvvmL_v: |
| 30288 | case VE::PVSLLUPvvm_v: |
| 30289 | case VE::PVSLLUPvvml: |
| 30290 | case VE::PVSLLUPvvml_v: |
| 30291 | case VE::PVSLLvvm: |
| 30292 | case VE::PVSLLvvmL: |
| 30293 | case VE::PVSLLvvmL_v: |
| 30294 | case VE::PVSLLvvm_v: |
| 30295 | case VE::PVSLLvvml: |
| 30296 | case VE::PVSLLvvml_v: |
| 30297 | case VE::PVSRALOvvm: |
| 30298 | case VE::PVSRALOvvmL: |
| 30299 | case VE::PVSRALOvvmL_v: |
| 30300 | case VE::PVSRALOvvm_v: |
| 30301 | case VE::PVSRALOvvml: |
| 30302 | case VE::PVSRALOvvml_v: |
| 30303 | case VE::PVSRAUPvvm: |
| 30304 | case VE::PVSRAUPvvmL: |
| 30305 | case VE::PVSRAUPvvmL_v: |
| 30306 | case VE::PVSRAUPvvm_v: |
| 30307 | case VE::PVSRAUPvvml: |
| 30308 | case VE::PVSRAUPvvml_v: |
| 30309 | case VE::PVSRAvvm: |
| 30310 | case VE::PVSRAvvmL: |
| 30311 | case VE::PVSRAvvmL_v: |
| 30312 | case VE::PVSRAvvm_v: |
| 30313 | case VE::PVSRAvvml: |
| 30314 | case VE::PVSRAvvml_v: |
| 30315 | case VE::PVSRLLOvvm: |
| 30316 | case VE::PVSRLLOvvmL: |
| 30317 | case VE::PVSRLLOvvmL_v: |
| 30318 | case VE::PVSRLLOvvm_v: |
| 30319 | case VE::PVSRLLOvvml: |
| 30320 | case VE::PVSRLLOvvml_v: |
| 30321 | case VE::PVSRLUPvvm: |
| 30322 | case VE::PVSRLUPvvmL: |
| 30323 | case VE::PVSRLUPvvmL_v: |
| 30324 | case VE::PVSRLUPvvm_v: |
| 30325 | case VE::PVSRLUPvvml: |
| 30326 | case VE::PVSRLUPvvml_v: |
| 30327 | case VE::PVSRLvvm: |
| 30328 | case VE::PVSRLvvmL: |
| 30329 | case VE::PVSRLvvmL_v: |
| 30330 | case VE::PVSRLvvm_v: |
| 30331 | case VE::PVSRLvvml: |
| 30332 | case VE::PVSRLvvml_v: |
| 30333 | case VE::VCVTLDvm: |
| 30334 | case VE::VCVTLDvmL: |
| 30335 | case VE::VCVTLDvmL_v: |
| 30336 | case VE::VCVTLDvm_v: |
| 30337 | case VE::VCVTLDvml: |
| 30338 | case VE::VCVTLDvml_v: |
| 30339 | case VE::VCVTWDSXvm: |
| 30340 | case VE::VCVTWDSXvmL: |
| 30341 | case VE::VCVTWDSXvmL_v: |
| 30342 | case VE::VCVTWDSXvm_v: |
| 30343 | case VE::VCVTWDSXvml: |
| 30344 | case VE::VCVTWDSXvml_v: |
| 30345 | case VE::VCVTWDZXvm: |
| 30346 | case VE::VCVTWDZXvmL: |
| 30347 | case VE::VCVTWDZXvmL_v: |
| 30348 | case VE::VCVTWDZXvm_v: |
| 30349 | case VE::VCVTWDZXvml: |
| 30350 | case VE::VCVTWDZXvml_v: |
| 30351 | case VE::VCVTWSSXvm: |
| 30352 | case VE::VCVTWSSXvmL: |
| 30353 | case VE::VCVTWSSXvmL_v: |
| 30354 | case VE::VCVTWSSXvm_v: |
| 30355 | case VE::VCVTWSSXvml: |
| 30356 | case VE::VCVTWSSXvml_v: |
| 30357 | case VE::VCVTWSZXvm: |
| 30358 | case VE::VCVTWSZXvmL: |
| 30359 | case VE::VCVTWSZXvmL_v: |
| 30360 | case VE::VCVTWSZXvm_v: |
| 30361 | case VE::VCVTWSZXvml: |
| 30362 | case VE::VCVTWSZXvml_v: |
| 30363 | case VE::VSLALvvm: |
| 30364 | case VE::VSLALvvmL: |
| 30365 | case VE::VSLALvvmL_v: |
| 30366 | case VE::VSLALvvm_v: |
| 30367 | case VE::VSLALvvml: |
| 30368 | case VE::VSLALvvml_v: |
| 30369 | case VE::VSLAWSXvvm: |
| 30370 | case VE::VSLAWSXvvmL: |
| 30371 | case VE::VSLAWSXvvmL_v: |
| 30372 | case VE::VSLAWSXvvm_v: |
| 30373 | case VE::VSLAWSXvvml: |
| 30374 | case VE::VSLAWSXvvml_v: |
| 30375 | case VE::VSLAWZXvvm: |
| 30376 | case VE::VSLAWZXvvmL: |
| 30377 | case VE::VSLAWZXvvmL_v: |
| 30378 | case VE::VSLAWZXvvm_v: |
| 30379 | case VE::VSLAWZXvvml: |
| 30380 | case VE::VSLAWZXvvml_v: |
| 30381 | case VE::VSLLvvm: |
| 30382 | case VE::VSLLvvmL: |
| 30383 | case VE::VSLLvvmL_v: |
| 30384 | case VE::VSLLvvm_v: |
| 30385 | case VE::VSLLvvml: |
| 30386 | case VE::VSLLvvml_v: |
| 30387 | case VE::VSRALvvm: |
| 30388 | case VE::VSRALvvmL: |
| 30389 | case VE::VSRALvvmL_v: |
| 30390 | case VE::VSRALvvm_v: |
| 30391 | case VE::VSRALvvml: |
| 30392 | case VE::VSRALvvml_v: |
| 30393 | case VE::VSRAWSXvvm: |
| 30394 | case VE::VSRAWSXvvmL: |
| 30395 | case VE::VSRAWSXvvmL_v: |
| 30396 | case VE::VSRAWSXvvm_v: |
| 30397 | case VE::VSRAWSXvvml: |
| 30398 | case VE::VSRAWSXvvml_v: |
| 30399 | case VE::VSRAWZXvvm: |
| 30400 | case VE::VSRAWZXvvmL: |
| 30401 | case VE::VSRAWZXvvmL_v: |
| 30402 | case VE::VSRAWZXvvm_v: |
| 30403 | case VE::VSRAWZXvvml: |
| 30404 | case VE::VSRAWZXvvml_v: |
| 30405 | case VE::VSRLvvm: |
| 30406 | case VE::VSRLvvmL: |
| 30407 | case VE::VSRLvvmL_v: |
| 30408 | case VE::VSRLvvm_v: |
| 30409 | case VE::VSRLvvml: |
| 30410 | case VE::VSRLvvml_v: { |
| 30411 | switch (OpNum) { |
| 30412 | case 3: |
| 30413 | // op: m |
| 30414 | return 48; |
| 30415 | case 0: |
| 30416 | // op: vx |
| 30417 | return 24; |
| 30418 | case 2: |
| 30419 | // op: vy |
| 30420 | return 16; |
| 30421 | case 1: |
| 30422 | // op: vz |
| 30423 | return 8; |
| 30424 | } |
| 30425 | break; |
| 30426 | } |
| 30427 | case VE::PVADDSLOivm: |
| 30428 | case VE::PVADDSLOivmL: |
| 30429 | case VE::PVADDSLOivmL_v: |
| 30430 | case VE::PVADDSLOivm_v: |
| 30431 | case VE::PVADDSLOivml: |
| 30432 | case VE::PVADDSLOivml_v: |
| 30433 | case VE::PVADDSLOrvm: |
| 30434 | case VE::PVADDSLOrvmL: |
| 30435 | case VE::PVADDSLOrvmL_v: |
| 30436 | case VE::PVADDSLOrvm_v: |
| 30437 | case VE::PVADDSLOrvml: |
| 30438 | case VE::PVADDSLOrvml_v: |
| 30439 | case VE::PVADDSUPivm: |
| 30440 | case VE::PVADDSUPivmL: |
| 30441 | case VE::PVADDSUPivmL_v: |
| 30442 | case VE::PVADDSUPivm_v: |
| 30443 | case VE::PVADDSUPivml: |
| 30444 | case VE::PVADDSUPivml_v: |
| 30445 | case VE::PVADDSUPrvm: |
| 30446 | case VE::PVADDSUPrvmL: |
| 30447 | case VE::PVADDSUPrvmL_v: |
| 30448 | case VE::PVADDSUPrvm_v: |
| 30449 | case VE::PVADDSUPrvml: |
| 30450 | case VE::PVADDSUPrvml_v: |
| 30451 | case VE::PVADDSivm: |
| 30452 | case VE::PVADDSivmL: |
| 30453 | case VE::PVADDSivmL_v: |
| 30454 | case VE::PVADDSivm_v: |
| 30455 | case VE::PVADDSivml: |
| 30456 | case VE::PVADDSivml_v: |
| 30457 | case VE::PVADDSrvm: |
| 30458 | case VE::PVADDSrvmL: |
| 30459 | case VE::PVADDSrvmL_v: |
| 30460 | case VE::PVADDSrvm_v: |
| 30461 | case VE::PVADDSrvml: |
| 30462 | case VE::PVADDSrvml_v: |
| 30463 | case VE::PVADDULOivm: |
| 30464 | case VE::PVADDULOivmL: |
| 30465 | case VE::PVADDULOivmL_v: |
| 30466 | case VE::PVADDULOivm_v: |
| 30467 | case VE::PVADDULOivml: |
| 30468 | case VE::PVADDULOivml_v: |
| 30469 | case VE::PVADDULOrvm: |
| 30470 | case VE::PVADDULOrvmL: |
| 30471 | case VE::PVADDULOrvmL_v: |
| 30472 | case VE::PVADDULOrvm_v: |
| 30473 | case VE::PVADDULOrvml: |
| 30474 | case VE::PVADDULOrvml_v: |
| 30475 | case VE::PVADDUUPivm: |
| 30476 | case VE::PVADDUUPivmL: |
| 30477 | case VE::PVADDUUPivmL_v: |
| 30478 | case VE::PVADDUUPivm_v: |
| 30479 | case VE::PVADDUUPivml: |
| 30480 | case VE::PVADDUUPivml_v: |
| 30481 | case VE::PVADDUUPrvm: |
| 30482 | case VE::PVADDUUPrvmL: |
| 30483 | case VE::PVADDUUPrvmL_v: |
| 30484 | case VE::PVADDUUPrvm_v: |
| 30485 | case VE::PVADDUUPrvml: |
| 30486 | case VE::PVADDUUPrvml_v: |
| 30487 | case VE::PVADDUivm: |
| 30488 | case VE::PVADDUivmL: |
| 30489 | case VE::PVADDUivmL_v: |
| 30490 | case VE::PVADDUivm_v: |
| 30491 | case VE::PVADDUivml: |
| 30492 | case VE::PVADDUivml_v: |
| 30493 | case VE::PVADDUrvm: |
| 30494 | case VE::PVADDUrvmL: |
| 30495 | case VE::PVADDUrvmL_v: |
| 30496 | case VE::PVADDUrvm_v: |
| 30497 | case VE::PVADDUrvml: |
| 30498 | case VE::PVADDUrvml_v: |
| 30499 | case VE::PVANDLOmvm: |
| 30500 | case VE::PVANDLOmvmL: |
| 30501 | case VE::PVANDLOmvmL_v: |
| 30502 | case VE::PVANDLOmvm_v: |
| 30503 | case VE::PVANDLOmvml: |
| 30504 | case VE::PVANDLOmvml_v: |
| 30505 | case VE::PVANDLOrvm: |
| 30506 | case VE::PVANDLOrvmL: |
| 30507 | case VE::PVANDLOrvmL_v: |
| 30508 | case VE::PVANDLOrvm_v: |
| 30509 | case VE::PVANDLOrvml: |
| 30510 | case VE::PVANDLOrvml_v: |
| 30511 | case VE::PVANDUPmvm: |
| 30512 | case VE::PVANDUPmvmL: |
| 30513 | case VE::PVANDUPmvmL_v: |
| 30514 | case VE::PVANDUPmvm_v: |
| 30515 | case VE::PVANDUPmvml: |
| 30516 | case VE::PVANDUPmvml_v: |
| 30517 | case VE::PVANDUPrvm: |
| 30518 | case VE::PVANDUPrvmL: |
| 30519 | case VE::PVANDUPrvmL_v: |
| 30520 | case VE::PVANDUPrvm_v: |
| 30521 | case VE::PVANDUPrvml: |
| 30522 | case VE::PVANDUPrvml_v: |
| 30523 | case VE::PVANDmvm: |
| 30524 | case VE::PVANDmvmL: |
| 30525 | case VE::PVANDmvmL_v: |
| 30526 | case VE::PVANDmvm_v: |
| 30527 | case VE::PVANDmvml: |
| 30528 | case VE::PVANDmvml_v: |
| 30529 | case VE::PVANDrvm: |
| 30530 | case VE::PVANDrvmL: |
| 30531 | case VE::PVANDrvmL_v: |
| 30532 | case VE::PVANDrvm_v: |
| 30533 | case VE::PVANDrvml: |
| 30534 | case VE::PVANDrvml_v: |
| 30535 | case VE::PVCMPSLOivm: |
| 30536 | case VE::PVCMPSLOivmL: |
| 30537 | case VE::PVCMPSLOivmL_v: |
| 30538 | case VE::PVCMPSLOivm_v: |
| 30539 | case VE::PVCMPSLOivml: |
| 30540 | case VE::PVCMPSLOivml_v: |
| 30541 | case VE::PVCMPSLOrvm: |
| 30542 | case VE::PVCMPSLOrvmL: |
| 30543 | case VE::PVCMPSLOrvmL_v: |
| 30544 | case VE::PVCMPSLOrvm_v: |
| 30545 | case VE::PVCMPSLOrvml: |
| 30546 | case VE::PVCMPSLOrvml_v: |
| 30547 | case VE::PVCMPSUPivm: |
| 30548 | case VE::PVCMPSUPivmL: |
| 30549 | case VE::PVCMPSUPivmL_v: |
| 30550 | case VE::PVCMPSUPivm_v: |
| 30551 | case VE::PVCMPSUPivml: |
| 30552 | case VE::PVCMPSUPivml_v: |
| 30553 | case VE::PVCMPSUPrvm: |
| 30554 | case VE::PVCMPSUPrvmL: |
| 30555 | case VE::PVCMPSUPrvmL_v: |
| 30556 | case VE::PVCMPSUPrvm_v: |
| 30557 | case VE::PVCMPSUPrvml: |
| 30558 | case VE::PVCMPSUPrvml_v: |
| 30559 | case VE::PVCMPSivm: |
| 30560 | case VE::PVCMPSivmL: |
| 30561 | case VE::PVCMPSivmL_v: |
| 30562 | case VE::PVCMPSivm_v: |
| 30563 | case VE::PVCMPSivml: |
| 30564 | case VE::PVCMPSivml_v: |
| 30565 | case VE::PVCMPSrvm: |
| 30566 | case VE::PVCMPSrvmL: |
| 30567 | case VE::PVCMPSrvmL_v: |
| 30568 | case VE::PVCMPSrvm_v: |
| 30569 | case VE::PVCMPSrvml: |
| 30570 | case VE::PVCMPSrvml_v: |
| 30571 | case VE::PVCMPULOivm: |
| 30572 | case VE::PVCMPULOivmL: |
| 30573 | case VE::PVCMPULOivmL_v: |
| 30574 | case VE::PVCMPULOivm_v: |
| 30575 | case VE::PVCMPULOivml: |
| 30576 | case VE::PVCMPULOivml_v: |
| 30577 | case VE::PVCMPULOrvm: |
| 30578 | case VE::PVCMPULOrvmL: |
| 30579 | case VE::PVCMPULOrvmL_v: |
| 30580 | case VE::PVCMPULOrvm_v: |
| 30581 | case VE::PVCMPULOrvml: |
| 30582 | case VE::PVCMPULOrvml_v: |
| 30583 | case VE::PVCMPUUPivm: |
| 30584 | case VE::PVCMPUUPivmL: |
| 30585 | case VE::PVCMPUUPivmL_v: |
| 30586 | case VE::PVCMPUUPivm_v: |
| 30587 | case VE::PVCMPUUPivml: |
| 30588 | case VE::PVCMPUUPivml_v: |
| 30589 | case VE::PVCMPUUPrvm: |
| 30590 | case VE::PVCMPUUPrvmL: |
| 30591 | case VE::PVCMPUUPrvmL_v: |
| 30592 | case VE::PVCMPUUPrvm_v: |
| 30593 | case VE::PVCMPUUPrvml: |
| 30594 | case VE::PVCMPUUPrvml_v: |
| 30595 | case VE::PVCMPUivm: |
| 30596 | case VE::PVCMPUivmL: |
| 30597 | case VE::PVCMPUivmL_v: |
| 30598 | case VE::PVCMPUivm_v: |
| 30599 | case VE::PVCMPUivml: |
| 30600 | case VE::PVCMPUivml_v: |
| 30601 | case VE::PVCMPUrvm: |
| 30602 | case VE::PVCMPUrvmL: |
| 30603 | case VE::PVCMPUrvmL_v: |
| 30604 | case VE::PVCMPUrvm_v: |
| 30605 | case VE::PVCMPUrvml: |
| 30606 | case VE::PVCMPUrvml_v: |
| 30607 | case VE::PVEQVLOmvm: |
| 30608 | case VE::PVEQVLOmvmL: |
| 30609 | case VE::PVEQVLOmvmL_v: |
| 30610 | case VE::PVEQVLOmvm_v: |
| 30611 | case VE::PVEQVLOmvml: |
| 30612 | case VE::PVEQVLOmvml_v: |
| 30613 | case VE::PVEQVLOrvm: |
| 30614 | case VE::PVEQVLOrvmL: |
| 30615 | case VE::PVEQVLOrvmL_v: |
| 30616 | case VE::PVEQVLOrvm_v: |
| 30617 | case VE::PVEQVLOrvml: |
| 30618 | case VE::PVEQVLOrvml_v: |
| 30619 | case VE::PVEQVUPmvm: |
| 30620 | case VE::PVEQVUPmvmL: |
| 30621 | case VE::PVEQVUPmvmL_v: |
| 30622 | case VE::PVEQVUPmvm_v: |
| 30623 | case VE::PVEQVUPmvml: |
| 30624 | case VE::PVEQVUPmvml_v: |
| 30625 | case VE::PVEQVUPrvm: |
| 30626 | case VE::PVEQVUPrvmL: |
| 30627 | case VE::PVEQVUPrvmL_v: |
| 30628 | case VE::PVEQVUPrvm_v: |
| 30629 | case VE::PVEQVUPrvml: |
| 30630 | case VE::PVEQVUPrvml_v: |
| 30631 | case VE::PVEQVmvm: |
| 30632 | case VE::PVEQVmvmL: |
| 30633 | case VE::PVEQVmvmL_v: |
| 30634 | case VE::PVEQVmvm_v: |
| 30635 | case VE::PVEQVmvml: |
| 30636 | case VE::PVEQVmvml_v: |
| 30637 | case VE::PVEQVrvm: |
| 30638 | case VE::PVEQVrvmL: |
| 30639 | case VE::PVEQVrvmL_v: |
| 30640 | case VE::PVEQVrvm_v: |
| 30641 | case VE::PVEQVrvml: |
| 30642 | case VE::PVEQVrvml_v: |
| 30643 | case VE::PVFADDLOivm: |
| 30644 | case VE::PVFADDLOivmL: |
| 30645 | case VE::PVFADDLOivmL_v: |
| 30646 | case VE::PVFADDLOivm_v: |
| 30647 | case VE::PVFADDLOivml: |
| 30648 | case VE::PVFADDLOivml_v: |
| 30649 | case VE::PVFADDLOrvm: |
| 30650 | case VE::PVFADDLOrvmL: |
| 30651 | case VE::PVFADDLOrvmL_v: |
| 30652 | case VE::PVFADDLOrvm_v: |
| 30653 | case VE::PVFADDLOrvml: |
| 30654 | case VE::PVFADDLOrvml_v: |
| 30655 | case VE::PVFADDUPivm: |
| 30656 | case VE::PVFADDUPivmL: |
| 30657 | case VE::PVFADDUPivmL_v: |
| 30658 | case VE::PVFADDUPivm_v: |
| 30659 | case VE::PVFADDUPivml: |
| 30660 | case VE::PVFADDUPivml_v: |
| 30661 | case VE::PVFADDUPrvm: |
| 30662 | case VE::PVFADDUPrvmL: |
| 30663 | case VE::PVFADDUPrvmL_v: |
| 30664 | case VE::PVFADDUPrvm_v: |
| 30665 | case VE::PVFADDUPrvml: |
| 30666 | case VE::PVFADDUPrvml_v: |
| 30667 | case VE::PVFADDivm: |
| 30668 | case VE::PVFADDivmL: |
| 30669 | case VE::PVFADDivmL_v: |
| 30670 | case VE::PVFADDivm_v: |
| 30671 | case VE::PVFADDivml: |
| 30672 | case VE::PVFADDivml_v: |
| 30673 | case VE::PVFADDrvm: |
| 30674 | case VE::PVFADDrvmL: |
| 30675 | case VE::PVFADDrvmL_v: |
| 30676 | case VE::PVFADDrvm_v: |
| 30677 | case VE::PVFADDrvml: |
| 30678 | case VE::PVFADDrvml_v: |
| 30679 | case VE::PVFCMPLOivm: |
| 30680 | case VE::PVFCMPLOivmL: |
| 30681 | case VE::PVFCMPLOivmL_v: |
| 30682 | case VE::PVFCMPLOivm_v: |
| 30683 | case VE::PVFCMPLOivml: |
| 30684 | case VE::PVFCMPLOivml_v: |
| 30685 | case VE::PVFCMPLOrvm: |
| 30686 | case VE::PVFCMPLOrvmL: |
| 30687 | case VE::PVFCMPLOrvmL_v: |
| 30688 | case VE::PVFCMPLOrvm_v: |
| 30689 | case VE::PVFCMPLOrvml: |
| 30690 | case VE::PVFCMPLOrvml_v: |
| 30691 | case VE::PVFCMPUPivm: |
| 30692 | case VE::PVFCMPUPivmL: |
| 30693 | case VE::PVFCMPUPivmL_v: |
| 30694 | case VE::PVFCMPUPivm_v: |
| 30695 | case VE::PVFCMPUPivml: |
| 30696 | case VE::PVFCMPUPivml_v: |
| 30697 | case VE::PVFCMPUPrvm: |
| 30698 | case VE::PVFCMPUPrvmL: |
| 30699 | case VE::PVFCMPUPrvmL_v: |
| 30700 | case VE::PVFCMPUPrvm_v: |
| 30701 | case VE::PVFCMPUPrvml: |
| 30702 | case VE::PVFCMPUPrvml_v: |
| 30703 | case VE::PVFCMPivm: |
| 30704 | case VE::PVFCMPivmL: |
| 30705 | case VE::PVFCMPivmL_v: |
| 30706 | case VE::PVFCMPivm_v: |
| 30707 | case VE::PVFCMPivml: |
| 30708 | case VE::PVFCMPivml_v: |
| 30709 | case VE::PVFCMPrvm: |
| 30710 | case VE::PVFCMPrvmL: |
| 30711 | case VE::PVFCMPrvmL_v: |
| 30712 | case VE::PVFCMPrvm_v: |
| 30713 | case VE::PVFCMPrvml: |
| 30714 | case VE::PVFCMPrvml_v: |
| 30715 | case VE::PVFMAXLOivm: |
| 30716 | case VE::PVFMAXLOivmL: |
| 30717 | case VE::PVFMAXLOivmL_v: |
| 30718 | case VE::PVFMAXLOivm_v: |
| 30719 | case VE::PVFMAXLOivml: |
| 30720 | case VE::PVFMAXLOivml_v: |
| 30721 | case VE::PVFMAXLOrvm: |
| 30722 | case VE::PVFMAXLOrvmL: |
| 30723 | case VE::PVFMAXLOrvmL_v: |
| 30724 | case VE::PVFMAXLOrvm_v: |
| 30725 | case VE::PVFMAXLOrvml: |
| 30726 | case VE::PVFMAXLOrvml_v: |
| 30727 | case VE::PVFMAXUPivm: |
| 30728 | case VE::PVFMAXUPivmL: |
| 30729 | case VE::PVFMAXUPivmL_v: |
| 30730 | case VE::PVFMAXUPivm_v: |
| 30731 | case VE::PVFMAXUPivml: |
| 30732 | case VE::PVFMAXUPivml_v: |
| 30733 | case VE::PVFMAXUPrvm: |
| 30734 | case VE::PVFMAXUPrvmL: |
| 30735 | case VE::PVFMAXUPrvmL_v: |
| 30736 | case VE::PVFMAXUPrvm_v: |
| 30737 | case VE::PVFMAXUPrvml: |
| 30738 | case VE::PVFMAXUPrvml_v: |
| 30739 | case VE::PVFMAXivm: |
| 30740 | case VE::PVFMAXivmL: |
| 30741 | case VE::PVFMAXivmL_v: |
| 30742 | case VE::PVFMAXivm_v: |
| 30743 | case VE::PVFMAXivml: |
| 30744 | case VE::PVFMAXivml_v: |
| 30745 | case VE::PVFMAXrvm: |
| 30746 | case VE::PVFMAXrvmL: |
| 30747 | case VE::PVFMAXrvmL_v: |
| 30748 | case VE::PVFMAXrvm_v: |
| 30749 | case VE::PVFMAXrvml: |
| 30750 | case VE::PVFMAXrvml_v: |
| 30751 | case VE::PVFMINLOivm: |
| 30752 | case VE::PVFMINLOivmL: |
| 30753 | case VE::PVFMINLOivmL_v: |
| 30754 | case VE::PVFMINLOivm_v: |
| 30755 | case VE::PVFMINLOivml: |
| 30756 | case VE::PVFMINLOivml_v: |
| 30757 | case VE::PVFMINLOrvm: |
| 30758 | case VE::PVFMINLOrvmL: |
| 30759 | case VE::PVFMINLOrvmL_v: |
| 30760 | case VE::PVFMINLOrvm_v: |
| 30761 | case VE::PVFMINLOrvml: |
| 30762 | case VE::PVFMINLOrvml_v: |
| 30763 | case VE::PVFMINUPivm: |
| 30764 | case VE::PVFMINUPivmL: |
| 30765 | case VE::PVFMINUPivmL_v: |
| 30766 | case VE::PVFMINUPivm_v: |
| 30767 | case VE::PVFMINUPivml: |
| 30768 | case VE::PVFMINUPivml_v: |
| 30769 | case VE::PVFMINUPrvm: |
| 30770 | case VE::PVFMINUPrvmL: |
| 30771 | case VE::PVFMINUPrvmL_v: |
| 30772 | case VE::PVFMINUPrvm_v: |
| 30773 | case VE::PVFMINUPrvml: |
| 30774 | case VE::PVFMINUPrvml_v: |
| 30775 | case VE::PVFMINivm: |
| 30776 | case VE::PVFMINivmL: |
| 30777 | case VE::PVFMINivmL_v: |
| 30778 | case VE::PVFMINivm_v: |
| 30779 | case VE::PVFMINivml: |
| 30780 | case VE::PVFMINivml_v: |
| 30781 | case VE::PVFMINrvm: |
| 30782 | case VE::PVFMINrvmL: |
| 30783 | case VE::PVFMINrvmL_v: |
| 30784 | case VE::PVFMINrvm_v: |
| 30785 | case VE::PVFMINrvml: |
| 30786 | case VE::PVFMINrvml_v: |
| 30787 | case VE::PVFMULLOivm: |
| 30788 | case VE::PVFMULLOivmL: |
| 30789 | case VE::PVFMULLOivmL_v: |
| 30790 | case VE::PVFMULLOivm_v: |
| 30791 | case VE::PVFMULLOivml: |
| 30792 | case VE::PVFMULLOivml_v: |
| 30793 | case VE::PVFMULLOrvm: |
| 30794 | case VE::PVFMULLOrvmL: |
| 30795 | case VE::PVFMULLOrvmL_v: |
| 30796 | case VE::PVFMULLOrvm_v: |
| 30797 | case VE::PVFMULLOrvml: |
| 30798 | case VE::PVFMULLOrvml_v: |
| 30799 | case VE::PVFMULUPivm: |
| 30800 | case VE::PVFMULUPivmL: |
| 30801 | case VE::PVFMULUPivmL_v: |
| 30802 | case VE::PVFMULUPivm_v: |
| 30803 | case VE::PVFMULUPivml: |
| 30804 | case VE::PVFMULUPivml_v: |
| 30805 | case VE::PVFMULUPrvm: |
| 30806 | case VE::PVFMULUPrvmL: |
| 30807 | case VE::PVFMULUPrvmL_v: |
| 30808 | case VE::PVFMULUPrvm_v: |
| 30809 | case VE::PVFMULUPrvml: |
| 30810 | case VE::PVFMULUPrvml_v: |
| 30811 | case VE::PVFMULivm: |
| 30812 | case VE::PVFMULivmL: |
| 30813 | case VE::PVFMULivmL_v: |
| 30814 | case VE::PVFMULivm_v: |
| 30815 | case VE::PVFMULivml: |
| 30816 | case VE::PVFMULivml_v: |
| 30817 | case VE::PVFMULrvm: |
| 30818 | case VE::PVFMULrvmL: |
| 30819 | case VE::PVFMULrvmL_v: |
| 30820 | case VE::PVFMULrvm_v: |
| 30821 | case VE::PVFMULrvml: |
| 30822 | case VE::PVFMULrvml_v: |
| 30823 | case VE::PVFSUBLOivm: |
| 30824 | case VE::PVFSUBLOivmL: |
| 30825 | case VE::PVFSUBLOivmL_v: |
| 30826 | case VE::PVFSUBLOivm_v: |
| 30827 | case VE::PVFSUBLOivml: |
| 30828 | case VE::PVFSUBLOivml_v: |
| 30829 | case VE::PVFSUBLOrvm: |
| 30830 | case VE::PVFSUBLOrvmL: |
| 30831 | case VE::PVFSUBLOrvmL_v: |
| 30832 | case VE::PVFSUBLOrvm_v: |
| 30833 | case VE::PVFSUBLOrvml: |
| 30834 | case VE::PVFSUBLOrvml_v: |
| 30835 | case VE::PVFSUBUPivm: |
| 30836 | case VE::PVFSUBUPivmL: |
| 30837 | case VE::PVFSUBUPivmL_v: |
| 30838 | case VE::PVFSUBUPivm_v: |
| 30839 | case VE::PVFSUBUPivml: |
| 30840 | case VE::PVFSUBUPivml_v: |
| 30841 | case VE::PVFSUBUPrvm: |
| 30842 | case VE::PVFSUBUPrvmL: |
| 30843 | case VE::PVFSUBUPrvmL_v: |
| 30844 | case VE::PVFSUBUPrvm_v: |
| 30845 | case VE::PVFSUBUPrvml: |
| 30846 | case VE::PVFSUBUPrvml_v: |
| 30847 | case VE::PVFSUBivm: |
| 30848 | case VE::PVFSUBivmL: |
| 30849 | case VE::PVFSUBivmL_v: |
| 30850 | case VE::PVFSUBivm_v: |
| 30851 | case VE::PVFSUBivml: |
| 30852 | case VE::PVFSUBivml_v: |
| 30853 | case VE::PVFSUBrvm: |
| 30854 | case VE::PVFSUBrvmL: |
| 30855 | case VE::PVFSUBrvmL_v: |
| 30856 | case VE::PVFSUBrvm_v: |
| 30857 | case VE::PVFSUBrvml: |
| 30858 | case VE::PVFSUBrvml_v: |
| 30859 | case VE::PVMAXSLOivm: |
| 30860 | case VE::PVMAXSLOivmL: |
| 30861 | case VE::PVMAXSLOivmL_v: |
| 30862 | case VE::PVMAXSLOivm_v: |
| 30863 | case VE::PVMAXSLOivml: |
| 30864 | case VE::PVMAXSLOivml_v: |
| 30865 | case VE::PVMAXSLOrvm: |
| 30866 | case VE::PVMAXSLOrvmL: |
| 30867 | case VE::PVMAXSLOrvmL_v: |
| 30868 | case VE::PVMAXSLOrvm_v: |
| 30869 | case VE::PVMAXSLOrvml: |
| 30870 | case VE::PVMAXSLOrvml_v: |
| 30871 | case VE::PVMAXSUPivm: |
| 30872 | case VE::PVMAXSUPivmL: |
| 30873 | case VE::PVMAXSUPivmL_v: |
| 30874 | case VE::PVMAXSUPivm_v: |
| 30875 | case VE::PVMAXSUPivml: |
| 30876 | case VE::PVMAXSUPivml_v: |
| 30877 | case VE::PVMAXSUPrvm: |
| 30878 | case VE::PVMAXSUPrvmL: |
| 30879 | case VE::PVMAXSUPrvmL_v: |
| 30880 | case VE::PVMAXSUPrvm_v: |
| 30881 | case VE::PVMAXSUPrvml: |
| 30882 | case VE::PVMAXSUPrvml_v: |
| 30883 | case VE::PVMAXSivm: |
| 30884 | case VE::PVMAXSivmL: |
| 30885 | case VE::PVMAXSivmL_v: |
| 30886 | case VE::PVMAXSivm_v: |
| 30887 | case VE::PVMAXSivml: |
| 30888 | case VE::PVMAXSivml_v: |
| 30889 | case VE::PVMAXSrvm: |
| 30890 | case VE::PVMAXSrvmL: |
| 30891 | case VE::PVMAXSrvmL_v: |
| 30892 | case VE::PVMAXSrvm_v: |
| 30893 | case VE::PVMAXSrvml: |
| 30894 | case VE::PVMAXSrvml_v: |
| 30895 | case VE::PVMINSLOivm: |
| 30896 | case VE::PVMINSLOivmL: |
| 30897 | case VE::PVMINSLOivmL_v: |
| 30898 | case VE::PVMINSLOivm_v: |
| 30899 | case VE::PVMINSLOivml: |
| 30900 | case VE::PVMINSLOivml_v: |
| 30901 | case VE::PVMINSLOrvm: |
| 30902 | case VE::PVMINSLOrvmL: |
| 30903 | case VE::PVMINSLOrvmL_v: |
| 30904 | case VE::PVMINSLOrvm_v: |
| 30905 | case VE::PVMINSLOrvml: |
| 30906 | case VE::PVMINSLOrvml_v: |
| 30907 | case VE::PVMINSUPivm: |
| 30908 | case VE::PVMINSUPivmL: |
| 30909 | case VE::PVMINSUPivmL_v: |
| 30910 | case VE::PVMINSUPivm_v: |
| 30911 | case VE::PVMINSUPivml: |
| 30912 | case VE::PVMINSUPivml_v: |
| 30913 | case VE::PVMINSUPrvm: |
| 30914 | case VE::PVMINSUPrvmL: |
| 30915 | case VE::PVMINSUPrvmL_v: |
| 30916 | case VE::PVMINSUPrvm_v: |
| 30917 | case VE::PVMINSUPrvml: |
| 30918 | case VE::PVMINSUPrvml_v: |
| 30919 | case VE::PVMINSivm: |
| 30920 | case VE::PVMINSivmL: |
| 30921 | case VE::PVMINSivmL_v: |
| 30922 | case VE::PVMINSivm_v: |
| 30923 | case VE::PVMINSivml: |
| 30924 | case VE::PVMINSivml_v: |
| 30925 | case VE::PVMINSrvm: |
| 30926 | case VE::PVMINSrvmL: |
| 30927 | case VE::PVMINSrvmL_v: |
| 30928 | case VE::PVMINSrvm_v: |
| 30929 | case VE::PVMINSrvml: |
| 30930 | case VE::PVMINSrvml_v: |
| 30931 | case VE::PVORLOmvm: |
| 30932 | case VE::PVORLOmvmL: |
| 30933 | case VE::PVORLOmvmL_v: |
| 30934 | case VE::PVORLOmvm_v: |
| 30935 | case VE::PVORLOmvml: |
| 30936 | case VE::PVORLOmvml_v: |
| 30937 | case VE::PVORLOrvm: |
| 30938 | case VE::PVORLOrvmL: |
| 30939 | case VE::PVORLOrvmL_v: |
| 30940 | case VE::PVORLOrvm_v: |
| 30941 | case VE::PVORLOrvml: |
| 30942 | case VE::PVORLOrvml_v: |
| 30943 | case VE::PVORUPmvm: |
| 30944 | case VE::PVORUPmvmL: |
| 30945 | case VE::PVORUPmvmL_v: |
| 30946 | case VE::PVORUPmvm_v: |
| 30947 | case VE::PVORUPmvml: |
| 30948 | case VE::PVORUPmvml_v: |
| 30949 | case VE::PVORUPrvm: |
| 30950 | case VE::PVORUPrvmL: |
| 30951 | case VE::PVORUPrvmL_v: |
| 30952 | case VE::PVORUPrvm_v: |
| 30953 | case VE::PVORUPrvml: |
| 30954 | case VE::PVORUPrvml_v: |
| 30955 | case VE::PVORmvm: |
| 30956 | case VE::PVORmvmL: |
| 30957 | case VE::PVORmvmL_v: |
| 30958 | case VE::PVORmvm_v: |
| 30959 | case VE::PVORmvml: |
| 30960 | case VE::PVORmvml_v: |
| 30961 | case VE::PVORrvm: |
| 30962 | case VE::PVORrvmL: |
| 30963 | case VE::PVORrvmL_v: |
| 30964 | case VE::PVORrvm_v: |
| 30965 | case VE::PVORrvml: |
| 30966 | case VE::PVORrvml_v: |
| 30967 | case VE::PVSUBSLOivm: |
| 30968 | case VE::PVSUBSLOivmL: |
| 30969 | case VE::PVSUBSLOivmL_v: |
| 30970 | case VE::PVSUBSLOivm_v: |
| 30971 | case VE::PVSUBSLOivml: |
| 30972 | case VE::PVSUBSLOivml_v: |
| 30973 | case VE::PVSUBSLOrvm: |
| 30974 | case VE::PVSUBSLOrvmL: |
| 30975 | case VE::PVSUBSLOrvmL_v: |
| 30976 | case VE::PVSUBSLOrvm_v: |
| 30977 | case VE::PVSUBSLOrvml: |
| 30978 | case VE::PVSUBSLOrvml_v: |
| 30979 | case VE::PVSUBSUPivm: |
| 30980 | case VE::PVSUBSUPivmL: |
| 30981 | case VE::PVSUBSUPivmL_v: |
| 30982 | case VE::PVSUBSUPivm_v: |
| 30983 | case VE::PVSUBSUPivml: |
| 30984 | case VE::PVSUBSUPivml_v: |
| 30985 | case VE::PVSUBSUPrvm: |
| 30986 | case VE::PVSUBSUPrvmL: |
| 30987 | case VE::PVSUBSUPrvmL_v: |
| 30988 | case VE::PVSUBSUPrvm_v: |
| 30989 | case VE::PVSUBSUPrvml: |
| 30990 | case VE::PVSUBSUPrvml_v: |
| 30991 | case VE::PVSUBSivm: |
| 30992 | case VE::PVSUBSivmL: |
| 30993 | case VE::PVSUBSivmL_v: |
| 30994 | case VE::PVSUBSivm_v: |
| 30995 | case VE::PVSUBSivml: |
| 30996 | case VE::PVSUBSivml_v: |
| 30997 | case VE::PVSUBSrvm: |
| 30998 | case VE::PVSUBSrvmL: |
| 30999 | case VE::PVSUBSrvmL_v: |
| 31000 | case VE::PVSUBSrvm_v: |
| 31001 | case VE::PVSUBSrvml: |
| 31002 | case VE::PVSUBSrvml_v: |
| 31003 | case VE::PVSUBULOivm: |
| 31004 | case VE::PVSUBULOivmL: |
| 31005 | case VE::PVSUBULOivmL_v: |
| 31006 | case VE::PVSUBULOivm_v: |
| 31007 | case VE::PVSUBULOivml: |
| 31008 | case VE::PVSUBULOivml_v: |
| 31009 | case VE::PVSUBULOrvm: |
| 31010 | case VE::PVSUBULOrvmL: |
| 31011 | case VE::PVSUBULOrvmL_v: |
| 31012 | case VE::PVSUBULOrvm_v: |
| 31013 | case VE::PVSUBULOrvml: |
| 31014 | case VE::PVSUBULOrvml_v: |
| 31015 | case VE::PVSUBUUPivm: |
| 31016 | case VE::PVSUBUUPivmL: |
| 31017 | case VE::PVSUBUUPivmL_v: |
| 31018 | case VE::PVSUBUUPivm_v: |
| 31019 | case VE::PVSUBUUPivml: |
| 31020 | case VE::PVSUBUUPivml_v: |
| 31021 | case VE::PVSUBUUPrvm: |
| 31022 | case VE::PVSUBUUPrvmL: |
| 31023 | case VE::PVSUBUUPrvmL_v: |
| 31024 | case VE::PVSUBUUPrvm_v: |
| 31025 | case VE::PVSUBUUPrvml: |
| 31026 | case VE::PVSUBUUPrvml_v: |
| 31027 | case VE::PVSUBUivm: |
| 31028 | case VE::PVSUBUivmL: |
| 31029 | case VE::PVSUBUivmL_v: |
| 31030 | case VE::PVSUBUivm_v: |
| 31031 | case VE::PVSUBUivml: |
| 31032 | case VE::PVSUBUivml_v: |
| 31033 | case VE::PVSUBUrvm: |
| 31034 | case VE::PVSUBUrvmL: |
| 31035 | case VE::PVSUBUrvmL_v: |
| 31036 | case VE::PVSUBUrvm_v: |
| 31037 | case VE::PVSUBUrvml: |
| 31038 | case VE::PVSUBUrvml_v: |
| 31039 | case VE::PVXORLOmvm: |
| 31040 | case VE::PVXORLOmvmL: |
| 31041 | case VE::PVXORLOmvmL_v: |
| 31042 | case VE::PVXORLOmvm_v: |
| 31043 | case VE::PVXORLOmvml: |
| 31044 | case VE::PVXORLOmvml_v: |
| 31045 | case VE::PVXORLOrvm: |
| 31046 | case VE::PVXORLOrvmL: |
| 31047 | case VE::PVXORLOrvmL_v: |
| 31048 | case VE::PVXORLOrvm_v: |
| 31049 | case VE::PVXORLOrvml: |
| 31050 | case VE::PVXORLOrvml_v: |
| 31051 | case VE::PVXORUPmvm: |
| 31052 | case VE::PVXORUPmvmL: |
| 31053 | case VE::PVXORUPmvmL_v: |
| 31054 | case VE::PVXORUPmvm_v: |
| 31055 | case VE::PVXORUPmvml: |
| 31056 | case VE::PVXORUPmvml_v: |
| 31057 | case VE::PVXORUPrvm: |
| 31058 | case VE::PVXORUPrvmL: |
| 31059 | case VE::PVXORUPrvmL_v: |
| 31060 | case VE::PVXORUPrvm_v: |
| 31061 | case VE::PVXORUPrvml: |
| 31062 | case VE::PVXORUPrvml_v: |
| 31063 | case VE::PVXORmvm: |
| 31064 | case VE::PVXORmvmL: |
| 31065 | case VE::PVXORmvmL_v: |
| 31066 | case VE::PVXORmvm_v: |
| 31067 | case VE::PVXORmvml: |
| 31068 | case VE::PVXORmvml_v: |
| 31069 | case VE::PVXORrvm: |
| 31070 | case VE::PVXORrvmL: |
| 31071 | case VE::PVXORrvmL_v: |
| 31072 | case VE::PVXORrvm_v: |
| 31073 | case VE::PVXORrvml: |
| 31074 | case VE::PVXORrvml_v: |
| 31075 | case VE::VADDSLivm: |
| 31076 | case VE::VADDSLivmL: |
| 31077 | case VE::VADDSLivmL_v: |
| 31078 | case VE::VADDSLivm_v: |
| 31079 | case VE::VADDSLivml: |
| 31080 | case VE::VADDSLivml_v: |
| 31081 | case VE::VADDSLrvm: |
| 31082 | case VE::VADDSLrvmL: |
| 31083 | case VE::VADDSLrvmL_v: |
| 31084 | case VE::VADDSLrvm_v: |
| 31085 | case VE::VADDSLrvml: |
| 31086 | case VE::VADDSLrvml_v: |
| 31087 | case VE::VADDSWSXivm: |
| 31088 | case VE::VADDSWSXivmL: |
| 31089 | case VE::VADDSWSXivmL_v: |
| 31090 | case VE::VADDSWSXivm_v: |
| 31091 | case VE::VADDSWSXivml: |
| 31092 | case VE::VADDSWSXivml_v: |
| 31093 | case VE::VADDSWSXrvm: |
| 31094 | case VE::VADDSWSXrvmL: |
| 31095 | case VE::VADDSWSXrvmL_v: |
| 31096 | case VE::VADDSWSXrvm_v: |
| 31097 | case VE::VADDSWSXrvml: |
| 31098 | case VE::VADDSWSXrvml_v: |
| 31099 | case VE::VADDSWZXivm: |
| 31100 | case VE::VADDSWZXivmL: |
| 31101 | case VE::VADDSWZXivmL_v: |
| 31102 | case VE::VADDSWZXivm_v: |
| 31103 | case VE::VADDSWZXivml: |
| 31104 | case VE::VADDSWZXivml_v: |
| 31105 | case VE::VADDSWZXrvm: |
| 31106 | case VE::VADDSWZXrvmL: |
| 31107 | case VE::VADDSWZXrvmL_v: |
| 31108 | case VE::VADDSWZXrvm_v: |
| 31109 | case VE::VADDSWZXrvml: |
| 31110 | case VE::VADDSWZXrvml_v: |
| 31111 | case VE::VADDULivm: |
| 31112 | case VE::VADDULivmL: |
| 31113 | case VE::VADDULivmL_v: |
| 31114 | case VE::VADDULivm_v: |
| 31115 | case VE::VADDULivml: |
| 31116 | case VE::VADDULivml_v: |
| 31117 | case VE::VADDULrvm: |
| 31118 | case VE::VADDULrvmL: |
| 31119 | case VE::VADDULrvmL_v: |
| 31120 | case VE::VADDULrvm_v: |
| 31121 | case VE::VADDULrvml: |
| 31122 | case VE::VADDULrvml_v: |
| 31123 | case VE::VADDUWivm: |
| 31124 | case VE::VADDUWivmL: |
| 31125 | case VE::VADDUWivmL_v: |
| 31126 | case VE::VADDUWivm_v: |
| 31127 | case VE::VADDUWivml: |
| 31128 | case VE::VADDUWivml_v: |
| 31129 | case VE::VADDUWrvm: |
| 31130 | case VE::VADDUWrvmL: |
| 31131 | case VE::VADDUWrvmL_v: |
| 31132 | case VE::VADDUWrvm_v: |
| 31133 | case VE::VADDUWrvml: |
| 31134 | case VE::VADDUWrvml_v: |
| 31135 | case VE::VANDmvm: |
| 31136 | case VE::VANDmvmL: |
| 31137 | case VE::VANDmvmL_v: |
| 31138 | case VE::VANDmvm_v: |
| 31139 | case VE::VANDmvml: |
| 31140 | case VE::VANDmvml_v: |
| 31141 | case VE::VANDrvm: |
| 31142 | case VE::VANDrvmL: |
| 31143 | case VE::VANDrvmL_v: |
| 31144 | case VE::VANDrvm_v: |
| 31145 | case VE::VANDrvml: |
| 31146 | case VE::VANDrvml_v: |
| 31147 | case VE::VCMPSLivm: |
| 31148 | case VE::VCMPSLivmL: |
| 31149 | case VE::VCMPSLivmL_v: |
| 31150 | case VE::VCMPSLivm_v: |
| 31151 | case VE::VCMPSLivml: |
| 31152 | case VE::VCMPSLivml_v: |
| 31153 | case VE::VCMPSLrvm: |
| 31154 | case VE::VCMPSLrvmL: |
| 31155 | case VE::VCMPSLrvmL_v: |
| 31156 | case VE::VCMPSLrvm_v: |
| 31157 | case VE::VCMPSLrvml: |
| 31158 | case VE::VCMPSLrvml_v: |
| 31159 | case VE::VCMPSWSXivm: |
| 31160 | case VE::VCMPSWSXivmL: |
| 31161 | case VE::VCMPSWSXivmL_v: |
| 31162 | case VE::VCMPSWSXivm_v: |
| 31163 | case VE::VCMPSWSXivml: |
| 31164 | case VE::VCMPSWSXivml_v: |
| 31165 | case VE::VCMPSWSXrvm: |
| 31166 | case VE::VCMPSWSXrvmL: |
| 31167 | case VE::VCMPSWSXrvmL_v: |
| 31168 | case VE::VCMPSWSXrvm_v: |
| 31169 | case VE::VCMPSWSXrvml: |
| 31170 | case VE::VCMPSWSXrvml_v: |
| 31171 | case VE::VCMPSWZXivm: |
| 31172 | case VE::VCMPSWZXivmL: |
| 31173 | case VE::VCMPSWZXivmL_v: |
| 31174 | case VE::VCMPSWZXivm_v: |
| 31175 | case VE::VCMPSWZXivml: |
| 31176 | case VE::VCMPSWZXivml_v: |
| 31177 | case VE::VCMPSWZXrvm: |
| 31178 | case VE::VCMPSWZXrvmL: |
| 31179 | case VE::VCMPSWZXrvmL_v: |
| 31180 | case VE::VCMPSWZXrvm_v: |
| 31181 | case VE::VCMPSWZXrvml: |
| 31182 | case VE::VCMPSWZXrvml_v: |
| 31183 | case VE::VCMPULivm: |
| 31184 | case VE::VCMPULivmL: |
| 31185 | case VE::VCMPULivmL_v: |
| 31186 | case VE::VCMPULivm_v: |
| 31187 | case VE::VCMPULivml: |
| 31188 | case VE::VCMPULivml_v: |
| 31189 | case VE::VCMPULrvm: |
| 31190 | case VE::VCMPULrvmL: |
| 31191 | case VE::VCMPULrvmL_v: |
| 31192 | case VE::VCMPULrvm_v: |
| 31193 | case VE::VCMPULrvml: |
| 31194 | case VE::VCMPULrvml_v: |
| 31195 | case VE::VCMPUWivm: |
| 31196 | case VE::VCMPUWivmL: |
| 31197 | case VE::VCMPUWivmL_v: |
| 31198 | case VE::VCMPUWivm_v: |
| 31199 | case VE::VCMPUWivml: |
| 31200 | case VE::VCMPUWivml_v: |
| 31201 | case VE::VCMPUWrvm: |
| 31202 | case VE::VCMPUWrvmL: |
| 31203 | case VE::VCMPUWrvmL_v: |
| 31204 | case VE::VCMPUWrvm_v: |
| 31205 | case VE::VCMPUWrvml: |
| 31206 | case VE::VCMPUWrvml_v: |
| 31207 | case VE::VDIVSLivm: |
| 31208 | case VE::VDIVSLivmL: |
| 31209 | case VE::VDIVSLivmL_v: |
| 31210 | case VE::VDIVSLivm_v: |
| 31211 | case VE::VDIVSLivml: |
| 31212 | case VE::VDIVSLivml_v: |
| 31213 | case VE::VDIVSLrvm: |
| 31214 | case VE::VDIVSLrvmL: |
| 31215 | case VE::VDIVSLrvmL_v: |
| 31216 | case VE::VDIVSLrvm_v: |
| 31217 | case VE::VDIVSLrvml: |
| 31218 | case VE::VDIVSLrvml_v: |
| 31219 | case VE::VDIVSWSXivm: |
| 31220 | case VE::VDIVSWSXivmL: |
| 31221 | case VE::VDIVSWSXivmL_v: |
| 31222 | case VE::VDIVSWSXivm_v: |
| 31223 | case VE::VDIVSWSXivml: |
| 31224 | case VE::VDIVSWSXivml_v: |
| 31225 | case VE::VDIVSWSXrvm: |
| 31226 | case VE::VDIVSWSXrvmL: |
| 31227 | case VE::VDIVSWSXrvmL_v: |
| 31228 | case VE::VDIVSWSXrvm_v: |
| 31229 | case VE::VDIVSWSXrvml: |
| 31230 | case VE::VDIVSWSXrvml_v: |
| 31231 | case VE::VDIVSWZXivm: |
| 31232 | case VE::VDIVSWZXivmL: |
| 31233 | case VE::VDIVSWZXivmL_v: |
| 31234 | case VE::VDIVSWZXivm_v: |
| 31235 | case VE::VDIVSWZXivml: |
| 31236 | case VE::VDIVSWZXivml_v: |
| 31237 | case VE::VDIVSWZXrvm: |
| 31238 | case VE::VDIVSWZXrvmL: |
| 31239 | case VE::VDIVSWZXrvmL_v: |
| 31240 | case VE::VDIVSWZXrvm_v: |
| 31241 | case VE::VDIVSWZXrvml: |
| 31242 | case VE::VDIVSWZXrvml_v: |
| 31243 | case VE::VDIVULivm: |
| 31244 | case VE::VDIVULivmL: |
| 31245 | case VE::VDIVULivmL_v: |
| 31246 | case VE::VDIVULivm_v: |
| 31247 | case VE::VDIVULivml: |
| 31248 | case VE::VDIVULivml_v: |
| 31249 | case VE::VDIVULrvm: |
| 31250 | case VE::VDIVULrvmL: |
| 31251 | case VE::VDIVULrvmL_v: |
| 31252 | case VE::VDIVULrvm_v: |
| 31253 | case VE::VDIVULrvml: |
| 31254 | case VE::VDIVULrvml_v: |
| 31255 | case VE::VDIVUWivm: |
| 31256 | case VE::VDIVUWivmL: |
| 31257 | case VE::VDIVUWivmL_v: |
| 31258 | case VE::VDIVUWivm_v: |
| 31259 | case VE::VDIVUWivml: |
| 31260 | case VE::VDIVUWivml_v: |
| 31261 | case VE::VDIVUWrvm: |
| 31262 | case VE::VDIVUWrvmL: |
| 31263 | case VE::VDIVUWrvmL_v: |
| 31264 | case VE::VDIVUWrvm_v: |
| 31265 | case VE::VDIVUWrvml: |
| 31266 | case VE::VDIVUWrvml_v: |
| 31267 | case VE::VEQVmvm: |
| 31268 | case VE::VEQVmvmL: |
| 31269 | case VE::VEQVmvmL_v: |
| 31270 | case VE::VEQVmvm_v: |
| 31271 | case VE::VEQVmvml: |
| 31272 | case VE::VEQVmvml_v: |
| 31273 | case VE::VEQVrvm: |
| 31274 | case VE::VEQVrvmL: |
| 31275 | case VE::VEQVrvmL_v: |
| 31276 | case VE::VEQVrvm_v: |
| 31277 | case VE::VEQVrvml: |
| 31278 | case VE::VEQVrvml_v: |
| 31279 | case VE::VFADDDivm: |
| 31280 | case VE::VFADDDivmL: |
| 31281 | case VE::VFADDDivmL_v: |
| 31282 | case VE::VFADDDivm_v: |
| 31283 | case VE::VFADDDivml: |
| 31284 | case VE::VFADDDivml_v: |
| 31285 | case VE::VFADDDrvm: |
| 31286 | case VE::VFADDDrvmL: |
| 31287 | case VE::VFADDDrvmL_v: |
| 31288 | case VE::VFADDDrvm_v: |
| 31289 | case VE::VFADDDrvml: |
| 31290 | case VE::VFADDDrvml_v: |
| 31291 | case VE::VFADDSivm: |
| 31292 | case VE::VFADDSivmL: |
| 31293 | case VE::VFADDSivmL_v: |
| 31294 | case VE::VFADDSivm_v: |
| 31295 | case VE::VFADDSivml: |
| 31296 | case VE::VFADDSivml_v: |
| 31297 | case VE::VFADDSrvm: |
| 31298 | case VE::VFADDSrvmL: |
| 31299 | case VE::VFADDSrvmL_v: |
| 31300 | case VE::VFADDSrvm_v: |
| 31301 | case VE::VFADDSrvml: |
| 31302 | case VE::VFADDSrvml_v: |
| 31303 | case VE::VFCMPDivm: |
| 31304 | case VE::VFCMPDivmL: |
| 31305 | case VE::VFCMPDivmL_v: |
| 31306 | case VE::VFCMPDivm_v: |
| 31307 | case VE::VFCMPDivml: |
| 31308 | case VE::VFCMPDivml_v: |
| 31309 | case VE::VFCMPDrvm: |
| 31310 | case VE::VFCMPDrvmL: |
| 31311 | case VE::VFCMPDrvmL_v: |
| 31312 | case VE::VFCMPDrvm_v: |
| 31313 | case VE::VFCMPDrvml: |
| 31314 | case VE::VFCMPDrvml_v: |
| 31315 | case VE::VFCMPSivm: |
| 31316 | case VE::VFCMPSivmL: |
| 31317 | case VE::VFCMPSivmL_v: |
| 31318 | case VE::VFCMPSivm_v: |
| 31319 | case VE::VFCMPSivml: |
| 31320 | case VE::VFCMPSivml_v: |
| 31321 | case VE::VFCMPSrvm: |
| 31322 | case VE::VFCMPSrvmL: |
| 31323 | case VE::VFCMPSrvmL_v: |
| 31324 | case VE::VFCMPSrvm_v: |
| 31325 | case VE::VFCMPSrvml: |
| 31326 | case VE::VFCMPSrvml_v: |
| 31327 | case VE::VFDIVDivm: |
| 31328 | case VE::VFDIVDivmL: |
| 31329 | case VE::VFDIVDivmL_v: |
| 31330 | case VE::VFDIVDivm_v: |
| 31331 | case VE::VFDIVDivml: |
| 31332 | case VE::VFDIVDivml_v: |
| 31333 | case VE::VFDIVDrvm: |
| 31334 | case VE::VFDIVDrvmL: |
| 31335 | case VE::VFDIVDrvmL_v: |
| 31336 | case VE::VFDIVDrvm_v: |
| 31337 | case VE::VFDIVDrvml: |
| 31338 | case VE::VFDIVDrvml_v: |
| 31339 | case VE::VFDIVSivm: |
| 31340 | case VE::VFDIVSivmL: |
| 31341 | case VE::VFDIVSivmL_v: |
| 31342 | case VE::VFDIVSivm_v: |
| 31343 | case VE::VFDIVSivml: |
| 31344 | case VE::VFDIVSivml_v: |
| 31345 | case VE::VFDIVSrvm: |
| 31346 | case VE::VFDIVSrvmL: |
| 31347 | case VE::VFDIVSrvmL_v: |
| 31348 | case VE::VFDIVSrvm_v: |
| 31349 | case VE::VFDIVSrvml: |
| 31350 | case VE::VFDIVSrvml_v: |
| 31351 | case VE::VFMAXDivm: |
| 31352 | case VE::VFMAXDivmL: |
| 31353 | case VE::VFMAXDivmL_v: |
| 31354 | case VE::VFMAXDivm_v: |
| 31355 | case VE::VFMAXDivml: |
| 31356 | case VE::VFMAXDivml_v: |
| 31357 | case VE::VFMAXDrvm: |
| 31358 | case VE::VFMAXDrvmL: |
| 31359 | case VE::VFMAXDrvmL_v: |
| 31360 | case VE::VFMAXDrvm_v: |
| 31361 | case VE::VFMAXDrvml: |
| 31362 | case VE::VFMAXDrvml_v: |
| 31363 | case VE::VFMAXSivm: |
| 31364 | case VE::VFMAXSivmL: |
| 31365 | case VE::VFMAXSivmL_v: |
| 31366 | case VE::VFMAXSivm_v: |
| 31367 | case VE::VFMAXSivml: |
| 31368 | case VE::VFMAXSivml_v: |
| 31369 | case VE::VFMAXSrvm: |
| 31370 | case VE::VFMAXSrvmL: |
| 31371 | case VE::VFMAXSrvmL_v: |
| 31372 | case VE::VFMAXSrvm_v: |
| 31373 | case VE::VFMAXSrvml: |
| 31374 | case VE::VFMAXSrvml_v: |
| 31375 | case VE::VFMINDivm: |
| 31376 | case VE::VFMINDivmL: |
| 31377 | case VE::VFMINDivmL_v: |
| 31378 | case VE::VFMINDivm_v: |
| 31379 | case VE::VFMINDivml: |
| 31380 | case VE::VFMINDivml_v: |
| 31381 | case VE::VFMINDrvm: |
| 31382 | case VE::VFMINDrvmL: |
| 31383 | case VE::VFMINDrvmL_v: |
| 31384 | case VE::VFMINDrvm_v: |
| 31385 | case VE::VFMINDrvml: |
| 31386 | case VE::VFMINDrvml_v: |
| 31387 | case VE::VFMINSivm: |
| 31388 | case VE::VFMINSivmL: |
| 31389 | case VE::VFMINSivmL_v: |
| 31390 | case VE::VFMINSivm_v: |
| 31391 | case VE::VFMINSivml: |
| 31392 | case VE::VFMINSivml_v: |
| 31393 | case VE::VFMINSrvm: |
| 31394 | case VE::VFMINSrvmL: |
| 31395 | case VE::VFMINSrvmL_v: |
| 31396 | case VE::VFMINSrvm_v: |
| 31397 | case VE::VFMINSrvml: |
| 31398 | case VE::VFMINSrvml_v: |
| 31399 | case VE::VFMULDivm: |
| 31400 | case VE::VFMULDivmL: |
| 31401 | case VE::VFMULDivmL_v: |
| 31402 | case VE::VFMULDivm_v: |
| 31403 | case VE::VFMULDivml: |
| 31404 | case VE::VFMULDivml_v: |
| 31405 | case VE::VFMULDrvm: |
| 31406 | case VE::VFMULDrvmL: |
| 31407 | case VE::VFMULDrvmL_v: |
| 31408 | case VE::VFMULDrvm_v: |
| 31409 | case VE::VFMULDrvml: |
| 31410 | case VE::VFMULDrvml_v: |
| 31411 | case VE::VFMULSivm: |
| 31412 | case VE::VFMULSivmL: |
| 31413 | case VE::VFMULSivmL_v: |
| 31414 | case VE::VFMULSivm_v: |
| 31415 | case VE::VFMULSivml: |
| 31416 | case VE::VFMULSivml_v: |
| 31417 | case VE::VFMULSrvm: |
| 31418 | case VE::VFMULSrvmL: |
| 31419 | case VE::VFMULSrvmL_v: |
| 31420 | case VE::VFMULSrvm_v: |
| 31421 | case VE::VFMULSrvml: |
| 31422 | case VE::VFMULSrvml_v: |
| 31423 | case VE::VFSUBDivm: |
| 31424 | case VE::VFSUBDivmL: |
| 31425 | case VE::VFSUBDivmL_v: |
| 31426 | case VE::VFSUBDivm_v: |
| 31427 | case VE::VFSUBDivml: |
| 31428 | case VE::VFSUBDivml_v: |
| 31429 | case VE::VFSUBDrvm: |
| 31430 | case VE::VFSUBDrvmL: |
| 31431 | case VE::VFSUBDrvmL_v: |
| 31432 | case VE::VFSUBDrvm_v: |
| 31433 | case VE::VFSUBDrvml: |
| 31434 | case VE::VFSUBDrvml_v: |
| 31435 | case VE::VFSUBSivm: |
| 31436 | case VE::VFSUBSivmL: |
| 31437 | case VE::VFSUBSivmL_v: |
| 31438 | case VE::VFSUBSivm_v: |
| 31439 | case VE::VFSUBSivml: |
| 31440 | case VE::VFSUBSivml_v: |
| 31441 | case VE::VFSUBSrvm: |
| 31442 | case VE::VFSUBSrvmL: |
| 31443 | case VE::VFSUBSrvmL_v: |
| 31444 | case VE::VFSUBSrvm_v: |
| 31445 | case VE::VFSUBSrvml: |
| 31446 | case VE::VFSUBSrvml_v: |
| 31447 | case VE::VMAXSLivm: |
| 31448 | case VE::VMAXSLivmL: |
| 31449 | case VE::VMAXSLivmL_v: |
| 31450 | case VE::VMAXSLivm_v: |
| 31451 | case VE::VMAXSLivml: |
| 31452 | case VE::VMAXSLivml_v: |
| 31453 | case VE::VMAXSLrvm: |
| 31454 | case VE::VMAXSLrvmL: |
| 31455 | case VE::VMAXSLrvmL_v: |
| 31456 | case VE::VMAXSLrvm_v: |
| 31457 | case VE::VMAXSLrvml: |
| 31458 | case VE::VMAXSLrvml_v: |
| 31459 | case VE::VMAXSWSXivm: |
| 31460 | case VE::VMAXSWSXivmL: |
| 31461 | case VE::VMAXSWSXivmL_v: |
| 31462 | case VE::VMAXSWSXivm_v: |
| 31463 | case VE::VMAXSWSXivml: |
| 31464 | case VE::VMAXSWSXivml_v: |
| 31465 | case VE::VMAXSWSXrvm: |
| 31466 | case VE::VMAXSWSXrvmL: |
| 31467 | case VE::VMAXSWSXrvmL_v: |
| 31468 | case VE::VMAXSWSXrvm_v: |
| 31469 | case VE::VMAXSWSXrvml: |
| 31470 | case VE::VMAXSWSXrvml_v: |
| 31471 | case VE::VMAXSWZXivm: |
| 31472 | case VE::VMAXSWZXivmL: |
| 31473 | case VE::VMAXSWZXivmL_v: |
| 31474 | case VE::VMAXSWZXivm_v: |
| 31475 | case VE::VMAXSWZXivml: |
| 31476 | case VE::VMAXSWZXivml_v: |
| 31477 | case VE::VMAXSWZXrvm: |
| 31478 | case VE::VMAXSWZXrvmL: |
| 31479 | case VE::VMAXSWZXrvmL_v: |
| 31480 | case VE::VMAXSWZXrvm_v: |
| 31481 | case VE::VMAXSWZXrvml: |
| 31482 | case VE::VMAXSWZXrvml_v: |
| 31483 | case VE::VMINSLivm: |
| 31484 | case VE::VMINSLivmL: |
| 31485 | case VE::VMINSLivmL_v: |
| 31486 | case VE::VMINSLivm_v: |
| 31487 | case VE::VMINSLivml: |
| 31488 | case VE::VMINSLivml_v: |
| 31489 | case VE::VMINSLrvm: |
| 31490 | case VE::VMINSLrvmL: |
| 31491 | case VE::VMINSLrvmL_v: |
| 31492 | case VE::VMINSLrvm_v: |
| 31493 | case VE::VMINSLrvml: |
| 31494 | case VE::VMINSLrvml_v: |
| 31495 | case VE::VMINSWSXivm: |
| 31496 | case VE::VMINSWSXivmL: |
| 31497 | case VE::VMINSWSXivmL_v: |
| 31498 | case VE::VMINSWSXivm_v: |
| 31499 | case VE::VMINSWSXivml: |
| 31500 | case VE::VMINSWSXivml_v: |
| 31501 | case VE::VMINSWSXrvm: |
| 31502 | case VE::VMINSWSXrvmL: |
| 31503 | case VE::VMINSWSXrvmL_v: |
| 31504 | case VE::VMINSWSXrvm_v: |
| 31505 | case VE::VMINSWSXrvml: |
| 31506 | case VE::VMINSWSXrvml_v: |
| 31507 | case VE::VMINSWZXivm: |
| 31508 | case VE::VMINSWZXivmL: |
| 31509 | case VE::VMINSWZXivmL_v: |
| 31510 | case VE::VMINSWZXivm_v: |
| 31511 | case VE::VMINSWZXivml: |
| 31512 | case VE::VMINSWZXivml_v: |
| 31513 | case VE::VMINSWZXrvm: |
| 31514 | case VE::VMINSWZXrvmL: |
| 31515 | case VE::VMINSWZXrvmL_v: |
| 31516 | case VE::VMINSWZXrvm_v: |
| 31517 | case VE::VMINSWZXrvml: |
| 31518 | case VE::VMINSWZXrvml_v: |
| 31519 | case VE::VMRGWivm: |
| 31520 | case VE::VMRGWivmL: |
| 31521 | case VE::VMRGWivmL_v: |
| 31522 | case VE::VMRGWivm_v: |
| 31523 | case VE::VMRGWivml: |
| 31524 | case VE::VMRGWivml_v: |
| 31525 | case VE::VMRGWrvm: |
| 31526 | case VE::VMRGWrvmL: |
| 31527 | case VE::VMRGWrvmL_v: |
| 31528 | case VE::VMRGWrvm_v: |
| 31529 | case VE::VMRGWrvml: |
| 31530 | case VE::VMRGWrvml_v: |
| 31531 | case VE::VMRGivm: |
| 31532 | case VE::VMRGivmL: |
| 31533 | case VE::VMRGivmL_v: |
| 31534 | case VE::VMRGivm_v: |
| 31535 | case VE::VMRGivml: |
| 31536 | case VE::VMRGivml_v: |
| 31537 | case VE::VMRGrvm: |
| 31538 | case VE::VMRGrvmL: |
| 31539 | case VE::VMRGrvmL_v: |
| 31540 | case VE::VMRGrvm_v: |
| 31541 | case VE::VMRGrvml: |
| 31542 | case VE::VMRGrvml_v: |
| 31543 | case VE::VMULSLWivm: |
| 31544 | case VE::VMULSLWivmL: |
| 31545 | case VE::VMULSLWivmL_v: |
| 31546 | case VE::VMULSLWivm_v: |
| 31547 | case VE::VMULSLWivml: |
| 31548 | case VE::VMULSLWivml_v: |
| 31549 | case VE::VMULSLWrvm: |
| 31550 | case VE::VMULSLWrvmL: |
| 31551 | case VE::VMULSLWrvmL_v: |
| 31552 | case VE::VMULSLWrvm_v: |
| 31553 | case VE::VMULSLWrvml: |
| 31554 | case VE::VMULSLWrvml_v: |
| 31555 | case VE::VMULSLivm: |
| 31556 | case VE::VMULSLivmL: |
| 31557 | case VE::VMULSLivmL_v: |
| 31558 | case VE::VMULSLivm_v: |
| 31559 | case VE::VMULSLivml: |
| 31560 | case VE::VMULSLivml_v: |
| 31561 | case VE::VMULSLrvm: |
| 31562 | case VE::VMULSLrvmL: |
| 31563 | case VE::VMULSLrvmL_v: |
| 31564 | case VE::VMULSLrvm_v: |
| 31565 | case VE::VMULSLrvml: |
| 31566 | case VE::VMULSLrvml_v: |
| 31567 | case VE::VMULSWSXivm: |
| 31568 | case VE::VMULSWSXivmL: |
| 31569 | case VE::VMULSWSXivmL_v: |
| 31570 | case VE::VMULSWSXivm_v: |
| 31571 | case VE::VMULSWSXivml: |
| 31572 | case VE::VMULSWSXivml_v: |
| 31573 | case VE::VMULSWSXrvm: |
| 31574 | case VE::VMULSWSXrvmL: |
| 31575 | case VE::VMULSWSXrvmL_v: |
| 31576 | case VE::VMULSWSXrvm_v: |
| 31577 | case VE::VMULSWSXrvml: |
| 31578 | case VE::VMULSWSXrvml_v: |
| 31579 | case VE::VMULSWZXivm: |
| 31580 | case VE::VMULSWZXivmL: |
| 31581 | case VE::VMULSWZXivmL_v: |
| 31582 | case VE::VMULSWZXivm_v: |
| 31583 | case VE::VMULSWZXivml: |
| 31584 | case VE::VMULSWZXivml_v: |
| 31585 | case VE::VMULSWZXrvm: |
| 31586 | case VE::VMULSWZXrvmL: |
| 31587 | case VE::VMULSWZXrvmL_v: |
| 31588 | case VE::VMULSWZXrvm_v: |
| 31589 | case VE::VMULSWZXrvml: |
| 31590 | case VE::VMULSWZXrvml_v: |
| 31591 | case VE::VMULULivm: |
| 31592 | case VE::VMULULivmL: |
| 31593 | case VE::VMULULivmL_v: |
| 31594 | case VE::VMULULivm_v: |
| 31595 | case VE::VMULULivml: |
| 31596 | case VE::VMULULivml_v: |
| 31597 | case VE::VMULULrvm: |
| 31598 | case VE::VMULULrvmL: |
| 31599 | case VE::VMULULrvmL_v: |
| 31600 | case VE::VMULULrvm_v: |
| 31601 | case VE::VMULULrvml: |
| 31602 | case VE::VMULULrvml_v: |
| 31603 | case VE::VMULUWivm: |
| 31604 | case VE::VMULUWivmL: |
| 31605 | case VE::VMULUWivmL_v: |
| 31606 | case VE::VMULUWivm_v: |
| 31607 | case VE::VMULUWivml: |
| 31608 | case VE::VMULUWivml_v: |
| 31609 | case VE::VMULUWrvm: |
| 31610 | case VE::VMULUWrvmL: |
| 31611 | case VE::VMULUWrvmL_v: |
| 31612 | case VE::VMULUWrvm_v: |
| 31613 | case VE::VMULUWrvml: |
| 31614 | case VE::VMULUWrvml_v: |
| 31615 | case VE::VMVivm: |
| 31616 | case VE::VMVivmL: |
| 31617 | case VE::VMVivmL_v: |
| 31618 | case VE::VMVivm_v: |
| 31619 | case VE::VMVivml: |
| 31620 | case VE::VMVivml_v: |
| 31621 | case VE::VMVrvm: |
| 31622 | case VE::VMVrvmL: |
| 31623 | case VE::VMVrvmL_v: |
| 31624 | case VE::VMVrvm_v: |
| 31625 | case VE::VMVrvml: |
| 31626 | case VE::VMVrvml_v: |
| 31627 | case VE::VORmvm: |
| 31628 | case VE::VORmvmL: |
| 31629 | case VE::VORmvmL_v: |
| 31630 | case VE::VORmvm_v: |
| 31631 | case VE::VORmvml: |
| 31632 | case VE::VORmvml_v: |
| 31633 | case VE::VORrvm: |
| 31634 | case VE::VORrvmL: |
| 31635 | case VE::VORrvmL_v: |
| 31636 | case VE::VORrvm_v: |
| 31637 | case VE::VORrvml: |
| 31638 | case VE::VORrvml_v: |
| 31639 | case VE::VSUBSLivm: |
| 31640 | case VE::VSUBSLivmL: |
| 31641 | case VE::VSUBSLivmL_v: |
| 31642 | case VE::VSUBSLivm_v: |
| 31643 | case VE::VSUBSLivml: |
| 31644 | case VE::VSUBSLivml_v: |
| 31645 | case VE::VSUBSLrvm: |
| 31646 | case VE::VSUBSLrvmL: |
| 31647 | case VE::VSUBSLrvmL_v: |
| 31648 | case VE::VSUBSLrvm_v: |
| 31649 | case VE::VSUBSLrvml: |
| 31650 | case VE::VSUBSLrvml_v: |
| 31651 | case VE::VSUBSWSXivm: |
| 31652 | case VE::VSUBSWSXivmL: |
| 31653 | case VE::VSUBSWSXivmL_v: |
| 31654 | case VE::VSUBSWSXivm_v: |
| 31655 | case VE::VSUBSWSXivml: |
| 31656 | case VE::VSUBSWSXivml_v: |
| 31657 | case VE::VSUBSWSXrvm: |
| 31658 | case VE::VSUBSWSXrvmL: |
| 31659 | case VE::VSUBSWSXrvmL_v: |
| 31660 | case VE::VSUBSWSXrvm_v: |
| 31661 | case VE::VSUBSWSXrvml: |
| 31662 | case VE::VSUBSWSXrvml_v: |
| 31663 | case VE::VSUBSWZXivm: |
| 31664 | case VE::VSUBSWZXivmL: |
| 31665 | case VE::VSUBSWZXivmL_v: |
| 31666 | case VE::VSUBSWZXivm_v: |
| 31667 | case VE::VSUBSWZXivml: |
| 31668 | case VE::VSUBSWZXivml_v: |
| 31669 | case VE::VSUBSWZXrvm: |
| 31670 | case VE::VSUBSWZXrvmL: |
| 31671 | case VE::VSUBSWZXrvmL_v: |
| 31672 | case VE::VSUBSWZXrvm_v: |
| 31673 | case VE::VSUBSWZXrvml: |
| 31674 | case VE::VSUBSWZXrvml_v: |
| 31675 | case VE::VSUBULivm: |
| 31676 | case VE::VSUBULivmL: |
| 31677 | case VE::VSUBULivmL_v: |
| 31678 | case VE::VSUBULivm_v: |
| 31679 | case VE::VSUBULivml: |
| 31680 | case VE::VSUBULivml_v: |
| 31681 | case VE::VSUBULrvm: |
| 31682 | case VE::VSUBULrvmL: |
| 31683 | case VE::VSUBULrvmL_v: |
| 31684 | case VE::VSUBULrvm_v: |
| 31685 | case VE::VSUBULrvml: |
| 31686 | case VE::VSUBULrvml_v: |
| 31687 | case VE::VSUBUWivm: |
| 31688 | case VE::VSUBUWivmL: |
| 31689 | case VE::VSUBUWivmL_v: |
| 31690 | case VE::VSUBUWivm_v: |
| 31691 | case VE::VSUBUWivml: |
| 31692 | case VE::VSUBUWivml_v: |
| 31693 | case VE::VSUBUWrvm: |
| 31694 | case VE::VSUBUWrvmL: |
| 31695 | case VE::VSUBUWrvmL_v: |
| 31696 | case VE::VSUBUWrvm_v: |
| 31697 | case VE::VSUBUWrvml: |
| 31698 | case VE::VSUBUWrvml_v: |
| 31699 | case VE::VXORmvm: |
| 31700 | case VE::VXORmvmL: |
| 31701 | case VE::VXORmvmL_v: |
| 31702 | case VE::VXORmvm_v: |
| 31703 | case VE::VXORmvml: |
| 31704 | case VE::VXORmvml_v: |
| 31705 | case VE::VXORrvm: |
| 31706 | case VE::VXORrvmL: |
| 31707 | case VE::VXORrvmL_v: |
| 31708 | case VE::VXORrvm_v: |
| 31709 | case VE::VXORrvml: |
| 31710 | case VE::VXORrvml_v: { |
| 31711 | switch (OpNum) { |
| 31712 | case 3: |
| 31713 | // op: m |
| 31714 | return 48; |
| 31715 | case 1: |
| 31716 | // op: sy |
| 31717 | return 40; |
| 31718 | case 0: |
| 31719 | // op: vx |
| 31720 | return 24; |
| 31721 | case 2: |
| 31722 | // op: vz |
| 31723 | return 8; |
| 31724 | } |
| 31725 | break; |
| 31726 | } |
| 31727 | case VE::VDIVSLvim: |
| 31728 | case VE::VDIVSLvimL: |
| 31729 | case VE::VDIVSLvimL_v: |
| 31730 | case VE::VDIVSLvim_v: |
| 31731 | case VE::VDIVSLviml: |
| 31732 | case VE::VDIVSLviml_v: |
| 31733 | case VE::VDIVSLvrm: |
| 31734 | case VE::VDIVSLvrmL: |
| 31735 | case VE::VDIVSLvrmL_v: |
| 31736 | case VE::VDIVSLvrm_v: |
| 31737 | case VE::VDIVSLvrml: |
| 31738 | case VE::VDIVSLvrml_v: |
| 31739 | case VE::VDIVSWSXvim: |
| 31740 | case VE::VDIVSWSXvimL: |
| 31741 | case VE::VDIVSWSXvimL_v: |
| 31742 | case VE::VDIVSWSXvim_v: |
| 31743 | case VE::VDIVSWSXviml: |
| 31744 | case VE::VDIVSWSXviml_v: |
| 31745 | case VE::VDIVSWSXvrm: |
| 31746 | case VE::VDIVSWSXvrmL: |
| 31747 | case VE::VDIVSWSXvrmL_v: |
| 31748 | case VE::VDIVSWSXvrm_v: |
| 31749 | case VE::VDIVSWSXvrml: |
| 31750 | case VE::VDIVSWSXvrml_v: |
| 31751 | case VE::VDIVSWZXvim: |
| 31752 | case VE::VDIVSWZXvimL: |
| 31753 | case VE::VDIVSWZXvimL_v: |
| 31754 | case VE::VDIVSWZXvim_v: |
| 31755 | case VE::VDIVSWZXviml: |
| 31756 | case VE::VDIVSWZXviml_v: |
| 31757 | case VE::VDIVSWZXvrm: |
| 31758 | case VE::VDIVSWZXvrmL: |
| 31759 | case VE::VDIVSWZXvrmL_v: |
| 31760 | case VE::VDIVSWZXvrm_v: |
| 31761 | case VE::VDIVSWZXvrml: |
| 31762 | case VE::VDIVSWZXvrml_v: |
| 31763 | case VE::VDIVULvim: |
| 31764 | case VE::VDIVULvimL: |
| 31765 | case VE::VDIVULvimL_v: |
| 31766 | case VE::VDIVULvim_v: |
| 31767 | case VE::VDIVULviml: |
| 31768 | case VE::VDIVULviml_v: |
| 31769 | case VE::VDIVULvrm: |
| 31770 | case VE::VDIVULvrmL: |
| 31771 | case VE::VDIVULvrmL_v: |
| 31772 | case VE::VDIVULvrm_v: |
| 31773 | case VE::VDIVULvrml: |
| 31774 | case VE::VDIVULvrml_v: |
| 31775 | case VE::VDIVUWvim: |
| 31776 | case VE::VDIVUWvimL: |
| 31777 | case VE::VDIVUWvimL_v: |
| 31778 | case VE::VDIVUWvim_v: |
| 31779 | case VE::VDIVUWviml: |
| 31780 | case VE::VDIVUWviml_v: |
| 31781 | case VE::VDIVUWvrm: |
| 31782 | case VE::VDIVUWvrmL: |
| 31783 | case VE::VDIVUWvrmL_v: |
| 31784 | case VE::VDIVUWvrm_v: |
| 31785 | case VE::VDIVUWvrml: |
| 31786 | case VE::VDIVUWvrml_v: |
| 31787 | case VE::VFDIVDvim: |
| 31788 | case VE::VFDIVDvimL: |
| 31789 | case VE::VFDIVDvimL_v: |
| 31790 | case VE::VFDIVDvim_v: |
| 31791 | case VE::VFDIVDviml: |
| 31792 | case VE::VFDIVDviml_v: |
| 31793 | case VE::VFDIVDvrm: |
| 31794 | case VE::VFDIVDvrmL: |
| 31795 | case VE::VFDIVDvrmL_v: |
| 31796 | case VE::VFDIVDvrm_v: |
| 31797 | case VE::VFDIVDvrml: |
| 31798 | case VE::VFDIVDvrml_v: |
| 31799 | case VE::VFDIVSvim: |
| 31800 | case VE::VFDIVSvimL: |
| 31801 | case VE::VFDIVSvimL_v: |
| 31802 | case VE::VFDIVSvim_v: |
| 31803 | case VE::VFDIVSviml: |
| 31804 | case VE::VFDIVSviml_v: |
| 31805 | case VE::VFDIVSvrm: |
| 31806 | case VE::VFDIVSvrmL: |
| 31807 | case VE::VFDIVSvrmL_v: |
| 31808 | case VE::VFDIVSvrm_v: |
| 31809 | case VE::VFDIVSvrml: |
| 31810 | case VE::VFDIVSvrml_v: { |
| 31811 | switch (OpNum) { |
| 31812 | case 3: |
| 31813 | // op: m |
| 31814 | return 48; |
| 31815 | case 2: |
| 31816 | // op: sy |
| 31817 | return 40; |
| 31818 | case 0: |
| 31819 | // op: vx |
| 31820 | return 24; |
| 31821 | case 1: |
| 31822 | // op: vy |
| 31823 | return 16; |
| 31824 | } |
| 31825 | break; |
| 31826 | } |
| 31827 | case VE::PVSLALOvim: |
| 31828 | case VE::PVSLALOvimL: |
| 31829 | case VE::PVSLALOvimL_v: |
| 31830 | case VE::PVSLALOvim_v: |
| 31831 | case VE::PVSLALOviml: |
| 31832 | case VE::PVSLALOviml_v: |
| 31833 | case VE::PVSLALOvrm: |
| 31834 | case VE::PVSLALOvrmL: |
| 31835 | case VE::PVSLALOvrmL_v: |
| 31836 | case VE::PVSLALOvrm_v: |
| 31837 | case VE::PVSLALOvrml: |
| 31838 | case VE::PVSLALOvrml_v: |
| 31839 | case VE::PVSLAUPvim: |
| 31840 | case VE::PVSLAUPvimL: |
| 31841 | case VE::PVSLAUPvimL_v: |
| 31842 | case VE::PVSLAUPvim_v: |
| 31843 | case VE::PVSLAUPviml: |
| 31844 | case VE::PVSLAUPviml_v: |
| 31845 | case VE::PVSLAUPvrm: |
| 31846 | case VE::PVSLAUPvrmL: |
| 31847 | case VE::PVSLAUPvrmL_v: |
| 31848 | case VE::PVSLAUPvrm_v: |
| 31849 | case VE::PVSLAUPvrml: |
| 31850 | case VE::PVSLAUPvrml_v: |
| 31851 | case VE::PVSLAvim: |
| 31852 | case VE::PVSLAvimL: |
| 31853 | case VE::PVSLAvimL_v: |
| 31854 | case VE::PVSLAvim_v: |
| 31855 | case VE::PVSLAviml: |
| 31856 | case VE::PVSLAviml_v: |
| 31857 | case VE::PVSLAvrm: |
| 31858 | case VE::PVSLAvrmL: |
| 31859 | case VE::PVSLAvrmL_v: |
| 31860 | case VE::PVSLAvrm_v: |
| 31861 | case VE::PVSLAvrml: |
| 31862 | case VE::PVSLAvrml_v: |
| 31863 | case VE::PVSLLLOvim: |
| 31864 | case VE::PVSLLLOvimL: |
| 31865 | case VE::PVSLLLOvimL_v: |
| 31866 | case VE::PVSLLLOvim_v: |
| 31867 | case VE::PVSLLLOviml: |
| 31868 | case VE::PVSLLLOviml_v: |
| 31869 | case VE::PVSLLLOvrm: |
| 31870 | case VE::PVSLLLOvrmL: |
| 31871 | case VE::PVSLLLOvrmL_v: |
| 31872 | case VE::PVSLLLOvrm_v: |
| 31873 | case VE::PVSLLLOvrml: |
| 31874 | case VE::PVSLLLOvrml_v: |
| 31875 | case VE::PVSLLUPvim: |
| 31876 | case VE::PVSLLUPvimL: |
| 31877 | case VE::PVSLLUPvimL_v: |
| 31878 | case VE::PVSLLUPvim_v: |
| 31879 | case VE::PVSLLUPviml: |
| 31880 | case VE::PVSLLUPviml_v: |
| 31881 | case VE::PVSLLUPvrm: |
| 31882 | case VE::PVSLLUPvrmL: |
| 31883 | case VE::PVSLLUPvrmL_v: |
| 31884 | case VE::PVSLLUPvrm_v: |
| 31885 | case VE::PVSLLUPvrml: |
| 31886 | case VE::PVSLLUPvrml_v: |
| 31887 | case VE::PVSLLvim: |
| 31888 | case VE::PVSLLvimL: |
| 31889 | case VE::PVSLLvimL_v: |
| 31890 | case VE::PVSLLvim_v: |
| 31891 | case VE::PVSLLviml: |
| 31892 | case VE::PVSLLviml_v: |
| 31893 | case VE::PVSLLvrm: |
| 31894 | case VE::PVSLLvrmL: |
| 31895 | case VE::PVSLLvrmL_v: |
| 31896 | case VE::PVSLLvrm_v: |
| 31897 | case VE::PVSLLvrml: |
| 31898 | case VE::PVSLLvrml_v: |
| 31899 | case VE::PVSRALOvim: |
| 31900 | case VE::PVSRALOvimL: |
| 31901 | case VE::PVSRALOvimL_v: |
| 31902 | case VE::PVSRALOvim_v: |
| 31903 | case VE::PVSRALOviml: |
| 31904 | case VE::PVSRALOviml_v: |
| 31905 | case VE::PVSRALOvrm: |
| 31906 | case VE::PVSRALOvrmL: |
| 31907 | case VE::PVSRALOvrmL_v: |
| 31908 | case VE::PVSRALOvrm_v: |
| 31909 | case VE::PVSRALOvrml: |
| 31910 | case VE::PVSRALOvrml_v: |
| 31911 | case VE::PVSRAUPvim: |
| 31912 | case VE::PVSRAUPvimL: |
| 31913 | case VE::PVSRAUPvimL_v: |
| 31914 | case VE::PVSRAUPvim_v: |
| 31915 | case VE::PVSRAUPviml: |
| 31916 | case VE::PVSRAUPviml_v: |
| 31917 | case VE::PVSRAUPvrm: |
| 31918 | case VE::PVSRAUPvrmL: |
| 31919 | case VE::PVSRAUPvrmL_v: |
| 31920 | case VE::PVSRAUPvrm_v: |
| 31921 | case VE::PVSRAUPvrml: |
| 31922 | case VE::PVSRAUPvrml_v: |
| 31923 | case VE::PVSRAvim: |
| 31924 | case VE::PVSRAvimL: |
| 31925 | case VE::PVSRAvimL_v: |
| 31926 | case VE::PVSRAvim_v: |
| 31927 | case VE::PVSRAviml: |
| 31928 | case VE::PVSRAviml_v: |
| 31929 | case VE::PVSRAvrm: |
| 31930 | case VE::PVSRAvrmL: |
| 31931 | case VE::PVSRAvrmL_v: |
| 31932 | case VE::PVSRAvrm_v: |
| 31933 | case VE::PVSRAvrml: |
| 31934 | case VE::PVSRAvrml_v: |
| 31935 | case VE::PVSRLLOvim: |
| 31936 | case VE::PVSRLLOvimL: |
| 31937 | case VE::PVSRLLOvimL_v: |
| 31938 | case VE::PVSRLLOvim_v: |
| 31939 | case VE::PVSRLLOviml: |
| 31940 | case VE::PVSRLLOviml_v: |
| 31941 | case VE::PVSRLLOvrm: |
| 31942 | case VE::PVSRLLOvrmL: |
| 31943 | case VE::PVSRLLOvrmL_v: |
| 31944 | case VE::PVSRLLOvrm_v: |
| 31945 | case VE::PVSRLLOvrml: |
| 31946 | case VE::PVSRLLOvrml_v: |
| 31947 | case VE::PVSRLUPvim: |
| 31948 | case VE::PVSRLUPvimL: |
| 31949 | case VE::PVSRLUPvimL_v: |
| 31950 | case VE::PVSRLUPvim_v: |
| 31951 | case VE::PVSRLUPviml: |
| 31952 | case VE::PVSRLUPviml_v: |
| 31953 | case VE::PVSRLUPvrm: |
| 31954 | case VE::PVSRLUPvrmL: |
| 31955 | case VE::PVSRLUPvrmL_v: |
| 31956 | case VE::PVSRLUPvrm_v: |
| 31957 | case VE::PVSRLUPvrml: |
| 31958 | case VE::PVSRLUPvrml_v: |
| 31959 | case VE::PVSRLvim: |
| 31960 | case VE::PVSRLvimL: |
| 31961 | case VE::PVSRLvimL_v: |
| 31962 | case VE::PVSRLvim_v: |
| 31963 | case VE::PVSRLviml: |
| 31964 | case VE::PVSRLviml_v: |
| 31965 | case VE::PVSRLvrm: |
| 31966 | case VE::PVSRLvrmL: |
| 31967 | case VE::PVSRLvrmL_v: |
| 31968 | case VE::PVSRLvrm_v: |
| 31969 | case VE::PVSRLvrml: |
| 31970 | case VE::PVSRLvrml_v: |
| 31971 | case VE::VSLALvim: |
| 31972 | case VE::VSLALvimL: |
| 31973 | case VE::VSLALvimL_v: |
| 31974 | case VE::VSLALvim_v: |
| 31975 | case VE::VSLALviml: |
| 31976 | case VE::VSLALviml_v: |
| 31977 | case VE::VSLALvrm: |
| 31978 | case VE::VSLALvrmL: |
| 31979 | case VE::VSLALvrmL_v: |
| 31980 | case VE::VSLALvrm_v: |
| 31981 | case VE::VSLALvrml: |
| 31982 | case VE::VSLALvrml_v: |
| 31983 | case VE::VSLAWSXvim: |
| 31984 | case VE::VSLAWSXvimL: |
| 31985 | case VE::VSLAWSXvimL_v: |
| 31986 | case VE::VSLAWSXvim_v: |
| 31987 | case VE::VSLAWSXviml: |
| 31988 | case VE::VSLAWSXviml_v: |
| 31989 | case VE::VSLAWSXvrm: |
| 31990 | case VE::VSLAWSXvrmL: |
| 31991 | case VE::VSLAWSXvrmL_v: |
| 31992 | case VE::VSLAWSXvrm_v: |
| 31993 | case VE::VSLAWSXvrml: |
| 31994 | case VE::VSLAWSXvrml_v: |
| 31995 | case VE::VSLAWZXvim: |
| 31996 | case VE::VSLAWZXvimL: |
| 31997 | case VE::VSLAWZXvimL_v: |
| 31998 | case VE::VSLAWZXvim_v: |
| 31999 | case VE::VSLAWZXviml: |
| 32000 | case VE::VSLAWZXviml_v: |
| 32001 | case VE::VSLAWZXvrm: |
| 32002 | case VE::VSLAWZXvrmL: |
| 32003 | case VE::VSLAWZXvrmL_v: |
| 32004 | case VE::VSLAWZXvrm_v: |
| 32005 | case VE::VSLAWZXvrml: |
| 32006 | case VE::VSLAWZXvrml_v: |
| 32007 | case VE::VSLLvim: |
| 32008 | case VE::VSLLvimL: |
| 32009 | case VE::VSLLvimL_v: |
| 32010 | case VE::VSLLvim_v: |
| 32011 | case VE::VSLLviml: |
| 32012 | case VE::VSLLviml_v: |
| 32013 | case VE::VSLLvrm: |
| 32014 | case VE::VSLLvrmL: |
| 32015 | case VE::VSLLvrmL_v: |
| 32016 | case VE::VSLLvrm_v: |
| 32017 | case VE::VSLLvrml: |
| 32018 | case VE::VSLLvrml_v: |
| 32019 | case VE::VSRALvim: |
| 32020 | case VE::VSRALvimL: |
| 32021 | case VE::VSRALvimL_v: |
| 32022 | case VE::VSRALvim_v: |
| 32023 | case VE::VSRALviml: |
| 32024 | case VE::VSRALviml_v: |
| 32025 | case VE::VSRALvrm: |
| 32026 | case VE::VSRALvrmL: |
| 32027 | case VE::VSRALvrmL_v: |
| 32028 | case VE::VSRALvrm_v: |
| 32029 | case VE::VSRALvrml: |
| 32030 | case VE::VSRALvrml_v: |
| 32031 | case VE::VSRAWSXvim: |
| 32032 | case VE::VSRAWSXvimL: |
| 32033 | case VE::VSRAWSXvimL_v: |
| 32034 | case VE::VSRAWSXvim_v: |
| 32035 | case VE::VSRAWSXviml: |
| 32036 | case VE::VSRAWSXviml_v: |
| 32037 | case VE::VSRAWSXvrm: |
| 32038 | case VE::VSRAWSXvrmL: |
| 32039 | case VE::VSRAWSXvrmL_v: |
| 32040 | case VE::VSRAWSXvrm_v: |
| 32041 | case VE::VSRAWSXvrml: |
| 32042 | case VE::VSRAWSXvrml_v: |
| 32043 | case VE::VSRAWZXvim: |
| 32044 | case VE::VSRAWZXvimL: |
| 32045 | case VE::VSRAWZXvimL_v: |
| 32046 | case VE::VSRAWZXvim_v: |
| 32047 | case VE::VSRAWZXviml: |
| 32048 | case VE::VSRAWZXviml_v: |
| 32049 | case VE::VSRAWZXvrm: |
| 32050 | case VE::VSRAWZXvrmL: |
| 32051 | case VE::VSRAWZXvrmL_v: |
| 32052 | case VE::VSRAWZXvrm_v: |
| 32053 | case VE::VSRAWZXvrml: |
| 32054 | case VE::VSRAWZXvrml_v: |
| 32055 | case VE::VSRLvim: |
| 32056 | case VE::VSRLvimL: |
| 32057 | case VE::VSRLvimL_v: |
| 32058 | case VE::VSRLvim_v: |
| 32059 | case VE::VSRLviml: |
| 32060 | case VE::VSRLviml_v: |
| 32061 | case VE::VSRLvrm: |
| 32062 | case VE::VSRLvrmL: |
| 32063 | case VE::VSRLvrmL_v: |
| 32064 | case VE::VSRLvrm_v: |
| 32065 | case VE::VSRLvrml: |
| 32066 | case VE::VSRLvrml_v: { |
| 32067 | switch (OpNum) { |
| 32068 | case 3: |
| 32069 | // op: m |
| 32070 | return 48; |
| 32071 | case 2: |
| 32072 | // op: sy |
| 32073 | return 40; |
| 32074 | case 0: |
| 32075 | // op: vx |
| 32076 | return 24; |
| 32077 | case 1: |
| 32078 | // op: vz |
| 32079 | return 8; |
| 32080 | } |
| 32081 | break; |
| 32082 | } |
| 32083 | case VE::ST1Brii: |
| 32084 | case VE::ST1Brri: |
| 32085 | case VE::ST1Bzii: |
| 32086 | case VE::ST1Bzri: |
| 32087 | case VE::ST2Brii: |
| 32088 | case VE::ST2Brri: |
| 32089 | case VE::ST2Bzii: |
| 32090 | case VE::ST2Bzri: |
| 32091 | case VE::STLrii: |
| 32092 | case VE::STLrri: |
| 32093 | case VE::STLzii: |
| 32094 | case VE::STLzri: |
| 32095 | case VE::STUrii: |
| 32096 | case VE::STUrri: |
| 32097 | case VE::STUzii: |
| 32098 | case VE::STUzri: |
| 32099 | case VE::STrii: |
| 32100 | case VE::STrri: |
| 32101 | case VE::STzii: |
| 32102 | case VE::STzri: { |
| 32103 | switch (OpNum) { |
| 32104 | case 3: |
| 32105 | // op: sx |
| 32106 | return 48; |
| 32107 | case 0: |
| 32108 | // op: sz |
| 32109 | return 32; |
| 32110 | case 1: |
| 32111 | // op: sy |
| 32112 | return 40; |
| 32113 | case 2: |
| 32114 | // op: imm32 |
| 32115 | return 0; |
| 32116 | } |
| 32117 | break; |
| 32118 | } |
| 32119 | case VE::VFIAMDvvi: |
| 32120 | case VE::VFIAMDvviL: |
| 32121 | case VE::VFIAMDvviL_v: |
| 32122 | case VE::VFIAMDvvi_v: |
| 32123 | case VE::VFIAMDvvil: |
| 32124 | case VE::VFIAMDvvil_v: |
| 32125 | case VE::VFIAMDvvr: |
| 32126 | case VE::VFIAMDvvrL: |
| 32127 | case VE::VFIAMDvvrL_v: |
| 32128 | case VE::VFIAMDvvr_v: |
| 32129 | case VE::VFIAMDvvrl: |
| 32130 | case VE::VFIAMDvvrl_v: |
| 32131 | case VE::VFIAMSvvi: |
| 32132 | case VE::VFIAMSvviL: |
| 32133 | case VE::VFIAMSvviL_v: |
| 32134 | case VE::VFIAMSvvi_v: |
| 32135 | case VE::VFIAMSvvil: |
| 32136 | case VE::VFIAMSvvil_v: |
| 32137 | case VE::VFIAMSvvr: |
| 32138 | case VE::VFIAMSvvrL: |
| 32139 | case VE::VFIAMSvvrL_v: |
| 32140 | case VE::VFIAMSvvr_v: |
| 32141 | case VE::VFIAMSvvrl: |
| 32142 | case VE::VFIAMSvvrl_v: |
| 32143 | case VE::VFIMADvvi: |
| 32144 | case VE::VFIMADvviL: |
| 32145 | case VE::VFIMADvviL_v: |
| 32146 | case VE::VFIMADvvi_v: |
| 32147 | case VE::VFIMADvvil: |
| 32148 | case VE::VFIMADvvil_v: |
| 32149 | case VE::VFIMADvvr: |
| 32150 | case VE::VFIMADvvrL: |
| 32151 | case VE::VFIMADvvrL_v: |
| 32152 | case VE::VFIMADvvr_v: |
| 32153 | case VE::VFIMADvvrl: |
| 32154 | case VE::VFIMADvvrl_v: |
| 32155 | case VE::VFIMASvvi: |
| 32156 | case VE::VFIMASvviL: |
| 32157 | case VE::VFIMASvviL_v: |
| 32158 | case VE::VFIMASvvi_v: |
| 32159 | case VE::VFIMASvvil: |
| 32160 | case VE::VFIMASvvil_v: |
| 32161 | case VE::VFIMASvvr: |
| 32162 | case VE::VFIMASvvrL: |
| 32163 | case VE::VFIMASvvrL_v: |
| 32164 | case VE::VFIMASvvr_v: |
| 32165 | case VE::VFIMASvvrl: |
| 32166 | case VE::VFIMASvvrl_v: |
| 32167 | case VE::VFIMSDvvi: |
| 32168 | case VE::VFIMSDvviL: |
| 32169 | case VE::VFIMSDvviL_v: |
| 32170 | case VE::VFIMSDvvi_v: |
| 32171 | case VE::VFIMSDvvil: |
| 32172 | case VE::VFIMSDvvil_v: |
| 32173 | case VE::VFIMSDvvr: |
| 32174 | case VE::VFIMSDvvrL: |
| 32175 | case VE::VFIMSDvvrL_v: |
| 32176 | case VE::VFIMSDvvr_v: |
| 32177 | case VE::VFIMSDvvrl: |
| 32178 | case VE::VFIMSDvvrl_v: |
| 32179 | case VE::VFIMSSvvi: |
| 32180 | case VE::VFIMSSvviL: |
| 32181 | case VE::VFIMSSvviL_v: |
| 32182 | case VE::VFIMSSvvi_v: |
| 32183 | case VE::VFIMSSvvil: |
| 32184 | case VE::VFIMSSvvil_v: |
| 32185 | case VE::VFIMSSvvr: |
| 32186 | case VE::VFIMSSvvrL: |
| 32187 | case VE::VFIMSSvvrL_v: |
| 32188 | case VE::VFIMSSvvr_v: |
| 32189 | case VE::VFIMSSvvrl: |
| 32190 | case VE::VFIMSSvvrl_v: |
| 32191 | case VE::VFISMDvvi: |
| 32192 | case VE::VFISMDvviL: |
| 32193 | case VE::VFISMDvviL_v: |
| 32194 | case VE::VFISMDvvi_v: |
| 32195 | case VE::VFISMDvvil: |
| 32196 | case VE::VFISMDvvil_v: |
| 32197 | case VE::VFISMDvvr: |
| 32198 | case VE::VFISMDvvrL: |
| 32199 | case VE::VFISMDvvrL_v: |
| 32200 | case VE::VFISMDvvr_v: |
| 32201 | case VE::VFISMDvvrl: |
| 32202 | case VE::VFISMDvvrl_v: |
| 32203 | case VE::VFISMSvvi: |
| 32204 | case VE::VFISMSvviL: |
| 32205 | case VE::VFISMSvviL_v: |
| 32206 | case VE::VFISMSvvi_v: |
| 32207 | case VE::VFISMSvvil: |
| 32208 | case VE::VFISMSvvil_v: |
| 32209 | case VE::VFISMSvvr: |
| 32210 | case VE::VFISMSvvrL: |
| 32211 | case VE::VFISMSvvrL_v: |
| 32212 | case VE::VFISMSvvr_v: |
| 32213 | case VE::VFISMSvvrl: |
| 32214 | case VE::VFISMSvvrl_v: |
| 32215 | case VE::VSHFvvi: |
| 32216 | case VE::VSHFvviL: |
| 32217 | case VE::VSHFvviL_v: |
| 32218 | case VE::VSHFvvi_v: |
| 32219 | case VE::VSHFvvil: |
| 32220 | case VE::VSHFvvil_v: |
| 32221 | case VE::VSHFvvr: |
| 32222 | case VE::VSHFvvrL: |
| 32223 | case VE::VSHFvvrL_v: |
| 32224 | case VE::VSHFvvr_v: |
| 32225 | case VE::VSHFvvrl: |
| 32226 | case VE::VSHFvvrl_v: |
| 32227 | case VE::VSLDvvi: |
| 32228 | case VE::VSLDvviL: |
| 32229 | case VE::VSLDvviL_v: |
| 32230 | case VE::VSLDvvi_v: |
| 32231 | case VE::VSLDvvil: |
| 32232 | case VE::VSLDvvil_v: |
| 32233 | case VE::VSLDvvr: |
| 32234 | case VE::VSLDvvrL: |
| 32235 | case VE::VSLDvvrL_v: |
| 32236 | case VE::VSLDvvr_v: |
| 32237 | case VE::VSLDvvrl: |
| 32238 | case VE::VSLDvvrl_v: |
| 32239 | case VE::VSRDvvi: |
| 32240 | case VE::VSRDvviL: |
| 32241 | case VE::VSRDvviL_v: |
| 32242 | case VE::VSRDvvi_v: |
| 32243 | case VE::VSRDvvil: |
| 32244 | case VE::VSRDvvil_v: |
| 32245 | case VE::VSRDvvr: |
| 32246 | case VE::VSRDvvrL: |
| 32247 | case VE::VSRDvvrL_v: |
| 32248 | case VE::VSRDvvr_v: |
| 32249 | case VE::VSRDvvrl: |
| 32250 | case VE::VSRDvvrl_v: { |
| 32251 | switch (OpNum) { |
| 32252 | case 3: |
| 32253 | // op: sy |
| 32254 | return 40; |
| 32255 | case 0: |
| 32256 | // op: vx |
| 32257 | return 24; |
| 32258 | case 1: |
| 32259 | // op: vy |
| 32260 | return 16; |
| 32261 | case 2: |
| 32262 | // op: vz |
| 32263 | return 8; |
| 32264 | } |
| 32265 | break; |
| 32266 | } |
| 32267 | case VE::PVFMADLOvvvm: |
| 32268 | case VE::PVFMADLOvvvmL: |
| 32269 | case VE::PVFMADLOvvvmL_v: |
| 32270 | case VE::PVFMADLOvvvm_v: |
| 32271 | case VE::PVFMADLOvvvml: |
| 32272 | case VE::PVFMADLOvvvml_v: |
| 32273 | case VE::PVFMADUPvvvm: |
| 32274 | case VE::PVFMADUPvvvmL: |
| 32275 | case VE::PVFMADUPvvvmL_v: |
| 32276 | case VE::PVFMADUPvvvm_v: |
| 32277 | case VE::PVFMADUPvvvml: |
| 32278 | case VE::PVFMADUPvvvml_v: |
| 32279 | case VE::PVFMADvvvm: |
| 32280 | case VE::PVFMADvvvmL: |
| 32281 | case VE::PVFMADvvvmL_v: |
| 32282 | case VE::PVFMADvvvm_v: |
| 32283 | case VE::PVFMADvvvml: |
| 32284 | case VE::PVFMADvvvml_v: |
| 32285 | case VE::PVFMSBLOvvvm: |
| 32286 | case VE::PVFMSBLOvvvmL: |
| 32287 | case VE::PVFMSBLOvvvmL_v: |
| 32288 | case VE::PVFMSBLOvvvm_v: |
| 32289 | case VE::PVFMSBLOvvvml: |
| 32290 | case VE::PVFMSBLOvvvml_v: |
| 32291 | case VE::PVFMSBUPvvvm: |
| 32292 | case VE::PVFMSBUPvvvmL: |
| 32293 | case VE::PVFMSBUPvvvmL_v: |
| 32294 | case VE::PVFMSBUPvvvm_v: |
| 32295 | case VE::PVFMSBUPvvvml: |
| 32296 | case VE::PVFMSBUPvvvml_v: |
| 32297 | case VE::PVFMSBvvvm: |
| 32298 | case VE::PVFMSBvvvmL: |
| 32299 | case VE::PVFMSBvvvmL_v: |
| 32300 | case VE::PVFMSBvvvm_v: |
| 32301 | case VE::PVFMSBvvvml: |
| 32302 | case VE::PVFMSBvvvml_v: |
| 32303 | case VE::PVFNMADLOvvvm: |
| 32304 | case VE::PVFNMADLOvvvmL: |
| 32305 | case VE::PVFNMADLOvvvmL_v: |
| 32306 | case VE::PVFNMADLOvvvm_v: |
| 32307 | case VE::PVFNMADLOvvvml: |
| 32308 | case VE::PVFNMADLOvvvml_v: |
| 32309 | case VE::PVFNMADUPvvvm: |
| 32310 | case VE::PVFNMADUPvvvmL: |
| 32311 | case VE::PVFNMADUPvvvmL_v: |
| 32312 | case VE::PVFNMADUPvvvm_v: |
| 32313 | case VE::PVFNMADUPvvvml: |
| 32314 | case VE::PVFNMADUPvvvml_v: |
| 32315 | case VE::PVFNMADvvvm: |
| 32316 | case VE::PVFNMADvvvmL: |
| 32317 | case VE::PVFNMADvvvmL_v: |
| 32318 | case VE::PVFNMADvvvm_v: |
| 32319 | case VE::PVFNMADvvvml: |
| 32320 | case VE::PVFNMADvvvml_v: |
| 32321 | case VE::PVFNMSBLOvvvm: |
| 32322 | case VE::PVFNMSBLOvvvmL: |
| 32323 | case VE::PVFNMSBLOvvvmL_v: |
| 32324 | case VE::PVFNMSBLOvvvm_v: |
| 32325 | case VE::PVFNMSBLOvvvml: |
| 32326 | case VE::PVFNMSBLOvvvml_v: |
| 32327 | case VE::PVFNMSBUPvvvm: |
| 32328 | case VE::PVFNMSBUPvvvmL: |
| 32329 | case VE::PVFNMSBUPvvvmL_v: |
| 32330 | case VE::PVFNMSBUPvvvm_v: |
| 32331 | case VE::PVFNMSBUPvvvml: |
| 32332 | case VE::PVFNMSBUPvvvml_v: |
| 32333 | case VE::PVFNMSBvvvm: |
| 32334 | case VE::PVFNMSBvvvmL: |
| 32335 | case VE::PVFNMSBvvvmL_v: |
| 32336 | case VE::PVFNMSBvvvm_v: |
| 32337 | case VE::PVFNMSBvvvml: |
| 32338 | case VE::PVFNMSBvvvml_v: |
| 32339 | case VE::VFMADDvvvm: |
| 32340 | case VE::VFMADDvvvmL: |
| 32341 | case VE::VFMADDvvvmL_v: |
| 32342 | case VE::VFMADDvvvm_v: |
| 32343 | case VE::VFMADDvvvml: |
| 32344 | case VE::VFMADDvvvml_v: |
| 32345 | case VE::VFMADSvvvm: |
| 32346 | case VE::VFMADSvvvmL: |
| 32347 | case VE::VFMADSvvvmL_v: |
| 32348 | case VE::VFMADSvvvm_v: |
| 32349 | case VE::VFMADSvvvml: |
| 32350 | case VE::VFMADSvvvml_v: |
| 32351 | case VE::VFMSBDvvvm: |
| 32352 | case VE::VFMSBDvvvmL: |
| 32353 | case VE::VFMSBDvvvmL_v: |
| 32354 | case VE::VFMSBDvvvm_v: |
| 32355 | case VE::VFMSBDvvvml: |
| 32356 | case VE::VFMSBDvvvml_v: |
| 32357 | case VE::VFMSBSvvvm: |
| 32358 | case VE::VFMSBSvvvmL: |
| 32359 | case VE::VFMSBSvvvmL_v: |
| 32360 | case VE::VFMSBSvvvm_v: |
| 32361 | case VE::VFMSBSvvvml: |
| 32362 | case VE::VFMSBSvvvml_v: |
| 32363 | case VE::VFNMADDvvvm: |
| 32364 | case VE::VFNMADDvvvmL: |
| 32365 | case VE::VFNMADDvvvmL_v: |
| 32366 | case VE::VFNMADDvvvm_v: |
| 32367 | case VE::VFNMADDvvvml: |
| 32368 | case VE::VFNMADDvvvml_v: |
| 32369 | case VE::VFNMADSvvvm: |
| 32370 | case VE::VFNMADSvvvmL: |
| 32371 | case VE::VFNMADSvvvmL_v: |
| 32372 | case VE::VFNMADSvvvm_v: |
| 32373 | case VE::VFNMADSvvvml: |
| 32374 | case VE::VFNMADSvvvml_v: |
| 32375 | case VE::VFNMSBDvvvm: |
| 32376 | case VE::VFNMSBDvvvmL: |
| 32377 | case VE::VFNMSBDvvvmL_v: |
| 32378 | case VE::VFNMSBDvvvm_v: |
| 32379 | case VE::VFNMSBDvvvml: |
| 32380 | case VE::VFNMSBDvvvml_v: |
| 32381 | case VE::VFNMSBSvvvm: |
| 32382 | case VE::VFNMSBSvvvmL: |
| 32383 | case VE::VFNMSBSvvvmL_v: |
| 32384 | case VE::VFNMSBSvvvm_v: |
| 32385 | case VE::VFNMSBSvvvml: |
| 32386 | case VE::VFNMSBSvvvml_v: { |
| 32387 | switch (OpNum) { |
| 32388 | case 4: |
| 32389 | // op: m |
| 32390 | return 48; |
| 32391 | case 0: |
| 32392 | // op: vx |
| 32393 | return 24; |
| 32394 | case 1: |
| 32395 | // op: vy |
| 32396 | return 16; |
| 32397 | case 2: |
| 32398 | // op: vz |
| 32399 | return 8; |
| 32400 | case 3: |
| 32401 | // op: vw |
| 32402 | return 0; |
| 32403 | } |
| 32404 | break; |
| 32405 | } |
| 32406 | case VE::PVFMADLOivvm: |
| 32407 | case VE::PVFMADLOivvmL: |
| 32408 | case VE::PVFMADLOivvmL_v: |
| 32409 | case VE::PVFMADLOivvm_v: |
| 32410 | case VE::PVFMADLOivvml: |
| 32411 | case VE::PVFMADLOivvml_v: |
| 32412 | case VE::PVFMADLOrvvm: |
| 32413 | case VE::PVFMADLOrvvmL: |
| 32414 | case VE::PVFMADLOrvvmL_v: |
| 32415 | case VE::PVFMADLOrvvm_v: |
| 32416 | case VE::PVFMADLOrvvml: |
| 32417 | case VE::PVFMADLOrvvml_v: |
| 32418 | case VE::PVFMADUPivvm: |
| 32419 | case VE::PVFMADUPivvmL: |
| 32420 | case VE::PVFMADUPivvmL_v: |
| 32421 | case VE::PVFMADUPivvm_v: |
| 32422 | case VE::PVFMADUPivvml: |
| 32423 | case VE::PVFMADUPivvml_v: |
| 32424 | case VE::PVFMADUPrvvm: |
| 32425 | case VE::PVFMADUPrvvmL: |
| 32426 | case VE::PVFMADUPrvvmL_v: |
| 32427 | case VE::PVFMADUPrvvm_v: |
| 32428 | case VE::PVFMADUPrvvml: |
| 32429 | case VE::PVFMADUPrvvml_v: |
| 32430 | case VE::PVFMADivvm: |
| 32431 | case VE::PVFMADivvmL: |
| 32432 | case VE::PVFMADivvmL_v: |
| 32433 | case VE::PVFMADivvm_v: |
| 32434 | case VE::PVFMADivvml: |
| 32435 | case VE::PVFMADivvml_v: |
| 32436 | case VE::PVFMADrvvm: |
| 32437 | case VE::PVFMADrvvmL: |
| 32438 | case VE::PVFMADrvvmL_v: |
| 32439 | case VE::PVFMADrvvm_v: |
| 32440 | case VE::PVFMADrvvml: |
| 32441 | case VE::PVFMADrvvml_v: |
| 32442 | case VE::PVFMSBLOivvm: |
| 32443 | case VE::PVFMSBLOivvmL: |
| 32444 | case VE::PVFMSBLOivvmL_v: |
| 32445 | case VE::PVFMSBLOivvm_v: |
| 32446 | case VE::PVFMSBLOivvml: |
| 32447 | case VE::PVFMSBLOivvml_v: |
| 32448 | case VE::PVFMSBLOrvvm: |
| 32449 | case VE::PVFMSBLOrvvmL: |
| 32450 | case VE::PVFMSBLOrvvmL_v: |
| 32451 | case VE::PVFMSBLOrvvm_v: |
| 32452 | case VE::PVFMSBLOrvvml: |
| 32453 | case VE::PVFMSBLOrvvml_v: |
| 32454 | case VE::PVFMSBUPivvm: |
| 32455 | case VE::PVFMSBUPivvmL: |
| 32456 | case VE::PVFMSBUPivvmL_v: |
| 32457 | case VE::PVFMSBUPivvm_v: |
| 32458 | case VE::PVFMSBUPivvml: |
| 32459 | case VE::PVFMSBUPivvml_v: |
| 32460 | case VE::PVFMSBUPrvvm: |
| 32461 | case VE::PVFMSBUPrvvmL: |
| 32462 | case VE::PVFMSBUPrvvmL_v: |
| 32463 | case VE::PVFMSBUPrvvm_v: |
| 32464 | case VE::PVFMSBUPrvvml: |
| 32465 | case VE::PVFMSBUPrvvml_v: |
| 32466 | case VE::PVFMSBivvm: |
| 32467 | case VE::PVFMSBivvmL: |
| 32468 | case VE::PVFMSBivvmL_v: |
| 32469 | case VE::PVFMSBivvm_v: |
| 32470 | case VE::PVFMSBivvml: |
| 32471 | case VE::PVFMSBivvml_v: |
| 32472 | case VE::PVFMSBrvvm: |
| 32473 | case VE::PVFMSBrvvmL: |
| 32474 | case VE::PVFMSBrvvmL_v: |
| 32475 | case VE::PVFMSBrvvm_v: |
| 32476 | case VE::PVFMSBrvvml: |
| 32477 | case VE::PVFMSBrvvml_v: |
| 32478 | case VE::PVFNMADLOivvm: |
| 32479 | case VE::PVFNMADLOivvmL: |
| 32480 | case VE::PVFNMADLOivvmL_v: |
| 32481 | case VE::PVFNMADLOivvm_v: |
| 32482 | case VE::PVFNMADLOivvml: |
| 32483 | case VE::PVFNMADLOivvml_v: |
| 32484 | case VE::PVFNMADLOrvvm: |
| 32485 | case VE::PVFNMADLOrvvmL: |
| 32486 | case VE::PVFNMADLOrvvmL_v: |
| 32487 | case VE::PVFNMADLOrvvm_v: |
| 32488 | case VE::PVFNMADLOrvvml: |
| 32489 | case VE::PVFNMADLOrvvml_v: |
| 32490 | case VE::PVFNMADUPivvm: |
| 32491 | case VE::PVFNMADUPivvmL: |
| 32492 | case VE::PVFNMADUPivvmL_v: |
| 32493 | case VE::PVFNMADUPivvm_v: |
| 32494 | case VE::PVFNMADUPivvml: |
| 32495 | case VE::PVFNMADUPivvml_v: |
| 32496 | case VE::PVFNMADUPrvvm: |
| 32497 | case VE::PVFNMADUPrvvmL: |
| 32498 | case VE::PVFNMADUPrvvmL_v: |
| 32499 | case VE::PVFNMADUPrvvm_v: |
| 32500 | case VE::PVFNMADUPrvvml: |
| 32501 | case VE::PVFNMADUPrvvml_v: |
| 32502 | case VE::PVFNMADivvm: |
| 32503 | case VE::PVFNMADivvmL: |
| 32504 | case VE::PVFNMADivvmL_v: |
| 32505 | case VE::PVFNMADivvm_v: |
| 32506 | case VE::PVFNMADivvml: |
| 32507 | case VE::PVFNMADivvml_v: |
| 32508 | case VE::PVFNMADrvvm: |
| 32509 | case VE::PVFNMADrvvmL: |
| 32510 | case VE::PVFNMADrvvmL_v: |
| 32511 | case VE::PVFNMADrvvm_v: |
| 32512 | case VE::PVFNMADrvvml: |
| 32513 | case VE::PVFNMADrvvml_v: |
| 32514 | case VE::PVFNMSBLOivvm: |
| 32515 | case VE::PVFNMSBLOivvmL: |
| 32516 | case VE::PVFNMSBLOivvmL_v: |
| 32517 | case VE::PVFNMSBLOivvm_v: |
| 32518 | case VE::PVFNMSBLOivvml: |
| 32519 | case VE::PVFNMSBLOivvml_v: |
| 32520 | case VE::PVFNMSBLOrvvm: |
| 32521 | case VE::PVFNMSBLOrvvmL: |
| 32522 | case VE::PVFNMSBLOrvvmL_v: |
| 32523 | case VE::PVFNMSBLOrvvm_v: |
| 32524 | case VE::PVFNMSBLOrvvml: |
| 32525 | case VE::PVFNMSBLOrvvml_v: |
| 32526 | case VE::PVFNMSBUPivvm: |
| 32527 | case VE::PVFNMSBUPivvmL: |
| 32528 | case VE::PVFNMSBUPivvmL_v: |
| 32529 | case VE::PVFNMSBUPivvm_v: |
| 32530 | case VE::PVFNMSBUPivvml: |
| 32531 | case VE::PVFNMSBUPivvml_v: |
| 32532 | case VE::PVFNMSBUPrvvm: |
| 32533 | case VE::PVFNMSBUPrvvmL: |
| 32534 | case VE::PVFNMSBUPrvvmL_v: |
| 32535 | case VE::PVFNMSBUPrvvm_v: |
| 32536 | case VE::PVFNMSBUPrvvml: |
| 32537 | case VE::PVFNMSBUPrvvml_v: |
| 32538 | case VE::PVFNMSBivvm: |
| 32539 | case VE::PVFNMSBivvmL: |
| 32540 | case VE::PVFNMSBivvmL_v: |
| 32541 | case VE::PVFNMSBivvm_v: |
| 32542 | case VE::PVFNMSBivvml: |
| 32543 | case VE::PVFNMSBivvml_v: |
| 32544 | case VE::PVFNMSBrvvm: |
| 32545 | case VE::PVFNMSBrvvmL: |
| 32546 | case VE::PVFNMSBrvvmL_v: |
| 32547 | case VE::PVFNMSBrvvm_v: |
| 32548 | case VE::PVFNMSBrvvml: |
| 32549 | case VE::PVFNMSBrvvml_v: |
| 32550 | case VE::VFMADDivvm: |
| 32551 | case VE::VFMADDivvmL: |
| 32552 | case VE::VFMADDivvmL_v: |
| 32553 | case VE::VFMADDivvm_v: |
| 32554 | case VE::VFMADDivvml: |
| 32555 | case VE::VFMADDivvml_v: |
| 32556 | case VE::VFMADDrvvm: |
| 32557 | case VE::VFMADDrvvmL: |
| 32558 | case VE::VFMADDrvvmL_v: |
| 32559 | case VE::VFMADDrvvm_v: |
| 32560 | case VE::VFMADDrvvml: |
| 32561 | case VE::VFMADDrvvml_v: |
| 32562 | case VE::VFMADSivvm: |
| 32563 | case VE::VFMADSivvmL: |
| 32564 | case VE::VFMADSivvmL_v: |
| 32565 | case VE::VFMADSivvm_v: |
| 32566 | case VE::VFMADSivvml: |
| 32567 | case VE::VFMADSivvml_v: |
| 32568 | case VE::VFMADSrvvm: |
| 32569 | case VE::VFMADSrvvmL: |
| 32570 | case VE::VFMADSrvvmL_v: |
| 32571 | case VE::VFMADSrvvm_v: |
| 32572 | case VE::VFMADSrvvml: |
| 32573 | case VE::VFMADSrvvml_v: |
| 32574 | case VE::VFMSBDivvm: |
| 32575 | case VE::VFMSBDivvmL: |
| 32576 | case VE::VFMSBDivvmL_v: |
| 32577 | case VE::VFMSBDivvm_v: |
| 32578 | case VE::VFMSBDivvml: |
| 32579 | case VE::VFMSBDivvml_v: |
| 32580 | case VE::VFMSBDrvvm: |
| 32581 | case VE::VFMSBDrvvmL: |
| 32582 | case VE::VFMSBDrvvmL_v: |
| 32583 | case VE::VFMSBDrvvm_v: |
| 32584 | case VE::VFMSBDrvvml: |
| 32585 | case VE::VFMSBDrvvml_v: |
| 32586 | case VE::VFMSBSivvm: |
| 32587 | case VE::VFMSBSivvmL: |
| 32588 | case VE::VFMSBSivvmL_v: |
| 32589 | case VE::VFMSBSivvm_v: |
| 32590 | case VE::VFMSBSivvml: |
| 32591 | case VE::VFMSBSivvml_v: |
| 32592 | case VE::VFMSBSrvvm: |
| 32593 | case VE::VFMSBSrvvmL: |
| 32594 | case VE::VFMSBSrvvmL_v: |
| 32595 | case VE::VFMSBSrvvm_v: |
| 32596 | case VE::VFMSBSrvvml: |
| 32597 | case VE::VFMSBSrvvml_v: |
| 32598 | case VE::VFNMADDivvm: |
| 32599 | case VE::VFNMADDivvmL: |
| 32600 | case VE::VFNMADDivvmL_v: |
| 32601 | case VE::VFNMADDivvm_v: |
| 32602 | case VE::VFNMADDivvml: |
| 32603 | case VE::VFNMADDivvml_v: |
| 32604 | case VE::VFNMADDrvvm: |
| 32605 | case VE::VFNMADDrvvmL: |
| 32606 | case VE::VFNMADDrvvmL_v: |
| 32607 | case VE::VFNMADDrvvm_v: |
| 32608 | case VE::VFNMADDrvvml: |
| 32609 | case VE::VFNMADDrvvml_v: |
| 32610 | case VE::VFNMADSivvm: |
| 32611 | case VE::VFNMADSivvmL: |
| 32612 | case VE::VFNMADSivvmL_v: |
| 32613 | case VE::VFNMADSivvm_v: |
| 32614 | case VE::VFNMADSivvml: |
| 32615 | case VE::VFNMADSivvml_v: |
| 32616 | case VE::VFNMADSrvvm: |
| 32617 | case VE::VFNMADSrvvmL: |
| 32618 | case VE::VFNMADSrvvmL_v: |
| 32619 | case VE::VFNMADSrvvm_v: |
| 32620 | case VE::VFNMADSrvvml: |
| 32621 | case VE::VFNMADSrvvml_v: |
| 32622 | case VE::VFNMSBDivvm: |
| 32623 | case VE::VFNMSBDivvmL: |
| 32624 | case VE::VFNMSBDivvmL_v: |
| 32625 | case VE::VFNMSBDivvm_v: |
| 32626 | case VE::VFNMSBDivvml: |
| 32627 | case VE::VFNMSBDivvml_v: |
| 32628 | case VE::VFNMSBDrvvm: |
| 32629 | case VE::VFNMSBDrvvmL: |
| 32630 | case VE::VFNMSBDrvvmL_v: |
| 32631 | case VE::VFNMSBDrvvm_v: |
| 32632 | case VE::VFNMSBDrvvml: |
| 32633 | case VE::VFNMSBDrvvml_v: |
| 32634 | case VE::VFNMSBSivvm: |
| 32635 | case VE::VFNMSBSivvmL: |
| 32636 | case VE::VFNMSBSivvmL_v: |
| 32637 | case VE::VFNMSBSivvm_v: |
| 32638 | case VE::VFNMSBSivvml: |
| 32639 | case VE::VFNMSBSivvml_v: |
| 32640 | case VE::VFNMSBSrvvm: |
| 32641 | case VE::VFNMSBSrvvmL: |
| 32642 | case VE::VFNMSBSrvvmL_v: |
| 32643 | case VE::VFNMSBSrvvm_v: |
| 32644 | case VE::VFNMSBSrvvml: |
| 32645 | case VE::VFNMSBSrvvml_v: { |
| 32646 | switch (OpNum) { |
| 32647 | case 4: |
| 32648 | // op: m |
| 32649 | return 48; |
| 32650 | case 1: |
| 32651 | // op: sy |
| 32652 | return 40; |
| 32653 | case 0: |
| 32654 | // op: vx |
| 32655 | return 24; |
| 32656 | case 2: |
| 32657 | // op: vz |
| 32658 | return 8; |
| 32659 | case 3: |
| 32660 | // op: vw |
| 32661 | return 0; |
| 32662 | } |
| 32663 | break; |
| 32664 | } |
| 32665 | case VE::VSCLNCOTsirvm: |
| 32666 | case VE::VSCLNCOTsirvmL: |
| 32667 | case VE::VSCLNCOTsirvml: |
| 32668 | case VE::VSCLNCOTsizvm: |
| 32669 | case VE::VSCLNCOTsizvmL: |
| 32670 | case VE::VSCLNCOTsizvml: |
| 32671 | case VE::VSCLNCOTsrrvm: |
| 32672 | case VE::VSCLNCOTsrrvmL: |
| 32673 | case VE::VSCLNCOTsrrvml: |
| 32674 | case VE::VSCLNCOTsrzvm: |
| 32675 | case VE::VSCLNCOTsrzvmL: |
| 32676 | case VE::VSCLNCOTsrzvml: |
| 32677 | case VE::VSCLNCsirvm: |
| 32678 | case VE::VSCLNCsirvmL: |
| 32679 | case VE::VSCLNCsirvml: |
| 32680 | case VE::VSCLNCsizvm: |
| 32681 | case VE::VSCLNCsizvmL: |
| 32682 | case VE::VSCLNCsizvml: |
| 32683 | case VE::VSCLNCsrrvm: |
| 32684 | case VE::VSCLNCsrrvmL: |
| 32685 | case VE::VSCLNCsrrvml: |
| 32686 | case VE::VSCLNCsrzvm: |
| 32687 | case VE::VSCLNCsrzvmL: |
| 32688 | case VE::VSCLNCsrzvml: |
| 32689 | case VE::VSCLOTsirvm: |
| 32690 | case VE::VSCLOTsirvmL: |
| 32691 | case VE::VSCLOTsirvml: |
| 32692 | case VE::VSCLOTsizvm: |
| 32693 | case VE::VSCLOTsizvmL: |
| 32694 | case VE::VSCLOTsizvml: |
| 32695 | case VE::VSCLOTsrrvm: |
| 32696 | case VE::VSCLOTsrrvmL: |
| 32697 | case VE::VSCLOTsrrvml: |
| 32698 | case VE::VSCLOTsrzvm: |
| 32699 | case VE::VSCLOTsrzvmL: |
| 32700 | case VE::VSCLOTsrzvml: |
| 32701 | case VE::VSCLsirvm: |
| 32702 | case VE::VSCLsirvmL: |
| 32703 | case VE::VSCLsirvml: |
| 32704 | case VE::VSCLsizvm: |
| 32705 | case VE::VSCLsizvmL: |
| 32706 | case VE::VSCLsizvml: |
| 32707 | case VE::VSCLsrrvm: |
| 32708 | case VE::VSCLsrrvmL: |
| 32709 | case VE::VSCLsrrvml: |
| 32710 | case VE::VSCLsrzvm: |
| 32711 | case VE::VSCLsrzvmL: |
| 32712 | case VE::VSCLsrzvml: |
| 32713 | case VE::VSCNCOTsirvm: |
| 32714 | case VE::VSCNCOTsirvmL: |
| 32715 | case VE::VSCNCOTsirvml: |
| 32716 | case VE::VSCNCOTsizvm: |
| 32717 | case VE::VSCNCOTsizvmL: |
| 32718 | case VE::VSCNCOTsizvml: |
| 32719 | case VE::VSCNCOTsrrvm: |
| 32720 | case VE::VSCNCOTsrrvmL: |
| 32721 | case VE::VSCNCOTsrrvml: |
| 32722 | case VE::VSCNCOTsrzvm: |
| 32723 | case VE::VSCNCOTsrzvmL: |
| 32724 | case VE::VSCNCOTsrzvml: |
| 32725 | case VE::VSCNCsirvm: |
| 32726 | case VE::VSCNCsirvmL: |
| 32727 | case VE::VSCNCsirvml: |
| 32728 | case VE::VSCNCsizvm: |
| 32729 | case VE::VSCNCsizvmL: |
| 32730 | case VE::VSCNCsizvml: |
| 32731 | case VE::VSCNCsrrvm: |
| 32732 | case VE::VSCNCsrrvmL: |
| 32733 | case VE::VSCNCsrrvml: |
| 32734 | case VE::VSCNCsrzvm: |
| 32735 | case VE::VSCNCsrzvmL: |
| 32736 | case VE::VSCNCsrzvml: |
| 32737 | case VE::VSCOTsirvm: |
| 32738 | case VE::VSCOTsirvmL: |
| 32739 | case VE::VSCOTsirvml: |
| 32740 | case VE::VSCOTsizvm: |
| 32741 | case VE::VSCOTsizvmL: |
| 32742 | case VE::VSCOTsizvml: |
| 32743 | case VE::VSCOTsrrvm: |
| 32744 | case VE::VSCOTsrrvmL: |
| 32745 | case VE::VSCOTsrrvml: |
| 32746 | case VE::VSCOTsrzvm: |
| 32747 | case VE::VSCOTsrzvmL: |
| 32748 | case VE::VSCOTsrzvml: |
| 32749 | case VE::VSCUNCOTsirvm: |
| 32750 | case VE::VSCUNCOTsirvmL: |
| 32751 | case VE::VSCUNCOTsirvml: |
| 32752 | case VE::VSCUNCOTsizvm: |
| 32753 | case VE::VSCUNCOTsizvmL: |
| 32754 | case VE::VSCUNCOTsizvml: |
| 32755 | case VE::VSCUNCOTsrrvm: |
| 32756 | case VE::VSCUNCOTsrrvmL: |
| 32757 | case VE::VSCUNCOTsrrvml: |
| 32758 | case VE::VSCUNCOTsrzvm: |
| 32759 | case VE::VSCUNCOTsrzvmL: |
| 32760 | case VE::VSCUNCOTsrzvml: |
| 32761 | case VE::VSCUNCsirvm: |
| 32762 | case VE::VSCUNCsirvmL: |
| 32763 | case VE::VSCUNCsirvml: |
| 32764 | case VE::VSCUNCsizvm: |
| 32765 | case VE::VSCUNCsizvmL: |
| 32766 | case VE::VSCUNCsizvml: |
| 32767 | case VE::VSCUNCsrrvm: |
| 32768 | case VE::VSCUNCsrrvmL: |
| 32769 | case VE::VSCUNCsrrvml: |
| 32770 | case VE::VSCUNCsrzvm: |
| 32771 | case VE::VSCUNCsrzvmL: |
| 32772 | case VE::VSCUNCsrzvml: |
| 32773 | case VE::VSCUOTsirvm: |
| 32774 | case VE::VSCUOTsirvmL: |
| 32775 | case VE::VSCUOTsirvml: |
| 32776 | case VE::VSCUOTsizvm: |
| 32777 | case VE::VSCUOTsizvmL: |
| 32778 | case VE::VSCUOTsizvml: |
| 32779 | case VE::VSCUOTsrrvm: |
| 32780 | case VE::VSCUOTsrrvmL: |
| 32781 | case VE::VSCUOTsrrvml: |
| 32782 | case VE::VSCUOTsrzvm: |
| 32783 | case VE::VSCUOTsrzvmL: |
| 32784 | case VE::VSCUOTsrzvml: |
| 32785 | case VE::VSCUsirvm: |
| 32786 | case VE::VSCUsirvmL: |
| 32787 | case VE::VSCUsirvml: |
| 32788 | case VE::VSCUsizvm: |
| 32789 | case VE::VSCUsizvmL: |
| 32790 | case VE::VSCUsizvml: |
| 32791 | case VE::VSCUsrrvm: |
| 32792 | case VE::VSCUsrrvmL: |
| 32793 | case VE::VSCUsrrvml: |
| 32794 | case VE::VSCUsrzvm: |
| 32795 | case VE::VSCUsrzvmL: |
| 32796 | case VE::VSCUsrzvml: |
| 32797 | case VE::VSCsirvm: |
| 32798 | case VE::VSCsirvmL: |
| 32799 | case VE::VSCsirvml: |
| 32800 | case VE::VSCsizvm: |
| 32801 | case VE::VSCsizvmL: |
| 32802 | case VE::VSCsizvml: |
| 32803 | case VE::VSCsrrvm: |
| 32804 | case VE::VSCsrrvmL: |
| 32805 | case VE::VSCsrrvml: |
| 32806 | case VE::VSCsrzvm: |
| 32807 | case VE::VSCsrzvmL: |
| 32808 | case VE::VSCsrzvml: { |
| 32809 | switch (OpNum) { |
| 32810 | case 4: |
| 32811 | // op: m |
| 32812 | return 48; |
| 32813 | case 1: |
| 32814 | // op: sy |
| 32815 | return 40; |
| 32816 | case 2: |
| 32817 | // op: sz |
| 32818 | return 32; |
| 32819 | case 3: |
| 32820 | // op: vx |
| 32821 | return 24; |
| 32822 | case 0: |
| 32823 | // op: sw |
| 32824 | return 0; |
| 32825 | } |
| 32826 | break; |
| 32827 | } |
| 32828 | case VE::VSCLNCOTvirvm: |
| 32829 | case VE::VSCLNCOTvirvmL: |
| 32830 | case VE::VSCLNCOTvirvml: |
| 32831 | case VE::VSCLNCOTvizvm: |
| 32832 | case VE::VSCLNCOTvizvmL: |
| 32833 | case VE::VSCLNCOTvizvml: |
| 32834 | case VE::VSCLNCOTvrrvm: |
| 32835 | case VE::VSCLNCOTvrrvmL: |
| 32836 | case VE::VSCLNCOTvrrvml: |
| 32837 | case VE::VSCLNCOTvrzvm: |
| 32838 | case VE::VSCLNCOTvrzvmL: |
| 32839 | case VE::VSCLNCOTvrzvml: |
| 32840 | case VE::VSCLNCvirvm: |
| 32841 | case VE::VSCLNCvirvmL: |
| 32842 | case VE::VSCLNCvirvml: |
| 32843 | case VE::VSCLNCvizvm: |
| 32844 | case VE::VSCLNCvizvmL: |
| 32845 | case VE::VSCLNCvizvml: |
| 32846 | case VE::VSCLNCvrrvm: |
| 32847 | case VE::VSCLNCvrrvmL: |
| 32848 | case VE::VSCLNCvrrvml: |
| 32849 | case VE::VSCLNCvrzvm: |
| 32850 | case VE::VSCLNCvrzvmL: |
| 32851 | case VE::VSCLNCvrzvml: |
| 32852 | case VE::VSCLOTvirvm: |
| 32853 | case VE::VSCLOTvirvmL: |
| 32854 | case VE::VSCLOTvirvml: |
| 32855 | case VE::VSCLOTvizvm: |
| 32856 | case VE::VSCLOTvizvmL: |
| 32857 | case VE::VSCLOTvizvml: |
| 32858 | case VE::VSCLOTvrrvm: |
| 32859 | case VE::VSCLOTvrrvmL: |
| 32860 | case VE::VSCLOTvrrvml: |
| 32861 | case VE::VSCLOTvrzvm: |
| 32862 | case VE::VSCLOTvrzvmL: |
| 32863 | case VE::VSCLOTvrzvml: |
| 32864 | case VE::VSCLvirvm: |
| 32865 | case VE::VSCLvirvmL: |
| 32866 | case VE::VSCLvirvml: |
| 32867 | case VE::VSCLvizvm: |
| 32868 | case VE::VSCLvizvmL: |
| 32869 | case VE::VSCLvizvml: |
| 32870 | case VE::VSCLvrrvm: |
| 32871 | case VE::VSCLvrrvmL: |
| 32872 | case VE::VSCLvrrvml: |
| 32873 | case VE::VSCLvrzvm: |
| 32874 | case VE::VSCLvrzvmL: |
| 32875 | case VE::VSCLvrzvml: |
| 32876 | case VE::VSCNCOTvirvm: |
| 32877 | case VE::VSCNCOTvirvmL: |
| 32878 | case VE::VSCNCOTvirvml: |
| 32879 | case VE::VSCNCOTvizvm: |
| 32880 | case VE::VSCNCOTvizvmL: |
| 32881 | case VE::VSCNCOTvizvml: |
| 32882 | case VE::VSCNCOTvrrvm: |
| 32883 | case VE::VSCNCOTvrrvmL: |
| 32884 | case VE::VSCNCOTvrrvml: |
| 32885 | case VE::VSCNCOTvrzvm: |
| 32886 | case VE::VSCNCOTvrzvmL: |
| 32887 | case VE::VSCNCOTvrzvml: |
| 32888 | case VE::VSCNCvirvm: |
| 32889 | case VE::VSCNCvirvmL: |
| 32890 | case VE::VSCNCvirvml: |
| 32891 | case VE::VSCNCvizvm: |
| 32892 | case VE::VSCNCvizvmL: |
| 32893 | case VE::VSCNCvizvml: |
| 32894 | case VE::VSCNCvrrvm: |
| 32895 | case VE::VSCNCvrrvmL: |
| 32896 | case VE::VSCNCvrrvml: |
| 32897 | case VE::VSCNCvrzvm: |
| 32898 | case VE::VSCNCvrzvmL: |
| 32899 | case VE::VSCNCvrzvml: |
| 32900 | case VE::VSCOTvirvm: |
| 32901 | case VE::VSCOTvirvmL: |
| 32902 | case VE::VSCOTvirvml: |
| 32903 | case VE::VSCOTvizvm: |
| 32904 | case VE::VSCOTvizvmL: |
| 32905 | case VE::VSCOTvizvml: |
| 32906 | case VE::VSCOTvrrvm: |
| 32907 | case VE::VSCOTvrrvmL: |
| 32908 | case VE::VSCOTvrrvml: |
| 32909 | case VE::VSCOTvrzvm: |
| 32910 | case VE::VSCOTvrzvmL: |
| 32911 | case VE::VSCOTvrzvml: |
| 32912 | case VE::VSCUNCOTvirvm: |
| 32913 | case VE::VSCUNCOTvirvmL: |
| 32914 | case VE::VSCUNCOTvirvml: |
| 32915 | case VE::VSCUNCOTvizvm: |
| 32916 | case VE::VSCUNCOTvizvmL: |
| 32917 | case VE::VSCUNCOTvizvml: |
| 32918 | case VE::VSCUNCOTvrrvm: |
| 32919 | case VE::VSCUNCOTvrrvmL: |
| 32920 | case VE::VSCUNCOTvrrvml: |
| 32921 | case VE::VSCUNCOTvrzvm: |
| 32922 | case VE::VSCUNCOTvrzvmL: |
| 32923 | case VE::VSCUNCOTvrzvml: |
| 32924 | case VE::VSCUNCvirvm: |
| 32925 | case VE::VSCUNCvirvmL: |
| 32926 | case VE::VSCUNCvirvml: |
| 32927 | case VE::VSCUNCvizvm: |
| 32928 | case VE::VSCUNCvizvmL: |
| 32929 | case VE::VSCUNCvizvml: |
| 32930 | case VE::VSCUNCvrrvm: |
| 32931 | case VE::VSCUNCvrrvmL: |
| 32932 | case VE::VSCUNCvrrvml: |
| 32933 | case VE::VSCUNCvrzvm: |
| 32934 | case VE::VSCUNCvrzvmL: |
| 32935 | case VE::VSCUNCvrzvml: |
| 32936 | case VE::VSCUOTvirvm: |
| 32937 | case VE::VSCUOTvirvmL: |
| 32938 | case VE::VSCUOTvirvml: |
| 32939 | case VE::VSCUOTvizvm: |
| 32940 | case VE::VSCUOTvizvmL: |
| 32941 | case VE::VSCUOTvizvml: |
| 32942 | case VE::VSCUOTvrrvm: |
| 32943 | case VE::VSCUOTvrrvmL: |
| 32944 | case VE::VSCUOTvrrvml: |
| 32945 | case VE::VSCUOTvrzvm: |
| 32946 | case VE::VSCUOTvrzvmL: |
| 32947 | case VE::VSCUOTvrzvml: |
| 32948 | case VE::VSCUvirvm: |
| 32949 | case VE::VSCUvirvmL: |
| 32950 | case VE::VSCUvirvml: |
| 32951 | case VE::VSCUvizvm: |
| 32952 | case VE::VSCUvizvmL: |
| 32953 | case VE::VSCUvizvml: |
| 32954 | case VE::VSCUvrrvm: |
| 32955 | case VE::VSCUvrrvmL: |
| 32956 | case VE::VSCUvrrvml: |
| 32957 | case VE::VSCUvrzvm: |
| 32958 | case VE::VSCUvrzvmL: |
| 32959 | case VE::VSCUvrzvml: |
| 32960 | case VE::VSCvirvm: |
| 32961 | case VE::VSCvirvmL: |
| 32962 | case VE::VSCvirvml: |
| 32963 | case VE::VSCvizvm: |
| 32964 | case VE::VSCvizvmL: |
| 32965 | case VE::VSCvizvml: |
| 32966 | case VE::VSCvrrvm: |
| 32967 | case VE::VSCvrrvmL: |
| 32968 | case VE::VSCvrrvml: |
| 32969 | case VE::VSCvrzvm: |
| 32970 | case VE::VSCvrzvmL: |
| 32971 | case VE::VSCvrzvml: { |
| 32972 | switch (OpNum) { |
| 32973 | case 4: |
| 32974 | // op: m |
| 32975 | return 48; |
| 32976 | case 1: |
| 32977 | // op: sy |
| 32978 | return 40; |
| 32979 | case 2: |
| 32980 | // op: sz |
| 32981 | return 32; |
| 32982 | case 3: |
| 32983 | // op: vx |
| 32984 | return 24; |
| 32985 | case 0: |
| 32986 | // op: vy |
| 32987 | return 16; |
| 32988 | } |
| 32989 | break; |
| 32990 | } |
| 32991 | case VE::PVFMADLOvivm: |
| 32992 | case VE::PVFMADLOvivmL: |
| 32993 | case VE::PVFMADLOvivmL_v: |
| 32994 | case VE::PVFMADLOvivm_v: |
| 32995 | case VE::PVFMADLOvivml: |
| 32996 | case VE::PVFMADLOvivml_v: |
| 32997 | case VE::PVFMADLOvrvm: |
| 32998 | case VE::PVFMADLOvrvmL: |
| 32999 | case VE::PVFMADLOvrvmL_v: |
| 33000 | case VE::PVFMADLOvrvm_v: |
| 33001 | case VE::PVFMADLOvrvml: |
| 33002 | case VE::PVFMADLOvrvml_v: |
| 33003 | case VE::PVFMADUPvivm: |
| 33004 | case VE::PVFMADUPvivmL: |
| 33005 | case VE::PVFMADUPvivmL_v: |
| 33006 | case VE::PVFMADUPvivm_v: |
| 33007 | case VE::PVFMADUPvivml: |
| 33008 | case VE::PVFMADUPvivml_v: |
| 33009 | case VE::PVFMADUPvrvm: |
| 33010 | case VE::PVFMADUPvrvmL: |
| 33011 | case VE::PVFMADUPvrvmL_v: |
| 33012 | case VE::PVFMADUPvrvm_v: |
| 33013 | case VE::PVFMADUPvrvml: |
| 33014 | case VE::PVFMADUPvrvml_v: |
| 33015 | case VE::PVFMADvivm: |
| 33016 | case VE::PVFMADvivmL: |
| 33017 | case VE::PVFMADvivmL_v: |
| 33018 | case VE::PVFMADvivm_v: |
| 33019 | case VE::PVFMADvivml: |
| 33020 | case VE::PVFMADvivml_v: |
| 33021 | case VE::PVFMADvrvm: |
| 33022 | case VE::PVFMADvrvmL: |
| 33023 | case VE::PVFMADvrvmL_v: |
| 33024 | case VE::PVFMADvrvm_v: |
| 33025 | case VE::PVFMADvrvml: |
| 33026 | case VE::PVFMADvrvml_v: |
| 33027 | case VE::PVFMSBLOvivm: |
| 33028 | case VE::PVFMSBLOvivmL: |
| 33029 | case VE::PVFMSBLOvivmL_v: |
| 33030 | case VE::PVFMSBLOvivm_v: |
| 33031 | case VE::PVFMSBLOvivml: |
| 33032 | case VE::PVFMSBLOvivml_v: |
| 33033 | case VE::PVFMSBLOvrvm: |
| 33034 | case VE::PVFMSBLOvrvmL: |
| 33035 | case VE::PVFMSBLOvrvmL_v: |
| 33036 | case VE::PVFMSBLOvrvm_v: |
| 33037 | case VE::PVFMSBLOvrvml: |
| 33038 | case VE::PVFMSBLOvrvml_v: |
| 33039 | case VE::PVFMSBUPvivm: |
| 33040 | case VE::PVFMSBUPvivmL: |
| 33041 | case VE::PVFMSBUPvivmL_v: |
| 33042 | case VE::PVFMSBUPvivm_v: |
| 33043 | case VE::PVFMSBUPvivml: |
| 33044 | case VE::PVFMSBUPvivml_v: |
| 33045 | case VE::PVFMSBUPvrvm: |
| 33046 | case VE::PVFMSBUPvrvmL: |
| 33047 | case VE::PVFMSBUPvrvmL_v: |
| 33048 | case VE::PVFMSBUPvrvm_v: |
| 33049 | case VE::PVFMSBUPvrvml: |
| 33050 | case VE::PVFMSBUPvrvml_v: |
| 33051 | case VE::PVFMSBvivm: |
| 33052 | case VE::PVFMSBvivmL: |
| 33053 | case VE::PVFMSBvivmL_v: |
| 33054 | case VE::PVFMSBvivm_v: |
| 33055 | case VE::PVFMSBvivml: |
| 33056 | case VE::PVFMSBvivml_v: |
| 33057 | case VE::PVFMSBvrvm: |
| 33058 | case VE::PVFMSBvrvmL: |
| 33059 | case VE::PVFMSBvrvmL_v: |
| 33060 | case VE::PVFMSBvrvm_v: |
| 33061 | case VE::PVFMSBvrvml: |
| 33062 | case VE::PVFMSBvrvml_v: |
| 33063 | case VE::PVFNMADLOvivm: |
| 33064 | case VE::PVFNMADLOvivmL: |
| 33065 | case VE::PVFNMADLOvivmL_v: |
| 33066 | case VE::PVFNMADLOvivm_v: |
| 33067 | case VE::PVFNMADLOvivml: |
| 33068 | case VE::PVFNMADLOvivml_v: |
| 33069 | case VE::PVFNMADLOvrvm: |
| 33070 | case VE::PVFNMADLOvrvmL: |
| 33071 | case VE::PVFNMADLOvrvmL_v: |
| 33072 | case VE::PVFNMADLOvrvm_v: |
| 33073 | case VE::PVFNMADLOvrvml: |
| 33074 | case VE::PVFNMADLOvrvml_v: |
| 33075 | case VE::PVFNMADUPvivm: |
| 33076 | case VE::PVFNMADUPvivmL: |
| 33077 | case VE::PVFNMADUPvivmL_v: |
| 33078 | case VE::PVFNMADUPvivm_v: |
| 33079 | case VE::PVFNMADUPvivml: |
| 33080 | case VE::PVFNMADUPvivml_v: |
| 33081 | case VE::PVFNMADUPvrvm: |
| 33082 | case VE::PVFNMADUPvrvmL: |
| 33083 | case VE::PVFNMADUPvrvmL_v: |
| 33084 | case VE::PVFNMADUPvrvm_v: |
| 33085 | case VE::PVFNMADUPvrvml: |
| 33086 | case VE::PVFNMADUPvrvml_v: |
| 33087 | case VE::PVFNMADvivm: |
| 33088 | case VE::PVFNMADvivmL: |
| 33089 | case VE::PVFNMADvivmL_v: |
| 33090 | case VE::PVFNMADvivm_v: |
| 33091 | case VE::PVFNMADvivml: |
| 33092 | case VE::PVFNMADvivml_v: |
| 33093 | case VE::PVFNMADvrvm: |
| 33094 | case VE::PVFNMADvrvmL: |
| 33095 | case VE::PVFNMADvrvmL_v: |
| 33096 | case VE::PVFNMADvrvm_v: |
| 33097 | case VE::PVFNMADvrvml: |
| 33098 | case VE::PVFNMADvrvml_v: |
| 33099 | case VE::PVFNMSBLOvivm: |
| 33100 | case VE::PVFNMSBLOvivmL: |
| 33101 | case VE::PVFNMSBLOvivmL_v: |
| 33102 | case VE::PVFNMSBLOvivm_v: |
| 33103 | case VE::PVFNMSBLOvivml: |
| 33104 | case VE::PVFNMSBLOvivml_v: |
| 33105 | case VE::PVFNMSBLOvrvm: |
| 33106 | case VE::PVFNMSBLOvrvmL: |
| 33107 | case VE::PVFNMSBLOvrvmL_v: |
| 33108 | case VE::PVFNMSBLOvrvm_v: |
| 33109 | case VE::PVFNMSBLOvrvml: |
| 33110 | case VE::PVFNMSBLOvrvml_v: |
| 33111 | case VE::PVFNMSBUPvivm: |
| 33112 | case VE::PVFNMSBUPvivmL: |
| 33113 | case VE::PVFNMSBUPvivmL_v: |
| 33114 | case VE::PVFNMSBUPvivm_v: |
| 33115 | case VE::PVFNMSBUPvivml: |
| 33116 | case VE::PVFNMSBUPvivml_v: |
| 33117 | case VE::PVFNMSBUPvrvm: |
| 33118 | case VE::PVFNMSBUPvrvmL: |
| 33119 | case VE::PVFNMSBUPvrvmL_v: |
| 33120 | case VE::PVFNMSBUPvrvm_v: |
| 33121 | case VE::PVFNMSBUPvrvml: |
| 33122 | case VE::PVFNMSBUPvrvml_v: |
| 33123 | case VE::PVFNMSBvivm: |
| 33124 | case VE::PVFNMSBvivmL: |
| 33125 | case VE::PVFNMSBvivmL_v: |
| 33126 | case VE::PVFNMSBvivm_v: |
| 33127 | case VE::PVFNMSBvivml: |
| 33128 | case VE::PVFNMSBvivml_v: |
| 33129 | case VE::PVFNMSBvrvm: |
| 33130 | case VE::PVFNMSBvrvmL: |
| 33131 | case VE::PVFNMSBvrvmL_v: |
| 33132 | case VE::PVFNMSBvrvm_v: |
| 33133 | case VE::PVFNMSBvrvml: |
| 33134 | case VE::PVFNMSBvrvml_v: |
| 33135 | case VE::VFMADDvivm: |
| 33136 | case VE::VFMADDvivmL: |
| 33137 | case VE::VFMADDvivmL_v: |
| 33138 | case VE::VFMADDvivm_v: |
| 33139 | case VE::VFMADDvivml: |
| 33140 | case VE::VFMADDvivml_v: |
| 33141 | case VE::VFMADDvrvm: |
| 33142 | case VE::VFMADDvrvmL: |
| 33143 | case VE::VFMADDvrvmL_v: |
| 33144 | case VE::VFMADDvrvm_v: |
| 33145 | case VE::VFMADDvrvml: |
| 33146 | case VE::VFMADDvrvml_v: |
| 33147 | case VE::VFMADSvivm: |
| 33148 | case VE::VFMADSvivmL: |
| 33149 | case VE::VFMADSvivmL_v: |
| 33150 | case VE::VFMADSvivm_v: |
| 33151 | case VE::VFMADSvivml: |
| 33152 | case VE::VFMADSvivml_v: |
| 33153 | case VE::VFMADSvrvm: |
| 33154 | case VE::VFMADSvrvmL: |
| 33155 | case VE::VFMADSvrvmL_v: |
| 33156 | case VE::VFMADSvrvm_v: |
| 33157 | case VE::VFMADSvrvml: |
| 33158 | case VE::VFMADSvrvml_v: |
| 33159 | case VE::VFMSBDvivm: |
| 33160 | case VE::VFMSBDvivmL: |
| 33161 | case VE::VFMSBDvivmL_v: |
| 33162 | case VE::VFMSBDvivm_v: |
| 33163 | case VE::VFMSBDvivml: |
| 33164 | case VE::VFMSBDvivml_v: |
| 33165 | case VE::VFMSBDvrvm: |
| 33166 | case VE::VFMSBDvrvmL: |
| 33167 | case VE::VFMSBDvrvmL_v: |
| 33168 | case VE::VFMSBDvrvm_v: |
| 33169 | case VE::VFMSBDvrvml: |
| 33170 | case VE::VFMSBDvrvml_v: |
| 33171 | case VE::VFMSBSvivm: |
| 33172 | case VE::VFMSBSvivmL: |
| 33173 | case VE::VFMSBSvivmL_v: |
| 33174 | case VE::VFMSBSvivm_v: |
| 33175 | case VE::VFMSBSvivml: |
| 33176 | case VE::VFMSBSvivml_v: |
| 33177 | case VE::VFMSBSvrvm: |
| 33178 | case VE::VFMSBSvrvmL: |
| 33179 | case VE::VFMSBSvrvmL_v: |
| 33180 | case VE::VFMSBSvrvm_v: |
| 33181 | case VE::VFMSBSvrvml: |
| 33182 | case VE::VFMSBSvrvml_v: |
| 33183 | case VE::VFNMADDvivm: |
| 33184 | case VE::VFNMADDvivmL: |
| 33185 | case VE::VFNMADDvivmL_v: |
| 33186 | case VE::VFNMADDvivm_v: |
| 33187 | case VE::VFNMADDvivml: |
| 33188 | case VE::VFNMADDvivml_v: |
| 33189 | case VE::VFNMADDvrvm: |
| 33190 | case VE::VFNMADDvrvmL: |
| 33191 | case VE::VFNMADDvrvmL_v: |
| 33192 | case VE::VFNMADDvrvm_v: |
| 33193 | case VE::VFNMADDvrvml: |
| 33194 | case VE::VFNMADDvrvml_v: |
| 33195 | case VE::VFNMADSvivm: |
| 33196 | case VE::VFNMADSvivmL: |
| 33197 | case VE::VFNMADSvivmL_v: |
| 33198 | case VE::VFNMADSvivm_v: |
| 33199 | case VE::VFNMADSvivml: |
| 33200 | case VE::VFNMADSvivml_v: |
| 33201 | case VE::VFNMADSvrvm: |
| 33202 | case VE::VFNMADSvrvmL: |
| 33203 | case VE::VFNMADSvrvmL_v: |
| 33204 | case VE::VFNMADSvrvm_v: |
| 33205 | case VE::VFNMADSvrvml: |
| 33206 | case VE::VFNMADSvrvml_v: |
| 33207 | case VE::VFNMSBDvivm: |
| 33208 | case VE::VFNMSBDvivmL: |
| 33209 | case VE::VFNMSBDvivmL_v: |
| 33210 | case VE::VFNMSBDvivm_v: |
| 33211 | case VE::VFNMSBDvivml: |
| 33212 | case VE::VFNMSBDvivml_v: |
| 33213 | case VE::VFNMSBDvrvm: |
| 33214 | case VE::VFNMSBDvrvmL: |
| 33215 | case VE::VFNMSBDvrvmL_v: |
| 33216 | case VE::VFNMSBDvrvm_v: |
| 33217 | case VE::VFNMSBDvrvml: |
| 33218 | case VE::VFNMSBDvrvml_v: |
| 33219 | case VE::VFNMSBSvivm: |
| 33220 | case VE::VFNMSBSvivmL: |
| 33221 | case VE::VFNMSBSvivmL_v: |
| 33222 | case VE::VFNMSBSvivm_v: |
| 33223 | case VE::VFNMSBSvivml: |
| 33224 | case VE::VFNMSBSvivml_v: |
| 33225 | case VE::VFNMSBSvrvm: |
| 33226 | case VE::VFNMSBSvrvmL: |
| 33227 | case VE::VFNMSBSvrvmL_v: |
| 33228 | case VE::VFNMSBSvrvm_v: |
| 33229 | case VE::VFNMSBSvrvml: |
| 33230 | case VE::VFNMSBSvrvml_v: { |
| 33231 | switch (OpNum) { |
| 33232 | case 4: |
| 33233 | // op: m |
| 33234 | return 48; |
| 33235 | case 2: |
| 33236 | // op: sy |
| 33237 | return 40; |
| 33238 | case 0: |
| 33239 | // op: vx |
| 33240 | return 24; |
| 33241 | case 1: |
| 33242 | // op: vy |
| 33243 | return 16; |
| 33244 | case 3: |
| 33245 | // op: vw |
| 33246 | return 0; |
| 33247 | } |
| 33248 | break; |
| 33249 | } |
| 33250 | case VE::VGTLSXNCsirm: |
| 33251 | case VE::VGTLSXNCsirmL: |
| 33252 | case VE::VGTLSXNCsirmL_v: |
| 33253 | case VE::VGTLSXNCsirm_v: |
| 33254 | case VE::VGTLSXNCsirml: |
| 33255 | case VE::VGTLSXNCsirml_v: |
| 33256 | case VE::VGTLSXNCsizm: |
| 33257 | case VE::VGTLSXNCsizmL: |
| 33258 | case VE::VGTLSXNCsizmL_v: |
| 33259 | case VE::VGTLSXNCsizm_v: |
| 33260 | case VE::VGTLSXNCsizml: |
| 33261 | case VE::VGTLSXNCsizml_v: |
| 33262 | case VE::VGTLSXNCsrrm: |
| 33263 | case VE::VGTLSXNCsrrmL: |
| 33264 | case VE::VGTLSXNCsrrmL_v: |
| 33265 | case VE::VGTLSXNCsrrm_v: |
| 33266 | case VE::VGTLSXNCsrrml: |
| 33267 | case VE::VGTLSXNCsrrml_v: |
| 33268 | case VE::VGTLSXNCsrzm: |
| 33269 | case VE::VGTLSXNCsrzmL: |
| 33270 | case VE::VGTLSXNCsrzmL_v: |
| 33271 | case VE::VGTLSXNCsrzm_v: |
| 33272 | case VE::VGTLSXNCsrzml: |
| 33273 | case VE::VGTLSXNCsrzml_v: |
| 33274 | case VE::VGTLSXsirm: |
| 33275 | case VE::VGTLSXsirmL: |
| 33276 | case VE::VGTLSXsirmL_v: |
| 33277 | case VE::VGTLSXsirm_v: |
| 33278 | case VE::VGTLSXsirml: |
| 33279 | case VE::VGTLSXsirml_v: |
| 33280 | case VE::VGTLSXsizm: |
| 33281 | case VE::VGTLSXsizmL: |
| 33282 | case VE::VGTLSXsizmL_v: |
| 33283 | case VE::VGTLSXsizm_v: |
| 33284 | case VE::VGTLSXsizml: |
| 33285 | case VE::VGTLSXsizml_v: |
| 33286 | case VE::VGTLSXsrrm: |
| 33287 | case VE::VGTLSXsrrmL: |
| 33288 | case VE::VGTLSXsrrmL_v: |
| 33289 | case VE::VGTLSXsrrm_v: |
| 33290 | case VE::VGTLSXsrrml: |
| 33291 | case VE::VGTLSXsrrml_v: |
| 33292 | case VE::VGTLSXsrzm: |
| 33293 | case VE::VGTLSXsrzmL: |
| 33294 | case VE::VGTLSXsrzmL_v: |
| 33295 | case VE::VGTLSXsrzm_v: |
| 33296 | case VE::VGTLSXsrzml: |
| 33297 | case VE::VGTLSXsrzml_v: |
| 33298 | case VE::VGTLZXNCsirm: |
| 33299 | case VE::VGTLZXNCsirmL: |
| 33300 | case VE::VGTLZXNCsirmL_v: |
| 33301 | case VE::VGTLZXNCsirm_v: |
| 33302 | case VE::VGTLZXNCsirml: |
| 33303 | case VE::VGTLZXNCsirml_v: |
| 33304 | case VE::VGTLZXNCsizm: |
| 33305 | case VE::VGTLZXNCsizmL: |
| 33306 | case VE::VGTLZXNCsizmL_v: |
| 33307 | case VE::VGTLZXNCsizm_v: |
| 33308 | case VE::VGTLZXNCsizml: |
| 33309 | case VE::VGTLZXNCsizml_v: |
| 33310 | case VE::VGTLZXNCsrrm: |
| 33311 | case VE::VGTLZXNCsrrmL: |
| 33312 | case VE::VGTLZXNCsrrmL_v: |
| 33313 | case VE::VGTLZXNCsrrm_v: |
| 33314 | case VE::VGTLZXNCsrrml: |
| 33315 | case VE::VGTLZXNCsrrml_v: |
| 33316 | case VE::VGTLZXNCsrzm: |
| 33317 | case VE::VGTLZXNCsrzmL: |
| 33318 | case VE::VGTLZXNCsrzmL_v: |
| 33319 | case VE::VGTLZXNCsrzm_v: |
| 33320 | case VE::VGTLZXNCsrzml: |
| 33321 | case VE::VGTLZXNCsrzml_v: |
| 33322 | case VE::VGTLZXsirm: |
| 33323 | case VE::VGTLZXsirmL: |
| 33324 | case VE::VGTLZXsirmL_v: |
| 33325 | case VE::VGTLZXsirm_v: |
| 33326 | case VE::VGTLZXsirml: |
| 33327 | case VE::VGTLZXsirml_v: |
| 33328 | case VE::VGTLZXsizm: |
| 33329 | case VE::VGTLZXsizmL: |
| 33330 | case VE::VGTLZXsizmL_v: |
| 33331 | case VE::VGTLZXsizm_v: |
| 33332 | case VE::VGTLZXsizml: |
| 33333 | case VE::VGTLZXsizml_v: |
| 33334 | case VE::VGTLZXsrrm: |
| 33335 | case VE::VGTLZXsrrmL: |
| 33336 | case VE::VGTLZXsrrmL_v: |
| 33337 | case VE::VGTLZXsrrm_v: |
| 33338 | case VE::VGTLZXsrrml: |
| 33339 | case VE::VGTLZXsrrml_v: |
| 33340 | case VE::VGTLZXsrzm: |
| 33341 | case VE::VGTLZXsrzmL: |
| 33342 | case VE::VGTLZXsrzmL_v: |
| 33343 | case VE::VGTLZXsrzm_v: |
| 33344 | case VE::VGTLZXsrzml: |
| 33345 | case VE::VGTLZXsrzml_v: |
| 33346 | case VE::VGTNCsirm: |
| 33347 | case VE::VGTNCsirmL: |
| 33348 | case VE::VGTNCsirmL_v: |
| 33349 | case VE::VGTNCsirm_v: |
| 33350 | case VE::VGTNCsirml: |
| 33351 | case VE::VGTNCsirml_v: |
| 33352 | case VE::VGTNCsizm: |
| 33353 | case VE::VGTNCsizmL: |
| 33354 | case VE::VGTNCsizmL_v: |
| 33355 | case VE::VGTNCsizm_v: |
| 33356 | case VE::VGTNCsizml: |
| 33357 | case VE::VGTNCsizml_v: |
| 33358 | case VE::VGTNCsrrm: |
| 33359 | case VE::VGTNCsrrmL: |
| 33360 | case VE::VGTNCsrrmL_v: |
| 33361 | case VE::VGTNCsrrm_v: |
| 33362 | case VE::VGTNCsrrml: |
| 33363 | case VE::VGTNCsrrml_v: |
| 33364 | case VE::VGTNCsrzm: |
| 33365 | case VE::VGTNCsrzmL: |
| 33366 | case VE::VGTNCsrzmL_v: |
| 33367 | case VE::VGTNCsrzm_v: |
| 33368 | case VE::VGTNCsrzml: |
| 33369 | case VE::VGTNCsrzml_v: |
| 33370 | case VE::VGTUNCsirm: |
| 33371 | case VE::VGTUNCsirmL: |
| 33372 | case VE::VGTUNCsirmL_v: |
| 33373 | case VE::VGTUNCsirm_v: |
| 33374 | case VE::VGTUNCsirml: |
| 33375 | case VE::VGTUNCsirml_v: |
| 33376 | case VE::VGTUNCsizm: |
| 33377 | case VE::VGTUNCsizmL: |
| 33378 | case VE::VGTUNCsizmL_v: |
| 33379 | case VE::VGTUNCsizm_v: |
| 33380 | case VE::VGTUNCsizml: |
| 33381 | case VE::VGTUNCsizml_v: |
| 33382 | case VE::VGTUNCsrrm: |
| 33383 | case VE::VGTUNCsrrmL: |
| 33384 | case VE::VGTUNCsrrmL_v: |
| 33385 | case VE::VGTUNCsrrm_v: |
| 33386 | case VE::VGTUNCsrrml: |
| 33387 | case VE::VGTUNCsrrml_v: |
| 33388 | case VE::VGTUNCsrzm: |
| 33389 | case VE::VGTUNCsrzmL: |
| 33390 | case VE::VGTUNCsrzmL_v: |
| 33391 | case VE::VGTUNCsrzm_v: |
| 33392 | case VE::VGTUNCsrzml: |
| 33393 | case VE::VGTUNCsrzml_v: |
| 33394 | case VE::VGTUsirm: |
| 33395 | case VE::VGTUsirmL: |
| 33396 | case VE::VGTUsirmL_v: |
| 33397 | case VE::VGTUsirm_v: |
| 33398 | case VE::VGTUsirml: |
| 33399 | case VE::VGTUsirml_v: |
| 33400 | case VE::VGTUsizm: |
| 33401 | case VE::VGTUsizmL: |
| 33402 | case VE::VGTUsizmL_v: |
| 33403 | case VE::VGTUsizm_v: |
| 33404 | case VE::VGTUsizml: |
| 33405 | case VE::VGTUsizml_v: |
| 33406 | case VE::VGTUsrrm: |
| 33407 | case VE::VGTUsrrmL: |
| 33408 | case VE::VGTUsrrmL_v: |
| 33409 | case VE::VGTUsrrm_v: |
| 33410 | case VE::VGTUsrrml: |
| 33411 | case VE::VGTUsrrml_v: |
| 33412 | case VE::VGTUsrzm: |
| 33413 | case VE::VGTUsrzmL: |
| 33414 | case VE::VGTUsrzmL_v: |
| 33415 | case VE::VGTUsrzm_v: |
| 33416 | case VE::VGTUsrzml: |
| 33417 | case VE::VGTUsrzml_v: |
| 33418 | case VE::VGTsirm: |
| 33419 | case VE::VGTsirmL: |
| 33420 | case VE::VGTsirmL_v: |
| 33421 | case VE::VGTsirm_v: |
| 33422 | case VE::VGTsirml: |
| 33423 | case VE::VGTsirml_v: |
| 33424 | case VE::VGTsizm: |
| 33425 | case VE::VGTsizmL: |
| 33426 | case VE::VGTsizmL_v: |
| 33427 | case VE::VGTsizm_v: |
| 33428 | case VE::VGTsizml: |
| 33429 | case VE::VGTsizml_v: |
| 33430 | case VE::VGTsrrm: |
| 33431 | case VE::VGTsrrmL: |
| 33432 | case VE::VGTsrrmL_v: |
| 33433 | case VE::VGTsrrm_v: |
| 33434 | case VE::VGTsrrml: |
| 33435 | case VE::VGTsrrml_v: |
| 33436 | case VE::VGTsrzm: |
| 33437 | case VE::VGTsrzmL: |
| 33438 | case VE::VGTsrzmL_v: |
| 33439 | case VE::VGTsrzm_v: |
| 33440 | case VE::VGTsrzml: |
| 33441 | case VE::VGTsrzml_v: { |
| 33442 | switch (OpNum) { |
| 33443 | case 4: |
| 33444 | // op: m |
| 33445 | return 48; |
| 33446 | case 2: |
| 33447 | // op: sy |
| 33448 | return 40; |
| 33449 | case 3: |
| 33450 | // op: sz |
| 33451 | return 32; |
| 33452 | case 0: |
| 33453 | // op: vx |
| 33454 | return 24; |
| 33455 | case 1: |
| 33456 | // op: sw |
| 33457 | return 0; |
| 33458 | } |
| 33459 | break; |
| 33460 | } |
| 33461 | case VE::VGTLSXNCvirm: |
| 33462 | case VE::VGTLSXNCvirmL: |
| 33463 | case VE::VGTLSXNCvirmL_v: |
| 33464 | case VE::VGTLSXNCvirm_v: |
| 33465 | case VE::VGTLSXNCvirml: |
| 33466 | case VE::VGTLSXNCvirml_v: |
| 33467 | case VE::VGTLSXNCvizm: |
| 33468 | case VE::VGTLSXNCvizmL: |
| 33469 | case VE::VGTLSXNCvizmL_v: |
| 33470 | case VE::VGTLSXNCvizm_v: |
| 33471 | case VE::VGTLSXNCvizml: |
| 33472 | case VE::VGTLSXNCvizml_v: |
| 33473 | case VE::VGTLSXNCvrrm: |
| 33474 | case VE::VGTLSXNCvrrmL: |
| 33475 | case VE::VGTLSXNCvrrmL_v: |
| 33476 | case VE::VGTLSXNCvrrm_v: |
| 33477 | case VE::VGTLSXNCvrrml: |
| 33478 | case VE::VGTLSXNCvrrml_v: |
| 33479 | case VE::VGTLSXNCvrzm: |
| 33480 | case VE::VGTLSXNCvrzmL: |
| 33481 | case VE::VGTLSXNCvrzmL_v: |
| 33482 | case VE::VGTLSXNCvrzm_v: |
| 33483 | case VE::VGTLSXNCvrzml: |
| 33484 | case VE::VGTLSXNCvrzml_v: |
| 33485 | case VE::VGTLSXvirm: |
| 33486 | case VE::VGTLSXvirmL: |
| 33487 | case VE::VGTLSXvirmL_v: |
| 33488 | case VE::VGTLSXvirm_v: |
| 33489 | case VE::VGTLSXvirml: |
| 33490 | case VE::VGTLSXvirml_v: |
| 33491 | case VE::VGTLSXvizm: |
| 33492 | case VE::VGTLSXvizmL: |
| 33493 | case VE::VGTLSXvizmL_v: |
| 33494 | case VE::VGTLSXvizm_v: |
| 33495 | case VE::VGTLSXvizml: |
| 33496 | case VE::VGTLSXvizml_v: |
| 33497 | case VE::VGTLSXvrrm: |
| 33498 | case VE::VGTLSXvrrmL: |
| 33499 | case VE::VGTLSXvrrmL_v: |
| 33500 | case VE::VGTLSXvrrm_v: |
| 33501 | case VE::VGTLSXvrrml: |
| 33502 | case VE::VGTLSXvrrml_v: |
| 33503 | case VE::VGTLSXvrzm: |
| 33504 | case VE::VGTLSXvrzmL: |
| 33505 | case VE::VGTLSXvrzmL_v: |
| 33506 | case VE::VGTLSXvrzm_v: |
| 33507 | case VE::VGTLSXvrzml: |
| 33508 | case VE::VGTLSXvrzml_v: |
| 33509 | case VE::VGTLZXNCvirm: |
| 33510 | case VE::VGTLZXNCvirmL: |
| 33511 | case VE::VGTLZXNCvirmL_v: |
| 33512 | case VE::VGTLZXNCvirm_v: |
| 33513 | case VE::VGTLZXNCvirml: |
| 33514 | case VE::VGTLZXNCvirml_v: |
| 33515 | case VE::VGTLZXNCvizm: |
| 33516 | case VE::VGTLZXNCvizmL: |
| 33517 | case VE::VGTLZXNCvizmL_v: |
| 33518 | case VE::VGTLZXNCvizm_v: |
| 33519 | case VE::VGTLZXNCvizml: |
| 33520 | case VE::VGTLZXNCvizml_v: |
| 33521 | case VE::VGTLZXNCvrrm: |
| 33522 | case VE::VGTLZXNCvrrmL: |
| 33523 | case VE::VGTLZXNCvrrmL_v: |
| 33524 | case VE::VGTLZXNCvrrm_v: |
| 33525 | case VE::VGTLZXNCvrrml: |
| 33526 | case VE::VGTLZXNCvrrml_v: |
| 33527 | case VE::VGTLZXNCvrzm: |
| 33528 | case VE::VGTLZXNCvrzmL: |
| 33529 | case VE::VGTLZXNCvrzmL_v: |
| 33530 | case VE::VGTLZXNCvrzm_v: |
| 33531 | case VE::VGTLZXNCvrzml: |
| 33532 | case VE::VGTLZXNCvrzml_v: |
| 33533 | case VE::VGTLZXvirm: |
| 33534 | case VE::VGTLZXvirmL: |
| 33535 | case VE::VGTLZXvirmL_v: |
| 33536 | case VE::VGTLZXvirm_v: |
| 33537 | case VE::VGTLZXvirml: |
| 33538 | case VE::VGTLZXvirml_v: |
| 33539 | case VE::VGTLZXvizm: |
| 33540 | case VE::VGTLZXvizmL: |
| 33541 | case VE::VGTLZXvizmL_v: |
| 33542 | case VE::VGTLZXvizm_v: |
| 33543 | case VE::VGTLZXvizml: |
| 33544 | case VE::VGTLZXvizml_v: |
| 33545 | case VE::VGTLZXvrrm: |
| 33546 | case VE::VGTLZXvrrmL: |
| 33547 | case VE::VGTLZXvrrmL_v: |
| 33548 | case VE::VGTLZXvrrm_v: |
| 33549 | case VE::VGTLZXvrrml: |
| 33550 | case VE::VGTLZXvrrml_v: |
| 33551 | case VE::VGTLZXvrzm: |
| 33552 | case VE::VGTLZXvrzmL: |
| 33553 | case VE::VGTLZXvrzmL_v: |
| 33554 | case VE::VGTLZXvrzm_v: |
| 33555 | case VE::VGTLZXvrzml: |
| 33556 | case VE::VGTLZXvrzml_v: |
| 33557 | case VE::VGTNCvirm: |
| 33558 | case VE::VGTNCvirmL: |
| 33559 | case VE::VGTNCvirmL_v: |
| 33560 | case VE::VGTNCvirm_v: |
| 33561 | case VE::VGTNCvirml: |
| 33562 | case VE::VGTNCvirml_v: |
| 33563 | case VE::VGTNCvizm: |
| 33564 | case VE::VGTNCvizmL: |
| 33565 | case VE::VGTNCvizmL_v: |
| 33566 | case VE::VGTNCvizm_v: |
| 33567 | case VE::VGTNCvizml: |
| 33568 | case VE::VGTNCvizml_v: |
| 33569 | case VE::VGTNCvrrm: |
| 33570 | case VE::VGTNCvrrmL: |
| 33571 | case VE::VGTNCvrrmL_v: |
| 33572 | case VE::VGTNCvrrm_v: |
| 33573 | case VE::VGTNCvrrml: |
| 33574 | case VE::VGTNCvrrml_v: |
| 33575 | case VE::VGTNCvrzm: |
| 33576 | case VE::VGTNCvrzmL: |
| 33577 | case VE::VGTNCvrzmL_v: |
| 33578 | case VE::VGTNCvrzm_v: |
| 33579 | case VE::VGTNCvrzml: |
| 33580 | case VE::VGTNCvrzml_v: |
| 33581 | case VE::VGTUNCvirm: |
| 33582 | case VE::VGTUNCvirmL: |
| 33583 | case VE::VGTUNCvirmL_v: |
| 33584 | case VE::VGTUNCvirm_v: |
| 33585 | case VE::VGTUNCvirml: |
| 33586 | case VE::VGTUNCvirml_v: |
| 33587 | case VE::VGTUNCvizm: |
| 33588 | case VE::VGTUNCvizmL: |
| 33589 | case VE::VGTUNCvizmL_v: |
| 33590 | case VE::VGTUNCvizm_v: |
| 33591 | case VE::VGTUNCvizml: |
| 33592 | case VE::VGTUNCvizml_v: |
| 33593 | case VE::VGTUNCvrrm: |
| 33594 | case VE::VGTUNCvrrmL: |
| 33595 | case VE::VGTUNCvrrmL_v: |
| 33596 | case VE::VGTUNCvrrm_v: |
| 33597 | case VE::VGTUNCvrrml: |
| 33598 | case VE::VGTUNCvrrml_v: |
| 33599 | case VE::VGTUNCvrzm: |
| 33600 | case VE::VGTUNCvrzmL: |
| 33601 | case VE::VGTUNCvrzmL_v: |
| 33602 | case VE::VGTUNCvrzm_v: |
| 33603 | case VE::VGTUNCvrzml: |
| 33604 | case VE::VGTUNCvrzml_v: |
| 33605 | case VE::VGTUvirm: |
| 33606 | case VE::VGTUvirmL: |
| 33607 | case VE::VGTUvirmL_v: |
| 33608 | case VE::VGTUvirm_v: |
| 33609 | case VE::VGTUvirml: |
| 33610 | case VE::VGTUvirml_v: |
| 33611 | case VE::VGTUvizm: |
| 33612 | case VE::VGTUvizmL: |
| 33613 | case VE::VGTUvizmL_v: |
| 33614 | case VE::VGTUvizm_v: |
| 33615 | case VE::VGTUvizml: |
| 33616 | case VE::VGTUvizml_v: |
| 33617 | case VE::VGTUvrrm: |
| 33618 | case VE::VGTUvrrmL: |
| 33619 | case VE::VGTUvrrmL_v: |
| 33620 | case VE::VGTUvrrm_v: |
| 33621 | case VE::VGTUvrrml: |
| 33622 | case VE::VGTUvrrml_v: |
| 33623 | case VE::VGTUvrzm: |
| 33624 | case VE::VGTUvrzmL: |
| 33625 | case VE::VGTUvrzmL_v: |
| 33626 | case VE::VGTUvrzm_v: |
| 33627 | case VE::VGTUvrzml: |
| 33628 | case VE::VGTUvrzml_v: |
| 33629 | case VE::VGTvirm: |
| 33630 | case VE::VGTvirmL: |
| 33631 | case VE::VGTvirmL_v: |
| 33632 | case VE::VGTvirm_v: |
| 33633 | case VE::VGTvirml: |
| 33634 | case VE::VGTvirml_v: |
| 33635 | case VE::VGTvizm: |
| 33636 | case VE::VGTvizmL: |
| 33637 | case VE::VGTvizmL_v: |
| 33638 | case VE::VGTvizm_v: |
| 33639 | case VE::VGTvizml: |
| 33640 | case VE::VGTvizml_v: |
| 33641 | case VE::VGTvrrm: |
| 33642 | case VE::VGTvrrmL: |
| 33643 | case VE::VGTvrrmL_v: |
| 33644 | case VE::VGTvrrm_v: |
| 33645 | case VE::VGTvrrml: |
| 33646 | case VE::VGTvrrml_v: |
| 33647 | case VE::VGTvrzm: |
| 33648 | case VE::VGTvrzmL: |
| 33649 | case VE::VGTvrzmL_v: |
| 33650 | case VE::VGTvrzm_v: |
| 33651 | case VE::VGTvrzml: |
| 33652 | case VE::VGTvrzml_v: { |
| 33653 | switch (OpNum) { |
| 33654 | case 4: |
| 33655 | // op: m |
| 33656 | return 48; |
| 33657 | case 2: |
| 33658 | // op: sy |
| 33659 | return 40; |
| 33660 | case 3: |
| 33661 | // op: sz |
| 33662 | return 32; |
| 33663 | case 0: |
| 33664 | // op: vx |
| 33665 | return 24; |
| 33666 | case 1: |
| 33667 | // op: vy |
| 33668 | return 16; |
| 33669 | } |
| 33670 | break; |
| 33671 | } |
| 33672 | case VE::VSFAvimm: |
| 33673 | case VE::VSFAvimmL: |
| 33674 | case VE::VSFAvimmL_v: |
| 33675 | case VE::VSFAvimm_v: |
| 33676 | case VE::VSFAvimml: |
| 33677 | case VE::VSFAvimml_v: |
| 33678 | case VE::VSFAvirm: |
| 33679 | case VE::VSFAvirmL: |
| 33680 | case VE::VSFAvirmL_v: |
| 33681 | case VE::VSFAvirm_v: |
| 33682 | case VE::VSFAvirml: |
| 33683 | case VE::VSFAvirml_v: |
| 33684 | case VE::VSFAvrmm: |
| 33685 | case VE::VSFAvrmmL: |
| 33686 | case VE::VSFAvrmmL_v: |
| 33687 | case VE::VSFAvrmm_v: |
| 33688 | case VE::VSFAvrmml: |
| 33689 | case VE::VSFAvrmml_v: |
| 33690 | case VE::VSFAvrrm: |
| 33691 | case VE::VSFAvrrmL: |
| 33692 | case VE::VSFAvrrmL_v: |
| 33693 | case VE::VSFAvrrm_v: |
| 33694 | case VE::VSFAvrrml: |
| 33695 | case VE::VSFAvrrml_v: { |
| 33696 | switch (OpNum) { |
| 33697 | case 4: |
| 33698 | // op: m |
| 33699 | return 48; |
| 33700 | case 2: |
| 33701 | // op: sy |
| 33702 | return 40; |
| 33703 | case 3: |
| 33704 | // op: sz |
| 33705 | return 32; |
| 33706 | case 0: |
| 33707 | // op: vx |
| 33708 | return 24; |
| 33709 | case 1: |
| 33710 | // op: vz |
| 33711 | return 8; |
| 33712 | } |
| 33713 | break; |
| 33714 | } |
| 33715 | case VE::VSLDvvim: |
| 33716 | case VE::VSLDvvimL: |
| 33717 | case VE::VSLDvvimL_v: |
| 33718 | case VE::VSLDvvim_v: |
| 33719 | case VE::VSLDvviml: |
| 33720 | case VE::VSLDvviml_v: |
| 33721 | case VE::VSLDvvrm: |
| 33722 | case VE::VSLDvvrmL: |
| 33723 | case VE::VSLDvvrmL_v: |
| 33724 | case VE::VSLDvvrm_v: |
| 33725 | case VE::VSLDvvrml: |
| 33726 | case VE::VSLDvvrml_v: |
| 33727 | case VE::VSRDvvim: |
| 33728 | case VE::VSRDvvimL: |
| 33729 | case VE::VSRDvvimL_v: |
| 33730 | case VE::VSRDvvim_v: |
| 33731 | case VE::VSRDvviml: |
| 33732 | case VE::VSRDvviml_v: |
| 33733 | case VE::VSRDvvrm: |
| 33734 | case VE::VSRDvvrmL: |
| 33735 | case VE::VSRDvvrmL_v: |
| 33736 | case VE::VSRDvvrm_v: |
| 33737 | case VE::VSRDvvrml: |
| 33738 | case VE::VSRDvvrml_v: { |
| 33739 | switch (OpNum) { |
| 33740 | case 4: |
| 33741 | // op: m |
| 33742 | return 48; |
| 33743 | case 3: |
| 33744 | // op: sy |
| 33745 | return 40; |
| 33746 | case 0: |
| 33747 | // op: vx |
| 33748 | return 24; |
| 33749 | case 1: |
| 33750 | // op: vy |
| 33751 | return 16; |
| 33752 | case 2: |
| 33753 | // op: vz |
| 33754 | return 8; |
| 33755 | } |
| 33756 | break; |
| 33757 | } |
| 33758 | } |
| 33759 | std::string msg; |
| 33760 | raw_string_ostream Msg(msg); |
| 33761 | Msg << "Not supported instr[opcode]: "<< MI << "["<< OpNum << "]"; |
| 33762 | report_fatal_error(Msg.str().c_str()); |
| 33763 | } |
| 33764 | |
| 33765 | #endif // GET_OPERAND_BIT_OFFSET |
| 33766 | |
| 33767 |
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