1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Assembly Matcher Source Fragment *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* From: WebAssembly.td *| |
7 | |* *| |
8 | \*===----------------------------------------------------------------------===*/ |
9 | |
10 | |
11 | #ifdef GET_ASSEMBLER_HEADER |
12 | #undef GET_ASSEMBLER_HEADER |
13 | // This should be included into the middle of the declaration of |
14 | // your subclasses implementation of MCTargetAsmParser. |
15 | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
16 | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
17 | const OperandVector &Operands); |
18 | void convertToMapAndConstraints(unsigned Kind, |
19 | const OperandVector &Operands) override; |
20 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
21 | MCInst &Inst, |
22 | uint64_t &ErrorInfo, |
23 | FeatureBitset &MissingFeatures, |
24 | bool matchingInlineAsm, |
25 | unsigned VariantID = 0); |
26 | unsigned MatchInstructionImpl(const OperandVector &Operands, |
27 | MCInst &Inst, |
28 | uint64_t &ErrorInfo, |
29 | bool matchingInlineAsm, |
30 | unsigned VariantID = 0) { |
31 | FeatureBitset MissingFeatures; |
32 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
33 | matchingInlineAsm, VariantID); |
34 | } |
35 | |
36 | #endif // GET_ASSEMBLER_HEADER |
37 | |
38 | |
39 | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
40 | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
41 | |
42 | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
43 | |
44 | |
45 | #ifdef GET_REGISTER_MATCHER |
46 | #undef GET_REGISTER_MATCHER |
47 | |
48 | // Bits for subtarget features that participate in instruction matching. |
49 | enum SubtargetFeatureBits : uint8_t { |
50 | Feature_HasAtomicsBit = 0, |
51 | Feature_HasBulkMemoryBit = 1, |
52 | Feature_HasExceptionHandlingBit = 2, |
53 | Feature_HasExtendedConstBit = 3, |
54 | Feature_HasHalfPrecisionBit = 4, |
55 | Feature_HasMultiMemoryBit = 5, |
56 | Feature_HasMultivalueBit = 6, |
57 | Feature_HasMutableGlobalsBit = 7, |
58 | Feature_HasNontrappingFPToIntBit = 8, |
59 | Feature_NotHasNontrappingFPToIntBit = 14, |
60 | Feature_HasReferenceTypesBit = 9, |
61 | Feature_HasRelaxedSIMDBit = 10, |
62 | Feature_HasSignExtBit = 12, |
63 | Feature_HasSIMD128Bit = 11, |
64 | Feature_HasTailCallBit = 13, |
65 | }; |
66 | |
67 | #endif // GET_REGISTER_MATCHER |
68 | |
69 | |
70 | #ifdef GET_SUBTARGET_FEATURE_NAME |
71 | #undef GET_SUBTARGET_FEATURE_NAME |
72 | |
73 | // User-level names for subtarget features that participate in |
74 | // instruction matching. |
75 | static const char *getSubtargetFeatureName(uint64_t Val) { |
76 | switch(Val) { |
77 | case Feature_HasAtomicsBit: return "atomics" ; |
78 | case Feature_HasBulkMemoryBit: return "bulk-memory" ; |
79 | case Feature_HasExceptionHandlingBit: return "exception-handling" ; |
80 | case Feature_HasExtendedConstBit: return "extended-const" ; |
81 | case Feature_HasHalfPrecisionBit: return "half-precision" ; |
82 | case Feature_HasMultiMemoryBit: return "multimemory" ; |
83 | case Feature_HasMultivalueBit: return "multivalue" ; |
84 | case Feature_HasMutableGlobalsBit: return "mutable-globals" ; |
85 | case Feature_HasNontrappingFPToIntBit: return "nontrapping-fptoint" ; |
86 | case Feature_NotHasNontrappingFPToIntBit: return "nontrapping-fptoint" ; |
87 | case Feature_HasReferenceTypesBit: return "reference-types" ; |
88 | case Feature_HasRelaxedSIMDBit: return "relaxed-simd" ; |
89 | case Feature_HasSignExtBit: return "sign-ext" ; |
90 | case Feature_HasSIMD128Bit: return "simd128" ; |
91 | case Feature_HasTailCallBit: return "tail-call" ; |
92 | default: return "(unknown)" ; |
93 | } |
94 | } |
95 | |
96 | #endif // GET_SUBTARGET_FEATURE_NAME |
97 | |
98 | |
99 | #ifdef GET_MATCHER_IMPLEMENTATION |
100 | #undef GET_MATCHER_IMPLEMENTATION |
101 | |
102 | static const uint8_t TiedAsmOperandTable[][3] = { /* empty */ {0, 0, 0} }; |
103 | |
104 | namespace { |
105 | enum OperatorConversionKind { |
106 | CVT_Done, |
107 | CVT_Reg, |
108 | CVT_Tied, |
109 | CVT_imm_95_0, |
110 | CVT_95_addImmOperands, |
111 | CVT_95_addBrListOperands, |
112 | CVT_95_addFPImmf32Operands, |
113 | CVT_95_addFPImmf64Operands, |
114 | CVT_NUM_CONVERTERS |
115 | }; |
116 | |
117 | enum InstructionConversionKind { |
118 | Convert__imm_95_0, |
119 | Convert__Imm1_0, |
120 | Convert__BrList1_0, |
121 | Convert__Imm1_0__Imm1_1, |
122 | Convert_NoOperands, |
123 | Convert__imm_95_0__imm_95_0, |
124 | Convert__FPImmf321_0, |
125 | Convert__Imm1_1__Imm1_0, |
126 | Convert__FPImmf641_0, |
127 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, |
128 | Convert__FPImmf641_0__FPImmf641_1, |
129 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3, |
130 | Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3, |
131 | Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7, |
132 | Convert__Imm1_1__Imm1_0__Imm1_2, |
133 | CVT_NUM_SIGNATURES |
134 | }; |
135 | |
136 | } // end anonymous namespace |
137 | |
138 | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][33] = { |
139 | // Convert__imm_95_0 |
140 | { CVT_imm_95_0, 0, CVT_Done }, |
141 | // Convert__Imm1_0 |
142 | { CVT_95_addImmOperands, 1, CVT_Done }, |
143 | // Convert__BrList1_0 |
144 | { CVT_95_addBrListOperands, 1, CVT_Done }, |
145 | // Convert__Imm1_0__Imm1_1 |
146 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
147 | // Convert_NoOperands |
148 | { CVT_Done }, |
149 | // Convert__imm_95_0__imm_95_0 |
150 | { CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, |
151 | // Convert__FPImmf321_0 |
152 | { CVT_95_addFPImmf32Operands, 1, CVT_Done }, |
153 | // Convert__Imm1_1__Imm1_0 |
154 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, |
155 | // Convert__FPImmf641_0 |
156 | { CVT_95_addFPImmf64Operands, 1, CVT_Done }, |
157 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15 |
158 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 9, CVT_95_addImmOperands, 10, CVT_95_addImmOperands, 11, CVT_95_addImmOperands, 12, CVT_95_addImmOperands, 13, CVT_95_addImmOperands, 14, CVT_95_addImmOperands, 15, CVT_95_addImmOperands, 16, CVT_Done }, |
159 | // Convert__FPImmf641_0__FPImmf641_1 |
160 | { CVT_95_addFPImmf64Operands, 1, CVT_95_addFPImmf64Operands, 2, CVT_Done }, |
161 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3 |
162 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
163 | // Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3 |
164 | { CVT_95_addFPImmf32Operands, 1, CVT_95_addFPImmf32Operands, 2, CVT_95_addFPImmf32Operands, 3, CVT_95_addFPImmf32Operands, 4, CVT_Done }, |
165 | // Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7 |
166 | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, |
167 | // Convert__Imm1_1__Imm1_0__Imm1_2 |
168 | { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 3, CVT_Done }, |
169 | }; |
170 | |
171 | void WebAssemblyAsmParser:: |
172 | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
173 | const OperandVector &Operands) { |
174 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
175 | const uint8_t *Converter = ConversionTable[Kind]; |
176 | Inst.setOpcode(Opcode); |
177 | for (const uint8_t *p = Converter; *p; p += 2) { |
178 | unsigned OpIdx = *(p + 1); |
179 | switch (*p) { |
180 | default: llvm_unreachable("invalid conversion entry!" ); |
181 | case CVT_Reg: |
182 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
183 | break; |
184 | case CVT_Tied: { |
185 | assert(*(p + 1) < (size_t)(std::end(TiedAsmOperandTable) - |
186 | std::begin(TiedAsmOperandTable)) && |
187 | "Tied operand not found" ); |
188 | unsigned TiedResOpnd = TiedAsmOperandTable[*(p + 1)][0]; |
189 | if (TiedResOpnd != (uint8_t)-1) |
190 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
191 | break; |
192 | } |
193 | case CVT_imm_95_0: |
194 | Inst.addOperand(MCOperand::createImm(0)); |
195 | break; |
196 | case CVT_95_addImmOperands: |
197 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
198 | break; |
199 | case CVT_95_addBrListOperands: |
200 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addBrListOperands(Inst, 1); |
201 | break; |
202 | case CVT_95_addFPImmf32Operands: |
203 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addFPImmf32Operands(Inst, 1); |
204 | break; |
205 | case CVT_95_addFPImmf64Operands: |
206 | static_cast<WebAssemblyOperand &>(*Operands[OpIdx]).addFPImmf64Operands(Inst, 1); |
207 | break; |
208 | } |
209 | } |
210 | } |
211 | |
212 | void WebAssemblyAsmParser:: |
213 | convertToMapAndConstraints(unsigned Kind, |
214 | const OperandVector &Operands) { |
215 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
216 | unsigned NumMCOperands = 0; |
217 | const uint8_t *Converter = ConversionTable[Kind]; |
218 | for (const uint8_t *p = Converter; *p; p += 2) { |
219 | switch (*p) { |
220 | default: llvm_unreachable("invalid conversion entry!" ); |
221 | case CVT_Reg: |
222 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
223 | Operands[*(p + 1)]->setConstraint("r" ); |
224 | ++NumMCOperands; |
225 | break; |
226 | case CVT_Tied: |
227 | ++NumMCOperands; |
228 | break; |
229 | case CVT_imm_95_0: |
230 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
231 | Operands[*(p + 1)]->setConstraint("" ); |
232 | ++NumMCOperands; |
233 | break; |
234 | case CVT_95_addImmOperands: |
235 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
236 | Operands[*(p + 1)]->setConstraint("m" ); |
237 | NumMCOperands += 1; |
238 | break; |
239 | case CVT_95_addBrListOperands: |
240 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
241 | Operands[*(p + 1)]->setConstraint("m" ); |
242 | NumMCOperands += 1; |
243 | break; |
244 | case CVT_95_addFPImmf32Operands: |
245 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
246 | Operands[*(p + 1)]->setConstraint("m" ); |
247 | NumMCOperands += 1; |
248 | break; |
249 | case CVT_95_addFPImmf64Operands: |
250 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
251 | Operands[*(p + 1)]->setConstraint("m" ); |
252 | NumMCOperands += 1; |
253 | break; |
254 | } |
255 | } |
256 | } |
257 | |
258 | namespace { |
259 | |
260 | /// MatchClassKind - The kinds of classes which participate in |
261 | /// instruction matching. |
262 | enum MatchClassKind { |
263 | InvalidMatchClass = 0, |
264 | OptionalMatchClass = 1, |
265 | MCK_LAST_TOKEN = OptionalMatchClass, |
266 | MCK_EXNREF, // register class 'EXNREF' |
267 | MCK_EXTERNREF, // register class 'EXTERNREF' |
268 | MCK_F32, // register class 'F32' |
269 | MCK_F64, // register class 'F64' |
270 | MCK_FUNCREF, // register class 'FUNCREF' |
271 | MCK_V128, // register class 'V128' |
272 | MCK_I32, // register class 'I32' |
273 | MCK_I64, // register class 'I64' |
274 | MCK_LAST_REGISTER = MCK_I64, |
275 | MCK_BrList, // user defined class 'BrListAsmOperand' |
276 | MCK_Imm, // user defined class 'ImmAsmOperand' |
277 | MCK_FPImmf32, // user defined class 'anonymous_8023' |
278 | MCK_FPImmf64, // user defined class 'anonymous_8024' |
279 | NumMatchClassKinds |
280 | }; |
281 | |
282 | } // end anonymous namespace |
283 | |
284 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
285 | return MCTargetAsmParser::Match_InvalidOperand; |
286 | } |
287 | |
288 | static MatchClassKind matchTokenString(StringRef Name) { |
289 | return InvalidMatchClass; |
290 | } |
291 | |
292 | /// isSubclass - Compute whether \p A is a subclass of \p B. |
293 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
294 | if (A == B) |
295 | return true; |
296 | |
297 | return false; |
298 | } |
299 | |
300 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
301 | WebAssemblyOperand &Operand = (WebAssemblyOperand &)GOp; |
302 | if (Kind == InvalidMatchClass) |
303 | return MCTargetAsmParser::Match_InvalidOperand; |
304 | |
305 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
306 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
307 | MCTargetAsmParser::Match_Success : |
308 | MCTargetAsmParser::Match_InvalidOperand; |
309 | |
310 | switch (Kind) { |
311 | default: break; |
312 | // 'BrList' class |
313 | case MCK_BrList: { |
314 | DiagnosticPredicate DP(Operand.isBrList()); |
315 | if (DP.isMatch()) |
316 | return MCTargetAsmParser::Match_Success; |
317 | break; |
318 | } |
319 | // 'Imm' class |
320 | case MCK_Imm: { |
321 | DiagnosticPredicate DP(Operand.isImm()); |
322 | if (DP.isMatch()) |
323 | return MCTargetAsmParser::Match_Success; |
324 | break; |
325 | } |
326 | // 'FPImmf32' class |
327 | case MCK_FPImmf32: { |
328 | DiagnosticPredicate DP(Operand.isFPImm()); |
329 | if (DP.isMatch()) |
330 | return MCTargetAsmParser::Match_Success; |
331 | break; |
332 | } |
333 | // 'FPImmf64' class |
334 | case MCK_FPImmf64: { |
335 | DiagnosticPredicate DP(Operand.isFPImm()); |
336 | if (DP.isMatch()) |
337 | return MCTargetAsmParser::Match_Success; |
338 | break; |
339 | } |
340 | } // end switch (Kind) |
341 | |
342 | if (Operand.isReg()) { |
343 | MatchClassKind OpKind; |
344 | switch (Operand.getReg().id()) { |
345 | default: OpKind = InvalidMatchClass; break; |
346 | case WebAssembly::FP32: OpKind = MCK_I32; break; |
347 | case WebAssembly::FP64: OpKind = MCK_I64; break; |
348 | case WebAssembly::SP32: OpKind = MCK_I32; break; |
349 | case WebAssembly::SP64: OpKind = MCK_I64; break; |
350 | case WebAssembly::I32_0: OpKind = MCK_I32; break; |
351 | case WebAssembly::I64_0: OpKind = MCK_I64; break; |
352 | case WebAssembly::F32_0: OpKind = MCK_F32; break; |
353 | case WebAssembly::F64_0: OpKind = MCK_F64; break; |
354 | case WebAssembly::V128_0: OpKind = MCK_V128; break; |
355 | case WebAssembly::FUNCREF_0: OpKind = MCK_FUNCREF; break; |
356 | case WebAssembly::EXTERNREF_0: OpKind = MCK_EXTERNREF; break; |
357 | case WebAssembly::EXNREF_0: OpKind = MCK_EXNREF; break; |
358 | } |
359 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
360 | getDiagKindFromRegisterClass(Kind); |
361 | } |
362 | |
363 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
364 | return getDiagKindFromRegisterClass(Kind); |
365 | |
366 | return MCTargetAsmParser::Match_InvalidOperand; |
367 | } |
368 | |
369 | #ifndef NDEBUG |
370 | const char *getMatchClassName(MatchClassKind Kind) { |
371 | switch (Kind) { |
372 | case InvalidMatchClass: return "InvalidMatchClass" ; |
373 | case OptionalMatchClass: return "OptionalMatchClass" ; |
374 | case MCK_EXNREF: return "MCK_EXNREF" ; |
375 | case MCK_EXTERNREF: return "MCK_EXTERNREF" ; |
376 | case MCK_F32: return "MCK_F32" ; |
377 | case MCK_F64: return "MCK_F64" ; |
378 | case MCK_FUNCREF: return "MCK_FUNCREF" ; |
379 | case MCK_V128: return "MCK_V128" ; |
380 | case MCK_I32: return "MCK_I32" ; |
381 | case MCK_I64: return "MCK_I64" ; |
382 | case MCK_BrList: return "MCK_BrList" ; |
383 | case MCK_Imm: return "MCK_Imm" ; |
384 | case MCK_FPImmf32: return "MCK_FPImmf32" ; |
385 | case MCK_FPImmf64: return "MCK_FPImmf64" ; |
386 | case NumMatchClassKinds: return "NumMatchClassKinds" ; |
387 | } |
388 | llvm_unreachable("unhandled MatchClassKind!" ); |
389 | } |
390 | |
391 | #endif // NDEBUG |
392 | FeatureBitset WebAssemblyAsmParser:: |
393 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
394 | FeatureBitset Features; |
395 | if (FB[WebAssembly::FeatureAtomics]) |
396 | Features.set(Feature_HasAtomicsBit); |
397 | if (FB[WebAssembly::FeatureBulkMemory]) |
398 | Features.set(Feature_HasBulkMemoryBit); |
399 | if (FB[WebAssembly::FeatureExceptionHandling]) |
400 | Features.set(Feature_HasExceptionHandlingBit); |
401 | if (FB[WebAssembly::FeatureExtendedConst]) |
402 | Features.set(Feature_HasExtendedConstBit); |
403 | if (FB[WebAssembly::FeatureHalfPrecision]) |
404 | Features.set(Feature_HasHalfPrecisionBit); |
405 | if (FB[WebAssembly::FeatureMultiMemory]) |
406 | Features.set(Feature_HasMultiMemoryBit); |
407 | if (FB[WebAssembly::FeatureMultivalue]) |
408 | Features.set(Feature_HasMultivalueBit); |
409 | if (FB[WebAssembly::FeatureMutableGlobals]) |
410 | Features.set(Feature_HasMutableGlobalsBit); |
411 | if (FB[WebAssembly::FeatureNontrappingFPToInt]) |
412 | Features.set(Feature_HasNontrappingFPToIntBit); |
413 | if (!FB[WebAssembly::FeatureNontrappingFPToInt]) |
414 | Features.set(Feature_NotHasNontrappingFPToIntBit); |
415 | if (FB[WebAssembly::FeatureReferenceTypes]) |
416 | Features.set(Feature_HasReferenceTypesBit); |
417 | if (FB[WebAssembly::FeatureRelaxedSIMD]) |
418 | Features.set(Feature_HasRelaxedSIMDBit); |
419 | if (FB[WebAssembly::FeatureSignExt]) |
420 | Features.set(Feature_HasSignExtBit); |
421 | if (FB[WebAssembly::FeatureSIMD128]) |
422 | Features.set(Feature_HasSIMD128Bit); |
423 | if (FB[WebAssembly::FeatureTailCall]) |
424 | Features.set(Feature_HasTailCallBit); |
425 | return Features; |
426 | } |
427 | |
428 | static bool checkAsmTiedOperandConstraints(const WebAssemblyAsmParser&AsmParser, |
429 | unsigned Kind, const OperandVector &Operands, |
430 | uint64_t &ErrorInfo) { |
431 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!" ); |
432 | const uint8_t *Converter = ConversionTable[Kind]; |
433 | for (const uint8_t *p = Converter; *p; p += 2) { |
434 | switch (*p) { |
435 | case CVT_Tied: { |
436 | unsigned OpIdx = *(p + 1); |
437 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
438 | std::begin(TiedAsmOperandTable)) && |
439 | "Tied operand not found" ); |
440 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
441 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
442 | if (OpndNum1 != OpndNum2) { |
443 | auto &SrcOp1 = Operands[OpndNum1]; |
444 | auto &SrcOp2 = Operands[OpndNum2]; |
445 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
446 | ErrorInfo = OpndNum2; |
447 | return false; |
448 | } |
449 | } |
450 | break; |
451 | } |
452 | default: |
453 | break; |
454 | } |
455 | } |
456 | return true; |
457 | } |
458 | |
459 | static const char MnemonicTable[] = |
460 | "\014atomic.fence\005block\002br\005br_if\010br_table\004call\015call_in" |
461 | "direct\013call_params\014call_results\005catch\tcatch_all\010catchret\n" |
462 | "cleanupret\016compiler_fence\tdata.drop\010delegate\004drop\004else\003" |
463 | "end\tend_block\014end_function\006end_if\010end_loop\007end_try\015exnr" |
464 | "ef.select\020externref.select\tf16x8.abs\tf16x8.add\nf16x8.ceil\025f16x" |
465 | "8.convert_i16x8_s\025f16x8.convert_i16x8_u\tf16x8.div\010f16x8.eq\022f1" |
466 | "6x8.extract_lane\013f16x8.floor\010f16x8.ge\010f16x8.gt\010f16x8.le\010" |
467 | "f16x8.lt\tf16x8.max\tf16x8.min\tf16x8.mul\010f16x8.ne\015f16x8.nearest\t" |
468 | "f16x8.neg\nf16x8.pmax\nf16x8.pmin\022f16x8.relaxed_madd\023f16x8.relaxe" |
469 | "d_nmadd\013f16x8.splat\nf16x8.sqrt\tf16x8.sub\013f16x8.trunc\007f32.abs" |
470 | "\007f32.add\010f32.ceil\tf32.const\021f32.convert_i32_s\021f32.convert_" |
471 | "i32_u\021f32.convert_i64_s\021f32.convert_i64_u\014f32.copysign\016f32." |
472 | "demote_f64\007f32.div\006f32.eq\tf32.floor\006f32.ge\006f32.gt\006f32.l" |
473 | "e\010f32.load\014f32.load_f16\006f32.lt\007f32.max\007f32.min\007f32.mu" |
474 | "l\006f32.ne\013f32.nearest\007f32.neg\023f32.reinterpret_i32\nf32.selec" |
475 | "t\010f32.sqrt\tf32.store\015f32.store_f16\007f32.sub\tf32.trunc\tf32x4." |
476 | "abs\tf32x4.add\nf32x4.ceil\025f32x4.convert_i32x4_s\025f32x4.convert_i3" |
477 | "2x4_u\027f32x4.demote_f64x2_zero\tf32x4.div\010f32x4.eq\022f32x4.extrac" |
478 | "t_lane\013f32x4.floor\010f32x4.ge\010f32x4.gt\010f32x4.le\010f32x4.lt\t" |
479 | "f32x4.max\tf32x4.min\tf32x4.mul\010f32x4.ne\015f32x4.nearest\tf32x4.neg" |
480 | "\nf32x4.pmax\nf32x4.pmin f32x4.relaxed_dot_bf16x8_add_f32\022f32x4.rela" |
481 | "xed_madd\021f32x4.relaxed_max\021f32x4.relaxed_min\023f32x4.relaxed_nma" |
482 | "dd\022f32x4.replace_lane\013f32x4.splat\nf32x4.sqrt\tf32x4.sub\013f32x4" |
483 | ".trunc\007f64.abs\007f64.add\010f64.ceil\tf64.const\021f64.convert_i32_" |
484 | "s\021f64.convert_i32_u\021f64.convert_i64_s\021f64.convert_i64_u\014f64" |
485 | ".copysign\007f64.div\006f64.eq\tf64.floor\006f64.ge\006f64.gt\006f64.le" |
486 | "\010f64.load\006f64.lt\007f64.max\007f64.min\007f64.mul\006f64.ne\013f6" |
487 | "4.nearest\007f64.neg\017f64.promote_f32\023f64.reinterpret_i64\nf64.sel" |
488 | "ect\010f64.sqrt\tf64.store\007f64.sub\tf64.trunc\tf64x2.abs\tf64x2.add\n" |
489 | "f64x2.ceil\031f64x2.convert_low_i32x4_s\031f64x2.convert_low_i32x4_u\tf" |
490 | "64x2.div\010f64x2.eq\022f64x2.extract_lane\013f64x2.floor\010f64x2.ge\010" |
491 | "f64x2.gt\010f64x2.le\010f64x2.lt\tf64x2.max\tf64x2.min\tf64x2.mul\010f6" |
492 | "4x2.ne\015f64x2.nearest\tf64x2.neg\nf64x2.pmax\nf64x2.pmin\027f64x2.pro" |
493 | "mote_low_f32x4\022f64x2.relaxed_madd\021f64x2.relaxed_max\021f64x2.rela" |
494 | "xed_min\023f64x2.relaxed_nmadd\022f64x2.replace_lane\013f64x2.splat\nf6" |
495 | "4x2.sqrt\tf64x2.sub\013f64x2.trunc\016funcref.select\nglobal.get\ngloba" |
496 | "l.set\ti16x8.abs\ti16x8.add\017i16x8.add_sat_s\017i16x8.add_sat_u\016i1" |
497 | "6x8.all_true\014i16x8.avgr_u\015i16x8.bitmask\010i16x8.eq\035i16x8.exta" |
498 | "dd_pairwise_i8x16_s\035i16x8.extadd_pairwise_i8x16_u\031i16x8.extend_hi" |
499 | "gh_i8x16_s\031i16x8.extend_high_i8x16_u\030i16x8.extend_low_i8x16_s\030" |
500 | "i16x8.extend_low_i8x16_u\031i16x8.extmul_high_i8x16_s\031i16x8.extmul_h" |
501 | "igh_i8x16_u\030i16x8.extmul_low_i8x16_s\030i16x8.extmul_low_i8x16_u\024" |
502 | "i16x8.extract_lane_s\024i16x8.extract_lane_u\ni16x8.ge_s\ni16x8.ge_u\ni" |
503 | "16x8.gt_s\ni16x8.gt_u\ni16x8.le_s\ni16x8.le_u\017i16x8.load8x8_s\017i16" |
504 | "x8.load8x8_u\ni16x8.lt_s\ni16x8.lt_u\013i16x8.max_s\013i16x8.max_u\013i" |
505 | "16x8.min_s\013i16x8.min_u\ti16x8.mul\024i16x8.narrow_i32x4_s\024i16x8.n" |
506 | "arrow_i32x4_u\010i16x8.ne\ti16x8.neg\023i16x8.q15mulr_sat_s\037i16x8.re" |
507 | "laxed_dot_i8x16_i7x16_s\030i16x8.relaxed_laneselect\027i16x8.relaxed_q1" |
508 | "5mulr_s\022i16x8.replace_lane\ti16x8.shl\013i16x8.shr_s\013i16x8.shr_u\013" |
509 | "i16x8.splat\ti16x8.sub\017i16x8.sub_sat_s\017i16x8.sub_sat_u\027i16x8.t" |
510 | "runc_sat_f16x8_s\027i16x8.trunc_sat_f16x8_u\007i32.add\007i32.and\017i3" |
511 | "2.atomic.load\023i32.atomic.load16_u\022i32.atomic.load8_u\022i32.atomi" |
512 | "c.rmw.add\022i32.atomic.rmw.and\026i32.atomic.rmw.cmpxchg\021i32.atomic" |
513 | ".rmw.or\022i32.atomic.rmw.sub\023i32.atomic.rmw.xchg\022i32.atomic.rmw." |
514 | "xor\026i32.atomic.rmw16.add_u\026i32.atomic.rmw16.and_u\032i32.atomic.r" |
515 | "mw16.cmpxchg_u\025i32.atomic.rmw16.or_u\026i32.atomic.rmw16.sub_u\027i3" |
516 | "2.atomic.rmw16.xchg_u\026i32.atomic.rmw16.xor_u\025i32.atomic.rmw8.add_" |
517 | "u\025i32.atomic.rmw8.and_u\031i32.atomic.rmw8.cmpxchg_u\024i32.atomic.r" |
518 | "mw8.or_u\025i32.atomic.rmw8.sub_u\026i32.atomic.rmw8.xchg_u\025i32.atom" |
519 | "ic.rmw8.xor_u\020i32.atomic.store\022i32.atomic.store16\021i32.atomic.s" |
520 | "tore8\007i32.clz\ti32.const\007i32.ctz\ti32.div_s\ti32.div_u\006i32.eq\007" |
521 | "i32.eqz\016i32.extend16_s\015i32.extend8_s\010i32.ge_s\010i32.ge_u\010i" |
522 | "32.gt_s\010i32.gt_u\010i32.le_s\010i32.le_u\010i32.load\014i32.load16_s" |
523 | "\014i32.load16_u\013i32.load8_s\013i32.load8_u\010i32.lt_s\010i32.lt_u\007" |
524 | "i32.mul\006i32.ne\006i32.or\ni32.popcnt\023i32.reinterpret_f32\ti32.rem" |
525 | "_s\ti32.rem_u\010i32.rotl\010i32.rotr\ni32.select\007i32.shl\ti32.shr_s" |
526 | "\ti32.shr_u\ti32.store\013i32.store16\ni32.store8\007i32.sub\017i32.tru" |
527 | "nc_f32_s\017i32.trunc_f32_u\017i32.trunc_f64_s\017i32.trunc_f64_u\023i3" |
528 | "2.trunc_sat_f32_s\023i32.trunc_sat_f32_u\023i32.trunc_sat_f64_s\023i32." |
529 | "trunc_sat_f64_u\014i32.wrap_i64\007i32.xor\ti32x4.abs\ti32x4.add\016i32" |
530 | "x4.all_true\015i32x4.bitmask\021i32x4.dot_i16x8_s\010i32x4.eq\035i32x4." |
531 | "extadd_pairwise_i16x8_s\035i32x4.extadd_pairwise_i16x8_u\031i32x4.exten" |
532 | "d_high_i16x8_s\031i32x4.extend_high_i16x8_u\030i32x4.extend_low_i16x8_s" |
533 | "\030i32x4.extend_low_i16x8_u\031i32x4.extmul_high_i16x8_s\031i32x4.extm" |
534 | "ul_high_i16x8_u\030i32x4.extmul_low_i16x8_s\030i32x4.extmul_low_i16x8_u" |
535 | "\022i32x4.extract_lane\ni32x4.ge_s\ni32x4.ge_u\ni32x4.gt_s\ni32x4.gt_u\n" |
536 | "i32x4.le_s\ni32x4.le_u\020i32x4.load16x4_s\020i32x4.load16x4_u\ni32x4.l" |
537 | "t_s\ni32x4.lt_u\013i32x4.max_s\013i32x4.max_u\013i32x4.min_s\013i32x4.m" |
538 | "in_u\ti32x4.mul\010i32x4.ne\ti32x4.neg#i32x4.relaxed_dot_i8x16_i7x16_ad" |
539 | "d_s\030i32x4.relaxed_laneselect\033i32x4.relaxed_trunc_f32x4_s\033i32x4" |
540 | ".relaxed_trunc_f32x4_u i32x4.relaxed_trunc_f64x2_s_zero i32x4.relaxed_t" |
541 | "runc_f64x2_u_zero\022i32x4.replace_lane\ti32x4.shl\013i32x4.shr_s\013i3" |
542 | "2x4.shr_u\013i32x4.splat\ti32x4.sub\027i32x4.trunc_sat_f32x4_s\027i32x4" |
543 | ".trunc_sat_f32x4_u\034i32x4.trunc_sat_f64x2_s_zero\034i32x4.trunc_sat_f" |
544 | "64x2_u_zero\007i64.add\007i64.and\017i64.atomic.load\023i64.atomic.load" |
545 | "16_u\023i64.atomic.load32_u\022i64.atomic.load8_u\022i64.atomic.rmw.add" |
546 | "\022i64.atomic.rmw.and\026i64.atomic.rmw.cmpxchg\021i64.atomic.rmw.or\022" |
547 | "i64.atomic.rmw.sub\023i64.atomic.rmw.xchg\022i64.atomic.rmw.xor\026i64." |
548 | "atomic.rmw16.add_u\026i64.atomic.rmw16.and_u\032i64.atomic.rmw16.cmpxch" |
549 | "g_u\025i64.atomic.rmw16.or_u\026i64.atomic.rmw16.sub_u\027i64.atomic.rm" |
550 | "w16.xchg_u\026i64.atomic.rmw16.xor_u\026i64.atomic.rmw32.add_u\026i64.a" |
551 | "tomic.rmw32.and_u\032i64.atomic.rmw32.cmpxchg_u\025i64.atomic.rmw32.or_" |
552 | "u\026i64.atomic.rmw32.sub_u\027i64.atomic.rmw32.xchg_u\026i64.atomic.rm" |
553 | "w32.xor_u\025i64.atomic.rmw8.add_u\025i64.atomic.rmw8.and_u\031i64.atom" |
554 | "ic.rmw8.cmpxchg_u\024i64.atomic.rmw8.or_u\025i64.atomic.rmw8.sub_u\026i" |
555 | "64.atomic.rmw8.xchg_u\025i64.atomic.rmw8.xor_u\020i64.atomic.store\022i" |
556 | "64.atomic.store16\022i64.atomic.store32\021i64.atomic.store8\007i64.clz" |
557 | "\ti64.const\007i64.ctz\ti64.div_s\ti64.div_u\006i64.eq\007i64.eqz\016i6" |
558 | "4.extend16_s\016i64.extend32_s\015i64.extend8_s\020i64.extend_i32_s\020" |
559 | "i64.extend_i32_u\010i64.ge_s\010i64.ge_u\010i64.gt_s\010i64.gt_u\010i64" |
560 | ".le_s\010i64.le_u\010i64.load\014i64.load16_s\014i64.load16_u\014i64.lo" |
561 | "ad32_s\014i64.load32_u\013i64.load8_s\013i64.load8_u\010i64.lt_s\010i64" |
562 | ".lt_u\007i64.mul\006i64.ne\006i64.or\ni64.popcnt\023i64.reinterpret_f64" |
563 | "\ti64.rem_s\ti64.rem_u\010i64.rotl\010i64.rotr\ni64.select\007i64.shl\t" |
564 | "i64.shr_s\ti64.shr_u\ti64.store\013i64.store16\013i64.store32\ni64.stor" |
565 | "e8\007i64.sub\017i64.trunc_f32_s\017i64.trunc_f32_u\017i64.trunc_f64_s\017" |
566 | "i64.trunc_f64_u\023i64.trunc_sat_f32_s\023i64.trunc_sat_f32_u\023i64.tr" |
567 | "unc_sat_f64_s\023i64.trunc_sat_f64_u\007i64.xor\ti64x2.abs\ti64x2.add\016" |
568 | "i64x2.all_true\015i64x2.bitmask\010i64x2.eq\031i64x2.extend_high_i32x4_" |
569 | "s\031i64x2.extend_high_i32x4_u\030i64x2.extend_low_i32x4_s\030i64x2.ext" |
570 | "end_low_i32x4_u\031i64x2.extmul_high_i32x4_s\031i64x2.extmul_high_i32x4" |
571 | "_u\030i64x2.extmul_low_i32x4_s\030i64x2.extmul_low_i32x4_u\022i64x2.ext" |
572 | "ract_lane\ni64x2.ge_s\ni64x2.gt_s\ni64x2.le_s\020i64x2.load32x2_s\020i6" |
573 | "4x2.load32x2_u\ni64x2.lt_s\ti64x2.mul\010i64x2.ne\ti64x2.neg\030i64x2.r" |
574 | "elaxed_laneselect\022i64x2.replace_lane\ti64x2.shl\013i64x2.shr_s\013i6" |
575 | "4x2.shr_u\013i64x2.splat\ti64x2.sub\ti8x16.abs\ti8x16.add\017i8x16.add_" |
576 | "sat_s\017i8x16.add_sat_u\016i8x16.all_true\014i8x16.avgr_u\015i8x16.bit" |
577 | "mask\010i8x16.eq\024i8x16.extract_lane_s\024i8x16.extract_lane_u\ni8x16" |
578 | ".ge_s\ni8x16.ge_u\ni8x16.gt_s\ni8x16.gt_u\ni8x16.le_s\ni8x16.le_u\ni8x1" |
579 | "6.lt_s\ni8x16.lt_u\013i8x16.max_s\013i8x16.max_u\013i8x16.min_s\013i8x1" |
580 | "6.min_u\024i8x16.narrow_i16x8_s\024i8x16.narrow_i16x8_u\010i8x16.ne\ti8" |
581 | "x16.neg\014i8x16.popcnt\030i8x16.relaxed_laneselect\025i8x16.relaxed_sw" |
582 | "izzle\022i8x16.replace_lane\ti8x16.shl\013i8x16.shr_s\013i8x16.shr_u\015" |
583 | "i8x16.shuffle\013i8x16.splat\ti8x16.sub\017i8x16.sub_sat_s\017i8x16.sub" |
584 | "_sat_u\015i8x16.swizzle\002if\tlocal.get\tlocal.set\tlocal.tee\004loop\024" |
585 | "memory.atomic.notify\024memory.atomic.wait32\024memory.atomic.wait64\013" |
586 | "memory.copy\013memory.fill\013memory.grow\013memory.init\013memory.size" |
587 | "\003nop\013ref.is_null\014ref.null_exn\017ref.null_extern\015ref.null_f" |
588 | "unc\007rethrow\006return\013return_call\024return_call_indirect\023retu" |
589 | "rn_call_results\ntable.copy\ntable.fill\ttable.get\ntable.grow\ttable.s" |
590 | "et\ntable.size\005throw\003try\013unreachable\010v128.and\013v128.andno" |
591 | "t\015v128.any_true\016v128.bitselect\nv128.const\tv128.load\020v128.loa" |
592 | "d16_lane\021v128.load16_splat\020v128.load32_lane\021v128.load32_splat\020" |
593 | "v128.load32_zero\020v128.load64_lane\021v128.load64_splat\020v128.load6" |
594 | "4_zero\017v128.load8_lane\020v128.load8_splat\010v128.not\007v128.or\013" |
595 | "v128.select\nv128.store\021v128.store16_lane\021v128.store32_lane\021v1" |
596 | "28.store64_lane\020v128.store8_lane\010v128.xor" ; |
597 | |
598 | // Feature bitsets. |
599 | enum : uint8_t { |
600 | AMFBS_None, |
601 | AMFBS_HasAtomics, |
602 | AMFBS_HasBulkMemory, |
603 | AMFBS_HasExceptionHandling, |
604 | AMFBS_HasHalfPrecision, |
605 | AMFBS_HasNontrappingFPToInt, |
606 | AMFBS_HasReferenceTypes, |
607 | AMFBS_HasRelaxedSIMD, |
608 | AMFBS_HasSIMD128, |
609 | AMFBS_HasSignExt, |
610 | AMFBS_HasTailCall, |
611 | AMFBS_HasReferenceTypes_HasExceptionHandling, |
612 | AMFBS_HasSIMD128_HasHalfPrecision, |
613 | AMFBS_HasSIMD128_HasRelaxedSIMD, |
614 | }; |
615 | |
616 | static constexpr FeatureBitset FeatureBitsets[] = { |
617 | {}, // AMFBS_None |
618 | {Feature_HasAtomicsBit, }, |
619 | {Feature_HasBulkMemoryBit, }, |
620 | {Feature_HasExceptionHandlingBit, }, |
621 | {Feature_HasHalfPrecisionBit, }, |
622 | {Feature_HasNontrappingFPToIntBit, }, |
623 | {Feature_HasReferenceTypesBit, }, |
624 | {Feature_HasRelaxedSIMDBit, }, |
625 | {Feature_HasSIMD128Bit, }, |
626 | {Feature_HasSignExtBit, }, |
627 | {Feature_HasTailCallBit, }, |
628 | {Feature_HasReferenceTypesBit, Feature_HasExceptionHandlingBit, }, |
629 | {Feature_HasSIMD128Bit, Feature_HasHalfPrecisionBit, }, |
630 | {Feature_HasSIMD128Bit, Feature_HasRelaxedSIMDBit, }, |
631 | }; |
632 | |
633 | namespace { |
634 | struct MatchEntry { |
635 | uint16_t Mnemonic; |
636 | uint16_t Opcode; |
637 | uint8_t ConvertFn; |
638 | uint8_t RequiredFeaturesIdx; |
639 | uint8_t Classes[16]; |
640 | StringRef getMnemonic() const { |
641 | return StringRef(MnemonicTable + Mnemonic + 1, |
642 | MnemonicTable[Mnemonic]); |
643 | } |
644 | }; |
645 | |
646 | // Predicate for searching for an opcode. |
647 | struct LessOpcode { |
648 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
649 | return LHS.getMnemonic() < RHS; |
650 | } |
651 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
652 | return LHS < RHS.getMnemonic(); |
653 | } |
654 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
655 | return LHS.getMnemonic() < RHS.getMnemonic(); |
656 | } |
657 | }; |
658 | } // end anonymous namespace |
659 | |
660 | static const MatchEntry MatchTable0[] = { |
661 | { 0 /* atomic.fence */, WebAssembly::ATOMIC_FENCE_S, Convert__imm_95_0, AMFBS_HasAtomics, { }, }, |
662 | { 13 /* block */, WebAssembly::BLOCK_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
663 | { 19 /* br */, WebAssembly::BR_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
664 | { 22 /* br_if */, WebAssembly::BR_IF_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
665 | { 28 /* br_table */, WebAssembly::BR_TABLE_I32_S, Convert__BrList1_0, AMFBS_None, { MCK_BrList }, }, |
666 | { 28 /* br_table */, WebAssembly::BR_TABLE_I64_S, Convert__BrList1_0, AMFBS_None, { MCK_BrList }, }, |
667 | { 37 /* call */, WebAssembly::CALL_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
668 | { 42 /* call_indirect */, WebAssembly::CALL_INDIRECT_S, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
669 | { 56 /* call_params */, WebAssembly::CALL_PARAMS_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
670 | { 68 /* call_results */, WebAssembly::CALL_RESULTS_S, Convert_NoOperands, AMFBS_None, { }, }, |
671 | { 81 /* catch */, WebAssembly::CATCH_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
672 | { 87 /* catch_all */, WebAssembly::CATCH_ALL_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
673 | { 97 /* catchret */, WebAssembly::CATCHRET_S, Convert__imm_95_0__imm_95_0, AMFBS_HasExceptionHandling, { }, }, |
674 | { 106 /* cleanupret */, WebAssembly::CLEANUPRET_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
675 | { 117 /* compiler_fence */, WebAssembly::COMPILER_FENCE_S, Convert_NoOperands, AMFBS_HasAtomics, { }, }, |
676 | { 132 /* data.drop */, WebAssembly::anonymous_8878DATA_DROP_S, Convert__Imm1_0, AMFBS_HasBulkMemory, { MCK_Imm }, }, |
677 | { 132 /* data.drop */, WebAssembly::anonymous_8879DATA_DROP_S, Convert__Imm1_0, AMFBS_HasBulkMemory, { MCK_Imm }, }, |
678 | { 142 /* delegate */, WebAssembly::DELEGATE_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
679 | { 151 /* drop */, WebAssembly::DROP_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes_HasExceptionHandling, { }, }, |
680 | { 151 /* drop */, WebAssembly::DROP_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
681 | { 151 /* drop */, WebAssembly::DROP_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
682 | { 151 /* drop */, WebAssembly::DROP_V128_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
683 | { 151 /* drop */, WebAssembly::DROP_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
684 | { 151 /* drop */, WebAssembly::DROP_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
685 | { 151 /* drop */, WebAssembly::DROP_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
686 | { 151 /* drop */, WebAssembly::DROP_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
687 | { 156 /* else */, WebAssembly::ELSE_S, Convert_NoOperands, AMFBS_None, { }, }, |
688 | { 161 /* end */, WebAssembly::END_S, Convert_NoOperands, AMFBS_None, { }, }, |
689 | { 165 /* end_block */, WebAssembly::END_BLOCK_S, Convert_NoOperands, AMFBS_None, { }, }, |
690 | { 175 /* end_function */, WebAssembly::END_FUNCTION_S, Convert_NoOperands, AMFBS_None, { }, }, |
691 | { 188 /* end_if */, WebAssembly::END_IF_S, Convert_NoOperands, AMFBS_None, { }, }, |
692 | { 195 /* end_loop */, WebAssembly::END_LOOP_S, Convert_NoOperands, AMFBS_None, { }, }, |
693 | { 204 /* end_try */, WebAssembly::END_TRY_S, Convert_NoOperands, AMFBS_HasExceptionHandling, { }, }, |
694 | { 212 /* exnref.select */, WebAssembly::SELECT_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
695 | { 226 /* externref.select */, WebAssembly::SELECT_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
696 | { 243 /* f16x8.abs */, WebAssembly::ABS_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
697 | { 253 /* f16x8.add */, WebAssembly::ADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
698 | { 263 /* f16x8.ceil */, WebAssembly::CEIL_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
699 | { 274 /* f16x8.convert_i16x8_s */, WebAssembly::sint_to_fp_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
700 | { 296 /* f16x8.convert_i16x8_u */, WebAssembly::uint_to_fp_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
701 | { 318 /* f16x8.div */, WebAssembly::DIV_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
702 | { 328 /* f16x8.eq */, WebAssembly::EQ_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
703 | { 337 /* f16x8.extract_lane */, WebAssembly::EXTRACT_LANE_F16x8_S, Convert__Imm1_0, AMFBS_HasHalfPrecision, { MCK_Imm }, }, |
704 | { 356 /* f16x8.floor */, WebAssembly::FLOOR_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
705 | { 368 /* f16x8.ge */, WebAssembly::GE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
706 | { 377 /* f16x8.gt */, WebAssembly::GT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
707 | { 386 /* f16x8.le */, WebAssembly::LE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
708 | { 395 /* f16x8.lt */, WebAssembly::LT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
709 | { 404 /* f16x8.max */, WebAssembly::MAX_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
710 | { 414 /* f16x8.min */, WebAssembly::MIN_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
711 | { 424 /* f16x8.mul */, WebAssembly::MUL_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
712 | { 434 /* f16x8.ne */, WebAssembly::NE_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
713 | { 443 /* f16x8.nearest */, WebAssembly::NEAREST_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
714 | { 457 /* f16x8.neg */, WebAssembly::NEG_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
715 | { 467 /* f16x8.pmax */, WebAssembly::PMAX_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
716 | { 478 /* f16x8.pmin */, WebAssembly::PMIN_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
717 | { 489 /* f16x8.relaxed_madd */, WebAssembly::MADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
718 | { 508 /* f16x8.relaxed_nmadd */, WebAssembly::NMADD_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
719 | { 528 /* f16x8.splat */, WebAssembly::SPLAT_F16x8_S, Convert_NoOperands, AMFBS_HasHalfPrecision, { }, }, |
720 | { 540 /* f16x8.sqrt */, WebAssembly::SQRT_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
721 | { 551 /* f16x8.sub */, WebAssembly::SUB_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
722 | { 561 /* f16x8.trunc */, WebAssembly::TRUNC_F16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
723 | { 573 /* f32.abs */, WebAssembly::ABS_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
724 | { 581 /* f32.add */, WebAssembly::ADD_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
725 | { 589 /* f32.ceil */, WebAssembly::CEIL_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
726 | { 598 /* f32.const */, WebAssembly::CONST_F32_S, Convert__FPImmf321_0, AMFBS_None, { MCK_FPImmf32 }, }, |
727 | { 608 /* f32.convert_i32_s */, WebAssembly::F32_CONVERT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
728 | { 626 /* f32.convert_i32_u */, WebAssembly::F32_CONVERT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
729 | { 644 /* f32.convert_i64_s */, WebAssembly::F32_CONVERT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
730 | { 662 /* f32.convert_i64_u */, WebAssembly::F32_CONVERT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
731 | { 680 /* f32.copysign */, WebAssembly::COPYSIGN_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
732 | { 693 /* f32.demote_f64 */, WebAssembly::F32_DEMOTE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
733 | { 708 /* f32.div */, WebAssembly::DIV_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
734 | { 716 /* f32.eq */, WebAssembly::EQ_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
735 | { 723 /* f32.floor */, WebAssembly::FLOOR_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
736 | { 733 /* f32.ge */, WebAssembly::GE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
737 | { 740 /* f32.gt */, WebAssembly::GT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
738 | { 747 /* f32.le */, WebAssembly::LE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
739 | { 754 /* f32.load */, WebAssembly::LOAD_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
740 | { 754 /* f32.load */, WebAssembly::LOAD_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
741 | { 763 /* f32.load_f16 */, WebAssembly::LOAD_F16_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasHalfPrecision, { MCK_Imm, MCK_Imm }, }, |
742 | { 763 /* f32.load_f16 */, WebAssembly::LOAD_F16_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasHalfPrecision, { MCK_Imm, MCK_Imm }, }, |
743 | { 776 /* f32.lt */, WebAssembly::LT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
744 | { 783 /* f32.max */, WebAssembly::MAX_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
745 | { 791 /* f32.min */, WebAssembly::MIN_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
746 | { 799 /* f32.mul */, WebAssembly::MUL_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
747 | { 807 /* f32.ne */, WebAssembly::NE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
748 | { 814 /* f32.nearest */, WebAssembly::NEAREST_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
749 | { 826 /* f32.neg */, WebAssembly::NEG_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
750 | { 834 /* f32.reinterpret_i32 */, WebAssembly::F32_REINTERPRET_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
751 | { 854 /* f32.select */, WebAssembly::SELECT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
752 | { 865 /* f32.sqrt */, WebAssembly::SQRT_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
753 | { 874 /* f32.store */, WebAssembly::STORE_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
754 | { 874 /* f32.store */, WebAssembly::STORE_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
755 | { 884 /* f32.store_f16 */, WebAssembly::STORE_F16_F32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasHalfPrecision, { MCK_Imm, MCK_Imm }, }, |
756 | { 884 /* f32.store_f16 */, WebAssembly::STORE_F16_F32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasHalfPrecision, { MCK_Imm, MCK_Imm }, }, |
757 | { 898 /* f32.sub */, WebAssembly::SUB_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
758 | { 906 /* f32.trunc */, WebAssembly::TRUNC_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
759 | { 916 /* f32x4.abs */, WebAssembly::ABS_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
760 | { 926 /* f32x4.add */, WebAssembly::ADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
761 | { 936 /* f32x4.ceil */, WebAssembly::CEIL_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
762 | { 947 /* f32x4.convert_i32x4_s */, WebAssembly::sint_to_fp_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
763 | { 969 /* f32x4.convert_i32x4_u */, WebAssembly::uint_to_fp_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
764 | { 991 /* f32x4.demote_f64x2_zero */, WebAssembly::demote_zero_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
765 | { 1015 /* f32x4.div */, WebAssembly::DIV_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
766 | { 1025 /* f32x4.eq */, WebAssembly::EQ_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
767 | { 1034 /* f32x4.extract_lane */, WebAssembly::EXTRACT_LANE_F32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
768 | { 1053 /* f32x4.floor */, WebAssembly::FLOOR_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
769 | { 1065 /* f32x4.ge */, WebAssembly::GE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
770 | { 1074 /* f32x4.gt */, WebAssembly::GT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
771 | { 1083 /* f32x4.le */, WebAssembly::LE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
772 | { 1092 /* f32x4.lt */, WebAssembly::LT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
773 | { 1101 /* f32x4.max */, WebAssembly::MAX_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
774 | { 1111 /* f32x4.min */, WebAssembly::MIN_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
775 | { 1121 /* f32x4.mul */, WebAssembly::MUL_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
776 | { 1131 /* f32x4.ne */, WebAssembly::NE_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
777 | { 1140 /* f32x4.nearest */, WebAssembly::NEAREST_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
778 | { 1154 /* f32x4.neg */, WebAssembly::NEG_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
779 | { 1164 /* f32x4.pmax */, WebAssembly::PMAX_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
780 | { 1175 /* f32x4.pmin */, WebAssembly::PMIN_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
781 | { 1186 /* f32x4.relaxed_dot_bf16x8_add_f32 */, WebAssembly::RELAXED_DOT_BFLOAT_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
782 | { 1219 /* f32x4.relaxed_madd */, WebAssembly::MADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
783 | { 1238 /* f32x4.relaxed_max */, WebAssembly::SIMD_RELAXED_FMAX_F32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
784 | { 1256 /* f32x4.relaxed_min */, WebAssembly::SIMD_RELAXED_FMIN_F32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
785 | { 1274 /* f32x4.relaxed_nmadd */, WebAssembly::NMADD_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
786 | { 1294 /* f32x4.replace_lane */, WebAssembly::REPLACE_LANE_F32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
787 | { 1313 /* f32x4.splat */, WebAssembly::SPLAT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
788 | { 1325 /* f32x4.sqrt */, WebAssembly::SQRT_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
789 | { 1336 /* f32x4.sub */, WebAssembly::SUB_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
790 | { 1346 /* f32x4.trunc */, WebAssembly::TRUNC_F32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
791 | { 1358 /* f64.abs */, WebAssembly::ABS_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
792 | { 1366 /* f64.add */, WebAssembly::ADD_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
793 | { 1374 /* f64.ceil */, WebAssembly::CEIL_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
794 | { 1383 /* f64.const */, WebAssembly::CONST_F64_S, Convert__FPImmf641_0, AMFBS_None, { MCK_FPImmf64 }, }, |
795 | { 1393 /* f64.convert_i32_s */, WebAssembly::F64_CONVERT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
796 | { 1411 /* f64.convert_i32_u */, WebAssembly::F64_CONVERT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
797 | { 1429 /* f64.convert_i64_s */, WebAssembly::F64_CONVERT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
798 | { 1447 /* f64.convert_i64_u */, WebAssembly::F64_CONVERT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
799 | { 1465 /* f64.copysign */, WebAssembly::COPYSIGN_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
800 | { 1478 /* f64.div */, WebAssembly::DIV_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
801 | { 1486 /* f64.eq */, WebAssembly::EQ_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
802 | { 1493 /* f64.floor */, WebAssembly::FLOOR_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
803 | { 1503 /* f64.ge */, WebAssembly::GE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
804 | { 1510 /* f64.gt */, WebAssembly::GT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
805 | { 1517 /* f64.le */, WebAssembly::LE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
806 | { 1524 /* f64.load */, WebAssembly::LOAD_F64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
807 | { 1524 /* f64.load */, WebAssembly::LOAD_F64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
808 | { 1533 /* f64.lt */, WebAssembly::LT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
809 | { 1540 /* f64.max */, WebAssembly::MAX_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
810 | { 1548 /* f64.min */, WebAssembly::MIN_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
811 | { 1556 /* f64.mul */, WebAssembly::MUL_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
812 | { 1564 /* f64.ne */, WebAssembly::NE_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
813 | { 1571 /* f64.nearest */, WebAssembly::NEAREST_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
814 | { 1583 /* f64.neg */, WebAssembly::NEG_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
815 | { 1591 /* f64.promote_f32 */, WebAssembly::F64_PROMOTE_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
816 | { 1607 /* f64.reinterpret_i64 */, WebAssembly::F64_REINTERPRET_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
817 | { 1627 /* f64.select */, WebAssembly::SELECT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
818 | { 1638 /* f64.sqrt */, WebAssembly::SQRT_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
819 | { 1647 /* f64.store */, WebAssembly::STORE_F64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
820 | { 1647 /* f64.store */, WebAssembly::STORE_F64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
821 | { 1657 /* f64.sub */, WebAssembly::SUB_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
822 | { 1665 /* f64.trunc */, WebAssembly::TRUNC_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
823 | { 1675 /* f64x2.abs */, WebAssembly::ABS_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
824 | { 1685 /* f64x2.add */, WebAssembly::ADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
825 | { 1695 /* f64x2.ceil */, WebAssembly::CEIL_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
826 | { 1706 /* f64x2.convert_low_i32x4_s */, WebAssembly::convert_low_s_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
827 | { 1732 /* f64x2.convert_low_i32x4_u */, WebAssembly::convert_low_u_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
828 | { 1758 /* f64x2.div */, WebAssembly::DIV_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
829 | { 1768 /* f64x2.eq */, WebAssembly::EQ_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
830 | { 1777 /* f64x2.extract_lane */, WebAssembly::EXTRACT_LANE_F64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
831 | { 1796 /* f64x2.floor */, WebAssembly::FLOOR_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
832 | { 1808 /* f64x2.ge */, WebAssembly::GE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
833 | { 1817 /* f64x2.gt */, WebAssembly::GT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
834 | { 1826 /* f64x2.le */, WebAssembly::LE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
835 | { 1835 /* f64x2.lt */, WebAssembly::LT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
836 | { 1844 /* f64x2.max */, WebAssembly::MAX_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
837 | { 1854 /* f64x2.min */, WebAssembly::MIN_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
838 | { 1864 /* f64x2.mul */, WebAssembly::MUL_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
839 | { 1874 /* f64x2.ne */, WebAssembly::NE_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
840 | { 1883 /* f64x2.nearest */, WebAssembly::NEAREST_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
841 | { 1897 /* f64x2.neg */, WebAssembly::NEG_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
842 | { 1907 /* f64x2.pmax */, WebAssembly::PMAX_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
843 | { 1918 /* f64x2.pmin */, WebAssembly::PMIN_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
844 | { 1929 /* f64x2.promote_low_f32x4 */, WebAssembly::promote_low_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
845 | { 1953 /* f64x2.relaxed_madd */, WebAssembly::MADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
846 | { 1972 /* f64x2.relaxed_max */, WebAssembly::SIMD_RELAXED_FMAX_F64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
847 | { 1990 /* f64x2.relaxed_min */, WebAssembly::SIMD_RELAXED_FMIN_F64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
848 | { 2008 /* f64x2.relaxed_nmadd */, WebAssembly::NMADD_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128_HasRelaxedSIMD, { }, }, |
849 | { 2028 /* f64x2.replace_lane */, WebAssembly::REPLACE_LANE_F64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
850 | { 2047 /* f64x2.splat */, WebAssembly::SPLAT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
851 | { 2059 /* f64x2.sqrt */, WebAssembly::SQRT_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
852 | { 2070 /* f64x2.sub */, WebAssembly::SUB_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
853 | { 2080 /* f64x2.trunc */, WebAssembly::TRUNC_F64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
854 | { 2092 /* funcref.select */, WebAssembly::SELECT_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
855 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
856 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
857 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
858 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
859 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
860 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
861 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
862 | { 2107 /* global.get */, WebAssembly::GLOBAL_GET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
863 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
864 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
865 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
866 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
867 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
868 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
869 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
870 | { 2118 /* global.set */, WebAssembly::GLOBAL_SET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
871 | { 2129 /* i16x8.abs */, WebAssembly::ABS_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
872 | { 2139 /* i16x8.add */, WebAssembly::ADD_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
873 | { 2149 /* i16x8.add_sat_s */, WebAssembly::ADD_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
874 | { 2165 /* i16x8.add_sat_u */, WebAssembly::ADD_SAT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
875 | { 2181 /* i16x8.all_true */, WebAssembly::ALLTRUE_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
876 | { 2196 /* i16x8.avgr_u */, WebAssembly::AVGR_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
877 | { 2209 /* i16x8.bitmask */, WebAssembly::BITMASK_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
878 | { 2223 /* i16x8.eq */, WebAssembly::EQ_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
879 | { 2232 /* i16x8.extadd_pairwise_i8x16_s */, WebAssembly::int_wasm_extadd_pairwise_signed_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
880 | { 2262 /* i16x8.extadd_pairwise_i8x16_u */, WebAssembly::int_wasm_extadd_pairwise_unsigned_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
881 | { 2292 /* i16x8.extend_high_i8x16_s */, WebAssembly::extend_high_s_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
882 | { 2318 /* i16x8.extend_high_i8x16_u */, WebAssembly::extend_high_u_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
883 | { 2344 /* i16x8.extend_low_i8x16_s */, WebAssembly::extend_low_s_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
884 | { 2369 /* i16x8.extend_low_i8x16_u */, WebAssembly::extend_low_u_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
885 | { 2394 /* i16x8.extmul_high_i8x16_s */, WebAssembly::EXTMUL_HIGH_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
886 | { 2420 /* i16x8.extmul_high_i8x16_u */, WebAssembly::EXTMUL_HIGH_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
887 | { 2446 /* i16x8.extmul_low_i8x16_s */, WebAssembly::EXTMUL_LOW_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
888 | { 2471 /* i16x8.extmul_low_i8x16_u */, WebAssembly::EXTMUL_LOW_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
889 | { 2496 /* i16x8.extract_lane_s */, WebAssembly::EXTRACT_LANE_I16x8_s_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
890 | { 2517 /* i16x8.extract_lane_u */, WebAssembly::EXTRACT_LANE_I16x8_u_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
891 | { 2538 /* i16x8.ge_s */, WebAssembly::GE_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
892 | { 2549 /* i16x8.ge_u */, WebAssembly::GE_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
893 | { 2560 /* i16x8.gt_s */, WebAssembly::GT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
894 | { 2571 /* i16x8.gt_u */, WebAssembly::GT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
895 | { 2582 /* i16x8.le_s */, WebAssembly::LE_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
896 | { 2593 /* i16x8.le_u */, WebAssembly::LE_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
897 | { 2604 /* i16x8.load8x8_s */, WebAssembly::LOAD_EXTEND_S_I16x8_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
898 | { 2604 /* i16x8.load8x8_s */, WebAssembly::LOAD_EXTEND_S_I16x8_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
899 | { 2620 /* i16x8.load8x8_u */, WebAssembly::LOAD_EXTEND_U_I16x8_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
900 | { 2620 /* i16x8.load8x8_u */, WebAssembly::LOAD_EXTEND_U_I16x8_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
901 | { 2636 /* i16x8.lt_s */, WebAssembly::LT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
902 | { 2647 /* i16x8.lt_u */, WebAssembly::LT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
903 | { 2658 /* i16x8.max_s */, WebAssembly::MAX_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
904 | { 2670 /* i16x8.max_u */, WebAssembly::MAX_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
905 | { 2682 /* i16x8.min_s */, WebAssembly::MIN_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
906 | { 2694 /* i16x8.min_u */, WebAssembly::MIN_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
907 | { 2706 /* i16x8.mul */, WebAssembly::MUL_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
908 | { 2716 /* i16x8.narrow_i32x4_s */, WebAssembly::NARROW_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
909 | { 2737 /* i16x8.narrow_i32x4_u */, WebAssembly::NARROW_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
910 | { 2758 /* i16x8.ne */, WebAssembly::NE_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
911 | { 2767 /* i16x8.neg */, WebAssembly::NEG_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
912 | { 2777 /* i16x8.q15mulr_sat_s */, WebAssembly::Q15MULR_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
913 | { 2797 /* i16x8.relaxed_dot_i8x16_i7x16_s */, WebAssembly::RELAXED_DOT_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
914 | { 2829 /* i16x8.relaxed_laneselect */, WebAssembly::LANESELECT_I16x8_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
915 | { 2854 /* i16x8.relaxed_q15mulr_s */, WebAssembly::RELAXED_Q15MULR_S_I16x8_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
916 | { 2878 /* i16x8.replace_lane */, WebAssembly::REPLACE_LANE_I16x8_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
917 | { 2897 /* i16x8.shl */, WebAssembly::SHL_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
918 | { 2907 /* i16x8.shr_s */, WebAssembly::SHR_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
919 | { 2919 /* i16x8.shr_u */, WebAssembly::SHR_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
920 | { 2931 /* i16x8.splat */, WebAssembly::SPLAT_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
921 | { 2943 /* i16x8.sub */, WebAssembly::SUB_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
922 | { 2953 /* i16x8.sub_sat_s */, WebAssembly::SUB_SAT_S_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
923 | { 2969 /* i16x8.sub_sat_u */, WebAssembly::SUB_SAT_U_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
924 | { 2985 /* i16x8.trunc_sat_f16x8_s */, WebAssembly::fp_to_sint_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
925 | { 3009 /* i16x8.trunc_sat_f16x8_u */, WebAssembly::fp_to_uint_I16x8_S, Convert_NoOperands, AMFBS_HasSIMD128_HasHalfPrecision, { }, }, |
926 | { 3033 /* i32.add */, WebAssembly::ADD_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
927 | { 3041 /* i32.and */, WebAssembly::AND_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
928 | { 3049 /* i32.atomic.load */, WebAssembly::ATOMIC_LOAD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
929 | { 3049 /* i32.atomic.load */, WebAssembly::ATOMIC_LOAD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
930 | { 3065 /* i32.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
931 | { 3065 /* i32.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
932 | { 3085 /* i32.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
933 | { 3085 /* i32.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
934 | { 3104 /* i32.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
935 | { 3104 /* i32.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
936 | { 3123 /* i32.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
937 | { 3123 /* i32.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
938 | { 3142 /* i32.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
939 | { 3142 /* i32.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
940 | { 3165 /* i32.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
941 | { 3165 /* i32.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
942 | { 3183 /* i32.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
943 | { 3183 /* i32.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
944 | { 3202 /* i32.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
945 | { 3202 /* i32.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
946 | { 3222 /* i32.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
947 | { 3222 /* i32.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
948 | { 3241 /* i32.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
949 | { 3241 /* i32.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
950 | { 3264 /* i32.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
951 | { 3264 /* i32.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
952 | { 3287 /* i32.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
953 | { 3287 /* i32.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
954 | { 3314 /* i32.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
955 | { 3314 /* i32.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
956 | { 3336 /* i32.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
957 | { 3336 /* i32.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
958 | { 3359 /* i32.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
959 | { 3359 /* i32.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
960 | { 3383 /* i32.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
961 | { 3383 /* i32.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
962 | { 3406 /* i32.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
963 | { 3406 /* i32.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
964 | { 3428 /* i32.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
965 | { 3428 /* i32.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
966 | { 3450 /* i32.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
967 | { 3450 /* i32.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
968 | { 3476 /* i32.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
969 | { 3476 /* i32.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
970 | { 3497 /* i32.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
971 | { 3497 /* i32.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
972 | { 3519 /* i32.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
973 | { 3519 /* i32.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
974 | { 3542 /* i32.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
975 | { 3542 /* i32.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
976 | { 3564 /* i32.atomic.store */, WebAssembly::ATOMIC_STORE_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
977 | { 3564 /* i32.atomic.store */, WebAssembly::ATOMIC_STORE_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
978 | { 3581 /* i32.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
979 | { 3581 /* i32.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
980 | { 3600 /* i32.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
981 | { 3600 /* i32.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
982 | { 3618 /* i32.clz */, WebAssembly::CLZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
983 | { 3626 /* i32.const */, WebAssembly::CONST_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
984 | { 3636 /* i32.ctz */, WebAssembly::CTZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
985 | { 3644 /* i32.div_s */, WebAssembly::DIV_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
986 | { 3654 /* i32.div_u */, WebAssembly::DIV_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
987 | { 3664 /* i32.eq */, WebAssembly::EQ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
988 | { 3671 /* i32.eqz */, WebAssembly::EQZ_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
989 | { 3679 /* i32.extend16_s */, WebAssembly::I32_EXTEND16_S_I32_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
990 | { 3694 /* i32.extend8_s */, WebAssembly::I32_EXTEND8_S_I32_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
991 | { 3708 /* i32.ge_s */, WebAssembly::GE_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
992 | { 3717 /* i32.ge_u */, WebAssembly::GE_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
993 | { 3726 /* i32.gt_s */, WebAssembly::GT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
994 | { 3735 /* i32.gt_u */, WebAssembly::GT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
995 | { 3744 /* i32.le_s */, WebAssembly::LE_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
996 | { 3753 /* i32.le_u */, WebAssembly::LE_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
997 | { 3762 /* i32.load */, WebAssembly::LOAD_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
998 | { 3762 /* i32.load */, WebAssembly::LOAD_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
999 | { 3771 /* i32.load16_s */, WebAssembly::LOAD16_S_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1000 | { 3771 /* i32.load16_s */, WebAssembly::LOAD16_S_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1001 | { 3784 /* i32.load16_u */, WebAssembly::LOAD16_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1002 | { 3784 /* i32.load16_u */, WebAssembly::LOAD16_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1003 | { 3797 /* i32.load8_s */, WebAssembly::LOAD8_S_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1004 | { 3797 /* i32.load8_s */, WebAssembly::LOAD8_S_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1005 | { 3809 /* i32.load8_u */, WebAssembly::LOAD8_U_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1006 | { 3809 /* i32.load8_u */, WebAssembly::LOAD8_U_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1007 | { 3821 /* i32.lt_s */, WebAssembly::LT_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1008 | { 3830 /* i32.lt_u */, WebAssembly::LT_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1009 | { 3839 /* i32.mul */, WebAssembly::MUL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1010 | { 3847 /* i32.ne */, WebAssembly::NE_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1011 | { 3854 /* i32.or */, WebAssembly::OR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1012 | { 3861 /* i32.popcnt */, WebAssembly::POPCNT_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1013 | { 3872 /* i32.reinterpret_f32 */, WebAssembly::I32_REINTERPRET_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1014 | { 3892 /* i32.rem_s */, WebAssembly::REM_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1015 | { 3902 /* i32.rem_u */, WebAssembly::REM_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1016 | { 3912 /* i32.rotl */, WebAssembly::ROTL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1017 | { 3921 /* i32.rotr */, WebAssembly::ROTR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1018 | { 3930 /* i32.select */, WebAssembly::SELECT_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1019 | { 3941 /* i32.shl */, WebAssembly::SHL_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1020 | { 3949 /* i32.shr_s */, WebAssembly::SHR_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1021 | { 3959 /* i32.shr_u */, WebAssembly::SHR_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1022 | { 3969 /* i32.store */, WebAssembly::STORE_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1023 | { 3969 /* i32.store */, WebAssembly::STORE_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1024 | { 3979 /* i32.store16 */, WebAssembly::STORE16_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1025 | { 3979 /* i32.store16 */, WebAssembly::STORE16_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1026 | { 3991 /* i32.store8 */, WebAssembly::STORE8_I32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1027 | { 3991 /* i32.store8 */, WebAssembly::STORE8_I32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1028 | { 4002 /* i32.sub */, WebAssembly::SUB_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1029 | { 4010 /* i32.trunc_f32_s */, WebAssembly::I32_TRUNC_S_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1030 | { 4026 /* i32.trunc_f32_u */, WebAssembly::I32_TRUNC_U_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1031 | { 4042 /* i32.trunc_f64_s */, WebAssembly::I32_TRUNC_S_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1032 | { 4058 /* i32.trunc_f64_u */, WebAssembly::I32_TRUNC_U_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1033 | { 4074 /* i32.trunc_sat_f32_s */, WebAssembly::I32_TRUNC_S_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1034 | { 4094 /* i32.trunc_sat_f32_u */, WebAssembly::I32_TRUNC_U_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1035 | { 4114 /* i32.trunc_sat_f64_s */, WebAssembly::I32_TRUNC_S_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1036 | { 4134 /* i32.trunc_sat_f64_u */, WebAssembly::I32_TRUNC_U_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1037 | { 4154 /* i32.wrap_i64 */, WebAssembly::I32_WRAP_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1038 | { 4167 /* i32.xor */, WebAssembly::XOR_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1039 | { 4175 /* i32x4.abs */, WebAssembly::ABS_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1040 | { 4185 /* i32x4.add */, WebAssembly::ADD_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1041 | { 4195 /* i32x4.all_true */, WebAssembly::ALLTRUE_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1042 | { 4210 /* i32x4.bitmask */, WebAssembly::BITMASK_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1043 | { 4224 /* i32x4.dot_i16x8_s */, WebAssembly::DOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1044 | { 4242 /* i32x4.eq */, WebAssembly::EQ_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1045 | { 4251 /* i32x4.extadd_pairwise_i16x8_s */, WebAssembly::int_wasm_extadd_pairwise_signed_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1046 | { 4281 /* i32x4.extadd_pairwise_i16x8_u */, WebAssembly::int_wasm_extadd_pairwise_unsigned_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1047 | { 4311 /* i32x4.extend_high_i16x8_s */, WebAssembly::extend_high_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1048 | { 4337 /* i32x4.extend_high_i16x8_u */, WebAssembly::extend_high_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1049 | { 4363 /* i32x4.extend_low_i16x8_s */, WebAssembly::extend_low_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1050 | { 4388 /* i32x4.extend_low_i16x8_u */, WebAssembly::extend_low_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1051 | { 4413 /* i32x4.extmul_high_i16x8_s */, WebAssembly::EXTMUL_HIGH_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1052 | { 4439 /* i32x4.extmul_high_i16x8_u */, WebAssembly::EXTMUL_HIGH_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1053 | { 4465 /* i32x4.extmul_low_i16x8_s */, WebAssembly::EXTMUL_LOW_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1054 | { 4490 /* i32x4.extmul_low_i16x8_u */, WebAssembly::EXTMUL_LOW_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1055 | { 4515 /* i32x4.extract_lane */, WebAssembly::EXTRACT_LANE_I32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1056 | { 4534 /* i32x4.ge_s */, WebAssembly::GE_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1057 | { 4545 /* i32x4.ge_u */, WebAssembly::GE_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1058 | { 4556 /* i32x4.gt_s */, WebAssembly::GT_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1059 | { 4567 /* i32x4.gt_u */, WebAssembly::GT_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1060 | { 4578 /* i32x4.le_s */, WebAssembly::LE_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1061 | { 4589 /* i32x4.le_u */, WebAssembly::LE_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1062 | { 4600 /* i32x4.load16x4_s */, WebAssembly::LOAD_EXTEND_S_I32x4_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1063 | { 4600 /* i32x4.load16x4_s */, WebAssembly::LOAD_EXTEND_S_I32x4_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1064 | { 4617 /* i32x4.load16x4_u */, WebAssembly::LOAD_EXTEND_U_I32x4_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1065 | { 4617 /* i32x4.load16x4_u */, WebAssembly::LOAD_EXTEND_U_I32x4_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1066 | { 4634 /* i32x4.lt_s */, WebAssembly::LT_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1067 | { 4645 /* i32x4.lt_u */, WebAssembly::LT_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1068 | { 4656 /* i32x4.max_s */, WebAssembly::MAX_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1069 | { 4668 /* i32x4.max_u */, WebAssembly::MAX_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1070 | { 4680 /* i32x4.min_s */, WebAssembly::MIN_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1071 | { 4692 /* i32x4.min_u */, WebAssembly::MIN_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1072 | { 4704 /* i32x4.mul */, WebAssembly::MUL_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1073 | { 4714 /* i32x4.ne */, WebAssembly::NE_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1074 | { 4723 /* i32x4.neg */, WebAssembly::NEG_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1075 | { 4733 /* i32x4.relaxed_dot_i8x16_i7x16_add_s */, WebAssembly::RELAXED_DOT_ADD_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1076 | { 4769 /* i32x4.relaxed_laneselect */, WebAssembly::LANESELECT_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1077 | { 4794 /* i32x4.relaxed_trunc_f32x4_s */, WebAssembly::int_wasm_relaxed_trunc_signed_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1078 | { 4822 /* i32x4.relaxed_trunc_f32x4_u */, WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1079 | { 4850 /* i32x4.relaxed_trunc_f64x2_s_zero */, WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1080 | { 4883 /* i32x4.relaxed_trunc_f64x2_u_zero */, WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1081 | { 4916 /* i32x4.replace_lane */, WebAssembly::REPLACE_LANE_I32x4_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1082 | { 4935 /* i32x4.shl */, WebAssembly::SHL_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1083 | { 4945 /* i32x4.shr_s */, WebAssembly::SHR_S_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1084 | { 4957 /* i32x4.shr_u */, WebAssembly::SHR_U_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1085 | { 4969 /* i32x4.splat */, WebAssembly::SPLAT_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1086 | { 4981 /* i32x4.sub */, WebAssembly::SUB_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1087 | { 4991 /* i32x4.trunc_sat_f32x4_s */, WebAssembly::fp_to_sint_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1088 | { 5015 /* i32x4.trunc_sat_f32x4_u */, WebAssembly::fp_to_uint_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1089 | { 5039 /* i32x4.trunc_sat_f64x2_s_zero */, WebAssembly::trunc_sat_zero_s_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1090 | { 5068 /* i32x4.trunc_sat_f64x2_u_zero */, WebAssembly::trunc_sat_zero_u_I32x4_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1091 | { 5097 /* i64.add */, WebAssembly::ADD_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1092 | { 5105 /* i64.and */, WebAssembly::AND_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1093 | { 5113 /* i64.atomic.load */, WebAssembly::ATOMIC_LOAD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1094 | { 5113 /* i64.atomic.load */, WebAssembly::ATOMIC_LOAD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1095 | { 5129 /* i64.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1096 | { 5129 /* i64.atomic.load16_u */, WebAssembly::ATOMIC_LOAD16_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1097 | { 5149 /* i64.atomic.load32_u */, WebAssembly::ATOMIC_LOAD32_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1098 | { 5149 /* i64.atomic.load32_u */, WebAssembly::ATOMIC_LOAD32_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1099 | { 5169 /* i64.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1100 | { 5169 /* i64.atomic.load8_u */, WebAssembly::ATOMIC_LOAD8_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1101 | { 5188 /* i64.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1102 | { 5188 /* i64.atomic.rmw.add */, WebAssembly::ATOMIC_RMW_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1103 | { 5207 /* i64.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1104 | { 5207 /* i64.atomic.rmw.and */, WebAssembly::ATOMIC_RMW_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1105 | { 5226 /* i64.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1106 | { 5226 /* i64.atomic.rmw.cmpxchg */, WebAssembly::ATOMIC_RMW_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1107 | { 5249 /* i64.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1108 | { 5249 /* i64.atomic.rmw.or */, WebAssembly::ATOMIC_RMW_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1109 | { 5267 /* i64.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1110 | { 5267 /* i64.atomic.rmw.sub */, WebAssembly::ATOMIC_RMW_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1111 | { 5286 /* i64.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1112 | { 5286 /* i64.atomic.rmw.xchg */, WebAssembly::ATOMIC_RMW_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1113 | { 5306 /* i64.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1114 | { 5306 /* i64.atomic.rmw.xor */, WebAssembly::ATOMIC_RMW_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1115 | { 5325 /* i64.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1116 | { 5325 /* i64.atomic.rmw16.add_u */, WebAssembly::ATOMIC_RMW16_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1117 | { 5348 /* i64.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1118 | { 5348 /* i64.atomic.rmw16.and_u */, WebAssembly::ATOMIC_RMW16_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1119 | { 5371 /* i64.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1120 | { 5371 /* i64.atomic.rmw16.cmpxchg_u */, WebAssembly::ATOMIC_RMW16_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1121 | { 5398 /* i64.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1122 | { 5398 /* i64.atomic.rmw16.or_u */, WebAssembly::ATOMIC_RMW16_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1123 | { 5420 /* i64.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1124 | { 5420 /* i64.atomic.rmw16.sub_u */, WebAssembly::ATOMIC_RMW16_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1125 | { 5443 /* i64.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1126 | { 5443 /* i64.atomic.rmw16.xchg_u */, WebAssembly::ATOMIC_RMW16_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1127 | { 5467 /* i64.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1128 | { 5467 /* i64.atomic.rmw16.xor_u */, WebAssembly::ATOMIC_RMW16_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1129 | { 5490 /* i64.atomic.rmw32.add_u */, WebAssembly::ATOMIC_RMW32_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1130 | { 5490 /* i64.atomic.rmw32.add_u */, WebAssembly::ATOMIC_RMW32_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1131 | { 5513 /* i64.atomic.rmw32.and_u */, WebAssembly::ATOMIC_RMW32_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1132 | { 5513 /* i64.atomic.rmw32.and_u */, WebAssembly::ATOMIC_RMW32_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1133 | { 5536 /* i64.atomic.rmw32.cmpxchg_u */, WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1134 | { 5536 /* i64.atomic.rmw32.cmpxchg_u */, WebAssembly::ATOMIC_RMW32_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1135 | { 5563 /* i64.atomic.rmw32.or_u */, WebAssembly::ATOMIC_RMW32_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1136 | { 5563 /* i64.atomic.rmw32.or_u */, WebAssembly::ATOMIC_RMW32_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1137 | { 5585 /* i64.atomic.rmw32.sub_u */, WebAssembly::ATOMIC_RMW32_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1138 | { 5585 /* i64.atomic.rmw32.sub_u */, WebAssembly::ATOMIC_RMW32_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1139 | { 5608 /* i64.atomic.rmw32.xchg_u */, WebAssembly::ATOMIC_RMW32_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1140 | { 5608 /* i64.atomic.rmw32.xchg_u */, WebAssembly::ATOMIC_RMW32_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1141 | { 5632 /* i64.atomic.rmw32.xor_u */, WebAssembly::ATOMIC_RMW32_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1142 | { 5632 /* i64.atomic.rmw32.xor_u */, WebAssembly::ATOMIC_RMW32_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1143 | { 5655 /* i64.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1144 | { 5655 /* i64.atomic.rmw8.add_u */, WebAssembly::ATOMIC_RMW8_U_ADD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1145 | { 5677 /* i64.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1146 | { 5677 /* i64.atomic.rmw8.and_u */, WebAssembly::ATOMIC_RMW8_U_AND_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1147 | { 5699 /* i64.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1148 | { 5699 /* i64.atomic.rmw8.cmpxchg_u */, WebAssembly::ATOMIC_RMW8_U_CMPXCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1149 | { 5725 /* i64.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1150 | { 5725 /* i64.atomic.rmw8.or_u */, WebAssembly::ATOMIC_RMW8_U_OR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1151 | { 5746 /* i64.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1152 | { 5746 /* i64.atomic.rmw8.sub_u */, WebAssembly::ATOMIC_RMW8_U_SUB_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1153 | { 5768 /* i64.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1154 | { 5768 /* i64.atomic.rmw8.xchg_u */, WebAssembly::ATOMIC_RMW8_U_XCHG_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1155 | { 5791 /* i64.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1156 | { 5791 /* i64.atomic.rmw8.xor_u */, WebAssembly::ATOMIC_RMW8_U_XOR_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1157 | { 5813 /* i64.atomic.store */, WebAssembly::ATOMIC_STORE_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1158 | { 5813 /* i64.atomic.store */, WebAssembly::ATOMIC_STORE_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1159 | { 5830 /* i64.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1160 | { 5830 /* i64.atomic.store16 */, WebAssembly::ATOMIC_STORE16_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1161 | { 5849 /* i64.atomic.store32 */, WebAssembly::ATOMIC_STORE32_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1162 | { 5849 /* i64.atomic.store32 */, WebAssembly::ATOMIC_STORE32_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1163 | { 5868 /* i64.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1164 | { 5868 /* i64.atomic.store8 */, WebAssembly::ATOMIC_STORE8_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1165 | { 5886 /* i64.clz */, WebAssembly::CLZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1166 | { 5894 /* i64.const */, WebAssembly::CONST_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1167 | { 5904 /* i64.ctz */, WebAssembly::CTZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1168 | { 5912 /* i64.div_s */, WebAssembly::DIV_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1169 | { 5922 /* i64.div_u */, WebAssembly::DIV_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1170 | { 5932 /* i64.eq */, WebAssembly::EQ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1171 | { 5939 /* i64.eqz */, WebAssembly::EQZ_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1172 | { 5947 /* i64.extend16_s */, WebAssembly::I64_EXTEND16_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
1173 | { 5962 /* i64.extend32_s */, WebAssembly::I64_EXTEND32_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
1174 | { 5977 /* i64.extend8_s */, WebAssembly::I64_EXTEND8_S_I64_S, Convert_NoOperands, AMFBS_HasSignExt, { }, }, |
1175 | { 5991 /* i64.extend_i32_s */, WebAssembly::I64_EXTEND_S_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1176 | { 6008 /* i64.extend_i32_u */, WebAssembly::I64_EXTEND_U_I32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1177 | { 6025 /* i64.ge_s */, WebAssembly::GE_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1178 | { 6034 /* i64.ge_u */, WebAssembly::GE_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1179 | { 6043 /* i64.gt_s */, WebAssembly::GT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1180 | { 6052 /* i64.gt_u */, WebAssembly::GT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1181 | { 6061 /* i64.le_s */, WebAssembly::LE_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1182 | { 6070 /* i64.le_u */, WebAssembly::LE_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1183 | { 6079 /* i64.load */, WebAssembly::LOAD_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1184 | { 6079 /* i64.load */, WebAssembly::LOAD_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1185 | { 6088 /* i64.load16_s */, WebAssembly::LOAD16_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1186 | { 6088 /* i64.load16_s */, WebAssembly::LOAD16_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1187 | { 6101 /* i64.load16_u */, WebAssembly::LOAD16_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1188 | { 6101 /* i64.load16_u */, WebAssembly::LOAD16_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1189 | { 6114 /* i64.load32_s */, WebAssembly::LOAD32_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1190 | { 6114 /* i64.load32_s */, WebAssembly::LOAD32_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1191 | { 6127 /* i64.load32_u */, WebAssembly::LOAD32_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1192 | { 6127 /* i64.load32_u */, WebAssembly::LOAD32_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1193 | { 6140 /* i64.load8_s */, WebAssembly::LOAD8_S_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1194 | { 6140 /* i64.load8_s */, WebAssembly::LOAD8_S_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1195 | { 6152 /* i64.load8_u */, WebAssembly::LOAD8_U_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1196 | { 6152 /* i64.load8_u */, WebAssembly::LOAD8_U_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1197 | { 6164 /* i64.lt_s */, WebAssembly::LT_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1198 | { 6173 /* i64.lt_u */, WebAssembly::LT_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1199 | { 6182 /* i64.mul */, WebAssembly::MUL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1200 | { 6190 /* i64.ne */, WebAssembly::NE_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1201 | { 6197 /* i64.or */, WebAssembly::OR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1202 | { 6204 /* i64.popcnt */, WebAssembly::POPCNT_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1203 | { 6215 /* i64.reinterpret_f64 */, WebAssembly::I64_REINTERPRET_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1204 | { 6235 /* i64.rem_s */, WebAssembly::REM_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1205 | { 6245 /* i64.rem_u */, WebAssembly::REM_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1206 | { 6255 /* i64.rotl */, WebAssembly::ROTL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1207 | { 6264 /* i64.rotr */, WebAssembly::ROTR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1208 | { 6273 /* i64.select */, WebAssembly::SELECT_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1209 | { 6284 /* i64.shl */, WebAssembly::SHL_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1210 | { 6292 /* i64.shr_s */, WebAssembly::SHR_S_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1211 | { 6302 /* i64.shr_u */, WebAssembly::SHR_U_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1212 | { 6312 /* i64.store */, WebAssembly::STORE_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1213 | { 6312 /* i64.store */, WebAssembly::STORE_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1214 | { 6322 /* i64.store16 */, WebAssembly::STORE16_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1215 | { 6322 /* i64.store16 */, WebAssembly::STORE16_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1216 | { 6334 /* i64.store32 */, WebAssembly::STORE32_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1217 | { 6334 /* i64.store32 */, WebAssembly::STORE32_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1218 | { 6346 /* i64.store8 */, WebAssembly::STORE8_I64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1219 | { 6346 /* i64.store8 */, WebAssembly::STORE8_I64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Imm }, }, |
1220 | { 6357 /* i64.sub */, WebAssembly::SUB_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1221 | { 6365 /* i64.trunc_f32_s */, WebAssembly::I64_TRUNC_S_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1222 | { 6381 /* i64.trunc_f32_u */, WebAssembly::I64_TRUNC_U_F32_S, Convert_NoOperands, AMFBS_None, { }, }, |
1223 | { 6397 /* i64.trunc_f64_s */, WebAssembly::I64_TRUNC_S_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1224 | { 6413 /* i64.trunc_f64_u */, WebAssembly::I64_TRUNC_U_F64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1225 | { 6429 /* i64.trunc_sat_f32_s */, WebAssembly::I64_TRUNC_S_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1226 | { 6449 /* i64.trunc_sat_f32_u */, WebAssembly::I64_TRUNC_U_SAT_F32_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1227 | { 6469 /* i64.trunc_sat_f64_s */, WebAssembly::I64_TRUNC_S_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1228 | { 6489 /* i64.trunc_sat_f64_u */, WebAssembly::I64_TRUNC_U_SAT_F64_S, Convert_NoOperands, AMFBS_HasNontrappingFPToInt, { }, }, |
1229 | { 6509 /* i64.xor */, WebAssembly::XOR_I64_S, Convert_NoOperands, AMFBS_None, { }, }, |
1230 | { 6517 /* i64x2.abs */, WebAssembly::ABS_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1231 | { 6527 /* i64x2.add */, WebAssembly::ADD_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1232 | { 6537 /* i64x2.all_true */, WebAssembly::ALLTRUE_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1233 | { 6552 /* i64x2.bitmask */, WebAssembly::BITMASK_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1234 | { 6566 /* i64x2.eq */, WebAssembly::EQ_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1235 | { 6575 /* i64x2.extend_high_i32x4_s */, WebAssembly::extend_high_s_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1236 | { 6601 /* i64x2.extend_high_i32x4_u */, WebAssembly::extend_high_u_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1237 | { 6627 /* i64x2.extend_low_i32x4_s */, WebAssembly::extend_low_s_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1238 | { 6652 /* i64x2.extend_low_i32x4_u */, WebAssembly::extend_low_u_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1239 | { 6677 /* i64x2.extmul_high_i32x4_s */, WebAssembly::EXTMUL_HIGH_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1240 | { 6703 /* i64x2.extmul_high_i32x4_u */, WebAssembly::EXTMUL_HIGH_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1241 | { 6729 /* i64x2.extmul_low_i32x4_s */, WebAssembly::EXTMUL_LOW_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1242 | { 6754 /* i64x2.extmul_low_i32x4_u */, WebAssembly::EXTMUL_LOW_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1243 | { 6779 /* i64x2.extract_lane */, WebAssembly::EXTRACT_LANE_I64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1244 | { 6798 /* i64x2.ge_s */, WebAssembly::GE_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1245 | { 6809 /* i64x2.gt_s */, WebAssembly::GT_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1246 | { 6820 /* i64x2.le_s */, WebAssembly::LE_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1247 | { 6831 /* i64x2.load32x2_s */, WebAssembly::LOAD_EXTEND_S_I64x2_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1248 | { 6831 /* i64x2.load32x2_s */, WebAssembly::LOAD_EXTEND_S_I64x2_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1249 | { 6848 /* i64x2.load32x2_u */, WebAssembly::LOAD_EXTEND_U_I64x2_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1250 | { 6848 /* i64x2.load32x2_u */, WebAssembly::LOAD_EXTEND_U_I64x2_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1251 | { 6865 /* i64x2.lt_s */, WebAssembly::LT_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1252 | { 6876 /* i64x2.mul */, WebAssembly::MUL_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1253 | { 6886 /* i64x2.ne */, WebAssembly::NE_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1254 | { 6895 /* i64x2.neg */, WebAssembly::NEG_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1255 | { 6905 /* i64x2.relaxed_laneselect */, WebAssembly::LANESELECT_I64x2_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1256 | { 6930 /* i64x2.replace_lane */, WebAssembly::REPLACE_LANE_I64x2_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1257 | { 6949 /* i64x2.shl */, WebAssembly::SHL_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1258 | { 6959 /* i64x2.shr_s */, WebAssembly::SHR_S_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1259 | { 6971 /* i64x2.shr_u */, WebAssembly::SHR_U_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1260 | { 6983 /* i64x2.splat */, WebAssembly::SPLAT_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1261 | { 6995 /* i64x2.sub */, WebAssembly::SUB_I64x2_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1262 | { 7005 /* i8x16.abs */, WebAssembly::ABS_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1263 | { 7015 /* i8x16.add */, WebAssembly::ADD_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1264 | { 7025 /* i8x16.add_sat_s */, WebAssembly::ADD_SAT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1265 | { 7041 /* i8x16.add_sat_u */, WebAssembly::ADD_SAT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1266 | { 7057 /* i8x16.all_true */, WebAssembly::ALLTRUE_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1267 | { 7072 /* i8x16.avgr_u */, WebAssembly::AVGR_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1268 | { 7085 /* i8x16.bitmask */, WebAssembly::BITMASK_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1269 | { 7099 /* i8x16.eq */, WebAssembly::EQ_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1270 | { 7108 /* i8x16.extract_lane_s */, WebAssembly::EXTRACT_LANE_I8x16_s_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1271 | { 7129 /* i8x16.extract_lane_u */, WebAssembly::EXTRACT_LANE_I8x16_u_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1272 | { 7150 /* i8x16.ge_s */, WebAssembly::GE_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1273 | { 7161 /* i8x16.ge_u */, WebAssembly::GE_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1274 | { 7172 /* i8x16.gt_s */, WebAssembly::GT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1275 | { 7183 /* i8x16.gt_u */, WebAssembly::GT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1276 | { 7194 /* i8x16.le_s */, WebAssembly::LE_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1277 | { 7205 /* i8x16.le_u */, WebAssembly::LE_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1278 | { 7216 /* i8x16.lt_s */, WebAssembly::LT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1279 | { 7227 /* i8x16.lt_u */, WebAssembly::LT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1280 | { 7238 /* i8x16.max_s */, WebAssembly::MAX_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1281 | { 7250 /* i8x16.max_u */, WebAssembly::MAX_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1282 | { 7262 /* i8x16.min_s */, WebAssembly::MIN_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1283 | { 7274 /* i8x16.min_u */, WebAssembly::MIN_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1284 | { 7286 /* i8x16.narrow_i16x8_s */, WebAssembly::NARROW_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1285 | { 7307 /* i8x16.narrow_i16x8_u */, WebAssembly::NARROW_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1286 | { 7328 /* i8x16.ne */, WebAssembly::NE_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1287 | { 7337 /* i8x16.neg */, WebAssembly::NEG_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1288 | { 7347 /* i8x16.popcnt */, WebAssembly::POPCNT_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1289 | { 7360 /* i8x16.relaxed_laneselect */, WebAssembly::LANESELECT_I8x16_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1290 | { 7385 /* i8x16.relaxed_swizzle */, WebAssembly::RELAXED_SWIZZLE_S, Convert_NoOperands, AMFBS_HasRelaxedSIMD, { }, }, |
1291 | { 7407 /* i8x16.replace_lane */, WebAssembly::REPLACE_LANE_I8x16_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1292 | { 7426 /* i8x16.shl */, WebAssembly::SHL_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1293 | { 7436 /* i8x16.shr_s */, WebAssembly::SHR_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1294 | { 7448 /* i8x16.shr_u */, WebAssembly::SHR_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1295 | { 7460 /* i8x16.shuffle */, WebAssembly::SHUFFLE_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1296 | { 7474 /* i8x16.splat */, WebAssembly::SPLAT_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1297 | { 7486 /* i8x16.sub */, WebAssembly::SUB_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1298 | { 7496 /* i8x16.sub_sat_s */, WebAssembly::SUB_SAT_S_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1299 | { 7512 /* i8x16.sub_sat_u */, WebAssembly::SUB_SAT_U_I8x16_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1300 | { 7528 /* i8x16.swizzle */, WebAssembly::SWIZZLE_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1301 | { 7542 /* if */, WebAssembly::IF_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1302 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1303 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1304 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1305 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1306 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1307 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1308 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1309 | { 7545 /* local.get */, WebAssembly::LOCAL_GET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1310 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1311 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1312 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1313 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1314 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1315 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1316 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1317 | { 7555 /* local.set */, WebAssembly::LOCAL_SET_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1318 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1319 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1320 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1321 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_V128_S, Convert__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm }, }, |
1322 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_F32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1323 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_F64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1324 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_I32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1325 | { 7565 /* local.tee */, WebAssembly::LOCAL_TEE_I64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1326 | { 7575 /* loop */, WebAssembly::LOOP_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1327 | { 7580 /* memory.atomic.notify */, WebAssembly::MEMORY_ATOMIC_NOTIFY_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1328 | { 7580 /* memory.atomic.notify */, WebAssembly::MEMORY_ATOMIC_NOTIFY_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1329 | { 7601 /* memory.atomic.wait32 */, WebAssembly::MEMORY_ATOMIC_WAIT32_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1330 | { 7601 /* memory.atomic.wait32 */, WebAssembly::MEMORY_ATOMIC_WAIT32_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1331 | { 7622 /* memory.atomic.wait64 */, WebAssembly::MEMORY_ATOMIC_WAIT64_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1332 | { 7622 /* memory.atomic.wait64 */, WebAssembly::MEMORY_ATOMIC_WAIT64_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasAtomics, { MCK_Imm, MCK_Imm }, }, |
1333 | { 7643 /* memory.copy */, WebAssembly::anonymous_8878MEMORY_COPY_A32_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemory, { MCK_Imm, MCK_Imm }, }, |
1334 | { 7643 /* memory.copy */, WebAssembly::anonymous_8879MEMORY_COPY_A64_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemory, { MCK_Imm, MCK_Imm }, }, |
1335 | { 7655 /* memory.fill */, WebAssembly::anonymous_8878MEMORY_FILL_A32_S, Convert__Imm1_0, AMFBS_HasBulkMemory, { MCK_Imm }, }, |
1336 | { 7655 /* memory.fill */, WebAssembly::anonymous_8879MEMORY_FILL_A64_S, Convert__Imm1_0, AMFBS_HasBulkMemory, { MCK_Imm }, }, |
1337 | { 7667 /* memory.grow */, WebAssembly::anonymous_8187MEMORY_GROW_A32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1338 | { 7667 /* memory.grow */, WebAssembly::anonymous_8188MEMORY_GROW_A64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1339 | { 7679 /* memory.init */, WebAssembly::anonymous_8878MEMORY_INIT_A32_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemory, { MCK_Imm, MCK_Imm }, }, |
1340 | { 7679 /* memory.init */, WebAssembly::anonymous_8879MEMORY_INIT_A64_S, Convert__Imm1_0__Imm1_1, AMFBS_HasBulkMemory, { MCK_Imm, MCK_Imm }, }, |
1341 | { 7691 /* memory.size */, WebAssembly::anonymous_8187MEMORY_SIZE_A32_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1342 | { 7691 /* memory.size */, WebAssembly::anonymous_8188MEMORY_SIZE_A64_S, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, |
1343 | { 7703 /* nop */, WebAssembly::NOP_S, Convert_NoOperands, AMFBS_None, { }, }, |
1344 | { 7707 /* ref.is_null */, WebAssembly::REF_IS_NULL_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1345 | { 7707 /* ref.is_null */, WebAssembly::REF_IS_NULL_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1346 | { 7707 /* ref.is_null */, WebAssembly::REF_IS_NULL_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1347 | { 7719 /* ref.null_exn */, WebAssembly::REF_NULL_EXNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1348 | { 7732 /* ref.null_extern */, WebAssembly::REF_NULL_EXTERNREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1349 | { 7748 /* ref.null_func */, WebAssembly::REF_NULL_FUNCREF_S, Convert_NoOperands, AMFBS_HasReferenceTypes, { }, }, |
1350 | { 7762 /* rethrow */, WebAssembly::RETHROW_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
1351 | { 7770 /* return */, WebAssembly::RETURN_S, Convert_NoOperands, AMFBS_None, { }, }, |
1352 | { 7777 /* return_call */, WebAssembly::RET_CALL_S, Convert__Imm1_0, AMFBS_HasTailCall, { MCK_Imm }, }, |
1353 | { 7789 /* return_call_indirect */, WebAssembly::RET_CALL_INDIRECT_S, Convert__Imm1_0__Imm1_1, AMFBS_HasTailCall, { MCK_Imm, MCK_Imm }, }, |
1354 | { 7810 /* return_call_results */, WebAssembly::RET_CALL_RESULTS_S, Convert_NoOperands, AMFBS_None, { }, }, |
1355 | { 7830 /* table.copy */, WebAssembly::TABLE_COPY_S, Convert__Imm1_0__Imm1_1, AMFBS_HasReferenceTypes, { MCK_Imm, MCK_Imm }, }, |
1356 | { 7841 /* table.fill */, WebAssembly::TABLE_FILL_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1357 | { 7841 /* table.fill */, WebAssembly::TABLE_FILL_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1358 | { 7841 /* table.fill */, WebAssembly::TABLE_FILL_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1359 | { 7852 /* table.get */, WebAssembly::TABLE_GET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1360 | { 7852 /* table.get */, WebAssembly::TABLE_GET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1361 | { 7852 /* table.get */, WebAssembly::TABLE_GET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1362 | { 7862 /* table.grow */, WebAssembly::TABLE_GROW_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1363 | { 7862 /* table.grow */, WebAssembly::TABLE_GROW_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1364 | { 7862 /* table.grow */, WebAssembly::TABLE_GROW_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1365 | { 7873 /* table.set */, WebAssembly::TABLE_SET_EXNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes_HasExceptionHandling, { MCK_Imm }, }, |
1366 | { 7873 /* table.set */, WebAssembly::TABLE_SET_EXTERNREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1367 | { 7873 /* table.set */, WebAssembly::TABLE_SET_FUNCREF_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1368 | { 7883 /* table.size */, WebAssembly::TABLE_SIZE_S, Convert__Imm1_0, AMFBS_HasReferenceTypes, { MCK_Imm }, }, |
1369 | { 7894 /* throw */, WebAssembly::THROW_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
1370 | { 7900 /* try */, WebAssembly::TRY_S, Convert__Imm1_0, AMFBS_HasExceptionHandling, { MCK_Imm }, }, |
1371 | { 7904 /* unreachable */, WebAssembly::DEBUG_UNREACHABLE_S, Convert_NoOperands, AMFBS_None, { }, }, |
1372 | { 7904 /* unreachable */, WebAssembly::UNREACHABLE_S, Convert_NoOperands, AMFBS_None, { }, }, |
1373 | { 7916 /* v128.and */, WebAssembly::AND_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1374 | { 7925 /* v128.andnot */, WebAssembly::ANDNOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1375 | { 7937 /* v128.any_true */, WebAssembly::ANYTRUE_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1376 | { 7951 /* v128.bitselect */, WebAssembly::BITSELECT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1377 | { 7966 /* v128.const */, WebAssembly::CONST_V128_I64x2_S, Convert__Imm1_0__Imm1_1, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1378 | { 7966 /* v128.const */, WebAssembly::CONST_V128_F64x2_S, Convert__FPImmf641_0__FPImmf641_1, AMFBS_HasSIMD128, { MCK_FPImmf64, MCK_FPImmf64 }, }, |
1379 | { 7966 /* v128.const */, WebAssembly::CONST_V128_I32x4_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1380 | { 7966 /* v128.const */, WebAssembly::CONST_V128_F32x4_S, Convert__FPImmf321_0__FPImmf321_1__FPImmf321_2__FPImmf321_3, AMFBS_HasSIMD128, { MCK_FPImmf32, MCK_FPImmf32, MCK_FPImmf32, MCK_FPImmf32 }, }, |
1381 | { 7966 /* v128.const */, WebAssembly::CONST_V128_I16x8_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1382 | { 7966 /* v128.const */, WebAssembly::CONST_V128_I8x16_S, Convert__Imm1_0__Imm1_1__Imm1_2__Imm1_3__Imm1_4__Imm1_5__Imm1_6__Imm1_7__Imm1_8__Imm1_9__Imm1_10__Imm1_11__Imm1_12__Imm1_13__Imm1_14__Imm1_15, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1383 | { 7977 /* v128.load */, WebAssembly::LOAD_V128_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1384 | { 7977 /* v128.load */, WebAssembly::LOAD_V128_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1385 | { 7987 /* v128.load16_lane */, WebAssembly::LOAD_LANE_I16x8_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1386 | { 7987 /* v128.load16_lane */, WebAssembly::LOAD_LANE_I16x8_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1387 | { 8004 /* v128.load16_splat */, WebAssembly::LOAD16_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1388 | { 8004 /* v128.load16_splat */, WebAssembly::LOAD16_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1389 | { 8022 /* v128.load32_lane */, WebAssembly::LOAD_LANE_I32x4_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1390 | { 8022 /* v128.load32_lane */, WebAssembly::LOAD_LANE_I32x4_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1391 | { 8039 /* v128.load32_splat */, WebAssembly::LOAD32_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1392 | { 8039 /* v128.load32_splat */, WebAssembly::LOAD32_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1393 | { 8057 /* v128.load32_zero */, WebAssembly::LOAD_ZERO_I32x4_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1394 | { 8057 /* v128.load32_zero */, WebAssembly::LOAD_ZERO_I32x4_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1395 | { 8074 /* v128.load64_lane */, WebAssembly::LOAD_LANE_I64x2_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1396 | { 8074 /* v128.load64_lane */, WebAssembly::LOAD_LANE_I64x2_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1397 | { 8091 /* v128.load64_splat */, WebAssembly::LOAD64_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1398 | { 8091 /* v128.load64_splat */, WebAssembly::LOAD64_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1399 | { 8109 /* v128.load64_zero */, WebAssembly::LOAD_ZERO_I64x2_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1400 | { 8109 /* v128.load64_zero */, WebAssembly::LOAD_ZERO_I64x2_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1401 | { 8126 /* v128.load8_lane */, WebAssembly::LOAD_LANE_I8x16_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1402 | { 8126 /* v128.load8_lane */, WebAssembly::LOAD_LANE_I8x16_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1403 | { 8142 /* v128.load8_splat */, WebAssembly::LOAD8_SPLAT_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1404 | { 8142 /* v128.load8_splat */, WebAssembly::LOAD8_SPLAT_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1405 | { 8159 /* v128.not */, WebAssembly::NOT_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1406 | { 8168 /* v128.or */, WebAssembly::OR_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1407 | { 8176 /* v128.select */, WebAssembly::SELECT_V128_S, Convert_NoOperands, AMFBS_None, { }, }, |
1408 | { 8188 /* v128.store */, WebAssembly::STORE_V128_A32_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1409 | { 8188 /* v128.store */, WebAssembly::STORE_V128_A64_S, Convert__Imm1_1__Imm1_0, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm }, }, |
1410 | { 8199 /* v128.store16_lane */, WebAssembly::STORE_LANE_I16x8_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1411 | { 8199 /* v128.store16_lane */, WebAssembly::STORE_LANE_I16x8_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1412 | { 8217 /* v128.store32_lane */, WebAssembly::STORE_LANE_I32x4_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1413 | { 8217 /* v128.store32_lane */, WebAssembly::STORE_LANE_I32x4_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1414 | { 8235 /* v128.store64_lane */, WebAssembly::STORE_LANE_I64x2_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1415 | { 8235 /* v128.store64_lane */, WebAssembly::STORE_LANE_I64x2_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1416 | { 8253 /* v128.store8_lane */, WebAssembly::STORE_LANE_I8x16_A32_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1417 | { 8253 /* v128.store8_lane */, WebAssembly::STORE_LANE_I8x16_A64_S, Convert__Imm1_1__Imm1_0__Imm1_2, AMFBS_HasSIMD128, { MCK_Imm, MCK_Imm, MCK_Imm }, }, |
1418 | { 8270 /* v128.xor */, WebAssembly::XOR_S, Convert_NoOperands, AMFBS_HasSIMD128, { }, }, |
1419 | }; |
1420 | |
1421 | #include "llvm/Support/Debug.h" |
1422 | #include "llvm/Support/Format.h" |
1423 | |
1424 | unsigned WebAssemblyAsmParser:: |
1425 | MatchInstructionImpl(const OperandVector &Operands, |
1426 | MCInst &Inst, |
1427 | uint64_t &ErrorInfo, |
1428 | FeatureBitset &MissingFeatures, |
1429 | bool matchingInlineAsm, unsigned VariantID) { |
1430 | // Eliminate obvious mismatches. |
1431 | if (Operands.size() > 17) { |
1432 | ErrorInfo = 17; |
1433 | return Match_InvalidOperand; |
1434 | } |
1435 | |
1436 | // Get the current feature set. |
1437 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
1438 | |
1439 | // Get the instruction mnemonic, which is the first token. |
1440 | StringRef Mnemonic = ((WebAssemblyOperand &)*Operands[0]).getToken(); |
1441 | |
1442 | // Some state to try to produce better error messages. |
1443 | bool HadMatchOtherThanFeatures = false; |
1444 | bool HadMatchOtherThanPredicate = false; |
1445 | unsigned RetCode = Match_InvalidOperand; |
1446 | MissingFeatures.set(); |
1447 | // Set ErrorInfo to the operand that mismatches if it is |
1448 | // wrong for all instances of the instruction. |
1449 | ErrorInfo = ~0ULL; |
1450 | // Find the appropriate table for this asm variant. |
1451 | const MatchEntry *Start, *End; |
1452 | switch (VariantID) { |
1453 | default: llvm_unreachable("invalid variant!" ); |
1454 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
1455 | } |
1456 | // Search the table. |
1457 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
1458 | |
1459 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "AsmMatcher: found " << |
1460 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
1461 | " encodings with mnemonic '" << Mnemonic << "'\n" ); |
1462 | |
1463 | // Return a more specific error code if no mnemonics match. |
1464 | if (MnemonicRange.first == MnemonicRange.second) |
1465 | return Match_MnemonicFail; |
1466 | |
1467 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
1468 | it != ie; ++it) { |
1469 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
1470 | bool HasRequiredFeatures = |
1471 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
1472 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Trying to match opcode " |
1473 | << MII.getName(it->Opcode) << "\n" ); |
1474 | // equal_range guarantees that instruction mnemonic matches. |
1475 | assert(Mnemonic == it->getMnemonic()); |
1476 | bool OperandsValid = true; |
1477 | for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 16; ++FormalIdx) { |
1478 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
1479 | DEBUG_WITH_TYPE("asm-matcher" , |
1480 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
1481 | << " against actual operand at index " << ActualIdx); |
1482 | if (ActualIdx < Operands.size()) |
1483 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << " (" ; |
1484 | Operands[ActualIdx]->print(dbgs()); dbgs() << "): " ); |
1485 | else |
1486 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << ": " ); |
1487 | if (ActualIdx >= Operands.size()) { |
1488 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "actual operand index out of range\n" ); |
1489 | if (Formal == InvalidMatchClass) { |
1490 | break; |
1491 | } |
1492 | if (isSubclass(Formal, OptionalMatchClass)) { |
1493 | continue; |
1494 | } |
1495 | OperandsValid = false; |
1496 | ErrorInfo = ActualIdx; |
1497 | break; |
1498 | } |
1499 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
1500 | unsigned Diag = validateOperandClass(Actual, Formal); |
1501 | if (Diag == Match_Success) { |
1502 | DEBUG_WITH_TYPE("asm-matcher" , |
1503 | dbgs() << "match success using generic matcher\n" ); |
1504 | ++ActualIdx; |
1505 | continue; |
1506 | } |
1507 | // If the generic handler indicates an invalid operand |
1508 | // failure, check for a special case. |
1509 | if (Diag != Match_Success) { |
1510 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
1511 | if (TargetDiag == Match_Success) { |
1512 | DEBUG_WITH_TYPE("asm-matcher" , |
1513 | dbgs() << "match success using target matcher\n" ); |
1514 | ++ActualIdx; |
1515 | continue; |
1516 | } |
1517 | // If the target matcher returned a specific error code use |
1518 | // that, else use the one from the generic matcher. |
1519 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
1520 | Diag = TargetDiag; |
1521 | } |
1522 | // If current formal operand wasn't matched and it is optional |
1523 | // then try to match next formal operand |
1524 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
1525 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "ignoring optional operand\n" ); |
1526 | continue; |
1527 | } |
1528 | // If this operand is broken for all of the instances of this |
1529 | // mnemonic, keep track of it so we can report loc info. |
1530 | // If we already had a match that only failed due to a |
1531 | // target predicate, that diagnostic is preferred. |
1532 | if (!HadMatchOtherThanPredicate && |
1533 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
1534 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
1535 | RetCode = Diag; |
1536 | ErrorInfo = ActualIdx; |
1537 | } |
1538 | // Otherwise, just reject this instance of the mnemonic. |
1539 | OperandsValid = false; |
1540 | break; |
1541 | } |
1542 | |
1543 | if (!OperandsValid) { |
1544 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Opcode result: multiple " |
1545 | "operand mismatches, ignoring " |
1546 | "this opcode\n" ); |
1547 | continue; |
1548 | } |
1549 | if (!HasRequiredFeatures) { |
1550 | HadMatchOtherThanFeatures = true; |
1551 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
1552 | DEBUG_WITH_TYPE("asm-matcher" , dbgs() << "Missing target features:" ; |
1553 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
1554 | if (NewMissingFeatures[I]) |
1555 | dbgs() << ' ' << I; |
1556 | dbgs() << "\n" ); |
1557 | if (NewMissingFeatures.count() <= |
1558 | MissingFeatures.count()) |
1559 | MissingFeatures = NewMissingFeatures; |
1560 | continue; |
1561 | } |
1562 | |
1563 | Inst.clear(); |
1564 | |
1565 | Inst.setOpcode(it->Opcode); |
1566 | // We have a potential match but have not rendered the operands. |
1567 | // Check the target predicate to handle any context sensitive |
1568 | // constraints. |
1569 | // For example, Ties that are referenced multiple times must be |
1570 | // checked here to ensure the input is the same for each match |
1571 | // constraints. If we leave it any later the ties will have been |
1572 | // canonicalized |
1573 | unsigned MatchResult; |
1574 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
1575 | Inst.clear(); |
1576 | DEBUG_WITH_TYPE( |
1577 | "asm-matcher" , |
1578 | dbgs() << "Early target match predicate failed with diag code " |
1579 | << MatchResult << "\n" ); |
1580 | RetCode = MatchResult; |
1581 | HadMatchOtherThanPredicate = true; |
1582 | continue; |
1583 | } |
1584 | |
1585 | if (matchingInlineAsm) { |
1586 | convertToMapAndConstraints(it->ConvertFn, Operands); |
1587 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
1588 | ErrorInfo)) |
1589 | return Match_InvalidTiedOperand; |
1590 | |
1591 | return Match_Success; |
1592 | } |
1593 | |
1594 | // We have selected a definite instruction, convert the parsed |
1595 | // operands into the appropriate MCInst. |
1596 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
1597 | |
1598 | // We have a potential match. Check the target predicate to |
1599 | // handle any context sensitive constraints. |
1600 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
1601 | DEBUG_WITH_TYPE("asm-matcher" , |
1602 | dbgs() << "Target match predicate failed with diag code " |
1603 | << MatchResult << "\n" ); |
1604 | Inst.clear(); |
1605 | RetCode = MatchResult; |
1606 | HadMatchOtherThanPredicate = true; |
1607 | continue; |
1608 | } |
1609 | |
1610 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, |
1611 | ErrorInfo)) |
1612 | return Match_InvalidTiedOperand; |
1613 | |
1614 | DEBUG_WITH_TYPE( |
1615 | "asm-matcher" , |
1616 | dbgs() << "Opcode result: complete match, selecting this opcode\n" ); |
1617 | return Match_Success; |
1618 | } |
1619 | |
1620 | // Okay, we had no match. Try to return a useful error code. |
1621 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
1622 | return RetCode; |
1623 | |
1624 | ErrorInfo = 0; |
1625 | return Match_MissingFeature; |
1626 | } |
1627 | |
1628 | #endif // GET_MATCHER_IMPLEMENTATION |
1629 | |
1630 | |
1631 | #ifdef GET_MNEMONIC_SPELL_CHECKER |
1632 | #undef GET_MNEMONIC_SPELL_CHECKER |
1633 | |
1634 | static std::string WebAssemblyMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
1635 | const unsigned MaxEditDist = 2; |
1636 | std::vector<StringRef> Candidates; |
1637 | StringRef Prev = "" ; |
1638 | |
1639 | // Find the appropriate table for this asm variant. |
1640 | const MatchEntry *Start, *End; |
1641 | switch (VariantID) { |
1642 | default: llvm_unreachable("invalid variant!" ); |
1643 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
1644 | } |
1645 | |
1646 | for (auto I = Start; I < End; I++) { |
1647 | // Ignore unsupported instructions. |
1648 | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
1649 | if ((FBS & RequiredFeatures) != RequiredFeatures) |
1650 | continue; |
1651 | |
1652 | StringRef T = I->getMnemonic(); |
1653 | // Avoid recomputing the edit distance for the same string. |
1654 | if (T == Prev) |
1655 | continue; |
1656 | |
1657 | Prev = T; |
1658 | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
1659 | if (Dist <= MaxEditDist) |
1660 | Candidates.push_back(T); |
1661 | } |
1662 | |
1663 | if (Candidates.empty()) |
1664 | return "" ; |
1665 | |
1666 | std::string Res = ", did you mean: " ; |
1667 | unsigned i = 0; |
1668 | for (; i < Candidates.size() - 1; i++) |
1669 | Res += Candidates[i].str() + ", " ; |
1670 | return Res + Candidates[i].str() + "?" ; |
1671 | } |
1672 | |
1673 | #endif // GET_MNEMONIC_SPELL_CHECKER |
1674 | |
1675 | |
1676 | #ifdef GET_MNEMONIC_CHECKER |
1677 | #undef GET_MNEMONIC_CHECKER |
1678 | |
1679 | static bool WebAssemblyCheckMnemonic(StringRef Mnemonic, |
1680 | const FeatureBitset &AvailableFeatures, |
1681 | unsigned VariantID) { |
1682 | // Find the appropriate table for this asm variant. |
1683 | const MatchEntry *Start, *End; |
1684 | switch (VariantID) { |
1685 | default: llvm_unreachable("invalid variant!" ); |
1686 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
1687 | } |
1688 | |
1689 | // Search the table. |
1690 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
1691 | |
1692 | if (MnemonicRange.first == MnemonicRange.second) |
1693 | return false; |
1694 | |
1695 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
1696 | it != ie; ++it) { |
1697 | const FeatureBitset &RequiredFeatures = |
1698 | FeatureBitsets[it->RequiredFeaturesIdx]; |
1699 | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
1700 | return true; |
1701 | } |
1702 | return false; |
1703 | } |
1704 | |
1705 | #endif // GET_MNEMONIC_CHECKER |
1706 | |
1707 | |