1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Writer Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: WebAssembly.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10/// getMnemonic - This method is automatically generated by tablegen
11/// from the instruction set description.
12std::pair<const char *, uint64_t> WebAssemblyInstPrinter::getMnemonic(const MCInst *MI) {
13
14#ifdef __GNUC__
15#pragma GCC diagnostic push
16#pragma GCC diagnostic ignored "-Woverlength-strings"
17#endif
18 static const char AsmStrs[] = {
19 /* 0 */ "br \t\0"
20 /* 10 */ "try \t\0"
21 /* 20 */ "if \t\0"
22 /* 28 */ "return_call \t\0"
23 /* 45 */ "loop \t\0"
24 /* 55 */ "br_if \t\0"
25 /* 65 */ "catch \t\0"
26 /* 75 */ "block \t\0"
27 /* 85 */ "throw \t\0"
28 /* 95 */ "f32.ge \t\0"
29 /* 105 */ "f64.ge \t\0"
30 /* 115 */ "f32.le \t\0"
31 /* 125 */ "f64.le \t\0"
32 /* 135 */ "f32.ne \t\0"
33 /* 145 */ "i32.ne \t\0"
34 /* 155 */ "f64.ne \t\0"
35 /* 165 */ "i64.ne \t\0"
36 /* 175 */ "f32.eq \t\0"
37 /* 185 */ "i32.eq \t\0"
38 /* 195 */ "f64.eq \t\0"
39 /* 205 */ "i64.eq \t\0"
40 /* 215 */ "i32.or \t\0"
41 /* 225 */ "i64.or \t\0"
42 /* 235 */ "f32.gt \t\0"
43 /* 245 */ "f64.gt \t\0"
44 /* 255 */ "f32.lt \t\0"
45 /* 265 */ "f64.lt \t\0"
46 /* 275 */ "memory.atomic.wait32 \t\0"
47 /* 298 */ "memory.atomic.wait64 \t\0"
48 /* 321 */ "f32.sub \t\0"
49 /* 331 */ "i32.sub \t\0"
50 /* 341 */ "f64.sub \t\0"
51 /* 351 */ "i64.sub \t\0"
52 /* 361 */ "f32.add \t\0"
53 /* 371 */ "i32.add \t\0"
54 /* 381 */ "f64.add \t\0"
55 /* 391 */ "i64.add \t\0"
56 /* 401 */ "i32.and \t\0"
57 /* 411 */ "i64.and \t\0"
58 /* 421 */ "br_table \t\0"
59 /* 432 */ "f32.neg \t\0"
60 /* 442 */ "f64.neg \t\0"
61 /* 452 */ "i32.shl \t\0"
62 /* 462 */ "i64.shl \t\0"
63 /* 472 */ "f32.mul \t\0"
64 /* 482 */ "i32.mul \t\0"
65 /* 492 */ "f64.mul \t\0"
66 /* 502 */ "i64.mul \t\0"
67 /* 512 */ "f32.min \t\0"
68 /* 522 */ "f64.min \t\0"
69 /* 532 */ "i32.xor \t\0"
70 /* 542 */ "i64.xor \t\0"
71 /* 552 */ "f32.abs \t\0"
72 /* 562 */ "f64.abs \t\0"
73 /* 572 */ "f32.div \t\0"
74 /* 582 */ "f64.div \t\0"
75 /* 592 */ "rethrow \t\0"
76 /* 602 */ "f32.max \t\0"
77 /* 612 */ "f64.max \t\0"
78 /* 622 */ "memory.atomic.notify \t\0"
79 /* 645 */ "i32.clz \t\0"
80 /* 655 */ "i64.clz \t\0"
81 /* 665 */ "i32.eqz \t\0"
82 /* 675 */ "i64.eqz \t\0"
83 /* 685 */ "i32.ctz \t\0"
84 /* 695 */ "i64.ctz \t\0"
85 /* 705 */ "i64.store32\t\0"
86 /* 718 */ "i64.atomic.store32\t\0"
87 /* 738 */ "f32x4.relaxed_dot_bf16x8_add_f32\t\0"
88 /* 772 */ "f64.promote_f32\t\0"
89 /* 789 */ "i32.reinterpret_f32\t\0"
90 /* 810 */ "f32.reinterpret_i32\t\0"
91 /* 831 */ "f32.demote_f64\t\0"
92 /* 847 */ "i64.reinterpret_f64\t\0"
93 /* 868 */ "i32.wrap_i64\t\0"
94 /* 882 */ "f64.reinterpret_i64\t\0"
95 /* 903 */ "f64x2.promote_low_f32x4\t\0"
96 /* 928 */ "i32.store16\t\0"
97 /* 941 */ "i64.store16\t\0"
98 /* 954 */ "i32.atomic.store16\t\0"
99 /* 974 */ "i64.atomic.store16\t\0"
100 /* 994 */ "f32.load_f16\t\0"
101 /* 1008 */ "f32.store_f16\t\0"
102 /* 1023 */ "i32.store8\t\0"
103 /* 1035 */ "i64.store8\t\0"
104 /* 1047 */ "i32.atomic.store8\t\0"
105 /* 1066 */ "i64.atomic.store8\t\0"
106 /* 1085 */ "f64x2.sub\t\0"
107 /* 1096 */ "i64x2.sub\t\0"
108 /* 1107 */ "f32x4.sub\t\0"
109 /* 1118 */ "i32x4.sub\t\0"
110 /* 1129 */ "i8x16.sub\t\0"
111 /* 1140 */ "f16x8.sub\t\0"
112 /* 1151 */ "i16x8.sub\t\0"
113 /* 1162 */ "i32.atomic.rmw.sub\t\0"
114 /* 1182 */ "i64.atomic.rmw.sub\t\0"
115 /* 1202 */ "f32.trunc\t\0"
116 /* 1213 */ "f64x2.trunc\t\0"
117 /* 1226 */ "f64.trunc\t\0"
118 /* 1237 */ "f32x4.trunc\t\0"
119 /* 1250 */ "f16x8.trunc\t\0"
120 /* 1263 */ "f32.load\t\0"
121 /* 1273 */ "i32.load\t\0"
122 /* 1283 */ "f64.load\t\0"
123 /* 1293 */ "i64.load\t\0"
124 /* 1303 */ "v128.load\t\0"
125 /* 1314 */ "i32.atomic.load\t\0"
126 /* 1331 */ "i64.atomic.load\t\0"
127 /* 1348 */ "f64x2.add\t\0"
128 /* 1359 */ "i64x2.add\t\0"
129 /* 1370 */ "f32x4.add\t\0"
130 /* 1381 */ "i32x4.add\t\0"
131 /* 1392 */ "i8x16.add\t\0"
132 /* 1403 */ "f16x8.add\t\0"
133 /* 1414 */ "i16x8.add\t\0"
134 /* 1425 */ "i32.atomic.rmw.add\t\0"
135 /* 1445 */ "i64.atomic.rmw.add\t\0"
136 /* 1465 */ "f64x2.relaxed_madd\t\0"
137 /* 1485 */ "f32x4.relaxed_madd\t\0"
138 /* 1505 */ "f16x8.relaxed_madd\t\0"
139 /* 1525 */ "f64x2.relaxed_nmadd\t\0"
140 /* 1546 */ "f32x4.relaxed_nmadd\t\0"
141 /* 1567 */ "f16x8.relaxed_nmadd\t\0"
142 /* 1588 */ "v128.and\t\0"
143 /* 1598 */ "i32.atomic.rmw.and\t\0"
144 /* 1618 */ "i64.atomic.rmw.and\t\0"
145 /* 1638 */ "local.tee\t\0"
146 /* 1649 */ "f64x2.ge\t\0"
147 /* 1659 */ "f32x4.ge\t\0"
148 /* 1669 */ "f16x8.ge\t\0"
149 /* 1679 */ "f64x2.le\t\0"
150 /* 1689 */ "f32x4.le\t\0"
151 /* 1699 */ "f16x8.le\t\0"
152 /* 1709 */ "i8x16.shuffle\t\0"
153 /* 1724 */ "i8x16.swizzle\t\0"
154 /* 1739 */ "i8x16.relaxed_swizzle\t\0"
155 /* 1762 */ "f64x2.ne\t\0"
156 /* 1772 */ "i64x2.ne\t\0"
157 /* 1782 */ "f32x4.ne\t\0"
158 /* 1792 */ "i32x4.ne\t\0"
159 /* 1802 */ "i8x16.ne\t\0"
160 /* 1812 */ "f16x8.ne\t\0"
161 /* 1822 */ "i16x8.ne\t\0"
162 /* 1832 */ "v128.load32_lane\t\0"
163 /* 1850 */ "v128.store32_lane\t\0"
164 /* 1869 */ "v128.load64_lane\t\0"
165 /* 1887 */ "v128.store64_lane\t\0"
166 /* 1906 */ "v128.load16_lane\t\0"
167 /* 1924 */ "v128.store16_lane\t\0"
168 /* 1943 */ "v128.load8_lane\t\0"
169 /* 1960 */ "v128.store8_lane\t\0"
170 /* 1978 */ "f64x2.replace_lane\t\0"
171 /* 1998 */ "i64x2.replace_lane\t\0"
172 /* 2018 */ "f32x4.replace_lane\t\0"
173 /* 2038 */ "i32x4.replace_lane\t\0"
174 /* 2058 */ "i8x16.replace_lane\t\0"
175 /* 2078 */ "i16x8.replace_lane\t\0"
176 /* 2098 */ "f64x2.extract_lane\t\0"
177 /* 2118 */ "i64x2.extract_lane\t\0"
178 /* 2138 */ "f32x4.extract_lane\t\0"
179 /* 2158 */ "i32x4.extract_lane\t\0"
180 /* 2178 */ "f16x8.extract_lane\t\0"
181 /* 2198 */ "f32.store\t\0"
182 /* 2209 */ "i32.store\t\0"
183 /* 2220 */ "f64.store\t\0"
184 /* 2231 */ "i64.store\t\0"
185 /* 2242 */ "v128.store\t\0"
186 /* 2254 */ "i32.atomic.store\t\0"
187 /* 2272 */ "i64.atomic.store\t\0"
188 /* 2290 */ "i64x2.all_true\t\0"
189 /* 2306 */ "i32x4.all_true\t\0"
190 /* 2322 */ "i8x16.all_true\t\0"
191 /* 2338 */ "i16x8.all_true\t\0"
192 /* 2354 */ "v128.any_true\t\0"
193 /* 2369 */ "table.size\t\0"
194 /* 2381 */ "memory.size\t\0"
195 /* 2394 */ "f64x2.neg\t\0"
196 /* 2405 */ "i64x2.neg\t\0"
197 /* 2416 */ "f32x4.neg\t\0"
198 /* 2427 */ "i32x4.neg\t\0"
199 /* 2438 */ "i8x16.neg\t\0"
200 /* 2449 */ "f16x8.neg\t\0"
201 /* 2460 */ "i16x8.neg\t\0"
202 /* 2471 */ "i32.atomic.rmw.xchg\t\0"
203 /* 2492 */ "i64.atomic.rmw.xchg\t\0"
204 /* 2513 */ "i32.atomic.rmw.cmpxchg\t\0"
205 /* 2537 */ "i64.atomic.rmw.cmpxchg\t\0"
206 /* 2561 */ "i64x2.bitmask\t\0"
207 /* 2576 */ "i32x4.bitmask\t\0"
208 /* 2591 */ "i8x16.bitmask\t\0"
209 /* 2606 */ "i16x8.bitmask\t\0"
210 /* 2621 */ "i64x2.shl\t\0"
211 /* 2632 */ "i32x4.shl\t\0"
212 /* 2643 */ "i8x16.shl\t\0"
213 /* 2654 */ "i16x8.shl\t\0"
214 /* 2665 */ "f32.ceil\t\0"
215 /* 2675 */ "f64x2.ceil\t\0"
216 /* 2687 */ "f64.ceil\t\0"
217 /* 2697 */ "f32x4.ceil\t\0"
218 /* 2709 */ "f16x8.ceil\t\0"
219 /* 2721 */ "return_call\t\0"
220 /* 2734 */ "table.fill\t\0"
221 /* 2746 */ "memory.fill\t\0"
222 /* 2759 */ "ref.is_null\t\0"
223 /* 2772 */ "i32.rotl\t\0"
224 /* 2782 */ "i64.rotl\t\0"
225 /* 2792 */ "f64x2.mul\t\0"
226 /* 2803 */ "i64x2.mul\t\0"
227 /* 2814 */ "f32x4.mul\t\0"
228 /* 2825 */ "i32x4.mul\t\0"
229 /* 2836 */ "f16x8.mul\t\0"
230 /* 2847 */ "i16x8.mul\t\0"
231 /* 2858 */ "f32.copysign\t\0"
232 /* 2872 */ "f64.copysign\t\0"
233 /* 2886 */ "f64x2.min\t\0"
234 /* 2897 */ "f32x4.min\t\0"
235 /* 2908 */ "f16x8.min\t\0"
236 /* 2919 */ "f64x2.relaxed_min\t\0"
237 /* 2938 */ "f32x4.relaxed_min\t\0"
238 /* 2957 */ "f64x2.pmin\t\0"
239 /* 2969 */ "f32x4.pmin\t\0"
240 /* 2981 */ "f16x8.pmin\t\0"
241 /* 2993 */ "v128.load32_zero\t\0"
242 /* 3011 */ "f32x4.demote_f64x2_zero\t\0"
243 /* 3036 */ "v128.load64_zero\t\0"
244 /* 3054 */ "i32x4.relaxed_trunc_f64x2_s_zero\t\0"
245 /* 3088 */ "i32x4.trunc_sat_f64x2_s_zero\t\0"
246 /* 3118 */ "i32x4.relaxed_trunc_f64x2_u_zero\t\0"
247 /* 3152 */ "i32x4.trunc_sat_f64x2_u_zero\t\0"
248 /* 3182 */ "data.drop\t\0"
249 /* 3193 */ "f64x2.eq\t\0"
250 /* 3203 */ "i64x2.eq\t\0"
251 /* 3213 */ "f32x4.eq\t\0"
252 /* 3223 */ "i32x4.eq\t\0"
253 /* 3233 */ "i8x16.eq\t\0"
254 /* 3243 */ "f16x8.eq\t\0"
255 /* 3253 */ "i16x8.eq\t\0"
256 /* 3263 */ "v128.or\t\0"
257 /* 3272 */ "i32.atomic.rmw.or\t\0"
258 /* 3291 */ "i64.atomic.rmw.or\t\0"
259 /* 3310 */ "f32.floor\t\0"
260 /* 3321 */ "f64x2.floor\t\0"
261 /* 3334 */ "f64.floor\t\0"
262 /* 3345 */ "f32x4.floor\t\0"
263 /* 3358 */ "f16x8.floor\t\0"
264 /* 3371 */ "v128.xor\t\0"
265 /* 3381 */ "i32.atomic.rmw.xor\t\0"
266 /* 3401 */ "i64.atomic.rmw.xor\t\0"
267 /* 3421 */ "i32.rotr\t\0"
268 /* 3431 */ "i64.rotr\t\0"
269 /* 3441 */ "i64.load32_s\t\0"
270 /* 3455 */ "i64.extend32_s\t\0"
271 /* 3471 */ "i32.trunc_f32_s\t\0"
272 /* 3488 */ "i64.trunc_f32_s\t\0"
273 /* 3505 */ "i32.trunc_sat_f32_s\t\0"
274 /* 3526 */ "i64.trunc_sat_f32_s\t\0"
275 /* 3547 */ "i64.extend_i32_s\t\0"
276 /* 3565 */ "f32.convert_i32_s\t\0"
277 /* 3584 */ "f64.convert_i32_s\t\0"
278 /* 3603 */ "i64x2.load32x2_s\t\0"
279 /* 3621 */ "i32.trunc_f64_s\t\0"
280 /* 3638 */ "i64.trunc_f64_s\t\0"
281 /* 3655 */ "i32.trunc_sat_f64_s\t\0"
282 /* 3676 */ "i64.trunc_sat_f64_s\t\0"
283 /* 3697 */ "f32.convert_i64_s\t\0"
284 /* 3716 */ "f64.convert_i64_s\t\0"
285 /* 3735 */ "i32x4.relaxed_trunc_f32x4_s\t\0"
286 /* 3764 */ "i32x4.trunc_sat_f32x4_s\t\0"
287 /* 3789 */ "i64x2.extend_high_i32x4_s\t\0"
288 /* 3816 */ "i64x2.extmul_high_i32x4_s\t\0"
289 /* 3843 */ "f32x4.convert_i32x4_s\t\0"
290 /* 3866 */ "i64x2.extend_low_i32x4_s\t\0"
291 /* 3892 */ "i64x2.extmul_low_i32x4_s\t\0"
292 /* 3918 */ "f64x2.convert_low_i32x4_s\t\0"
293 /* 3945 */ "i16x8.narrow_i32x4_s\t\0"
294 /* 3967 */ "i32x4.load16x4_s\t\0"
295 /* 3985 */ "i32.load16_s\t\0"
296 /* 3999 */ "i64.load16_s\t\0"
297 /* 4013 */ "i32.extend16_s\t\0"
298 /* 4029 */ "i64.extend16_s\t\0"
299 /* 4045 */ "i16x8.relaxed_dot_i8x16_i7x16_s\t\0"
300 /* 4078 */ "i16x8.extadd_pairwise_i8x16_s\t\0"
301 /* 4109 */ "i16x8.extend_high_i8x16_s\t\0"
302 /* 4136 */ "i16x8.extmul_high_i8x16_s\t\0"
303 /* 4163 */ "i16x8.extend_low_i8x16_s\t\0"
304 /* 4189 */ "i16x8.extmul_low_i8x16_s\t\0"
305 /* 4215 */ "i32.load8_s\t\0"
306 /* 4228 */ "i64.load8_s\t\0"
307 /* 4241 */ "i32.extend8_s\t\0"
308 /* 4256 */ "i64.extend8_s\t\0"
309 /* 4271 */ "i16x8.trunc_sat_f16x8_s\t\0"
310 /* 4296 */ "i32x4.extadd_pairwise_i16x8_s\t\0"
311 /* 4327 */ "i32x4.extend_high_i16x8_s\t\0"
312 /* 4354 */ "i32x4.extmul_high_i16x8_s\t\0"
313 /* 4381 */ "i32x4.dot_i16x8_s\t\0"
314 /* 4400 */ "f16x8.convert_i16x8_s\t\0"
315 /* 4423 */ "i32x4.extend_low_i16x8_s\t\0"
316 /* 4449 */ "i32x4.extmul_low_i16x8_s\t\0"
317 /* 4475 */ "i8x16.narrow_i16x8_s\t\0"
318 /* 4497 */ "i16x8.load8x8_s\t\0"
319 /* 4514 */ "i32x4.relaxed_dot_i8x16_i7x16_add_s\t\0"
320 /* 4551 */ "i32.ge_s\t\0"
321 /* 4561 */ "i64x2.ge_s\t\0"
322 /* 4573 */ "i64.ge_s\t\0"
323 /* 4583 */ "i32x4.ge_s\t\0"
324 /* 4595 */ "i8x16.ge_s\t\0"
325 /* 4607 */ "i16x8.ge_s\t\0"
326 /* 4619 */ "i32.le_s\t\0"
327 /* 4629 */ "i64x2.le_s\t\0"
328 /* 4641 */ "i64.le_s\t\0"
329 /* 4651 */ "i32x4.le_s\t\0"
330 /* 4663 */ "i8x16.le_s\t\0"
331 /* 4675 */ "i16x8.le_s\t\0"
332 /* 4687 */ "i8x16.extract_lane_s\t\0"
333 /* 4709 */ "i16x8.extract_lane_s\t\0"
334 /* 4731 */ "i32.rem_s\t\0"
335 /* 4742 */ "i64.rem_s\t\0"
336 /* 4753 */ "i32x4.min_s\t\0"
337 /* 4766 */ "i8x16.min_s\t\0"
338 /* 4779 */ "i16x8.min_s\t\0"
339 /* 4792 */ "i32.shr_s\t\0"
340 /* 4803 */ "i64x2.shr_s\t\0"
341 /* 4816 */ "i64.shr_s\t\0"
342 /* 4827 */ "i32x4.shr_s\t\0"
343 /* 4840 */ "i8x16.shr_s\t\0"
344 /* 4853 */ "i16x8.shr_s\t\0"
345 /* 4866 */ "i16x8.relaxed_q15mulr_s\t\0"
346 /* 4891 */ "i8x16.sub_sat_s\t\0"
347 /* 4908 */ "i16x8.sub_sat_s\t\0"
348 /* 4925 */ "i8x16.add_sat_s\t\0"
349 /* 4942 */ "i16x8.add_sat_s\t\0"
350 /* 4959 */ "i16x8.q15mulr_sat_s\t\0"
351 /* 4980 */ "i32.gt_s\t\0"
352 /* 4990 */ "i64x2.gt_s\t\0"
353 /* 5002 */ "i64.gt_s\t\0"
354 /* 5012 */ "i32x4.gt_s\t\0"
355 /* 5024 */ "i8x16.gt_s\t\0"
356 /* 5036 */ "i16x8.gt_s\t\0"
357 /* 5048 */ "i32.lt_s\t\0"
358 /* 5058 */ "i64x2.lt_s\t\0"
359 /* 5070 */ "i64.lt_s\t\0"
360 /* 5080 */ "i32x4.lt_s\t\0"
361 /* 5092 */ "i8x16.lt_s\t\0"
362 /* 5104 */ "i16x8.lt_s\t\0"
363 /* 5116 */ "i32.div_s\t\0"
364 /* 5127 */ "i64.div_s\t\0"
365 /* 5138 */ "i32x4.max_s\t\0"
366 /* 5151 */ "i8x16.max_s\t\0"
367 /* 5164 */ "i16x8.max_s\t\0"
368 /* 5177 */ "f64x2.abs\t\0"
369 /* 5188 */ "i64x2.abs\t\0"
370 /* 5199 */ "f32x4.abs\t\0"
371 /* 5210 */ "i32x4.abs\t\0"
372 /* 5221 */ "i8x16.abs\t\0"
373 /* 5232 */ "f16x8.abs\t\0"
374 /* 5243 */ "i16x8.abs\t\0"
375 /* 5254 */ "call_params\t\0"
376 /* 5267 */ "f64x2.splat\t\0"
377 /* 5280 */ "i64x2.splat\t\0"
378 /* 5293 */ "f32x4.splat\t\0"
379 /* 5306 */ "i32x4.splat\t\0"
380 /* 5319 */ "i8x16.splat\t\0"
381 /* 5332 */ "f16x8.splat\t\0"
382 /* 5345 */ "i16x8.splat\t\0"
383 /* 5358 */ "v128.load32_splat\t\0"
384 /* 5377 */ "v128.load64_splat\t\0"
385 /* 5396 */ "v128.load16_splat\t\0"
386 /* 5415 */ "v128.load8_splat\t\0"
387 /* 5433 */ "f32.select\t\0"
388 /* 5445 */ "i32.select\t\0"
389 /* 5457 */ "f64.select\t\0"
390 /* 5469 */ "i64.select\t\0"
391 /* 5481 */ "v128.select\t\0"
392 /* 5494 */ "funcref.select\t\0"
393 /* 5510 */ "externref.select\t\0"
394 /* 5528 */ "exnref.select\t\0"
395 /* 5543 */ "i64x2.relaxed_laneselect\t\0"
396 /* 5569 */ "i32x4.relaxed_laneselect\t\0"
397 /* 5595 */ "i8x16.relaxed_laneselect\t\0"
398 /* 5621 */ "i16x8.relaxed_laneselect\t\0"
399 /* 5647 */ "v128.bitselect\t\0"
400 /* 5663 */ "return_call_indirect\t\0"
401 /* 5685 */ "table.get\t\0"
402 /* 5696 */ "global.get\t\0"
403 /* 5708 */ "local.get\t\0"
404 /* 5719 */ "table.set\t\0"
405 /* 5730 */ "global.set\t\0"
406 /* 5742 */ "local.set\t\0"
407 /* 5753 */ "f64x2.gt\t\0"
408 /* 5763 */ "f32x4.gt\t\0"
409 /* 5773 */ "f16x8.gt\t\0"
410 /* 5783 */ "memory.init\t\0"
411 /* 5796 */ "f64x2.lt\t\0"
412 /* 5806 */ "f32x4.lt\t\0"
413 /* 5816 */ "f16x8.lt\t\0"
414 /* 5826 */ "i32.popcnt\t\0"
415 /* 5838 */ "i64.popcnt\t\0"
416 /* 5850 */ "i8x16.popcnt\t\0"
417 /* 5864 */ "v128.not\t\0"
418 /* 5874 */ "v128.andnot\t\0"
419 /* 5887 */ "f32.sqrt\t\0"
420 /* 5897 */ "f64x2.sqrt\t\0"
421 /* 5909 */ "f64.sqrt\t\0"
422 /* 5919 */ "f32x4.sqrt\t\0"
423 /* 5931 */ "f16x8.sqrt\t\0"
424 /* 5943 */ "f32.nearest\t\0"
425 /* 5956 */ "f64x2.nearest\t\0"
426 /* 5971 */ "f64.nearest\t\0"
427 /* 5984 */ "f32x4.nearest\t\0"
428 /* 5999 */ "f16x8.nearest\t\0"
429 /* 6014 */ "f32.const\t\0"
430 /* 6025 */ "i32.const\t\0"
431 /* 6036 */ "f64.const\t\0"
432 /* 6047 */ "i64.const\t\0"
433 /* 6058 */ "v128.const\t\0"
434 /* 6070 */ "i64.load32_u\t\0"
435 /* 6084 */ "i64.atomic.load32_u\t\0"
436 /* 6105 */ "i32.trunc_f32_u\t\0"
437 /* 6122 */ "i64.trunc_f32_u\t\0"
438 /* 6139 */ "i32.trunc_sat_f32_u\t\0"
439 /* 6160 */ "i64.trunc_sat_f32_u\t\0"
440 /* 6181 */ "i64.extend_i32_u\t\0"
441 /* 6199 */ "f32.convert_i32_u\t\0"
442 /* 6218 */ "f64.convert_i32_u\t\0"
443 /* 6237 */ "i64x2.load32x2_u\t\0"
444 /* 6255 */ "i32.trunc_f64_u\t\0"
445 /* 6272 */ "i64.trunc_f64_u\t\0"
446 /* 6289 */ "i32.trunc_sat_f64_u\t\0"
447 /* 6310 */ "i64.trunc_sat_f64_u\t\0"
448 /* 6331 */ "f32.convert_i64_u\t\0"
449 /* 6350 */ "f64.convert_i64_u\t\0"
450 /* 6369 */ "i32x4.relaxed_trunc_f32x4_u\t\0"
451 /* 6398 */ "i32x4.trunc_sat_f32x4_u\t\0"
452 /* 6423 */ "i64x2.extend_high_i32x4_u\t\0"
453 /* 6450 */ "i64x2.extmul_high_i32x4_u\t\0"
454 /* 6477 */ "f32x4.convert_i32x4_u\t\0"
455 /* 6500 */ "i64x2.extend_low_i32x4_u\t\0"
456 /* 6526 */ "i64x2.extmul_low_i32x4_u\t\0"
457 /* 6552 */ "f64x2.convert_low_i32x4_u\t\0"
458 /* 6579 */ "i16x8.narrow_i32x4_u\t\0"
459 /* 6601 */ "i32x4.load16x4_u\t\0"
460 /* 6619 */ "i32.load16_u\t\0"
461 /* 6633 */ "i64.load16_u\t\0"
462 /* 6647 */ "i32.atomic.load16_u\t\0"
463 /* 6668 */ "i64.atomic.load16_u\t\0"
464 /* 6689 */ "i16x8.extadd_pairwise_i8x16_u\t\0"
465 /* 6720 */ "i16x8.extend_high_i8x16_u\t\0"
466 /* 6747 */ "i16x8.extmul_high_i8x16_u\t\0"
467 /* 6774 */ "i16x8.extend_low_i8x16_u\t\0"
468 /* 6800 */ "i16x8.extmul_low_i8x16_u\t\0"
469 /* 6826 */ "i32.load8_u\t\0"
470 /* 6839 */ "i64.load8_u\t\0"
471 /* 6852 */ "i32.atomic.load8_u\t\0"
472 /* 6872 */ "i64.atomic.load8_u\t\0"
473 /* 6892 */ "i16x8.trunc_sat_f16x8_u\t\0"
474 /* 6917 */ "i32x4.extadd_pairwise_i16x8_u\t\0"
475 /* 6948 */ "i32x4.extend_high_i16x8_u\t\0"
476 /* 6975 */ "i32x4.extmul_high_i16x8_u\t\0"
477 /* 7002 */ "f16x8.convert_i16x8_u\t\0"
478 /* 7025 */ "i32x4.extend_low_i16x8_u\t\0"
479 /* 7051 */ "i32x4.extmul_low_i16x8_u\t\0"
480 /* 7077 */ "i8x16.narrow_i16x8_u\t\0"
481 /* 7099 */ "i16x8.load8x8_u\t\0"
482 /* 7116 */ "i64.atomic.rmw32.sub_u\t\0"
483 /* 7140 */ "i32.atomic.rmw16.sub_u\t\0"
484 /* 7164 */ "i64.atomic.rmw16.sub_u\t\0"
485 /* 7188 */ "i32.atomic.rmw8.sub_u\t\0"
486 /* 7211 */ "i64.atomic.rmw8.sub_u\t\0"
487 /* 7234 */ "i64.atomic.rmw32.add_u\t\0"
488 /* 7258 */ "i32.atomic.rmw16.add_u\t\0"
489 /* 7282 */ "i64.atomic.rmw16.add_u\t\0"
490 /* 7306 */ "i32.atomic.rmw8.add_u\t\0"
491 /* 7329 */ "i64.atomic.rmw8.add_u\t\0"
492 /* 7352 */ "i64.atomic.rmw32.and_u\t\0"
493 /* 7376 */ "i32.atomic.rmw16.and_u\t\0"
494 /* 7400 */ "i64.atomic.rmw16.and_u\t\0"
495 /* 7424 */ "i32.atomic.rmw8.and_u\t\0"
496 /* 7447 */ "i64.atomic.rmw8.and_u\t\0"
497 /* 7470 */ "i32.ge_u\t\0"
498 /* 7480 */ "i64.ge_u\t\0"
499 /* 7490 */ "i32x4.ge_u\t\0"
500 /* 7502 */ "i8x16.ge_u\t\0"
501 /* 7514 */ "i16x8.ge_u\t\0"
502 /* 7526 */ "i32.le_u\t\0"
503 /* 7536 */ "i64.le_u\t\0"
504 /* 7546 */ "i32x4.le_u\t\0"
505 /* 7558 */ "i8x16.le_u\t\0"
506 /* 7570 */ "i16x8.le_u\t\0"
507 /* 7582 */ "i8x16.extract_lane_u\t\0"
508 /* 7604 */ "i16x8.extract_lane_u\t\0"
509 /* 7626 */ "i64.atomic.rmw32.xchg_u\t\0"
510 /* 7651 */ "i32.atomic.rmw16.xchg_u\t\0"
511 /* 7676 */ "i64.atomic.rmw16.xchg_u\t\0"
512 /* 7701 */ "i32.atomic.rmw8.xchg_u\t\0"
513 /* 7725 */ "i64.atomic.rmw8.xchg_u\t\0"
514 /* 7749 */ "i64.atomic.rmw32.cmpxchg_u\t\0"
515 /* 7777 */ "i32.atomic.rmw16.cmpxchg_u\t\0"
516 /* 7805 */ "i64.atomic.rmw16.cmpxchg_u\t\0"
517 /* 7833 */ "i32.atomic.rmw8.cmpxchg_u\t\0"
518 /* 7860 */ "i64.atomic.rmw8.cmpxchg_u\t\0"
519 /* 7887 */ "i32.rem_u\t\0"
520 /* 7898 */ "i64.rem_u\t\0"
521 /* 7909 */ "i32x4.min_u\t\0"
522 /* 7922 */ "i8x16.min_u\t\0"
523 /* 7935 */ "i16x8.min_u\t\0"
524 /* 7948 */ "i8x16.avgr_u\t\0"
525 /* 7962 */ "i16x8.avgr_u\t\0"
526 /* 7976 */ "i32.shr_u\t\0"
527 /* 7987 */ "i64x2.shr_u\t\0"
528 /* 8000 */ "i64.shr_u\t\0"
529 /* 8011 */ "i32x4.shr_u\t\0"
530 /* 8024 */ "i8x16.shr_u\t\0"
531 /* 8037 */ "i16x8.shr_u\t\0"
532 /* 8050 */ "i64.atomic.rmw32.or_u\t\0"
533 /* 8073 */ "i32.atomic.rmw16.or_u\t\0"
534 /* 8096 */ "i64.atomic.rmw16.or_u\t\0"
535 /* 8119 */ "i32.atomic.rmw8.or_u\t\0"
536 /* 8141 */ "i64.atomic.rmw8.or_u\t\0"
537 /* 8163 */ "i64.atomic.rmw32.xor_u\t\0"
538 /* 8187 */ "i32.atomic.rmw16.xor_u\t\0"
539 /* 8211 */ "i64.atomic.rmw16.xor_u\t\0"
540 /* 8235 */ "i32.atomic.rmw8.xor_u\t\0"
541 /* 8258 */ "i64.atomic.rmw8.xor_u\t\0"
542 /* 8281 */ "i8x16.sub_sat_u\t\0"
543 /* 8298 */ "i16x8.sub_sat_u\t\0"
544 /* 8315 */ "i8x16.add_sat_u\t\0"
545 /* 8332 */ "i16x8.add_sat_u\t\0"
546 /* 8349 */ "i32.gt_u\t\0"
547 /* 8359 */ "i64.gt_u\t\0"
548 /* 8369 */ "i32x4.gt_u\t\0"
549 /* 8381 */ "i8x16.gt_u\t\0"
550 /* 8393 */ "i16x8.gt_u\t\0"
551 /* 8405 */ "i32.lt_u\t\0"
552 /* 8415 */ "i64.lt_u\t\0"
553 /* 8425 */ "i32x4.lt_u\t\0"
554 /* 8437 */ "i8x16.lt_u\t\0"
555 /* 8449 */ "i16x8.lt_u\t\0"
556 /* 8461 */ "i32.div_u\t\0"
557 /* 8472 */ "i64.div_u\t\0"
558 /* 8483 */ "i32x4.max_u\t\0"
559 /* 8496 */ "i8x16.max_u\t\0"
560 /* 8509 */ "i16x8.max_u\t\0"
561 /* 8522 */ "f64x2.div\t\0"
562 /* 8533 */ "f32x4.div\t\0"
563 /* 8544 */ "f16x8.div\t\0"
564 /* 8555 */ "table.grow\t\0"
565 /* 8567 */ "memory.grow\t\0"
566 /* 8580 */ "f64x2.max\t\0"
567 /* 8591 */ "f32x4.max\t\0"
568 /* 8602 */ "f16x8.max\t\0"
569 /* 8613 */ "f64x2.relaxed_max\t\0"
570 /* 8632 */ "f32x4.relaxed_max\t\0"
571 /* 8651 */ "f64x2.pmax\t\0"
572 /* 8663 */ "f32x4.pmax\t\0"
573 /* 8675 */ "f16x8.pmax\t\0"
574 /* 8687 */ "table.copy\t\0"
575 /* 8699 */ "local.copy\t\0"
576 /* 8711 */ "memory.copy\t\0"
577 /* 8724 */ "delegate \t \0"
578 /* 8736 */ "f32.ge \0"
579 /* 8745 */ "f64.ge \0"
580 /* 8754 */ "f32.le \0"
581 /* 8763 */ "f64.le \0"
582 /* 8772 */ "f32.ne \0"
583 /* 8781 */ "i32.ne \0"
584 /* 8790 */ "f64.ne \0"
585 /* 8799 */ "i64.ne \0"
586 /* 8808 */ "f32.eq \0"
587 /* 8817 */ "i32.eq \0"
588 /* 8826 */ "f64.eq \0"
589 /* 8835 */ "i64.eq \0"
590 /* 8844 */ "i32.or \0"
591 /* 8853 */ "i64.or \0"
592 /* 8862 */ "f32.gt \0"
593 /* 8871 */ "f64.gt \0"
594 /* 8880 */ "f32.lt \0"
595 /* 8889 */ "f64.lt \0"
596 /* 8898 */ "f32.sub \0"
597 /* 8907 */ "i32.sub \0"
598 /* 8916 */ "f64.sub \0"
599 /* 8925 */ "i64.sub \0"
600 /* 8934 */ "f32.add \0"
601 /* 8943 */ "i32.add \0"
602 /* 8952 */ "f64.add \0"
603 /* 8961 */ "i64.add \0"
604 /* 8970 */ "i32.and \0"
605 /* 8979 */ "i64.and \0"
606 /* 8988 */ "f32.neg \0"
607 /* 8997 */ "f64.neg \0"
608 /* 9006 */ "i32.shl \0"
609 /* 9015 */ "i64.shl \0"
610 /* 9024 */ "f32.mul \0"
611 /* 9033 */ "i32.mul \0"
612 /* 9042 */ "f64.mul \0"
613 /* 9051 */ "i64.mul \0"
614 /* 9060 */ "f32.min \0"
615 /* 9069 */ "f64.min \0"
616 /* 9078 */ "i32.xor \0"
617 /* 9087 */ "i64.xor \0"
618 /* 9096 */ "f32.abs \0"
619 /* 9105 */ "f64.abs \0"
620 /* 9114 */ "f32.div \0"
621 /* 9123 */ "f64.div \0"
622 /* 9132 */ "f32.max \0"
623 /* 9141 */ "f64.max \0"
624 /* 9150 */ "i32.clz \0"
625 /* 9159 */ "i64.clz \0"
626 /* 9168 */ "i32.ctz \0"
627 /* 9177 */ "i64.ctz \0"
628 /* 9186 */ "# XRay Function Patchable RET.\0"
629 /* 9217 */ "# XRay Typed Event Log.\0"
630 /* 9241 */ "# XRay Custom Event Log.\0"
631 /* 9266 */ "# XRay Function Enter.\0"
632 /* 9289 */ "# XRay Tail Call Exit.\0"
633 /* 9312 */ "# XRay Function Exit.\0"
634 /* 9334 */ "f32x4.relaxed_dot_bf16x8_add_f32\0"
635 /* 9367 */ "f64.promote_f32\0"
636 /* 9383 */ "i32.reinterpret_f32\0"
637 /* 9403 */ "f32.reinterpret_i32\0"
638 /* 9423 */ "f32.demote_f64\0"
639 /* 9438 */ "i64.reinterpret_f64\0"
640 /* 9458 */ "i32.wrap_i64\0"
641 /* 9471 */ "f64.reinterpret_i64\0"
642 /* 9491 */ "f64x2.promote_low_f32x4\0"
643 /* 9515 */ "LIFETIME_END\0"
644 /* 9528 */ "PSEUDO_PROBE\0"
645 /* 9541 */ "BUNDLE\0"
646 /* 9548 */ "DBG_VALUE\0"
647 /* 9558 */ "DBG_INSTR_REF\0"
648 /* 9572 */ "DBG_PHI\0"
649 /* 9580 */ "DBG_LABEL\0"
650 /* 9590 */ "LIFETIME_START\0"
651 /* 9605 */ "DBG_VALUE_LIST\0"
652 /* 9620 */ "f64x2.sub\0"
653 /* 9630 */ "i64x2.sub\0"
654 /* 9640 */ "f32x4.sub\0"
655 /* 9650 */ "i32x4.sub\0"
656 /* 9660 */ "i8x16.sub\0"
657 /* 9670 */ "f16x8.sub\0"
658 /* 9680 */ "i16x8.sub\0"
659 /* 9690 */ "ref.null_func\0"
660 /* 9704 */ "f32.trunc\0"
661 /* 9714 */ "f64x2.trunc\0"
662 /* 9726 */ "f64.trunc\0"
663 /* 9736 */ "f32x4.trunc\0"
664 /* 9748 */ "f16x8.trunc\0"
665 /* 9760 */ "f64x2.add\0"
666 /* 9770 */ "i64x2.add\0"
667 /* 9780 */ "f32x4.add\0"
668 /* 9790 */ "i32x4.add\0"
669 /* 9800 */ "i8x16.add\0"
670 /* 9810 */ "f16x8.add\0"
671 /* 9820 */ "i16x8.add\0"
672 /* 9830 */ "f64x2.relaxed_madd\0"
673 /* 9849 */ "f32x4.relaxed_madd\0"
674 /* 9868 */ "f16x8.relaxed_madd\0"
675 /* 9887 */ "f64x2.relaxed_nmadd\0"
676 /* 9907 */ "f32x4.relaxed_nmadd\0"
677 /* 9927 */ "f16x8.relaxed_nmadd\0"
678 /* 9947 */ "v128.and\0"
679 /* 9956 */ "end\0"
680 /* 9960 */ "atomic.fence\0"
681 /* 9973 */ "compiler_fence\0"
682 /* 9988 */ "local.tee\0"
683 /* 9998 */ "f64x2.ge\0"
684 /* 10007 */ "f32x4.ge\0"
685 /* 10016 */ "f16x8.ge\0"
686 /* 10025 */ "f64x2.le\0"
687 /* 10034 */ "f32x4.le\0"
688 /* 10043 */ "f16x8.le\0"
689 /* 10052 */ "unreachable\0"
690 /* 10064 */ "i8x16.swizzle\0"
691 /* 10078 */ "i8x16.relaxed_swizzle\0"
692 /* 10100 */ "f64x2.ne\0"
693 /* 10109 */ "i64x2.ne\0"
694 /* 10118 */ "f32x4.ne\0"
695 /* 10127 */ "i32x4.ne\0"
696 /* 10136 */ "i8x16.ne\0"
697 /* 10145 */ "f16x8.ne\0"
698 /* 10154 */ "i16x8.ne\0"
699 /* 10163 */ "else\0"
700 /* 10168 */ "i64x2.all_true\0"
701 /* 10183 */ "i32x4.all_true\0"
702 /* 10198 */ "i8x16.all_true\0"
703 /* 10213 */ "i16x8.all_true\0"
704 /* 10228 */ "v128.any_true\0"
705 /* 10242 */ "end_if\0"
706 /* 10249 */ "f64x2.neg\0"
707 /* 10259 */ "i64x2.neg\0"
708 /* 10269 */ "f32x4.neg\0"
709 /* 10279 */ "i32x4.neg\0"
710 /* 10289 */ "i8x16.neg\0"
711 /* 10299 */ "f16x8.neg\0"
712 /* 10309 */ "i16x8.neg\0"
713 /* 10319 */ "catch\0"
714 /* 10325 */ "end_block\0"
715 /* 10335 */ "i64x2.bitmask\0"
716 /* 10349 */ "i32x4.bitmask\0"
717 /* 10363 */ "i8x16.bitmask\0"
718 /* 10377 */ "i16x8.bitmask\0"
719 /* 10391 */ "i64x2.shl\0"
720 /* 10401 */ "i32x4.shl\0"
721 /* 10411 */ "i8x16.shl\0"
722 /* 10421 */ "i16x8.shl\0"
723 /* 10431 */ "f32.ceil\0"
724 /* 10440 */ "f64x2.ceil\0"
725 /* 10451 */ "f64.ceil\0"
726 /* 10460 */ "f32x4.ceil\0"
727 /* 10471 */ "f16x8.ceil\0"
728 /* 10482 */ "catch_all\0"
729 /* 10492 */ "# FEntry call\0"
730 /* 10506 */ "ref.is_null\0"
731 /* 10518 */ "i32.rotl\0"
732 /* 10527 */ "i64.rotl\0"
733 /* 10536 */ "f64x2.mul\0"
734 /* 10546 */ "i64x2.mul\0"
735 /* 10556 */ "f32x4.mul\0"
736 /* 10566 */ "i32x4.mul\0"
737 /* 10576 */ "f16x8.mul\0"
738 /* 10586 */ "i16x8.mul\0"
739 /* 10596 */ "f32.copysign\0"
740 /* 10609 */ "f64.copysign\0"
741 /* 10622 */ "f64x2.min\0"
742 /* 10632 */ "f32x4.min\0"
743 /* 10642 */ "f16x8.min\0"
744 /* 10652 */ "f64x2.relaxed_min\0"
745 /* 10670 */ "f32x4.relaxed_min\0"
746 /* 10688 */ "f64x2.pmin\0"
747 /* 10699 */ "f32x4.pmin\0"
748 /* 10710 */ "f16x8.pmin\0"
749 /* 10721 */ "end_function\0"
750 /* 10734 */ "ref.null_extern\0"
751 /* 10750 */ "return\0"
752 /* 10757 */ "ref.null_exn\0"
753 /* 10770 */ "f32x4.demote_f64x2_zero\0"
754 /* 10794 */ "i32x4.relaxed_trunc_f64x2_s_zero\0"
755 /* 10827 */ "i32x4.trunc_sat_f64x2_s_zero\0"
756 /* 10856 */ "i32x4.relaxed_trunc_f64x2_u_zero\0"
757 /* 10889 */ "i32x4.trunc_sat_f64x2_u_zero\0"
758 /* 10918 */ "nop\0"
759 /* 10922 */ "end_loop\0"
760 /* 10931 */ "drop\0"
761 /* 10936 */ "f64x2.eq\0"
762 /* 10945 */ "i64x2.eq\0"
763 /* 10954 */ "f32x4.eq\0"
764 /* 10963 */ "i32x4.eq\0"
765 /* 10972 */ "i8x16.eq\0"
766 /* 10981 */ "f16x8.eq\0"
767 /* 10990 */ "i16x8.eq\0"
768 /* 10999 */ "v128.or\0"
769 /* 11007 */ "f32.floor\0"
770 /* 11017 */ "f64x2.floor\0"
771 /* 11029 */ "f64.floor\0"
772 /* 11039 */ "f32x4.floor\0"
773 /* 11051 */ "f16x8.floor\0"
774 /* 11063 */ "v128.xor\0"
775 /* 11072 */ "i32.rotr\0"
776 /* 11081 */ "i64.rotr\0"
777 /* 11090 */ "i64.extend32_s\0"
778 /* 11105 */ "i32.trunc_f32_s\0"
779 /* 11121 */ "i64.trunc_f32_s\0"
780 /* 11137 */ "i32.trunc_sat_f32_s\0"
781 /* 11157 */ "i64.trunc_sat_f32_s\0"
782 /* 11177 */ "i64.extend_i32_s\0"
783 /* 11194 */ "f32.convert_i32_s\0"
784 /* 11212 */ "f64.convert_i32_s\0"
785 /* 11230 */ "i32.trunc_f64_s\0"
786 /* 11246 */ "i64.trunc_f64_s\0"
787 /* 11262 */ "i32.trunc_sat_f64_s\0"
788 /* 11282 */ "i64.trunc_sat_f64_s\0"
789 /* 11302 */ "f32.convert_i64_s\0"
790 /* 11320 */ "f64.convert_i64_s\0"
791 /* 11338 */ "i32x4.relaxed_trunc_f32x4_s\0"
792 /* 11366 */ "i32x4.trunc_sat_f32x4_s\0"
793 /* 11390 */ "i64x2.extend_high_i32x4_s\0"
794 /* 11416 */ "i64x2.extmul_high_i32x4_s\0"
795 /* 11442 */ "f32x4.convert_i32x4_s\0"
796 /* 11464 */ "i64x2.extend_low_i32x4_s\0"
797 /* 11489 */ "i64x2.extmul_low_i32x4_s\0"
798 /* 11514 */ "f64x2.convert_low_i32x4_s\0"
799 /* 11540 */ "i16x8.narrow_i32x4_s\0"
800 /* 11561 */ "i32.extend16_s\0"
801 /* 11576 */ "i64.extend16_s\0"
802 /* 11591 */ "i16x8.relaxed_dot_i8x16_i7x16_s\0"
803 /* 11623 */ "i16x8.extadd_pairwise_i8x16_s\0"
804 /* 11653 */ "i16x8.extend_high_i8x16_s\0"
805 /* 11679 */ "i16x8.extmul_high_i8x16_s\0"
806 /* 11705 */ "i16x8.extend_low_i8x16_s\0"
807 /* 11730 */ "i16x8.extmul_low_i8x16_s\0"
808 /* 11755 */ "i32.extend8_s\0"
809 /* 11769 */ "i64.extend8_s\0"
810 /* 11783 */ "i16x8.trunc_sat_f16x8_s\0"
811 /* 11807 */ "i32x4.extadd_pairwise_i16x8_s\0"
812 /* 11837 */ "i32x4.extend_high_i16x8_s\0"
813 /* 11863 */ "i32x4.extmul_high_i16x8_s\0"
814 /* 11889 */ "i32x4.dot_i16x8_s\0"
815 /* 11907 */ "f16x8.convert_i16x8_s\0"
816 /* 11929 */ "i32x4.extend_low_i16x8_s\0"
817 /* 11954 */ "i32x4.extmul_low_i16x8_s\0"
818 /* 11979 */ "i8x16.narrow_i16x8_s\0"
819 /* 12000 */ "i32x4.relaxed_dot_i8x16_i7x16_add_s\0"
820 /* 12036 */ "i32.ge_s\0"
821 /* 12045 */ "i64x2.ge_s\0"
822 /* 12056 */ "i64.ge_s\0"
823 /* 12065 */ "i32x4.ge_s\0"
824 /* 12076 */ "i8x16.ge_s\0"
825 /* 12087 */ "i16x8.ge_s\0"
826 /* 12098 */ "i32.le_s\0"
827 /* 12107 */ "i64x2.le_s\0"
828 /* 12118 */ "i64.le_s\0"
829 /* 12127 */ "i32x4.le_s\0"
830 /* 12138 */ "i8x16.le_s\0"
831 /* 12149 */ "i16x8.le_s\0"
832 /* 12160 */ "i32.rem_s\0"
833 /* 12170 */ "i64.rem_s\0"
834 /* 12180 */ "i32x4.min_s\0"
835 /* 12192 */ "i8x16.min_s\0"
836 /* 12204 */ "i16x8.min_s\0"
837 /* 12216 */ "i32.shr_s\0"
838 /* 12226 */ "i64x2.shr_s\0"
839 /* 12238 */ "i64.shr_s\0"
840 /* 12248 */ "i32x4.shr_s\0"
841 /* 12260 */ "i8x16.shr_s\0"
842 /* 12272 */ "i16x8.shr_s\0"
843 /* 12284 */ "i16x8.relaxed_q15mulr_s\0"
844 /* 12308 */ "i8x16.sub_sat_s\0"
845 /* 12324 */ "i16x8.sub_sat_s\0"
846 /* 12340 */ "i8x16.add_sat_s\0"
847 /* 12356 */ "i16x8.add_sat_s\0"
848 /* 12372 */ "i16x8.q15mulr_sat_s\0"
849 /* 12392 */ "i32.gt_s\0"
850 /* 12401 */ "i64x2.gt_s\0"
851 /* 12412 */ "i64.gt_s\0"
852 /* 12421 */ "i32x4.gt_s\0"
853 /* 12432 */ "i8x16.gt_s\0"
854 /* 12443 */ "i16x8.gt_s\0"
855 /* 12454 */ "i32.lt_s\0"
856 /* 12463 */ "i64x2.lt_s\0"
857 /* 12474 */ "i64.lt_s\0"
858 /* 12483 */ "i32x4.lt_s\0"
859 /* 12494 */ "i8x16.lt_s\0"
860 /* 12505 */ "i16x8.lt_s\0"
861 /* 12516 */ "i32.div_s\0"
862 /* 12526 */ "i64.div_s\0"
863 /* 12536 */ "i32x4.max_s\0"
864 /* 12548 */ "i8x16.max_s\0"
865 /* 12560 */ "i16x8.max_s\0"
866 /* 12572 */ "f64x2.abs\0"
867 /* 12582 */ "i64x2.abs\0"
868 /* 12592 */ "f32x4.abs\0"
869 /* 12602 */ "i32x4.abs\0"
870 /* 12612 */ "i8x16.abs\0"
871 /* 12622 */ "f16x8.abs\0"
872 /* 12632 */ "i16x8.abs\0"
873 /* 12642 */ "return_call_results\0"
874 /* 12662 */ "f64x2.splat\0"
875 /* 12674 */ "i64x2.splat\0"
876 /* 12686 */ "f32x4.splat\0"
877 /* 12698 */ "i32x4.splat\0"
878 /* 12710 */ "i8x16.splat\0"
879 /* 12722 */ "f16x8.splat\0"
880 /* 12734 */ "i16x8.splat\0"
881 /* 12746 */ "f32.select\0"
882 /* 12757 */ "i32.select\0"
883 /* 12768 */ "f64.select\0"
884 /* 12779 */ "i64.select\0"
885 /* 12790 */ "v128.select\0"
886 /* 12802 */ "funcref.select\0"
887 /* 12817 */ "externref.select\0"
888 /* 12834 */ "exnref.select\0"
889 /* 12848 */ "i64x2.relaxed_laneselect\0"
890 /* 12873 */ "i32x4.relaxed_laneselect\0"
891 /* 12898 */ "i8x16.relaxed_laneselect\0"
892 /* 12923 */ "i16x8.relaxed_laneselect\0"
893 /* 12948 */ "v128.bitselect\0"
894 /* 12963 */ "call_indirect\0"
895 /* 12977 */ "catchret\0"
896 /* 12986 */ "cleanupret\0"
897 /* 12997 */ "f64x2.gt\0"
898 /* 13006 */ "f32x4.gt\0"
899 /* 13015 */ "f16x8.gt\0"
900 /* 13024 */ "f64x2.lt\0"
901 /* 13033 */ "f32x4.lt\0"
902 /* 13042 */ "f16x8.lt\0"
903 /* 13051 */ "i32.popcnt\0"
904 /* 13062 */ "i64.popcnt\0"
905 /* 13073 */ "i8x16.popcnt\0"
906 /* 13086 */ "v128.not\0"
907 /* 13095 */ "v128.andnot\0"
908 /* 13107 */ "f32.sqrt\0"
909 /* 13116 */ "f64x2.sqrt\0"
910 /* 13127 */ "f64.sqrt\0"
911 /* 13136 */ "f32x4.sqrt\0"
912 /* 13147 */ "f16x8.sqrt\0"
913 /* 13158 */ "f32.nearest\0"
914 /* 13170 */ "f64x2.nearest\0"
915 /* 13184 */ "f64.nearest\0"
916 /* 13196 */ "f32x4.nearest\0"
917 /* 13210 */ "f16x8.nearest\0"
918 /* 13224 */ "i32.trunc_f32_u\0"
919 /* 13240 */ "i64.trunc_f32_u\0"
920 /* 13256 */ "i32.trunc_sat_f32_u\0"
921 /* 13276 */ "i64.trunc_sat_f32_u\0"
922 /* 13296 */ "i64.extend_i32_u\0"
923 /* 13313 */ "f32.convert_i32_u\0"
924 /* 13331 */ "f64.convert_i32_u\0"
925 /* 13349 */ "i32.trunc_f64_u\0"
926 /* 13365 */ "i64.trunc_f64_u\0"
927 /* 13381 */ "i32.trunc_sat_f64_u\0"
928 /* 13401 */ "i64.trunc_sat_f64_u\0"
929 /* 13421 */ "f32.convert_i64_u\0"
930 /* 13439 */ "f64.convert_i64_u\0"
931 /* 13457 */ "i32x4.relaxed_trunc_f32x4_u\0"
932 /* 13485 */ "i32x4.trunc_sat_f32x4_u\0"
933 /* 13509 */ "i64x2.extend_high_i32x4_u\0"
934 /* 13535 */ "i64x2.extmul_high_i32x4_u\0"
935 /* 13561 */ "f32x4.convert_i32x4_u\0"
936 /* 13583 */ "i64x2.extend_low_i32x4_u\0"
937 /* 13608 */ "i64x2.extmul_low_i32x4_u\0"
938 /* 13633 */ "f64x2.convert_low_i32x4_u\0"
939 /* 13659 */ "i16x8.narrow_i32x4_u\0"
940 /* 13680 */ "i16x8.extadd_pairwise_i8x16_u\0"
941 /* 13710 */ "i16x8.extend_high_i8x16_u\0"
942 /* 13736 */ "i16x8.extmul_high_i8x16_u\0"
943 /* 13762 */ "i16x8.extend_low_i8x16_u\0"
944 /* 13787 */ "i16x8.extmul_low_i8x16_u\0"
945 /* 13812 */ "i16x8.trunc_sat_f16x8_u\0"
946 /* 13836 */ "i32x4.extadd_pairwise_i16x8_u\0"
947 /* 13866 */ "i32x4.extend_high_i16x8_u\0"
948 /* 13892 */ "i32x4.extmul_high_i16x8_u\0"
949 /* 13918 */ "f16x8.convert_i16x8_u\0"
950 /* 13940 */ "i32x4.extend_low_i16x8_u\0"
951 /* 13965 */ "i32x4.extmul_low_i16x8_u\0"
952 /* 13990 */ "i8x16.narrow_i16x8_u\0"
953 /* 14011 */ "i32.ge_u\0"
954 /* 14020 */ "i64.ge_u\0"
955 /* 14029 */ "i32x4.ge_u\0"
956 /* 14040 */ "i8x16.ge_u\0"
957 /* 14051 */ "i16x8.ge_u\0"
958 /* 14062 */ "i32.le_u\0"
959 /* 14071 */ "i64.le_u\0"
960 /* 14080 */ "i32x4.le_u\0"
961 /* 14091 */ "i8x16.le_u\0"
962 /* 14102 */ "i16x8.le_u\0"
963 /* 14113 */ "i32.rem_u\0"
964 /* 14123 */ "i64.rem_u\0"
965 /* 14133 */ "i32x4.min_u\0"
966 /* 14145 */ "i8x16.min_u\0"
967 /* 14157 */ "i16x8.min_u\0"
968 /* 14169 */ "i8x16.avgr_u\0"
969 /* 14182 */ "i16x8.avgr_u\0"
970 /* 14195 */ "i32.shr_u\0"
971 /* 14205 */ "i64x2.shr_u\0"
972 /* 14217 */ "i64.shr_u\0"
973 /* 14227 */ "i32x4.shr_u\0"
974 /* 14239 */ "i8x16.shr_u\0"
975 /* 14251 */ "i16x8.shr_u\0"
976 /* 14263 */ "i8x16.sub_sat_u\0"
977 /* 14279 */ "i16x8.sub_sat_u\0"
978 /* 14295 */ "i8x16.add_sat_u\0"
979 /* 14311 */ "i16x8.add_sat_u\0"
980 /* 14327 */ "i32.gt_u\0"
981 /* 14336 */ "i64.gt_u\0"
982 /* 14345 */ "i32x4.gt_u\0"
983 /* 14356 */ "i8x16.gt_u\0"
984 /* 14367 */ "i16x8.gt_u\0"
985 /* 14378 */ "i32.lt_u\0"
986 /* 14387 */ "i64.lt_u\0"
987 /* 14396 */ "i32x4.lt_u\0"
988 /* 14407 */ "i8x16.lt_u\0"
989 /* 14418 */ "i16x8.lt_u\0"
990 /* 14429 */ "i32.div_u\0"
991 /* 14439 */ "i64.div_u\0"
992 /* 14449 */ "i32x4.max_u\0"
993 /* 14461 */ "i8x16.max_u\0"
994 /* 14473 */ "i16x8.max_u\0"
995 /* 14485 */ "f64x2.div\0"
996 /* 14495 */ "f32x4.div\0"
997 /* 14505 */ "f16x8.div\0"
998 /* 14515 */ "f64x2.max\0"
999 /* 14525 */ "f32x4.max\0"
1000 /* 14535 */ "f16x8.max\0"
1001 /* 14545 */ "f64x2.relaxed_max\0"
1002 /* 14563 */ "f32x4.relaxed_max\0"
1003 /* 14581 */ "f64x2.pmax\0"
1004 /* 14592 */ "f32x4.pmax\0"
1005 /* 14603 */ "f16x8.pmax\0"
1006 /* 14614 */ "local.copy\0"
1007 /* 14625 */ "end_try\0"
1008 /* 14633 */ "i32.eqz\0"
1009 /* 14641 */ "i64.eqz\0"
1010};
1011#ifdef __GNUC__
1012#pragma GCC diagnostic pop
1013#endif
1014
1015 static const uint32_t OpInfo0[] = {
1016 0U, // PHI
1017 0U, // INLINEASM
1018 0U, // INLINEASM_BR
1019 0U, // CFI_INSTRUCTION
1020 0U, // EH_LABEL
1021 0U, // GC_LABEL
1022 0U, // ANNOTATION_LABEL
1023 0U, // KILL
1024 0U, // EXTRACT_SUBREG
1025 0U, // INSERT_SUBREG
1026 0U, // IMPLICIT_DEF
1027 0U, // SUBREG_TO_REG
1028 0U, // COPY_TO_REGCLASS
1029 9549U, // DBG_VALUE
1030 9606U, // DBG_VALUE_LIST
1031 9559U, // DBG_INSTR_REF
1032 9573U, // DBG_PHI
1033 9581U, // DBG_LABEL
1034 0U, // REG_SEQUENCE
1035 0U, // COPY
1036 9542U, // BUNDLE
1037 9591U, // LIFETIME_START
1038 9516U, // LIFETIME_END
1039 9529U, // PSEUDO_PROBE
1040 0U, // ARITH_FENCE
1041 0U, // STACKMAP
1042 10493U, // FENTRY_CALL
1043 0U, // PATCHPOINT
1044 0U, // LOAD_STACK_GUARD
1045 0U, // PREALLOCATED_SETUP
1046 0U, // PREALLOCATED_ARG
1047 0U, // STATEPOINT
1048 0U, // LOCAL_ESCAPE
1049 0U, // FAULTING_OP
1050 0U, // PATCHABLE_OP
1051 9267U, // PATCHABLE_FUNCTION_ENTER
1052 9187U, // PATCHABLE_RET
1053 9313U, // PATCHABLE_FUNCTION_EXIT
1054 9290U, // PATCHABLE_TAIL_CALL
1055 9242U, // PATCHABLE_EVENT_CALL
1056 9218U, // PATCHABLE_TYPED_EVENT_CALL
1057 0U, // ICALL_BRANCH_FUNNEL
1058 0U, // MEMBARRIER
1059 0U, // JUMP_TABLE_DEBUG_INFO
1060 0U, // CONVERGENCECTRL_ENTRY
1061 0U, // CONVERGENCECTRL_ANCHOR
1062 0U, // CONVERGENCECTRL_LOOP
1063 0U, // CONVERGENCECTRL_GLUE
1064 0U, // G_ASSERT_SEXT
1065 0U, // G_ASSERT_ZEXT
1066 0U, // G_ASSERT_ALIGN
1067 0U, // G_ADD
1068 0U, // G_SUB
1069 0U, // G_MUL
1070 0U, // G_SDIV
1071 0U, // G_UDIV
1072 0U, // G_SREM
1073 0U, // G_UREM
1074 0U, // G_SDIVREM
1075 0U, // G_UDIVREM
1076 0U, // G_AND
1077 0U, // G_OR
1078 0U, // G_XOR
1079 0U, // G_IMPLICIT_DEF
1080 0U, // G_PHI
1081 0U, // G_FRAME_INDEX
1082 0U, // G_GLOBAL_VALUE
1083 0U, // G_PTRAUTH_GLOBAL_VALUE
1084 0U, // G_CONSTANT_POOL
1085 0U, // G_EXTRACT
1086 0U, // G_UNMERGE_VALUES
1087 0U, // G_INSERT
1088 0U, // G_MERGE_VALUES
1089 0U, // G_BUILD_VECTOR
1090 0U, // G_BUILD_VECTOR_TRUNC
1091 0U, // G_CONCAT_VECTORS
1092 0U, // G_PTRTOINT
1093 0U, // G_INTTOPTR
1094 0U, // G_BITCAST
1095 0U, // G_FREEZE
1096 0U, // G_CONSTANT_FOLD_BARRIER
1097 0U, // G_INTRINSIC_FPTRUNC_ROUND
1098 0U, // G_INTRINSIC_TRUNC
1099 0U, // G_INTRINSIC_ROUND
1100 0U, // G_INTRINSIC_LRINT
1101 0U, // G_INTRINSIC_LLRINT
1102 0U, // G_INTRINSIC_ROUNDEVEN
1103 0U, // G_READCYCLECOUNTER
1104 0U, // G_READSTEADYCOUNTER
1105 0U, // G_LOAD
1106 0U, // G_SEXTLOAD
1107 0U, // G_ZEXTLOAD
1108 0U, // G_INDEXED_LOAD
1109 0U, // G_INDEXED_SEXTLOAD
1110 0U, // G_INDEXED_ZEXTLOAD
1111 0U, // G_STORE
1112 0U, // G_INDEXED_STORE
1113 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1114 0U, // G_ATOMIC_CMPXCHG
1115 0U, // G_ATOMICRMW_XCHG
1116 0U, // G_ATOMICRMW_ADD
1117 0U, // G_ATOMICRMW_SUB
1118 0U, // G_ATOMICRMW_AND
1119 0U, // G_ATOMICRMW_NAND
1120 0U, // G_ATOMICRMW_OR
1121 0U, // G_ATOMICRMW_XOR
1122 0U, // G_ATOMICRMW_MAX
1123 0U, // G_ATOMICRMW_MIN
1124 0U, // G_ATOMICRMW_UMAX
1125 0U, // G_ATOMICRMW_UMIN
1126 0U, // G_ATOMICRMW_FADD
1127 0U, // G_ATOMICRMW_FSUB
1128 0U, // G_ATOMICRMW_FMAX
1129 0U, // G_ATOMICRMW_FMIN
1130 0U, // G_ATOMICRMW_UINC_WRAP
1131 0U, // G_ATOMICRMW_UDEC_WRAP
1132 0U, // G_FENCE
1133 0U, // G_PREFETCH
1134 0U, // G_BRCOND
1135 0U, // G_BRINDIRECT
1136 0U, // G_INVOKE_REGION_START
1137 0U, // G_INTRINSIC
1138 0U, // G_INTRINSIC_W_SIDE_EFFECTS
1139 0U, // G_INTRINSIC_CONVERGENT
1140 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1141 0U, // G_ANYEXT
1142 0U, // G_TRUNC
1143 0U, // G_CONSTANT
1144 0U, // G_FCONSTANT
1145 0U, // G_VASTART
1146 0U, // G_VAARG
1147 0U, // G_SEXT
1148 0U, // G_SEXT_INREG
1149 0U, // G_ZEXT
1150 0U, // G_SHL
1151 0U, // G_LSHR
1152 0U, // G_ASHR
1153 0U, // G_FSHL
1154 0U, // G_FSHR
1155 0U, // G_ROTR
1156 0U, // G_ROTL
1157 0U, // G_ICMP
1158 0U, // G_FCMP
1159 0U, // G_SCMP
1160 0U, // G_UCMP
1161 0U, // G_SELECT
1162 0U, // G_UADDO
1163 0U, // G_UADDE
1164 0U, // G_USUBO
1165 0U, // G_USUBE
1166 0U, // G_SADDO
1167 0U, // G_SADDE
1168 0U, // G_SSUBO
1169 0U, // G_SSUBE
1170 0U, // G_UMULO
1171 0U, // G_SMULO
1172 0U, // G_UMULH
1173 0U, // G_SMULH
1174 0U, // G_UADDSAT
1175 0U, // G_SADDSAT
1176 0U, // G_USUBSAT
1177 0U, // G_SSUBSAT
1178 0U, // G_USHLSAT
1179 0U, // G_SSHLSAT
1180 0U, // G_SMULFIX
1181 0U, // G_UMULFIX
1182 0U, // G_SMULFIXSAT
1183 0U, // G_UMULFIXSAT
1184 0U, // G_SDIVFIX
1185 0U, // G_UDIVFIX
1186 0U, // G_SDIVFIXSAT
1187 0U, // G_UDIVFIXSAT
1188 0U, // G_FADD
1189 0U, // G_FSUB
1190 0U, // G_FMUL
1191 0U, // G_FMA
1192 0U, // G_FMAD
1193 0U, // G_FDIV
1194 0U, // G_FREM
1195 0U, // G_FPOW
1196 0U, // G_FPOWI
1197 0U, // G_FEXP
1198 0U, // G_FEXP2
1199 0U, // G_FEXP10
1200 0U, // G_FLOG
1201 0U, // G_FLOG2
1202 0U, // G_FLOG10
1203 0U, // G_FLDEXP
1204 0U, // G_FFREXP
1205 0U, // G_FNEG
1206 0U, // G_FPEXT
1207 0U, // G_FPTRUNC
1208 0U, // G_FPTOSI
1209 0U, // G_FPTOUI
1210 0U, // G_SITOFP
1211 0U, // G_UITOFP
1212 0U, // G_FABS
1213 0U, // G_FCOPYSIGN
1214 0U, // G_IS_FPCLASS
1215 0U, // G_FCANONICALIZE
1216 0U, // G_FMINNUM
1217 0U, // G_FMAXNUM
1218 0U, // G_FMINNUM_IEEE
1219 0U, // G_FMAXNUM_IEEE
1220 0U, // G_FMINIMUM
1221 0U, // G_FMAXIMUM
1222 0U, // G_GET_FPENV
1223 0U, // G_SET_FPENV
1224 0U, // G_RESET_FPENV
1225 0U, // G_GET_FPMODE
1226 0U, // G_SET_FPMODE
1227 0U, // G_RESET_FPMODE
1228 0U, // G_PTR_ADD
1229 0U, // G_PTRMASK
1230 0U, // G_SMIN
1231 0U, // G_SMAX
1232 0U, // G_UMIN
1233 0U, // G_UMAX
1234 0U, // G_ABS
1235 0U, // G_LROUND
1236 0U, // G_LLROUND
1237 0U, // G_BR
1238 0U, // G_BRJT
1239 0U, // G_VSCALE
1240 0U, // G_INSERT_SUBVECTOR
1241 0U, // G_EXTRACT_SUBVECTOR
1242 0U, // G_INSERT_VECTOR_ELT
1243 0U, // G_EXTRACT_VECTOR_ELT
1244 0U, // G_SHUFFLE_VECTOR
1245 0U, // G_SPLAT_VECTOR
1246 0U, // G_VECTOR_COMPRESS
1247 0U, // G_CTTZ
1248 0U, // G_CTTZ_ZERO_UNDEF
1249 0U, // G_CTLZ
1250 0U, // G_CTLZ_ZERO_UNDEF
1251 0U, // G_CTPOP
1252 0U, // G_BSWAP
1253 0U, // G_BITREVERSE
1254 0U, // G_FCEIL
1255 0U, // G_FCOS
1256 0U, // G_FSIN
1257 0U, // G_FTAN
1258 0U, // G_FACOS
1259 0U, // G_FASIN
1260 0U, // G_FATAN
1261 0U, // G_FCOSH
1262 0U, // G_FSINH
1263 0U, // G_FTANH
1264 0U, // G_FSQRT
1265 0U, // G_FFLOOR
1266 0U, // G_FRINT
1267 0U, // G_FNEARBYINT
1268 0U, // G_ADDRSPACE_CAST
1269 0U, // G_BLOCK_ADDR
1270 0U, // G_JUMP_TABLE
1271 0U, // G_DYN_STACKALLOC
1272 0U, // G_STACKSAVE
1273 0U, // G_STACKRESTORE
1274 0U, // G_STRICT_FADD
1275 0U, // G_STRICT_FSUB
1276 0U, // G_STRICT_FMUL
1277 0U, // G_STRICT_FDIV
1278 0U, // G_STRICT_FREM
1279 0U, // G_STRICT_FMA
1280 0U, // G_STRICT_FSQRT
1281 0U, // G_STRICT_FLDEXP
1282 0U, // G_READ_REGISTER
1283 0U, // G_WRITE_REGISTER
1284 0U, // G_MEMCPY
1285 0U, // G_MEMCPY_INLINE
1286 0U, // G_MEMMOVE
1287 0U, // G_MEMSET
1288 0U, // G_BZERO
1289 0U, // G_TRAP
1290 0U, // G_DEBUGTRAP
1291 0U, // G_UBSANTRAP
1292 0U, // G_VECREDUCE_SEQ_FADD
1293 0U, // G_VECREDUCE_SEQ_FMUL
1294 0U, // G_VECREDUCE_FADD
1295 0U, // G_VECREDUCE_FMUL
1296 0U, // G_VECREDUCE_FMAX
1297 0U, // G_VECREDUCE_FMIN
1298 0U, // G_VECREDUCE_FMAXIMUM
1299 0U, // G_VECREDUCE_FMINIMUM
1300 0U, // G_VECREDUCE_ADD
1301 0U, // G_VECREDUCE_MUL
1302 0U, // G_VECREDUCE_AND
1303 0U, // G_VECREDUCE_OR
1304 0U, // G_VECREDUCE_XOR
1305 0U, // G_VECREDUCE_SMAX
1306 0U, // G_VECREDUCE_SMIN
1307 0U, // G_VECREDUCE_UMAX
1308 0U, // G_VECREDUCE_UMIN
1309 0U, // G_SBFX
1310 0U, // G_UBFX
1311 21639U, // CALL_PARAMS
1312 21639U, // CALL_PARAMS_S
1313 12650U, // CALL_RESULTS
1314 12650U, // CALL_RESULTS_S
1315 12978U, // CATCHRET
1316 12978U, // CATCHRET_S
1317 12987U, // CLEANUPRET
1318 12987U, // CLEANUPRET_S
1319 9974U, // COMPILER_FENCE
1320 9974U, // COMPILER_FENCE_S
1321 12643U, // RET_CALL_RESULTS
1322 12643U, // RET_CALL_RESULTS_S
1323 152689U, // ABS_F16x8
1324 12623U, // ABS_F16x8_S
1325 148009U, // ABS_F32
1326 9097U, // ABS_F32_S
1327 152656U, // ABS_F32x4
1328 12593U, // ABS_F32x4_S
1329 148019U, // ABS_F64
1330 9106U, // ABS_F64_S
1331 152634U, // ABS_F64x2
1332 12573U, // ABS_F64x2_S
1333 152700U, // ABS_I16x8
1334 12633U, // ABS_I16x8_S
1335 152667U, // ABS_I32x4
1336 12603U, // ABS_I32x4_S
1337 152645U, // ABS_I64x2
1338 12583U, // ABS_I64x2_S
1339 152678U, // ABS_I8x16
1340 12613U, // ABS_I8x16_S
1341 4343164U, // ADD_F16x8
1342 9811U, // ADD_F16x8_S
1343 4342122U, // ADD_F32
1344 8935U, // ADD_F32_S
1345 4343131U, // ADD_F32x4
1346 9781U, // ADD_F32x4_S
1347 4342142U, // ADD_F64
1348 8953U, // ADD_F64_S
1349 4343109U, // ADD_F64x2
1350 9761U, // ADD_F64x2_S
1351 4343175U, // ADD_I16x8
1352 9821U, // ADD_I16x8_S
1353 4342132U, // ADD_I32
1354 8944U, // ADD_I32_S
1355 4343142U, // ADD_I32x4
1356 9791U, // ADD_I32x4_S
1357 4342152U, // ADD_I64
1358 8962U, // ADD_I64_S
1359 4343120U, // ADD_I64x2
1360 9771U, // ADD_I64x2_S
1361 4343153U, // ADD_I8x16
1362 9801U, // ADD_I8x16_S
1363 4346703U, // ADD_SAT_S_I16x8
1364 12357U, // ADD_SAT_S_I16x8_S
1365 4346686U, // ADD_SAT_S_I8x16
1366 12341U, // ADD_SAT_S_I8x16_S
1367 4350093U, // ADD_SAT_U_I16x8
1368 14312U, // ADD_SAT_U_I16x8_S
1369 4350076U, // ADD_SAT_U_I8x16
1370 14296U, // ADD_SAT_U_I8x16_S
1371 0U, // ADJCALLSTACKDOWN
1372 0U, // ADJCALLSTACKDOWN_S
1373 0U, // ADJCALLSTACKUP
1374 0U, // ADJCALLSTACKUP_S
1375 149795U, // ALLTRUE_I16x8
1376 10214U, // ALLTRUE_I16x8_S
1377 149763U, // ALLTRUE_I32x4
1378 10184U, // ALLTRUE_I32x4_S
1379 149747U, // ALLTRUE_I64x2
1380 10169U, // ALLTRUE_I64x2_S
1381 149779U, // ALLTRUE_I8x16
1382 10199U, // ALLTRUE_I8x16_S
1383 4343349U, // AND
1384 4347635U, // ANDNOT
1385 13096U, // ANDNOT_S
1386 4342162U, // AND_I32
1387 8971U, // AND_I32_S
1388 4342172U, // AND_I64
1389 8980U, // AND_I64_S
1390 9948U, // AND_S
1391 149811U, // ANYTRUE
1392 10229U, // ANYTRUE_S
1393 0U, // ARGUMENT_exnref
1394 0U, // ARGUMENT_exnref_S
1395 0U, // ARGUMENT_externref
1396 0U, // ARGUMENT_externref_S
1397 0U, // ARGUMENT_f32
1398 0U, // ARGUMENT_f32_S
1399 0U, // ARGUMENT_f64
1400 0U, // ARGUMENT_f64_S
1401 0U, // ARGUMENT_funcref
1402 0U, // ARGUMENT_funcref_S
1403 0U, // ARGUMENT_i32
1404 0U, // ARGUMENT_i32_S
1405 0U, // ARGUMENT_i64
1406 0U, // ARGUMENT_i64_S
1407 0U, // ARGUMENT_v16i8
1408 0U, // ARGUMENT_v16i8_S
1409 0U, // ARGUMENT_v2f64
1410 0U, // ARGUMENT_v2f64_S
1411 0U, // ARGUMENT_v2i64
1412 0U, // ARGUMENT_v2i64_S
1413 0U, // ARGUMENT_v4f32
1414 0U, // ARGUMENT_v4f32_S
1415 0U, // ARGUMENT_v4i32
1416 0U, // ARGUMENT_v4i32_S
1417 0U, // ARGUMENT_v8f16
1418 0U, // ARGUMENT_v8f16_S
1419 0U, // ARGUMENT_v8i16
1420 0U, // ARGUMENT_v8i16_S
1421 9961U, // ATOMIC_FENCE
1422 9961U, // ATOMIC_FENCE_S
1423 25844216U, // ATOMIC_LOAD16_U_I32_A32
1424 1350136U, // ATOMIC_LOAD16_U_I32_A32_S
1425 25844216U, // ATOMIC_LOAD16_U_I32_A64
1426 1350136U, // ATOMIC_LOAD16_U_I32_A64_S
1427 25844237U, // ATOMIC_LOAD16_U_I64_A32
1428 1350157U, // ATOMIC_LOAD16_U_I64_A32_S
1429 25844237U, // ATOMIC_LOAD16_U_I64_A64
1430 1350157U, // ATOMIC_LOAD16_U_I64_A64_S
1431 25843653U, // ATOMIC_LOAD32_U_I64_A32
1432 1349573U, // ATOMIC_LOAD32_U_I64_A32_S
1433 25843653U, // ATOMIC_LOAD32_U_I64_A64
1434 1349573U, // ATOMIC_LOAD32_U_I64_A64_S
1435 25844421U, // ATOMIC_LOAD8_U_I32_A32
1436 1350341U, // ATOMIC_LOAD8_U_I32_A32_S
1437 25844421U, // ATOMIC_LOAD8_U_I32_A64
1438 1350341U, // ATOMIC_LOAD8_U_I32_A64_S
1439 25844441U, // ATOMIC_LOAD8_U_I64_A32
1440 1350361U, // ATOMIC_LOAD8_U_I64_A32_S
1441 25844441U, // ATOMIC_LOAD8_U_I64_A64
1442 1350361U, // ATOMIC_LOAD8_U_I64_A64_S
1443 25838883U, // ATOMIC_LOAD_I32_A32
1444 1344803U, // ATOMIC_LOAD_I32_A32_S
1445 25838883U, // ATOMIC_LOAD_I32_A64
1446 1344803U, // ATOMIC_LOAD_I32_A64_S
1447 25838900U, // ATOMIC_LOAD_I64_A32
1448 1344820U, // ATOMIC_LOAD_I64_A32_S
1449 25838900U, // ATOMIC_LOAD_I64_A64
1450 1344820U, // ATOMIC_LOAD_I64_A64_S
1451 92953691U, // ATOMIC_RMW16_U_ADD_I32_A32
1452 1350747U, // ATOMIC_RMW16_U_ADD_I32_A32_S
1453 92953691U, // ATOMIC_RMW16_U_ADD_I32_A64
1454 1350747U, // ATOMIC_RMW16_U_ADD_I32_A64_S
1455 92953715U, // ATOMIC_RMW16_U_ADD_I64_A32
1456 1350771U, // ATOMIC_RMW16_U_ADD_I64_A32_S
1457 92953715U, // ATOMIC_RMW16_U_ADD_I64_A64
1458 1350771U, // ATOMIC_RMW16_U_ADD_I64_A64_S
1459 92953809U, // ATOMIC_RMW16_U_AND_I32_A32
1460 1350865U, // ATOMIC_RMW16_U_AND_I32_A32_S
1461 92953809U, // ATOMIC_RMW16_U_AND_I32_A64
1462 1350865U, // ATOMIC_RMW16_U_AND_I32_A64_S
1463 92953833U, // ATOMIC_RMW16_U_AND_I64_A32
1464 1350889U, // ATOMIC_RMW16_U_AND_I64_A32_S
1465 92953833U, // ATOMIC_RMW16_U_AND_I64_A64
1466 1350889U, // ATOMIC_RMW16_U_AND_I64_A64_S
1467 227171938U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32
1468 1351266U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32_S
1469 227171938U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64
1470 1351266U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64_S
1471 227171966U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32
1472 1351294U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32_S
1473 227171966U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64
1474 1351294U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64_S
1475 92954506U, // ATOMIC_RMW16_U_OR_I32_A32
1476 1351562U, // ATOMIC_RMW16_U_OR_I32_A32_S
1477 92954506U, // ATOMIC_RMW16_U_OR_I32_A64
1478 1351562U, // ATOMIC_RMW16_U_OR_I32_A64_S
1479 92954529U, // ATOMIC_RMW16_U_OR_I64_A32
1480 1351585U, // ATOMIC_RMW16_U_OR_I64_A32_S
1481 92954529U, // ATOMIC_RMW16_U_OR_I64_A64
1482 1351585U, // ATOMIC_RMW16_U_OR_I64_A64_S
1483 92953573U, // ATOMIC_RMW16_U_SUB_I32_A32
1484 1350629U, // ATOMIC_RMW16_U_SUB_I32_A32_S
1485 92953573U, // ATOMIC_RMW16_U_SUB_I32_A64
1486 1350629U, // ATOMIC_RMW16_U_SUB_I32_A64_S
1487 92953597U, // ATOMIC_RMW16_U_SUB_I64_A32
1488 1350653U, // ATOMIC_RMW16_U_SUB_I64_A32_S
1489 92953597U, // ATOMIC_RMW16_U_SUB_I64_A64
1490 1350653U, // ATOMIC_RMW16_U_SUB_I64_A64_S
1491 92954084U, // ATOMIC_RMW16_U_XCHG_I32_A32
1492 1351140U, // ATOMIC_RMW16_U_XCHG_I32_A32_S
1493 92954084U, // ATOMIC_RMW16_U_XCHG_I32_A64
1494 1351140U, // ATOMIC_RMW16_U_XCHG_I32_A64_S
1495 92954109U, // ATOMIC_RMW16_U_XCHG_I64_A32
1496 1351165U, // ATOMIC_RMW16_U_XCHG_I64_A32_S
1497 92954109U, // ATOMIC_RMW16_U_XCHG_I64_A64
1498 1351165U, // ATOMIC_RMW16_U_XCHG_I64_A64_S
1499 92954620U, // ATOMIC_RMW16_U_XOR_I32_A32
1500 1351676U, // ATOMIC_RMW16_U_XOR_I32_A32_S
1501 92954620U, // ATOMIC_RMW16_U_XOR_I32_A64
1502 1351676U, // ATOMIC_RMW16_U_XOR_I32_A64_S
1503 92954644U, // ATOMIC_RMW16_U_XOR_I64_A32
1504 1351700U, // ATOMIC_RMW16_U_XOR_I64_A32_S
1505 92954644U, // ATOMIC_RMW16_U_XOR_I64_A64
1506 1351700U, // ATOMIC_RMW16_U_XOR_I64_A64_S
1507 92953667U, // ATOMIC_RMW32_U_ADD_I64_A32
1508 1350723U, // ATOMIC_RMW32_U_ADD_I64_A32_S
1509 92953667U, // ATOMIC_RMW32_U_ADD_I64_A64
1510 1350723U, // ATOMIC_RMW32_U_ADD_I64_A64_S
1511 92953785U, // ATOMIC_RMW32_U_AND_I64_A32
1512 1350841U, // ATOMIC_RMW32_U_AND_I64_A32_S
1513 92953785U, // ATOMIC_RMW32_U_AND_I64_A64
1514 1350841U, // ATOMIC_RMW32_U_AND_I64_A64_S
1515 227171910U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32
1516 1351238U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32_S
1517 227171910U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64
1518 1351238U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64_S
1519 92954483U, // ATOMIC_RMW32_U_OR_I64_A32
1520 1351539U, // ATOMIC_RMW32_U_OR_I64_A32_S
1521 92954483U, // ATOMIC_RMW32_U_OR_I64_A64
1522 1351539U, // ATOMIC_RMW32_U_OR_I64_A64_S
1523 92953549U, // ATOMIC_RMW32_U_SUB_I64_A32
1524 1350605U, // ATOMIC_RMW32_U_SUB_I64_A32_S
1525 92953549U, // ATOMIC_RMW32_U_SUB_I64_A64
1526 1350605U, // ATOMIC_RMW32_U_SUB_I64_A64_S
1527 92954059U, // ATOMIC_RMW32_U_XCHG_I64_A32
1528 1351115U, // ATOMIC_RMW32_U_XCHG_I64_A32_S
1529 92954059U, // ATOMIC_RMW32_U_XCHG_I64_A64
1530 1351115U, // ATOMIC_RMW32_U_XCHG_I64_A64_S
1531 92954596U, // ATOMIC_RMW32_U_XOR_I64_A32
1532 1351652U, // ATOMIC_RMW32_U_XOR_I64_A32_S
1533 92954596U, // ATOMIC_RMW32_U_XOR_I64_A64
1534 1351652U, // ATOMIC_RMW32_U_XOR_I64_A64_S
1535 92953739U, // ATOMIC_RMW8_U_ADD_I32_A32
1536 1350795U, // ATOMIC_RMW8_U_ADD_I32_A32_S
1537 92953739U, // ATOMIC_RMW8_U_ADD_I32_A64
1538 1350795U, // ATOMIC_RMW8_U_ADD_I32_A64_S
1539 92953762U, // ATOMIC_RMW8_U_ADD_I64_A32
1540 1350818U, // ATOMIC_RMW8_U_ADD_I64_A32_S
1541 92953762U, // ATOMIC_RMW8_U_ADD_I64_A64
1542 1350818U, // ATOMIC_RMW8_U_ADD_I64_A64_S
1543 92953857U, // ATOMIC_RMW8_U_AND_I32_A32
1544 1350913U, // ATOMIC_RMW8_U_AND_I32_A32_S
1545 92953857U, // ATOMIC_RMW8_U_AND_I32_A64
1546 1350913U, // ATOMIC_RMW8_U_AND_I32_A64_S
1547 92953880U, // ATOMIC_RMW8_U_AND_I64_A32
1548 1350936U, // ATOMIC_RMW8_U_AND_I64_A32_S
1549 92953880U, // ATOMIC_RMW8_U_AND_I64_A64
1550 1350936U, // ATOMIC_RMW8_U_AND_I64_A64_S
1551 227171994U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32
1552 1351322U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32_S
1553 227171994U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64
1554 1351322U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64_S
1555 227172021U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32
1556 1351349U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32_S
1557 227172021U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64
1558 1351349U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64_S
1559 92954552U, // ATOMIC_RMW8_U_OR_I32_A32
1560 1351608U, // ATOMIC_RMW8_U_OR_I32_A32_S
1561 92954552U, // ATOMIC_RMW8_U_OR_I32_A64
1562 1351608U, // ATOMIC_RMW8_U_OR_I32_A64_S
1563 92954574U, // ATOMIC_RMW8_U_OR_I64_A32
1564 1351630U, // ATOMIC_RMW8_U_OR_I64_A32_S
1565 92954574U, // ATOMIC_RMW8_U_OR_I64_A64
1566 1351630U, // ATOMIC_RMW8_U_OR_I64_A64_S
1567 92953621U, // ATOMIC_RMW8_U_SUB_I32_A32
1568 1350677U, // ATOMIC_RMW8_U_SUB_I32_A32_S
1569 92953621U, // ATOMIC_RMW8_U_SUB_I32_A64
1570 1350677U, // ATOMIC_RMW8_U_SUB_I32_A64_S
1571 92953644U, // ATOMIC_RMW8_U_SUB_I64_A32
1572 1350700U, // ATOMIC_RMW8_U_SUB_I64_A32_S
1573 92953644U, // ATOMIC_RMW8_U_SUB_I64_A64
1574 1350700U, // ATOMIC_RMW8_U_SUB_I64_A64_S
1575 92954134U, // ATOMIC_RMW8_U_XCHG_I32_A32
1576 1351190U, // ATOMIC_RMW8_U_XCHG_I32_A32_S
1577 92954134U, // ATOMIC_RMW8_U_XCHG_I32_A64
1578 1351190U, // ATOMIC_RMW8_U_XCHG_I32_A64_S
1579 92954158U, // ATOMIC_RMW8_U_XCHG_I64_A32
1580 1351214U, // ATOMIC_RMW8_U_XCHG_I64_A32_S
1581 92954158U, // ATOMIC_RMW8_U_XCHG_I64_A64
1582 1351214U, // ATOMIC_RMW8_U_XCHG_I64_A64_S
1583 92954668U, // ATOMIC_RMW8_U_XOR_I32_A32
1584 1351724U, // ATOMIC_RMW8_U_XOR_I32_A32_S
1585 92954668U, // ATOMIC_RMW8_U_XOR_I32_A64
1586 1351724U, // ATOMIC_RMW8_U_XOR_I32_A64_S
1587 92954691U, // ATOMIC_RMW8_U_XOR_I64_A32
1588 1351747U, // ATOMIC_RMW8_U_XOR_I64_A32_S
1589 92954691U, // ATOMIC_RMW8_U_XOR_I64_A64
1590 1351747U, // ATOMIC_RMW8_U_XOR_I64_A64_S
1591 92947858U, // ATOMIC_RMW_ADD_I32_A32
1592 1344914U, // ATOMIC_RMW_ADD_I32_A32_S
1593 92947858U, // ATOMIC_RMW_ADD_I32_A64
1594 1344914U, // ATOMIC_RMW_ADD_I32_A64_S
1595 92947878U, // ATOMIC_RMW_ADD_I64_A32
1596 1344934U, // ATOMIC_RMW_ADD_I64_A32_S
1597 92947878U, // ATOMIC_RMW_ADD_I64_A64
1598 1344934U, // ATOMIC_RMW_ADD_I64_A64_S
1599 92948031U, // ATOMIC_RMW_AND_I32_A32
1600 1345087U, // ATOMIC_RMW_AND_I32_A32_S
1601 92948031U, // ATOMIC_RMW_AND_I32_A64
1602 1345087U, // ATOMIC_RMW_AND_I32_A64_S
1603 92948051U, // ATOMIC_RMW_AND_I64_A32
1604 1345107U, // ATOMIC_RMW_AND_I64_A32_S
1605 92948051U, // ATOMIC_RMW_AND_I64_A64
1606 1345107U, // ATOMIC_RMW_AND_I64_A64_S
1607 227166674U, // ATOMIC_RMW_CMPXCHG_I32_A32
1608 1346002U, // ATOMIC_RMW_CMPXCHG_I32_A32_S
1609 227166674U, // ATOMIC_RMW_CMPXCHG_I32_A64
1610 1346002U, // ATOMIC_RMW_CMPXCHG_I32_A64_S
1611 227166698U, // ATOMIC_RMW_CMPXCHG_I64_A32
1612 1346026U, // ATOMIC_RMW_CMPXCHG_I64_A32_S
1613 227166698U, // ATOMIC_RMW_CMPXCHG_I64_A64
1614 1346026U, // ATOMIC_RMW_CMPXCHG_I64_A64_S
1615 92949705U, // ATOMIC_RMW_OR_I32_A32
1616 1346761U, // ATOMIC_RMW_OR_I32_A32_S
1617 92949705U, // ATOMIC_RMW_OR_I32_A64
1618 1346761U, // ATOMIC_RMW_OR_I32_A64_S
1619 92949724U, // ATOMIC_RMW_OR_I64_A32
1620 1346780U, // ATOMIC_RMW_OR_I64_A32_S
1621 92949724U, // ATOMIC_RMW_OR_I64_A64
1622 1346780U, // ATOMIC_RMW_OR_I64_A64_S
1623 92947595U, // ATOMIC_RMW_SUB_I32_A32
1624 1344651U, // ATOMIC_RMW_SUB_I32_A32_S
1625 92947595U, // ATOMIC_RMW_SUB_I32_A64
1626 1344651U, // ATOMIC_RMW_SUB_I32_A64_S
1627 92947615U, // ATOMIC_RMW_SUB_I64_A32
1628 1344671U, // ATOMIC_RMW_SUB_I64_A32_S
1629 92947615U, // ATOMIC_RMW_SUB_I64_A64
1630 1344671U, // ATOMIC_RMW_SUB_I64_A64_S
1631 92948904U, // ATOMIC_RMW_XCHG_I32_A32
1632 1345960U, // ATOMIC_RMW_XCHG_I32_A32_S
1633 92948904U, // ATOMIC_RMW_XCHG_I32_A64
1634 1345960U, // ATOMIC_RMW_XCHG_I32_A64_S
1635 92948925U, // ATOMIC_RMW_XCHG_I64_A32
1636 1345981U, // ATOMIC_RMW_XCHG_I64_A32_S
1637 92948925U, // ATOMIC_RMW_XCHG_I64_A64
1638 1345981U, // ATOMIC_RMW_XCHG_I64_A64_S
1639 92949814U, // ATOMIC_RMW_XOR_I32_A32
1640 1346870U, // ATOMIC_RMW_XOR_I32_A32_S
1641 92949814U, // ATOMIC_RMW_XOR_I32_A64
1642 1346870U, // ATOMIC_RMW_XOR_I32_A64_S
1643 92949834U, // ATOMIC_RMW_XOR_I64_A32
1644 1346890U, // ATOMIC_RMW_XOR_I64_A32_S
1645 92949834U, // ATOMIC_RMW_XOR_I64_A64
1646 1346890U, // ATOMIC_RMW_XOR_I64_A64_S
1647 13534139U, // ATOMIC_STORE16_I32_A32
1648 1344443U, // ATOMIC_STORE16_I32_A32_S
1649 13534139U, // ATOMIC_STORE16_I32_A64
1650 1344443U, // ATOMIC_STORE16_I32_A64_S
1651 13534159U, // ATOMIC_STORE16_I64_A32
1652 1344463U, // ATOMIC_STORE16_I64_A32_S
1653 13534159U, // ATOMIC_STORE16_I64_A64
1654 1344463U, // ATOMIC_STORE16_I64_A64_S
1655 13533903U, // ATOMIC_STORE32_I64_A32
1656 1344207U, // ATOMIC_STORE32_I64_A32_S
1657 13533903U, // ATOMIC_STORE32_I64_A64
1658 1344207U, // ATOMIC_STORE32_I64_A64_S
1659 13534232U, // ATOMIC_STORE8_I32_A32
1660 1344536U, // ATOMIC_STORE8_I32_A32_S
1661 13534232U, // ATOMIC_STORE8_I32_A64
1662 1344536U, // ATOMIC_STORE8_I32_A64_S
1663 13534251U, // ATOMIC_STORE8_I64_A32
1664 1344555U, // ATOMIC_STORE8_I64_A32_S
1665 13534251U, // ATOMIC_STORE8_I64_A64
1666 1344555U, // ATOMIC_STORE8_I64_A64_S
1667 13535439U, // ATOMIC_STORE_I32_A32
1668 1345743U, // ATOMIC_STORE_I32_A32_S
1669 13535439U, // ATOMIC_STORE_I32_A64
1670 1345743U, // ATOMIC_STORE_I32_A64_S
1671 13535457U, // ATOMIC_STORE_I64_A32
1672 1345761U, // ATOMIC_STORE_I64_A32_S
1673 13535457U, // ATOMIC_STORE_I64_A64
1674 1345761U, // ATOMIC_STORE_I64_A64_S
1675 4349723U, // AVGR_U_I16x8
1676 14183U, // AVGR_U_I16x8_S
1677 4349709U, // AVGR_U_I8x16
1678 14170U, // AVGR_U_I8x16_S
1679 150063U, // BITMASK_I16x8
1680 10378U, // BITMASK_I16x8_S
1681 150033U, // BITMASK_I32x4
1682 10350U, // BITMASK_I32x4_S
1683 150018U, // BITMASK_I64x2
1684 10336U, // BITMASK_I64x2_S
1685 150048U, // BITMASK_I8x16
1686 10364U, // BITMASK_I8x16_S
1687 37901840U, // BITSELECT
1688 12949U, // BITSELECT_S
1689 49228U, // BLOCK
1690 49228U, // BLOCK_S
1691 16385U, // BR
1692 147512U, // BR_IF
1693 16440U, // BR_IF_S
1694 16385U, // BR_S
1695 16806U, // BR_TABLE_I32
1696 65958U, // BR_TABLE_I32_S
1697 16806U, // BR_TABLE_I64
1698 65958U, // BR_TABLE_I64_S
1699 0U, // BR_UNLESS
1700 0U, // BR_UNLESS_S
1701 10502U, // CALL
1702 12964U, // CALL_INDIRECT
1703 153127U, // CALL_INDIRECT_S
1704 19113U, // CALL_S
1705 10320U, // CATCH
1706 10483U, // CATCH_ALL
1707 10483U, // CATCH_ALL_S
1708 16450U, // CATCH_S
1709 150166U, // CEIL_F16x8
1710 10472U, // CEIL_F16x8_S
1711 150122U, // CEIL_F32
1712 10432U, // CEIL_F32_S
1713 150154U, // CEIL_F32x4
1714 10461U, // CEIL_F32x4_S
1715 150144U, // CEIL_F64
1716 10452U, // CEIL_F64_S
1717 150132U, // CEIL_F64x2
1718 10441U, // CEIL_F64x2_S
1719 148102U, // CLZ_I32
1720 9151U, // CLZ_I32_S
1721 148112U, // CLZ_I64
1722 9160U, // CLZ_I64_S
1723 153471U, // CONST_F32
1724 22399U, // CONST_F32_S
1725 153493U, // CONST_F64
1726 22421U, // CONST_F64_S
1727 153482U, // CONST_I32
1728 22410U, // CONST_I32_S
1729 153504U, // CONST_I64
1730 22432U, // CONST_I64_S
1731 105011115U, // CONST_V128_F32x4
1732 37902251U, // CONST_V128_F32x4_S
1733 4347819U, // CONST_V128_F64x2
1734 153515U, // CONST_V128_F64x2_S
1735 507664299U, // CONST_V128_I16x8
1736 1044535211U, // CONST_V128_I16x8_S
1737 105011115U, // CONST_V128_I32x4
1738 37902251U, // CONST_V128_I32x4_S
1739 4347819U, // CONST_V128_I64x2
1740 153515U, // CONST_V128_I64x2_S
1741 1581406123U, // CONST_V128_I8x16
1742 3728889771U, // CONST_V128_I8x16_S
1743 4344619U, // COPYSIGN_F32
1744 10597U, // COPYSIGN_F32_S
1745 4344633U, // COPYSIGN_F64
1746 10610U, // COPYSIGN_F64_S
1747 156156U, // COPY_EXNREF
1748 14615U, // COPY_EXNREF_S
1749 156156U, // COPY_EXTERNREF
1750 14615U, // COPY_EXTERNREF_S
1751 156156U, // COPY_F32
1752 14615U, // COPY_F32_S
1753 156156U, // COPY_F64
1754 14615U, // COPY_F64_S
1755 156156U, // COPY_FUNCREF
1756 14615U, // COPY_FUNCREF_S
1757 156156U, // COPY_I32
1758 14615U, // COPY_I32_S
1759 156156U, // COPY_I64
1760 14615U, // COPY_I64_S
1761 156156U, // COPY_V128
1762 14615U, // COPY_V128_S
1763 148142U, // CTZ_I32
1764 9169U, // CTZ_I32_S
1765 148152U, // CTZ_I64
1766 9178U, // CTZ_I64_S
1767 10053U, // DEBUG_UNREACHABLE
1768 10053U, // DEBUG_UNREACHABLE_S
1769 25109U, // DELEGATE
1770 25109U, // DELEGATE_S
1771 4350305U, // DIV_F16x8
1772 14506U, // DIV_F16x8_S
1773 4342333U, // DIV_F32
1774 9115U, // DIV_F32_S
1775 4350294U, // DIV_F32x4
1776 14496U, // DIV_F32x4_S
1777 4342343U, // DIV_F64
1778 9124U, // DIV_F64_S
1779 4350283U, // DIV_F64x2
1780 14486U, // DIV_F64x2_S
1781 4346877U, // DIV_S_I32
1782 12517U, // DIV_S_I32_S
1783 4346888U, // DIV_S_I64
1784 12527U, // DIV_S_I64_S
1785 4350222U, // DIV_U_I32
1786 14430U, // DIV_U_I32_S
1787 4350233U, // DIV_U_I64
1788 14440U, // DIV_U_I64_S
1789 4346142U, // DOT
1790 11890U, // DOT_S
1791 19572U, // DROP_EXNREF
1792 10932U, // DROP_EXNREF_S
1793 19572U, // DROP_EXTERNREF
1794 10932U, // DROP_EXTERNREF_S
1795 19572U, // DROP_F32
1796 10932U, // DROP_F32_S
1797 19572U, // DROP_F64
1798 10932U, // DROP_F64_S
1799 19572U, // DROP_FUNCREF
1800 10932U, // DROP_FUNCREF_S
1801 19572U, // DROP_I32
1802 10932U, // DROP_I32_S
1803 19572U, // DROP_I64
1804 10932U, // DROP_I64_S
1805 19572U, // DROP_V128
1806 10932U, // DROP_V128_S
1807 10164U, // ELSE
1808 10164U, // ELSE_S
1809 9957U, // END
1810 10326U, // END_BLOCK
1811 10326U, // END_BLOCK_S
1812 10722U, // END_FUNCTION
1813 10722U, // END_FUNCTION_S
1814 10243U, // END_IF
1815 10243U, // END_IF_S
1816 10923U, // END_LOOP
1817 10923U, // END_LOOP_S
1818 9957U, // END_S
1819 14626U, // END_TRY
1820 14626U, // END_TRY_S
1821 148122U, // EQZ_I32
1822 14634U, // EQZ_I32_S
1823 148132U, // EQZ_I64
1824 14642U, // EQZ_I64_S
1825 4345004U, // EQ_F16x8
1826 10982U, // EQ_F16x8_S
1827 4341936U, // EQ_F32
1828 8809U, // EQ_F32_S
1829 4344974U, // EQ_F32x4
1830 10955U, // EQ_F32x4_S
1831 4341956U, // EQ_F64
1832 8827U, // EQ_F64_S
1833 4344954U, // EQ_F64x2
1834 10937U, // EQ_F64x2_S
1835 4345014U, // EQ_I16x8
1836 10991U, // EQ_I16x8_S
1837 4341946U, // EQ_I32
1838 8818U, // EQ_I32_S
1839 4344984U, // EQ_I32x4
1840 10964U, // EQ_I32x4_S
1841 4341966U, // EQ_I64
1842 8836U, // EQ_I64_S
1843 4344964U, // EQ_I64x2
1844 10946U, // EQ_I64x2_S
1845 4344994U, // EQ_I8x16
1846 10973U, // EQ_I8x16_S
1847 4345897U, // EXTMUL_HIGH_S_I16x8
1848 11680U, // EXTMUL_HIGH_S_I16x8_S
1849 4346115U, // EXTMUL_HIGH_S_I32x4
1850 11864U, // EXTMUL_HIGH_S_I32x4_S
1851 4345577U, // EXTMUL_HIGH_S_I64x2
1852 11417U, // EXTMUL_HIGH_S_I64x2_S
1853 4348508U, // EXTMUL_HIGH_U_I16x8
1854 13737U, // EXTMUL_HIGH_U_I16x8_S
1855 4348736U, // EXTMUL_HIGH_U_I32x4
1856 13893U, // EXTMUL_HIGH_U_I32x4_S
1857 4348211U, // EXTMUL_HIGH_U_I64x2
1858 13536U, // EXTMUL_HIGH_U_I64x2_S
1859 4345950U, // EXTMUL_LOW_S_I16x8
1860 11731U, // EXTMUL_LOW_S_I16x8_S
1861 4346210U, // EXTMUL_LOW_S_I32x4
1862 11955U, // EXTMUL_LOW_S_I32x4_S
1863 4345653U, // EXTMUL_LOW_S_I64x2
1864 11490U, // EXTMUL_LOW_S_I64x2_S
1865 4348561U, // EXTMUL_LOW_U_I16x8
1866 13788U, // EXTMUL_LOW_U_I16x8_S
1867 4348812U, // EXTMUL_LOW_U_I32x4
1868 13966U, // EXTMUL_LOW_U_I32x4_S
1869 4348287U, // EXTMUL_LOW_U_I64x2
1870 13609U, // EXTMUL_LOW_U_I64x2_S
1871 4343939U, // EXTRACT_LANE_F16x8
1872 18563U, // EXTRACT_LANE_F16x8_S
1873 4343899U, // EXTRACT_LANE_F32x4
1874 18523U, // EXTRACT_LANE_F32x4_S
1875 4343859U, // EXTRACT_LANE_F64x2
1876 18483U, // EXTRACT_LANE_F64x2_S
1877 4346470U, // EXTRACT_LANE_I16x8_s
1878 21094U, // EXTRACT_LANE_I16x8_s_S
1879 4349365U, // EXTRACT_LANE_I16x8_u
1880 23989U, // EXTRACT_LANE_I16x8_u_S
1881 4343919U, // EXTRACT_LANE_I32x4
1882 18543U, // EXTRACT_LANE_I32x4_S
1883 4343879U, // EXTRACT_LANE_I64x2
1884 18503U, // EXTRACT_LANE_I64x2_S
1885 4346448U, // EXTRACT_LANE_I8x16_s
1886 21072U, // EXTRACT_LANE_I8x16_s_S
1887 4349343U, // EXTRACT_LANE_I8x16_u
1888 23967U, // EXTRACT_LANE_I8x16_u_S
1889 151022U, // F32_CONVERT_S_I32
1890 11195U, // F32_CONVERT_S_I32_S
1891 151154U, // F32_CONVERT_S_I64
1892 11303U, // F32_CONVERT_S_I64_S
1893 153656U, // F32_CONVERT_U_I32
1894 13314U, // F32_CONVERT_U_I32_S
1895 153788U, // F32_CONVERT_U_I64
1896 13422U, // F32_CONVERT_U_I64_S
1897 148288U, // F32_DEMOTE_F64
1898 9424U, // F32_DEMOTE_F64_S
1899 148267U, // F32_REINTERPRET_I32
1900 9404U, // F32_REINTERPRET_I32_S
1901 151041U, // F64_CONVERT_S_I32
1902 11213U, // F64_CONVERT_S_I32_S
1903 151173U, // F64_CONVERT_S_I64
1904 11321U, // F64_CONVERT_S_I64_S
1905 153675U, // F64_CONVERT_U_I32
1906 13332U, // F64_CONVERT_U_I32_S
1907 153807U, // F64_CONVERT_U_I64
1908 13440U, // F64_CONVERT_U_I64_S
1909 148229U, // F64_PROMOTE_F32
1910 9368U, // F64_PROMOTE_F32_S
1911 148339U, // F64_REINTERPRET_I64
1912 9472U, // F64_REINTERPRET_I64_S
1913 0U, // FALLTHROUGH_RETURN
1914 0U, // FALLTHROUGH_RETURN_S
1915 150815U, // FLOOR_F16x8
1916 11052U, // FLOOR_F16x8_S
1917 150767U, // FLOOR_F32
1918 11008U, // FLOOR_F32_S
1919 150802U, // FLOOR_F32x4
1920 11040U, // FLOOR_F32x4_S
1921 150791U, // FLOOR_F64
1922 11030U, // FLOOR_F64_S
1923 150778U, // FLOOR_F64x2
1924 11018U, // FLOOR_F64x2_S
1925 0U, // FP_TO_SINT_I32_F32
1926 0U, // FP_TO_SINT_I32_F32_S
1927 0U, // FP_TO_SINT_I32_F64
1928 0U, // FP_TO_SINT_I32_F64_S
1929 0U, // FP_TO_SINT_I64_F32
1930 0U, // FP_TO_SINT_I64_F32_S
1931 0U, // FP_TO_SINT_I64_F64
1932 0U, // FP_TO_SINT_I64_F64_S
1933 0U, // FP_TO_UINT_I32_F32
1934 0U, // FP_TO_UINT_I32_F32_S
1935 0U, // FP_TO_UINT_I32_F64
1936 0U, // FP_TO_UINT_I32_F64_S
1937 0U, // FP_TO_UINT_I64_F32
1938 0U, // FP_TO_UINT_I64_F32_S
1939 0U, // FP_TO_UINT_I64_F64
1940 0U, // FP_TO_UINT_I64_F64_S
1941 4343430U, // GE_F16x8
1942 10017U, // GE_F16x8_S
1943 4341856U, // GE_F32
1944 8737U, // GE_F32_S
1945 4343420U, // GE_F32x4
1946 10008U, // GE_F32x4_S
1947 4341866U, // GE_F64
1948 8746U, // GE_F64_S
1949 4343410U, // GE_F64x2
1950 9999U, // GE_F64x2_S
1951 4346368U, // GE_S_I16x8
1952 12088U, // GE_S_I16x8_S
1953 4346312U, // GE_S_I32
1954 12037U, // GE_S_I32_S
1955 4346344U, // GE_S_I32x4
1956 12066U, // GE_S_I32x4_S
1957 4346334U, // GE_S_I64
1958 12057U, // GE_S_I64_S
1959 4346322U, // GE_S_I64x2
1960 12046U, // GE_S_I64x2_S
1961 4346356U, // GE_S_I8x16
1962 12077U, // GE_S_I8x16_S
1963 4349275U, // GE_U_I16x8
1964 14052U, // GE_U_I16x8_S
1965 4349231U, // GE_U_I32
1966 14012U, // GE_U_I32_S
1967 4349251U, // GE_U_I32x4
1968 14030U, // GE_U_I32x4_S
1969 4349241U, // GE_U_I64
1970 14021U, // GE_U_I64_S
1971 4349263U, // GE_U_I8x16
1972 14041U, // GE_U_I8x16_S
1973 153153U, // GLOBAL_GET_EXNREF
1974 22081U, // GLOBAL_GET_EXNREF_S
1975 153153U, // GLOBAL_GET_EXTERNREF
1976 22081U, // GLOBAL_GET_EXTERNREF_S
1977 153153U, // GLOBAL_GET_F32
1978 22081U, // GLOBAL_GET_F32_S
1979 153153U, // GLOBAL_GET_F64
1980 22081U, // GLOBAL_GET_F64_S
1981 153153U, // GLOBAL_GET_FUNCREF
1982 22081U, // GLOBAL_GET_FUNCREF_S
1983 153153U, // GLOBAL_GET_I32
1984 22081U, // GLOBAL_GET_I32_S
1985 153153U, // GLOBAL_GET_I64
1986 22081U, // GLOBAL_GET_I64_S
1987 153153U, // GLOBAL_GET_V128
1988 22081U, // GLOBAL_GET_V128_S
1989 153187U, // GLOBAL_SET_EXNREF
1990 22115U, // GLOBAL_SET_EXNREF_S
1991 153187U, // GLOBAL_SET_EXTERNREF
1992 22115U, // GLOBAL_SET_EXTERNREF_S
1993 153187U, // GLOBAL_SET_F32
1994 22115U, // GLOBAL_SET_F32_S
1995 153187U, // GLOBAL_SET_F64
1996 22115U, // GLOBAL_SET_F64_S
1997 153187U, // GLOBAL_SET_FUNCREF
1998 22115U, // GLOBAL_SET_FUNCREF_S
1999 153187U, // GLOBAL_SET_I32
2000 22115U, // GLOBAL_SET_I32_S
2001 153187U, // GLOBAL_SET_I64
2002 22115U, // GLOBAL_SET_I64_S
2003 153187U, // GLOBAL_SET_V128
2004 22115U, // GLOBAL_SET_V128_S
2005 4347534U, // GT_F16x8
2006 13016U, // GT_F16x8_S
2007 4341996U, // GT_F32
2008 8863U, // GT_F32_S
2009 4347524U, // GT_F32x4
2010 13007U, // GT_F32x4_S
2011 4342006U, // GT_F64
2012 8872U, // GT_F64_S
2013 4347514U, // GT_F64x2
2014 12998U, // GT_F64x2_S
2015 4346797U, // GT_S_I16x8
2016 12444U, // GT_S_I16x8_S
2017 4346741U, // GT_S_I32
2018 12393U, // GT_S_I32_S
2019 4346773U, // GT_S_I32x4
2020 12422U, // GT_S_I32x4_S
2021 4346763U, // GT_S_I64
2022 12413U, // GT_S_I64_S
2023 4346751U, // GT_S_I64x2
2024 12402U, // GT_S_I64x2_S
2025 4346785U, // GT_S_I8x16
2026 12433U, // GT_S_I8x16_S
2027 4350154U, // GT_U_I16x8
2028 14368U, // GT_U_I16x8_S
2029 4350110U, // GT_U_I32
2030 14328U, // GT_U_I32_S
2031 4350130U, // GT_U_I32x4
2032 14346U, // GT_U_I32x4_S
2033 4350120U, // GT_U_I64
2034 14337U, // GT_U_I64_S
2035 4350142U, // GT_U_I8x16
2036 14357U, // GT_U_I8x16_S
2037 151470U, // I32_EXTEND16_S_I32
2038 11562U, // I32_EXTEND16_S_I32_S
2039 151698U, // I32_EXTEND8_S_I32
2040 11756U, // I32_EXTEND8_S_I32_S
2041 148246U, // I32_REINTERPRET_F32
2042 9384U, // I32_REINTERPRET_F32_S
2043 150928U, // I32_TRUNC_S_F32
2044 11106U, // I32_TRUNC_S_F32_S
2045 151078U, // I32_TRUNC_S_F64
2046 11231U, // I32_TRUNC_S_F64_S
2047 150962U, // I32_TRUNC_S_SAT_F32
2048 11138U, // I32_TRUNC_S_SAT_F32_S
2049 151112U, // I32_TRUNC_S_SAT_F64
2050 11263U, // I32_TRUNC_S_SAT_F64_S
2051 153562U, // I32_TRUNC_U_F32
2052 13225U, // I32_TRUNC_U_F32_S
2053 153712U, // I32_TRUNC_U_F64
2054 13350U, // I32_TRUNC_U_F64_S
2055 153596U, // I32_TRUNC_U_SAT_F32
2056 13257U, // I32_TRUNC_U_SAT_F32_S
2057 153746U, // I32_TRUNC_U_SAT_F64
2058 13382U, // I32_TRUNC_U_SAT_F64_S
2059 148325U, // I32_WRAP_I64
2060 9459U, // I32_WRAP_I64_S
2061 151486U, // I64_EXTEND16_S_I64
2062 11577U, // I64_EXTEND16_S_I64_S
2063 150912U, // I64_EXTEND32_S_I64
2064 11091U, // I64_EXTEND32_S_I64_S
2065 151713U, // I64_EXTEND8_S_I64
2066 11770U, // I64_EXTEND8_S_I64_S
2067 151004U, // I64_EXTEND_S_I32
2068 11178U, // I64_EXTEND_S_I32_S
2069 153638U, // I64_EXTEND_U_I32
2070 13297U, // I64_EXTEND_U_I32_S
2071 148304U, // I64_REINTERPRET_F64
2072 9439U, // I64_REINTERPRET_F64_S
2073 150945U, // I64_TRUNC_S_F32
2074 11122U, // I64_TRUNC_S_F32_S
2075 151095U, // I64_TRUNC_S_F64
2076 11247U, // I64_TRUNC_S_F64_S
2077 150983U, // I64_TRUNC_S_SAT_F32
2078 11158U, // I64_TRUNC_S_SAT_F32_S
2079 151133U, // I64_TRUNC_S_SAT_F64
2080 11283U, // I64_TRUNC_S_SAT_F64_S
2081 153579U, // I64_TRUNC_U_F32
2082 13241U, // I64_TRUNC_U_F32_S
2083 153729U, // I64_TRUNC_U_F64
2084 13366U, // I64_TRUNC_U_F64_S
2085 153617U, // I64_TRUNC_U_SAT_F32
2086 13277U, // I64_TRUNC_U_SAT_F32_S
2087 153767U, // I64_TRUNC_U_SAT_F64
2088 13402U, // I64_TRUNC_U_SAT_F64_S
2089 180245U, // IF
2090 49173U, // IF_S
2091 37901814U, // LANESELECT_I16x8
2092 12924U, // LANESELECT_I16x8_S
2093 37901762U, // LANESELECT_I32x4
2094 12874U, // LANESELECT_I32x4_S
2095 37901736U, // LANESELECT_I64x2
2096 12849U, // LANESELECT_I64x2_S
2097 37901788U, // LANESELECT_I8x16
2098 12899U, // LANESELECT_I8x16_S
2099 4343460U, // LE_F16x8
2100 10044U, // LE_F16x8_S
2101 4341876U, // LE_F32
2102 8755U, // LE_F32_S
2103 4343450U, // LE_F32x4
2104 10035U, // LE_F32x4_S
2105 4341886U, // LE_F64
2106 8764U, // LE_F64_S
2107 4343440U, // LE_F64x2
2108 10026U, // LE_F64x2_S
2109 4346436U, // LE_S_I16x8
2110 12150U, // LE_S_I16x8_S
2111 4346380U, // LE_S_I32
2112 12099U, // LE_S_I32_S
2113 4346412U, // LE_S_I32x4
2114 12128U, // LE_S_I32x4_S
2115 4346402U, // LE_S_I64
2116 12119U, // LE_S_I64_S
2117 4346390U, // LE_S_I64x2
2118 12108U, // LE_S_I64x2_S
2119 4346424U, // LE_S_I8x16
2120 12139U, // LE_S_I8x16_S
2121 4349331U, // LE_U_I16x8
2122 14103U, // LE_U_I16x8_S
2123 4349287U, // LE_U_I32
2124 14063U, // LE_U_I32_S
2125 4349307U, // LE_U_I32x4
2126 14081U, // LE_U_I32x4_S
2127 4349297U, // LE_U_I64
2128 14072U, // LE_U_I64_S
2129 4349319U, // LE_U_I8x16
2130 14092U, // LE_U_I8x16_S
2131 25842965U, // LOAD16_SPLAT_A32
2132 1348885U, // LOAD16_SPLAT_A32_S
2133 25842965U, // LOAD16_SPLAT_A64
2134 1348885U, // LOAD16_SPLAT_A64_S
2135 25841554U, // LOAD16_S_I32_A32
2136 1347474U, // LOAD16_S_I32_A32_S
2137 25841554U, // LOAD16_S_I32_A64
2138 1347474U, // LOAD16_S_I32_A64_S
2139 25841568U, // LOAD16_S_I64_A32
2140 1347488U, // LOAD16_S_I64_A32_S
2141 25841568U, // LOAD16_S_I64_A64
2142 1347488U, // LOAD16_S_I64_A64_S
2143 25844188U, // LOAD16_U_I32_A32
2144 1350108U, // LOAD16_U_I32_A32_S
2145 25844188U, // LOAD16_U_I32_A64
2146 1350108U, // LOAD16_U_I32_A64_S
2147 25844202U, // LOAD16_U_I64_A32
2148 1350122U, // LOAD16_U_I64_A32_S
2149 25844202U, // LOAD16_U_I64_A64
2150 1350122U, // LOAD16_U_I64_A64_S
2151 25842927U, // LOAD32_SPLAT_A32
2152 1348847U, // LOAD32_SPLAT_A32_S
2153 25842927U, // LOAD32_SPLAT_A64
2154 1348847U, // LOAD32_SPLAT_A64_S
2155 25841010U, // LOAD32_S_I64_A32
2156 1346930U, // LOAD32_S_I64_A32_S
2157 25841010U, // LOAD32_S_I64_A64
2158 1346930U, // LOAD32_S_I64_A64_S
2159 25843639U, // LOAD32_U_I64_A32
2160 1349559U, // LOAD32_U_I64_A32_S
2161 25843639U, // LOAD32_U_I64_A64
2162 1349559U, // LOAD32_U_I64_A64_S
2163 25842946U, // LOAD64_SPLAT_A32
2164 1348866U, // LOAD64_SPLAT_A32_S
2165 25842946U, // LOAD64_SPLAT_A64
2166 1348866U, // LOAD64_SPLAT_A64_S
2167 25842984U, // LOAD8_SPLAT_A32
2168 1348904U, // LOAD8_SPLAT_A32_S
2169 25842984U, // LOAD8_SPLAT_A64
2170 1348904U, // LOAD8_SPLAT_A64_S
2171 25841784U, // LOAD8_S_I32_A32
2172 1347704U, // LOAD8_S_I32_A32_S
2173 25841784U, // LOAD8_S_I32_A64
2174 1347704U, // LOAD8_S_I32_A64_S
2175 25841797U, // LOAD8_S_I64_A32
2176 1347717U, // LOAD8_S_I64_A32_S
2177 25841797U, // LOAD8_S_I64_A64
2178 1347717U, // LOAD8_S_I64_A64_S
2179 25844395U, // LOAD8_U_I32_A32
2180 1350315U, // LOAD8_U_I32_A32_S
2181 25844395U, // LOAD8_U_I32_A64
2182 1350315U, // LOAD8_U_I32_A64_S
2183 25844408U, // LOAD8_U_I64_A32
2184 1350328U, // LOAD8_U_I64_A32_S
2185 25844408U, // LOAD8_U_I64_A64
2186 1350328U, // LOAD8_U_I64_A64_S
2187 25842066U, // LOAD_EXTEND_S_I16x8_A32
2188 1347986U, // LOAD_EXTEND_S_I16x8_A32_S
2189 25842066U, // LOAD_EXTEND_S_I16x8_A64
2190 1347986U, // LOAD_EXTEND_S_I16x8_A64_S
2191 25841536U, // LOAD_EXTEND_S_I32x4_A32
2192 1347456U, // LOAD_EXTEND_S_I32x4_A32_S
2193 25841536U, // LOAD_EXTEND_S_I32x4_A64
2194 1347456U, // LOAD_EXTEND_S_I32x4_A64_S
2195 25841172U, // LOAD_EXTEND_S_I64x2_A32
2196 1347092U, // LOAD_EXTEND_S_I64x2_A32_S
2197 25841172U, // LOAD_EXTEND_S_I64x2_A64
2198 1347092U, // LOAD_EXTEND_S_I64x2_A64_S
2199 25844668U, // LOAD_EXTEND_U_I16x8_A32
2200 1350588U, // LOAD_EXTEND_U_I16x8_A32_S
2201 25844668U, // LOAD_EXTEND_U_I16x8_A64
2202 1350588U, // LOAD_EXTEND_U_I16x8_A64_S
2203 25844170U, // LOAD_EXTEND_U_I32x4_A32
2204 1350090U, // LOAD_EXTEND_U_I32x4_A32_S
2205 25844170U, // LOAD_EXTEND_U_I32x4_A64
2206 1350090U, // LOAD_EXTEND_U_I32x4_A64_S
2207 25843806U, // LOAD_EXTEND_U_I64x2_A32
2208 1349726U, // LOAD_EXTEND_U_I64x2_A32_S
2209 25843806U, // LOAD_EXTEND_U_I64x2_A64
2210 1349726U, // LOAD_EXTEND_U_I64x2_A64_S
2211 25838563U, // LOAD_F16_F32_A32
2212 1344483U, // LOAD_F16_F32_A32_S
2213 25838563U, // LOAD_F16_F32_A64
2214 1344483U, // LOAD_F16_F32_A64_S
2215 25838832U, // LOAD_F32_A32
2216 1344752U, // LOAD_F32_A32_S
2217 25838832U, // LOAD_F32_A64
2218 1344752U, // LOAD_F32_A64_S
2219 25838852U, // LOAD_F64_A32
2220 1344772U, // LOAD_F64_A32_S
2221 25838852U, // LOAD_F64_A64
2222 1344772U, // LOAD_F64_A64_S
2223 25838842U, // LOAD_I32_A32
2224 1344762U, // LOAD_I32_A32_S
2225 25838842U, // LOAD_I32_A64
2226 1344762U, // LOAD_I32_A64_S
2227 25838862U, // LOAD_I64_A32
2228 1344782U, // LOAD_I64_A32_S
2229 25838862U, // LOAD_I64_A64
2230 1344782U, // LOAD_I64_A64_S
2231 59393907U, // LOAD_LANE_I16x8_A32
2232 1869683U, // LOAD_LANE_I16x8_A32_S
2233 59393907U, // LOAD_LANE_I16x8_A64
2234 1869683U, // LOAD_LANE_I16x8_A64_S
2235 59393833U, // LOAD_LANE_I32x4_A32
2236 1869609U, // LOAD_LANE_I32x4_A32_S
2237 59393833U, // LOAD_LANE_I32x4_A64
2238 1869609U, // LOAD_LANE_I32x4_A64_S
2239 59393870U, // LOAD_LANE_I64x2_A32
2240 1869646U, // LOAD_LANE_I64x2_A32_S
2241 59393870U, // LOAD_LANE_I64x2_A64
2242 1869646U, // LOAD_LANE_I64x2_A64_S
2243 59393944U, // LOAD_LANE_I8x16_A32
2244 1869720U, // LOAD_LANE_I8x16_A32_S
2245 59393944U, // LOAD_LANE_I8x16_A64
2246 1869720U, // LOAD_LANE_I8x16_A64_S
2247 25838872U, // LOAD_V128_A32
2248 1344792U, // LOAD_V128_A32_S
2249 25838872U, // LOAD_V128_A64
2250 1344792U, // LOAD_V128_A64_S
2251 25840562U, // LOAD_ZERO_I32x4_A32
2252 1346482U, // LOAD_ZERO_I32x4_A32_S
2253 25840562U, // LOAD_ZERO_I32x4_A64
2254 1346482U, // LOAD_ZERO_I32x4_A64_S
2255 25840605U, // LOAD_ZERO_I64x2_A32
2256 1346525U, // LOAD_ZERO_I64x2_A32_S
2257 25840605U, // LOAD_ZERO_I64x2_A64
2258 1346525U, // LOAD_ZERO_I64x2_A64_S
2259 153165U, // LOCAL_GET_EXNREF
2260 22093U, // LOCAL_GET_EXNREF_S
2261 153165U, // LOCAL_GET_EXTERNREF
2262 22093U, // LOCAL_GET_EXTERNREF_S
2263 153165U, // LOCAL_GET_F32
2264 22093U, // LOCAL_GET_F32_S
2265 153165U, // LOCAL_GET_F64
2266 22093U, // LOCAL_GET_F64_S
2267 153165U, // LOCAL_GET_FUNCREF
2268 22093U, // LOCAL_GET_FUNCREF_S
2269 153165U, // LOCAL_GET_I32
2270 22093U, // LOCAL_GET_I32_S
2271 153165U, // LOCAL_GET_I64
2272 22093U, // LOCAL_GET_I64_S
2273 153165U, // LOCAL_GET_V128
2274 22093U, // LOCAL_GET_V128_S
2275 153199U, // LOCAL_SET_EXNREF
2276 22127U, // LOCAL_SET_EXNREF_S
2277 153199U, // LOCAL_SET_EXTERNREF
2278 22127U, // LOCAL_SET_EXTERNREF_S
2279 153199U, // LOCAL_SET_F32
2280 22127U, // LOCAL_SET_F32_S
2281 153199U, // LOCAL_SET_F64
2282 22127U, // LOCAL_SET_F64_S
2283 153199U, // LOCAL_SET_FUNCREF
2284 22127U, // LOCAL_SET_FUNCREF_S
2285 153199U, // LOCAL_SET_I32
2286 22127U, // LOCAL_SET_I32_S
2287 153199U, // LOCAL_SET_I64
2288 22127U, // LOCAL_SET_I64_S
2289 153199U, // LOCAL_SET_V128
2290 22127U, // LOCAL_SET_V128_S
2291 4343399U, // LOCAL_TEE_EXNREF
2292 18023U, // LOCAL_TEE_EXNREF_S
2293 4343399U, // LOCAL_TEE_EXTERNREF
2294 18023U, // LOCAL_TEE_EXTERNREF_S
2295 4343399U, // LOCAL_TEE_F32
2296 18023U, // LOCAL_TEE_F32_S
2297 4343399U, // LOCAL_TEE_F64
2298 18023U, // LOCAL_TEE_F64_S
2299 4343399U, // LOCAL_TEE_FUNCREF
2300 18023U, // LOCAL_TEE_FUNCREF_S
2301 4343399U, // LOCAL_TEE_I32
2302 18023U, // LOCAL_TEE_I32_S
2303 4343399U, // LOCAL_TEE_I64
2304 18023U, // LOCAL_TEE_I64_S
2305 4343399U, // LOCAL_TEE_V128
2306 18023U, // LOCAL_TEE_V128_S
2307 49198U, // LOOP
2308 49198U, // LOOP_S
2309 4347577U, // LT_F16x8
2310 13043U, // LT_F16x8_S
2311 4342016U, // LT_F32
2312 8881U, // LT_F32_S
2313 4347567U, // LT_F32x4
2314 13034U, // LT_F32x4_S
2315 4342026U, // LT_F64
2316 8890U, // LT_F64_S
2317 4347557U, // LT_F64x2
2318 13025U, // LT_F64x2_S
2319 4346865U, // LT_S_I16x8
2320 12506U, // LT_S_I16x8_S
2321 4346809U, // LT_S_I32
2322 12455U, // LT_S_I32_S
2323 4346841U, // LT_S_I32x4
2324 12484U, // LT_S_I32x4_S
2325 4346831U, // LT_S_I64
2326 12475U, // LT_S_I64_S
2327 4346819U, // LT_S_I64x2
2328 12464U, // LT_S_I64x2_S
2329 4346853U, // LT_S_I8x16
2330 12495U, // LT_S_I8x16_S
2331 4350210U, // LT_U_I16x8
2332 14419U, // LT_U_I16x8_S
2333 4350166U, // LT_U_I32
2334 14379U, // LT_U_I32_S
2335 4350186U, // LT_U_I32x4
2336 14397U, // LT_U_I32x4_S
2337 4350176U, // LT_U_I64
2338 14388U, // LT_U_I64_S
2339 4350198U, // LT_U_I8x16
2340 14408U, // LT_U_I8x16_S
2341 37897698U, // MADD_F16x8
2342 9869U, // MADD_F16x8_S
2343 37897678U, // MADD_F32x4
2344 9850U, // MADD_F32x4_S
2345 37897658U, // MADD_F64x2
2346 9831U, // MADD_F64x2_S
2347 4350363U, // MAX_F16x8
2348 14536U, // MAX_F16x8_S
2349 4342363U, // MAX_F32
2350 9133U, // MAX_F32_S
2351 4350352U, // MAX_F32x4
2352 14526U, // MAX_F32x4_S
2353 4342373U, // MAX_F64
2354 9142U, // MAX_F64_S
2355 4350341U, // MAX_F64x2
2356 14516U, // MAX_F64x2_S
2357 4346925U, // MAX_S_I16x8
2358 12561U, // MAX_S_I16x8_S
2359 4346899U, // MAX_S_I32x4
2360 12537U, // MAX_S_I32x4_S
2361 4346912U, // MAX_S_I8x16
2362 12549U, // MAX_S_I8x16_S
2363 4350270U, // MAX_U_I16x8
2364 14474U, // MAX_U_I16x8_S
2365 4350244U, // MAX_U_I32x4
2366 14450U, // MAX_U_I32x4_S
2367 4350257U, // MAX_U_I8x16
2368 14462U, // MAX_U_I8x16_S
2369 92947055U, // MEMORY_ATOMIC_NOTIFY_A32
2370 1344111U, // MEMORY_ATOMIC_NOTIFY_A32_S
2371 92947055U, // MEMORY_ATOMIC_NOTIFY_A64
2372 1344111U, // MEMORY_ATOMIC_NOTIFY_A64_S
2373 227164436U, // MEMORY_ATOMIC_WAIT32_A32
2374 1343764U, // MEMORY_ATOMIC_WAIT32_A32_S
2375 227164436U, // MEMORY_ATOMIC_WAIT32_A64
2376 1343764U, // MEMORY_ATOMIC_WAIT32_A64_S
2377 227164459U, // MEMORY_ATOMIC_WAIT64_A32
2378 1343787U, // MEMORY_ATOMIC_WAIT64_A32_S
2379 227164459U, // MEMORY_ATOMIC_WAIT64_A64
2380 1343787U, // MEMORY_ATOMIC_WAIT64_A64_S
2381 4344669U, // MIN_F16x8
2382 10643U, // MIN_F16x8_S
2383 4342273U, // MIN_F32
2384 9061U, // MIN_F32_S
2385 4344658U, // MIN_F32x4
2386 10633U, // MIN_F32x4_S
2387 4342283U, // MIN_F64
2388 9070U, // MIN_F64_S
2389 4344647U, // MIN_F64x2
2390 10623U, // MIN_F64x2_S
2391 4346540U, // MIN_S_I16x8
2392 12205U, // MIN_S_I16x8_S
2393 4346514U, // MIN_S_I32x4
2394 12181U, // MIN_S_I32x4_S
2395 4346527U, // MIN_S_I8x16
2396 12193U, // MIN_S_I8x16_S
2397 4349696U, // MIN_U_I16x8
2398 14158U, // MIN_U_I16x8_S
2399 4349670U, // MIN_U_I32x4
2400 14134U, // MIN_U_I32x4_S
2401 4349683U, // MIN_U_I8x16
2402 14146U, // MIN_U_I8x16_S
2403 4344597U, // MUL_F16x8
2404 10577U, // MUL_F16x8_S
2405 4342233U, // MUL_F32
2406 9025U, // MUL_F32_S
2407 4344575U, // MUL_F32x4
2408 10557U, // MUL_F32x4_S
2409 4342253U, // MUL_F64
2410 9043U, // MUL_F64_S
2411 4344553U, // MUL_F64x2
2412 10537U, // MUL_F64x2_S
2413 4344608U, // MUL_I16x8
2414 10587U, // MUL_I16x8_S
2415 4342243U, // MUL_I32
2416 9034U, // MUL_I32_S
2417 4344586U, // MUL_I32x4
2418 10567U, // MUL_I32x4_S
2419 4342263U, // MUL_I64
2420 9052U, // MUL_I64_S
2421 4344564U, // MUL_I64x2
2422 10547U, // MUL_I64x2_S
2423 4345706U, // NARROW_S_I16x8
2424 11541U, // NARROW_S_I16x8_S
2425 4346236U, // NARROW_S_I8x16
2426 11980U, // NARROW_S_I8x16_S
2427 4348340U, // NARROW_U_I16x8
2428 13660U, // NARROW_U_I16x8_S
2429 4348838U, // NARROW_U_I8x16
2430 13991U, // NARROW_U_I8x16_S
2431 153456U, // NEAREST_F16x8
2432 13211U, // NEAREST_F16x8_S
2433 153400U, // NEAREST_F32
2434 13159U, // NEAREST_F32_S
2435 153441U, // NEAREST_F32x4
2436 13197U, // NEAREST_F32x4_S
2437 153428U, // NEAREST_F64
2438 13185U, // NEAREST_F64_S
2439 153413U, // NEAREST_F64x2
2440 13171U, // NEAREST_F64x2_S
2441 149906U, // NEG_F16x8
2442 10300U, // NEG_F16x8_S
2443 147889U, // NEG_F32
2444 8989U, // NEG_F32_S
2445 149873U, // NEG_F32x4
2446 10270U, // NEG_F32x4_S
2447 147899U, // NEG_F64
2448 8998U, // NEG_F64_S
2449 149851U, // NEG_F64x2
2450 10250U, // NEG_F64x2_S
2451 149917U, // NEG_I16x8
2452 10310U, // NEG_I16x8_S
2453 149884U, // NEG_I32x4
2454 10280U, // NEG_I32x4_S
2455 149862U, // NEG_I64x2
2456 10260U, // NEG_I64x2_S
2457 149895U, // NEG_I8x16
2458 10290U, // NEG_I8x16_S
2459 4343573U, // NE_F16x8
2460 10146U, // NE_F16x8_S
2461 4341896U, // NE_F32
2462 8773U, // NE_F32_S
2463 4343543U, // NE_F32x4
2464 10119U, // NE_F32x4_S
2465 4341916U, // NE_F64
2466 8791U, // NE_F64_S
2467 4343523U, // NE_F64x2
2468 10101U, // NE_F64x2_S
2469 4343583U, // NE_I16x8
2470 10155U, // NE_I16x8_S
2471 4341906U, // NE_I32
2472 8782U, // NE_I32_S
2473 4343553U, // NE_I32x4
2474 10128U, // NE_I32x4_S
2475 4341926U, // NE_I64
2476 8800U, // NE_I64_S
2477 4343533U, // NE_I64x2
2478 10110U, // NE_I64x2_S
2479 4343563U, // NE_I8x16
2480 10137U, // NE_I8x16_S
2481 37897760U, // NMADD_F16x8
2482 9928U, // NMADD_F16x8_S
2483 37897739U, // NMADD_F32x4
2484 9908U, // NMADD_F32x4_S
2485 37897718U, // NMADD_F64x2
2486 9888U, // NMADD_F64x2_S
2487 10919U, // NOP
2488 10919U, // NOP_S
2489 153321U, // NOT
2490 13087U, // NOT_S
2491 4345024U, // OR
2492 4341976U, // OR_I32
2493 8845U, // OR_I32_S
2494 4341986U, // OR_I64
2495 8854U, // OR_I64_S
2496 11000U, // OR_S
2497 4350436U, // PMAX_F16x8
2498 14604U, // PMAX_F16x8_S
2499 4350424U, // PMAX_F32x4
2500 14593U, // PMAX_F32x4_S
2501 4350412U, // PMAX_F64x2
2502 14582U, // PMAX_F64x2_S
2503 4344742U, // PMIN_F16x8
2504 10711U, // PMIN_F16x8_S
2505 4344730U, // PMIN_F32x4
2506 10700U, // PMIN_F32x4_S
2507 4344718U, // PMIN_F64x2
2508 10689U, // PMIN_F64x2_S
2509 153283U, // POPCNT_I32
2510 13052U, // POPCNT_I32_S
2511 153295U, // POPCNT_I64
2512 13063U, // POPCNT_I64_S
2513 153307U, // POPCNT_I8x16
2514 13074U, // POPCNT_I8x16_S
2515 4346720U, // Q15MULR_SAT_S_I16x8
2516 12373U, // Q15MULR_SAT_S_I16x8_S
2517 35528U, // REF_IS_NULL_EXNREF
2518 10507U, // REF_IS_NULL_EXNREF_S
2519 35528U, // REF_IS_NULL_EXTERNREF
2520 10507U, // REF_IS_NULL_EXTERNREF_S
2521 35528U, // REF_IS_NULL_FUNCREF
2522 10507U, // REF_IS_NULL_FUNCREF_S
2523 27142U, // REF_NULL_EXNREF
2524 10758U, // REF_NULL_EXNREF_S
2525 27119U, // REF_NULL_EXTERNREF
2526 10735U, // REF_NULL_EXTERNREF_S
2527 26075U, // REF_NULL_FUNCREF
2528 9691U, // REF_NULL_FUNCREF_S
2529 4345806U, // RELAXED_DOT
2530 37900707U, // RELAXED_DOT_ADD
2531 12001U, // RELAXED_DOT_ADD_S
2532 37896931U, // RELAXED_DOT_BFLOAT
2533 9335U, // RELAXED_DOT_BFLOAT_S
2534 11592U, // RELAXED_DOT_S
2535 4346627U, // RELAXED_Q15MULR_S_I16x8
2536 12285U, // RELAXED_Q15MULR_S_I16x8_S
2537 4343500U, // RELAXED_SWIZZLE
2538 10079U, // RELAXED_SWIZZLE_S
2539 4346492U, // REM_S_I32
2540 12161U, // REM_S_I32_S
2541 4346503U, // REM_S_I64
2542 12171U, // REM_S_I64_S
2543 4349648U, // REM_U_I32
2544 14114U, // REM_U_I32_S
2545 4349659U, // REM_U_I64
2546 14124U, // REM_U_I64_S
2547 37898211U, // REPLACE_LANE_F32x4
2548 18403U, // REPLACE_LANE_F32x4_S
2549 37898171U, // REPLACE_LANE_F64x2
2550 18363U, // REPLACE_LANE_F64x2_S
2551 37898271U, // REPLACE_LANE_I16x8
2552 18463U, // REPLACE_LANE_I16x8_S
2553 37898231U, // REPLACE_LANE_I32x4
2554 18423U, // REPLACE_LANE_I32x4_S
2555 37898191U, // REPLACE_LANE_I64x2
2556 18383U, // REPLACE_LANE_I64x2_S
2557 37898251U, // REPLACE_LANE_I8x16
2558 18443U, // REPLACE_LANE_I8x16_S
2559 16977U, // RETHROW
2560 16977U, // RETHROW_S
2561 10751U, // RETURN
2562 10751U, // RETURN_S
2563 16413U, // RET_CALL
2564 5664U, // RET_CALL_INDIRECT
2565 153120U, // RET_CALL_INDIRECT_S
2566 19106U, // RET_CALL_S
2567 4344533U, // ROTL_I32
2568 10519U, // ROTL_I32_S
2569 4344543U, // ROTL_I64
2570 10528U, // ROTL_I64_S
2571 4345182U, // ROTR_I32
2572 11073U, // ROTR_I32_S
2573 4345192U, // ROTR_I64
2574 11082U, // ROTR_I64_S
2575 37901721U, // SELECT_EXNREF
2576 12835U, // SELECT_EXNREF_S
2577 37901703U, // SELECT_EXTERNREF
2578 12818U, // SELECT_EXTERNREF_S
2579 37901626U, // SELECT_F32
2580 12747U, // SELECT_F32_S
2581 37901650U, // SELECT_F64
2582 12769U, // SELECT_F64_S
2583 37901687U, // SELECT_FUNCREF
2584 12803U, // SELECT_FUNCREF_S
2585 37901638U, // SELECT_I32
2586 12758U, // SELECT_I32_S
2587 37901662U, // SELECT_I64
2588 12780U, // SELECT_I64_S
2589 37901674U, // SELECT_V128
2590 12791U, // SELECT_V128_S
2591 4344415U, // SHL_I16x8
2592 10422U, // SHL_I16x8_S
2593 4342213U, // SHL_I32
2594 9007U, // SHL_I32_S
2595 4344393U, // SHL_I32x4
2596 10402U, // SHL_I32x4_S
2597 4342223U, // SHL_I64
2598 9016U, // SHL_I64_S
2599 4344382U, // SHL_I64x2
2600 10392U, // SHL_I64x2_S
2601 4344404U, // SHL_I8x16
2602 10412U, // SHL_I8x16_S
2603 4346614U, // SHR_S_I16x8
2604 12273U, // SHR_S_I16x8_S
2605 4346553U, // SHR_S_I32
2606 12217U, // SHR_S_I32_S
2607 4346588U, // SHR_S_I32x4
2608 12249U, // SHR_S_I32x4_S
2609 4346577U, // SHR_S_I64
2610 12239U, // SHR_S_I64_S
2611 4346564U, // SHR_S_I64x2
2612 12227U, // SHR_S_I64x2_S
2613 4346601U, // SHR_S_I8x16
2614 12261U, // SHR_S_I8x16_S
2615 4349798U, // SHR_U_I16x8
2616 14252U, // SHR_U_I16x8_S
2617 4349737U, // SHR_U_I32
2618 14196U, // SHR_U_I32_S
2619 4349772U, // SHR_U_I32x4
2620 14228U, // SHR_U_I32x4_S
2621 4349761U, // SHR_U_I64
2622 14218U, // SHR_U_I64_S
2623 4349748U, // SHR_U_I64x2
2624 14206U, // SHR_U_I64x2_S
2625 4349785U, // SHR_U_I8x16
2626 14240U, // SHR_U_I8x16_S
2627 1581401774U, // SHUFFLE
2628 3728885422U, // SHUFFLE_S
2629 4350393U, // SIMD_RELAXED_FMAX_F32x4
2630 14564U, // SIMD_RELAXED_FMAX_F32x4_S
2631 4350374U, // SIMD_RELAXED_FMAX_F64x2
2632 14546U, // SIMD_RELAXED_FMAX_F64x2_S
2633 4344699U, // SIMD_RELAXED_FMIN_F32x4
2634 10671U, // SIMD_RELAXED_FMIN_F32x4_S
2635 4344680U, // SIMD_RELAXED_FMIN_F64x2
2636 10653U, // SIMD_RELAXED_FMIN_F64x2_S
2637 152789U, // SPLAT_F16x8
2638 12723U, // SPLAT_F16x8_S
2639 152750U, // SPLAT_F32x4
2640 12687U, // SPLAT_F32x4_S
2641 152724U, // SPLAT_F64x2
2642 12663U, // SPLAT_F64x2_S
2643 152802U, // SPLAT_I16x8
2644 12735U, // SPLAT_I16x8_S
2645 152763U, // SPLAT_I32x4
2646 12699U, // SPLAT_I32x4_S
2647 152737U, // SPLAT_I64x2
2648 12675U, // SPLAT_I64x2_S
2649 152776U, // SPLAT_I8x16
2650 12711U, // SPLAT_I8x16_S
2651 153388U, // SQRT_F16x8
2652 13148U, // SQRT_F16x8_S
2653 153344U, // SQRT_F32
2654 13108U, // SQRT_F32_S
2655 153376U, // SQRT_F32x4
2656 13137U, // SQRT_F32x4_S
2657 153366U, // SQRT_F64
2658 13128U, // SQRT_F64_S
2659 153354U, // SQRT_F64x2
2660 13117U, // SQRT_F64x2_S
2661 13534113U, // STORE16_I32_A32
2662 1344417U, // STORE16_I32_A32_S
2663 13534113U, // STORE16_I32_A64
2664 1344417U, // STORE16_I32_A64_S
2665 13534126U, // STORE16_I64_A32
2666 1344430U, // STORE16_I64_A32_S
2667 13534126U, // STORE16_I64_A64
2668 1344430U, // STORE16_I64_A64_S
2669 13533890U, // STORE32_I64_A32
2670 1344194U, // STORE32_I64_A32_S
2671 13533890U, // STORE32_I64_A64
2672 1344194U, // STORE32_I64_A64_S
2673 13534208U, // STORE8_I32_A32
2674 1344512U, // STORE8_I32_A32_S
2675 13534208U, // STORE8_I32_A64
2676 1344512U, // STORE8_I32_A64_S
2677 13534220U, // STORE8_I64_A32
2678 1344524U, // STORE8_I64_A32_S
2679 13534220U, // STORE8_I64_A64
2680 1344524U, // STORE8_I64_A64_S
2681 13534193U, // STORE_F16_F32_A32
2682 1344497U, // STORE_F16_F32_A32_S
2683 13534193U, // STORE_F16_F32_A64
2684 1344497U, // STORE_F16_F32_A64_S
2685 13535383U, // STORE_F32_A32
2686 1345687U, // STORE_F32_A32_S
2687 13535383U, // STORE_F32_A64
2688 1345687U, // STORE_F32_A64_S
2689 13535405U, // STORE_F64_A32
2690 1345709U, // STORE_F64_A32_S
2691 13535405U, // STORE_F64_A64
2692 1345709U, // STORE_F64_A64_S
2693 13535394U, // STORE_I32_A32
2694 1345698U, // STORE_I32_A32_S
2695 13535394U, // STORE_I32_A64
2696 1345698U, // STORE_I32_A64_S
2697 13535416U, // STORE_I64_A32
2698 1345720U, // STORE_I64_A32_S
2699 13535416U, // STORE_I64_A64
2700 1345720U, // STORE_I64_A64_S
2701 2525061U, // STORE_LANE_I16x8_A32
2702 1869701U, // STORE_LANE_I16x8_A32_S
2703 2525061U, // STORE_LANE_I16x8_A64
2704 1869701U, // STORE_LANE_I16x8_A64_S
2705 2524987U, // STORE_LANE_I32x4_A32
2706 1869627U, // STORE_LANE_I32x4_A32_S
2707 2524987U, // STORE_LANE_I32x4_A64
2708 1869627U, // STORE_LANE_I32x4_A64_S
2709 2525024U, // STORE_LANE_I64x2_A32
2710 1869664U, // STORE_LANE_I64x2_A32_S
2711 2525024U, // STORE_LANE_I64x2_A64
2712 1869664U, // STORE_LANE_I64x2_A64_S
2713 2525097U, // STORE_LANE_I8x16_A32
2714 1869737U, // STORE_LANE_I8x16_A32_S
2715 2525097U, // STORE_LANE_I8x16_A64
2716 1869737U, // STORE_LANE_I8x16_A64_S
2717 13535427U, // STORE_V128_A32
2718 1345731U, // STORE_V128_A32_S
2719 13535427U, // STORE_V128_A64
2720 1345731U, // STORE_V128_A64_S
2721 4342901U, // SUB_F16x8
2722 9671U, // SUB_F16x8_S
2723 4342082U, // SUB_F32
2724 8899U, // SUB_F32_S
2725 4342868U, // SUB_F32x4
2726 9641U, // SUB_F32x4_S
2727 4342102U, // SUB_F64
2728 8917U, // SUB_F64_S
2729 4342846U, // SUB_F64x2
2730 9621U, // SUB_F64x2_S
2731 4342912U, // SUB_I16x8
2732 9681U, // SUB_I16x8_S
2733 4342092U, // SUB_I32
2734 8908U, // SUB_I32_S
2735 4342879U, // SUB_I32x4
2736 9651U, // SUB_I32x4_S
2737 4342112U, // SUB_I64
2738 8926U, // SUB_I64_S
2739 4342857U, // SUB_I64x2
2740 9631U, // SUB_I64x2_S
2741 4342890U, // SUB_I8x16
2742 9661U, // SUB_I8x16_S
2743 4346669U, // SUB_SAT_S_I16x8
2744 12325U, // SUB_SAT_S_I16x8_S
2745 4346652U, // SUB_SAT_S_I8x16
2746 12309U, // SUB_SAT_S_I8x16_S
2747 4350059U, // SUB_SAT_U_I16x8
2748 14280U, // SUB_SAT_U_I16x8_S
2749 4350042U, // SUB_SAT_U_I8x16
2750 14264U, // SUB_SAT_U_I8x16_S
2751 4343485U, // SWIZZLE
2752 10065U, // SWIZZLE_S
2753 105013744U, // TABLE_COPY
2754 156144U, // TABLE_COPY_S
2755 37898927U, // TABLE_FILL_EXNREF
2756 19119U, // TABLE_FILL_EXNREF_S
2757 37898927U, // TABLE_FILL_EXTERNREF
2758 19119U, // TABLE_FILL_EXTERNREF_S
2759 37898927U, // TABLE_FILL_FUNCREF
2760 19119U, // TABLE_FILL_FUNCREF_S
2761 4347446U, // TABLE_GET_EXNREF
2762 22070U, // TABLE_GET_EXNREF_S
2763 4347446U, // TABLE_GET_EXTERNREF
2764 22070U, // TABLE_GET_EXTERNREF_S
2765 4347446U, // TABLE_GET_FUNCREF
2766 22070U, // TABLE_GET_FUNCREF_S
2767 37904748U, // TABLE_GROW_EXNREF
2768 24940U, // TABLE_GROW_EXNREF_S
2769 37904748U, // TABLE_GROW_EXTERNREF
2770 24940U, // TABLE_GROW_EXTERNREF_S
2771 37904748U, // TABLE_GROW_FUNCREF
2772 24940U, // TABLE_GROW_FUNCREF_S
2773 4347480U, // TABLE_SET_EXNREF
2774 22104U, // TABLE_SET_EXNREF_S
2775 4347480U, // TABLE_SET_EXTERNREF
2776 22104U, // TABLE_SET_EXTERNREF_S
2777 4347480U, // TABLE_SET_FUNCREF
2778 22104U, // TABLE_SET_FUNCREF_S
2779 149826U, // TABLE_SIZE
2780 18754U, // TABLE_SIZE_S
2781 4343399U, // TEE_EXNREF
2782 9989U, // TEE_EXNREF_S
2783 4343399U, // TEE_EXTERNREF
2784 9989U, // TEE_EXTERNREF_S
2785 4343399U, // TEE_F32
2786 9989U, // TEE_F32_S
2787 4343399U, // TEE_F64
2788 9989U, // TEE_F64_S
2789 4343399U, // TEE_FUNCREF
2790 9989U, // TEE_FUNCREF_S
2791 4343399U, // TEE_I32
2792 9989U, // TEE_I32_S
2793 4343399U, // TEE_I64
2794 9989U, // TEE_I64_S
2795 4343399U, // TEE_V128
2796 9989U, // TEE_V128_S
2797 16470U, // THROW
2798 16470U, // THROW_S
2799 148707U, // TRUNC_F16x8
2800 9749U, // TRUNC_F16x8_S
2801 148659U, // TRUNC_F32
2802 9705U, // TRUNC_F32_S
2803 148694U, // TRUNC_F32x4
2804 9737U, // TRUNC_F32x4_S
2805 148683U, // TRUNC_F64
2806 9727U, // TRUNC_F64_S
2807 148670U, // TRUNC_F64x2
2808 9715U, // TRUNC_F64x2_S
2809 49163U, // TRY
2810 49163U, // TRY_S
2811 10053U, // UNREACHABLE
2812 10053U, // UNREACHABLE_S
2813 4345132U, // XOR
2814 4342293U, // XOR_I32
2815 9079U, // XOR_I32_S
2816 4342303U, // XOR_I64
2817 9088U, // XOR_I64_S
2818 11064U, // XOR_S
2819 4350328U, // anonymous_8187MEMORY_GROW_A32
2820 24952U, // anonymous_8187MEMORY_GROW_A32_S
2821 149838U, // anonymous_8187MEMORY_SIZE_A32
2822 18766U, // anonymous_8187MEMORY_SIZE_A32_S
2823 4350328U, // anonymous_8188MEMORY_GROW_A64
2824 24952U, // anonymous_8188MEMORY_GROW_A64_S
2825 149838U, // anonymous_8188MEMORY_SIZE_A64
2826 18766U, // anonymous_8188MEMORY_SIZE_A64_S
2827 19567U, // anonymous_8878DATA_DROP
2828 19567U, // anonymous_8878DATA_DROP_S
2829 105013768U, // anonymous_8878MEMORY_COPY_A32
2830 156168U, // anonymous_8878MEMORY_COPY_A32_S
2831 37898939U, // anonymous_8878MEMORY_FILL_A32
2832 19131U, // anonymous_8878MEMORY_FILL_A32_S
2833 105010840U, // anonymous_8878MEMORY_INIT_A32
2834 153240U, // anonymous_8878MEMORY_INIT_A32_S
2835 19567U, // anonymous_8879DATA_DROP
2836 19567U, // anonymous_8879DATA_DROP_S
2837 105013768U, // anonymous_8879MEMORY_COPY_A64
2838 156168U, // anonymous_8879MEMORY_COPY_A64_S
2839 37898939U, // anonymous_8879MEMORY_FILL_A64
2840 19131U, // anonymous_8879MEMORY_FILL_A64_S
2841 105010840U, // anonymous_8879MEMORY_INIT_A64
2842 153240U, // anonymous_8879MEMORY_INIT_A64_S
2843 151375U, // convert_low_s_F64x2
2844 11515U, // convert_low_s_F64x2_S
2845 154009U, // convert_low_u_F64x2
2846 13634U, // convert_low_u_F64x2_S
2847 150468U, // demote_zero_F32x4
2848 10771U, // demote_zero_F32x4_S
2849 151566U, // extend_high_s_I16x8
2850 11654U, // extend_high_s_I16x8_S
2851 151784U, // extend_high_s_I32x4
2852 11838U, // extend_high_s_I32x4_S
2853 151246U, // extend_high_s_I64x2
2854 11391U, // extend_high_s_I64x2_S
2855 154177U, // extend_high_u_I16x8
2856 13711U, // extend_high_u_I16x8_S
2857 154405U, // extend_high_u_I32x4
2858 13867U, // extend_high_u_I32x4_S
2859 153880U, // extend_high_u_I64x2
2860 13510U, // extend_high_u_I64x2_S
2861 151620U, // extend_low_s_I16x8
2862 11706U, // extend_low_s_I16x8_S
2863 151880U, // extend_low_s_I32x4
2864 11930U, // extend_low_s_I32x4_S
2865 151323U, // extend_low_s_I64x2
2866 11465U, // extend_low_s_I64x2_S
2867 154231U, // extend_low_u_I16x8
2868 13763U, // extend_low_u_I16x8_S
2869 154482U, // extend_low_u_I32x4
2870 13941U, // extend_low_u_I32x4_S
2871 153957U, // extend_low_u_I64x2
2872 13584U, // extend_low_u_I64x2_S
2873 151728U, // fp_to_sint_I16x8
2874 11784U, // fp_to_sint_I16x8_S
2875 151221U, // fp_to_sint_I32x4
2876 11367U, // fp_to_sint_I32x4_S
2877 154349U, // fp_to_uint_I16x8
2878 13813U, // fp_to_uint_I16x8_S
2879 153855U, // fp_to_uint_I32x4
2880 13486U, // fp_to_uint_I32x4_S
2881 151535U, // int_wasm_extadd_pairwise_signed_I16x8
2882 11624U, // int_wasm_extadd_pairwise_signed_I16x8_S
2883 151753U, // int_wasm_extadd_pairwise_signed_I32x4
2884 11808U, // int_wasm_extadd_pairwise_signed_I32x4_S
2885 154146U, // int_wasm_extadd_pairwise_unsigned_I16x8
2886 13681U, // int_wasm_extadd_pairwise_unsigned_I16x8_S
2887 154374U, // int_wasm_extadd_pairwise_unsigned_I32x4
2888 13837U, // int_wasm_extadd_pairwise_unsigned_I32x4_S
2889 151192U, // int_wasm_relaxed_trunc_signed_I32x4
2890 11339U, // int_wasm_relaxed_trunc_signed_I32x4_S
2891 150511U, // int_wasm_relaxed_trunc_signed_zero_I32x4
2892 10795U, // int_wasm_relaxed_trunc_signed_zero_I32x4_S
2893 153826U, // int_wasm_relaxed_trunc_unsigned_I32x4
2894 13458U, // int_wasm_relaxed_trunc_unsigned_I32x4_S
2895 150575U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4
2896 10857U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4_S
2897 148360U, // promote_low_F64x2
2898 9492U, // promote_low_F64x2_S
2899 151857U, // sint_to_fp_F16x8
2900 11908U, // sint_to_fp_F16x8_S
2901 151300U, // sint_to_fp_F32x4
2902 11443U, // sint_to_fp_F32x4_S
2903 150545U, // trunc_sat_zero_s_I32x4
2904 10828U, // trunc_sat_zero_s_I32x4_S
2905 150609U, // trunc_sat_zero_u_I32x4
2906 10890U, // trunc_sat_zero_u_I32x4_S
2907 154459U, // uint_to_fp_F16x8
2908 13919U, // uint_to_fp_F16x8_S
2909 153934U, // uint_to_fp_F32x4
2910 13562U, // uint_to_fp_F32x4_S
2911 };
2912
2913 static const uint8_t OpInfo1[] = {
2914 0U, // PHI
2915 0U, // INLINEASM
2916 0U, // INLINEASM_BR
2917 0U, // CFI_INSTRUCTION
2918 0U, // EH_LABEL
2919 0U, // GC_LABEL
2920 0U, // ANNOTATION_LABEL
2921 0U, // KILL
2922 0U, // EXTRACT_SUBREG
2923 0U, // INSERT_SUBREG
2924 0U, // IMPLICIT_DEF
2925 0U, // SUBREG_TO_REG
2926 0U, // COPY_TO_REGCLASS
2927 0U, // DBG_VALUE
2928 0U, // DBG_VALUE_LIST
2929 0U, // DBG_INSTR_REF
2930 0U, // DBG_PHI
2931 0U, // DBG_LABEL
2932 0U, // REG_SEQUENCE
2933 0U, // COPY
2934 0U, // BUNDLE
2935 0U, // LIFETIME_START
2936 0U, // LIFETIME_END
2937 0U, // PSEUDO_PROBE
2938 0U, // ARITH_FENCE
2939 0U, // STACKMAP
2940 0U, // FENTRY_CALL
2941 0U, // PATCHPOINT
2942 0U, // LOAD_STACK_GUARD
2943 0U, // PREALLOCATED_SETUP
2944 0U, // PREALLOCATED_ARG
2945 0U, // STATEPOINT
2946 0U, // LOCAL_ESCAPE
2947 0U, // FAULTING_OP
2948 0U, // PATCHABLE_OP
2949 0U, // PATCHABLE_FUNCTION_ENTER
2950 0U, // PATCHABLE_RET
2951 0U, // PATCHABLE_FUNCTION_EXIT
2952 0U, // PATCHABLE_TAIL_CALL
2953 0U, // PATCHABLE_EVENT_CALL
2954 0U, // PATCHABLE_TYPED_EVENT_CALL
2955 0U, // ICALL_BRANCH_FUNNEL
2956 0U, // MEMBARRIER
2957 0U, // JUMP_TABLE_DEBUG_INFO
2958 0U, // CONVERGENCECTRL_ENTRY
2959 0U, // CONVERGENCECTRL_ANCHOR
2960 0U, // CONVERGENCECTRL_LOOP
2961 0U, // CONVERGENCECTRL_GLUE
2962 0U, // G_ASSERT_SEXT
2963 0U, // G_ASSERT_ZEXT
2964 0U, // G_ASSERT_ALIGN
2965 0U, // G_ADD
2966 0U, // G_SUB
2967 0U, // G_MUL
2968 0U, // G_SDIV
2969 0U, // G_UDIV
2970 0U, // G_SREM
2971 0U, // G_UREM
2972 0U, // G_SDIVREM
2973 0U, // G_UDIVREM
2974 0U, // G_AND
2975 0U, // G_OR
2976 0U, // G_XOR
2977 0U, // G_IMPLICIT_DEF
2978 0U, // G_PHI
2979 0U, // G_FRAME_INDEX
2980 0U, // G_GLOBAL_VALUE
2981 0U, // G_PTRAUTH_GLOBAL_VALUE
2982 0U, // G_CONSTANT_POOL
2983 0U, // G_EXTRACT
2984 0U, // G_UNMERGE_VALUES
2985 0U, // G_INSERT
2986 0U, // G_MERGE_VALUES
2987 0U, // G_BUILD_VECTOR
2988 0U, // G_BUILD_VECTOR_TRUNC
2989 0U, // G_CONCAT_VECTORS
2990 0U, // G_PTRTOINT
2991 0U, // G_INTTOPTR
2992 0U, // G_BITCAST
2993 0U, // G_FREEZE
2994 0U, // G_CONSTANT_FOLD_BARRIER
2995 0U, // G_INTRINSIC_FPTRUNC_ROUND
2996 0U, // G_INTRINSIC_TRUNC
2997 0U, // G_INTRINSIC_ROUND
2998 0U, // G_INTRINSIC_LRINT
2999 0U, // G_INTRINSIC_LLRINT
3000 0U, // G_INTRINSIC_ROUNDEVEN
3001 0U, // G_READCYCLECOUNTER
3002 0U, // G_READSTEADYCOUNTER
3003 0U, // G_LOAD
3004 0U, // G_SEXTLOAD
3005 0U, // G_ZEXTLOAD
3006 0U, // G_INDEXED_LOAD
3007 0U, // G_INDEXED_SEXTLOAD
3008 0U, // G_INDEXED_ZEXTLOAD
3009 0U, // G_STORE
3010 0U, // G_INDEXED_STORE
3011 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3012 0U, // G_ATOMIC_CMPXCHG
3013 0U, // G_ATOMICRMW_XCHG
3014 0U, // G_ATOMICRMW_ADD
3015 0U, // G_ATOMICRMW_SUB
3016 0U, // G_ATOMICRMW_AND
3017 0U, // G_ATOMICRMW_NAND
3018 0U, // G_ATOMICRMW_OR
3019 0U, // G_ATOMICRMW_XOR
3020 0U, // G_ATOMICRMW_MAX
3021 0U, // G_ATOMICRMW_MIN
3022 0U, // G_ATOMICRMW_UMAX
3023 0U, // G_ATOMICRMW_UMIN
3024 0U, // G_ATOMICRMW_FADD
3025 0U, // G_ATOMICRMW_FSUB
3026 0U, // G_ATOMICRMW_FMAX
3027 0U, // G_ATOMICRMW_FMIN
3028 0U, // G_ATOMICRMW_UINC_WRAP
3029 0U, // G_ATOMICRMW_UDEC_WRAP
3030 0U, // G_FENCE
3031 0U, // G_PREFETCH
3032 0U, // G_BRCOND
3033 0U, // G_BRINDIRECT
3034 0U, // G_INVOKE_REGION_START
3035 0U, // G_INTRINSIC
3036 0U, // G_INTRINSIC_W_SIDE_EFFECTS
3037 0U, // G_INTRINSIC_CONVERGENT
3038 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3039 0U, // G_ANYEXT
3040 0U, // G_TRUNC
3041 0U, // G_CONSTANT
3042 0U, // G_FCONSTANT
3043 0U, // G_VASTART
3044 0U, // G_VAARG
3045 0U, // G_SEXT
3046 0U, // G_SEXT_INREG
3047 0U, // G_ZEXT
3048 0U, // G_SHL
3049 0U, // G_LSHR
3050 0U, // G_ASHR
3051 0U, // G_FSHL
3052 0U, // G_FSHR
3053 0U, // G_ROTR
3054 0U, // G_ROTL
3055 0U, // G_ICMP
3056 0U, // G_FCMP
3057 0U, // G_SCMP
3058 0U, // G_UCMP
3059 0U, // G_SELECT
3060 0U, // G_UADDO
3061 0U, // G_UADDE
3062 0U, // G_USUBO
3063 0U, // G_USUBE
3064 0U, // G_SADDO
3065 0U, // G_SADDE
3066 0U, // G_SSUBO
3067 0U, // G_SSUBE
3068 0U, // G_UMULO
3069 0U, // G_SMULO
3070 0U, // G_UMULH
3071 0U, // G_SMULH
3072 0U, // G_UADDSAT
3073 0U, // G_SADDSAT
3074 0U, // G_USUBSAT
3075 0U, // G_SSUBSAT
3076 0U, // G_USHLSAT
3077 0U, // G_SSHLSAT
3078 0U, // G_SMULFIX
3079 0U, // G_UMULFIX
3080 0U, // G_SMULFIXSAT
3081 0U, // G_UMULFIXSAT
3082 0U, // G_SDIVFIX
3083 0U, // G_UDIVFIX
3084 0U, // G_SDIVFIXSAT
3085 0U, // G_UDIVFIXSAT
3086 0U, // G_FADD
3087 0U, // G_FSUB
3088 0U, // G_FMUL
3089 0U, // G_FMA
3090 0U, // G_FMAD
3091 0U, // G_FDIV
3092 0U, // G_FREM
3093 0U, // G_FPOW
3094 0U, // G_FPOWI
3095 0U, // G_FEXP
3096 0U, // G_FEXP2
3097 0U, // G_FEXP10
3098 0U, // G_FLOG
3099 0U, // G_FLOG2
3100 0U, // G_FLOG10
3101 0U, // G_FLDEXP
3102 0U, // G_FFREXP
3103 0U, // G_FNEG
3104 0U, // G_FPEXT
3105 0U, // G_FPTRUNC
3106 0U, // G_FPTOSI
3107 0U, // G_FPTOUI
3108 0U, // G_SITOFP
3109 0U, // G_UITOFP
3110 0U, // G_FABS
3111 0U, // G_FCOPYSIGN
3112 0U, // G_IS_FPCLASS
3113 0U, // G_FCANONICALIZE
3114 0U, // G_FMINNUM
3115 0U, // G_FMAXNUM
3116 0U, // G_FMINNUM_IEEE
3117 0U, // G_FMAXNUM_IEEE
3118 0U, // G_FMINIMUM
3119 0U, // G_FMAXIMUM
3120 0U, // G_GET_FPENV
3121 0U, // G_SET_FPENV
3122 0U, // G_RESET_FPENV
3123 0U, // G_GET_FPMODE
3124 0U, // G_SET_FPMODE
3125 0U, // G_RESET_FPMODE
3126 0U, // G_PTR_ADD
3127 0U, // G_PTRMASK
3128 0U, // G_SMIN
3129 0U, // G_SMAX
3130 0U, // G_UMIN
3131 0U, // G_UMAX
3132 0U, // G_ABS
3133 0U, // G_LROUND
3134 0U, // G_LLROUND
3135 0U, // G_BR
3136 0U, // G_BRJT
3137 0U, // G_VSCALE
3138 0U, // G_INSERT_SUBVECTOR
3139 0U, // G_EXTRACT_SUBVECTOR
3140 0U, // G_INSERT_VECTOR_ELT
3141 0U, // G_EXTRACT_VECTOR_ELT
3142 0U, // G_SHUFFLE_VECTOR
3143 0U, // G_SPLAT_VECTOR
3144 0U, // G_VECTOR_COMPRESS
3145 0U, // G_CTTZ
3146 0U, // G_CTTZ_ZERO_UNDEF
3147 0U, // G_CTLZ
3148 0U, // G_CTLZ_ZERO_UNDEF
3149 0U, // G_CTPOP
3150 0U, // G_BSWAP
3151 0U, // G_BITREVERSE
3152 0U, // G_FCEIL
3153 0U, // G_FCOS
3154 0U, // G_FSIN
3155 0U, // G_FTAN
3156 0U, // G_FACOS
3157 0U, // G_FASIN
3158 0U, // G_FATAN
3159 0U, // G_FCOSH
3160 0U, // G_FSINH
3161 0U, // G_FTANH
3162 0U, // G_FSQRT
3163 0U, // G_FFLOOR
3164 0U, // G_FRINT
3165 0U, // G_FNEARBYINT
3166 0U, // G_ADDRSPACE_CAST
3167 0U, // G_BLOCK_ADDR
3168 0U, // G_JUMP_TABLE
3169 0U, // G_DYN_STACKALLOC
3170 0U, // G_STACKSAVE
3171 0U, // G_STACKRESTORE
3172 0U, // G_STRICT_FADD
3173 0U, // G_STRICT_FSUB
3174 0U, // G_STRICT_FMUL
3175 0U, // G_STRICT_FDIV
3176 0U, // G_STRICT_FREM
3177 0U, // G_STRICT_FMA
3178 0U, // G_STRICT_FSQRT
3179 0U, // G_STRICT_FLDEXP
3180 0U, // G_READ_REGISTER
3181 0U, // G_WRITE_REGISTER
3182 0U, // G_MEMCPY
3183 0U, // G_MEMCPY_INLINE
3184 0U, // G_MEMMOVE
3185 0U, // G_MEMSET
3186 0U, // G_BZERO
3187 0U, // G_TRAP
3188 0U, // G_DEBUGTRAP
3189 0U, // G_UBSANTRAP
3190 0U, // G_VECREDUCE_SEQ_FADD
3191 0U, // G_VECREDUCE_SEQ_FMUL
3192 0U, // G_VECREDUCE_FADD
3193 0U, // G_VECREDUCE_FMUL
3194 0U, // G_VECREDUCE_FMAX
3195 0U, // G_VECREDUCE_FMIN
3196 0U, // G_VECREDUCE_FMAXIMUM
3197 0U, // G_VECREDUCE_FMINIMUM
3198 0U, // G_VECREDUCE_ADD
3199 0U, // G_VECREDUCE_MUL
3200 0U, // G_VECREDUCE_AND
3201 0U, // G_VECREDUCE_OR
3202 0U, // G_VECREDUCE_XOR
3203 0U, // G_VECREDUCE_SMAX
3204 0U, // G_VECREDUCE_SMIN
3205 0U, // G_VECREDUCE_UMAX
3206 0U, // G_VECREDUCE_UMIN
3207 0U, // G_SBFX
3208 0U, // G_UBFX
3209 0U, // CALL_PARAMS
3210 0U, // CALL_PARAMS_S
3211 0U, // CALL_RESULTS
3212 0U, // CALL_RESULTS_S
3213 0U, // CATCHRET
3214 0U, // CATCHRET_S
3215 0U, // CLEANUPRET
3216 0U, // CLEANUPRET_S
3217 0U, // COMPILER_FENCE
3218 0U, // COMPILER_FENCE_S
3219 0U, // RET_CALL_RESULTS
3220 0U, // RET_CALL_RESULTS_S
3221 0U, // ABS_F16x8
3222 0U, // ABS_F16x8_S
3223 0U, // ABS_F32
3224 0U, // ABS_F32_S
3225 0U, // ABS_F32x4
3226 0U, // ABS_F32x4_S
3227 0U, // ABS_F64
3228 0U, // ABS_F64_S
3229 0U, // ABS_F64x2
3230 0U, // ABS_F64x2_S
3231 0U, // ABS_I16x8
3232 0U, // ABS_I16x8_S
3233 0U, // ABS_I32x4
3234 0U, // ABS_I32x4_S
3235 0U, // ABS_I64x2
3236 0U, // ABS_I64x2_S
3237 0U, // ABS_I8x16
3238 0U, // ABS_I8x16_S
3239 0U, // ADD_F16x8
3240 0U, // ADD_F16x8_S
3241 0U, // ADD_F32
3242 0U, // ADD_F32_S
3243 0U, // ADD_F32x4
3244 0U, // ADD_F32x4_S
3245 0U, // ADD_F64
3246 0U, // ADD_F64_S
3247 0U, // ADD_F64x2
3248 0U, // ADD_F64x2_S
3249 0U, // ADD_I16x8
3250 0U, // ADD_I16x8_S
3251 0U, // ADD_I32
3252 0U, // ADD_I32_S
3253 0U, // ADD_I32x4
3254 0U, // ADD_I32x4_S
3255 0U, // ADD_I64
3256 0U, // ADD_I64_S
3257 0U, // ADD_I64x2
3258 0U, // ADD_I64x2_S
3259 0U, // ADD_I8x16
3260 0U, // ADD_I8x16_S
3261 0U, // ADD_SAT_S_I16x8
3262 0U, // ADD_SAT_S_I16x8_S
3263 0U, // ADD_SAT_S_I8x16
3264 0U, // ADD_SAT_S_I8x16_S
3265 0U, // ADD_SAT_U_I16x8
3266 0U, // ADD_SAT_U_I16x8_S
3267 0U, // ADD_SAT_U_I8x16
3268 0U, // ADD_SAT_U_I8x16_S
3269 0U, // ADJCALLSTACKDOWN
3270 0U, // ADJCALLSTACKDOWN_S
3271 0U, // ADJCALLSTACKUP
3272 0U, // ADJCALLSTACKUP_S
3273 0U, // ALLTRUE_I16x8
3274 0U, // ALLTRUE_I16x8_S
3275 0U, // ALLTRUE_I32x4
3276 0U, // ALLTRUE_I32x4_S
3277 0U, // ALLTRUE_I64x2
3278 0U, // ALLTRUE_I64x2_S
3279 0U, // ALLTRUE_I8x16
3280 0U, // ALLTRUE_I8x16_S
3281 0U, // AND
3282 0U, // ANDNOT
3283 0U, // ANDNOT_S
3284 0U, // AND_I32
3285 0U, // AND_I32_S
3286 0U, // AND_I64
3287 0U, // AND_I64_S
3288 0U, // AND_S
3289 0U, // ANYTRUE
3290 0U, // ANYTRUE_S
3291 0U, // ARGUMENT_exnref
3292 0U, // ARGUMENT_exnref_S
3293 0U, // ARGUMENT_externref
3294 0U, // ARGUMENT_externref_S
3295 0U, // ARGUMENT_f32
3296 0U, // ARGUMENT_f32_S
3297 0U, // ARGUMENT_f64
3298 0U, // ARGUMENT_f64_S
3299 0U, // ARGUMENT_funcref
3300 0U, // ARGUMENT_funcref_S
3301 0U, // ARGUMENT_i32
3302 0U, // ARGUMENT_i32_S
3303 0U, // ARGUMENT_i64
3304 0U, // ARGUMENT_i64_S
3305 0U, // ARGUMENT_v16i8
3306 0U, // ARGUMENT_v16i8_S
3307 0U, // ARGUMENT_v2f64
3308 0U, // ARGUMENT_v2f64_S
3309 0U, // ARGUMENT_v2i64
3310 0U, // ARGUMENT_v2i64_S
3311 0U, // ARGUMENT_v4f32
3312 0U, // ARGUMENT_v4f32_S
3313 0U, // ARGUMENT_v4i32
3314 0U, // ARGUMENT_v4i32_S
3315 0U, // ARGUMENT_v8f16
3316 0U, // ARGUMENT_v8f16_S
3317 0U, // ARGUMENT_v8i16
3318 0U, // ARGUMENT_v8i16_S
3319 0U, // ATOMIC_FENCE
3320 0U, // ATOMIC_FENCE_S
3321 0U, // ATOMIC_LOAD16_U_I32_A32
3322 0U, // ATOMIC_LOAD16_U_I32_A32_S
3323 0U, // ATOMIC_LOAD16_U_I32_A64
3324 0U, // ATOMIC_LOAD16_U_I32_A64_S
3325 0U, // ATOMIC_LOAD16_U_I64_A32
3326 0U, // ATOMIC_LOAD16_U_I64_A32_S
3327 0U, // ATOMIC_LOAD16_U_I64_A64
3328 0U, // ATOMIC_LOAD16_U_I64_A64_S
3329 0U, // ATOMIC_LOAD32_U_I64_A32
3330 0U, // ATOMIC_LOAD32_U_I64_A32_S
3331 0U, // ATOMIC_LOAD32_U_I64_A64
3332 0U, // ATOMIC_LOAD32_U_I64_A64_S
3333 0U, // ATOMIC_LOAD8_U_I32_A32
3334 0U, // ATOMIC_LOAD8_U_I32_A32_S
3335 0U, // ATOMIC_LOAD8_U_I32_A64
3336 0U, // ATOMIC_LOAD8_U_I32_A64_S
3337 0U, // ATOMIC_LOAD8_U_I64_A32
3338 0U, // ATOMIC_LOAD8_U_I64_A32_S
3339 0U, // ATOMIC_LOAD8_U_I64_A64
3340 0U, // ATOMIC_LOAD8_U_I64_A64_S
3341 0U, // ATOMIC_LOAD_I32_A32
3342 0U, // ATOMIC_LOAD_I32_A32_S
3343 0U, // ATOMIC_LOAD_I32_A64
3344 0U, // ATOMIC_LOAD_I32_A64_S
3345 0U, // ATOMIC_LOAD_I64_A32
3346 0U, // ATOMIC_LOAD_I64_A32_S
3347 0U, // ATOMIC_LOAD_I64_A64
3348 0U, // ATOMIC_LOAD_I64_A64_S
3349 0U, // ATOMIC_RMW16_U_ADD_I32_A32
3350 0U, // ATOMIC_RMW16_U_ADD_I32_A32_S
3351 0U, // ATOMIC_RMW16_U_ADD_I32_A64
3352 0U, // ATOMIC_RMW16_U_ADD_I32_A64_S
3353 0U, // ATOMIC_RMW16_U_ADD_I64_A32
3354 0U, // ATOMIC_RMW16_U_ADD_I64_A32_S
3355 0U, // ATOMIC_RMW16_U_ADD_I64_A64
3356 0U, // ATOMIC_RMW16_U_ADD_I64_A64_S
3357 0U, // ATOMIC_RMW16_U_AND_I32_A32
3358 0U, // ATOMIC_RMW16_U_AND_I32_A32_S
3359 0U, // ATOMIC_RMW16_U_AND_I32_A64
3360 0U, // ATOMIC_RMW16_U_AND_I32_A64_S
3361 0U, // ATOMIC_RMW16_U_AND_I64_A32
3362 0U, // ATOMIC_RMW16_U_AND_I64_A32_S
3363 0U, // ATOMIC_RMW16_U_AND_I64_A64
3364 0U, // ATOMIC_RMW16_U_AND_I64_A64_S
3365 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32
3366 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A32_S
3367 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64
3368 0U, // ATOMIC_RMW16_U_CMPXCHG_I32_A64_S
3369 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32
3370 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A32_S
3371 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64
3372 0U, // ATOMIC_RMW16_U_CMPXCHG_I64_A64_S
3373 0U, // ATOMIC_RMW16_U_OR_I32_A32
3374 0U, // ATOMIC_RMW16_U_OR_I32_A32_S
3375 0U, // ATOMIC_RMW16_U_OR_I32_A64
3376 0U, // ATOMIC_RMW16_U_OR_I32_A64_S
3377 0U, // ATOMIC_RMW16_U_OR_I64_A32
3378 0U, // ATOMIC_RMW16_U_OR_I64_A32_S
3379 0U, // ATOMIC_RMW16_U_OR_I64_A64
3380 0U, // ATOMIC_RMW16_U_OR_I64_A64_S
3381 0U, // ATOMIC_RMW16_U_SUB_I32_A32
3382 0U, // ATOMIC_RMW16_U_SUB_I32_A32_S
3383 0U, // ATOMIC_RMW16_U_SUB_I32_A64
3384 0U, // ATOMIC_RMW16_U_SUB_I32_A64_S
3385 0U, // ATOMIC_RMW16_U_SUB_I64_A32
3386 0U, // ATOMIC_RMW16_U_SUB_I64_A32_S
3387 0U, // ATOMIC_RMW16_U_SUB_I64_A64
3388 0U, // ATOMIC_RMW16_U_SUB_I64_A64_S
3389 0U, // ATOMIC_RMW16_U_XCHG_I32_A32
3390 0U, // ATOMIC_RMW16_U_XCHG_I32_A32_S
3391 0U, // ATOMIC_RMW16_U_XCHG_I32_A64
3392 0U, // ATOMIC_RMW16_U_XCHG_I32_A64_S
3393 0U, // ATOMIC_RMW16_U_XCHG_I64_A32
3394 0U, // ATOMIC_RMW16_U_XCHG_I64_A32_S
3395 0U, // ATOMIC_RMW16_U_XCHG_I64_A64
3396 0U, // ATOMIC_RMW16_U_XCHG_I64_A64_S
3397 0U, // ATOMIC_RMW16_U_XOR_I32_A32
3398 0U, // ATOMIC_RMW16_U_XOR_I32_A32_S
3399 0U, // ATOMIC_RMW16_U_XOR_I32_A64
3400 0U, // ATOMIC_RMW16_U_XOR_I32_A64_S
3401 0U, // ATOMIC_RMW16_U_XOR_I64_A32
3402 0U, // ATOMIC_RMW16_U_XOR_I64_A32_S
3403 0U, // ATOMIC_RMW16_U_XOR_I64_A64
3404 0U, // ATOMIC_RMW16_U_XOR_I64_A64_S
3405 0U, // ATOMIC_RMW32_U_ADD_I64_A32
3406 0U, // ATOMIC_RMW32_U_ADD_I64_A32_S
3407 0U, // ATOMIC_RMW32_U_ADD_I64_A64
3408 0U, // ATOMIC_RMW32_U_ADD_I64_A64_S
3409 0U, // ATOMIC_RMW32_U_AND_I64_A32
3410 0U, // ATOMIC_RMW32_U_AND_I64_A32_S
3411 0U, // ATOMIC_RMW32_U_AND_I64_A64
3412 0U, // ATOMIC_RMW32_U_AND_I64_A64_S
3413 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32
3414 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A32_S
3415 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64
3416 0U, // ATOMIC_RMW32_U_CMPXCHG_I64_A64_S
3417 0U, // ATOMIC_RMW32_U_OR_I64_A32
3418 0U, // ATOMIC_RMW32_U_OR_I64_A32_S
3419 0U, // ATOMIC_RMW32_U_OR_I64_A64
3420 0U, // ATOMIC_RMW32_U_OR_I64_A64_S
3421 0U, // ATOMIC_RMW32_U_SUB_I64_A32
3422 0U, // ATOMIC_RMW32_U_SUB_I64_A32_S
3423 0U, // ATOMIC_RMW32_U_SUB_I64_A64
3424 0U, // ATOMIC_RMW32_U_SUB_I64_A64_S
3425 0U, // ATOMIC_RMW32_U_XCHG_I64_A32
3426 0U, // ATOMIC_RMW32_U_XCHG_I64_A32_S
3427 0U, // ATOMIC_RMW32_U_XCHG_I64_A64
3428 0U, // ATOMIC_RMW32_U_XCHG_I64_A64_S
3429 0U, // ATOMIC_RMW32_U_XOR_I64_A32
3430 0U, // ATOMIC_RMW32_U_XOR_I64_A32_S
3431 0U, // ATOMIC_RMW32_U_XOR_I64_A64
3432 0U, // ATOMIC_RMW32_U_XOR_I64_A64_S
3433 0U, // ATOMIC_RMW8_U_ADD_I32_A32
3434 0U, // ATOMIC_RMW8_U_ADD_I32_A32_S
3435 0U, // ATOMIC_RMW8_U_ADD_I32_A64
3436 0U, // ATOMIC_RMW8_U_ADD_I32_A64_S
3437 0U, // ATOMIC_RMW8_U_ADD_I64_A32
3438 0U, // ATOMIC_RMW8_U_ADD_I64_A32_S
3439 0U, // ATOMIC_RMW8_U_ADD_I64_A64
3440 0U, // ATOMIC_RMW8_U_ADD_I64_A64_S
3441 0U, // ATOMIC_RMW8_U_AND_I32_A32
3442 0U, // ATOMIC_RMW8_U_AND_I32_A32_S
3443 0U, // ATOMIC_RMW8_U_AND_I32_A64
3444 0U, // ATOMIC_RMW8_U_AND_I32_A64_S
3445 0U, // ATOMIC_RMW8_U_AND_I64_A32
3446 0U, // ATOMIC_RMW8_U_AND_I64_A32_S
3447 0U, // ATOMIC_RMW8_U_AND_I64_A64
3448 0U, // ATOMIC_RMW8_U_AND_I64_A64_S
3449 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32
3450 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A32_S
3451 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64
3452 0U, // ATOMIC_RMW8_U_CMPXCHG_I32_A64_S
3453 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32
3454 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A32_S
3455 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64
3456 0U, // ATOMIC_RMW8_U_CMPXCHG_I64_A64_S
3457 0U, // ATOMIC_RMW8_U_OR_I32_A32
3458 0U, // ATOMIC_RMW8_U_OR_I32_A32_S
3459 0U, // ATOMIC_RMW8_U_OR_I32_A64
3460 0U, // ATOMIC_RMW8_U_OR_I32_A64_S
3461 0U, // ATOMIC_RMW8_U_OR_I64_A32
3462 0U, // ATOMIC_RMW8_U_OR_I64_A32_S
3463 0U, // ATOMIC_RMW8_U_OR_I64_A64
3464 0U, // ATOMIC_RMW8_U_OR_I64_A64_S
3465 0U, // ATOMIC_RMW8_U_SUB_I32_A32
3466 0U, // ATOMIC_RMW8_U_SUB_I32_A32_S
3467 0U, // ATOMIC_RMW8_U_SUB_I32_A64
3468 0U, // ATOMIC_RMW8_U_SUB_I32_A64_S
3469 0U, // ATOMIC_RMW8_U_SUB_I64_A32
3470 0U, // ATOMIC_RMW8_U_SUB_I64_A32_S
3471 0U, // ATOMIC_RMW8_U_SUB_I64_A64
3472 0U, // ATOMIC_RMW8_U_SUB_I64_A64_S
3473 0U, // ATOMIC_RMW8_U_XCHG_I32_A32
3474 0U, // ATOMIC_RMW8_U_XCHG_I32_A32_S
3475 0U, // ATOMIC_RMW8_U_XCHG_I32_A64
3476 0U, // ATOMIC_RMW8_U_XCHG_I32_A64_S
3477 0U, // ATOMIC_RMW8_U_XCHG_I64_A32
3478 0U, // ATOMIC_RMW8_U_XCHG_I64_A32_S
3479 0U, // ATOMIC_RMW8_U_XCHG_I64_A64
3480 0U, // ATOMIC_RMW8_U_XCHG_I64_A64_S
3481 0U, // ATOMIC_RMW8_U_XOR_I32_A32
3482 0U, // ATOMIC_RMW8_U_XOR_I32_A32_S
3483 0U, // ATOMIC_RMW8_U_XOR_I32_A64
3484 0U, // ATOMIC_RMW8_U_XOR_I32_A64_S
3485 0U, // ATOMIC_RMW8_U_XOR_I64_A32
3486 0U, // ATOMIC_RMW8_U_XOR_I64_A32_S
3487 0U, // ATOMIC_RMW8_U_XOR_I64_A64
3488 0U, // ATOMIC_RMW8_U_XOR_I64_A64_S
3489 0U, // ATOMIC_RMW_ADD_I32_A32
3490 0U, // ATOMIC_RMW_ADD_I32_A32_S
3491 0U, // ATOMIC_RMW_ADD_I32_A64
3492 0U, // ATOMIC_RMW_ADD_I32_A64_S
3493 0U, // ATOMIC_RMW_ADD_I64_A32
3494 0U, // ATOMIC_RMW_ADD_I64_A32_S
3495 0U, // ATOMIC_RMW_ADD_I64_A64
3496 0U, // ATOMIC_RMW_ADD_I64_A64_S
3497 0U, // ATOMIC_RMW_AND_I32_A32
3498 0U, // ATOMIC_RMW_AND_I32_A32_S
3499 0U, // ATOMIC_RMW_AND_I32_A64
3500 0U, // ATOMIC_RMW_AND_I32_A64_S
3501 0U, // ATOMIC_RMW_AND_I64_A32
3502 0U, // ATOMIC_RMW_AND_I64_A32_S
3503 0U, // ATOMIC_RMW_AND_I64_A64
3504 0U, // ATOMIC_RMW_AND_I64_A64_S
3505 0U, // ATOMIC_RMW_CMPXCHG_I32_A32
3506 0U, // ATOMIC_RMW_CMPXCHG_I32_A32_S
3507 0U, // ATOMIC_RMW_CMPXCHG_I32_A64
3508 0U, // ATOMIC_RMW_CMPXCHG_I32_A64_S
3509 0U, // ATOMIC_RMW_CMPXCHG_I64_A32
3510 0U, // ATOMIC_RMW_CMPXCHG_I64_A32_S
3511 0U, // ATOMIC_RMW_CMPXCHG_I64_A64
3512 0U, // ATOMIC_RMW_CMPXCHG_I64_A64_S
3513 0U, // ATOMIC_RMW_OR_I32_A32
3514 0U, // ATOMIC_RMW_OR_I32_A32_S
3515 0U, // ATOMIC_RMW_OR_I32_A64
3516 0U, // ATOMIC_RMW_OR_I32_A64_S
3517 0U, // ATOMIC_RMW_OR_I64_A32
3518 0U, // ATOMIC_RMW_OR_I64_A32_S
3519 0U, // ATOMIC_RMW_OR_I64_A64
3520 0U, // ATOMIC_RMW_OR_I64_A64_S
3521 0U, // ATOMIC_RMW_SUB_I32_A32
3522 0U, // ATOMIC_RMW_SUB_I32_A32_S
3523 0U, // ATOMIC_RMW_SUB_I32_A64
3524 0U, // ATOMIC_RMW_SUB_I32_A64_S
3525 0U, // ATOMIC_RMW_SUB_I64_A32
3526 0U, // ATOMIC_RMW_SUB_I64_A32_S
3527 0U, // ATOMIC_RMW_SUB_I64_A64
3528 0U, // ATOMIC_RMW_SUB_I64_A64_S
3529 0U, // ATOMIC_RMW_XCHG_I32_A32
3530 0U, // ATOMIC_RMW_XCHG_I32_A32_S
3531 0U, // ATOMIC_RMW_XCHG_I32_A64
3532 0U, // ATOMIC_RMW_XCHG_I32_A64_S
3533 0U, // ATOMIC_RMW_XCHG_I64_A32
3534 0U, // ATOMIC_RMW_XCHG_I64_A32_S
3535 0U, // ATOMIC_RMW_XCHG_I64_A64
3536 0U, // ATOMIC_RMW_XCHG_I64_A64_S
3537 0U, // ATOMIC_RMW_XOR_I32_A32
3538 0U, // ATOMIC_RMW_XOR_I32_A32_S
3539 0U, // ATOMIC_RMW_XOR_I32_A64
3540 0U, // ATOMIC_RMW_XOR_I32_A64_S
3541 0U, // ATOMIC_RMW_XOR_I64_A32
3542 0U, // ATOMIC_RMW_XOR_I64_A32_S
3543 0U, // ATOMIC_RMW_XOR_I64_A64
3544 0U, // ATOMIC_RMW_XOR_I64_A64_S
3545 0U, // ATOMIC_STORE16_I32_A32
3546 0U, // ATOMIC_STORE16_I32_A32_S
3547 0U, // ATOMIC_STORE16_I32_A64
3548 0U, // ATOMIC_STORE16_I32_A64_S
3549 0U, // ATOMIC_STORE16_I64_A32
3550 0U, // ATOMIC_STORE16_I64_A32_S
3551 0U, // ATOMIC_STORE16_I64_A64
3552 0U, // ATOMIC_STORE16_I64_A64_S
3553 0U, // ATOMIC_STORE32_I64_A32
3554 0U, // ATOMIC_STORE32_I64_A32_S
3555 0U, // ATOMIC_STORE32_I64_A64
3556 0U, // ATOMIC_STORE32_I64_A64_S
3557 0U, // ATOMIC_STORE8_I32_A32
3558 0U, // ATOMIC_STORE8_I32_A32_S
3559 0U, // ATOMIC_STORE8_I32_A64
3560 0U, // ATOMIC_STORE8_I32_A64_S
3561 0U, // ATOMIC_STORE8_I64_A32
3562 0U, // ATOMIC_STORE8_I64_A32_S
3563 0U, // ATOMIC_STORE8_I64_A64
3564 0U, // ATOMIC_STORE8_I64_A64_S
3565 0U, // ATOMIC_STORE_I32_A32
3566 0U, // ATOMIC_STORE_I32_A32_S
3567 0U, // ATOMIC_STORE_I32_A64
3568 0U, // ATOMIC_STORE_I32_A64_S
3569 0U, // ATOMIC_STORE_I64_A32
3570 0U, // ATOMIC_STORE_I64_A32_S
3571 0U, // ATOMIC_STORE_I64_A64
3572 0U, // ATOMIC_STORE_I64_A64_S
3573 0U, // AVGR_U_I16x8
3574 0U, // AVGR_U_I16x8_S
3575 0U, // AVGR_U_I8x16
3576 0U, // AVGR_U_I8x16_S
3577 0U, // BITMASK_I16x8
3578 0U, // BITMASK_I16x8_S
3579 0U, // BITMASK_I32x4
3580 0U, // BITMASK_I32x4_S
3581 0U, // BITMASK_I64x2
3582 0U, // BITMASK_I64x2_S
3583 0U, // BITMASK_I8x16
3584 0U, // BITMASK_I8x16_S
3585 0U, // BITSELECT
3586 0U, // BITSELECT_S
3587 0U, // BLOCK
3588 0U, // BLOCK_S
3589 0U, // BR
3590 0U, // BR_IF
3591 0U, // BR_IF_S
3592 0U, // BR_S
3593 0U, // BR_TABLE_I32
3594 0U, // BR_TABLE_I32_S
3595 0U, // BR_TABLE_I64
3596 0U, // BR_TABLE_I64_S
3597 0U, // BR_UNLESS
3598 0U, // BR_UNLESS_S
3599 0U, // CALL
3600 0U, // CALL_INDIRECT
3601 0U, // CALL_INDIRECT_S
3602 0U, // CALL_S
3603 0U, // CATCH
3604 0U, // CATCH_ALL
3605 0U, // CATCH_ALL_S
3606 0U, // CATCH_S
3607 0U, // CEIL_F16x8
3608 0U, // CEIL_F16x8_S
3609 0U, // CEIL_F32
3610 0U, // CEIL_F32_S
3611 0U, // CEIL_F32x4
3612 0U, // CEIL_F32x4_S
3613 0U, // CEIL_F64
3614 0U, // CEIL_F64_S
3615 0U, // CEIL_F64x2
3616 0U, // CEIL_F64x2_S
3617 0U, // CLZ_I32
3618 0U, // CLZ_I32_S
3619 0U, // CLZ_I64
3620 0U, // CLZ_I64_S
3621 0U, // CONST_F32
3622 0U, // CONST_F32_S
3623 0U, // CONST_F64
3624 0U, // CONST_F64_S
3625 0U, // CONST_I32
3626 0U, // CONST_I32_S
3627 0U, // CONST_I64
3628 0U, // CONST_I64_S
3629 0U, // CONST_V128_F32x4
3630 0U, // CONST_V128_F32x4_S
3631 0U, // CONST_V128_F64x2
3632 0U, // CONST_V128_F64x2_S
3633 0U, // CONST_V128_I16x8
3634 0U, // CONST_V128_I16x8_S
3635 0U, // CONST_V128_I32x4
3636 0U, // CONST_V128_I32x4_S
3637 0U, // CONST_V128_I64x2
3638 0U, // CONST_V128_I64x2_S
3639 0U, // CONST_V128_I8x16
3640 0U, // CONST_V128_I8x16_S
3641 0U, // COPYSIGN_F32
3642 0U, // COPYSIGN_F32_S
3643 0U, // COPYSIGN_F64
3644 0U, // COPYSIGN_F64_S
3645 0U, // COPY_EXNREF
3646 0U, // COPY_EXNREF_S
3647 0U, // COPY_EXTERNREF
3648 0U, // COPY_EXTERNREF_S
3649 0U, // COPY_F32
3650 0U, // COPY_F32_S
3651 0U, // COPY_F64
3652 0U, // COPY_F64_S
3653 0U, // COPY_FUNCREF
3654 0U, // COPY_FUNCREF_S
3655 0U, // COPY_I32
3656 0U, // COPY_I32_S
3657 0U, // COPY_I64
3658 0U, // COPY_I64_S
3659 0U, // COPY_V128
3660 0U, // COPY_V128_S
3661 0U, // CTZ_I32
3662 0U, // CTZ_I32_S
3663 0U, // CTZ_I64
3664 0U, // CTZ_I64_S
3665 0U, // DEBUG_UNREACHABLE
3666 0U, // DEBUG_UNREACHABLE_S
3667 0U, // DELEGATE
3668 0U, // DELEGATE_S
3669 0U, // DIV_F16x8
3670 0U, // DIV_F16x8_S
3671 0U, // DIV_F32
3672 0U, // DIV_F32_S
3673 0U, // DIV_F32x4
3674 0U, // DIV_F32x4_S
3675 0U, // DIV_F64
3676 0U, // DIV_F64_S
3677 0U, // DIV_F64x2
3678 0U, // DIV_F64x2_S
3679 0U, // DIV_S_I32
3680 0U, // DIV_S_I32_S
3681 0U, // DIV_S_I64
3682 0U, // DIV_S_I64_S
3683 0U, // DIV_U_I32
3684 0U, // DIV_U_I32_S
3685 0U, // DIV_U_I64
3686 0U, // DIV_U_I64_S
3687 0U, // DOT
3688 0U, // DOT_S
3689 0U, // DROP_EXNREF
3690 0U, // DROP_EXNREF_S
3691 0U, // DROP_EXTERNREF
3692 0U, // DROP_EXTERNREF_S
3693 0U, // DROP_F32
3694 0U, // DROP_F32_S
3695 0U, // DROP_F64
3696 0U, // DROP_F64_S
3697 0U, // DROP_FUNCREF
3698 0U, // DROP_FUNCREF_S
3699 0U, // DROP_I32
3700 0U, // DROP_I32_S
3701 0U, // DROP_I64
3702 0U, // DROP_I64_S
3703 0U, // DROP_V128
3704 0U, // DROP_V128_S
3705 0U, // ELSE
3706 0U, // ELSE_S
3707 0U, // END
3708 0U, // END_BLOCK
3709 0U, // END_BLOCK_S
3710 0U, // END_FUNCTION
3711 0U, // END_FUNCTION_S
3712 0U, // END_IF
3713 0U, // END_IF_S
3714 0U, // END_LOOP
3715 0U, // END_LOOP_S
3716 0U, // END_S
3717 0U, // END_TRY
3718 0U, // END_TRY_S
3719 0U, // EQZ_I32
3720 0U, // EQZ_I32_S
3721 0U, // EQZ_I64
3722 0U, // EQZ_I64_S
3723 0U, // EQ_F16x8
3724 0U, // EQ_F16x8_S
3725 0U, // EQ_F32
3726 0U, // EQ_F32_S
3727 0U, // EQ_F32x4
3728 0U, // EQ_F32x4_S
3729 0U, // EQ_F64
3730 0U, // EQ_F64_S
3731 0U, // EQ_F64x2
3732 0U, // EQ_F64x2_S
3733 0U, // EQ_I16x8
3734 0U, // EQ_I16x8_S
3735 0U, // EQ_I32
3736 0U, // EQ_I32_S
3737 0U, // EQ_I32x4
3738 0U, // EQ_I32x4_S
3739 0U, // EQ_I64
3740 0U, // EQ_I64_S
3741 0U, // EQ_I64x2
3742 0U, // EQ_I64x2_S
3743 0U, // EQ_I8x16
3744 0U, // EQ_I8x16_S
3745 0U, // EXTMUL_HIGH_S_I16x8
3746 0U, // EXTMUL_HIGH_S_I16x8_S
3747 0U, // EXTMUL_HIGH_S_I32x4
3748 0U, // EXTMUL_HIGH_S_I32x4_S
3749 0U, // EXTMUL_HIGH_S_I64x2
3750 0U, // EXTMUL_HIGH_S_I64x2_S
3751 0U, // EXTMUL_HIGH_U_I16x8
3752 0U, // EXTMUL_HIGH_U_I16x8_S
3753 0U, // EXTMUL_HIGH_U_I32x4
3754 0U, // EXTMUL_HIGH_U_I32x4_S
3755 0U, // EXTMUL_HIGH_U_I64x2
3756 0U, // EXTMUL_HIGH_U_I64x2_S
3757 0U, // EXTMUL_LOW_S_I16x8
3758 0U, // EXTMUL_LOW_S_I16x8_S
3759 0U, // EXTMUL_LOW_S_I32x4
3760 0U, // EXTMUL_LOW_S_I32x4_S
3761 0U, // EXTMUL_LOW_S_I64x2
3762 0U, // EXTMUL_LOW_S_I64x2_S
3763 0U, // EXTMUL_LOW_U_I16x8
3764 0U, // EXTMUL_LOW_U_I16x8_S
3765 0U, // EXTMUL_LOW_U_I32x4
3766 0U, // EXTMUL_LOW_U_I32x4_S
3767 0U, // EXTMUL_LOW_U_I64x2
3768 0U, // EXTMUL_LOW_U_I64x2_S
3769 0U, // EXTRACT_LANE_F16x8
3770 0U, // EXTRACT_LANE_F16x8_S
3771 0U, // EXTRACT_LANE_F32x4
3772 0U, // EXTRACT_LANE_F32x4_S
3773 0U, // EXTRACT_LANE_F64x2
3774 0U, // EXTRACT_LANE_F64x2_S
3775 0U, // EXTRACT_LANE_I16x8_s
3776 0U, // EXTRACT_LANE_I16x8_s_S
3777 0U, // EXTRACT_LANE_I16x8_u
3778 0U, // EXTRACT_LANE_I16x8_u_S
3779 0U, // EXTRACT_LANE_I32x4
3780 0U, // EXTRACT_LANE_I32x4_S
3781 0U, // EXTRACT_LANE_I64x2
3782 0U, // EXTRACT_LANE_I64x2_S
3783 0U, // EXTRACT_LANE_I8x16_s
3784 0U, // EXTRACT_LANE_I8x16_s_S
3785 0U, // EXTRACT_LANE_I8x16_u
3786 0U, // EXTRACT_LANE_I8x16_u_S
3787 0U, // F32_CONVERT_S_I32
3788 0U, // F32_CONVERT_S_I32_S
3789 0U, // F32_CONVERT_S_I64
3790 0U, // F32_CONVERT_S_I64_S
3791 0U, // F32_CONVERT_U_I32
3792 0U, // F32_CONVERT_U_I32_S
3793 0U, // F32_CONVERT_U_I64
3794 0U, // F32_CONVERT_U_I64_S
3795 0U, // F32_DEMOTE_F64
3796 0U, // F32_DEMOTE_F64_S
3797 0U, // F32_REINTERPRET_I32
3798 0U, // F32_REINTERPRET_I32_S
3799 0U, // F64_CONVERT_S_I32
3800 0U, // F64_CONVERT_S_I32_S
3801 0U, // F64_CONVERT_S_I64
3802 0U, // F64_CONVERT_S_I64_S
3803 0U, // F64_CONVERT_U_I32
3804 0U, // F64_CONVERT_U_I32_S
3805 0U, // F64_CONVERT_U_I64
3806 0U, // F64_CONVERT_U_I64_S
3807 0U, // F64_PROMOTE_F32
3808 0U, // F64_PROMOTE_F32_S
3809 0U, // F64_REINTERPRET_I64
3810 0U, // F64_REINTERPRET_I64_S
3811 0U, // FALLTHROUGH_RETURN
3812 0U, // FALLTHROUGH_RETURN_S
3813 0U, // FLOOR_F16x8
3814 0U, // FLOOR_F16x8_S
3815 0U, // FLOOR_F32
3816 0U, // FLOOR_F32_S
3817 0U, // FLOOR_F32x4
3818 0U, // FLOOR_F32x4_S
3819 0U, // FLOOR_F64
3820 0U, // FLOOR_F64_S
3821 0U, // FLOOR_F64x2
3822 0U, // FLOOR_F64x2_S
3823 0U, // FP_TO_SINT_I32_F32
3824 0U, // FP_TO_SINT_I32_F32_S
3825 0U, // FP_TO_SINT_I32_F64
3826 0U, // FP_TO_SINT_I32_F64_S
3827 0U, // FP_TO_SINT_I64_F32
3828 0U, // FP_TO_SINT_I64_F32_S
3829 0U, // FP_TO_SINT_I64_F64
3830 0U, // FP_TO_SINT_I64_F64_S
3831 0U, // FP_TO_UINT_I32_F32
3832 0U, // FP_TO_UINT_I32_F32_S
3833 0U, // FP_TO_UINT_I32_F64
3834 0U, // FP_TO_UINT_I32_F64_S
3835 0U, // FP_TO_UINT_I64_F32
3836 0U, // FP_TO_UINT_I64_F32_S
3837 0U, // FP_TO_UINT_I64_F64
3838 0U, // FP_TO_UINT_I64_F64_S
3839 0U, // GE_F16x8
3840 0U, // GE_F16x8_S
3841 0U, // GE_F32
3842 0U, // GE_F32_S
3843 0U, // GE_F32x4
3844 0U, // GE_F32x4_S
3845 0U, // GE_F64
3846 0U, // GE_F64_S
3847 0U, // GE_F64x2
3848 0U, // GE_F64x2_S
3849 0U, // GE_S_I16x8
3850 0U, // GE_S_I16x8_S
3851 0U, // GE_S_I32
3852 0U, // GE_S_I32_S
3853 0U, // GE_S_I32x4
3854 0U, // GE_S_I32x4_S
3855 0U, // GE_S_I64
3856 0U, // GE_S_I64_S
3857 0U, // GE_S_I64x2
3858 0U, // GE_S_I64x2_S
3859 0U, // GE_S_I8x16
3860 0U, // GE_S_I8x16_S
3861 0U, // GE_U_I16x8
3862 0U, // GE_U_I16x8_S
3863 0U, // GE_U_I32
3864 0U, // GE_U_I32_S
3865 0U, // GE_U_I32x4
3866 0U, // GE_U_I32x4_S
3867 0U, // GE_U_I64
3868 0U, // GE_U_I64_S
3869 0U, // GE_U_I8x16
3870 0U, // GE_U_I8x16_S
3871 0U, // GLOBAL_GET_EXNREF
3872 0U, // GLOBAL_GET_EXNREF_S
3873 0U, // GLOBAL_GET_EXTERNREF
3874 0U, // GLOBAL_GET_EXTERNREF_S
3875 0U, // GLOBAL_GET_F32
3876 0U, // GLOBAL_GET_F32_S
3877 0U, // GLOBAL_GET_F64
3878 0U, // GLOBAL_GET_F64_S
3879 0U, // GLOBAL_GET_FUNCREF
3880 0U, // GLOBAL_GET_FUNCREF_S
3881 0U, // GLOBAL_GET_I32
3882 0U, // GLOBAL_GET_I32_S
3883 0U, // GLOBAL_GET_I64
3884 0U, // GLOBAL_GET_I64_S
3885 0U, // GLOBAL_GET_V128
3886 0U, // GLOBAL_GET_V128_S
3887 0U, // GLOBAL_SET_EXNREF
3888 0U, // GLOBAL_SET_EXNREF_S
3889 0U, // GLOBAL_SET_EXTERNREF
3890 0U, // GLOBAL_SET_EXTERNREF_S
3891 0U, // GLOBAL_SET_F32
3892 0U, // GLOBAL_SET_F32_S
3893 0U, // GLOBAL_SET_F64
3894 0U, // GLOBAL_SET_F64_S
3895 0U, // GLOBAL_SET_FUNCREF
3896 0U, // GLOBAL_SET_FUNCREF_S
3897 0U, // GLOBAL_SET_I32
3898 0U, // GLOBAL_SET_I32_S
3899 0U, // GLOBAL_SET_I64
3900 0U, // GLOBAL_SET_I64_S
3901 0U, // GLOBAL_SET_V128
3902 0U, // GLOBAL_SET_V128_S
3903 0U, // GT_F16x8
3904 0U, // GT_F16x8_S
3905 0U, // GT_F32
3906 0U, // GT_F32_S
3907 0U, // GT_F32x4
3908 0U, // GT_F32x4_S
3909 0U, // GT_F64
3910 0U, // GT_F64_S
3911 0U, // GT_F64x2
3912 0U, // GT_F64x2_S
3913 0U, // GT_S_I16x8
3914 0U, // GT_S_I16x8_S
3915 0U, // GT_S_I32
3916 0U, // GT_S_I32_S
3917 0U, // GT_S_I32x4
3918 0U, // GT_S_I32x4_S
3919 0U, // GT_S_I64
3920 0U, // GT_S_I64_S
3921 0U, // GT_S_I64x2
3922 0U, // GT_S_I64x2_S
3923 0U, // GT_S_I8x16
3924 0U, // GT_S_I8x16_S
3925 0U, // GT_U_I16x8
3926 0U, // GT_U_I16x8_S
3927 0U, // GT_U_I32
3928 0U, // GT_U_I32_S
3929 0U, // GT_U_I32x4
3930 0U, // GT_U_I32x4_S
3931 0U, // GT_U_I64
3932 0U, // GT_U_I64_S
3933 0U, // GT_U_I8x16
3934 0U, // GT_U_I8x16_S
3935 0U, // I32_EXTEND16_S_I32
3936 0U, // I32_EXTEND16_S_I32_S
3937 0U, // I32_EXTEND8_S_I32
3938 0U, // I32_EXTEND8_S_I32_S
3939 0U, // I32_REINTERPRET_F32
3940 0U, // I32_REINTERPRET_F32_S
3941 0U, // I32_TRUNC_S_F32
3942 0U, // I32_TRUNC_S_F32_S
3943 0U, // I32_TRUNC_S_F64
3944 0U, // I32_TRUNC_S_F64_S
3945 0U, // I32_TRUNC_S_SAT_F32
3946 0U, // I32_TRUNC_S_SAT_F32_S
3947 0U, // I32_TRUNC_S_SAT_F64
3948 0U, // I32_TRUNC_S_SAT_F64_S
3949 0U, // I32_TRUNC_U_F32
3950 0U, // I32_TRUNC_U_F32_S
3951 0U, // I32_TRUNC_U_F64
3952 0U, // I32_TRUNC_U_F64_S
3953 0U, // I32_TRUNC_U_SAT_F32
3954 0U, // I32_TRUNC_U_SAT_F32_S
3955 0U, // I32_TRUNC_U_SAT_F64
3956 0U, // I32_TRUNC_U_SAT_F64_S
3957 0U, // I32_WRAP_I64
3958 0U, // I32_WRAP_I64_S
3959 0U, // I64_EXTEND16_S_I64
3960 0U, // I64_EXTEND16_S_I64_S
3961 0U, // I64_EXTEND32_S_I64
3962 0U, // I64_EXTEND32_S_I64_S
3963 0U, // I64_EXTEND8_S_I64
3964 0U, // I64_EXTEND8_S_I64_S
3965 0U, // I64_EXTEND_S_I32
3966 0U, // I64_EXTEND_S_I32_S
3967 0U, // I64_EXTEND_U_I32
3968 0U, // I64_EXTEND_U_I32_S
3969 0U, // I64_REINTERPRET_F64
3970 0U, // I64_REINTERPRET_F64_S
3971 0U, // I64_TRUNC_S_F32
3972 0U, // I64_TRUNC_S_F32_S
3973 0U, // I64_TRUNC_S_F64
3974 0U, // I64_TRUNC_S_F64_S
3975 0U, // I64_TRUNC_S_SAT_F32
3976 0U, // I64_TRUNC_S_SAT_F32_S
3977 0U, // I64_TRUNC_S_SAT_F64
3978 0U, // I64_TRUNC_S_SAT_F64_S
3979 0U, // I64_TRUNC_U_F32
3980 0U, // I64_TRUNC_U_F32_S
3981 0U, // I64_TRUNC_U_F64
3982 0U, // I64_TRUNC_U_F64_S
3983 0U, // I64_TRUNC_U_SAT_F32
3984 0U, // I64_TRUNC_U_SAT_F32_S
3985 0U, // I64_TRUNC_U_SAT_F64
3986 0U, // I64_TRUNC_U_SAT_F64_S
3987 0U, // IF
3988 0U, // IF_S
3989 0U, // LANESELECT_I16x8
3990 0U, // LANESELECT_I16x8_S
3991 0U, // LANESELECT_I32x4
3992 0U, // LANESELECT_I32x4_S
3993 0U, // LANESELECT_I64x2
3994 0U, // LANESELECT_I64x2_S
3995 0U, // LANESELECT_I8x16
3996 0U, // LANESELECT_I8x16_S
3997 0U, // LE_F16x8
3998 0U, // LE_F16x8_S
3999 0U, // LE_F32
4000 0U, // LE_F32_S
4001 0U, // LE_F32x4
4002 0U, // LE_F32x4_S
4003 0U, // LE_F64
4004 0U, // LE_F64_S
4005 0U, // LE_F64x2
4006 0U, // LE_F64x2_S
4007 0U, // LE_S_I16x8
4008 0U, // LE_S_I16x8_S
4009 0U, // LE_S_I32
4010 0U, // LE_S_I32_S
4011 0U, // LE_S_I32x4
4012 0U, // LE_S_I32x4_S
4013 0U, // LE_S_I64
4014 0U, // LE_S_I64_S
4015 0U, // LE_S_I64x2
4016 0U, // LE_S_I64x2_S
4017 0U, // LE_S_I8x16
4018 0U, // LE_S_I8x16_S
4019 0U, // LE_U_I16x8
4020 0U, // LE_U_I16x8_S
4021 0U, // LE_U_I32
4022 0U, // LE_U_I32_S
4023 0U, // LE_U_I32x4
4024 0U, // LE_U_I32x4_S
4025 0U, // LE_U_I64
4026 0U, // LE_U_I64_S
4027 0U, // LE_U_I8x16
4028 0U, // LE_U_I8x16_S
4029 0U, // LOAD16_SPLAT_A32
4030 0U, // LOAD16_SPLAT_A32_S
4031 0U, // LOAD16_SPLAT_A64
4032 0U, // LOAD16_SPLAT_A64_S
4033 0U, // LOAD16_S_I32_A32
4034 0U, // LOAD16_S_I32_A32_S
4035 0U, // LOAD16_S_I32_A64
4036 0U, // LOAD16_S_I32_A64_S
4037 0U, // LOAD16_S_I64_A32
4038 0U, // LOAD16_S_I64_A32_S
4039 0U, // LOAD16_S_I64_A64
4040 0U, // LOAD16_S_I64_A64_S
4041 0U, // LOAD16_U_I32_A32
4042 0U, // LOAD16_U_I32_A32_S
4043 0U, // LOAD16_U_I32_A64
4044 0U, // LOAD16_U_I32_A64_S
4045 0U, // LOAD16_U_I64_A32
4046 0U, // LOAD16_U_I64_A32_S
4047 0U, // LOAD16_U_I64_A64
4048 0U, // LOAD16_U_I64_A64_S
4049 0U, // LOAD32_SPLAT_A32
4050 0U, // LOAD32_SPLAT_A32_S
4051 0U, // LOAD32_SPLAT_A64
4052 0U, // LOAD32_SPLAT_A64_S
4053 0U, // LOAD32_S_I64_A32
4054 0U, // LOAD32_S_I64_A32_S
4055 0U, // LOAD32_S_I64_A64
4056 0U, // LOAD32_S_I64_A64_S
4057 0U, // LOAD32_U_I64_A32
4058 0U, // LOAD32_U_I64_A32_S
4059 0U, // LOAD32_U_I64_A64
4060 0U, // LOAD32_U_I64_A64_S
4061 0U, // LOAD64_SPLAT_A32
4062 0U, // LOAD64_SPLAT_A32_S
4063 0U, // LOAD64_SPLAT_A64
4064 0U, // LOAD64_SPLAT_A64_S
4065 0U, // LOAD8_SPLAT_A32
4066 0U, // LOAD8_SPLAT_A32_S
4067 0U, // LOAD8_SPLAT_A64
4068 0U, // LOAD8_SPLAT_A64_S
4069 0U, // LOAD8_S_I32_A32
4070 0U, // LOAD8_S_I32_A32_S
4071 0U, // LOAD8_S_I32_A64
4072 0U, // LOAD8_S_I32_A64_S
4073 0U, // LOAD8_S_I64_A32
4074 0U, // LOAD8_S_I64_A32_S
4075 0U, // LOAD8_S_I64_A64
4076 0U, // LOAD8_S_I64_A64_S
4077 0U, // LOAD8_U_I32_A32
4078 0U, // LOAD8_U_I32_A32_S
4079 0U, // LOAD8_U_I32_A64
4080 0U, // LOAD8_U_I32_A64_S
4081 0U, // LOAD8_U_I64_A32
4082 0U, // LOAD8_U_I64_A32_S
4083 0U, // LOAD8_U_I64_A64
4084 0U, // LOAD8_U_I64_A64_S
4085 0U, // LOAD_EXTEND_S_I16x8_A32
4086 0U, // LOAD_EXTEND_S_I16x8_A32_S
4087 0U, // LOAD_EXTEND_S_I16x8_A64
4088 0U, // LOAD_EXTEND_S_I16x8_A64_S
4089 0U, // LOAD_EXTEND_S_I32x4_A32
4090 0U, // LOAD_EXTEND_S_I32x4_A32_S
4091 0U, // LOAD_EXTEND_S_I32x4_A64
4092 0U, // LOAD_EXTEND_S_I32x4_A64_S
4093 0U, // LOAD_EXTEND_S_I64x2_A32
4094 0U, // LOAD_EXTEND_S_I64x2_A32_S
4095 0U, // LOAD_EXTEND_S_I64x2_A64
4096 0U, // LOAD_EXTEND_S_I64x2_A64_S
4097 0U, // LOAD_EXTEND_U_I16x8_A32
4098 0U, // LOAD_EXTEND_U_I16x8_A32_S
4099 0U, // LOAD_EXTEND_U_I16x8_A64
4100 0U, // LOAD_EXTEND_U_I16x8_A64_S
4101 0U, // LOAD_EXTEND_U_I32x4_A32
4102 0U, // LOAD_EXTEND_U_I32x4_A32_S
4103 0U, // LOAD_EXTEND_U_I32x4_A64
4104 0U, // LOAD_EXTEND_U_I32x4_A64_S
4105 0U, // LOAD_EXTEND_U_I64x2_A32
4106 0U, // LOAD_EXTEND_U_I64x2_A32_S
4107 0U, // LOAD_EXTEND_U_I64x2_A64
4108 0U, // LOAD_EXTEND_U_I64x2_A64_S
4109 0U, // LOAD_F16_F32_A32
4110 0U, // LOAD_F16_F32_A32_S
4111 0U, // LOAD_F16_F32_A64
4112 0U, // LOAD_F16_F32_A64_S
4113 0U, // LOAD_F32_A32
4114 0U, // LOAD_F32_A32_S
4115 0U, // LOAD_F32_A64
4116 0U, // LOAD_F32_A64_S
4117 0U, // LOAD_F64_A32
4118 0U, // LOAD_F64_A32_S
4119 0U, // LOAD_F64_A64
4120 0U, // LOAD_F64_A64_S
4121 0U, // LOAD_I32_A32
4122 0U, // LOAD_I32_A32_S
4123 0U, // LOAD_I32_A64
4124 0U, // LOAD_I32_A64_S
4125 0U, // LOAD_I64_A32
4126 0U, // LOAD_I64_A32_S
4127 0U, // LOAD_I64_A64
4128 0U, // LOAD_I64_A64_S
4129 0U, // LOAD_LANE_I16x8_A32
4130 0U, // LOAD_LANE_I16x8_A32_S
4131 0U, // LOAD_LANE_I16x8_A64
4132 0U, // LOAD_LANE_I16x8_A64_S
4133 0U, // LOAD_LANE_I32x4_A32
4134 0U, // LOAD_LANE_I32x4_A32_S
4135 0U, // LOAD_LANE_I32x4_A64
4136 0U, // LOAD_LANE_I32x4_A64_S
4137 0U, // LOAD_LANE_I64x2_A32
4138 0U, // LOAD_LANE_I64x2_A32_S
4139 0U, // LOAD_LANE_I64x2_A64
4140 0U, // LOAD_LANE_I64x2_A64_S
4141 0U, // LOAD_LANE_I8x16_A32
4142 0U, // LOAD_LANE_I8x16_A32_S
4143 0U, // LOAD_LANE_I8x16_A64
4144 0U, // LOAD_LANE_I8x16_A64_S
4145 0U, // LOAD_V128_A32
4146 0U, // LOAD_V128_A32_S
4147 0U, // LOAD_V128_A64
4148 0U, // LOAD_V128_A64_S
4149 0U, // LOAD_ZERO_I32x4_A32
4150 0U, // LOAD_ZERO_I32x4_A32_S
4151 0U, // LOAD_ZERO_I32x4_A64
4152 0U, // LOAD_ZERO_I32x4_A64_S
4153 0U, // LOAD_ZERO_I64x2_A32
4154 0U, // LOAD_ZERO_I64x2_A32_S
4155 0U, // LOAD_ZERO_I64x2_A64
4156 0U, // LOAD_ZERO_I64x2_A64_S
4157 0U, // LOCAL_GET_EXNREF
4158 0U, // LOCAL_GET_EXNREF_S
4159 0U, // LOCAL_GET_EXTERNREF
4160 0U, // LOCAL_GET_EXTERNREF_S
4161 0U, // LOCAL_GET_F32
4162 0U, // LOCAL_GET_F32_S
4163 0U, // LOCAL_GET_F64
4164 0U, // LOCAL_GET_F64_S
4165 0U, // LOCAL_GET_FUNCREF
4166 0U, // LOCAL_GET_FUNCREF_S
4167 0U, // LOCAL_GET_I32
4168 0U, // LOCAL_GET_I32_S
4169 0U, // LOCAL_GET_I64
4170 0U, // LOCAL_GET_I64_S
4171 0U, // LOCAL_GET_V128
4172 0U, // LOCAL_GET_V128_S
4173 0U, // LOCAL_SET_EXNREF
4174 0U, // LOCAL_SET_EXNREF_S
4175 0U, // LOCAL_SET_EXTERNREF
4176 0U, // LOCAL_SET_EXTERNREF_S
4177 0U, // LOCAL_SET_F32
4178 0U, // LOCAL_SET_F32_S
4179 0U, // LOCAL_SET_F64
4180 0U, // LOCAL_SET_F64_S
4181 0U, // LOCAL_SET_FUNCREF
4182 0U, // LOCAL_SET_FUNCREF_S
4183 0U, // LOCAL_SET_I32
4184 0U, // LOCAL_SET_I32_S
4185 0U, // LOCAL_SET_I64
4186 0U, // LOCAL_SET_I64_S
4187 0U, // LOCAL_SET_V128
4188 0U, // LOCAL_SET_V128_S
4189 0U, // LOCAL_TEE_EXNREF
4190 0U, // LOCAL_TEE_EXNREF_S
4191 0U, // LOCAL_TEE_EXTERNREF
4192 0U, // LOCAL_TEE_EXTERNREF_S
4193 0U, // LOCAL_TEE_F32
4194 0U, // LOCAL_TEE_F32_S
4195 0U, // LOCAL_TEE_F64
4196 0U, // LOCAL_TEE_F64_S
4197 0U, // LOCAL_TEE_FUNCREF
4198 0U, // LOCAL_TEE_FUNCREF_S
4199 0U, // LOCAL_TEE_I32
4200 0U, // LOCAL_TEE_I32_S
4201 0U, // LOCAL_TEE_I64
4202 0U, // LOCAL_TEE_I64_S
4203 0U, // LOCAL_TEE_V128
4204 0U, // LOCAL_TEE_V128_S
4205 0U, // LOOP
4206 0U, // LOOP_S
4207 0U, // LT_F16x8
4208 0U, // LT_F16x8_S
4209 0U, // LT_F32
4210 0U, // LT_F32_S
4211 0U, // LT_F32x4
4212 0U, // LT_F32x4_S
4213 0U, // LT_F64
4214 0U, // LT_F64_S
4215 0U, // LT_F64x2
4216 0U, // LT_F64x2_S
4217 0U, // LT_S_I16x8
4218 0U, // LT_S_I16x8_S
4219 0U, // LT_S_I32
4220 0U, // LT_S_I32_S
4221 0U, // LT_S_I32x4
4222 0U, // LT_S_I32x4_S
4223 0U, // LT_S_I64
4224 0U, // LT_S_I64_S
4225 0U, // LT_S_I64x2
4226 0U, // LT_S_I64x2_S
4227 0U, // LT_S_I8x16
4228 0U, // LT_S_I8x16_S
4229 0U, // LT_U_I16x8
4230 0U, // LT_U_I16x8_S
4231 0U, // LT_U_I32
4232 0U, // LT_U_I32_S
4233 0U, // LT_U_I32x4
4234 0U, // LT_U_I32x4_S
4235 0U, // LT_U_I64
4236 0U, // LT_U_I64_S
4237 0U, // LT_U_I8x16
4238 0U, // LT_U_I8x16_S
4239 0U, // MADD_F16x8
4240 0U, // MADD_F16x8_S
4241 0U, // MADD_F32x4
4242 0U, // MADD_F32x4_S
4243 0U, // MADD_F64x2
4244 0U, // MADD_F64x2_S
4245 0U, // MAX_F16x8
4246 0U, // MAX_F16x8_S
4247 0U, // MAX_F32
4248 0U, // MAX_F32_S
4249 0U, // MAX_F32x4
4250 0U, // MAX_F32x4_S
4251 0U, // MAX_F64
4252 0U, // MAX_F64_S
4253 0U, // MAX_F64x2
4254 0U, // MAX_F64x2_S
4255 0U, // MAX_S_I16x8
4256 0U, // MAX_S_I16x8_S
4257 0U, // MAX_S_I32x4
4258 0U, // MAX_S_I32x4_S
4259 0U, // MAX_S_I8x16
4260 0U, // MAX_S_I8x16_S
4261 0U, // MAX_U_I16x8
4262 0U, // MAX_U_I16x8_S
4263 0U, // MAX_U_I32x4
4264 0U, // MAX_U_I32x4_S
4265 0U, // MAX_U_I8x16
4266 0U, // MAX_U_I8x16_S
4267 0U, // MEMORY_ATOMIC_NOTIFY_A32
4268 0U, // MEMORY_ATOMIC_NOTIFY_A32_S
4269 0U, // MEMORY_ATOMIC_NOTIFY_A64
4270 0U, // MEMORY_ATOMIC_NOTIFY_A64_S
4271 0U, // MEMORY_ATOMIC_WAIT32_A32
4272 0U, // MEMORY_ATOMIC_WAIT32_A32_S
4273 0U, // MEMORY_ATOMIC_WAIT32_A64
4274 0U, // MEMORY_ATOMIC_WAIT32_A64_S
4275 0U, // MEMORY_ATOMIC_WAIT64_A32
4276 0U, // MEMORY_ATOMIC_WAIT64_A32_S
4277 0U, // MEMORY_ATOMIC_WAIT64_A64
4278 0U, // MEMORY_ATOMIC_WAIT64_A64_S
4279 0U, // MIN_F16x8
4280 0U, // MIN_F16x8_S
4281 0U, // MIN_F32
4282 0U, // MIN_F32_S
4283 0U, // MIN_F32x4
4284 0U, // MIN_F32x4_S
4285 0U, // MIN_F64
4286 0U, // MIN_F64_S
4287 0U, // MIN_F64x2
4288 0U, // MIN_F64x2_S
4289 0U, // MIN_S_I16x8
4290 0U, // MIN_S_I16x8_S
4291 0U, // MIN_S_I32x4
4292 0U, // MIN_S_I32x4_S
4293 0U, // MIN_S_I8x16
4294 0U, // MIN_S_I8x16_S
4295 0U, // MIN_U_I16x8
4296 0U, // MIN_U_I16x8_S
4297 0U, // MIN_U_I32x4
4298 0U, // MIN_U_I32x4_S
4299 0U, // MIN_U_I8x16
4300 0U, // MIN_U_I8x16_S
4301 0U, // MUL_F16x8
4302 0U, // MUL_F16x8_S
4303 0U, // MUL_F32
4304 0U, // MUL_F32_S
4305 0U, // MUL_F32x4
4306 0U, // MUL_F32x4_S
4307 0U, // MUL_F64
4308 0U, // MUL_F64_S
4309 0U, // MUL_F64x2
4310 0U, // MUL_F64x2_S
4311 0U, // MUL_I16x8
4312 0U, // MUL_I16x8_S
4313 0U, // MUL_I32
4314 0U, // MUL_I32_S
4315 0U, // MUL_I32x4
4316 0U, // MUL_I32x4_S
4317 0U, // MUL_I64
4318 0U, // MUL_I64_S
4319 0U, // MUL_I64x2
4320 0U, // MUL_I64x2_S
4321 0U, // NARROW_S_I16x8
4322 0U, // NARROW_S_I16x8_S
4323 0U, // NARROW_S_I8x16
4324 0U, // NARROW_S_I8x16_S
4325 0U, // NARROW_U_I16x8
4326 0U, // NARROW_U_I16x8_S
4327 0U, // NARROW_U_I8x16
4328 0U, // NARROW_U_I8x16_S
4329 0U, // NEAREST_F16x8
4330 0U, // NEAREST_F16x8_S
4331 0U, // NEAREST_F32
4332 0U, // NEAREST_F32_S
4333 0U, // NEAREST_F32x4
4334 0U, // NEAREST_F32x4_S
4335 0U, // NEAREST_F64
4336 0U, // NEAREST_F64_S
4337 0U, // NEAREST_F64x2
4338 0U, // NEAREST_F64x2_S
4339 0U, // NEG_F16x8
4340 0U, // NEG_F16x8_S
4341 0U, // NEG_F32
4342 0U, // NEG_F32_S
4343 0U, // NEG_F32x4
4344 0U, // NEG_F32x4_S
4345 0U, // NEG_F64
4346 0U, // NEG_F64_S
4347 0U, // NEG_F64x2
4348 0U, // NEG_F64x2_S
4349 0U, // NEG_I16x8
4350 0U, // NEG_I16x8_S
4351 0U, // NEG_I32x4
4352 0U, // NEG_I32x4_S
4353 0U, // NEG_I64x2
4354 0U, // NEG_I64x2_S
4355 0U, // NEG_I8x16
4356 0U, // NEG_I8x16_S
4357 0U, // NE_F16x8
4358 0U, // NE_F16x8_S
4359 0U, // NE_F32
4360 0U, // NE_F32_S
4361 0U, // NE_F32x4
4362 0U, // NE_F32x4_S
4363 0U, // NE_F64
4364 0U, // NE_F64_S
4365 0U, // NE_F64x2
4366 0U, // NE_F64x2_S
4367 0U, // NE_I16x8
4368 0U, // NE_I16x8_S
4369 0U, // NE_I32
4370 0U, // NE_I32_S
4371 0U, // NE_I32x4
4372 0U, // NE_I32x4_S
4373 0U, // NE_I64
4374 0U, // NE_I64_S
4375 0U, // NE_I64x2
4376 0U, // NE_I64x2_S
4377 0U, // NE_I8x16
4378 0U, // NE_I8x16_S
4379 0U, // NMADD_F16x8
4380 0U, // NMADD_F16x8_S
4381 0U, // NMADD_F32x4
4382 0U, // NMADD_F32x4_S
4383 0U, // NMADD_F64x2
4384 0U, // NMADD_F64x2_S
4385 0U, // NOP
4386 0U, // NOP_S
4387 0U, // NOT
4388 0U, // NOT_S
4389 0U, // OR
4390 0U, // OR_I32
4391 0U, // OR_I32_S
4392 0U, // OR_I64
4393 0U, // OR_I64_S
4394 0U, // OR_S
4395 0U, // PMAX_F16x8
4396 0U, // PMAX_F16x8_S
4397 0U, // PMAX_F32x4
4398 0U, // PMAX_F32x4_S
4399 0U, // PMAX_F64x2
4400 0U, // PMAX_F64x2_S
4401 0U, // PMIN_F16x8
4402 0U, // PMIN_F16x8_S
4403 0U, // PMIN_F32x4
4404 0U, // PMIN_F32x4_S
4405 0U, // PMIN_F64x2
4406 0U, // PMIN_F64x2_S
4407 0U, // POPCNT_I32
4408 0U, // POPCNT_I32_S
4409 0U, // POPCNT_I64
4410 0U, // POPCNT_I64_S
4411 0U, // POPCNT_I8x16
4412 0U, // POPCNT_I8x16_S
4413 0U, // Q15MULR_SAT_S_I16x8
4414 0U, // Q15MULR_SAT_S_I16x8_S
4415 0U, // REF_IS_NULL_EXNREF
4416 0U, // REF_IS_NULL_EXNREF_S
4417 0U, // REF_IS_NULL_EXTERNREF
4418 0U, // REF_IS_NULL_EXTERNREF_S
4419 0U, // REF_IS_NULL_FUNCREF
4420 0U, // REF_IS_NULL_FUNCREF_S
4421 0U, // REF_NULL_EXNREF
4422 0U, // REF_NULL_EXNREF_S
4423 0U, // REF_NULL_EXTERNREF
4424 0U, // REF_NULL_EXTERNREF_S
4425 0U, // REF_NULL_FUNCREF
4426 0U, // REF_NULL_FUNCREF_S
4427 0U, // RELAXED_DOT
4428 0U, // RELAXED_DOT_ADD
4429 0U, // RELAXED_DOT_ADD_S
4430 0U, // RELAXED_DOT_BFLOAT
4431 0U, // RELAXED_DOT_BFLOAT_S
4432 0U, // RELAXED_DOT_S
4433 0U, // RELAXED_Q15MULR_S_I16x8
4434 0U, // RELAXED_Q15MULR_S_I16x8_S
4435 0U, // RELAXED_SWIZZLE
4436 0U, // RELAXED_SWIZZLE_S
4437 0U, // REM_S_I32
4438 0U, // REM_S_I32_S
4439 0U, // REM_S_I64
4440 0U, // REM_S_I64_S
4441 0U, // REM_U_I32
4442 0U, // REM_U_I32_S
4443 0U, // REM_U_I64
4444 0U, // REM_U_I64_S
4445 0U, // REPLACE_LANE_F32x4
4446 0U, // REPLACE_LANE_F32x4_S
4447 0U, // REPLACE_LANE_F64x2
4448 0U, // REPLACE_LANE_F64x2_S
4449 0U, // REPLACE_LANE_I16x8
4450 0U, // REPLACE_LANE_I16x8_S
4451 0U, // REPLACE_LANE_I32x4
4452 0U, // REPLACE_LANE_I32x4_S
4453 0U, // REPLACE_LANE_I64x2
4454 0U, // REPLACE_LANE_I64x2_S
4455 0U, // REPLACE_LANE_I8x16
4456 0U, // REPLACE_LANE_I8x16_S
4457 0U, // RETHROW
4458 0U, // RETHROW_S
4459 0U, // RETURN
4460 0U, // RETURN_S
4461 0U, // RET_CALL
4462 0U, // RET_CALL_INDIRECT
4463 0U, // RET_CALL_INDIRECT_S
4464 0U, // RET_CALL_S
4465 0U, // ROTL_I32
4466 0U, // ROTL_I32_S
4467 0U, // ROTL_I64
4468 0U, // ROTL_I64_S
4469 0U, // ROTR_I32
4470 0U, // ROTR_I32_S
4471 0U, // ROTR_I64
4472 0U, // ROTR_I64_S
4473 0U, // SELECT_EXNREF
4474 0U, // SELECT_EXNREF_S
4475 0U, // SELECT_EXTERNREF
4476 0U, // SELECT_EXTERNREF_S
4477 0U, // SELECT_F32
4478 0U, // SELECT_F32_S
4479 0U, // SELECT_F64
4480 0U, // SELECT_F64_S
4481 0U, // SELECT_FUNCREF
4482 0U, // SELECT_FUNCREF_S
4483 0U, // SELECT_I32
4484 0U, // SELECT_I32_S
4485 0U, // SELECT_I64
4486 0U, // SELECT_I64_S
4487 0U, // SELECT_V128
4488 0U, // SELECT_V128_S
4489 0U, // SHL_I16x8
4490 0U, // SHL_I16x8_S
4491 0U, // SHL_I32
4492 0U, // SHL_I32_S
4493 0U, // SHL_I32x4
4494 0U, // SHL_I32x4_S
4495 0U, // SHL_I64
4496 0U, // SHL_I64_S
4497 0U, // SHL_I64x2
4498 0U, // SHL_I64x2_S
4499 0U, // SHL_I8x16
4500 0U, // SHL_I8x16_S
4501 0U, // SHR_S_I16x8
4502 0U, // SHR_S_I16x8_S
4503 0U, // SHR_S_I32
4504 0U, // SHR_S_I32_S
4505 0U, // SHR_S_I32x4
4506 0U, // SHR_S_I32x4_S
4507 0U, // SHR_S_I64
4508 0U, // SHR_S_I64_S
4509 0U, // SHR_S_I64x2
4510 0U, // SHR_S_I64x2_S
4511 0U, // SHR_S_I8x16
4512 0U, // SHR_S_I8x16_S
4513 0U, // SHR_U_I16x8
4514 0U, // SHR_U_I16x8_S
4515 0U, // SHR_U_I32
4516 0U, // SHR_U_I32_S
4517 0U, // SHR_U_I32x4
4518 0U, // SHR_U_I32x4_S
4519 0U, // SHR_U_I64
4520 0U, // SHR_U_I64_S
4521 0U, // SHR_U_I64x2
4522 0U, // SHR_U_I64x2_S
4523 0U, // SHR_U_I8x16
4524 0U, // SHR_U_I8x16_S
4525 1U, // SHUFFLE
4526 0U, // SHUFFLE_S
4527 0U, // SIMD_RELAXED_FMAX_F32x4
4528 0U, // SIMD_RELAXED_FMAX_F32x4_S
4529 0U, // SIMD_RELAXED_FMAX_F64x2
4530 0U, // SIMD_RELAXED_FMAX_F64x2_S
4531 0U, // SIMD_RELAXED_FMIN_F32x4
4532 0U, // SIMD_RELAXED_FMIN_F32x4_S
4533 0U, // SIMD_RELAXED_FMIN_F64x2
4534 0U, // SIMD_RELAXED_FMIN_F64x2_S
4535 0U, // SPLAT_F16x8
4536 0U, // SPLAT_F16x8_S
4537 0U, // SPLAT_F32x4
4538 0U, // SPLAT_F32x4_S
4539 0U, // SPLAT_F64x2
4540 0U, // SPLAT_F64x2_S
4541 0U, // SPLAT_I16x8
4542 0U, // SPLAT_I16x8_S
4543 0U, // SPLAT_I32x4
4544 0U, // SPLAT_I32x4_S
4545 0U, // SPLAT_I64x2
4546 0U, // SPLAT_I64x2_S
4547 0U, // SPLAT_I8x16
4548 0U, // SPLAT_I8x16_S
4549 0U, // SQRT_F16x8
4550 0U, // SQRT_F16x8_S
4551 0U, // SQRT_F32
4552 0U, // SQRT_F32_S
4553 0U, // SQRT_F32x4
4554 0U, // SQRT_F32x4_S
4555 0U, // SQRT_F64
4556 0U, // SQRT_F64_S
4557 0U, // SQRT_F64x2
4558 0U, // SQRT_F64x2_S
4559 0U, // STORE16_I32_A32
4560 0U, // STORE16_I32_A32_S
4561 0U, // STORE16_I32_A64
4562 0U, // STORE16_I32_A64_S
4563 0U, // STORE16_I64_A32
4564 0U, // STORE16_I64_A32_S
4565 0U, // STORE16_I64_A64
4566 0U, // STORE16_I64_A64_S
4567 0U, // STORE32_I64_A32
4568 0U, // STORE32_I64_A32_S
4569 0U, // STORE32_I64_A64
4570 0U, // STORE32_I64_A64_S
4571 0U, // STORE8_I32_A32
4572 0U, // STORE8_I32_A32_S
4573 0U, // STORE8_I32_A64
4574 0U, // STORE8_I32_A64_S
4575 0U, // STORE8_I64_A32
4576 0U, // STORE8_I64_A32_S
4577 0U, // STORE8_I64_A64
4578 0U, // STORE8_I64_A64_S
4579 0U, // STORE_F16_F32_A32
4580 0U, // STORE_F16_F32_A32_S
4581 0U, // STORE_F16_F32_A64
4582 0U, // STORE_F16_F32_A64_S
4583 0U, // STORE_F32_A32
4584 0U, // STORE_F32_A32_S
4585 0U, // STORE_F32_A64
4586 0U, // STORE_F32_A64_S
4587 0U, // STORE_F64_A32
4588 0U, // STORE_F64_A32_S
4589 0U, // STORE_F64_A64
4590 0U, // STORE_F64_A64_S
4591 0U, // STORE_I32_A32
4592 0U, // STORE_I32_A32_S
4593 0U, // STORE_I32_A64
4594 0U, // STORE_I32_A64_S
4595 0U, // STORE_I64_A32
4596 0U, // STORE_I64_A32_S
4597 0U, // STORE_I64_A64
4598 0U, // STORE_I64_A64_S
4599 0U, // STORE_LANE_I16x8_A32
4600 0U, // STORE_LANE_I16x8_A32_S
4601 0U, // STORE_LANE_I16x8_A64
4602 0U, // STORE_LANE_I16x8_A64_S
4603 0U, // STORE_LANE_I32x4_A32
4604 0U, // STORE_LANE_I32x4_A32_S
4605 0U, // STORE_LANE_I32x4_A64
4606 0U, // STORE_LANE_I32x4_A64_S
4607 0U, // STORE_LANE_I64x2_A32
4608 0U, // STORE_LANE_I64x2_A32_S
4609 0U, // STORE_LANE_I64x2_A64
4610 0U, // STORE_LANE_I64x2_A64_S
4611 0U, // STORE_LANE_I8x16_A32
4612 0U, // STORE_LANE_I8x16_A32_S
4613 0U, // STORE_LANE_I8x16_A64
4614 0U, // STORE_LANE_I8x16_A64_S
4615 0U, // STORE_V128_A32
4616 0U, // STORE_V128_A32_S
4617 0U, // STORE_V128_A64
4618 0U, // STORE_V128_A64_S
4619 0U, // SUB_F16x8
4620 0U, // SUB_F16x8_S
4621 0U, // SUB_F32
4622 0U, // SUB_F32_S
4623 0U, // SUB_F32x4
4624 0U, // SUB_F32x4_S
4625 0U, // SUB_F64
4626 0U, // SUB_F64_S
4627 0U, // SUB_F64x2
4628 0U, // SUB_F64x2_S
4629 0U, // SUB_I16x8
4630 0U, // SUB_I16x8_S
4631 0U, // SUB_I32
4632 0U, // SUB_I32_S
4633 0U, // SUB_I32x4
4634 0U, // SUB_I32x4_S
4635 0U, // SUB_I64
4636 0U, // SUB_I64_S
4637 0U, // SUB_I64x2
4638 0U, // SUB_I64x2_S
4639 0U, // SUB_I8x16
4640 0U, // SUB_I8x16_S
4641 0U, // SUB_SAT_S_I16x8
4642 0U, // SUB_SAT_S_I16x8_S
4643 0U, // SUB_SAT_S_I8x16
4644 0U, // SUB_SAT_S_I8x16_S
4645 0U, // SUB_SAT_U_I16x8
4646 0U, // SUB_SAT_U_I16x8_S
4647 0U, // SUB_SAT_U_I8x16
4648 0U, // SUB_SAT_U_I8x16_S
4649 0U, // SWIZZLE
4650 0U, // SWIZZLE_S
4651 0U, // TABLE_COPY
4652 0U, // TABLE_COPY_S
4653 0U, // TABLE_FILL_EXNREF
4654 0U, // TABLE_FILL_EXNREF_S
4655 0U, // TABLE_FILL_EXTERNREF
4656 0U, // TABLE_FILL_EXTERNREF_S
4657 0U, // TABLE_FILL_FUNCREF
4658 0U, // TABLE_FILL_FUNCREF_S
4659 0U, // TABLE_GET_EXNREF
4660 0U, // TABLE_GET_EXNREF_S
4661 0U, // TABLE_GET_EXTERNREF
4662 0U, // TABLE_GET_EXTERNREF_S
4663 0U, // TABLE_GET_FUNCREF
4664 0U, // TABLE_GET_FUNCREF_S
4665 0U, // TABLE_GROW_EXNREF
4666 0U, // TABLE_GROW_EXNREF_S
4667 0U, // TABLE_GROW_EXTERNREF
4668 0U, // TABLE_GROW_EXTERNREF_S
4669 0U, // TABLE_GROW_FUNCREF
4670 0U, // TABLE_GROW_FUNCREF_S
4671 0U, // TABLE_SET_EXNREF
4672 0U, // TABLE_SET_EXNREF_S
4673 0U, // TABLE_SET_EXTERNREF
4674 0U, // TABLE_SET_EXTERNREF_S
4675 0U, // TABLE_SET_FUNCREF
4676 0U, // TABLE_SET_FUNCREF_S
4677 0U, // TABLE_SIZE
4678 0U, // TABLE_SIZE_S
4679 0U, // TEE_EXNREF
4680 0U, // TEE_EXNREF_S
4681 0U, // TEE_EXTERNREF
4682 0U, // TEE_EXTERNREF_S
4683 0U, // TEE_F32
4684 0U, // TEE_F32_S
4685 0U, // TEE_F64
4686 0U, // TEE_F64_S
4687 0U, // TEE_FUNCREF
4688 0U, // TEE_FUNCREF_S
4689 0U, // TEE_I32
4690 0U, // TEE_I32_S
4691 0U, // TEE_I64
4692 0U, // TEE_I64_S
4693 0U, // TEE_V128
4694 0U, // TEE_V128_S
4695 0U, // THROW
4696 0U, // THROW_S
4697 0U, // TRUNC_F16x8
4698 0U, // TRUNC_F16x8_S
4699 0U, // TRUNC_F32
4700 0U, // TRUNC_F32_S
4701 0U, // TRUNC_F32x4
4702 0U, // TRUNC_F32x4_S
4703 0U, // TRUNC_F64
4704 0U, // TRUNC_F64_S
4705 0U, // TRUNC_F64x2
4706 0U, // TRUNC_F64x2_S
4707 0U, // TRY
4708 0U, // TRY_S
4709 0U, // UNREACHABLE
4710 0U, // UNREACHABLE_S
4711 0U, // XOR
4712 0U, // XOR_I32
4713 0U, // XOR_I32_S
4714 0U, // XOR_I64
4715 0U, // XOR_I64_S
4716 0U, // XOR_S
4717 0U, // anonymous_8187MEMORY_GROW_A32
4718 0U, // anonymous_8187MEMORY_GROW_A32_S
4719 0U, // anonymous_8187MEMORY_SIZE_A32
4720 0U, // anonymous_8187MEMORY_SIZE_A32_S
4721 0U, // anonymous_8188MEMORY_GROW_A64
4722 0U, // anonymous_8188MEMORY_GROW_A64_S
4723 0U, // anonymous_8188MEMORY_SIZE_A64
4724 0U, // anonymous_8188MEMORY_SIZE_A64_S
4725 0U, // anonymous_8878DATA_DROP
4726 0U, // anonymous_8878DATA_DROP_S
4727 0U, // anonymous_8878MEMORY_COPY_A32
4728 0U, // anonymous_8878MEMORY_COPY_A32_S
4729 0U, // anonymous_8878MEMORY_FILL_A32
4730 0U, // anonymous_8878MEMORY_FILL_A32_S
4731 0U, // anonymous_8878MEMORY_INIT_A32
4732 0U, // anonymous_8878MEMORY_INIT_A32_S
4733 0U, // anonymous_8879DATA_DROP
4734 0U, // anonymous_8879DATA_DROP_S
4735 0U, // anonymous_8879MEMORY_COPY_A64
4736 0U, // anonymous_8879MEMORY_COPY_A64_S
4737 0U, // anonymous_8879MEMORY_FILL_A64
4738 0U, // anonymous_8879MEMORY_FILL_A64_S
4739 0U, // anonymous_8879MEMORY_INIT_A64
4740 0U, // anonymous_8879MEMORY_INIT_A64_S
4741 0U, // convert_low_s_F64x2
4742 0U, // convert_low_s_F64x2_S
4743 0U, // convert_low_u_F64x2
4744 0U, // convert_low_u_F64x2_S
4745 0U, // demote_zero_F32x4
4746 0U, // demote_zero_F32x4_S
4747 0U, // extend_high_s_I16x8
4748 0U, // extend_high_s_I16x8_S
4749 0U, // extend_high_s_I32x4
4750 0U, // extend_high_s_I32x4_S
4751 0U, // extend_high_s_I64x2
4752 0U, // extend_high_s_I64x2_S
4753 0U, // extend_high_u_I16x8
4754 0U, // extend_high_u_I16x8_S
4755 0U, // extend_high_u_I32x4
4756 0U, // extend_high_u_I32x4_S
4757 0U, // extend_high_u_I64x2
4758 0U, // extend_high_u_I64x2_S
4759 0U, // extend_low_s_I16x8
4760 0U, // extend_low_s_I16x8_S
4761 0U, // extend_low_s_I32x4
4762 0U, // extend_low_s_I32x4_S
4763 0U, // extend_low_s_I64x2
4764 0U, // extend_low_s_I64x2_S
4765 0U, // extend_low_u_I16x8
4766 0U, // extend_low_u_I16x8_S
4767 0U, // extend_low_u_I32x4
4768 0U, // extend_low_u_I32x4_S
4769 0U, // extend_low_u_I64x2
4770 0U, // extend_low_u_I64x2_S
4771 0U, // fp_to_sint_I16x8
4772 0U, // fp_to_sint_I16x8_S
4773 0U, // fp_to_sint_I32x4
4774 0U, // fp_to_sint_I32x4_S
4775 0U, // fp_to_uint_I16x8
4776 0U, // fp_to_uint_I16x8_S
4777 0U, // fp_to_uint_I32x4
4778 0U, // fp_to_uint_I32x4_S
4779 0U, // int_wasm_extadd_pairwise_signed_I16x8
4780 0U, // int_wasm_extadd_pairwise_signed_I16x8_S
4781 0U, // int_wasm_extadd_pairwise_signed_I32x4
4782 0U, // int_wasm_extadd_pairwise_signed_I32x4_S
4783 0U, // int_wasm_extadd_pairwise_unsigned_I16x8
4784 0U, // int_wasm_extadd_pairwise_unsigned_I16x8_S
4785 0U, // int_wasm_extadd_pairwise_unsigned_I32x4
4786 0U, // int_wasm_extadd_pairwise_unsigned_I32x4_S
4787 0U, // int_wasm_relaxed_trunc_signed_I32x4
4788 0U, // int_wasm_relaxed_trunc_signed_I32x4_S
4789 0U, // int_wasm_relaxed_trunc_signed_zero_I32x4
4790 0U, // int_wasm_relaxed_trunc_signed_zero_I32x4_S
4791 0U, // int_wasm_relaxed_trunc_unsigned_I32x4
4792 0U, // int_wasm_relaxed_trunc_unsigned_I32x4_S
4793 0U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4
4794 0U, // int_wasm_relaxed_trunc_unsigned_zero_I32x4_S
4795 0U, // promote_low_F64x2
4796 0U, // promote_low_F64x2_S
4797 0U, // sint_to_fp_F16x8
4798 0U, // sint_to_fp_F16x8_S
4799 0U, // sint_to_fp_F32x4
4800 0U, // sint_to_fp_F32x4_S
4801 0U, // trunc_sat_zero_s_I32x4
4802 0U, // trunc_sat_zero_s_I32x4_S
4803 0U, // trunc_sat_zero_u_I32x4
4804 0U, // trunc_sat_zero_u_I32x4_S
4805 0U, // uint_to_fp_F16x8
4806 0U, // uint_to_fp_F16x8_S
4807 0U, // uint_to_fp_F32x4
4808 0U, // uint_to_fp_F32x4_S
4809 };
4810
4811 // Emit the opcode for the instruction.
4812 uint64_t Bits = 0;
4813 Bits |= (uint64_t)OpInfo0[MI->getOpcode()] << 0;
4814 Bits |= (uint64_t)OpInfo1[MI->getOpcode()] << 32;
4815 if (Bits == 0)
4816 return {nullptr, Bits};
4817 return {AsmStrs+(Bits & 16383)-1, Bits};
4818
4819}
4820/// printInstruction - This method is automatically generated by tablegen
4821/// from the instruction set description.
4822LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
4823void WebAssemblyInstPrinter::printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O) {
4824 O << "\t";
4825
4826 auto MnemonicInfo = getMnemonic(MI);
4827
4828 O << MnemonicInfo.first;
4829
4830 uint64_t Bits = MnemonicInfo.second;
4831 assert(Bits != 0 && "Cannot print this instruction.");
4832
4833 // Fragment 0 encoded into 3 bits for 5 unique commands.
4834 switch ((Bits >> 14) & 7) {
4835 default: llvm_unreachable("Invalid command number.");
4836 case 0:
4837 // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
4838 return;
4839 break;
4840 case 1:
4841 // CALL_PARAMS, CALL_PARAMS_S, ABS_F16x8, ABS_F32, ABS_F32x4, ABS_F64, AB...
4842 printOperand(MI, OpNo: 0, O);
4843 break;
4844 case 2:
4845 // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_...
4846 printOperand(MI, OpNo: 1, O);
4847 break;
4848 case 3:
4849 // BLOCK, BLOCK_S, IF, IF_S, LOOP, LOOP_S, TRY, TRY_S
4850 printWebAssemblySignatureOperand(MI, OpNo: 0, O);
4851 break;
4852 case 4:
4853 // BR_TABLE_I32_S, BR_TABLE_I64_S
4854 printBrList(MI, OpNo: 0, O);
4855 return;
4856 break;
4857 }
4858
4859
4860 // Fragment 1 encoded into 2 bits for 4 unique commands.
4861 switch ((Bits >> 17) & 3) {
4862 default: llvm_unreachable("Invalid command number.");
4863 case 0:
4864 // CALL_PARAMS, CALL_PARAMS_S, BLOCK, BLOCK_S, BR, BR_IF_S, BR_S, BR_TABL...
4865 return;
4866 break;
4867 case 1:
4868 // ABS_F16x8, ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x...
4869 O << ", ";
4870 break;
4871 case 2:
4872 // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_...
4873 printWebAssemblyP2AlignOperand(MI, OpNo: 0, O);
4874 break;
4875 case 3:
4876 // ATOMIC_STORE16_I32_A32, ATOMIC_STORE16_I32_A64, ATOMIC_STORE16_I64_A32...
4877 O << '(';
4878 break;
4879 }
4880
4881
4882 // Fragment 2 encoded into 3 bits for 5 unique commands.
4883 switch ((Bits >> 19) & 7) {
4884 default: llvm_unreachable("Invalid command number.");
4885 case 0:
4886 // ABS_F16x8, ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x...
4887 printOperand(MI, OpNo: 1, O);
4888 break;
4889 case 1:
4890 // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_...
4891 printOperand(MI, OpNo: 2, O);
4892 break;
4893 case 2:
4894 // ATOMIC_LOAD16_U_I32_A32_S, ATOMIC_LOAD16_U_I32_A64_S, ATOMIC_LOAD16_U_...
4895 return;
4896 break;
4897 case 3:
4898 // LOAD_LANE_I16x8_A32_S, LOAD_LANE_I16x8_A64_S, LOAD_LANE_I32x4_A32_S, L...
4899 O << ", ";
4900 printOperand(MI, OpNo: 2, O);
4901 return;
4902 break;
4903 case 4:
4904 // STORE_LANE_I16x8_A32, STORE_LANE_I16x8_A64, STORE_LANE_I32x4_A32, STOR...
4905 printOperand(MI, OpNo: 3, O);
4906 O << ')';
4907 printWebAssemblyP2AlignOperand(MI, OpNo: 0, O);
4908 O << ", ";
4909 printOperand(MI, OpNo: 4, O);
4910 O << ", ";
4911 printOperand(MI, OpNo: 2, O);
4912 return;
4913 break;
4914 }
4915
4916
4917 // Fragment 3 encoded into 2 bits for 4 unique commands.
4918 switch ((Bits >> 22) & 3) {
4919 default: llvm_unreachable("Invalid command number.");
4920 case 0:
4921 // ABS_F16x8, ABS_F32, ABS_F32x4, ABS_F64, ABS_F64x2, ABS_I16x8, ABS_I32x...
4922 return;
4923 break;
4924 case 1:
4925 // ADD_F16x8, ADD_F32, ADD_F32x4, ADD_F64, ADD_F64x2, ADD_I16x8, ADD_I32,...
4926 O << ", ";
4927 printOperand(MI, OpNo: 2, O);
4928 break;
4929 case 2:
4930 // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_...
4931 O << '(';
4932 break;
4933 case 3:
4934 // ATOMIC_STORE16_I32_A32, ATOMIC_STORE16_I32_A64, ATOMIC_STORE16_I64_A32...
4935 O << ')';
4936 printWebAssemblyP2AlignOperand(MI, OpNo: 0, O);
4937 O << ", ";
4938 printOperand(MI, OpNo: 3, O);
4939 return;
4940 break;
4941 }
4942
4943
4944 // Fragment 4 encoded into 2 bits for 4 unique commands.
4945 switch ((Bits >> 24) & 3) {
4946 default: llvm_unreachable("Invalid command number.");
4947 case 0:
4948 // ADD_F16x8, ADD_F32, ADD_F32x4, ADD_F64, ADD_F64x2, ADD_I16x8, ADD_I32,...
4949 return;
4950 break;
4951 case 1:
4952 // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_...
4953 printOperand(MI, OpNo: 3, O);
4954 O << ')';
4955 printWebAssemblyP2AlignOperand(MI, OpNo: 1, O);
4956 break;
4957 case 2:
4958 // BITSELECT, CONST_V128_F32x4, CONST_V128_F32x4_S, CONST_V128_I16x8, CON...
4959 O << ", ";
4960 printOperand(MI, OpNo: 3, O);
4961 break;
4962 case 3:
4963 // LOAD_LANE_I16x8_A32, LOAD_LANE_I16x8_A64, LOAD_LANE_I32x4_A32, LOAD_LA...
4964 printOperand(MI, OpNo: 4, O);
4965 O << ')';
4966 printWebAssemblyP2AlignOperand(MI, OpNo: 1, O);
4967 O << ", ";
4968 printOperand(MI, OpNo: 5, O);
4969 O << ", ";
4970 printOperand(MI, OpNo: 3, O);
4971 return;
4972 break;
4973 }
4974
4975
4976 // Fragment 5 encoded into 1 bits for 2 unique commands.
4977 if ((Bits >> 26) & 1) {
4978 // ATOMIC_RMW16_U_ADD_I32_A32, ATOMIC_RMW16_U_ADD_I32_A64, ATOMIC_RMW16_U...
4979 O << ", ";
4980 printOperand(MI, OpNo: 4, O);
4981 } else {
4982 // ATOMIC_LOAD16_U_I32_A32, ATOMIC_LOAD16_U_I32_A64, ATOMIC_LOAD16_U_I64_...
4983 return;
4984 }
4985
4986
4987 // Fragment 6 encoded into 1 bits for 2 unique commands.
4988 if ((Bits >> 27) & 1) {
4989 // ATOMIC_RMW16_U_CMPXCHG_I32_A32, ATOMIC_RMW16_U_CMPXCHG_I32_A64, ATOMIC...
4990 O << ", ";
4991 printOperand(MI, OpNo: 5, O);
4992 } else {
4993 // ATOMIC_RMW16_U_ADD_I32_A32, ATOMIC_RMW16_U_ADD_I32_A64, ATOMIC_RMW16_U...
4994 return;
4995 }
4996
4997
4998 // Fragment 7 encoded into 1 bits for 2 unique commands.
4999 if ((Bits >> 28) & 1) {
5000 // CONST_V128_I16x8, CONST_V128_I16x8_S, CONST_V128_I8x16, CONST_V128_I8x...
5001 O << ", ";
5002 printOperand(MI, OpNo: 6, O);
5003 O << ", ";
5004 printOperand(MI, OpNo: 7, O);
5005 } else {
5006 // ATOMIC_RMW16_U_CMPXCHG_I32_A32, ATOMIC_RMW16_U_CMPXCHG_I32_A64, ATOMIC...
5007 return;
5008 }
5009
5010
5011 // Fragment 8 encoded into 1 bits for 2 unique commands.
5012 if ((Bits >> 29) & 1) {
5013 // CONST_V128_I16x8_S
5014 return;
5015 } else {
5016 // CONST_V128_I16x8, CONST_V128_I8x16, CONST_V128_I8x16_S, SHUFFLE, SHUFF...
5017 O << ", ";
5018 printOperand(MI, OpNo: 8, O);
5019 }
5020
5021
5022 // Fragment 9 encoded into 1 bits for 2 unique commands.
5023 if ((Bits >> 30) & 1) {
5024 // CONST_V128_I8x16, CONST_V128_I8x16_S, SHUFFLE, SHUFFLE_S
5025 O << ", ";
5026 printOperand(MI, OpNo: 9, O);
5027 O << ", ";
5028 printOperand(MI, OpNo: 10, O);
5029 O << ", ";
5030 printOperand(MI, OpNo: 11, O);
5031 O << ", ";
5032 printOperand(MI, OpNo: 12, O);
5033 O << ", ";
5034 printOperand(MI, OpNo: 13, O);
5035 O << ", ";
5036 printOperand(MI, OpNo: 14, O);
5037 O << ", ";
5038 printOperand(MI, OpNo: 15, O);
5039 } else {
5040 // CONST_V128_I16x8
5041 return;
5042 }
5043
5044
5045 // Fragment 10 encoded into 1 bits for 2 unique commands.
5046 if ((Bits >> 31) & 1) {
5047 // CONST_V128_I8x16_S, SHUFFLE_S
5048 return;
5049 } else {
5050 // CONST_V128_I8x16, SHUFFLE
5051 O << ", ";
5052 printOperand(MI, OpNo: 16, O);
5053 }
5054
5055
5056 // Fragment 11 encoded into 1 bits for 2 unique commands.
5057 if ((Bits >> 32) & 1) {
5058 // SHUFFLE
5059 O << ", ";
5060 printOperand(MI, OpNo: 17, O);
5061 O << ", ";
5062 printOperand(MI, OpNo: 18, O);
5063 return;
5064 } else {
5065 // CONST_V128_I8x16
5066 return;
5067 }
5068
5069}
5070
5071
5072/// getRegisterName - This method is automatically generated by tblgen
5073/// from the register set description. This returns the assembler name
5074/// for the specified register.
5075const char *WebAssemblyInstPrinter::getRegisterName(MCRegister Reg) {
5076 unsigned RegNo = Reg.id();
5077 assert(RegNo && RegNo < 15 && "Invalid register number!");
5078
5079
5080#ifdef __GNUC__
5081#pragma GCC diagnostic push
5082#pragma GCC diagnostic ignored "-Woverlength-strings"
5083#endif
5084 static const char AsmStrs[] = {
5085 /* 0 */ "%f32.0\0"
5086 /* 7 */ "%i32.0\0"
5087 /* 14 */ "%f64.0\0"
5088 /* 21 */ "%i64.0\0"
5089 /* 28 */ "%funcref.0\0"
5090 /* 39 */ "%externref.0\0"
5091 /* 52 */ "%exnref.0\0"
5092 /* 62 */ "%FP32\0"
5093 /* 68 */ "%SP32\0"
5094 /* 74 */ "%FP64\0"
5095 /* 80 */ "%SP64\0"
5096 /* 86 */ "%v128\0"
5097 /* 92 */ "STACK\0"
5098 /* 98 */ "ARGUMENTS\0"
5099};
5100#ifdef __GNUC__
5101#pragma GCC diagnostic pop
5102#endif
5103
5104 static const uint8_t RegAsmOffset[] = {
5105 98, 92, 52, 39, 62, 74, 28, 68, 80, 0, 14, 7, 21, 86,
5106 };
5107
5108 assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&
5109 "Invalid alt name index for register!");
5110 return AsmStrs+RegAsmOffset[RegNo-1];
5111}
5112
5113#ifdef PRINT_ALIAS_INSTR
5114#undef PRINT_ALIAS_INSTR
5115
5116bool WebAssemblyInstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS) {
5117 return false;
5118}
5119
5120#endif // PRINT_ALIAS_INSTR
5121